diff --git a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
index ea6ed322e9b19..53ef5b2dd599e 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
@@ -78,6 +78,18 @@ inline std::optional<int64_t> matchConstant(Register Reg,
   return getIConstantVRegSExtVal(Reg, MRI);
 }
 
+template <>
+inline std::optional<ValueAndVReg> matchConstant(Register Reg,
+                                                 const MachineRegisterInfo &MRI) {
+  return getIConstantVRegValWithLookThrough(Reg, MRI);
+}
+
+template <>
+inline std::optional<FPValueAndVReg> matchConstant(Register Reg,
+                                                   const MachineRegisterInfo &MRI) {
+  return getFConstantVRegValWithLookThrough(Reg, MRI);
+}
+
 template <typename ConstT> struct ConstantMatch {
   ConstT &CR;
   ConstantMatch(ConstT &C) : CR(C) {}
diff --git a/llvm/lib/Target/Z80/GISel/Z80CallLowering.cpp b/llvm/lib/Target/Z80/GISel/Z80CallLowering.cpp
index 65aa3f8d79d3f..45a1b52319fcf 100644
--- a/llvm/lib/Target/Z80/GISel/Z80CallLowering.cpp
+++ b/llvm/lib/Target/Z80/GISel/Z80CallLowering.cpp
@@ -155,7 +155,7 @@ struct CallArgHandler : public Z80OutgoingValueHandler {
     MIRBuilder.setInsertPt(MIRBuilder.getMBB(), StackPushes);
     --StackPushes;
     if (MemTy.getSizeInBits() < SlotTy.getSizeInBits())
-      ValVReg = MIRBuilder.buildAnyExt(SlotTy, ValVReg).getReg(0);
+      ValVReg = extendRegister(ValVReg, VA);
     MachineInstr &PushI = *MIRBuilder.buildInstr(
         STI.is24Bit() ? Z80::PUSH24r : Z80::PUSH16r, {}, {ValVReg});
     constrainOperandRegClass(MIRBuilder.getMF(), *STI.getRegisterInfo(),
diff --git a/llvm/lib/Target/Z80/GISel/Z80InstructionSelector.cpp b/llvm/lib/Target/Z80/GISel/Z80InstructionSelector.cpp
index e6c268534cead..93bbd4e8690bc 100644
--- a/llvm/lib/Target/Z80/GISel/Z80InstructionSelector.cpp
+++ b/llvm/lib/Target/Z80/GISel/Z80InstructionSelector.cpp
@@ -491,50 +491,129 @@ bool Z80InstructionSelector::selectSExt(MachineInstr &I,
   LLT DstTy = MRI.getType(DstReg);
   LLT SrcTy = MRI.getType(SrcReg);
 
-  if (SrcTy != LLT::scalar(1))
-    return false;
+  // handle s1 -> sN sign extension (boolean to integer), result is 0 or -1
+  if (SrcTy == LLT::scalar(1)) {
+    if (MRI.hasOneUse(SrcReg) &&
+        selectSetCond(I.getOpcode(), DstReg, SrcReg, I, MRI))
+      return true;
 
-  if (MRI.hasOneUse(SrcReg) &&
-      selectSetCond(I.getOpcode(), DstReg, SrcReg, I, MRI))
+    unsigned FillOpc;
+    Register FillReg;
+    const TargetRegisterClass *FillRC;
+    switch (DstTy.getSizeInBits()) {
+    case 8:
+      FillOpc = Z80::SBC8ar;
+      FillReg = Z80::A;
+      FillRC = &Z80::R8RegClass;
+      break;
+    case 16:
+      FillOpc = Z80::SBC16aa;
+      FillReg = Z80::HL;
+      FillRC = &Z80::R16RegClass;
+      break;
+    case 24:
+      FillOpc = Z80::SBC24aa;
+      FillReg = Z80::UHL;
+      FillRC = &Z80::R24RegClass;
+      break;
+    default:
+      return false;
+    }
+
+    MachineIRBuilder MIB(I);
+    auto Rotate = MIB.buildInstr(Z80::RRC8g, {LLT::scalar(8)}, {SrcReg});
+    if (!constrainSelectedInstRegOperands(*Rotate, TII, TRI, RBI))
+      return false;
+    auto Fill = MIB.buildInstr(FillOpc);
+    Fill->findRegisterUseOperand(FillReg)->setIsUndef();
+    if (FillOpc == Z80::SBC8ar)
+      Fill.addReg(FillReg, RegState::Undef);
+    if (!constrainSelectedInstRegOperands(*Fill, TII, TRI, RBI))
+      return false;
+    auto CopyFromReg = MIB.buildCopy(DstReg, FillReg);
+    if (!RBI.constrainGenericRegister(CopyFromReg.getReg(0), *FillRC, MRI))
+      return false;
+
+    I.eraseFromParent();
     return true;
+  }
+
+  // handle non s1 sign extensions s8->s16, s8->s24, s16->s24
+  const unsigned SrcSize = SrcTy.getSizeInBits();
+  const unsigned DstSize = DstTy.getSizeInBits();
+
+  const TargetRegisterClass *SrcRC = getRegClass(SrcReg, MRI);
+  const TargetRegisterClass *DstRC = getRegClass(DstReg, MRI);
+  if (!SrcRC || !DstRC)
+    return false;
+
+  if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) ||
+      !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) {
+    LLVM_DEBUG(dbgs() << "Failed to constrain G_SEXT operand\n");
+    return false;
+  }
 
   unsigned FillOpc;
   Register FillReg;
   const TargetRegisterClass *FillRC;
-  switch (DstTy.getSizeInBits()) {
-  case 8:
-    FillOpc = Z80::SBC8ar;
-    FillReg = Z80::A;
-    FillRC = &Z80::R8RegClass;
-    break;
-  case 16:
+  unsigned InsertSub = Z80::NoSubRegister;
+  if (SrcSize == 8 && DstSize == 16) {
     FillOpc = Z80::SBC16aa;
     FillReg = Z80::HL;
     FillRC = &Z80::R16RegClass;
-    break;
-  case 24:
+    InsertSub = Z80::sub_low;
+  } else if (SrcSize == 8 && DstSize == 24) {
     FillOpc = Z80::SBC24aa;
     FillReg = Z80::UHL;
     FillRC = &Z80::R24RegClass;
-    break;
-  default:
+    InsertSub = Z80::sub_low;
+  } else if (SrcSize == 16 && DstSize == 24) {
+    FillOpc = Z80::SBC24aa;
+    FillReg = Z80::UHL;
+    FillRC = &Z80::R24RegClass;
+    InsertSub = Z80::sub_short;
+  } else {
+    LLVM_DEBUG(dbgs() << "Unsupported G_SEXT: s" << SrcSize << " -> s"
+                      << DstSize << "\n");
     return false;
   }
 
   MachineIRBuilder MIB(I);
-  auto Rotate = MIB.buildInstr(Z80::RRC8g, {LLT::scalar(8)}, {SrcReg});
+
+  // set carry from the source sign bit
+  // - for s8  : bit7 of the value
+  // - for s16 : bit7 of the high byte (bit15 overall)
+  Register SignSrc = SrcReg;
+  if (SrcSize == 16) {
+    auto CopyHigh = MIB.buildCopy(LLT::scalar(8), SrcReg);
+    CopyHigh->getOperand(1).setSubReg(Z80::sub_high);
+    if (!constrainSelectedInstRegOperands(*CopyHigh, TII, TRI, RBI))
+      return false;
+    SignSrc = CopyHigh.getReg(0);
+  } else {
+    auto Copy8 = MIB.buildCopy(LLT::scalar(8), SrcReg);
+    if (!constrainSelectedInstRegOperands(*Copy8, TII, TRI, RBI))
+      return false;
+    SignSrc = Copy8.getReg(0);
+  }
+
+  auto Rotate = MIB.buildInstr(Z80::RLC8g, {LLT::scalar(8)}, {SignSrc});
   if (!constrainSelectedInstRegOperands(*Rotate, TII, TRI, RBI))
     return false;
+
+  // fillReg <- 0 or -1 based on carry
   auto Fill = MIB.buildInstr(FillOpc);
   Fill->findRegisterUseOperand(FillReg)->setIsUndef();
-  if (FillOpc == Z80::SBC8ar)
-    Fill.addReg(FillReg, RegState::Undef);
   if (!constrainSelectedInstRegOperands(*Fill, TII, TRI, RBI))
     return false;
-  auto CopyFromReg = MIB.buildCopy(DstReg, FillReg);
-  if (!RBI.constrainGenericRegister(CopyFromReg.getReg(0), *FillRC, MRI))
+
+  auto CopyMask = MIB.buildCopy(DstTy, FillReg);
+  if (!RBI.constrainGenericRegister(CopyMask.getReg(0), *FillRC, MRI))
     return false;
 
+  MIB.buildInstr(TargetOpcode::INSERT_SUBREG, {DstReg},
+                 {CopyMask.getReg(0), SrcReg, uint64_t(InsertSub)});
+
   I.eraseFromParent();
   return true;
 }
@@ -1992,119 +2071,69 @@ bool Z80InstructionSelector::selectAddSub(MachineInstr &I,
   bool Is24Bit = (TySize == 24);
   bool IsSub = (Opc == TargetOpcode::G_SUB);
 
+  MachineIRBuilder MIB(I);
+
   // INC/DEC optimization: For ±1, use INC/DEC which accept R16/R24 class
   // (any register) instead of requiring the accumulator class.
   auto ConstSrc2 = getIConstantVRegValWithLookThrough(Src2Reg, MRI);
   if (ConstSrc2) {
     bool UseInc = false;
     bool UseDec = false;
-    
     if (IsSub) {
-      if (ConstSrc2->Value.isOne())
-        UseDec = true;
-      else if (ConstSrc2->Value.isAllOnes())
-        UseInc = true;
+      if (ConstSrc2->Value.isOne()) UseDec = true;
+      else if (ConstSrc2->Value.isAllOnes()) UseInc = true;
     } else {
-      if (ConstSrc2->Value.isOne())
-        UseInc = true;
-      else if (ConstSrc2->Value.isAllOnes())
-        UseDec = true;
+      if (ConstSrc2->Value.isOne()) UseInc = true;
+      else if (ConstSrc2->Value.isAllOnes()) UseDec = true;
     }
     
     if (UseInc || UseDec) {
-      unsigned IncDecOpc;
-      const TargetRegisterClass *RC;
-      if (Is24Bit) {
-        IncDecOpc = UseInc ? Z80::INC24r : Z80::DEC24r;
-        RC = &Z80::R24RegClass;
-      } else {
-        IncDecOpc = UseInc ? Z80::INC16r : Z80::DEC16r;
-        RC = &Z80::R16RegClass;
-      }
-      
-      MachineIRBuilder MIB(I);
+      unsigned IncDecOpc = Is24Bit ? (UseInc ? Z80::INC24r : Z80::DEC24r)
+                                   : (UseInc ? Z80::INC16r : Z80::DEC16r);
+      const TargetRegisterClass *RC = Is24Bit ? &Z80::R24RegClass : &Z80::R16RegClass;
       auto IncDecI = MIB.buildInstr(IncDecOpc, {DstReg}, {Src1Reg});
-      if (!RBI.constrainGenericRegister(DstReg, *RC, MRI))
-        return false;
-      if (!RBI.constrainGenericRegister(Src1Reg, *RC, MRI))
+      if (!RBI.constrainGenericRegister(DstReg, *RC, MRI) ||
+          !RBI.constrainGenericRegister(Src1Reg, *RC, MRI) ||
+          !constrainSelectedInstRegOperands(*IncDecI, TII, TRI, RBI))
         return false;
       I.eraseFromParent();
-      return constrainSelectedInstRegOperands(*IncDecI, TII, TRI, RBI);
+      return true;
     }
   }
   
-  // Determine physical accumulator register and operand register class
-  Register PhysAccum = Is24Bit ? Z80::UHL : Z80::HL;
+  // Determine accumulator and operand register classes
   const TargetRegisterClass *AccumRC = Is24Bit ? &Z80::A24RegClass : &Z80::A16RegClass;
   const TargetRegisterClass *OperandRC = Is24Bit ? &Z80::O24RegClass : &Z80::O16RegClass;
   
-  MachineBasicBlock &MBB = *I.getParent();
-  const DebugLoc &DL = I.getDebugLoc();
-  MachineIRBuilder MIB(I);
-
-  // Handle Src1: We want to avoid constraining Src1 to AccumRC (HL) directly,
-  // as this propagates back to loads and forces them to target HL, increasing
-  // register pressure.
-  //
-  // Strategy: Try to constrain Src1 to OperandRC (BC/DE) first. If successful,
-  // we create a COPY to a new vreg in AccumRC for the operation. If it fails
-  // (e.g., Src1 is already in a class that doesn't intersect OperandRC),
-  // fall back to constraining to AccumRC directly.
-  Register ActualSrc1;
-  if (RBI.constrainGenericRegister(Src1Reg, *OperandRC, MRI)) {
-    // Src1 constrained to OperandRC (BC/DE) - need COPY to HL for operation
-    ActualSrc1 = MRI.createVirtualRegister(AccumRC);
-    MIB.buildCopy(ActualSrc1, Src1Reg);
-  } else if (RBI.constrainGenericRegister(Src1Reg, *AccumRC, MRI)) {
-    // Src1 already compatible with AccumRC (HL) - use directly
-    ActualSrc1 = Src1Reg;
-  } else {
-    // Neither worked - create COPY to AccumRC
-    ActualSrc1 = MRI.createVirtualRegister(AccumRC);
-    MIB.buildCopy(ActualSrc1, Src1Reg);
-  }
-  
-  // Handle Src2: needs to be in OperandRC (O16/O24)
   Register ActualSrc2 = Src2Reg;
   if (!RBI.constrainGenericRegister(Src2Reg, *OperandRC, MRI)) {
     ActualSrc2 = MRI.createVirtualRegister(OperandRC);
     MIB.buildCopy(ActualSrc2, Src2Reg);
   }
-  
-  // Handle Dst: needs to be in AccumRC (A16/A24)
-  Register ActualDst = DstReg;
-  bool NeedDstCopy = !RBI.constrainGenericRegister(DstReg, *AccumRC, MRI);
-  if (NeedDstCopy) {
-    ActualDst = MRI.createVirtualRegister(AccumRC);
-  }
-  
-  // Step 1: COPY Src1 -> physical accumulator (HL/UHL)
-  BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), PhysAccum)
-      .addReg(ActualSrc1);
-  
-  // Step 2: Emit the arithmetic instruction
+
   if (IsSub) {
-    // Use Sub16ao/Sub24ao pseudo which encapsulates carry-clearing internally.
-    // This gives the register allocator better liveness information vs
-    // explicit SCF+CCF+SBC sequence which was creating extra spill slots.
-    unsigned SubOpc = Is24Bit ? Z80::Sub24ao : Z80::Sub16ao;
-    BuildMI(MBB, I, DL, TII.get(SubOpc))
-        .addReg(ActualSrc2);
+    // for subtraction, we MUST use HL/UHL accumulator
+    Register PhysAccum = Is24Bit ? Z80::UHL : Z80::HL;
+    // HL/UHL = COPY Src1
+    MIB.buildCopy(PhysAccum, Src1Reg);
+    // Sub Pseudo (implicit use/def HL/UHL)
+    auto SubI = MIB.buildInstr(Is24Bit ? Z80::Sub24ao : Z80::Sub16ao).addReg(ActualSrc2);
+    if (!constrainSelectedInstRegOperands(*SubI, TII, TRI, RBI))
+      return false;
+    // Dst = COPY HL/UHL
+    // the destination can be any register in the general class
+    const TargetRegisterClass *RegRC = Is24Bit ? &Z80::R24RegClass : &Z80::R16RegClass;
+    MIB.buildCopy(DstReg, PhysAccum);
+    if (!RBI.constrainGenericRegister(DstReg, *RegRC, MRI))
+      return false;
   } else {
-    // ADD16ao/ADD24ao: dst = src1 + src2
+    // for addition, use virtual registers in A16/A24 to allow RA to pick IX/IY
+    Register ActualSrc1 = MRI.createVirtualRegister(AccumRC);
+    MIB.buildCopy(ActualSrc1, Src1Reg);
     unsigned AddOpc = Is24Bit ? Z80::ADD24ao : Z80::ADD16ao;
-    BuildMI(MBB, I, DL, TII.get(AddOpc), PhysAccum)
-        .addReg(PhysAccum)
-        .addReg(ActualSrc2);
-  }
-  
-  // Step 3: COPY physical accumulator -> ActualDst
-  BuildMI(MBB, I, DL, TII.get(TargetOpcode::COPY), ActualDst)
-      .addReg(PhysAccum);
-
-  // Step 4: If we couldn't constrain DstReg directly, COPY ActualDst -> DstReg
-  if (NeedDstCopy) {
-    MIB.buildCopy(DstReg, ActualDst);
+    auto AddI = MIB.buildInstr(AddOpc, {DstReg}, {ActualSrc1, ActualSrc2});
+    if (!constrainSelectedInstRegOperands(*AddI, TII, TRI, RBI))
+      return false;
   }
   
   I.eraseFromParent();
diff --git a/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.cpp b/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.cpp
index 6933789ca8787..cfccf33271eb6 100644
--- a/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.cpp
+++ b/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.cpp
@@ -123,11 +123,25 @@ Z80LegalizerInfo::Z80LegalizerInfo(const Z80Subtarget &STI,
       .clampScalar(0, *LegalScalars.begin(), *std::prev(LegalScalars.end()))
       .clampScalar(1, *NotMaxWithOne.begin(), *std::prev(NotMaxWithOne.end()));
 
-  getActionDefinitionsBuilder(G_SEXT)
-      .legalForCartesianProduct(LegalScalars, {s1})
-      .maxScalar(0, sMax)
-      .maxScalar(0, s8)
-      .maxScalar(1, s8);
+  // sign extension:
+  // - s1 -> sN is supported (result 0 or -1)
+  // - also allow s8/s16 -> s16/s24 so instruction selection can emit
+  //   proper SBC based sign fill and avoid broken sequences
+  if (Is24Bit) {
+    getActionDefinitionsBuilder(G_SEXT)
+        .legalFor({{s8, s1},
+                   {s16, s1},
+                   {s24, s1},
+                   {s16, s8},
+                   {s24, s8},
+                   {s24, s16}})
+        .customFor({{s32, s1}, {s32, s8}, {s32, s16}, {s32, s24}})
+        .lower();
+  } else {
+    getActionDefinitionsBuilder(G_SEXT)
+        .legalFor({{s8, s1}, {s16, s1}, {s16, s8}})
+        .lower();
+  }
 
   getActionDefinitionsBuilder(G_TRUNC)
       .legalForCartesianProduct(NotMaxWithOne, LegalScalars)
@@ -344,6 +358,8 @@ LegalizerHelper::LegalizeResult Z80LegalizerInfo::legalizeCustomMaybeLegal(
   case G_XOR:
   case G_PTRMASK:
     return legalizeBitwise(Helper, MI, LocObserver);
+  case G_SEXT:
+    return legalizeSExt(Helper, MI, LocObserver);
   case G_EXTRACT:
   case G_INSERT:
     return legalizeExtractInsert(Helper, MI);
@@ -500,6 +516,44 @@ Z80LegalizerInfo::legalizeBitwise(LegalizerHelper &Helper, MachineInstr &MI,
   return Helper.libcall(MI, LocObserver);
 }
 
+LegalizerHelper::LegalizeResult
+Z80LegalizerInfo::legalizeSExt(LegalizerHelper &Helper, MachineInstr &MI,
+                               LostDebugLocObserver &LocObserver) const {
+  assert(MI.getOpcode() == G_SEXT && "Unexpected opcode");
+
+  if (!Subtarget.is24Bit())
+    return LegalizerHelper::UnableToLegalize;
+
+  MachineRegisterInfo &MRI = *Helper.MIRBuilder.getMRI();
+  Register DstReg = MI.getOperand(0).getReg();
+  Register SrcReg = MI.getOperand(1).getReg();
+  LLT DstTy = MRI.getType(DstReg);
+  LLT SrcTy = MRI.getType(SrcReg);
+
+  // TODO:
+  // not sure if we have/can have direct selection patterns for wide sign extends to s32.
+  // use the existing eZ80 i16/i8/i1 -> i24 extensions and then the i24->i32 libcall
+  // _itol
+  if (DstTy != LLT::scalar(32))
+    return LegalizerHelper::UnableToLegalize;
+
+  Register ArgReg = SrcReg;
+  if (SrcTy != LLT::scalar(24)) {
+    ArgReg = MRI.createGenericVirtualRegister(LLT::scalar(24));
+    Helper.MIRBuilder.buildInstr(G_SEXT, {ArgReg}, {SrcReg});
+  }
+
+  LLVMContext &Ctx = Helper.MIRBuilder.getMF().getFunction().getContext();
+  Type *DstIRTy = IntegerType::get(Ctx, 32);
+  Type *ArgIRTy = IntegerType::get(Ctx, 24);
+  auto Result =
+      createLibcall(Helper.MIRBuilder, RTLIB::SEXT_I24_I32, {DstReg, DstIRTy, 0},
+                    {{ArgReg, ArgIRTy, 0}});
+
+  MI.eraseFromParent();
+  return Result;
+}
+
 LegalizerHelper::LegalizeResult
 Z80LegalizerInfo::legalizeExtractInsert(LegalizerHelper &Helper,
                                         MachineInstr &MI) const {
diff --git a/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.h b/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.h
index 89889422f3c42..fb66b87a1421f 100644
--- a/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.h
+++ b/llvm/lib/Target/Z80/GISel/Z80LegalizerInfo.h
@@ -46,6 +46,9 @@ class Z80LegalizerInfo : public LegalizerInfo {
   LegalizerHelper::LegalizeResult
   legalizeBitwise(LegalizerHelper &Helper, MachineInstr &MI,
                   LostDebugLocObserver &LocObserver) const;
+  LegalizerHelper::LegalizeResult
+  legalizeSExt(LegalizerHelper &Helper, MachineInstr &MI,
+               LostDebugLocObserver &LocObserver) const;
   LegalizerHelper::LegalizeResult legalizeExtractInsert(LegalizerHelper &Helper,
                                                         MachineInstr &MI) const;
   LegalizerHelper::LegalizeResult legalizeFConstant(LegalizerHelper &Helper,
diff --git a/llvm/lib/Target/Z80/GISel/Z80RegisterBankInfo.cpp b/llvm/lib/Target/Z80/GISel/Z80RegisterBankInfo.cpp
index 9c10f7aa0afa3..a192389a3a2e2 100644
--- a/llvm/lib/Target/Z80/GISel/Z80RegisterBankInfo.cpp
+++ b/llvm/lib/Target/Z80/GISel/Z80RegisterBankInfo.cpp
@@ -46,7 +46,26 @@ Z80RegisterBankInfo::getRegBankFromRegClass(const TargetRegisterClass &RC,
   if (Z80::R8RegClass.hasSubClassEq(&RC) ||
       Z80::R16RegClass.hasSubClassEq(&RC) ||
       Z80::R24RegClass.hasSubClassEq(&RC) ||
+      Z80::G8RegClass.hasSubClassEq(&RC) ||
+      Z80::G16RegClass.hasSubClassEq(&RC) ||
+      Z80::G24RegClass.hasSubClassEq(&RC) ||
+      Z80::O8RegClass.hasSubClassEq(&RC) ||
+      Z80::O16RegClass.hasSubClassEq(&RC) ||
+      Z80::O24RegClass.hasSubClassEq(&RC) ||
+      Z80::A16RegClass.hasSubClassEq(&RC) ||
+      Z80::A24RegClass.hasSubClassEq(&RC) ||
+      Z80::I8RegClass.hasSubClassEq(&RC) ||
+      Z80::I16RegClass.hasSubClassEq(&RC) ||
+      Z80::I24RegClass.hasSubClassEq(&RC) ||
+      Z80::X8RegClass.hasSubClassEq(&RC) ||
+      Z80::X16RegClass.hasSubClassEq(&RC) ||
+      Z80::X24RegClass.hasSubClassEq(&RC) ||
+      Z80::Y8RegClass.hasSubClassEq(&RC) ||
+      Z80::Y16RegClass.hasSubClassEq(&RC) ||
+      Z80::Y24RegClass.hasSubClassEq(&RC) ||
       Z80::F8RegClass.hasSubClassEq(&RC) ||
+      Z80::HL16RegClass.hasSubClassEq(&RC) ||
+      Z80::HL24RegClass.hasSubClassEq(&RC) ||
       Z80::Z8RegClass.hasSubClassEq(&RC) ||
       Z80::Z16RegClass.hasSubClassEq(&RC) ||
       Z80::Z24RegClass.hasSubClassEq(&RC))
diff --git a/llvm/lib/Target/Z80/Z80InstrInfo.cpp b/llvm/lib/Target/Z80/Z80InstrInfo.cpp
index c86309a1d9a16..1507dcd0f9d11 100644
--- a/llvm/lib/Target/Z80/Z80InstrInfo.cpp
+++ b/llvm/lib/Target/Z80/Z80InstrInfo.cpp
@@ -842,6 +842,12 @@ void Z80InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
     Opc = Z80::LD24or;
     break;
   }
+
+  if (Is24Bit && Opc == Z80::LD24or && SrcReg.isPhysical())
+    if (auto SuperReg = TRI->getMatchingSuperReg(
+            SrcReg, Z80::sub_short, &Z80::R24RegClass))
+      SrcReg = SuperReg;
+
   BuildMI(MBB, MI, DL, get(Opc))
       .addFrameIndex(FI).addImm(0).addReg(SrcReg, getKillRegState(IsKill));
 }
@@ -881,13 +887,8 @@ void Z80InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
     Opc = Z80::LD8ro;
     break;
   case 2:
-    if (!Is24Bit) {
-      Opc = Subtarget.has16BitEZ80Ops() ? Z80::LD16ro : Z80::LD88ro;
-      break;
-    }
-    TRC = &Z80::R24RegClass;
-    DstReg = TRI->getMatchingSuperReg(DstReg, Z80::sub_short, TRC);
-    LLVM_FALLTHROUGH;
+    Opc = Subtarget.has16BitEZ80Ops() ? Z80::LD16ro : Z80::LD88ro;
+    break;
   case 3:
     assert(Is24Bit && "Only 24-bit should have 3 byte stack slots");
     Opc = Z80::LD24ro;
@@ -956,6 +957,11 @@ static Register scavengeOrCreateRegister(const TargetRegisterClass *RC,
   return MRI.createVirtualRegister(RC);
 }
 
+static Register findUnusedRegister(const TargetRegisterClass *RC,
+                                   RegScavenger *RS) {
+  return RS ? RS->FindUnusedReg(RC) : Register();
+}
+
 static Register findUnusedOrCreateRegister(const TargetRegisterClass *RC,
                                            MachineRegisterInfo &MRI,
                                            RegScavenger *RS = nullptr) {
@@ -965,6 +971,36 @@ static Register createIfVirtual(Register Reg, MachineRegisterInfo &MRI) {
   return Reg.isPhysical() ? Reg
                           : MRI.createVirtualRegister(MRI.getRegClass(Reg));
 }
+
+static void canonicalizePhysRegsTo24Bit(MachineInstr &MI,
+                                        const TargetRegisterInfo &TRI) {
+  switch (MI.getOpcode()) {
+  default:
+    return;
+  case Z80::LD24ri:
+  case Z80::LD24rm:
+  case Z80::LD24ro:
+  case Z80::LD24rp:
+  case Z80::LD24or:
+  case Z80::LD24pr:
+  case Z80::LEA24ro:
+  case Z80::ADD24ao:
+  case Z80::Sub24ao:
+  case Z80::Cmp24ao:
+    break;
+  }
+
+  for (MachineOperand &MO : MI.operands()) {
+    if (!MO.isReg() || !MO.getReg().isPhysical() || MO.getSubReg())
+      continue;
+    Register Reg = MO.getReg();
+    if (Z80::R24RegClass.contains(Reg))
+      continue;
+    if (MCRegister Super =
+            TRI.getMatchingSuperReg(Reg, Z80::sub_short, &Z80::R24RegClass))
+      MO.setReg(Super);
+  }
+}
 bool Z80InstrInfo::rewriteFrameIndex(MachineInstr &MI, unsigned FIOperandNum,
                                      Register BaseReg, int64_t Offset,
                                      RegScavenger *RS, int SPAdj) const {
@@ -987,17 +1023,105 @@ bool Z80InstrInfo::rewriteFrameIndex(MachineInstr &MI, unsigned FIOperandNum,
       return true;
     }
     MI.getOperand(FIOperandNum + 1).ChangeToImmediate(NewOffset);
+    if (Is24Bit)
+      canonicalizePhysRegsTo24Bit(MI, TRI);
     return false;
   }
 
   bool SaveFlags = RS && RS->isRegUsed(Z80::F);
-  Register OffsetReg = scavengeOrCreateRegister(
-      Is24Bit ? &Z80::O24RegClass : &Z80::O16RegClass, MRI, II, RS, SPAdj);
+  const TargetRegisterClass *OffsetRC =
+      Is24Bit ? &Z80::O24RegClass : &Z80::O16RegClass;
+  const TargetRegisterClass *AddrScratchRC =
+      Is24Bit ? &Z80::A24RegClass : &Z80::A16RegClass;
+  const TargetRegisterClass *IndexScratchRC =
+      Is24Bit ? &Z80::I24RegClass : &Z80::I16RegClass;
+
+  auto regOverlapsMI = [&](Register Cand) -> bool {
+    if (!Cand)
+      return false;
+    for (const MachineOperand &MO : MI.operands()) {
+      if (!MO.isReg() || !MO.getReg())
+        continue;
+      if (TRI.regsOverlap(MO.getReg(), Cand))
+        return true;
+    }
+    return false;
+  };
+
+  auto selectUnusedNoOverlap = [&](const TargetRegisterClass *RC,
+                                   Register Exclude0,
+                                   Register Exclude1) -> Register {
+    if (!RS)
+      return Register();
+    for (MCPhysReg Reg : *RC) {
+      if (Reg == Exclude0 || Reg == Exclude1)
+        continue;
+      if (RS->isRegUsed(Reg))
+        continue;
+      if (regOverlapsMI(Reg))
+        continue;
+      return Reg;
+    }
+    return Register();
+  };
+
+  auto selectAnyNoOverlap = [&](const TargetRegisterClass *RC, Register Exclude0,
+                                Register Exclude1) -> Register {
+    for (MCPhysReg Reg : *RC) {
+      if (Reg == Exclude0 || Reg == Exclude1)
+        continue;
+      return Reg;
+    }
+    return Register();
+  };
+
+  auto selectOffsetTemp = [&](Register Exclude0,
+                              Register Exclude1) -> std::pair<Register, bool> {
+    if (!RS)
+      return {MRI.createVirtualRegister(OffsetRC), false};
+
+    if (Register Unused = selectUnusedNoOverlap(OffsetRC, Exclude0, Exclude1))
+      return {Unused, false};
+
+    Register Reg = selectAnyNoOverlap(OffsetRC, Exclude0, Exclude1);
+    if (!Reg)
+      return {MRI.createVirtualRegister(OffsetRC), false};
+
+    return {Reg, true};
+  };
+
+  auto pushPhys = [&](Register Reg) {
+    assert(Reg.isPhysical());
+    applySPAdjust(
+        *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::PUSH24r : Z80::PUSH16r))
+             .addReg(Reg));
+  };
+  auto popPhysBeforeMI = [&](Register Reg) {
+    assert(Reg.isPhysical());
+    applySPAdjust(*BuildMI(MBB, II, DL, get(Is24Bit ? Z80::POP24r : Z80::POP16r),
+                           Reg));
+  };
+  auto miDefinesPhys = [&](Register Reg) -> bool {
+    if (!Reg.isPhysical())
+      return false;
+    for (const MachineOperand &MO : MI.operands()) {
+      if (!MO.isReg() || !MO.isDef() || !MO.getReg())
+        continue;
+      if (TRI.regsOverlap(MO.getReg(), Reg))
+        return true;
+    }
+    return false;
+  };
+
   if ((Opc == Z80::LEA24ro &&
        Z80::A24RegClass.contains(MI.getOperand(0).getReg())) ||
       (Opc == Z80::LEA16ro &&
        Z80::A16RegClass.contains(MI.getOperand(0).getReg()))) {
     Register Op0Reg = MI.getOperand(0).getReg();
+    auto [OffsetReg, SpillOffsetReg] = selectOffsetTemp(/*Exclude0=*/Op0Reg,
+                                                        /*Exclude1=*/BaseReg);
+    if (SpillOffsetReg && OffsetReg.isPhysical() && !miDefinesPhys(OffsetReg))
+      pushPhys(OffsetReg);
     BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LD24ri : Z80::LD16ri), OffsetReg)
         .addImm(NewOffset);
     copyRegister(MBB, II, DL, Op0Reg, BaseReg);
@@ -1011,12 +1135,52 @@ bool Z80InstrInfo::rewriteFrameIndex(MachineInstr &MI, unsigned FIOperandNum,
     if (SaveFlags)
       applySPAdjust(
           *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::POP24AF : Z80::POP16AF)));
+    if (SpillOffsetReg && OffsetReg.isPhysical() && !miDefinesPhys(OffsetReg))
+      popPhysBeforeMI(OffsetReg);
     MI.eraseFromParent();
     return true;
   }
 
-  if (Register ScratchReg = findUnusedOrCreateRegister(
-          Is24Bit ? &Z80::A24RegClass : &Z80::A16RegClass, MRI, RS)) {
+  // for illegal frame offsets, prefer rewriting the instruction to use a
+  // scratch base register only when we can do so without forcing spills. when
+  // no unused scratch regs exist, using BaseReg (push/adjust/pop) should
+  // need fewer temporaries and avoid cascading push/pop sequences inserted by
+  // scavengeFrameVirtualRegs
+  //
+  // keep the pre RA behavior (no scavenger) by allowing vreg temporaries so that
+  // the register allocator can schedule/allocate
+  Register ScratchReg;
+  Register OffsetReg;
+  bool SpillOffsetReg = false;
+  if (!RS) {
+    ScratchReg = findUnusedOrCreateRegister(AddrScratchRC, MRI, /*RS=*/nullptr);
+  } else if (BaseReg.isPhysical()) {
+    // prefer an unused index register (IY/IX) for scratch if available. that
+    // keeps the original opcode (indexed addressing with 0 offset)
+    ScratchReg = selectUnusedNoOverlap(IndexScratchRC, /*Exclude0=*/BaseReg,
+                                       /*Exclude1=*/Register());
+    if (!ScratchReg)
+      ScratchReg = selectUnusedNoOverlap(AddrScratchRC, /*Exclude0=*/BaseReg,
+                                         /*Exclude1=*/Register());
+  }
+
+  if (ScratchReg) {
+    // take the scratch reg rewrite path only when we can get a truly unused
+    // offset register as well. falling back to spilling a live offset reg
+    // (push/pop) reintroduces the exact code size issues this path is meant to
+    // avoid under register pressure
+    if (!RS) {
+      std::tie(OffsetReg, SpillOffsetReg) =
+          selectOffsetTemp(/*Exclude0=*/ScratchReg, /*Exclude1=*/BaseReg);
+    } else {
+      OffsetReg = selectUnusedNoOverlap(OffsetRC, /*Exclude0=*/ScratchReg,
+                                        /*Exclude1=*/BaseReg);
+      if (!OffsetReg)
+        ScratchReg = Register();
+    }
+  }
+
+  if (ScratchReg) {
     BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LD24ri : Z80::LD16ri), OffsetReg)
         .addImm(NewOffset);
     copyRegister(MBB, II, DL, ScratchReg, BaseReg);
@@ -1039,6 +1203,8 @@ bool Z80InstrInfo::rewriteFrameIndex(MachineInstr &MI, unsigned FIOperandNum,
     MI.getOperand(FIOperandNum).ChangeToRegister(TempReg, false);
     if ((Is24Bit ? Z80::I24RegClass : Z80::I16RegClass).contains(TempReg)) {
       MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
+      if (Is24Bit)
+        canonicalizePhysRegsTo24Bit(MI, TRI);
       return false;
     }
     switch (Opc) {
@@ -1084,24 +1250,96 @@ bool Z80InstrInfo::rewriteFrameIndex(MachineInstr &MI, unsigned FIOperandNum,
     }
     MI.setDesc(get(Opc));
     MI.removeOperand(FIOperandNum + 1);
+    if (Is24Bit)
+      canonicalizePhysRegsTo24Bit(MI, TRI);
     return true;
   }
 
   applySPAdjust(
       *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::PUSH24r : Z80::PUSH16r))
            .addReg(BaseReg));
-  BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LD24ri : Z80::LD16ri), OffsetReg)
-      .addImm(NewOffset);
-  if (SaveFlags)
-    applySPAdjust(
-        *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::PUSH24AF : Z80::PUSH16AF)))
-        .findRegisterUseOperand(Z80::AF)->setIsUndef();
-  BuildMI(MBB, II, DL, get(Is24Bit ? Z80::ADD24ao : Z80::ADD16ao), BaseReg)
-      .addReg(BaseReg).addReg(OffsetReg, RegState::Kill)
-      ->addRegisterDead(Z80::F, &TRI);
-  if (SaveFlags)
-    applySPAdjust(
-        *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::POP24AF : Z80::POP16AF)));
+  // prefer lea for the base-reg push/adjust/pop fallback. it doesnt clobber
+  // flags and avoids consuming a scratch/offset register (which can otherwise
+  // lead to spill/kill ordering issues under PEI+RegScavenger)
+  if (Is24Bit || Subtarget.hasEZ80Ops()) {
+    if (isInt<8>(NewOffset)) {
+      BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LEA24ro : Z80::LEA16ro), BaseReg)
+          .addReg(BaseReg)
+          .addImm(NewOffset);
+    } else if (RS) {
+      // under PEI and RegScavenger, spilling a live offset temp (push/pop) tends to
+      // destroy code size. if we cant get a truly unused offset reg, adjust
+      // the base in signed 8 bit chunks using LEA
+      Register UnusedOffset =
+          selectUnusedNoOverlap(OffsetRC, /*Exclude0=*/BaseReg,
+                                /*Exclude1=*/Register());
+      if (UnusedOffset) {
+        BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LD24ri : Z80::LD16ri),
+                UnusedOffset)
+            .addImm(NewOffset);
+        if (SaveFlags)
+          applySPAdjust(*BuildMI(MBB, II, DL,
+                                 get(Is24Bit ? Z80::PUSH24AF : Z80::PUSH16AF)))
+              .findRegisterUseOperand(Z80::AF)
+              ->setIsUndef();
+        BuildMI(MBB, II, DL, get(Is24Bit ? Z80::ADD24ao : Z80::ADD16ao), BaseReg)
+            .addReg(BaseReg)
+            .addReg(UnusedOffset, RegState::Kill)
+            ->addRegisterDead(Z80::F, &TRI);
+        if (SaveFlags)
+          applySPAdjust(*BuildMI(MBB, II, DL,
+                                 get(Is24Bit ? Z80::POP24AF : Z80::POP16AF)));
+      } else {
+        int64_t Remaining = NewOffset;
+        while (Remaining) {
+          int64_t Step = Remaining < 0 ? std::max<int64_t>(Remaining, -128)
+                                       : std::min<int64_t>(Remaining, 127);
+          assert(isInt<8>(Step) && Step != 0);
+          BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LEA24ro : Z80::LEA16ro),
+                  BaseReg)
+              .addReg(BaseReg)
+              .addImm(Step);
+          Remaining -= Step;
+        }
+      }
+    } else {
+      // no scavenger
+      OffsetReg = MRI.createVirtualRegister(OffsetRC);
+      BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LD24ri : Z80::LD16ri), OffsetReg)
+          .addImm(NewOffset);
+      if (SaveFlags)
+        applySPAdjust(
+            *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::PUSH24AF : Z80::PUSH16AF)))
+            .findRegisterUseOperand(Z80::AF)->setIsUndef();
+      BuildMI(MBB, II, DL, get(Is24Bit ? Z80::ADD24ao : Z80::ADD16ao), BaseReg)
+          .addReg(BaseReg).addReg(OffsetReg, RegState::Kill)
+          ->addRegisterDead(Z80::F, &TRI);
+      if (SaveFlags)
+        applySPAdjust(
+            *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::POP24AF : Z80::POP16AF)));
+    }
+  } else {
+    std::tie(OffsetReg, SpillOffsetReg) =
+        selectOffsetTemp(/*Exclude0=*/BaseReg, /*Exclude1=*/Register());
+    if (SpillOffsetReg && OffsetReg.isPhysical() && !miDefinesPhys(OffsetReg))
+      pushPhys(OffsetReg);
+    BuildMI(MBB, II, DL, get(Is24Bit ? Z80::LD24ri : Z80::LD16ri), OffsetReg)
+        .addImm(NewOffset);
+    if (SaveFlags)
+      applySPAdjust(
+          *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::PUSH24AF : Z80::PUSH16AF)))
+          .findRegisterUseOperand(Z80::AF)
+          ->setIsUndef();
+    BuildMI(MBB, II, DL, get(Is24Bit ? Z80::ADD24ao : Z80::ADD16ao), BaseReg)
+        .addReg(BaseReg)
+        .addReg(OffsetReg, RegState::Kill)
+        ->addRegisterDead(Z80::F, &TRI);
+    if (SaveFlags)
+      applySPAdjust(
+          *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::POP24AF : Z80::POP16AF)));
+    if (SpillOffsetReg && OffsetReg.isPhysical() && !miDefinesPhys(OffsetReg))
+      popPhysBeforeMI(OffsetReg);
+  }
   if (Opc == Z80::PEA24o || Opc == Z80::PEA16o) {
     MI.setDesc(get(Opc == Z80::PEA24o ? Z80::EX24sa : Z80::EX16sa));
     MI.getOperand(FIOperandNum).ChangeToRegister(BaseReg, true);
@@ -1119,6 +1357,8 @@ bool Z80InstrInfo::rewriteFrameIndex(MachineInstr &MI, unsigned FIOperandNum,
   } else {
     MI.getOperand(FIOperandNum).ChangeToRegister(BaseReg, false);
     MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
+    if (Is24Bit)
+      canonicalizePhysRegsTo24Bit(MI, TRI);
     applySPAdjust(
     *BuildMI(MBB, II, DL, get(Is24Bit ? Z80::POP24r : Z80::POP16r), BaseReg));
     return false;
@@ -1198,7 +1438,7 @@ bool Z80InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
   const TargetRegisterInfo &TRI = getRegisterInfo();
   bool Is24Bit = Subtarget.is24Bit();
   bool UseLEA = Is24Bit && !MF.getFunction().hasOptSize();
-  LLVM_DEBUG(dbgs() << "\nZ80InstrInfo::expandPostRAPseudo:"; MI.dump());
+
   switch (unsigned Opc = MI.getOpcode()) {
   default:
     return false;
@@ -1287,7 +1527,10 @@ bool Z80InstrInfo::expandPostRAPseudo(MachineInstr &MI) const {
   }
   case Z80::Sub16ao:
   case Z80::Sub24ao:
-    expandPostRAPseudo(*BuildMI(MBB, MI, DL, get(Z80::RCF)));
+    // directly emit OR A, A to clear carry flag
+    BuildMI(MBB, MI, DL, get(Z80::OR8ar)).addReg(Z80::A, RegState::Undef)
+        .addReg(Z80::A, RegState::ImplicitDefine);
+
     MI.setDesc(get(Opc == Z80::Cmp24ao || Opc == Z80::Sub24ao ? Z80::SBC24ao
                                                               : Z80::SBC16ao));
     MIB.addReg(Z80::F, RegState::Implicit);
diff --git a/llvm/lib/Target/Z80/Z80RegisterInfo.cpp b/llvm/lib/Target/Z80/Z80RegisterInfo.cpp
index 24b41b3bab534..c0f352023ef94 100644
--- a/llvm/lib/Target/Z80/Z80RegisterInfo.cpp
+++ b/llvm/lib/Target/Z80/Z80RegisterInfo.cpp
@@ -37,10 +37,7 @@ Z80RegisterInfo::Z80RegisterInfo(const Triple &TT)
 }
 
 unsigned Z80RegisterInfo::getSpillSize(const TargetRegisterClass &RC) const {
-  unsigned SpillSize = TargetRegisterInfo::getSpillSize(RC);
-  if (Is24Bit && SpillSize == 2)
-    SpillSize = 3;
-  return SpillSize;
+  return TargetRegisterInfo::getSpillSize(RC);
 }
 
 const TargetRegisterClass *
diff --git a/llvm/lib/Target/Z80/Z80RegisterInfo.td b/llvm/lib/Target/Z80/Z80RegisterInfo.td
index 9af7e1218f20e..12969d5d4e3c2 100644
--- a/llvm/lib/Target/Z80/Z80RegisterInfo.td
+++ b/llvm/lib/Target/Z80/Z80RegisterInfo.td
@@ -142,6 +142,8 @@ def A16 : Z80RC16<(add HL, I16)> {
   let AllocationPriority = 16;
   let GlobalPriority = true;
 }
+def HL16 : Z80RC16<(add HL)>;
+def HL24 : Z80RC24<(add UHL)>;
 def R16 : Z80RC16<(add G16, I16)>;
 let CopyCost = -1 in
 def Z16 : Z80RC16<(add SPS, AF, UI)>;
diff --git a/llvm/test/CodeGen/Z80/add24-phi-accum.mir b/llvm/test/CodeGen/Z80/add24-phi-accum.mir
deleted file mode 100644
index 850ce87e30c31..0000000000000
--- a/llvm/test/CodeGen/Z80/add24-phi-accum.mir
+++ /dev/null
@@ -1,20 +0,0 @@
-; RUN: llc -mtriple=ez80 -stop-after=instruction-select < %s | FileCheck %s --check-prefix=ISEL
-
-define void @phi_add_accum(i24 %a, i24 %b) {
-entry:
-  br label %loop
-
-loop:
-  %x = phi i24 [ %a, %entry ], [ %x.next, %loop ]
-  %sum = add i24 %b, %x
-  %x.next = add i24 %x, %sum
-  %done = icmp eq i24 %x.next, 0
-  br i1 %done, label %exit, label %loop
-
-exit:
-  ret void
-}
-
-; ISEL-LABEL: name: phi_add_accum
-; ISEL:      [[PHI:%[0-9]+]]:a24 = PHI
-; ISEL:      ADD24_gisel [[PHI]],
diff --git a/llvm/test/CodeGen/Z80/control.ll b/llvm/test/CodeGen/Z80/control.ll
index fefd8be2458ee..e36de7b525377 100644
--- a/llvm/test/CodeGen/Z80/control.ll
+++ b/llvm/test/CodeGen/Z80/control.ll
@@ -386,23 +386,23 @@ define i8 @switch(i8) {
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld a, (iy + 3)
-; EZ80-NEXT:    ld c, 0
-; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld e, 0
+; EZ80-NEXT:    ld bc, 0
 ; EZ80-NEXT:    cp a, 4
 ; EZ80-NEXT:    jr c, BB11_2
 ; EZ80-NEXT:  ; %bb.1:
 ; EZ80-NEXT:    ld a, -1
 ; EZ80-NEXT:    ret
 ; EZ80-NEXT:  BB11_2:
-; EZ80-NEXT:    ld e, a
+; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld hl, JTI11_0
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add hl, bc
+; EZ80-NEXT:    add hl, bc
+; EZ80-NEXT:    add hl, bc
 ; EZ80-NEXT:    ld hl, (hl)
 ; EZ80-NEXT:    jp (hl)
 ; EZ80-NEXT:  BB11_3:
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    ret
 ; EZ80-NEXT:  BB11_4:
 ; EZ80-NEXT:    ld a, 2
diff --git a/llvm/test/CodeGen/Z80/intrinsics.ll b/llvm/test/CodeGen/Z80/intrinsics.ll
index 65c90b6d4f781..f0c614dc6fa4d 100644
--- a/llvm/test/CodeGen/Z80/intrinsics.ll
+++ b/llvm/test/CodeGen/Z80/intrinsics.ll
@@ -67,22 +67,18 @@ define i16 @abs.i16(i16) {
 ; Z80:       ; %bb.0:
 ; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld l, (iy + 2)
-; Z80-NEXT:    ld h, (iy + 3)
-; Z80-NEXT:    ld c, l
-; Z80-NEXT:    ld b, h
+; Z80-NEXT:    ld c, (iy + 2)
+; Z80-NEXT:    ld b, (iy + 3)
+; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld h, b
 ; Z80-NEXT:    ld iyl, c
 ; Z80-NEXT:    ld iyh, b
 ; Z80-NEXT:    add iy, iy
 ; Z80-NEXT:    sbc hl, hl
 ; Z80-NEXT:    ld e, l
 ; Z80-NEXT:    ld d, h
-; Z80-NEXT:    ld l, c
-; Z80-NEXT:    ld h, b
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
-; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    ld iyl, c
+; Z80-NEXT:    ld iyh, b
 ; Z80-NEXT:    add iy, de
 ; Z80-NEXT:    ld a, iyl
 ; Z80-NEXT:    xor a, e
@@ -96,21 +92,17 @@ define i16 @abs.i16(i16) {
 ; EZ80-CODE16:       ; %bb.0:
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld hl, (iy + 2)
-; EZ80-CODE16-NEXT:    ld c, l
-; EZ80-CODE16-NEXT:    ld b, h
+; EZ80-CODE16-NEXT:    ld bc, (iy + 2)
+; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld h, b
 ; EZ80-CODE16-NEXT:    ld iyl, c
 ; EZ80-CODE16-NEXT:    ld iyh, b
 ; EZ80-CODE16-NEXT:    add iy, iy
 ; EZ80-CODE16-NEXT:    sbc hl, hl
 ; EZ80-CODE16-NEXT:    ld e, l
 ; EZ80-CODE16-NEXT:    ld d, h
-; EZ80-CODE16-NEXT:    ld l, c
-; EZ80-CODE16-NEXT:    ld h, b
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iyl, c
+; EZ80-CODE16-NEXT:    ld iyh, b
 ; EZ80-CODE16-NEXT:    add iy, de
 ; EZ80-CODE16-NEXT:    ld a, iyl
 ; EZ80-CODE16-NEXT:    xor a, e
@@ -124,9 +116,9 @@ define i16 @abs.i16(i16) {
 ; EZ80:       ; %bb.0:
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld hl, (iy + 3)
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop bc
+; EZ80-NEXT:    ld bc, (iy + 3)
+; EZ80-NEXT:    ld l, c
+; EZ80-NEXT:    ld h, b
 ; EZ80-NEXT:    ld iyl, c
 ; EZ80-NEXT:    ld iyh, b
 ; EZ80-NEXT:    add.sis iy, iy
@@ -134,11 +126,7 @@ define i16 @abs.i16(i16) {
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    push bc
-; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld iyl, e
-; EZ80-NEXT:    ld iyh, d
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    pop iy
 ; EZ80-NEXT:    add.sis iy, de
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    xor a, e
@@ -2836,8 +2824,8 @@ define i16 @ctlz.i16(i16) {
 ; Z80-NEXT:    add iy, sp
 ; Z80-NEXT:    ld e, (iy + 2)
 ; Z80-NEXT:    ld d, (iy + 3)
-; Z80-NEXT:    ld l, e
-; Z80-NEXT:    ld h, d
+; Z80-NEXT:    push de
+; Z80-NEXT:    pop hl
 ; Z80-NEXT:    add hl, de
 ; Z80-NEXT:    or a, a
 ; Z80-NEXT:    sbc hl, de
@@ -2857,8 +2845,8 @@ define i16 @ctlz.i16(i16) {
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
 ; EZ80-CODE16-NEXT:    ld de, (iy + 2)
-; EZ80-CODE16-NEXT:    ld l, e
-; EZ80-CODE16-NEXT:    ld h, d
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    add hl, de
 ; EZ80-CODE16-NEXT:    or a, a
 ; EZ80-CODE16-NEXT:    sbc hl, de
@@ -2878,8 +2866,8 @@ define i16 @ctlz.i16(i16) {
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld de, (iy + 3)
-; EZ80-NEXT:    ld l, e
-; EZ80-NEXT:    ld h, d
+; EZ80-NEXT:    push.sis de
+; EZ80-NEXT:    pop.sis hl
 ; EZ80-NEXT:    add.sis hl, de
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc.sis hl, de
@@ -3099,10 +3087,10 @@ define i16 @cttz.i16(i16) {
 ; Z80:       ; %bb.0:
 ; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld l, (iy + 2)
-; Z80-NEXT:    ld h, (iy + 3)
-; Z80-NEXT:    ld e, l
-; Z80-NEXT:    ld d, h
+; Z80-NEXT:    ld e, (iy + 2)
+; Z80-NEXT:    ld d, (iy + 3)
+; Z80-NEXT:    push de
+; Z80-NEXT:    pop hl
 ; Z80-NEXT:    add hl, de
 ; Z80-NEXT:    or a, a
 ; Z80-NEXT:    sbc hl, de
@@ -3111,21 +3099,18 @@ define i16 @cttz.i16(i16) {
 ; Z80-NEXT:    ld hl, 16
 ; Z80-NEXT:    ret
 ; Z80-NEXT:  BB36_2: ; %cond.false
-; Z80-NEXT:    ld de, -1
-; Z80-NEXT:    ld c, d
-; Z80-NEXT:    ld a, l
-; Z80-NEXT:    xor a, c
-; Z80-NEXT:    ld b, a
-; Z80-NEXT:    ld a, h
-; Z80-NEXT:    xor a, c
+; Z80-NEXT:    ld l, -1
+; Z80-NEXT:    ld a, e
+; Z80-NEXT:    xor a, l
 ; Z80-NEXT:    ld c, a
-; Z80-NEXT:    add hl, de
-; Z80-NEXT:    ld e, l
-; Z80-NEXT:    ld d, h
-; Z80-NEXT:    ld a, b
+; Z80-NEXT:    ld a, d
+; Z80-NEXT:    xor a, l
+; Z80-NEXT:    ld b, a
+; Z80-NEXT:    dec de
+; Z80-NEXT:    ld a, c
 ; Z80-NEXT:    and a, e
 ; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld a, c
+; Z80-NEXT:    ld a, b
 ; Z80-NEXT:    and a, d
 ; Z80-NEXT:    ld h, a
 ; Z80-NEXT:    call __spopcnt
@@ -3137,9 +3122,9 @@ define i16 @cttz.i16(i16) {
 ; EZ80-CODE16:       ; %bb.0:
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld hl, (iy + 2)
-; EZ80-CODE16-NEXT:    ld e, l
-; EZ80-CODE16-NEXT:    ld d, h
+; EZ80-CODE16-NEXT:    ld de, (iy + 2)
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    add hl, de
 ; EZ80-CODE16-NEXT:    or a, a
 ; EZ80-CODE16-NEXT:    sbc hl, de
@@ -3148,21 +3133,18 @@ define i16 @cttz.i16(i16) {
 ; EZ80-CODE16-NEXT:    ld hl, 16
 ; EZ80-CODE16-NEXT:    ret
 ; EZ80-CODE16-NEXT:  BB36_2: ; %cond.false
-; EZ80-CODE16-NEXT:    ld de, -1
-; EZ80-CODE16-NEXT:    ld c, d
-; EZ80-CODE16-NEXT:    ld a, l
-; EZ80-CODE16-NEXT:    xor a, c
-; EZ80-CODE16-NEXT:    ld b, a
-; EZ80-CODE16-NEXT:    ld a, h
-; EZ80-CODE16-NEXT:    xor a, c
+; EZ80-CODE16-NEXT:    ld l, -1
+; EZ80-CODE16-NEXT:    ld a, e
+; EZ80-CODE16-NEXT:    xor a, l
 ; EZ80-CODE16-NEXT:    ld c, a
-; EZ80-CODE16-NEXT:    add hl, de
-; EZ80-CODE16-NEXT:    ld e, l
-; EZ80-CODE16-NEXT:    ld d, h
-; EZ80-CODE16-NEXT:    ld a, b
+; EZ80-CODE16-NEXT:    ld a, d
+; EZ80-CODE16-NEXT:    xor a, l
+; EZ80-CODE16-NEXT:    ld b, a
+; EZ80-CODE16-NEXT:    dec de
+; EZ80-CODE16-NEXT:    ld a, c
 ; EZ80-CODE16-NEXT:    and a, e
 ; EZ80-CODE16-NEXT:    ld l, a
-; EZ80-CODE16-NEXT:    ld a, c
+; EZ80-CODE16-NEXT:    ld a, b
 ; EZ80-CODE16-NEXT:    and a, d
 ; EZ80-CODE16-NEXT:    ld h, a
 ; EZ80-CODE16-NEXT:    call __spopcnt
@@ -3174,9 +3156,9 @@ define i16 @cttz.i16(i16) {
 ; EZ80:       ; %bb.0:
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld hl, (iy + 3)
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld d, h
+; EZ80-NEXT:    ld de, (iy + 3)
+; EZ80-NEXT:    push.sis de
+; EZ80-NEXT:    pop.sis hl
 ; EZ80-NEXT:    add.sis hl, de
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc.sis hl, de
@@ -3185,21 +3167,18 @@ define i16 @cttz.i16(i16) {
 ; EZ80-NEXT:    ld.sis hl, 16
 ; EZ80-NEXT:    ret
 ; EZ80-NEXT:  BB36_2: ; %cond.false
-; EZ80-NEXT:    ld.sis de, -1
-; EZ80-NEXT:    ld c, d
-; EZ80-NEXT:    ld a, l
-; EZ80-NEXT:    xor a, c
-; EZ80-NEXT:    ld b, a
-; EZ80-NEXT:    ld a, h
-; EZ80-NEXT:    xor a, c
+; EZ80-NEXT:    ld l, -1
+; EZ80-NEXT:    ld a, e
+; EZ80-NEXT:    xor a, l
 ; EZ80-NEXT:    ld c, a
-; EZ80-NEXT:    add.sis hl, de
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld d, h
-; EZ80-NEXT:    ld a, b
+; EZ80-NEXT:    ld a, d
+; EZ80-NEXT:    xor a, l
+; EZ80-NEXT:    ld b, a
+; EZ80-NEXT:    dec.sis de
+; EZ80-NEXT:    ld a, c
 ; EZ80-NEXT:    and a, e
 ; EZ80-NEXT:    ld l, a
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld a, b
 ; EZ80-NEXT:    and a, d
 ; EZ80-NEXT:    ld h, a
 ; EZ80-NEXT:    call __spopcnt
@@ -3500,10 +3479,10 @@ define i64 @cttz.i64(i64) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 10
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ld bc, (ix + 12)
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    ld iy, -1
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llnot
 ; EZ80-NEXT:    ld (ix - 4), hl
@@ -3512,9 +3491,9 @@ define i64 @cttz.i64(i64) {
 ; EZ80-NEXT:    scf
 ; EZ80-NEXT:    sbc hl, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
@@ -3646,14 +3625,16 @@ define i16 @fshl.i16(i16, i16, i16) {
 ; Z80-NEXT:    add ix, sp
 ; Z80-NEXT:    ld l, (ix + 4)
 ; Z80-NEXT:    ld h, (ix + 5)
-; Z80-NEXT:    ld e, (ix + 8)
-; Z80-NEXT:    ld d, (ix + 9)
-; Z80-NEXT:    ld c, 15
-; Z80-NEXT:    ld a, e
-; Z80-NEXT:    and a, c
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix + 8)
+; Z80-NEXT:    ld h, (ix + 9)
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    pop iy
+; Z80-NEXT:    ld b, 15
+; Z80-NEXT:    ld a, iyl
+; Z80-NEXT:    and a, b
 ; Z80-NEXT:    ld c, a
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
+; Z80-NEXT:    ld a, b
 ; Z80-NEXT:    call __sshl
 ; Z80-NEXT:    ld e, l
 ; Z80-NEXT:    ld d, h
@@ -3662,13 +3643,9 @@ define i16 @fshl.i16(i16, i16, i16) {
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    or a, a
 ; Z80-NEXT:    sbc hl, bc
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld l, 15
-; Z80-NEXT:    ld a, iyl
-; Z80-NEXT:    and a, l
+; Z80-NEXT:    ld c, a
+; Z80-NEXT:    ld a, l
+; Z80-NEXT:    and a, c
 ; Z80-NEXT:    ld c, a
 ; Z80-NEXT:    ld l, (ix + 6)
 ; Z80-NEXT:    ld h, (ix + 7)
@@ -3690,13 +3667,12 @@ define i16 @fshl.i16(i16, i16, i16) {
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
 ; EZ80-CODE16-NEXT:    ld hl, (ix + 4)
-; EZ80-CODE16-NEXT:    ld de, (ix + 8)
-; EZ80-CODE16-NEXT:    ld c, 15
-; EZ80-CODE16-NEXT:    ld a, e
-; EZ80-CODE16-NEXT:    and a, c
+; EZ80-CODE16-NEXT:    ld iy, (ix + 8)
+; EZ80-CODE16-NEXT:    ld b, 15
+; EZ80-CODE16-NEXT:    ld a, iyl
+; EZ80-CODE16-NEXT:    and a, b
 ; EZ80-CODE16-NEXT:    ld c, a
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
+; EZ80-CODE16-NEXT:    ld a, b
 ; EZ80-CODE16-NEXT:    call __sshl
 ; EZ80-CODE16-NEXT:    ld e, l
 ; EZ80-CODE16-NEXT:    ld d, h
@@ -3704,13 +3680,9 @@ define i16 @fshl.i16(i16, i16, i16) {
 ; EZ80-CODE16-NEXT:    lea bc, iy
 ; EZ80-CODE16-NEXT:    or a, a
 ; EZ80-CODE16-NEXT:    sbc hl, bc
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld l, 15
-; EZ80-CODE16-NEXT:    ld a, iyl
-; EZ80-CODE16-NEXT:    and a, l
+; EZ80-CODE16-NEXT:    ld c, a
+; EZ80-CODE16-NEXT:    ld a, l
+; EZ80-CODE16-NEXT:    and a, c
 ; EZ80-CODE16-NEXT:    ld c, a
 ; EZ80-CODE16-NEXT:    ld hl, (ix + 6)
 ; EZ80-CODE16-NEXT:    call __sshru
@@ -3731,13 +3703,12 @@ define i16 @fshl.i16(i16, i16, i16) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld de, (ix + 12)
-; EZ80-NEXT:    ld c, 15
-; EZ80-NEXT:    ld a, e
-; EZ80-NEXT:    and a, c
+; EZ80-NEXT:    ld iy, (ix + 12)
+; EZ80-NEXT:    ld b, 15
+; EZ80-NEXT:    ld a, iyl
+; EZ80-NEXT:    and a, b
 ; EZ80-NEXT:    ld c, a
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld a, b
 ; EZ80-NEXT:    ; kill: def $hl killed $hl killed $uhl
 ; EZ80-NEXT:    call __sshl
 ; EZ80-NEXT:    ld e, l
@@ -3746,13 +3717,9 @@ define i16 @fshl.i16(i16, i16, i16) {
 ; EZ80-NEXT:    lea bc, iy
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc.sis hl, bc
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld iyl, e
-; EZ80-NEXT:    ld iyh, d
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld l, 15
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    and a, l
+; EZ80-NEXT:    ld c, a
+; EZ80-NEXT:    ld a, l
+; EZ80-NEXT:    and a, c
 ; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ; kill: def $hl killed $hl killed $uhl
@@ -4276,14 +4243,16 @@ define i16 @fshr.i16(i16, i16, i16) {
 ; Z80-NEXT:    add ix, sp
 ; Z80-NEXT:    ld l, (ix + 6)
 ; Z80-NEXT:    ld h, (ix + 7)
-; Z80-NEXT:    ld e, (ix + 8)
-; Z80-NEXT:    ld d, (ix + 9)
-; Z80-NEXT:    ld c, 15
-; Z80-NEXT:    ld a, e
-; Z80-NEXT:    and a, c
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix + 8)
+; Z80-NEXT:    ld h, (ix + 9)
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    pop iy
+; Z80-NEXT:    ld b, 15
+; Z80-NEXT:    ld a, iyl
+; Z80-NEXT:    and a, b
 ; Z80-NEXT:    ld c, a
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
+; Z80-NEXT:    ld a, b
 ; Z80-NEXT:    call __sshru
 ; Z80-NEXT:    ld e, l
 ; Z80-NEXT:    ld d, h
@@ -4292,13 +4261,9 @@ define i16 @fshr.i16(i16, i16, i16) {
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    or a, a
 ; Z80-NEXT:    sbc hl, bc
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld l, 15
-; Z80-NEXT:    ld a, iyl
-; Z80-NEXT:    and a, l
+; Z80-NEXT:    ld c, a
+; Z80-NEXT:    ld a, l
+; Z80-NEXT:    and a, c
 ; Z80-NEXT:    ld c, a
 ; Z80-NEXT:    ld l, (ix + 4)
 ; Z80-NEXT:    ld h, (ix + 5)
@@ -4320,13 +4285,12 @@ define i16 @fshr.i16(i16, i16, i16) {
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
 ; EZ80-CODE16-NEXT:    ld hl, (ix + 6)
-; EZ80-CODE16-NEXT:    ld de, (ix + 8)
-; EZ80-CODE16-NEXT:    ld c, 15
-; EZ80-CODE16-NEXT:    ld a, e
-; EZ80-CODE16-NEXT:    and a, c
+; EZ80-CODE16-NEXT:    ld iy, (ix + 8)
+; EZ80-CODE16-NEXT:    ld b, 15
+; EZ80-CODE16-NEXT:    ld a, iyl
+; EZ80-CODE16-NEXT:    and a, b
 ; EZ80-CODE16-NEXT:    ld c, a
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
+; EZ80-CODE16-NEXT:    ld a, b
 ; EZ80-CODE16-NEXT:    call __sshru
 ; EZ80-CODE16-NEXT:    ld e, l
 ; EZ80-CODE16-NEXT:    ld d, h
@@ -4334,13 +4298,9 @@ define i16 @fshr.i16(i16, i16, i16) {
 ; EZ80-CODE16-NEXT:    lea bc, iy
 ; EZ80-CODE16-NEXT:    or a, a
 ; EZ80-CODE16-NEXT:    sbc hl, bc
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld l, 15
-; EZ80-CODE16-NEXT:    ld a, iyl
-; EZ80-CODE16-NEXT:    and a, l
+; EZ80-CODE16-NEXT:    ld c, a
+; EZ80-CODE16-NEXT:    ld a, l
+; EZ80-CODE16-NEXT:    and a, c
 ; EZ80-CODE16-NEXT:    ld c, a
 ; EZ80-CODE16-NEXT:    ld hl, (ix + 4)
 ; EZ80-CODE16-NEXT:    call __sshl
@@ -4361,13 +4321,12 @@ define i16 @fshr.i16(i16, i16, i16) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    ld hl, (ix + 9)
-; EZ80-NEXT:    ld de, (ix + 12)
-; EZ80-NEXT:    ld c, 15
-; EZ80-NEXT:    ld a, e
-; EZ80-NEXT:    and a, c
+; EZ80-NEXT:    ld iy, (ix + 12)
+; EZ80-NEXT:    ld b, 15
+; EZ80-NEXT:    ld a, iyl
+; EZ80-NEXT:    and a, b
 ; EZ80-NEXT:    ld c, a
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld a, b
 ; EZ80-NEXT:    ; kill: def $hl killed $hl killed $uhl
 ; EZ80-NEXT:    call __sshru
 ; EZ80-NEXT:    ld e, l
@@ -4376,13 +4335,9 @@ define i16 @fshr.i16(i16, i16, i16) {
 ; EZ80-NEXT:    lea bc, iy
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc.sis hl, bc
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld iyl, e
-; EZ80-NEXT:    ld iyh, d
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld l, 15
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    and a, l
+; EZ80-NEXT:    ld c, a
+; EZ80-NEXT:    ld a, l
+; EZ80-NEXT:    and a, c
 ; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ; kill: def $hl killed $hl killed $uhl
@@ -10209,10 +10164,11 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 120), a
 ; EZ80-NEXT:    ld (ix - 83), de
 ; EZ80-NEXT:    ld.sis hl, (ix - 82)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -158
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 80), de
 ; EZ80-NEXT:    ld.sis de, (ix - 79)
 ; EZ80-NEXT:    ld hl, (ix + 21)
@@ -10223,11 +10179,10 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ld a, h
 ; EZ80-NEXT:    ld l, 31
 ; EZ80-NEXT:    call __lshrs
-; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -138
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), bc
-; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld (iy), bc
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    dec de
 ; EZ80-NEXT:    add ix, de
@@ -10285,10 +10240,11 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ld h, a
 ; EZ80-NEXT:    ld l, d
 ; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -129
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, 0
 ; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld b, h
@@ -10298,12 +10254,13 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld e, iyl
 ; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -132
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    ld (ix - 105), bc
 ; EZ80-NEXT:    push hl
@@ -10863,10 +10820,11 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ld e, (ix - 117) ; 1-byte Folded Reload
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -180
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -177
 ; EZ80-NEXT:    add ix, bc
@@ -10931,17 +10889,19 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix + 21)
 ; EZ80-NEXT:    ld (ix - 40), c
 ; EZ80-NEXT:    ld de, (ix - 42)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -158
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 39), a
 ; EZ80-NEXT:    ld hl, (ix - 41)
 ; EZ80-NEXT:    ld h, a
@@ -12410,11 +12370,12 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 15)
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
@@ -12555,12 +12516,13 @@ define i1 @smul.with.overflow.i64(i64, i64) {
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    ld bc, (ix - 108)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -164
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld a, (iy) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
@@ -13295,19 +13257,19 @@ define i8 @smul.fix.i8.7(i8, i8) {
 ; Z80:       ; %bb.0:
 ; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld c, (iy + 2)
-; Z80-NEXT:    ld d, (iy + 4)
+; Z80-NEXT:    ld d, (iy + 2)
+; Z80-NEXT:    ld l, (iy + 4)
 ; Z80-NEXT:    ld e, 7
-; Z80-NEXT:    ld a, c
+; Z80-NEXT:    ld a, l
 ; Z80-NEXT:    rlc a
 ; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld h, a
-; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld b, a
+; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld a, d
 ; Z80-NEXT:    rlc a
 ; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld b, a
-; Z80-NEXT:    ld c, d
+; Z80-NEXT:    ld h, a
+; Z80-NEXT:    ld l, d
 ; Z80-NEXT:    call __smulu
 ; Z80-NEXT:    ld c, e
 ; Z80-NEXT:    call __sshrs
@@ -13318,19 +13280,19 @@ define i8 @smul.fix.i8.7(i8, i8) {
 ; EZ80-CODE16:       ; %bb.0:
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld c, (iy + 2)
-; EZ80-CODE16-NEXT:    ld d, (iy + 4)
+; EZ80-CODE16-NEXT:    ld d, (iy + 2)
+; EZ80-CODE16-NEXT:    ld l, (iy + 4)
 ; EZ80-CODE16-NEXT:    ld e, 7
-; EZ80-CODE16-NEXT:    ld a, c
+; EZ80-CODE16-NEXT:    ld a, l
 ; EZ80-CODE16-NEXT:    rlc a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld h, a
-; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld b, a
+; EZ80-CODE16-NEXT:    ld c, l
 ; EZ80-CODE16-NEXT:    ld a, d
 ; EZ80-CODE16-NEXT:    rlc a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld b, a
-; EZ80-CODE16-NEXT:    ld c, d
+; EZ80-CODE16-NEXT:    ld h, a
+; EZ80-CODE16-NEXT:    ld l, d
 ; EZ80-CODE16-NEXT:    call __smulu
 ; EZ80-CODE16-NEXT:    ld c, e
 ; EZ80-CODE16-NEXT:    call __sshrs
@@ -13341,19 +13303,19 @@ define i8 @smul.fix.i8.7(i8, i8) {
 ; EZ80:       ; %bb.0:
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld c, (iy + 3)
-; EZ80-NEXT:    ld d, (iy + 6)
+; EZ80-NEXT:    ld d, (iy + 3)
+; EZ80-NEXT:    ld l, (iy + 6)
 ; EZ80-NEXT:    ld e, 7
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld h, a
-; EZ80-NEXT:    ld l, c
+; EZ80-NEXT:    ld b, a
+; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld b, a
-; EZ80-NEXT:    ld c, d
+; EZ80-NEXT:    ld h, a
+; EZ80-NEXT:    ld l, d
 ; EZ80-NEXT:    call __smulu
 ; EZ80-NEXT:    ld c, e
 ; EZ80-NEXT:    call __sshrs
@@ -13448,26 +13410,29 @@ define i16 @smul.fix.i16.7(i16, i16) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld bc, (ix + 6)
-; EZ80-NEXT:    ld iy, (ix + 9)
-; EZ80-NEXT:    ld e, b
+; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
+; EZ80-NEXT:    ld e, h
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld d, a
 ; EZ80-NEXT:    ld (ix - 2), d
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, c
+; EZ80-NEXT:    ld bc, (ix - 4)
+; EZ80-NEXT:    ld b, e
+; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld e, iyh
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld b, e
-; EZ80-NEXT:    ld c, iyl
-; EZ80-NEXT:    ld e, d
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, e
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, a
+; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
@@ -13566,35 +13531,30 @@ define i16 @smul.fix.i16.15(i16, i16) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld c, h
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
+; EZ80-NEXT:    ld e, h
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld d, c
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld hl, (ix + 9)
-; EZ80-NEXT:    ld c, h
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld d, a
+; EZ80-NEXT:    ld (ix - 1), d
+; EZ80-NEXT:    ld bc, (ix - 3)
+; EZ80-NEXT:    ld b, e
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld e, iyh
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld iyh, c
+; EZ80-NEXT:    ld l, e
 ; EZ80-NEXT:    rlc l
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    ld b, iyh
-; EZ80-NEXT:    ld hl, (ix + 9)
-; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld h, e
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, a
+; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
@@ -13617,16 +13577,13 @@ define i32 @smul.fix.i32.15(i32, i32) {
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 6)
 ; Z80-NEXT:    ld h, (ix + 7)
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    pop iy
 ; Z80-NEXT:    ld e, (ix + 10)
 ; Z80-NEXT:    ld d, (ix + 11)
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
+; Z80-NEXT:    ld iyl, e
+; Z80-NEXT:    ld iyh, d
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    add iy, iy
 ; Z80-NEXT:    sbc hl, hl
@@ -13671,9 +13628,12 @@ define i32 @smul.fix.i32.15(i32, i32) {
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld iy, (ix + 6)
+; EZ80-CODE16-NEXT:    ld hl, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld de, (ix + 10)
-; EZ80-CODE16-NEXT:    lea hl, iy
+; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iyl, e
+; EZ80-CODE16-NEXT:    ld iyh, d
+; EZ80-CODE16-NEXT:    ex de, hl
 ; EZ80-CODE16-NEXT:    add iy, iy
 ; EZ80-CODE16-NEXT:    sbc hl, hl
 ; EZ80-CODE16-NEXT:    ld c, l
@@ -13711,32 +13671,41 @@ define i32 @smul.fix.i32.15(i32, i32) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld h, (ix + 15)
+; EZ80-NEXT:    lea hl, ix - 4
+; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 15)
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld (ix - 1), c
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld d, c
-; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld iy, (ix - 3)
+; EZ80-NEXT:    ld iyh, c
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld iyl, e
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld l, (ix + 15)
-; EZ80-NEXT:    ld iyh, iyl
-; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop de
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld hl, (ix - 4)
+; EZ80-NEXT:    ld h, l
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    push bc
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 6)
+; EZ80-NEXT:    ld bc, (ix - 4)
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
@@ -13745,7 +13714,7 @@ define i32 @smul.fix.i32.15(i32, i32) {
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshrs
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    inc sp
+; EZ80-NEXT:    ld sp, ix
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ret
   call i32 @llvm.smul.fix.i32(i32 %0, i32 %1, i32 15)
@@ -13758,16 +13727,13 @@ define i32 @smul.fix.i32.31(i32, i32) {
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 6)
 ; Z80-NEXT:    ld h, (ix + 7)
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    pop iy
 ; Z80-NEXT:    ld e, (ix + 10)
 ; Z80-NEXT:    ld d, (ix + 11)
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
+; Z80-NEXT:    ld iyl, e
+; Z80-NEXT:    ld iyh, d
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    add iy, iy
 ; Z80-NEXT:    sbc hl, hl
@@ -13812,9 +13778,12 @@ define i32 @smul.fix.i32.31(i32, i32) {
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld iy, (ix + 6)
+; EZ80-CODE16-NEXT:    ld hl, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld de, (ix + 10)
-; EZ80-CODE16-NEXT:    lea hl, iy
+; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iyl, e
+; EZ80-CODE16-NEXT:    ld iyh, d
+; EZ80-CODE16-NEXT:    ex de, hl
 ; EZ80-CODE16-NEXT:    add iy, iy
 ; EZ80-CODE16-NEXT:    sbc hl, hl
 ; EZ80-CODE16-NEXT:    ld c, l
@@ -13852,32 +13821,41 @@ define i32 @smul.fix.i32.31(i32, i32) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld h, (ix + 15)
+; EZ80-NEXT:    lea hl, ix - 4
+; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 15)
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld (ix - 1), c
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld d, c
-; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld iy, (ix - 3)
+; EZ80-NEXT:    ld iyh, c
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld iyl, e
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld l, (ix + 15)
-; EZ80-NEXT:    ld iyh, iyl
-; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop de
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld hl, (ix - 4)
+; EZ80-NEXT:    ld h, l
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    push bc
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 6)
+; EZ80-NEXT:    ld bc, (ix - 4)
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
@@ -13886,7 +13864,7 @@ define i32 @smul.fix.i32.31(i32, i32) {
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshrs
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    inc sp
+; EZ80-NEXT:    ld sp, ix
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ret
   call i32 @llvm.smul.fix.i32(i32 %0, i32 %1, i32 31)
@@ -17710,84 +17688,85 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld hl, -205
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld bc, (ix + 9)
-; EZ80-NEXT:    ld hl, (ix + 12)
-; EZ80-NEXT:    ld de, (ix + 21)
+; EZ80-NEXT:    ld de, (ix + 9)
+; EZ80-NEXT:    ld iy, (ix + 12)
+; EZ80-NEXT:    ld bc, (ix + 18)
+; EZ80-NEXT:    ld hl, (ix + 21)
 ; EZ80-NEXT:    ld l, h
-; EZ80-NEXT:    ld (ix - 123), l
+; EZ80-NEXT:    ld (ix - 126), l
 ; EZ80-NEXT:    ld (ix - 105), bc
 ; EZ80-NEXT:    ld a, (ix - 103)
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
+; EZ80-NEXT:    ld c, a
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -132
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), iy
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld (ix - 102), a
-; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld hl, (ix - 104)
+; EZ80-NEXT:    ld de, -135
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    ld (ix - 102), c
+; EZ80-NEXT:    ld hl, (ix - 104)
+; EZ80-NEXT:    ld h, c
+; EZ80-NEXT:    ld l, c
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld bc, -157
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld d, iyl
-; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ld e, iyh
 ; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld de, -164
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (iy), hl
-; EZ80-NEXT:    ld iyl, d
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld (ix - 120), a
-; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld hl, (ix + 18)
-; EZ80-NEXT:    ld (ix - 101), hl
+; EZ80-NEXT:    ld (ix - 120), l
+; EZ80-NEXT:    ld (ix - 101), de
 ; EZ80-NEXT:    ld a, (ix - 99)
-; EZ80-NEXT:    ld a, iyl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -135
+; EZ80-NEXT:    ld (ix - 3), de
+; EZ80-NEXT:    ld de, -132
 ; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld a, iyl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -157
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), hl
-; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld a, c
-; EZ80-NEXT:    ld (ix - 126), a
-; EZ80-NEXT:    ld (ix - 98), bc
+; EZ80-NEXT:    ld bc, -164
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, bc
+; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    ld a, e
+; EZ80-NEXT:    ld (ix - 123), a
+; EZ80-NEXT:    ld (ix - 98), de
 ; EZ80-NEXT:    ld.sis hl, (ix - 97)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -170
-; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, -170
+; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (ix - 95), bc
-; EZ80-NEXT:    ld.sis iy, (ix - 94)
-; EZ80-NEXT:    ld l, 31
-; EZ80-NEXT:    ld de, (ix + 12)
-; EZ80-NEXT:    ld a, e
-; EZ80-NEXT:    ld (ix - 92), iy
+; EZ80-NEXT:    ld (ix - 95), de
+; EZ80-NEXT:    ld.sis de, (ix - 94)
+; EZ80-NEXT:    ld iyl, 31
+; EZ80-NEXT:    ld hl, (ix + 12)
+; EZ80-NEXT:    ld a, l
+; EZ80-NEXT:    ld (ix - 92), de
 ; EZ80-NEXT:    ld (ix - 90), a
 ; EZ80-NEXT:    ld bc, (ix - 92)
-; EZ80-NEXT:    ld a, d
+; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    call __lshrs
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -160
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld (iy), bc
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    dec de
 ; EZ80-NEXT:    add ix, de
@@ -17801,27 +17780,29 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), a
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 89), de
-; EZ80-NEXT:    ld.sis bc, (ix - 88)
+; EZ80-NEXT:    ld.sis hl, (ix - 88)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -176
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    ld bc, -176
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 86), de
 ; EZ80-NEXT:    ld.sis de, (ix - 85)
-; EZ80-NEXT:    ld iy, (ix + 21)
-; EZ80-NEXT:    ld a, iyl
+; EZ80-NEXT:    ld hl, (ix + 21)
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    ld (ix - 83), de
 ; EZ80-NEXT:    ld (ix - 81), a
 ; EZ80-NEXT:    ld bc, (ix - 83)
-; EZ80-NEXT:    ld a, iyh
+; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    call __lshrs
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -153
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld (iy), bc
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    dec de
 ; EZ80-NEXT:    add ix, de
@@ -17834,11 +17815,12 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld iy, (ix + 18)
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -147
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $e killed $e def $ude
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -150
@@ -17852,7 +17834,7 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    ld (ix - 75), l
 ; EZ80-NEXT:    ld hl, (ix - 77)
-; EZ80-NEXT:    ld e, (ix - 123) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld e, (ix - 120) ; 1-byte Folded Reload
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -129
 ; EZ80-NEXT:    add ix, bc
@@ -17871,9 +17853,9 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 69), l
 ; EZ80-NEXT:    ld bc, (ix - 71)
 ; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld d, (ix - 126) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld d, (ix - 123) ; 1-byte Folded Reload
 ; EZ80-NEXT:    ld e, d
-; EZ80-NEXT:    ld a, (ix - 120) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld a, (ix - 126) ; 1-byte Folded Reload
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -173
@@ -17891,10 +17873,11 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld h, a
 ; EZ80-NEXT:    ld l, d
 ; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -138
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, 0
 ; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld b, h
@@ -17929,14 +17912,15 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    ld de, -144
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), a
-; EZ80-NEXT:    ld hl, (ix - 111)
-; EZ80-NEXT:    ld de, -173
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld (iy), a
+; EZ80-NEXT:    ld hl, (ix - 111)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -173
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    add hl, de
 ; EZ80-NEXT:    ld (ix - 111), hl
 ; EZ80-NEXT:    ld a, (ix - 117) ; 1-byte Folded Reload
@@ -18482,8 +18466,8 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix + 21)
 ; EZ80-NEXT:    ld (ix - 52), e
 ; EZ80-NEXT:    ld bc, (ix - 54)
-; EZ80-NEXT:    ld e, (ix - 123) ; 1-byte Folded Reload
-; EZ80-NEXT:    ld a, (ix - 120) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld e, (ix - 120) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld a, (ix - 126) ; 1-byte Folded Reload
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -205
@@ -18509,13 +18493,14 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld bc, (ix - 51)
 ; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld e, (ix - 126) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld e, (ix - 123) ; 1-byte Folded Reload
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -198
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -195
 ; EZ80-NEXT:    add ix, bc
@@ -18580,17 +18565,19 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix + 21)
 ; EZ80-NEXT:    ld (ix - 46), c
 ; EZ80-NEXT:    ld de, (ix - 48)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -176
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 45), a
 ; EZ80-NEXT:    ld hl, (ix - 47)
 ; EZ80-NEXT:    ld h, a
@@ -20015,13 +20002,14 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 36), e
 ; EZ80-NEXT:    ld bc, (ix - 38)
 ; EZ80-NEXT:    ld e, iyl
-; EZ80-NEXT:    ld a, (ix - 120) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld a, (ix - 126) ; 1-byte Folded Reload
 ; EZ80-NEXT:    call __lmulu
-; EZ80-NEXT:    ld (ix - 120), hl
+; EZ80-NEXT:    ld (ix - 126), hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -132
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), e ; 1-byte Folded Spill
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), e ; 1-byte Folded Spill
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ld (ix - 35), hl
 ; EZ80-NEXT:    ld.sis hl, (ix - 34)
@@ -20037,7 +20025,7 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 29), iy
 ; EZ80-NEXT:    ld.sis (ix - 28), iy
 ; EZ80-NEXT:    ld bc, (ix - 29)
-; EZ80-NEXT:    ld e, (ix - 123) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld e, (ix - 120) ; 1-byte Folded Reload
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push ix
@@ -20051,15 +20039,15 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), e ; 1-byte Folded Spill
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld e, (ix - 126) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld e, (ix - 123) ; 1-byte Folded Reload
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -157
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix)
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __lmulu
-; EZ80-NEXT:    ld (ix - 123), hl
-; EZ80-NEXT:    ld (ix - 126), e ; 1-byte Folded Spill
+; EZ80-NEXT:    ld (ix - 120), hl
+; EZ80-NEXT:    ld (ix - 123), e ; 1-byte Folded Spill
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 26), a
 ; EZ80-NEXT:    ld de, (ix - 28)
@@ -20080,11 +20068,12 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 15)
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -160
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
@@ -20187,7 +20176,7 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld bc, (ix - 120)
+; EZ80-NEXT:    ld bc, (ix - 126)
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -132
@@ -20209,8 +20198,8 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __ladd
-; EZ80-NEXT:    ld bc, (ix - 123)
-; EZ80-NEXT:    ld a, (ix - 126) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld bc, (ix - 120)
+; EZ80-NEXT:    ld a, (ix - 123) ; 1-byte Folded Reload
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
@@ -20242,12 +20231,13 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    ld bc, (ix - 117)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -182
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld a, (iy) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
@@ -20272,12 +20262,13 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld c, (ix - 19)
 ; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -147
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshru
 ; EZ80-NEXT:    ld (ix - 120), hl
 ; EZ80-NEXT:    ld (ix - 123), de
@@ -20287,10 +20278,11 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld e, iyl
 ; EZ80-NEXT:    ld d, iyh
 ; EZ80-NEXT:    ld (ix - 111), de
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -144
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 18), hl
 ; EZ80-NEXT:    ld.sis (ix - 17), de
 ; EZ80-NEXT:    ld de, (ix - 18)
@@ -20318,10 +20310,11 @@ define i64 @smul.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -144
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 12), hl
 ; EZ80-NEXT:    ld hl, (ix - 111)
 ; EZ80-NEXT:    ld.sis (ix - 11), hl
@@ -20351,12 +20344,12 @@ define i8 @umul.fix.i8.8(i8, i8) {
 ; Z80:       ; %bb.0:
 ; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld h, 0
-; Z80-NEXT:    ld l, (iy + 2)
-; Z80-NEXT:    ld b, h
+; Z80-NEXT:    ld b, 0
 ; Z80-NEXT:    ld c, (iy + 4)
+; Z80-NEXT:    ld h, b
+; Z80-NEXT:    ld l, (iy + 2)
 ; Z80-NEXT:    call __smulu
-; Z80-NEXT:    ld d, 0
+; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    ld e, h
 ; Z80-NEXT:    ld a, e
 ; Z80-NEXT:    ret
@@ -20365,12 +20358,12 @@ define i8 @umul.fix.i8.8(i8, i8) {
 ; EZ80-CODE16:       ; %bb.0:
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld h, 0
-; EZ80-CODE16-NEXT:    ld l, (iy + 2)
-; EZ80-CODE16-NEXT:    ld b, h
+; EZ80-CODE16-NEXT:    ld b, 0
 ; EZ80-CODE16-NEXT:    ld c, (iy + 4)
+; EZ80-CODE16-NEXT:    ld h, b
+; EZ80-CODE16-NEXT:    ld l, (iy + 2)
 ; EZ80-CODE16-NEXT:    call __smulu
-; EZ80-CODE16-NEXT:    ld d, 0
+; EZ80-CODE16-NEXT:    ld d, b
 ; EZ80-CODE16-NEXT:    ld e, h
 ; EZ80-CODE16-NEXT:    ld a, e
 ; EZ80-CODE16-NEXT:    ret
@@ -20379,12 +20372,12 @@ define i8 @umul.fix.i8.8(i8, i8) {
 ; EZ80:       ; %bb.0:
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld h, 0
-; EZ80-NEXT:    ld l, (iy + 3)
-; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    ld b, 0
 ; EZ80-NEXT:    ld c, (iy + 6)
+; EZ80-NEXT:    ld h, b
+; EZ80-NEXT:    ld l, (iy + 3)
 ; EZ80-NEXT:    call __smulu
-; EZ80-NEXT:    ld d, 0
+; EZ80-NEXT:    ld d, b
 ; EZ80-NEXT:    ld e, h
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    ret
@@ -20438,19 +20431,22 @@ define i16 @umul.fix.i16.8(i16, i16) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld bc, (ix + 6)
-; EZ80-NEXT:    ld iy, (ix + 9)
+; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ld e, 0
 ; EZ80-NEXT:    ld (ix - 2), e
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld h, b
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld bc, (ix - 4)
+; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    ld (ix - 1), e
-; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld b, iyh
-; EZ80-NEXT:    ld c, iyl
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld d, iyh
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld e, a
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
@@ -20512,19 +20508,22 @@ define i16 @umul.fix.i16.16(i16, i16) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld bc, (ix + 6)
-; EZ80-NEXT:    ld iy, (ix + 9)
+; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ld e, 0
 ; EZ80-NEXT:    ld (ix - 2), e
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld h, b
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld bc, (ix - 4)
+; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    ld (ix - 1), e
-; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld b, iyh
-; EZ80-NEXT:    ld c, iyl
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld d, iyh
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld e, a
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
@@ -20618,21 +20617,21 @@ define i32 @umul.fix.i32.16(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld a, (ix + 15)
+; EZ80-NEXT:    ld a, (ix + 9)
 ; EZ80-NEXT:    ld iyl, a
+; EZ80-NEXT:    ld e, (ix + 15)
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
-; EZ80-NEXT:    ld de, (ix - 4)
-; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld hl, (ix - 4)
 ; EZ80-NEXT:    ld h, a
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld l, e
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
+; EZ80-NEXT:    ld (ix - 1), a
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld d, a
 ; EZ80-NEXT:    ld e, iyl
-; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 12)
@@ -20730,21 +20729,21 @@ define i32 @umul.fix.i32.32(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld a, (ix + 15)
+; EZ80-NEXT:    ld a, (ix + 9)
 ; EZ80-NEXT:    ld iyl, a
+; EZ80-NEXT:    ld e, (ix + 15)
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
-; EZ80-NEXT:    ld de, (ix - 4)
-; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld hl, (ix - 4)
 ; EZ80-NEXT:    ld h, a
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld l, e
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
+; EZ80-NEXT:    ld (ix - 1), a
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld d, a
 ; EZ80-NEXT:    ld e, iyl
-; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 12)
@@ -24523,12 +24522,12 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ld iy, (ix + 18)
-; EZ80-NEXT:    ld (ix - 106), de
+; EZ80-NEXT:    ld (ix - 106), iy
 ; EZ80-NEXT:    ld a, (ix - 104)
 ; EZ80-NEXT:    ld bc, 0
 ; EZ80-NEXT:    ld a, c
 ; EZ80-NEXT:    ld (ix - 115), a
-; EZ80-NEXT:    ld (ix - 103), iy
+; EZ80-NEXT:    ld (ix - 103), de
 ; EZ80-NEXT:    ld a, (ix - 101)
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    ld (ix - 124), a
@@ -24555,7 +24554,6 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -136
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), hl
@@ -24564,7 +24562,6 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -139
 ; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, (ix + 9)
@@ -24575,6 +24572,7 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 89), e
 ; EZ80-NEXT:    ld hl, (ix - 91)
 ; EZ80-NEXT:    ld e, d
+; EZ80-NEXT:    ld bc, (ix + 15)
 ; EZ80-NEXT:    ld a, (ix - 121) ; 1-byte Folded Reload
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    ld (ix - 118), hl
@@ -24596,10 +24594,11 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld e, d
 ; EZ80-NEXT:    ld a, iyh
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -154
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -148
 ; EZ80-NEXT:    add ix, bc
@@ -24630,12 +24629,13 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld d, iyl
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld l, (ix - 121) ; 1-byte Folded Reload
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -130
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 15)
@@ -24653,14 +24653,15 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    ld de, -133
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), a
-; EZ80-NEXT:    ld hl, (ix - 118)
-; EZ80-NEXT:    ld de, -154
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld (iy), a
+; EZ80-NEXT:    ld hl, (ix - 118)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -154
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    add hl, de
 ; EZ80-NEXT:    ld (ix - 118), hl
 ; EZ80-NEXT:    ld de, -142
@@ -25183,10 +25184,11 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld e, d
 ; EZ80-NEXT:    ld a, iyh
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -182
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -179
 ; EZ80-NEXT:    add ix, bc
@@ -25217,30 +25219,31 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    ld (ix - 56), l
 ; EZ80-NEXT:    ld de, (ix - 58)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld d, b
 ; EZ80-NEXT:    ld e, c
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), bc
-; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    lea hl, ix
+; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    ld (hl), bc
 ; EZ80-NEXT:    ld l, 0
 ; EZ80-NEXT:    ld (ix - 55), l
 ; EZ80-NEXT:    ld de, (ix - 57)
 ; EZ80-NEXT:    ld d, l
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    ld e, h
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -148
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -130
@@ -26702,10 +26705,11 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld iy, (ix + 21)
 ; EZ80-NEXT:    ld a, iyh
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -166
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -169
 ; EZ80-NEXT:    add ix, bc
@@ -26913,11 +26917,12 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    lea bc, iy
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __ladd
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -157
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld bc, (iy)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -160
 ; EZ80-NEXT:    add ix, de
@@ -26948,12 +26953,13 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld c, (ix - 19)
 ; EZ80-NEXT:    ld hl, 32
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -136
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshru
 ; EZ80-NEXT:    ld (ix - 121), hl
 ; EZ80-NEXT:    ld (ix - 124), de
@@ -26963,10 +26969,11 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld e, iyl
 ; EZ80-NEXT:    ld d, iyh
 ; EZ80-NEXT:    ld (ix - 118), de
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -133
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 18), hl
 ; EZ80-NEXT:    ld.sis (ix - 17), de
 ; EZ80-NEXT:    ld de, (ix - 18)
@@ -26994,10 +27001,11 @@ define i64 @umul.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -133
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (ix - 12), hl
 ; EZ80-NEXT:    ld hl, (ix - 118)
 ; EZ80-NEXT:    ld.sis (ix - 11), hl
@@ -27452,8 +27460,8 @@ define i32 @sdiv.fix.i32.15(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 4
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld iy, (ix + 6)
 ; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 15
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
@@ -27463,9 +27471,8 @@ define i32 @sdiv.fix.i32.15(i32, i32) {
 ; EZ80-NEXT:    ld d, c
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld hl, 15
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
@@ -27610,8 +27617,8 @@ define i32 @sdiv.fix.i32.31(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 4
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld iy, (ix + 6)
 ; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 31
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
@@ -27621,9 +27628,8 @@ define i32 @sdiv.fix.i32.31(i32, i32) {
 ; EZ80-NEXT:    ld d, c
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld hl, 31
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
@@ -27662,7 +27668,7 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; Z80-NEXT:    push ix
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    ld hl, -23
+; Z80-NEXT:    ld hl, -30
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push hl
@@ -27690,16 +27696,16 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; Z80-NEXT:    ld c, (ix + 8)
 ; Z80-NEXT:    ld b, (ix + 9)
 ; Z80-NEXT:    call __lldivs
-; Z80-NEXT:    ld (ix - 14), l
-; Z80-NEXT:    ld (ix - 13), h
-; Z80-NEXT:    ld (ix - 16), e
-; Z80-NEXT:    ld (ix - 15), d
-; Z80-NEXT:    ld (ix - 18), c
-; Z80-NEXT:    ld (ix - 17), b
+; Z80-NEXT:    ld (ix - 18), l
+; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 20), e
+; Z80-NEXT:    ld (ix - 19), d
+; Z80-NEXT:    ld (ix - 22), c
+; Z80-NEXT:    ld (ix - 21), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 20), l
-; Z80-NEXT:    ld (ix - 19), h
+; Z80-NEXT:    ld (ix - 24), l
+; Z80-NEXT:    ld (ix - 23), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
@@ -27770,57 +27776,29 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; Z80-NEXT:    ld c, (ix - 6)
 ; Z80-NEXT:    ld b, (ix - 5)
 ; Z80-NEXT:    call __llxor
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
-; Z80-NEXT:    ld (ix - 12), e
-; Z80-NEXT:    ld (ix - 11), d
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
+; Z80-NEXT:    ld (ix - 14), e
+; Z80-NEXT:    ld (ix - 13), d
+; Z80-NEXT:    ld (ix - 16), c
+; Z80-NEXT:    ld (ix - 15), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 22), l
-; Z80-NEXT:    ld (ix - 21), h
+; Z80-NEXT:    ld (ix - 26), l
+; Z80-NEXT:    ld (ix - 25), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld de, 0
-; Z80-NEXT:    push de
-; Z80-NEXT:    push de
-; Z80-NEXT:    ld hl, 16384
-; Z80-NEXT:    push hl
-; Z80-NEXT:    push de
 ; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
-; Z80-NEXT:    ld e, (ix - 12)
-; Z80-NEXT:    ld d, (ix - 11)
-; Z80-NEXT:    call __llcmpu
-; Z80-NEXT:    push af
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 23), l
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld hl, 10
-; Z80-NEXT:    add hl, sp
-; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 23)
-; Z80-NEXT:    ; kill: def $h killed $a
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    pop af
-; Z80-NEXT:    ccf
-; Z80-NEXT:    ; kill: def $a killed $a
-; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld iyl, a
-; Z80-NEXT:    inc iyl
-; Z80-NEXT:    ld l, (ix - 22)
-; Z80-NEXT:    ld h, (ix - 21)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
-; Z80-NEXT:    ld e, (ix - 12)
-; Z80-NEXT:    ld d, (ix - 11)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    ld e, (ix - 14)
+; Z80-NEXT:    ld d, (ix - 13)
+; Z80-NEXT:    ld c, (ix - 16)
+; Z80-NEXT:    ld b, (ix - 15)
 ; Z80-NEXT:    call __llctlz
 ; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld a, iyl
 ; Z80-NEXT:    pop de
 ; Z80-NEXT:    ld h, 0
 ; Z80-NEXT:    ld de, -1
@@ -27835,84 +27813,97 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; Z80-NEXT:    call __lladd
 ; Z80-NEXT:    ld (ix - 8), l
 ; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:    ld (ix - 30), e
+; Z80-NEXT:    ld (ix - 29), d
+; Z80-NEXT:    ld (ix - 28), c
+; Z80-NEXT:    ld (ix - 27), b
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    jr z, BB88_2
-; Z80-NEXT:  ; %bb.1:
-; Z80-NEXT:    ld hl, 30
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
-; Z80-NEXT:  BB88_2:
-; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld hl, 0
-; Z80-NEXT:    jr nz, BB88_4
-; Z80-NEXT:  ; %bb.3:
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:  BB88_4:
-; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    ld hl, 16384
 ; Z80-NEXT:    ld de, 0
-; Z80-NEXT:    jr nz, BB88_6
-; Z80-NEXT:  ; %bb.5:
-; Z80-NEXT:    ld e, c
-; Z80-NEXT:    ld d, b
-; Z80-NEXT:  BB88_6:
-; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld bc, 0
-; Z80-NEXT:    jr nz, BB88_8
-; Z80-NEXT:  ; %bb.7:
-; Z80-NEXT:    ld c, iyl
-; Z80-NEXT:    ld b, iyh
-; Z80-NEXT:  BB88_8:
-; Z80-NEXT:    ld iy, 31
-; Z80-NEXT:    push bc
+; Z80-NEXT:    push de
 ; Z80-NEXT:    push de
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    push de
+; Z80-NEXT:    ld l, (ix - 26)
+; Z80-NEXT:    ld h, (ix - 25)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    ld e, (ix - 14)
+; Z80-NEXT:    ld d, (ix - 13)
+; Z80-NEXT:    ld c, (ix - 16)
+; Z80-NEXT:    ld b, (ix - 15)
+; Z80-NEXT:    call __llcmpu
+; Z80-NEXT:    push af
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 10
+; Z80-NEXT:    add hl, sp
+; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ; kill: def $h killed $a
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    pop af
+; Z80-NEXT:    ccf
+; Z80-NEXT:    ; kill: def $a killed $a
+; Z80-NEXT:    sbc a, a
+; Z80-NEXT:    inc a
+; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    jr z, BB88_2
+; Z80-NEXT:  ; %bb.1:
+; Z80-NEXT:    ld hl, 30
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:  BB88_2:
+; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    ld bc, 0
+; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld h, b
+; Z80-NEXT:    jr nz, BB88_4
+; Z80-NEXT:  ; %bb.3:
+; Z80-NEXT:    ld l, (ix - 30)
+; Z80-NEXT:    ld h, (ix - 29)
+; Z80-NEXT:  BB88_4:
+; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
+; Z80-NEXT:    jr nz, BB88_6
+; Z80-NEXT:  ; %bb.5:
+; Z80-NEXT:    ld e, (ix - 28)
+; Z80-NEXT:    ld d, (ix - 27)
+; Z80-NEXT:  BB88_6:
+; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    jr nz, BB88_8
+; Z80-NEXT:  ; %bb.7:
+; Z80-NEXT:    ld c, iyl
+; Z80-NEXT:    ld b, iyh
+; Z80-NEXT:  BB88_8:
+; Z80-NEXT:    ld iy, 31
+; Z80-NEXT:    push bc
+; Z80-NEXT:    push de
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 8)
 ; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld hl, 0
-; Z80-NEXT:    ld c, l
-; Z80-NEXT:    ld b, h
-; Z80-NEXT:    push bc
+; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    push de
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld e, c
-; Z80-NEXT:    ld d, b
+; Z80-NEXT:    ld c, e
+; Z80-NEXT:    ld b, d
 ; Z80-NEXT:    call __llsub
 ; Z80-NEXT:    ld (ix - 12), l
 ; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld hl, 31
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 20)
-; Z80-NEXT:    ld h, (ix - 19)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 14)
-; Z80-NEXT:    ld h, (ix - 13)
-; Z80-NEXT:    ld e, (ix - 16)
-; Z80-NEXT:    ld d, (ix - 15)
-; Z80-NEXT:    ld c, (ix - 18)
-; Z80-NEXT:    ld b, (ix - 17)
-; Z80-NEXT:    call __llshl
-; Z80-NEXT:    ld (ix - 14), l
-; Z80-NEXT:    ld (ix - 13), h
-; Z80-NEXT:    ld (ix - 16), e
-; Z80-NEXT:    ld (ix - 15), d
-; Z80-NEXT:    ld (ix - 18), c
-; Z80-NEXT:    ld (ix - 17), b
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 20), l
-; Z80-NEXT:    ld (ix - 19), h
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld l, (ix - 8)
 ; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
@@ -28013,23 +28004,48 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; Z80-NEXT:    call __llshrs
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
+; Z80-NEXT:    ld (ix - 4), e
+; Z80-NEXT:    ld (ix - 3), d
+; Z80-NEXT:    ld (ix - 6), c
+; Z80-NEXT:    ld (ix - 5), b
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    push iy
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push de
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 31
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 24)
+; Z80-NEXT:    ld h, (ix - 23)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 18)
+; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld e, (ix - 20)
+; Z80-NEXT:    ld d, (ix - 19)
+; Z80-NEXT:    ld c, (ix - 22)
+; Z80-NEXT:    ld b, (ix - 21)
+; Z80-NEXT:    call __llshl
+; Z80-NEXT:    ld (ix - 10), l
+; Z80-NEXT:    ld (ix - 9), h
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 6)
+; Z80-NEXT:    ld h, (ix - 5)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 4)
+; Z80-NEXT:    ld h, (ix - 3)
+; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 20)
-; Z80-NEXT:    ld h, (ix - 19)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 14)
-; Z80-NEXT:    ld h, (ix - 13)
-; Z80-NEXT:    ld e, (ix - 16)
-; Z80-NEXT:    ld d, (ix - 15)
-; Z80-NEXT:    ld c, (ix - 18)
-; Z80-NEXT:    ld b, (ix - 17)
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    call __lladd
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
@@ -28047,7 +28063,7 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    push ix
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
-; EZ80-CODE16-NEXT:    lea hl, ix - 23
+; EZ80-CODE16-NEXT:    lea hl, ix - 30
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld iy, (ix + 12)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 14)
@@ -28063,10 +28079,10 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 8)
 ; EZ80-CODE16-NEXT:    call __lldivs
-; EZ80-CODE16-NEXT:    ld (ix - 14), hl
-; EZ80-CODE16-NEXT:    ld (ix - 16), de
-; EZ80-CODE16-NEXT:    ld (ix - 18), bc
-; EZ80-CODE16-NEXT:    ld (ix - 20), iy
+; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 20), de
+; EZ80-CODE16-NEXT:    ld (ix - 22), bc
+; EZ80-CODE16-NEXT:    ld (ix - 24), iy
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
@@ -28113,62 +28129,65 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
 ; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
 ; EZ80-CODE16-NEXT:    call __llxor
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
+; EZ80-CODE16-NEXT:    ld (ix - 14), de
+; EZ80-CODE16-NEXT:    ld (ix - 16), bc
+; EZ80-CODE16-NEXT:    ld (ix - 26), iy
+; EZ80-CODE16-NEXT:    ld hl, 10
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
+; EZ80-CODE16-NEXT:    ld de, (ix - 14)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
+; EZ80-CODE16-NEXT:    call __llctlz
+; EZ80-CODE16-NEXT:    ld l, a
+; EZ80-CODE16-NEXT:    pop de
+; EZ80-CODE16-NEXT:    ld h, 0
+; EZ80-CODE16-NEXT:    ld de, -1
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    ld e, c
+; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    call __lladd
 ; EZ80-CODE16-NEXT:    ld (ix - 8), hl
-; EZ80-CODE16-NEXT:    ld (ix - 12), de
-; EZ80-CODE16-NEXT:    ld (ix - 22), iy
+; EZ80-CODE16-NEXT:    ld (ix - 30), de
+; EZ80-CODE16-NEXT:    ld (ix - 28), bc
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld hl, 16384
 ; EZ80-CODE16-NEXT:    ld de, 0
 ; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, 16384
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
-; EZ80-CODE16-NEXT:    ld de, (ix - 12)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 26)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
+; EZ80-CODE16-NEXT:    ld de, (ix - 14)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 23), l
+; EZ80-CODE16-NEXT:    ld (ix - 12), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 23)
+; EZ80-CODE16-NEXT:    ld l, (ix - 12)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
 ; EZ80-CODE16-NEXT:    ccf
 ; EZ80-CODE16-NEXT:    ; kill: def $a killed $a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld iyl, a
-; EZ80-CODE16-NEXT:    inc iyl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 22)
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
-; EZ80-CODE16-NEXT:    ld de, (ix - 12)
-; EZ80-CODE16-NEXT:    call __llctlz
-; EZ80-CODE16-NEXT:    ld l, a
-; EZ80-CODE16-NEXT:    ld a, iyl
-; EZ80-CODE16-NEXT:    pop de
-; EZ80-CODE16-NEXT:    ld h, 0
-; EZ80-CODE16-NEXT:    ld de, -1
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld bc, 0
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    ld e, c
-; EZ80-CODE16-NEXT:    ld d, b
-; EZ80-CODE16-NEXT:    call __lladd
-; EZ80-CODE16-NEXT:    ld (ix - 8), hl
-; EZ80-CODE16-NEXT:    ld hl, 10
-; EZ80-CODE16-NEXT:    add hl, sp
-; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    inc a
 ; EZ80-CODE16-NEXT:    bit 0, a
 ; EZ80-CODE16-NEXT:    jr z, BB88_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
@@ -28176,20 +28195,21 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld (ix - 8), hl
 ; EZ80-CODE16-NEXT:  BB88_2:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld hl, 0
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld h, b
 ; EZ80-CODE16-NEXT:    jr nz, BB88_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 30)
 ; EZ80-CODE16-NEXT:  BB88_4:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld de, 0
-; EZ80-CODE16-NEXT:    jr nz, BB88_6
-; EZ80-CODE16-NEXT:  ; %bb.5:
 ; EZ80-CODE16-NEXT:    ld e, c
 ; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    jr nz, BB88_6
+; EZ80-CODE16-NEXT:  ; %bb.5:
+; EZ80-CODE16-NEXT:    ld de, (ix - 28)
 ; EZ80-CODE16-NEXT:  BB88_6:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld bc, 0
 ; EZ80-CODE16-NEXT:    jr nz, BB88_8
 ; EZ80-CODE16-NEXT:  ; %bb.7:
 ; EZ80-CODE16-NEXT:    lea bc, iy
@@ -28201,32 +28221,16 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, 0
-; EZ80-CODE16-NEXT:    ld c, l
-; EZ80-CODE16-NEXT:    ld b, h
-; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    lea hl, iy
-; EZ80-CODE16-NEXT:    ld e, c
-; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    ld c, e
+; EZ80-CODE16-NEXT:    ld b, d
 ; EZ80-CODE16-NEXT:    call __llsub
 ; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, 31
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 14)
-; EZ80-CODE16-NEXT:    ld de, (ix - 16)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
-; EZ80-CODE16-NEXT:    call __llshl
-; EZ80-CODE16-NEXT:    ld (ix - 14), hl
-; EZ80-CODE16-NEXT:    ld (ix - 16), de
-; EZ80-CODE16-NEXT:    ld (ix - 18), bc
-; EZ80-CODE16-NEXT:    ld (ix - 20), iy
-; EZ80-CODE16-NEXT:    ld hl, 4
-; EZ80-CODE16-NEXT:    add hl, sp
-; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
@@ -28299,19 +28303,34 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __llshrs
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), de
+; EZ80-CODE16-NEXT:    ld (ix - 6), bc
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, 31
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 24)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 14)
-; EZ80-CODE16-NEXT:    ld de, (ix - 16)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld de, (ix - 20)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 22)
+; EZ80-CODE16-NEXT:    call __llshl
+; EZ80-CODE16-NEXT:    ld (ix - 10), hl
+; EZ80-CODE16-NEXT:    ld hl, 4
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    call __lladd
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
@@ -28327,7 +28346,7 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    lea hl, ix - 25
+; EZ80-NEXT:    lea hl, ix - 34
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ld de, (ix + 15)
@@ -28340,9 +28359,9 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __lldivs
-; EZ80-NEXT:    ld (ix - 16), hl
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
+; EZ80-NEXT:    ld (ix - 19), hl
+; EZ80-NEXT:    ld (ix - 22), de
+; EZ80-NEXT:    ld (ix - 25), bc
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
@@ -28356,7 +28375,7 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llrems
-; EZ80-NEXT:    ld (ix - 13), hl
+; EZ80-NEXT:    ld (ix - 10), hl
 ; EZ80-NEXT:    ld (ix - 4), de
 ; EZ80-NEXT:    ld (ix - 7), bc
 ; EZ80-NEXT:    ld iy, 9
@@ -28372,104 +28391,103 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 13)
+; EZ80-NEXT:    ld hl, (ix - 10)
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld bc, (ix - 7)
 ; EZ80-NEXT:    call __llxor
+; EZ80-NEXT:    ld (ix - 28), hl
+; EZ80-NEXT:    ld (ix - 13), de
+; EZ80-NEXT:    ld (ix - 16), bc
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    ld de, (ix - 13)
+; EZ80-NEXT:    ld bc, (ix - 16)
+; EZ80-NEXT:    call __llctlz
+; EZ80-NEXT:    ld e, 0
+; EZ80-NEXT:    ld (ix - 1), e
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, e
+; EZ80-NEXT:    ld l, a
 ; EZ80-NEXT:    ld iy, 0
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    ld iy, 64
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    ld iy, 0
-; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld c, iyl
+; EZ80-NEXT:    ld b, iyh
+; EZ80-NEXT:    ld de, -1
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    lea de, iy
+; EZ80-NEXT:    call __lladd
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld (ix - 34), de
+; EZ80-NEXT:    ld (ix - 31), bc
+; EZ80-NEXT:    ld hl, 9
+; EZ80-NEXT:    add hl, sp
+; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    ld hl, 64
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld hl, (ix - 28)
+; EZ80-NEXT:    ld de, (ix - 13)
+; EZ80-NEXT:    ld bc, (ix - 16)
 ; EZ80-NEXT:    call __llcmpu
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ex (sp), hl
-; EZ80-NEXT:    ld (ix - 10), l
+; EZ80-NEXT:    ld (ix - 13), l
 ; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    ld iy, 9
-; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    ld hl, 9
+; EZ80-NEXT:    add hl, sp
+; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld l, (ix - 10)
+; EZ80-NEXT:    ld l, (ix - 13)
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
 ; EZ80-NEXT:    ccf
 ; EZ80-NEXT:    ; kill: def $a killed $a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    inc iyl
-; EZ80-NEXT:    call __llctlz
-; EZ80-NEXT:    ld e, 0
-; EZ80-NEXT:    ld (ix - 1), e
-; EZ80-NEXT:    ld hl, (ix - 3)
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, a
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld de, 0
-; EZ80-NEXT:    ld c, e
-; EZ80-NEXT:    ld b, d
-; EZ80-NEXT:    ld iy, -1
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    call __lladd
-; EZ80-NEXT:    ld (ix - 10), hl
-; EZ80-NEXT:    ld hl, 9
-; EZ80-NEXT:    add hl, sp
-; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    inc a
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    jr z, BB88_2
 ; EZ80-NEXT:  ; %bb.1:
-; EZ80-NEXT:    ld hl, 30
-; EZ80-NEXT:    ld (ix - 10), hl
+; EZ80-NEXT:    ld iy, 30
 ; EZ80-NEXT:  BB88_2:
 ; EZ80-NEXT:    bit 0, a
-; EZ80-NEXT:    ld iy, 0
+; EZ80-NEXT:    ld hl, 0
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop bc
 ; EZ80-NEXT:    jr nz, BB88_4
 ; EZ80-NEXT:  ; %bb.3:
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld bc, (ix - 34)
 ; EZ80-NEXT:  BB88_4:
-; EZ80-NEXT:    ld.sis de, 0
+; EZ80-NEXT:    ld.sis hl, 0
 ; EZ80-NEXT:    bit 0, a
-; EZ80-NEXT:    ; kill: def $de killed $de def $ude
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    jr nz, BB88_6
 ; EZ80-NEXT:  ; %bb.5:
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld d, b
+; EZ80-NEXT:    ld hl, (ix - 31)
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:  BB88_6:
 ; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push de
+; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push iy
-; EZ80-NEXT:    ld de, (ix - 10)
-; EZ80-NEXT:    push de
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    ld.sis bc, 0
 ; EZ80-NEXT:    call __llsub
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    ld (ix - 25), iy
+; EZ80-NEXT:    ld (ix - 13), hl
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, 31
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 16)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
-; EZ80-NEXT:    call __llshl
-; EZ80-NEXT:    ld (ix - 16), hl
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
-; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix - 10)
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 13)
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld bc, (ix - 7)
 ; EZ80-NEXT:    call __llshl
@@ -28477,7 +28495,8 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 7), de
 ; EZ80-NEXT:    ld (ix - 10), bc
 ; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix - 13)
+; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, 1
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    ld.sis bc, 0
@@ -28510,17 +28529,27 @@ define i64 @sdiv.fix.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
-; EZ80-NEXT:    ld iy, (ix - 25)
+; EZ80-NEXT:    ld iy, (ix - 13)
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshrs
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld (ix - 7), de
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    push bc
-; EZ80-NEXT:    push de
+; EZ80-NEXT:    ld (ix - 10), bc
+; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 16)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    ld hl, (ix - 19)
+; EZ80-NEXT:    ld de, (ix - 22)
+; EZ80-NEXT:    ld bc, (ix - 25)
+; EZ80-NEXT:    call __llshl
+; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld iy, (ix - 10)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 7)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 4)
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __lladd
 ; EZ80-NEXT:    ld sp, ix
 ; EZ80-NEXT:    pop ix
@@ -28789,17 +28818,19 @@ define i32 @udiv.fix.i32.16(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 8
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld c, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 16
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld bc, 0
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld (ix - 5), bc
-; EZ80-NEXT:    ld iy, 16
 ; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ld (ix - 8), hl
@@ -28899,17 +28930,19 @@ define i32 @udiv.fix.i32.32(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 8
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld c, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld bc, 0
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld (ix - 5), bc
-; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ld (ix - 8), hl
@@ -28941,7 +28974,7 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    push ix
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    ld hl, -20
+; Z80-NEXT:    ld hl, -26
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push hl
@@ -28969,12 +29002,12 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    ld c, (ix + 8)
 ; Z80-NEXT:    ld b, (ix + 9)
 ; Z80-NEXT:    call __lldivu
-; Z80-NEXT:    ld (ix - 12), l
-; Z80-NEXT:    ld (ix - 11), h
-; Z80-NEXT:    ld (ix - 14), e
-; Z80-NEXT:    ld (ix - 13), d
-; Z80-NEXT:    ld (ix - 16), c
-; Z80-NEXT:    ld (ix - 15), b
+; Z80-NEXT:    ld (ix - 14), l
+; Z80-NEXT:    ld (ix - 13), h
+; Z80-NEXT:    ld (ix - 16), e
+; Z80-NEXT:    ld (ix - 15), d
+; Z80-NEXT:    ld (ix - 18), c
+; Z80-NEXT:    ld (ix - 17), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    ld (ix - 20), l
@@ -29009,169 +29042,151 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    ld (ix - 1), h
 ; Z80-NEXT:    ld (ix - 4), e
 ; Z80-NEXT:    ld (ix - 3), d
+; Z80-NEXT:    ld (ix - 6), c
+; Z80-NEXT:    ld (ix - 5), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 6), l
-; Z80-NEXT:    ld (ix - 5), h
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 10
+; Z80-NEXT:    add hl, sp
+; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    ld e, (ix - 4)
+; Z80-NEXT:    ld d, (ix - 3)
+; Z80-NEXT:    ld c, (ix - 6)
+; Z80-NEXT:    ld b, (ix - 5)
+; Z80-NEXT:    call __llctlz
+; Z80-NEXT:    ld l, a
+; Z80-NEXT:    pop de
+; Z80-NEXT:    ld h, 0
+; Z80-NEXT:    ld bc, 0
+; Z80-NEXT:    push bc
+; Z80-NEXT:    push bc
+; Z80-NEXT:    push bc
+; Z80-NEXT:    push bc
+; Z80-NEXT:    push bc
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
+; Z80-NEXT:    call __lladd
+; Z80-NEXT:    ld (ix - 26), l
+; Z80-NEXT:    ld (ix - 25), h
+; Z80-NEXT:    ld (ix - 12), e
+; Z80-NEXT:    ld (ix - 11), d
+; Z80-NEXT:    ld (ix - 24), c
+; Z80-NEXT:    ld (ix - 23), b
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    ld (ix - 22), l
+; Z80-NEXT:    ld (ix - 21), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    ld iy, 32
+; Z80-NEXT:    ld hl, 1
 ; Z80-NEXT:    ld de, 0
 ; Z80-NEXT:    push de
-; Z80-NEXT:    ld hl, 1
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push de
 ; Z80-NEXT:    push de
-; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    ld e, (ix - 4)
 ; Z80-NEXT:    ld d, (ix - 3)
+; Z80-NEXT:    ld c, (ix - 6)
+; Z80-NEXT:    ld b, (ix - 5)
 ; Z80-NEXT:    call __llcmpu
 ; Z80-NEXT:    push af
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 10), l
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld l, (ix - 10)
 ; Z80-NEXT:    ; kill: def $h killed $a
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop af
 ; Z80-NEXT:    ccf
 ; Z80-NEXT:    ; kill: def $a killed $a
 ; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld iyl, a
-; Z80-NEXT:    inc iyl
-; Z80-NEXT:    ld l, (ix - 6)
-; Z80-NEXT:    ld h, (ix - 5)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 2)
-; Z80-NEXT:    ld h, (ix - 1)
-; Z80-NEXT:    ld e, (ix - 4)
-; Z80-NEXT:    ld d, (ix - 3)
-; Z80-NEXT:    ld (ix - 18), c
-; Z80-NEXT:    ld (ix - 17), b
-; Z80-NEXT:    call __llctlz
-; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld a, iyl
-; Z80-NEXT:    pop de
-; Z80-NEXT:    ld h, 0
-; Z80-NEXT:    ld bc, 0
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push bc
-; Z80-NEXT:    ld e, c
-; Z80-NEXT:    ld d, b
-; Z80-NEXT:    call __lladd
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld iy, 10
-; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld sp, iy
-; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld iy, 32
-; Z80-NEXT:    jr nz, BB94_2
-; Z80-NEXT:  ; %bb.1:
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:  BB94_2:
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 10), l
-; Z80-NEXT:    ld (ix - 9), h
-; Z80-NEXT:    pop hl
+; Z80-NEXT:    inc a
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    jr nz, BB94_2
+; Z80-NEXT:  ; %bb.1:
+; Z80-NEXT:    ld l, (ix - 26)
+; Z80-NEXT:    ld h, (ix - 25)
+; Z80-NEXT:  BB94_2:
+; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    ld bc, 0
+; Z80-NEXT:    ld iyl, c
+; Z80-NEXT:    ld iyh, b
 ; Z80-NEXT:    jr nz, BB94_4
 ; Z80-NEXT:  ; %bb.3:
-; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    pop iy
 ; Z80-NEXT:  BB94_4:
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
-; Z80-NEXT:    jr nz, BB94_6
-; Z80-NEXT:  ; %bb.5:
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld d, b
+; Z80-NEXT:    jr nz, BB94_6
+; Z80-NEXT:  ; %bb.5:
+; Z80-NEXT:    ld e, (ix - 24)
+; Z80-NEXT:    ld d, (ix - 23)
 ; Z80-NEXT:  BB94_6:
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld c, iyl
-; Z80-NEXT:    ld b, iyh
+; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld h, b
 ; Z80-NEXT:    jr nz, BB94_8
 ; Z80-NEXT:  ; %bb.7:
-; Z80-NEXT:    ld c, (ix - 8)
-; Z80-NEXT:    ld b, (ix - 7)
+; Z80-NEXT:    ld l, (ix - 22)
+; Z80-NEXT:    ld h, (ix - 21)
 ; Z80-NEXT:  BB94_8:
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push de
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 10)
-; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
+; Z80-NEXT:    push de
 ; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push bc
 ; Z80-NEXT:    ld hl, 32
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
-; Z80-NEXT:    ld c, iyl
-; Z80-NEXT:    ld b, iyh
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    call __llsub
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:    ld (ix - 10), l
+; Z80-NEXT:    ld (ix - 9), h
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld hl, 32
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 20)
-; Z80-NEXT:    ld h, (ix - 19)
-; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 12)
 ; Z80-NEXT:    ld h, (ix - 11)
-; Z80-NEXT:    ld e, (ix - 14)
-; Z80-NEXT:    ld d, (ix - 13)
-; Z80-NEXT:    ld c, (ix - 16)
-; Z80-NEXT:    ld b, (ix - 15)
-; Z80-NEXT:    call __llshl
-; Z80-NEXT:    ld (ix - 12), l
-; Z80-NEXT:    ld (ix - 11), h
-; Z80-NEXT:    ld (ix - 14), e
-; Z80-NEXT:    ld (ix - 13), d
-; Z80-NEXT:    ld (ix - 16), c
-; Z80-NEXT:    ld (ix - 15), b
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 20), l
-; Z80-NEXT:    ld (ix - 19), h
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld l, (ix - 10)
-; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 6)
-; Z80-NEXT:    ld h, (ix - 5)
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    ld e, (ix - 4)
 ; Z80-NEXT:    ld d, (ix - 3)
-; Z80-NEXT:    ld c, (ix - 18)
-; Z80-NEXT:    ld b, (ix - 17)
+; Z80-NEXT:    ld c, (ix - 6)
+; Z80-NEXT:    ld b, (ix - 5)
 ; Z80-NEXT:    call __llshl
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
@@ -29181,13 +29196,13 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    ld (ix - 5), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 10), l
-; Z80-NEXT:    ld (ix - 9), h
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld bc, 0
 ; Z80-NEXT:    push bc
@@ -29195,25 +29210,25 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    call __llshl
-; Z80-NEXT:    ld (ix - 18), l
-; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 1
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 18)
-; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
 ; Z80-NEXT:    call __llshru
-; Z80-NEXT:    ld (ix - 18), l
-; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    push bc
 ; Z80-NEXT:    push de
-; Z80-NEXT:    ld l, (ix - 18)
-; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 18)
 ; Z80-NEXT:    ld h, (ix + 19)
@@ -29225,19 +29240,19 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    ld c, (ix + 16)
 ; Z80-NEXT:    ld b, (ix + 17)
 ; Z80-NEXT:    call __lladd
-; Z80-NEXT:    ld (ix - 18), l
-; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    push bc
 ; Z80-NEXT:    push de
-; Z80-NEXT:    ld l, (ix - 18)
-; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 10)
-; Z80-NEXT:    ld h, (ix - 9)
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
@@ -29251,8 +29266,8 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ld l, (ix - 2)
@@ -29260,23 +29275,48 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; Z80-NEXT:    call __llshru
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
+; Z80-NEXT:    ld (ix - 4), e
+; Z80-NEXT:    ld (ix - 3), d
+; Z80-NEXT:    ld (ix - 6), c
+; Z80-NEXT:    ld (ix - 5), b
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    push iy
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push de
-; Z80-NEXT:    ld l, (ix - 2)
-; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 32
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 20)
 ; Z80-NEXT:    ld h, (ix - 19)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 12)
-; Z80-NEXT:    ld h, (ix - 11)
-; Z80-NEXT:    ld e, (ix - 14)
-; Z80-NEXT:    ld d, (ix - 13)
-; Z80-NEXT:    ld c, (ix - 16)
-; Z80-NEXT:    ld b, (ix - 15)
+; Z80-NEXT:    ld l, (ix - 14)
+; Z80-NEXT:    ld h, (ix - 13)
+; Z80-NEXT:    ld e, (ix - 16)
+; Z80-NEXT:    ld d, (ix - 15)
+; Z80-NEXT:    ld c, (ix - 18)
+; Z80-NEXT:    ld b, (ix - 17)
+; Z80-NEXT:    call __llshl
+; Z80-NEXT:    ld (ix - 10), l
+; Z80-NEXT:    ld (ix - 9), h
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 6)
+; Z80-NEXT:    ld h, (ix - 5)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 4)
+; Z80-NEXT:    ld h, (ix - 3)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    call __lladd
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
@@ -29294,7 +29334,7 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    push ix
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
-; EZ80-CODE16-NEXT:    lea hl, ix - 20
+; EZ80-CODE16-NEXT:    lea hl, ix - 26
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld iy, (ix + 12)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 14)
@@ -29310,9 +29350,9 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 8)
 ; EZ80-CODE16-NEXT:    call __lldivu
-; EZ80-CODE16-NEXT:    ld (ix - 12), hl
-; EZ80-CODE16-NEXT:    ld (ix - 14), de
-; EZ80-CODE16-NEXT:    ld (ix - 16), bc
+; EZ80-CODE16-NEXT:    ld (ix - 14), hl
+; EZ80-CODE16-NEXT:    ld (ix - 16), de
+; EZ80-CODE16-NEXT:    ld (ix - 18), bc
 ; EZ80-CODE16-NEXT:    ld (ix - 20), iy
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
@@ -29333,135 +29373,123 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    call __llremu
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld (ix - 4), de
-; EZ80-CODE16-NEXT:    ld (ix - 6), iy
+; EZ80-CODE16-NEXT:    ld (ix - 6), bc
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld de, (ix - 4)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
+; EZ80-CODE16-NEXT:    call __llctlz
+; EZ80-CODE16-NEXT:    ld l, a
+; EZ80-CODE16-NEXT:    pop de
+; EZ80-CODE16-NEXT:    ld h, 0
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    ld e, c
+; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    call __lladd
+; EZ80-CODE16-NEXT:    ld (ix - 26), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), de
+; EZ80-CODE16-NEXT:    ld (ix - 24), bc
+; EZ80-CODE16-NEXT:    ld (ix - 22), iy
+; EZ80-CODE16-NEXT:    ld hl, 10
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld iy, 32
+; EZ80-CODE16-NEXT:    ld hl, 1
 ; EZ80-CODE16-NEXT:    ld de, 0
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, 1
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 8), l
+; EZ80-CODE16-NEXT:    ld (ix - 10), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 8)
+; EZ80-CODE16-NEXT:    ld l, (ix - 10)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
 ; EZ80-CODE16-NEXT:    ccf
 ; EZ80-CODE16-NEXT:    ; kill: def $a killed $a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld iyl, a
-; EZ80-CODE16-NEXT:    inc iyl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
-; EZ80-CODE16-NEXT:    ld de, (ix - 4)
-; EZ80-CODE16-NEXT:    ld (ix - 18), bc
-; EZ80-CODE16-NEXT:    call __llctlz
-; EZ80-CODE16-NEXT:    ld l, a
-; EZ80-CODE16-NEXT:    ld a, iyl
-; EZ80-CODE16-NEXT:    pop de
-; EZ80-CODE16-NEXT:    ld h, 0
-; EZ80-CODE16-NEXT:    ld bc, 0
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    ld e, c
-; EZ80-CODE16-NEXT:    ld d, b
-; EZ80-CODE16-NEXT:    call __lladd
-; EZ80-CODE16-NEXT:    ld (ix - 8), iy
-; EZ80-CODE16-NEXT:    ld iy, 10
-; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld sp, iy
+; EZ80-CODE16-NEXT:    inc a
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld iy, 32
+; EZ80-CODE16-NEXT:    lea hl, iy
 ; EZ80-CODE16-NEXT:    jr nz, BB94_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 26)
 ; EZ80-CODE16-NEXT:  BB94_2:
-; EZ80-CODE16-NEXT:    ld (ix - 10), iy
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld iy, 0
-; EZ80-CODE16-NEXT:    lea hl, iy
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    ld iyl, c
+; EZ80-CODE16-NEXT:    ld iyh, b
 ; EZ80-CODE16-NEXT:    jr nz, BB94_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iy, (ix - 12)
 ; EZ80-CODE16-NEXT:  BB94_4:
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    lea de, iy
-; EZ80-CODE16-NEXT:    jr nz, BB94_6
-; EZ80-CODE16-NEXT:  ; %bb.5:
 ; EZ80-CODE16-NEXT:    ld e, c
 ; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    jr nz, BB94_6
+; EZ80-CODE16-NEXT:  ; %bb.5:
+; EZ80-CODE16-NEXT:    ld de, (ix - 24)
 ; EZ80-CODE16-NEXT:  BB94_6:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    lea bc, iy
+; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld h, b
 ; EZ80-CODE16-NEXT:    jr nz, BB94_8
 ; EZ80-CODE16-NEXT:  ; %bb.7:
-; EZ80-CODE16-NEXT:    ld bc, (ix - 8)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 22)
 ; EZ80-CODE16-NEXT:  BB94_8:
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push bc
 ; EZ80-CODE16-NEXT:    ld hl, 32
-; EZ80-CODE16-NEXT:    lea de, iy
-; EZ80-CODE16-NEXT:    lea bc, iy
+; EZ80-CODE16-NEXT:    ld e, c
+; EZ80-CODE16-NEXT:    ld d, b
 ; EZ80-CODE16-NEXT:    call __llsub
-; EZ80-CODE16-NEXT:    ld (ix - 8), hl
+; EZ80-CODE16-NEXT:    ld (ix - 10), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, 32
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
-; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
-; EZ80-CODE16-NEXT:    ld de, (ix - 14)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
-; EZ80-CODE16-NEXT:    call __llshl
-; EZ80-CODE16-NEXT:    ld (ix - 12), hl
-; EZ80-CODE16-NEXT:    ld (ix - 14), de
-; EZ80-CODE16-NEXT:    ld (ix - 16), bc
-; EZ80-CODE16-NEXT:    ld (ix - 20), iy
-; EZ80-CODE16-NEXT:    ld hl, 4
-; EZ80-CODE16-NEXT:    add hl, sp
-; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
 ; EZ80-CODE16-NEXT:    call __llshl
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld (ix - 4), de
 ; EZ80-CODE16-NEXT:    ld (ix - 6), bc
-; EZ80-CODE16-NEXT:    ld (ix - 10), iy
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld bc, 0
 ; EZ80-CODE16-NEXT:    push bc
@@ -29469,23 +29497,23 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld e, c
 ; EZ80-CODE16-NEXT:    ld d, b
 ; EZ80-CODE16-NEXT:    call __llshl
-; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld hl, 1
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
 ; EZ80-CODE16-NEXT:    call __llshru
-; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    push bc
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix + 18)
 ; EZ80-CODE16-NEXT:    push hl
@@ -29493,16 +29521,16 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix + 14)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 16)
 ; EZ80-CODE16-NEXT:    call __lladd
-; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    push bc
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
@@ -29512,25 +29540,40 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __llshru
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), de
+; EZ80-CODE16-NEXT:    ld (ix - 6), bc
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, 32
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
-; EZ80-CODE16-NEXT:    ld de, (ix - 14)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 14)
+; EZ80-CODE16-NEXT:    ld de, (ix - 16)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
+; EZ80-CODE16-NEXT:    call __llshl
+; EZ80-CODE16-NEXT:    ld (ix - 10), hl
+; EZ80-CODE16-NEXT:    ld hl, 4
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    call __lladd
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
@@ -29546,7 +29589,7 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    lea hl, ix - 22
+; EZ80-NEXT:    lea hl, ix - 31
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ld de, (ix + 15)
@@ -29559,9 +29602,9 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __lldivu
-; EZ80-NEXT:    ld (ix - 10), hl
-; EZ80-NEXT:    ld (ix - 13), de
-; EZ80-NEXT:    ld (ix - 16), bc
+; EZ80-NEXT:    ld (ix - 16), hl
+; EZ80-NEXT:    ld (ix - 19), de
+; EZ80-NEXT:    ld (ix - 22), bc
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
@@ -29575,81 +29618,78 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llremu
-; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld (ix - 7), de
+; EZ80-NEXT:    ld (ix - 10), bc
+; EZ80-NEXT:    ld iy, 9
+; EZ80-NEXT:    add iy, sp
+; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    call __llctlz
+; EZ80-NEXT:    ld e, 0
+; EZ80-NEXT:    ld (ix - 1), e
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, e
+; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
+; EZ80-NEXT:    ld iy, 0
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
 ; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    ld (ix - 4), iy
+; EZ80-NEXT:    call __lladd
+; EZ80-NEXT:    ld (ix - 31), hl
+; EZ80-NEXT:    ld (ix - 28), de
+; EZ80-NEXT:    ld (ix - 25), bc
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    or a, a
-; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, 256
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix - 4)
+; EZ80-NEXT:    ld de, (ix - 7)
+; EZ80-NEXT:    ld bc, (ix - 10)
 ; EZ80-NEXT:    call __llcmpu
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ex (sp), hl
-; EZ80-NEXT:    ld (ix - 7), l
+; EZ80-NEXT:    ld (ix - 13), l
 ; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld l, (ix - 7)
+; EZ80-NEXT:    ld l, (ix - 13)
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
 ; EZ80-NEXT:    ccf
 ; EZ80-NEXT:    ; kill: def $a killed $a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    inc iyl
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
-; EZ80-NEXT:    call __llctlz
-; EZ80-NEXT:    ld e, 0
-; EZ80-NEXT:    ld (ix - 1), e
-; EZ80-NEXT:    ld hl, (ix - 3)
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, a
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld de, 0
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    ld c, iyl
-; EZ80-NEXT:    ld b, iyh
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    lea de, iy
-; EZ80-NEXT:    call __lladd
-; EZ80-NEXT:    ld iy, 9
-; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    inc a
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    jr nz, BB94_2
 ; EZ80-NEXT:  ; %bb.1:
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld iy, (ix - 31)
 ; EZ80-NEXT:  BB94_2:
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    ld hl, 0
 ; EZ80-NEXT:    jr nz, BB94_4
 ; EZ80-NEXT:  ; %bb.3:
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld hl, (ix - 28)
 ; EZ80-NEXT:  BB94_4:
 ; EZ80-NEXT:    ld.sis de, 0
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    ; kill: def $de killed $de def $ude
-; EZ80-NEXT:    jr nz, BB94_6
+; EZ80-NEXT:    jp nz, BB94_6
 ; EZ80-NEXT:  ; %bb.5:
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld d, b
+; EZ80-NEXT:    ld de, (ix - 25)
+; EZ80-NEXT:    ; kill: def $de killed $de def $ude
 ; EZ80-NEXT:  BB94_6:
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
@@ -29658,30 +29698,20 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    ld.sis bc, 0
 ; EZ80-NEXT:    call __llsub
-; EZ80-NEXT:    ld (ix - 7), hl
+; EZ80-NEXT:    ld (ix - 13), hl
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, 32
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 10)
-; EZ80-NEXT:    ld de, (ix - 13)
-; EZ80-NEXT:    ld bc, (ix - 16)
-; EZ80-NEXT:    call __llshl
-; EZ80-NEXT:    ld (ix - 10), hl
-; EZ80-NEXT:    ld (ix - 13), de
-; EZ80-NEXT:    ld (ix - 16), bc
-; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    ld de, (ix - 7)
+; EZ80-NEXT:    ld bc, (ix - 10)
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ld (ix - 4), hl
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
+; EZ80-NEXT:    ld (ix - 7), de
+; EZ80-NEXT:    ld (ix - 10), bc
 ; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    ld hl, (ix - 7)
+; EZ80-NEXT:    ld hl, (ix - 13)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, 1
 ; EZ80-NEXT:    ld de, 0
@@ -29709,23 +29739,33 @@ define i64 @udiv.fix.i64.32(i64, i64) {
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    ld de, (ix - 7)
+; EZ80-NEXT:    ld bc, (ix - 10)
 ; EZ80-NEXT:    call __lldivu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
-; EZ80-NEXT:    ld iy, (ix - 7)
+; EZ80-NEXT:    ld iy, (ix - 13)
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshru
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld (ix - 7), de
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    push bc
-; EZ80-NEXT:    push de
+; EZ80-NEXT:    ld (ix - 10), bc
+; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    ld hl, 32
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 10)
-; EZ80-NEXT:    ld de, (ix - 13)
-; EZ80-NEXT:    ld bc, (ix - 16)
+; EZ80-NEXT:    ld hl, (ix - 16)
+; EZ80-NEXT:    ld de, (ix - 19)
+; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    call __llshl
+; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld iy, (ix - 10)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 7)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 4)
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __lladd
 ; EZ80-NEXT:    ld sp, ix
 ; EZ80-NEXT:    pop ix
diff --git a/llvm/test/CodeGen/Z80/intrinsics24.ll b/llvm/test/CodeGen/Z80/intrinsics24.ll
index fef7def46fae7..911c23305bdf6 100644
--- a/llvm/test/CodeGen/Z80/intrinsics24.ll
+++ b/llvm/test/CodeGen/Z80/intrinsics24.ll
@@ -264,41 +264,29 @@ declare i24 @llvm.cttz.i24(i24)
 define i24 @cttz.i24(i24) {
 ; EZ80-LABEL: cttz.i24:
 ; EZ80:       ; %bb.0:
-; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld ix, 0
-; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop de
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    ld iy, 0
+; EZ80-NEXT:    add iy, sp
+; EZ80-NEXT:    ld bc, (iy + 3)
+; EZ80-NEXT:    push bc
+; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    add hl, bc
 ; EZ80-NEXT:    or a, a
-; EZ80-NEXT:    sbc hl, de
-; EZ80-NEXT:    jp nz, BB12_2
+; EZ80-NEXT:    sbc hl, bc
+; EZ80-NEXT:    jr nz, BB12_2
 ; EZ80-NEXT:  ; %bb.1:
 ; EZ80-NEXT:    ld hl, 24
-; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ret
 ; EZ80-NEXT:  BB12_2: ; %cond.false
-; EZ80-NEXT:    ld de, -1
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    scf
+; EZ80-NEXT:    sbc hl, hl
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc hl, bc
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    lea hl, iy
-; EZ80-NEXT:    ld iy, (ix + 6)
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    lea bc, iy
+; EZ80-NEXT:    dec bc
 ; EZ80-NEXT:    call __iand
 ; EZ80-NEXT:    call __ipopcnt
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc hl, hl
 ; EZ80-NEXT:    ld l, a
-; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ret
   call i24 @llvm.cttz.i24(i24 %0)
   ret i24 %2
@@ -312,8 +300,10 @@ define i24 @fshl.i24(i24, i24, i24) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    ld iy, (ix + 6)
-; EZ80-NEXT:    ld hl, (ix + 12)
+; EZ80-NEXT:    ld de, (ix + 12)
 ; EZ80-NEXT:    ld bc, 23
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    call __iand
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
@@ -321,15 +311,10 @@ define i24 @fshl.i24(i24, i24, i24) {
 ; EZ80-NEXT:    ; kill: def $c killed $c killed $ubc
 ; EZ80-NEXT:    call __ishl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop de
+; EZ80-NEXT:    pop iy
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld bc, (ix + 12)
-; EZ80-NEXT:    or a, a
-; EZ80-NEXT:    sbc hl, bc
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    sbc hl, de
 ; EZ80-NEXT:    ld bc, 23
 ; EZ80-NEXT:    call __iand
 ; EZ80-NEXT:    push hl
@@ -339,7 +324,7 @@ define i24 @fshl.i24(i24, i24, i24) {
 ; EZ80-NEXT:    call __ishru
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    lea hl, iy
 ; EZ80-NEXT:    call __ior
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ret
@@ -355,8 +340,10 @@ define i24 @fshr.i24(i24, i24, i24) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    ld iy, (ix + 9)
-; EZ80-NEXT:    ld hl, (ix + 12)
+; EZ80-NEXT:    ld de, (ix + 12)
 ; EZ80-NEXT:    ld bc, 23
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    call __iand
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
@@ -364,15 +351,10 @@ define i24 @fshr.i24(i24, i24, i24) {
 ; EZ80-NEXT:    ; kill: def $c killed $c killed $ubc
 ; EZ80-NEXT:    call __ishru
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop de
+; EZ80-NEXT:    pop iy
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld bc, (ix + 12)
-; EZ80-NEXT:    or a, a
-; EZ80-NEXT:    sbc hl, bc
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    sbc hl, de
 ; EZ80-NEXT:    ld bc, 23
 ; EZ80-NEXT:    call __iand
 ; EZ80-NEXT:    push hl
@@ -382,7 +364,7 @@ define i24 @fshr.i24(i24, i24, i24) {
 ; EZ80-NEXT:    call __ishl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    lea hl, iy
 ; EZ80-NEXT:    call __ior
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ret
@@ -542,9 +524,9 @@ define i24 @ssub.sat.i24(i24, i24) {
 ; EZ80-NEXT:    ld (ix - 3), iy
 ; EZ80-NEXT:    add iy, iy
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld bc, -8388608
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld bc, -8388608
 ; EZ80-NEXT:    add iy, bc
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    ex de, hl
diff --git a/llvm/test/CodeGen/Z80/intrinsicsf.ll b/llvm/test/CodeGen/Z80/intrinsicsf.ll
index 3ef536867cfe9..04eeec3ce7e51 100644
--- a/llvm/test/CodeGen/Z80/intrinsicsf.ll
+++ b/llvm/test/CodeGen/Z80/intrinsicsf.ll
@@ -4722,16 +4722,15 @@ define double @fmuladd.f64(double, double, double) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    ld iy, (ix + 6)
-; EZ80-NEXT:    ld bc, (ix + 15)
+; EZ80-NEXT:    ld bc, (ix + 12)
+; EZ80-NEXT:    ld iy, (ix + 15)
 ; EZ80-NEXT:    ld de, (ix + 18)
 ; EZ80-NEXT:    ld hl, (ix + 21)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    push de
-; EZ80-NEXT:    push bc
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ld de, (ix + 9)
-; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __dmul
 ; EZ80-NEXT:    ld iy, 9
diff --git a/llvm/test/CodeGen/Z80/memory.ll b/llvm/test/CodeGen/Z80/memory.ll
index ec2fb7c3c8561..0afac39f0b284 100644
--- a/llvm/test/CodeGen/Z80/memory.ll
+++ b/llvm/test/CodeGen/Z80/memory.ll
@@ -984,36 +984,42 @@ define i16 @load.p3i16(i16 addrspace(3)*) {
 define i32 @load.p3i32(i32 addrspace(3)*) {
 ; Z80-LABEL: load.p3i32:
 ; Z80:       ; %bb.0:
-; Z80-NEXT:    ld iy, 0
-; Z80-NEXT:    add iy, sp
+; Z80-NEXT:    push ix
+; Z80-NEXT:    ld ix, 0
+; Z80-NEXT:    add ix, sp
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (iy + 2)
-; Z80-NEXT:    ld h, (iy + 3)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix + 4)
+; Z80-NEXT:    ld h, (ix + 5)
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop iy
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    in a, (c)
+; Z80-NEXT:    ld (ix - 1), a
 ; Z80-NEXT:    inc bc
-; Z80-NEXT:    in e, (c)
-; Z80-NEXT:    ld bc, 2
+; Z80-NEXT:    in a, (c)
+; Z80-NEXT:    ld (ix - 2), a
+; Z80-NEXT:    ld de, 2
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    add hl, bc
+; Z80-NEXT:    add hl, de
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    in d, (c)
-; Z80-NEXT:    ld bc, 3
-; Z80-NEXT:    add iy, bc
+; Z80-NEXT:    in a, (c)
+; Z80-NEXT:    inc de
+; Z80-NEXT:    add iy, de
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    in c, (c)
-; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld h, e
-; Z80-NEXT:    ld e, d
+; Z80-NEXT:    ld l, (ix - 1) ; 1-byte Folded Reload
+; Z80-NEXT:    ld h, (ix - 2) ; 1-byte Folded Reload
+; Z80-NEXT:    ld e, a
 ; Z80-NEXT:    ld d, c
+; Z80-NEXT:    ld sp, ix
+; Z80-NEXT:    pop ix
 ; Z80-NEXT:    ret
 ;
 ; EZ80-CODE16-LABEL: load.p3i32:
@@ -1303,31 +1309,39 @@ define i16 @load.p3i16.1() {
 define i32 @load.p3i32.1() {
 ; Z80-LABEL: load.p3i32.1:
 ; Z80:       ; %bb.0:
+; Z80-NEXT:    push ix
+; Z80-NEXT:    ld ix, 0
+; Z80-NEXT:    add ix, sp
+; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld iyl, 1
 ; Z80-NEXT:    ld iyh, 0
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    in a, (c)
+; Z80-NEXT:    ld (ix - 1), a
 ; Z80-NEXT:    inc bc
-; Z80-NEXT:    in e, (c)
-; Z80-NEXT:    ld bc, 2
+; Z80-NEXT:    in a, (c)
+; Z80-NEXT:    ld (ix - 2), a
+; Z80-NEXT:    ld de, 2
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    add hl, bc
+; Z80-NEXT:    add hl, de
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    in d, (c)
-; Z80-NEXT:    ld bc, 3
-; Z80-NEXT:    add iy, bc
+; Z80-NEXT:    in a, (c)
+; Z80-NEXT:    inc de
+; Z80-NEXT:    add iy, de
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    in c, (c)
-; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld h, e
-; Z80-NEXT:    ld e, d
+; Z80-NEXT:    ld l, (ix - 1) ; 1-byte Folded Reload
+; Z80-NEXT:    ld h, (ix - 2) ; 1-byte Folded Reload
+; Z80-NEXT:    ld e, a
 ; Z80-NEXT:    ld d, c
+; Z80-NEXT:    ld sp, ix
+; Z80-NEXT:    pop ix
 ; Z80-NEXT:    ret
 ;
 ; EZ80-CODE16-LABEL: load.p3i32.1:
@@ -2735,8 +2749,8 @@ define void @store.p3i32(i32, i32 addrspace(3)*) {
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
 ; Z80-NEXT:    dec sp
-; Z80-NEXT:    ld e, (ix + 4)
-; Z80-NEXT:    ld d, (ix + 5)
+; Z80-NEXT:    ld l, (ix + 4)
+; Z80-NEXT:    ld h, (ix + 5)
 ; Z80-NEXT:    ld c, (ix + 6)
 ; Z80-NEXT:    ld b, (ix + 7)
 ; Z80-NEXT:    push hl
@@ -2744,15 +2758,15 @@ define void @store.p3i32(i32, i32 addrspace(3)*) {
 ; Z80-NEXT:    ld h, (ix + 9)
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop iy
-; Z80-NEXT:    ld a, e
-; Z80-NEXT:    ; kill: def $d killed $d killed $de
+; Z80-NEXT:    ld a, l
+; Z80-NEXT:    ld l, h
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld (ix - 1), b ; 1-byte Folded Spill
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    out (c), a
 ; Z80-NEXT:    inc bc
-; Z80-NEXT:    out (c), d
+; Z80-NEXT:    out (c), l
 ; Z80-NEXT:    ld bc, 2
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
@@ -2827,35 +2841,34 @@ define void @store.p3i64(i64, i64 addrspace(3)*) {
 ; Z80-NEXT:    push ix
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    ld hl, -5
-; Z80-NEXT:    add hl, sp
-; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld e, (ix + 4)
 ; Z80-NEXT:    ld d, (ix + 5)
 ; Z80-NEXT:    ld c, (ix + 6)
 ; Z80-NEXT:    ld b, (ix + 7)
-; Z80-NEXT:    ld l, (ix + 8)
-; Z80-NEXT:    ld h, (ix + 9)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 12)
 ; Z80-NEXT:    ld h, (ix + 13)
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop iy
 ; Z80-NEXT:    ld a, e
-; Z80-NEXT:    ld e, d
-; Z80-NEXT:    ld d, c
-; Z80-NEXT:    ld (ix - 5), b ; 1-byte Folded Spill
-; Z80-NEXT:    ld (ix - 4), l ; 1-byte Folded Spill
-; Z80-NEXT:    ld (ix - 3), h ; 1-byte Folded Spill
-; Z80-NEXT:    ld l, (ix + 10)
-; Z80-NEXT:    ld h, (ix + 11)
-; Z80-NEXT:    ld (ix - 2), l ; 1-byte Folded Spill
-; Z80-NEXT:    ld (ix - 1), h ; 1-byte Folded Spill
+; Z80-NEXT:    ld l, d
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
+; Z80-NEXT:    ld c, (ix + 8)
+; Z80-NEXT:    ld b, (ix + 9)
+; Z80-NEXT:    ld (ix - 4), c ; 1-byte Folded Spill
+; Z80-NEXT:    ld (ix - 3), b ; 1-byte Folded Spill
+; Z80-NEXT:    ld c, (ix + 10)
+; Z80-NEXT:    ld b, (ix + 11)
+; Z80-NEXT:    ld (ix - 2), c ; 1-byte Folded Spill
+; Z80-NEXT:    ld (ix - 1), b ; 1-byte Folded Spill
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    out (c), a
 ; Z80-NEXT:    inc bc
-; Z80-NEXT:    out (c), e
+; Z80-NEXT:    out (c), l
 ; Z80-NEXT:    ld bc, 2
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
@@ -2864,28 +2877,27 @@ define void @store.p3i64(i64, i64 addrspace(3)*) {
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    out (c), d
-; Z80-NEXT:    ld de, 3
+; Z80-NEXT:    out (c), e
+; Z80-NEXT:    ld bc, 3
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    add hl, de
+; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    ld a, (ix - 5)
-; Z80-NEXT:    out (c), a
-; Z80-NEXT:    inc de
+; Z80-NEXT:    out (c), d
+; Z80-NEXT:    ld bc, 4
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    add hl, de
+; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
 ; Z80-NEXT:    ld a, (ix - 4)
 ; Z80-NEXT:    out (c), a
-; Z80-NEXT:    inc de
+; Z80-NEXT:    ld de, 5
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
@@ -3090,25 +3102,23 @@ define void @store.p3i16.1(i16) {
 define void @store.p3i32.1(i32) {
 ; Z80-LABEL: store.p3i32.1:
 ; Z80:       ; %bb.0:
-; Z80-NEXT:    push ix
-; Z80-NEXT:    ld ix, 0
-; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    dec sp
-; Z80-NEXT:    ld e, (ix + 4)
-; Z80-NEXT:    ld d, (ix + 5)
-; Z80-NEXT:    ld c, (ix + 6)
-; Z80-NEXT:    ld b, (ix + 7)
+; Z80-NEXT:    ld iy, 0
+; Z80-NEXT:    add iy, sp
+; Z80-NEXT:    ld l, (iy + 2)
+; Z80-NEXT:    ld h, (iy + 3)
+; Z80-NEXT:    ld c, (iy + 4)
+; Z80-NEXT:    ld b, (iy + 5)
 ; Z80-NEXT:    ld iyl, 1
 ; Z80-NEXT:    ld iyh, 0
-; Z80-NEXT:    ld a, e
-; Z80-NEXT:    ; kill: def $d killed $d killed $de
-; Z80-NEXT:    ld e, c
-; Z80-NEXT:    ld (ix - 1), b ; 1-byte Folded Spill
+; Z80-NEXT:    ld e, l
+; Z80-NEXT:    ld l, h
+; Z80-NEXT:    ld d, c
+; Z80-NEXT:    ld a, b
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
-; Z80-NEXT:    out (c), a
+; Z80-NEXT:    out (c), e
 ; Z80-NEXT:    inc bc
-; Z80-NEXT:    out (c), d
+; Z80-NEXT:    out (c), l
 ; Z80-NEXT:    ld bc, 2
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
@@ -3117,15 +3127,12 @@ define void @store.p3i32.1(i32) {
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    out (c), e
+; Z80-NEXT:    out (c), d
 ; Z80-NEXT:    ld de, 3
 ; Z80-NEXT:    add iy, de
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
-; Z80-NEXT:    ld a, (ix - 1)
 ; Z80-NEXT:    out (c), a
-; Z80-NEXT:    inc sp
-; Z80-NEXT:    pop ix
 ; Z80-NEXT:    ret
 ;
 ; EZ80-CODE16-LABEL: store.p3i32.1:
@@ -3185,32 +3192,31 @@ define void @store.p3i64.1(i64) {
 ; Z80-NEXT:    push ix
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    ld hl, -5
-; Z80-NEXT:    add hl, sp
-; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld e, (ix + 4)
 ; Z80-NEXT:    ld d, (ix + 5)
 ; Z80-NEXT:    ld c, (ix + 6)
 ; Z80-NEXT:    ld b, (ix + 7)
-; Z80-NEXT:    ld l, (ix + 8)
-; Z80-NEXT:    ld h, (ix + 9)
 ; Z80-NEXT:    ld iyl, 1
 ; Z80-NEXT:    ld iyh, 0
 ; Z80-NEXT:    ld a, e
-; Z80-NEXT:    ld e, d
-; Z80-NEXT:    ld d, c
-; Z80-NEXT:    ld (ix - 5), b ; 1-byte Folded Spill
-; Z80-NEXT:    ld (ix - 4), l ; 1-byte Folded Spill
-; Z80-NEXT:    ld (ix - 3), h ; 1-byte Folded Spill
-; Z80-NEXT:    ld l, (ix + 10)
-; Z80-NEXT:    ld h, (ix + 11)
-; Z80-NEXT:    ld (ix - 2), l ; 1-byte Folded Spill
-; Z80-NEXT:    ld (ix - 1), h ; 1-byte Folded Spill
+; Z80-NEXT:    ld l, d
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
+; Z80-NEXT:    ld c, (ix + 8)
+; Z80-NEXT:    ld b, (ix + 9)
+; Z80-NEXT:    ld (ix - 4), c ; 1-byte Folded Spill
+; Z80-NEXT:    ld (ix - 3), b ; 1-byte Folded Spill
+; Z80-NEXT:    ld c, (ix + 10)
+; Z80-NEXT:    ld b, (ix + 11)
+; Z80-NEXT:    ld (ix - 2), c ; 1-byte Folded Spill
+; Z80-NEXT:    ld (ix - 1), b ; 1-byte Folded Spill
 ; Z80-NEXT:    ld c, iyl
 ; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    out (c), a
 ; Z80-NEXT:    inc bc
-; Z80-NEXT:    out (c), e
+; Z80-NEXT:    out (c), l
 ; Z80-NEXT:    ld bc, 2
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
@@ -3219,28 +3225,27 @@ define void @store.p3i64.1(i64) {
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    out (c), d
-; Z80-NEXT:    ld de, 3
+; Z80-NEXT:    out (c), e
+; Z80-NEXT:    ld bc, 3
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    add hl, de
+; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
-; Z80-NEXT:    ld a, (ix - 5)
-; Z80-NEXT:    out (c), a
-; Z80-NEXT:    inc de
+; Z80-NEXT:    out (c), d
+; Z80-NEXT:    ld bc, 4
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    add hl, de
+; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld b, h
 ; Z80-NEXT:    ld a, (ix - 4)
 ; Z80-NEXT:    out (c), a
-; Z80-NEXT:    inc de
+; Z80-NEXT:    ld de, 5
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
diff --git a/llvm/test/CodeGen/Z80/operations.ll b/llvm/test/CodeGen/Z80/operations.ll
index e83f9d0d191f8..c1e28ab487ba2 100644
--- a/llvm/test/CodeGen/Z80/operations.ll
+++ b/llvm/test/CodeGen/Z80/operations.ll
@@ -1312,6 +1312,7 @@ define i16 @add.i16(i16, i16) {
 ; EZ80-NEXT:    ld hl, (iy + 3)
 ; EZ80-NEXT:    ld de, (iy + 6)
 ; EZ80-NEXT:    add.sis hl, de
+; EZ80-NEXT:    ; kill: def $hl killed $hl killed $uhl
 ; EZ80-NEXT:    ret
   add i16 %0, %1
   ret i16 %3
@@ -1575,14 +1576,7 @@ define i16 @sub.i16(i16, i16) {
 ; Z80-NEXT:    ld h, (iy + 3)
 ; Z80-NEXT:    ld e, (iy + 4)
 ; Z80-NEXT:    ld d, (iy + 5)
-; Z80-NEXT:    or a, a
 ; Z80-NEXT:    sbc hl, de
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
-; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ret
 ;
 ; EZ80-CODE16-LABEL: sub.i16:
@@ -1591,13 +1585,7 @@ define i16 @sub.i16(i16, i16) {
 ; EZ80-CODE16-NEXT:    add iy, sp
 ; EZ80-CODE16-NEXT:    ld hl, (iy + 2)
 ; EZ80-CODE16-NEXT:    ld de, (iy + 4)
-; EZ80-CODE16-NEXT:    or a, a
 ; EZ80-CODE16-NEXT:    sbc hl, de
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    lea hl, iy
 ; EZ80-CODE16-NEXT:    ret
 ;
 ; EZ80-LABEL: sub.i16:
@@ -1606,14 +1594,8 @@ define i16 @sub.i16(i16, i16) {
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld hl, (iy + 3)
 ; EZ80-NEXT:    ld de, (iy + 6)
-; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    ; kill: def $hl killed $hl killed $uhl
 ; EZ80-NEXT:    sbc.sis hl, de
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld iyl, e
-; EZ80-NEXT:    ld iyh, d
-; EZ80-NEXT:    ld e, iyl
-; EZ80-NEXT:    ld d, iyh
-; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ret
   sub i16 %0, %1
   ret i16 %3
diff --git a/llvm/test/CodeGen/Z80/operations24.ll b/llvm/test/CodeGen/Z80/operations24.ll
index 1801b01a318d5..07c9067f587b6 100644
--- a/llvm/test/CodeGen/Z80/operations24.ll
+++ b/llvm/test/CodeGen/Z80/operations24.ll
@@ -11,7 +11,7 @@ define i24 @shl.i24(i24, i24) {
 ; EZ80-NEXT:    ; kill: def $c killed $c killed $ubc
 ; EZ80-NEXT:    call __ishl
 ; EZ80-NEXT:    ret
-  shl i24 %0, %1
+  %3 = shl i24 %0, %1
   ret i24 %3
 }
 define i24 @lshr.i24(i24, i24) {
@@ -24,7 +24,7 @@ define i24 @lshr.i24(i24, i24) {
 ; EZ80-NEXT:    ; kill: def $c killed $c killed $ubc
 ; EZ80-NEXT:    call __ishru
 ; EZ80-NEXT:    ret
-  lshr i24 %0, %1
+  %3 = lshr i24 %0, %1
   ret i24 %3
 }
 define i24 @ashr.i24(i24, i24) {
@@ -37,7 +37,7 @@ define i24 @ashr.i24(i24, i24) {
 ; EZ80-NEXT:    ; kill: def $c killed $c killed $ubc
 ; EZ80-NEXT:    call __ishrs
 ; EZ80-NEXT:    ret
-  ashr i24 %0, %1
+  %3 = ashr i24 %0, %1
   ret i24 %3
 }
 define i24 @and.i24(i24, i24) {
@@ -49,7 +49,7 @@ define i24 @and.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __iand
 ; EZ80-NEXT:    ret
-  and i24 %0, %1
+  %3 = and i24 %0, %1
   ret i24 %3
 }
 define i24 @or.i24(i24, i24) {
@@ -61,7 +61,7 @@ define i24 @or.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __ior
 ; EZ80-NEXT:    ret
-  or i24 %0, %1
+  %3 = or i24 %0, %1
   ret i24 %3
 }
 define i24 @xor.i24(i24, i24) {
@@ -73,7 +73,7 @@ define i24 @xor.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __ixor
 ; EZ80-NEXT:    ret
-  xor i24 %0, %1
+  %3 = xor i24 %0, %1
   ret i24 %3
 }
 define i24 @add.i24(i24, i24) {
@@ -85,7 +85,7 @@ define i24 @add.i24(i24, i24) {
 ; EZ80-NEXT:    ld de, (iy + 6)
 ; EZ80-NEXT:    add hl, de
 ; EZ80-NEXT:    ret
-  add i24 %0, %1
+  %3 = add i24 %0, %1
   ret i24 %3
 }
 define i24 @sub.i24(i24, i24) {
@@ -95,13 +95,9 @@ define i24 @sub.i24(i24, i24) {
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld hl, (iy + 3)
 ; EZ80-NEXT:    ld de, (iy + 6)
-; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    sbc hl, de
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    lea hl, iy
 ; EZ80-NEXT:    ret
-  sub i24 %0, %1
+  %3 = sub i24 %0, %1
   ret i24 %3
 }
 define i24 @mul.i24(i24, i24) {
@@ -113,7 +109,7 @@ define i24 @mul.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __imulu
 ; EZ80-NEXT:    ret
-  mul i24 %0, %1
+  %3 = mul i24 %0, %1
   ret i24 %3
 }
 define i24 @udiv.i24(i24, i24) {
@@ -125,7 +121,7 @@ define i24 @udiv.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __idivu
 ; EZ80-NEXT:    ret
-  udiv i24 %0, %1
+  %3 = udiv i24 %0, %1
   ret i24 %3
 }
 define i24 @sdiv.i24(i24, i24) {
@@ -137,7 +133,7 @@ define i24 @sdiv.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __idivs
 ; EZ80-NEXT:    ret
-  sdiv i24 %0, %1
+  %3 = sdiv i24 %0, %1
   ret i24 %3
 }
 define i24 @urem.i24(i24, i24) {
@@ -149,7 +145,7 @@ define i24 @urem.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __iremu
 ; EZ80-NEXT:    ret
-  urem i24 %0, %1
+  %3 = urem i24 %0, %1
   ret i24 %3
 }
 define i24 @srem.i24(i24, i24) {
@@ -161,6 +157,6 @@ define i24 @srem.i24(i24, i24) {
 ; EZ80-NEXT:    ld bc, (iy + 6)
 ; EZ80-NEXT:    call __irems
 ; EZ80-NEXT:    ret
-  srem i24 %0, %1
+  %3 = srem i24 %0, %1
   ret i24 %3
 }
diff --git a/llvm/test/CodeGen/Z80/saturation.ll b/llvm/test/CodeGen/Z80/saturation.ll
index 89cd46fcb1d12..b19025346541d 100644
--- a/llvm/test/CodeGen/Z80/saturation.ll
+++ b/llvm/test/CodeGen/Z80/saturation.ll
@@ -555,10 +555,10 @@ define i64 @sadd.sat.i64(i64, i64) {
 ; EZ80-NEXT:    lea hl, ix - 9
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    ld iy, (ix + 6)
-; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ld de, (ix + 15)
 ; EZ80-NEXT:    ld bc, (ix + 18)
 ; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    adc hl, bc
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop de
@@ -577,11 +577,11 @@ define i64 @sadd.sat.i64(i64, i64) {
 ; EZ80-NEXT:  BB3_3:
 ; EZ80-NEXT:    ld hl, 63
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld (ix - 9), iy
 ; EZ80-NEXT:    lea hl, iy
 ; EZ80-NEXT:    ld (ix - 6), de
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    call __llshrs
-; EZ80-NEXT:    ld (ix - 9), iy
 ; EZ80-NEXT:    pop iy
 ; EZ80-NEXT:    ld iy, -32768
 ; EZ80-NEXT:    push iy
@@ -1116,11 +1116,11 @@ define i16 @ssub.sat.i16(i16, i16) {
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    add iy, iy
 ; Z80-NEXT:    sbc hl, hl
-; Z80-NEXT:    ld bc, -32768
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld iyl, e
 ; Z80-NEXT:    ld iyh, d
 ; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    ld bc, -32768
 ; Z80-NEXT:    add iy, bc
 ; Z80-NEXT:    or a, a
 ; Z80-NEXT:    ex de, hl
@@ -1161,11 +1161,11 @@ define i16 @ssub.sat.i16(i16, i16) {
 ; EZ80-CODE16-NEXT:    ld (ix - 2), iy
 ; EZ80-CODE16-NEXT:    add iy, iy
 ; EZ80-CODE16-NEXT:    sbc hl, hl
-; EZ80-CODE16-NEXT:    ld bc, -32768
 ; EZ80-CODE16-NEXT:    ex de, hl
 ; EZ80-CODE16-NEXT:    ld iyl, e
 ; EZ80-CODE16-NEXT:    ld iyh, d
 ; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld bc, -32768
 ; EZ80-CODE16-NEXT:    add iy, bc
 ; EZ80-CODE16-NEXT:    or a, a
 ; EZ80-CODE16-NEXT:    ex de, hl
@@ -1198,11 +1198,11 @@ define i16 @ssub.sat.i16(i16, i16) {
 ; EZ80-NEXT:    ld (ix - 3), iy
 ; EZ80-NEXT:    add.sis iy, iy
 ; EZ80-NEXT:    sbc.sis hl, hl
-; EZ80-NEXT:    ld.sis bc, -32768
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld iyl, e
 ; EZ80-NEXT:    ld iyh, d
 ; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld.sis bc, -32768
 ; EZ80-NEXT:    add.sis iy, bc
 ; EZ80-NEXT:    or a, a
 ; EZ80-NEXT:    ld l, e
@@ -1639,11 +1639,11 @@ define i64 @ssub.sat.i64(i64, i64) {
 ; EZ80-NEXT:  BB11_3:
 ; EZ80-NEXT:    ld hl, 63
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld (ix - 9), iy
 ; EZ80-NEXT:    lea hl, iy
 ; EZ80-NEXT:    ld (ix - 6), de
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    call __llshrs
-; EZ80-NEXT:    ld (ix - 9), iy
 ; EZ80-NEXT:    pop iy
 ; EZ80-NEXT:    ld iy, -32768
 ; EZ80-NEXT:    push iy
@@ -4241,25 +4241,27 @@ define i8 @smul.fix.sat.i8.7(i8, i8) {
 ; Z80:       ; %bb.0:
 ; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld c, (iy + 2)
-; Z80-NEXT:    ld d, (iy + 4)
+; Z80-NEXT:    ld d, (iy + 2)
+; Z80-NEXT:    ld l, (iy + 4)
 ; Z80-NEXT:    ld e, 7
-; Z80-NEXT:    ld a, c
+; Z80-NEXT:    ld a, l
 ; Z80-NEXT:    rlc a
 ; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld h, a
-; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld b, a
+; Z80-NEXT:    ld c, l
 ; Z80-NEXT:    ld a, d
 ; Z80-NEXT:    rlc a
 ; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld b, a
-; Z80-NEXT:    ld c, d
+; Z80-NEXT:    ld h, a
+; Z80-NEXT:    ld l, d
 ; Z80-NEXT:    call __smulu
 ; Z80-NEXT:    ld c, e
 ; Z80-NEXT:    call __sshrs
 ; Z80-NEXT:    ld e, l
 ; Z80-NEXT:    ld d, h
 ; Z80-NEXT:    ld bc, -32768
+; Z80-NEXT:    ld iyl, c
+; Z80-NEXT:    ld iyh, b
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld bc, 32641
 ; Z80-NEXT:    or a, a
@@ -4270,7 +4272,8 @@ define i8 @smul.fix.sat.i8.7(i8, i8) {
 ; Z80-NEXT:  BB32_2:
 ; Z80-NEXT:    ld l, e
 ; Z80-NEXT:    ld h, d
-; Z80-NEXT:    ld bc, -32768
+; Z80-NEXT:    ld c, iyl
+; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld bc, -32641
 ; Z80-NEXT:    or a, a
@@ -4286,25 +4289,27 @@ define i8 @smul.fix.sat.i8.7(i8, i8) {
 ; EZ80-CODE16:       ; %bb.0:
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld c, (iy + 2)
-; EZ80-CODE16-NEXT:    ld d, (iy + 4)
+; EZ80-CODE16-NEXT:    ld d, (iy + 2)
+; EZ80-CODE16-NEXT:    ld l, (iy + 4)
 ; EZ80-CODE16-NEXT:    ld e, 7
-; EZ80-CODE16-NEXT:    ld a, c
+; EZ80-CODE16-NEXT:    ld a, l
 ; EZ80-CODE16-NEXT:    rlc a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld h, a
-; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld b, a
+; EZ80-CODE16-NEXT:    ld c, l
 ; EZ80-CODE16-NEXT:    ld a, d
 ; EZ80-CODE16-NEXT:    rlc a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld b, a
-; EZ80-CODE16-NEXT:    ld c, d
+; EZ80-CODE16-NEXT:    ld h, a
+; EZ80-CODE16-NEXT:    ld l, d
 ; EZ80-CODE16-NEXT:    call __smulu
 ; EZ80-CODE16-NEXT:    ld c, e
 ; EZ80-CODE16-NEXT:    call __sshrs
 ; EZ80-CODE16-NEXT:    ld e, l
 ; EZ80-CODE16-NEXT:    ld d, h
 ; EZ80-CODE16-NEXT:    ld bc, -32768
+; EZ80-CODE16-NEXT:    ld iyl, c
+; EZ80-CODE16-NEXT:    ld iyh, b
 ; EZ80-CODE16-NEXT:    add hl, bc
 ; EZ80-CODE16-NEXT:    ld bc, 32641
 ; EZ80-CODE16-NEXT:    or a, a
@@ -4315,7 +4320,7 @@ define i8 @smul.fix.sat.i8.7(i8, i8) {
 ; EZ80-CODE16-NEXT:  BB32_2:
 ; EZ80-CODE16-NEXT:    ld l, e
 ; EZ80-CODE16-NEXT:    ld h, d
-; EZ80-CODE16-NEXT:    ld bc, -32768
+; EZ80-CODE16-NEXT:    lea bc, iy
 ; EZ80-CODE16-NEXT:    add hl, bc
 ; EZ80-CODE16-NEXT:    ld bc, -32641
 ; EZ80-CODE16-NEXT:    or a, a
@@ -4331,25 +4336,27 @@ define i8 @smul.fix.sat.i8.7(i8, i8) {
 ; EZ80:       ; %bb.0:
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld c, (iy + 3)
-; EZ80-NEXT:    ld d, (iy + 6)
+; EZ80-NEXT:    ld d, (iy + 3)
+; EZ80-NEXT:    ld l, (iy + 6)
 ; EZ80-NEXT:    ld e, 7
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld h, a
-; EZ80-NEXT:    ld l, c
+; EZ80-NEXT:    ld b, a
+; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld b, a
-; EZ80-NEXT:    ld c, d
+; EZ80-NEXT:    ld h, a
+; EZ80-NEXT:    ld l, d
 ; EZ80-NEXT:    call __smulu
 ; EZ80-NEXT:    ld c, e
 ; EZ80-NEXT:    call __sshrs
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    ld.sis bc, -32768
+; EZ80-NEXT:    ld iyl, c
+; EZ80-NEXT:    ld iyh, b
 ; EZ80-NEXT:    add.sis hl, bc
 ; EZ80-NEXT:    ld.sis bc, 32641
 ; EZ80-NEXT:    or a, a
@@ -4360,7 +4367,8 @@ define i8 @smul.fix.sat.i8.7(i8, i8) {
 ; EZ80-NEXT:  BB32_2:
 ; EZ80-NEXT:    ld l, e
 ; EZ80-NEXT:    ld h, d
-; EZ80-NEXT:    ld.sis bc, -32768
+; EZ80-NEXT:    ld c, iyl
+; EZ80-NEXT:    ld b, iyh
 ; EZ80-NEXT:    add.sis hl, bc
 ; EZ80-NEXT:    ld.sis bc, -32641
 ; EZ80-NEXT:    or a, a
@@ -4546,26 +4554,29 @@ define i16 @smul.fix.sat.i16.7(i16, i16) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld bc, (ix + 6)
-; EZ80-NEXT:    ld iy, (ix + 9)
-; EZ80-NEXT:    ld e, b
+; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
+; EZ80-NEXT:    ld e, h
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld d, a
 ; EZ80-NEXT:    ld (ix - 2), d
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, c
+; EZ80-NEXT:    ld bc, (ix - 4)
+; EZ80-NEXT:    ld b, e
+; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld e, iyh
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld b, e
-; EZ80-NEXT:    ld c, iyl
-; EZ80-NEXT:    ld e, d
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, e
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, a
+; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
@@ -4789,35 +4800,30 @@ define i16 @smul.fix.sat.i16.15(i16, i16) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld c, h
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld iy, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
+; EZ80-NEXT:    ld e, h
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld d, c
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld hl, (ix + 9)
-; EZ80-NEXT:    ld c, h
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld d, a
+; EZ80-NEXT:    ld (ix - 1), d
+; EZ80-NEXT:    ld bc, (ix - 3)
+; EZ80-NEXT:    ld b, e
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld e, iyh
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld iyh, c
+; EZ80-NEXT:    ld l, e
 ; EZ80-NEXT:    rlc l
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    ld b, iyh
-; EZ80-NEXT:    ld hl, (ix + 9)
-; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld h, e
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, a
+; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop bc
@@ -4881,16 +4887,13 @@ define i32 @smul.fix.sat.i32.15(i32, i32) {
 ; Z80-NEXT:    ld hl, -9
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 6)
 ; Z80-NEXT:    ld h, (ix + 7)
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    pop iy
 ; Z80-NEXT:    ld e, (ix + 10)
 ; Z80-NEXT:    ld d, (ix + 11)
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
+; Z80-NEXT:    ld iyl, e
+; Z80-NEXT:    ld iyh, d
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    add iy, iy
 ; Z80-NEXT:    sbc hl, hl
@@ -5066,9 +5069,12 @@ define i32 @smul.fix.sat.i32.15(i32, i32) {
 ; EZ80-CODE16-NEXT:    add ix, sp
 ; EZ80-CODE16-NEXT:    lea hl, ix - 9
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld iy, (ix + 6)
+; EZ80-CODE16-NEXT:    ld hl, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld de, (ix + 10)
-; EZ80-CODE16-NEXT:    lea hl, iy
+; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iyl, e
+; EZ80-CODE16-NEXT:    ld iyh, d
+; EZ80-CODE16-NEXT:    ex de, hl
 ; EZ80-CODE16-NEXT:    add iy, iy
 ; EZ80-CODE16-NEXT:    sbc hl, hl
 ; EZ80-CODE16-NEXT:    ld c, l
@@ -5220,31 +5226,39 @@ define i32 @smul.fix.sat.i32.15(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 11
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld h, (ix + 15)
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 15)
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld (ix - 1), c
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld d, c
-; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld iy, (ix - 3)
+; EZ80-NEXT:    ld iyh, c
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld iyl, e
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld l, (ix + 15)
-; EZ80-NEXT:    ld iyh, iyl
-; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop de
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld hl, (ix - 4)
+; EZ80-NEXT:    ld h, l
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    push bc
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 6)
+; EZ80-NEXT:    ld bc, (ix - 4)
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
@@ -5374,16 +5388,13 @@ define i32 @smul.fix.sat.i32.31(i32, i32) {
 ; Z80-NEXT:    ld hl, -9
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 6)
 ; Z80-NEXT:    ld h, (ix + 7)
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    pop iy
 ; Z80-NEXT:    ld e, (ix + 10)
 ; Z80-NEXT:    ld d, (ix + 11)
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
+; Z80-NEXT:    ld iyl, e
+; Z80-NEXT:    ld iyh, d
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    add iy, iy
 ; Z80-NEXT:    sbc hl, hl
@@ -5559,9 +5570,12 @@ define i32 @smul.fix.sat.i32.31(i32, i32) {
 ; EZ80-CODE16-NEXT:    add ix, sp
 ; EZ80-CODE16-NEXT:    lea hl, ix - 9
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld iy, (ix + 6)
+; EZ80-CODE16-NEXT:    ld hl, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld de, (ix + 10)
-; EZ80-CODE16-NEXT:    lea hl, iy
+; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iyl, e
+; EZ80-CODE16-NEXT:    ld iyh, d
+; EZ80-CODE16-NEXT:    ex de, hl
 ; EZ80-CODE16-NEXT:    add iy, iy
 ; EZ80-CODE16-NEXT:    sbc hl, hl
 ; EZ80-CODE16-NEXT:    ld c, l
@@ -5713,31 +5727,39 @@ define i32 @smul.fix.sat.i32.31(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 11
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld h, (ix + 15)
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 15)
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    ld (ix - 1), c
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld d, c
-; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld iy, (ix - 3)
+; EZ80-NEXT:    ld iyh, c
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld iyl, e
+; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    ld l, (ix + 15)
-; EZ80-NEXT:    ld iyh, iyl
-; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop de
+; EZ80-NEXT:    ld e, (ix + 9)
+; EZ80-NEXT:    ld hl, (ix - 4)
+; EZ80-NEXT:    ld h, l
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    push bc
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 6)
+; EZ80-NEXT:    ld bc, (ix - 4)
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
@@ -10329,69 +10351,71 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld de, -210
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (ix + 9)
-; EZ80-NEXT:    ld hl, (ix + 12)
+; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    lea hl, ix
+; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    ld (hl), iy
+; EZ80-NEXT:    ld de, (ix + 12)
+; EZ80-NEXT:    ld bc, (ix + 18)
+; EZ80-NEXT:    ld hl, (ix + 21)
 ; EZ80-NEXT:    ld l, h
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -237
-; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix - 3), de
+; EZ80-NEXT:    ld de, -246
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), l
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (iy), de
+; EZ80-NEXT:    ld (iy), bc
 ; EZ80-NEXT:    ld a, (iy + 2)
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld e, a
-; EZ80-NEXT:    ld bc, -222
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
-; EZ80-NEXT:    ld (iy + 3), e
-; EZ80-NEXT:    ld hl, (iy + 1)
-; EZ80-NEXT:    lea bc, iy
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, e
+; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -275
+; EZ80-NEXT:    ld de, -234
 ; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld hl, (ix + 21)
-; EZ80-NEXT:    ld e, h
-; EZ80-NEXT:    ld bc, -243
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), e
+; EZ80-NEXT:    ld (iy + 3), c
+; EZ80-NEXT:    ld hl, (iy + 1)
+; EZ80-NEXT:    ld h, c
+; EZ80-NEXT:    ld l, c
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -225
+; EZ80-NEXT:    ld bc, -268
 ; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld (ix), iy
+; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld hl, (ix + 18)
-; EZ80-NEXT:    ld (iy + 4), hl
+; EZ80-NEXT:    ld l, d
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -240
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), l
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    ld de, (ix + 9)
+; EZ80-NEXT:    ld (iy + 4), de
 ; EZ80-NEXT:    ld a, (iy + 6)
-; EZ80-NEXT:    ld a, e
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld c, a
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -234
-; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    ld de, -222
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld a, e
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc hl, hl
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -268
+; EZ80-NEXT:    ld de, -275
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -240
+; EZ80-NEXT:    ld bc, -243
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), a
 ; EZ80-NEXT:    pop ix
@@ -10403,14 +10427,14 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (iy + 10), de
-; EZ80-NEXT:    ld.sis bc, (iy + 11)
-; EZ80-NEXT:    ld l, 31
-; EZ80-NEXT:    ld de, (ix + 12)
-; EZ80-NEXT:    ld a, e
-; EZ80-NEXT:    ld (iy + 13), bc
+; EZ80-NEXT:    ld.sis de, (iy + 11)
+; EZ80-NEXT:    ld hl, (ix + 12)
+; EZ80-NEXT:    ld a, l
+; EZ80-NEXT:    ld (iy + 13), de
 ; EZ80-NEXT:    ld (iy + 15), a
 ; EZ80-NEXT:    ld bc, (iy + 13)
-; EZ80-NEXT:    ld a, d
+; EZ80-NEXT:    ld a, h
+; EZ80-NEXT:    ld l, 31
 ; EZ80-NEXT:    call __lshrs
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -271
@@ -10423,21 +10447,20 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), a ; 1-byte Folded Spill
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld de, (ix + 18)
-; EZ80-NEXT:    ex de, hl
-; EZ80-NEXT:    ld a, l
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -231
-; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, -231
+; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), a
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (iy + 16), hl
-; EZ80-NEXT:    ld.sis bc, (iy + 17)
+; EZ80-NEXT:    ld (iy + 16), de
+; EZ80-NEXT:    ld.sis hl, (iy + 17)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -284
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    ld bc, -284
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (iy + 19), hl
+; EZ80-NEXT:    ld (iy + 19), de
 ; EZ80-NEXT:    ld.sis de, (iy + 20)
 ; EZ80-NEXT:    ld hl, (ix + 21)
 ; EZ80-NEXT:    ld a, l
@@ -10463,11 +10486,12 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld iy, (ix + 18)
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -258
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $e killed $e def $ude
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -261
@@ -10475,11 +10499,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, (ix + 9)
-; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld iy, (ix)
-; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld iy, (iy)
 ; EZ80-NEXT:    ld (iy + 25), hl
 ; EZ80-NEXT:    ld.sis hl, (iy + 26)
 ; EZ80-NEXT:    ld (iy + 28), hl
@@ -10487,7 +10510,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (iy + 30), l
 ; EZ80-NEXT:    ld hl, (iy + 28)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -237
+; EZ80-NEXT:    ld de, -240
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
@@ -10518,13 +10541,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
-; EZ80-NEXT:    ld de, -240
+; EZ80-NEXT:    ld de, -243
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld d, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld e, d
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -243
+; EZ80-NEXT:    ld bc, -246
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
@@ -10546,43 +10569,43 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld c, d
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -246
+; EZ80-NEXT:    ld de, -237
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld (ix - 3), bc
-; EZ80-NEXT:    ld bc, -216
-; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    ld de, -216
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld (iy + 38), h
 ; EZ80-NEXT:    ld de, (iy + 36)
 ; EZ80-NEXT:    ld d, h
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -231
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld e, (hl) ; 1-byte Folded Reload
-; EZ80-NEXT:    ld bc, -249
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), de
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -216
+; EZ80-NEXT:    ld bc, -249
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    ld hl, (ix + 15)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    push bc
-; EZ80-NEXT:    pop de
-; EZ80-NEXT:    ld c, iyl
-; EZ80-NEXT:    ld b, iyh
+; EZ80-NEXT:    ld de, -237
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
@@ -11199,13 +11222,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (iy + 53), e
 ; EZ80-NEXT:    ld bc, (iy + 51)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -237
+; EZ80-NEXT:    ld de, -240
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
-; EZ80-NEXT:    ld bc, -243
+; EZ80-NEXT:    ld bc, -246
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
@@ -11235,11 +11258,12 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld.sis (iy + 55), hl
 ; EZ80-NEXT:    ld bc, (iy + 54)
 ; EZ80-NEXT:    ld hl, (ix + 6)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
-; EZ80-NEXT:    ld de, -240
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld e, (iy) ; 1-byte Folded Reload
+; EZ80-NEXT:    ld de, -243
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -234
 ; EZ80-NEXT:    add ix, bc
@@ -11248,10 +11272,11 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -306
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -303
 ; EZ80-NEXT:    add ix, bc
@@ -11283,13 +11308,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld d, b
 ; EZ80-NEXT:    ld e, h
 ; EZ80-NEXT:    ld bc, -281
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
-; EZ80-NEXT:    ld bc, -216
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld bc, (iy)
+; EZ80-NEXT:    ld (iy), de
+; EZ80-NEXT:    ld bc, -216
+; EZ80-NEXT:    lea hl, ix
+; EZ80-NEXT:    add hl, bc
+; EZ80-NEXT:    ld bc, (hl)
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
@@ -11300,11 +11325,12 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 15)
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -252
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
@@ -11360,7 +11386,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -246
+; EZ80-NEXT:    ld de, -237
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix)
 ; EZ80-NEXT:    pop ix
@@ -12883,7 +12909,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ; kill: def $e killed $e killed $ude
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
-; EZ80-NEXT:    ld bc, -243
+; EZ80-NEXT:    ld bc, -246
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
@@ -12895,7 +12921,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -243
+; EZ80-NEXT:    ld bc, -246
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), e ; 1-byte Folded Spill
 ; EZ80-NEXT:    pop ix
@@ -12906,10 +12932,11 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    ld (iy + 75), l
 ; EZ80-NEXT:    ld hl, (iy + 73)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -234
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld iy, (iy)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -134
 ; EZ80-NEXT:    add ix, de
@@ -12926,14 +12953,14 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix)
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -237
+; EZ80-NEXT:    ld de, -240
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -237
+; EZ80-NEXT:    ld bc, -240
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
@@ -12944,7 +12971,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -240
+; EZ80-NEXT:    ld de, -243
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
@@ -12976,10 +13003,11 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix)
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld d, h
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -272
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld e, (hl) ; 1-byte Folded Reload
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld e, (ix) ; 1-byte Folded Reload
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -216
@@ -12995,11 +13023,12 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 15)
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -271
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llmulu
 ; EZ80-NEXT:    ld iy, 9
@@ -13008,7 +13037,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshru
-; EZ80-NEXT:    ld bc, -240
+; EZ80-NEXT:    ld bc, -243
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, bc
 ; EZ80-NEXT:    ld (iy), hl
@@ -13093,7 +13122,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -246
+; EZ80-NEXT:    ld de, -237
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix)
 ; EZ80-NEXT:    pop ix
@@ -13125,7 +13154,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -243
+; EZ80-NEXT:    ld de, -246
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
 ; EZ80-NEXT:    ld a, (ix) ; 1-byte Folded Reload
@@ -13133,7 +13162,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -237
+; EZ80-NEXT:    ld de, -240
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld bc, (ix)
 ; EZ80-NEXT:    pop ix
@@ -13159,7 +13188,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    call __ladd
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -240
+; EZ80-NEXT:    ld de, -243
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld bc, (ix)
 ; EZ80-NEXT:    pop ix
@@ -13186,11 +13215,12 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    lea bc, iy
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __ladd
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -228
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld bc, (iy)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -290
 ; EZ80-NEXT:    add ix, de
@@ -13202,14 +13232,15 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop iy
 ; EZ80-NEXT:    ld h, e
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    ld de, -228
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -219
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld l, c
 ; EZ80-NEXT:    ld h, b
 ; EZ80-NEXT:    push ix
@@ -13238,12 +13269,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld c, (ix - 124)
 ; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -258
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshru
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
@@ -13252,7 +13284,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    ld de, -225
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
@@ -13263,10 +13295,11 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -231
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), iy
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), iy
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld e, iyl
 ; EZ80-NEXT:    ld d, iyh
 ; EZ80-NEXT:    push ix
@@ -13283,22 +13316,25 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld.sis (ix - 122), de
 ; EZ80-NEXT:    ld de, (ix - 123)
 ; EZ80-NEXT:    ld (ix - 120), iy
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld c, (ix - 118)
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld (iy), bc
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, 33
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -213
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
 ; EZ80-NEXT:    pop iy
@@ -13306,13 +13342,14 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld de, -222
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -228
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -234
 ; EZ80-NEXT:    add ix, bc
@@ -13321,12 +13358,12 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    call __llor
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    ld de, -222
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -222
+; EZ80-NEXT:    ld de, -225
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
@@ -13356,19 +13393,20 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, bc
 ; EZ80-NEXT:    ld hl, (hl)
 ; EZ80-NEXT:    ld (ix - 114), hl
-; EZ80-NEXT:    ld bc, -225
+; EZ80-NEXT:    ld bc, -228
 ; EZ80-NEXT:    lea hl, ix
 ; EZ80-NEXT:    add hl, bc
 ; EZ80-NEXT:    ld bc, (hl)
 ; EZ80-NEXT:    ld c, (ix - 112)
 ; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -213
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshrs
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
@@ -13384,7 +13422,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    ld de, -228
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
@@ -13392,10 +13430,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld hl, -32768
 ; EZ80-NEXT:    ld de, -1
 ; EZ80-NEXT:    ld b, d
-; EZ80-NEXT:    ld (ix - 111), hl
-; EZ80-NEXT:    ld l, (ix - 109)
 ; EZ80-NEXT:    ld iyl, e
 ; EZ80-NEXT:    ld iyh, d
+; EZ80-NEXT:    ld (ix - 111), hl
+; EZ80-NEXT:    ld l, (ix - 109)
 ; EZ80-NEXT:    ld (ix - 108), hl
 ; EZ80-NEXT:    ld.sis (ix - 107), iy
 ; EZ80-NEXT:    ld hl, (ix - 108)
@@ -13412,27 +13450,31 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld iy, -1
 ; EZ80-NEXT:    ld (ix - 99), iy
 ; EZ80-NEXT:    ld c, (ix - 97)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld iy, (iy)
-; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -231
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld iy, (iy)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -234
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld iy, (iy)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -219
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (iy), bc
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llcmps
 ; EZ80-NEXT:    push af
@@ -13449,9 +13491,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -13516,7 +13559,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix)
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -225
+; EZ80-NEXT:    ld bc, -228
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld bc, (ix)
 ; EZ80-NEXT:    pop ix
@@ -13536,23 +13579,29 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
 ; EZ80-NEXT:    jr z, BB37_4
 ; EZ80-NEXT:  ; %bb.3:
 ; EZ80-NEXT:    ld de, -213
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), a ; 1-byte Folded Spill
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld (iy), a ; 1-byte Folded Spill
 ; EZ80-NEXT:  BB37_4:
 ; EZ80-NEXT:    ld hl, -32768
 ; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld de, -237
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld de, -225
 ; EZ80-NEXT:    lea hl, ix
 ; EZ80-NEXT:    add hl, de
 ; EZ80-NEXT:    ld hl, (hl)
@@ -13562,11 +13611,6 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, de
 ; EZ80-NEXT:    ld hl, (hl)
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld de, -228
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld iy, (hl)
-; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    pop hl
@@ -13585,9 +13629,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -13611,12 +13656,11 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:  ; %bb.5:
 ; EZ80-NEXT:    ld l, a
 ; EZ80-NEXT:  BB37_6:
-; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -234
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld bc, (ix)
-; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld iy, (iy)
+; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -237
 ; EZ80-NEXT:    add ix, de
@@ -13626,20 +13670,18 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 79), a
 ; EZ80-NEXT:    ld de, (ix - 81)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -213
 ; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (ix - 78), bc
-; EZ80-NEXT:    ld.sis de, (ix - 77)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -231
-; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld de, -231
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld bc, (ix)
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld (ix - 78), iy
+; EZ80-NEXT:    ld.sis de, (ix - 77)
 ; EZ80-NEXT:    ld (ix - 75), de
 ; EZ80-NEXT:    ld (ix - 73), a
 ; EZ80-NEXT:    ld de, (ix - 75)
@@ -13650,14 +13692,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    ld (ix - 72), bc
 ; EZ80-NEXT:    ld.sis de, (ix - 71)
-; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -225
-; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld bc, (ix)
-; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld a, c
 ; EZ80-NEXT:    ld (ix - 69), de
 ; EZ80-NEXT:    ld (ix - 67), a
 ; EZ80-NEXT:    ld de, (ix - 69)
@@ -13667,6 +13708,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    bit 0, l
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -222
+; EZ80-NEXT:    push af
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    pop af
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    jr z, BB37_14
 ; EZ80-NEXT:  ; %bb.7:
 ; EZ80-NEXT:    bit 0, l
@@ -13683,36 +13731,40 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:  BB37_11:
 ; EZ80-NEXT:    ld de, -1
 ; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -231
 ; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:  BB37_12:
 ; EZ80-NEXT:    bit 0, l
-; EZ80-NEXT:    ld de, -228
-; EZ80-NEXT:    lea hl, ix
+; EZ80-NEXT:    ld de, -222
+; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    push af
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add iy, de
 ; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld (hl), iy
+; EZ80-NEXT:    ld (iy), bc
 ; EZ80-NEXT:    jr nz, BB37_18
 ; EZ80-NEXT:  ; %bb.13:
 ; EZ80-NEXT:    ld de, -219
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld de, (hl)
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld bc, (iy)
 ; EZ80-NEXT:    jr BB37_19
 ; EZ80-NEXT:  BB37_14:
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    pop bc
 ; EZ80-NEXT:    bit 0, l
 ; EZ80-NEXT:    jr nz, BB37_8
 ; EZ80-NEXT:  BB37_15:
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -222
+; EZ80-NEXT:    ld (ix - 3), bc
+; EZ80-NEXT:    ld bc, -225
 ; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    bit 0, l
@@ -13720,8 +13772,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:  BB37_16:
 ; EZ80-NEXT:    ld de, -32768
 ; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -213
 ; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    bit 0, l
@@ -13729,82 +13783,86 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:  BB37_17:
 ; EZ80-NEXT:    ld de, -1
 ; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -234
 ; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    bit 0, l
-; EZ80-NEXT:    jr z, BB37_11
+; EZ80-NEXT:    jp z, BB37_11
 ; EZ80-NEXT:    jr BB37_12
 ; EZ80-NEXT:  BB37_18:
-; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld d, h
+; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:  BB37_19:
-; EZ80-NEXT:    ld bc, -213
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld (ix - 66), hl
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ld a, (ix - 64)
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld bc, -234
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld bc, (hl)
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld h, b
-; EZ80-NEXT:    ld (ix - 63), iy
-; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -219
+; EZ80-NEXT:    ld de, -234
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld (iy), hl
-; EZ80-NEXT:    ld.sis (ix - 62), hl
+; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld iyl, e
+; EZ80-NEXT:    ld iyh, d
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld (ix - 3), bc
+; EZ80-NEXT:    ld bc, -213
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    ld (ix - 66), hl
+; EZ80-NEXT:    ld l, (ix - 64)
+; EZ80-NEXT:    ld (ix - 63), hl
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld bc, -219
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), iy
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    ld.sis (ix - 62), iy
 ; EZ80-NEXT:    ld hl, (ix - 63)
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, -228
+; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (ix - 60), bc
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ld a, (ix - 58)
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    pop af
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -231
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld bc, (hl)
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld h, b
-; EZ80-NEXT:    ld (ix - 57), iy
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix - 3)
+; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld e, iyl
+; EZ80-NEXT:    ld d, iyh
+; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld (ix - 60), de
+; EZ80-NEXT:    ld e, (ix - 58)
+; EZ80-NEXT:    ld (ix - 57), de
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -243
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld.sis (ix - 56), hl
 ; EZ80-NEXT:    ld hl, (ix - 57)
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -240
 ; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld de, (ix - 3)
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (ix - 54), bc
+; EZ80-NEXT:    ld (ix - 54), iy
+; EZ80-NEXT:    push bc
+; EZ80-NEXT:    pop de
 ; EZ80-NEXT:    ld e, (ix - 52)
 ; EZ80-NEXT:    ld hl, 32767
 ; EZ80-NEXT:    ld (ix - 51), hl
 ; EZ80-NEXT:    ld c, (ix - 49)
 ; EZ80-NEXT:    ld (ix - 48), bc
 ; EZ80-NEXT:    ld bc, -216
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, bc
+; EZ80-NEXT:    ld hl, (iy)
 ; EZ80-NEXT:    ld.sis (ix - 47), hl
 ; EZ80-NEXT:    ld iy, (ix - 48)
 ; EZ80-NEXT:    ld bc, 0
@@ -13829,19 +13887,20 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -240
+; EZ80-NEXT:    ld de, -228
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -240
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llcmps
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    ld de, -228
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    pop af
@@ -13852,9 +13911,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -13947,13 +14007,14 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld de, -246
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -234
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -234
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -219
 ; EZ80-NEXT:    add ix, bc
@@ -13975,23 +14036,24 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
 ; EZ80-NEXT:    jr z, BB37_23
 ; EZ80-NEXT:  ; %bb.22:
-; EZ80-NEXT:    ld de, -225
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), a ; 1-byte Folded Spill
+; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld (iy), a ; 1-byte Folded Spill
 ; EZ80-NEXT:  BB37_23:
 ; EZ80-NEXT:    ld de, -213
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld hl, (iy)
 ; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld hl, 32767
@@ -14000,17 +14062,18 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    sbc hl, hl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld de, -228
+; EZ80-NEXT:    ld de, -222
 ; EZ80-NEXT:    lea hl, ix
 ; EZ80-NEXT:    add hl, de
 ; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -222
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
-; EZ80-NEXT:    call __llcmpu
-; EZ80-NEXT:    push af
-; EZ80-NEXT:    ex (sp), hl
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    call __llcmpu
+; EZ80-NEXT:    push af
+; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -216
 ; EZ80-NEXT:    push af
@@ -14023,9 +14086,10 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld l, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -14041,7 +14105,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ; kill: def $a killed $a
 ; EZ80-NEXT:    sbc a, a
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -225
+; EZ80-NEXT:    ld bc, -228
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    bit 0, (ix) ; 1-byte Folded Reload
 ; EZ80-NEXT:    pop ix
@@ -14069,7 +14133,7 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld c, e
 ; EZ80-NEXT:    ld b, d
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld de, -222
+; EZ80-NEXT:    ld de, -225
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix)
 ; EZ80-NEXT:    pop ix
@@ -14087,12 +14151,13 @@ define i64 @smul.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    jp nz, BB37_26
 ; EZ80-NEXT:  BB37_31:
 ; EZ80-NEXT:    ld bc, -1
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
-; EZ80-NEXT:    ld de, -222
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld de, -225
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (iy), bc
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    bit 0, e
 ; EZ80-NEXT:    jp z, BB37_27
 ; EZ80-NEXT:    jp BB37_28
@@ -14106,12 +14171,12 @@ define i8 @umul.fix.sat.i8.8(i8, i8) {
 ; Z80:       ; %bb.0:
 ; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld h, 0
-; Z80-NEXT:    ld l, (iy + 2)
-; Z80-NEXT:    ld b, h
+; Z80-NEXT:    ld b, 0
 ; Z80-NEXT:    ld c, (iy + 4)
+; Z80-NEXT:    ld h, b
+; Z80-NEXT:    ld l, (iy + 2)
 ; Z80-NEXT:    call __smulu
-; Z80-NEXT:    ld d, 0
+; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    ld e, h
 ; Z80-NEXT:    ld bc, 255
 ; Z80-NEXT:    ld l, e
@@ -14129,12 +14194,12 @@ define i8 @umul.fix.sat.i8.8(i8, i8) {
 ; EZ80-CODE16:       ; %bb.0:
 ; EZ80-CODE16-NEXT:    ld iy, 0
 ; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld h, 0
-; EZ80-CODE16-NEXT:    ld l, (iy + 2)
-; EZ80-CODE16-NEXT:    ld b, h
+; EZ80-CODE16-NEXT:    ld b, 0
 ; EZ80-CODE16-NEXT:    ld c, (iy + 4)
+; EZ80-CODE16-NEXT:    ld h, b
+; EZ80-CODE16-NEXT:    ld l, (iy + 2)
 ; EZ80-CODE16-NEXT:    call __smulu
-; EZ80-CODE16-NEXT:    ld d, 0
+; EZ80-CODE16-NEXT:    ld d, b
 ; EZ80-CODE16-NEXT:    ld e, h
 ; EZ80-CODE16-NEXT:    ld bc, 255
 ; EZ80-CODE16-NEXT:    ld l, e
@@ -14152,12 +14217,12 @@ define i8 @umul.fix.sat.i8.8(i8, i8) {
 ; EZ80:       ; %bb.0:
 ; EZ80-NEXT:    ld iy, 0
 ; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld h, 0
-; EZ80-NEXT:    ld l, (iy + 3)
-; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    ld b, 0
 ; EZ80-NEXT:    ld c, (iy + 6)
+; EZ80-NEXT:    ld h, b
+; EZ80-NEXT:    ld l, (iy + 3)
 ; EZ80-NEXT:    call __smulu
-; EZ80-NEXT:    ld d, 0
+; EZ80-NEXT:    ld d, b
 ; EZ80-NEXT:    ld e, h
 ; EZ80-NEXT:    ld.sis bc, 255
 ; EZ80-NEXT:    ld l, e
@@ -14234,25 +14299,26 @@ define i16 @umul.fix.sat.i16.8(i16, i16) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld bc, (ix + 6)
-; EZ80-NEXT:    ld de, (ix + 9)
+; EZ80-NEXT:    ld de, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ld iyl, 0
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    ld (ix - 2), a
 ; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld h, b
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld bc, (ix - 4)
+; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    ld (ix - 1), a
 ; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld b, d
-; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, d
+; EZ80-NEXT:    ld l, e
 ; EZ80-NEXT:    ld e, a
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
@@ -14338,25 +14404,26 @@ define i16 @umul.fix.sat.i16.16(i16, i16) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    dec sp
 ; EZ80-NEXT:    dec sp
-; EZ80-NEXT:    ld bc, (ix + 6)
-; EZ80-NEXT:    ld de, (ix + 9)
+; EZ80-NEXT:    ld de, (ix + 6)
+; EZ80-NEXT:    ld hl, (ix + 9)
 ; EZ80-NEXT:    ld iyl, 0
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    ld (ix - 2), a
 ; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld h, b
-; EZ80-NEXT:    ld l, c
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    ld bc, (ix - 4)
+; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    ld (ix - 1), a
 ; EZ80-NEXT:    pop af
-; EZ80-NEXT:    ld bc, (ix - 3)
-; EZ80-NEXT:    ld b, d
-; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, d
+; EZ80-NEXT:    ld l, e
 ; EZ80-NEXT:    ld e, a
 ; EZ80-NEXT:    call __lmulu
 ; EZ80-NEXT:    push hl
@@ -14509,8 +14576,8 @@ define i32 @umul.fix.sat.i32.16(i32, i32) {
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __llshru
-; EZ80-CODE16-NEXT:    ld (ix - 4), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), bc
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), bc
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
@@ -14521,18 +14588,18 @@ define i32 @umul.fix.sat.i32.16(i32, i32) {
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 4)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), l
+; EZ80-CODE16-NEXT:    ld (ix - 4), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld iy, 10
 ; EZ80-CODE16-NEXT:    add iy, sp
 ; EZ80-CODE16-NEXT:    ld sp, iy
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 2)
+; EZ80-CODE16-NEXT:    ld l, (ix - 4)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
@@ -14544,12 +14611,14 @@ define i32 @umul.fix.sat.i32.16(i32, i32) {
 ; EZ80-CODE16-NEXT:    jr nz, BB41_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
 ; EZ80-CODE16-NEXT:    ld hl, -1
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:  BB41_2:
 ; EZ80-CODE16-NEXT:    bit 0, a
 ; EZ80-CODE16-NEXT:    jr nz, BB41_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
 ; EZ80-CODE16-NEXT:    ld de, -1
 ; EZ80-CODE16-NEXT:  BB41_4:
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld sp, ix
 ; EZ80-CODE16-NEXT:    pop ix
 ; EZ80-CODE16-NEXT:    ret
@@ -14560,21 +14629,21 @@ define i32 @umul.fix.sat.i32.16(i32, i32) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld a, (ix + 15)
+; EZ80-NEXT:    ld a, (ix + 9)
 ; EZ80-NEXT:    ld iyl, a
+; EZ80-NEXT:    ld e, (ix + 15)
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
-; EZ80-NEXT:    ld de, (ix - 4)
-; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld hl, (ix - 4)
 ; EZ80-NEXT:    ld h, a
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld l, e
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
+; EZ80-NEXT:    ld (ix - 1), a
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld d, a
 ; EZ80-NEXT:    ld e, iyl
-; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 12)
@@ -14755,8 +14824,8 @@ define i32 @umul.fix.sat.i32.32(i32, i32) {
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __llshru
-; EZ80-CODE16-NEXT:    ld (ix - 4), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), bc
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), bc
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
@@ -14767,18 +14836,18 @@ define i32 @umul.fix.sat.i32.32(i32, i32) {
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 4)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), l
+; EZ80-CODE16-NEXT:    ld (ix - 4), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld iy, 10
 ; EZ80-CODE16-NEXT:    add iy, sp
 ; EZ80-CODE16-NEXT:    ld sp, iy
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 2)
+; EZ80-CODE16-NEXT:    ld l, (ix - 4)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
@@ -14790,12 +14859,14 @@ define i32 @umul.fix.sat.i32.32(i32, i32) {
 ; EZ80-CODE16-NEXT:    jr nz, BB42_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
 ; EZ80-CODE16-NEXT:    ld hl, -1
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:  BB42_2:
 ; EZ80-CODE16-NEXT:    bit 0, a
 ; EZ80-CODE16-NEXT:    jr nz, BB42_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
 ; EZ80-CODE16-NEXT:    ld de, -1
 ; EZ80-CODE16-NEXT:  BB42_4:
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld sp, ix
 ; EZ80-CODE16-NEXT:    pop ix
 ; EZ80-CODE16-NEXT:    ret
@@ -14806,21 +14877,21 @@ define i32 @umul.fix.sat.i32.32(i32, i32) {
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld l, (ix + 9)
-; EZ80-NEXT:    ld a, (ix + 15)
+; EZ80-NEXT:    ld a, (ix + 9)
 ; EZ80-NEXT:    ld iyl, a
+; EZ80-NEXT:    ld e, (ix + 15)
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
-; EZ80-NEXT:    ld de, (ix - 4)
-; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, l
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld (ix - 1), a
-; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld hl, (ix - 4)
 ; EZ80-NEXT:    ld h, a
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld l, e
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
+; EZ80-NEXT:    ld (ix - 1), a
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld d, a
 ; EZ80-NEXT:    ld e, iyl
-; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix + 12)
@@ -18914,21 +18985,24 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
 ; EZ80-NEXT:    ld de, (ix + 9)
-; EZ80-NEXT:    ld hl, (ix + 18)
-; EZ80-NEXT:    ld (iy), de
+; EZ80-NEXT:    ld bc, (ix + 18)
+; EZ80-NEXT:    ld (iy), bc
 ; EZ80-NEXT:    ld a, (iy + 2)
-; EZ80-NEXT:    ld bc, 0
-; EZ80-NEXT:    ld a, c
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -148
 ; EZ80-NEXT:    add ix, bc
 ; EZ80-NEXT:    ld (ix), a
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld (iy + 3), hl
+; EZ80-NEXT:    ld (iy + 3), de
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -134
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld a, (iy)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld a, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld a, e
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -157
@@ -18938,35 +19012,36 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -133
 ; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix - 3)
 ; EZ80-NEXT:    ld (ix), de
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    inc bc
-; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld.sis bc, (ix)
+; EZ80-NEXT:    ld (ix - 3), de
+; EZ80-NEXT:    ld de, -132
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld.sis hl, (ix)
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -181
 ; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    ld a, l
+; EZ80-NEXT:    ld a, c
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -154
-; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld de, -154
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), a
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
-; EZ80-NEXT:    ld bc, -130
-; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    ld de, -130
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix - 3)
+; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
-; EZ80-NEXT:    inc bc
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld.sis hl, (hl)
+; EZ80-NEXT:    ld bc, -129
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, bc
+; EZ80-NEXT:    ld.sis hl, (iy)
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -187
 ; EZ80-NEXT:    add ix, bc
@@ -18978,11 +19053,12 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld iy, (ix + 18)
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -172
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $e killed $e def $ude
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -175
@@ -19033,10 +19109,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld e, d
 ; EZ80-NEXT:    ld a, iyh
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -184
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -178
 ; EZ80-NEXT:    add ix, bc
@@ -19053,18 +19130,20 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld l, d
 ; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -160
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, 0
 ; EZ80-NEXT:    ld c, l
 ; EZ80-NEXT:    ld b, h
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), bc
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ld a, iyl
 ; EZ80-NEXT:    ld (ix - 114), a
@@ -19073,10 +19152,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ex de, hl
 ; EZ80-NEXT:    ld d, iyl
 ; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -154
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld l, (iy) ; 1-byte Folded Reload
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix) ; 1-byte Folded Reload
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -163
 ; EZ80-NEXT:    add ix, de
@@ -19626,10 +19706,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld l, 0
 ; EZ80-NEXT:    ld (ix - 113), hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld.sis (ix - 112), hl
 ; EZ80-NEXT:    ld hl, (ix - 113)
 ; EZ80-NEXT:    ld de, 0
@@ -19675,10 +19756,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld e, d
 ; EZ80-NEXT:    ld a, iyh
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -213
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -210
 ; EZ80-NEXT:    add ix, bc
@@ -19686,10 +19768,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld l, 0
 ; EZ80-NEXT:    ld (ix - 95), hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld iy, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld iy, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld.sis (ix - 94), iy
 ; EZ80-NEXT:    ld bc, (ix - 95)
 ; EZ80-NEXT:    or a, a
@@ -19716,30 +19799,31 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    ld (ix - 89), l
 ; EZ80-NEXT:    ld de, (ix - 91)
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -181
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld d, b
 ; EZ80-NEXT:    ld e, c
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    pop bc
-; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -181
-; EZ80-NEXT:    add ix, de
-; EZ80-NEXT:    ld (ix), bc
-; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    lea hl, ix
+; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    ld (hl), bc
 ; EZ80-NEXT:    ld l, 0
 ; EZ80-NEXT:    ld (ix - 88), l
 ; EZ80-NEXT:    ld de, (ix - 90)
 ; EZ80-NEXT:    ld d, l
 ; EZ80-NEXT:    ld hl, (ix + 12)
 ; EZ80-NEXT:    ld e, h
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), bc
 ; EZ80-NEXT:    ld bc, -184
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, bc
-; EZ80-NEXT:    ld (hl), de
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), de
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -163
@@ -21283,10 +21367,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld l, 0
 ; EZ80-NEXT:    ld (ix - 85), hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld.sis (ix - 84), hl
 ; EZ80-NEXT:    ld hl, (ix - 85)
 ; EZ80-NEXT:    ld (ix - 82), iy
@@ -21301,10 +21386,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld iy, (ix + 21)
 ; EZ80-NEXT:    ld a, iyh
 ; EZ80-NEXT:    call __lmulu
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -202
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, bc
-; EZ80-NEXT:    ld (iy), hl
+; EZ80-NEXT:    add ix, bc
+; EZ80-NEXT:    ld (ix), hl
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    dec bc
 ; EZ80-NEXT:    add ix, bc
@@ -21319,11 +21405,10 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld hl, (ix - 70)
 ; EZ80-NEXT:    ld c, 0
 ; EZ80-NEXT:    ld (ix - 67), bc
-; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -145
-; EZ80-NEXT:    add ix, bc
-; EZ80-NEXT:    ld iy, (ix)
-; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, bc
+; EZ80-NEXT:    ld iy, (iy)
 ; EZ80-NEXT:    ld.sis (ix - 66), iy
 ; EZ80-NEXT:    ld bc, (ix - 67)
 ; EZ80-NEXT:    ld de, 0
@@ -21560,11 +21645,12 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    lea bc, iy
 ; EZ80-NEXT:    ld a, d
 ; EZ80-NEXT:    call __ladd
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -193
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld bc, (iy)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -196
 ; EZ80-NEXT:    add ix, de
@@ -21580,10 +21666,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld (ix), hl
 ; EZ80-NEXT:    pop ix
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -151
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld l, c
 ; EZ80-NEXT:    ld h, b
 ; EZ80-NEXT:    push ix
@@ -21602,12 +21689,13 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld c, (ix - 52)
 ; EZ80-NEXT:    ld hl, 32
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -172
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshru
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
@@ -21627,10 +21715,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld (ix), bc
 ; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -157
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), iy
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), iy
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld e, iyl
 ; EZ80-NEXT:    ld d, iyh
 ; EZ80-NEXT:    push ix
@@ -21647,22 +21736,25 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld.sis (ix - 50), de
 ; EZ80-NEXT:    ld de, (ix - 51)
 ; EZ80-NEXT:    ld (ix - 48), iy
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -148
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld c, (ix - 46)
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld (iy), bc
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld (ix), bc
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld hl, 32
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -142
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
 ; EZ80-NEXT:    pop iy
@@ -21670,13 +21762,14 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld de, -151
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -154
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -154
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -160
 ; EZ80-NEXT:    add ix, bc
@@ -21727,12 +21820,13 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld c, (ix - 40)
 ; EZ80-NEXT:    ld hl, 32
 ; EZ80-NEXT:    push hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
 ; EZ80-NEXT:    ld de, -142
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
+; EZ80-NEXT:    add ix, de
 ; EZ80-NEXT:    ld de, (ix - 3)
-; EZ80-NEXT:    ld hl, (hl)
+; EZ80-NEXT:    ld hl, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    call __llshru
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld (ix - 3), de
@@ -21756,10 +21850,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 39), hl
 ; EZ80-NEXT:    ld l, (ix - 37)
 ; EZ80-NEXT:    ld (ix - 36), hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld de, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld.sis (ix - 35), de
 ; EZ80-NEXT:    ld bc, (ix - 36)
 ; EZ80-NEXT:    or a, a
@@ -21780,13 +21875,14 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    ld de, -142
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -148
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -148
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -157
 ; EZ80-NEXT:    add ix, bc
@@ -21807,9 +21903,10 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -21825,10 +21922,11 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 24), hl
 ; EZ80-NEXT:    ld l, (ix - 22)
 ; EZ80-NEXT:    ld (ix - 21), hl
+; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld de, -145
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld bc, (hl)
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld bc, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ld.sis (ix - 20), bc
 ; EZ80-NEXT:    ld iy, (ix - 21)
 ; EZ80-NEXT:    or a, a
@@ -21846,13 +21944,14 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld de, -142
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -148
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -148
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -157
 ; EZ80-NEXT:    add ix, bc
@@ -21873,9 +21972,10 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld l, (hl)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -21883,9 +21983,9 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:  ; %bb.1:
 ; EZ80-NEXT:    ld a, 0
 ; EZ80-NEXT:    ld de, -169
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld (hl), a
+; EZ80-NEXT:    lea iy, ix
+; EZ80-NEXT:    add iy, de
+; EZ80-NEXT:    ld (iy), a
 ; EZ80-NEXT:  BB43_2:
 ; EZ80-NEXT:    ld hl, 65535
 ; EZ80-NEXT:    push hl
@@ -21894,13 +21994,14 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld de, -160
-; EZ80-NEXT:    lea hl, ix
-; EZ80-NEXT:    add hl, de
-; EZ80-NEXT:    ld hl, (hl)
-; EZ80-NEXT:    ld de, -151
 ; EZ80-NEXT:    lea iy, ix
 ; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld de, (iy)
+; EZ80-NEXT:    ld hl, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    ld de, -151
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld de, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld bc, -154
 ; EZ80-NEXT:    add ix, bc
@@ -21922,9 +22023,10 @@ define i64 @umul.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea iy, ix
-; EZ80-NEXT:    add iy, de
-; EZ80-NEXT:    ld l, (iy)
+; EZ80-NEXT:    push ix
+; EZ80-NEXT:    add ix, de
+; EZ80-NEXT:    ld l, (ix)
+; EZ80-NEXT:    pop ix
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
@@ -22028,6 +22130,8 @@ define i8 @sdiv.fix.sat.i8.7(i8, i8) {
 ; Z80-NEXT:    ld e, l
 ; Z80-NEXT:    ld d, h
 ; Z80-NEXT:    ld bc, -32768
+; Z80-NEXT:    ld iyl, c
+; Z80-NEXT:    ld iyh, b
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld bc, 32641
 ; Z80-NEXT:    or a, a
@@ -22038,7 +22142,8 @@ define i8 @sdiv.fix.sat.i8.7(i8, i8) {
 ; Z80-NEXT:  BB44_2:
 ; Z80-NEXT:    ld l, e
 ; Z80-NEXT:    ld h, d
-; Z80-NEXT:    ld bc, -32768
+; Z80-NEXT:    ld c, iyl
+; Z80-NEXT:    ld b, iyh
 ; Z80-NEXT:    add hl, bc
 ; Z80-NEXT:    ld bc, -32641
 ; Z80-NEXT:    or a, a
@@ -22072,6 +22177,8 @@ define i8 @sdiv.fix.sat.i8.7(i8, i8) {
 ; EZ80-CODE16-NEXT:    ld e, l
 ; EZ80-CODE16-NEXT:    ld d, h
 ; EZ80-CODE16-NEXT:    ld bc, -32768
+; EZ80-CODE16-NEXT:    ld iyl, c
+; EZ80-CODE16-NEXT:    ld iyh, b
 ; EZ80-CODE16-NEXT:    add hl, bc
 ; EZ80-CODE16-NEXT:    ld bc, 32641
 ; EZ80-CODE16-NEXT:    or a, a
@@ -22082,7 +22189,7 @@ define i8 @sdiv.fix.sat.i8.7(i8, i8) {
 ; EZ80-CODE16-NEXT:  BB44_2:
 ; EZ80-CODE16-NEXT:    ld l, e
 ; EZ80-CODE16-NEXT:    ld h, d
-; EZ80-CODE16-NEXT:    ld bc, -32768
+; EZ80-CODE16-NEXT:    lea bc, iy
 ; EZ80-CODE16-NEXT:    add hl, bc
 ; EZ80-CODE16-NEXT:    ld bc, -32641
 ; EZ80-CODE16-NEXT:    or a, a
@@ -22116,6 +22223,8 @@ define i8 @sdiv.fix.sat.i8.7(i8, i8) {
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    ld.sis bc, -32768
+; EZ80-NEXT:    ld iyl, c
+; EZ80-NEXT:    ld iyh, b
 ; EZ80-NEXT:    add.sis hl, bc
 ; EZ80-NEXT:    ld.sis bc, 32641
 ; EZ80-NEXT:    or a, a
@@ -22126,7 +22235,8 @@ define i8 @sdiv.fix.sat.i8.7(i8, i8) {
 ; EZ80-NEXT:  BB44_2:
 ; EZ80-NEXT:    ld l, e
 ; EZ80-NEXT:    ld h, d
-; EZ80-NEXT:    ld.sis bc, -32768
+; EZ80-NEXT:    ld c, iyl
+; EZ80-NEXT:    ld b, iyh
 ; EZ80-NEXT:    add.sis hl, bc
 ; EZ80-NEXT:    ld.sis bc, -32641
 ; EZ80-NEXT:    or a, a
@@ -22323,7 +22433,6 @@ define i16 @sdiv.fix.sat.i16.7(i16, i16) {
 ; EZ80-NEXT:    ld bc, (ix - 4)
 ; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld c, e
-; EZ80-NEXT:    ld d, 0
 ; EZ80-NEXT:    call __lshl
 ; EZ80-NEXT:    ld e, a
 ; EZ80-NEXT:    ex de, hl
@@ -22375,7 +22484,7 @@ define i16 @sdiv.fix.sat.i16.7(i16, i16) {
 ; EZ80-NEXT:    ld bc, 32767
 ; EZ80-NEXT:    lea hl, iy
 ; EZ80-NEXT:    ld e, a
-; EZ80-NEXT:    ld a, d
+; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    call __lcmps
 ; EZ80-NEXT:    call pe, __setflag
 ; EZ80-NEXT:    jp m, BB45_8
@@ -23000,8 +23109,8 @@ define i32 @sdiv.fix.sat.i32.15(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 11
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld iy, (ix + 6)
 ; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 15
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
@@ -23011,9 +23120,8 @@ define i32 @sdiv.fix.sat.i32.15(i32, i32) {
 ; EZ80-NEXT:    ld d, c
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld hl, 15
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
@@ -23508,8 +23616,8 @@ define i32 @sdiv.fix.sat.i32.31(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 11
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld iy, (ix + 6)
 ; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 31
 ; EZ80-NEXT:    ld a, l
 ; EZ80-NEXT:    rlc a
 ; EZ80-NEXT:    sbc a, a
@@ -23519,9 +23627,8 @@ define i32 @sdiv.fix.sat.i32.31(i32, i32) {
 ; EZ80-NEXT:    ld d, c
 ; EZ80-NEXT:    ld e, l
 ; EZ80-NEXT:    ld b, c
-; EZ80-NEXT:    ld hl, 31
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    pop iy
@@ -23666,7 +23773,7 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; Z80-NEXT:    push ix
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    ld hl, -23
+; Z80-NEXT:    ld hl, -30
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push hl
@@ -23694,16 +23801,16 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; Z80-NEXT:    ld c, (ix + 8)
 ; Z80-NEXT:    ld b, (ix + 9)
 ; Z80-NEXT:    call __lldivs
-; Z80-NEXT:    ld (ix - 14), l
-; Z80-NEXT:    ld (ix - 13), h
-; Z80-NEXT:    ld (ix - 16), e
-; Z80-NEXT:    ld (ix - 15), d
-; Z80-NEXT:    ld (ix - 18), c
-; Z80-NEXT:    ld (ix - 17), b
+; Z80-NEXT:    ld (ix - 18), l
+; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 20), e
+; Z80-NEXT:    ld (ix - 19), d
+; Z80-NEXT:    ld (ix - 22), c
+; Z80-NEXT:    ld (ix - 21), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 20), l
-; Z80-NEXT:    ld (ix - 19), h
+; Z80-NEXT:    ld (ix - 24), l
+; Z80-NEXT:    ld (ix - 23), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
@@ -23774,74 +23881,82 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; Z80-NEXT:    ld c, (ix - 6)
 ; Z80-NEXT:    ld b, (ix - 5)
 ; Z80-NEXT:    call __llxor
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
-; Z80-NEXT:    ld (ix - 12), e
-; Z80-NEXT:    ld (ix - 11), d
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
+; Z80-NEXT:    ld (ix - 14), e
+; Z80-NEXT:    ld (ix - 13), d
+; Z80-NEXT:    ld (ix - 16), c
+; Z80-NEXT:    ld (ix - 15), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 22), l
-; Z80-NEXT:    ld (ix - 21), h
+; Z80-NEXT:    ld (ix - 26), l
+; Z80-NEXT:    ld (ix - 25), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld de, 0
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    ld e, (ix - 14)
+; Z80-NEXT:    ld d, (ix - 13)
+; Z80-NEXT:    ld c, (ix - 16)
+; Z80-NEXT:    ld b, (ix - 15)
+; Z80-NEXT:    call __llctlz
+; Z80-NEXT:    ld l, a
+; Z80-NEXT:    pop de
+; Z80-NEXT:    ld h, 0
+; Z80-NEXT:    ld de, -1
+; Z80-NEXT:    push de
+; Z80-NEXT:    push de
 ; Z80-NEXT:    push de
 ; Z80-NEXT:    push de
+; Z80-NEXT:    ld bc, 0
+; Z80-NEXT:    push bc
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
+; Z80-NEXT:    call __lladd
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:    ld (ix - 30), e
+; Z80-NEXT:    ld (ix - 29), d
+; Z80-NEXT:    ld (ix - 28), c
+; Z80-NEXT:    ld (ix - 27), b
+; Z80-NEXT:    ld hl, 10
+; Z80-NEXT:    add hl, sp
+; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    ld hl, 16384
+; Z80-NEXT:    ld de, 0
+; Z80-NEXT:    push de
+; Z80-NEXT:    push de
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push de
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
-; Z80-NEXT:    ld e, (ix - 12)
-; Z80-NEXT:    ld d, (ix - 11)
+; Z80-NEXT:    ld l, (ix - 26)
+; Z80-NEXT:    ld h, (ix - 25)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    ld e, (ix - 14)
+; Z80-NEXT:    ld d, (ix - 13)
+; Z80-NEXT:    ld c, (ix - 16)
+; Z80-NEXT:    ld b, (ix - 15)
 ; Z80-NEXT:    call __llcmpu
 ; Z80-NEXT:    push af
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 23), l
+; Z80-NEXT:    ld (ix - 12), l
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 23)
+; Z80-NEXT:    ld l, (ix - 12)
 ; Z80-NEXT:    ; kill: def $h killed $a
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop af
 ; Z80-NEXT:    ccf
 ; Z80-NEXT:    ; kill: def $a killed $a
 ; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld iyl, a
-; Z80-NEXT:    inc iyl
-; Z80-NEXT:    ld l, (ix - 22)
-; Z80-NEXT:    ld h, (ix - 21)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
-; Z80-NEXT:    ld e, (ix - 12)
-; Z80-NEXT:    ld d, (ix - 11)
-; Z80-NEXT:    call __llctlz
-; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld a, iyl
-; Z80-NEXT:    pop de
-; Z80-NEXT:    ld h, 0
-; Z80-NEXT:    ld de, -1
-; Z80-NEXT:    push de
-; Z80-NEXT:    push de
-; Z80-NEXT:    push de
-; Z80-NEXT:    push de
-; Z80-NEXT:    ld bc, 0
-; Z80-NEXT:    push bc
-; Z80-NEXT:    ld e, c
-; Z80-NEXT:    ld d, b
-; Z80-NEXT:    call __lladd
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
-; Z80-NEXT:    ld hl, 10
-; Z80-NEXT:    add hl, sp
-; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    inc a
 ; Z80-NEXT:    bit 0, a
 ; Z80-NEXT:    jr z, BB49_2
 ; Z80-NEXT:  ; %bb.1:
@@ -23850,20 +23965,23 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:  BB49_2:
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld hl, 0
+; Z80-NEXT:    ld bc, 0
+; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld h, b
 ; Z80-NEXT:    jr nz, BB49_4
 ; Z80-NEXT:  ; %bb.3:
-; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    ld l, (ix - 30)
+; Z80-NEXT:    ld h, (ix - 29)
 ; Z80-NEXT:  BB49_4:
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld de, 0
-; Z80-NEXT:    jr nz, BB49_6
-; Z80-NEXT:  ; %bb.5:
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld d, b
+; Z80-NEXT:    jr nz, BB49_6
+; Z80-NEXT:  ; %bb.5:
+; Z80-NEXT:    ld e, (ix - 28)
+; Z80-NEXT:    ld d, (ix - 27)
 ; Z80-NEXT:  BB49_6:
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld bc, 0
 ; Z80-NEXT:    jr nz, BB49_8
 ; Z80-NEXT:  ; %bb.7:
 ; Z80-NEXT:    ld c, iyl
@@ -23877,46 +23995,20 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld hl, 0
-; Z80-NEXT:    ld c, l
-; Z80-NEXT:    ld b, h
-; Z80-NEXT:    push bc
+; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    push de
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld e, c
-; Z80-NEXT:    ld d, b
+; Z80-NEXT:    ld c, e
+; Z80-NEXT:    ld b, d
 ; Z80-NEXT:    call __llsub
 ; Z80-NEXT:    ld (ix - 12), l
 ; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld hl, 31
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 20)
-; Z80-NEXT:    ld h, (ix - 19)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 14)
-; Z80-NEXT:    ld h, (ix - 13)
-; Z80-NEXT:    ld e, (ix - 16)
-; Z80-NEXT:    ld d, (ix - 15)
-; Z80-NEXT:    ld c, (ix - 18)
-; Z80-NEXT:    ld b, (ix - 17)
-; Z80-NEXT:    call __llshl
-; Z80-NEXT:    ld (ix - 14), l
-; Z80-NEXT:    ld (ix - 13), h
-; Z80-NEXT:    ld (ix - 16), e
-; Z80-NEXT:    ld (ix - 15), d
-; Z80-NEXT:    ld (ix - 18), c
-; Z80-NEXT:    ld (ix - 17), b
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 20), l
-; Z80-NEXT:    ld (ix - 19), h
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld l, (ix - 8)
 ; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
@@ -24017,23 +24109,48 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; Z80-NEXT:    call __llshrs
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
+; Z80-NEXT:    ld (ix - 4), e
+; Z80-NEXT:    ld (ix - 3), d
+; Z80-NEXT:    ld (ix - 6), c
+; Z80-NEXT:    ld (ix - 5), b
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    push iy
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push de
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 31
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 24)
+; Z80-NEXT:    ld h, (ix - 23)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 18)
+; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld e, (ix - 20)
+; Z80-NEXT:    ld d, (ix - 19)
+; Z80-NEXT:    ld c, (ix - 22)
+; Z80-NEXT:    ld b, (ix - 21)
+; Z80-NEXT:    call __llshl
+; Z80-NEXT:    ld (ix - 10), l
+; Z80-NEXT:    ld (ix - 9), h
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 6)
+; Z80-NEXT:    ld h, (ix - 5)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 4)
+; Z80-NEXT:    ld h, (ix - 3)
+; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 20)
-; Z80-NEXT:    ld h, (ix - 19)
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 14)
-; Z80-NEXT:    ld h, (ix - 13)
-; Z80-NEXT:    ld e, (ix - 16)
-; Z80-NEXT:    ld d, (ix - 15)
-; Z80-NEXT:    ld c, (ix - 18)
-; Z80-NEXT:    ld b, (ix - 17)
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    call __lladd
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
@@ -24051,7 +24168,7 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    push ix
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
-; EZ80-CODE16-NEXT:    lea hl, ix - 23
+; EZ80-CODE16-NEXT:    lea hl, ix - 30
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld iy, (ix + 12)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 14)
@@ -24067,10 +24184,10 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 8)
 ; EZ80-CODE16-NEXT:    call __lldivs
-; EZ80-CODE16-NEXT:    ld (ix - 14), hl
-; EZ80-CODE16-NEXT:    ld (ix - 16), de
-; EZ80-CODE16-NEXT:    ld (ix - 18), bc
-; EZ80-CODE16-NEXT:    ld (ix - 20), iy
+; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 20), de
+; EZ80-CODE16-NEXT:    ld (ix - 22), bc
+; EZ80-CODE16-NEXT:    ld (ix - 24), iy
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
@@ -24117,62 +24234,65 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
 ; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
 ; EZ80-CODE16-NEXT:    call __llxor
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
+; EZ80-CODE16-NEXT:    ld (ix - 14), de
+; EZ80-CODE16-NEXT:    ld (ix - 16), bc
+; EZ80-CODE16-NEXT:    ld (ix - 26), iy
+; EZ80-CODE16-NEXT:    ld hl, 10
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
+; EZ80-CODE16-NEXT:    ld de, (ix - 14)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
+; EZ80-CODE16-NEXT:    call __llctlz
+; EZ80-CODE16-NEXT:    ld l, a
+; EZ80-CODE16-NEXT:    pop de
+; EZ80-CODE16-NEXT:    ld h, 0
+; EZ80-CODE16-NEXT:    ld de, -1
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    push de
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    ld e, c
+; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    call __lladd
 ; EZ80-CODE16-NEXT:    ld (ix - 8), hl
-; EZ80-CODE16-NEXT:    ld (ix - 12), de
-; EZ80-CODE16-NEXT:    ld (ix - 22), iy
+; EZ80-CODE16-NEXT:    ld (ix - 30), de
+; EZ80-CODE16-NEXT:    ld (ix - 28), bc
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld hl, 16384
 ; EZ80-CODE16-NEXT:    ld de, 0
 ; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, 16384
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
-; EZ80-CODE16-NEXT:    ld de, (ix - 12)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 26)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
+; EZ80-CODE16-NEXT:    ld de, (ix - 14)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 23), l
+; EZ80-CODE16-NEXT:    ld (ix - 12), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 23)
+; EZ80-CODE16-NEXT:    ld l, (ix - 12)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
 ; EZ80-CODE16-NEXT:    ccf
 ; EZ80-CODE16-NEXT:    ; kill: def $a killed $a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld iyl, a
-; EZ80-CODE16-NEXT:    inc iyl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 22)
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
-; EZ80-CODE16-NEXT:    ld de, (ix - 12)
-; EZ80-CODE16-NEXT:    call __llctlz
-; EZ80-CODE16-NEXT:    ld l, a
-; EZ80-CODE16-NEXT:    ld a, iyl
-; EZ80-CODE16-NEXT:    pop de
-; EZ80-CODE16-NEXT:    ld h, 0
-; EZ80-CODE16-NEXT:    ld de, -1
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld bc, 0
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    ld e, c
-; EZ80-CODE16-NEXT:    ld d, b
-; EZ80-CODE16-NEXT:    call __lladd
-; EZ80-CODE16-NEXT:    ld (ix - 8), hl
-; EZ80-CODE16-NEXT:    ld hl, 10
-; EZ80-CODE16-NEXT:    add hl, sp
-; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    inc a
 ; EZ80-CODE16-NEXT:    bit 0, a
 ; EZ80-CODE16-NEXT:    jr z, BB49_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
@@ -24180,20 +24300,21 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld (ix - 8), hl
 ; EZ80-CODE16-NEXT:  BB49_2:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld hl, 0
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld h, b
 ; EZ80-CODE16-NEXT:    jr nz, BB49_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 30)
 ; EZ80-CODE16-NEXT:  BB49_4:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld de, 0
-; EZ80-CODE16-NEXT:    jr nz, BB49_6
-; EZ80-CODE16-NEXT:  ; %bb.5:
 ; EZ80-CODE16-NEXT:    ld e, c
 ; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    jr nz, BB49_6
+; EZ80-CODE16-NEXT:  ; %bb.5:
+; EZ80-CODE16-NEXT:    ld de, (ix - 28)
 ; EZ80-CODE16-NEXT:  BB49_6:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld bc, 0
 ; EZ80-CODE16-NEXT:    jr nz, BB49_8
 ; EZ80-CODE16-NEXT:  ; %bb.7:
 ; EZ80-CODE16-NEXT:    lea bc, iy
@@ -24205,32 +24326,16 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, 0
-; EZ80-CODE16-NEXT:    ld c, l
-; EZ80-CODE16-NEXT:    ld b, h
-; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    lea hl, iy
-; EZ80-CODE16-NEXT:    ld e, c
-; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    ld c, e
+; EZ80-CODE16-NEXT:    ld b, d
 ; EZ80-CODE16-NEXT:    call __llsub
 ; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, 31
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 14)
-; EZ80-CODE16-NEXT:    ld de, (ix - 16)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
-; EZ80-CODE16-NEXT:    call __llshl
-; EZ80-CODE16-NEXT:    ld (ix - 14), hl
-; EZ80-CODE16-NEXT:    ld (ix - 16), de
-; EZ80-CODE16-NEXT:    ld (ix - 18), bc
-; EZ80-CODE16-NEXT:    ld (ix - 20), iy
-; EZ80-CODE16-NEXT:    ld hl, 4
-; EZ80-CODE16-NEXT:    add hl, sp
-; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
@@ -24303,19 +24408,34 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __llshrs
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), de
+; EZ80-CODE16-NEXT:    ld (ix - 6), bc
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, 31
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 24)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 14)
-; EZ80-CODE16-NEXT:    ld de, (ix - 16)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld de, (ix - 20)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 22)
+; EZ80-CODE16-NEXT:    call __llshl
+; EZ80-CODE16-NEXT:    ld (ix - 10), hl
+; EZ80-CODE16-NEXT:    ld hl, 4
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    call __lladd
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
@@ -24331,7 +24451,7 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    lea hl, ix - 25
+; EZ80-NEXT:    lea hl, ix - 34
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ld de, (ix + 15)
@@ -24344,9 +24464,9 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __lldivs
-; EZ80-NEXT:    ld (ix - 16), hl
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
+; EZ80-NEXT:    ld (ix - 19), hl
+; EZ80-NEXT:    ld (ix - 22), de
+; EZ80-NEXT:    ld (ix - 25), bc
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
@@ -24360,7 +24480,7 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llrems
-; EZ80-NEXT:    ld (ix - 13), hl
+; EZ80-NEXT:    ld (ix - 10), hl
 ; EZ80-NEXT:    ld (ix - 4), de
 ; EZ80-NEXT:    ld (ix - 7), bc
 ; EZ80-NEXT:    ld iy, 9
@@ -24376,104 +24496,103 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 13)
+; EZ80-NEXT:    ld hl, (ix - 10)
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld bc, (ix - 7)
 ; EZ80-NEXT:    call __llxor
+; EZ80-NEXT:    ld (ix - 28), hl
+; EZ80-NEXT:    ld (ix - 13), de
+; EZ80-NEXT:    ld (ix - 16), bc
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    ld de, (ix - 13)
+; EZ80-NEXT:    ld bc, (ix - 16)
+; EZ80-NEXT:    call __llctlz
+; EZ80-NEXT:    ld e, 0
+; EZ80-NEXT:    ld (ix - 1), e
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, e
+; EZ80-NEXT:    ld l, a
 ; EZ80-NEXT:    ld iy, 0
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    ld iy, 64
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    ld iy, 0
-; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld c, iyl
+; EZ80-NEXT:    ld b, iyh
+; EZ80-NEXT:    ld de, -1
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    lea de, iy
+; EZ80-NEXT:    call __lladd
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld (ix - 34), de
+; EZ80-NEXT:    ld (ix - 31), bc
+; EZ80-NEXT:    ld hl, 9
+; EZ80-NEXT:    add hl, sp
+; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    ld hl, 64
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    or a, a
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld hl, (ix - 28)
+; EZ80-NEXT:    ld de, (ix - 13)
+; EZ80-NEXT:    ld bc, (ix - 16)
 ; EZ80-NEXT:    call __llcmpu
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ex (sp), hl
-; EZ80-NEXT:    ld (ix - 10), l
+; EZ80-NEXT:    ld (ix - 13), l
 ; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    ld iy, 9
-; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    ld hl, 9
+; EZ80-NEXT:    add hl, sp
+; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld l, (ix - 10)
+; EZ80-NEXT:    ld l, (ix - 13)
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
 ; EZ80-NEXT:    ccf
 ; EZ80-NEXT:    ; kill: def $a killed $a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    inc iyl
-; EZ80-NEXT:    call __llctlz
-; EZ80-NEXT:    ld e, 0
-; EZ80-NEXT:    ld (ix - 1), e
-; EZ80-NEXT:    ld hl, (ix - 3)
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, a
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld de, 0
-; EZ80-NEXT:    ld c, e
-; EZ80-NEXT:    ld b, d
-; EZ80-NEXT:    ld iy, -1
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    call __lladd
-; EZ80-NEXT:    ld (ix - 10), hl
-; EZ80-NEXT:    ld hl, 9
-; EZ80-NEXT:    add hl, sp
-; EZ80-NEXT:    ld sp, hl
+; EZ80-NEXT:    inc a
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    jr z, BB49_2
 ; EZ80-NEXT:  ; %bb.1:
-; EZ80-NEXT:    ld hl, 30
-; EZ80-NEXT:    ld (ix - 10), hl
+; EZ80-NEXT:    ld iy, 30
 ; EZ80-NEXT:  BB49_2:
 ; EZ80-NEXT:    bit 0, a
-; EZ80-NEXT:    ld iy, 0
+; EZ80-NEXT:    ld hl, 0
+; EZ80-NEXT:    push hl
+; EZ80-NEXT:    pop bc
 ; EZ80-NEXT:    jr nz, BB49_4
 ; EZ80-NEXT:  ; %bb.3:
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld bc, (ix - 34)
 ; EZ80-NEXT:  BB49_4:
-; EZ80-NEXT:    ld.sis de, 0
+; EZ80-NEXT:    ld.sis hl, 0
 ; EZ80-NEXT:    bit 0, a
-; EZ80-NEXT:    ; kill: def $de killed $de def $ude
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:    jr nz, BB49_6
 ; EZ80-NEXT:  ; %bb.5:
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld d, b
+; EZ80-NEXT:    ld hl, (ix - 31)
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    ld d, h
 ; EZ80-NEXT:  BB49_6:
 ; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push de
+; EZ80-NEXT:    push bc
 ; EZ80-NEXT:    push iy
-; EZ80-NEXT:    ld de, (ix - 10)
-; EZ80-NEXT:    push de
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    ld.sis bc, 0
 ; EZ80-NEXT:    call __llsub
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    ld (ix - 25), iy
+; EZ80-NEXT:    ld (ix - 13), hl
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, 31
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 16)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
-; EZ80-NEXT:    call __llshl
-; EZ80-NEXT:    ld (ix - 16), hl
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
-; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix - 10)
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 13)
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld bc, (ix - 7)
 ; EZ80-NEXT:    call __llshl
@@ -24481,7 +24600,8 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld (ix - 7), de
 ; EZ80-NEXT:    ld (ix - 10), bc
 ; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix - 13)
+; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, 1
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    ld.sis bc, 0
@@ -24514,17 +24634,27 @@ define i64 @sdiv.fix.sat.i64.31(i64, i64) {
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
-; EZ80-NEXT:    ld iy, (ix - 25)
+; EZ80-NEXT:    ld iy, (ix - 13)
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshrs
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld (ix - 7), de
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    push bc
-; EZ80-NEXT:    push de
+; EZ80-NEXT:    ld (ix - 10), bc
+; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    ld hl, 31
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 16)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    ld hl, (ix - 19)
+; EZ80-NEXT:    ld de, (ix - 22)
+; EZ80-NEXT:    ld bc, (ix - 25)
+; EZ80-NEXT:    call __llshl
+; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld iy, (ix - 10)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 7)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 4)
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __lladd
 ; EZ80-NEXT:    ld sp, ix
 ; EZ80-NEXT:    pop ix
@@ -24817,10 +24947,10 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    call __lldivu
-; Z80-NEXT:    ld (ix - 4), l
-; Z80-NEXT:    ld (ix - 3), h
-; Z80-NEXT:    ld (ix - 2), c
-; Z80-NEXT:    ld (ix - 1), b
+; Z80-NEXT:    ld (ix - 2), l
+; Z80-NEXT:    ld (ix - 1), h
+; Z80-NEXT:    ld (ix - 4), c
+; Z80-NEXT:    ld (ix - 3), b
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
@@ -24831,20 +24961,20 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 4)
-; Z80-NEXT:    ld h, (ix - 3)
-; Z80-NEXT:    ld c, (ix - 2)
-; Z80-NEXT:    ld b, (ix - 1)
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    ld c, (ix - 4)
+; Z80-NEXT:    ld b, (ix - 3)
 ; Z80-NEXT:    call __llcmpu
 ; Z80-NEXT:    push af
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 2), l
+; Z80-NEXT:    ld (ix - 4), l
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld iy, 10
 ; Z80-NEXT:    add iy, sp
 ; Z80-NEXT:    ld sp, iy
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld l, (ix - 4)
 ; Z80-NEXT:    ; kill: def $h killed $a
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop af
@@ -24856,12 +24986,16 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; Z80-NEXT:    jr nz, BB53_2
 ; Z80-NEXT:  ; %bb.1:
 ; Z80-NEXT:    ld hl, -1
+; Z80-NEXT:    ld (ix - 2), l
+; Z80-NEXT:    ld (ix - 1), h
 ; Z80-NEXT:  BB53_2:
 ; Z80-NEXT:    bit 0, a
 ; Z80-NEXT:    jr nz, BB53_4
 ; Z80-NEXT:  ; %bb.3:
 ; Z80-NEXT:    ld de, -1
 ; Z80-NEXT:  BB53_4:
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    ld sp, ix
 ; Z80-NEXT:    pop ix
 ; Z80-NEXT:    ret
@@ -24894,8 +25028,8 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __lldivu
-; EZ80-CODE16-NEXT:    ld (ix - 4), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), bc
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), bc
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
@@ -24906,18 +25040,18 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 4)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), l
+; EZ80-CODE16-NEXT:    ld (ix - 4), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld iy, 10
 ; EZ80-CODE16-NEXT:    add iy, sp
 ; EZ80-CODE16-NEXT:    ld sp, iy
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 2)
+; EZ80-CODE16-NEXT:    ld l, (ix - 4)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
@@ -24929,12 +25063,14 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; EZ80-CODE16-NEXT:    jr nz, BB53_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
 ; EZ80-CODE16-NEXT:    ld hl, -1
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:  BB53_2:
 ; EZ80-CODE16-NEXT:    bit 0, a
 ; EZ80-CODE16-NEXT:    jr nz, BB53_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
 ; EZ80-CODE16-NEXT:    ld de, -1
 ; EZ80-CODE16-NEXT:  BB53_4:
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld sp, ix
 ; EZ80-CODE16-NEXT:    pop ix
 ; EZ80-CODE16-NEXT:    ret
@@ -24946,17 +25082,19 @@ define i32 @udiv.fix.sat.i32.16(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 8
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld c, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 16
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld bc, 0
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld (ix - 5), bc
-; EZ80-NEXT:    ld iy, 16
 ; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ld (ix - 8), hl
@@ -25049,10 +25187,10 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    call __lldivu
-; Z80-NEXT:    ld (ix - 4), l
-; Z80-NEXT:    ld (ix - 3), h
-; Z80-NEXT:    ld (ix - 2), c
-; Z80-NEXT:    ld (ix - 1), b
+; Z80-NEXT:    ld (ix - 2), l
+; Z80-NEXT:    ld (ix - 1), h
+; Z80-NEXT:    ld (ix - 4), c
+; Z80-NEXT:    ld (ix - 3), b
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
@@ -25063,20 +25201,20 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 4)
-; Z80-NEXT:    ld h, (ix - 3)
-; Z80-NEXT:    ld c, (ix - 2)
-; Z80-NEXT:    ld b, (ix - 1)
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    ld c, (ix - 4)
+; Z80-NEXT:    ld b, (ix - 3)
 ; Z80-NEXT:    call __llcmpu
 ; Z80-NEXT:    push af
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 2), l
+; Z80-NEXT:    ld (ix - 4), l
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld iy, 10
 ; Z80-NEXT:    add iy, sp
 ; Z80-NEXT:    ld sp, iy
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld l, (ix - 4)
 ; Z80-NEXT:    ; kill: def $h killed $a
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    pop af
@@ -25088,12 +25226,16 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; Z80-NEXT:    jr nz, BB54_2
 ; Z80-NEXT:  ; %bb.1:
 ; Z80-NEXT:    ld hl, -1
+; Z80-NEXT:    ld (ix - 2), l
+; Z80-NEXT:    ld (ix - 1), h
 ; Z80-NEXT:  BB54_2:
 ; Z80-NEXT:    bit 0, a
 ; Z80-NEXT:    jr nz, BB54_4
 ; Z80-NEXT:  ; %bb.3:
 ; Z80-NEXT:    ld de, -1
 ; Z80-NEXT:  BB54_4:
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    ld sp, ix
 ; Z80-NEXT:    pop ix
 ; Z80-NEXT:    ret
@@ -25126,8 +25268,8 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __lldivu
-; EZ80-CODE16-NEXT:    ld (ix - 4), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), bc
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), bc
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
@@ -25138,18 +25280,18 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 4)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 2), l
+; EZ80-CODE16-NEXT:    ld (ix - 4), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld iy, 10
 ; EZ80-CODE16-NEXT:    add iy, sp
 ; EZ80-CODE16-NEXT:    ld sp, iy
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 2)
+; EZ80-CODE16-NEXT:    ld l, (ix - 4)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
@@ -25161,12 +25303,14 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; EZ80-CODE16-NEXT:    jr nz, BB54_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
 ; EZ80-CODE16-NEXT:    ld hl, -1
+; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:  BB54_2:
 ; EZ80-CODE16-NEXT:    bit 0, a
 ; EZ80-CODE16-NEXT:    jr nz, BB54_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
 ; EZ80-CODE16-NEXT:    ld de, -1
 ; EZ80-CODE16-NEXT:  BB54_4:
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld sp, ix
 ; EZ80-CODE16-NEXT:    pop ix
 ; EZ80-CODE16-NEXT:    ret
@@ -25178,17 +25322,19 @@ define i32 @udiv.fix.sat.i32.32(i32, i32) {
 ; EZ80-NEXT:    add ix, sp
 ; EZ80-NEXT:    lea hl, ix - 8
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, (ix + 6)
-; EZ80-NEXT:    ld c, (ix + 9)
+; EZ80-NEXT:    ld l, (ix + 9)
+; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    xor a, a
 ; EZ80-NEXT:    ld (ix - 2), a
 ; EZ80-NEXT:    ld de, (ix - 4)
 ; EZ80-NEXT:    ld d, a
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld bc, 0
+; EZ80-NEXT:    ld e, l
+; EZ80-NEXT:    sbc hl, hl
+; EZ80-NEXT:    ld c, l
+; EZ80-NEXT:    ld b, h
 ; EZ80-NEXT:    ld (ix - 5), bc
-; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix + 6)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ld (ix - 8), hl
@@ -25254,7 +25400,7 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    push ix
 ; Z80-NEXT:    ld ix, 0
 ; Z80-NEXT:    add ix, sp
-; Z80-NEXT:    ld hl, -20
+; Z80-NEXT:    ld hl, -26
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push hl
@@ -25282,12 +25428,12 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld c, (ix + 8)
 ; Z80-NEXT:    ld b, (ix + 9)
 ; Z80-NEXT:    call __lldivu
-; Z80-NEXT:    ld (ix - 12), l
-; Z80-NEXT:    ld (ix - 11), h
-; Z80-NEXT:    ld (ix - 14), e
-; Z80-NEXT:    ld (ix - 13), d
-; Z80-NEXT:    ld (ix - 16), c
-; Z80-NEXT:    ld (ix - 15), b
+; Z80-NEXT:    ld (ix - 14), l
+; Z80-NEXT:    ld (ix - 13), h
+; Z80-NEXT:    ld (ix - 16), e
+; Z80-NEXT:    ld (ix - 15), d
+; Z80-NEXT:    ld (ix - 18), c
+; Z80-NEXT:    ld (ix - 17), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    ld (ix - 20), l
@@ -25322,55 +25468,25 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld (ix - 1), h
 ; Z80-NEXT:    ld (ix - 4), e
 ; Z80-NEXT:    ld (ix - 3), d
+; Z80-NEXT:    ld (ix - 6), c
+; Z80-NEXT:    ld (ix - 5), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 6), l
-; Z80-NEXT:    ld (ix - 5), h
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld hl, 10
-; Z80-NEXT:    add hl, sp
-; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld de, 0
-; Z80-NEXT:    push de
-; Z80-NEXT:    ld hl, 1
-; Z80-NEXT:    push hl
-; Z80-NEXT:    push de
-; Z80-NEXT:    push de
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 2)
-; Z80-NEXT:    ld h, (ix - 1)
-; Z80-NEXT:    ld e, (ix - 4)
-; Z80-NEXT:    ld d, (ix - 3)
-; Z80-NEXT:    call __llcmpu
-; Z80-NEXT:    push af
-; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ; kill: def $h killed $a
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    pop af
-; Z80-NEXT:    ccf
-; Z80-NEXT:    ; kill: def $a killed $a
-; Z80-NEXT:    sbc a, a
-; Z80-NEXT:    ld iyl, a
-; Z80-NEXT:    inc iyl
-; Z80-NEXT:    ld l, (ix - 6)
-; Z80-NEXT:    ld h, (ix - 5)
-; Z80-NEXT:    push hl
+; Z80-NEXT:    push iy
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    ld e, (ix - 4)
 ; Z80-NEXT:    ld d, (ix - 3)
-; Z80-NEXT:    ld (ix - 18), c
-; Z80-NEXT:    ld (ix - 17), b
+; Z80-NEXT:    ld c, (ix - 6)
+; Z80-NEXT:    ld b, (ix - 5)
 ; Z80-NEXT:    call __llctlz
 ; Z80-NEXT:    ld l, a
-; Z80-NEXT:    ld a, iyl
 ; Z80-NEXT:    pop de
 ; Z80-NEXT:    ld h, 0
 ; Z80-NEXT:    ld bc, 0
@@ -25382,109 +25498,121 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    call __lladd
+; Z80-NEXT:    ld (ix - 26), l
+; Z80-NEXT:    ld (ix - 25), h
+; Z80-NEXT:    ld (ix - 12), e
+; Z80-NEXT:    ld (ix - 11), d
+; Z80-NEXT:    ld (ix - 24), c
+; Z80-NEXT:    ld (ix - 23), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:    ld (ix - 22), l
+; Z80-NEXT:    ld (ix - 21), h
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld iy, 10
-; Z80-NEXT:    add iy, sp
-; Z80-NEXT:    ld sp, iy
-; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    ld hl, 10
+; Z80-NEXT:    add hl, sp
+; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    ld iy, 32
-; Z80-NEXT:    jr nz, BB55_2
-; Z80-NEXT:  ; %bb.1:
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:    ld iyl, e
-; Z80-NEXT:    ld iyh, d
-; Z80-NEXT:    ex de, hl
-; Z80-NEXT:  BB55_2:
-; Z80-NEXT:    push iy
+; Z80-NEXT:    ld hl, 1
+; Z80-NEXT:    ld de, 0
+; Z80-NEXT:    push de
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push de
+; Z80-NEXT:    push de
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    ld e, (ix - 4)
+; Z80-NEXT:    ld d, (ix - 3)
+; Z80-NEXT:    ld c, (ix - 6)
+; Z80-NEXT:    ld b, (ix - 5)
+; Z80-NEXT:    call __llcmpu
+; Z80-NEXT:    push af
 ; Z80-NEXT:    ex (sp), hl
 ; Z80-NEXT:    ld (ix - 10), l
-; Z80-NEXT:    ld (ix - 9), h
 ; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 10
+; Z80-NEXT:    add hl, sp
+; Z80-NEXT:    ld sp, hl
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ; kill: def $h killed $a
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    pop af
+; Z80-NEXT:    ccf
+; Z80-NEXT:    ; kill: def $a killed $a
+; Z80-NEXT:    sbc a, a
+; Z80-NEXT:    inc a
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld iy, 0
 ; Z80-NEXT:    ex de, hl
 ; Z80-NEXT:    ld e, iyl
 ; Z80-NEXT:    ld d, iyh
 ; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    jr nz, BB55_2
+; Z80-NEXT:  ; %bb.1:
+; Z80-NEXT:    ld l, (ix - 26)
+; Z80-NEXT:    ld h, (ix - 25)
+; Z80-NEXT:  BB55_2:
+; Z80-NEXT:    bit 0, a
+; Z80-NEXT:    ld bc, 0
+; Z80-NEXT:    ld iyl, c
+; Z80-NEXT:    ld iyh, b
 ; Z80-NEXT:    jr nz, BB55_4
 ; Z80-NEXT:  ; %bb.3:
-; Z80-NEXT:    ex de, hl
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    pop iy
 ; Z80-NEXT:  BB55_4:
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
-; Z80-NEXT:    jr nz, BB55_6
-; Z80-NEXT:  ; %bb.5:
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld d, b
+; Z80-NEXT:    jr nz, BB55_6
+; Z80-NEXT:  ; %bb.5:
+; Z80-NEXT:    ld e, (ix - 24)
+; Z80-NEXT:    ld d, (ix - 23)
 ; Z80-NEXT:  BB55_6:
 ; Z80-NEXT:    bit 0, a
-; Z80-NEXT:    ld c, iyl
-; Z80-NEXT:    ld b, iyh
+; Z80-NEXT:    ld l, c
+; Z80-NEXT:    ld h, b
 ; Z80-NEXT:    jr nz, BB55_8
 ; Z80-NEXT:  ; %bb.7:
-; Z80-NEXT:    ld c, (ix - 8)
-; Z80-NEXT:    ld b, (ix - 7)
+; Z80-NEXT:    ld l, (ix - 22)
+; Z80-NEXT:    ld h, (ix - 21)
 ; Z80-NEXT:  BB55_8:
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push de
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 10)
-; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
+; Z80-NEXT:    push de
 ; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push bc
 ; Z80-NEXT:    ld hl, 32
-; Z80-NEXT:    ld e, iyl
-; Z80-NEXT:    ld d, iyh
-; Z80-NEXT:    ld c, iyl
-; Z80-NEXT:    ld b, iyh
+; Z80-NEXT:    ld e, c
+; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    call __llsub
-; Z80-NEXT:    ld (ix - 8), l
-; Z80-NEXT:    ld (ix - 7), h
+; Z80-NEXT:    ld (ix - 10), l
+; Z80-NEXT:    ld (ix - 9), h
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld hl, 32
-; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 20)
-; Z80-NEXT:    ld h, (ix - 19)
-; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 12)
 ; Z80-NEXT:    ld h, (ix - 11)
-; Z80-NEXT:    ld e, (ix - 14)
-; Z80-NEXT:    ld d, (ix - 13)
-; Z80-NEXT:    ld c, (ix - 16)
-; Z80-NEXT:    ld b, (ix - 15)
-; Z80-NEXT:    call __llshl
-; Z80-NEXT:    ld (ix - 12), l
-; Z80-NEXT:    ld (ix - 11), h
-; Z80-NEXT:    ld (ix - 14), e
-; Z80-NEXT:    ld (ix - 13), d
-; Z80-NEXT:    ld (ix - 16), c
-; Z80-NEXT:    ld (ix - 15), b
-; Z80-NEXT:    push iy
-; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 20), l
-; Z80-NEXT:    ld (ix - 19), h
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld l, (ix - 10)
-; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 6)
-; Z80-NEXT:    ld h, (ix - 5)
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
 ; Z80-NEXT:    ld e, (ix - 4)
 ; Z80-NEXT:    ld d, (ix - 3)
-; Z80-NEXT:    ld c, (ix - 18)
-; Z80-NEXT:    ld b, (ix - 17)
+; Z80-NEXT:    ld c, (ix - 6)
+; Z80-NEXT:    ld b, (ix - 5)
 ; Z80-NEXT:    call __llshl
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
@@ -25494,13 +25622,13 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld (ix - 5), b
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ex (sp), hl
-; Z80-NEXT:    ld (ix - 10), l
-; Z80-NEXT:    ld (ix - 9), h
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld bc, 0
 ; Z80-NEXT:    push bc
@@ -25508,25 +25636,25 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld e, c
 ; Z80-NEXT:    ld d, b
 ; Z80-NEXT:    call __llshl
-; Z80-NEXT:    ld (ix - 18), l
-; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    ld hl, 1
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push iy
-; Z80-NEXT:    ld l, (ix - 18)
-; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
 ; Z80-NEXT:    call __llshru
-; Z80-NEXT:    ld (ix - 18), l
-; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    push bc
 ; Z80-NEXT:    push de
-; Z80-NEXT:    ld l, (ix - 18)
-; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix + 18)
 ; Z80-NEXT:    ld h, (ix + 19)
@@ -25538,19 +25666,19 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld c, (ix + 16)
 ; Z80-NEXT:    ld b, (ix + 17)
 ; Z80-NEXT:    call __lladd
-; Z80-NEXT:    ld (ix - 18), l
-; Z80-NEXT:    ld (ix - 17), h
+; Z80-NEXT:    ld (ix - 12), l
+; Z80-NEXT:    ld (ix - 11), h
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    push bc
 ; Z80-NEXT:    push de
-; Z80-NEXT:    ld l, (ix - 18)
-; Z80-NEXT:    ld h, (ix - 17)
+; Z80-NEXT:    ld l, (ix - 12)
+; Z80-NEXT:    ld h, (ix - 11)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 10)
-; Z80-NEXT:    ld h, (ix - 9)
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 2)
 ; Z80-NEXT:    ld h, (ix - 1)
@@ -25564,8 +25692,8 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    ld hl, 10
 ; Z80-NEXT:    add hl, sp
 ; Z80-NEXT:    ld sp, hl
-; Z80-NEXT:    ld l, (ix - 8)
-; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    push iy
 ; Z80-NEXT:    ld l, (ix - 2)
@@ -25573,23 +25701,48 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; Z80-NEXT:    call __llshru
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
+; Z80-NEXT:    ld (ix - 4), e
+; Z80-NEXT:    ld (ix - 3), d
+; Z80-NEXT:    ld (ix - 6), c
+; Z80-NEXT:    ld (ix - 5), b
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ex (sp), hl
+; Z80-NEXT:    ld (ix - 8), l
+; Z80-NEXT:    ld (ix - 7), h
 ; Z80-NEXT:    pop hl
 ; Z80-NEXT:    pop hl
-; Z80-NEXT:    push iy
-; Z80-NEXT:    push bc
-; Z80-NEXT:    push de
-; Z80-NEXT:    ld l, (ix - 2)
-; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld hl, 32
 ; Z80-NEXT:    push hl
 ; Z80-NEXT:    ld l, (ix - 20)
 ; Z80-NEXT:    ld h, (ix - 19)
 ; Z80-NEXT:    push hl
-; Z80-NEXT:    ld l, (ix - 12)
-; Z80-NEXT:    ld h, (ix - 11)
-; Z80-NEXT:    ld e, (ix - 14)
-; Z80-NEXT:    ld d, (ix - 13)
-; Z80-NEXT:    ld c, (ix - 16)
-; Z80-NEXT:    ld b, (ix - 15)
+; Z80-NEXT:    ld l, (ix - 14)
+; Z80-NEXT:    ld h, (ix - 13)
+; Z80-NEXT:    ld e, (ix - 16)
+; Z80-NEXT:    ld d, (ix - 15)
+; Z80-NEXT:    ld c, (ix - 18)
+; Z80-NEXT:    ld b, (ix - 17)
+; Z80-NEXT:    call __llshl
+; Z80-NEXT:    ld (ix - 10), l
+; Z80-NEXT:    ld (ix - 9), h
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    pop hl
+; Z80-NEXT:    ld l, (ix - 8)
+; Z80-NEXT:    ld h, (ix - 7)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 6)
+; Z80-NEXT:    ld h, (ix - 5)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 4)
+; Z80-NEXT:    ld h, (ix - 3)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    ld l, (ix - 2)
+; Z80-NEXT:    ld h, (ix - 1)
+; Z80-NEXT:    push hl
+; Z80-NEXT:    push iy
+; Z80-NEXT:    ld l, (ix - 10)
+; Z80-NEXT:    ld h, (ix - 9)
 ; Z80-NEXT:    call __lladd
 ; Z80-NEXT:    ld (ix - 2), l
 ; Z80-NEXT:    ld (ix - 1), h
@@ -25607,7 +25760,7 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    push ix
 ; EZ80-CODE16-NEXT:    ld ix, 0
 ; EZ80-CODE16-NEXT:    add ix, sp
-; EZ80-CODE16-NEXT:    lea hl, ix - 20
+; EZ80-CODE16-NEXT:    lea hl, ix - 26
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld iy, (ix + 12)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 14)
@@ -25623,9 +25776,9 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix + 6)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 8)
 ; EZ80-CODE16-NEXT:    call __lldivu
-; EZ80-CODE16-NEXT:    ld (ix - 12), hl
-; EZ80-CODE16-NEXT:    ld (ix - 14), de
-; EZ80-CODE16-NEXT:    ld (ix - 16), bc
+; EZ80-CODE16-NEXT:    ld (ix - 14), hl
+; EZ80-CODE16-NEXT:    ld (ix - 16), de
+; EZ80-CODE16-NEXT:    ld (ix - 18), bc
 ; EZ80-CODE16-NEXT:    ld (ix - 20), iy
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
@@ -25646,135 +25799,123 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    call __llremu
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld (ix - 4), de
-; EZ80-CODE16-NEXT:    ld (ix - 6), iy
+; EZ80-CODE16-NEXT:    ld (ix - 6), bc
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
+; EZ80-CODE16-NEXT:    ld hl, 10
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld de, (ix - 4)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
+; EZ80-CODE16-NEXT:    call __llctlz
+; EZ80-CODE16-NEXT:    ld l, a
+; EZ80-CODE16-NEXT:    pop de
+; EZ80-CODE16-NEXT:    ld h, 0
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    push bc
+; EZ80-CODE16-NEXT:    ld e, c
+; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    call __lladd
+; EZ80-CODE16-NEXT:    ld (ix - 26), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), de
+; EZ80-CODE16-NEXT:    ld (ix - 24), bc
+; EZ80-CODE16-NEXT:    ld (ix - 22), iy
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld iy, 32
+; EZ80-CODE16-NEXT:    ld hl, 1
 ; EZ80-CODE16-NEXT:    ld de, 0
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, 1
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
 ; EZ80-CODE16-NEXT:    call __llcmpu
 ; EZ80-CODE16-NEXT:    push af
 ; EZ80-CODE16-NEXT:    ex (sp), hl
-; EZ80-CODE16-NEXT:    ld (ix - 8), l
+; EZ80-CODE16-NEXT:    ld (ix - 10), l
 ; EZ80-CODE16-NEXT:    pop hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld l, (ix - 8)
+; EZ80-CODE16-NEXT:    ld l, (ix - 10)
 ; EZ80-CODE16-NEXT:    ; kill: def $h killed $a
 ; EZ80-CODE16-NEXT:    ex (sp), hl
 ; EZ80-CODE16-NEXT:    pop af
 ; EZ80-CODE16-NEXT:    ccf
 ; EZ80-CODE16-NEXT:    ; kill: def $a killed $a
 ; EZ80-CODE16-NEXT:    sbc a, a
-; EZ80-CODE16-NEXT:    ld iyl, a
-; EZ80-CODE16-NEXT:    inc iyl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
-; EZ80-CODE16-NEXT:    ld de, (ix - 4)
-; EZ80-CODE16-NEXT:    ld (ix - 18), bc
-; EZ80-CODE16-NEXT:    call __llctlz
-; EZ80-CODE16-NEXT:    ld l, a
-; EZ80-CODE16-NEXT:    ld a, iyl
-; EZ80-CODE16-NEXT:    pop de
-; EZ80-CODE16-NEXT:    ld h, 0
-; EZ80-CODE16-NEXT:    ld bc, 0
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    ld e, c
-; EZ80-CODE16-NEXT:    ld d, b
-; EZ80-CODE16-NEXT:    call __lladd
-; EZ80-CODE16-NEXT:    ld (ix - 8), iy
-; EZ80-CODE16-NEXT:    ld iy, 10
-; EZ80-CODE16-NEXT:    add iy, sp
-; EZ80-CODE16-NEXT:    ld sp, iy
+; EZ80-CODE16-NEXT:    inc a
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld iy, 32
+; EZ80-CODE16-NEXT:    lea hl, iy
 ; EZ80-CODE16-NEXT:    jr nz, BB55_2
 ; EZ80-CODE16-NEXT:  ; %bb.1:
-; EZ80-CODE16-NEXT:    ex de, hl
-; EZ80-CODE16-NEXT:    ld iyl, e
-; EZ80-CODE16-NEXT:    ld iyh, d
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 26)
 ; EZ80-CODE16-NEXT:  BB55_2:
-; EZ80-CODE16-NEXT:    ld (ix - 10), iy
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    ld iy, 0
-; EZ80-CODE16-NEXT:    lea hl, iy
+; EZ80-CODE16-NEXT:    ld bc, 0
+; EZ80-CODE16-NEXT:    ld iyl, c
+; EZ80-CODE16-NEXT:    ld iyh, b
 ; EZ80-CODE16-NEXT:    jr nz, BB55_4
 ; EZ80-CODE16-NEXT:  ; %bb.3:
-; EZ80-CODE16-NEXT:    ex de, hl
+; EZ80-CODE16-NEXT:    ld iy, (ix - 12)
 ; EZ80-CODE16-NEXT:  BB55_4:
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    lea de, iy
-; EZ80-CODE16-NEXT:    jr nz, BB55_6
-; EZ80-CODE16-NEXT:  ; %bb.5:
 ; EZ80-CODE16-NEXT:    ld e, c
 ; EZ80-CODE16-NEXT:    ld d, b
+; EZ80-CODE16-NEXT:    jr nz, BB55_6
+; EZ80-CODE16-NEXT:  ; %bb.5:
+; EZ80-CODE16-NEXT:    ld de, (ix - 24)
 ; EZ80-CODE16-NEXT:  BB55_6:
 ; EZ80-CODE16-NEXT:    bit 0, a
-; EZ80-CODE16-NEXT:    lea bc, iy
+; EZ80-CODE16-NEXT:    ld l, c
+; EZ80-CODE16-NEXT:    ld h, b
 ; EZ80-CODE16-NEXT:    jr nz, BB55_8
 ; EZ80-CODE16-NEXT:  ; %bb.7:
-; EZ80-CODE16-NEXT:    ld bc, (ix - 8)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 22)
 ; EZ80-CODE16-NEXT:  BB55_8:
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push de
 ; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push bc
 ; EZ80-CODE16-NEXT:    ld hl, 32
-; EZ80-CODE16-NEXT:    lea de, iy
-; EZ80-CODE16-NEXT:    lea bc, iy
+; EZ80-CODE16-NEXT:    ld e, c
+; EZ80-CODE16-NEXT:    ld d, b
 ; EZ80-CODE16-NEXT:    call __llsub
-; EZ80-CODE16-NEXT:    ld (ix - 8), hl
+; EZ80-CODE16-NEXT:    ld (ix - 10), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, 32
-; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
-; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
-; EZ80-CODE16-NEXT:    ld de, (ix - 14)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
-; EZ80-CODE16-NEXT:    call __llshl
-; EZ80-CODE16-NEXT:    ld (ix - 12), hl
-; EZ80-CODE16-NEXT:    ld (ix - 14), de
-; EZ80-CODE16-NEXT:    ld (ix - 16), bc
-; EZ80-CODE16-NEXT:    ld (ix - 20), iy
-; EZ80-CODE16-NEXT:    ld hl, 4
-; EZ80-CODE16-NEXT:    add hl, sp
-; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 6)
 ; EZ80-CODE16-NEXT:    call __llshl
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld (ix - 4), de
 ; EZ80-CODE16-NEXT:    ld (ix - 6), bc
-; EZ80-CODE16-NEXT:    ld (ix - 10), iy
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld bc, 0
 ; EZ80-CODE16-NEXT:    push bc
@@ -25782,23 +25923,23 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld e, c
 ; EZ80-CODE16-NEXT:    ld d, b
 ; EZ80-CODE16-NEXT:    call __llshl
-; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    ld hl, 1
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
 ; EZ80-CODE16-NEXT:    call __llshru
-; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    push bc
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix + 18)
 ; EZ80-CODE16-NEXT:    push hl
@@ -25806,16 +25947,16 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld de, (ix + 14)
 ; EZ80-CODE16-NEXT:    ld bc, (ix + 16)
 ; EZ80-CODE16-NEXT:    call __lladd
-; EZ80-CODE16-NEXT:    ld (ix - 18), hl
+; EZ80-CODE16-NEXT:    ld (ix - 12), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    push bc
 ; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 18)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    ld de, (ix - 4)
@@ -25825,25 +25966,40 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-CODE16-NEXT:    ld hl, 10
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    push iy
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
 ; EZ80-CODE16-NEXT:    call __llshru
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
+; EZ80-CODE16-NEXT:    ld (ix - 4), de
+; EZ80-CODE16-NEXT:    ld (ix - 6), bc
+; EZ80-CODE16-NEXT:    ld (ix - 8), iy
 ; EZ80-CODE16-NEXT:    ld hl, 4
 ; EZ80-CODE16-NEXT:    add hl, sp
 ; EZ80-CODE16-NEXT:    ld sp, hl
-; EZ80-CODE16-NEXT:    push iy
-; EZ80-CODE16-NEXT:    push bc
-; EZ80-CODE16-NEXT:    push de
-; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    ld hl, 32
 ; EZ80-CODE16-NEXT:    push hl
 ; EZ80-CODE16-NEXT:    ld hl, (ix - 20)
 ; EZ80-CODE16-NEXT:    push hl
-; EZ80-CODE16-NEXT:    ld hl, (ix - 12)
-; EZ80-CODE16-NEXT:    ld de, (ix - 14)
-; EZ80-CODE16-NEXT:    ld bc, (ix - 16)
+; EZ80-CODE16-NEXT:    ld hl, (ix - 14)
+; EZ80-CODE16-NEXT:    ld de, (ix - 16)
+; EZ80-CODE16-NEXT:    ld bc, (ix - 18)
+; EZ80-CODE16-NEXT:    call __llshl
+; EZ80-CODE16-NEXT:    ld (ix - 10), hl
+; EZ80-CODE16-NEXT:    ld hl, 4
+; EZ80-CODE16-NEXT:    add hl, sp
+; EZ80-CODE16-NEXT:    ld sp, hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 8)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 6)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 4)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    ld hl, (ix - 2)
+; EZ80-CODE16-NEXT:    push hl
+; EZ80-CODE16-NEXT:    push iy
+; EZ80-CODE16-NEXT:    ld hl, (ix - 10)
 ; EZ80-CODE16-NEXT:    call __lladd
 ; EZ80-CODE16-NEXT:    ld (ix - 2), hl
 ; EZ80-CODE16-NEXT:    ld hl, 10
@@ -25859,7 +26015,7 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push ix
 ; EZ80-NEXT:    ld ix, 0
 ; EZ80-NEXT:    add ix, sp
-; EZ80-NEXT:    lea hl, ix - 22
+; EZ80-NEXT:    lea hl, ix - 31
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ld de, (ix + 15)
@@ -25872,9 +26028,9 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld de, (ix + 9)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __lldivu
-; EZ80-NEXT:    ld (ix - 10), hl
-; EZ80-NEXT:    ld (ix - 13), de
-; EZ80-NEXT:    ld (ix - 16), bc
+; EZ80-NEXT:    ld (ix - 16), hl
+; EZ80-NEXT:    ld (ix - 19), de
+; EZ80-NEXT:    ld (ix - 22), bc
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
@@ -25888,81 +26044,78 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld bc, (ix + 12)
 ; EZ80-NEXT:    ; kill: def $bc killed $bc killed $ubc
 ; EZ80-NEXT:    call __llremu
-; EZ80-NEXT:    push hl
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld (ix - 7), de
+; EZ80-NEXT:    ld (ix - 10), bc
+; EZ80-NEXT:    ld iy, 9
+; EZ80-NEXT:    add iy, sp
+; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    call __llctlz
+; EZ80-NEXT:    ld e, 0
+; EZ80-NEXT:    ld (ix - 1), e
+; EZ80-NEXT:    ld hl, (ix - 3)
+; EZ80-NEXT:    ld h, e
+; EZ80-NEXT:    ld l, a
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    ld c, e
+; EZ80-NEXT:    ld b, d
+; EZ80-NEXT:    ld iy, 0
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
+; EZ80-NEXT:    push de
 ; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    ld (ix - 4), iy
+; EZ80-NEXT:    call __lladd
+; EZ80-NEXT:    ld (ix - 31), hl
+; EZ80-NEXT:    ld (ix - 28), de
+; EZ80-NEXT:    ld (ix - 25), bc
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    or a, a
-; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, 256
+; EZ80-NEXT:    ld de, 0
+; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    sbc hl, hl
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    lea hl, iy
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld hl, (ix - 4)
+; EZ80-NEXT:    ld de, (ix - 7)
+; EZ80-NEXT:    ld bc, (ix - 10)
 ; EZ80-NEXT:    call __llcmpu
 ; EZ80-NEXT:    push af
 ; EZ80-NEXT:    ex (sp), hl
-; EZ80-NEXT:    ld (ix - 7), l
+; EZ80-NEXT:    ld (ix - 13), l
 ; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld l, (ix - 7)
+; EZ80-NEXT:    ld l, (ix - 13)
 ; EZ80-NEXT:    ; kill: def $h killed $a
 ; EZ80-NEXT:    ex (sp), hl
 ; EZ80-NEXT:    pop af
 ; EZ80-NEXT:    ccf
 ; EZ80-NEXT:    ; kill: def $a killed $a
 ; EZ80-NEXT:    sbc a, a
-; EZ80-NEXT:    ld iyl, a
-; EZ80-NEXT:    inc iyl
-; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
-; EZ80-NEXT:    call __llctlz
-; EZ80-NEXT:    ld e, 0
-; EZ80-NEXT:    ld (ix - 1), e
-; EZ80-NEXT:    ld hl, (ix - 3)
-; EZ80-NEXT:    ld h, e
-; EZ80-NEXT:    ld l, a
-; EZ80-NEXT:    ld a, iyl
-; EZ80-NEXT:    ld de, 0
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    ld c, iyl
-; EZ80-NEXT:    ld b, iyh
-; EZ80-NEXT:    push de
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    push iy
-; EZ80-NEXT:    lea de, iy
-; EZ80-NEXT:    call __lladd
-; EZ80-NEXT:    ld iy, 9
-; EZ80-NEXT:    add iy, sp
-; EZ80-NEXT:    ld sp, iy
+; EZ80-NEXT:    inc a
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    ld iy, 32
 ; EZ80-NEXT:    jr nz, BB55_2
 ; EZ80-NEXT:  ; %bb.1:
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld iy, (ix - 31)
 ; EZ80-NEXT:  BB55_2:
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    ld hl, 0
 ; EZ80-NEXT:    jr nz, BB55_4
 ; EZ80-NEXT:  ; %bb.3:
-; EZ80-NEXT:    ex de, hl
+; EZ80-NEXT:    ld hl, (ix - 28)
 ; EZ80-NEXT:  BB55_4:
 ; EZ80-NEXT:    ld.sis de, 0
 ; EZ80-NEXT:    bit 0, a
 ; EZ80-NEXT:    ; kill: def $de killed $de def $ude
-; EZ80-NEXT:    jr nz, BB55_6
+; EZ80-NEXT:    jp nz, BB55_6
 ; EZ80-NEXT:  ; %bb.5:
-; EZ80-NEXT:    ld e, c
-; EZ80-NEXT:    ld d, b
+; EZ80-NEXT:    ld de, (ix - 25)
+; EZ80-NEXT:    ; kill: def $de killed $de def $ude
 ; EZ80-NEXT:  BB55_6:
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
@@ -25971,30 +26124,20 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    ld de, 0
 ; EZ80-NEXT:    ld.sis bc, 0
 ; EZ80-NEXT:    call __llsub
-; EZ80-NEXT:    ld (ix - 7), hl
+; EZ80-NEXT:    ld (ix - 13), hl
 ; EZ80-NEXT:    ld hl, 9
 ; EZ80-NEXT:    add hl, sp
 ; EZ80-NEXT:    ld sp, hl
-; EZ80-NEXT:    ld hl, 32
-; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 10)
-; EZ80-NEXT:    ld de, (ix - 13)
-; EZ80-NEXT:    ld bc, (ix - 16)
-; EZ80-NEXT:    call __llshl
-; EZ80-NEXT:    ld (ix - 10), hl
-; EZ80-NEXT:    ld (ix - 13), de
-; EZ80-NEXT:    ld (ix - 16), bc
-; EZ80-NEXT:    pop hl
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    ld de, (ix - 7)
+; EZ80-NEXT:    ld bc, (ix - 10)
 ; EZ80-NEXT:    call __llshl
 ; EZ80-NEXT:    ld (ix - 4), hl
-; EZ80-NEXT:    ld (ix - 19), de
-; EZ80-NEXT:    ld (ix - 22), bc
+; EZ80-NEXT:    ld (ix - 7), de
+; EZ80-NEXT:    ld (ix - 10), bc
 ; EZ80-NEXT:    pop hl
-; EZ80-NEXT:    ld hl, (ix - 7)
+; EZ80-NEXT:    ld hl, (ix - 13)
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, 1
 ; EZ80-NEXT:    ld de, 0
@@ -26022,23 +26165,33 @@ define i64 @udiv.fix.sat.i64.32(i64, i64) {
 ; EZ80-NEXT:    push de
 ; EZ80-NEXT:    push hl
 ; EZ80-NEXT:    ld hl, (ix - 4)
-; EZ80-NEXT:    ld de, (ix - 19)
-; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    ld de, (ix - 7)
+; EZ80-NEXT:    ld bc, (ix - 10)
 ; EZ80-NEXT:    call __lldivu
 ; EZ80-NEXT:    ld iy, 9
 ; EZ80-NEXT:    add iy, sp
 ; EZ80-NEXT:    ld sp, iy
-; EZ80-NEXT:    ld iy, (ix - 7)
+; EZ80-NEXT:    ld iy, (ix - 13)
 ; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __llshru
+; EZ80-NEXT:    ld (ix - 4), hl
+; EZ80-NEXT:    ld (ix - 7), de
 ; EZ80-NEXT:    ; kill: def $bc killed $bc def $ubc
-; EZ80-NEXT:    pop iy
-; EZ80-NEXT:    push bc
-; EZ80-NEXT:    push de
+; EZ80-NEXT:    ld (ix - 10), bc
+; EZ80-NEXT:    pop hl
+; EZ80-NEXT:    ld hl, 32
 ; EZ80-NEXT:    push hl
-; EZ80-NEXT:    ld hl, (ix - 10)
-; EZ80-NEXT:    ld de, (ix - 13)
-; EZ80-NEXT:    ld bc, (ix - 16)
+; EZ80-NEXT:    ld hl, (ix - 16)
+; EZ80-NEXT:    ld de, (ix - 19)
+; EZ80-NEXT:    ld bc, (ix - 22)
+; EZ80-NEXT:    call __llshl
+; EZ80-NEXT:    pop iy
+; EZ80-NEXT:    ld iy, (ix - 10)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 7)
+; EZ80-NEXT:    push iy
+; EZ80-NEXT:    ld iy, (ix - 4)
+; EZ80-NEXT:    push iy
 ; EZ80-NEXT:    call __lladd
 ; EZ80-NEXT:    ld sp, ix
 ; EZ80-NEXT:    pop ix
diff --git a/llvm/unittests/Target/Z80/InstSizes.cpp b/llvm/unittests/Target/Z80/InstSizes.cpp
index 5c3bb8e586502..3498b680f10ff 100644
--- a/llvm/unittests/Target/Z80/InstSizes.cpp
+++ b/llvm/unittests/Target/Z80/InstSizes.cpp
@@ -1,7 +1,7 @@
 #include "Z80Subtarget.h"
 #include "Z80TargetMachine.h"
 #include "llvm/ADT/StringRef.h"
-#include "llvm/ADT/Triple.h"
+#include "llvm/TargetParser/Triple.h"
 #include "llvm/CodeGen/MIRParser/MIRParser.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineModuleInfo.h"