From c822841fe9368a89ab4cd502e79a2275a6a35540 Mon Sep 17 00:00:00 2001 From: Henry Rachootin Date: Fri, 17 Nov 2017 12:16:06 -0500 Subject: [PATCH 01/14] made some stuff --- port.v | 23 +++++++++++++++++++++++ tis100.v | 43 +++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+) create mode 100644 port.v create mode 100644 tis100.v diff --git a/port.v b/port.v new file mode 100644 index 0000000..76eb4d1 --- /dev/null +++ b/port.v @@ -0,0 +1,23 @@ +module port(input clk, + input leftIn, input rightIn, output leftOut, output rightOut, + input leftWrite, output reg rightDataReady, input r2lAckIn, output r2lAckOut, + input rightWrite, output reg leftDataReady, input l2rAckIn, output l2rAckOut); + reg[11:0] buffer; + always @(posedge clk) begin + if(leftWrite) begin + buffer <= leftIn; + rightDataReady <= 1; + end else if(rightWrite) begin + buffer <= rightIn; + leftDataReady <= 1; + end + if(r2lAckIn) begin + leftDataReady <= 0; + end + if(l2rAckIn) begin + leftDataReady <= 0; + end + end + assign r2lAckOut = r2lAckIn; + assign l2rAckOut = l2rAckIn; +endmodule diff --git a/tis100.v b/tis100.v new file mode 100644 index 0000000..a1fb7a7 --- /dev/null +++ b/tis100.v @@ -0,0 +1,43 @@ +module tis100(input signed[11:0] up, + input signed[11:0] down + input signed[11:0] left, + input signed[11:0] right, + output signed reg[11:0] upOut, + output signed reg[11:0] downOut, + output signed reg[11:0] leftOut, + output signed reg[11:0] rightOut, + output[3:0] requestWrite, + output[3:0] ackRead, + input[3:0] dataReady, + input[3:0] ackWrite); + +endmodule + +//writing: set requestWrite high, block until ackWrite goes high +//reading: block until dataReady goes high, pulse ackRead + +//instructions: +//NOP +//MOV +//SWP +//SAV +//ADD +//SUB +//NEG +//JMP +//JEZ +//JNZ +//JGZ +//JLZ +//JRO + +//registers: +//ACC +//BACK + +//ports: +//LEFT,RIGHT,UP,DOWN + +//pseudo ports: +//ANY +//LAST From dc6712915482a78f239c2df710b95478c3d10f8b Mon Sep 17 00:00:00 2001 From: TShapinsky Date: Tue, 5 Dec 2017 11:27:05 -0500 Subject: [PATCH 02/14] updated instruction information --- tis100.v | 29 +++++++++++++++++++---------- 1 file changed, 19 insertions(+), 10 deletions(-) diff --git a/tis100.v b/tis100.v index a1fb7a7..e240f6e 100644 --- a/tis100.v +++ b/tis100.v @@ -17,23 +17,32 @@ endmodule //reading: block until dataReady goes high, pulse ackRead //instructions: +//NO ARG: //NOP -//MOV //SWP //SAV -//ADD -//SUB //NEG -//JMP -//JEZ -//JNZ -//JGZ -//JLZ -//JRO + +//1 ARG: +//ADD : SRC +//SUB : SRC +//JMP : LABEL +//JEZ : LABEL +//JNZ : LABEL +//JGZ : LABEL +//JLZ : LABEL +//JRO : SRC + +//2 ARG: +//MOV : SRC DST + +//SRC : port or ACC or immediate +//DST : port or ACC +//LABEL : immediate //registers: //ACC -//BACK +//BAK //ports: //LEFT,RIGHT,UP,DOWN From 268e21bea1160558e7028c31f6b78ad026340f99 Mon Sep 17 00:00:00 2001 From: TShapinsky Date: Tue, 5 Dec 2017 11:34:17 -0500 Subject: [PATCH 03/14] documentation on pseudo ports --- tis100.v | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tis100.v b/tis100.v index e240f6e..9ef8507 100644 --- a/tis100.v +++ b/tis100.v @@ -48,5 +48,5 @@ endmodule //LEFT,RIGHT,UP,DOWN //pseudo ports: -//ANY -//LAST +//ANY : UP, LEFT, RIGHT, DOWN for write. LEFT, RIGHT, UP, DOWN for read +//LAST : If no last operation ignored From 8793b9f505661829caeadb3b8e98a1ec14dfa93a Mon Sep 17 00:00:00 2001 From: TShapinsky Date: Tue, 5 Dec 2017 11:42:15 -0500 Subject: [PATCH 04/14] Create stackmemory.v --- stackmemory.v | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 stackmemory.v diff --git a/stackmemory.v b/stackmemory.v new file mode 100644 index 0000000..c032ede --- /dev/null +++ b/stackmemory.v @@ -0,0 +1,16 @@ +//acts as read ANY, write ANY in terms of read, write presedence +//15 stack entries +module stackmemory(input signed[11:0] up, + input signed[11:0] down + input signed[11:0] left, + input signed[11:0] right, + output signed reg[11:0] upOut, + output signed reg[11:0] downOut, + output signed reg[11:0] leftOut, + output signed reg[11:0] rightOut, + output[3:0] requestWrite, + output[3:0] ackRead, + input[3:0] dataReady, + input[3:0] ackWrite); + +endmodule From d08cda8225a60744b50a9e6d24d606e84b843f96 Mon Sep 17 00:00:00 2001 From: Henry Rachootin Date: Mon, 11 Dec 2017 14:52:32 -0500 Subject: [PATCH 05/14] started stuff --- port.v | 2 +- scratch.txt | 103 +++++++++++++++++++++++++++ tis100.v | 195 ++++++++++++++++++++++++++++++++++++++++++++++------ 3 files changed, 279 insertions(+), 21 deletions(-) create mode 100644 scratch.txt diff --git a/port.v b/port.v index 76eb4d1..d206a22 100644 --- a/port.v +++ b/port.v @@ -1,5 +1,5 @@ module port(input clk, - input leftIn, input rightIn, output leftOut, output rightOut, + input[11:0] leftIn, input rightIn[11:0], output leftOut[11:0], output rightOut[11:0], input leftWrite, output reg rightDataReady, input r2lAckIn, output r2lAckOut, input rightWrite, output reg leftDataReady, input l2rAckIn, output l2rAckOut); reg[11:0] buffer; diff --git a/scratch.txt b/scratch.txt new file mode 100644 index 0000000..d7d8135 --- /dev/null +++ b/scratch.txt @@ -0,0 +1,103 @@ +`ADD: begin + if(SRC < 2) begin //src is a register + ACC <= ACC + regVals[SRC]; + PCNEXT <= PC + 1; + end + else if(SRC < 6) begin//src is a port + if(portsHaveData[SRC]) begin //port has data + ACC <= ACC + regVals[SRC]; + PCNEXT <= PC + 1; + readAckOut[SRC] <= 1; + last <= SRC; + end + else begin //port has no data + mode <= `READ_MODE; + PCNEXT <= PC; + weWantData[SRC] <= 1; + readTarget <= SRC; + last <= SRC; + end + end + else if(SRC == `LAST_ADDR) begin//port is last + if(last == `NIL_ADDR) begin//last is undefined + ACC <= ACC + regVals[last]; + PCNEXT <= PC + 1; + end + else if(portsHaveData[last]) begin//last has data + ACC <= ACC + regVals[last]; + PCNEXT <= PC + 1; + readAckOut[last] <= 1; + end + else + mode <= `READ_MODE; + PCNEXT <= PC; + weWantData[last] M- 1; + readTarget <= last; + end + end + else if(SRC == `ANY_ADDR) begin//port is any + end + + + + case(INST) + `ADD: begin + end + end + `SUB: begin + //src could be port + end + `JRO: begin + //src could be port + end + `MOV: begin + //src or dst could be port + end + `ADDI: begin + ACC <= ACC + IMM; + PCNEXT <= PC + 1; + end + `SUBI: begin + ACC <= ACC - IMM; + PCNEXT <= PC + 1; + end + `JROI: begin + PCNEXT <= PC + IMM; + PCNEXT <= PC + 1; + end + `MOVI: begin + //dst could port + end + `SWP: begin + ACC <= BAK; + BAK <= ACC; + PCNEXT <= PC + 1; + end + `SAV: begin + BAK <= ACC; + PCNEXT <= PC + 1; + end + `NEG: begin + ACC <= -ACC; + PCNEXT <= PC + 1; + end + `JMP: begin + PCNEXT <= LABEL; + end + `JEZ: begin + if(ACC == 0) PCNEXT <= LABEL + else PCNEXT <= PC+1 + end + `JNZ: begin + if(ACC != 0) PCNEXT <= LABEL + else PCNEXT <= PC+1 + end + `JGZ: begin + if(ACC > 0) PCNEXT <= LABEL + else PCNEXT <= PC+1 + end + `JLZ: begin + if(ACC < 0) PCNEXT <= LABEL + else PCNEXT <= PC+1 + end + endcase` diff --git a/tis100.v b/tis100.v index 9ef8507..45a3b19 100644 --- a/tis100.v +++ b/tis100.v @@ -1,16 +1,168 @@ -module tis100(input signed[11:0] up, - input signed[11:0] down - input signed[11:0] left, - input signed[11:0] right, - output signed reg[11:0] upOut, - output signed reg[11:0] downOut, - output signed reg[11:0] leftOut, - output signed reg[11:0] rightOut, - output[3:0] requestWrite, - output[3:0] ackRead, - input[3:0] dataReady, - input[3:0] ackWrite); +`define RUN_MODE 2'd0 +`define READ_MODE 2'd1 +`define WRITE_MODE 2'd2 +`define READ_PHASE 2'd0 +`define EX_PHASE 2'd1 +`define WRITE_PHASE 2'd2 + +`define READ_REQ_BIT 11 +`define WRITE_REQ_BIT 12 +`define READ_ACK_BIT 13 +`define WRITE_ACK_BIT 14 + +//registers +`define NIL_ADDR 3'd0 +`define ACC_ADDR 3'd1 +//ports +`define LEFT_ADDR 3'd2 +`define RIGHT_ADDR 3'd3 +`define UP_ADDR 3'd4 +`define DOWN_ADDR 3'd5 +//pseudo ports +`define LAST_ADDR 3'd6 +`define ANY_ADDR 3'd7 + +`define ADDR_SIZE 3 +`define INST_SIZE 18 + + +`define ADD 4'd0 +`define SUB 4'd1 +`define JRO 4'd2 +`define MOV 4'd3 +`define MOVI 4'd4 +`define ADDI 4'd5 +`define SUBI 4'd6 +`define JROI 4'd7 +`define SWP 4'd8 +`define SAV 4'd9 +`define NEG 4'd10 +`define JMP 4'd11 +`define JEZ 4'd12 +`define JNZ 4'd13 +`define JGZ 4'd14 +`define JLZ 4'd15 + + + +module tis100(input clk, + input[14:0] up, + input[14:0] down + input[14:0] left, + input[14:0] right, + output[14:0] upOut, + output[14:0] downOut, + output[14:0] leftOut, + output[14:0] rightOut); + +//internal registers +reg[2:0] mode; +reg[2:0] phase; +reg[`ADDR_SIZE-1:0] last; +reg[`ADDR_SIZE-1:0] writeTarget; +reg[`ADDR_SIZE-1:0] readTarget; +reg[10:0] readValue; +reg[10:0] writeValue; + +reg[`INST_SIZE-1:0] instructions[15:0]; +reg[3:0] PC; +reg[3:0] PCNEXT; + +reg signed[10:0] ACC; +reg signed[10:0] BAK; + +//port stuff +wire signed[10:0] regVals[7:0]; +assign regVals[`NIL_ADDR] = 0; +assign regVals[`ACC_ADDR] = ACC; +assign regVals[`LEFT_ADDR] = left[10:0]; +assign regVals[`RIGHT_ADDR] = right[10:0]; +assign regVals[`UP_ADDR] = up[10:0]; +assign regVals[`DOWN_ADDR] = down[10:0]; + +wire[5:2] portsHaveData; +assign portsHaveData[`LEFT_ADDR] = left[`READ_REQ_BIT]; +assign portsHaveData[`RIGHT_ADDR] = right[`READ_REQ_BIT]; +assign portsHaveData[`UP_ADDR] = up[`READ_REQ_BIT]; +assign portsHaveData[`DOWN_ADDR] = down[`READ_REQ_BIT]; +wire anyHasData; +assign anyHasData = |portsHaveData[5:2]; + +reg[5:2] readAckOut; +assign leftOut[`WRITE_ACK_BIT] = readAckOut[`LEFT_ADDR]; +assign rightOut[`WRITE_ACK_BIT] = readAckOut[`RIGHT_ADDR]; +assign upOut[`WRITE_ACK_BIT] = readAckOut[`UP_ADDR]; +assign downOut[`WRITE_ACK_BIT] = readAckOut[`DOWN_ADDR]; + +reg[5:2] weWantData; +assign leftOut[`WRITE_REQ_BIT] = weWantData[`LEFT_ADDR]; +assign rightOut[`WRITE_REQ_BIT] = weWantData[`RIGHT_ADDR]; +assign upOut[`WRITE_REQ_BIT] = weWantData[`UP_ADDR]; +assign downOut[`WRITE_REQ_BIT] = weWantData[`DOWN_ADDR]; + +//decode +wire[INST_SIZE-1:0] instruction; +assign instruction = instructions[PC]; + +wire[3:0] INST; +assign INST[3:0] = instruction[17:14]; +wire[`ADDR_SIZE-1:0] DST; +assign DST[`ADDR_SIZE-1:0] = instruction[13:11]; +wire[`ADDR_SIZE-1:0] SRC; +assign SRC[`ADDR_SIZE-1:0] = instruction[10:8]; +wire[3:0] LABEL; +assign LABEL[3:0] = instruction[13:10]; +wire signed[11:0] IMM; +assign IMM[10:0] = instruction[10:0]; + + +initial begin + mode = `RUN_MODE; + phase = `READ_PHASE + last = `NIL_ADDR; + ACC = 0; + BAK = 0; + PC = 0; + readAckOut = 0; + + upOut = 15'0; + downOut = 15'0; + leftOut = 15'0; + rightOut = 15'0; +end + +always @(posedge clk) + case(mode) + `RUN_MODE: begin + case(phase) + `READ_PHASE: begin + if(INST < 4) begin //instruction has a SRC + if(SRC < 2) begin //SRC is a register, not a port + readValue <= regVals[SRC]; + end + else if(SRC < 6) begin//src is a port, not a register + if(portsHaveData[SRC]) begin//src has data now + readValue <= regVals[SRC] + + end + end + end + else begin//instruction has no SRC + phase <= EX_PHASE; + end + end + `EX_PHASE: begin + end + `WRITE_PHASE: begin + end + endcase + end + `READ_MODE: begin + end + `WRITE_MODE: begin + end + endcase endmodule //writing: set requestWrite high, block until ackWrite goes high @@ -18,23 +170,26 @@ endmodule //instructions: //NO ARG: -//NOP + + +//R/I +//ADD : SRC +//SUB : SRC +//JRO : SRC +//MOV : SRC DST + +//R +//NOP = ADD NIL //SWP //SAV //NEG -//1 ARG: -//ADD : SRC -//SUB : SRC +//J type //JMP : LABEL //JEZ : LABEL //JNZ : LABEL //JGZ : LABEL //JLZ : LABEL -//JRO : SRC - -//2 ARG: -//MOV : SRC DST //SRC : port or ACC or immediate //DST : port or ACC From 439ae7ca9b40bed723c8c4c787c41a9e261b460c Mon Sep 17 00:00:00 2001 From: Henry Rachootin Date: Mon, 11 Dec 2017 18:47:49 -0500 Subject: [PATCH 06/14] made cpu --- assembler.py | 93 ++++ leftAsm.txt | 2 + rightAsm | 0 test | 1261 ++++++++++++++++++++++++++++++++++++++++++++++++++ tis100.t.v | 28 ++ tis100.v | 369 ++++++++++++++- 6 files changed, 1733 insertions(+), 20 deletions(-) create mode 100644 assembler.py create mode 100644 leftAsm.txt create mode 100644 rightAsm create mode 100755 test create mode 100644 tis100.t.v diff --git a/assembler.py b/assembler.py new file mode 100644 index 0000000..0bb0af4 --- /dev/null +++ b/assembler.py @@ -0,0 +1,93 @@ +from bitstring import Bits + +NIL_ADDR = 0 +ACC_ADDR = 1 +#ports +LEFT_ADDR = 2 +RIGHT_ADDR= 3 +UP_ADDR = 4 +DOWN_ADDR = 5 +#pseudo ports +LAST_ADDR = 6 +ANY_ADDR = 7 + +addresses = {"NIL": NIL_ADDR, + "ACC": ACC_ADDR, + "LEFT": LEFT_ADDR, + "RIGHT": RIGHT_ADDR, + "UP": UP_ADDR, + "DOWN": DOWN_ADDR, + "LAST": LAST_ADDR, + "ANY": ANY_ADDR} + +registers = ["NIL", "ACC", "LEFT", "RIGHT", "UP", "DOWN", "LAST", "ANY"]; + +ADDR_SIZE = 3 +INST_SIZE = 18 +PC_SIZE = 4 + +instructions = {"ADD" :0, + "SUB" :1, + "JRO" :2, + "MOV" :3, + "MOVI" :4, + "ADDI" :5, + "SUBI" :6, + "JROI" :7, + "SWP" :8, + "SAV" :9, + "NEG" :10, + "JMP" :11, + "JEZ" :12, + "JNZ" :13, + "JGZ" :14, + "JLZ" :15} + +srcLsit = ["ADD", "SUB", "JRO", "MOV"] +immList = ["ADDI", "SUBI", "JROI", "MOVI"] + +srcDst = ["MOV"] +immDst = ["MOVI"] +labelList = ["JMP", "JEZ", "JNZ", "JGZ", "JLZ"] + + +def assemble(line): + line = line.replace(',', '') + if(line == "NOP"): + line = "ADD 0" + tokens = line.split() + instruction = tokens[0]; + inst = Bits(uint=instructions[instruction],length = 4).bin + if(instruction in srcLsit): + source = tokens[1] + if(source not in registers): + instruction = instruction + "I" + + if instruction in srcLsit: + dst = Bits(uint=0, length=3).bin + src = Bits(uint=addresses[tokens[1]],length = 3).bin + pad = Bits(uint = 0,length = 8).bin + return inst+dst+src+pad + if instruction in immList: + imm = Bits(int=int(tokens[1]), length=11).bin + dst = Bits(uint=0, length=3).bin + return inst+dst+imm + if instruction in srcDst: + src = Bits(uint=addresses[tokens[1]], length=3).bin + dst = Bits(uint=addresses[tokens[2]], length=3).bin + pad = Bits(uint = 0,length = 8).bin + return inst+dst+src+pad + if instruction in immDst: + imm = Bits(int=int(tokens[1]), length=11).bin + dst = Bits(uint=addresses[tokens[2]], length=3).bin + return inst+dst+imm + if instruction in labelList: + label = Bits(uint=int(tokens[1]), length=4).bin + pad = Bits(uint=0, length=10).bin + return inst+label+pad + +print(assemble("ADD 1")) +print(assemble("ADD ACC")) +print(assemble("MOV LEFT RIGHT")) +print(assemble("MOV 4 LEFT")) +print(assemble("JMP 0")) diff --git a/leftAsm.txt b/leftAsm.txt new file mode 100644 index 0000000..a39e32a --- /dev/null +++ b/leftAsm.txt @@ -0,0 +1,2 @@ +MOV 4 RIGHT +MOV 1 ACC diff --git a/rightAsm b/rightAsm new file mode 100644 index 0000000..e69de29 diff --git a/test b/test new file mode 100755 index 0000000..6c00d4e --- /dev/null +++ b/test @@ -0,0 +1,1261 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1da8740 .scope module, "tis100Test" "tis100Test" 2 2; + .timescale 0 0; +v0x1e2d9d0_0 .net/s "accOut", 10 0, L_0x1e2dc80; 1 drivers +v0x1e2dae0_0 .var "clk", 0 0; +v0x1e2dbb0_0 .var "i", 32 0; +S_0x1df4ed0 .scope module, "dut" "tis100" 2 8, 3 49 0, S_0x1da8740; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +L_0x1e2dc80 .functor BUFZ 11, v0x1df3360_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e3dd50 .functor BUFZ 11, v0x1df3360_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e3eb50 .functor BUFZ 18, L_0x1e40b50, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1df3360_0 .var/s "ACC", 10 0; +v0x1e28d00_0 .var/s "BAK", 10 0; +v0x1e28de0_0 .net "DST", 2 0, L_0x1e41c90; 1 drivers +v0x1e28ed0_0 .net/s "IMM", 10 0, L_0x1e41d30; 1 drivers +v0x1e28fb0_0 .net "INST", 3 0, L_0x1e41570; 1 drivers +v0x1e290e0_0 .net "LABEL", 3 0, L_0x1e41ee0; 1 drivers +v0x1e291c0_0 .var "PC", 3 0; +v0x1e292a0_0 .var "PCNEXT", 3 0; +v0x1e29380_0 .net "SRC", 2 0, L_0x1e41aa0; 1 drivers +v0x1e294f0_0 .net *"_s103", 0 0, L_0x1e3fe90; 1 drivers +v0x1e295d0_0 .net *"_s107", 0 0, L_0x1e3fda0; 1 drivers +v0x1e296b0_0 .net *"_s111", 0 0, L_0x1e40080; 1 drivers +v0x1e29790_0 .net *"_s115", 0 0, L_0x1e3ff80; 1 drivers +v0x1e29870_0 .net *"_s119", 0 0, L_0x1e402c0; 1 drivers +v0x1e29950_0 .net *"_s123", 0 0, L_0x1e401b0; 1 drivers +v0x1e29a30_0 .net *"_s127", 0 0, L_0x1e40480; 1 drivers +v0x1e29b10_0 .net *"_s131", 0 0, L_0x1e40360; 1 drivers +v0x1e29cc0_0 .net *"_s135", 0 0, L_0x1e406e0; 1 drivers +v0x1e29d60_0 .net *"_s139", 0 0, L_0x1e405b0; 1 drivers +v0x1e29e40_0 .net *"_s143", 0 0, L_0x1e408c0; 1 drivers +v0x1e29f20_0 .net *"_s147", 0 0, L_0x1e40780; 1 drivers +v0x1e2a000_0 .net *"_s151", 0 0, L_0x1e40ab0; 1 drivers +v0x1e2a0e0_0 .net *"_s155", 0 0, L_0x1e40960; 1 drivers +v0x1e2a1c0_0 .net *"_s159", 0 0, L_0x1e40a00; 1 drivers +v0x1e2a2a0_0 .net *"_s160", 17 0, L_0x1e40b50; 1 drivers +v0x1e2a380_0 .net *"_s162", 5 0, L_0x1e40eb0; 1 drivers +L_0x7f1c70531060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1e2a460_0 .net *"_s165", 1 0, L_0x7f1c70531060; 1 drivers +v0x1e2c430_2 .array/port v0x1e2c430, 2; +v0x1e2a540_0 .net *"_s173", 10 0, v0x1e2c430_2; 1 drivers +v0x1e2c430_3 .array/port v0x1e2c430, 3; +v0x1e2a620_0 .net *"_s179", 10 0, v0x1e2c430_3; 1 drivers +v0x1e2c430_0 .array/port v0x1e2c430, 0; +v0x1e2a700_0 .net *"_s185", 10 0, v0x1e2c430_0; 1 drivers +v0x1e2c430_1 .array/port v0x1e2c430, 1; +v0x1e2a7e0_0 .net *"_s191", 10 0, v0x1e2c430_1; 1 drivers +v0x1e2a8c0_0 .net *"_s23", 0 0, L_0x1e3e260; 1 drivers +v0x1e2a9a0_0 .net *"_s27", 0 0, L_0x1e3e380; 1 drivers +v0x1e29bf0_0 .net *"_s31", 0 0, L_0x1e3e4b0; 1 drivers +v0x1e2ac70_0 .net *"_s36", 0 0, L_0x1e3e780; 1 drivers +v0x1e2ad50_0 .net *"_s42", 0 0, L_0x1e3ea10; 1 drivers +v0x1e2ae30_0 .net *"_s46", 0 0, L_0x1e3eab0; 1 drivers +v0x1e2af10_0 .net *"_s50", 0 0, L_0x1e3ebc0; 1 drivers +v0x1e2aff0_0 .net *"_s55", 0 0, L_0x1e3ee20; 1 drivers +v0x1e2b0d0_0 .net *"_s61", 0 0, L_0x1e3f090; 1 drivers +v0x1e2b1b0_0 .net *"_s65", 0 0, L_0x1e3f1c0; 1 drivers +v0x1e2b290_0 .net *"_s69", 0 0, L_0x1e3f390; 1 drivers +v0x1e2b370_0 .net *"_s74", 0 0, L_0x1e3f2f0; 1 drivers +v0x1e2b450_0 .net *"_s80", 0 0, L_0x1e3f530; 1 drivers +v0x1e2b530_0 .net *"_s84", 0 0, L_0x1e3f820; 1 drivers +v0x1e2b610_0 .net *"_s88", 0 0, L_0x1e3f760; 1 drivers +v0x1e2b6f0_0 .net *"_s93", 0 0, L_0x1e3f8c0; 1 drivers +v0x1e2b7d0_0 .net *"_s99", 0 0, L_0x1e3fb80; 1 drivers +v0x1e2b8b0_0 .net/s "accOut", 10 0, L_0x1e2dc80; alias, 1 drivers +v0x1e2b990_0 .net "anyHasData", 0 0, L_0x1e3e8c0; 1 drivers +v0x1e2ba50_0 .net "anyReadAck", 0 0, L_0x1e3f6c0; 1 drivers +v0x1e2bb10_0 .net "anyWantData", 0 0, L_0x1e3ef10; 1 drivers +v0x1e2bbd0_0 .net "anyWriteAck", 0 0, L_0x1e3fcb0; 1 drivers +v0x1e2bc90_0 .net "clk", 0 0, v0x1e2dae0_0; 1 drivers +o0x7f1c7057aa38 .functor BUFZ 15, C4; HiZ drive +v0x1e2bd50_0 .net "down", 14 0, o0x7f1c7057aa38; 0 drivers +v0x1e2be30_0 .net "downOut", 14 0, L_0x1e412d0; 1 drivers +v0x1e2bf10_0 .net "instruction", 17 0, L_0x1e3eb50; 1 drivers +v0x1e2bff0 .array "instructions", 0 15, 17 0; +v0x1e2c0b0_0 .var "last", 2 0; +o0x7f1c7057aaf8 .functor BUFZ 15, C4; HiZ drive +v0x1e2c190_0 .net "left", 14 0, o0x7f1c7057aaf8; 0 drivers +v0x1e2c270_0 .net "leftOut", 14 0, L_0x1e41010; 1 drivers +v0x1e2c350_0 .var "mode", 2 0; +v0x1e2c430 .array/s "outVals", 2 5, 10 0; +v0x1e2c570_0 .var "phase", 2 0; +v0x1e2c650_0 .net "portsHaveData", 5 2, L_0x1e3e5a0; 1 drivers +v0x1e2aa40_0 .net "portsWantData", 5 2, L_0x1e3ec60; 1 drivers +v0x1e2ab20_0 .net "readAckIn", 5 2, L_0x1e3f430; 1 drivers +v0x1e2cb00_0 .var "readAckOut", 5 2; +v0x1e2cba0_0 .var "readTarget", 2 0; +v0x1e2cc80_0 .var/s "readValue", 10 0; +L_0x7f1c70531018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1e2cd60 .array "regVals", 0 7; +v0x1e2cd60_0 .net/s v0x1e2cd60 0, 10 0, L_0x7f1c70531018; 1 drivers +v0x1e2cd60_1 .net/s v0x1e2cd60 1, 10 0, L_0x1e3dd50; 1 drivers +v0x1e2cd60_2 .net/s v0x1e2cd60 2, 10 0, L_0x1e3de60; 1 drivers +v0x1e2cd60_3 .net/s v0x1e2cd60 3, 10 0, L_0x1e3df30; 1 drivers +v0x1e2cd60_4 .net/s v0x1e2cd60 4, 10 0, L_0x1e3e030; 1 drivers +v0x1e2cd60_5 .net/s v0x1e2cd60 5, 10 0, L_0x1e3e130; 1 drivers +o0x7f1c7057aeb8 .functor BUFZ 11, C4; HiZ drive +v0x1e2cd60_6 .net/s v0x1e2cd60 6, 10 0, o0x7f1c7057aeb8; 0 drivers +o0x7f1c7057aee8 .functor BUFZ 11, C4; HiZ drive +v0x1e2cd60_7 .net/s v0x1e2cd60 7, 10 0, o0x7f1c7057aee8; 0 drivers +o0x7f1c7057af18 .functor BUFZ 15, C4; HiZ drive +v0x1e2cf70_0 .net "right", 14 0, o0x7f1c7057af18; 0 drivers +v0x1e2d050_0 .net "rightOut", 14 0, L_0x1e41880; 1 drivers +o0x7f1c7057af78 .functor BUFZ 15, C4; HiZ drive +v0x1e2d130_0 .net "up", 14 0, o0x7f1c7057af78; 0 drivers +v0x1e2d210_0 .net "upOut", 14 0, L_0x1e40dc0; 1 drivers +v0x1e2d2f0_0 .var "weHaveData", 5 2; +v0x1e2d3d0_0 .var "weWantData", 5 2; +v0x1e2d4b0_0 .net "writeAckIn", 5 2, L_0x1e3f990; 1 drivers +v0x1e2d590_0 .var "writeAckOut", 5 2; +v0x1e2d670_0 .var "writeTarget", 2 0; +v0x1e2d750_0 .var/s "writeValue", 10 0; +E_0x1db4c40 .event negedge, v0x1e2bc90_0; +E_0x1d91ae0 .event posedge, v0x1e2bc90_0; +L_0x1e3de60 .part o0x7f1c7057aaf8, 0, 11; +L_0x1e3df30 .part o0x7f1c7057af18, 0, 11; +L_0x1e3e030 .part o0x7f1c7057af78, 0, 11; +L_0x1e3e130 .part o0x7f1c7057aa38, 0, 11; +L_0x1e3e260 .part o0x7f1c7057aaf8, 11, 1; +L_0x1e3e380 .part o0x7f1c7057af18, 11, 1; +L_0x1e3e4b0 .part o0x7f1c7057af78, 11, 1; +L_0x1e3e5a0 .concat8 [ 1 1 1 1], L_0x1e3e260, L_0x1e3e380, L_0x1e3e4b0, L_0x1e3e780; +L_0x1e3e780 .part o0x7f1c7057aa38, 11, 1; +L_0x1e3e8c0 .reduce/or L_0x1e3e5a0; +L_0x1e3ea10 .part o0x7f1c7057aaf8, 12, 1; +L_0x1e3eab0 .part o0x7f1c7057af18, 12, 1; +L_0x1e3ebc0 .part o0x7f1c7057af78, 12, 1; +L_0x1e3ec60 .concat8 [ 1 1 1 1], L_0x1e3ea10, L_0x1e3eab0, L_0x1e3ebc0, L_0x1e3ee20; +L_0x1e3ee20 .part o0x7f1c7057aa38, 12, 1; +L_0x1e3ef10 .reduce/or L_0x1e3ec60; +L_0x1e3f090 .part o0x7f1c7057aaf8, 13, 1; +L_0x1e3f1c0 .part o0x7f1c7057af18, 13, 1; +L_0x1e3f390 .part o0x7f1c7057af78, 13, 1; +L_0x1e3f430 .concat8 [ 1 1 1 1], L_0x1e3f090, L_0x1e3f1c0, L_0x1e3f390, L_0x1e3f2f0; +L_0x1e3f2f0 .part o0x7f1c7057aa38, 13, 1; +L_0x1e3f6c0 .reduce/or L_0x1e3f430; +L_0x1e3f530 .part o0x7f1c7057aaf8, 14, 1; +L_0x1e3f820 .part o0x7f1c7057af18, 14, 1; +L_0x1e3f760 .part o0x7f1c7057af78, 14, 1; +L_0x1e3f990 .concat8 [ 1 1 1 1], L_0x1e3f530, L_0x1e3f820, L_0x1e3f760, L_0x1e3f8c0; +L_0x1e3f8c0 .part o0x7f1c7057aa38, 14, 1; +L_0x1e3fcb0 .reduce/or L_0x1e3f990; +L_0x1e3fb80 .part v0x1e2cb00_0, 0, 1; +L_0x1e3fe90 .part v0x1e2cb00_0, 1, 1; +L_0x1e3fda0 .part v0x1e2cb00_0, 2, 1; +L_0x1e40080 .part v0x1e2cb00_0, 3, 1; +L_0x1e3ff80 .part v0x1e2d590_0, 0, 1; +L_0x1e402c0 .part v0x1e2d590_0, 1, 1; +L_0x1e401b0 .part v0x1e2d590_0, 2, 1; +L_0x1e40480 .part v0x1e2d590_0, 3, 1; +L_0x1e40360 .part v0x1e2d3d0_0, 0, 1; +L_0x1e406e0 .part v0x1e2d3d0_0, 1, 1; +L_0x1e405b0 .part v0x1e2d3d0_0, 2, 1; +L_0x1e408c0 .part v0x1e2d3d0_0, 3, 1; +L_0x1e40780 .part v0x1e2d2f0_0, 0, 1; +L_0x1e40ab0 .part v0x1e2d2f0_0, 1, 1; +L_0x1e40960 .part v0x1e2d2f0_0, 2, 1; +L_0x1e40a00 .part v0x1e2d2f0_0, 3, 1; +L_0x1e40b50 .array/port v0x1e2bff0, L_0x1e40eb0; +L_0x1e40eb0 .concat [ 4 2 0 0], v0x1e291c0_0, L_0x7f1c70531060; +LS_0x1e40dc0_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_2, L_0x1e40960, L_0x1e405b0, L_0x1e401b0; +LS_0x1e40dc0_0_4 .concat8 [ 1 0 0 0], L_0x1e3fda0; +L_0x1e40dc0 .concat8 [ 14 1 0 0], LS_0x1e40dc0_0_0, LS_0x1e40dc0_0_4; +LS_0x1e412d0_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_3, L_0x1e40a00, L_0x1e408c0, L_0x1e40480; +LS_0x1e412d0_0_4 .concat8 [ 1 0 0 0], L_0x1e40080; +L_0x1e412d0 .concat8 [ 14 1 0 0], LS_0x1e412d0_0_0, LS_0x1e412d0_0_4; +LS_0x1e41010_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_0, L_0x1e40780, L_0x1e40360, L_0x1e3ff80; +LS_0x1e41010_0_4 .concat8 [ 1 0 0 0], L_0x1e3fb80; +L_0x1e41010 .concat8 [ 14 1 0 0], LS_0x1e41010_0_0, LS_0x1e41010_0_4; +LS_0x1e41880_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_1, L_0x1e40ab0, L_0x1e406e0, L_0x1e402c0; +LS_0x1e41880_0_4 .concat8 [ 1 0 0 0], L_0x1e3fe90; +L_0x1e41880 .concat8 [ 14 1 0 0], LS_0x1e41880_0_0, LS_0x1e41880_0_4; +L_0x1e41570 .part L_0x1e3eb50, 14, 4; +L_0x1e41c90 .part L_0x1e3eb50, 11, 3; +L_0x1e41aa0 .part L_0x1e3eb50, 8, 3; +L_0x1e41ee0 .part L_0x1e3eb50, 10, 4; +L_0x1e41d30 .part L_0x1e3eb50, 0, 11; + .scope S_0x1df4ed0; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1e2c350_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1e2c570_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1e2c0b0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1df3360_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1e28d00_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e291c0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e2cb00_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e2d3d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e2d590_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e2d2f0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2c430, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2c430, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2c430, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2c430, 4, 0; + %pushi/vec4 81921, 0, 18; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2bff0, 4, 0; + %pushi/vec4 256, 0, 18; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2bff0, 4, 0; + %pushi/vec4 181248, 0, 18; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e2bff0, 4, 0; + %end; + .thread T_0; + .scope S_0x1df4ed0; +T_1 ; + %wait E_0x1d91ae0; + %load/vec4 v0x1e2c350_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.2, 6; + %jmp T_1.3; +T_1.0 ; + %load/vec4 v0x1e2c570_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.6, 6; + %jmp T_1.7; +T_1.4 ; + %load/vec4 v0x1e28fb0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_1.8, 5; + %load/vec4 v0x1e29380_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_1.10, 5; + %load/vec4 v0x1e29380_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %jmp T_1.11; +T_1.10 ; + %load/vec4 v0x1e29380_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_1.12, 5; + %load/vec4 v0x1e2c650_0; + %load/vec4 v0x1e29380_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.14, 8; + %load/vec4 v0x1e29380_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e29380_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %load/vec4 v0x1e29380_0; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.15; +T_1.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; + %load/vec4 v0x1e29380_0; + %assign/vec4 v0x1e2cba0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e29380_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; +T_1.15 ; + %jmp T_1.13; +T_1.12 ; + %load/vec4 v0x1e29380_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.16, 4; + %load/vec4 v0x1e2c0b0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_1.18, 4; + %load/vec4 v0x1e2c0b0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %jmp T_1.19; +T_1.18 ; + %load/vec4 v0x1e2c650_0; + %load/vec4 v0x1e2c0b0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.20, 8; + %load/vec4 v0x1e2c0b0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e2c0b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %jmp T_1.21; +T_1.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; + %load/vec4 v0x1e2c0b0_0; + %assign/vec4 v0x1e2cba0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e2c0b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; +T_1.21 ; +T_1.19 ; + %jmp T_1.17; +T_1.16 ; + %load/vec4 v0x1e29380_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.22, 4; + %load/vec4 v0x1e2b990_0; + %flag_set/vec4 8; + %jmp/0xz T_1.24, 8; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.26, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.27; +T_1.26 ; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.28, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.29; +T_1.28 ; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.30, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.31; +T_1.30 ; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.32, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; +T_1.32 ; +T_1.31 ; +T_1.29 ; +T_1.27 ; + %jmp T_1.25; +T_1.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; + %load/vec4 v0x1e29380_0; + %assign/vec4 v0x1e2cba0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; +T_1.25 ; +T_1.22 ; +T_1.17 ; +T_1.13 ; +T_1.11 ; +T_1.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.7; +T_1.5 ; + %load/vec4 v0x1e28fb0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_1.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_1.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_1.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_1.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_1.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_1.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_1.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_1.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_1.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_1.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_1.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_1.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_1.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_1.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_1.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_1.49, 6; + %jmp T_1.50; +T_1.34 ; + %load/vec4 v0x1df3360_0; + %load/vec4 v0x1e2cc80_0; + %add; + %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.35 ; + %load/vec4 v0x1df3360_0; + %load/vec4 v0x1e2cc80_0; + %sub; + %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.36 ; + %load/vec4 v0x1e291c0_0; + %pad/u 11; + %load/vec4 v0x1e2cc80_0; + %add; + %pad/u 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.37 ; + %load/vec4 v0x1e2cc80_0; + %assign/vec4 v0x1e2d750_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.38 ; + %load/vec4 v0x1e28ed0_0; + %assign/vec4 v0x1e2d750_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.39 ; + %load/vec4 v0x1df3360_0; + %load/vec4 v0x1e28ed0_0; + %add; + %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.40 ; + %load/vec4 v0x1df3360_0; + %load/vec4 v0x1e28ed0_0; + %sub; + %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.41 ; + %load/vec4 v0x1e291c0_0; + %pad/u 11; + %load/vec4 v0x1e28ed0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.42 ; + %load/vec4 v0x1e28d00_0; + %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x1df3360_0; + %assign/vec4 v0x1e28d00_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.43 ; + %load/vec4 v0x1df3360_0; + %assign/vec4 v0x1e28d00_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.44 ; + %load/vec4 v0x1df3360_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.45 ; + %load/vec4 v0x1e290e0_0; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.50; +T_1.46 ; + %load/vec4 v0x1df3360_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_1.51, 4; + %load/vec4 v0x1e290e0_0; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.52; +T_1.51 ; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; +T_1.52 ; + %jmp T_1.50; +T_1.47 ; + %load/vec4 v0x1df3360_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_1.53, 4; + %load/vec4 v0x1e290e0_0; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.54; +T_1.53 ; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; +T_1.54 ; + %jmp T_1.50; +T_1.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1df3360_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_1.55, 5; + %load/vec4 v0x1e290e0_0; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.56; +T_1.55 ; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; +T_1.56 ; + %jmp T_1.50; +T_1.49 ; + %load/vec4 v0x1df3360_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_1.57, 5; + %load/vec4 v0x1e290e0_0; + %assign/vec4 v0x1e292a0_0, 0; + %jmp T_1.58; +T_1.57 ; + %load/vec4 v0x1e291c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1e292a0_0, 0; +T_1.58 ; + %jmp T_1.50; +T_1.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.7; +T_1.6 ; + %load/vec4 v0x1e28fb0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1e28fb0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_1.59, 4; + %load/vec4 v0x1e28de0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1e28de0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1e2c0b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_1.61, 9; + %load/vec4 v0x1e28de0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_1.63, 4; + %load/vec4 v0x1e2d750_0; + %assign/vec4 v0x1df3360_0, 0; +T_1.63 ; + %jmp T_1.62; +T_1.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; + %load/vec4 v0x1e28de0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.65, 4; + %load/vec4 v0x1e2c0b0_0; + %assign/vec4 v0x1e2d670_0, 0; + %load/vec4 v0x1e2d750_0; + %load/vec4 v0x1e2c0b0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e2c0b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %jmp T_1.66; +T_1.65 ; + %load/vec4 v0x1e28de0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.67, 4; + %load/vec4 v0x1e28de0_0; + %assign/vec4 v0x1e2d670_0, 0; + %load/vec4 v0x1e2d750_0; + %load/vec4 v0x1e28de0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e28de0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e28de0_0; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.68; +T_1.67 ; + %load/vec4 v0x1e2bb10_0; + %flag_set/vec4 8; + %jmp/0xz T_1.69, 8; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.72; +T_1.71 ; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.73, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.74; +T_1.73 ; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.75, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.76; +T_1.75 ; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.77, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; +T_1.77 ; +T_1.76 ; +T_1.74 ; +T_1.72 ; + %jmp T_1.70; +T_1.69 ; + %load/vec4 v0x1e28de0_0; + %assign/vec4 v0x1e2d670_0, 0; +T_1.70 ; +T_1.68 ; +T_1.66 ; +T_1.62 ; +T_1.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.7; +T_1.7 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.1 ; + %load/vec4 v0x1e2c570_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.81, 6; + %jmp T_1.82; +T_1.79 ; + %load/vec4 v0x1e2cba0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.83, 4; + %load/vec4 v0x1e2b990_0; + %flag_set/vec4 8; + %jmp/0xz T_1.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e2d3d0_0, 0, 4; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.87, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.88; +T_1.87 ; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.89, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.90; +T_1.89 ; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.91, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.92; +T_1.91 ; + %load/vec4 v0x1e2c650_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.93, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; +T_1.93 ; +T_1.92 ; +T_1.90 ; +T_1.88 ; +T_1.85 ; + %jmp T_1.84; +T_1.83 ; + %load/vec4 v0x1e2c650_0; + %load/vec4 v0x1e2cba0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; + %load/vec4 v0x1e2cba0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1e2cd60, 4; + %assign/vec4 v0x1e2cc80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e2cba0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1e2cba0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %load/vec4 v0x1e2cba0_0; + %assign/vec4 v0x1e2c0b0_0, 0; +T_1.95 ; +T_1.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.82; +T_1.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.82; +T_1.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.82; +T_1.82 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.2 ; + %load/vec4 v0x1e2c570_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.99, 6; + %jmp T_1.100; +T_1.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.100; +T_1.98 ; + %load/vec4 v0x1e2d670_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.101, 4; + %load/vec4 v0x1e2bb10_0; + %flag_set/vec4 8; + %jmp/0xz T_1.103, 8; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.106; +T_1.105 ; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.107, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.108; +T_1.107 ; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.109, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; + %jmp T_1.110; +T_1.109 ; + %load/vec4 v0x1e2aa40_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.111, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e2d670_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %load/vec4 v0x1e2d750_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1e2c430, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e2c0b0_0, 0; +T_1.111 ; +T_1.110 ; +T_1.108 ; +T_1.106 ; +T_1.103 ; +T_1.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.100; +T_1.99 ; + %load/vec4 v0x1e2d670_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.113, 4; + %load/vec4 v0x1e2d4b0_0; + %load/vec4 v0x1e2d670_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1e2d670_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1e2d2f0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1e2c350_0, 0; +T_1.115 ; +T_1.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1e2c570_0, 0; + %jmp T_1.100; +T_1.100 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.3 ; + %pop/vec4 1; + %jmp T_1; + .thread T_1; + .scope S_0x1df4ed0; +T_2 ; + %wait E_0x1db4c40; + %load/vec4 v0x1e2c570_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1e2c350_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1e292a0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_2.0, 8; + %load/vec4 v0x1e292a0_0; + %assign/vec4 v0x1e291c0_0, 0; +T_2.0 ; + %load/vec4 v0x1e2c570_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_2.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e2cb00_0, 0, 4; +T_2.2 ; + %jmp T_2; + .thread T_2; + .scope S_0x1da8740; +T_3 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x1e2dbb0_0, 0, 33; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x1e2dbb0_0, 0, 33; +T_3.0 ; + %load/vec4 v0x1e2dbb0_0; + %cmpi/u 10, 0, 33; + %jmp/0xz T_3.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1e2dae0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e2dae0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1e2dae0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e2dae0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1e2dae0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e2dae0_0, 0, 1; + %delay 1, 0; + %vpi_call 2 19 "$display", v0x1e2d9d0_0 {0 0 0}; + %load/vec4 v0x1e2dbb0_0; + %addi 1, 0, 33; + %store/vec4 v0x1e2dbb0_0, 0, 33; + %jmp T_3.0; +T_3.1 ; + %end; + .thread T_3; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "tis100.t.v"; + "./tis100.v"; diff --git a/tis100.t.v b/tis100.t.v new file mode 100644 index 0000000..52b247a --- /dev/null +++ b/tis100.t.v @@ -0,0 +1,28 @@ +`include "tis100.v" +module tis100Test(); + +reg clk; +wire signed[10:0] accOutLeft; +wire signed[10:0] accOutRight; +reg[32:0] i; + +wire[14:0] L2R; +wire[14:0] R2L; + +tis100 left( .clk(clk), .accOut(accOutLeft), .rightOut(L2R) .right(R2L)); +tis100 right(.clk(clk), .accOut(accOutRight), .left(L2R) .leftOut(R2L)); + +initial begin + i = 0; + for( i = 0; i<10; i=i+1) begin + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + $display(accOut); + end +end + +endmodule diff --git a/tis100.v b/tis100.v index 45a3b19..f8a4cb0 100644 --- a/tis100.v +++ b/tis100.v @@ -48,13 +48,16 @@ module tis100(input clk, input[14:0] up, - input[14:0] down + input[14:0] down, input[14:0] left, input[14:0] right, output[14:0] upOut, output[14:0] downOut, output[14:0] leftOut, - output[14:0] rightOut); + output[14:0] rightOut, + output signed[10:0] accOut); + +parameter memFile = "memory.txt"; //internal registers reg[2:0] mode; @@ -62,8 +65,8 @@ reg[2:0] phase; reg[`ADDR_SIZE-1:0] last; reg[`ADDR_SIZE-1:0] writeTarget; reg[`ADDR_SIZE-1:0] readTarget; -reg[10:0] readValue; -reg[10:0] writeValue; +reg signed[10:0] readValue; +reg signed[10:0] writeValue; reg[`INST_SIZE-1:0] instructions[15:0]; reg[3:0] PC; @@ -71,6 +74,7 @@ reg[3:0] PCNEXT; reg signed[10:0] ACC; reg signed[10:0] BAK; +assign accOut = ACC; //port stuff wire signed[10:0] regVals[7:0]; @@ -89,22 +93,66 @@ assign portsHaveData[`DOWN_ADDR] = down[`READ_REQ_BIT]; wire anyHasData; assign anyHasData = |portsHaveData[5:2]; +wire[5:2] portsWantData; +assign portsWantData[`LEFT_ADDR] = left[`WRITE_REQ_BIT]; +assign portsWantData[`RIGHT_ADDR] = right[`WRITE_REQ_BIT]; +assign portsWantData[`UP_ADDR] = up[`WRITE_REQ_BIT]; +assign portsWantData[`DOWN_ADDR] = down[`WRITE_REQ_BIT]; +wire anyWantData; +assign anyWantData = |portsWantData[5:2]; + +wire[5:2] readAckIn; +assign readAckIn[`LEFT_ADDR] = left[`READ_ACK_BIT]; +assign readAckIn[`RIGHT_ADDR] = right[`READ_ACK_BIT]; +assign readAckIn[`UP_ADDR] = up[`READ_ACK_BIT]; +assign readAckIn[`DOWN_ADDR] = down[`READ_ACK_BIT]; +wire anyReadAck; +assign anyReadAck = |readAckIn[5:2]; + +wire[5:2] writeAckIn; +assign writeAckIn[`LEFT_ADDR] = left[`WRITE_ACK_BIT]; +assign writeAckIn[`RIGHT_ADDR] = right[`WRITE_ACK_BIT]; +assign writeAckIn[`UP_ADDR] = up[`WRITE_ACK_BIT]; +assign writeAckIn[`DOWN_ADDR] = down[`WRITE_ACK_BIT]; +wire anyWriteAck; +assign anyWriteAck = |writeAckIn[5:2]; + reg[5:2] readAckOut; assign leftOut[`WRITE_ACK_BIT] = readAckOut[`LEFT_ADDR]; assign rightOut[`WRITE_ACK_BIT] = readAckOut[`RIGHT_ADDR]; assign upOut[`WRITE_ACK_BIT] = readAckOut[`UP_ADDR]; assign downOut[`WRITE_ACK_BIT] = readAckOut[`DOWN_ADDR]; +reg[5:2] writeAckOut; +assign leftOut[`READ_ACK_BIT] = writeAckOut[`LEFT_ADDR]; +assign rightOut[`READ_ACK_BIT] = writeAckOut[`RIGHT_ADDR]; +assign upOut[`READ_ACK_BIT] = writeAckOut[`UP_ADDR]; +assign downOut[`READ_ACK_BIT] = writeAckOut[`DOWN_ADDR]; + reg[5:2] weWantData; assign leftOut[`WRITE_REQ_BIT] = weWantData[`LEFT_ADDR]; assign rightOut[`WRITE_REQ_BIT] = weWantData[`RIGHT_ADDR]; assign upOut[`WRITE_REQ_BIT] = weWantData[`UP_ADDR]; assign downOut[`WRITE_REQ_BIT] = weWantData[`DOWN_ADDR]; +reg[5:2] weHaveData; +assign leftOut[`READ_REQ_BIT] = weHaveData[`LEFT_ADDR]; +assign rightOut[`READ_REQ_BIT] = weHaveData[`RIGHT_ADDR]; +assign upOut[`READ_REQ_BIT] = weHaveData[`UP_ADDR]; +assign downOut[`READ_REQ_BIT] = weHaveData[`DOWN_ADDR]; + //decode -wire[INST_SIZE-1:0] instruction; +wire[`INST_SIZE-1:0] instruction; assign instruction = instructions[PC]; +reg signed[10:0] outVals[5:2]; + +assign upOut[10:0] = outVals[`UP_ADDR]; +assign downOut[10:0] = outVals[`DOWN_ADDR]; +assign leftOut[10:0] = outVals[`LEFT_ADDR]; +assign rightOut[10:0] = outVals[`RIGHT_ADDR]; + + wire[3:0] INST; assign INST[3:0] = instruction[17:14]; wire[`ADDR_SIZE-1:0] DST; @@ -113,26 +161,33 @@ wire[`ADDR_SIZE-1:0] SRC; assign SRC[`ADDR_SIZE-1:0] = instruction[10:8]; wire[3:0] LABEL; assign LABEL[3:0] = instruction[13:10]; -wire signed[11:0] IMM; +wire signed[10:0] IMM; assign IMM[10:0] = instruction[10:0]; initial begin mode = `RUN_MODE; - phase = `READ_PHASE + phase = `READ_PHASE; last = `NIL_ADDR; ACC = 0; BAK = 0; PC = 0; readAckOut = 0; - - upOut = 15'0; - downOut = 15'0; - leftOut = 15'0; - rightOut = 15'0; + weWantData = 0; + writeAckOut = 0; + weHaveData = 0; + + outVals[`UP_ADDR] = 0; + outVals[`DOWN_ADDR] = 0; + outVals[`LEFT_ADDR] = 0; + outVals[`RIGHT_ADDR] = 0; + + instructions[0] = {`ADDI, 3'd0, 11'd1}; + instructions[1] = {`ADD, 3'd0, `ACC_ADDR, 8'd0}; + instructions[2] = {`JMP, 4'd1, 10'd0}; end -always @(posedge clk) +always @(posedge clk) begin case(mode) `RUN_MODE: begin case(phase) @@ -143,28 +198,302 @@ always @(posedge clk) end else if(SRC < 6) begin//src is a port, not a register if(portsHaveData[SRC]) begin//src has data now - readValue <= regVals[SRC] - + readValue <= regVals[SRC]; + readAckOut[SRC] <= 1; + last <= SRC; end - end + else begin //src has no data now + mode <= `READ_MODE; + readTarget <= SRC; + weWantData[SRC] <= 1; + end + end//src is a port + else if (SRC == `LAST_ADDR) begin//src is LAST + if(last == `NIL_ADDR) begin//edge case, last is NIL still + readValue <= regVals[last]; + end + else begin//last is a port + if(portsHaveData[last]) begin//last has data now + readValue <= regVals[last]; + readAckOut[last] <= 1; + end + else begin + mode <= `READ_MODE; + readTarget <= last; + weWantData[last] <= 1; + end + end//last is a port + end//src is last + else if (SRC == `ANY_ADDR) begin//src is ANY + if(anyHasData) begin//any port has data + if(portsHaveData[`UP_ADDR]) begin + readValue <= regVals[`UP_ADDR]; + readAckOut[`UP_ADDR] <= 1; + last <= `UP_ADDR; + end + else if(portsHaveData[`DOWN_ADDR]) begin + readValue <= regVals[`DOWN_ADDR]; + readAckOut[`DOWN_ADDR] <= 1; + last <= `DOWN_ADDR; + end + else if(portsHaveData[`LEFT_ADDR]) begin + readValue <= regVals[`LEFT_ADDR]; + readAckOut[`LEFT_ADDR] <= 1; + last <= `LEFT_ADDR; + end + else if(portsHaveData[`RIGHT_ADDR]) begin + readValue <= regVals[`RIGHT_ADDR]; + readAckOut[`RIGHT_ADDR] <= 1; + last <= `RIGHT_ADDR; + end + end//any port has data + else begin//no port has data + mode <= `READ_MODE; + readTarget <= SRC; + weWantData[`UP_ADDR] <= 1; + weWantData[`DOWN_ADDR] <= 1; + weWantData[`LEFT_ADDR] <= 1; + weWantData[`RIGHT_ADDR] <= 1; + end + end//src is ANY + end//instruction has a SRC + phase <= `EX_PHASE; + end//READ_PHASE + `EX_PHASE: begin + case(INST) + `ADD: begin + ACC <= ACC + readValue; + PCNEXT <= PC + 1; + end + `SUB: begin + ACC <= ACC - readValue; + PCNEXT <= PC + 1; + end + `JRO: begin + PCNEXT <= PC + readValue; + end + `MOV: begin + writeValue <= readValue; + PCNEXT <= PC + 1; + end + `MOVI: begin + writeValue <= IMM; + PCNEXT <= PC + 1; + end + `ADDI: begin + ACC <= ACC + IMM; + PCNEXT <= PC + 1; end - else begin//instruction has no SRC - phase <= EX_PHASE; + `SUBI: begin + ACC <= ACC - IMM; + PCNEXT <= PC + 1; + end + `JROI: begin + PCNEXT <= PC + IMM; + end + `SWP: begin + ACC <= BAK; + BAK <= ACC; + PCNEXT <= PC + 1; + end + `SAV: begin + BAK <= ACC; + PCNEXT <= PC + 1; + end + `NEG: begin + ACC <= -ACC; + PCNEXT <= PC + 1; + end + `JMP: begin + PCNEXT <= LABEL; + end + `JEZ: begin + if(ACC == 0) PCNEXT <= LABEL; + else PCNEXT <= PC + 1; + end + `JNZ: begin + if(ACC != 0) PCNEXT <= LABEL; + else PCNEXT <= PC + 1; + end + `JGZ: begin + if(ACC > 0) PCNEXT <= LABEL; + else PCNEXT <= PC + 1; + end + `JLZ: begin + if(ACC < 0) PCNEXT <= LABEL; + else PCNEXT <= PC + 1; + end + endcase + phase <= `WRITE_PHASE; + end//ex phase + `WRITE_PHASE: begin + if(INST == `MOV || INST == `MOVI) begin //inst has dst + if(DST < 2 || (DST == `LAST_ADDR && last == `NIL_ADDR)) begin//DST is a register + if(DST == `ACC_ADDR) begin + ACC <= writeValue; + end + end//dst is a register + else begin//dst is a port or pseudo port + mode <= `WRITE_MODE; + if(DST == `LAST_ADDR) begin + writeTarget <= last; + outVals[last] <= writeValue; + weHaveData[last] <= 1; + end + else if(DST != `ANY_ADDR) begin + writeTarget <= DST; + outVals[DST] <= writeValue; + weHaveData[DST] <= 1; + last <= DST; + end + else begin//ANY + if(anyWantData) begin//someone wants data + if(portsWantData[`UP_ADDR]) begin + writeTarget <= `UP_ADDR; + weHaveData[`UP_ADDR] <= 1; + outVals[`UP_ADDR] <= writeValue; + last <= `UP_ADDR; + end + else if(portsWantData[`DOWN_ADDR]) begin + writeTarget <= `DOWN_ADDR; + weHaveData[`DOWN_ADDR] <= 1; + outVals[`DOWN_ADDR] <= writeValue; + last <= `DOWN_ADDR; + end + else if(portsWantData[`LEFT_ADDR]) begin + writeTarget <= `LEFT_ADDR; + weHaveData[`LEFT_ADDR] <= 1; + outVals[`LEFT_ADDR] <= writeValue; + last <= `LEFT_ADDR; + end + else if(portsWantData[`RIGHT_ADDR]) begin + writeTarget <= `RIGHT_ADDR; + weHaveData[`RIGHT_ADDR] <= 1; + outVals[`RIGHT_ADDR] <= writeValue; + last <= `RIGHT_ADDR; + end + end + else begin//no one wants data + writeTarget <= DST; + end + end + end + end//inst has dst + phase <= `READ_PHASE; + end + endcase + end + `READ_MODE: begin + case(phase) + `READ_PHASE: begin + if(readTarget == `ANY_ADDR) begin + if(anyHasData) begin + mode <= `RUN_MODE; + weWantData = 4'd0; + if(portsHaveData[`UP_ADDR]) begin + readValue <= regVals[`UP_ADDR]; + readAckOut[`UP_ADDR] <= 1; + last <= `UP_ADDR; + end + else if(portsHaveData[`DOWN_ADDR]) begin + readValue <= regVals[`DOWN_ADDR]; + readAckOut[`DOWN_ADDR] <= 1; + last <= `DOWN_ADDR; + end + else if(portsHaveData[`LEFT_ADDR]) begin + readValue <= regVals[`LEFT_ADDR]; + readAckOut[`LEFT_ADDR] <= 1; + last <= `LEFT_ADDR; + end + else if(portsHaveData[`RIGHT_ADDR]) begin + readValue <= regVals[`RIGHT_ADDR]; + readAckOut[`RIGHT_ADDR] <= 1; + last <= `RIGHT_ADDR; + end + end + end//target is not ANY + else begin + if(portsHaveData[readTarget]) begin//readTarget has data now + mode <= `RUN_MODE; + readValue <= regVals[readTarget]; + readAckOut[readTarget] <= 1; + weWantData[readTarget] <= 0; + last <= readTarget; + end end + phase <= `EX_PHASE; end `EX_PHASE: begin + phase <= `WRITE_PHASE; end `WRITE_PHASE: begin + phase <= `READ_PHASE; end endcase end - `READ_MODE: begin - end `WRITE_MODE: begin + case(phase) + `READ_PHASE: begin + phase <= `EX_PHASE; + end + `EX_PHASE: begin + if(writeTarget == `ANY_ADDR) begin + if(anyWantData) begin//someone wants data + if(portsWantData[`UP_ADDR]) begin + writeTarget <= `UP_ADDR; + weHaveData[`UP_ADDR] <= 1; + outVals[`UP_ADDR] <= writeValue; + last <= `UP_ADDR; + end + else if(portsWantData[`DOWN_ADDR]) begin + writeTarget <= `DOWN_ADDR; + weHaveData[`DOWN_ADDR] <= 1; + outVals[`DOWN_ADDR] <= writeValue; + last <= `DOWN_ADDR; + end + else if(portsWantData[`LEFT_ADDR]) begin + writeTarget <= `LEFT_ADDR; + weHaveData[`LEFT_ADDR] <= 1; + outVals[`LEFT_ADDR] <= writeValue; + last <= `LEFT_ADDR; + end + else if(portsWantData[`RIGHT_ADDR]) begin + writeTarget <= `RIGHT_ADDR; + weHaveData[`RIGHT_ADDR] <= 1; + outVals[`RIGHT_ADDR] <= writeValue; + last <= `RIGHT_ADDR; + end + end + end + phase <= `WRITE_PHASE; + end + `WRITE_PHASE: begin + if(writeTarget != `ANY_ADDR) begin//target is not any + if(writeAckIn[writeTarget]) begin//write was acked + weHaveData[writeTarget] = 0; + mode <= `RUN_MODE; + end + end + phase <= `READ_PHASE; + end + endcase end endcase +end + +always @(negedge clk) begin + if(phase == `READ_PHASE && mode == `RUN_MODE && ^PCNEXT !== 1'bx) begin + PC <= PCNEXT; + end + if(phase == `READ_PHASE) begin + readAckOut = 4'd0; + end +end + endmodule + + //writing: set requestWrite high, block until ackWrite goes high //reading: block until dataReady goes high, pulse ackRead From b5a2f78c1d9d873a4f753a138901f50c38bdd968 Mon Sep 17 00:00:00 2001 From: Tobias Shapinsky Date: Mon, 11 Dec 2017 18:48:58 -0500 Subject: [PATCH 07/14] stack memory --- mem.dat | 15 +++++ stackmemory.t.v | 142 ++++++++++++++++++++++++++++++++++++++++++++++++ stackmemory.v | 108 ++++++++++++++++++++++++++++++++---- 3 files changed, 253 insertions(+), 12 deletions(-) create mode 100644 mem.dat create mode 100644 stackmemory.t.v diff --git a/mem.dat b/mem.dat new file mode 100644 index 0000000..e1e3845 --- /dev/null +++ b/mem.dat @@ -0,0 +1,15 @@ +00000000000 +10101110110 +11100100001 +10101110010 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 +00000000000 \ No newline at end of file diff --git a/stackmemory.t.v b/stackmemory.t.v new file mode 100644 index 0000000..fcb0322 --- /dev/null +++ b/stackmemory.t.v @@ -0,0 +1,142 @@ +`include "stackmemory.v" +module stackMemoryTestBench + (); + + reg clk; + reg dutpassed; + wire [14:0] out; + reg [10:0] val; + reg [14:0] in; + reg [3:0] testcase; + reg [2:0] phase; + reg [5:0] counter; + + + always #10 clk = !clk; + + stackMemory #( .loadmemory(1), .initialpointer(4)) dut + ( + .clk(clk), + .in(in), + .out(out) + ); + + + initial begin + $dumpfile("test.vcd"); + $dumpvars(0); + clk <= 0; + dutpassed <= 1; + phase <= `READ_PHASE; + in <= 0; + testcase <= 0; + counter <= 1; + + #30;//time to cycle clock + //Test Case 0: check flags + if(!out[`READ_REQ_BIT] || !out[`WRITE_REQ_BIT] || out[`READ_ACK_BIT] || out[`WRITE_ACK_BIT]) + dutpassed = 0; + in[`WRITE_REQ_BIT] = 1; + testcase = 1; + end + + //Test Case 1: read a value + always @(posedge clk) begin + if(testcase == 1 && phase == `READ_PHASE) begin + val <= out[10:0]; + + if(val != 11'b10101110010) + dutpassed = 0; + in[`WRITE_ACK_BIT] <= 1; + in[`WRITE_REQ_BIT] <= 0; + + testcase = 2; + end + end + + //Test Case 2: write a value + always @(posedge clk) begin + if(testcase == 2 && phase == `WRITE_PHASE) begin + val = 11'hBA; + in[10:0] <= val; + in[`READ_REQ_BIT] <= 1; + end + end + + always @(posedge out[`READ_ACK_BIT]) begin + if(testcase == 2) begin + in[`READ_REQ_BIT] <= 0; + + testcase = 3; + end + end + + //Test Case 3: read that value + always @(posedge clk) begin + if(testcase == 3 && phase == `READ_PHASE) begin + val = out[10:0]; + + if(val != 11'hBA) begin + dutpassed = 0; + end + else begin + in[`WRITE_ACK_BIT] = 1; + testcase = 4; + in[`WRITE_REQ_BIT] = 1; + end + end + end + + //Test Case 4: read until empty + always @(posedge out[`WRITE_ACK_BIT]) begin + if(testcase == 4) + counter = counter +1; + end + + always @(negedge out[`READ_REQ_BIT]) begin + if(testcase == 4) begin + if(counter == 3) begin + in[`WRITE_REQ_BIT] = 0; + counter = 0; + in[10:0] = counter; + in[`READ_REQ_BIT] = 1; + testcase = 5; + end + else + dutpassed = 0; + end + end // always @ (negedge out[`READ_REQ_BIT]) + + //Test Case 5: write until full + always @(posedge out[`READ_ACK_BIT]) begin + if(testcase == 5) begin + counter = counter + 1; + in[10:0] = counter; + end + end + + always @(negedge out[`WRITE_REQ_BIT]) begin + if(testcase == 5) begin + if(counter != 15) + dutpassed = 0; + else begin + $display("DUT Passed"); + $finish(); + end + end + end + + always @(negedge clk) begin + if (phase == `WRITE_PHASE) begin + in[`READ_ACK_BIT] = 0; + in[`WRITE_ACK_BIT] = 0; + end + phase = (phase + 1) % 3; + end + + always @(negedge dutpassed) begin + $display("DUT Failed Test: %d", testcase); + $finish(); + end + +endmodule diff --git a/stackmemory.v b/stackmemory.v index c032ede..17f1331 100644 --- a/stackmemory.v +++ b/stackmemory.v @@ -1,16 +1,100 @@ //acts as read ANY, write ANY in terms of read, write presedence //15 stack entries -module stackmemory(input signed[11:0] up, - input signed[11:0] down - input signed[11:0] left, - input signed[11:0] right, - output signed reg[11:0] upOut, - output signed reg[11:0] downOut, - output signed reg[11:0] leftOut, - output signed reg[11:0] rightOut, - output[3:0] requestWrite, - output[3:0] ackRead, - input[3:0] dataReady, - input[3:0] ackWrite); +`define READ_REQ_BIT 11 +`define WRITE_REQ_BIT 12 +`define READ_ACK_BIT 13 +`define WRITE_ACK_BIT 14 +`define READ_PHASE 2'd0 +`define EX_PHASE 2'd1 +`define WRITE_PHASE 2'd2 +module stackMemory + #( + parameter loadmemory = 0, + parameter memoryfile = "mem.dat", + parameter initialpointer = 0 + ) + (input clk, + input [14:0] in, + output reg [14:0] out); + reg [10:0] mem [15:1]; + reg [3:0] pointer; + reg [2:0] phase; + + initial begin + phase = `READ_PHASE; + pointer = initialpointer; + out = 0; + + if(loadmemory) + $readmemb(memoryfile, mem); + if (pointer > 0) begin + out[10:0] = mem[pointer]; + end + end + + always @(posedge in[`WRITE_ACK_BIT]) begin + pointer = pointer - 1; + if(pointer > 0) begin + out[10:0] = mem[pointer]; + end + end + + always @(posedge in[`READ_ACK_BIT]) begin + pointer = pointer -1; + if (pointer > 0) begin + out[`READ_REQ_BIT] <= 1; + out[10:0] <= mem[pointer]; + end + else + out[`READ_REQ_BIT] <= 0; + end + + always @(pointer) begin + if(pointer < 15) + out[`WRITE_REQ_BIT] <= 1; + else + out[`WRITE_REQ_BIT] <= 0; + + if (pointer > 0) + out[`READ_REQ_BIT] <= 1; + else + out[`READ_REQ_BIT] <= 0; + end // always @ (pointer) + + always @(posedge clk) begin + case(phase) + `READ_PHASE: + if(in[`READ_REQ_BIT]) begin + + if(pointer < 15) begin + pointer = pointer + 1; + mem[pointer] = in[10:0]; + out[`READ_ACK_BIT] <= 1; + end + end + `EX_PHASE: begin + + end + `WRITE_PHASE: + if(pointer > 0) begin + out[10:0] <= mem[pointer]; + if(in[`WRITE_REQ_BIT]) begin + pointer = pointer - 1; + out[`WRITE_ACK_BIT] <= 1; + end + end + + endcase + end // always @ (posedge clk) + + always @(negedge clk) begin + if (phase == `WRITE_PHASE) begin + out[`READ_ACK_BIT] = 0; + out[`WRITE_ACK_BIT] = 0; + end + phase = (phase + 1) % 3; + end + + endmodule From 4baa3155cb791e94a67d0b3453458011d297312f Mon Sep 17 00:00:00 2001 From: Henry Rachootin Date: Mon, 11 Dec 2017 21:08:43 -0500 Subject: [PATCH 08/14] made a bunch of tests --- Makefile | 17 + anyRead/center.dat | 16 + anyRead/down.dat | 16 + anyRead/left.dat | 16 + anyRead/right.dat | 16 + anyRead/test | 6093 ++++++++++++++++++++++++++++++++++++++++++ anyRead/test.asm | 24 + anyRead/test.v | 64 + anyRead/up.dat | 16 + anyWrite/center.dat | 16 + anyWrite/down.dat | 16 + anyWrite/left.dat | 16 + anyWrite/right.dat | 16 + anyWrite/test | 6098 +++++++++++++++++++++++++++++++++++++++++++ anyWrite/test.asm | 24 + anyWrite/test.v | 75 + anyWrite/up.dat | 16 + assembler.py | 51 +- jumpTest/center.dat | 16 + jumpTest/down.dat | 16 + jumpTest/left.dat | 16 + jumpTest/right.dat | 16 + jumpTest/test | 6098 +++++++++++++++++++++++++++++++++++++++++++ jumpTest/test.asm | 31 + jumpTest/test.v | 75 + jumpTest/up.dat | 16 + left.dat | 2 + leftAsm.txt | 4 +- port.v | 23 - regTest/center.dat | 16 + regTest/down.dat | 16 + regTest/left.dat | 16 + regTest/right.dat | 16 + regTest/test | 6098 +++++++++++++++++++++++++++++++++++++++++++ regTest/test.asm | 36 + regTest/test.v | 75 + regTest/up.dat | 16 + right.dat | 5 + rightAsm | 0 rightAsm.txt | 5 + scratch.txt | 103 - stackmemory | 587 +++++ test | 2193 ++++++++++++---- test.vcd | 577 ++++ tis100 | 2448 +++++++++++++++++ tis100.t.v | 6 +- tis100.v | 90 +- 47 files changed, 30532 insertions(+), 690 deletions(-) create mode 100644 Makefile create mode 100644 anyRead/center.dat create mode 100644 anyRead/down.dat create mode 100644 anyRead/left.dat create mode 100644 anyRead/right.dat create mode 100755 anyRead/test create mode 100644 anyRead/test.asm create mode 100644 anyRead/test.v create mode 100644 anyRead/up.dat create mode 100644 anyWrite/center.dat create mode 100644 anyWrite/down.dat create mode 100644 anyWrite/left.dat create mode 100644 anyWrite/right.dat create mode 100755 anyWrite/test create mode 100644 anyWrite/test.asm create mode 100644 anyWrite/test.v create mode 100644 anyWrite/up.dat create mode 100644 jumpTest/center.dat create mode 100644 jumpTest/down.dat create mode 100644 jumpTest/left.dat create mode 100644 jumpTest/right.dat create mode 100755 jumpTest/test create mode 100644 jumpTest/test.asm create mode 100644 jumpTest/test.v create mode 100644 jumpTest/up.dat create mode 100644 left.dat delete mode 100644 port.v create mode 100644 regTest/center.dat create mode 100644 regTest/down.dat create mode 100644 regTest/left.dat create mode 100644 regTest/right.dat create mode 100755 regTest/test create mode 100644 regTest/test.asm create mode 100644 regTest/test.v create mode 100644 regTest/up.dat create mode 100644 right.dat delete mode 100644 rightAsm create mode 100644 rightAsm.txt delete mode 100644 scratch.txt create mode 100755 stackmemory create mode 100644 test.vcd create mode 100755 tis100 diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..08c0ecc --- /dev/null +++ b/Makefile @@ -0,0 +1,17 @@ +test: build + ./anyRead/test + ./anyWrite/test + ./jumpTest/test + ./regTest/test + ./stackmemory + +build: anyRead/test.v anyRead/test.asm + python assembler.py anyRead/test.asm + python assembler.py anyWrite/test.asm + python assembler.py jumpTest/test.asm + python assembler.py regTest/test.asm + iverilog -o anyRead/test anyRead/test.v + iverilog -o anyWrite/test anyWrite/test.v + iverilog -o jumpTest/test jumpTest/test.v + iverilog -o regTest/test regTest/test.v + iverilog -o stackmemory stackmemory.t.v diff --git a/anyRead/center.dat b/anyRead/center.dat new file mode 100644 index 0000000..c0aaf20 --- /dev/null +++ b/anyRead/center.dat @@ -0,0 +1,16 @@ +001100111100000000 +001100111100000000 +001100111100000000 +001100111100000000 +001100111000000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyRead/down.dat b/anyRead/down.dat new file mode 100644 index 0000000..ae53de8 --- /dev/null +++ b/anyRead/down.dat @@ -0,0 +1,16 @@ +010010000000000100 +010010000000000101 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyRead/left.dat b/anyRead/left.dat new file mode 100644 index 0000000..415d0ff --- /dev/null +++ b/anyRead/left.dat @@ -0,0 +1,16 @@ +010001100000000001 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyRead/right.dat b/anyRead/right.dat new file mode 100644 index 0000000..9ac651a --- /dev/null +++ b/anyRead/right.dat @@ -0,0 +1,16 @@ +010001000000000010 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyRead/test b/anyRead/test new file mode 100755 index 0000000..65943e2 --- /dev/null +++ b/anyRead/test @@ -0,0 +1,6093 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2836a60 .scope module, "tis100Test" "tis100Test" 2 2; + .timescale 0 0; +v0x28dc590_0 .net "C2D", 14 0, L_0x2900a30; 1 drivers +v0x28dc6c0_0 .net "C2L", 14 0, L_0x2900750; 1 drivers +v0x28dc7d0_0 .net "C2R", 14 0, L_0x2901120; 1 drivers +v0x28dc8c0_0 .net "C2U", 14 0, L_0x2900480; 1 drivers +v0x28dc9d0_0 .net "D2C", 14 0, L_0x28fc290; 1 drivers +v0x28dcb30_0 .net "L2C", 14 0, L_0x28f0ce0; 1 drivers +v0x28dcc40_0 .net "R2C", 14 0, L_0x28f4280; 1 drivers +v0x28dcd50_0 .net "U2C", 14 0, L_0x28f8730; 1 drivers +v0x28dce60_0 .net/s "accOutCenter", 10 0, L_0x28fd050; 1 drivers +v0x28dcfb0_0 .var "clk", 0 0; +v0x28dd050_0 .var "dutPassed", 0 0; +v0x28dd0f0 .array/s "expected", 6 0, 10 0; +v0x28dd1b0_0 .var "i", 32 0; +S_0x280ede0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x2836a60; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x281f8b0 .param/str "memFile" 0 3 60, "anyRead/center.dat"; +L_0x28fd050 .functor BUFZ 11, v0x2884a60_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28fd2e0 .functor BUFZ 11, v0x2884a60_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28fe110 .functor BUFZ 18, L_0x2900290, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2884a60_0 .var/s "ACC", 10 0; +v0x28c33a0_0 .var/s "BAK", 10 0; +v0x28c3480_0 .net "DST", 2 0, L_0x29015b0; 1 drivers +v0x28c3570_0 .net/s "IMM", 10 0, L_0x2901650; 1 drivers +v0x28c3650_0 .net "INST", 3 0, L_0x2900d90; 1 drivers +v0x28c3780_0 .net "LABEL", 3 0, L_0x2901800; 1 drivers +v0x28c3860_0 .var "PC", 3 0; +v0x28c3940_0 .var "PCNEXT", 3 0; +v0x28c3a20_0 .net "SRC", 2 0, L_0x29013c0; 1 drivers +v0x28c3b90_0 .net *"_s103", 0 0, L_0x28ff5d0; 1 drivers +v0x28c3c70_0 .net *"_s107", 0 0, L_0x28ff4e0; 1 drivers +v0x28c3d50_0 .net *"_s111", 0 0, L_0x28ff7c0; 1 drivers +v0x28c3e30_0 .net *"_s115", 0 0, L_0x28ff6c0; 1 drivers +v0x28c3f10_0 .net *"_s119", 0 0, L_0x28ffa00; 1 drivers +v0x28c3ff0_0 .net *"_s123", 0 0, L_0x28ff8f0; 1 drivers +v0x28c40d0_0 .net *"_s127", 0 0, L_0x28ffbc0; 1 drivers +v0x28c41b0_0 .net *"_s131", 0 0, L_0x28ffaa0; 1 drivers +v0x28c4360_0 .net *"_s135", 0 0, L_0x28ffe20; 1 drivers +v0x28c4400_0 .net *"_s139", 0 0, L_0x28ffcf0; 1 drivers +v0x28c44e0_0 .net *"_s143", 0 0, L_0x2900000; 1 drivers +v0x28c45c0_0 .net *"_s147", 0 0, L_0x28ffec0; 1 drivers +v0x28c46a0_0 .net *"_s151", 0 0, L_0x29001f0; 1 drivers +v0x28c4780_0 .net *"_s155", 0 0, L_0x29000a0; 1 drivers +v0x28c4860_0 .net *"_s159", 0 0, L_0x2900140; 1 drivers +v0x28c4940_0 .net *"_s160", 17 0, L_0x2900290; 1 drivers +v0x28c4a20_0 .net *"_s162", 5 0, L_0x29005f0; 1 drivers +L_0x2b505a79b2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x28c4b00_0 .net *"_s165", 1 0, L_0x2b505a79b2a0; 1 drivers +v0x28c6ad0_2 .array/port v0x28c6ad0, 2; +v0x28c4be0_0 .net *"_s173", 10 0, v0x28c6ad0_2; 1 drivers +v0x28c6ad0_3 .array/port v0x28c6ad0, 3; +v0x28c4cc0_0 .net *"_s179", 10 0, v0x28c6ad0_3; 1 drivers +v0x28c6ad0_0 .array/port v0x28c6ad0, 0; +v0x28c4da0_0 .net *"_s185", 10 0, v0x28c6ad0_0; 1 drivers +v0x28c6ad0_1 .array/port v0x28c6ad0, 1; +v0x28c4e80_0 .net *"_s191", 10 0, v0x28c6ad0_1; 1 drivers +v0x28c4f60_0 .net *"_s23", 0 0, L_0x28fdab0; 1 drivers +v0x28c5040_0 .net *"_s27", 0 0, L_0x28fdb80; 1 drivers +v0x28c4290_0 .net *"_s31", 0 0, L_0x28fdc50; 1 drivers +v0x28c5310_0 .net *"_s36", 0 0, L_0x28fddf0; 1 drivers +v0x28c53f0_0 .net *"_s42", 0 0, L_0x28fdfd0; 1 drivers +v0x28c54d0_0 .net *"_s46", 0 0, L_0x28fe070; 1 drivers +v0x28c55b0_0 .net *"_s50", 0 0, L_0x28fe180; 1 drivers +v0x28c5690_0 .net *"_s55", 0 0, L_0x28fe390; 1 drivers +v0x28c5770_0 .net *"_s61", 0 0, L_0x28fe600; 1 drivers +v0x28c5850_0 .net *"_s65", 0 0, L_0x28fe6a0; 1 drivers +v0x28c5930_0 .net *"_s69", 0 0, L_0x28fe7e0; 1 drivers +v0x28c5a10_0 .net *"_s74", 0 0, L_0x28fe740; 1 drivers +v0x28c5af0_0 .net *"_s80", 0 0, L_0x28fea10; 1 drivers +v0x28c5bd0_0 .net *"_s84", 0 0, L_0x28fedd0; 1 drivers +v0x28c5cb0_0 .net *"_s88", 0 0, L_0x28fec00; 1 drivers +v0x28c5d90_0 .net *"_s93", 0 0, L_0x28fef80; 1 drivers +v0x28c5e70_0 .net *"_s99", 0 0, L_0x28ff200; 1 drivers +v0x28c5f50_0 .net/s "accOut", 10 0, L_0x28fd050; alias, 1 drivers +v0x28c6030_0 .net "anyHasData", 0 0, L_0x28fdee0; 1 drivers +v0x28c60f0_0 .net "anyReadAck", 0 0, L_0x28feb10; 1 drivers +v0x28c61b0_0 .net "anyWantData", 0 0, L_0x28fe480; 1 drivers +v0x28c6270_0 .net "anyWriteAck", 0 0, L_0x28ff440; 1 drivers +v0x28c6330_0 .net "clk", 0 0, v0x28dcfb0_0; 1 drivers +v0x28c63f0_0 .net "down", 14 0, L_0x28fc290; alias, 1 drivers +v0x28c64d0_0 .net "downOut", 14 0, L_0x2900a30; alias, 1 drivers +v0x28c65b0_0 .net "instruction", 17 0, L_0x28fe110; 1 drivers +v0x28c6690 .array "instructions", 15 0, 17 0; +v0x28c6750_0 .var "last", 2 0; +v0x28c6830_0 .net "left", 14 0, L_0x28f0ce0; alias, 1 drivers +v0x28c6910_0 .net "leftOut", 14 0, L_0x2900750; alias, 1 drivers +v0x28c69f0_0 .var "mode", 2 0; +v0x28c6ad0 .array/s "outVals", 2 5, 10 0; +v0x28c6c10_0 .var "phase", 2 0; +v0x28c6cf0_0 .net "portsHaveData", 5 2, L_0x28fdcf0; 1 drivers +v0x28c50e0_0 .net "portsWantData", 5 2, L_0x28fe220; 1 drivers +v0x28c51c0_0 .net "readAckIn", 5 2, L_0x28fe880; 1 drivers +v0x28c71a0_0 .var "readAckOut", 5 2; +v0x28c7240_0 .var "readTarget", 2 0; +v0x28c7320_0 .var/s "readValue", 10 0; +L_0x2b505a79b258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x28c7400 .array "regVals", 0 7; +v0x28c7400_0 .net/s v0x28c7400 0, 10 0, L_0x2b505a79b258; 1 drivers +v0x28c7400_1 .net/s v0x28c7400 1, 10 0, L_0x28fd2e0; 1 drivers +v0x28c7400_2 .net/s v0x28c7400 2, 10 0, L_0x28fd5c0; 1 drivers +v0x28c7400_3 .net/s v0x28c7400 3, 10 0, L_0x28fd6f0; 1 drivers +v0x28c7400_4 .net/s v0x28c7400 4, 10 0, L_0x28fd820; 1 drivers +v0x28c7400_5 .net/s v0x28c7400 5, 10 0, L_0x28fd950; 1 drivers +o0x2b505a76aeb8 .functor BUFZ 11, C4; HiZ drive +v0x28c7400_6 .net/s v0x28c7400 6, 10 0, o0x2b505a76aeb8; 0 drivers +o0x2b505a76aee8 .functor BUFZ 11, C4; HiZ drive +v0x28c7400_7 .net/s v0x28c7400 7, 10 0, o0x2b505a76aee8; 0 drivers +v0x28c7610_0 .net "right", 14 0, L_0x28f4280; alias, 1 drivers +v0x28c76f0_0 .net "rightOut", 14 0, L_0x2901120; alias, 1 drivers +v0x28c77d0_0 .net "up", 14 0, L_0x28f8730; alias, 1 drivers +v0x28c78b0_0 .net "upOut", 14 0, L_0x2900480; alias, 1 drivers +v0x28c7990_0 .var "weHaveData", 5 2; +v0x28c7a70_0 .var "weWantData", 5 2; +v0x28c7b50_0 .net "writeAckIn", 5 2, L_0x28ff160; 1 drivers +v0x28c7c30_0 .var "writeAckOut", 5 2; +v0x28c7d10_0 .var "writeTarget", 2 0; +v0x28c7df0_0 .var/s "writeValue", 10 0; +E_0x281fc70 .event negedge, v0x28c6330_0; +E_0x28423d0 .event posedge, v0x28c6330_0; +L_0x28fd5c0 .part L_0x28f0ce0, 0, 11; +L_0x28fd6f0 .part L_0x28f4280, 0, 11; +L_0x28fd820 .part L_0x28f8730, 0, 11; +L_0x28fd950 .part L_0x28fc290, 0, 11; +L_0x28fdab0 .part L_0x28f0ce0, 11, 1; +L_0x28fdb80 .part L_0x28f4280, 11, 1; +L_0x28fdc50 .part L_0x28f8730, 11, 1; +L_0x28fdcf0 .concat8 [ 1 1 1 1], L_0x28fdab0, L_0x28fdb80, L_0x28fdc50, L_0x28fddf0; +L_0x28fddf0 .part L_0x28fc290, 11, 1; +L_0x28fdee0 .reduce/or L_0x28fdcf0; +L_0x28fdfd0 .part L_0x28f0ce0, 12, 1; +L_0x28fe070 .part L_0x28f4280, 12, 1; +L_0x28fe180 .part L_0x28f8730, 12, 1; +L_0x28fe220 .concat8 [ 1 1 1 1], L_0x28fdfd0, L_0x28fe070, L_0x28fe180, L_0x28fe390; +L_0x28fe390 .part L_0x28fc290, 12, 1; +L_0x28fe480 .reduce/or L_0x28fe220; +L_0x28fe600 .part L_0x28f0ce0, 13, 1; +L_0x28fe6a0 .part L_0x28f4280, 13, 1; +L_0x28fe7e0 .part L_0x28f8730, 13, 1; +L_0x28fe880 .concat8 [ 1 1 1 1], L_0x28fe600, L_0x28fe6a0, L_0x28fe7e0, L_0x28fe740; +L_0x28fe740 .part L_0x28fc290, 13, 1; +L_0x28feb10 .reduce/or L_0x28fe880; +L_0x28fea10 .part L_0x28f0ce0, 14, 1; +L_0x28fedd0 .part L_0x28f4280, 14, 1; +L_0x28fec00 .part L_0x28f8730, 14, 1; +L_0x28ff160 .concat8 [ 1 1 1 1], L_0x28fea10, L_0x28fedd0, L_0x28fec00, L_0x28fef80; +L_0x28fef80 .part L_0x28fc290, 14, 1; +L_0x28ff440 .reduce/or L_0x28ff160; +L_0x28ff200 .part v0x28c71a0_0, 0, 1; +L_0x28ff5d0 .part v0x28c71a0_0, 1, 1; +L_0x28ff4e0 .part v0x28c71a0_0, 2, 1; +L_0x28ff7c0 .part v0x28c71a0_0, 3, 1; +L_0x28ff6c0 .part v0x28c7c30_0, 0, 1; +L_0x28ffa00 .part v0x28c7c30_0, 1, 1; +L_0x28ff8f0 .part v0x28c7c30_0, 2, 1; +L_0x28ffbc0 .part v0x28c7c30_0, 3, 1; +L_0x28ffaa0 .part v0x28c7a70_0, 0, 1; +L_0x28ffe20 .part v0x28c7a70_0, 1, 1; +L_0x28ffcf0 .part v0x28c7a70_0, 2, 1; +L_0x2900000 .part v0x28c7a70_0, 3, 1; +L_0x28ffec0 .part v0x28c7990_0, 0, 1; +L_0x29001f0 .part v0x28c7990_0, 1, 1; +L_0x29000a0 .part v0x28c7990_0, 2, 1; +L_0x2900140 .part v0x28c7990_0, 3, 1; +L_0x2900290 .array/port v0x28c6690, L_0x29005f0; +L_0x29005f0 .concat [ 4 2 0 0], v0x28c3860_0, L_0x2b505a79b2a0; +LS_0x2900480_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_2, L_0x29000a0, L_0x28ffcf0, L_0x28ff8f0; +LS_0x2900480_0_4 .concat8 [ 1 0 0 0], L_0x28ff4e0; +L_0x2900480 .concat8 [ 14 1 0 0], LS_0x2900480_0_0, LS_0x2900480_0_4; +LS_0x2900a30_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_3, L_0x2900140, L_0x2900000, L_0x28ffbc0; +LS_0x2900a30_0_4 .concat8 [ 1 0 0 0], L_0x28ff7c0; +L_0x2900a30 .concat8 [ 14 1 0 0], LS_0x2900a30_0_0, LS_0x2900a30_0_4; +LS_0x2900750_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_0, L_0x28ffec0, L_0x28ffaa0, L_0x28ff6c0; +LS_0x2900750_0_4 .concat8 [ 1 0 0 0], L_0x28ff200; +L_0x2900750 .concat8 [ 14 1 0 0], LS_0x2900750_0_0, LS_0x2900750_0_4; +LS_0x2901120_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_1, L_0x29001f0, L_0x28ffe20, L_0x28ffa00; +LS_0x2901120_0_4 .concat8 [ 1 0 0 0], L_0x28ff5d0; +L_0x2901120 .concat8 [ 14 1 0 0], LS_0x2901120_0_0, LS_0x2901120_0_4; +L_0x2900d90 .part L_0x28fe110, 14, 4; +L_0x29015b0 .part L_0x28fe110, 11, 3; +L_0x29013c0 .part L_0x28fe110, 8, 3; +L_0x2901800 .part L_0x28fe110, 10, 4; +L_0x2901650 .part L_0x28fe110, 0, 11; +S_0x28c8070 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x2836a60; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x28c8260 .param/str "memFile" 0 3 60, "anyRead/down.dat"; +L_0x28f9030 .functor BUFZ 11, v0x28c84e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28f9230 .functor BUFZ 11, v0x28c84e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28fa0e0 .functor BUFZ 18, L_0x28fc020, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x28c84e0_0 .var/s "ACC", 10 0; +v0x28c85e0_0 .var/s "BAK", 10 0; +v0x28c86c0_0 .net "DST", 2 0, L_0x28fd110; 1 drivers +v0x28c8780_0 .net/s "IMM", 10 0, L_0x28fd1b0; 1 drivers +v0x28c8860_0 .net "INST", 3 0, L_0x28fc9f0; 1 drivers +v0x28c8990_0 .net "LABEL", 3 0, L_0x28fd360; 1 drivers +v0x28c8a70_0 .var "PC", 3 0; +v0x28c8b50_0 .var "PCNEXT", 3 0; +v0x28c8c30_0 .net "SRC", 2 0, L_0x28fcf20; 1 drivers +v0x28c8da0_0 .net *"_s103", 0 0, L_0x28fb360; 1 drivers +v0x28c8e80_0 .net *"_s107", 0 0, L_0x28fb270; 1 drivers +v0x28c8f60_0 .net *"_s111", 0 0, L_0x28fb550; 1 drivers +v0x28c9040_0 .net *"_s115", 0 0, L_0x28fb450; 1 drivers +v0x28c9120_0 .net *"_s119", 0 0, L_0x28fb790; 1 drivers +v0x28c9200_0 .net *"_s123", 0 0, L_0x28fb680; 1 drivers +v0x28c92e0_0 .net *"_s127", 0 0, L_0x28fb950; 1 drivers +v0x28c93c0_0 .net *"_s131", 0 0, L_0x28fb830; 1 drivers +v0x28c9570_0 .net *"_s135", 0 0, L_0x28fbbb0; 1 drivers +v0x28c9610_0 .net *"_s139", 0 0, L_0x28fba80; 1 drivers +v0x28c96f0_0 .net *"_s143", 0 0, L_0x28fbd90; 1 drivers +v0x28c97d0_0 .net *"_s147", 0 0, L_0x28fbc50; 1 drivers +v0x28c98b0_0 .net *"_s151", 0 0, L_0x28fbf80; 1 drivers +v0x28c9990_0 .net *"_s155", 0 0, L_0x28fbe30; 1 drivers +v0x28c9a70_0 .net *"_s159", 0 0, L_0x28fbed0; 1 drivers +v0x28c9b50_0 .net *"_s160", 17 0, L_0x28fc020; 1 drivers +v0x28c9c30_0 .net *"_s162", 5 0, L_0x28fc380; 1 drivers +L_0x2b505a79b210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x28c9d10_0 .net *"_s165", 1 0, L_0x2b505a79b210; 1 drivers +v0x28cbca0_2 .array/port v0x28cbca0, 2; +v0x28c9df0_0 .net *"_s173", 10 0, v0x28cbca0_2; 1 drivers +v0x28cbca0_3 .array/port v0x28cbca0, 3; +v0x28c9ed0_0 .net *"_s179", 10 0, v0x28cbca0_3; 1 drivers +v0x28cbca0_0 .array/port v0x28cbca0, 0; +v0x28c9fb0_0 .net *"_s185", 10 0, v0x28cbca0_0; 1 drivers +v0x28cbca0_1 .array/port v0x28cbca0, 1; +v0x28ca090_0 .net *"_s191", 10 0, v0x28cbca0_1; 1 drivers +v0x28ca170_0 .net *"_s23", 0 0, L_0x28f9870; 1 drivers +v0x28ca250_0 .net *"_s27", 0 0, L_0x28f9990; 1 drivers +v0x28c94a0_0 .net *"_s31", 0 0, L_0x28f9a80; 1 drivers +v0x28ca520_0 .net *"_s36", 0 0, L_0x28f9d70; 1 drivers +v0x28ca600_0 .net *"_s42", 0 0, L_0x28f9fa0; 1 drivers +v0x28ca6e0_0 .net *"_s46", 0 0, L_0x28fa040; 1 drivers +v0x28ca7c0_0 .net *"_s50", 0 0, L_0x28fa150; 1 drivers +v0x28ca8a0_0 .net *"_s55", 0 0, L_0x28fa330; 1 drivers +v0x28ca980_0 .net *"_s61", 0 0, L_0x28fa5a0; 1 drivers +v0x28caa60_0 .net *"_s65", 0 0, L_0x28fa6d0; 1 drivers +v0x28cab40_0 .net *"_s69", 0 0, L_0x28fa8a0; 1 drivers +v0x28cac20_0 .net *"_s74", 0 0, L_0x28fa800; 1 drivers +v0x28cad00_0 .net *"_s80", 0 0, L_0x28faa30; 1 drivers +v0x28cade0_0 .net *"_s84", 0 0, L_0x28fad20; 1 drivers +v0x28caec0_0 .net *"_s88", 0 0, L_0x28fac60; 1 drivers +v0x28cafa0_0 .net *"_s93", 0 0, L_0x28fadc0; 1 drivers +v0x28cb080_0 .net *"_s99", 0 0, L_0x28fb050; 1 drivers +v0x28cb160_0 .net/s "accOut", 10 0, L_0x28f9030; 1 drivers +v0x28cb240_0 .net "anyHasData", 0 0, L_0x28f9eb0; 1 drivers +v0x28cb300_0 .net "anyReadAck", 0 0, L_0x28fabc0; 1 drivers +v0x28cb3c0_0 .net "anyWantData", 0 0, L_0x28fa420; 1 drivers +v0x28cb480_0 .net "anyWriteAck", 0 0, L_0x28fb180; 1 drivers +v0x28cb540_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers +o0x2b505a76bcc8 .functor BUFZ 15, C4; HiZ drive +v0x28cb5e0_0 .net "down", 14 0, o0x2b505a76bcc8; 0 drivers +v0x28cb6a0_0 .net "downOut", 14 0, L_0x28fc750; 1 drivers +v0x28cb780_0 .net "instruction", 17 0, L_0x28fa0e0; 1 drivers +v0x28cb860 .array "instructions", 15 0, 17 0; +v0x28cb920_0 .var "last", 2 0; +o0x2b505a76bd88 .functor BUFZ 15, C4; HiZ drive +v0x28cba00_0 .net "left", 14 0, o0x2b505a76bd88; 0 drivers +v0x28cbae0_0 .net "leftOut", 14 0, L_0x28fc4e0; 1 drivers +v0x28cbbc0_0 .var "mode", 2 0; +v0x28cbca0 .array/s "outVals", 2 5, 10 0; +v0x28cbde0_0 .var "phase", 2 0; +v0x28cbec0_0 .net "portsHaveData", 5 2, L_0x28f9bb0; 1 drivers +v0x28ca2f0_0 .net "portsWantData", 5 2, L_0x28fa1f0; 1 drivers +v0x28ca3d0_0 .net "readAckIn", 5 2, L_0x28fa940; 1 drivers +v0x28cc370_0 .var "readAckOut", 5 2; +v0x28cc410_0 .var "readTarget", 2 0; +v0x28cc4b0_0 .var/s "readValue", 10 0; +L_0x2b505a79b1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x28cc550 .array "regVals", 0 7; +v0x28cc550_0 .net/s v0x28cc550 0, 10 0, L_0x2b505a79b1c8; 1 drivers +v0x28cc550_1 .net/s v0x28cc550 1, 10 0, L_0x28f9230; 1 drivers +v0x28cc550_2 .net/s v0x28cc550 2, 10 0, L_0x28f92a0; 1 drivers +v0x28cc550_3 .net/s v0x28cc550 3, 10 0, L_0x28f95a0; 1 drivers +v0x28cc550_4 .net/s v0x28cc550 4, 10 0, L_0x28f9670; 1 drivers +v0x28cc550_5 .net/s v0x28cc550 5, 10 0, L_0x28f9740; 1 drivers +o0x2b505a76c148 .functor BUFZ 11, C4; HiZ drive +v0x28cc550_6 .net/s v0x28cc550 6, 10 0, o0x2b505a76c148; 0 drivers +o0x2b505a76c178 .functor BUFZ 11, C4; HiZ drive +v0x28cc550_7 .net/s v0x28cc550 7, 10 0, o0x2b505a76c178; 0 drivers +o0x2b505a76c1a8 .functor BUFZ 15, C4; HiZ drive +v0x28cc760_0 .net "right", 14 0, o0x2b505a76c1a8; 0 drivers +v0x28cc840_0 .net "rightOut", 14 0, L_0x28fcd00; 1 drivers +v0x28cc920_0 .net "up", 14 0, L_0x2900a30; alias, 1 drivers +v0x28cca10_0 .net "upOut", 14 0, L_0x28fc290; alias, 1 drivers +v0x28ccae0_0 .var "weHaveData", 5 2; +v0x28ccba0_0 .var "weWantData", 5 2; +v0x28ccc80_0 .net "writeAckIn", 5 2, L_0x28fae90; 1 drivers +v0x28ccd60_0 .var "writeAckOut", 5 2; +v0x28cce40_0 .var "writeTarget", 2 0; +v0x28ccf20_0 .var/s "writeValue", 10 0; +L_0x28f92a0 .part o0x2b505a76bd88, 0, 11; +L_0x28f95a0 .part o0x2b505a76c1a8, 0, 11; +L_0x28f9670 .part L_0x2900a30, 0, 11; +L_0x28f9740 .part o0x2b505a76bcc8, 0, 11; +L_0x28f9870 .part o0x2b505a76bd88, 11, 1; +L_0x28f9990 .part o0x2b505a76c1a8, 11, 1; +L_0x28f9a80 .part L_0x2900a30, 11, 1; +L_0x28f9bb0 .concat8 [ 1 1 1 1], L_0x28f9870, L_0x28f9990, L_0x28f9a80, L_0x28f9d70; +L_0x28f9d70 .part o0x2b505a76bcc8, 11, 1; +L_0x28f9eb0 .reduce/or L_0x28f9bb0; +L_0x28f9fa0 .part o0x2b505a76bd88, 12, 1; +L_0x28fa040 .part o0x2b505a76c1a8, 12, 1; +L_0x28fa150 .part L_0x2900a30, 12, 1; +L_0x28fa1f0 .concat8 [ 1 1 1 1], L_0x28f9fa0, L_0x28fa040, L_0x28fa150, L_0x28fa330; +L_0x28fa330 .part o0x2b505a76bcc8, 12, 1; +L_0x28fa420 .reduce/or L_0x28fa1f0; +L_0x28fa5a0 .part o0x2b505a76bd88, 13, 1; +L_0x28fa6d0 .part o0x2b505a76c1a8, 13, 1; +L_0x28fa8a0 .part L_0x2900a30, 13, 1; +L_0x28fa940 .concat8 [ 1 1 1 1], L_0x28fa5a0, L_0x28fa6d0, L_0x28fa8a0, L_0x28fa800; +L_0x28fa800 .part o0x2b505a76bcc8, 13, 1; +L_0x28fabc0 .reduce/or L_0x28fa940; +L_0x28faa30 .part o0x2b505a76bd88, 14, 1; +L_0x28fad20 .part o0x2b505a76c1a8, 14, 1; +L_0x28fac60 .part L_0x2900a30, 14, 1; +L_0x28fae90 .concat8 [ 1 1 1 1], L_0x28faa30, L_0x28fad20, L_0x28fac60, L_0x28fadc0; +L_0x28fadc0 .part o0x2b505a76bcc8, 14, 1; +L_0x28fb180 .reduce/or L_0x28fae90; +L_0x28fb050 .part v0x28cc370_0, 0, 1; +L_0x28fb360 .part v0x28cc370_0, 1, 1; +L_0x28fb270 .part v0x28cc370_0, 2, 1; +L_0x28fb550 .part v0x28cc370_0, 3, 1; +L_0x28fb450 .part v0x28ccd60_0, 0, 1; +L_0x28fb790 .part v0x28ccd60_0, 1, 1; +L_0x28fb680 .part v0x28ccd60_0, 2, 1; +L_0x28fb950 .part v0x28ccd60_0, 3, 1; +L_0x28fb830 .part v0x28ccba0_0, 0, 1; +L_0x28fbbb0 .part v0x28ccba0_0, 1, 1; +L_0x28fba80 .part v0x28ccba0_0, 2, 1; +L_0x28fbd90 .part v0x28ccba0_0, 3, 1; +L_0x28fbc50 .part v0x28ccae0_0, 0, 1; +L_0x28fbf80 .part v0x28ccae0_0, 1, 1; +L_0x28fbe30 .part v0x28ccae0_0, 2, 1; +L_0x28fbed0 .part v0x28ccae0_0, 3, 1; +L_0x28fc020 .array/port v0x28cb860, L_0x28fc380; +L_0x28fc380 .concat [ 4 2 0 0], v0x28c8a70_0, L_0x2b505a79b210; +LS_0x28fc290_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_2, L_0x28fbe30, L_0x28fba80, L_0x28fb680; +LS_0x28fc290_0_4 .concat8 [ 1 0 0 0], L_0x28fb270; +L_0x28fc290 .concat8 [ 14 1 0 0], LS_0x28fc290_0_0, LS_0x28fc290_0_4; +LS_0x28fc750_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_3, L_0x28fbed0, L_0x28fbd90, L_0x28fb950; +LS_0x28fc750_0_4 .concat8 [ 1 0 0 0], L_0x28fb550; +L_0x28fc750 .concat8 [ 14 1 0 0], LS_0x28fc750_0_0, LS_0x28fc750_0_4; +LS_0x28fc4e0_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_0, L_0x28fbc50, L_0x28fb830, L_0x28fb450; +LS_0x28fc4e0_0_4 .concat8 [ 1 0 0 0], L_0x28fb050; +L_0x28fc4e0 .concat8 [ 14 1 0 0], LS_0x28fc4e0_0_0, LS_0x28fc4e0_0_4; +LS_0x28fcd00_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_1, L_0x28fbf80, L_0x28fbbb0, L_0x28fb790; +LS_0x28fcd00_0_4 .concat8 [ 1 0 0 0], L_0x28fb360; +L_0x28fcd00 .concat8 [ 14 1 0 0], LS_0x28fcd00_0_0, LS_0x28fcd00_0_4; +L_0x28fc9f0 .part L_0x28fa0e0, 14, 4; +L_0x28fd110 .part L_0x28fa0e0, 11, 3; +L_0x28fcf20 .part L_0x28fa0e0, 8, 3; +L_0x28fd360 .part L_0x28fa0e0, 10, 4; +L_0x28fd1b0 .part L_0x28fa0e0, 0, 11; +S_0x28cd1a0 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x2836a60; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x28cd3a0 .param/str "memFile" 0 3 60, "anyRead/left.dat"; +L_0x28dd290 .functor BUFZ 11, v0x28cd620_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28ed330 .functor BUFZ 11, v0x28cd620_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28edfc0 .functor BUFZ 18, L_0x28effb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x28cd620_0 .var/s "ACC", 10 0; +v0x28cd720_0 .var/s "BAK", 10 0; +v0x28cd800_0 .net "DST", 2 0, L_0x28f10f0; 1 drivers +v0x28cd8c0_0 .net/s "IMM", 10 0, L_0x28f1190; 1 drivers +v0x28cd9a0_0 .net "INST", 3 0, L_0x28f09d0; 1 drivers +v0x28cdad0_0 .net "LABEL", 3 0, L_0x28f1340; 1 drivers +v0x28cdbb0_0 .var "PC", 3 0; +v0x28cdc90_0 .var "PCNEXT", 3 0; +v0x28cdd70_0 .net "SRC", 2 0, L_0x28f0f00; 1 drivers +v0x28cdee0_0 .net *"_s103", 0 0, L_0x28ef2f0; 1 drivers +v0x28cdfc0_0 .net *"_s107", 0 0, L_0x28ef200; 1 drivers +v0x28ce0a0_0 .net *"_s111", 0 0, L_0x28ef4e0; 1 drivers +v0x28ce180_0 .net *"_s115", 0 0, L_0x28ef3e0; 1 drivers +v0x28ce260_0 .net *"_s119", 0 0, L_0x28ef720; 1 drivers +v0x28ce340_0 .net *"_s123", 0 0, L_0x28ef610; 1 drivers +v0x28ce420_0 .net *"_s127", 0 0, L_0x28ef8e0; 1 drivers +v0x28ce500_0 .net *"_s131", 0 0, L_0x28ef7c0; 1 drivers +v0x28ce6b0_0 .net *"_s135", 0 0, L_0x28efb40; 1 drivers +v0x28ce750_0 .net *"_s139", 0 0, L_0x28efa10; 1 drivers +v0x28ce830_0 .net *"_s143", 0 0, L_0x28efd20; 1 drivers +v0x28ce910_0 .net *"_s147", 0 0, L_0x28efbe0; 1 drivers +v0x28ce9f0_0 .net *"_s151", 0 0, L_0x28eff10; 1 drivers +v0x28cead0_0 .net *"_s155", 0 0, L_0x28efdc0; 1 drivers +v0x28cebb0_0 .net *"_s159", 0 0, L_0x28efe60; 1 drivers +v0x28cec90_0 .net *"_s160", 17 0, L_0x28effb0; 1 drivers +v0x28ced70_0 .net *"_s162", 5 0, L_0x28f0310; 1 drivers +L_0x2b505a79b060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x28cee50_0 .net *"_s165", 1 0, L_0x2b505a79b060; 1 drivers +v0x28d0e00_2 .array/port v0x28d0e00, 2; +v0x28cef30_0 .net *"_s173", 10 0, v0x28d0e00_2; 1 drivers +v0x28d0e00_3 .array/port v0x28d0e00, 3; +v0x28cf010_0 .net *"_s179", 10 0, v0x28d0e00_3; 1 drivers +v0x28d0e00_0 .array/port v0x28d0e00, 0; +v0x28cf0f0_0 .net *"_s185", 10 0, v0x28d0e00_0; 1 drivers +v0x28d0e00_1 .array/port v0x28d0e00, 1; +v0x28cf1d0_0 .net *"_s191", 10 0, v0x28d0e00_1; 1 drivers +v0x28cf2b0_0 .net *"_s23", 0 0, L_0x28ed6b0; 1 drivers +v0x28cf390_0 .net *"_s27", 0 0, L_0x28ed7d0; 1 drivers +v0x28ce5e0_0 .net *"_s31", 0 0, L_0x28ed940; 1 drivers +v0x28cf660_0 .net *"_s36", 0 0, L_0x28edbf0; 1 drivers +v0x28cf740_0 .net *"_s42", 0 0, L_0x28ede80; 1 drivers +v0x28cf820_0 .net *"_s46", 0 0, L_0x28edf20; 1 drivers +v0x28cf900_0 .net *"_s50", 0 0, L_0x28ee030; 1 drivers +v0x28cf9e0_0 .net *"_s55", 0 0, L_0x28ee2c0; 1 drivers +v0x28cfac0_0 .net *"_s61", 0 0, L_0x28ee530; 1 drivers +v0x28cfba0_0 .net *"_s65", 0 0, L_0x28ee660; 1 drivers +v0x28cfc80_0 .net *"_s69", 0 0, L_0x28ee7a0; 1 drivers +v0x28cfd60_0 .net *"_s74", 0 0, L_0x28ee700; 1 drivers +v0x28cfe40_0 .net *"_s80", 0 0, L_0x28ee990; 1 drivers +v0x28cff20_0 .net *"_s84", 0 0, L_0x28eec80; 1 drivers +v0x28d0000_0 .net *"_s88", 0 0, L_0x28eebc0; 1 drivers +v0x28d00e0_0 .net *"_s93", 0 0, L_0x28eed20; 1 drivers +v0x28d01c0_0 .net *"_s99", 0 0, L_0x28eefe0; 1 drivers +v0x28d02a0_0 .net/s "accOut", 10 0, L_0x28dd290; 1 drivers +v0x28d0380_0 .net "anyHasData", 0 0, L_0x28edd30; 1 drivers +v0x28d0440_0 .net "anyReadAck", 0 0, L_0x28eeb20; 1 drivers +v0x28d0500_0 .net "anyWantData", 0 0, L_0x28ee3b0; 1 drivers +v0x28d05c0_0 .net "anyWriteAck", 0 0, L_0x28ef110; 1 drivers +v0x28d0680_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers +o0x2b505a76cef8 .functor BUFZ 15, C4; HiZ drive +v0x28d0720_0 .net "down", 14 0, o0x2b505a76cef8; 0 drivers +v0x28d0800_0 .net "downOut", 14 0, L_0x28f0730; 1 drivers +v0x28d08e0_0 .net "instruction", 17 0, L_0x28edfc0; 1 drivers +v0x28d09c0 .array "instructions", 15 0, 17 0; +v0x28d0a80_0 .var "last", 2 0; +o0x2b505a76cfb8 .functor BUFZ 15, C4; HiZ drive +v0x28d0b60_0 .net "left", 14 0, o0x2b505a76cfb8; 0 drivers +v0x28d0c40_0 .net "leftOut", 14 0, L_0x28f0470; 1 drivers +v0x28d0d20_0 .var "mode", 2 0; +v0x28d0e00 .array/s "outVals", 2 5, 10 0; +v0x28d0f40_0 .var "phase", 2 0; +v0x28d1020_0 .net "portsHaveData", 5 2, L_0x28ed9e0; 1 drivers +v0x28cd480_0 .net "portsWantData", 5 2, L_0x28ee0d0; 1 drivers +v0x28cf470_0 .net "readAckIn", 5 2, L_0x28ee840; 1 drivers +v0x28cf550_0 .var "readAckOut", 5 2; +v0x28d14d0_0 .var "readTarget", 2 0; +v0x28d15b0_0 .var/s "readValue", 10 0; +L_0x2b505a79b018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x28d1690 .array "regVals", 0 7; +v0x28d1690_0 .net/s v0x28d1690 0, 10 0, L_0x2b505a79b018; 1 drivers +v0x28d1690_1 .net/s v0x28d1690 1, 10 0, L_0x28ed330; 1 drivers +v0x28d1690_2 .net/s v0x28d1690 2, 10 0, L_0x28ed3a0; 1 drivers +v0x28d1690_3 .net/s v0x28d1690 3, 10 0, L_0x28ed440; 1 drivers +v0x28d1690_4 .net/s v0x28d1690 4, 10 0, L_0x28ed4e0; 1 drivers +v0x28d1690_5 .net/s v0x28d1690 5, 10 0, L_0x28ed580; 1 drivers +o0x2b505a76d378 .functor BUFZ 11, C4; HiZ drive +v0x28d1690_6 .net/s v0x28d1690 6, 10 0, o0x2b505a76d378; 0 drivers +o0x2b505a76d3a8 .functor BUFZ 11, C4; HiZ drive +v0x28d1690_7 .net/s v0x28d1690 7, 10 0, o0x2b505a76d3a8; 0 drivers +v0x28d18a0_0 .net "right", 14 0, L_0x2900750; alias, 1 drivers +v0x28d1990_0 .net "rightOut", 14 0, L_0x28f0ce0; alias, 1 drivers +o0x2b505a76d3d8 .functor BUFZ 15, C4; HiZ drive +v0x28d1a60_0 .net "up", 14 0, o0x2b505a76d3d8; 0 drivers +v0x28d1b20_0 .net "upOut", 14 0, L_0x28f0220; 1 drivers +v0x28d1c00_0 .var "weHaveData", 5 2; +v0x28d1ce0_0 .var "weWantData", 5 2; +v0x28d1dc0_0 .net "writeAckIn", 5 2, L_0x28eedf0; 1 drivers +v0x28d1ea0_0 .var "writeAckOut", 5 2; +v0x28d1f80_0 .var "writeTarget", 2 0; +v0x28d2060_0 .var/s "writeValue", 10 0; +L_0x28ed3a0 .part o0x2b505a76cfb8, 0, 11; +L_0x28ed440 .part L_0x2900750, 0, 11; +L_0x28ed4e0 .part o0x2b505a76d3d8, 0, 11; +L_0x28ed580 .part o0x2b505a76cef8, 0, 11; +L_0x28ed6b0 .part o0x2b505a76cfb8, 11, 1; +L_0x28ed7d0 .part L_0x2900750, 11, 1; +L_0x28ed940 .part o0x2b505a76d3d8, 11, 1; +L_0x28ed9e0 .concat8 [ 1 1 1 1], L_0x28ed6b0, L_0x28ed7d0, L_0x28ed940, L_0x28edbf0; +L_0x28edbf0 .part o0x2b505a76cef8, 11, 1; +L_0x28edd30 .reduce/or L_0x28ed9e0; +L_0x28ede80 .part o0x2b505a76cfb8, 12, 1; +L_0x28edf20 .part L_0x2900750, 12, 1; +L_0x28ee030 .part o0x2b505a76d3d8, 12, 1; +L_0x28ee0d0 .concat8 [ 1 1 1 1], L_0x28ede80, L_0x28edf20, L_0x28ee030, L_0x28ee2c0; +L_0x28ee2c0 .part o0x2b505a76cef8, 12, 1; +L_0x28ee3b0 .reduce/or L_0x28ee0d0; +L_0x28ee530 .part o0x2b505a76cfb8, 13, 1; +L_0x28ee660 .part L_0x2900750, 13, 1; +L_0x28ee7a0 .part o0x2b505a76d3d8, 13, 1; +L_0x28ee840 .concat8 [ 1 1 1 1], L_0x28ee530, L_0x28ee660, L_0x28ee7a0, L_0x28ee700; +L_0x28ee700 .part o0x2b505a76cef8, 13, 1; +L_0x28eeb20 .reduce/or L_0x28ee840; +L_0x28ee990 .part o0x2b505a76cfb8, 14, 1; +L_0x28eec80 .part L_0x2900750, 14, 1; +L_0x28eebc0 .part o0x2b505a76d3d8, 14, 1; +L_0x28eedf0 .concat8 [ 1 1 1 1], L_0x28ee990, L_0x28eec80, L_0x28eebc0, L_0x28eed20; +L_0x28eed20 .part o0x2b505a76cef8, 14, 1; +L_0x28ef110 .reduce/or L_0x28eedf0; +L_0x28eefe0 .part v0x28cf550_0, 0, 1; +L_0x28ef2f0 .part v0x28cf550_0, 1, 1; +L_0x28ef200 .part v0x28cf550_0, 2, 1; +L_0x28ef4e0 .part v0x28cf550_0, 3, 1; +L_0x28ef3e0 .part v0x28d1ea0_0, 0, 1; +L_0x28ef720 .part v0x28d1ea0_0, 1, 1; +L_0x28ef610 .part v0x28d1ea0_0, 2, 1; +L_0x28ef8e0 .part v0x28d1ea0_0, 3, 1; +L_0x28ef7c0 .part v0x28d1ce0_0, 0, 1; +L_0x28efb40 .part v0x28d1ce0_0, 1, 1; +L_0x28efa10 .part v0x28d1ce0_0, 2, 1; +L_0x28efd20 .part v0x28d1ce0_0, 3, 1; +L_0x28efbe0 .part v0x28d1c00_0, 0, 1; +L_0x28eff10 .part v0x28d1c00_0, 1, 1; +L_0x28efdc0 .part v0x28d1c00_0, 2, 1; +L_0x28efe60 .part v0x28d1c00_0, 3, 1; +L_0x28effb0 .array/port v0x28d09c0, L_0x28f0310; +L_0x28f0310 .concat [ 4 2 0 0], v0x28cdbb0_0, L_0x2b505a79b060; +LS_0x28f0220_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_2, L_0x28efdc0, L_0x28efa10, L_0x28ef610; +LS_0x28f0220_0_4 .concat8 [ 1 0 0 0], L_0x28ef200; +L_0x28f0220 .concat8 [ 14 1 0 0], LS_0x28f0220_0_0, LS_0x28f0220_0_4; +LS_0x28f0730_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_3, L_0x28efe60, L_0x28efd20, L_0x28ef8e0; +LS_0x28f0730_0_4 .concat8 [ 1 0 0 0], L_0x28ef4e0; +L_0x28f0730 .concat8 [ 14 1 0 0], LS_0x28f0730_0_0, LS_0x28f0730_0_4; +LS_0x28f0470_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_0, L_0x28efbe0, L_0x28ef7c0, L_0x28ef3e0; +LS_0x28f0470_0_4 .concat8 [ 1 0 0 0], L_0x28eefe0; +L_0x28f0470 .concat8 [ 14 1 0 0], LS_0x28f0470_0_0, LS_0x28f0470_0_4; +LS_0x28f0ce0_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_1, L_0x28eff10, L_0x28efb40, L_0x28ef720; +LS_0x28f0ce0_0_4 .concat8 [ 1 0 0 0], L_0x28ef2f0; +L_0x28f0ce0 .concat8 [ 14 1 0 0], LS_0x28f0ce0_0_0, LS_0x28f0ce0_0_4; +L_0x28f09d0 .part L_0x28edfc0, 14, 4; +L_0x28f10f0 .part L_0x28edfc0, 11, 3; +L_0x28f0f00 .part L_0x28edfc0, 8, 3; +L_0x28f1340 .part L_0x28edfc0, 10, 4; +L_0x28f1190 .part L_0x28edfc0, 0, 11; +S_0x28d22e0 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x2836a60; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x28d24b0 .param/str "memFile" 0 3 60, "anyRead/right.dat"; +L_0x28f1030 .functor BUFZ 11, v0x28d27a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28f1230 .functor BUFZ 11, v0x28d27a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28f3fb0 .functor BUFZ 18, L_0x28f3dc0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x28d27a0_0 .var/s "ACC", 10 0; +v0x28d28a0_0 .var/s "BAK", 10 0; +v0x28d2980_0 .net "DST", 2 0, L_0x28f4f00; 1 drivers +v0x28d2a40_0 .net/s "IMM", 10 0, L_0x28f4fa0; 1 drivers +v0x28d2b20_0 .net "INST", 3 0, L_0x28f47e0; 1 drivers +v0x28d2c00_0 .net "LABEL", 3 0, L_0x28f5150; 1 drivers +v0x28d2ce0_0 .var "PC", 3 0; +v0x28d2dc0_0 .var "PCNEXT", 3 0; +v0x28d2ea0_0 .net "SRC", 2 0, L_0x28f4d10; 1 drivers +v0x28d3010_0 .net *"_s103", 0 0, L_0x28f3150; 1 drivers +v0x28d30f0_0 .net *"_s107", 0 0, L_0x28f2fc0; 1 drivers +v0x28d31d0_0 .net *"_s111", 0 0, L_0x28f32f0; 1 drivers +v0x28d32b0_0 .net *"_s115", 0 0, L_0x28f31f0; 1 drivers +v0x28d3390_0 .net *"_s119", 0 0, L_0x28f3530; 1 drivers +v0x28d3470_0 .net *"_s123", 0 0, L_0x28f3420; 1 drivers +v0x28d3550_0 .net *"_s127", 0 0, L_0x28f36f0; 1 drivers +v0x28d3630_0 .net *"_s131", 0 0, L_0x28f35d0; 1 drivers +v0x28d37e0_0 .net *"_s135", 0 0, L_0x28f3950; 1 drivers +v0x28d3880_0 .net *"_s139", 0 0, L_0x28f3820; 1 drivers +v0x28d3960_0 .net *"_s143", 0 0, L_0x28f3b30; 1 drivers +v0x28d3a40_0 .net *"_s147", 0 0, L_0x28f39f0; 1 drivers +v0x28d3b20_0 .net *"_s151", 0 0, L_0x28f3d20; 1 drivers +v0x28d3c00_0 .net *"_s155", 0 0, L_0x28f3bd0; 1 drivers +v0x28d3ce0_0 .net *"_s159", 0 0, L_0x28f3c70; 1 drivers +v0x28d3dc0_0 .net *"_s160", 17 0, L_0x28f3dc0; 1 drivers +v0x28d3ea0_0 .net *"_s162", 5 0, L_0x28f4120; 1 drivers +L_0x2b505a79b0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x28d3f80_0 .net *"_s165", 1 0, L_0x2b505a79b0f0; 1 drivers +v0x28d5eb0_2 .array/port v0x28d5eb0, 2; +v0x28d4060_0 .net *"_s173", 10 0, v0x28d5eb0_2; 1 drivers +v0x28d5eb0_3 .array/port v0x28d5eb0, 3; +v0x28d4140_0 .net *"_s179", 10 0, v0x28d5eb0_3; 1 drivers +v0x28d5eb0_0 .array/port v0x28d5eb0, 0; +v0x28d4220_0 .net *"_s185", 10 0, v0x28d5eb0_0; 1 drivers +v0x28d5eb0_1 .array/port v0x28d5eb0, 1; +v0x28d4300_0 .net *"_s191", 10 0, v0x28d5eb0_1; 1 drivers +v0x28d43e0_0 .net *"_s23", 0 0, L_0x28f18a0; 1 drivers +v0x28d44c0_0 .net *"_s27", 0 0, L_0x28f1a00; 1 drivers +v0x28d3710_0 .net *"_s31", 0 0, L_0x28f1ad0; 1 drivers +v0x28d4790_0 .net *"_s36", 0 0, L_0x28f1da0; 1 drivers +v0x28d4870_0 .net *"_s42", 0 0, L_0x28f1fd0; 1 drivers +v0x28d4950_0 .net *"_s46", 0 0, L_0x28f2070; 1 drivers +v0x28d4a30_0 .net *"_s50", 0 0, L_0x28f2180; 1 drivers +v0x28d4b10_0 .net *"_s55", 0 0, L_0x28f2390; 1 drivers +v0x28d4bf0_0 .net *"_s61", 0 0, L_0x28f2600; 1 drivers +v0x28d4cd0_0 .net *"_s65", 0 0, L_0x28f26a0; 1 drivers +v0x28d4db0_0 .net *"_s69", 0 0, L_0x28f2870; 1 drivers +v0x28d4e90_0 .net *"_s74", 0 0, L_0x28f27d0; 1 drivers +v0x28d4f70_0 .net *"_s80", 0 0, L_0x28f2a60; 1 drivers +v0x28d5050_0 .net *"_s84", 0 0, L_0x28f2d50; 1 drivers +v0x28d5130_0 .net *"_s88", 0 0, L_0x28f2c90; 1 drivers +v0x28d5210_0 .net *"_s93", 0 0, L_0x28d17c0; 1 drivers +v0x28d52f0_0 .net *"_s99", 0 0, L_0x28f30b0; 1 drivers +v0x28d53d0_0 .net/s "accOut", 10 0, L_0x28f1030; 1 drivers +v0x28d54b0_0 .net "anyHasData", 0 0, L_0x28f1ee0; 1 drivers +v0x28d5570_0 .net "anyReadAck", 0 0, L_0x28f2bf0; 1 drivers +v0x28d5630_0 .net "anyWantData", 0 0, L_0x28f2480; 1 drivers +v0x28d56f0_0 .net "anyWriteAck", 0 0, L_0x28d68a0; 1 drivers +v0x28d57b0_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers +o0x2b505a76e128 .functor BUFZ 15, C4; HiZ drive +v0x28d5850_0 .net "down", 14 0, o0x2b505a76e128; 0 drivers +v0x28d5930_0 .net "downOut", 14 0, L_0x28f4540; 1 drivers +v0x28d5a10_0 .net "instruction", 17 0, L_0x28f3fb0; 1 drivers +v0x28d5af0 .array "instructions", 15 0, 17 0; +v0x28d5bb0_0 .var "last", 2 0; +v0x28d5c90_0 .net "left", 14 0, L_0x2901120; alias, 1 drivers +v0x28d5d50_0 .net "leftOut", 14 0, L_0x28f4280; alias, 1 drivers +v0x28d5df0_0 .var "mode", 2 0; +v0x28d5eb0 .array/s "outVals", 2 5, 10 0; +v0x28d6020_0 .var "phase", 2 0; +v0x28d6100_0 .net "portsHaveData", 5 2, L_0x28f1bc0; 1 drivers +v0x28d4560_0 .net "portsWantData", 5 2, L_0x28f2220; 1 drivers +v0x28d4640_0 .net "readAckIn", 5 2, L_0x28f2910; 1 drivers +v0x28d65b0_0 .var "readAckOut", 5 2; +v0x28d6650_0 .var "readTarget", 2 0; +v0x28d66f0_0 .var/s "readValue", 10 0; +L_0x2b505a79b0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x28d6790 .array "regVals", 0 7; +v0x28d6790_0 .net/s v0x28d6790 0, 10 0, L_0x2b505a79b0a8; 1 drivers +v0x28d6790_1 .net/s v0x28d6790 1, 10 0, L_0x28f1230; 1 drivers +v0x28d6790_2 .net/s v0x28d6790 2, 10 0, L_0x28f12a0; 1 drivers +v0x28d6790_3 .net/s v0x28d6790 3, 10 0, L_0x28f15a0; 1 drivers +v0x28d6790_4 .net/s v0x28d6790 4, 10 0, L_0x28f1670; 1 drivers +v0x28d6790_5 .net/s v0x28d6790 5, 10 0, L_0x28f1770; 1 drivers +o0x2b505a76e548 .functor BUFZ 11, C4; HiZ drive +v0x28d6790_6 .net/s v0x28d6790 6, 10 0, o0x2b505a76e548; 0 drivers +o0x2b505a76e578 .functor BUFZ 11, C4; HiZ drive +v0x28d6790_7 .net/s v0x28d6790 7, 10 0, o0x2b505a76e578; 0 drivers +o0x2b505a76e5a8 .functor BUFZ 15, C4; HiZ drive +v0x28d69a0_0 .net "right", 14 0, o0x2b505a76e5a8; 0 drivers +v0x28d6a80_0 .net "rightOut", 14 0, L_0x28f4af0; 1 drivers +o0x2b505a76e608 .functor BUFZ 15, C4; HiZ drive +v0x28d6b60_0 .net "up", 14 0, o0x2b505a76e608; 0 drivers +v0x28d6c40_0 .net "upOut", 14 0, L_0x28f4070; 1 drivers +v0x28d6d20_0 .var "weHaveData", 5 2; +v0x28d6e00_0 .var "weWantData", 5 2; +v0x28d6ee0_0 .net "writeAckIn", 5 2, L_0x28f2ec0; 1 drivers +v0x28d6fc0_0 .var "writeAckOut", 5 2; +v0x28d70a0_0 .var "writeTarget", 2 0; +v0x28d7180_0 .var/s "writeValue", 10 0; +L_0x28f12a0 .part L_0x2901120, 0, 11; +L_0x28f15a0 .part o0x2b505a76e5a8, 0, 11; +L_0x28f1670 .part o0x2b505a76e608, 0, 11; +L_0x28f1770 .part o0x2b505a76e128, 0, 11; +L_0x28f18a0 .part L_0x2901120, 11, 1; +L_0x28f1a00 .part o0x2b505a76e5a8, 11, 1; +L_0x28f1ad0 .part o0x2b505a76e608, 11, 1; +L_0x28f1bc0 .concat8 [ 1 1 1 1], L_0x28f18a0, L_0x28f1a00, L_0x28f1ad0, L_0x28f1da0; +L_0x28f1da0 .part o0x2b505a76e128, 11, 1; +L_0x28f1ee0 .reduce/or L_0x28f1bc0; +L_0x28f1fd0 .part L_0x2901120, 12, 1; +L_0x28f2070 .part o0x2b505a76e5a8, 12, 1; +L_0x28f2180 .part o0x2b505a76e608, 12, 1; +L_0x28f2220 .concat8 [ 1 1 1 1], L_0x28f1fd0, L_0x28f2070, L_0x28f2180, L_0x28f2390; +L_0x28f2390 .part o0x2b505a76e128, 12, 1; +L_0x28f2480 .reduce/or L_0x28f2220; +L_0x28f2600 .part L_0x2901120, 13, 1; +L_0x28f26a0 .part o0x2b505a76e5a8, 13, 1; +L_0x28f2870 .part o0x2b505a76e608, 13, 1; +L_0x28f2910 .concat8 [ 1 1 1 1], L_0x28f2600, L_0x28f26a0, L_0x28f2870, L_0x28f27d0; +L_0x28f27d0 .part o0x2b505a76e128, 13, 1; +L_0x28f2bf0 .reduce/or L_0x28f2910; +L_0x28f2a60 .part L_0x2901120, 14, 1; +L_0x28f2d50 .part o0x2b505a76e5a8, 14, 1; +L_0x28f2c90 .part o0x2b505a76e608, 14, 1; +L_0x28f2ec0 .concat8 [ 1 1 1 1], L_0x28f2a60, L_0x28f2d50, L_0x28f2c90, L_0x28d17c0; +L_0x28d17c0 .part o0x2b505a76e128, 14, 1; +L_0x28d68a0 .reduce/or L_0x28f2ec0; +L_0x28f30b0 .part v0x28d65b0_0, 0, 1; +L_0x28f3150 .part v0x28d65b0_0, 1, 1; +L_0x28f2fc0 .part v0x28d65b0_0, 2, 1; +L_0x28f32f0 .part v0x28d65b0_0, 3, 1; +L_0x28f31f0 .part v0x28d6fc0_0, 0, 1; +L_0x28f3530 .part v0x28d6fc0_0, 1, 1; +L_0x28f3420 .part v0x28d6fc0_0, 2, 1; +L_0x28f36f0 .part v0x28d6fc0_0, 3, 1; +L_0x28f35d0 .part v0x28d6e00_0, 0, 1; +L_0x28f3950 .part v0x28d6e00_0, 1, 1; +L_0x28f3820 .part v0x28d6e00_0, 2, 1; +L_0x28f3b30 .part v0x28d6e00_0, 3, 1; +L_0x28f39f0 .part v0x28d6d20_0, 0, 1; +L_0x28f3d20 .part v0x28d6d20_0, 1, 1; +L_0x28f3bd0 .part v0x28d6d20_0, 2, 1; +L_0x28f3c70 .part v0x28d6d20_0, 3, 1; +L_0x28f3dc0 .array/port v0x28d5af0, L_0x28f4120; +L_0x28f4120 .concat [ 4 2 0 0], v0x28d2ce0_0, L_0x2b505a79b0f0; +LS_0x28f4070_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_2, L_0x28f3bd0, L_0x28f3820, L_0x28f3420; +LS_0x28f4070_0_4 .concat8 [ 1 0 0 0], L_0x28f2fc0; +L_0x28f4070 .concat8 [ 14 1 0 0], LS_0x28f4070_0_0, LS_0x28f4070_0_4; +LS_0x28f4540_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_3, L_0x28f3c70, L_0x28f3b30, L_0x28f36f0; +LS_0x28f4540_0_4 .concat8 [ 1 0 0 0], L_0x28f32f0; +L_0x28f4540 .concat8 [ 14 1 0 0], LS_0x28f4540_0_0, LS_0x28f4540_0_4; +LS_0x28f4280_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_0, L_0x28f39f0, L_0x28f35d0, L_0x28f31f0; +LS_0x28f4280_0_4 .concat8 [ 1 0 0 0], L_0x28f30b0; +L_0x28f4280 .concat8 [ 14 1 0 0], LS_0x28f4280_0_0, LS_0x28f4280_0_4; +LS_0x28f4af0_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_1, L_0x28f3d20, L_0x28f3950, L_0x28f3530; +LS_0x28f4af0_0_4 .concat8 [ 1 0 0 0], L_0x28f3150; +L_0x28f4af0 .concat8 [ 14 1 0 0], LS_0x28f4af0_0_0, LS_0x28f4af0_0_4; +L_0x28f47e0 .part L_0x28f3fb0, 14, 4; +L_0x28f4f00 .part L_0x28f3fb0, 11, 3; +L_0x28f4d10 .part L_0x28f3fb0, 8, 3; +L_0x28f5150 .part L_0x28f3fb0, 10, 4; +L_0x28f4fa0 .part L_0x28f3fb0, 0, 11; +S_0x28d7400 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x2836a60; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x28d7620 .param/str "memFile" 0 3 60, "anyRead/up.dat"; +L_0x28f4e40 .functor BUFZ 11, v0x28d7850_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28f5040 .functor BUFZ 11, v0x28d7850_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x28f5f90 .functor BUFZ 18, L_0x28f7fb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x28d7850_0 .var/s "ACC", 10 0; +v0x28d7950_0 .var/s "BAK", 10 0; +v0x28d7a30_0 .net "DST", 2 0, L_0x28f90f0; 1 drivers +v0x28d7af0_0 .net/s "IMM", 10 0, L_0x28f9190; 1 drivers +v0x28d7bd0_0 .net "INST", 3 0, L_0x28f89d0; 1 drivers +v0x28d7d00_0 .net "LABEL", 3 0, L_0x28f9340; 1 drivers +v0x28d7de0_0 .var "PC", 3 0; +v0x28d7ec0_0 .var "PCNEXT", 3 0; +v0x28d7fa0_0 .net "SRC", 2 0, L_0x28f8f00; 1 drivers +v0x28d8110_0 .net *"_s103", 0 0, L_0x28f72f0; 1 drivers +v0x28d81f0_0 .net *"_s107", 0 0, L_0x28f7200; 1 drivers +v0x28d82d0_0 .net *"_s111", 0 0, L_0x28f74e0; 1 drivers +v0x28d83b0_0 .net *"_s115", 0 0, L_0x28f73e0; 1 drivers +v0x28d8490_0 .net *"_s119", 0 0, L_0x28f7720; 1 drivers +v0x28d8570_0 .net *"_s123", 0 0, L_0x28f7610; 1 drivers +v0x28d8650_0 .net *"_s127", 0 0, L_0x28f78e0; 1 drivers +v0x28d8730_0 .net *"_s131", 0 0, L_0x28f77c0; 1 drivers +v0x28d88e0_0 .net *"_s135", 0 0, L_0x28f7b40; 1 drivers +v0x28d8980_0 .net *"_s139", 0 0, L_0x28f7a10; 1 drivers +v0x28d8a60_0 .net *"_s143", 0 0, L_0x28f7d20; 1 drivers +v0x28d8b40_0 .net *"_s147", 0 0, L_0x28f7be0; 1 drivers +v0x28d8c20_0 .net *"_s151", 0 0, L_0x28f7f10; 1 drivers +v0x28d8d00_0 .net *"_s155", 0 0, L_0x28f7dc0; 1 drivers +v0x28d8de0_0 .net *"_s159", 0 0, L_0x28f7e60; 1 drivers +v0x28d8ec0_0 .net *"_s160", 17 0, L_0x28f7fb0; 1 drivers +v0x28d8fa0_0 .net *"_s162", 5 0, L_0x28f8310; 1 drivers +L_0x2b505a79b180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x28d9080_0 .net *"_s165", 1 0, L_0x2b505a79b180; 1 drivers +v0x28db040_2 .array/port v0x28db040, 2; +v0x28d9160_0 .net *"_s173", 10 0, v0x28db040_2; 1 drivers +v0x28db040_3 .array/port v0x28db040, 3; +v0x28d9240_0 .net *"_s179", 10 0, v0x28db040_3; 1 drivers +v0x28db040_0 .array/port v0x28db040, 0; +v0x28d9320_0 .net *"_s185", 10 0, v0x28db040_0; 1 drivers +v0x28db040_1 .array/port v0x28db040, 1; +v0x28d9400_0 .net *"_s191", 10 0, v0x28db040_1; 1 drivers +v0x28d94e0_0 .net *"_s23", 0 0, L_0x28f56f0; 1 drivers +v0x28d95c0_0 .net *"_s27", 0 0, L_0x28f5810; 1 drivers +v0x28d8810_0 .net *"_s31", 0 0, L_0x28f5900; 1 drivers +v0x28d9890_0 .net *"_s36", 0 0, L_0x28f5bd0; 1 drivers +v0x28d9970_0 .net *"_s42", 0 0, L_0x28f5e50; 1 drivers +v0x28d9a50_0 .net *"_s46", 0 0, L_0x28f5ef0; 1 drivers +v0x28d9b30_0 .net *"_s50", 0 0, L_0x28f6000; 1 drivers +v0x28d9c10_0 .net *"_s55", 0 0, L_0x28f62c0; 1 drivers +v0x28d9cf0_0 .net *"_s61", 0 0, L_0x28f6530; 1 drivers +v0x28d9dd0_0 .net *"_s65", 0 0, L_0x28f6660; 1 drivers +v0x28d9eb0_0 .net *"_s69", 0 0, L_0x28f6830; 1 drivers +v0x28d9f90_0 .net *"_s74", 0 0, L_0x28f6790; 1 drivers +v0x28da070_0 .net *"_s80", 0 0, L_0x28f69d0; 1 drivers +v0x28da150_0 .net *"_s84", 0 0, L_0x28f6c80; 1 drivers +v0x28da230_0 .net *"_s88", 0 0, L_0x28f6bc0; 1 drivers +v0x28da310_0 .net *"_s93", 0 0, L_0x28f6d20; 1 drivers +v0x28da3f0_0 .net *"_s99", 0 0, L_0x28f6fe0; 1 drivers +v0x28da4d0_0 .net/s "accOut", 10 0, L_0x28f4e40; 1 drivers +v0x28da5b0_0 .net "anyHasData", 0 0, L_0x28f5d50; 1 drivers +v0x28da670_0 .net "anyReadAck", 0 0, L_0x28f6ad0; 1 drivers +v0x28da730_0 .net "anyWantData", 0 0, L_0x28f63b0; 1 drivers +v0x28da7f0_0 .net "anyWriteAck", 0 0, L_0x28f7110; 1 drivers +v0x28da8b0_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers +v0x28da9e0_0 .net "down", 14 0, L_0x2900480; alias, 1 drivers +v0x28daaa0_0 .net "downOut", 14 0, L_0x28f8730; alias, 1 drivers +v0x28dab40_0 .net "instruction", 17 0, L_0x28f5f90; 1 drivers +v0x28dac00 .array "instructions", 15 0, 17 0; +v0x28dacc0_0 .var "last", 2 0; +o0x2b505a76f3b8 .functor BUFZ 15, C4; HiZ drive +v0x28dada0_0 .net "left", 14 0, o0x2b505a76f3b8; 0 drivers +v0x28dae80_0 .net "leftOut", 14 0, L_0x28f8470; 1 drivers +v0x28daf60_0 .var "mode", 2 0; +v0x28db040 .array/s "outVals", 2 5, 10 0; +v0x28db1b0_0 .var "phase", 2 0; +v0x28db290_0 .net "portsHaveData", 5 2, L_0x28f59f0; 1 drivers +v0x28d9660_0 .net "portsWantData", 5 2, L_0x28f60a0; 1 drivers +v0x28d9740_0 .net "readAckIn", 5 2, L_0x28f68d0; 1 drivers +v0x28db740_0 .var "readAckOut", 5 2; +v0x28db7e0_0 .var "readTarget", 2 0; +v0x28db880_0 .var/s "readValue", 10 0; +L_0x2b505a79b138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x28db920 .array "regVals", 0 7; +v0x28db920_0 .net/s v0x28db920 0, 10 0, L_0x2b505a79b138; 1 drivers +v0x28db920_1 .net/s v0x28db920 1, 10 0, L_0x28f5040; 1 drivers +v0x28db920_2 .net/s v0x28db920 2, 10 0, L_0x28f53b0; 1 drivers +v0x28db920_3 .net/s v0x28db920 3, 10 0, L_0x28f5450; 1 drivers +v0x28db920_4 .net/s v0x28db920 4, 10 0, L_0x28f54f0; 1 drivers +v0x28db920_5 .net/s v0x28db920 5, 10 0, L_0x28f55f0; 1 drivers +o0x2b505a76f778 .functor BUFZ 11, C4; HiZ drive +v0x28db920_6 .net/s v0x28db920 6, 10 0, o0x2b505a76f778; 0 drivers +o0x2b505a76f7a8 .functor BUFZ 11, C4; HiZ drive +v0x28db920_7 .net/s v0x28db920 7, 10 0, o0x2b505a76f7a8; 0 drivers +o0x2b505a76f7d8 .functor BUFZ 15, C4; HiZ drive +v0x28dbb30_0 .net "right", 14 0, o0x2b505a76f7d8; 0 drivers +v0x28dbc10_0 .net "rightOut", 14 0, L_0x28f8ce0; 1 drivers +o0x2b505a76f838 .functor BUFZ 15, C4; HiZ drive +v0x28dbcf0_0 .net "up", 14 0, o0x2b505a76f838; 0 drivers +v0x28dbdd0_0 .net "upOut", 14 0, L_0x28f8220; 1 drivers +v0x28dbeb0_0 .var "weHaveData", 5 2; +v0x28dbf90_0 .var "weWantData", 5 2; +v0x28dc070_0 .net "writeAckIn", 5 2, L_0x28f6df0; 1 drivers +v0x28dc150_0 .var "writeAckOut", 5 2; +v0x28dc230_0 .var "writeTarget", 2 0; +v0x28dc310_0 .var/s "writeValue", 10 0; +L_0x28f53b0 .part o0x2b505a76f3b8, 0, 11; +L_0x28f5450 .part o0x2b505a76f7d8, 0, 11; +L_0x28f54f0 .part o0x2b505a76f838, 0, 11; +L_0x28f55f0 .part L_0x2900480, 0, 11; +L_0x28f56f0 .part o0x2b505a76f3b8, 11, 1; +L_0x28f5810 .part o0x2b505a76f7d8, 11, 1; +L_0x28f5900 .part o0x2b505a76f838, 11, 1; +L_0x28f59f0 .concat8 [ 1 1 1 1], L_0x28f56f0, L_0x28f5810, L_0x28f5900, L_0x28f5bd0; +L_0x28f5bd0 .part L_0x2900480, 11, 1; +L_0x28f5d50 .reduce/or L_0x28f59f0; +L_0x28f5e50 .part o0x2b505a76f3b8, 12, 1; +L_0x28f5ef0 .part o0x2b505a76f7d8, 12, 1; +L_0x28f6000 .part o0x2b505a76f838, 12, 1; +L_0x28f60a0 .concat8 [ 1 1 1 1], L_0x28f5e50, L_0x28f5ef0, L_0x28f6000, L_0x28f62c0; +L_0x28f62c0 .part L_0x2900480, 12, 1; +L_0x28f63b0 .reduce/or L_0x28f60a0; +L_0x28f6530 .part o0x2b505a76f3b8, 13, 1; +L_0x28f6660 .part o0x2b505a76f7d8, 13, 1; +L_0x28f6830 .part o0x2b505a76f838, 13, 1; +L_0x28f68d0 .concat8 [ 1 1 1 1], L_0x28f6530, L_0x28f6660, L_0x28f6830, L_0x28f6790; +L_0x28f6790 .part L_0x2900480, 13, 1; +L_0x28f6ad0 .reduce/or L_0x28f68d0; +L_0x28f69d0 .part o0x2b505a76f3b8, 14, 1; +L_0x28f6c80 .part o0x2b505a76f7d8, 14, 1; +L_0x28f6bc0 .part o0x2b505a76f838, 14, 1; +L_0x28f6df0 .concat8 [ 1 1 1 1], L_0x28f69d0, L_0x28f6c80, L_0x28f6bc0, L_0x28f6d20; +L_0x28f6d20 .part L_0x2900480, 14, 1; +L_0x28f7110 .reduce/or L_0x28f6df0; +L_0x28f6fe0 .part v0x28db740_0, 0, 1; +L_0x28f72f0 .part v0x28db740_0, 1, 1; +L_0x28f7200 .part v0x28db740_0, 2, 1; +L_0x28f74e0 .part v0x28db740_0, 3, 1; +L_0x28f73e0 .part v0x28dc150_0, 0, 1; +L_0x28f7720 .part v0x28dc150_0, 1, 1; +L_0x28f7610 .part v0x28dc150_0, 2, 1; +L_0x28f78e0 .part v0x28dc150_0, 3, 1; +L_0x28f77c0 .part v0x28dbf90_0, 0, 1; +L_0x28f7b40 .part v0x28dbf90_0, 1, 1; +L_0x28f7a10 .part v0x28dbf90_0, 2, 1; +L_0x28f7d20 .part v0x28dbf90_0, 3, 1; +L_0x28f7be0 .part v0x28dbeb0_0, 0, 1; +L_0x28f7f10 .part v0x28dbeb0_0, 1, 1; +L_0x28f7dc0 .part v0x28dbeb0_0, 2, 1; +L_0x28f7e60 .part v0x28dbeb0_0, 3, 1; +L_0x28f7fb0 .array/port v0x28dac00, L_0x28f8310; +L_0x28f8310 .concat [ 4 2 0 0], v0x28d7de0_0, L_0x2b505a79b180; +LS_0x28f8220_0_0 .concat8 [ 11 1 1 1], v0x28db040_2, L_0x28f7dc0, L_0x28f7a10, L_0x28f7610; +LS_0x28f8220_0_4 .concat8 [ 1 0 0 0], L_0x28f7200; +L_0x28f8220 .concat8 [ 14 1 0 0], LS_0x28f8220_0_0, LS_0x28f8220_0_4; +LS_0x28f8730_0_0 .concat8 [ 11 1 1 1], v0x28db040_3, L_0x28f7e60, L_0x28f7d20, L_0x28f78e0; +LS_0x28f8730_0_4 .concat8 [ 1 0 0 0], L_0x28f74e0; +L_0x28f8730 .concat8 [ 14 1 0 0], LS_0x28f8730_0_0, LS_0x28f8730_0_4; +LS_0x28f8470_0_0 .concat8 [ 11 1 1 1], v0x28db040_0, L_0x28f7be0, L_0x28f77c0, L_0x28f73e0; +LS_0x28f8470_0_4 .concat8 [ 1 0 0 0], L_0x28f6fe0; +L_0x28f8470 .concat8 [ 14 1 0 0], LS_0x28f8470_0_0, LS_0x28f8470_0_4; +LS_0x28f8ce0_0_0 .concat8 [ 11 1 1 1], v0x28db040_1, L_0x28f7f10, L_0x28f7b40, L_0x28f7720; +LS_0x28f8ce0_0_4 .concat8 [ 1 0 0 0], L_0x28f72f0; +L_0x28f8ce0 .concat8 [ 14 1 0 0], LS_0x28f8ce0_0_0, LS_0x28f8ce0_0_4; +L_0x28f89d0 .part L_0x28f5f90, 14, 4; +L_0x28f90f0 .part L_0x28f5f90, 11, 3; +L_0x28f8f00 .part L_0x28f5f90, 8, 3; +L_0x28f9340 .part L_0x28f5f90, 10, 4; +L_0x28f9190 .part L_0x28f5f90, 0, 11; + .scope S_0x28cd1a0; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28d0d20_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28d0f40_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28d0a80_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28cd620_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28cd720_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28cdbb0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28cf550_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d1ce0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d1ea0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d1c00_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d0e00, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d0e00, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d0e00, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d0e00, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x28cd3a0, v0x28d09c0 {0 0 0}; + %end; + .thread T_0; + .scope S_0x28cd1a0; +T_1 ; + %wait E_0x28423d0; + %load/vec4 v0x28d0d20_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.2, 6; + %jmp T_1.3; +T_1.0 ; + %load/vec4 v0x28d0f40_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.6, 6; + %jmp T_1.7; +T_1.4 ; + %load/vec4 v0x28cd9a0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_1.8, 5; + %load/vec4 v0x28cdd70_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_1.10, 5; + %load/vec4 v0x28cdd70_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %jmp T_1.11; +T_1.10 ; + %load/vec4 v0x28cdd70_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_1.12, 5; + %load/vec4 v0x28d1020_0; + %load/vec4 v0x28cdd70_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.14, 8; + %load/vec4 v0x28cdd70_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cdd70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %load/vec4 v0x28cdd70_0; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.15; +T_1.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %load/vec4 v0x28cdd70_0; + %assign/vec4 v0x28d14d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cdd70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %load/vec4 v0x28cdd70_0; + %assign/vec4 v0x28d0a80_0, 0; +T_1.15 ; + %jmp T_1.13; +T_1.12 ; + %load/vec4 v0x28cdd70_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.16, 4; + %load/vec4 v0x28d0a80_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_1.18, 4; + %load/vec4 v0x28d0a80_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %jmp T_1.19; +T_1.18 ; + %load/vec4 v0x28d1020_0; + %load/vec4 v0x28d0a80_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.20, 8; + %load/vec4 v0x28d0a80_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d0a80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %jmp T_1.21; +T_1.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %load/vec4 v0x28d0a80_0; + %assign/vec4 v0x28d14d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d0a80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; +T_1.21 ; +T_1.19 ; + %jmp T_1.17; +T_1.16 ; + %load/vec4 v0x28cdd70_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.22, 4; + %load/vec4 v0x28d0380_0; + %flag_set/vec4 8; + %jmp/0xz T_1.24, 8; + %load/vec4 v0x28d1020_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.27; +T_1.26 ; + %load/vec4 v0x28d1020_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.29; +T_1.28 ; + %load/vec4 v0x28d1020_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.31; +T_1.30 ; + %load/vec4 v0x28d1020_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; +T_1.32 ; +T_1.31 ; +T_1.29 ; +T_1.27 ; + %jmp T_1.25; +T_1.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %load/vec4 v0x28cdd70_0; + %assign/vec4 v0x28d14d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; +T_1.25 ; +T_1.22 ; +T_1.17 ; +T_1.13 ; +T_1.11 ; +T_1.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.7; +T_1.5 ; + %load/vec4 v0x28cd9a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_1.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_1.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_1.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_1.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_1.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_1.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_1.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_1.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_1.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_1.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_1.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_1.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_1.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_1.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_1.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_1.49, 6; + %jmp T_1.50; +T_1.34 ; + %load/vec4 v0x28cd620_0; + %load/vec4 v0x28d15b0_0; + %add; + %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.35 ; + %load/vec4 v0x28cd620_0; + %load/vec4 v0x28d15b0_0; + %sub; + %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.36 ; + %load/vec4 v0x28cdbb0_0; + %pad/u 11; + %load/vec4 v0x28d15b0_0; + %add; + %pad/u 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.37 ; + %load/vec4 v0x28d15b0_0; + %assign/vec4 v0x28d2060_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.38 ; + %load/vec4 v0x28cd8c0_0; + %assign/vec4 v0x28d2060_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.39 ; + %load/vec4 v0x28cd620_0; + %load/vec4 v0x28cd8c0_0; + %add; + %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.40 ; + %load/vec4 v0x28cd620_0; + %load/vec4 v0x28cd8c0_0; + %sub; + %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.41 ; + %load/vec4 v0x28cdbb0_0; + %pad/u 11; + %load/vec4 v0x28cd8c0_0; + %add; + %pad/u 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.42 ; + %load/vec4 v0x28cd720_0; + %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x28cd620_0; + %assign/vec4 v0x28cd720_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.43 ; + %load/vec4 v0x28cd620_0; + %assign/vec4 v0x28cd720_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.44 ; + %load/vec4 v0x28cd620_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.45 ; + %load/vec4 v0x28cdad0_0; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.50; +T_1.46 ; + %load/vec4 v0x28cd620_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_1.51, 4; + %load/vec4 v0x28cdad0_0; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.52; +T_1.51 ; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; +T_1.52 ; + %jmp T_1.50; +T_1.47 ; + %load/vec4 v0x28cd620_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_1.53, 4; + %load/vec4 v0x28cdad0_0; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.54; +T_1.53 ; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; +T_1.54 ; + %jmp T_1.50; +T_1.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x28cd620_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_1.55, 5; + %load/vec4 v0x28cdad0_0; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.56; +T_1.55 ; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; +T_1.56 ; + %jmp T_1.50; +T_1.49 ; + %load/vec4 v0x28cd620_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_1.57, 5; + %load/vec4 v0x28cdad0_0; + %assign/vec4 v0x28cdc90_0, 0; + %jmp T_1.58; +T_1.57 ; + %load/vec4 v0x28cdbb0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28cdc90_0, 0; +T_1.58 ; + %jmp T_1.50; +T_1.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.7; +T_1.6 ; + %load/vec4 v0x28cd9a0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x28cd9a0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_1.59, 4; + %load/vec4 v0x28cd800_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x28cd800_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28d0a80_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_1.61, 9; + %load/vec4 v0x28cd800_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_1.63, 4; + %load/vec4 v0x28d2060_0; + %assign/vec4 v0x28cd620_0, 0; +T_1.63 ; + %jmp T_1.62; +T_1.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %load/vec4 v0x28cd800_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.65, 4; + %load/vec4 v0x28d0a80_0; + %assign/vec4 v0x28d1f80_0, 0; + %load/vec4 v0x28d2060_0; + %load/vec4 v0x28d0a80_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d0a80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %jmp T_1.66; +T_1.65 ; + %load/vec4 v0x28cd800_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.67, 4; + %load/vec4 v0x28cd800_0; + %assign/vec4 v0x28d1f80_0, 0; + %load/vec4 v0x28d2060_0; + %load/vec4 v0x28cd800_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cd800_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28cd800_0; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.68; +T_1.67 ; + %load/vec4 v0x28d0500_0; + %flag_set/vec4 8; + %jmp/0xz T_1.69, 8; + %load/vec4 v0x28cd480_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.72; +T_1.71 ; + %load/vec4 v0x28cd480_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.74; +T_1.73 ; + %load/vec4 v0x28cd480_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.76; +T_1.75 ; + %load/vec4 v0x28cd480_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; +T_1.77 ; +T_1.76 ; +T_1.74 ; +T_1.72 ; + %jmp T_1.70; +T_1.69 ; + %load/vec4 v0x28cd800_0; + %assign/vec4 v0x28d1f80_0, 0; +T_1.70 ; +T_1.68 ; +T_1.66 ; +T_1.62 ; +T_1.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.7; +T_1.7 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.1 ; + %load/vec4 v0x28d0f40_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.81, 6; + %jmp T_1.82; +T_1.79 ; + %load/vec4 v0x28d14d0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.83, 4; + %load/vec4 v0x28d0380_0; + %flag_set/vec4 8; + %jmp/0xz T_1.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d1ce0_0, 0, 4; + %load/vec4 v0x28d1020_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.88; +T_1.87 ; + %load/vec4 v0x28d1020_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.90; +T_1.89 ; + %load/vec4 v0x28d1020_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.92; +T_1.91 ; + %load/vec4 v0x28d1020_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; +T_1.93 ; +T_1.92 ; +T_1.90 ; +T_1.88 ; +T_1.85 ; + %jmp T_1.84; +T_1.83 ; + %load/vec4 v0x28d1020_0; + %load/vec4 v0x28d14d0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %load/vec4 v0x28d14d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d1690, 4; + %assign/vec4 v0x28d15b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d14d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28cf550_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d14d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %load/vec4 v0x28d14d0_0; + %assign/vec4 v0x28d0a80_0, 0; +T_1.95 ; +T_1.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.82; +T_1.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.82; +T_1.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.82; +T_1.82 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.2 ; + %load/vec4 v0x28d0f40_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.99, 6; + %jmp T_1.100; +T_1.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.100; +T_1.98 ; + %load/vec4 v0x28d1f80_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.101, 4; + %load/vec4 v0x28d0500_0; + %flag_set/vec4 8; + %jmp/0xz T_1.103, 8; + %load/vec4 v0x28cd480_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.106; +T_1.105 ; + %load/vec4 v0x28cd480_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.108; +T_1.107 ; + %load/vec4 v0x28cd480_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; + %jmp T_1.110; +T_1.109 ; + %load/vec4 v0x28cd480_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d1f80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %load/vec4 v0x28d2060_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d0e00, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d0a80_0, 0; +T_1.111 ; +T_1.110 ; +T_1.108 ; +T_1.106 ; +T_1.103 ; +T_1.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.100; +T_1.99 ; + %load/vec4 v0x28d1f80_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.113, 4; + %load/vec4 v0x28d1dc0_0; + %load/vec4 v0x28d1f80_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x28d1f80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x28d1c00_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d0d20_0, 0; + %load/vec4 v0x28d1f80_0; + %assign/vec4 v0x28d0a80_0, 0; +T_1.115 ; +T_1.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d0f40_0, 0; + %jmp T_1.100; +T_1.100 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.3 ; + %pop/vec4 1; + %jmp T_1; + .thread T_1; + .scope S_0x28cd1a0; +T_2 ; + %wait E_0x281fc70; + %load/vec4 v0x28d0f40_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28d0d20_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x28cdc90_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_2.0, 8; + %load/vec4 v0x28cdc90_0; + %assign/vec4 v0x28cdbb0_0, 0; +T_2.0 ; + %load/vec4 v0x28d0f40_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_2.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28cf550_0, 0, 4; +T_2.2 ; + %jmp T_2; + .thread T_2; + .scope S_0x28d22e0; +T_3 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28d5df0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28d6020_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28d5bb0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28d27a0_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28d28a0_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d2ce0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d65b0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d6e00_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d6fc0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d6d20_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d5eb0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d5eb0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d5eb0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28d5eb0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x28d24b0, v0x28d5af0 {0 0 0}; + %end; + .thread T_3; + .scope S_0x28d22e0; +T_4 ; + %wait E_0x28423d0; + %load/vec4 v0x28d5df0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x28d6020_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.6, 6; + %jmp T_4.7; +T_4.4 ; + %load/vec4 v0x28d2b20_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x28d2ea0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_4.10, 5; + %load/vec4 v0x28d2ea0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %jmp T_4.11; +T_4.10 ; + %load/vec4 v0x28d2ea0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_4.12, 5; + %load/vec4 v0x28d6100_0; + %load/vec4 v0x28d2ea0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.14, 8; + %load/vec4 v0x28d2ea0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d2ea0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %load/vec4 v0x28d2ea0_0; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.15; +T_4.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %load/vec4 v0x28d2ea0_0; + %assign/vec4 v0x28d6650_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d2ea0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %load/vec4 v0x28d2ea0_0; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.15 ; + %jmp T_4.13; +T_4.12 ; + %load/vec4 v0x28d2ea0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.16, 4; + %load/vec4 v0x28d5bb0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_4.18, 4; + %load/vec4 v0x28d5bb0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %jmp T_4.19; +T_4.18 ; + %load/vec4 v0x28d6100_0; + %load/vec4 v0x28d5bb0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.20, 8; + %load/vec4 v0x28d5bb0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d5bb0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %jmp T_4.21; +T_4.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %load/vec4 v0x28d5bb0_0; + %assign/vec4 v0x28d6650_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d5bb0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; +T_4.21 ; +T_4.19 ; + %jmp T_4.17; +T_4.16 ; + %load/vec4 v0x28d2ea0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.22, 4; + %load/vec4 v0x28d54b0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.24, 8; + %load/vec4 v0x28d6100_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.27; +T_4.26 ; + %load/vec4 v0x28d6100_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.29; +T_4.28 ; + %load/vec4 v0x28d6100_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.31; +T_4.30 ; + %load/vec4 v0x28d6100_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.32 ; +T_4.31 ; +T_4.29 ; +T_4.27 ; + %jmp T_4.25; +T_4.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %load/vec4 v0x28d2ea0_0; + %assign/vec4 v0x28d6650_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; +T_4.25 ; +T_4.22 ; +T_4.17 ; +T_4.13 ; +T_4.11 ; +T_4.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.7; +T_4.5 ; + %load/vec4 v0x28d2b20_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_4.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_4.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_4.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_4.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_4.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_4.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_4.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_4.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_4.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_4.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_4.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_4.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_4.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_4.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_4.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_4.49, 6; + %jmp T_4.50; +T_4.34 ; + %load/vec4 v0x28d27a0_0; + %load/vec4 v0x28d66f0_0; + %add; + %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.35 ; + %load/vec4 v0x28d27a0_0; + %load/vec4 v0x28d66f0_0; + %sub; + %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.36 ; + %load/vec4 v0x28d2ce0_0; + %pad/u 11; + %load/vec4 v0x28d66f0_0; + %add; + %pad/u 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.37 ; + %load/vec4 v0x28d66f0_0; + %assign/vec4 v0x28d7180_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.38 ; + %load/vec4 v0x28d2a40_0; + %assign/vec4 v0x28d7180_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.39 ; + %load/vec4 v0x28d27a0_0; + %load/vec4 v0x28d2a40_0; + %add; + %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.40 ; + %load/vec4 v0x28d27a0_0; + %load/vec4 v0x28d2a40_0; + %sub; + %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.41 ; + %load/vec4 v0x28d2ce0_0; + %pad/u 11; + %load/vec4 v0x28d2a40_0; + %add; + %pad/u 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.42 ; + %load/vec4 v0x28d28a0_0; + %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x28d27a0_0; + %assign/vec4 v0x28d28a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.43 ; + %load/vec4 v0x28d27a0_0; + %assign/vec4 v0x28d28a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.44 ; + %load/vec4 v0x28d27a0_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.45 ; + %load/vec4 v0x28d2c00_0; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.50; +T_4.46 ; + %load/vec4 v0x28d27a0_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_4.51, 4; + %load/vec4 v0x28d2c00_0; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.52; +T_4.51 ; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; +T_4.52 ; + %jmp T_4.50; +T_4.47 ; + %load/vec4 v0x28d27a0_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_4.53, 4; + %load/vec4 v0x28d2c00_0; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.54; +T_4.53 ; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; +T_4.54 ; + %jmp T_4.50; +T_4.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x28d27a0_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_4.55, 5; + %load/vec4 v0x28d2c00_0; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.56; +T_4.55 ; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; +T_4.56 ; + %jmp T_4.50; +T_4.49 ; + %load/vec4 v0x28d27a0_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_4.57, 5; + %load/vec4 v0x28d2c00_0; + %assign/vec4 v0x28d2dc0_0, 0; + %jmp T_4.58; +T_4.57 ; + %load/vec4 v0x28d2ce0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d2dc0_0, 0; +T_4.58 ; + %jmp T_4.50; +T_4.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.7; +T_4.6 ; + %load/vec4 v0x28d2b20_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x28d2b20_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_4.59, 4; + %load/vec4 v0x28d2980_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x28d2980_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28d5bb0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_4.61, 9; + %load/vec4 v0x28d2980_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_4.63, 4; + %load/vec4 v0x28d7180_0; + %assign/vec4 v0x28d27a0_0, 0; +T_4.63 ; + %jmp T_4.62; +T_4.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %load/vec4 v0x28d2980_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.65, 4; + %load/vec4 v0x28d5bb0_0; + %assign/vec4 v0x28d70a0_0, 0; + %load/vec4 v0x28d7180_0; + %load/vec4 v0x28d5bb0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d5bb0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %jmp T_4.66; +T_4.65 ; + %load/vec4 v0x28d2980_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.67, 4; + %load/vec4 v0x28d2980_0; + %assign/vec4 v0x28d70a0_0, 0; + %load/vec4 v0x28d7180_0; + %load/vec4 v0x28d2980_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d2980_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d2980_0; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.68; +T_4.67 ; + %load/vec4 v0x28d5630_0; + %flag_set/vec4 8; + %jmp/0xz T_4.69, 8; + %load/vec4 v0x28d4560_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.72; +T_4.71 ; + %load/vec4 v0x28d4560_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.74; +T_4.73 ; + %load/vec4 v0x28d4560_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.76; +T_4.75 ; + %load/vec4 v0x28d4560_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.77 ; +T_4.76 ; +T_4.74 ; +T_4.72 ; + %jmp T_4.70; +T_4.69 ; + %load/vec4 v0x28d2980_0; + %assign/vec4 v0x28d70a0_0, 0; +T_4.70 ; +T_4.68 ; +T_4.66 ; +T_4.62 ; +T_4.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.7; +T_4.7 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.1 ; + %load/vec4 v0x28d6020_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.81, 6; + %jmp T_4.82; +T_4.79 ; + %load/vec4 v0x28d6650_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.83, 4; + %load/vec4 v0x28d54b0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d6e00_0, 0, 4; + %load/vec4 v0x28d6100_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.88; +T_4.87 ; + %load/vec4 v0x28d6100_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.90; +T_4.89 ; + %load/vec4 v0x28d6100_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.92; +T_4.91 ; + %load/vec4 v0x28d6100_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.93 ; +T_4.92 ; +T_4.90 ; +T_4.88 ; +T_4.85 ; + %jmp T_4.84; +T_4.83 ; + %load/vec4 v0x28d6100_0; + %load/vec4 v0x28d6650_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %load/vec4 v0x28d6650_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28d6790, 4; + %assign/vec4 v0x28d66f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d6650_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d6650_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %load/vec4 v0x28d6650_0; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.95 ; +T_4.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.82; +T_4.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.82; +T_4.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.82; +T_4.82 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.2 ; + %load/vec4 v0x28d6020_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.99, 6; + %jmp T_4.100; +T_4.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.100; +T_4.98 ; + %load/vec4 v0x28d70a0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.101, 4; + %load/vec4 v0x28d5630_0; + %flag_set/vec4 8; + %jmp/0xz T_4.103, 8; + %load/vec4 v0x28d4560_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.106; +T_4.105 ; + %load/vec4 v0x28d4560_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.108; +T_4.107 ; + %load/vec4 v0x28d4560_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; + %jmp T_4.110; +T_4.109 ; + %load/vec4 v0x28d4560_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d70a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %load/vec4 v0x28d7180_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28d5eb0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.111 ; +T_4.110 ; +T_4.108 ; +T_4.106 ; +T_4.103 ; +T_4.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.100; +T_4.99 ; + %load/vec4 v0x28d70a0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.113, 4; + %load/vec4 v0x28d6ee0_0; + %load/vec4 v0x28d70a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x28d70a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x28d6d20_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d5df0_0, 0; + %load/vec4 v0x28d70a0_0; + %assign/vec4 v0x28d5bb0_0, 0; +T_4.115 ; +T_4.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28d6020_0, 0; + %jmp T_4.100; +T_4.100 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x28d22e0; +T_5 ; + %wait E_0x281fc70; + %load/vec4 v0x28d6020_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28d5df0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x28d2dc0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %load/vec4 v0x28d2dc0_0; + %assign/vec4 v0x28d2ce0_0, 0; +T_5.0 ; + %load/vec4 v0x28d6020_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_5.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d65b0_0, 0, 4; +T_5.2 ; + %jmp T_5; + .thread T_5; + .scope S_0x28d7400; +T_6 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28daf60_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28db1b0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28dacc0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28d7850_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28d7950_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28d7de0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28db740_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28dbf90_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28dc150_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28dbeb0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28db040, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28db040, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28db040, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28db040, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x28d7620, v0x28dac00 {0 0 0}; + %end; + .thread T_6; + .scope S_0x28d7400; +T_7 ; + %wait E_0x28423d0; + %load/vec4 v0x28daf60_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.2, 6; + %jmp T_7.3; +T_7.0 ; + %load/vec4 v0x28db1b0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.6, 6; + %jmp T_7.7; +T_7.4 ; + %load/vec4 v0x28d7bd0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_7.8, 5; + %load/vec4 v0x28d7fa0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_7.10, 5; + %load/vec4 v0x28d7fa0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %jmp T_7.11; +T_7.10 ; + %load/vec4 v0x28d7fa0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_7.12, 5; + %load/vec4 v0x28db290_0; + %load/vec4 v0x28d7fa0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.14, 8; + %load/vec4 v0x28d7fa0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d7fa0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %load/vec4 v0x28d7fa0_0; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.15; +T_7.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %load/vec4 v0x28d7fa0_0; + %assign/vec4 v0x28db7e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d7fa0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %load/vec4 v0x28d7fa0_0; + %assign/vec4 v0x28dacc0_0, 0; +T_7.15 ; + %jmp T_7.13; +T_7.12 ; + %load/vec4 v0x28d7fa0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.16, 4; + %load/vec4 v0x28dacc0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_7.18, 4; + %load/vec4 v0x28dacc0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %jmp T_7.19; +T_7.18 ; + %load/vec4 v0x28db290_0; + %load/vec4 v0x28dacc0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.20, 8; + %load/vec4 v0x28dacc0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28dacc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %jmp T_7.21; +T_7.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %load/vec4 v0x28dacc0_0; + %assign/vec4 v0x28db7e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28dacc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; +T_7.21 ; +T_7.19 ; + %jmp T_7.17; +T_7.16 ; + %load/vec4 v0x28d7fa0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.22, 4; + %load/vec4 v0x28da5b0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.24, 8; + %load/vec4 v0x28db290_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.27; +T_7.26 ; + %load/vec4 v0x28db290_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.29; +T_7.28 ; + %load/vec4 v0x28db290_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.31; +T_7.30 ; + %load/vec4 v0x28db290_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; +T_7.32 ; +T_7.31 ; +T_7.29 ; +T_7.27 ; + %jmp T_7.25; +T_7.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %load/vec4 v0x28d7fa0_0; + %assign/vec4 v0x28db7e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; +T_7.25 ; +T_7.22 ; +T_7.17 ; +T_7.13 ; +T_7.11 ; +T_7.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.7; +T_7.5 ; + %load/vec4 v0x28d7bd0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_7.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_7.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_7.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_7.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_7.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_7.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_7.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_7.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_7.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_7.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_7.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_7.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_7.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_7.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_7.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_7.49, 6; + %jmp T_7.50; +T_7.34 ; + %load/vec4 v0x28d7850_0; + %load/vec4 v0x28db880_0; + %add; + %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.35 ; + %load/vec4 v0x28d7850_0; + %load/vec4 v0x28db880_0; + %sub; + %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.36 ; + %load/vec4 v0x28d7de0_0; + %pad/u 11; + %load/vec4 v0x28db880_0; + %add; + %pad/u 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.37 ; + %load/vec4 v0x28db880_0; + %assign/vec4 v0x28dc310_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.38 ; + %load/vec4 v0x28d7af0_0; + %assign/vec4 v0x28dc310_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.39 ; + %load/vec4 v0x28d7850_0; + %load/vec4 v0x28d7af0_0; + %add; + %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.40 ; + %load/vec4 v0x28d7850_0; + %load/vec4 v0x28d7af0_0; + %sub; + %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.41 ; + %load/vec4 v0x28d7de0_0; + %pad/u 11; + %load/vec4 v0x28d7af0_0; + %add; + %pad/u 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.42 ; + %load/vec4 v0x28d7950_0; + %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x28d7850_0; + %assign/vec4 v0x28d7950_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.43 ; + %load/vec4 v0x28d7850_0; + %assign/vec4 v0x28d7950_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.44 ; + %load/vec4 v0x28d7850_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.45 ; + %load/vec4 v0x28d7d00_0; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.50; +T_7.46 ; + %load/vec4 v0x28d7850_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_7.51, 4; + %load/vec4 v0x28d7d00_0; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.52; +T_7.51 ; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; +T_7.52 ; + %jmp T_7.50; +T_7.47 ; + %load/vec4 v0x28d7850_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_7.53, 4; + %load/vec4 v0x28d7d00_0; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.54; +T_7.53 ; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; +T_7.54 ; + %jmp T_7.50; +T_7.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x28d7850_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_7.55, 5; + %load/vec4 v0x28d7d00_0; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.56; +T_7.55 ; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; +T_7.56 ; + %jmp T_7.50; +T_7.49 ; + %load/vec4 v0x28d7850_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_7.57, 5; + %load/vec4 v0x28d7d00_0; + %assign/vec4 v0x28d7ec0_0, 0; + %jmp T_7.58; +T_7.57 ; + %load/vec4 v0x28d7de0_0; + %addi 1, 0, 4; + %assign/vec4 v0x28d7ec0_0, 0; +T_7.58 ; + %jmp T_7.50; +T_7.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.7; +T_7.6 ; + %load/vec4 v0x28d7bd0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x28d7bd0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_7.59, 4; + %load/vec4 v0x28d7a30_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x28d7a30_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28dacc0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_7.61, 9; + %load/vec4 v0x28d7a30_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_7.63, 4; + %load/vec4 v0x28dc310_0; + %assign/vec4 v0x28d7850_0, 0; +T_7.63 ; + %jmp T_7.62; +T_7.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %load/vec4 v0x28d7a30_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.65, 4; + %load/vec4 v0x28dacc0_0; + %assign/vec4 v0x28dc230_0, 0; + %load/vec4 v0x28dc310_0; + %load/vec4 v0x28dacc0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28dacc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %jmp T_7.66; +T_7.65 ; + %load/vec4 v0x28d7a30_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.67, 4; + %load/vec4 v0x28d7a30_0; + %assign/vec4 v0x28dc230_0, 0; + %load/vec4 v0x28dc310_0; + %load/vec4 v0x28d7a30_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28d7a30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28d7a30_0; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.68; +T_7.67 ; + %load/vec4 v0x28da730_0; + %flag_set/vec4 8; + %jmp/0xz T_7.69, 8; + %load/vec4 v0x28d9660_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.72; +T_7.71 ; + %load/vec4 v0x28d9660_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.74; +T_7.73 ; + %load/vec4 v0x28d9660_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.76; +T_7.75 ; + %load/vec4 v0x28d9660_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; +T_7.77 ; +T_7.76 ; +T_7.74 ; +T_7.72 ; + %jmp T_7.70; +T_7.69 ; + %load/vec4 v0x28d7a30_0; + %assign/vec4 v0x28dc230_0, 0; +T_7.70 ; +T_7.68 ; +T_7.66 ; +T_7.62 ; +T_7.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.7; +T_7.7 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.1 ; + %load/vec4 v0x28db1b0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.81, 6; + %jmp T_7.82; +T_7.79 ; + %load/vec4 v0x28db7e0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.83, 4; + %load/vec4 v0x28da5b0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28dbf90_0, 0, 4; + %load/vec4 v0x28db290_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.88; +T_7.87 ; + %load/vec4 v0x28db290_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.90; +T_7.89 ; + %load/vec4 v0x28db290_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.92; +T_7.91 ; + %load/vec4 v0x28db290_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; +T_7.93 ; +T_7.92 ; +T_7.90 ; +T_7.88 ; +T_7.85 ; + %jmp T_7.84; +T_7.83 ; + %load/vec4 v0x28db290_0; + %load/vec4 v0x28db7e0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %load/vec4 v0x28db7e0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28db920, 4; + %assign/vec4 v0x28db880_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28db7e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28db740_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28db7e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %load/vec4 v0x28db7e0_0; + %assign/vec4 v0x28dacc0_0, 0; +T_7.95 ; +T_7.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.82; +T_7.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.82; +T_7.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.82; +T_7.82 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.2 ; + %load/vec4 v0x28db1b0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.99, 6; + %jmp T_7.100; +T_7.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.100; +T_7.98 ; + %load/vec4 v0x28dc230_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.101, 4; + %load/vec4 v0x28da730_0; + %flag_set/vec4 8; + %jmp/0xz T_7.103, 8; + %load/vec4 v0x28d9660_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.106; +T_7.105 ; + %load/vec4 v0x28d9660_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.108; +T_7.107 ; + %load/vec4 v0x28d9660_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; + %jmp T_7.110; +T_7.109 ; + %load/vec4 v0x28d9660_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28dc230_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %load/vec4 v0x28dc310_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28db040, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28dacc0_0, 0; +T_7.111 ; +T_7.110 ; +T_7.108 ; +T_7.106 ; +T_7.103 ; +T_7.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.100; +T_7.99 ; + %load/vec4 v0x28dc230_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.113, 4; + %load/vec4 v0x28dc070_0; + %load/vec4 v0x28dc230_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x28dc230_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x28dbeb0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28daf60_0, 0; + %load/vec4 v0x28dc230_0; + %assign/vec4 v0x28dacc0_0, 0; +T_7.115 ; +T_7.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28db1b0_0, 0; + %jmp T_7.100; +T_7.100 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.3 ; + %pop/vec4 1; + %jmp T_7; + .thread T_7; + .scope S_0x28d7400; +T_8 ; + %wait E_0x281fc70; + %load/vec4 v0x28db1b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28daf60_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x28d7ec0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_8.0, 8; + %load/vec4 v0x28d7ec0_0; + %assign/vec4 v0x28d7de0_0, 0; +T_8.0 ; + %load/vec4 v0x28db1b0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_8.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28db740_0, 0, 4; +T_8.2 ; + %jmp T_8; + .thread T_8; + .scope S_0x28c8070; +T_9 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28cbbc0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28cbde0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28cb920_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28c84e0_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28c85e0_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c8a70_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28cc370_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28ccba0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28ccd60_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28ccae0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28cbca0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28cbca0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28cbca0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28cbca0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x28c8260, v0x28cb860 {0 0 0}; + %end; + .thread T_9; + .scope S_0x28c8070; +T_10 ; + %wait E_0x28423d0; + %load/vec4 v0x28cbbc0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.2, 6; + %jmp T_10.3; +T_10.0 ; + %load/vec4 v0x28cbde0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.6, 6; + %jmp T_10.7; +T_10.4 ; + %load/vec4 v0x28c8860_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_10.8, 5; + %load/vec4 v0x28c8c30_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_10.10, 5; + %load/vec4 v0x28c8c30_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %jmp T_10.11; +T_10.10 ; + %load/vec4 v0x28c8c30_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_10.12, 5; + %load/vec4 v0x28cbec0_0; + %load/vec4 v0x28c8c30_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.14, 8; + %load/vec4 v0x28c8c30_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c8c30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %load/vec4 v0x28c8c30_0; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.15; +T_10.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %load/vec4 v0x28c8c30_0; + %assign/vec4 v0x28cc410_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c8c30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %load/vec4 v0x28c8c30_0; + %assign/vec4 v0x28cb920_0, 0; +T_10.15 ; + %jmp T_10.13; +T_10.12 ; + %load/vec4 v0x28c8c30_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.16, 4; + %load/vec4 v0x28cb920_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_10.18, 4; + %load/vec4 v0x28cb920_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %jmp T_10.19; +T_10.18 ; + %load/vec4 v0x28cbec0_0; + %load/vec4 v0x28cb920_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.20, 8; + %load/vec4 v0x28cb920_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cb920_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %jmp T_10.21; +T_10.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %load/vec4 v0x28cb920_0; + %assign/vec4 v0x28cc410_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cb920_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; +T_10.21 ; +T_10.19 ; + %jmp T_10.17; +T_10.16 ; + %load/vec4 v0x28c8c30_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.22, 4; + %load/vec4 v0x28cb240_0; + %flag_set/vec4 8; + %jmp/0xz T_10.24, 8; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.27; +T_10.26 ; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.29; +T_10.28 ; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.31; +T_10.30 ; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28cb920_0, 0; +T_10.32 ; +T_10.31 ; +T_10.29 ; +T_10.27 ; + %jmp T_10.25; +T_10.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %load/vec4 v0x28c8c30_0; + %assign/vec4 v0x28cc410_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; +T_10.25 ; +T_10.22 ; +T_10.17 ; +T_10.13 ; +T_10.11 ; +T_10.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.7; +T_10.5 ; + %load/vec4 v0x28c8860_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_10.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_10.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_10.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_10.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_10.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_10.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_10.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_10.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_10.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_10.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_10.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_10.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_10.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_10.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_10.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_10.49, 6; + %jmp T_10.50; +T_10.34 ; + %load/vec4 v0x28c84e0_0; + %load/vec4 v0x28cc4b0_0; + %add; + %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.35 ; + %load/vec4 v0x28c84e0_0; + %load/vec4 v0x28cc4b0_0; + %sub; + %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.36 ; + %load/vec4 v0x28c8a70_0; + %pad/u 11; + %load/vec4 v0x28cc4b0_0; + %add; + %pad/u 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.37 ; + %load/vec4 v0x28cc4b0_0; + %assign/vec4 v0x28ccf20_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.38 ; + %load/vec4 v0x28c8780_0; + %assign/vec4 v0x28ccf20_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.39 ; + %load/vec4 v0x28c84e0_0; + %load/vec4 v0x28c8780_0; + %add; + %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.40 ; + %load/vec4 v0x28c84e0_0; + %load/vec4 v0x28c8780_0; + %sub; + %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.41 ; + %load/vec4 v0x28c8a70_0; + %pad/u 11; + %load/vec4 v0x28c8780_0; + %add; + %pad/u 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.42 ; + %load/vec4 v0x28c85e0_0; + %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x28c84e0_0; + %assign/vec4 v0x28c85e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.43 ; + %load/vec4 v0x28c84e0_0; + %assign/vec4 v0x28c85e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.44 ; + %load/vec4 v0x28c84e0_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.45 ; + %load/vec4 v0x28c8990_0; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.50; +T_10.46 ; + %load/vec4 v0x28c84e0_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_10.51, 4; + %load/vec4 v0x28c8990_0; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.52; +T_10.51 ; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; +T_10.52 ; + %jmp T_10.50; +T_10.47 ; + %load/vec4 v0x28c84e0_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_10.53, 4; + %load/vec4 v0x28c8990_0; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.54; +T_10.53 ; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; +T_10.54 ; + %jmp T_10.50; +T_10.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x28c84e0_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_10.55, 5; + %load/vec4 v0x28c8990_0; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.56; +T_10.55 ; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; +T_10.56 ; + %jmp T_10.50; +T_10.49 ; + %load/vec4 v0x28c84e0_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_10.57, 5; + %load/vec4 v0x28c8990_0; + %assign/vec4 v0x28c8b50_0, 0; + %jmp T_10.58; +T_10.57 ; + %load/vec4 v0x28c8a70_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c8b50_0, 0; +T_10.58 ; + %jmp T_10.50; +T_10.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.7; +T_10.6 ; + %load/vec4 v0x28c8860_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x28c8860_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_10.59, 4; + %load/vec4 v0x28c86c0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x28c86c0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28cb920_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_10.61, 9; + %load/vec4 v0x28c86c0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_10.63, 4; + %load/vec4 v0x28ccf20_0; + %assign/vec4 v0x28c84e0_0, 0; +T_10.63 ; + %jmp T_10.62; +T_10.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %load/vec4 v0x28c86c0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.65, 4; + %load/vec4 v0x28cb920_0; + %assign/vec4 v0x28cce40_0, 0; + %load/vec4 v0x28ccf20_0; + %load/vec4 v0x28cb920_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cb920_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %jmp T_10.66; +T_10.65 ; + %load/vec4 v0x28c86c0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.67, 4; + %load/vec4 v0x28c86c0_0; + %assign/vec4 v0x28cce40_0, 0; + %load/vec4 v0x28ccf20_0; + %load/vec4 v0x28c86c0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c86c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28c86c0_0; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.68; +T_10.67 ; + %load/vec4 v0x28cb3c0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.69, 8; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.72; +T_10.71 ; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.74; +T_10.73 ; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.76; +T_10.75 ; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28cb920_0, 0; +T_10.77 ; +T_10.76 ; +T_10.74 ; +T_10.72 ; + %jmp T_10.70; +T_10.69 ; + %load/vec4 v0x28c86c0_0; + %assign/vec4 v0x28cce40_0, 0; +T_10.70 ; +T_10.68 ; +T_10.66 ; +T_10.62 ; +T_10.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.7; +T_10.7 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.1 ; + %load/vec4 v0x28cbde0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.81, 6; + %jmp T_10.82; +T_10.79 ; + %load/vec4 v0x28cc410_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.83, 4; + %load/vec4 v0x28cb240_0; + %flag_set/vec4 8; + %jmp/0xz T_10.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28ccba0_0, 0, 4; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.88; +T_10.87 ; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.90; +T_10.89 ; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.92; +T_10.91 ; + %load/vec4 v0x28cbec0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28cb920_0, 0; +T_10.93 ; +T_10.92 ; +T_10.90 ; +T_10.88 ; +T_10.85 ; + %jmp T_10.84; +T_10.83 ; + %load/vec4 v0x28cbec0_0; + %load/vec4 v0x28cc410_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %load/vec4 v0x28cc410_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28cc550, 4; + %assign/vec4 v0x28cc4b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cc410_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28cc370_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28cc410_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %load/vec4 v0x28cc410_0; + %assign/vec4 v0x28cb920_0, 0; +T_10.95 ; +T_10.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.82; +T_10.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.82; +T_10.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.82; +T_10.82 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.2 ; + %load/vec4 v0x28cbde0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.99, 6; + %jmp T_10.100; +T_10.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.100; +T_10.98 ; + %load/vec4 v0x28cce40_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.101, 4; + %load/vec4 v0x28cb3c0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.103, 8; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.106; +T_10.105 ; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.108; +T_10.107 ; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28cb920_0, 0; + %jmp T_10.110; +T_10.109 ; + %load/vec4 v0x28ca2f0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28cce40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %load/vec4 v0x28ccf20_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28cbca0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28cb920_0, 0; +T_10.111 ; +T_10.110 ; +T_10.108 ; +T_10.106 ; +T_10.103 ; +T_10.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.100; +T_10.99 ; + %load/vec4 v0x28cce40_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.113, 4; + %load/vec4 v0x28ccc80_0; + %load/vec4 v0x28cce40_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x28cce40_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x28ccae0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28cbbc0_0, 0; + %load/vec4 v0x28cce40_0; + %assign/vec4 v0x28cb920_0, 0; +T_10.115 ; +T_10.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28cbde0_0, 0; + %jmp T_10.100; +T_10.100 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.3 ; + %pop/vec4 1; + %jmp T_10; + .thread T_10; + .scope S_0x28c8070; +T_11 ; + %wait E_0x281fc70; + %load/vec4 v0x28cbde0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28cbbc0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x28c8b50_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_11.0, 8; + %load/vec4 v0x28c8b50_0; + %assign/vec4 v0x28c8a70_0, 0; +T_11.0 ; + %load/vec4 v0x28cbde0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_11.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28cc370_0, 0, 4; +T_11.2 ; + %jmp T_11; + .thread T_11; + .scope S_0x280ede0; +T_12 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28c69f0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28c6c10_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x28c6750_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x2884a60_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x28c33a0_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c3860_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c71a0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c7a70_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c7c30_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c7990_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28c6ad0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28c6ad0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28c6ad0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28c6ad0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x281f8b0, v0x28c6690 {0 0 0}; + %end; + .thread T_12; + .scope S_0x280ede0; +T_13 ; + %wait E_0x28423d0; + %load/vec4 v0x28c69f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.2, 6; + %jmp T_13.3; +T_13.0 ; + %load/vec4 v0x28c6c10_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.6, 6; + %jmp T_13.7; +T_13.4 ; + %load/vec4 v0x28c3650_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_13.8, 5; + %load/vec4 v0x28c3a20_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_13.10, 5; + %load/vec4 v0x28c3a20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %jmp T_13.11; +T_13.10 ; + %load/vec4 v0x28c3a20_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_13.12, 5; + %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x28c3a20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.14, 8; + %load/vec4 v0x28c3a20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c3a20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %load/vec4 v0x28c3a20_0; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.15; +T_13.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %load/vec4 v0x28c3a20_0; + %assign/vec4 v0x28c7240_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c3a20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %load/vec4 v0x28c3a20_0; + %assign/vec4 v0x28c6750_0, 0; +T_13.15 ; + %jmp T_13.13; +T_13.12 ; + %load/vec4 v0x28c3a20_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.16, 4; + %load/vec4 v0x28c6750_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_13.18, 4; + %load/vec4 v0x28c6750_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %jmp T_13.19; +T_13.18 ; + %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x28c6750_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.20, 8; + %load/vec4 v0x28c6750_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c6750_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %jmp T_13.21; +T_13.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %load/vec4 v0x28c6750_0; + %assign/vec4 v0x28c7240_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c6750_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; +T_13.21 ; +T_13.19 ; + %jmp T_13.17; +T_13.16 ; + %load/vec4 v0x28c3a20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.22, 4; + %load/vec4 v0x28c6030_0; + %flag_set/vec4 8; + %jmp/0xz T_13.24, 8; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.27; +T_13.26 ; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.29; +T_13.28 ; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.31; +T_13.30 ; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28c6750_0, 0; +T_13.32 ; +T_13.31 ; +T_13.29 ; +T_13.27 ; + %jmp T_13.25; +T_13.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %load/vec4 v0x28c3a20_0; + %assign/vec4 v0x28c7240_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; +T_13.25 ; +T_13.22 ; +T_13.17 ; +T_13.13 ; +T_13.11 ; +T_13.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.7; +T_13.5 ; + %load/vec4 v0x28c3650_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_13.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_13.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_13.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_13.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_13.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_13.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_13.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_13.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_13.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_13.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_13.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_13.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_13.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_13.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_13.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_13.49, 6; + %jmp T_13.50; +T_13.34 ; + %load/vec4 v0x2884a60_0; + %load/vec4 v0x28c7320_0; + %add; + %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.35 ; + %load/vec4 v0x2884a60_0; + %load/vec4 v0x28c7320_0; + %sub; + %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.36 ; + %load/vec4 v0x28c3860_0; + %pad/u 11; + %load/vec4 v0x28c7320_0; + %add; + %pad/u 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.37 ; + %load/vec4 v0x28c7320_0; + %assign/vec4 v0x28c7df0_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.38 ; + %load/vec4 v0x28c3570_0; + %assign/vec4 v0x28c7df0_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.39 ; + %load/vec4 v0x2884a60_0; + %load/vec4 v0x28c3570_0; + %add; + %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.40 ; + %load/vec4 v0x2884a60_0; + %load/vec4 v0x28c3570_0; + %sub; + %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.41 ; + %load/vec4 v0x28c3860_0; + %pad/u 11; + %load/vec4 v0x28c3570_0; + %add; + %pad/u 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.42 ; + %load/vec4 v0x28c33a0_0; + %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x2884a60_0; + %assign/vec4 v0x28c33a0_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.43 ; + %load/vec4 v0x2884a60_0; + %assign/vec4 v0x28c33a0_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.44 ; + %load/vec4 v0x2884a60_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.45 ; + %load/vec4 v0x28c3780_0; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.50; +T_13.46 ; + %load/vec4 v0x2884a60_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_13.51, 4; + %load/vec4 v0x28c3780_0; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.52; +T_13.51 ; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; +T_13.52 ; + %jmp T_13.50; +T_13.47 ; + %load/vec4 v0x2884a60_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_13.53, 4; + %load/vec4 v0x28c3780_0; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.54; +T_13.53 ; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; +T_13.54 ; + %jmp T_13.50; +T_13.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x2884a60_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_13.55, 5; + %load/vec4 v0x28c3780_0; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.56; +T_13.55 ; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; +T_13.56 ; + %jmp T_13.50; +T_13.49 ; + %load/vec4 v0x2884a60_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_13.57, 5; + %load/vec4 v0x28c3780_0; + %assign/vec4 v0x28c3940_0, 0; + %jmp T_13.58; +T_13.57 ; + %load/vec4 v0x28c3860_0; + %addi 1, 0, 4; + %assign/vec4 v0x28c3940_0, 0; +T_13.58 ; + %jmp T_13.50; +T_13.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.7; +T_13.6 ; + %load/vec4 v0x28c3650_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x28c3650_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_13.59, 4; + %load/vec4 v0x28c3480_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x28c3480_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28c6750_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_13.61, 9; + %load/vec4 v0x28c3480_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_13.63, 4; + %load/vec4 v0x28c7df0_0; + %assign/vec4 v0x2884a60_0, 0; +T_13.63 ; + %jmp T_13.62; +T_13.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %load/vec4 v0x28c3480_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.65, 4; + %load/vec4 v0x28c6750_0; + %assign/vec4 v0x28c7d10_0, 0; + %load/vec4 v0x28c7df0_0; + %load/vec4 v0x28c6750_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c6750_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %jmp T_13.66; +T_13.65 ; + %load/vec4 v0x28c3480_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.67, 4; + %load/vec4 v0x28c3480_0; + %assign/vec4 v0x28c7d10_0, 0; + %load/vec4 v0x28c7df0_0; + %load/vec4 v0x28c3480_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c3480_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c3480_0; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.68; +T_13.67 ; + %load/vec4 v0x28c61b0_0; + %flag_set/vec4 8; + %jmp/0xz T_13.69, 8; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.72; +T_13.71 ; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.74; +T_13.73 ; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.76; +T_13.75 ; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28c6750_0, 0; +T_13.77 ; +T_13.76 ; +T_13.74 ; +T_13.72 ; + %jmp T_13.70; +T_13.69 ; + %load/vec4 v0x28c3480_0; + %assign/vec4 v0x28c7d10_0, 0; +T_13.70 ; +T_13.68 ; +T_13.66 ; +T_13.62 ; +T_13.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.7; +T_13.7 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.1 ; + %load/vec4 v0x28c6c10_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.81, 6; + %jmp T_13.82; +T_13.79 ; + %load/vec4 v0x28c7240_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.83, 4; + %load/vec4 v0x28c6030_0; + %flag_set/vec4 8; + %jmp/0xz T_13.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c7a70_0, 0, 4; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.88; +T_13.87 ; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.90; +T_13.89 ; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.92; +T_13.91 ; + %load/vec4 v0x28c6cf0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28c6750_0, 0; +T_13.93 ; +T_13.92 ; +T_13.90 ; +T_13.88 ; +T_13.85 ; + %jmp T_13.84; +T_13.83 ; + %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x28c7240_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %load/vec4 v0x28c7240_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x28c7400, 4; + %assign/vec4 v0x28c7320_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c7240_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x28c7240_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %load/vec4 v0x28c7240_0; + %assign/vec4 v0x28c6750_0, 0; +T_13.95 ; +T_13.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.82; +T_13.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.82; +T_13.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.82; +T_13.82 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.2 ; + %load/vec4 v0x28c6c10_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.99, 6; + %jmp T_13.100; +T_13.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.100; +T_13.98 ; + %load/vec4 v0x28c7d10_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.101, 4; + %load/vec4 v0x28c61b0_0; + %flag_set/vec4 8; + %jmp/0xz T_13.103, 8; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.106; +T_13.105 ; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.108; +T_13.107 ; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x28c6750_0, 0; + %jmp T_13.110; +T_13.109 ; + %load/vec4 v0x28c50e0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28c7d10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x28c7990_0, 4, 5; + %load/vec4 v0x28c7df0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x28c6ad0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x28c6750_0, 0; +T_13.111 ; +T_13.110 ; +T_13.108 ; +T_13.106 ; +T_13.103 ; +T_13.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.100; +T_13.99 ; + %load/vec4 v0x28c7d10_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.113, 4; + %load/vec4 v0x28c7b50_0; + %load/vec4 v0x28c7d10_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x28c7d10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x28c7990_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28c69f0_0, 0; + %load/vec4 v0x28c7d10_0; + %assign/vec4 v0x28c6750_0, 0; +T_13.115 ; +T_13.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x28c6c10_0, 0; + %jmp T_13.100; +T_13.100 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.3 ; + %pop/vec4 1; + %jmp T_13; + .thread T_13; + .scope S_0x280ede0; +T_14 ; + %wait E_0x281fc70; + %load/vec4 v0x28c6c10_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x28c69f0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x28c3940_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_14.0, 8; + %load/vec4 v0x28c3940_0; + %assign/vec4 v0x28c3860_0, 0; +T_14.0 ; + %load/vec4 v0x28c6c10_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_14.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x28c71a0_0, 0, 4; +T_14.2 ; + %jmp T_14; + .thread T_14; + .scope S_0x2836a60; +T_15 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x28dd1b0_0, 0, 33; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x28dd050_0, 0, 1; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 1, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 2, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 3, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 4, 0, 11; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 4, 0, 11; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 5, 0, 11; + %ix/load 4, 6, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x28dd0f0, 4, 0; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x28dd1b0_0, 0, 33; +T_15.0 ; + %load/vec4 v0x28dd1b0_0; + %cmpi/u 7, 0, 33; + %jmp/0xz T_15.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x28dcfb0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x28dcfb0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x28dcfb0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x28dcfb0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x28dcfb0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x28dcfb0_0, 0, 1; + %delay 1, 0; + %vpi_call 2 53 "$display", "acc = %d", v0x28dce60_0 {0 0 0}; + %load/vec4 v0x28dce60_0; + %ix/getv 4, v0x28dd1b0_0; + %load/vec4a v0x28dd0f0, 4; + %cmp/ne; + %jmp/0xz T_15.2, 4; + %vpi_call 2 55 "$display", "anyRead failed on test %d", v0x28dd1b0_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x28dd050_0, 0, 1; +T_15.2 ; + %load/vec4 v0x28dd1b0_0; + %addi 1, 0, 33; + %store/vec4 v0x28dd1b0_0, 0, 33; + %jmp T_15.0; +T_15.1 ; + %load/vec4 v0x28dd050_0; + %flag_set/vec4 8; + %jmp/0xz T_15.4, 8; + %vpi_call 2 60 "$display", "DUT passed anyRead" {0 0 0}; +T_15.4 ; + %end; + .thread T_15; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "anyRead/test.v"; + "./tis100.v"; diff --git a/anyRead/test.asm b/anyRead/test.asm new file mode 100644 index 0000000..bece3a3 --- /dev/null +++ b/anyRead/test.asm @@ -0,0 +1,24 @@ +:center +MOV ANY ACC +MOV ANY ACC +MOV ANY ACC +MOV ANY ACC +MOV LAST ACC +JRO 0 + +:up +MOV 3 DOWN +JRO 0 + +:left +MOV 1 RIGHT +JRO 0 + +:right +MOV 2 LEFT +JRO 0 + +:down +MOV 4 UP +MOV 5 UP +JRO 0 diff --git a/anyRead/test.v b/anyRead/test.v new file mode 100644 index 0000000..8925931 --- /dev/null +++ b/anyRead/test.v @@ -0,0 +1,64 @@ +`include "tis100.v" +module tis100Test(); + +reg clk; +wire signed[10:0] accOutCenter; +reg[32:0] i; + +wire[14:0] L2C; +wire[14:0] C2L; + +wire[14:0] R2C; +wire[14:0] C2R; + +wire[14:0] U2C; +wire[14:0] C2U; + +wire[14:0] D2C; +wire[14:0] C2D; + +reg dutPassed; + +tis100 #("anyRead/left.dat") left( .clk(clk), .rightOut(L2C), .right(C2L)); +tis100 #("anyRead/right.dat") right( .clk(clk), .leftOut(R2C), .left(C2R)); +tis100 #("anyRead/up.dat") up( .clk(clk), .downOut(U2C), .down(C2U)); +tis100 #("anyRead/down.dat") down( .clk(clk), .upOut(D2C), .up(C2D)); +tis100 #("anyRead/center.dat") center(.clk(clk), + .upOut(C2U), .up(U2C), + .downOut(C2D), .down(D2C), + .leftOut(C2L), .left(L2C), + .rightOut(C2R), .right(R2C), + .accOut(accOutCenter) + ); + +reg signed[10:0] expected[0:6]; + +initial begin + i = 0; + dutPassed = 1; + expected[0] = 0; + expected[1] = 1; + expected[2] = 2; + expected[3] = 3; + expected[4] = 4; + expected[5] = 4; + expected[6] = 5; + for( i = 0; i<7; i=i+1) begin + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + $display("acc = %d",accOutCenter); + if(accOutCenter != expected[i]) begin + $display("anyRead failed on test %d",i); + dutPassed = 0; + end + end + if(dutPassed) begin + $display("DUT passed anyRead"); + end +end + +endmodule diff --git a/anyRead/up.dat b/anyRead/up.dat new file mode 100644 index 0000000..e8b37d3 --- /dev/null +++ b/anyRead/up.dat @@ -0,0 +1,16 @@ +010010100000000011 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyWrite/center.dat b/anyWrite/center.dat new file mode 100644 index 0000000..ed213ab --- /dev/null +++ b/anyWrite/center.dat @@ -0,0 +1,16 @@ +010011100000000001 +010011100000000010 +010011100000000011 +010011100000000100 +001100111000000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyWrite/down.dat b/anyWrite/down.dat new file mode 100644 index 0000000..1a856b9 --- /dev/null +++ b/anyWrite/down.dat @@ -0,0 +1,16 @@ +001100110000000000 +010010000000000101 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyWrite/left.dat b/anyWrite/left.dat new file mode 100644 index 0000000..56859e5 --- /dev/null +++ b/anyWrite/left.dat @@ -0,0 +1,16 @@ +001100101100000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyWrite/right.dat b/anyWrite/right.dat new file mode 100644 index 0000000..b28e75e --- /dev/null +++ b/anyWrite/right.dat @@ -0,0 +1,16 @@ +001100101000000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/anyWrite/test b/anyWrite/test new file mode 100755 index 0000000..a8017bd --- /dev/null +++ b/anyWrite/test @@ -0,0 +1,6098 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2585810 .scope module, "tis100Test" "tis100Test" 2 2; + .timescale 0 0; +v0x2653d80_0 .net "C2D", 14 0, L_0x2678600; 1 drivers +v0x2653eb0_0 .net "C2L", 14 0, L_0x2678320; 1 drivers +v0x2653fc0_0 .net "C2R", 14 0, L_0x2678cf0; 1 drivers +v0x26540b0_0 .net "C2U", 14 0, L_0x2678050; 1 drivers +v0x26541c0_0 .net "D2C", 14 0, L_0x2673e60; 1 drivers +v0x2654320_0 .net "L2C", 14 0, L_0x2668610; 1 drivers +v0x2654430_0 .net "R2C", 14 0, L_0x266bf90; 1 drivers +v0x2654540_0 .net "U2C", 14 0, L_0x26702c0; 1 drivers +v0x2654650_0 .net/s "accOutCenter", 10 0, L_0x2674c20; 1 drivers +v0x26547a0_0 .net/s "accOutDown", 10 0, L_0x2670bc0; 1 drivers +v0x2654840_0 .net/s "accOutLeft", 10 0, L_0x2654c40; 1 drivers +v0x26548e0_0 .net/s "accOutRight", 10 0, L_0x2668960; 1 drivers +v0x2654980_0 .net/s "accOutUp", 10 0, L_0x266cb10; 1 drivers +v0x2654a20_0 .var "clk", 0 0; +v0x2654ac0_0 .var "dutPassed", 0 0; +v0x2654b60_0 .var "i", 32 0; +S_0x25d50f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x2585810; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x2584f40 .param/str "memFile" 0 3 60, "anyWrite/center.dat"; +L_0x2674c20 .functor BUFZ 11, v0x25fb500_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2674eb0 .functor BUFZ 11, v0x25fb500_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2675ce0 .functor BUFZ 18, L_0x2677e60, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x25fb500_0 .var/s "ACC", 10 0; +v0x263ab80_0 .var/s "BAK", 10 0; +v0x263ac60_0 .net "DST", 2 0, L_0x2679180; 1 drivers +v0x263ad50_0 .net/s "IMM", 10 0, L_0x2679220; 1 drivers +v0x263ae30_0 .net "INST", 3 0, L_0x2678960; 1 drivers +v0x263af60_0 .net "LABEL", 3 0, L_0x26793d0; 1 drivers +v0x263b040_0 .var "PC", 3 0; +v0x263b120_0 .var "PCNEXT", 3 0; +v0x263b200_0 .net "SRC", 2 0, L_0x2678f90; 1 drivers +v0x263b370_0 .net *"_s103", 0 0, L_0x26771a0; 1 drivers +v0x263b450_0 .net *"_s107", 0 0, L_0x26770b0; 1 drivers +v0x263b530_0 .net *"_s111", 0 0, L_0x2677390; 1 drivers +v0x263b610_0 .net *"_s115", 0 0, L_0x2677290; 1 drivers +v0x263b6f0_0 .net *"_s119", 0 0, L_0x26775d0; 1 drivers +v0x263b7d0_0 .net *"_s123", 0 0, L_0x26774c0; 1 drivers +v0x263b8b0_0 .net *"_s127", 0 0, L_0x2677790; 1 drivers +v0x263b990_0 .net *"_s131", 0 0, L_0x2677670; 1 drivers +v0x263bb40_0 .net *"_s135", 0 0, L_0x26779f0; 1 drivers +v0x263bbe0_0 .net *"_s139", 0 0, L_0x26778c0; 1 drivers +v0x263bcc0_0 .net *"_s143", 0 0, L_0x2677bd0; 1 drivers +v0x263bda0_0 .net *"_s147", 0 0, L_0x2677a90; 1 drivers +v0x263be80_0 .net *"_s151", 0 0, L_0x2677dc0; 1 drivers +v0x263bf60_0 .net *"_s155", 0 0, L_0x2677c70; 1 drivers +v0x263c040_0 .net *"_s159", 0 0, L_0x2677d10; 1 drivers +v0x263c120_0 .net *"_s160", 17 0, L_0x2677e60; 1 drivers +v0x263c200_0 .net *"_s162", 5 0, L_0x26781c0; 1 drivers +L_0x2b5f641262a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x263c2e0_0 .net *"_s165", 1 0, L_0x2b5f641262a0; 1 drivers +v0x263e2b0_2 .array/port v0x263e2b0, 2; +v0x263c3c0_0 .net *"_s173", 10 0, v0x263e2b0_2; 1 drivers +v0x263e2b0_3 .array/port v0x263e2b0, 3; +v0x263c4a0_0 .net *"_s179", 10 0, v0x263e2b0_3; 1 drivers +v0x263e2b0_0 .array/port v0x263e2b0, 0; +v0x263c580_0 .net *"_s185", 10 0, v0x263e2b0_0; 1 drivers +v0x263e2b0_1 .array/port v0x263e2b0, 1; +v0x263c660_0 .net *"_s191", 10 0, v0x263e2b0_1; 1 drivers +v0x263c740_0 .net *"_s23", 0 0, L_0x2675680; 1 drivers +v0x263c820_0 .net *"_s27", 0 0, L_0x2675750; 1 drivers +v0x263ba70_0 .net *"_s31", 0 0, L_0x2675820; 1 drivers +v0x263caf0_0 .net *"_s36", 0 0, L_0x26759c0; 1 drivers +v0x263cbd0_0 .net *"_s42", 0 0, L_0x2675ba0; 1 drivers +v0x263ccb0_0 .net *"_s46", 0 0, L_0x2675c40; 1 drivers +v0x263cd90_0 .net *"_s50", 0 0, L_0x2675d50; 1 drivers +v0x263ce70_0 .net *"_s55", 0 0, L_0x2675f60; 1 drivers +v0x263cf50_0 .net *"_s61", 0 0, L_0x26761d0; 1 drivers +v0x263d030_0 .net *"_s65", 0 0, L_0x2676270; 1 drivers +v0x263d110_0 .net *"_s69", 0 0, L_0x26763b0; 1 drivers +v0x263d1f0_0 .net *"_s74", 0 0, L_0x2676310; 1 drivers +v0x263d2d0_0 .net *"_s80", 0 0, L_0x26765e0; 1 drivers +v0x263d3b0_0 .net *"_s84", 0 0, L_0x26769a0; 1 drivers +v0x263d490_0 .net *"_s88", 0 0, L_0x26767d0; 1 drivers +v0x263d570_0 .net *"_s93", 0 0, L_0x2676b50; 1 drivers +v0x263d650_0 .net *"_s99", 0 0, L_0x2676dd0; 1 drivers +v0x263d730_0 .net/s "accOut", 10 0, L_0x2674c20; alias, 1 drivers +v0x263d810_0 .net "anyHasData", 0 0, L_0x2675ab0; 1 drivers +v0x263d8d0_0 .net "anyReadAck", 0 0, L_0x26766e0; 1 drivers +v0x263d990_0 .net "anyWantData", 0 0, L_0x2676050; 1 drivers +v0x263da50_0 .net "anyWriteAck", 0 0, L_0x2677010; 1 drivers +v0x263db10_0 .net "clk", 0 0, v0x2654a20_0; 1 drivers +v0x263dbd0_0 .net "down", 14 0, L_0x2673e60; alias, 1 drivers +v0x263dcb0_0 .net "downOut", 14 0, L_0x2678600; alias, 1 drivers +v0x263dd90_0 .net "instruction", 17 0, L_0x2675ce0; 1 drivers +v0x263de70 .array "instructions", 15 0, 17 0; +v0x263df30_0 .var "last", 2 0; +v0x263e010_0 .net "left", 14 0, L_0x2668610; alias, 1 drivers +v0x263e0f0_0 .net "leftOut", 14 0, L_0x2678320; alias, 1 drivers +v0x263e1d0_0 .var "mode", 2 0; +v0x263e2b0 .array/s "outVals", 2 5, 10 0; +v0x263e3f0_0 .var "phase", 2 0; +v0x263e4d0_0 .net "portsHaveData", 5 2, L_0x26758c0; 1 drivers +v0x263c8c0_0 .net "portsWantData", 5 2, L_0x2675df0; 1 drivers +v0x263c9a0_0 .net "readAckIn", 5 2, L_0x2676450; 1 drivers +v0x263e980_0 .var "readAckOut", 5 2; +v0x263ea20_0 .var "readTarget", 2 0; +v0x263eb00_0 .var/s "readValue", 10 0; +L_0x2b5f64126258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x263ebe0 .array "regVals", 0 7; +v0x263ebe0_0 .net/s v0x263ebe0 0, 10 0, L_0x2b5f64126258; 1 drivers +v0x263ebe0_1 .net/s v0x263ebe0 1, 10 0, L_0x2674eb0; 1 drivers +v0x263ebe0_2 .net/s v0x263ebe0 2, 10 0, L_0x2675190; 1 drivers +v0x263ebe0_3 .net/s v0x263ebe0 3, 10 0, L_0x26752c0; 1 drivers +v0x263ebe0_4 .net/s v0x263ebe0 4, 10 0, L_0x26753f0; 1 drivers +v0x263ebe0_5 .net/s v0x263ebe0 5, 10 0, L_0x2675520; 1 drivers +o0x2b5f640f5eb8 .functor BUFZ 11, C4; HiZ drive +v0x263ebe0_6 .net/s v0x263ebe0 6, 10 0, o0x2b5f640f5eb8; 0 drivers +o0x2b5f640f5ee8 .functor BUFZ 11, C4; HiZ drive +v0x263ebe0_7 .net/s v0x263ebe0 7, 10 0, o0x2b5f640f5ee8; 0 drivers +v0x263edf0_0 .net "right", 14 0, L_0x266bf90; alias, 1 drivers +v0x263eed0_0 .net "rightOut", 14 0, L_0x2678cf0; alias, 1 drivers +v0x263efb0_0 .net "up", 14 0, L_0x26702c0; alias, 1 drivers +v0x263f090_0 .net "upOut", 14 0, L_0x2678050; alias, 1 drivers +v0x263f170_0 .var "weHaveData", 5 2; +v0x263f250_0 .var "weWantData", 5 2; +v0x263f330_0 .net "writeAckIn", 5 2, L_0x2676d30; 1 drivers +v0x263f410_0 .var "writeAckOut", 5 2; +v0x263f4f0_0 .var "writeTarget", 2 0; +v0x263f5d0_0 .var/s "writeValue", 10 0; +E_0x25966a0 .event negedge, v0x263db10_0; +E_0x25b8e20 .event posedge, v0x263db10_0; +L_0x2675190 .part L_0x2668610, 0, 11; +L_0x26752c0 .part L_0x266bf90, 0, 11; +L_0x26753f0 .part L_0x26702c0, 0, 11; +L_0x2675520 .part L_0x2673e60, 0, 11; +L_0x2675680 .part L_0x2668610, 11, 1; +L_0x2675750 .part L_0x266bf90, 11, 1; +L_0x2675820 .part L_0x26702c0, 11, 1; +L_0x26758c0 .concat8 [ 1 1 1 1], L_0x2675680, L_0x2675750, L_0x2675820, L_0x26759c0; +L_0x26759c0 .part L_0x2673e60, 11, 1; +L_0x2675ab0 .reduce/or L_0x26758c0; +L_0x2675ba0 .part L_0x2668610, 12, 1; +L_0x2675c40 .part L_0x266bf90, 12, 1; +L_0x2675d50 .part L_0x26702c0, 12, 1; +L_0x2675df0 .concat8 [ 1 1 1 1], L_0x2675ba0, L_0x2675c40, L_0x2675d50, L_0x2675f60; +L_0x2675f60 .part L_0x2673e60, 12, 1; +L_0x2676050 .reduce/or L_0x2675df0; +L_0x26761d0 .part L_0x2668610, 13, 1; +L_0x2676270 .part L_0x266bf90, 13, 1; +L_0x26763b0 .part L_0x26702c0, 13, 1; +L_0x2676450 .concat8 [ 1 1 1 1], L_0x26761d0, L_0x2676270, L_0x26763b0, L_0x2676310; +L_0x2676310 .part L_0x2673e60, 13, 1; +L_0x26766e0 .reduce/or L_0x2676450; +L_0x26765e0 .part L_0x2668610, 14, 1; +L_0x26769a0 .part L_0x266bf90, 14, 1; +L_0x26767d0 .part L_0x26702c0, 14, 1; +L_0x2676d30 .concat8 [ 1 1 1 1], L_0x26765e0, L_0x26769a0, L_0x26767d0, L_0x2676b50; +L_0x2676b50 .part L_0x2673e60, 14, 1; +L_0x2677010 .reduce/or L_0x2676d30; +L_0x2676dd0 .part v0x263e980_0, 0, 1; +L_0x26771a0 .part v0x263e980_0, 1, 1; +L_0x26770b0 .part v0x263e980_0, 2, 1; +L_0x2677390 .part v0x263e980_0, 3, 1; +L_0x2677290 .part v0x263f410_0, 0, 1; +L_0x26775d0 .part v0x263f410_0, 1, 1; +L_0x26774c0 .part v0x263f410_0, 2, 1; +L_0x2677790 .part v0x263f410_0, 3, 1; +L_0x2677670 .part v0x263f250_0, 0, 1; +L_0x26779f0 .part v0x263f250_0, 1, 1; +L_0x26778c0 .part v0x263f250_0, 2, 1; +L_0x2677bd0 .part v0x263f250_0, 3, 1; +L_0x2677a90 .part v0x263f170_0, 0, 1; +L_0x2677dc0 .part v0x263f170_0, 1, 1; +L_0x2677c70 .part v0x263f170_0, 2, 1; +L_0x2677d10 .part v0x263f170_0, 3, 1; +L_0x2677e60 .array/port v0x263de70, L_0x26781c0; +L_0x26781c0 .concat [ 4 2 0 0], v0x263b040_0, L_0x2b5f641262a0; +LS_0x2678050_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_2, L_0x2677c70, L_0x26778c0, L_0x26774c0; +LS_0x2678050_0_4 .concat8 [ 1 0 0 0], L_0x26770b0; +L_0x2678050 .concat8 [ 14 1 0 0], LS_0x2678050_0_0, LS_0x2678050_0_4; +LS_0x2678600_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_3, L_0x2677d10, L_0x2677bd0, L_0x2677790; +LS_0x2678600_0_4 .concat8 [ 1 0 0 0], L_0x2677390; +L_0x2678600 .concat8 [ 14 1 0 0], LS_0x2678600_0_0, LS_0x2678600_0_4; +LS_0x2678320_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_0, L_0x2677a90, L_0x2677670, L_0x2677290; +LS_0x2678320_0_4 .concat8 [ 1 0 0 0], L_0x2676dd0; +L_0x2678320 .concat8 [ 14 1 0 0], LS_0x2678320_0_0, LS_0x2678320_0_4; +LS_0x2678cf0_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_1, L_0x2677dc0, L_0x26779f0, L_0x26775d0; +LS_0x2678cf0_0_4 .concat8 [ 1 0 0 0], L_0x26771a0; +L_0x2678cf0 .concat8 [ 14 1 0 0], LS_0x2678cf0_0_0, LS_0x2678cf0_0_4; +L_0x2678960 .part L_0x2675ce0, 14, 4; +L_0x2679180 .part L_0x2675ce0, 11, 3; +L_0x2678f90 .part L_0x2675ce0, 8, 3; +L_0x26793d0 .part L_0x2675ce0, 10, 4; +L_0x2679220 .part L_0x2675ce0, 0, 11; +S_0x263f850 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x2585810; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x263fa40 .param/str "memFile" 0 3 60, "anyWrite/down.dat"; +L_0x2670bc0 .functor BUFZ 11, v0x263fd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2670dc0 .functor BUFZ 11, v0x263fd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2671c80 .functor BUFZ 18, L_0x2673bf0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x263fd10_0 .var/s "ACC", 10 0; +v0x263fe10_0 .var/s "BAK", 10 0; +v0x263fef0_0 .net "DST", 2 0, L_0x2674ce0; 1 drivers +v0x263ffb0_0 .net/s "IMM", 10 0, L_0x2674d80; 1 drivers +v0x2640090_0 .net "INST", 3 0, L_0x26745c0; 1 drivers +v0x2640170_0 .net "LABEL", 3 0, L_0x2674f30; 1 drivers +v0x2640250_0 .var "PC", 3 0; +v0x2640330_0 .var "PCNEXT", 3 0; +v0x2640410_0 .net "SRC", 2 0, L_0x2674af0; 1 drivers +v0x2640580_0 .net *"_s103", 0 0, L_0x2672f30; 1 drivers +v0x2640660_0 .net *"_s107", 0 0, L_0x2672e40; 1 drivers +v0x2640740_0 .net *"_s111", 0 0, L_0x2673120; 1 drivers +v0x2640820_0 .net *"_s115", 0 0, L_0x2673020; 1 drivers +v0x2640900_0 .net *"_s119", 0 0, L_0x2673360; 1 drivers +v0x26409e0_0 .net *"_s123", 0 0, L_0x2673250; 1 drivers +v0x2640ac0_0 .net *"_s127", 0 0, L_0x2673520; 1 drivers +v0x2640ba0_0 .net *"_s131", 0 0, L_0x2673400; 1 drivers +v0x2640d50_0 .net *"_s135", 0 0, L_0x2673780; 1 drivers +v0x2640df0_0 .net *"_s139", 0 0, L_0x2673650; 1 drivers +v0x2640ed0_0 .net *"_s143", 0 0, L_0x2673960; 1 drivers +v0x2640fb0_0 .net *"_s147", 0 0, L_0x2673820; 1 drivers +v0x2641090_0 .net *"_s151", 0 0, L_0x2673b50; 1 drivers +v0x2641170_0 .net *"_s155", 0 0, L_0x2673a00; 1 drivers +v0x2641250_0 .net *"_s159", 0 0, L_0x2673aa0; 1 drivers +v0x2641330_0 .net *"_s160", 17 0, L_0x2673bf0; 1 drivers +v0x2641410_0 .net *"_s162", 5 0, L_0x2673f50; 1 drivers +L_0x2b5f64126210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x26414f0_0 .net *"_s165", 1 0, L_0x2b5f64126210; 1 drivers +v0x2643480_2 .array/port v0x2643480, 2; +v0x26415d0_0 .net *"_s173", 10 0, v0x2643480_2; 1 drivers +v0x2643480_3 .array/port v0x2643480, 3; +v0x26416b0_0 .net *"_s179", 10 0, v0x2643480_3; 1 drivers +v0x2643480_0 .array/port v0x2643480, 0; +v0x2641790_0 .net *"_s185", 10 0, v0x2643480_0; 1 drivers +v0x2643480_1 .array/port v0x2643480, 1; +v0x2641870_0 .net *"_s191", 10 0, v0x2643480_1; 1 drivers +v0x2641950_0 .net *"_s23", 0 0, L_0x2671410; 1 drivers +v0x2641a30_0 .net *"_s27", 0 0, L_0x2671530; 1 drivers +v0x2640c80_0 .net *"_s31", 0 0, L_0x2671620; 1 drivers +v0x2641d00_0 .net *"_s36", 0 0, L_0x2671910; 1 drivers +v0x2641de0_0 .net *"_s42", 0 0, L_0x2671b40; 1 drivers +v0x2641ec0_0 .net *"_s46", 0 0, L_0x2671be0; 1 drivers +v0x2641fa0_0 .net *"_s50", 0 0, L_0x2671cf0; 1 drivers +v0x2642080_0 .net *"_s55", 0 0, L_0x2671f00; 1 drivers +v0x2642160_0 .net *"_s61", 0 0, L_0x2672170; 1 drivers +v0x2642240_0 .net *"_s65", 0 0, L_0x26722a0; 1 drivers +v0x2642320_0 .net *"_s69", 0 0, L_0x2672470; 1 drivers +v0x2642400_0 .net *"_s74", 0 0, L_0x26723d0; 1 drivers +v0x26424e0_0 .net *"_s80", 0 0, L_0x2672600; 1 drivers +v0x26425c0_0 .net *"_s84", 0 0, L_0x26728f0; 1 drivers +v0x26426a0_0 .net *"_s88", 0 0, L_0x2672830; 1 drivers +v0x2642780_0 .net *"_s93", 0 0, L_0x2672990; 1 drivers +v0x2642860_0 .net *"_s99", 0 0, L_0x2672c20; 1 drivers +v0x2642940_0 .net/s "accOut", 10 0, L_0x2670bc0; alias, 1 drivers +v0x2642a20_0 .net "anyHasData", 0 0, L_0x2671a50; 1 drivers +v0x2642ae0_0 .net "anyReadAck", 0 0, L_0x2672790; 1 drivers +v0x2642ba0_0 .net "anyWantData", 0 0, L_0x2671ff0; 1 drivers +v0x2642c60_0 .net "anyWriteAck", 0 0, L_0x2672d50; 1 drivers +v0x2642d20_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers +o0x2b5f640f6cc8 .functor BUFZ 15, C4; HiZ drive +v0x2642dc0_0 .net "down", 14 0, o0x2b5f640f6cc8; 0 drivers +v0x2642e80_0 .net "downOut", 14 0, L_0x2674320; 1 drivers +v0x2642f60_0 .net "instruction", 17 0, L_0x2671c80; 1 drivers +v0x2643040 .array "instructions", 15 0, 17 0; +v0x2643100_0 .var "last", 2 0; +o0x2b5f640f6d88 .functor BUFZ 15, C4; HiZ drive +v0x26431e0_0 .net "left", 14 0, o0x2b5f640f6d88; 0 drivers +v0x26432c0_0 .net "leftOut", 14 0, L_0x26740b0; 1 drivers +v0x26433a0_0 .var "mode", 2 0; +v0x2643480 .array/s "outVals", 2 5, 10 0; +v0x26435c0_0 .var "phase", 2 0; +v0x26436a0_0 .net "portsHaveData", 5 2, L_0x2671750; 1 drivers +v0x2641ad0_0 .net "portsWantData", 5 2, L_0x2671d90; 1 drivers +v0x2641bb0_0 .net "readAckIn", 5 2, L_0x2672510; 1 drivers +v0x2643b50_0 .var "readAckOut", 5 2; +v0x2643bf0_0 .var "readTarget", 2 0; +v0x2643c90_0 .var/s "readValue", 10 0; +L_0x2b5f641261c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2643d30 .array "regVals", 0 7; +v0x2643d30_0 .net/s v0x2643d30 0, 10 0, L_0x2b5f641261c8; 1 drivers +v0x2643d30_1 .net/s v0x2643d30 1, 10 0, L_0x2670dc0; 1 drivers +v0x2643d30_2 .net/s v0x2643d30 2, 10 0, L_0x2671130; 1 drivers +v0x2643d30_3 .net/s v0x2643d30 3, 10 0, L_0x26711d0; 1 drivers +v0x2643d30_4 .net/s v0x2643d30 4, 10 0, L_0x2671270; 1 drivers +v0x2643d30_5 .net/s v0x2643d30 5, 10 0, L_0x2671310; 1 drivers +o0x2b5f640f7148 .functor BUFZ 11, C4; HiZ drive +v0x2643d30_6 .net/s v0x2643d30 6, 10 0, o0x2b5f640f7148; 0 drivers +o0x2b5f640f7178 .functor BUFZ 11, C4; HiZ drive +v0x2643d30_7 .net/s v0x2643d30 7, 10 0, o0x2b5f640f7178; 0 drivers +o0x2b5f640f71a8 .functor BUFZ 15, C4; HiZ drive +v0x2643f40_0 .net "right", 14 0, o0x2b5f640f71a8; 0 drivers +v0x2644020_0 .net "rightOut", 14 0, L_0x26748d0; 1 drivers +v0x2644100_0 .net "up", 14 0, L_0x2678600; alias, 1 drivers +v0x26441f0_0 .net "upOut", 14 0, L_0x2673e60; alias, 1 drivers +v0x26442c0_0 .var "weHaveData", 5 2; +v0x2644380_0 .var "weWantData", 5 2; +v0x2644460_0 .net "writeAckIn", 5 2, L_0x2672a60; 1 drivers +v0x2644540_0 .var "writeAckOut", 5 2; +v0x2644620_0 .var "writeTarget", 2 0; +v0x2644700_0 .var/s "writeValue", 10 0; +L_0x2671130 .part o0x2b5f640f6d88, 0, 11; +L_0x26711d0 .part o0x2b5f640f71a8, 0, 11; +L_0x2671270 .part L_0x2678600, 0, 11; +L_0x2671310 .part o0x2b5f640f6cc8, 0, 11; +L_0x2671410 .part o0x2b5f640f6d88, 11, 1; +L_0x2671530 .part o0x2b5f640f71a8, 11, 1; +L_0x2671620 .part L_0x2678600, 11, 1; +L_0x2671750 .concat8 [ 1 1 1 1], L_0x2671410, L_0x2671530, L_0x2671620, L_0x2671910; +L_0x2671910 .part o0x2b5f640f6cc8, 11, 1; +L_0x2671a50 .reduce/or L_0x2671750; +L_0x2671b40 .part o0x2b5f640f6d88, 12, 1; +L_0x2671be0 .part o0x2b5f640f71a8, 12, 1; +L_0x2671cf0 .part L_0x2678600, 12, 1; +L_0x2671d90 .concat8 [ 1 1 1 1], L_0x2671b40, L_0x2671be0, L_0x2671cf0, L_0x2671f00; +L_0x2671f00 .part o0x2b5f640f6cc8, 12, 1; +L_0x2671ff0 .reduce/or L_0x2671d90; +L_0x2672170 .part o0x2b5f640f6d88, 13, 1; +L_0x26722a0 .part o0x2b5f640f71a8, 13, 1; +L_0x2672470 .part L_0x2678600, 13, 1; +L_0x2672510 .concat8 [ 1 1 1 1], L_0x2672170, L_0x26722a0, L_0x2672470, L_0x26723d0; +L_0x26723d0 .part o0x2b5f640f6cc8, 13, 1; +L_0x2672790 .reduce/or L_0x2672510; +L_0x2672600 .part o0x2b5f640f6d88, 14, 1; +L_0x26728f0 .part o0x2b5f640f71a8, 14, 1; +L_0x2672830 .part L_0x2678600, 14, 1; +L_0x2672a60 .concat8 [ 1 1 1 1], L_0x2672600, L_0x26728f0, L_0x2672830, L_0x2672990; +L_0x2672990 .part o0x2b5f640f6cc8, 14, 1; +L_0x2672d50 .reduce/or L_0x2672a60; +L_0x2672c20 .part v0x2643b50_0, 0, 1; +L_0x2672f30 .part v0x2643b50_0, 1, 1; +L_0x2672e40 .part v0x2643b50_0, 2, 1; +L_0x2673120 .part v0x2643b50_0, 3, 1; +L_0x2673020 .part v0x2644540_0, 0, 1; +L_0x2673360 .part v0x2644540_0, 1, 1; +L_0x2673250 .part v0x2644540_0, 2, 1; +L_0x2673520 .part v0x2644540_0, 3, 1; +L_0x2673400 .part v0x2644380_0, 0, 1; +L_0x2673780 .part v0x2644380_0, 1, 1; +L_0x2673650 .part v0x2644380_0, 2, 1; +L_0x2673960 .part v0x2644380_0, 3, 1; +L_0x2673820 .part v0x26442c0_0, 0, 1; +L_0x2673b50 .part v0x26442c0_0, 1, 1; +L_0x2673a00 .part v0x26442c0_0, 2, 1; +L_0x2673aa0 .part v0x26442c0_0, 3, 1; +L_0x2673bf0 .array/port v0x2643040, L_0x2673f50; +L_0x2673f50 .concat [ 4 2 0 0], v0x2640250_0, L_0x2b5f64126210; +LS_0x2673e60_0_0 .concat8 [ 11 1 1 1], v0x2643480_2, L_0x2673a00, L_0x2673650, L_0x2673250; +LS_0x2673e60_0_4 .concat8 [ 1 0 0 0], L_0x2672e40; +L_0x2673e60 .concat8 [ 14 1 0 0], LS_0x2673e60_0_0, LS_0x2673e60_0_4; +LS_0x2674320_0_0 .concat8 [ 11 1 1 1], v0x2643480_3, L_0x2673aa0, L_0x2673960, L_0x2673520; +LS_0x2674320_0_4 .concat8 [ 1 0 0 0], L_0x2673120; +L_0x2674320 .concat8 [ 14 1 0 0], LS_0x2674320_0_0, LS_0x2674320_0_4; +LS_0x26740b0_0_0 .concat8 [ 11 1 1 1], v0x2643480_0, L_0x2673820, L_0x2673400, L_0x2673020; +LS_0x26740b0_0_4 .concat8 [ 1 0 0 0], L_0x2672c20; +L_0x26740b0 .concat8 [ 14 1 0 0], LS_0x26740b0_0_0, LS_0x26740b0_0_4; +LS_0x26748d0_0_0 .concat8 [ 11 1 1 1], v0x2643480_1, L_0x2673b50, L_0x2673780, L_0x2673360; +LS_0x26748d0_0_4 .concat8 [ 1 0 0 0], L_0x2672f30; +L_0x26748d0 .concat8 [ 14 1 0 0], LS_0x26748d0_0_0, LS_0x26748d0_0_4; +L_0x26745c0 .part L_0x2671c80, 14, 4; +L_0x2674ce0 .part L_0x2671c80, 11, 3; +L_0x2674af0 .part L_0x2671c80, 8, 3; +L_0x2674f30 .part L_0x2671c80, 10, 4; +L_0x2674d80 .part L_0x2671c80, 0, 11; +S_0x2644980 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x2585810; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x2644b80 .param/str "memFile" 0 3 60, "anyWrite/left.dat"; +L_0x2654c40 .functor BUFZ 11, v0x2644e50_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2664ce0 .functor BUFZ 11, v0x2644e50_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2665cd0 .functor BUFZ 18, L_0x2667980, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2644e50_0 .var/s "ACC", 10 0; +v0x2644f50_0 .var/s "BAK", 10 0; +v0x2645030_0 .net "DST", 2 0, L_0x2668a20; 1 drivers +v0x26450f0_0 .net/s "IMM", 10 0, L_0x2668ac0; 1 drivers +v0x26451d0_0 .net "INST", 3 0, L_0x2668300; 1 drivers +v0x26452b0_0 .net "LABEL", 3 0, L_0x2668c70; 1 drivers +v0x2645390_0 .var "PC", 3 0; +v0x2645470_0 .var "PCNEXT", 3 0; +v0x2645550_0 .net "SRC", 2 0, L_0x2668830; 1 drivers +v0x26456c0_0 .net *"_s103", 0 0, L_0x2666d50; 1 drivers +v0x26457a0_0 .net *"_s107", 0 0, L_0x2666c60; 1 drivers +v0x2645880_0 .net *"_s111", 0 0, L_0x2666f40; 1 drivers +v0x2645960_0 .net *"_s115", 0 0, L_0x2666df0; 1 drivers +v0x2645a40_0 .net *"_s119", 0 0, L_0x26670f0; 1 drivers +v0x2645b20_0 .net *"_s123", 0 0, L_0x2666fe0; 1 drivers +v0x2645c00_0 .net *"_s127", 0 0, L_0x26672b0; 1 drivers +v0x2645ce0_0 .net *"_s131", 0 0, L_0x2667190; 1 drivers +v0x2645e90_0 .net *"_s135", 0 0, L_0x2667510; 1 drivers +v0x2645f30_0 .net *"_s139", 0 0, L_0x26673e0; 1 drivers +v0x2644c40_0 .net *"_s143", 0 0, L_0x26676f0; 1 drivers +v0x2645ff0_0 .net *"_s147", 0 0, L_0x26675b0; 1 drivers +v0x26460b0_0 .net *"_s151", 0 0, L_0x26678e0; 1 drivers +v0x2646190_0 .net *"_s155", 0 0, L_0x2667790; 1 drivers +v0x2646270_0 .net *"_s159", 0 0, L_0x2667830; 1 drivers +v0x2646350_0 .net *"_s160", 17 0, L_0x2667980; 1 drivers +v0x2646430_0 .net *"_s162", 5 0, L_0x2667ce0; 1 drivers +L_0x2b5f64126060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2646510_0 .net *"_s165", 1 0, L_0x2b5f64126060; 1 drivers +v0x2648510_2 .array/port v0x2648510, 2; +v0x26465f0_0 .net *"_s173", 10 0, v0x2648510_2; 1 drivers +v0x2648510_3 .array/port v0x2648510, 3; +v0x26466d0_0 .net *"_s179", 10 0, v0x2648510_3; 1 drivers +v0x2648510_0 .array/port v0x2648510, 0; +v0x26467b0_0 .net *"_s185", 10 0, v0x2648510_0; 1 drivers +v0x2648510_1 .array/port v0x2648510, 1; +v0x2646890_0 .net *"_s191", 10 0, v0x2648510_1; 1 drivers +v0x2646970_0 .net *"_s23", 0 0, L_0x2665140; 1 drivers +v0x2646a50_0 .net *"_s27", 0 0, L_0x2665260; 1 drivers +v0x2645dc0_0 .net *"_s31", 0 0, L_0x26653d0; 1 drivers +v0x2646d20_0 .net *"_s36", 0 0, L_0x2665680; 1 drivers +v0x2646e00_0 .net *"_s42", 0 0, L_0x2665910; 1 drivers +v0x2646ee0_0 .net *"_s46", 0 0, L_0x26659b0; 1 drivers +v0x2646fc0_0 .net *"_s50", 0 0, L_0x2665ac0; 1 drivers +v0x26470a0_0 .net *"_s55", 0 0, L_0x2665d50; 1 drivers +v0x2647180_0 .net *"_s61", 0 0, L_0x2665fc0; 1 drivers +v0x2647260_0 .net *"_s65", 0 0, L_0x26660f0; 1 drivers +v0x2647340_0 .net *"_s69", 0 0, L_0x2666230; 1 drivers +v0x2647420_0 .net *"_s74", 0 0, L_0x2666190; 1 drivers +v0x2647500_0 .net *"_s80", 0 0, L_0x2666420; 1 drivers +v0x26475e0_0 .net *"_s84", 0 0, L_0x2666710; 1 drivers +v0x26476c0_0 .net *"_s88", 0 0, L_0x2666650; 1 drivers +v0x26477a0_0 .net *"_s93", 0 0, L_0x26667b0; 1 drivers +v0x2647880_0 .net *"_s99", 0 0, L_0x2666a40; 1 drivers +v0x2647960_0 .net/s "accOut", 10 0, L_0x2654c40; alias, 1 drivers +v0x2647a40_0 .net "anyHasData", 0 0, L_0x26657c0; 1 drivers +v0x2647b00_0 .net "anyReadAck", 0 0, L_0x26665b0; 1 drivers +v0x2647bc0_0 .net "anyWantData", 0 0, L_0x2665e40; 1 drivers +v0x2647c80_0 .net "anyWriteAck", 0 0, L_0x2666b70; 1 drivers +v0x2647d40_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers +o0x2b5f640f7ef8 .functor BUFZ 15, C4; HiZ drive +v0x2647e30_0 .net "down", 14 0, o0x2b5f640f7ef8; 0 drivers +v0x2647f10_0 .net "downOut", 14 0, L_0x2668060; 1 drivers +v0x2647ff0_0 .net "instruction", 17 0, L_0x2665cd0; 1 drivers +v0x26480d0 .array "instructions", 15 0, 17 0; +v0x2648190_0 .var "last", 2 0; +o0x2b5f640f7fb8 .functor BUFZ 15, C4; HiZ drive +v0x2648270_0 .net "left", 14 0, o0x2b5f640f7fb8; 0 drivers +v0x2648350_0 .net "leftOut", 14 0, L_0x2667e40; 1 drivers +v0x2648430_0 .var "mode", 2 0; +v0x2648510 .array/s "outVals", 2 5, 10 0; +v0x2648650_0 .var "phase", 2 0; +v0x2648730_0 .net "portsHaveData", 5 2, L_0x2665470; 1 drivers +v0x2646b30_0 .net "portsWantData", 5 2, L_0x2665b60; 1 drivers +v0x2646c10_0 .net "readAckIn", 5 2, L_0x26662d0; 1 drivers +v0x2648be0_0 .var "readAckOut", 5 2; +v0x2648cc0_0 .var "readTarget", 2 0; +v0x2648da0_0 .var/s "readValue", 10 0; +L_0x2b5f64126018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2648e80 .array "regVals", 0 7; +v0x2648e80_0 .net/s v0x2648e80 0, 10 0, L_0x2b5f64126018; 1 drivers +v0x2648e80_1 .net/s v0x2648e80 1, 10 0, L_0x2664ce0; 1 drivers +v0x2648e80_2 .net/s v0x2648e80 2, 10 0, L_0x2664da0; 1 drivers +v0x2648e80_3 .net/s v0x2648e80 3, 10 0, L_0x2664e40; 1 drivers +v0x2648e80_4 .net/s v0x2648e80 4, 10 0, L_0x2664f10; 1 drivers +v0x2648e80_5 .net/s v0x2648e80 5, 10 0, L_0x2665010; 1 drivers +o0x2b5f640f8378 .functor BUFZ 11, C4; HiZ drive +v0x2648e80_6 .net/s v0x2648e80 6, 10 0, o0x2b5f640f8378; 0 drivers +o0x2b5f640f83a8 .functor BUFZ 11, C4; HiZ drive +v0x2648e80_7 .net/s v0x2648e80 7, 10 0, o0x2b5f640f83a8; 0 drivers +v0x2649090_0 .net "right", 14 0, L_0x2678320; alias, 1 drivers +v0x2649180_0 .net "rightOut", 14 0, L_0x2668610; alias, 1 drivers +o0x2b5f640f83d8 .functor BUFZ 15, C4; HiZ drive +v0x2649250_0 .net "up", 14 0, o0x2b5f640f83d8; 0 drivers +v0x2649310_0 .net "upOut", 14 0, L_0x2667b70; 1 drivers +v0x26493f0_0 .var "weHaveData", 5 2; +v0x26494d0_0 .var "weWantData", 5 2; +v0x26495b0_0 .net "writeAckIn", 5 2, L_0x2666880; 1 drivers +v0x2649690_0 .var "writeAckOut", 5 2; +v0x2649770_0 .var "writeTarget", 2 0; +v0x2649850_0 .var/s "writeValue", 10 0; +L_0x2664da0 .part o0x2b5f640f7fb8, 0, 11; +L_0x2664e40 .part L_0x2678320, 0, 11; +L_0x2664f10 .part o0x2b5f640f83d8, 0, 11; +L_0x2665010 .part o0x2b5f640f7ef8, 0, 11; +L_0x2665140 .part o0x2b5f640f7fb8, 11, 1; +L_0x2665260 .part L_0x2678320, 11, 1; +L_0x26653d0 .part o0x2b5f640f83d8, 11, 1; +L_0x2665470 .concat8 [ 1 1 1 1], L_0x2665140, L_0x2665260, L_0x26653d0, L_0x2665680; +L_0x2665680 .part o0x2b5f640f7ef8, 11, 1; +L_0x26657c0 .reduce/or L_0x2665470; +L_0x2665910 .part o0x2b5f640f7fb8, 12, 1; +L_0x26659b0 .part L_0x2678320, 12, 1; +L_0x2665ac0 .part o0x2b5f640f83d8, 12, 1; +L_0x2665b60 .concat8 [ 1 1 1 1], L_0x2665910, L_0x26659b0, L_0x2665ac0, L_0x2665d50; +L_0x2665d50 .part o0x2b5f640f7ef8, 12, 1; +L_0x2665e40 .reduce/or L_0x2665b60; +L_0x2665fc0 .part o0x2b5f640f7fb8, 13, 1; +L_0x26660f0 .part L_0x2678320, 13, 1; +L_0x2666230 .part o0x2b5f640f83d8, 13, 1; +L_0x26662d0 .concat8 [ 1 1 1 1], L_0x2665fc0, L_0x26660f0, L_0x2666230, L_0x2666190; +L_0x2666190 .part o0x2b5f640f7ef8, 13, 1; +L_0x26665b0 .reduce/or L_0x26662d0; +L_0x2666420 .part o0x2b5f640f7fb8, 14, 1; +L_0x2666710 .part L_0x2678320, 14, 1; +L_0x2666650 .part o0x2b5f640f83d8, 14, 1; +L_0x2666880 .concat8 [ 1 1 1 1], L_0x2666420, L_0x2666710, L_0x2666650, L_0x26667b0; +L_0x26667b0 .part o0x2b5f640f7ef8, 14, 1; +L_0x2666b70 .reduce/or L_0x2666880; +L_0x2666a40 .part v0x2648be0_0, 0, 1; +L_0x2666d50 .part v0x2648be0_0, 1, 1; +L_0x2666c60 .part v0x2648be0_0, 2, 1; +L_0x2666f40 .part v0x2648be0_0, 3, 1; +L_0x2666df0 .part v0x2649690_0, 0, 1; +L_0x26670f0 .part v0x2649690_0, 1, 1; +L_0x2666fe0 .part v0x2649690_0, 2, 1; +L_0x26672b0 .part v0x2649690_0, 3, 1; +L_0x2667190 .part v0x26494d0_0, 0, 1; +L_0x2667510 .part v0x26494d0_0, 1, 1; +L_0x26673e0 .part v0x26494d0_0, 2, 1; +L_0x26676f0 .part v0x26494d0_0, 3, 1; +L_0x26675b0 .part v0x26493f0_0, 0, 1; +L_0x26678e0 .part v0x26493f0_0, 1, 1; +L_0x2667790 .part v0x26493f0_0, 2, 1; +L_0x2667830 .part v0x26493f0_0, 3, 1; +L_0x2667980 .array/port v0x26480d0, L_0x2667ce0; +L_0x2667ce0 .concat [ 4 2 0 0], v0x2645390_0, L_0x2b5f64126060; +LS_0x2667b70_0_0 .concat8 [ 11 1 1 1], v0x2648510_2, L_0x2667790, L_0x26673e0, L_0x2666fe0; +LS_0x2667b70_0_4 .concat8 [ 1 0 0 0], L_0x2666c60; +L_0x2667b70 .concat8 [ 14 1 0 0], LS_0x2667b70_0_0, LS_0x2667b70_0_4; +LS_0x2668060_0_0 .concat8 [ 11 1 1 1], v0x2648510_3, L_0x2667830, L_0x26676f0, L_0x26672b0; +LS_0x2668060_0_4 .concat8 [ 1 0 0 0], L_0x2666f40; +L_0x2668060 .concat8 [ 14 1 0 0], LS_0x2668060_0_0, LS_0x2668060_0_4; +LS_0x2667e40_0_0 .concat8 [ 11 1 1 1], v0x2648510_0, L_0x26675b0, L_0x2667190, L_0x2666df0; +LS_0x2667e40_0_4 .concat8 [ 1 0 0 0], L_0x2666a40; +L_0x2667e40 .concat8 [ 14 1 0 0], LS_0x2667e40_0_0, LS_0x2667e40_0_4; +LS_0x2668610_0_0 .concat8 [ 11 1 1 1], v0x2648510_1, L_0x26678e0, L_0x2667510, L_0x26670f0; +LS_0x2668610_0_4 .concat8 [ 1 0 0 0], L_0x2666d50; +L_0x2668610 .concat8 [ 14 1 0 0], LS_0x2668610_0_0, LS_0x2668610_0_4; +L_0x2668300 .part L_0x2665cd0, 14, 4; +L_0x2668a20 .part L_0x2665cd0, 11, 3; +L_0x2668830 .part L_0x2665cd0, 8, 3; +L_0x2668c70 .part L_0x2665cd0, 10, 4; +L_0x2668ac0 .part L_0x2665cd0, 0, 11; +S_0x2649ad0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x2585810; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x2649ca0 .param/str "memFile" 0 3 60, "anyWrite/right.dat"; +L_0x2668960 .functor BUFZ 11, v0x2649f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2668b60 .functor BUFZ 11, v0x2649f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2669ae0 .functor BUFZ 18, L_0x266bad0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2649f90_0 .var/s "ACC", 10 0; +v0x264a090_0 .var/s "BAK", 10 0; +v0x264a170_0 .net "DST", 2 0, L_0x266cbd0; 1 drivers +v0x264a230_0 .net/s "IMM", 10 0, L_0x266cc70; 1 drivers +v0x264a310_0 .net "INST", 3 0, L_0x266c4f0; 1 drivers +v0x264a3f0_0 .net "LABEL", 3 0, L_0x266ce20; 1 drivers +v0x264a4d0_0 .var "PC", 3 0; +v0x264a5b0_0 .var "PCNEXT", 3 0; +v0x264a690_0 .net "SRC", 2 0, L_0x266c9e0; 1 drivers +v0x264a800_0 .net *"_s103", 0 0, L_0x266ae10; 1 drivers +v0x264a8e0_0 .net *"_s107", 0 0, L_0x266ad20; 1 drivers +v0x264a9c0_0 .net *"_s111", 0 0, L_0x266b000; 1 drivers +v0x264aaa0_0 .net *"_s115", 0 0, L_0x266af00; 1 drivers +v0x264ab80_0 .net *"_s119", 0 0, L_0x266b240; 1 drivers +v0x264ac60_0 .net *"_s123", 0 0, L_0x266b130; 1 drivers +v0x264ad40_0 .net *"_s127", 0 0, L_0x266b400; 1 drivers +v0x264ae20_0 .net *"_s131", 0 0, L_0x266b2e0; 1 drivers +v0x264afd0_0 .net *"_s135", 0 0, L_0x266b660; 1 drivers +v0x264b070_0 .net *"_s139", 0 0, L_0x266b530; 1 drivers +v0x264b150_0 .net *"_s143", 0 0, L_0x266b840; 1 drivers +v0x264b230_0 .net *"_s147", 0 0, L_0x266b700; 1 drivers +v0x264b310_0 .net *"_s151", 0 0, L_0x266ba30; 1 drivers +v0x264b3f0_0 .net *"_s155", 0 0, L_0x266b8e0; 1 drivers +v0x264b4d0_0 .net *"_s159", 0 0, L_0x266b980; 1 drivers +v0x264b5b0_0 .net *"_s160", 17 0, L_0x266bad0; 1 drivers +v0x264b690_0 .net *"_s162", 5 0, L_0x266be30; 1 drivers +L_0x2b5f641260f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x264b770_0 .net *"_s165", 1 0, L_0x2b5f641260f0; 1 drivers +v0x264d6a0_2 .array/port v0x264d6a0, 2; +v0x264b850_0 .net *"_s173", 10 0, v0x264d6a0_2; 1 drivers +v0x264d6a0_3 .array/port v0x264d6a0, 3; +v0x264b930_0 .net *"_s179", 10 0, v0x264d6a0_3; 1 drivers +v0x264d6a0_0 .array/port v0x264d6a0, 0; +v0x264ba10_0 .net *"_s185", 10 0, v0x264d6a0_0; 1 drivers +v0x264d6a0_1 .array/port v0x264d6a0, 1; +v0x264baf0_0 .net *"_s191", 10 0, v0x264d6a0_1; 1 drivers +v0x264bbd0_0 .net *"_s23", 0 0, L_0x2669210; 1 drivers +v0x264bcb0_0 .net *"_s27", 0 0, L_0x2669370; 1 drivers +v0x264af00_0 .net *"_s31", 0 0, L_0x2669440; 1 drivers +v0x264bf80_0 .net *"_s36", 0 0, L_0x2669710; 1 drivers +v0x264c060_0 .net *"_s42", 0 0, L_0x26699a0; 1 drivers +v0x264c140_0 .net *"_s46", 0 0, L_0x2669a40; 1 drivers +v0x264c220_0 .net *"_s50", 0 0, L_0x2669b50; 1 drivers +v0x264c300_0 .net *"_s55", 0 0, L_0x2669de0; 1 drivers +v0x264c3e0_0 .net *"_s61", 0 0, L_0x266a050; 1 drivers +v0x264c4c0_0 .net *"_s65", 0 0, L_0x266a0f0; 1 drivers +v0x264c5a0_0 .net *"_s69", 0 0, L_0x266a2c0; 1 drivers +v0x264c680_0 .net *"_s74", 0 0, L_0x266a220; 1 drivers +v0x264c760_0 .net *"_s80", 0 0, L_0x266a4b0; 1 drivers +v0x264c840_0 .net *"_s84", 0 0, L_0x266a7a0; 1 drivers +v0x264c920_0 .net *"_s88", 0 0, L_0x266a6e0; 1 drivers +v0x264ca00_0 .net *"_s93", 0 0, L_0x266a840; 1 drivers +v0x264cae0_0 .net *"_s99", 0 0, L_0x266ab00; 1 drivers +v0x264cbc0_0 .net/s "accOut", 10 0, L_0x2668960; alias, 1 drivers +v0x264cca0_0 .net "anyHasData", 0 0, L_0x2669850; 1 drivers +v0x264cd60_0 .net "anyReadAck", 0 0, L_0x266a640; 1 drivers +v0x264ce20_0 .net "anyWantData", 0 0, L_0x2669ed0; 1 drivers +v0x264cee0_0 .net "anyWriteAck", 0 0, L_0x266ac30; 1 drivers +v0x264cfa0_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers +o0x2b5f640f9128 .functor BUFZ 15, C4; HiZ drive +v0x264d040_0 .net "down", 14 0, o0x2b5f640f9128; 0 drivers +v0x264d120_0 .net "downOut", 14 0, L_0x266c250; 1 drivers +v0x264d200_0 .net "instruction", 17 0, L_0x2669ae0; 1 drivers +v0x264d2e0 .array "instructions", 15 0, 17 0; +v0x264d3a0_0 .var "last", 2 0; +v0x264d480_0 .net "left", 14 0, L_0x2678cf0; alias, 1 drivers +v0x264d540_0 .net "leftOut", 14 0, L_0x266bf90; alias, 1 drivers +v0x264d5e0_0 .var "mode", 2 0; +v0x264d6a0 .array/s "outVals", 2 5, 10 0; +v0x264d810_0 .var "phase", 2 0; +v0x264d8f0_0 .net "portsHaveData", 5 2, L_0x2669530; 1 drivers +v0x264bd50_0 .net "portsWantData", 5 2, L_0x2669bf0; 1 drivers +v0x264be30_0 .net "readAckIn", 5 2, L_0x266a360; 1 drivers +v0x264dda0_0 .var "readAckOut", 5 2; +v0x264de40_0 .var "readTarget", 2 0; +v0x264dee0_0 .var/s "readValue", 10 0; +L_0x2b5f641260a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x264df80 .array "regVals", 0 7; +v0x264df80_0 .net/s v0x264df80 0, 10 0, L_0x2b5f641260a8; 1 drivers +v0x264df80_1 .net/s v0x264df80 1, 10 0, L_0x2668b60; 1 drivers +v0x264df80_2 .net/s v0x264df80 2, 10 0, L_0x2668ed0; 1 drivers +v0x264df80_3 .net/s v0x264df80 3, 10 0, L_0x2668f70; 1 drivers +v0x264df80_4 .net/s v0x264df80 4, 10 0, L_0x2669010; 1 drivers +v0x264df80_5 .net/s v0x264df80 5, 10 0, L_0x26690e0; 1 drivers +o0x2b5f640f9548 .functor BUFZ 11, C4; HiZ drive +v0x264df80_6 .net/s v0x264df80 6, 10 0, o0x2b5f640f9548; 0 drivers +o0x2b5f640f9578 .functor BUFZ 11, C4; HiZ drive +v0x264df80_7 .net/s v0x264df80 7, 10 0, o0x2b5f640f9578; 0 drivers +o0x2b5f640f95a8 .functor BUFZ 15, C4; HiZ drive +v0x264e190_0 .net "right", 14 0, o0x2b5f640f95a8; 0 drivers +v0x264e270_0 .net "rightOut", 14 0, L_0x266c7c0; 1 drivers +o0x2b5f640f9608 .functor BUFZ 15, C4; HiZ drive +v0x264e350_0 .net "up", 14 0, o0x2b5f640f9608; 0 drivers +v0x264e430_0 .net "upOut", 14 0, L_0x266bd40; 1 drivers +v0x264e510_0 .var "weHaveData", 5 2; +v0x264e5f0_0 .var "weWantData", 5 2; +v0x264e6d0_0 .net "writeAckIn", 5 2, L_0x266a910; 1 drivers +v0x264e7b0_0 .var "writeAckOut", 5 2; +v0x264e890_0 .var "writeTarget", 2 0; +v0x264e970_0 .var/s "writeValue", 10 0; +L_0x2668ed0 .part L_0x2678cf0, 0, 11; +L_0x2668f70 .part o0x2b5f640f95a8, 0, 11; +L_0x2669010 .part o0x2b5f640f9608, 0, 11; +L_0x26690e0 .part o0x2b5f640f9128, 0, 11; +L_0x2669210 .part L_0x2678cf0, 11, 1; +L_0x2669370 .part o0x2b5f640f95a8, 11, 1; +L_0x2669440 .part o0x2b5f640f9608, 11, 1; +L_0x2669530 .concat8 [ 1 1 1 1], L_0x2669210, L_0x2669370, L_0x2669440, L_0x2669710; +L_0x2669710 .part o0x2b5f640f9128, 11, 1; +L_0x2669850 .reduce/or L_0x2669530; +L_0x26699a0 .part L_0x2678cf0, 12, 1; +L_0x2669a40 .part o0x2b5f640f95a8, 12, 1; +L_0x2669b50 .part o0x2b5f640f9608, 12, 1; +L_0x2669bf0 .concat8 [ 1 1 1 1], L_0x26699a0, L_0x2669a40, L_0x2669b50, L_0x2669de0; +L_0x2669de0 .part o0x2b5f640f9128, 12, 1; +L_0x2669ed0 .reduce/or L_0x2669bf0; +L_0x266a050 .part L_0x2678cf0, 13, 1; +L_0x266a0f0 .part o0x2b5f640f95a8, 13, 1; +L_0x266a2c0 .part o0x2b5f640f9608, 13, 1; +L_0x266a360 .concat8 [ 1 1 1 1], L_0x266a050, L_0x266a0f0, L_0x266a2c0, L_0x266a220; +L_0x266a220 .part o0x2b5f640f9128, 13, 1; +L_0x266a640 .reduce/or L_0x266a360; +L_0x266a4b0 .part L_0x2678cf0, 14, 1; +L_0x266a7a0 .part o0x2b5f640f95a8, 14, 1; +L_0x266a6e0 .part o0x2b5f640f9608, 14, 1; +L_0x266a910 .concat8 [ 1 1 1 1], L_0x266a4b0, L_0x266a7a0, L_0x266a6e0, L_0x266a840; +L_0x266a840 .part o0x2b5f640f9128, 14, 1; +L_0x266ac30 .reduce/or L_0x266a910; +L_0x266ab00 .part v0x264dda0_0, 0, 1; +L_0x266ae10 .part v0x264dda0_0, 1, 1; +L_0x266ad20 .part v0x264dda0_0, 2, 1; +L_0x266b000 .part v0x264dda0_0, 3, 1; +L_0x266af00 .part v0x264e7b0_0, 0, 1; +L_0x266b240 .part v0x264e7b0_0, 1, 1; +L_0x266b130 .part v0x264e7b0_0, 2, 1; +L_0x266b400 .part v0x264e7b0_0, 3, 1; +L_0x266b2e0 .part v0x264e5f0_0, 0, 1; +L_0x266b660 .part v0x264e5f0_0, 1, 1; +L_0x266b530 .part v0x264e5f0_0, 2, 1; +L_0x266b840 .part v0x264e5f0_0, 3, 1; +L_0x266b700 .part v0x264e510_0, 0, 1; +L_0x266ba30 .part v0x264e510_0, 1, 1; +L_0x266b8e0 .part v0x264e510_0, 2, 1; +L_0x266b980 .part v0x264e510_0, 3, 1; +L_0x266bad0 .array/port v0x264d2e0, L_0x266be30; +L_0x266be30 .concat [ 4 2 0 0], v0x264a4d0_0, L_0x2b5f641260f0; +LS_0x266bd40_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_2, L_0x266b8e0, L_0x266b530, L_0x266b130; +LS_0x266bd40_0_4 .concat8 [ 1 0 0 0], L_0x266ad20; +L_0x266bd40 .concat8 [ 14 1 0 0], LS_0x266bd40_0_0, LS_0x266bd40_0_4; +LS_0x266c250_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_3, L_0x266b980, L_0x266b840, L_0x266b400; +LS_0x266c250_0_4 .concat8 [ 1 0 0 0], L_0x266b000; +L_0x266c250 .concat8 [ 14 1 0 0], LS_0x266c250_0_0, LS_0x266c250_0_4; +LS_0x266bf90_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_0, L_0x266b700, L_0x266b2e0, L_0x266af00; +LS_0x266bf90_0_4 .concat8 [ 1 0 0 0], L_0x266ab00; +L_0x266bf90 .concat8 [ 14 1 0 0], LS_0x266bf90_0_0, LS_0x266bf90_0_4; +LS_0x266c7c0_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_1, L_0x266ba30, L_0x266b660, L_0x266b240; +LS_0x266c7c0_0_4 .concat8 [ 1 0 0 0], L_0x266ae10; +L_0x266c7c0 .concat8 [ 14 1 0 0], LS_0x266c7c0_0_0, LS_0x266c7c0_0_4; +L_0x266c4f0 .part L_0x2669ae0, 14, 4; +L_0x266cbd0 .part L_0x2669ae0, 11, 3; +L_0x266c9e0 .part L_0x2669ae0, 8, 3; +L_0x266ce20 .part L_0x2669ae0, 10, 4; +L_0x266cc70 .part L_0x2669ae0, 0, 11; +S_0x264ebf0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x2585810; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x264ee10 .param/str "memFile" 0 3 60, "anyWrite/up.dat"; +L_0x266cb10 .functor BUFZ 11, v0x264f040_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x266cd60 .functor BUFZ 11, v0x264f040_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x266dba0 .functor BUFZ 18, L_0x266fb40, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x264f040_0 .var/s "ACC", 10 0; +v0x264f140_0 .var/s "BAK", 10 0; +v0x264f220_0 .net "DST", 2 0, L_0x2670c80; 1 drivers +v0x264f2e0_0 .net/s "IMM", 10 0, L_0x2670d20; 1 drivers +v0x264f3c0_0 .net "INST", 3 0, L_0x2670560; 1 drivers +v0x264f4f0_0 .net "LABEL", 3 0, L_0x2670ed0; 1 drivers +v0x264f5d0_0 .var "PC", 3 0; +v0x264f6b0_0 .var "PCNEXT", 3 0; +v0x264f790_0 .net "SRC", 2 0, L_0x2670a90; 1 drivers +v0x264f900_0 .net *"_s103", 0 0, L_0x266ee80; 1 drivers +v0x264f9e0_0 .net *"_s107", 0 0, L_0x266ed90; 1 drivers +v0x264fac0_0 .net *"_s111", 0 0, L_0x266f070; 1 drivers +v0x264fba0_0 .net *"_s115", 0 0, L_0x266ef70; 1 drivers +v0x264fc80_0 .net *"_s119", 0 0, L_0x266f2b0; 1 drivers +v0x264fd60_0 .net *"_s123", 0 0, L_0x266f1a0; 1 drivers +v0x264fe40_0 .net *"_s127", 0 0, L_0x266f470; 1 drivers +v0x264ff20_0 .net *"_s131", 0 0, L_0x266f350; 1 drivers +v0x26500d0_0 .net *"_s135", 0 0, L_0x266f6d0; 1 drivers +v0x2650170_0 .net *"_s139", 0 0, L_0x266f5a0; 1 drivers +v0x2650250_0 .net *"_s143", 0 0, L_0x266f8b0; 1 drivers +v0x2650330_0 .net *"_s147", 0 0, L_0x266f770; 1 drivers +v0x2650410_0 .net *"_s151", 0 0, L_0x266faa0; 1 drivers +v0x26504f0_0 .net *"_s155", 0 0, L_0x266f950; 1 drivers +v0x26505d0_0 .net *"_s159", 0 0, L_0x266f9f0; 1 drivers +v0x26506b0_0 .net *"_s160", 17 0, L_0x266fb40; 1 drivers +v0x2650790_0 .net *"_s162", 5 0, L_0x266fea0; 1 drivers +L_0x2b5f64126180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2650870_0 .net *"_s165", 1 0, L_0x2b5f64126180; 1 drivers +v0x2652830_2 .array/port v0x2652830, 2; +v0x2650950_0 .net *"_s173", 10 0, v0x2652830_2; 1 drivers +v0x2652830_3 .array/port v0x2652830, 3; +v0x2650a30_0 .net *"_s179", 10 0, v0x2652830_3; 1 drivers +v0x2652830_0 .array/port v0x2652830, 0; +v0x2650b10_0 .net *"_s185", 10 0, v0x2652830_0; 1 drivers +v0x2652830_1 .array/port v0x2652830, 1; +v0x2650bf0_0 .net *"_s191", 10 0, v0x2652830_1; 1 drivers +v0x2650cd0_0 .net *"_s23", 0 0, L_0x266d360; 1 drivers +v0x2650db0_0 .net *"_s27", 0 0, L_0x266d480; 1 drivers +v0x2650000_0 .net *"_s31", 0 0, L_0x266d570; 1 drivers +v0x2651080_0 .net *"_s36", 0 0, L_0x266d840; 1 drivers +v0x2651160_0 .net *"_s42", 0 0, L_0x266da60; 1 drivers +v0x2651240_0 .net *"_s46", 0 0, L_0x266db00; 1 drivers +v0x2651320_0 .net *"_s50", 0 0, L_0x266dc10; 1 drivers +v0x2651400_0 .net *"_s55", 0 0, L_0x266de50; 1 drivers +v0x26514e0_0 .net *"_s61", 0 0, L_0x266e0c0; 1 drivers +v0x26515c0_0 .net *"_s65", 0 0, L_0x266e1f0; 1 drivers +v0x26516a0_0 .net *"_s69", 0 0, L_0x266e3c0; 1 drivers +v0x2651780_0 .net *"_s74", 0 0, L_0x266e320; 1 drivers +v0x2651860_0 .net *"_s80", 0 0, L_0x266e560; 1 drivers +v0x2651940_0 .net *"_s84", 0 0, L_0x266e810; 1 drivers +v0x2651a20_0 .net *"_s88", 0 0, L_0x266e750; 1 drivers +v0x2651b00_0 .net *"_s93", 0 0, L_0x266e8b0; 1 drivers +v0x2651be0_0 .net *"_s99", 0 0, L_0x266eb70; 1 drivers +v0x2651cc0_0 .net/s "accOut", 10 0, L_0x266cb10; alias, 1 drivers +v0x2651da0_0 .net "anyHasData", 0 0, L_0x266d9c0; 1 drivers +v0x2651e60_0 .net "anyReadAck", 0 0, L_0x266e660; 1 drivers +v0x2651f20_0 .net "anyWantData", 0 0, L_0x266df40; 1 drivers +v0x2651fe0_0 .net "anyWriteAck", 0 0, L_0x266eca0; 1 drivers +v0x26520a0_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers +v0x26521d0_0 .net "down", 14 0, L_0x2678050; alias, 1 drivers +v0x2652290_0 .net "downOut", 14 0, L_0x26702c0; alias, 1 drivers +v0x2652330_0 .net "instruction", 17 0, L_0x266dba0; 1 drivers +v0x26523f0 .array "instructions", 15 0, 17 0; +v0x26524b0_0 .var "last", 2 0; +o0x2b5f640fa3b8 .functor BUFZ 15, C4; HiZ drive +v0x2652590_0 .net "left", 14 0, o0x2b5f640fa3b8; 0 drivers +v0x2652670_0 .net "leftOut", 14 0, L_0x2670000; 1 drivers +v0x2652750_0 .var "mode", 2 0; +v0x2652830 .array/s "outVals", 2 5, 10 0; +v0x26529a0_0 .var "phase", 2 0; +v0x2652a80_0 .net "portsHaveData", 5 2, L_0x266d660; 1 drivers +v0x2650e50_0 .net "portsWantData", 5 2, L_0x266dcb0; 1 drivers +v0x2650f30_0 .net "readAckIn", 5 2, L_0x266e460; 1 drivers +v0x2652f30_0 .var "readAckOut", 5 2; +v0x2652fd0_0 .var "readTarget", 2 0; +v0x2653070_0 .var/s "readValue", 10 0; +L_0x2b5f64126138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2653110 .array "regVals", 0 7; +v0x2653110_0 .net/s v0x2653110 0, 10 0, L_0x2b5f64126138; 1 drivers +v0x2653110_1 .net/s v0x2653110 1, 10 0, L_0x266cd60; 1 drivers +v0x2653110_2 .net/s v0x2653110 2, 10 0, L_0x266d080; 1 drivers +v0x2653110_3 .net/s v0x2653110 3, 10 0, L_0x266d120; 1 drivers +v0x2653110_4 .net/s v0x2653110 4, 10 0, L_0x266d1c0; 1 drivers +v0x2653110_5 .net/s v0x2653110 5, 10 0, L_0x266d260; 1 drivers +o0x2b5f640fa778 .functor BUFZ 11, C4; HiZ drive +v0x2653110_6 .net/s v0x2653110 6, 10 0, o0x2b5f640fa778; 0 drivers +o0x2b5f640fa7a8 .functor BUFZ 11, C4; HiZ drive +v0x2653110_7 .net/s v0x2653110 7, 10 0, o0x2b5f640fa7a8; 0 drivers +o0x2b5f640fa7d8 .functor BUFZ 15, C4; HiZ drive +v0x2653320_0 .net "right", 14 0, o0x2b5f640fa7d8; 0 drivers +v0x2653400_0 .net "rightOut", 14 0, L_0x2670870; 1 drivers +o0x2b5f640fa838 .functor BUFZ 15, C4; HiZ drive +v0x26534e0_0 .net "up", 14 0, o0x2b5f640fa838; 0 drivers +v0x26535c0_0 .net "upOut", 14 0, L_0x266fdb0; 1 drivers +v0x26536a0_0 .var "weHaveData", 5 2; +v0x2653780_0 .var "weWantData", 5 2; +v0x2653860_0 .net "writeAckIn", 5 2, L_0x266e980; 1 drivers +v0x2653940_0 .var "writeAckOut", 5 2; +v0x2653a20_0 .var "writeTarget", 2 0; +v0x2653b00_0 .var/s "writeValue", 10 0; +L_0x266d080 .part o0x2b5f640fa3b8, 0, 11; +L_0x266d120 .part o0x2b5f640fa7d8, 0, 11; +L_0x266d1c0 .part o0x2b5f640fa838, 0, 11; +L_0x266d260 .part L_0x2678050, 0, 11; +L_0x266d360 .part o0x2b5f640fa3b8, 11, 1; +L_0x266d480 .part o0x2b5f640fa7d8, 11, 1; +L_0x266d570 .part o0x2b5f640fa838, 11, 1; +L_0x266d660 .concat8 [ 1 1 1 1], L_0x266d360, L_0x266d480, L_0x266d570, L_0x266d840; +L_0x266d840 .part L_0x2678050, 11, 1; +L_0x266d9c0 .reduce/or L_0x266d660; +L_0x266da60 .part o0x2b5f640fa3b8, 12, 1; +L_0x266db00 .part o0x2b5f640fa7d8, 12, 1; +L_0x266dc10 .part o0x2b5f640fa838, 12, 1; +L_0x266dcb0 .concat8 [ 1 1 1 1], L_0x266da60, L_0x266db00, L_0x266dc10, L_0x266de50; +L_0x266de50 .part L_0x2678050, 12, 1; +L_0x266df40 .reduce/or L_0x266dcb0; +L_0x266e0c0 .part o0x2b5f640fa3b8, 13, 1; +L_0x266e1f0 .part o0x2b5f640fa7d8, 13, 1; +L_0x266e3c0 .part o0x2b5f640fa838, 13, 1; +L_0x266e460 .concat8 [ 1 1 1 1], L_0x266e0c0, L_0x266e1f0, L_0x266e3c0, L_0x266e320; +L_0x266e320 .part L_0x2678050, 13, 1; +L_0x266e660 .reduce/or L_0x266e460; +L_0x266e560 .part o0x2b5f640fa3b8, 14, 1; +L_0x266e810 .part o0x2b5f640fa7d8, 14, 1; +L_0x266e750 .part o0x2b5f640fa838, 14, 1; +L_0x266e980 .concat8 [ 1 1 1 1], L_0x266e560, L_0x266e810, L_0x266e750, L_0x266e8b0; +L_0x266e8b0 .part L_0x2678050, 14, 1; +L_0x266eca0 .reduce/or L_0x266e980; +L_0x266eb70 .part v0x2652f30_0, 0, 1; +L_0x266ee80 .part v0x2652f30_0, 1, 1; +L_0x266ed90 .part v0x2652f30_0, 2, 1; +L_0x266f070 .part v0x2652f30_0, 3, 1; +L_0x266ef70 .part v0x2653940_0, 0, 1; +L_0x266f2b0 .part v0x2653940_0, 1, 1; +L_0x266f1a0 .part v0x2653940_0, 2, 1; +L_0x266f470 .part v0x2653940_0, 3, 1; +L_0x266f350 .part v0x2653780_0, 0, 1; +L_0x266f6d0 .part v0x2653780_0, 1, 1; +L_0x266f5a0 .part v0x2653780_0, 2, 1; +L_0x266f8b0 .part v0x2653780_0, 3, 1; +L_0x266f770 .part v0x26536a0_0, 0, 1; +L_0x266faa0 .part v0x26536a0_0, 1, 1; +L_0x266f950 .part v0x26536a0_0, 2, 1; +L_0x266f9f0 .part v0x26536a0_0, 3, 1; +L_0x266fb40 .array/port v0x26523f0, L_0x266fea0; +L_0x266fea0 .concat [ 4 2 0 0], v0x264f5d0_0, L_0x2b5f64126180; +LS_0x266fdb0_0_0 .concat8 [ 11 1 1 1], v0x2652830_2, L_0x266f950, L_0x266f5a0, L_0x266f1a0; +LS_0x266fdb0_0_4 .concat8 [ 1 0 0 0], L_0x266ed90; +L_0x266fdb0 .concat8 [ 14 1 0 0], LS_0x266fdb0_0_0, LS_0x266fdb0_0_4; +LS_0x26702c0_0_0 .concat8 [ 11 1 1 1], v0x2652830_3, L_0x266f9f0, L_0x266f8b0, L_0x266f470; +LS_0x26702c0_0_4 .concat8 [ 1 0 0 0], L_0x266f070; +L_0x26702c0 .concat8 [ 14 1 0 0], LS_0x26702c0_0_0, LS_0x26702c0_0_4; +LS_0x2670000_0_0 .concat8 [ 11 1 1 1], v0x2652830_0, L_0x266f770, L_0x266f350, L_0x266ef70; +LS_0x2670000_0_4 .concat8 [ 1 0 0 0], L_0x266eb70; +L_0x2670000 .concat8 [ 14 1 0 0], LS_0x2670000_0_0, LS_0x2670000_0_4; +LS_0x2670870_0_0 .concat8 [ 11 1 1 1], v0x2652830_1, L_0x266faa0, L_0x266f6d0, L_0x266f2b0; +LS_0x2670870_0_4 .concat8 [ 1 0 0 0], L_0x266ee80; +L_0x2670870 .concat8 [ 14 1 0 0], LS_0x2670870_0_0, LS_0x2670870_0_4; +L_0x2670560 .part L_0x266dba0, 14, 4; +L_0x2670c80 .part L_0x266dba0, 11, 3; +L_0x2670a90 .part L_0x266dba0, 8, 3; +L_0x2670ed0 .part L_0x266dba0, 10, 4; +L_0x2670d20 .part L_0x266dba0, 0, 11; + .scope S_0x2644980; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x2648430_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x2648650_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x2648190_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x2644e50_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x2644f50_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2645390_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2648be0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x26494d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2649690_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x26493f0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2648510, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2648510, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2648510, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2648510, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x2644b80, v0x26480d0 {0 0 0}; + %end; + .thread T_0; + .scope S_0x2644980; +T_1 ; + %wait E_0x25b8e20; + %load/vec4 v0x2648430_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.2, 6; + %jmp T_1.3; +T_1.0 ; + %load/vec4 v0x2648650_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.6, 6; + %jmp T_1.7; +T_1.4 ; + %load/vec4 v0x26451d0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_1.8, 5; + %load/vec4 v0x2645550_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_1.10, 5; + %load/vec4 v0x2645550_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %jmp T_1.11; +T_1.10 ; + %load/vec4 v0x2645550_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_1.12, 5; + %load/vec4 v0x2648730_0; + %load/vec4 v0x2645550_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.14, 8; + %load/vec4 v0x2645550_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2645550_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %load/vec4 v0x2645550_0; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.15; +T_1.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %load/vec4 v0x2645550_0; + %assign/vec4 v0x2648cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2645550_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26494d0_0, 4, 5; + %load/vec4 v0x2645550_0; + %assign/vec4 v0x2648190_0, 0; +T_1.15 ; + %jmp T_1.13; +T_1.12 ; + %load/vec4 v0x2645550_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.16, 4; + %load/vec4 v0x2648190_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_1.18, 4; + %load/vec4 v0x2648190_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %jmp T_1.19; +T_1.18 ; + %load/vec4 v0x2648730_0; + %load/vec4 v0x2648190_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.20, 8; + %load/vec4 v0x2648190_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2648190_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %jmp T_1.21; +T_1.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %load/vec4 v0x2648190_0; + %assign/vec4 v0x2648cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2648190_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26494d0_0, 4, 5; +T_1.21 ; +T_1.19 ; + %jmp T_1.17; +T_1.16 ; + %load/vec4 v0x2645550_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.22, 4; + %load/vec4 v0x2647a40_0; + %flag_set/vec4 8; + %jmp/0xz T_1.24, 8; + %load/vec4 v0x2648730_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.27; +T_1.26 ; + %load/vec4 v0x2648730_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.29; +T_1.28 ; + %load/vec4 v0x2648730_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.31; +T_1.30 ; + %load/vec4 v0x2648730_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2648190_0, 0; +T_1.32 ; +T_1.31 ; +T_1.29 ; +T_1.27 ; + %jmp T_1.25; +T_1.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %load/vec4 v0x2645550_0; + %assign/vec4 v0x2648cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26494d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26494d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26494d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26494d0_0, 4, 5; +T_1.25 ; +T_1.22 ; +T_1.17 ; +T_1.13 ; +T_1.11 ; +T_1.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.7; +T_1.5 ; + %load/vec4 v0x26451d0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_1.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_1.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_1.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_1.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_1.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_1.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_1.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_1.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_1.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_1.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_1.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_1.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_1.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_1.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_1.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_1.49, 6; + %jmp T_1.50; +T_1.34 ; + %load/vec4 v0x2644e50_0; + %load/vec4 v0x2648da0_0; + %add; + %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.35 ; + %load/vec4 v0x2644e50_0; + %load/vec4 v0x2648da0_0; + %sub; + %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.36 ; + %load/vec4 v0x2645390_0; + %pad/u 11; + %load/vec4 v0x2648da0_0; + %add; + %pad/u 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.37 ; + %load/vec4 v0x2648da0_0; + %assign/vec4 v0x2649850_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.38 ; + %load/vec4 v0x26450f0_0; + %assign/vec4 v0x2649850_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.39 ; + %load/vec4 v0x2644e50_0; + %load/vec4 v0x26450f0_0; + %add; + %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.40 ; + %load/vec4 v0x2644e50_0; + %load/vec4 v0x26450f0_0; + %sub; + %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.41 ; + %load/vec4 v0x2645390_0; + %pad/u 11; + %load/vec4 v0x26450f0_0; + %add; + %pad/u 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.42 ; + %load/vec4 v0x2644f50_0; + %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x2644e50_0; + %assign/vec4 v0x2644f50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.43 ; + %load/vec4 v0x2644e50_0; + %assign/vec4 v0x2644f50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.44 ; + %load/vec4 v0x2644e50_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.45 ; + %load/vec4 v0x26452b0_0; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.50; +T_1.46 ; + %load/vec4 v0x2644e50_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_1.51, 4; + %load/vec4 v0x26452b0_0; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.52; +T_1.51 ; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; +T_1.52 ; + %jmp T_1.50; +T_1.47 ; + %load/vec4 v0x2644e50_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_1.53, 4; + %load/vec4 v0x26452b0_0; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.54; +T_1.53 ; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; +T_1.54 ; + %jmp T_1.50; +T_1.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x2644e50_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_1.55, 5; + %load/vec4 v0x26452b0_0; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.56; +T_1.55 ; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; +T_1.56 ; + %jmp T_1.50; +T_1.49 ; + %load/vec4 v0x2644e50_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_1.57, 5; + %load/vec4 v0x26452b0_0; + %assign/vec4 v0x2645470_0, 0; + %jmp T_1.58; +T_1.57 ; + %load/vec4 v0x2645390_0; + %addi 1, 0, 4; + %assign/vec4 v0x2645470_0, 0; +T_1.58 ; + %jmp T_1.50; +T_1.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.7; +T_1.6 ; + %load/vec4 v0x26451d0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x26451d0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_1.59, 4; + %load/vec4 v0x2645030_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x2645030_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x2648190_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_1.61, 9; + %load/vec4 v0x2645030_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_1.63, 4; + %load/vec4 v0x2649850_0; + %assign/vec4 v0x2644e50_0, 0; +T_1.63 ; + %jmp T_1.62; +T_1.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %load/vec4 v0x2645030_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.65, 4; + %load/vec4 v0x2648190_0; + %assign/vec4 v0x2649770_0, 0; + %load/vec4 v0x2649850_0; + %load/vec4 v0x2648190_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2648190_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %jmp T_1.66; +T_1.65 ; + %load/vec4 v0x2645030_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.67, 4; + %load/vec4 v0x2645030_0; + %assign/vec4 v0x2649770_0, 0; + %load/vec4 v0x2649850_0; + %load/vec4 v0x2645030_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2645030_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2645030_0; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.68; +T_1.67 ; + %load/vec4 v0x2647bc0_0; + %flag_set/vec4 8; + %jmp/0xz T_1.69, 8; + %load/vec4 v0x2646b30_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.72; +T_1.71 ; + %load/vec4 v0x2646b30_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.74; +T_1.73 ; + %load/vec4 v0x2646b30_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.76; +T_1.75 ; + %load/vec4 v0x2646b30_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2648190_0, 0; +T_1.77 ; +T_1.76 ; +T_1.74 ; +T_1.72 ; + %jmp T_1.70; +T_1.69 ; + %load/vec4 v0x2645030_0; + %assign/vec4 v0x2649770_0, 0; +T_1.70 ; +T_1.68 ; +T_1.66 ; +T_1.62 ; +T_1.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.7; +T_1.7 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.1 ; + %load/vec4 v0x2648650_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.81, 6; + %jmp T_1.82; +T_1.79 ; + %load/vec4 v0x2648cc0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.83, 4; + %load/vec4 v0x2647a40_0; + %flag_set/vec4 8; + %jmp/0xz T_1.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x26494d0_0, 0, 4; + %load/vec4 v0x2648730_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.88; +T_1.87 ; + %load/vec4 v0x2648730_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.90; +T_1.89 ; + %load/vec4 v0x2648730_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.92; +T_1.91 ; + %load/vec4 v0x2648730_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2648190_0, 0; +T_1.93 ; +T_1.92 ; +T_1.90 ; +T_1.88 ; +T_1.85 ; + %jmp T_1.84; +T_1.83 ; + %load/vec4 v0x2648730_0; + %load/vec4 v0x2648cc0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %load/vec4 v0x2648cc0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2648e80, 4; + %assign/vec4 v0x2648da0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2648cc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2648be0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2648cc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26494d0_0, 4, 5; + %load/vec4 v0x2648cc0_0; + %assign/vec4 v0x2648190_0, 0; +T_1.95 ; +T_1.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.82; +T_1.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.82; +T_1.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.82; +T_1.82 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.2 ; + %load/vec4 v0x2648650_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.99, 6; + %jmp T_1.100; +T_1.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.100; +T_1.98 ; + %load/vec4 v0x2649770_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.101, 4; + %load/vec4 v0x2647bc0_0; + %flag_set/vec4 8; + %jmp/0xz T_1.103, 8; + %load/vec4 v0x2646b30_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.106; +T_1.105 ; + %load/vec4 v0x2646b30_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.108; +T_1.107 ; + %load/vec4 v0x2646b30_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2648190_0, 0; + %jmp T_1.110; +T_1.109 ; + %load/vec4 v0x2646b30_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2649770_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26493f0_0, 4, 5; + %load/vec4 v0x2649850_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2648510, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2648190_0, 0; +T_1.111 ; +T_1.110 ; +T_1.108 ; +T_1.106 ; +T_1.103 ; +T_1.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.100; +T_1.99 ; + %load/vec4 v0x2649770_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.113, 4; + %load/vec4 v0x26495b0_0; + %load/vec4 v0x2649770_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x2649770_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x26493f0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2648430_0, 0; + %load/vec4 v0x2649770_0; + %assign/vec4 v0x2648190_0, 0; +T_1.115 ; +T_1.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2648650_0, 0; + %jmp T_1.100; +T_1.100 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.3 ; + %pop/vec4 1; + %jmp T_1; + .thread T_1; + .scope S_0x2644980; +T_2 ; + %wait E_0x25966a0; + %load/vec4 v0x2648650_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x2648430_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x2645470_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_2.0, 8; + %load/vec4 v0x2645470_0; + %assign/vec4 v0x2645390_0, 0; +T_2.0 ; + %load/vec4 v0x2648650_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_2.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2648be0_0, 0, 4; +T_2.2 ; + %jmp T_2; + .thread T_2; + .scope S_0x2649ad0; +T_3 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x264d5e0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x264d810_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x264d3a0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x2649f90_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x264a090_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264a4d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264dda0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264e5f0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264e7b0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264e510_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x264d6a0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x264d6a0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x264d6a0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x264d6a0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x2649ca0, v0x264d2e0 {0 0 0}; + %end; + .thread T_3; + .scope S_0x2649ad0; +T_4 ; + %wait E_0x25b8e20; + %load/vec4 v0x264d5e0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x264d810_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.6, 6; + %jmp T_4.7; +T_4.4 ; + %load/vec4 v0x264a310_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x264a690_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_4.10, 5; + %load/vec4 v0x264a690_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %jmp T_4.11; +T_4.10 ; + %load/vec4 v0x264a690_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_4.12, 5; + %load/vec4 v0x264d8f0_0; + %load/vec4 v0x264a690_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.14, 8; + %load/vec4 v0x264a690_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264a690_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %load/vec4 v0x264a690_0; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.15; +T_4.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %load/vec4 v0x264a690_0; + %assign/vec4 v0x264de40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264a690_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %load/vec4 v0x264a690_0; + %assign/vec4 v0x264d3a0_0, 0; +T_4.15 ; + %jmp T_4.13; +T_4.12 ; + %load/vec4 v0x264a690_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.16, 4; + %load/vec4 v0x264d3a0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_4.18, 4; + %load/vec4 v0x264d3a0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %jmp T_4.19; +T_4.18 ; + %load/vec4 v0x264d8f0_0; + %load/vec4 v0x264d3a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.20, 8; + %load/vec4 v0x264d3a0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264d3a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %jmp T_4.21; +T_4.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %load/vec4 v0x264d3a0_0; + %assign/vec4 v0x264de40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264d3a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; +T_4.21 ; +T_4.19 ; + %jmp T_4.17; +T_4.16 ; + %load/vec4 v0x264a690_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.22, 4; + %load/vec4 v0x264cca0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.24, 8; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.27; +T_4.26 ; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.29; +T_4.28 ; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.31; +T_4.30 ; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; +T_4.32 ; +T_4.31 ; +T_4.29 ; +T_4.27 ; + %jmp T_4.25; +T_4.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %load/vec4 v0x264a690_0; + %assign/vec4 v0x264de40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; +T_4.25 ; +T_4.22 ; +T_4.17 ; +T_4.13 ; +T_4.11 ; +T_4.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.7; +T_4.5 ; + %load/vec4 v0x264a310_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_4.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_4.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_4.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_4.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_4.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_4.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_4.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_4.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_4.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_4.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_4.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_4.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_4.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_4.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_4.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_4.49, 6; + %jmp T_4.50; +T_4.34 ; + %load/vec4 v0x2649f90_0; + %load/vec4 v0x264dee0_0; + %add; + %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.35 ; + %load/vec4 v0x2649f90_0; + %load/vec4 v0x264dee0_0; + %sub; + %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.36 ; + %load/vec4 v0x264a4d0_0; + %pad/u 11; + %load/vec4 v0x264dee0_0; + %add; + %pad/u 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.37 ; + %load/vec4 v0x264dee0_0; + %assign/vec4 v0x264e970_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.38 ; + %load/vec4 v0x264a230_0; + %assign/vec4 v0x264e970_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.39 ; + %load/vec4 v0x2649f90_0; + %load/vec4 v0x264a230_0; + %add; + %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.40 ; + %load/vec4 v0x2649f90_0; + %load/vec4 v0x264a230_0; + %sub; + %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.41 ; + %load/vec4 v0x264a4d0_0; + %pad/u 11; + %load/vec4 v0x264a230_0; + %add; + %pad/u 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.42 ; + %load/vec4 v0x264a090_0; + %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x2649f90_0; + %assign/vec4 v0x264a090_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.43 ; + %load/vec4 v0x2649f90_0; + %assign/vec4 v0x264a090_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.44 ; + %load/vec4 v0x2649f90_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.45 ; + %load/vec4 v0x264a3f0_0; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.50; +T_4.46 ; + %load/vec4 v0x2649f90_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_4.51, 4; + %load/vec4 v0x264a3f0_0; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.52; +T_4.51 ; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; +T_4.52 ; + %jmp T_4.50; +T_4.47 ; + %load/vec4 v0x2649f90_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_4.53, 4; + %load/vec4 v0x264a3f0_0; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.54; +T_4.53 ; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; +T_4.54 ; + %jmp T_4.50; +T_4.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x2649f90_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_4.55, 5; + %load/vec4 v0x264a3f0_0; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.56; +T_4.55 ; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; +T_4.56 ; + %jmp T_4.50; +T_4.49 ; + %load/vec4 v0x2649f90_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_4.57, 5; + %load/vec4 v0x264a3f0_0; + %assign/vec4 v0x264a5b0_0, 0; + %jmp T_4.58; +T_4.57 ; + %load/vec4 v0x264a4d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264a5b0_0, 0; +T_4.58 ; + %jmp T_4.50; +T_4.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.7; +T_4.6 ; + %load/vec4 v0x264a310_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x264a310_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_4.59, 4; + %load/vec4 v0x264a170_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x264a170_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x264d3a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_4.61, 9; + %load/vec4 v0x264a170_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_4.63, 4; + %load/vec4 v0x264e970_0; + %assign/vec4 v0x2649f90_0, 0; +T_4.63 ; + %jmp T_4.62; +T_4.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %load/vec4 v0x264a170_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.65, 4; + %load/vec4 v0x264d3a0_0; + %assign/vec4 v0x264e890_0, 0; + %load/vec4 v0x264e970_0; + %load/vec4 v0x264d3a0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264d3a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %jmp T_4.66; +T_4.65 ; + %load/vec4 v0x264a170_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.67, 4; + %load/vec4 v0x264a170_0; + %assign/vec4 v0x264e890_0, 0; + %load/vec4 v0x264e970_0; + %load/vec4 v0x264a170_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264a170_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264a170_0; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.68; +T_4.67 ; + %load/vec4 v0x264ce20_0; + %flag_set/vec4 8; + %jmp/0xz T_4.69, 8; + %load/vec4 v0x264bd50_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.72; +T_4.71 ; + %load/vec4 v0x264bd50_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.74; +T_4.73 ; + %load/vec4 v0x264bd50_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.76; +T_4.75 ; + %load/vec4 v0x264bd50_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; +T_4.77 ; +T_4.76 ; +T_4.74 ; +T_4.72 ; + %jmp T_4.70; +T_4.69 ; + %load/vec4 v0x264a170_0; + %assign/vec4 v0x264e890_0, 0; +T_4.70 ; +T_4.68 ; +T_4.66 ; +T_4.62 ; +T_4.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.7; +T_4.7 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.1 ; + %load/vec4 v0x264d810_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.81, 6; + %jmp T_4.82; +T_4.79 ; + %load/vec4 v0x264de40_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.83, 4; + %load/vec4 v0x264cca0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264e5f0_0, 0, 4; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.88; +T_4.87 ; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.90; +T_4.89 ; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.92; +T_4.91 ; + %load/vec4 v0x264d8f0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; +T_4.93 ; +T_4.92 ; +T_4.90 ; +T_4.88 ; +T_4.85 ; + %jmp T_4.84; +T_4.83 ; + %load/vec4 v0x264d8f0_0; + %load/vec4 v0x264de40_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %load/vec4 v0x264de40_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x264df80, 4; + %assign/vec4 v0x264dee0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264de40_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264dda0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264de40_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %load/vec4 v0x264de40_0; + %assign/vec4 v0x264d3a0_0, 0; +T_4.95 ; +T_4.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.82; +T_4.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.82; +T_4.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.82; +T_4.82 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.2 ; + %load/vec4 v0x264d810_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.99, 6; + %jmp T_4.100; +T_4.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.100; +T_4.98 ; + %load/vec4 v0x264e890_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.101, 4; + %load/vec4 v0x264ce20_0; + %flag_set/vec4 8; + %jmp/0xz T_4.103, 8; + %load/vec4 v0x264bd50_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.106; +T_4.105 ; + %load/vec4 v0x264bd50_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.108; +T_4.107 ; + %load/vec4 v0x264bd50_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; + %jmp T_4.110; +T_4.109 ; + %load/vec4 v0x264bd50_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x264e890_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x264e510_0, 4, 5; + %load/vec4 v0x264e970_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x264d6a0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x264d3a0_0, 0; +T_4.111 ; +T_4.110 ; +T_4.108 ; +T_4.106 ; +T_4.103 ; +T_4.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.100; +T_4.99 ; + %load/vec4 v0x264e890_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.113, 4; + %load/vec4 v0x264e6d0_0; + %load/vec4 v0x264e890_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x264e890_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x264e510_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x264d5e0_0, 0; + %load/vec4 v0x264e890_0; + %assign/vec4 v0x264d3a0_0, 0; +T_4.115 ; +T_4.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x264d810_0, 0; + %jmp T_4.100; +T_4.100 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x2649ad0; +T_5 ; + %wait E_0x25966a0; + %load/vec4 v0x264d810_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x264d5e0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x264a5b0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %load/vec4 v0x264a5b0_0; + %assign/vec4 v0x264a4d0_0, 0; +T_5.0 ; + %load/vec4 v0x264d810_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_5.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264dda0_0, 0, 4; +T_5.2 ; + %jmp T_5; + .thread T_5; + .scope S_0x264ebf0; +T_6 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x2652750_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x26529a0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x26524b0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x264f040_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x264f140_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x264f5d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2652f30_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2653780_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2653940_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x26536a0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2652830, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2652830, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2652830, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2652830, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x264ee10, v0x26523f0 {0 0 0}; + %end; + .thread T_6; + .scope S_0x264ebf0; +T_7 ; + %wait E_0x25b8e20; + %load/vec4 v0x2652750_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.2, 6; + %jmp T_7.3; +T_7.0 ; + %load/vec4 v0x26529a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.6, 6; + %jmp T_7.7; +T_7.4 ; + %load/vec4 v0x264f3c0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_7.8, 5; + %load/vec4 v0x264f790_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_7.10, 5; + %load/vec4 v0x264f790_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %jmp T_7.11; +T_7.10 ; + %load/vec4 v0x264f790_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_7.12, 5; + %load/vec4 v0x2652a80_0; + %load/vec4 v0x264f790_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.14, 8; + %load/vec4 v0x264f790_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264f790_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %load/vec4 v0x264f790_0; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.15; +T_7.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %load/vec4 v0x264f790_0; + %assign/vec4 v0x2652fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264f790_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2653780_0, 4, 5; + %load/vec4 v0x264f790_0; + %assign/vec4 v0x26524b0_0, 0; +T_7.15 ; + %jmp T_7.13; +T_7.12 ; + %load/vec4 v0x264f790_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.16, 4; + %load/vec4 v0x26524b0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_7.18, 4; + %load/vec4 v0x26524b0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %jmp T_7.19; +T_7.18 ; + %load/vec4 v0x2652a80_0; + %load/vec4 v0x26524b0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.20, 8; + %load/vec4 v0x26524b0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x26524b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %jmp T_7.21; +T_7.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %load/vec4 v0x26524b0_0; + %assign/vec4 v0x2652fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x26524b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2653780_0, 4, 5; +T_7.21 ; +T_7.19 ; + %jmp T_7.17; +T_7.16 ; + %load/vec4 v0x264f790_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.22, 4; + %load/vec4 v0x2651da0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.24, 8; + %load/vec4 v0x2652a80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.27; +T_7.26 ; + %load/vec4 v0x2652a80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.29; +T_7.28 ; + %load/vec4 v0x2652a80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.31; +T_7.30 ; + %load/vec4 v0x2652a80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x26524b0_0, 0; +T_7.32 ; +T_7.31 ; +T_7.29 ; +T_7.27 ; + %jmp T_7.25; +T_7.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %load/vec4 v0x264f790_0; + %assign/vec4 v0x2652fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2653780_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2653780_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2653780_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2653780_0, 4, 5; +T_7.25 ; +T_7.22 ; +T_7.17 ; +T_7.13 ; +T_7.11 ; +T_7.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.7; +T_7.5 ; + %load/vec4 v0x264f3c0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_7.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_7.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_7.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_7.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_7.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_7.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_7.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_7.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_7.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_7.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_7.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_7.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_7.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_7.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_7.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_7.49, 6; + %jmp T_7.50; +T_7.34 ; + %load/vec4 v0x264f040_0; + %load/vec4 v0x2653070_0; + %add; + %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.35 ; + %load/vec4 v0x264f040_0; + %load/vec4 v0x2653070_0; + %sub; + %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.36 ; + %load/vec4 v0x264f5d0_0; + %pad/u 11; + %load/vec4 v0x2653070_0; + %add; + %pad/u 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.37 ; + %load/vec4 v0x2653070_0; + %assign/vec4 v0x2653b00_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.38 ; + %load/vec4 v0x264f2e0_0; + %assign/vec4 v0x2653b00_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.39 ; + %load/vec4 v0x264f040_0; + %load/vec4 v0x264f2e0_0; + %add; + %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.40 ; + %load/vec4 v0x264f040_0; + %load/vec4 v0x264f2e0_0; + %sub; + %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.41 ; + %load/vec4 v0x264f5d0_0; + %pad/u 11; + %load/vec4 v0x264f2e0_0; + %add; + %pad/u 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.42 ; + %load/vec4 v0x264f140_0; + %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x264f040_0; + %assign/vec4 v0x264f140_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.43 ; + %load/vec4 v0x264f040_0; + %assign/vec4 v0x264f140_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.44 ; + %load/vec4 v0x264f040_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.45 ; + %load/vec4 v0x264f4f0_0; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.50; +T_7.46 ; + %load/vec4 v0x264f040_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_7.51, 4; + %load/vec4 v0x264f4f0_0; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.52; +T_7.51 ; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; +T_7.52 ; + %jmp T_7.50; +T_7.47 ; + %load/vec4 v0x264f040_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_7.53, 4; + %load/vec4 v0x264f4f0_0; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.54; +T_7.53 ; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; +T_7.54 ; + %jmp T_7.50; +T_7.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x264f040_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_7.55, 5; + %load/vec4 v0x264f4f0_0; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.56; +T_7.55 ; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; +T_7.56 ; + %jmp T_7.50; +T_7.49 ; + %load/vec4 v0x264f040_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_7.57, 5; + %load/vec4 v0x264f4f0_0; + %assign/vec4 v0x264f6b0_0, 0; + %jmp T_7.58; +T_7.57 ; + %load/vec4 v0x264f5d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x264f6b0_0, 0; +T_7.58 ; + %jmp T_7.50; +T_7.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.7; +T_7.6 ; + %load/vec4 v0x264f3c0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x264f3c0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_7.59, 4; + %load/vec4 v0x264f220_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x264f220_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x26524b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_7.61, 9; + %load/vec4 v0x264f220_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_7.63, 4; + %load/vec4 v0x2653b00_0; + %assign/vec4 v0x264f040_0, 0; +T_7.63 ; + %jmp T_7.62; +T_7.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %load/vec4 v0x264f220_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.65, 4; + %load/vec4 v0x26524b0_0; + %assign/vec4 v0x2653a20_0, 0; + %load/vec4 v0x2653b00_0; + %load/vec4 v0x26524b0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x26524b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %jmp T_7.66; +T_7.65 ; + %load/vec4 v0x264f220_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.67, 4; + %load/vec4 v0x264f220_0; + %assign/vec4 v0x2653a20_0, 0; + %load/vec4 v0x2653b00_0; + %load/vec4 v0x264f220_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x264f220_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x264f220_0; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.68; +T_7.67 ; + %load/vec4 v0x2651f20_0; + %flag_set/vec4 8; + %jmp/0xz T_7.69, 8; + %load/vec4 v0x2650e50_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.72; +T_7.71 ; + %load/vec4 v0x2650e50_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.74; +T_7.73 ; + %load/vec4 v0x2650e50_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.76; +T_7.75 ; + %load/vec4 v0x2650e50_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x26524b0_0, 0; +T_7.77 ; +T_7.76 ; +T_7.74 ; +T_7.72 ; + %jmp T_7.70; +T_7.69 ; + %load/vec4 v0x264f220_0; + %assign/vec4 v0x2653a20_0, 0; +T_7.70 ; +T_7.68 ; +T_7.66 ; +T_7.62 ; +T_7.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.7; +T_7.7 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.1 ; + %load/vec4 v0x26529a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.81, 6; + %jmp T_7.82; +T_7.79 ; + %load/vec4 v0x2652fd0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.83, 4; + %load/vec4 v0x2651da0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2653780_0, 0, 4; + %load/vec4 v0x2652a80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.88; +T_7.87 ; + %load/vec4 v0x2652a80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.90; +T_7.89 ; + %load/vec4 v0x2652a80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.92; +T_7.91 ; + %load/vec4 v0x2652a80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x26524b0_0, 0; +T_7.93 ; +T_7.92 ; +T_7.90 ; +T_7.88 ; +T_7.85 ; + %jmp T_7.84; +T_7.83 ; + %load/vec4 v0x2652a80_0; + %load/vec4 v0x2652fd0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %load/vec4 v0x2652fd0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2653110, 4; + %assign/vec4 v0x2653070_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2652fd0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2652f30_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2652fd0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2653780_0, 4, 5; + %load/vec4 v0x2652fd0_0; + %assign/vec4 v0x26524b0_0, 0; +T_7.95 ; +T_7.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.82; +T_7.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.82; +T_7.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.82; +T_7.82 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.2 ; + %load/vec4 v0x26529a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.99, 6; + %jmp T_7.100; +T_7.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.100; +T_7.98 ; + %load/vec4 v0x2653a20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.101, 4; + %load/vec4 v0x2651f20_0; + %flag_set/vec4 8; + %jmp/0xz T_7.103, 8; + %load/vec4 v0x2650e50_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.106; +T_7.105 ; + %load/vec4 v0x2650e50_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.108; +T_7.107 ; + %load/vec4 v0x2650e50_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x26524b0_0, 0; + %jmp T_7.110; +T_7.109 ; + %load/vec4 v0x2650e50_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2653a20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26536a0_0, 4, 5; + %load/vec4 v0x2653b00_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2652830, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x26524b0_0, 0; +T_7.111 ; +T_7.110 ; +T_7.108 ; +T_7.106 ; +T_7.103 ; +T_7.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.100; +T_7.99 ; + %load/vec4 v0x2653a20_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.113, 4; + %load/vec4 v0x2653860_0; + %load/vec4 v0x2653a20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x2653a20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x26536a0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x2652750_0, 0; + %load/vec4 v0x2653a20_0; + %assign/vec4 v0x26524b0_0, 0; +T_7.115 ; +T_7.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26529a0_0, 0; + %jmp T_7.100; +T_7.100 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.3 ; + %pop/vec4 1; + %jmp T_7; + .thread T_7; + .scope S_0x264ebf0; +T_8 ; + %wait E_0x25966a0; + %load/vec4 v0x26529a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x2652750_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x264f6b0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_8.0, 8; + %load/vec4 v0x264f6b0_0; + %assign/vec4 v0x264f5d0_0, 0; +T_8.0 ; + %load/vec4 v0x26529a0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_8.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2652f30_0, 0, 4; +T_8.2 ; + %jmp T_8; + .thread T_8; + .scope S_0x263f850; +T_9 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x26433a0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x26435c0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x2643100_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x263fd10_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x263fe10_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2640250_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2643b50_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2644380_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2644540_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x26442c0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2643480, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2643480, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2643480, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x2643480, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x263fa40, v0x2643040 {0 0 0}; + %end; + .thread T_9; + .scope S_0x263f850; +T_10 ; + %wait E_0x25b8e20; + %load/vec4 v0x26433a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.2, 6; + %jmp T_10.3; +T_10.0 ; + %load/vec4 v0x26435c0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.6, 6; + %jmp T_10.7; +T_10.4 ; + %load/vec4 v0x2640090_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_10.8, 5; + %load/vec4 v0x2640410_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_10.10, 5; + %load/vec4 v0x2640410_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %jmp T_10.11; +T_10.10 ; + %load/vec4 v0x2640410_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_10.12, 5; + %load/vec4 v0x26436a0_0; + %load/vec4 v0x2640410_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.14, 8; + %load/vec4 v0x2640410_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2640410_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %load/vec4 v0x2640410_0; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.15; +T_10.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %load/vec4 v0x2640410_0; + %assign/vec4 v0x2643bf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2640410_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2644380_0, 4, 5; + %load/vec4 v0x2640410_0; + %assign/vec4 v0x2643100_0, 0; +T_10.15 ; + %jmp T_10.13; +T_10.12 ; + %load/vec4 v0x2640410_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.16, 4; + %load/vec4 v0x2643100_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_10.18, 4; + %load/vec4 v0x2643100_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %jmp T_10.19; +T_10.18 ; + %load/vec4 v0x26436a0_0; + %load/vec4 v0x2643100_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.20, 8; + %load/vec4 v0x2643100_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2643100_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %jmp T_10.21; +T_10.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %load/vec4 v0x2643100_0; + %assign/vec4 v0x2643bf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2643100_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2644380_0, 4, 5; +T_10.21 ; +T_10.19 ; + %jmp T_10.17; +T_10.16 ; + %load/vec4 v0x2640410_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.22, 4; + %load/vec4 v0x2642a20_0; + %flag_set/vec4 8; + %jmp/0xz T_10.24, 8; + %load/vec4 v0x26436a0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.27; +T_10.26 ; + %load/vec4 v0x26436a0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.29; +T_10.28 ; + %load/vec4 v0x26436a0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.31; +T_10.30 ; + %load/vec4 v0x26436a0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2643100_0, 0; +T_10.32 ; +T_10.31 ; +T_10.29 ; +T_10.27 ; + %jmp T_10.25; +T_10.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %load/vec4 v0x2640410_0; + %assign/vec4 v0x2643bf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2644380_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2644380_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2644380_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2644380_0, 4, 5; +T_10.25 ; +T_10.22 ; +T_10.17 ; +T_10.13 ; +T_10.11 ; +T_10.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.7; +T_10.5 ; + %load/vec4 v0x2640090_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_10.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_10.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_10.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_10.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_10.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_10.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_10.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_10.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_10.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_10.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_10.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_10.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_10.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_10.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_10.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_10.49, 6; + %jmp T_10.50; +T_10.34 ; + %load/vec4 v0x263fd10_0; + %load/vec4 v0x2643c90_0; + %add; + %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.35 ; + %load/vec4 v0x263fd10_0; + %load/vec4 v0x2643c90_0; + %sub; + %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.36 ; + %load/vec4 v0x2640250_0; + %pad/u 11; + %load/vec4 v0x2643c90_0; + %add; + %pad/u 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.37 ; + %load/vec4 v0x2643c90_0; + %assign/vec4 v0x2644700_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.38 ; + %load/vec4 v0x263ffb0_0; + %assign/vec4 v0x2644700_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.39 ; + %load/vec4 v0x263fd10_0; + %load/vec4 v0x263ffb0_0; + %add; + %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.40 ; + %load/vec4 v0x263fd10_0; + %load/vec4 v0x263ffb0_0; + %sub; + %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.41 ; + %load/vec4 v0x2640250_0; + %pad/u 11; + %load/vec4 v0x263ffb0_0; + %add; + %pad/u 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.42 ; + %load/vec4 v0x263fe10_0; + %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x263fd10_0; + %assign/vec4 v0x263fe10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.43 ; + %load/vec4 v0x263fd10_0; + %assign/vec4 v0x263fe10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.44 ; + %load/vec4 v0x263fd10_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.45 ; + %load/vec4 v0x2640170_0; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.50; +T_10.46 ; + %load/vec4 v0x263fd10_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_10.51, 4; + %load/vec4 v0x2640170_0; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.52; +T_10.51 ; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; +T_10.52 ; + %jmp T_10.50; +T_10.47 ; + %load/vec4 v0x263fd10_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_10.53, 4; + %load/vec4 v0x2640170_0; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.54; +T_10.53 ; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; +T_10.54 ; + %jmp T_10.50; +T_10.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x263fd10_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_10.55, 5; + %load/vec4 v0x2640170_0; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.56; +T_10.55 ; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; +T_10.56 ; + %jmp T_10.50; +T_10.49 ; + %load/vec4 v0x263fd10_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_10.57, 5; + %load/vec4 v0x2640170_0; + %assign/vec4 v0x2640330_0, 0; + %jmp T_10.58; +T_10.57 ; + %load/vec4 v0x2640250_0; + %addi 1, 0, 4; + %assign/vec4 v0x2640330_0, 0; +T_10.58 ; + %jmp T_10.50; +T_10.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.7; +T_10.6 ; + %load/vec4 v0x2640090_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x2640090_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_10.59, 4; + %load/vec4 v0x263fef0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x263fef0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x2643100_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_10.61, 9; + %load/vec4 v0x263fef0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_10.63, 4; + %load/vec4 v0x2644700_0; + %assign/vec4 v0x263fd10_0, 0; +T_10.63 ; + %jmp T_10.62; +T_10.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %load/vec4 v0x263fef0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.65, 4; + %load/vec4 v0x2643100_0; + %assign/vec4 v0x2644620_0, 0; + %load/vec4 v0x2644700_0; + %load/vec4 v0x2643100_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2643100_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %jmp T_10.66; +T_10.65 ; + %load/vec4 v0x263fef0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.67, 4; + %load/vec4 v0x263fef0_0; + %assign/vec4 v0x2644620_0, 0; + %load/vec4 v0x2644700_0; + %load/vec4 v0x263fef0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263fef0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x263fef0_0; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.68; +T_10.67 ; + %load/vec4 v0x2642ba0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.69, 8; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.72; +T_10.71 ; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.74; +T_10.73 ; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.76; +T_10.75 ; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2643100_0, 0; +T_10.77 ; +T_10.76 ; +T_10.74 ; +T_10.72 ; + %jmp T_10.70; +T_10.69 ; + %load/vec4 v0x263fef0_0; + %assign/vec4 v0x2644620_0, 0; +T_10.70 ; +T_10.68 ; +T_10.66 ; +T_10.62 ; +T_10.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.7; +T_10.7 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.1 ; + %load/vec4 v0x26435c0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.81, 6; + %jmp T_10.82; +T_10.79 ; + %load/vec4 v0x2643bf0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.83, 4; + %load/vec4 v0x2642a20_0; + %flag_set/vec4 8; + %jmp/0xz T_10.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2644380_0, 0, 4; + %load/vec4 v0x26436a0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.88; +T_10.87 ; + %load/vec4 v0x26436a0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.90; +T_10.89 ; + %load/vec4 v0x26436a0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.92; +T_10.91 ; + %load/vec4 v0x26436a0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2643100_0, 0; +T_10.93 ; +T_10.92 ; +T_10.90 ; +T_10.88 ; +T_10.85 ; + %jmp T_10.84; +T_10.83 ; + %load/vec4 v0x26436a0_0; + %load/vec4 v0x2643bf0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %load/vec4 v0x2643bf0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x2643d30, 4; + %assign/vec4 v0x2643c90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2643bf0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2643b50_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x2643bf0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x2644380_0, 4, 5; + %load/vec4 v0x2643bf0_0; + %assign/vec4 v0x2643100_0, 0; +T_10.95 ; +T_10.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.82; +T_10.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.82; +T_10.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.82; +T_10.82 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.2 ; + %load/vec4 v0x26435c0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.99, 6; + %jmp T_10.100; +T_10.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.100; +T_10.98 ; + %load/vec4 v0x2644620_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.101, 4; + %load/vec4 v0x2642ba0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.103, 8; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.106; +T_10.105 ; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.108; +T_10.107 ; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x2643100_0, 0; + %jmp T_10.110; +T_10.109 ; + %load/vec4 v0x2641ad0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2644620_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x26442c0_0, 4, 5; + %load/vec4 v0x2644700_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x2643480, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x2643100_0, 0; +T_10.111 ; +T_10.110 ; +T_10.108 ; +T_10.106 ; +T_10.103 ; +T_10.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.100; +T_10.99 ; + %load/vec4 v0x2644620_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.113, 4; + %load/vec4 v0x2644460_0; + %load/vec4 v0x2644620_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x2644620_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x26442c0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26433a0_0, 0; + %load/vec4 v0x2644620_0; + %assign/vec4 v0x2643100_0, 0; +T_10.115 ; +T_10.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x26435c0_0, 0; + %jmp T_10.100; +T_10.100 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.3 ; + %pop/vec4 1; + %jmp T_10; + .thread T_10; + .scope S_0x263f850; +T_11 ; + %wait E_0x25966a0; + %load/vec4 v0x26435c0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x26433a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x2640330_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_11.0, 8; + %load/vec4 v0x2640330_0; + %assign/vec4 v0x2640250_0, 0; +T_11.0 ; + %load/vec4 v0x26435c0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_11.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x2643b50_0, 0, 4; +T_11.2 ; + %jmp T_11; + .thread T_11; + .scope S_0x25d50f0; +T_12 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x263e1d0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x263e3f0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x263df30_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x25fb500_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x263ab80_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263b040_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263e980_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263f250_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263f410_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263f170_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x263e2b0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x263e2b0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x263e2b0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x263e2b0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x2584f40, v0x263de70 {0 0 0}; + %end; + .thread T_12; + .scope S_0x25d50f0; +T_13 ; + %wait E_0x25b8e20; + %load/vec4 v0x263e1d0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.2, 6; + %jmp T_13.3; +T_13.0 ; + %load/vec4 v0x263e3f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.6, 6; + %jmp T_13.7; +T_13.4 ; + %load/vec4 v0x263ae30_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_13.8, 5; + %load/vec4 v0x263b200_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_13.10, 5; + %load/vec4 v0x263b200_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %jmp T_13.11; +T_13.10 ; + %load/vec4 v0x263b200_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_13.12, 5; + %load/vec4 v0x263e4d0_0; + %load/vec4 v0x263b200_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.14, 8; + %load/vec4 v0x263b200_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263b200_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %load/vec4 v0x263b200_0; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.15; +T_13.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %load/vec4 v0x263b200_0; + %assign/vec4 v0x263ea20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263b200_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263f250_0, 4, 5; + %load/vec4 v0x263b200_0; + %assign/vec4 v0x263df30_0, 0; +T_13.15 ; + %jmp T_13.13; +T_13.12 ; + %load/vec4 v0x263b200_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.16, 4; + %load/vec4 v0x263df30_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_13.18, 4; + %load/vec4 v0x263df30_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %jmp T_13.19; +T_13.18 ; + %load/vec4 v0x263e4d0_0; + %load/vec4 v0x263df30_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.20, 8; + %load/vec4 v0x263df30_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263df30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %jmp T_13.21; +T_13.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %load/vec4 v0x263df30_0; + %assign/vec4 v0x263ea20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263df30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263f250_0, 4, 5; +T_13.21 ; +T_13.19 ; + %jmp T_13.17; +T_13.16 ; + %load/vec4 v0x263b200_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.22, 4; + %load/vec4 v0x263d810_0; + %flag_set/vec4 8; + %jmp/0xz T_13.24, 8; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.27; +T_13.26 ; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.29; +T_13.28 ; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.31; +T_13.30 ; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x263df30_0, 0; +T_13.32 ; +T_13.31 ; +T_13.29 ; +T_13.27 ; + %jmp T_13.25; +T_13.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %load/vec4 v0x263b200_0; + %assign/vec4 v0x263ea20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f250_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f250_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f250_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f250_0, 4, 5; +T_13.25 ; +T_13.22 ; +T_13.17 ; +T_13.13 ; +T_13.11 ; +T_13.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.7; +T_13.5 ; + %load/vec4 v0x263ae30_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_13.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_13.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_13.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_13.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_13.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_13.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_13.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_13.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_13.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_13.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_13.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_13.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_13.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_13.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_13.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_13.49, 6; + %jmp T_13.50; +T_13.34 ; + %load/vec4 v0x25fb500_0; + %load/vec4 v0x263eb00_0; + %add; + %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.35 ; + %load/vec4 v0x25fb500_0; + %load/vec4 v0x263eb00_0; + %sub; + %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.36 ; + %load/vec4 v0x263b040_0; + %pad/u 11; + %load/vec4 v0x263eb00_0; + %add; + %pad/u 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.37 ; + %load/vec4 v0x263eb00_0; + %assign/vec4 v0x263f5d0_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.38 ; + %load/vec4 v0x263ad50_0; + %assign/vec4 v0x263f5d0_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.39 ; + %load/vec4 v0x25fb500_0; + %load/vec4 v0x263ad50_0; + %add; + %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.40 ; + %load/vec4 v0x25fb500_0; + %load/vec4 v0x263ad50_0; + %sub; + %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.41 ; + %load/vec4 v0x263b040_0; + %pad/u 11; + %load/vec4 v0x263ad50_0; + %add; + %pad/u 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.42 ; + %load/vec4 v0x263ab80_0; + %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x25fb500_0; + %assign/vec4 v0x263ab80_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.43 ; + %load/vec4 v0x25fb500_0; + %assign/vec4 v0x263ab80_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.44 ; + %load/vec4 v0x25fb500_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.45 ; + %load/vec4 v0x263af60_0; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.50; +T_13.46 ; + %load/vec4 v0x25fb500_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_13.51, 4; + %load/vec4 v0x263af60_0; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.52; +T_13.51 ; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; +T_13.52 ; + %jmp T_13.50; +T_13.47 ; + %load/vec4 v0x25fb500_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_13.53, 4; + %load/vec4 v0x263af60_0; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.54; +T_13.53 ; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; +T_13.54 ; + %jmp T_13.50; +T_13.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x25fb500_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_13.55, 5; + %load/vec4 v0x263af60_0; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.56; +T_13.55 ; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; +T_13.56 ; + %jmp T_13.50; +T_13.49 ; + %load/vec4 v0x25fb500_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_13.57, 5; + %load/vec4 v0x263af60_0; + %assign/vec4 v0x263b120_0, 0; + %jmp T_13.58; +T_13.57 ; + %load/vec4 v0x263b040_0; + %addi 1, 0, 4; + %assign/vec4 v0x263b120_0, 0; +T_13.58 ; + %jmp T_13.50; +T_13.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.7; +T_13.6 ; + %load/vec4 v0x263ae30_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x263ae30_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_13.59, 4; + %load/vec4 v0x263ac60_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x263ac60_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x263df30_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_13.61, 9; + %load/vec4 v0x263ac60_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_13.63, 4; + %load/vec4 v0x263f5d0_0; + %assign/vec4 v0x25fb500_0, 0; +T_13.63 ; + %jmp T_13.62; +T_13.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %load/vec4 v0x263ac60_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.65, 4; + %load/vec4 v0x263df30_0; + %assign/vec4 v0x263f4f0_0, 0; + %load/vec4 v0x263f5d0_0; + %load/vec4 v0x263df30_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263df30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %jmp T_13.66; +T_13.65 ; + %load/vec4 v0x263ac60_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.67, 4; + %load/vec4 v0x263ac60_0; + %assign/vec4 v0x263f4f0_0, 0; + %load/vec4 v0x263f5d0_0; + %load/vec4 v0x263ac60_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263ac60_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263ac60_0; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.68; +T_13.67 ; + %load/vec4 v0x263d990_0; + %flag_set/vec4 8; + %jmp/0xz T_13.69, 8; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.72; +T_13.71 ; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.74; +T_13.73 ; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.76; +T_13.75 ; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x263df30_0, 0; +T_13.77 ; +T_13.76 ; +T_13.74 ; +T_13.72 ; + %jmp T_13.70; +T_13.69 ; + %load/vec4 v0x263ac60_0; + %assign/vec4 v0x263f4f0_0, 0; +T_13.70 ; +T_13.68 ; +T_13.66 ; +T_13.62 ; +T_13.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.7; +T_13.7 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.1 ; + %load/vec4 v0x263e3f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.81, 6; + %jmp T_13.82; +T_13.79 ; + %load/vec4 v0x263ea20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.83, 4; + %load/vec4 v0x263d810_0; + %flag_set/vec4 8; + %jmp/0xz T_13.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263f250_0, 0, 4; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.88; +T_13.87 ; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.90; +T_13.89 ; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.92; +T_13.91 ; + %load/vec4 v0x263e4d0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x263df30_0, 0; +T_13.93 ; +T_13.92 ; +T_13.90 ; +T_13.88 ; +T_13.85 ; + %jmp T_13.84; +T_13.83 ; + %load/vec4 v0x263e4d0_0; + %load/vec4 v0x263ea20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %load/vec4 v0x263ea20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x263ebe0, 4; + %assign/vec4 v0x263eb00_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263ea20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263e980_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x263ea20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x263f250_0, 4, 5; + %load/vec4 v0x263ea20_0; + %assign/vec4 v0x263df30_0, 0; +T_13.95 ; +T_13.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.82; +T_13.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.82; +T_13.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.82; +T_13.82 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.2 ; + %load/vec4 v0x263e3f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.99, 6; + %jmp T_13.100; +T_13.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.100; +T_13.98 ; + %load/vec4 v0x263f4f0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.101, 4; + %load/vec4 v0x263d990_0; + %flag_set/vec4 8; + %jmp/0xz T_13.103, 8; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.106; +T_13.105 ; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.108; +T_13.107 ; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x263df30_0, 0; + %jmp T_13.110; +T_13.109 ; + %load/vec4 v0x263c8c0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x263f4f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x263f170_0, 4, 5; + %load/vec4 v0x263f5d0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x263e2b0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x263df30_0, 0; +T_13.111 ; +T_13.110 ; +T_13.108 ; +T_13.106 ; +T_13.103 ; +T_13.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.100; +T_13.99 ; + %load/vec4 v0x263f4f0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.113, 4; + %load/vec4 v0x263f330_0; + %load/vec4 v0x263f4f0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x263f4f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x263f170_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x263e1d0_0, 0; + %load/vec4 v0x263f4f0_0; + %assign/vec4 v0x263df30_0, 0; +T_13.115 ; +T_13.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x263e3f0_0, 0; + %jmp T_13.100; +T_13.100 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.3 ; + %pop/vec4 1; + %jmp T_13; + .thread T_13; + .scope S_0x25d50f0; +T_14 ; + %wait E_0x25966a0; + %load/vec4 v0x263e3f0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x263e1d0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x263b120_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_14.0, 8; + %load/vec4 v0x263b120_0; + %assign/vec4 v0x263b040_0, 0; +T_14.0 ; + %load/vec4 v0x263e3f0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_14.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x263e980_0, 0, 4; +T_14.2 ; + %jmp T_14; + .thread T_14; + .scope S_0x2585810; +T_15 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x2654b60_0, 0, 33; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x2654ac0_0, 0, 1; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x2654b60_0, 0, 33; +T_15.0 ; + %load/vec4 v0x2654b60_0; + %cmpi/u 10, 0, 33; + %jmp/0xz T_15.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654a20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x2654a20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654a20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x2654a20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654a20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x2654a20_0, 0, 1; + %delay 1, 0; + %load/vec4 v0x2654b60_0; + %addi 1, 0, 33; + %store/vec4 v0x2654b60_0, 0, 33; + %jmp T_15.0; +T_15.1 ; + %load/vec4 v0x2654980_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.2, 4; + %vpi_call 2 51 "$display", "Failed on up test of anyWrite" {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654ac0_0, 0, 1; +T_15.2 ; + %load/vec4 v0x2654840_0; + %pad/s 32; + %cmpi/ne 2, 0, 32; + %jmp/0xz T_15.4, 4; + %vpi_call 2 55 "$display", "Failed on left test of anyWrite" {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654ac0_0, 0, 1; +T_15.4 ; + %load/vec4 v0x26548e0_0; + %pad/s 32; + %cmpi/ne 3, 0, 32; + %jmp/0xz T_15.6, 4; + %vpi_call 2 59 "$display", "Failed on right test of anyWrite" {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654ac0_0, 0, 1; +T_15.6 ; + %load/vec4 v0x26547a0_0; + %pad/s 32; + %cmpi/ne 4, 0, 32; + %jmp/0xz T_15.8, 4; + %vpi_call 2 63 "$display", "Failed on down test of anyWrite" {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654ac0_0, 0, 1; +T_15.8 ; + %load/vec4 v0x2654650_0; + %pad/s 32; + %cmpi/ne 5, 0, 32; + %jmp/0xz T_15.10, 4; + %vpi_call 2 67 "$display", "Failed on center test of anyWrite" {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x2654ac0_0, 0, 1; +T_15.10 ; + %load/vec4 v0x2654ac0_0; + %flag_set/vec4 8; + %jmp/0xz T_15.12, 8; + %vpi_call 2 71 "$display", "DUT passed anyWrite" {0 0 0}; +T_15.12 ; + %end; + .thread T_15; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "anyWrite/test.v"; + "./tis100.v"; diff --git a/anyWrite/test.asm b/anyWrite/test.asm new file mode 100644 index 0000000..8671828 --- /dev/null +++ b/anyWrite/test.asm @@ -0,0 +1,24 @@ +:center +MOV 1 ANY +MOV 2 ANY +MOV 3 ANY +MOV 4 ANY +MOV LAST ACC +JRO 0 + +:up +MOV DOWN ACC +JRO 0 + +:left +MOV RIGHT ACC +JRO 0 + +:right +MOV LEFT ACC +JRO 0 + +:down +MOV UP ACC +MOV 5 UP +JRO 0 diff --git a/anyWrite/test.v b/anyWrite/test.v new file mode 100644 index 0000000..8ee0b68 --- /dev/null +++ b/anyWrite/test.v @@ -0,0 +1,75 @@ +`include "tis100.v" +module tis100Test(); + +reg clk; +wire signed[10:0] accOutCenter; +wire signed[10:0] accOutUp; +wire signed[10:0] accOutDown; +wire signed[10:0] accOutLeft; +wire signed[10:0] accOutRight; + +reg[32:0] i; + +wire[14:0] L2C; +wire[14:0] C2L; + +wire[14:0] R2C; +wire[14:0] C2R; + +wire[14:0] U2C; +wire[14:0] C2U; + +wire[14:0] D2C; +wire[14:0] C2D; + +reg dutPassed; + +tis100 #("anyWrite/left.dat") left( .clk(clk), .rightOut(L2C), .right(C2L), .accOut(accOutLeft)); +tis100 #("anyWrite/right.dat") right( .clk(clk), .leftOut(R2C), .left(C2R), .accOut(accOutRight)); +tis100 #("anyWrite/up.dat") up( .clk(clk), .downOut(U2C), .down(C2U), .accOut(accOutUp)); +tis100 #("anyWrite/down.dat") down( .clk(clk), .upOut(D2C), .up(C2D), .accOut(accOutDown)); +tis100 #("anyWrite/center.dat") center(.clk(clk), + .upOut(C2U), .up(U2C), + .downOut(C2D), .down(D2C), + .leftOut(C2L), .left(L2C), + .rightOut(C2R), .right(R2C), + .accOut(accOutCenter) + ); + +initial begin + i = 0; + dutPassed = 1; + for( i = 0; i<10; i=i+1) begin + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + end + if(accOutUp != 1) begin + $display("Failed on up test of anyWrite"); + dutPassed = 0; + end + if(accOutLeft != 2) begin + $display("Failed on left test of anyWrite"); + dutPassed = 0; + end + if(accOutRight != 3) begin + $display("Failed on right test of anyWrite"); + dutPassed = 0; + end + if(accOutDown != 4) begin + $display("Failed on down test of anyWrite"); + dutPassed = 0; + end + if(accOutCenter!= 5) begin + $display("Failed on center test of anyWrite"); + dutPassed = 0; + end + if(dutPassed) begin + $display("DUT passed anyWrite"); + end +end + +endmodule diff --git a/anyWrite/up.dat b/anyWrite/up.dat new file mode 100644 index 0000000..6e22a75 --- /dev/null +++ b/anyWrite/up.dat @@ -0,0 +1,16 @@ +001100110100000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/assembler.py b/assembler.py index 0bb0af4..098fd96 100644 --- a/assembler.py +++ b/assembler.py @@ -1,4 +1,5 @@ from bitstring import Bits +import sys NIL_ADDR = 0 ACC_ADDR = 1 @@ -43,8 +44,8 @@ "JGZ" :14, "JLZ" :15} -srcLsit = ["ADD", "SUB", "JRO", "MOV"] -immList = ["ADDI", "SUBI", "JROI", "MOVI"] +srcLsit = ["ADD", "SUB", "JRO"] +immList = ["ADDI", "SUBI", "JROI"] srcDst = ["MOV"] immDst = ["MOVI"] @@ -53,15 +54,15 @@ def assemble(line): line = line.replace(',', '') - if(line == "NOP"): - line = "ADD 0" + if(line.startswith("NOP")): + line = "ADD NIL" tokens = line.split() instruction = tokens[0]; - inst = Bits(uint=instructions[instruction],length = 4).bin - if(instruction in srcLsit): + if(instruction in srcLsit or instruction in srcDst): source = tokens[1] if(source not in registers): instruction = instruction + "I" + inst = Bits(uint=instructions[instruction],length = 4).bin if instruction in srcLsit: dst = Bits(uint=0, length=3).bin @@ -85,9 +86,37 @@ def assemble(line): label = Bits(uint=int(tokens[1]), length=4).bin pad = Bits(uint=0, length=10).bin return inst+label+pad + pad = Bits(uint=0, length = 14).bin; + return inst+pad +if __name__ == '__main__': + infile = sys.argv[1] + prefix = infile.split("/")[0]+"/" + infile = open(infile, 'r') + lines = infile.readlines() + + fName = "" + f = None + nLines = 0; + for line in lines: + line = line.replace("\n","") + if(line.startswith(":")): + while nLines < 16 and f is not None: + f.write("000000000000000000\n") + nLines += 1 + fName = prefix+line[1:]+".dat" + nLines = 0 + if f is not None: + f.close() + f = open(fName,'w') + elif(line == ""): + continue + else: + f.write(assemble(line)+"\n") + nLines += 1 + + while nLines < 16: + f.write("000000000000000000\n") + nLines += 1 + -print(assemble("ADD 1")) -print(assemble("ADD ACC")) -print(assemble("MOV LEFT RIGHT")) -print(assemble("MOV 4 LEFT")) -print(assemble("JMP 0")) + infile.close() diff --git a/jumpTest/center.dat b/jumpTest/center.dat new file mode 100644 index 0000000..909b5c8 --- /dev/null +++ b/jumpTest/center.dat @@ -0,0 +1,16 @@ +010000100000000001 +101100110000000000 +010000100000101000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/jumpTest/down.dat b/jumpTest/down.dat new file mode 100644 index 0000000..c957f3a --- /dev/null +++ b/jumpTest/down.dat @@ -0,0 +1,16 @@ +010000111111111111 +111100110000000000 +010000100000101000 +010100000000000010 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/jumpTest/left.dat b/jumpTest/left.dat new file mode 100644 index 0000000..5378fb8 --- /dev/null +++ b/jumpTest/left.dat @@ -0,0 +1,16 @@ +010000100000000001 +110100110000000000 +010000100000101000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/jumpTest/right.dat b/jumpTest/right.dat new file mode 100644 index 0000000..d4f5379 --- /dev/null +++ b/jumpTest/right.dat @@ -0,0 +1,16 @@ +010000100000000001 +111000110000000000 +010000100000101000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/jumpTest/test b/jumpTest/test new file mode 100755 index 0000000..8518d0f --- /dev/null +++ b/jumpTest/test @@ -0,0 +1,6098 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x96baa0 .scope module, "tis100Test" "tis100Test" 2 2; + .timescale 0 0; +v0xa3a450_0 .net "C2D", 14 0, L_0xa5eca0; 1 drivers +v0xa3a580_0 .net "C2L", 14 0, L_0xa5e9c0; 1 drivers +v0xa3a690_0 .net "C2R", 14 0, L_0xa5f390; 1 drivers +v0xa3a780_0 .net "C2U", 14 0, L_0xa5e6f0; 1 drivers +v0xa3a890_0 .net "D2C", 14 0, L_0xa5a500; 1 drivers +v0xa3a9f0_0 .net "L2C", 14 0, L_0xa4eca0; 1 drivers +v0xa3ab00_0 .net "R2C", 14 0, L_0xa525f0; 1 drivers +v0xa3ac10_0 .net "U2C", 14 0, L_0xa56960; 1 drivers +v0xa3ad20_0 .net/s "accOutCenter", 10 0, L_0xa5b2c0; 1 drivers +v0xa3ae70_0 .net/s "accOutDown", 10 0, L_0xa57260; 1 drivers +v0xa3af10_0 .net/s "accOutLeft", 10 0, L_0xa3b310; 1 drivers +v0xa3afb0_0 .net/s "accOutRight", 10 0, L_0xa4eff0; 1 drivers +v0xa3b050_0 .net/s "accOutUp", 10 0, L_0xa531b0; 1 drivers +v0xa3b0f0_0 .var "clk", 0 0; +v0xa3b190_0 .var "dutPassed", 0 0; +v0xa3b230_0 .var "i", 32 0; +S_0x9bb360 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x96baa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x9a4250 .param/str "memFile" 0 3 60, "jumpTest/center.dat"; +L_0xa5b2c0 .functor BUFZ 11, v0x9e1720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa5b550 .functor BUFZ 11, v0x9e1720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa5c380 .functor BUFZ 18, L_0xa5e500, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x9e1720_0 .var/s "ACC", 10 0; +v0xa21250_0 .var/s "BAK", 10 0; +v0xa21330_0 .net "DST", 2 0, L_0xa5f820; 1 drivers +v0xa21420_0 .net/s "IMM", 10 0, L_0xa5f8c0; 1 drivers +v0xa21500_0 .net "INST", 3 0, L_0xa5f000; 1 drivers +v0xa21630_0 .net "LABEL", 3 0, L_0xa5fa70; 1 drivers +v0xa21710_0 .var "PC", 3 0; +v0xa217f0_0 .var "PCNEXT", 3 0; +v0xa218d0_0 .net "SRC", 2 0, L_0xa5f630; 1 drivers +v0xa21a40_0 .net *"_s103", 0 0, L_0xa5d840; 1 drivers +v0xa21b20_0 .net *"_s107", 0 0, L_0xa5d750; 1 drivers +v0xa21c00_0 .net *"_s111", 0 0, L_0xa5da30; 1 drivers +v0xa21ce0_0 .net *"_s115", 0 0, L_0xa5d930; 1 drivers +v0xa21dc0_0 .net *"_s119", 0 0, L_0xa5dc70; 1 drivers +v0xa21ea0_0 .net *"_s123", 0 0, L_0xa5db60; 1 drivers +v0xa21f80_0 .net *"_s127", 0 0, L_0xa5de30; 1 drivers +v0xa22060_0 .net *"_s131", 0 0, L_0xa5dd10; 1 drivers +v0xa22210_0 .net *"_s135", 0 0, L_0xa5e090; 1 drivers +v0xa222b0_0 .net *"_s139", 0 0, L_0xa5df60; 1 drivers +v0xa22390_0 .net *"_s143", 0 0, L_0xa5e270; 1 drivers +v0xa22470_0 .net *"_s147", 0 0, L_0xa5e130; 1 drivers +v0xa22550_0 .net *"_s151", 0 0, L_0xa5e460; 1 drivers +v0xa22630_0 .net *"_s155", 0 0, L_0xa5e310; 1 drivers +v0xa22710_0 .net *"_s159", 0 0, L_0xa5e3b0; 1 drivers +v0xa227f0_0 .net *"_s160", 17 0, L_0xa5e500; 1 drivers +v0xa228d0_0 .net *"_s162", 5 0, L_0xa5e860; 1 drivers +L_0x2b1dfaa332a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xa229b0_0 .net *"_s165", 1 0, L_0x2b1dfaa332a0; 1 drivers +v0xa24980_2 .array/port v0xa24980, 2; +v0xa22a90_0 .net *"_s173", 10 0, v0xa24980_2; 1 drivers +v0xa24980_3 .array/port v0xa24980, 3; +v0xa22b70_0 .net *"_s179", 10 0, v0xa24980_3; 1 drivers +v0xa24980_0 .array/port v0xa24980, 0; +v0xa22c50_0 .net *"_s185", 10 0, v0xa24980_0; 1 drivers +v0xa24980_1 .array/port v0xa24980, 1; +v0xa22d30_0 .net *"_s191", 10 0, v0xa24980_1; 1 drivers +v0xa22e10_0 .net *"_s23", 0 0, L_0xa5bd20; 1 drivers +v0xa22ef0_0 .net *"_s27", 0 0, L_0xa5bdf0; 1 drivers +v0xa22140_0 .net *"_s31", 0 0, L_0xa5bec0; 1 drivers +v0xa231c0_0 .net *"_s36", 0 0, L_0xa5c060; 1 drivers +v0xa232a0_0 .net *"_s42", 0 0, L_0xa5c240; 1 drivers +v0xa23380_0 .net *"_s46", 0 0, L_0xa5c2e0; 1 drivers +v0xa23460_0 .net *"_s50", 0 0, L_0xa5c3f0; 1 drivers +v0xa23540_0 .net *"_s55", 0 0, L_0xa5c600; 1 drivers +v0xa23620_0 .net *"_s61", 0 0, L_0xa5c870; 1 drivers +v0xa23700_0 .net *"_s65", 0 0, L_0xa5c910; 1 drivers +v0xa237e0_0 .net *"_s69", 0 0, L_0xa5ca50; 1 drivers +v0xa238c0_0 .net *"_s74", 0 0, L_0xa5c9b0; 1 drivers +v0xa239a0_0 .net *"_s80", 0 0, L_0xa5cc80; 1 drivers +v0xa23a80_0 .net *"_s84", 0 0, L_0xa5d040; 1 drivers +v0xa23b60_0 .net *"_s88", 0 0, L_0xa5ce70; 1 drivers +v0xa23c40_0 .net *"_s93", 0 0, L_0xa5d1f0; 1 drivers +v0xa23d20_0 .net *"_s99", 0 0, L_0xa5d470; 1 drivers +v0xa23e00_0 .net/s "accOut", 10 0, L_0xa5b2c0; alias, 1 drivers +v0xa23ee0_0 .net "anyHasData", 0 0, L_0xa5c150; 1 drivers +v0xa23fa0_0 .net "anyReadAck", 0 0, L_0xa5cd80; 1 drivers +v0xa24060_0 .net "anyWantData", 0 0, L_0xa5c6f0; 1 drivers +v0xa24120_0 .net "anyWriteAck", 0 0, L_0xa5d6b0; 1 drivers +v0xa241e0_0 .net "clk", 0 0, v0xa3b0f0_0; 1 drivers +v0xa242a0_0 .net "down", 14 0, L_0xa5a500; alias, 1 drivers +v0xa24380_0 .net "downOut", 14 0, L_0xa5eca0; alias, 1 drivers +v0xa24460_0 .net "instruction", 17 0, L_0xa5c380; 1 drivers +v0xa24540 .array "instructions", 15 0, 17 0; +v0xa24600_0 .var "last", 2 0; +v0xa246e0_0 .net "left", 14 0, L_0xa4eca0; alias, 1 drivers +v0xa247c0_0 .net "leftOut", 14 0, L_0xa5e9c0; alias, 1 drivers +v0xa248a0_0 .var "mode", 2 0; +v0xa24980 .array/s "outVals", 2 5, 10 0; +v0xa24ac0_0 .var "phase", 2 0; +v0xa24ba0_0 .net "portsHaveData", 5 2, L_0xa5bf60; 1 drivers +v0xa22f90_0 .net "portsWantData", 5 2, L_0xa5c490; 1 drivers +v0xa23070_0 .net "readAckIn", 5 2, L_0xa5caf0; 1 drivers +v0xa25050_0 .var "readAckOut", 5 2; +v0xa250f0_0 .var "readTarget", 2 0; +v0xa251d0_0 .var/s "readValue", 10 0; +L_0x2b1dfaa33258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xa252b0 .array "regVals", 0 7; +v0xa252b0_0 .net/s v0xa252b0 0, 10 0, L_0x2b1dfaa33258; 1 drivers +v0xa252b0_1 .net/s v0xa252b0 1, 10 0, L_0xa5b550; 1 drivers +v0xa252b0_2 .net/s v0xa252b0 2, 10 0, L_0xa5b830; 1 drivers +v0xa252b0_3 .net/s v0xa252b0 3, 10 0, L_0xa5b960; 1 drivers +v0xa252b0_4 .net/s v0xa252b0 4, 10 0, L_0xa5ba90; 1 drivers +v0xa252b0_5 .net/s v0xa252b0 5, 10 0, L_0xa5bbc0; 1 drivers +o0x2b1dfaa02eb8 .functor BUFZ 11, C4; HiZ drive +v0xa252b0_6 .net/s v0xa252b0 6, 10 0, o0x2b1dfaa02eb8; 0 drivers +o0x2b1dfaa02ee8 .functor BUFZ 11, C4; HiZ drive +v0xa252b0_7 .net/s v0xa252b0 7, 10 0, o0x2b1dfaa02ee8; 0 drivers +v0xa254c0_0 .net "right", 14 0, L_0xa525f0; alias, 1 drivers +v0xa255a0_0 .net "rightOut", 14 0, L_0xa5f390; alias, 1 drivers +v0xa25680_0 .net "up", 14 0, L_0xa56960; alias, 1 drivers +v0xa25760_0 .net "upOut", 14 0, L_0xa5e6f0; alias, 1 drivers +v0xa25840_0 .var "weHaveData", 5 2; +v0xa25920_0 .var "weWantData", 5 2; +v0xa25a00_0 .net "writeAckIn", 5 2, L_0xa5d3d0; 1 drivers +v0xa25ae0_0 .var "writeAckOut", 5 2; +v0xa25bc0_0 .var "writeTarget", 2 0; +v0xa25ca0_0 .var/s "writeValue", 10 0; +E_0x97c930 .event negedge, v0xa241e0_0; +E_0x99f0f0 .event posedge, v0xa241e0_0; +L_0xa5b830 .part L_0xa4eca0, 0, 11; +L_0xa5b960 .part L_0xa525f0, 0, 11; +L_0xa5ba90 .part L_0xa56960, 0, 11; +L_0xa5bbc0 .part L_0xa5a500, 0, 11; +L_0xa5bd20 .part L_0xa4eca0, 11, 1; +L_0xa5bdf0 .part L_0xa525f0, 11, 1; +L_0xa5bec0 .part L_0xa56960, 11, 1; +L_0xa5bf60 .concat8 [ 1 1 1 1], L_0xa5bd20, L_0xa5bdf0, L_0xa5bec0, L_0xa5c060; +L_0xa5c060 .part L_0xa5a500, 11, 1; +L_0xa5c150 .reduce/or L_0xa5bf60; +L_0xa5c240 .part L_0xa4eca0, 12, 1; +L_0xa5c2e0 .part L_0xa525f0, 12, 1; +L_0xa5c3f0 .part L_0xa56960, 12, 1; +L_0xa5c490 .concat8 [ 1 1 1 1], L_0xa5c240, L_0xa5c2e0, L_0xa5c3f0, L_0xa5c600; +L_0xa5c600 .part L_0xa5a500, 12, 1; +L_0xa5c6f0 .reduce/or L_0xa5c490; +L_0xa5c870 .part L_0xa4eca0, 13, 1; +L_0xa5c910 .part L_0xa525f0, 13, 1; +L_0xa5ca50 .part L_0xa56960, 13, 1; +L_0xa5caf0 .concat8 [ 1 1 1 1], L_0xa5c870, L_0xa5c910, L_0xa5ca50, L_0xa5c9b0; +L_0xa5c9b0 .part L_0xa5a500, 13, 1; +L_0xa5cd80 .reduce/or L_0xa5caf0; +L_0xa5cc80 .part L_0xa4eca0, 14, 1; +L_0xa5d040 .part L_0xa525f0, 14, 1; +L_0xa5ce70 .part L_0xa56960, 14, 1; +L_0xa5d3d0 .concat8 [ 1 1 1 1], L_0xa5cc80, L_0xa5d040, L_0xa5ce70, L_0xa5d1f0; +L_0xa5d1f0 .part L_0xa5a500, 14, 1; +L_0xa5d6b0 .reduce/or L_0xa5d3d0; +L_0xa5d470 .part v0xa25050_0, 0, 1; +L_0xa5d840 .part v0xa25050_0, 1, 1; +L_0xa5d750 .part v0xa25050_0, 2, 1; +L_0xa5da30 .part v0xa25050_0, 3, 1; +L_0xa5d930 .part v0xa25ae0_0, 0, 1; +L_0xa5dc70 .part v0xa25ae0_0, 1, 1; +L_0xa5db60 .part v0xa25ae0_0, 2, 1; +L_0xa5de30 .part v0xa25ae0_0, 3, 1; +L_0xa5dd10 .part v0xa25920_0, 0, 1; +L_0xa5e090 .part v0xa25920_0, 1, 1; +L_0xa5df60 .part v0xa25920_0, 2, 1; +L_0xa5e270 .part v0xa25920_0, 3, 1; +L_0xa5e130 .part v0xa25840_0, 0, 1; +L_0xa5e460 .part v0xa25840_0, 1, 1; +L_0xa5e310 .part v0xa25840_0, 2, 1; +L_0xa5e3b0 .part v0xa25840_0, 3, 1; +L_0xa5e500 .array/port v0xa24540, L_0xa5e860; +L_0xa5e860 .concat [ 4 2 0 0], v0xa21710_0, L_0x2b1dfaa332a0; +LS_0xa5e6f0_0_0 .concat8 [ 11 1 1 1], v0xa24980_2, L_0xa5e310, L_0xa5df60, L_0xa5db60; +LS_0xa5e6f0_0_4 .concat8 [ 1 0 0 0], L_0xa5d750; +L_0xa5e6f0 .concat8 [ 14 1 0 0], LS_0xa5e6f0_0_0, LS_0xa5e6f0_0_4; +LS_0xa5eca0_0_0 .concat8 [ 11 1 1 1], v0xa24980_3, L_0xa5e3b0, L_0xa5e270, L_0xa5de30; +LS_0xa5eca0_0_4 .concat8 [ 1 0 0 0], L_0xa5da30; +L_0xa5eca0 .concat8 [ 14 1 0 0], LS_0xa5eca0_0_0, LS_0xa5eca0_0_4; +LS_0xa5e9c0_0_0 .concat8 [ 11 1 1 1], v0xa24980_0, L_0xa5e130, L_0xa5dd10, L_0xa5d930; +LS_0xa5e9c0_0_4 .concat8 [ 1 0 0 0], L_0xa5d470; +L_0xa5e9c0 .concat8 [ 14 1 0 0], LS_0xa5e9c0_0_0, LS_0xa5e9c0_0_4; +LS_0xa5f390_0_0 .concat8 [ 11 1 1 1], v0xa24980_1, L_0xa5e460, L_0xa5e090, L_0xa5dc70; +LS_0xa5f390_0_4 .concat8 [ 1 0 0 0], L_0xa5d840; +L_0xa5f390 .concat8 [ 14 1 0 0], LS_0xa5f390_0_0, LS_0xa5f390_0_4; +L_0xa5f000 .part L_0xa5c380, 14, 4; +L_0xa5f820 .part L_0xa5c380, 11, 3; +L_0xa5f630 .part L_0xa5c380, 8, 3; +L_0xa5fa70 .part L_0xa5c380, 10, 4; +L_0xa5f8c0 .part L_0xa5c380, 0, 11; +S_0xa25f20 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x96baa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0xa26110 .param/str "memFile" 0 3 60, "jumpTest/down.dat"; +L_0xa57260 .functor BUFZ 11, v0xa263e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa57460 .functor BUFZ 11, v0xa263e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa58320 .functor BUFZ 18, L_0xa5a290, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xa263e0_0 .var/s "ACC", 10 0; +v0xa264e0_0 .var/s "BAK", 10 0; +v0xa265c0_0 .net "DST", 2 0, L_0xa5b380; 1 drivers +v0xa26680_0 .net/s "IMM", 10 0, L_0xa5b420; 1 drivers +v0xa26760_0 .net "INST", 3 0, L_0xa5ac60; 1 drivers +v0xa26840_0 .net "LABEL", 3 0, L_0xa5b5d0; 1 drivers +v0xa26920_0 .var "PC", 3 0; +v0xa26a00_0 .var "PCNEXT", 3 0; +v0xa26ae0_0 .net "SRC", 2 0, L_0xa5b190; 1 drivers +v0xa26c50_0 .net *"_s103", 0 0, L_0xa595d0; 1 drivers +v0xa26d30_0 .net *"_s107", 0 0, L_0xa594e0; 1 drivers +v0xa26e10_0 .net *"_s111", 0 0, L_0xa597c0; 1 drivers +v0xa26ef0_0 .net *"_s115", 0 0, L_0xa596c0; 1 drivers +v0xa26fd0_0 .net *"_s119", 0 0, L_0xa59a00; 1 drivers +v0xa270b0_0 .net *"_s123", 0 0, L_0xa598f0; 1 drivers +v0xa27190_0 .net *"_s127", 0 0, L_0xa59bc0; 1 drivers +v0xa27270_0 .net *"_s131", 0 0, L_0xa59aa0; 1 drivers +v0xa27420_0 .net *"_s135", 0 0, L_0xa59e20; 1 drivers +v0xa274c0_0 .net *"_s139", 0 0, L_0xa59cf0; 1 drivers +v0xa275a0_0 .net *"_s143", 0 0, L_0xa5a000; 1 drivers +v0xa27680_0 .net *"_s147", 0 0, L_0xa59ec0; 1 drivers +v0xa27760_0 .net *"_s151", 0 0, L_0xa5a1f0; 1 drivers +v0xa27840_0 .net *"_s155", 0 0, L_0xa5a0a0; 1 drivers +v0xa27920_0 .net *"_s159", 0 0, L_0xa5a140; 1 drivers +v0xa27a00_0 .net *"_s160", 17 0, L_0xa5a290; 1 drivers +v0xa27ae0_0 .net *"_s162", 5 0, L_0xa5a5f0; 1 drivers +L_0x2b1dfaa33210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xa27bc0_0 .net *"_s165", 1 0, L_0x2b1dfaa33210; 1 drivers +v0xa29b50_2 .array/port v0xa29b50, 2; +v0xa27ca0_0 .net *"_s173", 10 0, v0xa29b50_2; 1 drivers +v0xa29b50_3 .array/port v0xa29b50, 3; +v0xa27d80_0 .net *"_s179", 10 0, v0xa29b50_3; 1 drivers +v0xa29b50_0 .array/port v0xa29b50, 0; +v0xa27e60_0 .net *"_s185", 10 0, v0xa29b50_0; 1 drivers +v0xa29b50_1 .array/port v0xa29b50, 1; +v0xa27f40_0 .net *"_s191", 10 0, v0xa29b50_1; 1 drivers +v0xa28020_0 .net *"_s23", 0 0, L_0xa57ab0; 1 drivers +v0xa28100_0 .net *"_s27", 0 0, L_0xa57bd0; 1 drivers +v0xa27350_0 .net *"_s31", 0 0, L_0xa57cc0; 1 drivers +v0xa283d0_0 .net *"_s36", 0 0, L_0xa57fb0; 1 drivers +v0xa284b0_0 .net *"_s42", 0 0, L_0xa581e0; 1 drivers +v0xa28590_0 .net *"_s46", 0 0, L_0xa58280; 1 drivers +v0xa28670_0 .net *"_s50", 0 0, L_0xa58390; 1 drivers +v0xa28750_0 .net *"_s55", 0 0, L_0xa585a0; 1 drivers +v0xa28830_0 .net *"_s61", 0 0, L_0xa58810; 1 drivers +v0xa28910_0 .net *"_s65", 0 0, L_0xa58940; 1 drivers +v0xa289f0_0 .net *"_s69", 0 0, L_0xa58b10; 1 drivers +v0xa28ad0_0 .net *"_s74", 0 0, L_0xa58a70; 1 drivers +v0xa28bb0_0 .net *"_s80", 0 0, L_0xa58ca0; 1 drivers +v0xa28c90_0 .net *"_s84", 0 0, L_0xa58f90; 1 drivers +v0xa28d70_0 .net *"_s88", 0 0, L_0xa58ed0; 1 drivers +v0xa28e50_0 .net *"_s93", 0 0, L_0xa59030; 1 drivers +v0xa28f30_0 .net *"_s99", 0 0, L_0xa592c0; 1 drivers +v0xa29010_0 .net/s "accOut", 10 0, L_0xa57260; alias, 1 drivers +v0xa290f0_0 .net "anyHasData", 0 0, L_0xa580f0; 1 drivers +v0xa291b0_0 .net "anyReadAck", 0 0, L_0xa58e30; 1 drivers +v0xa29270_0 .net "anyWantData", 0 0, L_0xa58690; 1 drivers +v0xa29330_0 .net "anyWriteAck", 0 0, L_0xa593f0; 1 drivers +v0xa293f0_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers +o0x2b1dfaa03cc8 .functor BUFZ 15, C4; HiZ drive +v0xa29490_0 .net "down", 14 0, o0x2b1dfaa03cc8; 0 drivers +v0xa29550_0 .net "downOut", 14 0, L_0xa5a9c0; 1 drivers +v0xa29630_0 .net "instruction", 17 0, L_0xa58320; 1 drivers +v0xa29710 .array "instructions", 15 0, 17 0; +v0xa297d0_0 .var "last", 2 0; +o0x2b1dfaa03d88 .functor BUFZ 15, C4; HiZ drive +v0xa298b0_0 .net "left", 14 0, o0x2b1dfaa03d88; 0 drivers +v0xa29990_0 .net "leftOut", 14 0, L_0xa5a750; 1 drivers +v0xa29a70_0 .var "mode", 2 0; +v0xa29b50 .array/s "outVals", 2 5, 10 0; +v0xa29c90_0 .var "phase", 2 0; +v0xa29d70_0 .net "portsHaveData", 5 2, L_0xa57df0; 1 drivers +v0xa281a0_0 .net "portsWantData", 5 2, L_0xa58430; 1 drivers +v0xa28280_0 .net "readAckIn", 5 2, L_0xa58bb0; 1 drivers +v0xa2a220_0 .var "readAckOut", 5 2; +v0xa2a2c0_0 .var "readTarget", 2 0; +v0xa2a360_0 .var/s "readValue", 10 0; +L_0x2b1dfaa331c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xa2a400 .array "regVals", 0 7; +v0xa2a400_0 .net/s v0xa2a400 0, 10 0, L_0x2b1dfaa331c8; 1 drivers +v0xa2a400_1 .net/s v0xa2a400 1, 10 0, L_0xa57460; 1 drivers +v0xa2a400_2 .net/s v0xa2a400 2, 10 0, L_0xa577d0; 1 drivers +v0xa2a400_3 .net/s v0xa2a400 3, 10 0, L_0xa57870; 1 drivers +v0xa2a400_4 .net/s v0xa2a400 4, 10 0, L_0xa57910; 1 drivers +v0xa2a400_5 .net/s v0xa2a400 5, 10 0, L_0xa579b0; 1 drivers +o0x2b1dfaa04148 .functor BUFZ 11, C4; HiZ drive +v0xa2a400_6 .net/s v0xa2a400 6, 10 0, o0x2b1dfaa04148; 0 drivers +o0x2b1dfaa04178 .functor BUFZ 11, C4; HiZ drive +v0xa2a400_7 .net/s v0xa2a400 7, 10 0, o0x2b1dfaa04178; 0 drivers +o0x2b1dfaa041a8 .functor BUFZ 15, C4; HiZ drive +v0xa2a610_0 .net "right", 14 0, o0x2b1dfaa041a8; 0 drivers +v0xa2a6f0_0 .net "rightOut", 14 0, L_0xa5af70; 1 drivers +v0xa2a7d0_0 .net "up", 14 0, L_0xa5eca0; alias, 1 drivers +v0xa2a8c0_0 .net "upOut", 14 0, L_0xa5a500; alias, 1 drivers +v0xa2a990_0 .var "weHaveData", 5 2; +v0xa2aa50_0 .var "weWantData", 5 2; +v0xa2ab30_0 .net "writeAckIn", 5 2, L_0xa59100; 1 drivers +v0xa2ac10_0 .var "writeAckOut", 5 2; +v0xa2acf0_0 .var "writeTarget", 2 0; +v0xa2add0_0 .var/s "writeValue", 10 0; +L_0xa577d0 .part o0x2b1dfaa03d88, 0, 11; +L_0xa57870 .part o0x2b1dfaa041a8, 0, 11; +L_0xa57910 .part L_0xa5eca0, 0, 11; +L_0xa579b0 .part o0x2b1dfaa03cc8, 0, 11; +L_0xa57ab0 .part o0x2b1dfaa03d88, 11, 1; +L_0xa57bd0 .part o0x2b1dfaa041a8, 11, 1; +L_0xa57cc0 .part L_0xa5eca0, 11, 1; +L_0xa57df0 .concat8 [ 1 1 1 1], L_0xa57ab0, L_0xa57bd0, L_0xa57cc0, L_0xa57fb0; +L_0xa57fb0 .part o0x2b1dfaa03cc8, 11, 1; +L_0xa580f0 .reduce/or L_0xa57df0; +L_0xa581e0 .part o0x2b1dfaa03d88, 12, 1; +L_0xa58280 .part o0x2b1dfaa041a8, 12, 1; +L_0xa58390 .part L_0xa5eca0, 12, 1; +L_0xa58430 .concat8 [ 1 1 1 1], L_0xa581e0, L_0xa58280, L_0xa58390, L_0xa585a0; +L_0xa585a0 .part o0x2b1dfaa03cc8, 12, 1; +L_0xa58690 .reduce/or L_0xa58430; +L_0xa58810 .part o0x2b1dfaa03d88, 13, 1; +L_0xa58940 .part o0x2b1dfaa041a8, 13, 1; +L_0xa58b10 .part L_0xa5eca0, 13, 1; +L_0xa58bb0 .concat8 [ 1 1 1 1], L_0xa58810, L_0xa58940, L_0xa58b10, L_0xa58a70; +L_0xa58a70 .part o0x2b1dfaa03cc8, 13, 1; +L_0xa58e30 .reduce/or L_0xa58bb0; +L_0xa58ca0 .part o0x2b1dfaa03d88, 14, 1; +L_0xa58f90 .part o0x2b1dfaa041a8, 14, 1; +L_0xa58ed0 .part L_0xa5eca0, 14, 1; +L_0xa59100 .concat8 [ 1 1 1 1], L_0xa58ca0, L_0xa58f90, L_0xa58ed0, L_0xa59030; +L_0xa59030 .part o0x2b1dfaa03cc8, 14, 1; +L_0xa593f0 .reduce/or L_0xa59100; +L_0xa592c0 .part v0xa2a220_0, 0, 1; +L_0xa595d0 .part v0xa2a220_0, 1, 1; +L_0xa594e0 .part v0xa2a220_0, 2, 1; +L_0xa597c0 .part v0xa2a220_0, 3, 1; +L_0xa596c0 .part v0xa2ac10_0, 0, 1; +L_0xa59a00 .part v0xa2ac10_0, 1, 1; +L_0xa598f0 .part v0xa2ac10_0, 2, 1; +L_0xa59bc0 .part v0xa2ac10_0, 3, 1; +L_0xa59aa0 .part v0xa2aa50_0, 0, 1; +L_0xa59e20 .part v0xa2aa50_0, 1, 1; +L_0xa59cf0 .part v0xa2aa50_0, 2, 1; +L_0xa5a000 .part v0xa2aa50_0, 3, 1; +L_0xa59ec0 .part v0xa2a990_0, 0, 1; +L_0xa5a1f0 .part v0xa2a990_0, 1, 1; +L_0xa5a0a0 .part v0xa2a990_0, 2, 1; +L_0xa5a140 .part v0xa2a990_0, 3, 1; +L_0xa5a290 .array/port v0xa29710, L_0xa5a5f0; +L_0xa5a5f0 .concat [ 4 2 0 0], v0xa26920_0, L_0x2b1dfaa33210; +LS_0xa5a500_0_0 .concat8 [ 11 1 1 1], v0xa29b50_2, L_0xa5a0a0, L_0xa59cf0, L_0xa598f0; +LS_0xa5a500_0_4 .concat8 [ 1 0 0 0], L_0xa594e0; +L_0xa5a500 .concat8 [ 14 1 0 0], LS_0xa5a500_0_0, LS_0xa5a500_0_4; +LS_0xa5a9c0_0_0 .concat8 [ 11 1 1 1], v0xa29b50_3, L_0xa5a140, L_0xa5a000, L_0xa59bc0; +LS_0xa5a9c0_0_4 .concat8 [ 1 0 0 0], L_0xa597c0; +L_0xa5a9c0 .concat8 [ 14 1 0 0], LS_0xa5a9c0_0_0, LS_0xa5a9c0_0_4; +LS_0xa5a750_0_0 .concat8 [ 11 1 1 1], v0xa29b50_0, L_0xa59ec0, L_0xa59aa0, L_0xa596c0; +LS_0xa5a750_0_4 .concat8 [ 1 0 0 0], L_0xa592c0; +L_0xa5a750 .concat8 [ 14 1 0 0], LS_0xa5a750_0_0, LS_0xa5a750_0_4; +LS_0xa5af70_0_0 .concat8 [ 11 1 1 1], v0xa29b50_1, L_0xa5a1f0, L_0xa59e20, L_0xa59a00; +LS_0xa5af70_0_4 .concat8 [ 1 0 0 0], L_0xa595d0; +L_0xa5af70 .concat8 [ 14 1 0 0], LS_0xa5af70_0_0, LS_0xa5af70_0_4; +L_0xa5ac60 .part L_0xa58320, 14, 4; +L_0xa5b380 .part L_0xa58320, 11, 3; +L_0xa5b190 .part L_0xa58320, 8, 3; +L_0xa5b5d0 .part L_0xa58320, 10, 4; +L_0xa5b420 .part L_0xa58320, 0, 11; +S_0xa2b050 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x96baa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0xa2b250 .param/str "memFile" 0 3 60, "jumpTest/left.dat"; +L_0xa3b310 .functor BUFZ 11, v0xa2b520_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa4b3b0 .functor BUFZ 11, v0xa2b520_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa4e110 .functor BUFZ 18, L_0xa4df20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xa2b520_0 .var/s "ACC", 10 0; +v0xa2b620_0 .var/s "BAK", 10 0; +v0xa2b700_0 .net "DST", 2 0, L_0xa4f0b0; 1 drivers +v0xa2b7c0_0 .net/s "IMM", 10 0, L_0xa4f150; 1 drivers +v0xa2b8a0_0 .net "INST", 3 0, L_0xa4e990; 1 drivers +v0xa2b980_0 .net "LABEL", 3 0, L_0xa4f300; 1 drivers +v0xa2ba60_0 .var "PC", 3 0; +v0xa2bb40_0 .var "PCNEXT", 3 0; +v0xa2bc20_0 .net "SRC", 2 0, L_0xa4eec0; 1 drivers +v0xa2bd90_0 .net *"_s103", 0 0, L_0xa4d260; 1 drivers +v0xa2be70_0 .net *"_s107", 0 0, L_0xa4d170; 1 drivers +v0xa2bf50_0 .net *"_s111", 0 0, L_0xa4d450; 1 drivers +v0xa2b330_0 .net *"_s115", 0 0, L_0xa4d350; 1 drivers +v0xa2bff0_0 .net *"_s119", 0 0, L_0xa4d690; 1 drivers +v0xa2c0d0_0 .net *"_s123", 0 0, L_0xa4d580; 1 drivers +v0xa2c1b0_0 .net *"_s127", 0 0, L_0xa4d850; 1 drivers +v0xa2c290_0 .net *"_s131", 0 0, L_0xa4d730; 1 drivers +v0xa2c440_0 .net *"_s135", 0 0, L_0xa4dab0; 1 drivers +v0xa2c4e0_0 .net *"_s139", 0 0, L_0xa4d980; 1 drivers +v0xa2c5c0_0 .net *"_s143", 0 0, L_0xa4dc90; 1 drivers +v0xa2c6a0_0 .net *"_s147", 0 0, L_0xa4db50; 1 drivers +v0xa2c780_0 .net *"_s151", 0 0, L_0xa4de80; 1 drivers +v0xa2c860_0 .net *"_s155", 0 0, L_0xa4dd30; 1 drivers +v0xa2c940_0 .net *"_s159", 0 0, L_0xa4ddd0; 1 drivers +v0xa2ca20_0 .net *"_s160", 17 0, L_0xa4df20; 1 drivers +v0xa2cb00_0 .net *"_s162", 5 0, L_0xa4e280; 1 drivers +L_0x2b1dfaa33060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xa2cbe0_0 .net *"_s165", 1 0, L_0x2b1dfaa33060; 1 drivers +v0xa2ebe0_2 .array/port v0xa2ebe0, 2; +v0xa2ccc0_0 .net *"_s173", 10 0, v0xa2ebe0_2; 1 drivers +v0xa2ebe0_3 .array/port v0xa2ebe0, 3; +v0xa2cda0_0 .net *"_s179", 10 0, v0xa2ebe0_3; 1 drivers +v0xa2ebe0_0 .array/port v0xa2ebe0, 0; +v0xa2ce80_0 .net *"_s185", 10 0, v0xa2ebe0_0; 1 drivers +v0xa2ebe0_1 .array/port v0xa2ebe0, 1; +v0xa2cf60_0 .net *"_s191", 10 0, v0xa2ebe0_1; 1 drivers +v0xa2d040_0 .net *"_s23", 0 0, L_0xa4b810; 1 drivers +v0xa2d120_0 .net *"_s27", 0 0, L_0xa4b930; 1 drivers +v0xa2c370_0 .net *"_s31", 0 0, L_0xa4baa0; 1 drivers +v0xa2d3f0_0 .net *"_s36", 0 0, L_0xa4bd50; 1 drivers +v0xa2d4d0_0 .net *"_s42", 0 0, L_0xa4bfe0; 1 drivers +v0xa2d5b0_0 .net *"_s46", 0 0, L_0xa4c080; 1 drivers +v0xa2d690_0 .net *"_s50", 0 0, L_0xa4c190; 1 drivers +v0xa2d770_0 .net *"_s55", 0 0, L_0xa4c420; 1 drivers +v0xa2d850_0 .net *"_s61", 0 0, L_0xa4c690; 1 drivers +v0xa2d930_0 .net *"_s65", 0 0, L_0xa4c7c0; 1 drivers +v0xa2da10_0 .net *"_s69", 0 0, L_0xa4c900; 1 drivers +v0xa2daf0_0 .net *"_s74", 0 0, L_0xa4c860; 1 drivers +v0xa2dbd0_0 .net *"_s80", 0 0, L_0xa4caf0; 1 drivers +v0xa2dcb0_0 .net *"_s84", 0 0, L_0xa4cde0; 1 drivers +v0xa2dd90_0 .net *"_s88", 0 0, L_0xa4cd20; 1 drivers +v0xa2de70_0 .net *"_s93", 0 0, L_0xa2f680; 1 drivers +v0xa2df50_0 .net *"_s99", 0 0, L_0xa4cff0; 1 drivers +v0xa2e030_0 .net/s "accOut", 10 0, L_0xa3b310; alias, 1 drivers +v0xa2e110_0 .net "anyHasData", 0 0, L_0xa4be90; 1 drivers +v0xa2e1d0_0 .net "anyReadAck", 0 0, L_0xa4cc80; 1 drivers +v0xa2e290_0 .net "anyWantData", 0 0, L_0xa4c510; 1 drivers +v0xa2e350_0 .net "anyWriteAck", 0 0, L_0xa4d0d0; 1 drivers +v0xa2e410_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers +o0x2b1dfaa04ef8 .functor BUFZ 15, C4; HiZ drive +v0xa2e500_0 .net "down", 14 0, o0x2b1dfaa04ef8; 0 drivers +v0xa2e5e0_0 .net "downOut", 14 0, L_0xa4e6f0; 1 drivers +v0xa2e6c0_0 .net "instruction", 17 0, L_0xa4e110; 1 drivers +v0xa2e7a0 .array "instructions", 15 0, 17 0; +v0xa2e860_0 .var "last", 2 0; +o0x2b1dfaa04fb8 .functor BUFZ 15, C4; HiZ drive +v0xa2e940_0 .net "left", 14 0, o0x2b1dfaa04fb8; 0 drivers +v0xa2ea20_0 .net "leftOut", 14 0, L_0xa4e3e0; 1 drivers +v0xa2eb00_0 .var "mode", 2 0; +v0xa2ebe0 .array/s "outVals", 2 5, 10 0; +v0xa2ed20_0 .var "phase", 2 0; +v0xa2ee00_0 .net "portsHaveData", 5 2, L_0xa4bb40; 1 drivers +v0xa2d200_0 .net "portsWantData", 5 2, L_0xa4c230; 1 drivers +v0xa2d2e0_0 .net "readAckIn", 5 2, L_0xa4c9a0; 1 drivers +v0xa2f2b0_0 .var "readAckOut", 5 2; +v0xa2f390_0 .var "readTarget", 2 0; +v0xa2f470_0 .var/s "readValue", 10 0; +L_0x2b1dfaa33018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xa2f550 .array "regVals", 0 7; +v0xa2f550_0 .net/s v0xa2f550 0, 10 0, L_0x2b1dfaa33018; 1 drivers +v0xa2f550_1 .net/s v0xa2f550 1, 10 0, L_0xa4b3b0; 1 drivers +v0xa2f550_2 .net/s v0xa2f550 2, 10 0, L_0xa4b470; 1 drivers +v0xa2f550_3 .net/s v0xa2f550 3, 10 0, L_0xa4b510; 1 drivers +v0xa2f550_4 .net/s v0xa2f550 4, 10 0, L_0xa4b5e0; 1 drivers +v0xa2f550_5 .net/s v0xa2f550 5, 10 0, L_0xa4b6e0; 1 drivers +o0x2b1dfaa05378 .functor BUFZ 11, C4; HiZ drive +v0xa2f550_6 .net/s v0xa2f550 6, 10 0, o0x2b1dfaa05378; 0 drivers +o0x2b1dfaa053a8 .functor BUFZ 11, C4; HiZ drive +v0xa2f550_7 .net/s v0xa2f550 7, 10 0, o0x2b1dfaa053a8; 0 drivers +v0xa2f760_0 .net "right", 14 0, L_0xa5e9c0; alias, 1 drivers +v0xa2f850_0 .net "rightOut", 14 0, L_0xa4eca0; alias, 1 drivers +o0x2b1dfaa053d8 .functor BUFZ 15, C4; HiZ drive +v0xa2f920_0 .net "up", 14 0, o0x2b1dfaa053d8; 0 drivers +v0xa2f9e0_0 .net "upOut", 14 0, L_0xa4e4a0; 1 drivers +v0xa2fac0_0 .var "weHaveData", 5 2; +v0xa2fba0_0 .var "weWantData", 5 2; +v0xa2fc80_0 .net "writeAckIn", 5 2, L_0xa4cf50; 1 drivers +v0xa2fd60_0 .var "writeAckOut", 5 2; +v0xa2fe40_0 .var "writeTarget", 2 0; +v0xa2ff20_0 .var/s "writeValue", 10 0; +L_0xa4b470 .part o0x2b1dfaa04fb8, 0, 11; +L_0xa4b510 .part L_0xa5e9c0, 0, 11; +L_0xa4b5e0 .part o0x2b1dfaa053d8, 0, 11; +L_0xa4b6e0 .part o0x2b1dfaa04ef8, 0, 11; +L_0xa4b810 .part o0x2b1dfaa04fb8, 11, 1; +L_0xa4b930 .part L_0xa5e9c0, 11, 1; +L_0xa4baa0 .part o0x2b1dfaa053d8, 11, 1; +L_0xa4bb40 .concat8 [ 1 1 1 1], L_0xa4b810, L_0xa4b930, L_0xa4baa0, L_0xa4bd50; +L_0xa4bd50 .part o0x2b1dfaa04ef8, 11, 1; +L_0xa4be90 .reduce/or L_0xa4bb40; +L_0xa4bfe0 .part o0x2b1dfaa04fb8, 12, 1; +L_0xa4c080 .part L_0xa5e9c0, 12, 1; +L_0xa4c190 .part o0x2b1dfaa053d8, 12, 1; +L_0xa4c230 .concat8 [ 1 1 1 1], L_0xa4bfe0, L_0xa4c080, L_0xa4c190, L_0xa4c420; +L_0xa4c420 .part o0x2b1dfaa04ef8, 12, 1; +L_0xa4c510 .reduce/or L_0xa4c230; +L_0xa4c690 .part o0x2b1dfaa04fb8, 13, 1; +L_0xa4c7c0 .part L_0xa5e9c0, 13, 1; +L_0xa4c900 .part o0x2b1dfaa053d8, 13, 1; +L_0xa4c9a0 .concat8 [ 1 1 1 1], L_0xa4c690, L_0xa4c7c0, L_0xa4c900, L_0xa4c860; +L_0xa4c860 .part o0x2b1dfaa04ef8, 13, 1; +L_0xa4cc80 .reduce/or L_0xa4c9a0; +L_0xa4caf0 .part o0x2b1dfaa04fb8, 14, 1; +L_0xa4cde0 .part L_0xa5e9c0, 14, 1; +L_0xa4cd20 .part o0x2b1dfaa053d8, 14, 1; +L_0xa4cf50 .concat8 [ 1 1 1 1], L_0xa4caf0, L_0xa4cde0, L_0xa4cd20, L_0xa2f680; +L_0xa2f680 .part o0x2b1dfaa04ef8, 14, 1; +L_0xa4d0d0 .reduce/or L_0xa4cf50; +L_0xa4cff0 .part v0xa2f2b0_0, 0, 1; +L_0xa4d260 .part v0xa2f2b0_0, 1, 1; +L_0xa4d170 .part v0xa2f2b0_0, 2, 1; +L_0xa4d450 .part v0xa2f2b0_0, 3, 1; +L_0xa4d350 .part v0xa2fd60_0, 0, 1; +L_0xa4d690 .part v0xa2fd60_0, 1, 1; +L_0xa4d580 .part v0xa2fd60_0, 2, 1; +L_0xa4d850 .part v0xa2fd60_0, 3, 1; +L_0xa4d730 .part v0xa2fba0_0, 0, 1; +L_0xa4dab0 .part v0xa2fba0_0, 1, 1; +L_0xa4d980 .part v0xa2fba0_0, 2, 1; +L_0xa4dc90 .part v0xa2fba0_0, 3, 1; +L_0xa4db50 .part v0xa2fac0_0, 0, 1; +L_0xa4de80 .part v0xa2fac0_0, 1, 1; +L_0xa4dd30 .part v0xa2fac0_0, 2, 1; +L_0xa4ddd0 .part v0xa2fac0_0, 3, 1; +L_0xa4df20 .array/port v0xa2e7a0, L_0xa4e280; +L_0xa4e280 .concat [ 4 2 0 0], v0xa2ba60_0, L_0x2b1dfaa33060; +LS_0xa4e4a0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_2, L_0xa4dd30, L_0xa4d980, L_0xa4d580; +LS_0xa4e4a0_0_4 .concat8 [ 1 0 0 0], L_0xa4d170; +L_0xa4e4a0 .concat8 [ 14 1 0 0], LS_0xa4e4a0_0_0, LS_0xa4e4a0_0_4; +LS_0xa4e6f0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_3, L_0xa4ddd0, L_0xa4dc90, L_0xa4d850; +LS_0xa4e6f0_0_4 .concat8 [ 1 0 0 0], L_0xa4d450; +L_0xa4e6f0 .concat8 [ 14 1 0 0], LS_0xa4e6f0_0_0, LS_0xa4e6f0_0_4; +LS_0xa4e3e0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_0, L_0xa4db50, L_0xa4d730, L_0xa4d350; +LS_0xa4e3e0_0_4 .concat8 [ 1 0 0 0], L_0xa4cff0; +L_0xa4e3e0 .concat8 [ 14 1 0 0], LS_0xa4e3e0_0_0, LS_0xa4e3e0_0_4; +LS_0xa4eca0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_1, L_0xa4de80, L_0xa4dab0, L_0xa4d690; +LS_0xa4eca0_0_4 .concat8 [ 1 0 0 0], L_0xa4d260; +L_0xa4eca0 .concat8 [ 14 1 0 0], LS_0xa4eca0_0_0, LS_0xa4eca0_0_4; +L_0xa4e990 .part L_0xa4e110, 14, 4; +L_0xa4f0b0 .part L_0xa4e110, 11, 3; +L_0xa4eec0 .part L_0xa4e110, 8, 3; +L_0xa4f300 .part L_0xa4e110, 10, 4; +L_0xa4f150 .part L_0xa4e110, 0, 11; +S_0xa301a0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x96baa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0xa30370 .param/str "memFile" 0 3 60, "jumpTest/right.dat"; +L_0xa4eff0 .functor BUFZ 11, v0xa30660_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa4f1f0 .functor BUFZ 11, v0xa30660_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa50140 .functor BUFZ 18, L_0xa52130, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xa30660_0 .var/s "ACC", 10 0; +v0xa30760_0 .var/s "BAK", 10 0; +v0xa30840_0 .net "DST", 2 0, L_0xa53270; 1 drivers +v0xa30900_0 .net/s "IMM", 10 0, L_0xa53310; 1 drivers +v0xa309e0_0 .net "INST", 3 0, L_0xa52b50; 1 drivers +v0xa30ac0_0 .net "LABEL", 3 0, L_0xa534c0; 1 drivers +v0xa30ba0_0 .var "PC", 3 0; +v0xa30c80_0 .var "PCNEXT", 3 0; +v0xa30d60_0 .net "SRC", 2 0, L_0xa53080; 1 drivers +v0xa30ed0_0 .net *"_s103", 0 0, L_0xa51470; 1 drivers +v0xa30fb0_0 .net *"_s107", 0 0, L_0xa51380; 1 drivers +v0xa31090_0 .net *"_s111", 0 0, L_0xa51660; 1 drivers +v0xa31170_0 .net *"_s115", 0 0, L_0xa51560; 1 drivers +v0xa31250_0 .net *"_s119", 0 0, L_0xa518a0; 1 drivers +v0xa31330_0 .net *"_s123", 0 0, L_0xa51790; 1 drivers +v0xa31410_0 .net *"_s127", 0 0, L_0xa51a60; 1 drivers +v0xa314f0_0 .net *"_s131", 0 0, L_0xa51940; 1 drivers +v0xa316a0_0 .net *"_s135", 0 0, L_0xa51cc0; 1 drivers +v0xa31740_0 .net *"_s139", 0 0, L_0xa51b90; 1 drivers +v0xa31820_0 .net *"_s143", 0 0, L_0xa51ea0; 1 drivers +v0xa31900_0 .net *"_s147", 0 0, L_0xa51d60; 1 drivers +v0xa319e0_0 .net *"_s151", 0 0, L_0xa52090; 1 drivers +v0xa31ac0_0 .net *"_s155", 0 0, L_0xa51f40; 1 drivers +v0xa31ba0_0 .net *"_s159", 0 0, L_0xa51fe0; 1 drivers +v0xa31c80_0 .net *"_s160", 17 0, L_0xa52130; 1 drivers +v0xa31d60_0 .net *"_s162", 5 0, L_0xa52490; 1 drivers +L_0x2b1dfaa330f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xa31e40_0 .net *"_s165", 1 0, L_0x2b1dfaa330f0; 1 drivers +v0xa33d70_2 .array/port v0xa33d70, 2; +v0xa31f20_0 .net *"_s173", 10 0, v0xa33d70_2; 1 drivers +v0xa33d70_3 .array/port v0xa33d70, 3; +v0xa32000_0 .net *"_s179", 10 0, v0xa33d70_3; 1 drivers +v0xa33d70_0 .array/port v0xa33d70, 0; +v0xa320e0_0 .net *"_s185", 10 0, v0xa33d70_0; 1 drivers +v0xa33d70_1 .array/port v0xa33d70, 1; +v0xa321c0_0 .net *"_s191", 10 0, v0xa33d70_1; 1 drivers +v0xa322a0_0 .net *"_s23", 0 0, L_0xa4f870; 1 drivers +v0xa32380_0 .net *"_s27", 0 0, L_0xa4f9d0; 1 drivers +v0xa315d0_0 .net *"_s31", 0 0, L_0xa4faa0; 1 drivers +v0xa32650_0 .net *"_s36", 0 0, L_0xa4fd70; 1 drivers +v0xa32730_0 .net *"_s42", 0 0, L_0xa50000; 1 drivers +v0xa32810_0 .net *"_s46", 0 0, L_0xa500a0; 1 drivers +v0xa328f0_0 .net *"_s50", 0 0, L_0xa501b0; 1 drivers +v0xa329d0_0 .net *"_s55", 0 0, L_0xa50440; 1 drivers +v0xa32ab0_0 .net *"_s61", 0 0, L_0xa506b0; 1 drivers +v0xa32b90_0 .net *"_s65", 0 0, L_0xa50750; 1 drivers +v0xa32c70_0 .net *"_s69", 0 0, L_0xa50920; 1 drivers +v0xa32d50_0 .net *"_s74", 0 0, L_0xa50880; 1 drivers +v0xa32e30_0 .net *"_s80", 0 0, L_0xa50b10; 1 drivers +v0xa32f10_0 .net *"_s84", 0 0, L_0xa50e00; 1 drivers +v0xa32ff0_0 .net *"_s88", 0 0, L_0xa50d40; 1 drivers +v0xa330d0_0 .net *"_s93", 0 0, L_0xa50ea0; 1 drivers +v0xa331b0_0 .net *"_s99", 0 0, L_0xa51160; 1 drivers +v0xa33290_0 .net/s "accOut", 10 0, L_0xa4eff0; alias, 1 drivers +v0xa33370_0 .net "anyHasData", 0 0, L_0xa4feb0; 1 drivers +v0xa33430_0 .net "anyReadAck", 0 0, L_0xa50ca0; 1 drivers +v0xa334f0_0 .net "anyWantData", 0 0, L_0xa50530; 1 drivers +v0xa335b0_0 .net "anyWriteAck", 0 0, L_0xa51290; 1 drivers +v0xa33670_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers +o0x2b1dfaa06128 .functor BUFZ 15, C4; HiZ drive +v0xa33710_0 .net "down", 14 0, o0x2b1dfaa06128; 0 drivers +v0xa337f0_0 .net "downOut", 14 0, L_0xa528b0; 1 drivers +v0xa338d0_0 .net "instruction", 17 0, L_0xa50140; 1 drivers +v0xa339b0 .array "instructions", 15 0, 17 0; +v0xa33a70_0 .var "last", 2 0; +v0xa33b50_0 .net "left", 14 0, L_0xa5f390; alias, 1 drivers +v0xa33c10_0 .net "leftOut", 14 0, L_0xa525f0; alias, 1 drivers +v0xa33cb0_0 .var "mode", 2 0; +v0xa33d70 .array/s "outVals", 2 5, 10 0; +v0xa33ee0_0 .var "phase", 2 0; +v0xa33fc0_0 .net "portsHaveData", 5 2, L_0xa4fb90; 1 drivers +v0xa32420_0 .net "portsWantData", 5 2, L_0xa50250; 1 drivers +v0xa32500_0 .net "readAckIn", 5 2, L_0xa509c0; 1 drivers +v0xa34470_0 .var "readAckOut", 5 2; +v0xa34510_0 .var "readTarget", 2 0; +v0xa345b0_0 .var/s "readValue", 10 0; +L_0x2b1dfaa330a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xa34650 .array "regVals", 0 7; +v0xa34650_0 .net/s v0xa34650 0, 10 0, L_0x2b1dfaa330a8; 1 drivers +v0xa34650_1 .net/s v0xa34650 1, 10 0, L_0xa4f1f0; 1 drivers +v0xa34650_2 .net/s v0xa34650 2, 10 0, L_0xa4f560; 1 drivers +v0xa34650_3 .net/s v0xa34650 3, 10 0, L_0xa4f600; 1 drivers +v0xa34650_4 .net/s v0xa34650 4, 10 0, L_0xa4f6a0; 1 drivers +v0xa34650_5 .net/s v0xa34650 5, 10 0, L_0xa4f740; 1 drivers +o0x2b1dfaa06548 .functor BUFZ 11, C4; HiZ drive +v0xa34650_6 .net/s v0xa34650 6, 10 0, o0x2b1dfaa06548; 0 drivers +o0x2b1dfaa06578 .functor BUFZ 11, C4; HiZ drive +v0xa34650_7 .net/s v0xa34650 7, 10 0, o0x2b1dfaa06578; 0 drivers +o0x2b1dfaa065a8 .functor BUFZ 15, C4; HiZ drive +v0xa34860_0 .net "right", 14 0, o0x2b1dfaa065a8; 0 drivers +v0xa34940_0 .net "rightOut", 14 0, L_0xa52e60; 1 drivers +o0x2b1dfaa06608 .functor BUFZ 15, C4; HiZ drive +v0xa34a20_0 .net "up", 14 0, o0x2b1dfaa06608; 0 drivers +v0xa34b00_0 .net "upOut", 14 0, L_0xa523a0; 1 drivers +v0xa34be0_0 .var "weHaveData", 5 2; +v0xa34cc0_0 .var "weWantData", 5 2; +v0xa34da0_0 .net "writeAckIn", 5 2, L_0xa50f70; 1 drivers +v0xa34e80_0 .var "writeAckOut", 5 2; +v0xa34f60_0 .var "writeTarget", 2 0; +v0xa35040_0 .var/s "writeValue", 10 0; +L_0xa4f560 .part L_0xa5f390, 0, 11; +L_0xa4f600 .part o0x2b1dfaa065a8, 0, 11; +L_0xa4f6a0 .part o0x2b1dfaa06608, 0, 11; +L_0xa4f740 .part o0x2b1dfaa06128, 0, 11; +L_0xa4f870 .part L_0xa5f390, 11, 1; +L_0xa4f9d0 .part o0x2b1dfaa065a8, 11, 1; +L_0xa4faa0 .part o0x2b1dfaa06608, 11, 1; +L_0xa4fb90 .concat8 [ 1 1 1 1], L_0xa4f870, L_0xa4f9d0, L_0xa4faa0, L_0xa4fd70; +L_0xa4fd70 .part o0x2b1dfaa06128, 11, 1; +L_0xa4feb0 .reduce/or L_0xa4fb90; +L_0xa50000 .part L_0xa5f390, 12, 1; +L_0xa500a0 .part o0x2b1dfaa065a8, 12, 1; +L_0xa501b0 .part o0x2b1dfaa06608, 12, 1; +L_0xa50250 .concat8 [ 1 1 1 1], L_0xa50000, L_0xa500a0, L_0xa501b0, L_0xa50440; +L_0xa50440 .part o0x2b1dfaa06128, 12, 1; +L_0xa50530 .reduce/or L_0xa50250; +L_0xa506b0 .part L_0xa5f390, 13, 1; +L_0xa50750 .part o0x2b1dfaa065a8, 13, 1; +L_0xa50920 .part o0x2b1dfaa06608, 13, 1; +L_0xa509c0 .concat8 [ 1 1 1 1], L_0xa506b0, L_0xa50750, L_0xa50920, L_0xa50880; +L_0xa50880 .part o0x2b1dfaa06128, 13, 1; +L_0xa50ca0 .reduce/or L_0xa509c0; +L_0xa50b10 .part L_0xa5f390, 14, 1; +L_0xa50e00 .part o0x2b1dfaa065a8, 14, 1; +L_0xa50d40 .part o0x2b1dfaa06608, 14, 1; +L_0xa50f70 .concat8 [ 1 1 1 1], L_0xa50b10, L_0xa50e00, L_0xa50d40, L_0xa50ea0; +L_0xa50ea0 .part o0x2b1dfaa06128, 14, 1; +L_0xa51290 .reduce/or L_0xa50f70; +L_0xa51160 .part v0xa34470_0, 0, 1; +L_0xa51470 .part v0xa34470_0, 1, 1; +L_0xa51380 .part v0xa34470_0, 2, 1; +L_0xa51660 .part v0xa34470_0, 3, 1; +L_0xa51560 .part v0xa34e80_0, 0, 1; +L_0xa518a0 .part v0xa34e80_0, 1, 1; +L_0xa51790 .part v0xa34e80_0, 2, 1; +L_0xa51a60 .part v0xa34e80_0, 3, 1; +L_0xa51940 .part v0xa34cc0_0, 0, 1; +L_0xa51cc0 .part v0xa34cc0_0, 1, 1; +L_0xa51b90 .part v0xa34cc0_0, 2, 1; +L_0xa51ea0 .part v0xa34cc0_0, 3, 1; +L_0xa51d60 .part v0xa34be0_0, 0, 1; +L_0xa52090 .part v0xa34be0_0, 1, 1; +L_0xa51f40 .part v0xa34be0_0, 2, 1; +L_0xa51fe0 .part v0xa34be0_0, 3, 1; +L_0xa52130 .array/port v0xa339b0, L_0xa52490; +L_0xa52490 .concat [ 4 2 0 0], v0xa30ba0_0, L_0x2b1dfaa330f0; +LS_0xa523a0_0_0 .concat8 [ 11 1 1 1], v0xa33d70_2, L_0xa51f40, L_0xa51b90, L_0xa51790; +LS_0xa523a0_0_4 .concat8 [ 1 0 0 0], L_0xa51380; +L_0xa523a0 .concat8 [ 14 1 0 0], LS_0xa523a0_0_0, LS_0xa523a0_0_4; +LS_0xa528b0_0_0 .concat8 [ 11 1 1 1], v0xa33d70_3, L_0xa51fe0, L_0xa51ea0, L_0xa51a60; +LS_0xa528b0_0_4 .concat8 [ 1 0 0 0], L_0xa51660; +L_0xa528b0 .concat8 [ 14 1 0 0], LS_0xa528b0_0_0, LS_0xa528b0_0_4; +LS_0xa525f0_0_0 .concat8 [ 11 1 1 1], v0xa33d70_0, L_0xa51d60, L_0xa51940, L_0xa51560; +LS_0xa525f0_0_4 .concat8 [ 1 0 0 0], L_0xa51160; +L_0xa525f0 .concat8 [ 14 1 0 0], LS_0xa525f0_0_0, LS_0xa525f0_0_4; +LS_0xa52e60_0_0 .concat8 [ 11 1 1 1], v0xa33d70_1, L_0xa52090, L_0xa51cc0, L_0xa518a0; +LS_0xa52e60_0_4 .concat8 [ 1 0 0 0], L_0xa51470; +L_0xa52e60 .concat8 [ 14 1 0 0], LS_0xa52e60_0_0, LS_0xa52e60_0_4; +L_0xa52b50 .part L_0xa50140, 14, 4; +L_0xa53270 .part L_0xa50140, 11, 3; +L_0xa53080 .part L_0xa50140, 8, 3; +L_0xa534c0 .part L_0xa50140, 10, 4; +L_0xa53310 .part L_0xa50140, 0, 11; +S_0xa352c0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x96baa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0xa354e0 .param/str "memFile" 0 3 60, "jumpTest/up.dat"; +L_0xa531b0 .functor BUFZ 11, v0xa35710_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa53400 .functor BUFZ 11, v0xa35710_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xa54240 .functor BUFZ 18, L_0xa561e0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xa35710_0 .var/s "ACC", 10 0; +v0xa35810_0 .var/s "BAK", 10 0; +v0xa358f0_0 .net "DST", 2 0, L_0xa57320; 1 drivers +v0xa359b0_0 .net/s "IMM", 10 0, L_0xa573c0; 1 drivers +v0xa35a90_0 .net "INST", 3 0, L_0xa56c00; 1 drivers +v0xa35bc0_0 .net "LABEL", 3 0, L_0xa57570; 1 drivers +v0xa35ca0_0 .var "PC", 3 0; +v0xa35d80_0 .var "PCNEXT", 3 0; +v0xa35e60_0 .net "SRC", 2 0, L_0xa57130; 1 drivers +v0xa35fd0_0 .net *"_s103", 0 0, L_0xa55520; 1 drivers +v0xa360b0_0 .net *"_s107", 0 0, L_0xa55430; 1 drivers +v0xa36190_0 .net *"_s111", 0 0, L_0xa55710; 1 drivers +v0xa36270_0 .net *"_s115", 0 0, L_0xa55610; 1 drivers +v0xa36350_0 .net *"_s119", 0 0, L_0xa55950; 1 drivers +v0xa36430_0 .net *"_s123", 0 0, L_0xa55840; 1 drivers +v0xa36510_0 .net *"_s127", 0 0, L_0xa55b10; 1 drivers +v0xa365f0_0 .net *"_s131", 0 0, L_0xa559f0; 1 drivers +v0xa367a0_0 .net *"_s135", 0 0, L_0xa55d70; 1 drivers +v0xa36840_0 .net *"_s139", 0 0, L_0xa55c40; 1 drivers +v0xa36920_0 .net *"_s143", 0 0, L_0xa55f50; 1 drivers +v0xa36a00_0 .net *"_s147", 0 0, L_0xa55e10; 1 drivers +v0xa36ae0_0 .net *"_s151", 0 0, L_0xa56140; 1 drivers +v0xa36bc0_0 .net *"_s155", 0 0, L_0xa55ff0; 1 drivers +v0xa36ca0_0 .net *"_s159", 0 0, L_0xa56090; 1 drivers +v0xa36d80_0 .net *"_s160", 17 0, L_0xa561e0; 1 drivers +v0xa36e60_0 .net *"_s162", 5 0, L_0xa56540; 1 drivers +L_0x2b1dfaa33180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xa36f40_0 .net *"_s165", 1 0, L_0x2b1dfaa33180; 1 drivers +v0xa38f00_2 .array/port v0xa38f00, 2; +v0xa37020_0 .net *"_s173", 10 0, v0xa38f00_2; 1 drivers +v0xa38f00_3 .array/port v0xa38f00, 3; +v0xa37100_0 .net *"_s179", 10 0, v0xa38f00_3; 1 drivers +v0xa38f00_0 .array/port v0xa38f00, 0; +v0xa371e0_0 .net *"_s185", 10 0, v0xa38f00_0; 1 drivers +v0xa38f00_1 .array/port v0xa38f00, 1; +v0xa372c0_0 .net *"_s191", 10 0, v0xa38f00_1; 1 drivers +v0xa373a0_0 .net *"_s23", 0 0, L_0xa53a00; 1 drivers +v0xa37480_0 .net *"_s27", 0 0, L_0xa53b20; 1 drivers +v0xa366d0_0 .net *"_s31", 0 0, L_0xa53c10; 1 drivers +v0xa37750_0 .net *"_s36", 0 0, L_0xa53ee0; 1 drivers +v0xa37830_0 .net *"_s42", 0 0, L_0xa54100; 1 drivers +v0xa37910_0 .net *"_s46", 0 0, L_0xa541a0; 1 drivers +v0xa379f0_0 .net *"_s50", 0 0, L_0xa542b0; 1 drivers +v0xa37ad0_0 .net *"_s55", 0 0, L_0xa544f0; 1 drivers +v0xa37bb0_0 .net *"_s61", 0 0, L_0xa54760; 1 drivers +v0xa37c90_0 .net *"_s65", 0 0, L_0xa54890; 1 drivers +v0xa37d70_0 .net *"_s69", 0 0, L_0xa54a60; 1 drivers +v0xa37e50_0 .net *"_s74", 0 0, L_0xa549c0; 1 drivers +v0xa37f30_0 .net *"_s80", 0 0, L_0xa54c00; 1 drivers +v0xa38010_0 .net *"_s84", 0 0, L_0xa54eb0; 1 drivers +v0xa380f0_0 .net *"_s88", 0 0, L_0xa54df0; 1 drivers +v0xa381d0_0 .net *"_s93", 0 0, L_0xa54f50; 1 drivers +v0xa382b0_0 .net *"_s99", 0 0, L_0xa55210; 1 drivers +v0xa38390_0 .net/s "accOut", 10 0, L_0xa531b0; alias, 1 drivers +v0xa38470_0 .net "anyHasData", 0 0, L_0xa54060; 1 drivers +v0xa38530_0 .net "anyReadAck", 0 0, L_0xa54d00; 1 drivers +v0xa385f0_0 .net "anyWantData", 0 0, L_0xa545e0; 1 drivers +v0xa386b0_0 .net "anyWriteAck", 0 0, L_0xa55340; 1 drivers +v0xa38770_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers +v0xa388a0_0 .net "down", 14 0, L_0xa5e6f0; alias, 1 drivers +v0xa38960_0 .net "downOut", 14 0, L_0xa56960; alias, 1 drivers +v0xa38a00_0 .net "instruction", 17 0, L_0xa54240; 1 drivers +v0xa38ac0 .array "instructions", 15 0, 17 0; +v0xa38b80_0 .var "last", 2 0; +o0x2b1dfaa073b8 .functor BUFZ 15, C4; HiZ drive +v0xa38c60_0 .net "left", 14 0, o0x2b1dfaa073b8; 0 drivers +v0xa38d40_0 .net "leftOut", 14 0, L_0xa566a0; 1 drivers +v0xa38e20_0 .var "mode", 2 0; +v0xa38f00 .array/s "outVals", 2 5, 10 0; +v0xa39070_0 .var "phase", 2 0; +v0xa39150_0 .net "portsHaveData", 5 2, L_0xa53d00; 1 drivers +v0xa37520_0 .net "portsWantData", 5 2, L_0xa54350; 1 drivers +v0xa37600_0 .net "readAckIn", 5 2, L_0xa54b00; 1 drivers +v0xa39600_0 .var "readAckOut", 5 2; +v0xa396a0_0 .var "readTarget", 2 0; +v0xa39740_0 .var/s "readValue", 10 0; +L_0x2b1dfaa33138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xa397e0 .array "regVals", 0 7; +v0xa397e0_0 .net/s v0xa397e0 0, 10 0, L_0x2b1dfaa33138; 1 drivers +v0xa397e0_1 .net/s v0xa397e0 1, 10 0, L_0xa53400; 1 drivers +v0xa397e0_2 .net/s v0xa397e0 2, 10 0, L_0xa53720; 1 drivers +v0xa397e0_3 .net/s v0xa397e0 3, 10 0, L_0xa537c0; 1 drivers +v0xa397e0_4 .net/s v0xa397e0 4, 10 0, L_0xa53860; 1 drivers +v0xa397e0_5 .net/s v0xa397e0 5, 10 0, L_0xa53900; 1 drivers +o0x2b1dfaa07778 .functor BUFZ 11, C4; HiZ drive +v0xa397e0_6 .net/s v0xa397e0 6, 10 0, o0x2b1dfaa07778; 0 drivers +o0x2b1dfaa077a8 .functor BUFZ 11, C4; HiZ drive +v0xa397e0_7 .net/s v0xa397e0 7, 10 0, o0x2b1dfaa077a8; 0 drivers +o0x2b1dfaa077d8 .functor BUFZ 15, C4; HiZ drive +v0xa399f0_0 .net "right", 14 0, o0x2b1dfaa077d8; 0 drivers +v0xa39ad0_0 .net "rightOut", 14 0, L_0xa56f10; 1 drivers +o0x2b1dfaa07838 .functor BUFZ 15, C4; HiZ drive +v0xa39bb0_0 .net "up", 14 0, o0x2b1dfaa07838; 0 drivers +v0xa39c90_0 .net "upOut", 14 0, L_0xa56450; 1 drivers +v0xa39d70_0 .var "weHaveData", 5 2; +v0xa39e50_0 .var "weWantData", 5 2; +v0xa39f30_0 .net "writeAckIn", 5 2, L_0xa55020; 1 drivers +v0xa3a010_0 .var "writeAckOut", 5 2; +v0xa3a0f0_0 .var "writeTarget", 2 0; +v0xa3a1d0_0 .var/s "writeValue", 10 0; +L_0xa53720 .part o0x2b1dfaa073b8, 0, 11; +L_0xa537c0 .part o0x2b1dfaa077d8, 0, 11; +L_0xa53860 .part o0x2b1dfaa07838, 0, 11; +L_0xa53900 .part L_0xa5e6f0, 0, 11; +L_0xa53a00 .part o0x2b1dfaa073b8, 11, 1; +L_0xa53b20 .part o0x2b1dfaa077d8, 11, 1; +L_0xa53c10 .part o0x2b1dfaa07838, 11, 1; +L_0xa53d00 .concat8 [ 1 1 1 1], L_0xa53a00, L_0xa53b20, L_0xa53c10, L_0xa53ee0; +L_0xa53ee0 .part L_0xa5e6f0, 11, 1; +L_0xa54060 .reduce/or L_0xa53d00; +L_0xa54100 .part o0x2b1dfaa073b8, 12, 1; +L_0xa541a0 .part o0x2b1dfaa077d8, 12, 1; +L_0xa542b0 .part o0x2b1dfaa07838, 12, 1; +L_0xa54350 .concat8 [ 1 1 1 1], L_0xa54100, L_0xa541a0, L_0xa542b0, L_0xa544f0; +L_0xa544f0 .part L_0xa5e6f0, 12, 1; +L_0xa545e0 .reduce/or L_0xa54350; +L_0xa54760 .part o0x2b1dfaa073b8, 13, 1; +L_0xa54890 .part o0x2b1dfaa077d8, 13, 1; +L_0xa54a60 .part o0x2b1dfaa07838, 13, 1; +L_0xa54b00 .concat8 [ 1 1 1 1], L_0xa54760, L_0xa54890, L_0xa54a60, L_0xa549c0; +L_0xa549c0 .part L_0xa5e6f0, 13, 1; +L_0xa54d00 .reduce/or L_0xa54b00; +L_0xa54c00 .part o0x2b1dfaa073b8, 14, 1; +L_0xa54eb0 .part o0x2b1dfaa077d8, 14, 1; +L_0xa54df0 .part o0x2b1dfaa07838, 14, 1; +L_0xa55020 .concat8 [ 1 1 1 1], L_0xa54c00, L_0xa54eb0, L_0xa54df0, L_0xa54f50; +L_0xa54f50 .part L_0xa5e6f0, 14, 1; +L_0xa55340 .reduce/or L_0xa55020; +L_0xa55210 .part v0xa39600_0, 0, 1; +L_0xa55520 .part v0xa39600_0, 1, 1; +L_0xa55430 .part v0xa39600_0, 2, 1; +L_0xa55710 .part v0xa39600_0, 3, 1; +L_0xa55610 .part v0xa3a010_0, 0, 1; +L_0xa55950 .part v0xa3a010_0, 1, 1; +L_0xa55840 .part v0xa3a010_0, 2, 1; +L_0xa55b10 .part v0xa3a010_0, 3, 1; +L_0xa559f0 .part v0xa39e50_0, 0, 1; +L_0xa55d70 .part v0xa39e50_0, 1, 1; +L_0xa55c40 .part v0xa39e50_0, 2, 1; +L_0xa55f50 .part v0xa39e50_0, 3, 1; +L_0xa55e10 .part v0xa39d70_0, 0, 1; +L_0xa56140 .part v0xa39d70_0, 1, 1; +L_0xa55ff0 .part v0xa39d70_0, 2, 1; +L_0xa56090 .part v0xa39d70_0, 3, 1; +L_0xa561e0 .array/port v0xa38ac0, L_0xa56540; +L_0xa56540 .concat [ 4 2 0 0], v0xa35ca0_0, L_0x2b1dfaa33180; +LS_0xa56450_0_0 .concat8 [ 11 1 1 1], v0xa38f00_2, L_0xa55ff0, L_0xa55c40, L_0xa55840; +LS_0xa56450_0_4 .concat8 [ 1 0 0 0], L_0xa55430; +L_0xa56450 .concat8 [ 14 1 0 0], LS_0xa56450_0_0, LS_0xa56450_0_4; +LS_0xa56960_0_0 .concat8 [ 11 1 1 1], v0xa38f00_3, L_0xa56090, L_0xa55f50, L_0xa55b10; +LS_0xa56960_0_4 .concat8 [ 1 0 0 0], L_0xa55710; +L_0xa56960 .concat8 [ 14 1 0 0], LS_0xa56960_0_0, LS_0xa56960_0_4; +LS_0xa566a0_0_0 .concat8 [ 11 1 1 1], v0xa38f00_0, L_0xa55e10, L_0xa559f0, L_0xa55610; +LS_0xa566a0_0_4 .concat8 [ 1 0 0 0], L_0xa55210; +L_0xa566a0 .concat8 [ 14 1 0 0], LS_0xa566a0_0_0, LS_0xa566a0_0_4; +LS_0xa56f10_0_0 .concat8 [ 11 1 1 1], v0xa38f00_1, L_0xa56140, L_0xa55d70, L_0xa55950; +LS_0xa56f10_0_4 .concat8 [ 1 0 0 0], L_0xa55520; +L_0xa56f10 .concat8 [ 14 1 0 0], LS_0xa56f10_0_0, LS_0xa56f10_0_4; +L_0xa56c00 .part L_0xa54240, 14, 4; +L_0xa57320 .part L_0xa54240, 11, 3; +L_0xa57130 .part L_0xa54240, 8, 3; +L_0xa57570 .part L_0xa54240, 10, 4; +L_0xa573c0 .part L_0xa54240, 0, 11; + .scope S_0xa2b050; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa2eb00_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa2ed20_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa2e860_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa2b520_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa2b620_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2ba60_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2f2b0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2fba0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2fd60_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2fac0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa2ebe0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa2ebe0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa2ebe0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa2ebe0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0xa2b250, v0xa2e7a0 {0 0 0}; + %end; + .thread T_0; + .scope S_0xa2b050; +T_1 ; + %wait E_0x99f0f0; + %load/vec4 v0xa2eb00_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.2, 6; + %jmp T_1.3; +T_1.0 ; + %load/vec4 v0xa2ed20_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.6, 6; + %jmp T_1.7; +T_1.4 ; + %load/vec4 v0xa2b8a0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_1.8, 5; + %load/vec4 v0xa2bc20_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_1.10, 5; + %load/vec4 v0xa2bc20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %jmp T_1.11; +T_1.10 ; + %load/vec4 v0xa2bc20_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_1.12, 5; + %load/vec4 v0xa2ee00_0; + %load/vec4 v0xa2bc20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.14, 8; + %load/vec4 v0xa2bc20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2bc20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %load/vec4 v0xa2bc20_0; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.15; +T_1.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %load/vec4 v0xa2bc20_0; + %assign/vec4 v0xa2f390_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2bc20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %load/vec4 v0xa2bc20_0; + %assign/vec4 v0xa2e860_0, 0; +T_1.15 ; + %jmp T_1.13; +T_1.12 ; + %load/vec4 v0xa2bc20_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.16, 4; + %load/vec4 v0xa2e860_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_1.18, 4; + %load/vec4 v0xa2e860_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %jmp T_1.19; +T_1.18 ; + %load/vec4 v0xa2ee00_0; + %load/vec4 v0xa2e860_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.20, 8; + %load/vec4 v0xa2e860_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2e860_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %jmp T_1.21; +T_1.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %load/vec4 v0xa2e860_0; + %assign/vec4 v0xa2f390_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2e860_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; +T_1.21 ; +T_1.19 ; + %jmp T_1.17; +T_1.16 ; + %load/vec4 v0xa2bc20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.22, 4; + %load/vec4 v0xa2e110_0; + %flag_set/vec4 8; + %jmp/0xz T_1.24, 8; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.27; +T_1.26 ; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.29; +T_1.28 ; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.31; +T_1.30 ; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2e860_0, 0; +T_1.32 ; +T_1.31 ; +T_1.29 ; +T_1.27 ; + %jmp T_1.25; +T_1.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %load/vec4 v0xa2bc20_0; + %assign/vec4 v0xa2f390_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; +T_1.25 ; +T_1.22 ; +T_1.17 ; +T_1.13 ; +T_1.11 ; +T_1.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.7; +T_1.5 ; + %load/vec4 v0xa2b8a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_1.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_1.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_1.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_1.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_1.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_1.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_1.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_1.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_1.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_1.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_1.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_1.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_1.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_1.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_1.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_1.49, 6; + %jmp T_1.50; +T_1.34 ; + %load/vec4 v0xa2b520_0; + %load/vec4 v0xa2f470_0; + %add; + %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.35 ; + %load/vec4 v0xa2b520_0; + %load/vec4 v0xa2f470_0; + %sub; + %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.36 ; + %load/vec4 v0xa2ba60_0; + %pad/u 11; + %load/vec4 v0xa2f470_0; + %add; + %pad/u 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.37 ; + %load/vec4 v0xa2f470_0; + %assign/vec4 v0xa2ff20_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.38 ; + %load/vec4 v0xa2b7c0_0; + %assign/vec4 v0xa2ff20_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.39 ; + %load/vec4 v0xa2b520_0; + %load/vec4 v0xa2b7c0_0; + %add; + %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.40 ; + %load/vec4 v0xa2b520_0; + %load/vec4 v0xa2b7c0_0; + %sub; + %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.41 ; + %load/vec4 v0xa2ba60_0; + %pad/u 11; + %load/vec4 v0xa2b7c0_0; + %add; + %pad/u 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.42 ; + %load/vec4 v0xa2b620_0; + %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0xa2b520_0; + %assign/vec4 v0xa2b620_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.43 ; + %load/vec4 v0xa2b520_0; + %assign/vec4 v0xa2b620_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.44 ; + %load/vec4 v0xa2b520_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.45 ; + %load/vec4 v0xa2b980_0; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.50; +T_1.46 ; + %load/vec4 v0xa2b520_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_1.51, 4; + %load/vec4 v0xa2b980_0; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.52; +T_1.51 ; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; +T_1.52 ; + %jmp T_1.50; +T_1.47 ; + %load/vec4 v0xa2b520_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_1.53, 4; + %load/vec4 v0xa2b980_0; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.54; +T_1.53 ; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; +T_1.54 ; + %jmp T_1.50; +T_1.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0xa2b520_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_1.55, 5; + %load/vec4 v0xa2b980_0; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.56; +T_1.55 ; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; +T_1.56 ; + %jmp T_1.50; +T_1.49 ; + %load/vec4 v0xa2b520_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_1.57, 5; + %load/vec4 v0xa2b980_0; + %assign/vec4 v0xa2bb40_0, 0; + %jmp T_1.58; +T_1.57 ; + %load/vec4 v0xa2ba60_0; + %addi 1, 0, 4; + %assign/vec4 v0xa2bb40_0, 0; +T_1.58 ; + %jmp T_1.50; +T_1.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.7; +T_1.6 ; + %load/vec4 v0xa2b8a0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0xa2b8a0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_1.59, 4; + %load/vec4 v0xa2b700_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0xa2b700_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa2e860_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_1.61, 9; + %load/vec4 v0xa2b700_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_1.63, 4; + %load/vec4 v0xa2ff20_0; + %assign/vec4 v0xa2b520_0, 0; +T_1.63 ; + %jmp T_1.62; +T_1.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %load/vec4 v0xa2b700_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.65, 4; + %load/vec4 v0xa2e860_0; + %assign/vec4 v0xa2fe40_0, 0; + %load/vec4 v0xa2ff20_0; + %load/vec4 v0xa2e860_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2e860_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %jmp T_1.66; +T_1.65 ; + %load/vec4 v0xa2b700_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.67, 4; + %load/vec4 v0xa2b700_0; + %assign/vec4 v0xa2fe40_0, 0; + %load/vec4 v0xa2ff20_0; + %load/vec4 v0xa2b700_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2b700_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2b700_0; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.68; +T_1.67 ; + %load/vec4 v0xa2e290_0; + %flag_set/vec4 8; + %jmp/0xz T_1.69, 8; + %load/vec4 v0xa2d200_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.72; +T_1.71 ; + %load/vec4 v0xa2d200_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.74; +T_1.73 ; + %load/vec4 v0xa2d200_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.76; +T_1.75 ; + %load/vec4 v0xa2d200_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2e860_0, 0; +T_1.77 ; +T_1.76 ; +T_1.74 ; +T_1.72 ; + %jmp T_1.70; +T_1.69 ; + %load/vec4 v0xa2b700_0; + %assign/vec4 v0xa2fe40_0, 0; +T_1.70 ; +T_1.68 ; +T_1.66 ; +T_1.62 ; +T_1.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.7; +T_1.7 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.1 ; + %load/vec4 v0xa2ed20_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.81, 6; + %jmp T_1.82; +T_1.79 ; + %load/vec4 v0xa2f390_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.83, 4; + %load/vec4 v0xa2e110_0; + %flag_set/vec4 8; + %jmp/0xz T_1.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2fba0_0, 0, 4; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.88; +T_1.87 ; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.90; +T_1.89 ; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.92; +T_1.91 ; + %load/vec4 v0xa2ee00_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2e860_0, 0; +T_1.93 ; +T_1.92 ; +T_1.90 ; +T_1.88 ; +T_1.85 ; + %jmp T_1.84; +T_1.83 ; + %load/vec4 v0xa2ee00_0; + %load/vec4 v0xa2f390_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %load/vec4 v0xa2f390_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2f550, 4; + %assign/vec4 v0xa2f470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2f390_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2f390_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %load/vec4 v0xa2f390_0; + %assign/vec4 v0xa2e860_0, 0; +T_1.95 ; +T_1.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.82; +T_1.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.82; +T_1.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.82; +T_1.82 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.2 ; + %load/vec4 v0xa2ed20_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.99, 6; + %jmp T_1.100; +T_1.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.100; +T_1.98 ; + %load/vec4 v0xa2fe40_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.101, 4; + %load/vec4 v0xa2e290_0; + %flag_set/vec4 8; + %jmp/0xz T_1.103, 8; + %load/vec4 v0xa2d200_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.106; +T_1.105 ; + %load/vec4 v0xa2d200_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.108; +T_1.107 ; + %load/vec4 v0xa2d200_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2e860_0, 0; + %jmp T_1.110; +T_1.109 ; + %load/vec4 v0xa2d200_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2fe40_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %load/vec4 v0xa2ff20_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa2ebe0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2e860_0, 0; +T_1.111 ; +T_1.110 ; +T_1.108 ; +T_1.106 ; +T_1.103 ; +T_1.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.100; +T_1.99 ; + %load/vec4 v0xa2fe40_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.113, 4; + %load/vec4 v0xa2fc80_0; + %load/vec4 v0xa2fe40_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0xa2fe40_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0xa2fac0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa2eb00_0, 0; + %load/vec4 v0xa2fe40_0; + %assign/vec4 v0xa2e860_0, 0; +T_1.115 ; +T_1.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa2ed20_0, 0; + %jmp T_1.100; +T_1.100 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.3 ; + %pop/vec4 1; + %jmp T_1; + .thread T_1; + .scope S_0xa2b050; +T_2 ; + %wait E_0x97c930; + %load/vec4 v0xa2ed20_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa2eb00_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0xa2bb40_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_2.0, 8; + %load/vec4 v0xa2bb40_0; + %assign/vec4 v0xa2ba60_0, 0; +T_2.0 ; + %load/vec4 v0xa2ed20_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_2.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2f2b0_0, 0, 4; +T_2.2 ; + %jmp T_2; + .thread T_2; + .scope S_0xa301a0; +T_3 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa33cb0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa33ee0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa33a70_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa30660_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa30760_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa30ba0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa34470_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa34cc0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa34e80_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa34be0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa33d70, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa33d70, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa33d70, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa33d70, 4, 0; + %vpi_call 3 185 "$readmemb", P_0xa30370, v0xa339b0 {0 0 0}; + %end; + .thread T_3; + .scope S_0xa301a0; +T_4 ; + %wait E_0x99f0f0; + %load/vec4 v0xa33cb0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0xa33ee0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.6, 6; + %jmp T_4.7; +T_4.4 ; + %load/vec4 v0xa309e0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_4.8, 5; + %load/vec4 v0xa30d60_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_4.10, 5; + %load/vec4 v0xa30d60_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %jmp T_4.11; +T_4.10 ; + %load/vec4 v0xa30d60_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_4.12, 5; + %load/vec4 v0xa33fc0_0; + %load/vec4 v0xa30d60_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.14, 8; + %load/vec4 v0xa30d60_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa30d60_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %load/vec4 v0xa30d60_0; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.15; +T_4.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %load/vec4 v0xa30d60_0; + %assign/vec4 v0xa34510_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa30d60_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %load/vec4 v0xa30d60_0; + %assign/vec4 v0xa33a70_0, 0; +T_4.15 ; + %jmp T_4.13; +T_4.12 ; + %load/vec4 v0xa30d60_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.16, 4; + %load/vec4 v0xa33a70_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_4.18, 4; + %load/vec4 v0xa33a70_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %jmp T_4.19; +T_4.18 ; + %load/vec4 v0xa33fc0_0; + %load/vec4 v0xa33a70_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.20, 8; + %load/vec4 v0xa33a70_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa33a70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %jmp T_4.21; +T_4.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %load/vec4 v0xa33a70_0; + %assign/vec4 v0xa34510_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa33a70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; +T_4.21 ; +T_4.19 ; + %jmp T_4.17; +T_4.16 ; + %load/vec4 v0xa30d60_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.22, 4; + %load/vec4 v0xa33370_0; + %flag_set/vec4 8; + %jmp/0xz T_4.24, 8; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.27; +T_4.26 ; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.29; +T_4.28 ; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.31; +T_4.30 ; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa33a70_0, 0; +T_4.32 ; +T_4.31 ; +T_4.29 ; +T_4.27 ; + %jmp T_4.25; +T_4.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %load/vec4 v0xa30d60_0; + %assign/vec4 v0xa34510_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; +T_4.25 ; +T_4.22 ; +T_4.17 ; +T_4.13 ; +T_4.11 ; +T_4.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.7; +T_4.5 ; + %load/vec4 v0xa309e0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_4.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_4.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_4.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_4.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_4.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_4.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_4.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_4.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_4.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_4.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_4.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_4.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_4.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_4.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_4.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_4.49, 6; + %jmp T_4.50; +T_4.34 ; + %load/vec4 v0xa30660_0; + %load/vec4 v0xa345b0_0; + %add; + %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.35 ; + %load/vec4 v0xa30660_0; + %load/vec4 v0xa345b0_0; + %sub; + %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.36 ; + %load/vec4 v0xa30ba0_0; + %pad/u 11; + %load/vec4 v0xa345b0_0; + %add; + %pad/u 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.37 ; + %load/vec4 v0xa345b0_0; + %assign/vec4 v0xa35040_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.38 ; + %load/vec4 v0xa30900_0; + %assign/vec4 v0xa35040_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.39 ; + %load/vec4 v0xa30660_0; + %load/vec4 v0xa30900_0; + %add; + %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.40 ; + %load/vec4 v0xa30660_0; + %load/vec4 v0xa30900_0; + %sub; + %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.41 ; + %load/vec4 v0xa30ba0_0; + %pad/u 11; + %load/vec4 v0xa30900_0; + %add; + %pad/u 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.42 ; + %load/vec4 v0xa30760_0; + %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0xa30660_0; + %assign/vec4 v0xa30760_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.43 ; + %load/vec4 v0xa30660_0; + %assign/vec4 v0xa30760_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.44 ; + %load/vec4 v0xa30660_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.45 ; + %load/vec4 v0xa30ac0_0; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.50; +T_4.46 ; + %load/vec4 v0xa30660_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_4.51, 4; + %load/vec4 v0xa30ac0_0; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.52; +T_4.51 ; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; +T_4.52 ; + %jmp T_4.50; +T_4.47 ; + %load/vec4 v0xa30660_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_4.53, 4; + %load/vec4 v0xa30ac0_0; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.54; +T_4.53 ; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; +T_4.54 ; + %jmp T_4.50; +T_4.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0xa30660_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_4.55, 5; + %load/vec4 v0xa30ac0_0; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.56; +T_4.55 ; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; +T_4.56 ; + %jmp T_4.50; +T_4.49 ; + %load/vec4 v0xa30660_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_4.57, 5; + %load/vec4 v0xa30ac0_0; + %assign/vec4 v0xa30c80_0, 0; + %jmp T_4.58; +T_4.57 ; + %load/vec4 v0xa30ba0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa30c80_0, 0; +T_4.58 ; + %jmp T_4.50; +T_4.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.7; +T_4.6 ; + %load/vec4 v0xa309e0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0xa309e0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_4.59, 4; + %load/vec4 v0xa30840_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0xa30840_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa33a70_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_4.61, 9; + %load/vec4 v0xa30840_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_4.63, 4; + %load/vec4 v0xa35040_0; + %assign/vec4 v0xa30660_0, 0; +T_4.63 ; + %jmp T_4.62; +T_4.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %load/vec4 v0xa30840_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.65, 4; + %load/vec4 v0xa33a70_0; + %assign/vec4 v0xa34f60_0, 0; + %load/vec4 v0xa35040_0; + %load/vec4 v0xa33a70_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa33a70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %jmp T_4.66; +T_4.65 ; + %load/vec4 v0xa30840_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.67, 4; + %load/vec4 v0xa30840_0; + %assign/vec4 v0xa34f60_0, 0; + %load/vec4 v0xa35040_0; + %load/vec4 v0xa30840_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa30840_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa30840_0; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.68; +T_4.67 ; + %load/vec4 v0xa334f0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.69, 8; + %load/vec4 v0xa32420_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.72; +T_4.71 ; + %load/vec4 v0xa32420_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.74; +T_4.73 ; + %load/vec4 v0xa32420_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.76; +T_4.75 ; + %load/vec4 v0xa32420_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa33a70_0, 0; +T_4.77 ; +T_4.76 ; +T_4.74 ; +T_4.72 ; + %jmp T_4.70; +T_4.69 ; + %load/vec4 v0xa30840_0; + %assign/vec4 v0xa34f60_0, 0; +T_4.70 ; +T_4.68 ; +T_4.66 ; +T_4.62 ; +T_4.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.7; +T_4.7 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.1 ; + %load/vec4 v0xa33ee0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.81, 6; + %jmp T_4.82; +T_4.79 ; + %load/vec4 v0xa34510_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.83, 4; + %load/vec4 v0xa33370_0; + %flag_set/vec4 8; + %jmp/0xz T_4.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa34cc0_0, 0, 4; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.88; +T_4.87 ; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.90; +T_4.89 ; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.92; +T_4.91 ; + %load/vec4 v0xa33fc0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa33a70_0, 0; +T_4.93 ; +T_4.92 ; +T_4.90 ; +T_4.88 ; +T_4.85 ; + %jmp T_4.84; +T_4.83 ; + %load/vec4 v0xa33fc0_0; + %load/vec4 v0xa34510_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %load/vec4 v0xa34510_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa34650, 4; + %assign/vec4 v0xa345b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa34510_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34470_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa34510_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %load/vec4 v0xa34510_0; + %assign/vec4 v0xa33a70_0, 0; +T_4.95 ; +T_4.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.82; +T_4.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.82; +T_4.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.82; +T_4.82 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.2 ; + %load/vec4 v0xa33ee0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.99, 6; + %jmp T_4.100; +T_4.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.100; +T_4.98 ; + %load/vec4 v0xa34f60_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.101, 4; + %load/vec4 v0xa334f0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.103, 8; + %load/vec4 v0xa32420_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.106; +T_4.105 ; + %load/vec4 v0xa32420_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.108; +T_4.107 ; + %load/vec4 v0xa32420_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa33a70_0, 0; + %jmp T_4.110; +T_4.109 ; + %load/vec4 v0xa32420_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa34f60_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa34be0_0, 4, 5; + %load/vec4 v0xa35040_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa33d70, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa33a70_0, 0; +T_4.111 ; +T_4.110 ; +T_4.108 ; +T_4.106 ; +T_4.103 ; +T_4.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.100; +T_4.99 ; + %load/vec4 v0xa34f60_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.113, 4; + %load/vec4 v0xa34da0_0; + %load/vec4 v0xa34f60_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0xa34f60_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0xa34be0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa33cb0_0, 0; + %load/vec4 v0xa34f60_0; + %assign/vec4 v0xa33a70_0, 0; +T_4.115 ; +T_4.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa33ee0_0, 0; + %jmp T_4.100; +T_4.100 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0xa301a0; +T_5 ; + %wait E_0x97c930; + %load/vec4 v0xa33ee0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa33cb0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0xa30c80_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %load/vec4 v0xa30c80_0; + %assign/vec4 v0xa30ba0_0, 0; +T_5.0 ; + %load/vec4 v0xa33ee0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_5.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa34470_0, 0, 4; +T_5.2 ; + %jmp T_5; + .thread T_5; + .scope S_0xa352c0; +T_6 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa38e20_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa39070_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa38b80_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa35710_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa35810_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa35ca0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa39600_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa39e50_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa3a010_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa39d70_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa38f00, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa38f00, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa38f00, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa38f00, 4, 0; + %vpi_call 3 185 "$readmemb", P_0xa354e0, v0xa38ac0 {0 0 0}; + %end; + .thread T_6; + .scope S_0xa352c0; +T_7 ; + %wait E_0x99f0f0; + %load/vec4 v0xa38e20_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.2, 6; + %jmp T_7.3; +T_7.0 ; + %load/vec4 v0xa39070_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.6, 6; + %jmp T_7.7; +T_7.4 ; + %load/vec4 v0xa35a90_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_7.8, 5; + %load/vec4 v0xa35e60_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_7.10, 5; + %load/vec4 v0xa35e60_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %jmp T_7.11; +T_7.10 ; + %load/vec4 v0xa35e60_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_7.12, 5; + %load/vec4 v0xa39150_0; + %load/vec4 v0xa35e60_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.14, 8; + %load/vec4 v0xa35e60_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa35e60_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %load/vec4 v0xa35e60_0; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.15; +T_7.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %load/vec4 v0xa35e60_0; + %assign/vec4 v0xa396a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa35e60_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39e50_0, 4, 5; + %load/vec4 v0xa35e60_0; + %assign/vec4 v0xa38b80_0, 0; +T_7.15 ; + %jmp T_7.13; +T_7.12 ; + %load/vec4 v0xa35e60_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.16, 4; + %load/vec4 v0xa38b80_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_7.18, 4; + %load/vec4 v0xa38b80_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %jmp T_7.19; +T_7.18 ; + %load/vec4 v0xa39150_0; + %load/vec4 v0xa38b80_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.20, 8; + %load/vec4 v0xa38b80_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa38b80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %jmp T_7.21; +T_7.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %load/vec4 v0xa38b80_0; + %assign/vec4 v0xa396a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa38b80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39e50_0, 4, 5; +T_7.21 ; +T_7.19 ; + %jmp T_7.17; +T_7.16 ; + %load/vec4 v0xa35e60_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.22, 4; + %load/vec4 v0xa38470_0; + %flag_set/vec4 8; + %jmp/0xz T_7.24, 8; + %load/vec4 v0xa39150_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.27; +T_7.26 ; + %load/vec4 v0xa39150_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.29; +T_7.28 ; + %load/vec4 v0xa39150_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.31; +T_7.30 ; + %load/vec4 v0xa39150_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa38b80_0, 0; +T_7.32 ; +T_7.31 ; +T_7.29 ; +T_7.27 ; + %jmp T_7.25; +T_7.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %load/vec4 v0xa35e60_0; + %assign/vec4 v0xa396a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39e50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39e50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39e50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39e50_0, 4, 5; +T_7.25 ; +T_7.22 ; +T_7.17 ; +T_7.13 ; +T_7.11 ; +T_7.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.7; +T_7.5 ; + %load/vec4 v0xa35a90_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_7.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_7.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_7.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_7.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_7.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_7.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_7.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_7.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_7.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_7.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_7.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_7.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_7.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_7.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_7.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_7.49, 6; + %jmp T_7.50; +T_7.34 ; + %load/vec4 v0xa35710_0; + %load/vec4 v0xa39740_0; + %add; + %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.35 ; + %load/vec4 v0xa35710_0; + %load/vec4 v0xa39740_0; + %sub; + %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.36 ; + %load/vec4 v0xa35ca0_0; + %pad/u 11; + %load/vec4 v0xa39740_0; + %add; + %pad/u 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.37 ; + %load/vec4 v0xa39740_0; + %assign/vec4 v0xa3a1d0_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.38 ; + %load/vec4 v0xa359b0_0; + %assign/vec4 v0xa3a1d0_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.39 ; + %load/vec4 v0xa35710_0; + %load/vec4 v0xa359b0_0; + %add; + %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.40 ; + %load/vec4 v0xa35710_0; + %load/vec4 v0xa359b0_0; + %sub; + %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.41 ; + %load/vec4 v0xa35ca0_0; + %pad/u 11; + %load/vec4 v0xa359b0_0; + %add; + %pad/u 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.42 ; + %load/vec4 v0xa35810_0; + %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0xa35710_0; + %assign/vec4 v0xa35810_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.43 ; + %load/vec4 v0xa35710_0; + %assign/vec4 v0xa35810_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.44 ; + %load/vec4 v0xa35710_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.45 ; + %load/vec4 v0xa35bc0_0; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.50; +T_7.46 ; + %load/vec4 v0xa35710_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_7.51, 4; + %load/vec4 v0xa35bc0_0; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.52; +T_7.51 ; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; +T_7.52 ; + %jmp T_7.50; +T_7.47 ; + %load/vec4 v0xa35710_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_7.53, 4; + %load/vec4 v0xa35bc0_0; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.54; +T_7.53 ; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; +T_7.54 ; + %jmp T_7.50; +T_7.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0xa35710_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_7.55, 5; + %load/vec4 v0xa35bc0_0; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.56; +T_7.55 ; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; +T_7.56 ; + %jmp T_7.50; +T_7.49 ; + %load/vec4 v0xa35710_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_7.57, 5; + %load/vec4 v0xa35bc0_0; + %assign/vec4 v0xa35d80_0, 0; + %jmp T_7.58; +T_7.57 ; + %load/vec4 v0xa35ca0_0; + %addi 1, 0, 4; + %assign/vec4 v0xa35d80_0, 0; +T_7.58 ; + %jmp T_7.50; +T_7.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.7; +T_7.6 ; + %load/vec4 v0xa35a90_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0xa35a90_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_7.59, 4; + %load/vec4 v0xa358f0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0xa358f0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa38b80_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_7.61, 9; + %load/vec4 v0xa358f0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_7.63, 4; + %load/vec4 v0xa3a1d0_0; + %assign/vec4 v0xa35710_0, 0; +T_7.63 ; + %jmp T_7.62; +T_7.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %load/vec4 v0xa358f0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.65, 4; + %load/vec4 v0xa38b80_0; + %assign/vec4 v0xa3a0f0_0, 0; + %load/vec4 v0xa3a1d0_0; + %load/vec4 v0xa38b80_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa38b80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %jmp T_7.66; +T_7.65 ; + %load/vec4 v0xa358f0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.67, 4; + %load/vec4 v0xa358f0_0; + %assign/vec4 v0xa3a0f0_0, 0; + %load/vec4 v0xa3a1d0_0; + %load/vec4 v0xa358f0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa358f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa358f0_0; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.68; +T_7.67 ; + %load/vec4 v0xa385f0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.69, 8; + %load/vec4 v0xa37520_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.72; +T_7.71 ; + %load/vec4 v0xa37520_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.74; +T_7.73 ; + %load/vec4 v0xa37520_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.76; +T_7.75 ; + %load/vec4 v0xa37520_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa38b80_0, 0; +T_7.77 ; +T_7.76 ; +T_7.74 ; +T_7.72 ; + %jmp T_7.70; +T_7.69 ; + %load/vec4 v0xa358f0_0; + %assign/vec4 v0xa3a0f0_0, 0; +T_7.70 ; +T_7.68 ; +T_7.66 ; +T_7.62 ; +T_7.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.7; +T_7.7 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.1 ; + %load/vec4 v0xa39070_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.81, 6; + %jmp T_7.82; +T_7.79 ; + %load/vec4 v0xa396a0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.83, 4; + %load/vec4 v0xa38470_0; + %flag_set/vec4 8; + %jmp/0xz T_7.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa39e50_0, 0, 4; + %load/vec4 v0xa39150_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.88; +T_7.87 ; + %load/vec4 v0xa39150_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.90; +T_7.89 ; + %load/vec4 v0xa39150_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.92; +T_7.91 ; + %load/vec4 v0xa39150_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa38b80_0, 0; +T_7.93 ; +T_7.92 ; +T_7.90 ; +T_7.88 ; +T_7.85 ; + %jmp T_7.84; +T_7.83 ; + %load/vec4 v0xa39150_0; + %load/vec4 v0xa396a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %load/vec4 v0xa396a0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa397e0, 4; + %assign/vec4 v0xa39740_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa396a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39600_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa396a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa39e50_0, 4, 5; + %load/vec4 v0xa396a0_0; + %assign/vec4 v0xa38b80_0, 0; +T_7.95 ; +T_7.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.82; +T_7.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.82; +T_7.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.82; +T_7.82 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.2 ; + %load/vec4 v0xa39070_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.99, 6; + %jmp T_7.100; +T_7.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.100; +T_7.98 ; + %load/vec4 v0xa3a0f0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.101, 4; + %load/vec4 v0xa385f0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.103, 8; + %load/vec4 v0xa37520_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.106; +T_7.105 ; + %load/vec4 v0xa37520_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.108; +T_7.107 ; + %load/vec4 v0xa37520_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa38b80_0, 0; + %jmp T_7.110; +T_7.109 ; + %load/vec4 v0xa37520_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa3a0f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa39d70_0, 4, 5; + %load/vec4 v0xa3a1d0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa38f00, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa38b80_0, 0; +T_7.111 ; +T_7.110 ; +T_7.108 ; +T_7.106 ; +T_7.103 ; +T_7.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.100; +T_7.99 ; + %load/vec4 v0xa3a0f0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.113, 4; + %load/vec4 v0xa39f30_0; + %load/vec4 v0xa3a0f0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0xa3a0f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0xa39d70_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa38e20_0, 0; + %load/vec4 v0xa3a0f0_0; + %assign/vec4 v0xa38b80_0, 0; +T_7.115 ; +T_7.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa39070_0, 0; + %jmp T_7.100; +T_7.100 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.3 ; + %pop/vec4 1; + %jmp T_7; + .thread T_7; + .scope S_0xa352c0; +T_8 ; + %wait E_0x97c930; + %load/vec4 v0xa39070_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa38e20_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0xa35d80_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_8.0, 8; + %load/vec4 v0xa35d80_0; + %assign/vec4 v0xa35ca0_0, 0; +T_8.0 ; + %load/vec4 v0xa39070_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_8.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa39600_0, 0, 4; +T_8.2 ; + %jmp T_8; + .thread T_8; + .scope S_0xa25f20; +T_9 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa29a70_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa29c90_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa297d0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa263e0_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa264e0_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa26920_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2a220_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2aa50_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2ac10_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2a990_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa29b50, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa29b50, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa29b50, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa29b50, 4, 0; + %vpi_call 3 185 "$readmemb", P_0xa26110, v0xa29710 {0 0 0}; + %end; + .thread T_9; + .scope S_0xa25f20; +T_10 ; + %wait E_0x99f0f0; + %load/vec4 v0xa29a70_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.2, 6; + %jmp T_10.3; +T_10.0 ; + %load/vec4 v0xa29c90_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.6, 6; + %jmp T_10.7; +T_10.4 ; + %load/vec4 v0xa26760_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_10.8, 5; + %load/vec4 v0xa26ae0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_10.10, 5; + %load/vec4 v0xa26ae0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %jmp T_10.11; +T_10.10 ; + %load/vec4 v0xa26ae0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_10.12, 5; + %load/vec4 v0xa29d70_0; + %load/vec4 v0xa26ae0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.14, 8; + %load/vec4 v0xa26ae0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa26ae0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %load/vec4 v0xa26ae0_0; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.15; +T_10.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %load/vec4 v0xa26ae0_0; + %assign/vec4 v0xa2a2c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa26ae0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %load/vec4 v0xa26ae0_0; + %assign/vec4 v0xa297d0_0, 0; +T_10.15 ; + %jmp T_10.13; +T_10.12 ; + %load/vec4 v0xa26ae0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.16, 4; + %load/vec4 v0xa297d0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_10.18, 4; + %load/vec4 v0xa297d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %jmp T_10.19; +T_10.18 ; + %load/vec4 v0xa29d70_0; + %load/vec4 v0xa297d0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.20, 8; + %load/vec4 v0xa297d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa297d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %jmp T_10.21; +T_10.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %load/vec4 v0xa297d0_0; + %assign/vec4 v0xa2a2c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa297d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; +T_10.21 ; +T_10.19 ; + %jmp T_10.17; +T_10.16 ; + %load/vec4 v0xa26ae0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.22, 4; + %load/vec4 v0xa290f0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.24, 8; + %load/vec4 v0xa29d70_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.27; +T_10.26 ; + %load/vec4 v0xa29d70_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.29; +T_10.28 ; + %load/vec4 v0xa29d70_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.31; +T_10.30 ; + %load/vec4 v0xa29d70_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa297d0_0, 0; +T_10.32 ; +T_10.31 ; +T_10.29 ; +T_10.27 ; + %jmp T_10.25; +T_10.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %load/vec4 v0xa26ae0_0; + %assign/vec4 v0xa2a2c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; +T_10.25 ; +T_10.22 ; +T_10.17 ; +T_10.13 ; +T_10.11 ; +T_10.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.7; +T_10.5 ; + %load/vec4 v0xa26760_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_10.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_10.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_10.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_10.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_10.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_10.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_10.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_10.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_10.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_10.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_10.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_10.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_10.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_10.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_10.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_10.49, 6; + %jmp T_10.50; +T_10.34 ; + %load/vec4 v0xa263e0_0; + %load/vec4 v0xa2a360_0; + %add; + %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.35 ; + %load/vec4 v0xa263e0_0; + %load/vec4 v0xa2a360_0; + %sub; + %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.36 ; + %load/vec4 v0xa26920_0; + %pad/u 11; + %load/vec4 v0xa2a360_0; + %add; + %pad/u 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.37 ; + %load/vec4 v0xa2a360_0; + %assign/vec4 v0xa2add0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.38 ; + %load/vec4 v0xa26680_0; + %assign/vec4 v0xa2add0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.39 ; + %load/vec4 v0xa263e0_0; + %load/vec4 v0xa26680_0; + %add; + %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.40 ; + %load/vec4 v0xa263e0_0; + %load/vec4 v0xa26680_0; + %sub; + %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.41 ; + %load/vec4 v0xa26920_0; + %pad/u 11; + %load/vec4 v0xa26680_0; + %add; + %pad/u 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.42 ; + %load/vec4 v0xa264e0_0; + %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0xa263e0_0; + %assign/vec4 v0xa264e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.43 ; + %load/vec4 v0xa263e0_0; + %assign/vec4 v0xa264e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.44 ; + %load/vec4 v0xa263e0_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.45 ; + %load/vec4 v0xa26840_0; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.50; +T_10.46 ; + %load/vec4 v0xa263e0_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_10.51, 4; + %load/vec4 v0xa26840_0; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.52; +T_10.51 ; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; +T_10.52 ; + %jmp T_10.50; +T_10.47 ; + %load/vec4 v0xa263e0_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_10.53, 4; + %load/vec4 v0xa26840_0; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.54; +T_10.53 ; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; +T_10.54 ; + %jmp T_10.50; +T_10.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0xa263e0_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_10.55, 5; + %load/vec4 v0xa26840_0; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.56; +T_10.55 ; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; +T_10.56 ; + %jmp T_10.50; +T_10.49 ; + %load/vec4 v0xa263e0_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_10.57, 5; + %load/vec4 v0xa26840_0; + %assign/vec4 v0xa26a00_0, 0; + %jmp T_10.58; +T_10.57 ; + %load/vec4 v0xa26920_0; + %addi 1, 0, 4; + %assign/vec4 v0xa26a00_0, 0; +T_10.58 ; + %jmp T_10.50; +T_10.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.7; +T_10.6 ; + %load/vec4 v0xa26760_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0xa26760_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_10.59, 4; + %load/vec4 v0xa265c0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0xa265c0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa297d0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_10.61, 9; + %load/vec4 v0xa265c0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_10.63, 4; + %load/vec4 v0xa2add0_0; + %assign/vec4 v0xa263e0_0, 0; +T_10.63 ; + %jmp T_10.62; +T_10.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %load/vec4 v0xa265c0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.65, 4; + %load/vec4 v0xa297d0_0; + %assign/vec4 v0xa2acf0_0, 0; + %load/vec4 v0xa2add0_0; + %load/vec4 v0xa297d0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa297d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %jmp T_10.66; +T_10.65 ; + %load/vec4 v0xa265c0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.67, 4; + %load/vec4 v0xa265c0_0; + %assign/vec4 v0xa2acf0_0, 0; + %load/vec4 v0xa2add0_0; + %load/vec4 v0xa265c0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa265c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa265c0_0; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.68; +T_10.67 ; + %load/vec4 v0xa29270_0; + %flag_set/vec4 8; + %jmp/0xz T_10.69, 8; + %load/vec4 v0xa281a0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.72; +T_10.71 ; + %load/vec4 v0xa281a0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.74; +T_10.73 ; + %load/vec4 v0xa281a0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.76; +T_10.75 ; + %load/vec4 v0xa281a0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa297d0_0, 0; +T_10.77 ; +T_10.76 ; +T_10.74 ; +T_10.72 ; + %jmp T_10.70; +T_10.69 ; + %load/vec4 v0xa265c0_0; + %assign/vec4 v0xa2acf0_0, 0; +T_10.70 ; +T_10.68 ; +T_10.66 ; +T_10.62 ; +T_10.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.7; +T_10.7 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.1 ; + %load/vec4 v0xa29c90_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.81, 6; + %jmp T_10.82; +T_10.79 ; + %load/vec4 v0xa2a2c0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.83, 4; + %load/vec4 v0xa290f0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2aa50_0, 0, 4; + %load/vec4 v0xa29d70_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.88; +T_10.87 ; + %load/vec4 v0xa29d70_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.90; +T_10.89 ; + %load/vec4 v0xa29d70_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.92; +T_10.91 ; + %load/vec4 v0xa29d70_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa297d0_0, 0; +T_10.93 ; +T_10.92 ; +T_10.90 ; +T_10.88 ; +T_10.85 ; + %jmp T_10.84; +T_10.83 ; + %load/vec4 v0xa29d70_0; + %load/vec4 v0xa2a2c0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %load/vec4 v0xa2a2c0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa2a400, 4; + %assign/vec4 v0xa2a360_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2a2c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2a220_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa2a2c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %load/vec4 v0xa2a2c0_0; + %assign/vec4 v0xa297d0_0, 0; +T_10.95 ; +T_10.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.82; +T_10.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.82; +T_10.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.82; +T_10.82 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.2 ; + %load/vec4 v0xa29c90_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.99, 6; + %jmp T_10.100; +T_10.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.100; +T_10.98 ; + %load/vec4 v0xa2acf0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.101, 4; + %load/vec4 v0xa29270_0; + %flag_set/vec4 8; + %jmp/0xz T_10.103, 8; + %load/vec4 v0xa281a0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.106; +T_10.105 ; + %load/vec4 v0xa281a0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.108; +T_10.107 ; + %load/vec4 v0xa281a0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa297d0_0, 0; + %jmp T_10.110; +T_10.109 ; + %load/vec4 v0xa281a0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa2acf0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa2a990_0, 4, 5; + %load/vec4 v0xa2add0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa29b50, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa297d0_0, 0; +T_10.111 ; +T_10.110 ; +T_10.108 ; +T_10.106 ; +T_10.103 ; +T_10.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.100; +T_10.99 ; + %load/vec4 v0xa2acf0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.113, 4; + %load/vec4 v0xa2ab30_0; + %load/vec4 v0xa2acf0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0xa2acf0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0xa2a990_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa29a70_0, 0; + %load/vec4 v0xa2acf0_0; + %assign/vec4 v0xa297d0_0, 0; +T_10.115 ; +T_10.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa29c90_0, 0; + %jmp T_10.100; +T_10.100 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.3 ; + %pop/vec4 1; + %jmp T_10; + .thread T_10; + .scope S_0xa25f20; +T_11 ; + %wait E_0x97c930; + %load/vec4 v0xa29c90_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa29a70_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0xa26a00_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_11.0, 8; + %load/vec4 v0xa26a00_0; + %assign/vec4 v0xa26920_0, 0; +T_11.0 ; + %load/vec4 v0xa29c90_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_11.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa2a220_0, 0, 4; +T_11.2 ; + %jmp T_11; + .thread T_11; + .scope S_0x9bb360; +T_12 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa248a0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa24ac0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0xa24600_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x9e1720_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0xa21250_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa21710_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa25050_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa25920_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa25ae0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa25840_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa24980, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa24980, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa24980, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0xa24980, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x9a4250, v0xa24540 {0 0 0}; + %end; + .thread T_12; + .scope S_0x9bb360; +T_13 ; + %wait E_0x99f0f0; + %load/vec4 v0xa248a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.2, 6; + %jmp T_13.3; +T_13.0 ; + %load/vec4 v0xa24ac0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.6, 6; + %jmp T_13.7; +T_13.4 ; + %load/vec4 v0xa21500_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_13.8, 5; + %load/vec4 v0xa218d0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_13.10, 5; + %load/vec4 v0xa218d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %jmp T_13.11; +T_13.10 ; + %load/vec4 v0xa218d0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_13.12, 5; + %load/vec4 v0xa24ba0_0; + %load/vec4 v0xa218d0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.14, 8; + %load/vec4 v0xa218d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa218d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %load/vec4 v0xa218d0_0; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.15; +T_13.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %load/vec4 v0xa218d0_0; + %assign/vec4 v0xa250f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa218d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25920_0, 4, 5; + %load/vec4 v0xa218d0_0; + %assign/vec4 v0xa24600_0, 0; +T_13.15 ; + %jmp T_13.13; +T_13.12 ; + %load/vec4 v0xa218d0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.16, 4; + %load/vec4 v0xa24600_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_13.18, 4; + %load/vec4 v0xa24600_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %jmp T_13.19; +T_13.18 ; + %load/vec4 v0xa24ba0_0; + %load/vec4 v0xa24600_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.20, 8; + %load/vec4 v0xa24600_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa24600_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %jmp T_13.21; +T_13.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %load/vec4 v0xa24600_0; + %assign/vec4 v0xa250f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa24600_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25920_0, 4, 5; +T_13.21 ; +T_13.19 ; + %jmp T_13.17; +T_13.16 ; + %load/vec4 v0xa218d0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.22, 4; + %load/vec4 v0xa23ee0_0; + %flag_set/vec4 8; + %jmp/0xz T_13.24, 8; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.27; +T_13.26 ; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.29; +T_13.28 ; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.31; +T_13.30 ; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa24600_0, 0; +T_13.32 ; +T_13.31 ; +T_13.29 ; +T_13.27 ; + %jmp T_13.25; +T_13.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %load/vec4 v0xa218d0_0; + %assign/vec4 v0xa250f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25920_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25920_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25920_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25920_0, 4, 5; +T_13.25 ; +T_13.22 ; +T_13.17 ; +T_13.13 ; +T_13.11 ; +T_13.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.7; +T_13.5 ; + %load/vec4 v0xa21500_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_13.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_13.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_13.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_13.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_13.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_13.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_13.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_13.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_13.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_13.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_13.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_13.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_13.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_13.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_13.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_13.49, 6; + %jmp T_13.50; +T_13.34 ; + %load/vec4 v0x9e1720_0; + %load/vec4 v0xa251d0_0; + %add; + %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.35 ; + %load/vec4 v0x9e1720_0; + %load/vec4 v0xa251d0_0; + %sub; + %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.36 ; + %load/vec4 v0xa21710_0; + %pad/u 11; + %load/vec4 v0xa251d0_0; + %add; + %pad/u 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.37 ; + %load/vec4 v0xa251d0_0; + %assign/vec4 v0xa25ca0_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.38 ; + %load/vec4 v0xa21420_0; + %assign/vec4 v0xa25ca0_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.39 ; + %load/vec4 v0x9e1720_0; + %load/vec4 v0xa21420_0; + %add; + %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.40 ; + %load/vec4 v0x9e1720_0; + %load/vec4 v0xa21420_0; + %sub; + %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.41 ; + %load/vec4 v0xa21710_0; + %pad/u 11; + %load/vec4 v0xa21420_0; + %add; + %pad/u 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.42 ; + %load/vec4 v0xa21250_0; + %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0x9e1720_0; + %assign/vec4 v0xa21250_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.43 ; + %load/vec4 v0x9e1720_0; + %assign/vec4 v0xa21250_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.44 ; + %load/vec4 v0x9e1720_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.45 ; + %load/vec4 v0xa21630_0; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.50; +T_13.46 ; + %load/vec4 v0x9e1720_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_13.51, 4; + %load/vec4 v0xa21630_0; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.52; +T_13.51 ; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; +T_13.52 ; + %jmp T_13.50; +T_13.47 ; + %load/vec4 v0x9e1720_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_13.53, 4; + %load/vec4 v0xa21630_0; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.54; +T_13.53 ; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; +T_13.54 ; + %jmp T_13.50; +T_13.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x9e1720_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_13.55, 5; + %load/vec4 v0xa21630_0; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.56; +T_13.55 ; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; +T_13.56 ; + %jmp T_13.50; +T_13.49 ; + %load/vec4 v0x9e1720_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_13.57, 5; + %load/vec4 v0xa21630_0; + %assign/vec4 v0xa217f0_0, 0; + %jmp T_13.58; +T_13.57 ; + %load/vec4 v0xa21710_0; + %addi 1, 0, 4; + %assign/vec4 v0xa217f0_0, 0; +T_13.58 ; + %jmp T_13.50; +T_13.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.7; +T_13.6 ; + %load/vec4 v0xa21500_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0xa21500_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_13.59, 4; + %load/vec4 v0xa21330_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0xa21330_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa24600_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_13.61, 9; + %load/vec4 v0xa21330_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_13.63, 4; + %load/vec4 v0xa25ca0_0; + %assign/vec4 v0x9e1720_0, 0; +T_13.63 ; + %jmp T_13.62; +T_13.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %load/vec4 v0xa21330_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.65, 4; + %load/vec4 v0xa24600_0; + %assign/vec4 v0xa25bc0_0, 0; + %load/vec4 v0xa25ca0_0; + %load/vec4 v0xa24600_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa24600_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %jmp T_13.66; +T_13.65 ; + %load/vec4 v0xa21330_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.67, 4; + %load/vec4 v0xa21330_0; + %assign/vec4 v0xa25bc0_0, 0; + %load/vec4 v0xa25ca0_0; + %load/vec4 v0xa21330_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa21330_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa21330_0; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.68; +T_13.67 ; + %load/vec4 v0xa24060_0; + %flag_set/vec4 8; + %jmp/0xz T_13.69, 8; + %load/vec4 v0xa22f90_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.72; +T_13.71 ; + %load/vec4 v0xa22f90_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.74; +T_13.73 ; + %load/vec4 v0xa22f90_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.76; +T_13.75 ; + %load/vec4 v0xa22f90_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa24600_0, 0; +T_13.77 ; +T_13.76 ; +T_13.74 ; +T_13.72 ; + %jmp T_13.70; +T_13.69 ; + %load/vec4 v0xa21330_0; + %assign/vec4 v0xa25bc0_0, 0; +T_13.70 ; +T_13.68 ; +T_13.66 ; +T_13.62 ; +T_13.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.7; +T_13.7 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.1 ; + %load/vec4 v0xa24ac0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.81, 6; + %jmp T_13.82; +T_13.79 ; + %load/vec4 v0xa250f0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.83, 4; + %load/vec4 v0xa23ee0_0; + %flag_set/vec4 8; + %jmp/0xz T_13.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa25920_0, 0, 4; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.88; +T_13.87 ; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.90; +T_13.89 ; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.92; +T_13.91 ; + %load/vec4 v0xa24ba0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa24600_0, 0; +T_13.93 ; +T_13.92 ; +T_13.90 ; +T_13.88 ; +T_13.85 ; + %jmp T_13.84; +T_13.83 ; + %load/vec4 v0xa24ba0_0; + %load/vec4 v0xa250f0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %load/vec4 v0xa250f0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0xa252b0, 4; + %assign/vec4 v0xa251d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa250f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25050_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0xa250f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0xa25920_0, 4, 5; + %load/vec4 v0xa250f0_0; + %assign/vec4 v0xa24600_0, 0; +T_13.95 ; +T_13.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.82; +T_13.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.82; +T_13.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.82; +T_13.82 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.2 ; + %load/vec4 v0xa24ac0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.99, 6; + %jmp T_13.100; +T_13.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.100; +T_13.98 ; + %load/vec4 v0xa25bc0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.101, 4; + %load/vec4 v0xa24060_0; + %flag_set/vec4 8; + %jmp/0xz T_13.103, 8; + %load/vec4 v0xa22f90_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.106; +T_13.105 ; + %load/vec4 v0xa22f90_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.108; +T_13.107 ; + %load/vec4 v0xa22f90_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0xa24600_0, 0; + %jmp T_13.110; +T_13.109 ; + %load/vec4 v0xa22f90_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa25bc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0xa25840_0, 4, 5; + %load/vec4 v0xa25ca0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0xa24980, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0xa24600_0, 0; +T_13.111 ; +T_13.110 ; +T_13.108 ; +T_13.106 ; +T_13.103 ; +T_13.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.100; +T_13.99 ; + %load/vec4 v0xa25bc0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.113, 4; + %load/vec4 v0xa25a00_0; + %load/vec4 v0xa25bc0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0xa25bc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0xa25840_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa248a0_0, 0; + %load/vec4 v0xa25bc0_0; + %assign/vec4 v0xa24600_0, 0; +T_13.115 ; +T_13.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0xa24ac0_0, 0; + %jmp T_13.100; +T_13.100 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.3 ; + %pop/vec4 1; + %jmp T_13; + .thread T_13; + .scope S_0x9bb360; +T_14 ; + %wait E_0x97c930; + %load/vec4 v0xa24ac0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0xa248a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0xa217f0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_14.0, 8; + %load/vec4 v0xa217f0_0; + %assign/vec4 v0xa21710_0, 0; +T_14.0 ; + %load/vec4 v0xa24ac0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_14.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0xa25050_0, 0, 4; +T_14.2 ; + %jmp T_14; + .thread T_14; + .scope S_0x96baa0; +T_15 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0xa3b230_0, 0, 33; + %pushi/vec4 1, 0, 1; + %store/vec4 v0xa3b190_0, 0, 1; + %pushi/vec4 0, 0, 33; + %store/vec4 v0xa3b230_0, 0, 33; +T_15.0 ; + %load/vec4 v0xa3b230_0; + %cmpi/u 10, 0, 33; + %jmp/0xz T_15.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b0f0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0xa3b0f0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b0f0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0xa3b0f0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b0f0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0xa3b0f0_0, 0, 1; + %delay 1, 0; + %load/vec4 v0xa3b230_0; + %addi 1, 0, 33; + %store/vec4 v0xa3b230_0, 0, 33; + %jmp T_15.0; +T_15.1 ; + %load/vec4 v0xa3b050_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.2, 4; + %vpi_call 2 51 "$display", "Failed on up test of jumpTest, %d", v0xa3b050_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b190_0, 0, 1; +T_15.2 ; + %load/vec4 v0xa3af10_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.4, 4; + %vpi_call 2 55 "$display", "Failed on left test of jumpTest, %d", v0xa3af10_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b190_0, 0, 1; +T_15.4 ; + %load/vec4 v0xa3afb0_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.6, 4; + %vpi_call 2 59 "$display", "Failed on right test of jumpTest, %d", v0xa3afb0_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b190_0, 0, 1; +T_15.6 ; + %load/vec4 v0xa3ae70_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.8, 4; + %vpi_call 2 63 "$display", "Failed on down test of jumpTest, %d", v0xa3ae70_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b190_0, 0, 1; +T_15.8 ; + %load/vec4 v0xa3ad20_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.10, 4; + %vpi_call 2 67 "$display", "Failed on center test of jumpTest, %d", v0xa3ad20_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0xa3b190_0, 0, 1; +T_15.10 ; + %load/vec4 v0xa3b190_0; + %flag_set/vec4 8; + %jmp/0xz T_15.12, 8; + %vpi_call 2 71 "$display", "DUT passed jumpTest" {0 0 0}; +T_15.12 ; + %end; + .thread T_15; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "jumpTest/test.v"; + "./tis100.v"; diff --git a/jumpTest/test.asm b/jumpTest/test.asm new file mode 100644 index 0000000..2916630 --- /dev/null +++ b/jumpTest/test.asm @@ -0,0 +1,31 @@ +:center +MOV 1 ACC +JMP 3 +MOV 40 ACC +JRO 0 + +:up +MOV 0 ACC +JEZ 3 +MOV 40 ACC +ADD 1 +JRO 0 + +:left +MOV 1 ACC +JNZ 3 +MOV 40 ACC +JRO 0 + +:right +MOV 1 ACC +JGZ 3 +MOV 40 ACC +JRO 0 + +:down +MOV -1 ACC +JLZ 3 +MOV 40 ACC +ADD 2 +JRO 0 diff --git a/jumpTest/test.v b/jumpTest/test.v new file mode 100644 index 0000000..8de75b5 --- /dev/null +++ b/jumpTest/test.v @@ -0,0 +1,75 @@ +`include "tis100.v" +module tis100Test(); + +reg clk; +wire signed[10:0] accOutCenter; +wire signed[10:0] accOutUp; +wire signed[10:0] accOutDown; +wire signed[10:0] accOutLeft; +wire signed[10:0] accOutRight; + +reg[32:0] i; + +wire[14:0] L2C; +wire[14:0] C2L; + +wire[14:0] R2C; +wire[14:0] C2R; + +wire[14:0] U2C; +wire[14:0] C2U; + +wire[14:0] D2C; +wire[14:0] C2D; + +reg dutPassed; + +tis100 #("jumpTest/left.dat") left( .clk(clk), .rightOut(L2C), .right(C2L), .accOut(accOutLeft)); +tis100 #("jumpTest/right.dat") right( .clk(clk), .leftOut(R2C), .left(C2R), .accOut(accOutRight)); +tis100 #("jumpTest/up.dat") up( .clk(clk), .downOut(U2C), .down(C2U), .accOut(accOutUp)); +tis100 #("jumpTest/down.dat") down( .clk(clk), .upOut(D2C), .up(C2D), .accOut(accOutDown)); +tis100 #("jumpTest/center.dat") center(.clk(clk), + .upOut(C2U), .up(U2C), + .downOut(C2D), .down(D2C), + .leftOut(C2L), .left(L2C), + .rightOut(C2R), .right(R2C), + .accOut(accOutCenter) + ); + +initial begin + i = 0; + dutPassed = 1; + for( i = 0; i<10; i=i+1) begin + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + end + if(accOutUp != 1) begin + $display("Failed on up test of jumpTest, %d", accOutUp); + dutPassed = 0; + end + if(accOutLeft != 1) begin + $display("Failed on left test of jumpTest, %d", accOutLeft); + dutPassed = 0; + end + if(accOutRight != 1) begin + $display("Failed on right test of jumpTest, %d", accOutRight); + dutPassed = 0; + end + if(accOutDown != 1) begin + $display("Failed on down test of jumpTest, %d", accOutDown); + dutPassed = 0; + end + if(accOutCenter != 1) begin + $display("Failed on center test of jumpTest, %d",accOutCenter); + dutPassed = 0; + end + if(dutPassed) begin + $display("DUT passed jumpTest"); + end +end + +endmodule diff --git a/jumpTest/up.dat b/jumpTest/up.dat new file mode 100644 index 0000000..2917aa5 --- /dev/null +++ b/jumpTest/up.dat @@ -0,0 +1,16 @@ +010000100000000000 +110000110000000000 +010000100000101000 +010100000000000001 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/left.dat b/left.dat new file mode 100644 index 0000000..4350ee8 --- /dev/null +++ b/left.dat @@ -0,0 +1,2 @@ +001100101100000000 +011100000000000000 diff --git a/leftAsm.txt b/leftAsm.txt index a39e32a..ad6f8f0 100644 --- a/leftAsm.txt +++ b/leftAsm.txt @@ -1,2 +1,2 @@ -MOV 4 RIGHT -MOV 1 ACC +MOV RIGHT ACC +JRO 0 diff --git a/port.v b/port.v deleted file mode 100644 index d206a22..0000000 --- a/port.v +++ /dev/null @@ -1,23 +0,0 @@ -module port(input clk, - input[11:0] leftIn, input rightIn[11:0], output leftOut[11:0], output rightOut[11:0], - input leftWrite, output reg rightDataReady, input r2lAckIn, output r2lAckOut, - input rightWrite, output reg leftDataReady, input l2rAckIn, output l2rAckOut); - reg[11:0] buffer; - always @(posedge clk) begin - if(leftWrite) begin - buffer <= leftIn; - rightDataReady <= 1; - end else if(rightWrite) begin - buffer <= rightIn; - leftDataReady <= 1; - end - if(r2lAckIn) begin - leftDataReady <= 0; - end - if(l2rAckIn) begin - leftDataReady <= 0; - end - end - assign r2lAckOut = r2lAckIn; - assign l2rAckOut = l2rAckIn; -endmodule diff --git a/regTest/center.dat b/regTest/center.dat new file mode 100644 index 0000000..405c9d0 --- /dev/null +++ b/regTest/center.dat @@ -0,0 +1,16 @@ +010000100000000011 +000100010000000000 +011000000000000001 +000000000100000000 +000000000100000000 +000000000100000000 +011000000000000111 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/regTest/down.dat b/regTest/down.dat new file mode 100644 index 0000000..2bea4af --- /dev/null +++ b/regTest/down.dat @@ -0,0 +1,16 @@ +011100000000000010 +010100000000101000 +010100000000000001 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/regTest/left.dat b/regTest/left.dat new file mode 100644 index 0000000..f9cc897 --- /dev/null +++ b/regTest/left.dat @@ -0,0 +1,16 @@ +010000111111111111 +101000000000000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/regTest/right.dat b/regTest/right.dat new file mode 100644 index 0000000..892db6c --- /dev/null +++ b/regTest/right.dat @@ -0,0 +1,16 @@ +010000100000000101 +100000000000000000 +010000100000000001 +100100000000000000 +100000000000000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/regTest/test b/regTest/test new file mode 100755 index 0000000..252abf1 --- /dev/null +++ b/regTest/test @@ -0,0 +1,6098 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x10ca9f0 .scope module, "tis100Test" "tis100Test" 2 2; + .timescale 0 0; +v0x1199280_0 .net "C2D", 14 0, L_0x11bdaa0; 1 drivers +v0x11993b0_0 .net "C2L", 14 0, L_0x11bd7c0; 1 drivers +v0x11994c0_0 .net "C2R", 14 0, L_0x11be190; 1 drivers +v0x11995b0_0 .net "C2U", 14 0, L_0x11bd4f0; 1 drivers +v0x11996c0_0 .net "D2C", 14 0, L_0x11b9300; 1 drivers +v0x1199820_0 .net "L2C", 14 0, L_0x11adb00; 1 drivers +v0x1199930_0 .net "R2C", 14 0, L_0x11b1420; 1 drivers +v0x1199a40_0 .net "U2C", 14 0, L_0x11b5790; 1 drivers +v0x1199b50_0 .net/s "accOutCenter", 10 0, L_0x11ba0c0; 1 drivers +v0x1199ca0_0 .net/s "accOutDown", 10 0, L_0x11b6090; 1 drivers +v0x1199d40_0 .net/s "accOutLeft", 10 0, L_0x119a140; 1 drivers +v0x1199de0_0 .net/s "accOutRight", 10 0, L_0x11ade50; 1 drivers +v0x1199e80_0 .net/s "accOutUp", 10 0, L_0x11b1fe0; 1 drivers +v0x1199f20_0 .var "clk", 0 0; +v0x1199fc0_0 .var "dutPassed", 0 0; +v0x119a060_0 .var "i", 32 0; +S_0x111a270 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x10ca9f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x10ca120 .param/str "memFile" 0 3 60, "regTest/center.dat"; +L_0x11ba0c0 .functor BUFZ 11, v0x1140640_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11ba350 .functor BUFZ 11, v0x1140640_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11bb180 .functor BUFZ 18, L_0x11bd300, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1140640_0 .var/s "ACC", 10 0; +v0x1180080_0 .var/s "BAK", 10 0; +v0x1180160_0 .net "DST", 2 0, L_0x11be620; 1 drivers +v0x1180250_0 .net/s "IMM", 10 0, L_0x11be6c0; 1 drivers +v0x1180330_0 .net "INST", 3 0, L_0x11bde00; 1 drivers +v0x1180460_0 .net "LABEL", 3 0, L_0x11be870; 1 drivers +v0x1180540_0 .var "PC", 3 0; +v0x1180620_0 .var "PCNEXT", 3 0; +v0x1180700_0 .net "SRC", 2 0, L_0x11be430; 1 drivers +v0x1180870_0 .net *"_s103", 0 0, L_0x11bc640; 1 drivers +v0x1180950_0 .net *"_s107", 0 0, L_0x11bc550; 1 drivers +v0x1180a30_0 .net *"_s111", 0 0, L_0x11bc830; 1 drivers +v0x1180b10_0 .net *"_s115", 0 0, L_0x11bc730; 1 drivers +v0x1180bf0_0 .net *"_s119", 0 0, L_0x11bca70; 1 drivers +v0x1180cd0_0 .net *"_s123", 0 0, L_0x11bc960; 1 drivers +v0x1180db0_0 .net *"_s127", 0 0, L_0x11bcc30; 1 drivers +v0x1180e90_0 .net *"_s131", 0 0, L_0x11bcb10; 1 drivers +v0x1181040_0 .net *"_s135", 0 0, L_0x11bce90; 1 drivers +v0x11810e0_0 .net *"_s139", 0 0, L_0x11bcd60; 1 drivers +v0x11811c0_0 .net *"_s143", 0 0, L_0x11bd070; 1 drivers +v0x11812a0_0 .net *"_s147", 0 0, L_0x11bcf30; 1 drivers +v0x1181380_0 .net *"_s151", 0 0, L_0x11bd260; 1 drivers +v0x1181460_0 .net *"_s155", 0 0, L_0x11bd110; 1 drivers +v0x1181540_0 .net *"_s159", 0 0, L_0x11bd1b0; 1 drivers +v0x1181620_0 .net *"_s160", 17 0, L_0x11bd300; 1 drivers +v0x1181700_0 .net *"_s162", 5 0, L_0x11bd660; 1 drivers +L_0x2ab1a62482a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x11817e0_0 .net *"_s165", 1 0, L_0x2ab1a62482a0; 1 drivers +v0x11837b0_2 .array/port v0x11837b0, 2; +v0x11818c0_0 .net *"_s173", 10 0, v0x11837b0_2; 1 drivers +v0x11837b0_3 .array/port v0x11837b0, 3; +v0x11819a0_0 .net *"_s179", 10 0, v0x11837b0_3; 1 drivers +v0x11837b0_0 .array/port v0x11837b0, 0; +v0x1181a80_0 .net *"_s185", 10 0, v0x11837b0_0; 1 drivers +v0x11837b0_1 .array/port v0x11837b0, 1; +v0x1181b60_0 .net *"_s191", 10 0, v0x11837b0_1; 1 drivers +v0x1181c40_0 .net *"_s23", 0 0, L_0x11bab20; 1 drivers +v0x1181d20_0 .net *"_s27", 0 0, L_0x11babf0; 1 drivers +v0x1180f70_0 .net *"_s31", 0 0, L_0x11bacc0; 1 drivers +v0x1181ff0_0 .net *"_s36", 0 0, L_0x11bae60; 1 drivers +v0x11820d0_0 .net *"_s42", 0 0, L_0x11bb040; 1 drivers +v0x11821b0_0 .net *"_s46", 0 0, L_0x11bb0e0; 1 drivers +v0x1182290_0 .net *"_s50", 0 0, L_0x11bb1f0; 1 drivers +v0x1182370_0 .net *"_s55", 0 0, L_0x11bb400; 1 drivers +v0x1182450_0 .net *"_s61", 0 0, L_0x11bb670; 1 drivers +v0x1182530_0 .net *"_s65", 0 0, L_0x11bb710; 1 drivers +v0x1182610_0 .net *"_s69", 0 0, L_0x11bb850; 1 drivers +v0x11826f0_0 .net *"_s74", 0 0, L_0x11bb7b0; 1 drivers +v0x11827d0_0 .net *"_s80", 0 0, L_0x11bba80; 1 drivers +v0x11828b0_0 .net *"_s84", 0 0, L_0x11bbe40; 1 drivers +v0x1182990_0 .net *"_s88", 0 0, L_0x11bbc70; 1 drivers +v0x1182a70_0 .net *"_s93", 0 0, L_0x11bbff0; 1 drivers +v0x1182b50_0 .net *"_s99", 0 0, L_0x11bc270; 1 drivers +v0x1182c30_0 .net/s "accOut", 10 0, L_0x11ba0c0; alias, 1 drivers +v0x1182d10_0 .net "anyHasData", 0 0, L_0x11baf50; 1 drivers +v0x1182dd0_0 .net "anyReadAck", 0 0, L_0x11bbb80; 1 drivers +v0x1182e90_0 .net "anyWantData", 0 0, L_0x11bb4f0; 1 drivers +v0x1182f50_0 .net "anyWriteAck", 0 0, L_0x11bc4b0; 1 drivers +v0x1183010_0 .net "clk", 0 0, v0x1199f20_0; 1 drivers +v0x11830d0_0 .net "down", 14 0, L_0x11b9300; alias, 1 drivers +v0x11831b0_0 .net "downOut", 14 0, L_0x11bdaa0; alias, 1 drivers +v0x1183290_0 .net "instruction", 17 0, L_0x11bb180; 1 drivers +v0x1183370 .array "instructions", 15 0, 17 0; +v0x1183430_0 .var "last", 2 0; +v0x1183510_0 .net "left", 14 0, L_0x11adb00; alias, 1 drivers +v0x11835f0_0 .net "leftOut", 14 0, L_0x11bd7c0; alias, 1 drivers +v0x11836d0_0 .var "mode", 2 0; +v0x11837b0 .array/s "outVals", 2 5, 10 0; +v0x11838f0_0 .var "phase", 2 0; +v0x11839d0_0 .net "portsHaveData", 5 2, L_0x11bad60; 1 drivers +v0x1181dc0_0 .net "portsWantData", 5 2, L_0x11bb290; 1 drivers +v0x1181ea0_0 .net "readAckIn", 5 2, L_0x11bb8f0; 1 drivers +v0x1183e80_0 .var "readAckOut", 5 2; +v0x1183f20_0 .var "readTarget", 2 0; +v0x1184000_0 .var/s "readValue", 10 0; +L_0x2ab1a6248258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x11840e0 .array "regVals", 0 7; +v0x11840e0_0 .net/s v0x11840e0 0, 10 0, L_0x2ab1a6248258; 1 drivers +v0x11840e0_1 .net/s v0x11840e0 1, 10 0, L_0x11ba350; 1 drivers +v0x11840e0_2 .net/s v0x11840e0 2, 10 0, L_0x11ba630; 1 drivers +v0x11840e0_3 .net/s v0x11840e0 3, 10 0, L_0x11ba760; 1 drivers +v0x11840e0_4 .net/s v0x11840e0 4, 10 0, L_0x11ba890; 1 drivers +v0x11840e0_5 .net/s v0x11840e0 5, 10 0, L_0x11ba9c0; 1 drivers +o0x2ab1a6217eb8 .functor BUFZ 11, C4; HiZ drive +v0x11840e0_6 .net/s v0x11840e0 6, 10 0, o0x2ab1a6217eb8; 0 drivers +o0x2ab1a6217ee8 .functor BUFZ 11, C4; HiZ drive +v0x11840e0_7 .net/s v0x11840e0 7, 10 0, o0x2ab1a6217ee8; 0 drivers +v0x11842f0_0 .net "right", 14 0, L_0x11b1420; alias, 1 drivers +v0x11843d0_0 .net "rightOut", 14 0, L_0x11be190; alias, 1 drivers +v0x11844b0_0 .net "up", 14 0, L_0x11b5790; alias, 1 drivers +v0x1184590_0 .net "upOut", 14 0, L_0x11bd4f0; alias, 1 drivers +v0x1184670_0 .var "weHaveData", 5 2; +v0x1184750_0 .var "weWantData", 5 2; +v0x1184830_0 .net "writeAckIn", 5 2, L_0x11bc1d0; 1 drivers +v0x1184910_0 .var "writeAckOut", 5 2; +v0x11849f0_0 .var "writeTarget", 2 0; +v0x1184ad0_0 .var/s "writeValue", 10 0; +E_0x10db880 .event negedge, v0x1183010_0; +E_0x10fe030 .event posedge, v0x1183010_0; +L_0x11ba630 .part L_0x11adb00, 0, 11; +L_0x11ba760 .part L_0x11b1420, 0, 11; +L_0x11ba890 .part L_0x11b5790, 0, 11; +L_0x11ba9c0 .part L_0x11b9300, 0, 11; +L_0x11bab20 .part L_0x11adb00, 11, 1; +L_0x11babf0 .part L_0x11b1420, 11, 1; +L_0x11bacc0 .part L_0x11b5790, 11, 1; +L_0x11bad60 .concat8 [ 1 1 1 1], L_0x11bab20, L_0x11babf0, L_0x11bacc0, L_0x11bae60; +L_0x11bae60 .part L_0x11b9300, 11, 1; +L_0x11baf50 .reduce/or L_0x11bad60; +L_0x11bb040 .part L_0x11adb00, 12, 1; +L_0x11bb0e0 .part L_0x11b1420, 12, 1; +L_0x11bb1f0 .part L_0x11b5790, 12, 1; +L_0x11bb290 .concat8 [ 1 1 1 1], L_0x11bb040, L_0x11bb0e0, L_0x11bb1f0, L_0x11bb400; +L_0x11bb400 .part L_0x11b9300, 12, 1; +L_0x11bb4f0 .reduce/or L_0x11bb290; +L_0x11bb670 .part L_0x11adb00, 13, 1; +L_0x11bb710 .part L_0x11b1420, 13, 1; +L_0x11bb850 .part L_0x11b5790, 13, 1; +L_0x11bb8f0 .concat8 [ 1 1 1 1], L_0x11bb670, L_0x11bb710, L_0x11bb850, L_0x11bb7b0; +L_0x11bb7b0 .part L_0x11b9300, 13, 1; +L_0x11bbb80 .reduce/or L_0x11bb8f0; +L_0x11bba80 .part L_0x11adb00, 14, 1; +L_0x11bbe40 .part L_0x11b1420, 14, 1; +L_0x11bbc70 .part L_0x11b5790, 14, 1; +L_0x11bc1d0 .concat8 [ 1 1 1 1], L_0x11bba80, L_0x11bbe40, L_0x11bbc70, L_0x11bbff0; +L_0x11bbff0 .part L_0x11b9300, 14, 1; +L_0x11bc4b0 .reduce/or L_0x11bc1d0; +L_0x11bc270 .part v0x1183e80_0, 0, 1; +L_0x11bc640 .part v0x1183e80_0, 1, 1; +L_0x11bc550 .part v0x1183e80_0, 2, 1; +L_0x11bc830 .part v0x1183e80_0, 3, 1; +L_0x11bc730 .part v0x1184910_0, 0, 1; +L_0x11bca70 .part v0x1184910_0, 1, 1; +L_0x11bc960 .part v0x1184910_0, 2, 1; +L_0x11bcc30 .part v0x1184910_0, 3, 1; +L_0x11bcb10 .part v0x1184750_0, 0, 1; +L_0x11bce90 .part v0x1184750_0, 1, 1; +L_0x11bcd60 .part v0x1184750_0, 2, 1; +L_0x11bd070 .part v0x1184750_0, 3, 1; +L_0x11bcf30 .part v0x1184670_0, 0, 1; +L_0x11bd260 .part v0x1184670_0, 1, 1; +L_0x11bd110 .part v0x1184670_0, 2, 1; +L_0x11bd1b0 .part v0x1184670_0, 3, 1; +L_0x11bd300 .array/port v0x1183370, L_0x11bd660; +L_0x11bd660 .concat [ 4 2 0 0], v0x1180540_0, L_0x2ab1a62482a0; +LS_0x11bd4f0_0_0 .concat8 [ 11 1 1 1], v0x11837b0_2, L_0x11bd110, L_0x11bcd60, L_0x11bc960; +LS_0x11bd4f0_0_4 .concat8 [ 1 0 0 0], L_0x11bc550; +L_0x11bd4f0 .concat8 [ 14 1 0 0], LS_0x11bd4f0_0_0, LS_0x11bd4f0_0_4; +LS_0x11bdaa0_0_0 .concat8 [ 11 1 1 1], v0x11837b0_3, L_0x11bd1b0, L_0x11bd070, L_0x11bcc30; +LS_0x11bdaa0_0_4 .concat8 [ 1 0 0 0], L_0x11bc830; +L_0x11bdaa0 .concat8 [ 14 1 0 0], LS_0x11bdaa0_0_0, LS_0x11bdaa0_0_4; +LS_0x11bd7c0_0_0 .concat8 [ 11 1 1 1], v0x11837b0_0, L_0x11bcf30, L_0x11bcb10, L_0x11bc730; +LS_0x11bd7c0_0_4 .concat8 [ 1 0 0 0], L_0x11bc270; +L_0x11bd7c0 .concat8 [ 14 1 0 0], LS_0x11bd7c0_0_0, LS_0x11bd7c0_0_4; +LS_0x11be190_0_0 .concat8 [ 11 1 1 1], v0x11837b0_1, L_0x11bd260, L_0x11bce90, L_0x11bca70; +LS_0x11be190_0_4 .concat8 [ 1 0 0 0], L_0x11bc640; +L_0x11be190 .concat8 [ 14 1 0 0], LS_0x11be190_0_0, LS_0x11be190_0_4; +L_0x11bde00 .part L_0x11bb180, 14, 4; +L_0x11be620 .part L_0x11bb180, 11, 3; +L_0x11be430 .part L_0x11bb180, 8, 3; +L_0x11be870 .part L_0x11bb180, 10, 4; +L_0x11be6c0 .part L_0x11bb180, 0, 11; +S_0x1184d50 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x10ca9f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1184f40 .param/str "memFile" 0 3 60, "regTest/down.dat"; +L_0x11b6090 .functor BUFZ 11, v0x11851c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11b6290 .functor BUFZ 11, v0x11851c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11b7150 .functor BUFZ 18, L_0x11b9090, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x11851c0_0 .var/s "ACC", 10 0; +v0x11852c0_0 .var/s "BAK", 10 0; +v0x11853a0_0 .net "DST", 2 0, L_0x11ba180; 1 drivers +v0x1185460_0 .net/s "IMM", 10 0, L_0x11ba220; 1 drivers +v0x1185540_0 .net "INST", 3 0, L_0x11b9a60; 1 drivers +v0x1185670_0 .net "LABEL", 3 0, L_0x11ba3d0; 1 drivers +v0x1185750_0 .var "PC", 3 0; +v0x1185830_0 .var "PCNEXT", 3 0; +v0x1185910_0 .net "SRC", 2 0, L_0x11b9f90; 1 drivers +v0x1185a80_0 .net *"_s103", 0 0, L_0x11b83d0; 1 drivers +v0x1185b60_0 .net *"_s107", 0 0, L_0x11b82e0; 1 drivers +v0x1185c40_0 .net *"_s111", 0 0, L_0x11b85c0; 1 drivers +v0x1185d20_0 .net *"_s115", 0 0, L_0x11b84c0; 1 drivers +v0x1185e00_0 .net *"_s119", 0 0, L_0x11b8800; 1 drivers +v0x1185ee0_0 .net *"_s123", 0 0, L_0x11b86f0; 1 drivers +v0x1185fc0_0 .net *"_s127", 0 0, L_0x11b89c0; 1 drivers +v0x11860a0_0 .net *"_s131", 0 0, L_0x11b88a0; 1 drivers +v0x1186250_0 .net *"_s135", 0 0, L_0x11b8c20; 1 drivers +v0x11862f0_0 .net *"_s139", 0 0, L_0x11b8af0; 1 drivers +v0x11863d0_0 .net *"_s143", 0 0, L_0x11b8e00; 1 drivers +v0x11864b0_0 .net *"_s147", 0 0, L_0x11b8cc0; 1 drivers +v0x1186590_0 .net *"_s151", 0 0, L_0x11b8ff0; 1 drivers +v0x1186670_0 .net *"_s155", 0 0, L_0x11b8ea0; 1 drivers +v0x1186750_0 .net *"_s159", 0 0, L_0x11b8f40; 1 drivers +v0x1186830_0 .net *"_s160", 17 0, L_0x11b9090; 1 drivers +v0x1186910_0 .net *"_s162", 5 0, L_0x11b93f0; 1 drivers +L_0x2ab1a6248210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x11869f0_0 .net *"_s165", 1 0, L_0x2ab1a6248210; 1 drivers +v0x1188980_2 .array/port v0x1188980, 2; +v0x1186ad0_0 .net *"_s173", 10 0, v0x1188980_2; 1 drivers +v0x1188980_3 .array/port v0x1188980, 3; +v0x1186bb0_0 .net *"_s179", 10 0, v0x1188980_3; 1 drivers +v0x1188980_0 .array/port v0x1188980, 0; +v0x1186c90_0 .net *"_s185", 10 0, v0x1188980_0; 1 drivers +v0x1188980_1 .array/port v0x1188980, 1; +v0x1186d70_0 .net *"_s191", 10 0, v0x1188980_1; 1 drivers +v0x1186e50_0 .net *"_s23", 0 0, L_0x11b68e0; 1 drivers +v0x1186f30_0 .net *"_s27", 0 0, L_0x11b6a00; 1 drivers +v0x1186180_0 .net *"_s31", 0 0, L_0x11b6af0; 1 drivers +v0x1187200_0 .net *"_s36", 0 0, L_0x11b6de0; 1 drivers +v0x11872e0_0 .net *"_s42", 0 0, L_0x11b7010; 1 drivers +v0x11873c0_0 .net *"_s46", 0 0, L_0x11b70b0; 1 drivers +v0x11874a0_0 .net *"_s50", 0 0, L_0x11b71c0; 1 drivers +v0x1187580_0 .net *"_s55", 0 0, L_0x11b73a0; 1 drivers +v0x1187660_0 .net *"_s61", 0 0, L_0x11b7610; 1 drivers +v0x1187740_0 .net *"_s65", 0 0, L_0x11b7740; 1 drivers +v0x1187820_0 .net *"_s69", 0 0, L_0x11b7910; 1 drivers +v0x1187900_0 .net *"_s74", 0 0, L_0x11b7870; 1 drivers +v0x11879e0_0 .net *"_s80", 0 0, L_0x11b7aa0; 1 drivers +v0x1187ac0_0 .net *"_s84", 0 0, L_0x11b7d90; 1 drivers +v0x1187ba0_0 .net *"_s88", 0 0, L_0x11b7cd0; 1 drivers +v0x1187c80_0 .net *"_s93", 0 0, L_0x11b7e30; 1 drivers +v0x1187d60_0 .net *"_s99", 0 0, L_0x11b80c0; 1 drivers +v0x1187e40_0 .net/s "accOut", 10 0, L_0x11b6090; alias, 1 drivers +v0x1187f20_0 .net "anyHasData", 0 0, L_0x11b6f20; 1 drivers +v0x1187fe0_0 .net "anyReadAck", 0 0, L_0x11b7c30; 1 drivers +v0x11880a0_0 .net "anyWantData", 0 0, L_0x11b7490; 1 drivers +v0x1188160_0 .net "anyWriteAck", 0 0, L_0x11b81f0; 1 drivers +v0x1188220_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers +o0x2ab1a6218cc8 .functor BUFZ 15, C4; HiZ drive +v0x11882c0_0 .net "down", 14 0, o0x2ab1a6218cc8; 0 drivers +v0x1188380_0 .net "downOut", 14 0, L_0x11b97c0; 1 drivers +v0x1188460_0 .net "instruction", 17 0, L_0x11b7150; 1 drivers +v0x1188540 .array "instructions", 15 0, 17 0; +v0x1188600_0 .var "last", 2 0; +o0x2ab1a6218d88 .functor BUFZ 15, C4; HiZ drive +v0x11886e0_0 .net "left", 14 0, o0x2ab1a6218d88; 0 drivers +v0x11887c0_0 .net "leftOut", 14 0, L_0x11b9550; 1 drivers +v0x11888a0_0 .var "mode", 2 0; +v0x1188980 .array/s "outVals", 2 5, 10 0; +v0x1188ac0_0 .var "phase", 2 0; +v0x1188ba0_0 .net "portsHaveData", 5 2, L_0x11b6c20; 1 drivers +v0x1186fd0_0 .net "portsWantData", 5 2, L_0x11b7260; 1 drivers +v0x11870b0_0 .net "readAckIn", 5 2, L_0x11b79b0; 1 drivers +v0x1189050_0 .var "readAckOut", 5 2; +v0x11890f0_0 .var "readTarget", 2 0; +v0x1189190_0 .var/s "readValue", 10 0; +L_0x2ab1a62481c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1189230 .array "regVals", 0 7; +v0x1189230_0 .net/s v0x1189230 0, 10 0, L_0x2ab1a62481c8; 1 drivers +v0x1189230_1 .net/s v0x1189230 1, 10 0, L_0x11b6290; 1 drivers +v0x1189230_2 .net/s v0x1189230 2, 10 0, L_0x11b6600; 1 drivers +v0x1189230_3 .net/s v0x1189230 3, 10 0, L_0x11b66a0; 1 drivers +v0x1189230_4 .net/s v0x1189230 4, 10 0, L_0x11b6740; 1 drivers +v0x1189230_5 .net/s v0x1189230 5, 10 0, L_0x11b67e0; 1 drivers +o0x2ab1a6219148 .functor BUFZ 11, C4; HiZ drive +v0x1189230_6 .net/s v0x1189230 6, 10 0, o0x2ab1a6219148; 0 drivers +o0x2ab1a6219178 .functor BUFZ 11, C4; HiZ drive +v0x1189230_7 .net/s v0x1189230 7, 10 0, o0x2ab1a6219178; 0 drivers +o0x2ab1a62191a8 .functor BUFZ 15, C4; HiZ drive +v0x1189440_0 .net "right", 14 0, o0x2ab1a62191a8; 0 drivers +v0x1189520_0 .net "rightOut", 14 0, L_0x11b9d70; 1 drivers +v0x1189600_0 .net "up", 14 0, L_0x11bdaa0; alias, 1 drivers +v0x11896f0_0 .net "upOut", 14 0, L_0x11b9300; alias, 1 drivers +v0x11897c0_0 .var "weHaveData", 5 2; +v0x1189880_0 .var "weWantData", 5 2; +v0x1189960_0 .net "writeAckIn", 5 2, L_0x11b7f00; 1 drivers +v0x1189a40_0 .var "writeAckOut", 5 2; +v0x1189b20_0 .var "writeTarget", 2 0; +v0x1189c00_0 .var/s "writeValue", 10 0; +L_0x11b6600 .part o0x2ab1a6218d88, 0, 11; +L_0x11b66a0 .part o0x2ab1a62191a8, 0, 11; +L_0x11b6740 .part L_0x11bdaa0, 0, 11; +L_0x11b67e0 .part o0x2ab1a6218cc8, 0, 11; +L_0x11b68e0 .part o0x2ab1a6218d88, 11, 1; +L_0x11b6a00 .part o0x2ab1a62191a8, 11, 1; +L_0x11b6af0 .part L_0x11bdaa0, 11, 1; +L_0x11b6c20 .concat8 [ 1 1 1 1], L_0x11b68e0, L_0x11b6a00, L_0x11b6af0, L_0x11b6de0; +L_0x11b6de0 .part o0x2ab1a6218cc8, 11, 1; +L_0x11b6f20 .reduce/or L_0x11b6c20; +L_0x11b7010 .part o0x2ab1a6218d88, 12, 1; +L_0x11b70b0 .part o0x2ab1a62191a8, 12, 1; +L_0x11b71c0 .part L_0x11bdaa0, 12, 1; +L_0x11b7260 .concat8 [ 1 1 1 1], L_0x11b7010, L_0x11b70b0, L_0x11b71c0, L_0x11b73a0; +L_0x11b73a0 .part o0x2ab1a6218cc8, 12, 1; +L_0x11b7490 .reduce/or L_0x11b7260; +L_0x11b7610 .part o0x2ab1a6218d88, 13, 1; +L_0x11b7740 .part o0x2ab1a62191a8, 13, 1; +L_0x11b7910 .part L_0x11bdaa0, 13, 1; +L_0x11b79b0 .concat8 [ 1 1 1 1], L_0x11b7610, L_0x11b7740, L_0x11b7910, L_0x11b7870; +L_0x11b7870 .part o0x2ab1a6218cc8, 13, 1; +L_0x11b7c30 .reduce/or L_0x11b79b0; +L_0x11b7aa0 .part o0x2ab1a6218d88, 14, 1; +L_0x11b7d90 .part o0x2ab1a62191a8, 14, 1; +L_0x11b7cd0 .part L_0x11bdaa0, 14, 1; +L_0x11b7f00 .concat8 [ 1 1 1 1], L_0x11b7aa0, L_0x11b7d90, L_0x11b7cd0, L_0x11b7e30; +L_0x11b7e30 .part o0x2ab1a6218cc8, 14, 1; +L_0x11b81f0 .reduce/or L_0x11b7f00; +L_0x11b80c0 .part v0x1189050_0, 0, 1; +L_0x11b83d0 .part v0x1189050_0, 1, 1; +L_0x11b82e0 .part v0x1189050_0, 2, 1; +L_0x11b85c0 .part v0x1189050_0, 3, 1; +L_0x11b84c0 .part v0x1189a40_0, 0, 1; +L_0x11b8800 .part v0x1189a40_0, 1, 1; +L_0x11b86f0 .part v0x1189a40_0, 2, 1; +L_0x11b89c0 .part v0x1189a40_0, 3, 1; +L_0x11b88a0 .part v0x1189880_0, 0, 1; +L_0x11b8c20 .part v0x1189880_0, 1, 1; +L_0x11b8af0 .part v0x1189880_0, 2, 1; +L_0x11b8e00 .part v0x1189880_0, 3, 1; +L_0x11b8cc0 .part v0x11897c0_0, 0, 1; +L_0x11b8ff0 .part v0x11897c0_0, 1, 1; +L_0x11b8ea0 .part v0x11897c0_0, 2, 1; +L_0x11b8f40 .part v0x11897c0_0, 3, 1; +L_0x11b9090 .array/port v0x1188540, L_0x11b93f0; +L_0x11b93f0 .concat [ 4 2 0 0], v0x1185750_0, L_0x2ab1a6248210; +LS_0x11b9300_0_0 .concat8 [ 11 1 1 1], v0x1188980_2, L_0x11b8ea0, L_0x11b8af0, L_0x11b86f0; +LS_0x11b9300_0_4 .concat8 [ 1 0 0 0], L_0x11b82e0; +L_0x11b9300 .concat8 [ 14 1 0 0], LS_0x11b9300_0_0, LS_0x11b9300_0_4; +LS_0x11b97c0_0_0 .concat8 [ 11 1 1 1], v0x1188980_3, L_0x11b8f40, L_0x11b8e00, L_0x11b89c0; +LS_0x11b97c0_0_4 .concat8 [ 1 0 0 0], L_0x11b85c0; +L_0x11b97c0 .concat8 [ 14 1 0 0], LS_0x11b97c0_0_0, LS_0x11b97c0_0_4; +LS_0x11b9550_0_0 .concat8 [ 11 1 1 1], v0x1188980_0, L_0x11b8cc0, L_0x11b88a0, L_0x11b84c0; +LS_0x11b9550_0_4 .concat8 [ 1 0 0 0], L_0x11b80c0; +L_0x11b9550 .concat8 [ 14 1 0 0], LS_0x11b9550_0_0, LS_0x11b9550_0_4; +LS_0x11b9d70_0_0 .concat8 [ 11 1 1 1], v0x1188980_1, L_0x11b8ff0, L_0x11b8c20, L_0x11b8800; +LS_0x11b9d70_0_4 .concat8 [ 1 0 0 0], L_0x11b83d0; +L_0x11b9d70 .concat8 [ 14 1 0 0], LS_0x11b9d70_0_0, LS_0x11b9d70_0_4; +L_0x11b9a60 .part L_0x11b7150, 14, 4; +L_0x11ba180 .part L_0x11b7150, 11, 3; +L_0x11b9f90 .part L_0x11b7150, 8, 3; +L_0x11ba3d0 .part L_0x11b7150, 10, 4; +L_0x11ba220 .part L_0x11b7150, 0, 11; +S_0x1189e80 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x10ca9f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x118a080 .param/str "memFile" 0 3 60, "regTest/left.dat"; +L_0x119a140 .functor BUFZ 11, v0x118a300_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11aa1e0 .functor BUFZ 11, v0x118a300_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11acf30 .functor BUFZ 18, L_0x11acd40, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x118a300_0 .var/s "ACC", 10 0; +v0x118a400_0 .var/s "BAK", 10 0; +v0x118a4e0_0 .net "DST", 2 0, L_0x11adf10; 1 drivers +v0x118a5a0_0 .net/s "IMM", 10 0, L_0x11adfb0; 1 drivers +v0x118a680_0 .net "INST", 3 0, L_0x11ad7b0; 1 drivers +v0x118a7b0_0 .net "LABEL", 3 0, L_0x11ae160; 1 drivers +v0x118a890_0 .var "PC", 3 0; +v0x118a970_0 .var "PCNEXT", 3 0; +v0x118aa50_0 .net "SRC", 2 0, L_0x11add20; 1 drivers +v0x118abc0_0 .net *"_s103", 0 0, L_0x11ac0d0; 1 drivers +v0x118aca0_0 .net *"_s107", 0 0, L_0x11abf40; 1 drivers +v0x118ad80_0 .net *"_s111", 0 0, L_0x11ac270; 1 drivers +v0x118ae60_0 .net *"_s115", 0 0, L_0x11ac170; 1 drivers +v0x118af40_0 .net *"_s119", 0 0, L_0x11ac4b0; 1 drivers +v0x118a120_0 .net *"_s123", 0 0, L_0x11ac3a0; 1 drivers +v0x118afe0_0 .net *"_s127", 0 0, L_0x11ac670; 1 drivers +v0x118b0c0_0 .net *"_s131", 0 0, L_0x11ac550; 1 drivers +v0x118b270_0 .net *"_s135", 0 0, L_0x11ac8d0; 1 drivers +v0x118b310_0 .net *"_s139", 0 0, L_0x11ac7a0; 1 drivers +v0x118b3f0_0 .net *"_s143", 0 0, L_0x11acab0; 1 drivers +v0x118b4d0_0 .net *"_s147", 0 0, L_0x11ac970; 1 drivers +v0x118b5b0_0 .net *"_s151", 0 0, L_0x11acca0; 1 drivers +v0x118b690_0 .net *"_s155", 0 0, L_0x11acb50; 1 drivers +v0x118b770_0 .net *"_s159", 0 0, L_0x11acbf0; 1 drivers +v0x118b850_0 .net *"_s160", 17 0, L_0x11acd40; 1 drivers +v0x118b930_0 .net *"_s162", 5 0, L_0x11ad0a0; 1 drivers +L_0x2ab1a6248060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x118ba10_0 .net *"_s165", 1 0, L_0x2ab1a6248060; 1 drivers +v0x118da10_2 .array/port v0x118da10, 2; +v0x118baf0_0 .net *"_s173", 10 0, v0x118da10_2; 1 drivers +v0x118da10_3 .array/port v0x118da10, 3; +v0x118bbd0_0 .net *"_s179", 10 0, v0x118da10_3; 1 drivers +v0x118da10_0 .array/port v0x118da10, 0; +v0x118bcb0_0 .net *"_s185", 10 0, v0x118da10_0; 1 drivers +v0x118da10_1 .array/port v0x118da10, 1; +v0x118bd90_0 .net *"_s191", 10 0, v0x118da10_1; 1 drivers +v0x118be70_0 .net *"_s23", 0 0, L_0x11aa640; 1 drivers +v0x118bf50_0 .net *"_s27", 0 0, L_0x11aa760; 1 drivers +v0x118b1a0_0 .net *"_s31", 0 0, L_0x11aa8d0; 1 drivers +v0x118c220_0 .net *"_s36", 0 0, L_0x11aab80; 1 drivers +v0x118c300_0 .net *"_s42", 0 0, L_0x11aae10; 1 drivers +v0x118c3e0_0 .net *"_s46", 0 0, L_0x11aaeb0; 1 drivers +v0x118c4c0_0 .net *"_s50", 0 0, L_0x11aafc0; 1 drivers +v0x118c5a0_0 .net *"_s55", 0 0, L_0x11ab250; 1 drivers +v0x118c680_0 .net *"_s61", 0 0, L_0x11ab4c0; 1 drivers +v0x118c760_0 .net *"_s65", 0 0, L_0x11ab5f0; 1 drivers +v0x118c840_0 .net *"_s69", 0 0, L_0x11ab730; 1 drivers +v0x118c920_0 .net *"_s74", 0 0, L_0x11ab690; 1 drivers +v0x118ca00_0 .net *"_s80", 0 0, L_0x11ab920; 1 drivers +v0x118cae0_0 .net *"_s84", 0 0, L_0x11abc10; 1 drivers +v0x118cbc0_0 .net *"_s88", 0 0, L_0x11abb50; 1 drivers +v0x118cca0_0 .net *"_s93", 0 0, L_0x118e4b0; 1 drivers +v0x118cd80_0 .net *"_s99", 0 0, L_0x11ac030; 1 drivers +v0x118ce60_0 .net/s "accOut", 10 0, L_0x119a140; alias, 1 drivers +v0x118cf40_0 .net "anyHasData", 0 0, L_0x11aacc0; 1 drivers +v0x118d000_0 .net "anyReadAck", 0 0, L_0x11abab0; 1 drivers +v0x118d0c0_0 .net "anyWantData", 0 0, L_0x11ab340; 1 drivers +v0x118d180_0 .net "anyWriteAck", 0 0, L_0x11abcb0; 1 drivers +v0x118d240_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers +o0x2ab1a6219ef8 .functor BUFZ 15, C4; HiZ drive +v0x118d330_0 .net "down", 14 0, o0x2ab1a6219ef8; 0 drivers +v0x118d410_0 .net "downOut", 14 0, L_0x11ad510; 1 drivers +v0x118d4f0_0 .net "instruction", 17 0, L_0x11acf30; 1 drivers +v0x118d5d0 .array "instructions", 15 0, 17 0; +v0x118d690_0 .var "last", 2 0; +o0x2ab1a6219fb8 .functor BUFZ 15, C4; HiZ drive +v0x118d770_0 .net "left", 14 0, o0x2ab1a6219fb8; 0 drivers +v0x118d850_0 .net "leftOut", 14 0, L_0x11ad200; 1 drivers +v0x118d930_0 .var "mode", 2 0; +v0x118da10 .array/s "outVals", 2 5, 10 0; +v0x118db50_0 .var "phase", 2 0; +v0x118dc30_0 .net "portsHaveData", 5 2, L_0x11aa970; 1 drivers +v0x118c030_0 .net "portsWantData", 5 2, L_0x11ab060; 1 drivers +v0x118c110_0 .net "readAckIn", 5 2, L_0x11ab7d0; 1 drivers +v0x118e0e0_0 .var "readAckOut", 5 2; +v0x118e1c0_0 .var "readTarget", 2 0; +v0x118e2a0_0 .var/s "readValue", 10 0; +L_0x2ab1a6248018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x118e380 .array "regVals", 0 7; +v0x118e380_0 .net/s v0x118e380 0, 10 0, L_0x2ab1a6248018; 1 drivers +v0x118e380_1 .net/s v0x118e380 1, 10 0, L_0x11aa1e0; 1 drivers +v0x118e380_2 .net/s v0x118e380 2, 10 0, L_0x11aa2a0; 1 drivers +v0x118e380_3 .net/s v0x118e380 3, 10 0, L_0x11aa340; 1 drivers +v0x118e380_4 .net/s v0x118e380 4, 10 0, L_0x11aa410; 1 drivers +v0x118e380_5 .net/s v0x118e380 5, 10 0, L_0x11aa510; 1 drivers +o0x2ab1a621a378 .functor BUFZ 11, C4; HiZ drive +v0x118e380_6 .net/s v0x118e380 6, 10 0, o0x2ab1a621a378; 0 drivers +o0x2ab1a621a3a8 .functor BUFZ 11, C4; HiZ drive +v0x118e380_7 .net/s v0x118e380 7, 10 0, o0x2ab1a621a3a8; 0 drivers +v0x118e590_0 .net "right", 14 0, L_0x11bd7c0; alias, 1 drivers +v0x118e680_0 .net "rightOut", 14 0, L_0x11adb00; alias, 1 drivers +o0x2ab1a621a3d8 .functor BUFZ 15, C4; HiZ drive +v0x118e750_0 .net "up", 14 0, o0x2ab1a621a3d8; 0 drivers +v0x118e810_0 .net "upOut", 14 0, L_0x11ad2c0; 1 drivers +v0x118e8f0_0 .var "weHaveData", 5 2; +v0x118e9d0_0 .var "weWantData", 5 2; +v0x118eab0_0 .net "writeAckIn", 5 2, L_0x11abd80; 1 drivers +v0x118eb90_0 .var "writeAckOut", 5 2; +v0x118ec70_0 .var "writeTarget", 2 0; +v0x118ed50_0 .var/s "writeValue", 10 0; +L_0x11aa2a0 .part o0x2ab1a6219fb8, 0, 11; +L_0x11aa340 .part L_0x11bd7c0, 0, 11; +L_0x11aa410 .part o0x2ab1a621a3d8, 0, 11; +L_0x11aa510 .part o0x2ab1a6219ef8, 0, 11; +L_0x11aa640 .part o0x2ab1a6219fb8, 11, 1; +L_0x11aa760 .part L_0x11bd7c0, 11, 1; +L_0x11aa8d0 .part o0x2ab1a621a3d8, 11, 1; +L_0x11aa970 .concat8 [ 1 1 1 1], L_0x11aa640, L_0x11aa760, L_0x11aa8d0, L_0x11aab80; +L_0x11aab80 .part o0x2ab1a6219ef8, 11, 1; +L_0x11aacc0 .reduce/or L_0x11aa970; +L_0x11aae10 .part o0x2ab1a6219fb8, 12, 1; +L_0x11aaeb0 .part L_0x11bd7c0, 12, 1; +L_0x11aafc0 .part o0x2ab1a621a3d8, 12, 1; +L_0x11ab060 .concat8 [ 1 1 1 1], L_0x11aae10, L_0x11aaeb0, L_0x11aafc0, L_0x11ab250; +L_0x11ab250 .part o0x2ab1a6219ef8, 12, 1; +L_0x11ab340 .reduce/or L_0x11ab060; +L_0x11ab4c0 .part o0x2ab1a6219fb8, 13, 1; +L_0x11ab5f0 .part L_0x11bd7c0, 13, 1; +L_0x11ab730 .part o0x2ab1a621a3d8, 13, 1; +L_0x11ab7d0 .concat8 [ 1 1 1 1], L_0x11ab4c0, L_0x11ab5f0, L_0x11ab730, L_0x11ab690; +L_0x11ab690 .part o0x2ab1a6219ef8, 13, 1; +L_0x11abab0 .reduce/or L_0x11ab7d0; +L_0x11ab920 .part o0x2ab1a6219fb8, 14, 1; +L_0x11abc10 .part L_0x11bd7c0, 14, 1; +L_0x11abb50 .part o0x2ab1a621a3d8, 14, 1; +L_0x11abd80 .concat8 [ 1 1 1 1], L_0x11ab920, L_0x11abc10, L_0x11abb50, L_0x118e4b0; +L_0x118e4b0 .part o0x2ab1a6219ef8, 14, 1; +L_0x11abcb0 .reduce/or L_0x11abd80; +L_0x11ac030 .part v0x118e0e0_0, 0, 1; +L_0x11ac0d0 .part v0x118e0e0_0, 1, 1; +L_0x11abf40 .part v0x118e0e0_0, 2, 1; +L_0x11ac270 .part v0x118e0e0_0, 3, 1; +L_0x11ac170 .part v0x118eb90_0, 0, 1; +L_0x11ac4b0 .part v0x118eb90_0, 1, 1; +L_0x11ac3a0 .part v0x118eb90_0, 2, 1; +L_0x11ac670 .part v0x118eb90_0, 3, 1; +L_0x11ac550 .part v0x118e9d0_0, 0, 1; +L_0x11ac8d0 .part v0x118e9d0_0, 1, 1; +L_0x11ac7a0 .part v0x118e9d0_0, 2, 1; +L_0x11acab0 .part v0x118e9d0_0, 3, 1; +L_0x11ac970 .part v0x118e8f0_0, 0, 1; +L_0x11acca0 .part v0x118e8f0_0, 1, 1; +L_0x11acb50 .part v0x118e8f0_0, 2, 1; +L_0x11acbf0 .part v0x118e8f0_0, 3, 1; +L_0x11acd40 .array/port v0x118d5d0, L_0x11ad0a0; +L_0x11ad0a0 .concat [ 4 2 0 0], v0x118a890_0, L_0x2ab1a6248060; +LS_0x11ad2c0_0_0 .concat8 [ 11 1 1 1], v0x118da10_2, L_0x11acb50, L_0x11ac7a0, L_0x11ac3a0; +LS_0x11ad2c0_0_4 .concat8 [ 1 0 0 0], L_0x11abf40; +L_0x11ad2c0 .concat8 [ 14 1 0 0], LS_0x11ad2c0_0_0, LS_0x11ad2c0_0_4; +LS_0x11ad510_0_0 .concat8 [ 11 1 1 1], v0x118da10_3, L_0x11acbf0, L_0x11acab0, L_0x11ac670; +LS_0x11ad510_0_4 .concat8 [ 1 0 0 0], L_0x11ac270; +L_0x11ad510 .concat8 [ 14 1 0 0], LS_0x11ad510_0_0, LS_0x11ad510_0_4; +LS_0x11ad200_0_0 .concat8 [ 11 1 1 1], v0x118da10_0, L_0x11ac970, L_0x11ac550, L_0x11ac170; +LS_0x11ad200_0_4 .concat8 [ 1 0 0 0], L_0x11ac030; +L_0x11ad200 .concat8 [ 14 1 0 0], LS_0x11ad200_0_0, LS_0x11ad200_0_4; +LS_0x11adb00_0_0 .concat8 [ 11 1 1 1], v0x118da10_1, L_0x11acca0, L_0x11ac8d0, L_0x11ac4b0; +LS_0x11adb00_0_4 .concat8 [ 1 0 0 0], L_0x11ac0d0; +L_0x11adb00 .concat8 [ 14 1 0 0], LS_0x11adb00_0_0, LS_0x11adb00_0_4; +L_0x11ad7b0 .part L_0x11acf30, 14, 4; +L_0x11adf10 .part L_0x11acf30, 11, 3; +L_0x11add20 .part L_0x11acf30, 8, 3; +L_0x11ae160 .part L_0x11acf30, 10, 4; +L_0x11adfb0 .part L_0x11acf30, 0, 11; +S_0x118efd0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x10ca9f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x118f1a0 .param/str "memFile" 0 3 60, "regTest/right.dat"; +L_0x11ade50 .functor BUFZ 11, v0x118f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11ae050 .functor BUFZ 11, v0x118f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11aef70 .functor BUFZ 18, L_0x11b0f60, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x118f490_0 .var/s "ACC", 10 0; +v0x118f590_0 .var/s "BAK", 10 0; +v0x118f670_0 .net "DST", 2 0, L_0x11b20a0; 1 drivers +v0x118f730_0 .net/s "IMM", 10 0, L_0x11b2140; 1 drivers +v0x118f810_0 .net "INST", 3 0, L_0x11b1980; 1 drivers +v0x118f8f0_0 .net "LABEL", 3 0, L_0x11b22f0; 1 drivers +v0x118f9d0_0 .var "PC", 3 0; +v0x118fab0_0 .var "PCNEXT", 3 0; +v0x118fb90_0 .net "SRC", 2 0, L_0x11b1eb0; 1 drivers +v0x118fd00_0 .net *"_s103", 0 0, L_0x11b02a0; 1 drivers +v0x118fde0_0 .net *"_s107", 0 0, L_0x11b01b0; 1 drivers +v0x118fec0_0 .net *"_s111", 0 0, L_0x11b0490; 1 drivers +v0x118ffa0_0 .net *"_s115", 0 0, L_0x11b0390; 1 drivers +v0x1190080_0 .net *"_s119", 0 0, L_0x11b06d0; 1 drivers +v0x1190160_0 .net *"_s123", 0 0, L_0x11b05c0; 1 drivers +v0x1190240_0 .net *"_s127", 0 0, L_0x11b0890; 1 drivers +v0x1190320_0 .net *"_s131", 0 0, L_0x11b0770; 1 drivers +v0x11904d0_0 .net *"_s135", 0 0, L_0x11b0af0; 1 drivers +v0x1190570_0 .net *"_s139", 0 0, L_0x11b09c0; 1 drivers +v0x1190650_0 .net *"_s143", 0 0, L_0x11b0cd0; 1 drivers +v0x1190730_0 .net *"_s147", 0 0, L_0x11b0b90; 1 drivers +v0x1190810_0 .net *"_s151", 0 0, L_0x11b0ec0; 1 drivers +v0x11908f0_0 .net *"_s155", 0 0, L_0x11b0d70; 1 drivers +v0x11909d0_0 .net *"_s159", 0 0, L_0x11b0e10; 1 drivers +v0x1190ab0_0 .net *"_s160", 17 0, L_0x11b0f60; 1 drivers +v0x1190b90_0 .net *"_s162", 5 0, L_0x11b12c0; 1 drivers +L_0x2ab1a62480f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1190c70_0 .net *"_s165", 1 0, L_0x2ab1a62480f0; 1 drivers +v0x1192ba0_2 .array/port v0x1192ba0, 2; +v0x1190d50_0 .net *"_s173", 10 0, v0x1192ba0_2; 1 drivers +v0x1192ba0_3 .array/port v0x1192ba0, 3; +v0x1190e30_0 .net *"_s179", 10 0, v0x1192ba0_3; 1 drivers +v0x1192ba0_0 .array/port v0x1192ba0, 0; +v0x1190f10_0 .net *"_s185", 10 0, v0x1192ba0_0; 1 drivers +v0x1192ba0_1 .array/port v0x1192ba0, 1; +v0x1190ff0_0 .net *"_s191", 10 0, v0x1192ba0_1; 1 drivers +v0x11910d0_0 .net *"_s23", 0 0, L_0x11ae6a0; 1 drivers +v0x11911b0_0 .net *"_s27", 0 0, L_0x11ae800; 1 drivers +v0x1190400_0 .net *"_s31", 0 0, L_0x11ae8d0; 1 drivers +v0x1191480_0 .net *"_s36", 0 0, L_0x11aeba0; 1 drivers +v0x1191560_0 .net *"_s42", 0 0, L_0x11aee30; 1 drivers +v0x1191640_0 .net *"_s46", 0 0, L_0x11aeed0; 1 drivers +v0x1191720_0 .net *"_s50", 0 0, L_0x11aefe0; 1 drivers +v0x1191800_0 .net *"_s55", 0 0, L_0x11af270; 1 drivers +v0x11918e0_0 .net *"_s61", 0 0, L_0x11af4e0; 1 drivers +v0x11919c0_0 .net *"_s65", 0 0, L_0x11af580; 1 drivers +v0x1191aa0_0 .net *"_s69", 0 0, L_0x11af750; 1 drivers +v0x1191b80_0 .net *"_s74", 0 0, L_0x11af6b0; 1 drivers +v0x1191c60_0 .net *"_s80", 0 0, L_0x11af940; 1 drivers +v0x1191d40_0 .net *"_s84", 0 0, L_0x11afc30; 1 drivers +v0x1191e20_0 .net *"_s88", 0 0, L_0x11afb70; 1 drivers +v0x1191f00_0 .net *"_s93", 0 0, L_0x11afcd0; 1 drivers +v0x1191fe0_0 .net *"_s99", 0 0, L_0x11aff90; 1 drivers +v0x11920c0_0 .net/s "accOut", 10 0, L_0x11ade50; alias, 1 drivers +v0x11921a0_0 .net "anyHasData", 0 0, L_0x11aece0; 1 drivers +v0x1192260_0 .net "anyReadAck", 0 0, L_0x11afad0; 1 drivers +v0x1192320_0 .net "anyWantData", 0 0, L_0x11af360; 1 drivers +v0x11923e0_0 .net "anyWriteAck", 0 0, L_0x11b00c0; 1 drivers +v0x11924a0_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers +o0x2ab1a621b128 .functor BUFZ 15, C4; HiZ drive +v0x1192540_0 .net "down", 14 0, o0x2ab1a621b128; 0 drivers +v0x1192620_0 .net "downOut", 14 0, L_0x11b16e0; 1 drivers +v0x1192700_0 .net "instruction", 17 0, L_0x11aef70; 1 drivers +v0x11927e0 .array "instructions", 15 0, 17 0; +v0x11928a0_0 .var "last", 2 0; +v0x1192980_0 .net "left", 14 0, L_0x11be190; alias, 1 drivers +v0x1192a40_0 .net "leftOut", 14 0, L_0x11b1420; alias, 1 drivers +v0x1192ae0_0 .var "mode", 2 0; +v0x1192ba0 .array/s "outVals", 2 5, 10 0; +v0x1192d10_0 .var "phase", 2 0; +v0x1192df0_0 .net "portsHaveData", 5 2, L_0x11ae9c0; 1 drivers +v0x1191250_0 .net "portsWantData", 5 2, L_0x11af080; 1 drivers +v0x1191330_0 .net "readAckIn", 5 2, L_0x11af7f0; 1 drivers +v0x11932a0_0 .var "readAckOut", 5 2; +v0x1193340_0 .var "readTarget", 2 0; +v0x11933e0_0 .var/s "readValue", 10 0; +L_0x2ab1a62480a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1193480 .array "regVals", 0 7; +v0x1193480_0 .net/s v0x1193480 0, 10 0, L_0x2ab1a62480a8; 1 drivers +v0x1193480_1 .net/s v0x1193480 1, 10 0, L_0x11ae050; 1 drivers +v0x1193480_2 .net/s v0x1193480 2, 10 0, L_0x11ae3c0; 1 drivers +v0x1193480_3 .net/s v0x1193480 3, 10 0, L_0x11ae460; 1 drivers +v0x1193480_4 .net/s v0x1193480 4, 10 0, L_0x11ae500; 1 drivers +v0x1193480_5 .net/s v0x1193480 5, 10 0, L_0x11ae5a0; 1 drivers +o0x2ab1a621b548 .functor BUFZ 11, C4; HiZ drive +v0x1193480_6 .net/s v0x1193480 6, 10 0, o0x2ab1a621b548; 0 drivers +o0x2ab1a621b578 .functor BUFZ 11, C4; HiZ drive +v0x1193480_7 .net/s v0x1193480 7, 10 0, o0x2ab1a621b578; 0 drivers +o0x2ab1a621b5a8 .functor BUFZ 15, C4; HiZ drive +v0x1193690_0 .net "right", 14 0, o0x2ab1a621b5a8; 0 drivers +v0x1193770_0 .net "rightOut", 14 0, L_0x11b1c90; 1 drivers +o0x2ab1a621b608 .functor BUFZ 15, C4; HiZ drive +v0x1193850_0 .net "up", 14 0, o0x2ab1a621b608; 0 drivers +v0x1193930_0 .net "upOut", 14 0, L_0x11b11d0; 1 drivers +v0x1193a10_0 .var "weHaveData", 5 2; +v0x1193af0_0 .var "weWantData", 5 2; +v0x1193bd0_0 .net "writeAckIn", 5 2, L_0x11afda0; 1 drivers +v0x1193cb0_0 .var "writeAckOut", 5 2; +v0x1193d90_0 .var "writeTarget", 2 0; +v0x1193e70_0 .var/s "writeValue", 10 0; +L_0x11ae3c0 .part L_0x11be190, 0, 11; +L_0x11ae460 .part o0x2ab1a621b5a8, 0, 11; +L_0x11ae500 .part o0x2ab1a621b608, 0, 11; +L_0x11ae5a0 .part o0x2ab1a621b128, 0, 11; +L_0x11ae6a0 .part L_0x11be190, 11, 1; +L_0x11ae800 .part o0x2ab1a621b5a8, 11, 1; +L_0x11ae8d0 .part o0x2ab1a621b608, 11, 1; +L_0x11ae9c0 .concat8 [ 1 1 1 1], L_0x11ae6a0, L_0x11ae800, L_0x11ae8d0, L_0x11aeba0; +L_0x11aeba0 .part o0x2ab1a621b128, 11, 1; +L_0x11aece0 .reduce/or L_0x11ae9c0; +L_0x11aee30 .part L_0x11be190, 12, 1; +L_0x11aeed0 .part o0x2ab1a621b5a8, 12, 1; +L_0x11aefe0 .part o0x2ab1a621b608, 12, 1; +L_0x11af080 .concat8 [ 1 1 1 1], L_0x11aee30, L_0x11aeed0, L_0x11aefe0, L_0x11af270; +L_0x11af270 .part o0x2ab1a621b128, 12, 1; +L_0x11af360 .reduce/or L_0x11af080; +L_0x11af4e0 .part L_0x11be190, 13, 1; +L_0x11af580 .part o0x2ab1a621b5a8, 13, 1; +L_0x11af750 .part o0x2ab1a621b608, 13, 1; +L_0x11af7f0 .concat8 [ 1 1 1 1], L_0x11af4e0, L_0x11af580, L_0x11af750, L_0x11af6b0; +L_0x11af6b0 .part o0x2ab1a621b128, 13, 1; +L_0x11afad0 .reduce/or L_0x11af7f0; +L_0x11af940 .part L_0x11be190, 14, 1; +L_0x11afc30 .part o0x2ab1a621b5a8, 14, 1; +L_0x11afb70 .part o0x2ab1a621b608, 14, 1; +L_0x11afda0 .concat8 [ 1 1 1 1], L_0x11af940, L_0x11afc30, L_0x11afb70, L_0x11afcd0; +L_0x11afcd0 .part o0x2ab1a621b128, 14, 1; +L_0x11b00c0 .reduce/or L_0x11afda0; +L_0x11aff90 .part v0x11932a0_0, 0, 1; +L_0x11b02a0 .part v0x11932a0_0, 1, 1; +L_0x11b01b0 .part v0x11932a0_0, 2, 1; +L_0x11b0490 .part v0x11932a0_0, 3, 1; +L_0x11b0390 .part v0x1193cb0_0, 0, 1; +L_0x11b06d0 .part v0x1193cb0_0, 1, 1; +L_0x11b05c0 .part v0x1193cb0_0, 2, 1; +L_0x11b0890 .part v0x1193cb0_0, 3, 1; +L_0x11b0770 .part v0x1193af0_0, 0, 1; +L_0x11b0af0 .part v0x1193af0_0, 1, 1; +L_0x11b09c0 .part v0x1193af0_0, 2, 1; +L_0x11b0cd0 .part v0x1193af0_0, 3, 1; +L_0x11b0b90 .part v0x1193a10_0, 0, 1; +L_0x11b0ec0 .part v0x1193a10_0, 1, 1; +L_0x11b0d70 .part v0x1193a10_0, 2, 1; +L_0x11b0e10 .part v0x1193a10_0, 3, 1; +L_0x11b0f60 .array/port v0x11927e0, L_0x11b12c0; +L_0x11b12c0 .concat [ 4 2 0 0], v0x118f9d0_0, L_0x2ab1a62480f0; +LS_0x11b11d0_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_2, L_0x11b0d70, L_0x11b09c0, L_0x11b05c0; +LS_0x11b11d0_0_4 .concat8 [ 1 0 0 0], L_0x11b01b0; +L_0x11b11d0 .concat8 [ 14 1 0 0], LS_0x11b11d0_0_0, LS_0x11b11d0_0_4; +LS_0x11b16e0_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_3, L_0x11b0e10, L_0x11b0cd0, L_0x11b0890; +LS_0x11b16e0_0_4 .concat8 [ 1 0 0 0], L_0x11b0490; +L_0x11b16e0 .concat8 [ 14 1 0 0], LS_0x11b16e0_0_0, LS_0x11b16e0_0_4; +LS_0x11b1420_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_0, L_0x11b0b90, L_0x11b0770, L_0x11b0390; +LS_0x11b1420_0_4 .concat8 [ 1 0 0 0], L_0x11aff90; +L_0x11b1420 .concat8 [ 14 1 0 0], LS_0x11b1420_0_0, LS_0x11b1420_0_4; +LS_0x11b1c90_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_1, L_0x11b0ec0, L_0x11b0af0, L_0x11b06d0; +LS_0x11b1c90_0_4 .concat8 [ 1 0 0 0], L_0x11b02a0; +L_0x11b1c90 .concat8 [ 14 1 0 0], LS_0x11b1c90_0_0, LS_0x11b1c90_0_4; +L_0x11b1980 .part L_0x11aef70, 14, 4; +L_0x11b20a0 .part L_0x11aef70, 11, 3; +L_0x11b1eb0 .part L_0x11aef70, 8, 3; +L_0x11b22f0 .part L_0x11aef70, 10, 4; +L_0x11b2140 .part L_0x11aef70, 0, 11; +S_0x11940f0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x10ca9f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1194310 .param/str "memFile" 0 3 60, "regTest/up.dat"; +L_0x11b1fe0 .functor BUFZ 11, v0x1194540_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11b2230 .functor BUFZ 11, v0x1194540_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11b3070 .functor BUFZ 18, L_0x11b5010, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1194540_0 .var/s "ACC", 10 0; +v0x1194640_0 .var/s "BAK", 10 0; +v0x1194720_0 .net "DST", 2 0, L_0x11b6150; 1 drivers +v0x11947e0_0 .net/s "IMM", 10 0, L_0x11b61f0; 1 drivers +v0x11948c0_0 .net "INST", 3 0, L_0x11b5a30; 1 drivers +v0x11949f0_0 .net "LABEL", 3 0, L_0x11b63a0; 1 drivers +v0x1194ad0_0 .var "PC", 3 0; +v0x1194bb0_0 .var "PCNEXT", 3 0; +v0x1194c90_0 .net "SRC", 2 0, L_0x11b5f60; 1 drivers +v0x1194e00_0 .net *"_s103", 0 0, L_0x11b4350; 1 drivers +v0x1194ee0_0 .net *"_s107", 0 0, L_0x11b4260; 1 drivers +v0x1194fc0_0 .net *"_s111", 0 0, L_0x11b4540; 1 drivers +v0x11950a0_0 .net *"_s115", 0 0, L_0x11b4440; 1 drivers +v0x1195180_0 .net *"_s119", 0 0, L_0x11b4780; 1 drivers +v0x1195260_0 .net *"_s123", 0 0, L_0x11b4670; 1 drivers +v0x1195340_0 .net *"_s127", 0 0, L_0x11b4940; 1 drivers +v0x1195420_0 .net *"_s131", 0 0, L_0x11b4820; 1 drivers +v0x11955d0_0 .net *"_s135", 0 0, L_0x11b4ba0; 1 drivers +v0x1195670_0 .net *"_s139", 0 0, L_0x11b4a70; 1 drivers +v0x1195750_0 .net *"_s143", 0 0, L_0x11b4d80; 1 drivers +v0x1195830_0 .net *"_s147", 0 0, L_0x11b4c40; 1 drivers +v0x1195910_0 .net *"_s151", 0 0, L_0x11b4f70; 1 drivers +v0x11959f0_0 .net *"_s155", 0 0, L_0x11b4e20; 1 drivers +v0x1195ad0_0 .net *"_s159", 0 0, L_0x11b4ec0; 1 drivers +v0x1195bb0_0 .net *"_s160", 17 0, L_0x11b5010; 1 drivers +v0x1195c90_0 .net *"_s162", 5 0, L_0x11b5370; 1 drivers +L_0x2ab1a6248180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1195d70_0 .net *"_s165", 1 0, L_0x2ab1a6248180; 1 drivers +v0x1197d30_2 .array/port v0x1197d30, 2; +v0x1195e50_0 .net *"_s173", 10 0, v0x1197d30_2; 1 drivers +v0x1197d30_3 .array/port v0x1197d30, 3; +v0x1195f30_0 .net *"_s179", 10 0, v0x1197d30_3; 1 drivers +v0x1197d30_0 .array/port v0x1197d30, 0; +v0x1196010_0 .net *"_s185", 10 0, v0x1197d30_0; 1 drivers +v0x1197d30_1 .array/port v0x1197d30, 1; +v0x11960f0_0 .net *"_s191", 10 0, v0x1197d30_1; 1 drivers +v0x11961d0_0 .net *"_s23", 0 0, L_0x11b2830; 1 drivers +v0x11962b0_0 .net *"_s27", 0 0, L_0x11b2950; 1 drivers +v0x1195500_0 .net *"_s31", 0 0, L_0x11b2a40; 1 drivers +v0x1196580_0 .net *"_s36", 0 0, L_0x11b2d10; 1 drivers +v0x1196660_0 .net *"_s42", 0 0, L_0x11b2f30; 1 drivers +v0x1196740_0 .net *"_s46", 0 0, L_0x11b2fd0; 1 drivers +v0x1196820_0 .net *"_s50", 0 0, L_0x11b30e0; 1 drivers +v0x1196900_0 .net *"_s55", 0 0, L_0x11b3320; 1 drivers +v0x11969e0_0 .net *"_s61", 0 0, L_0x11b3590; 1 drivers +v0x1196ac0_0 .net *"_s65", 0 0, L_0x11b36c0; 1 drivers +v0x1196ba0_0 .net *"_s69", 0 0, L_0x11b3890; 1 drivers +v0x1196c80_0 .net *"_s74", 0 0, L_0x11b37f0; 1 drivers +v0x1196d60_0 .net *"_s80", 0 0, L_0x11b3a30; 1 drivers +v0x1196e40_0 .net *"_s84", 0 0, L_0x11b3ce0; 1 drivers +v0x1196f20_0 .net *"_s88", 0 0, L_0x11b3c20; 1 drivers +v0x1197000_0 .net *"_s93", 0 0, L_0x11b3d80; 1 drivers +v0x11970e0_0 .net *"_s99", 0 0, L_0x11b4040; 1 drivers +v0x11971c0_0 .net/s "accOut", 10 0, L_0x11b1fe0; alias, 1 drivers +v0x11972a0_0 .net "anyHasData", 0 0, L_0x11b2e90; 1 drivers +v0x1197360_0 .net "anyReadAck", 0 0, L_0x11b3b30; 1 drivers +v0x1197420_0 .net "anyWantData", 0 0, L_0x11b3410; 1 drivers +v0x11974e0_0 .net "anyWriteAck", 0 0, L_0x11b4170; 1 drivers +v0x11975a0_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers +v0x11976d0_0 .net "down", 14 0, L_0x11bd4f0; alias, 1 drivers +v0x1197790_0 .net "downOut", 14 0, L_0x11b5790; alias, 1 drivers +v0x1197830_0 .net "instruction", 17 0, L_0x11b3070; 1 drivers +v0x11978f0 .array "instructions", 15 0, 17 0; +v0x11979b0_0 .var "last", 2 0; +o0x2ab1a621c3b8 .functor BUFZ 15, C4; HiZ drive +v0x1197a90_0 .net "left", 14 0, o0x2ab1a621c3b8; 0 drivers +v0x1197b70_0 .net "leftOut", 14 0, L_0x11b54d0; 1 drivers +v0x1197c50_0 .var "mode", 2 0; +v0x1197d30 .array/s "outVals", 2 5, 10 0; +v0x1197ea0_0 .var "phase", 2 0; +v0x1197f80_0 .net "portsHaveData", 5 2, L_0x11b2b30; 1 drivers +v0x1196350_0 .net "portsWantData", 5 2, L_0x11b3180; 1 drivers +v0x1196430_0 .net "readAckIn", 5 2, L_0x11b3930; 1 drivers +v0x1198430_0 .var "readAckOut", 5 2; +v0x11984d0_0 .var "readTarget", 2 0; +v0x1198570_0 .var/s "readValue", 10 0; +L_0x2ab1a6248138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1198610 .array "regVals", 0 7; +v0x1198610_0 .net/s v0x1198610 0, 10 0, L_0x2ab1a6248138; 1 drivers +v0x1198610_1 .net/s v0x1198610 1, 10 0, L_0x11b2230; 1 drivers +v0x1198610_2 .net/s v0x1198610 2, 10 0, L_0x11b2550; 1 drivers +v0x1198610_3 .net/s v0x1198610 3, 10 0, L_0x11b25f0; 1 drivers +v0x1198610_4 .net/s v0x1198610 4, 10 0, L_0x11b2690; 1 drivers +v0x1198610_5 .net/s v0x1198610 5, 10 0, L_0x11b2730; 1 drivers +o0x2ab1a621c778 .functor BUFZ 11, C4; HiZ drive +v0x1198610_6 .net/s v0x1198610 6, 10 0, o0x2ab1a621c778; 0 drivers +o0x2ab1a621c7a8 .functor BUFZ 11, C4; HiZ drive +v0x1198610_7 .net/s v0x1198610 7, 10 0, o0x2ab1a621c7a8; 0 drivers +o0x2ab1a621c7d8 .functor BUFZ 15, C4; HiZ drive +v0x1198820_0 .net "right", 14 0, o0x2ab1a621c7d8; 0 drivers +v0x1198900_0 .net "rightOut", 14 0, L_0x11b5d40; 1 drivers +o0x2ab1a621c838 .functor BUFZ 15, C4; HiZ drive +v0x11989e0_0 .net "up", 14 0, o0x2ab1a621c838; 0 drivers +v0x1198ac0_0 .net "upOut", 14 0, L_0x11b5280; 1 drivers +v0x1198ba0_0 .var "weHaveData", 5 2; +v0x1198c80_0 .var "weWantData", 5 2; +v0x1198d60_0 .net "writeAckIn", 5 2, L_0x11b3e50; 1 drivers +v0x1198e40_0 .var "writeAckOut", 5 2; +v0x1198f20_0 .var "writeTarget", 2 0; +v0x1199000_0 .var/s "writeValue", 10 0; +L_0x11b2550 .part o0x2ab1a621c3b8, 0, 11; +L_0x11b25f0 .part o0x2ab1a621c7d8, 0, 11; +L_0x11b2690 .part o0x2ab1a621c838, 0, 11; +L_0x11b2730 .part L_0x11bd4f0, 0, 11; +L_0x11b2830 .part o0x2ab1a621c3b8, 11, 1; +L_0x11b2950 .part o0x2ab1a621c7d8, 11, 1; +L_0x11b2a40 .part o0x2ab1a621c838, 11, 1; +L_0x11b2b30 .concat8 [ 1 1 1 1], L_0x11b2830, L_0x11b2950, L_0x11b2a40, L_0x11b2d10; +L_0x11b2d10 .part L_0x11bd4f0, 11, 1; +L_0x11b2e90 .reduce/or L_0x11b2b30; +L_0x11b2f30 .part o0x2ab1a621c3b8, 12, 1; +L_0x11b2fd0 .part o0x2ab1a621c7d8, 12, 1; +L_0x11b30e0 .part o0x2ab1a621c838, 12, 1; +L_0x11b3180 .concat8 [ 1 1 1 1], L_0x11b2f30, L_0x11b2fd0, L_0x11b30e0, L_0x11b3320; +L_0x11b3320 .part L_0x11bd4f0, 12, 1; +L_0x11b3410 .reduce/or L_0x11b3180; +L_0x11b3590 .part o0x2ab1a621c3b8, 13, 1; +L_0x11b36c0 .part o0x2ab1a621c7d8, 13, 1; +L_0x11b3890 .part o0x2ab1a621c838, 13, 1; +L_0x11b3930 .concat8 [ 1 1 1 1], L_0x11b3590, L_0x11b36c0, L_0x11b3890, L_0x11b37f0; +L_0x11b37f0 .part L_0x11bd4f0, 13, 1; +L_0x11b3b30 .reduce/or L_0x11b3930; +L_0x11b3a30 .part o0x2ab1a621c3b8, 14, 1; +L_0x11b3ce0 .part o0x2ab1a621c7d8, 14, 1; +L_0x11b3c20 .part o0x2ab1a621c838, 14, 1; +L_0x11b3e50 .concat8 [ 1 1 1 1], L_0x11b3a30, L_0x11b3ce0, L_0x11b3c20, L_0x11b3d80; +L_0x11b3d80 .part L_0x11bd4f0, 14, 1; +L_0x11b4170 .reduce/or L_0x11b3e50; +L_0x11b4040 .part v0x1198430_0, 0, 1; +L_0x11b4350 .part v0x1198430_0, 1, 1; +L_0x11b4260 .part v0x1198430_0, 2, 1; +L_0x11b4540 .part v0x1198430_0, 3, 1; +L_0x11b4440 .part v0x1198e40_0, 0, 1; +L_0x11b4780 .part v0x1198e40_0, 1, 1; +L_0x11b4670 .part v0x1198e40_0, 2, 1; +L_0x11b4940 .part v0x1198e40_0, 3, 1; +L_0x11b4820 .part v0x1198c80_0, 0, 1; +L_0x11b4ba0 .part v0x1198c80_0, 1, 1; +L_0x11b4a70 .part v0x1198c80_0, 2, 1; +L_0x11b4d80 .part v0x1198c80_0, 3, 1; +L_0x11b4c40 .part v0x1198ba0_0, 0, 1; +L_0x11b4f70 .part v0x1198ba0_0, 1, 1; +L_0x11b4e20 .part v0x1198ba0_0, 2, 1; +L_0x11b4ec0 .part v0x1198ba0_0, 3, 1; +L_0x11b5010 .array/port v0x11978f0, L_0x11b5370; +L_0x11b5370 .concat [ 4 2 0 0], v0x1194ad0_0, L_0x2ab1a6248180; +LS_0x11b5280_0_0 .concat8 [ 11 1 1 1], v0x1197d30_2, L_0x11b4e20, L_0x11b4a70, L_0x11b4670; +LS_0x11b5280_0_4 .concat8 [ 1 0 0 0], L_0x11b4260; +L_0x11b5280 .concat8 [ 14 1 0 0], LS_0x11b5280_0_0, LS_0x11b5280_0_4; +LS_0x11b5790_0_0 .concat8 [ 11 1 1 1], v0x1197d30_3, L_0x11b4ec0, L_0x11b4d80, L_0x11b4940; +LS_0x11b5790_0_4 .concat8 [ 1 0 0 0], L_0x11b4540; +L_0x11b5790 .concat8 [ 14 1 0 0], LS_0x11b5790_0_0, LS_0x11b5790_0_4; +LS_0x11b54d0_0_0 .concat8 [ 11 1 1 1], v0x1197d30_0, L_0x11b4c40, L_0x11b4820, L_0x11b4440; +LS_0x11b54d0_0_4 .concat8 [ 1 0 0 0], L_0x11b4040; +L_0x11b54d0 .concat8 [ 14 1 0 0], LS_0x11b54d0_0_0, LS_0x11b54d0_0_4; +LS_0x11b5d40_0_0 .concat8 [ 11 1 1 1], v0x1197d30_1, L_0x11b4f70, L_0x11b4ba0, L_0x11b4780; +LS_0x11b5d40_0_4 .concat8 [ 1 0 0 0], L_0x11b4350; +L_0x11b5d40 .concat8 [ 14 1 0 0], LS_0x11b5d40_0_0, LS_0x11b5d40_0_4; +L_0x11b5a30 .part L_0x11b3070, 14, 4; +L_0x11b6150 .part L_0x11b3070, 11, 3; +L_0x11b5f60 .part L_0x11b3070, 8, 3; +L_0x11b63a0 .part L_0x11b3070, 10, 4; +L_0x11b61f0 .part L_0x11b3070, 0, 11; + .scope S_0x1189e80; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x118d930_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x118db50_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x118d690_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x118a300_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x118a400_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118a890_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118e0e0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118e9d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118eb90_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118e8f0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x118da10, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x118da10, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x118da10, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x118da10, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x118a080, v0x118d5d0 {0 0 0}; + %end; + .thread T_0; + .scope S_0x1189e80; +T_1 ; + %wait E_0x10fe030; + %load/vec4 v0x118d930_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.2, 6; + %jmp T_1.3; +T_1.0 ; + %load/vec4 v0x118db50_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.6, 6; + %jmp T_1.7; +T_1.4 ; + %load/vec4 v0x118a680_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_1.8, 5; + %load/vec4 v0x118aa50_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_1.10, 5; + %load/vec4 v0x118aa50_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %jmp T_1.11; +T_1.10 ; + %load/vec4 v0x118aa50_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_1.12, 5; + %load/vec4 v0x118dc30_0; + %load/vec4 v0x118aa50_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.14, 8; + %load/vec4 v0x118aa50_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118aa50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %load/vec4 v0x118aa50_0; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.15; +T_1.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %load/vec4 v0x118aa50_0; + %assign/vec4 v0x118e1c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118aa50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %load/vec4 v0x118aa50_0; + %assign/vec4 v0x118d690_0, 0; +T_1.15 ; + %jmp T_1.13; +T_1.12 ; + %load/vec4 v0x118aa50_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.16, 4; + %load/vec4 v0x118d690_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_1.18, 4; + %load/vec4 v0x118d690_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %jmp T_1.19; +T_1.18 ; + %load/vec4 v0x118dc30_0; + %load/vec4 v0x118d690_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.20, 8; + %load/vec4 v0x118d690_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118d690_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %jmp T_1.21; +T_1.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %load/vec4 v0x118d690_0; + %assign/vec4 v0x118e1c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118d690_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; +T_1.21 ; +T_1.19 ; + %jmp T_1.17; +T_1.16 ; + %load/vec4 v0x118aa50_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.22, 4; + %load/vec4 v0x118cf40_0; + %flag_set/vec4 8; + %jmp/0xz T_1.24, 8; + %load/vec4 v0x118dc30_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.27; +T_1.26 ; + %load/vec4 v0x118dc30_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.29; +T_1.28 ; + %load/vec4 v0x118dc30_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.31; +T_1.30 ; + %load/vec4 v0x118dc30_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x118d690_0, 0; +T_1.32 ; +T_1.31 ; +T_1.29 ; +T_1.27 ; + %jmp T_1.25; +T_1.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %load/vec4 v0x118aa50_0; + %assign/vec4 v0x118e1c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; +T_1.25 ; +T_1.22 ; +T_1.17 ; +T_1.13 ; +T_1.11 ; +T_1.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.7; +T_1.5 ; + %load/vec4 v0x118a680_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_1.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_1.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_1.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_1.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_1.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_1.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_1.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_1.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_1.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_1.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_1.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_1.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_1.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_1.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_1.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_1.49, 6; + %jmp T_1.50; +T_1.34 ; + %load/vec4 v0x118a300_0; + %load/vec4 v0x118e2a0_0; + %add; + %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.35 ; + %load/vec4 v0x118a300_0; + %load/vec4 v0x118e2a0_0; + %sub; + %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.36 ; + %load/vec4 v0x118a890_0; + %pad/u 11; + %load/vec4 v0x118e2a0_0; + %add; + %pad/u 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.37 ; + %load/vec4 v0x118e2a0_0; + %assign/vec4 v0x118ed50_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.38 ; + %load/vec4 v0x118a5a0_0; + %assign/vec4 v0x118ed50_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.39 ; + %load/vec4 v0x118a300_0; + %load/vec4 v0x118a5a0_0; + %add; + %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.40 ; + %load/vec4 v0x118a300_0; + %load/vec4 v0x118a5a0_0; + %sub; + %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.41 ; + %load/vec4 v0x118a890_0; + %pad/u 11; + %load/vec4 v0x118a5a0_0; + %add; + %pad/u 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.42 ; + %load/vec4 v0x118a400_0; + %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x118a300_0; + %assign/vec4 v0x118a400_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.43 ; + %load/vec4 v0x118a300_0; + %assign/vec4 v0x118a400_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.44 ; + %load/vec4 v0x118a300_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.45 ; + %load/vec4 v0x118a7b0_0; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.50; +T_1.46 ; + %load/vec4 v0x118a300_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_1.51, 4; + %load/vec4 v0x118a7b0_0; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.52; +T_1.51 ; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; +T_1.52 ; + %jmp T_1.50; +T_1.47 ; + %load/vec4 v0x118a300_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_1.53, 4; + %load/vec4 v0x118a7b0_0; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.54; +T_1.53 ; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; +T_1.54 ; + %jmp T_1.50; +T_1.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x118a300_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_1.55, 5; + %load/vec4 v0x118a7b0_0; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.56; +T_1.55 ; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; +T_1.56 ; + %jmp T_1.50; +T_1.49 ; + %load/vec4 v0x118a300_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_1.57, 5; + %load/vec4 v0x118a7b0_0; + %assign/vec4 v0x118a970_0, 0; + %jmp T_1.58; +T_1.57 ; + %load/vec4 v0x118a890_0; + %addi 1, 0, 4; + %assign/vec4 v0x118a970_0, 0; +T_1.58 ; + %jmp T_1.50; +T_1.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.7; +T_1.6 ; + %load/vec4 v0x118a680_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x118a680_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_1.59, 4; + %load/vec4 v0x118a4e0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x118a4e0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x118d690_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_1.61, 9; + %load/vec4 v0x118a4e0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_1.63, 4; + %load/vec4 v0x118ed50_0; + %assign/vec4 v0x118a300_0, 0; +T_1.63 ; + %jmp T_1.62; +T_1.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %load/vec4 v0x118a4e0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.65, 4; + %load/vec4 v0x118d690_0; + %assign/vec4 v0x118ec70_0, 0; + %load/vec4 v0x118ed50_0; + %load/vec4 v0x118d690_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118d690_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %jmp T_1.66; +T_1.65 ; + %load/vec4 v0x118a4e0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.67, 4; + %load/vec4 v0x118a4e0_0; + %assign/vec4 v0x118ec70_0, 0; + %load/vec4 v0x118ed50_0; + %load/vec4 v0x118a4e0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118a4e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118a4e0_0; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.68; +T_1.67 ; + %load/vec4 v0x118d0c0_0; + %flag_set/vec4 8; + %jmp/0xz T_1.69, 8; + %load/vec4 v0x118c030_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.72; +T_1.71 ; + %load/vec4 v0x118c030_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.74; +T_1.73 ; + %load/vec4 v0x118c030_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.76; +T_1.75 ; + %load/vec4 v0x118c030_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x118d690_0, 0; +T_1.77 ; +T_1.76 ; +T_1.74 ; +T_1.72 ; + %jmp T_1.70; +T_1.69 ; + %load/vec4 v0x118a4e0_0; + %assign/vec4 v0x118ec70_0, 0; +T_1.70 ; +T_1.68 ; +T_1.66 ; +T_1.62 ; +T_1.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.7; +T_1.7 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.1 ; + %load/vec4 v0x118db50_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.81, 6; + %jmp T_1.82; +T_1.79 ; + %load/vec4 v0x118e1c0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.83, 4; + %load/vec4 v0x118cf40_0; + %flag_set/vec4 8; + %jmp/0xz T_1.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118e9d0_0, 0, 4; + %load/vec4 v0x118dc30_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.88; +T_1.87 ; + %load/vec4 v0x118dc30_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.90; +T_1.89 ; + %load/vec4 v0x118dc30_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.92; +T_1.91 ; + %load/vec4 v0x118dc30_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x118d690_0, 0; +T_1.93 ; +T_1.92 ; +T_1.90 ; +T_1.88 ; +T_1.85 ; + %jmp T_1.84; +T_1.83 ; + %load/vec4 v0x118dc30_0; + %load/vec4 v0x118e1c0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %load/vec4 v0x118e1c0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x118e380, 4; + %assign/vec4 v0x118e2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118e1c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118e1c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %load/vec4 v0x118e1c0_0; + %assign/vec4 v0x118d690_0, 0; +T_1.95 ; +T_1.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.82; +T_1.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.82; +T_1.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.82; +T_1.82 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.2 ; + %load/vec4 v0x118db50_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.99, 6; + %jmp T_1.100; +T_1.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.100; +T_1.98 ; + %load/vec4 v0x118ec70_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.101, 4; + %load/vec4 v0x118d0c0_0; + %flag_set/vec4 8; + %jmp/0xz T_1.103, 8; + %load/vec4 v0x118c030_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.106; +T_1.105 ; + %load/vec4 v0x118c030_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.108; +T_1.107 ; + %load/vec4 v0x118c030_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x118d690_0, 0; + %jmp T_1.110; +T_1.109 ; + %load/vec4 v0x118c030_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x118ec70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %load/vec4 v0x118ed50_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x118da10, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x118d690_0, 0; +T_1.111 ; +T_1.110 ; +T_1.108 ; +T_1.106 ; +T_1.103 ; +T_1.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.100; +T_1.99 ; + %load/vec4 v0x118ec70_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.113, 4; + %load/vec4 v0x118eab0_0; + %load/vec4 v0x118ec70_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x118ec70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x118e8f0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x118d930_0, 0; + %load/vec4 v0x118ec70_0; + %assign/vec4 v0x118d690_0, 0; +T_1.115 ; +T_1.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x118db50_0, 0; + %jmp T_1.100; +T_1.100 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.3 ; + %pop/vec4 1; + %jmp T_1; + .thread T_1; + .scope S_0x1189e80; +T_2 ; + %wait E_0x10db880; + %load/vec4 v0x118db50_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x118d930_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x118a970_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_2.0, 8; + %load/vec4 v0x118a970_0; + %assign/vec4 v0x118a890_0, 0; +T_2.0 ; + %load/vec4 v0x118db50_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_2.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118e0e0_0, 0, 4; +T_2.2 ; + %jmp T_2; + .thread T_2; + .scope S_0x118efd0; +T_3 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1192ae0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1192d10_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11928a0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x118f490_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x118f590_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x118f9d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x11932a0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1193af0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1193cb0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1193a10_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1192ba0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1192ba0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1192ba0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1192ba0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x118f1a0, v0x11927e0 {0 0 0}; + %end; + .thread T_3; + .scope S_0x118efd0; +T_4 ; + %wait E_0x10fe030; + %load/vec4 v0x1192ae0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x1192d10_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.6, 6; + %jmp T_4.7; +T_4.4 ; + %load/vec4 v0x118f810_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x118fb90_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_4.10, 5; + %load/vec4 v0x118fb90_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %jmp T_4.11; +T_4.10 ; + %load/vec4 v0x118fb90_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_4.12, 5; + %load/vec4 v0x1192df0_0; + %load/vec4 v0x118fb90_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.14, 8; + %load/vec4 v0x118fb90_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118fb90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %load/vec4 v0x118fb90_0; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.15; +T_4.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %load/vec4 v0x118fb90_0; + %assign/vec4 v0x1193340_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118fb90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1193af0_0, 4, 5; + %load/vec4 v0x118fb90_0; + %assign/vec4 v0x11928a0_0, 0; +T_4.15 ; + %jmp T_4.13; +T_4.12 ; + %load/vec4 v0x118fb90_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.16, 4; + %load/vec4 v0x11928a0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_4.18, 4; + %load/vec4 v0x11928a0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %jmp T_4.19; +T_4.18 ; + %load/vec4 v0x1192df0_0; + %load/vec4 v0x11928a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.20, 8; + %load/vec4 v0x11928a0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11928a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %jmp T_4.21; +T_4.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %load/vec4 v0x11928a0_0; + %assign/vec4 v0x1193340_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11928a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1193af0_0, 4, 5; +T_4.21 ; +T_4.19 ; + %jmp T_4.17; +T_4.16 ; + %load/vec4 v0x118fb90_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.22, 4; + %load/vec4 v0x11921a0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.24, 8; + %load/vec4 v0x1192df0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.27; +T_4.26 ; + %load/vec4 v0x1192df0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.29; +T_4.28 ; + %load/vec4 v0x1192df0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.31; +T_4.30 ; + %load/vec4 v0x1192df0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11928a0_0, 0; +T_4.32 ; +T_4.31 ; +T_4.29 ; +T_4.27 ; + %jmp T_4.25; +T_4.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %load/vec4 v0x118fb90_0; + %assign/vec4 v0x1193340_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193af0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193af0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193af0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193af0_0, 4, 5; +T_4.25 ; +T_4.22 ; +T_4.17 ; +T_4.13 ; +T_4.11 ; +T_4.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.7; +T_4.5 ; + %load/vec4 v0x118f810_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_4.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_4.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_4.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_4.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_4.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_4.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_4.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_4.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_4.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_4.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_4.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_4.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_4.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_4.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_4.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_4.49, 6; + %jmp T_4.50; +T_4.34 ; + %load/vec4 v0x118f490_0; + %load/vec4 v0x11933e0_0; + %add; + %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.35 ; + %load/vec4 v0x118f490_0; + %load/vec4 v0x11933e0_0; + %sub; + %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.36 ; + %load/vec4 v0x118f9d0_0; + %pad/u 11; + %load/vec4 v0x11933e0_0; + %add; + %pad/u 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.37 ; + %load/vec4 v0x11933e0_0; + %assign/vec4 v0x1193e70_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.38 ; + %load/vec4 v0x118f730_0; + %assign/vec4 v0x1193e70_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.39 ; + %load/vec4 v0x118f490_0; + %load/vec4 v0x118f730_0; + %add; + %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.40 ; + %load/vec4 v0x118f490_0; + %load/vec4 v0x118f730_0; + %sub; + %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.41 ; + %load/vec4 v0x118f9d0_0; + %pad/u 11; + %load/vec4 v0x118f730_0; + %add; + %pad/u 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.42 ; + %load/vec4 v0x118f590_0; + %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x118f490_0; + %assign/vec4 v0x118f590_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.43 ; + %load/vec4 v0x118f490_0; + %assign/vec4 v0x118f590_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.44 ; + %load/vec4 v0x118f490_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.45 ; + %load/vec4 v0x118f8f0_0; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.50; +T_4.46 ; + %load/vec4 v0x118f490_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_4.51, 4; + %load/vec4 v0x118f8f0_0; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.52; +T_4.51 ; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; +T_4.52 ; + %jmp T_4.50; +T_4.47 ; + %load/vec4 v0x118f490_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_4.53, 4; + %load/vec4 v0x118f8f0_0; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.54; +T_4.53 ; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; +T_4.54 ; + %jmp T_4.50; +T_4.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x118f490_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_4.55, 5; + %load/vec4 v0x118f8f0_0; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.56; +T_4.55 ; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; +T_4.56 ; + %jmp T_4.50; +T_4.49 ; + %load/vec4 v0x118f490_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_4.57, 5; + %load/vec4 v0x118f8f0_0; + %assign/vec4 v0x118fab0_0, 0; + %jmp T_4.58; +T_4.57 ; + %load/vec4 v0x118f9d0_0; + %addi 1, 0, 4; + %assign/vec4 v0x118fab0_0, 0; +T_4.58 ; + %jmp T_4.50; +T_4.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.7; +T_4.6 ; + %load/vec4 v0x118f810_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x118f810_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_4.59, 4; + %load/vec4 v0x118f670_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x118f670_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x11928a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_4.61, 9; + %load/vec4 v0x118f670_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_4.63, 4; + %load/vec4 v0x1193e70_0; + %assign/vec4 v0x118f490_0, 0; +T_4.63 ; + %jmp T_4.62; +T_4.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %load/vec4 v0x118f670_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.65, 4; + %load/vec4 v0x11928a0_0; + %assign/vec4 v0x1193d90_0, 0; + %load/vec4 v0x1193e70_0; + %load/vec4 v0x11928a0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11928a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %jmp T_4.66; +T_4.65 ; + %load/vec4 v0x118f670_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.67, 4; + %load/vec4 v0x118f670_0; + %assign/vec4 v0x1193d90_0, 0; + %load/vec4 v0x1193e70_0; + %load/vec4 v0x118f670_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x118f670_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x118f670_0; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.68; +T_4.67 ; + %load/vec4 v0x1192320_0; + %flag_set/vec4 8; + %jmp/0xz T_4.69, 8; + %load/vec4 v0x1191250_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.72; +T_4.71 ; + %load/vec4 v0x1191250_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.74; +T_4.73 ; + %load/vec4 v0x1191250_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.76; +T_4.75 ; + %load/vec4 v0x1191250_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11928a0_0, 0; +T_4.77 ; +T_4.76 ; +T_4.74 ; +T_4.72 ; + %jmp T_4.70; +T_4.69 ; + %load/vec4 v0x118f670_0; + %assign/vec4 v0x1193d90_0, 0; +T_4.70 ; +T_4.68 ; +T_4.66 ; +T_4.62 ; +T_4.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.7; +T_4.7 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.1 ; + %load/vec4 v0x1192d10_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.81, 6; + %jmp T_4.82; +T_4.79 ; + %load/vec4 v0x1193340_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.83, 4; + %load/vec4 v0x11921a0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1193af0_0, 0, 4; + %load/vec4 v0x1192df0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.88; +T_4.87 ; + %load/vec4 v0x1192df0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.90; +T_4.89 ; + %load/vec4 v0x1192df0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.92; +T_4.91 ; + %load/vec4 v0x1192df0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11928a0_0, 0; +T_4.93 ; +T_4.92 ; +T_4.90 ; +T_4.88 ; +T_4.85 ; + %jmp T_4.84; +T_4.83 ; + %load/vec4 v0x1192df0_0; + %load/vec4 v0x1193340_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %load/vec4 v0x1193340_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1193480, 4; + %assign/vec4 v0x11933e0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1193340_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x11932a0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1193340_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1193af0_0, 4, 5; + %load/vec4 v0x1193340_0; + %assign/vec4 v0x11928a0_0, 0; +T_4.95 ; +T_4.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.82; +T_4.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.82; +T_4.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.82; +T_4.82 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.2 ; + %load/vec4 v0x1192d10_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.99, 6; + %jmp T_4.100; +T_4.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.100; +T_4.98 ; + %load/vec4 v0x1193d90_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.101, 4; + %load/vec4 v0x1192320_0; + %flag_set/vec4 8; + %jmp/0xz T_4.103, 8; + %load/vec4 v0x1191250_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.106; +T_4.105 ; + %load/vec4 v0x1191250_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.108; +T_4.107 ; + %load/vec4 v0x1191250_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11928a0_0, 0; + %jmp T_4.110; +T_4.109 ; + %load/vec4 v0x1191250_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1193d90_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1193a10_0, 4, 5; + %load/vec4 v0x1193e70_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1192ba0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11928a0_0, 0; +T_4.111 ; +T_4.110 ; +T_4.108 ; +T_4.106 ; +T_4.103 ; +T_4.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.100; +T_4.99 ; + %load/vec4 v0x1193d90_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.113, 4; + %load/vec4 v0x1193bd0_0; + %load/vec4 v0x1193d90_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1193d90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1193a10_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1192ae0_0, 0; + %load/vec4 v0x1193d90_0; + %assign/vec4 v0x11928a0_0, 0; +T_4.115 ; +T_4.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1192d10_0, 0; + %jmp T_4.100; +T_4.100 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x118efd0; +T_5 ; + %wait E_0x10db880; + %load/vec4 v0x1192d10_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1192ae0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x118fab0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %load/vec4 v0x118fab0_0; + %assign/vec4 v0x118f9d0_0, 0; +T_5.0 ; + %load/vec4 v0x1192d10_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_5.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x11932a0_0, 0, 4; +T_5.2 ; + %jmp T_5; + .thread T_5; + .scope S_0x11940f0; +T_6 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1197c50_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1197ea0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11979b0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1194540_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1194640_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1194ad0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1198430_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1198c80_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1198e40_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1198ba0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1197d30, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1197d30, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1197d30, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1197d30, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x1194310, v0x11978f0 {0 0 0}; + %end; + .thread T_6; + .scope S_0x11940f0; +T_7 ; + %wait E_0x10fe030; + %load/vec4 v0x1197c50_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.2, 6; + %jmp T_7.3; +T_7.0 ; + %load/vec4 v0x1197ea0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.6, 6; + %jmp T_7.7; +T_7.4 ; + %load/vec4 v0x11948c0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_7.8, 5; + %load/vec4 v0x1194c90_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_7.10, 5; + %load/vec4 v0x1194c90_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %jmp T_7.11; +T_7.10 ; + %load/vec4 v0x1194c90_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_7.12, 5; + %load/vec4 v0x1197f80_0; + %load/vec4 v0x1194c90_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.14, 8; + %load/vec4 v0x1194c90_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1194c90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %load/vec4 v0x1194c90_0; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.15; +T_7.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %load/vec4 v0x1194c90_0; + %assign/vec4 v0x11984d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1194c90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198c80_0, 4, 5; + %load/vec4 v0x1194c90_0; + %assign/vec4 v0x11979b0_0, 0; +T_7.15 ; + %jmp T_7.13; +T_7.12 ; + %load/vec4 v0x1194c90_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.16, 4; + %load/vec4 v0x11979b0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_7.18, 4; + %load/vec4 v0x11979b0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %jmp T_7.19; +T_7.18 ; + %load/vec4 v0x1197f80_0; + %load/vec4 v0x11979b0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.20, 8; + %load/vec4 v0x11979b0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11979b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %jmp T_7.21; +T_7.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %load/vec4 v0x11979b0_0; + %assign/vec4 v0x11984d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11979b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198c80_0, 4, 5; +T_7.21 ; +T_7.19 ; + %jmp T_7.17; +T_7.16 ; + %load/vec4 v0x1194c90_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.22, 4; + %load/vec4 v0x11972a0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.24, 8; + %load/vec4 v0x1197f80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.27; +T_7.26 ; + %load/vec4 v0x1197f80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.29; +T_7.28 ; + %load/vec4 v0x1197f80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.31; +T_7.30 ; + %load/vec4 v0x1197f80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11979b0_0, 0; +T_7.32 ; +T_7.31 ; +T_7.29 ; +T_7.27 ; + %jmp T_7.25; +T_7.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %load/vec4 v0x1194c90_0; + %assign/vec4 v0x11984d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198c80_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198c80_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198c80_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198c80_0, 4, 5; +T_7.25 ; +T_7.22 ; +T_7.17 ; +T_7.13 ; +T_7.11 ; +T_7.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.7; +T_7.5 ; + %load/vec4 v0x11948c0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_7.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_7.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_7.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_7.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_7.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_7.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_7.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_7.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_7.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_7.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_7.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_7.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_7.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_7.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_7.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_7.49, 6; + %jmp T_7.50; +T_7.34 ; + %load/vec4 v0x1194540_0; + %load/vec4 v0x1198570_0; + %add; + %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.35 ; + %load/vec4 v0x1194540_0; + %load/vec4 v0x1198570_0; + %sub; + %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.36 ; + %load/vec4 v0x1194ad0_0; + %pad/u 11; + %load/vec4 v0x1198570_0; + %add; + %pad/u 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.37 ; + %load/vec4 v0x1198570_0; + %assign/vec4 v0x1199000_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.38 ; + %load/vec4 v0x11947e0_0; + %assign/vec4 v0x1199000_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.39 ; + %load/vec4 v0x1194540_0; + %load/vec4 v0x11947e0_0; + %add; + %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.40 ; + %load/vec4 v0x1194540_0; + %load/vec4 v0x11947e0_0; + %sub; + %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.41 ; + %load/vec4 v0x1194ad0_0; + %pad/u 11; + %load/vec4 v0x11947e0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.42 ; + %load/vec4 v0x1194640_0; + %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1194540_0; + %assign/vec4 v0x1194640_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.43 ; + %load/vec4 v0x1194540_0; + %assign/vec4 v0x1194640_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.44 ; + %load/vec4 v0x1194540_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.45 ; + %load/vec4 v0x11949f0_0; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.50; +T_7.46 ; + %load/vec4 v0x1194540_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_7.51, 4; + %load/vec4 v0x11949f0_0; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.52; +T_7.51 ; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; +T_7.52 ; + %jmp T_7.50; +T_7.47 ; + %load/vec4 v0x1194540_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_7.53, 4; + %load/vec4 v0x11949f0_0; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.54; +T_7.53 ; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; +T_7.54 ; + %jmp T_7.50; +T_7.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1194540_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_7.55, 5; + %load/vec4 v0x11949f0_0; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.56; +T_7.55 ; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; +T_7.56 ; + %jmp T_7.50; +T_7.49 ; + %load/vec4 v0x1194540_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_7.57, 5; + %load/vec4 v0x11949f0_0; + %assign/vec4 v0x1194bb0_0, 0; + %jmp T_7.58; +T_7.57 ; + %load/vec4 v0x1194ad0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1194bb0_0, 0; +T_7.58 ; + %jmp T_7.50; +T_7.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.7; +T_7.6 ; + %load/vec4 v0x11948c0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x11948c0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_7.59, 4; + %load/vec4 v0x1194720_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1194720_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x11979b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_7.61, 9; + %load/vec4 v0x1194720_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_7.63, 4; + %load/vec4 v0x1199000_0; + %assign/vec4 v0x1194540_0, 0; +T_7.63 ; + %jmp T_7.62; +T_7.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %load/vec4 v0x1194720_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.65, 4; + %load/vec4 v0x11979b0_0; + %assign/vec4 v0x1198f20_0, 0; + %load/vec4 v0x1199000_0; + %load/vec4 v0x11979b0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11979b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %jmp T_7.66; +T_7.65 ; + %load/vec4 v0x1194720_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.67, 4; + %load/vec4 v0x1194720_0; + %assign/vec4 v0x1198f20_0, 0; + %load/vec4 v0x1199000_0; + %load/vec4 v0x1194720_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1194720_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1194720_0; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.68; +T_7.67 ; + %load/vec4 v0x1197420_0; + %flag_set/vec4 8; + %jmp/0xz T_7.69, 8; + %load/vec4 v0x1196350_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.72; +T_7.71 ; + %load/vec4 v0x1196350_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.74; +T_7.73 ; + %load/vec4 v0x1196350_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.76; +T_7.75 ; + %load/vec4 v0x1196350_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11979b0_0, 0; +T_7.77 ; +T_7.76 ; +T_7.74 ; +T_7.72 ; + %jmp T_7.70; +T_7.69 ; + %load/vec4 v0x1194720_0; + %assign/vec4 v0x1198f20_0, 0; +T_7.70 ; +T_7.68 ; +T_7.66 ; +T_7.62 ; +T_7.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.7; +T_7.7 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.1 ; + %load/vec4 v0x1197ea0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.81, 6; + %jmp T_7.82; +T_7.79 ; + %load/vec4 v0x11984d0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.83, 4; + %load/vec4 v0x11972a0_0; + %flag_set/vec4 8; + %jmp/0xz T_7.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1198c80_0, 0, 4; + %load/vec4 v0x1197f80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.88; +T_7.87 ; + %load/vec4 v0x1197f80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.90; +T_7.89 ; + %load/vec4 v0x1197f80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.92; +T_7.91 ; + %load/vec4 v0x1197f80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11979b0_0, 0; +T_7.93 ; +T_7.92 ; +T_7.90 ; +T_7.88 ; +T_7.85 ; + %jmp T_7.84; +T_7.83 ; + %load/vec4 v0x1197f80_0; + %load/vec4 v0x11984d0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %load/vec4 v0x11984d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1198610, 4; + %assign/vec4 v0x1198570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11984d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198430_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11984d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1198c80_0, 4, 5; + %load/vec4 v0x11984d0_0; + %assign/vec4 v0x11979b0_0, 0; +T_7.95 ; +T_7.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.82; +T_7.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.82; +T_7.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.82; +T_7.82 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.2 ; + %load/vec4 v0x1197ea0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.99, 6; + %jmp T_7.100; +T_7.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.100; +T_7.98 ; + %load/vec4 v0x1198f20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.101, 4; + %load/vec4 v0x1197420_0; + %flag_set/vec4 8; + %jmp/0xz T_7.103, 8; + %load/vec4 v0x1196350_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.106; +T_7.105 ; + %load/vec4 v0x1196350_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.108; +T_7.107 ; + %load/vec4 v0x1196350_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11979b0_0, 0; + %jmp T_7.110; +T_7.109 ; + %load/vec4 v0x1196350_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1198f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %load/vec4 v0x1199000_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1197d30, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11979b0_0, 0; +T_7.111 ; +T_7.110 ; +T_7.108 ; +T_7.106 ; +T_7.103 ; +T_7.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.100; +T_7.99 ; + %load/vec4 v0x1198f20_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.113, 4; + %load/vec4 v0x1198d60_0; + %load/vec4 v0x1198f20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1198f20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1198ba0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1197c50_0, 0; + %load/vec4 v0x1198f20_0; + %assign/vec4 v0x11979b0_0, 0; +T_7.115 ; +T_7.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1197ea0_0, 0; + %jmp T_7.100; +T_7.100 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.3 ; + %pop/vec4 1; + %jmp T_7; + .thread T_7; + .scope S_0x11940f0; +T_8 ; + %wait E_0x10db880; + %load/vec4 v0x1197ea0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1197c50_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1194bb0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_8.0, 8; + %load/vec4 v0x1194bb0_0; + %assign/vec4 v0x1194ad0_0, 0; +T_8.0 ; + %load/vec4 v0x1197ea0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_8.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1198430_0, 0, 4; +T_8.2 ; + %jmp T_8; + .thread T_8; + .scope S_0x1184d50; +T_9 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11888a0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1188ac0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1188600_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x11851c0_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x11852c0_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1185750_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1189050_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1189880_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1189a40_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x11897c0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1188980, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1188980, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1188980, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1188980, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x1184f40, v0x1188540 {0 0 0}; + %end; + .thread T_9; + .scope S_0x1184d50; +T_10 ; + %wait E_0x10fe030; + %load/vec4 v0x11888a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.2, 6; + %jmp T_10.3; +T_10.0 ; + %load/vec4 v0x1188ac0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.6, 6; + %jmp T_10.7; +T_10.4 ; + %load/vec4 v0x1185540_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_10.8, 5; + %load/vec4 v0x1185910_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_10.10, 5; + %load/vec4 v0x1185910_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %jmp T_10.11; +T_10.10 ; + %load/vec4 v0x1185910_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_10.12, 5; + %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1185910_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.14, 8; + %load/vec4 v0x1185910_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1185910_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %load/vec4 v0x1185910_0; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.15; +T_10.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %load/vec4 v0x1185910_0; + %assign/vec4 v0x11890f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1185910_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1189880_0, 4, 5; + %load/vec4 v0x1185910_0; + %assign/vec4 v0x1188600_0, 0; +T_10.15 ; + %jmp T_10.13; +T_10.12 ; + %load/vec4 v0x1185910_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.16, 4; + %load/vec4 v0x1188600_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_10.18, 4; + %load/vec4 v0x1188600_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %jmp T_10.19; +T_10.18 ; + %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1188600_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.20, 8; + %load/vec4 v0x1188600_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1188600_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %jmp T_10.21; +T_10.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %load/vec4 v0x1188600_0; + %assign/vec4 v0x11890f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1188600_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1189880_0, 4, 5; +T_10.21 ; +T_10.19 ; + %jmp T_10.17; +T_10.16 ; + %load/vec4 v0x1185910_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.22, 4; + %load/vec4 v0x1187f20_0; + %flag_set/vec4 8; + %jmp/0xz T_10.24, 8; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.27; +T_10.26 ; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.29; +T_10.28 ; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.31; +T_10.30 ; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1188600_0, 0; +T_10.32 ; +T_10.31 ; +T_10.29 ; +T_10.27 ; + %jmp T_10.25; +T_10.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %load/vec4 v0x1185910_0; + %assign/vec4 v0x11890f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189880_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189880_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189880_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189880_0, 4, 5; +T_10.25 ; +T_10.22 ; +T_10.17 ; +T_10.13 ; +T_10.11 ; +T_10.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.7; +T_10.5 ; + %load/vec4 v0x1185540_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_10.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_10.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_10.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_10.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_10.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_10.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_10.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_10.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_10.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_10.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_10.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_10.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_10.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_10.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_10.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_10.49, 6; + %jmp T_10.50; +T_10.34 ; + %load/vec4 v0x11851c0_0; + %load/vec4 v0x1189190_0; + %add; + %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.35 ; + %load/vec4 v0x11851c0_0; + %load/vec4 v0x1189190_0; + %sub; + %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.36 ; + %load/vec4 v0x1185750_0; + %pad/u 11; + %load/vec4 v0x1189190_0; + %add; + %pad/u 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.37 ; + %load/vec4 v0x1189190_0; + %assign/vec4 v0x1189c00_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.38 ; + %load/vec4 v0x1185460_0; + %assign/vec4 v0x1189c00_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.39 ; + %load/vec4 v0x11851c0_0; + %load/vec4 v0x1185460_0; + %add; + %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.40 ; + %load/vec4 v0x11851c0_0; + %load/vec4 v0x1185460_0; + %sub; + %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.41 ; + %load/vec4 v0x1185750_0; + %pad/u 11; + %load/vec4 v0x1185460_0; + %add; + %pad/u 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.42 ; + %load/vec4 v0x11852c0_0; + %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x11851c0_0; + %assign/vec4 v0x11852c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.43 ; + %load/vec4 v0x11851c0_0; + %assign/vec4 v0x11852c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.44 ; + %load/vec4 v0x11851c0_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.45 ; + %load/vec4 v0x1185670_0; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.50; +T_10.46 ; + %load/vec4 v0x11851c0_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_10.51, 4; + %load/vec4 v0x1185670_0; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.52; +T_10.51 ; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; +T_10.52 ; + %jmp T_10.50; +T_10.47 ; + %load/vec4 v0x11851c0_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_10.53, 4; + %load/vec4 v0x1185670_0; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.54; +T_10.53 ; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; +T_10.54 ; + %jmp T_10.50; +T_10.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x11851c0_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_10.55, 5; + %load/vec4 v0x1185670_0; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.56; +T_10.55 ; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; +T_10.56 ; + %jmp T_10.50; +T_10.49 ; + %load/vec4 v0x11851c0_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_10.57, 5; + %load/vec4 v0x1185670_0; + %assign/vec4 v0x1185830_0, 0; + %jmp T_10.58; +T_10.57 ; + %load/vec4 v0x1185750_0; + %addi 1, 0, 4; + %assign/vec4 v0x1185830_0, 0; +T_10.58 ; + %jmp T_10.50; +T_10.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.7; +T_10.6 ; + %load/vec4 v0x1185540_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1185540_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_10.59, 4; + %load/vec4 v0x11853a0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x11853a0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1188600_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_10.61, 9; + %load/vec4 v0x11853a0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_10.63, 4; + %load/vec4 v0x1189c00_0; + %assign/vec4 v0x11851c0_0, 0; +T_10.63 ; + %jmp T_10.62; +T_10.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %load/vec4 v0x11853a0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.65, 4; + %load/vec4 v0x1188600_0; + %assign/vec4 v0x1189b20_0, 0; + %load/vec4 v0x1189c00_0; + %load/vec4 v0x1188600_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1188600_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %jmp T_10.66; +T_10.65 ; + %load/vec4 v0x11853a0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.67, 4; + %load/vec4 v0x11853a0_0; + %assign/vec4 v0x1189b20_0, 0; + %load/vec4 v0x1189c00_0; + %load/vec4 v0x11853a0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11853a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x11853a0_0; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.68; +T_10.67 ; + %load/vec4 v0x11880a0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.69, 8; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.72; +T_10.71 ; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.74; +T_10.73 ; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.76; +T_10.75 ; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1188600_0, 0; +T_10.77 ; +T_10.76 ; +T_10.74 ; +T_10.72 ; + %jmp T_10.70; +T_10.69 ; + %load/vec4 v0x11853a0_0; + %assign/vec4 v0x1189b20_0, 0; +T_10.70 ; +T_10.68 ; +T_10.66 ; +T_10.62 ; +T_10.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.7; +T_10.7 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.1 ; + %load/vec4 v0x1188ac0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.81, 6; + %jmp T_10.82; +T_10.79 ; + %load/vec4 v0x11890f0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.83, 4; + %load/vec4 v0x1187f20_0; + %flag_set/vec4 8; + %jmp/0xz T_10.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1189880_0, 0, 4; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.88; +T_10.87 ; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.90; +T_10.89 ; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.92; +T_10.91 ; + %load/vec4 v0x1188ba0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1188600_0, 0; +T_10.93 ; +T_10.92 ; +T_10.90 ; +T_10.88 ; +T_10.85 ; + %jmp T_10.84; +T_10.83 ; + %load/vec4 v0x1188ba0_0; + %load/vec4 v0x11890f0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %load/vec4 v0x11890f0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1189230, 4; + %assign/vec4 v0x1189190_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11890f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1189050_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11890f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1189880_0, 4, 5; + %load/vec4 v0x11890f0_0; + %assign/vec4 v0x1188600_0, 0; +T_10.95 ; +T_10.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.82; +T_10.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.82; +T_10.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.82; +T_10.82 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.2 ; + %load/vec4 v0x1188ac0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.99, 6; + %jmp T_10.100; +T_10.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.100; +T_10.98 ; + %load/vec4 v0x1189b20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.101, 4; + %load/vec4 v0x11880a0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.103, 8; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.106; +T_10.105 ; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.108; +T_10.107 ; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1188600_0, 0; + %jmp T_10.110; +T_10.109 ; + %load/vec4 v0x1186fd0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1189b20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x11897c0_0, 4, 5; + %load/vec4 v0x1189c00_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1188980, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1188600_0, 0; +T_10.111 ; +T_10.110 ; +T_10.108 ; +T_10.106 ; +T_10.103 ; +T_10.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.100; +T_10.99 ; + %load/vec4 v0x1189b20_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.113, 4; + %load/vec4 v0x1189960_0; + %load/vec4 v0x1189b20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1189b20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x11897c0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11888a0_0, 0; + %load/vec4 v0x1189b20_0; + %assign/vec4 v0x1188600_0, 0; +T_10.115 ; +T_10.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1188ac0_0, 0; + %jmp T_10.100; +T_10.100 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.3 ; + %pop/vec4 1; + %jmp T_10; + .thread T_10; + .scope S_0x1184d50; +T_11 ; + %wait E_0x10db880; + %load/vec4 v0x1188ac0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x11888a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1185830_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_11.0, 8; + %load/vec4 v0x1185830_0; + %assign/vec4 v0x1185750_0, 0; +T_11.0 ; + %load/vec4 v0x1188ac0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_11.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1189050_0, 0, 4; +T_11.2 ; + %jmp T_11; + .thread T_11; + .scope S_0x111a270; +T_12 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11836d0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11838f0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1183430_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1140640_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1180080_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1180540_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1183e80_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1184750_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1184910_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1184670_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x11837b0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x11837b0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x11837b0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x11837b0, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x10ca120, v0x1183370 {0 0 0}; + %end; + .thread T_12; + .scope S_0x111a270; +T_13 ; + %wait E_0x10fe030; + %load/vec4 v0x11836d0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.2, 6; + %jmp T_13.3; +T_13.0 ; + %load/vec4 v0x11838f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.6, 6; + %jmp T_13.7; +T_13.4 ; + %load/vec4 v0x1180330_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_13.8, 5; + %load/vec4 v0x1180700_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_13.10, 5; + %load/vec4 v0x1180700_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %jmp T_13.11; +T_13.10 ; + %load/vec4 v0x1180700_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_13.12, 5; + %load/vec4 v0x11839d0_0; + %load/vec4 v0x1180700_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.14, 8; + %load/vec4 v0x1180700_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1180700_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %load/vec4 v0x1180700_0; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.15; +T_13.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %load/vec4 v0x1180700_0; + %assign/vec4 v0x1183f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1180700_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1184750_0, 4, 5; + %load/vec4 v0x1180700_0; + %assign/vec4 v0x1183430_0, 0; +T_13.15 ; + %jmp T_13.13; +T_13.12 ; + %load/vec4 v0x1180700_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.16, 4; + %load/vec4 v0x1183430_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_13.18, 4; + %load/vec4 v0x1183430_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %jmp T_13.19; +T_13.18 ; + %load/vec4 v0x11839d0_0; + %load/vec4 v0x1183430_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.20, 8; + %load/vec4 v0x1183430_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1183430_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %jmp T_13.21; +T_13.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %load/vec4 v0x1183430_0; + %assign/vec4 v0x1183f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1183430_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1184750_0, 4, 5; +T_13.21 ; +T_13.19 ; + %jmp T_13.17; +T_13.16 ; + %load/vec4 v0x1180700_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.22, 4; + %load/vec4 v0x1182d10_0; + %flag_set/vec4 8; + %jmp/0xz T_13.24, 8; + %load/vec4 v0x11839d0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.27; +T_13.26 ; + %load/vec4 v0x11839d0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.29; +T_13.28 ; + %load/vec4 v0x11839d0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.31; +T_13.30 ; + %load/vec4 v0x11839d0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1183430_0, 0; +T_13.32 ; +T_13.31 ; +T_13.29 ; +T_13.27 ; + %jmp T_13.25; +T_13.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %load/vec4 v0x1180700_0; + %assign/vec4 v0x1183f20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184750_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184750_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184750_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184750_0, 4, 5; +T_13.25 ; +T_13.22 ; +T_13.17 ; +T_13.13 ; +T_13.11 ; +T_13.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.7; +T_13.5 ; + %load/vec4 v0x1180330_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_13.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_13.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_13.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_13.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_13.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_13.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_13.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_13.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_13.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_13.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_13.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_13.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_13.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_13.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_13.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_13.49, 6; + %jmp T_13.50; +T_13.34 ; + %load/vec4 v0x1140640_0; + %load/vec4 v0x1184000_0; + %add; + %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.35 ; + %load/vec4 v0x1140640_0; + %load/vec4 v0x1184000_0; + %sub; + %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.36 ; + %load/vec4 v0x1180540_0; + %pad/u 11; + %load/vec4 v0x1184000_0; + %add; + %pad/u 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.37 ; + %load/vec4 v0x1184000_0; + %assign/vec4 v0x1184ad0_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.38 ; + %load/vec4 v0x1180250_0; + %assign/vec4 v0x1184ad0_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.39 ; + %load/vec4 v0x1140640_0; + %load/vec4 v0x1180250_0; + %add; + %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.40 ; + %load/vec4 v0x1140640_0; + %load/vec4 v0x1180250_0; + %sub; + %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.41 ; + %load/vec4 v0x1180540_0; + %pad/u 11; + %load/vec4 v0x1180250_0; + %add; + %pad/u 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.42 ; + %load/vec4 v0x1180080_0; + %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1140640_0; + %assign/vec4 v0x1180080_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.43 ; + %load/vec4 v0x1140640_0; + %assign/vec4 v0x1180080_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.44 ; + %load/vec4 v0x1140640_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.45 ; + %load/vec4 v0x1180460_0; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.50; +T_13.46 ; + %load/vec4 v0x1140640_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_13.51, 4; + %load/vec4 v0x1180460_0; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.52; +T_13.51 ; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; +T_13.52 ; + %jmp T_13.50; +T_13.47 ; + %load/vec4 v0x1140640_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_13.53, 4; + %load/vec4 v0x1180460_0; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.54; +T_13.53 ; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; +T_13.54 ; + %jmp T_13.50; +T_13.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1140640_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_13.55, 5; + %load/vec4 v0x1180460_0; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.56; +T_13.55 ; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; +T_13.56 ; + %jmp T_13.50; +T_13.49 ; + %load/vec4 v0x1140640_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_13.57, 5; + %load/vec4 v0x1180460_0; + %assign/vec4 v0x1180620_0, 0; + %jmp T_13.58; +T_13.57 ; + %load/vec4 v0x1180540_0; + %addi 1, 0, 4; + %assign/vec4 v0x1180620_0, 0; +T_13.58 ; + %jmp T_13.50; +T_13.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.7; +T_13.6 ; + %load/vec4 v0x1180330_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1180330_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_13.59, 4; + %load/vec4 v0x1180160_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1180160_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1183430_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_13.61, 9; + %load/vec4 v0x1180160_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_13.63, 4; + %load/vec4 v0x1184ad0_0; + %assign/vec4 v0x1140640_0, 0; +T_13.63 ; + %jmp T_13.62; +T_13.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %load/vec4 v0x1180160_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.65, 4; + %load/vec4 v0x1183430_0; + %assign/vec4 v0x11849f0_0, 0; + %load/vec4 v0x1184ad0_0; + %load/vec4 v0x1183430_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1183430_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %jmp T_13.66; +T_13.65 ; + %load/vec4 v0x1180160_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.67, 4; + %load/vec4 v0x1180160_0; + %assign/vec4 v0x11849f0_0, 0; + %load/vec4 v0x1184ad0_0; + %load/vec4 v0x1180160_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1180160_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1180160_0; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.68; +T_13.67 ; + %load/vec4 v0x1182e90_0; + %flag_set/vec4 8; + %jmp/0xz T_13.69, 8; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.72; +T_13.71 ; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.74; +T_13.73 ; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.76; +T_13.75 ; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1183430_0, 0; +T_13.77 ; +T_13.76 ; +T_13.74 ; +T_13.72 ; + %jmp T_13.70; +T_13.69 ; + %load/vec4 v0x1180160_0; + %assign/vec4 v0x11849f0_0, 0; +T_13.70 ; +T_13.68 ; +T_13.66 ; +T_13.62 ; +T_13.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.7; +T_13.7 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.1 ; + %load/vec4 v0x11838f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.81, 6; + %jmp T_13.82; +T_13.79 ; + %load/vec4 v0x1183f20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.83, 4; + %load/vec4 v0x1182d10_0; + %flag_set/vec4 8; + %jmp/0xz T_13.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1184750_0, 0, 4; + %load/vec4 v0x11839d0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.88; +T_13.87 ; + %load/vec4 v0x11839d0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.90; +T_13.89 ; + %load/vec4 v0x11839d0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.92; +T_13.91 ; + %load/vec4 v0x11839d0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1183430_0, 0; +T_13.93 ; +T_13.92 ; +T_13.90 ; +T_13.88 ; +T_13.85 ; + %jmp T_13.84; +T_13.83 ; + %load/vec4 v0x11839d0_0; + %load/vec4 v0x1183f20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %load/vec4 v0x1183f20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x11840e0, 4; + %assign/vec4 v0x1184000_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1183f20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1183e80_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1183f20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1184750_0, 4, 5; + %load/vec4 v0x1183f20_0; + %assign/vec4 v0x1183430_0, 0; +T_13.95 ; +T_13.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.82; +T_13.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.82; +T_13.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.82; +T_13.82 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.2 ; + %load/vec4 v0x11838f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.99, 6; + %jmp T_13.100; +T_13.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.100; +T_13.98 ; + %load/vec4 v0x11849f0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.101, 4; + %load/vec4 v0x1182e90_0; + %flag_set/vec4 8; + %jmp/0xz T_13.103, 8; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.106; +T_13.105 ; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.108; +T_13.107 ; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1183430_0, 0; + %jmp T_13.110; +T_13.109 ; + %load/vec4 v0x1181dc0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11849f0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1184670_0, 4, 5; + %load/vec4 v0x1184ad0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x11837b0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1183430_0, 0; +T_13.111 ; +T_13.110 ; +T_13.108 ; +T_13.106 ; +T_13.103 ; +T_13.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.100; +T_13.99 ; + %load/vec4 v0x11849f0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.113, 4; + %load/vec4 v0x1184830_0; + %load/vec4 v0x11849f0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x11849f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1184670_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11836d0_0, 0; + %load/vec4 v0x11849f0_0; + %assign/vec4 v0x1183430_0, 0; +T_13.115 ; +T_13.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11838f0_0, 0; + %jmp T_13.100; +T_13.100 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.3 ; + %pop/vec4 1; + %jmp T_13; + .thread T_13; + .scope S_0x111a270; +T_14 ; + %wait E_0x10db880; + %load/vec4 v0x11838f0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x11836d0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1180620_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_14.0, 8; + %load/vec4 v0x1180620_0; + %assign/vec4 v0x1180540_0, 0; +T_14.0 ; + %load/vec4 v0x11838f0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_14.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1183e80_0, 0, 4; +T_14.2 ; + %jmp T_14; + .thread T_14; + .scope S_0x10ca9f0; +T_15 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x119a060_0, 0, 33; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1199fc0_0, 0, 1; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x119a060_0, 0, 33; +T_15.0 ; + %load/vec4 v0x119a060_0; + %cmpi/u 10, 0, 33; + %jmp/0xz T_15.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199f20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1199f20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199f20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1199f20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199f20_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1199f20_0, 0, 1; + %delay 1, 0; + %load/vec4 v0x119a060_0; + %addi 1, 0, 33; + %store/vec4 v0x119a060_0, 0, 33; + %jmp T_15.0; +T_15.1 ; + %load/vec4 v0x1199e80_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.2, 4; + %vpi_call 2 51 "$display", "Failed on up test of regTest, %d", v0x1199e80_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199fc0_0, 0, 1; +T_15.2 ; + %load/vec4 v0x1199d40_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.4, 4; + %vpi_call 2 55 "$display", "Failed on left test of regTest, %d", v0x1199d40_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199fc0_0, 0, 1; +T_15.4 ; + %load/vec4 v0x1199de0_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.6, 4; + %vpi_call 2 59 "$display", "Failed on right test of regTest, %d", v0x1199de0_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199fc0_0, 0, 1; +T_15.6 ; + %load/vec4 v0x1199ca0_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.8, 4; + %vpi_call 2 63 "$display", "Failed on down test of regTest, %d", v0x1199ca0_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199fc0_0, 0, 1; +T_15.8 ; + %load/vec4 v0x1199b50_0; + %pad/s 32; + %cmpi/ne 1, 0, 32; + %jmp/0xz T_15.10, 4; + %vpi_call 2 67 "$display", "Failed on center test of regTest, %d", v0x1199b50_0 {0 0 0}; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1199fc0_0, 0, 1; +T_15.10 ; + %load/vec4 v0x1199fc0_0; + %flag_set/vec4 8; + %jmp/0xz T_15.12, 8; + %vpi_call 2 71 "$display", "DUT passed regTest" {0 0 0}; +T_15.12 ; + %end; + .thread T_15; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "regTest/test.v"; + "./tis100.v"; diff --git a/regTest/test.asm b/regTest/test.asm new file mode 100644 index 0000000..aa75232 --- /dev/null +++ b/regTest/test.asm @@ -0,0 +1,36 @@ +:center +MOV 3 ACC +SUB UP +SUB 1 +ADD ACC +ADD ACC +ADD ACC +SUB 7 +JRO 0 + +:up +MOV 1 DOWN +MOV 1 ACC +SAV +MOV 5 ACC +SWP +JRO 0 + +:left +MOV -1 ACC +NEG +JRO 0 + +:right +MOV 5 ACC +SWP +MOV 1 ACC +SAV +SWP +JRO 0 + +:down +JRO 2 +ADD 40 +ADD 1 +JRO 0 diff --git a/regTest/test.v b/regTest/test.v new file mode 100644 index 0000000..e847652 --- /dev/null +++ b/regTest/test.v @@ -0,0 +1,75 @@ +`include "tis100.v" +module tis100Test(); + +reg clk; +wire signed[10:0] accOutCenter; +wire signed[10:0] accOutUp; +wire signed[10:0] accOutDown; +wire signed[10:0] accOutLeft; +wire signed[10:0] accOutRight; + +reg[32:0] i; + +wire[14:0] L2C; +wire[14:0] C2L; + +wire[14:0] R2C; +wire[14:0] C2R; + +wire[14:0] U2C; +wire[14:0] C2U; + +wire[14:0] D2C; +wire[14:0] C2D; + +reg dutPassed; + +tis100 #("regTest/left.dat") left( .clk(clk), .rightOut(L2C), .right(C2L), .accOut(accOutLeft)); +tis100 #("regTest/right.dat") right( .clk(clk), .leftOut(R2C), .left(C2R), .accOut(accOutRight)); +tis100 #("regTest/up.dat") up( .clk(clk), .downOut(U2C), .down(C2U), .accOut(accOutUp)); +tis100 #("regTest/down.dat") down( .clk(clk), .upOut(D2C), .up(C2D), .accOut(accOutDown)); +tis100 #("regTest/center.dat") center(.clk(clk), + .upOut(C2U), .up(U2C), + .downOut(C2D), .down(D2C), + .leftOut(C2L), .left(L2C), + .rightOut(C2R), .right(R2C), + .accOut(accOutCenter) + ); + +initial begin + i = 0; + dutPassed = 1; + for( i = 0; i<10; i=i+1) begin + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + end + if(accOutUp != 1) begin + $display("Failed on up test of regTest, %d", accOutUp); + dutPassed = 0; + end + if(accOutLeft != 1) begin + $display("Failed on left test of regTest, %d", accOutLeft); + dutPassed = 0; + end + if(accOutRight != 1) begin + $display("Failed on right test of regTest, %d", accOutRight); + dutPassed = 0; + end + if(accOutDown != 1) begin + $display("Failed on down test of regTest, %d", accOutDown); + dutPassed = 0; + end + if(accOutCenter != 1) begin + $display("Failed on center test of regTest, %d",accOutCenter); + dutPassed = 0; + end + if(dutPassed) begin + $display("DUT passed regTest"); + end +end + +endmodule diff --git a/regTest/up.dat b/regTest/up.dat new file mode 100644 index 0000000..95cb810 --- /dev/null +++ b/regTest/up.dat @@ -0,0 +1,16 @@ +010010100000000001 +010000100000000001 +100100000000000000 +010000100000000101 +100000000000000000 +011100000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/right.dat b/right.dat new file mode 100644 index 0000000..57342cc --- /dev/null +++ b/right.dat @@ -0,0 +1,5 @@ +000000000000000000 +000000000000000000 +010001000000000101 +010000100000001100 +011100000000000000 diff --git a/rightAsm b/rightAsm deleted file mode 100644 index e69de29..0000000 diff --git a/rightAsm.txt b/rightAsm.txt new file mode 100644 index 0000000..9a32e3e --- /dev/null +++ b/rightAsm.txt @@ -0,0 +1,5 @@ +NOP +NOP +MOV 5 LEFT +MOV 12 ACC +JRO 0 diff --git a/scratch.txt b/scratch.txt deleted file mode 100644 index d7d8135..0000000 --- a/scratch.txt +++ /dev/null @@ -1,103 +0,0 @@ -`ADD: begin - if(SRC < 2) begin //src is a register - ACC <= ACC + regVals[SRC]; - PCNEXT <= PC + 1; - end - else if(SRC < 6) begin//src is a port - if(portsHaveData[SRC]) begin //port has data - ACC <= ACC + regVals[SRC]; - PCNEXT <= PC + 1; - readAckOut[SRC] <= 1; - last <= SRC; - end - else begin //port has no data - mode <= `READ_MODE; - PCNEXT <= PC; - weWantData[SRC] <= 1; - readTarget <= SRC; - last <= SRC; - end - end - else if(SRC == `LAST_ADDR) begin//port is last - if(last == `NIL_ADDR) begin//last is undefined - ACC <= ACC + regVals[last]; - PCNEXT <= PC + 1; - end - else if(portsHaveData[last]) begin//last has data - ACC <= ACC + regVals[last]; - PCNEXT <= PC + 1; - readAckOut[last] <= 1; - end - else - mode <= `READ_MODE; - PCNEXT <= PC; - weWantData[last] M- 1; - readTarget <= last; - end - end - else if(SRC == `ANY_ADDR) begin//port is any - end - - - - case(INST) - `ADD: begin - end - end - `SUB: begin - //src could be port - end - `JRO: begin - //src could be port - end - `MOV: begin - //src or dst could be port - end - `ADDI: begin - ACC <= ACC + IMM; - PCNEXT <= PC + 1; - end - `SUBI: begin - ACC <= ACC - IMM; - PCNEXT <= PC + 1; - end - `JROI: begin - PCNEXT <= PC + IMM; - PCNEXT <= PC + 1; - end - `MOVI: begin - //dst could port - end - `SWP: begin - ACC <= BAK; - BAK <= ACC; - PCNEXT <= PC + 1; - end - `SAV: begin - BAK <= ACC; - PCNEXT <= PC + 1; - end - `NEG: begin - ACC <= -ACC; - PCNEXT <= PC + 1; - end - `JMP: begin - PCNEXT <= LABEL; - end - `JEZ: begin - if(ACC == 0) PCNEXT <= LABEL - else PCNEXT <= PC+1 - end - `JNZ: begin - if(ACC != 0) PCNEXT <= LABEL - else PCNEXT <= PC+1 - end - `JGZ: begin - if(ACC > 0) PCNEXT <= LABEL - else PCNEXT <= PC+1 - end - `JLZ: begin - if(ACC < 0) PCNEXT <= LABEL - else PCNEXT <= PC+1 - end - endcase` diff --git a/stackmemory b/stackmemory new file mode 100755 index 0000000..f5234cf --- /dev/null +++ b/stackmemory @@ -0,0 +1,587 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x194d6b0 .scope module, "stackMemoryTestBench" "stackMemoryTestBench" 2 2; + .timescale 0 0; +v0x19838a0_0 .net *"_s12", 0 0, L_0x19846b0; 1 drivers +v0x1983980_0 .net *"_s16", 0 0, L_0x1984750; 1 drivers +v0x1983a60_0 .net *"_s20", 0 0, L_0x19848b0; 1 drivers +v0x1983b20_0 .net *"_s24", 0 0, L_0x19849b0; 1 drivers +v0x1983c00_0 .net *"_s6", 0 0, L_0x1984590; 1 drivers +v0x1983d30_0 .var "clk", 0 0; +v0x1983dd0_0 .var "counter", 5 0; +v0x1983e90_0 .var "dutpassed", 0 0; +v0x1983f50_0 .var "in", 14 0; +v0x19840d0_0 .net "out", 14 0, v0x1983580_0; 1 drivers +v0x19841a0_0 .var "phase", 2 0; +v0x1984260_0 .var "testcase", 3 0; +v0x1984340_0 .var "val", 10 0; +E_0x1958530 .event negedge, v0x1983e90_0; +E_0x1957490 .event negedge, L_0x19849b0; +E_0x1957c90 .event posedge, L_0x19848b0; +E_0x19576d0 .event negedge, L_0x1984750; +E_0x1958250 .event posedge, L_0x19846b0; +E_0x1957f70 .event posedge, L_0x1984590; +L_0x1984590 .part v0x1983580_0, 13, 1; +L_0x19846b0 .part v0x1983580_0, 14, 1; +L_0x1984750 .part v0x1983580_0, 11, 1; +L_0x19848b0 .part v0x1983580_0, 13, 1; +L_0x19849b0 .part v0x1983580_0, 12, 1; +S_0x194d830 .scope module, "dut" "stackMemory" 2 17, 3 11 0, S_0x194d6b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "in" + .port_info 2 /OUTPUT 15 "out" +P_0x194b8c0 .param/l "initialpointer" 0 3 15, +C4<00000000000000000000000000000100>; +P_0x194b900 .param/l "loadmemory" 0 3 13, +C4<00000000000000000000000000000001>; +P_0x194b940 .param/str "memoryfile" 0 3 14, "mem.dat"; +v0x1944a40_0 .net *"_s2", 0 0, L_0x1984420; 1 drivers +v0x19831e0_0 .net *"_s6", 0 0, L_0x19844f0; 1 drivers +v0x19832c0_0 .net "clk", 0 0, v0x1983d30_0; 1 drivers +v0x1983390_0 .net "in", 14 0, v0x1983f50_0; 1 drivers +v0x1983470 .array "mem", 1 15, 10 0; +v0x1983580_0 .var "out", 14 0; +v0x1983660_0 .var "phase", 2 0; +v0x1983740_0 .var "pointer", 3 0; +E_0x194df50 .event negedge, v0x19832c0_0; +E_0x194e340 .event posedge, v0x19832c0_0; +E_0x194eb00 .event edge, v0x1983740_0; +E_0x194e720 .event posedge, L_0x19844f0; +E_0x194f0f0 .event posedge, L_0x1984420; +L_0x1984420 .part v0x1983f50_0, 14, 1; +L_0x19844f0 .part v0x1983f50_0, 13, 1; + .scope S_0x194d830; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1983660_0, 0, 3; + %pushi/vec4 4, 0, 4; + %store/vec4 v0x1983740_0, 0, 4; + %pushi/vec4 0, 0, 15; + %store/vec4 v0x1983580_0, 0, 15; + %vpi_call 3 30 "$readmemb", P_0x194b940, v0x1983470 {0 0 0}; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_0.0, 5; + %load/vec4 v0x1983740_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1983470, 4; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983580_0, 4, 11; +T_0.0 ; + %end; + .thread T_0; + .scope S_0x194d830; +T_1 ; + %wait E_0x194f0f0; + %load/vec4 v0x1983740_0; + %subi 1, 0, 4; + %store/vec4 v0x1983740_0, 0, 4; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_1.0, 5; + %load/vec4 v0x1983740_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1983470, 4; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983580_0, 4, 11; +T_1.0 ; + %jmp T_1; + .thread T_1; + .scope S_0x194d830; +T_2 ; + %wait E_0x194e720; + %load/vec4 v0x1983740_0; + %subi 1, 0, 4; + %store/vec4 v0x1983740_0, 0, 4; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_2.0, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; + %load/vec4 v0x1983740_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1983470, 4; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; + %jmp T_2.1; +T_2.0 ; + %pushi/vec4 0, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; +T_2.1 ; + %jmp T_2; + .thread T_2; + .scope S_0x194d830; +T_3 ; + %wait E_0x194eb00; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmpi/u 15, 0, 32; + %jmp/0xz T_3.0, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 12, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; + %jmp T_3.1; +T_3.0 ; + %pushi/vec4 0, 0, 1; + %ix/load 4, 12, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; +T_3.1 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_3.2, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; + %jmp T_3.3; +T_3.2 ; + %pushi/vec4 0, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; +T_3.3 ; + %jmp T_3; + .thread T_3, $push; + .scope S_0x194d830; +T_4 ; + %wait E_0x194e340; + %load/vec4 v0x1983660_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x1983390_0; + %parti/s 1, 11, 5; + %flag_set/vec4 8; + %jmp/0xz T_4.4, 8; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmpi/u 15, 0, 32; + %jmp/0xz T_4.6, 5; + %load/vec4 v0x1983740_0; + %addi 1, 0, 4; + %store/vec4 v0x1983740_0, 0, 4; + %load/vec4 v0x1983390_0; + %parti/s 11, 0, 2; + %load/vec4 v0x1983740_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %store/vec4a v0x1983470, 4, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 13, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; +T_4.6 ; +T_4.4 ; + %jmp T_4.3; +T_4.1 ; + %jmp T_4.3; +T_4.2 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1983740_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x1983740_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1983470, 4; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; + %load/vec4 v0x1983390_0; + %parti/s 1, 12, 5; + %flag_set/vec4 8; + %jmp/0xz T_4.10, 8; + %load/vec4 v0x1983740_0; + %subi 1, 0, 4; + %store/vec4 v0x1983740_0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 4, 14, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983580_0, 4, 5; +T_4.10 ; +T_4.8 ; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x194d830; +T_5 ; + %wait E_0x194df50; + %load/vec4 v0x1983660_0; + %cmpi/e 2, 0, 3; + %jmp/0xz T_5.0, 4; + %pushi/vec4 0, 0, 1; + %ix/load 4, 13, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983580_0, 4, 1; + %pushi/vec4 0, 0, 1; + %ix/load 4, 14, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983580_0, 4, 1; +T_5.0 ; + %load/vec4 v0x1983660_0; + %pad/u 32; + %addi 1, 0, 32; + %pushi/vec4 3, 0, 32; + %mod; + %pad/u 3; + %store/vec4 v0x1983660_0, 0, 3; + %jmp T_5; + .thread T_5; + .scope S_0x194d6b0; +T_6 ; + %delay 10, 0; + %load/vec4 v0x1983d30_0; + %nor/r; + %store/vec4 v0x1983d30_0, 0, 1; + %jmp T_6; + .thread T_6; + .scope S_0x194d6b0; +T_7 ; + %vpi_call 2 26 "$dumpfile", "test.vcd" {0 0 0}; + %vpi_call 2 27 "$dumpvars", 32'sb00000000000000000000000000000000 {0 0 0}; + %pushi/vec4 0, 0, 1; + %assign/vec4 v0x1983d30_0, 0; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x1983e90_0, 0; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x19841a0_0, 0; + %pushi/vec4 0, 0, 15; + %assign/vec4 v0x1983f50_0, 0; + %pushi/vec4 0, 0, 4; + %assign/vec4 v0x1984260_0, 0; + %pushi/vec4 1, 0, 6; + %assign/vec4 v0x1983dd0_0, 0; + %delay 30, 0; + %load/vec4 v0x19840d0_0; + %parti/s 1, 11, 5; + %nor/r; + %flag_set/vec4 8; + %load/vec4 v0x19840d0_0; + %parti/s 1, 12, 5; + %nor/r; + %flag_set/vec4 9; + %flag_or 9, 8; + %load/vec4 v0x19840d0_0; + %parti/s 1, 13, 5; + %flag_set/vec4 8; + %flag_or 8, 9; + %load/vec4 v0x19840d0_0; + %parti/s 1, 14, 5; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_7.0, 9; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1983e90_0, 0, 1; +T_7.0 ; + %pushi/vec4 1, 0, 1; + %ix/load 4, 12, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x1984260_0, 0, 4; + %end; + .thread T_7; + .scope S_0x194d6b0; +T_8 ; + %wait E_0x194e340; + %load/vec4 v0x1984260_0; + %pad/u 32; + %pushi/vec4 1, 0, 32; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x19841a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 8; + %jmp/0xz T_8.0, 8; + %load/vec4 v0x19840d0_0; + %parti/s 11, 0, 2; + %assign/vec4 v0x1984340_0, 0; + %load/vec4 v0x1984340_0; + %cmpi/ne 1394, 0, 11; + %jmp/0xz T_8.2, 4; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1983e90_0, 0, 1; +T_8.2 ; + %pushi/vec4 1, 0, 1; + %ix/load 4, 14, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983f50_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 4, 12, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983f50_0, 4, 5; + %pushi/vec4 2, 0, 4; + %store/vec4 v0x1984260_0, 0, 4; +T_8.0 ; + %jmp T_8; + .thread T_8; + .scope S_0x194d6b0; +T_9 ; + %wait E_0x194e340; + %load/vec4 v0x1984260_0; + %pad/u 32; + %pushi/vec4 2, 0, 32; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x19841a0_0; + %pushi/vec4 2, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 8; + %jmp/0xz T_9.0, 8; + %pushi/vec4 186, 0, 11; + %store/vec4 v0x1984340_0, 0, 11; + %load/vec4 v0x1984340_0; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983f50_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983f50_0, 4, 5; +T_9.0 ; + %jmp T_9; + .thread T_9; + .scope S_0x194d6b0; +T_10 ; + %wait E_0x1957f70; + %load/vec4 v0x1984260_0; + %pad/u 32; + %cmpi/e 2, 0, 32; + %jmp/0xz T_10.0, 4; + %pushi/vec4 0, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1983f50_0, 4, 5; + %pushi/vec4 3, 0, 4; + %store/vec4 v0x1984260_0, 0, 4; +T_10.0 ; + %jmp T_10; + .thread T_10; + .scope S_0x194d6b0; +T_11 ; + %wait E_0x194e340; + %load/vec4 v0x1984260_0; + %pad/u 32; + %pushi/vec4 3, 0, 32; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x19841a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 8; + %jmp/0xz T_11.0, 8; + %load/vec4 v0x19840d0_0; + %parti/s 11, 0, 2; + %store/vec4 v0x1984340_0, 0, 11; + %load/vec4 v0x1984340_0; + %cmpi/ne 186, 0, 11; + %jmp/0xz T_11.2, 4; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1983e90_0, 0, 1; + %jmp T_11.3; +T_11.2 ; + %pushi/vec4 1, 0, 1; + %ix/load 4, 14, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; + %pushi/vec4 4, 0, 4; + %store/vec4 v0x1984260_0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 4, 12, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; +T_11.3 ; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0x194d6b0; +T_12 ; + %wait E_0x1958250; + %load/vec4 v0x1984260_0; + %pad/u 32; + %cmpi/e 4, 0, 32; + %jmp/0xz T_12.0, 4; + %load/vec4 v0x1983dd0_0; + %addi 1, 0, 6; + %store/vec4 v0x1983dd0_0, 0, 6; +T_12.0 ; + %jmp T_12; + .thread T_12; + .scope S_0x194d6b0; +T_13 ; + %wait E_0x19576d0; + %load/vec4 v0x1984260_0; + %pad/u 32; + %cmpi/e 4, 0, 32; + %jmp/0xz T_13.0, 4; + %load/vec4 v0x1983dd0_0; + %pad/u 32; + %cmpi/e 3, 0, 32; + %jmp/0xz T_13.2, 4; + %pushi/vec4 0, 0, 1; + %ix/load 4, 12, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; + %pushi/vec4 0, 0, 6; + %store/vec4 v0x1983dd0_0, 0, 6; + %load/vec4 v0x1983dd0_0; + %pad/u 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 11; + %pushi/vec4 1, 0, 1; + %ix/load 4, 11, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; + %pushi/vec4 5, 0, 4; + %store/vec4 v0x1984260_0, 0, 4; + %jmp T_13.3; +T_13.2 ; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1983e90_0, 0, 1; +T_13.3 ; +T_13.0 ; + %jmp T_13; + .thread T_13; + .scope S_0x194d6b0; +T_14 ; + %wait E_0x1957c90; + %load/vec4 v0x1984260_0; + %pad/u 32; + %cmpi/e 5, 0, 32; + %jmp/0xz T_14.0, 4; + %load/vec4 v0x1983dd0_0; + %addi 1, 0, 6; + %store/vec4 v0x1983dd0_0, 0, 6; + %load/vec4 v0x1983dd0_0; + %pad/u 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 11; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0x194d6b0; +T_15 ; + %wait E_0x1957490; + %load/vec4 v0x1984260_0; + %pad/u 32; + %cmpi/e 5, 0, 32; + %jmp/0xz T_15.0, 4; + %load/vec4 v0x1983dd0_0; + %pad/u 32; + %cmpi/ne 15, 0, 32; + %jmp/0xz T_15.2, 4; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1983e90_0, 0, 1; + %jmp T_15.3; +T_15.2 ; + %vpi_call 2 123 "$display", "DUT Passed" {0 0 0}; + %vpi_call 2 124 "$finish" {0 0 0}; +T_15.3 ; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0x194d6b0; +T_16 ; + %wait E_0x194df50; + %load/vec4 v0x19841a0_0; + %cmpi/e 2, 0, 3; + %jmp/0xz T_16.0, 4; + %pushi/vec4 0, 0, 1; + %ix/load 4, 13, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; + %pushi/vec4 0, 0, 1; + %ix/load 4, 14, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1983f50_0, 4, 1; +T_16.0 ; + %load/vec4 v0x19841a0_0; + %pad/u 32; + %addi 1, 0, 32; + %pushi/vec4 3, 0, 32; + %mod; + %pad/u 3; + %store/vec4 v0x19841a0_0, 0, 3; + %jmp T_16; + .thread T_16; + .scope S_0x194d6b0; +T_17 ; + %wait E_0x1958530; + %vpi_call 2 138 "$display", "DUT Failed Test: %d", v0x1984260_0 {0 0 0}; + %vpi_call 2 139 "$finish" {0 0 0}; + %jmp T_17; + .thread T_17; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "stackmemory.t.v"; + "./stackmemory.v"; diff --git a/test b/test index 6c00d4e..5711a70 100755 --- a/test +++ b/test @@ -6,12 +6,15 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x1da8740 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x11b8110 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x1e2d9d0_0 .net/s "accOut", 10 0, L_0x1e2dc80; 1 drivers -v0x1e2dae0_0 .var "clk", 0 0; -v0x1e2dbb0_0 .var "i", 32 0; -S_0x1df4ed0 .scope module, "dut" "tis100" 2 8, 3 49 0, S_0x1da8740; +v0x1204a10_0 .net "L2R", 14 0, L_0x1218b40; 1 drivers +v0x1204b40_0 .net "R2L", 14 0, L_0x121c460; 1 drivers +v0x1204c50_0 .net/s "accOutLeft", 10 0, L_0x1204fc0; 1 drivers +v0x1204cf0_0 .net/s "accOutRight", 10 0, L_0x1218e90; 1 drivers +v0x1204dc0_0 .var "clk", 0 0; +v0x1204f00_0 .var "i", 32 0; +S_0x1154c70 .scope module, "left" "tis100" 2 12, 3 49 0, S_0x11b8110; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -23,231 +26,399 @@ S_0x1df4ed0 .scope module, "dut" "tis100" 2 8, 3 49 0, S_0x1da8740; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -L_0x1e2dc80 .functor BUFZ 11, v0x1df3360_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e3dd50 .functor BUFZ 11, v0x1df3360_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e3eb50 .functor BUFZ 18, L_0x1e40b50, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1df3360_0 .var/s "ACC", 10 0; -v0x1e28d00_0 .var/s "BAK", 10 0; -v0x1e28de0_0 .net "DST", 2 0, L_0x1e41c90; 1 drivers -v0x1e28ed0_0 .net/s "IMM", 10 0, L_0x1e41d30; 1 drivers -v0x1e28fb0_0 .net "INST", 3 0, L_0x1e41570; 1 drivers -v0x1e290e0_0 .net "LABEL", 3 0, L_0x1e41ee0; 1 drivers -v0x1e291c0_0 .var "PC", 3 0; -v0x1e292a0_0 .var "PCNEXT", 3 0; -v0x1e29380_0 .net "SRC", 2 0, L_0x1e41aa0; 1 drivers -v0x1e294f0_0 .net *"_s103", 0 0, L_0x1e3fe90; 1 drivers -v0x1e295d0_0 .net *"_s107", 0 0, L_0x1e3fda0; 1 drivers -v0x1e296b0_0 .net *"_s111", 0 0, L_0x1e40080; 1 drivers -v0x1e29790_0 .net *"_s115", 0 0, L_0x1e3ff80; 1 drivers -v0x1e29870_0 .net *"_s119", 0 0, L_0x1e402c0; 1 drivers -v0x1e29950_0 .net *"_s123", 0 0, L_0x1e401b0; 1 drivers -v0x1e29a30_0 .net *"_s127", 0 0, L_0x1e40480; 1 drivers -v0x1e29b10_0 .net *"_s131", 0 0, L_0x1e40360; 1 drivers -v0x1e29cc0_0 .net *"_s135", 0 0, L_0x1e406e0; 1 drivers -v0x1e29d60_0 .net *"_s139", 0 0, L_0x1e405b0; 1 drivers -v0x1e29e40_0 .net *"_s143", 0 0, L_0x1e408c0; 1 drivers -v0x1e29f20_0 .net *"_s147", 0 0, L_0x1e40780; 1 drivers -v0x1e2a000_0 .net *"_s151", 0 0, L_0x1e40ab0; 1 drivers -v0x1e2a0e0_0 .net *"_s155", 0 0, L_0x1e40960; 1 drivers -v0x1e2a1c0_0 .net *"_s159", 0 0, L_0x1e40a00; 1 drivers -v0x1e2a2a0_0 .net *"_s160", 17 0, L_0x1e40b50; 1 drivers -v0x1e2a380_0 .net *"_s162", 5 0, L_0x1e40eb0; 1 drivers -L_0x7f1c70531060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1e2a460_0 .net *"_s165", 1 0, L_0x7f1c70531060; 1 drivers -v0x1e2c430_2 .array/port v0x1e2c430, 2; -v0x1e2a540_0 .net *"_s173", 10 0, v0x1e2c430_2; 1 drivers -v0x1e2c430_3 .array/port v0x1e2c430, 3; -v0x1e2a620_0 .net *"_s179", 10 0, v0x1e2c430_3; 1 drivers -v0x1e2c430_0 .array/port v0x1e2c430, 0; -v0x1e2a700_0 .net *"_s185", 10 0, v0x1e2c430_0; 1 drivers -v0x1e2c430_1 .array/port v0x1e2c430, 1; -v0x1e2a7e0_0 .net *"_s191", 10 0, v0x1e2c430_1; 1 drivers -v0x1e2a8c0_0 .net *"_s23", 0 0, L_0x1e3e260; 1 drivers -v0x1e2a9a0_0 .net *"_s27", 0 0, L_0x1e3e380; 1 drivers -v0x1e29bf0_0 .net *"_s31", 0 0, L_0x1e3e4b0; 1 drivers -v0x1e2ac70_0 .net *"_s36", 0 0, L_0x1e3e780; 1 drivers -v0x1e2ad50_0 .net *"_s42", 0 0, L_0x1e3ea10; 1 drivers -v0x1e2ae30_0 .net *"_s46", 0 0, L_0x1e3eab0; 1 drivers -v0x1e2af10_0 .net *"_s50", 0 0, L_0x1e3ebc0; 1 drivers -v0x1e2aff0_0 .net *"_s55", 0 0, L_0x1e3ee20; 1 drivers -v0x1e2b0d0_0 .net *"_s61", 0 0, L_0x1e3f090; 1 drivers -v0x1e2b1b0_0 .net *"_s65", 0 0, L_0x1e3f1c0; 1 drivers -v0x1e2b290_0 .net *"_s69", 0 0, L_0x1e3f390; 1 drivers -v0x1e2b370_0 .net *"_s74", 0 0, L_0x1e3f2f0; 1 drivers -v0x1e2b450_0 .net *"_s80", 0 0, L_0x1e3f530; 1 drivers -v0x1e2b530_0 .net *"_s84", 0 0, L_0x1e3f820; 1 drivers -v0x1e2b610_0 .net *"_s88", 0 0, L_0x1e3f760; 1 drivers -v0x1e2b6f0_0 .net *"_s93", 0 0, L_0x1e3f8c0; 1 drivers -v0x1e2b7d0_0 .net *"_s99", 0 0, L_0x1e3fb80; 1 drivers -v0x1e2b8b0_0 .net/s "accOut", 10 0, L_0x1e2dc80; alias, 1 drivers -v0x1e2b990_0 .net "anyHasData", 0 0, L_0x1e3e8c0; 1 drivers -v0x1e2ba50_0 .net "anyReadAck", 0 0, L_0x1e3f6c0; 1 drivers -v0x1e2bb10_0 .net "anyWantData", 0 0, L_0x1e3ef10; 1 drivers -v0x1e2bbd0_0 .net "anyWriteAck", 0 0, L_0x1e3fcb0; 1 drivers -v0x1e2bc90_0 .net "clk", 0 0, v0x1e2dae0_0; 1 drivers -o0x7f1c7057aa38 .functor BUFZ 15, C4; HiZ drive -v0x1e2bd50_0 .net "down", 14 0, o0x7f1c7057aa38; 0 drivers -v0x1e2be30_0 .net "downOut", 14 0, L_0x1e412d0; 1 drivers -v0x1e2bf10_0 .net "instruction", 17 0, L_0x1e3eb50; 1 drivers -v0x1e2bff0 .array "instructions", 0 15, 17 0; -v0x1e2c0b0_0 .var "last", 2 0; -o0x7f1c7057aaf8 .functor BUFZ 15, C4; HiZ drive -v0x1e2c190_0 .net "left", 14 0, o0x7f1c7057aaf8; 0 drivers -v0x1e2c270_0 .net "leftOut", 14 0, L_0x1e41010; 1 drivers -v0x1e2c350_0 .var "mode", 2 0; -v0x1e2c430 .array/s "outVals", 2 5, 10 0; -v0x1e2c570_0 .var "phase", 2 0; -v0x1e2c650_0 .net "portsHaveData", 5 2, L_0x1e3e5a0; 1 drivers -v0x1e2aa40_0 .net "portsWantData", 5 2, L_0x1e3ec60; 1 drivers -v0x1e2ab20_0 .net "readAckIn", 5 2, L_0x1e3f430; 1 drivers -v0x1e2cb00_0 .var "readAckOut", 5 2; -v0x1e2cba0_0 .var "readTarget", 2 0; -v0x1e2cc80_0 .var/s "readValue", 10 0; -L_0x7f1c70531018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1e2cd60 .array "regVals", 0 7; -v0x1e2cd60_0 .net/s v0x1e2cd60 0, 10 0, L_0x7f1c70531018; 1 drivers -v0x1e2cd60_1 .net/s v0x1e2cd60 1, 10 0, L_0x1e3dd50; 1 drivers -v0x1e2cd60_2 .net/s v0x1e2cd60 2, 10 0, L_0x1e3de60; 1 drivers -v0x1e2cd60_3 .net/s v0x1e2cd60 3, 10 0, L_0x1e3df30; 1 drivers -v0x1e2cd60_4 .net/s v0x1e2cd60 4, 10 0, L_0x1e3e030; 1 drivers -v0x1e2cd60_5 .net/s v0x1e2cd60 5, 10 0, L_0x1e3e130; 1 drivers -o0x7f1c7057aeb8 .functor BUFZ 11, C4; HiZ drive -v0x1e2cd60_6 .net/s v0x1e2cd60 6, 10 0, o0x7f1c7057aeb8; 0 drivers -o0x7f1c7057aee8 .functor BUFZ 11, C4; HiZ drive -v0x1e2cd60_7 .net/s v0x1e2cd60 7, 10 0, o0x7f1c7057aee8; 0 drivers -o0x7f1c7057af18 .functor BUFZ 15, C4; HiZ drive -v0x1e2cf70_0 .net "right", 14 0, o0x7f1c7057af18; 0 drivers -v0x1e2d050_0 .net "rightOut", 14 0, L_0x1e41880; 1 drivers -o0x7f1c7057af78 .functor BUFZ 15, C4; HiZ drive -v0x1e2d130_0 .net "up", 14 0, o0x7f1c7057af78; 0 drivers -v0x1e2d210_0 .net "upOut", 14 0, L_0x1e40dc0; 1 drivers -v0x1e2d2f0_0 .var "weHaveData", 5 2; -v0x1e2d3d0_0 .var "weWantData", 5 2; -v0x1e2d4b0_0 .net "writeAckIn", 5 2, L_0x1e3f990; 1 drivers -v0x1e2d590_0 .var "writeAckOut", 5 2; -v0x1e2d670_0 .var "writeTarget", 2 0; -v0x1e2d750_0 .var/s "writeValue", 10 0; -E_0x1db4c40 .event negedge, v0x1e2bc90_0; -E_0x1d91ae0 .event posedge, v0x1e2bc90_0; -L_0x1e3de60 .part o0x7f1c7057aaf8, 0, 11; -L_0x1e3df30 .part o0x7f1c7057af18, 0, 11; -L_0x1e3e030 .part o0x7f1c7057af78, 0, 11; -L_0x1e3e130 .part o0x7f1c7057aa38, 0, 11; -L_0x1e3e260 .part o0x7f1c7057aaf8, 11, 1; -L_0x1e3e380 .part o0x7f1c7057af18, 11, 1; -L_0x1e3e4b0 .part o0x7f1c7057af78, 11, 1; -L_0x1e3e5a0 .concat8 [ 1 1 1 1], L_0x1e3e260, L_0x1e3e380, L_0x1e3e4b0, L_0x1e3e780; -L_0x1e3e780 .part o0x7f1c7057aa38, 11, 1; -L_0x1e3e8c0 .reduce/or L_0x1e3e5a0; -L_0x1e3ea10 .part o0x7f1c7057aaf8, 12, 1; -L_0x1e3eab0 .part o0x7f1c7057af18, 12, 1; -L_0x1e3ebc0 .part o0x7f1c7057af78, 12, 1; -L_0x1e3ec60 .concat8 [ 1 1 1 1], L_0x1e3ea10, L_0x1e3eab0, L_0x1e3ebc0, L_0x1e3ee20; -L_0x1e3ee20 .part o0x7f1c7057aa38, 12, 1; -L_0x1e3ef10 .reduce/or L_0x1e3ec60; -L_0x1e3f090 .part o0x7f1c7057aaf8, 13, 1; -L_0x1e3f1c0 .part o0x7f1c7057af18, 13, 1; -L_0x1e3f390 .part o0x7f1c7057af78, 13, 1; -L_0x1e3f430 .concat8 [ 1 1 1 1], L_0x1e3f090, L_0x1e3f1c0, L_0x1e3f390, L_0x1e3f2f0; -L_0x1e3f2f0 .part o0x7f1c7057aa38, 13, 1; -L_0x1e3f6c0 .reduce/or L_0x1e3f430; -L_0x1e3f530 .part o0x7f1c7057aaf8, 14, 1; -L_0x1e3f820 .part o0x7f1c7057af18, 14, 1; -L_0x1e3f760 .part o0x7f1c7057af78, 14, 1; -L_0x1e3f990 .concat8 [ 1 1 1 1], L_0x1e3f530, L_0x1e3f820, L_0x1e3f760, L_0x1e3f8c0; -L_0x1e3f8c0 .part o0x7f1c7057aa38, 14, 1; -L_0x1e3fcb0 .reduce/or L_0x1e3f990; -L_0x1e3fb80 .part v0x1e2cb00_0, 0, 1; -L_0x1e3fe90 .part v0x1e2cb00_0, 1, 1; -L_0x1e3fda0 .part v0x1e2cb00_0, 2, 1; -L_0x1e40080 .part v0x1e2cb00_0, 3, 1; -L_0x1e3ff80 .part v0x1e2d590_0, 0, 1; -L_0x1e402c0 .part v0x1e2d590_0, 1, 1; -L_0x1e401b0 .part v0x1e2d590_0, 2, 1; -L_0x1e40480 .part v0x1e2d590_0, 3, 1; -L_0x1e40360 .part v0x1e2d3d0_0, 0, 1; -L_0x1e406e0 .part v0x1e2d3d0_0, 1, 1; -L_0x1e405b0 .part v0x1e2d3d0_0, 2, 1; -L_0x1e408c0 .part v0x1e2d3d0_0, 3, 1; -L_0x1e40780 .part v0x1e2d2f0_0, 0, 1; -L_0x1e40ab0 .part v0x1e2d2f0_0, 1, 1; -L_0x1e40960 .part v0x1e2d2f0_0, 2, 1; -L_0x1e40a00 .part v0x1e2d2f0_0, 3, 1; -L_0x1e40b50 .array/port v0x1e2bff0, L_0x1e40eb0; -L_0x1e40eb0 .concat [ 4 2 0 0], v0x1e291c0_0, L_0x7f1c70531060; -LS_0x1e40dc0_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_2, L_0x1e40960, L_0x1e405b0, L_0x1e401b0; -LS_0x1e40dc0_0_4 .concat8 [ 1 0 0 0], L_0x1e3fda0; -L_0x1e40dc0 .concat8 [ 14 1 0 0], LS_0x1e40dc0_0_0, LS_0x1e40dc0_0_4; -LS_0x1e412d0_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_3, L_0x1e40a00, L_0x1e408c0, L_0x1e40480; -LS_0x1e412d0_0_4 .concat8 [ 1 0 0 0], L_0x1e40080; -L_0x1e412d0 .concat8 [ 14 1 0 0], LS_0x1e412d0_0_0, LS_0x1e412d0_0_4; -LS_0x1e41010_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_0, L_0x1e40780, L_0x1e40360, L_0x1e3ff80; -LS_0x1e41010_0_4 .concat8 [ 1 0 0 0], L_0x1e3fb80; -L_0x1e41010 .concat8 [ 14 1 0 0], LS_0x1e41010_0_0, LS_0x1e41010_0_4; -LS_0x1e41880_0_0 .concat8 [ 11 1 1 1], v0x1e2c430_1, L_0x1e40ab0, L_0x1e406e0, L_0x1e402c0; -LS_0x1e41880_0_4 .concat8 [ 1 0 0 0], L_0x1e3fe90; -L_0x1e41880 .concat8 [ 14 1 0 0], LS_0x1e41880_0_0, LS_0x1e41880_0_4; -L_0x1e41570 .part L_0x1e3eb50, 14, 4; -L_0x1e41c90 .part L_0x1e3eb50, 11, 3; -L_0x1e41aa0 .part L_0x1e3eb50, 8, 3; -L_0x1e41ee0 .part L_0x1e3eb50, 10, 4; -L_0x1e41d30 .part L_0x1e3eb50, 0, 11; - .scope S_0x1df4ed0; +P_0x11b7840 .param/str "memFile" 0 3 60, "left.dat"; +L_0x1204fc0 .functor BUFZ 11, v0x11de280_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x12150b0 .functor BUFZ 11, v0x11de280_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1215e50 .functor BUFZ 18, L_0x1217e10, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x11de280_0 .var/s "ACC", 10 0; +v0x11fac10_0 .var/s "BAK", 10 0; +v0x11facf0_0 .net "DST", 2 0, L_0x1218f50; 1 drivers +v0x11fade0_0 .net/s "IMM", 10 0, L_0x1218ff0; 1 drivers +v0x11faec0_0 .net "INST", 3 0, L_0x1218830; 1 drivers +v0x11faff0_0 .net "LABEL", 3 0, L_0x12191a0; 1 drivers +v0x11fb0d0_0 .var "PC", 3 0; +v0x11fb1b0_0 .var "PCNEXT", 3 0; +v0x11fb290_0 .net "SRC", 2 0, L_0x1218d60; 1 drivers +v0x11fb400_0 .net *"_s103", 0 0, L_0x1217150; 1 drivers +v0x11fb4e0_0 .net *"_s107", 0 0, L_0x1217060; 1 drivers +v0x11fb5c0_0 .net *"_s111", 0 0, L_0x1217340; 1 drivers +v0x11fb6a0_0 .net *"_s115", 0 0, L_0x1217240; 1 drivers +v0x11fb780_0 .net *"_s119", 0 0, L_0x1217580; 1 drivers +v0x11fb860_0 .net *"_s123", 0 0, L_0x1217470; 1 drivers +v0x11fb940_0 .net *"_s127", 0 0, L_0x1217740; 1 drivers +v0x11fba20_0 .net *"_s131", 0 0, L_0x1217620; 1 drivers +v0x11fbbd0_0 .net *"_s135", 0 0, L_0x12179a0; 1 drivers +v0x11fbc70_0 .net *"_s139", 0 0, L_0x1217870; 1 drivers +v0x11fbd50_0 .net *"_s143", 0 0, L_0x1217b80; 1 drivers +v0x11fbe30_0 .net *"_s147", 0 0, L_0x1217a40; 1 drivers +v0x11fbf10_0 .net *"_s151", 0 0, L_0x1217d70; 1 drivers +v0x11fbff0_0 .net *"_s155", 0 0, L_0x1217c20; 1 drivers +v0x11fc0d0_0 .net *"_s159", 0 0, L_0x1217cc0; 1 drivers +v0x11fc1b0_0 .net *"_s160", 17 0, L_0x1217e10; 1 drivers +v0x11fc290_0 .net *"_s162", 5 0, L_0x1218170; 1 drivers +L_0x7fcb83eda060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x11fc370_0 .net *"_s165", 1 0, L_0x7fcb83eda060; 1 drivers +v0x11fe340_2 .array/port v0x11fe340, 2; +v0x11fc450_0 .net *"_s173", 10 0, v0x11fe340_2; 1 drivers +v0x11fe340_3 .array/port v0x11fe340, 3; +v0x11fc530_0 .net *"_s179", 10 0, v0x11fe340_3; 1 drivers +v0x11fe340_0 .array/port v0x11fe340, 0; +v0x11fc610_0 .net *"_s185", 10 0, v0x11fe340_0; 1 drivers +v0x11fe340_1 .array/port v0x11fe340, 1; +v0x11fc6f0_0 .net *"_s191", 10 0, v0x11fe340_1; 1 drivers +v0x11fc7d0_0 .net *"_s23", 0 0, L_0x1215540; 1 drivers +v0x11fc8b0_0 .net *"_s27", 0 0, L_0x1215660; 1 drivers +v0x11fbb00_0 .net *"_s31", 0 0, L_0x12157d0; 1 drivers +v0x11fcb80_0 .net *"_s36", 0 0, L_0x1215a80; 1 drivers +v0x11fcc60_0 .net *"_s42", 0 0, L_0x1215d10; 1 drivers +v0x11fcd40_0 .net *"_s46", 0 0, L_0x1215db0; 1 drivers +v0x11fce20_0 .net *"_s50", 0 0, L_0x1215ec0; 1 drivers +v0x11fcf00_0 .net *"_s55", 0 0, L_0x1216120; 1 drivers +v0x11fcfe0_0 .net *"_s61", 0 0, L_0x1216390; 1 drivers +v0x11fd0c0_0 .net *"_s65", 0 0, L_0x12164c0; 1 drivers +v0x11fd1a0_0 .net *"_s69", 0 0, L_0x1216600; 1 drivers +v0x11fd280_0 .net *"_s74", 0 0, L_0x1216560; 1 drivers +v0x11fd360_0 .net *"_s80", 0 0, L_0x12167f0; 1 drivers +v0x11fd440_0 .net *"_s84", 0 0, L_0x1216ae0; 1 drivers +v0x11fd520_0 .net *"_s88", 0 0, L_0x1216a20; 1 drivers +v0x11fd600_0 .net *"_s93", 0 0, L_0x1216b80; 1 drivers +v0x11fd6e0_0 .net *"_s99", 0 0, L_0x1216e40; 1 drivers +v0x11fd7c0_0 .net/s "accOut", 10 0, L_0x1204fc0; alias, 1 drivers +v0x11fd8a0_0 .net "anyHasData", 0 0, L_0x1215bc0; 1 drivers +v0x11fd960_0 .net "anyReadAck", 0 0, L_0x1216980; 1 drivers +v0x11fda20_0 .net "anyWantData", 0 0, L_0x1216210; 1 drivers +v0x11fdae0_0 .net "anyWriteAck", 0 0, L_0x1216f70; 1 drivers +v0x11fdba0_0 .net "clk", 0 0, v0x1204dc0_0; 1 drivers +o0x7fcb83f23a38 .functor BUFZ 15, C4; HiZ drive +v0x11fdc60_0 .net "down", 14 0, o0x7fcb83f23a38; 0 drivers +v0x11fdd40_0 .net "downOut", 14 0, L_0x1218590; 1 drivers +v0x11fde20_0 .net "instruction", 17 0, L_0x1215e50; 1 drivers +v0x11fdf00 .array "instructions", 0 15, 17 0; +v0x11fdfc0_0 .var "last", 2 0; +o0x7fcb83f23af8 .functor BUFZ 15, C4; HiZ drive +v0x11fe0a0_0 .net "left", 14 0, o0x7fcb83f23af8; 0 drivers +v0x11fe180_0 .net "leftOut", 14 0, L_0x12182d0; 1 drivers +v0x11fe260_0 .var "mode", 2 0; +v0x11fe340 .array/s "outVals", 2 5, 10 0; +v0x11fe480_0 .var "phase", 2 0; +v0x11fe560_0 .net "portsHaveData", 5 2, L_0x1215870; 1 drivers +v0x11fc950_0 .net "portsWantData", 5 2, L_0x1215f60; 1 drivers +v0x11fca30_0 .net "readAckIn", 5 2, L_0x12166a0; 1 drivers +v0x11fea10_0 .var "readAckOut", 5 2; +v0x11feab0_0 .var "readTarget", 2 0; +v0x11feb90_0 .var/s "readValue", 10 0; +L_0x7fcb83eda018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x11fec70 .array "regVals", 0 7; +v0x11fec70_0 .net/s v0x11fec70 0, 10 0, L_0x7fcb83eda018; 1 drivers +v0x11fec70_1 .net/s v0x11fec70 1, 10 0, L_0x12150b0; 1 drivers +v0x11fec70_2 .net/s v0x11fec70 2, 10 0, L_0x1215170; 1 drivers +v0x11fec70_3 .net/s v0x11fec70 3, 10 0, L_0x1215240; 1 drivers +v0x11fec70_4 .net/s v0x11fec70 4, 10 0, L_0x1215310; 1 drivers +v0x11fec70_5 .net/s v0x11fec70 5, 10 0, L_0x1215410; 1 drivers +o0x7fcb83f23eb8 .functor BUFZ 11, C4; HiZ drive +v0x11fec70_6 .net/s v0x11fec70 6, 10 0, o0x7fcb83f23eb8; 0 drivers +o0x7fcb83f23ee8 .functor BUFZ 11, C4; HiZ drive +v0x11fec70_7 .net/s v0x11fec70 7, 10 0, o0x7fcb83f23ee8; 0 drivers +v0x11fee80_0 .net "right", 14 0, L_0x121c460; alias, 1 drivers +v0x11fef60_0 .net "rightOut", 14 0, L_0x1218b40; alias, 1 drivers +o0x7fcb83f23f78 .functor BUFZ 15, C4; HiZ drive +v0x11ff040_0 .net "up", 14 0, o0x7fcb83f23f78; 0 drivers +v0x11ff120_0 .net "upOut", 14 0, L_0x1218080; 1 drivers +v0x11ff200_0 .var "weHaveData", 5 2; +v0x11ff2e0_0 .var "weWantData", 5 2; +v0x11ff3c0_0 .net "writeAckIn", 5 2, L_0x1216c50; 1 drivers +v0x11ff4a0_0 .var "writeAckOut", 5 2; +v0x11ff580_0 .var "writeTarget", 2 0; +v0x11ff660_0 .var/s "writeValue", 10 0; +E_0x11c3a70 .event negedge, v0x11fdba0_0; +E_0x11a1470 .event posedge, v0x11fdba0_0; +L_0x1215170 .part o0x7fcb83f23af8, 0, 11; +L_0x1215240 .part L_0x121c460, 0, 11; +L_0x1215310 .part o0x7fcb83f23f78, 0, 11; +L_0x1215410 .part o0x7fcb83f23a38, 0, 11; +L_0x1215540 .part o0x7fcb83f23af8, 11, 1; +L_0x1215660 .part L_0x121c460, 11, 1; +L_0x12157d0 .part o0x7fcb83f23f78, 11, 1; +L_0x1215870 .concat8 [ 1 1 1 1], L_0x1215540, L_0x1215660, L_0x12157d0, L_0x1215a80; +L_0x1215a80 .part o0x7fcb83f23a38, 11, 1; +L_0x1215bc0 .reduce/or L_0x1215870; +L_0x1215d10 .part o0x7fcb83f23af8, 12, 1; +L_0x1215db0 .part L_0x121c460, 12, 1; +L_0x1215ec0 .part o0x7fcb83f23f78, 12, 1; +L_0x1215f60 .concat8 [ 1 1 1 1], L_0x1215d10, L_0x1215db0, L_0x1215ec0, L_0x1216120; +L_0x1216120 .part o0x7fcb83f23a38, 12, 1; +L_0x1216210 .reduce/or L_0x1215f60; +L_0x1216390 .part o0x7fcb83f23af8, 13, 1; +L_0x12164c0 .part L_0x121c460, 13, 1; +L_0x1216600 .part o0x7fcb83f23f78, 13, 1; +L_0x12166a0 .concat8 [ 1 1 1 1], L_0x1216390, L_0x12164c0, L_0x1216600, L_0x1216560; +L_0x1216560 .part o0x7fcb83f23a38, 13, 1; +L_0x1216980 .reduce/or L_0x12166a0; +L_0x12167f0 .part o0x7fcb83f23af8, 14, 1; +L_0x1216ae0 .part L_0x121c460, 14, 1; +L_0x1216a20 .part o0x7fcb83f23f78, 14, 1; +L_0x1216c50 .concat8 [ 1 1 1 1], L_0x12167f0, L_0x1216ae0, L_0x1216a20, L_0x1216b80; +L_0x1216b80 .part o0x7fcb83f23a38, 14, 1; +L_0x1216f70 .reduce/or L_0x1216c50; +L_0x1216e40 .part v0x11fea10_0, 0, 1; +L_0x1217150 .part v0x11fea10_0, 1, 1; +L_0x1217060 .part v0x11fea10_0, 2, 1; +L_0x1217340 .part v0x11fea10_0, 3, 1; +L_0x1217240 .part v0x11ff4a0_0, 0, 1; +L_0x1217580 .part v0x11ff4a0_0, 1, 1; +L_0x1217470 .part v0x11ff4a0_0, 2, 1; +L_0x1217740 .part v0x11ff4a0_0, 3, 1; +L_0x1217620 .part v0x11ff2e0_0, 0, 1; +L_0x12179a0 .part v0x11ff2e0_0, 1, 1; +L_0x1217870 .part v0x11ff2e0_0, 2, 1; +L_0x1217b80 .part v0x11ff2e0_0, 3, 1; +L_0x1217a40 .part v0x11ff200_0, 0, 1; +L_0x1217d70 .part v0x11ff200_0, 1, 1; +L_0x1217c20 .part v0x11ff200_0, 2, 1; +L_0x1217cc0 .part v0x11ff200_0, 3, 1; +L_0x1217e10 .array/port v0x11fdf00, L_0x1218170; +L_0x1218170 .concat [ 4 2 0 0], v0x11fb0d0_0, L_0x7fcb83eda060; +LS_0x1218080_0_0 .concat8 [ 11 1 1 1], v0x11fe340_2, L_0x1217c20, L_0x1217870, L_0x1217470; +LS_0x1218080_0_4 .concat8 [ 1 0 0 0], L_0x1217060; +L_0x1218080 .concat8 [ 14 1 0 0], LS_0x1218080_0_0, LS_0x1218080_0_4; +LS_0x1218590_0_0 .concat8 [ 11 1 1 1], v0x11fe340_3, L_0x1217cc0, L_0x1217b80, L_0x1217740; +LS_0x1218590_0_4 .concat8 [ 1 0 0 0], L_0x1217340; +L_0x1218590 .concat8 [ 14 1 0 0], LS_0x1218590_0_0, LS_0x1218590_0_4; +LS_0x12182d0_0_0 .concat8 [ 11 1 1 1], v0x11fe340_0, L_0x1217a40, L_0x1217620, L_0x1217240; +LS_0x12182d0_0_4 .concat8 [ 1 0 0 0], L_0x1216e40; +L_0x12182d0 .concat8 [ 14 1 0 0], LS_0x12182d0_0_0, LS_0x12182d0_0_4; +LS_0x1218b40_0_0 .concat8 [ 11 1 1 1], v0x11fe340_1, L_0x1217d70, L_0x12179a0, L_0x1217580; +LS_0x1218b40_0_4 .concat8 [ 1 0 0 0], L_0x1217150; +L_0x1218b40 .concat8 [ 14 1 0 0], LS_0x1218b40_0_0, LS_0x1218b40_0_4; +L_0x1218830 .part L_0x1215e50, 14, 4; +L_0x1218f50 .part L_0x1215e50, 11, 3; +L_0x1218d60 .part L_0x1215e50, 8, 3; +L_0x12191a0 .part L_0x1215e50, 10, 4; +L_0x1218ff0 .part L_0x1215e50, 0, 11; +S_0x11ff8e0 .scope module, "right" "tis100" 2 13, 3 49 0, S_0x11b8110; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x11ffad0 .param/str "memFile" 0 3 60, "right.dat"; +L_0x1218e90 .functor BUFZ 11, v0x11ffd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1219090 .functor BUFZ 11, v0x11ffd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1219f80 .functor BUFZ 18, L_0x121bfa0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x11ffd10_0 .var/s "ACC", 10 0; +v0x11ffe10_0 .var/s "BAK", 10 0; +v0x11ffef0_0 .net "DST", 2 0, L_0x121d150; 1 drivers +v0x11fffb0_0 .net/s "IMM", 10 0, L_0x121d1f0; 1 drivers +v0x1200090_0 .net "INST", 3 0, L_0x121c9b0; 1 drivers +v0x12001c0_0 .net "LABEL", 3 0, L_0x121d3a0; 1 drivers +v0x12002a0_0 .var "PC", 3 0; +v0x1200380_0 .var "PCNEXT", 3 0; +v0x1200460_0 .net "SRC", 2 0, L_0x121cf60; 1 drivers +v0x12005d0_0 .net *"_s103", 0 0, L_0x121b2e0; 1 drivers +v0x12006b0_0 .net *"_s107", 0 0, L_0x121b1f0; 1 drivers +v0x1200790_0 .net *"_s111", 0 0, L_0x121b4d0; 1 drivers +v0x1200870_0 .net *"_s115", 0 0, L_0x121b3d0; 1 drivers +v0x1200950_0 .net *"_s119", 0 0, L_0x121b710; 1 drivers +v0x1200a30_0 .net *"_s123", 0 0, L_0x121b600; 1 drivers +v0x1200b10_0 .net *"_s127", 0 0, L_0x121b8d0; 1 drivers +v0x1200bf0_0 .net *"_s131", 0 0, L_0x121b7b0; 1 drivers +v0x1200da0_0 .net *"_s135", 0 0, L_0x121bb30; 1 drivers +v0x1200e40_0 .net *"_s139", 0 0, L_0x121ba00; 1 drivers +v0x1200f20_0 .net *"_s143", 0 0, L_0x121bd10; 1 drivers +v0x1201000_0 .net *"_s147", 0 0, L_0x121bbd0; 1 drivers +v0x12010e0_0 .net *"_s151", 0 0, L_0x121bf00; 1 drivers +v0x12011c0_0 .net *"_s155", 0 0, L_0x121bdb0; 1 drivers +v0x12012a0_0 .net *"_s159", 0 0, L_0x121be50; 1 drivers +v0x1201380_0 .net *"_s160", 17 0, L_0x121bfa0; 1 drivers +v0x1201460_0 .net *"_s162", 5 0, L_0x121c300; 1 drivers +L_0x7fcb83eda0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1201540_0 .net *"_s165", 1 0, L_0x7fcb83eda0f0; 1 drivers +v0x1203480_2 .array/port v0x1203480, 2; +v0x1201620_0 .net *"_s173", 10 0, v0x1203480_2; 1 drivers +v0x1203480_3 .array/port v0x1203480, 3; +v0x1201700_0 .net *"_s179", 10 0, v0x1203480_3; 1 drivers +v0x1203480_0 .array/port v0x1203480, 0; +v0x12017e0_0 .net *"_s185", 10 0, v0x1203480_0; 1 drivers +v0x1203480_1 .array/port v0x1203480, 1; +v0x12018c0_0 .net *"_s191", 10 0, v0x1203480_1; 1 drivers +v0x12019a0_0 .net *"_s23", 0 0, L_0x12197a0; 1 drivers +v0x1201a80_0 .net *"_s27", 0 0, L_0x1219870; 1 drivers +v0x1200cd0_0 .net *"_s31", 0 0, L_0x1219940; 1 drivers +v0x1201d50_0 .net *"_s36", 0 0, L_0x1219c10; 1 drivers +v0x1201e30_0 .net *"_s42", 0 0, L_0x1219e40; 1 drivers +v0x1201f10_0 .net *"_s46", 0 0, L_0x1219ee0; 1 drivers +v0x1201ff0_0 .net *"_s50", 0 0, L_0x1219ff0; 1 drivers +v0x12020d0_0 .net *"_s55", 0 0, L_0x121a200; 1 drivers +v0x12021b0_0 .net *"_s61", 0 0, L_0x121a470; 1 drivers +v0x1202290_0 .net *"_s65", 0 0, L_0x121a510; 1 drivers +v0x1202370_0 .net *"_s69", 0 0, L_0x121a6e0; 1 drivers +v0x1202450_0 .net *"_s74", 0 0, L_0x121a640; 1 drivers +v0x1202530_0 .net *"_s80", 0 0, L_0x121a8d0; 1 drivers +v0x1202610_0 .net *"_s84", 0 0, L_0x121acd0; 1 drivers +v0x12026f0_0 .net *"_s88", 0 0, L_0x121ab00; 1 drivers +v0x12027d0_0 .net *"_s93", 0 0, L_0x121ad70; 1 drivers +v0x12028b0_0 .net *"_s99", 0 0, L_0x121afd0; 1 drivers +v0x1202990_0 .net/s "accOut", 10 0, L_0x1218e90; alias, 1 drivers +v0x1202a70_0 .net "anyHasData", 0 0, L_0x1219d50; 1 drivers +v0x1202b30_0 .net "anyReadAck", 0 0, L_0x121aa60; 1 drivers +v0x1202bf0_0 .net "anyWantData", 0 0, L_0x121a2f0; 1 drivers +v0x1202cb0_0 .net "anyWriteAck", 0 0, L_0x121b100; 1 drivers +v0x1202d70_0 .net "clk", 0 0, v0x1204dc0_0; alias, 1 drivers +o0x7fcb83f24cc8 .functor BUFZ 15, C4; HiZ drive +v0x1202e10_0 .net "down", 14 0, o0x7fcb83f24cc8; 0 drivers +v0x1202ed0_0 .net "downOut", 14 0, L_0x121c6d0; 1 drivers +v0x1202fb0_0 .net "instruction", 17 0, L_0x1219f80; 1 drivers +v0x1203090 .array "instructions", 0 15, 17 0; +v0x1203150_0 .var "last", 2 0; +v0x1203230_0 .net "left", 14 0, L_0x1218b40; alias, 1 drivers +v0x12032f0_0 .net "leftOut", 14 0, L_0x121c460; alias, 1 drivers +v0x12033c0_0 .var "mode", 2 0; +v0x1203480 .array/s "outVals", 2 5, 10 0; +v0x12035f0_0 .var "phase", 2 0; +v0x12036d0_0 .net "portsHaveData", 5 2, L_0x1219a30; 1 drivers +v0x1201b20_0 .net "portsWantData", 5 2, L_0x121a090; 1 drivers +v0x1201c00_0 .net "readAckIn", 5 2, L_0x121a780; 1 drivers +v0x1203b80_0 .var "readAckOut", 5 2; +v0x1203c20_0 .var "readTarget", 2 0; +v0x1203cc0_0 .var/s "readValue", 10 0; +L_0x7fcb83eda0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1203da0 .array "regVals", 0 7; +v0x1203da0_0 .net/s v0x1203da0 0, 10 0, L_0x7fcb83eda0a8; 1 drivers +v0x1203da0_1 .net/s v0x1203da0 1, 10 0, L_0x1219090; 1 drivers +v0x1203da0_2 .net/s v0x1203da0 2, 10 0, L_0x1219400; 1 drivers +v0x1203da0_3 .net/s v0x1203da0 3, 10 0, L_0x1219530; 1 drivers +v0x1203da0_4 .net/s v0x1203da0 4, 10 0, L_0x12195d0; 1 drivers +v0x1203da0_5 .net/s v0x1203da0 5, 10 0, L_0x1219670; 1 drivers +o0x7fcb83f250e8 .functor BUFZ 11, C4; HiZ drive +v0x1203da0_6 .net/s v0x1203da0 6, 10 0, o0x7fcb83f250e8; 0 drivers +o0x7fcb83f25118 .functor BUFZ 11, C4; HiZ drive +v0x1203da0_7 .net/s v0x1203da0 7, 10 0, o0x7fcb83f25118; 0 drivers +o0x7fcb83f25148 .functor BUFZ 15, C4; HiZ drive +v0x1203fb0_0 .net "right", 14 0, o0x7fcb83f25148; 0 drivers +v0x1204090_0 .net "rightOut", 14 0, L_0x121cd40; 1 drivers +o0x7fcb83f251a8 .functor BUFZ 15, C4; HiZ drive +v0x1204170_0 .net "up", 14 0, o0x7fcb83f251a8; 0 drivers +v0x1204250_0 .net "upOut", 14 0, L_0x121c1e0; 1 drivers +v0x1204330_0 .var "weHaveData", 5 2; +v0x1204410_0 .var "weWantData", 5 2; +v0x12044f0_0 .net "writeAckIn", 5 2, L_0x121ae40; 1 drivers +v0x12045d0_0 .var "writeAckOut", 5 2; +v0x12046b0_0 .var "writeTarget", 2 0; +v0x1204790_0 .var/s "writeValue", 10 0; +L_0x1219400 .part L_0x1218b40, 0, 11; +L_0x1219530 .part o0x7fcb83f25148, 0, 11; +L_0x12195d0 .part o0x7fcb83f251a8, 0, 11; +L_0x1219670 .part o0x7fcb83f24cc8, 0, 11; +L_0x12197a0 .part L_0x1218b40, 11, 1; +L_0x1219870 .part o0x7fcb83f25148, 11, 1; +L_0x1219940 .part o0x7fcb83f251a8, 11, 1; +L_0x1219a30 .concat8 [ 1 1 1 1], L_0x12197a0, L_0x1219870, L_0x1219940, L_0x1219c10; +L_0x1219c10 .part o0x7fcb83f24cc8, 11, 1; +L_0x1219d50 .reduce/or L_0x1219a30; +L_0x1219e40 .part L_0x1218b40, 12, 1; +L_0x1219ee0 .part o0x7fcb83f25148, 12, 1; +L_0x1219ff0 .part o0x7fcb83f251a8, 12, 1; +L_0x121a090 .concat8 [ 1 1 1 1], L_0x1219e40, L_0x1219ee0, L_0x1219ff0, L_0x121a200; +L_0x121a200 .part o0x7fcb83f24cc8, 12, 1; +L_0x121a2f0 .reduce/or L_0x121a090; +L_0x121a470 .part L_0x1218b40, 13, 1; +L_0x121a510 .part o0x7fcb83f25148, 13, 1; +L_0x121a6e0 .part o0x7fcb83f251a8, 13, 1; +L_0x121a780 .concat8 [ 1 1 1 1], L_0x121a470, L_0x121a510, L_0x121a6e0, L_0x121a640; +L_0x121a640 .part o0x7fcb83f24cc8, 13, 1; +L_0x121aa60 .reduce/or L_0x121a780; +L_0x121a8d0 .part L_0x1218b40, 14, 1; +L_0x121acd0 .part o0x7fcb83f25148, 14, 1; +L_0x121ab00 .part o0x7fcb83f251a8, 14, 1; +L_0x121ae40 .concat8 [ 1 1 1 1], L_0x121a8d0, L_0x121acd0, L_0x121ab00, L_0x121ad70; +L_0x121ad70 .part o0x7fcb83f24cc8, 14, 1; +L_0x121b100 .reduce/or L_0x121ae40; +L_0x121afd0 .part v0x1203b80_0, 0, 1; +L_0x121b2e0 .part v0x1203b80_0, 1, 1; +L_0x121b1f0 .part v0x1203b80_0, 2, 1; +L_0x121b4d0 .part v0x1203b80_0, 3, 1; +L_0x121b3d0 .part v0x12045d0_0, 0, 1; +L_0x121b710 .part v0x12045d0_0, 1, 1; +L_0x121b600 .part v0x12045d0_0, 2, 1; +L_0x121b8d0 .part v0x12045d0_0, 3, 1; +L_0x121b7b0 .part v0x1204410_0, 0, 1; +L_0x121bb30 .part v0x1204410_0, 1, 1; +L_0x121ba00 .part v0x1204410_0, 2, 1; +L_0x121bd10 .part v0x1204410_0, 3, 1; +L_0x121bbd0 .part v0x1204330_0, 0, 1; +L_0x121bf00 .part v0x1204330_0, 1, 1; +L_0x121bdb0 .part v0x1204330_0, 2, 1; +L_0x121be50 .part v0x1204330_0, 3, 1; +L_0x121bfa0 .array/port v0x1203090, L_0x121c300; +L_0x121c300 .concat [ 4 2 0 0], v0x12002a0_0, L_0x7fcb83eda0f0; +LS_0x121c1e0_0_0 .concat8 [ 11 1 1 1], v0x1203480_2, L_0x121bdb0, L_0x121ba00, L_0x121b600; +LS_0x121c1e0_0_4 .concat8 [ 1 0 0 0], L_0x121b1f0; +L_0x121c1e0 .concat8 [ 14 1 0 0], LS_0x121c1e0_0_0, LS_0x121c1e0_0_4; +LS_0x121c6d0_0_0 .concat8 [ 11 1 1 1], v0x1203480_3, L_0x121be50, L_0x121bd10, L_0x121b8d0; +LS_0x121c6d0_0_4 .concat8 [ 1 0 0 0], L_0x121b4d0; +L_0x121c6d0 .concat8 [ 14 1 0 0], LS_0x121c6d0_0_0, LS_0x121c6d0_0_4; +LS_0x121c460_0_0 .concat8 [ 11 1 1 1], v0x1203480_0, L_0x121bbd0, L_0x121b7b0, L_0x121b3d0; +LS_0x121c460_0_4 .concat8 [ 1 0 0 0], L_0x121afd0; +L_0x121c460 .concat8 [ 14 1 0 0], LS_0x121c460_0_0, LS_0x121c460_0_4; +LS_0x121cd40_0_0 .concat8 [ 11 1 1 1], v0x1203480_1, L_0x121bf00, L_0x121bb30, L_0x121b710; +LS_0x121cd40_0_4 .concat8 [ 1 0 0 0], L_0x121b2e0; +L_0x121cd40 .concat8 [ 14 1 0 0], LS_0x121cd40_0_0, LS_0x121cd40_0_4; +L_0x121c9b0 .part L_0x1219f80, 14, 4; +L_0x121d150 .part L_0x1219f80, 11, 3; +L_0x121cf60 .part L_0x1219f80, 8, 3; +L_0x121d3a0 .part L_0x1219f80, 10, 4; +L_0x121d1f0 .part L_0x1219f80, 0, 11; + .scope S_0x1154c70; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1e2c350_0, 0, 3; + %store/vec4 v0x11fe260_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1e2c570_0, 0, 3; + %store/vec4 v0x11fe480_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1e2c0b0_0, 0, 3; + %store/vec4 v0x11fdfc0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1df3360_0, 0, 11; + %store/vec4 v0x11de280_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1e28d00_0, 0, 11; + %store/vec4 v0x11fac10_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e291c0_0, 0, 4; + %store/vec4 v0x11fb0d0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e2cb00_0, 0, 4; + %store/vec4 v0x11fea10_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e2d3d0_0, 0, 4; + %store/vec4 v0x11ff2e0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e2d590_0, 0, 4; + %store/vec4 v0x11ff4a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e2d2f0_0, 0, 4; + %store/vec4 v0x11ff200_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e2c430, 4, 0; + %store/vec4a v0x11fe340, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e2c430, 4, 0; + %store/vec4a v0x11fe340, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e2c430, 4, 0; + %store/vec4a v0x11fe340, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e2c430, 4, 0; - %pushi/vec4 81921, 0, 18; - %ix/load 4, 0, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1e2bff0, 4, 0; - %pushi/vec4 256, 0, 18; - %ix/load 4, 1, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1e2bff0, 4, 0; - %pushi/vec4 181248, 0, 18; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1e2bff0, 4, 0; + %store/vec4a v0x11fe340, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x11b7840, v0x11fdf00 {0 0 0}; %end; .thread T_0; - .scope S_0x1df4ed0; + .scope S_0x1154c70; T_1 ; - %wait E_0x1d91ae0; - %load/vec4 v0x1e2c350_0; + %wait E_0x11a1470; + %load/vec4 v0x11fe260_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -262,7 +433,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x1e2c570_0; + %load/vec4 v0x11fe480_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -277,183 +448,183 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x1e28fb0_0; + %load/vec4 v0x11faec0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x1e2c650_0; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fe560_0; + %load/vec4 v0x11fb290_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; - %load/vec4 v0x1e29380_0; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4/off/d v0x11fea10_0, 4, 5; + %load/vec4 v0x11fb290_0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; - %load/vec4 v0x1e29380_0; - %assign/vec4 v0x1e2cba0_0, 0; + %assign/vec4 v0x11fe260_0, 0; + %load/vec4 v0x11fb290_0; + %assign/vec4 v0x11feab0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x1e2c650_0; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fe560_0; + %load/vec4 v0x11fdfc0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; - %load/vec4 v0x1e2c0b0_0; - %assign/vec4 v0x1e2cba0_0, 0; + %assign/vec4 v0x11fe260_0, 0; + %load/vec4 v0x11fdfc0_0; + %assign/vec4 v0x11feab0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x1e29380_0; + %load/vec4 v0x11fb290_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x1e2b990_0; + %load/vec4 v0x11fd8a0_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -461,29 +632,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; - %load/vec4 v0x1e29380_0; - %assign/vec4 v0x1e2cba0_0, 0; + %assign/vec4 v0x11fe260_0, 0; + %load/vec4 v0x11fb290_0; + %assign/vec4 v0x11feab0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -491,10 +662,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x1e28fb0_0; + %load/vec4 v0x11faec0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -561,180 +732,181 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x1df3360_0; - %load/vec4 v0x1e2cc80_0; + %load/vec4 v0x11de280_0; + %load/vec4 v0x11feb90_0; %add; - %assign/vec4 v0x1df3360_0, 0; - %load/vec4 v0x1e291c0_0; + %assign/vec4 v0x11de280_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x1df3360_0; - %load/vec4 v0x1e2cc80_0; + %load/vec4 v0x11de280_0; + %load/vec4 v0x11feb90_0; %sub; - %assign/vec4 v0x1df3360_0, 0; - %load/vec4 v0x1e291c0_0; + %assign/vec4 v0x11de280_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fb0d0_0; %pad/u 11; - %load/vec4 v0x1e2cc80_0; + %load/vec4 v0x11feb90_0; %add; %pad/u 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x1e2cc80_0; - %assign/vec4 v0x1e2d750_0, 0; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11feb90_0; + %assign/vec4 v0x11ff660_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x1e28ed0_0; - %assign/vec4 v0x1e2d750_0, 0; - %load/vec4 v0x1e291c0_0; + %vpi_call 3 278 "$display", "here" {0 0 0}; + %load/vec4 v0x11fade0_0; + %assign/vec4 v0x11ff660_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x1df3360_0; - %load/vec4 v0x1e28ed0_0; + %load/vec4 v0x11de280_0; + %load/vec4 v0x11fade0_0; %add; - %assign/vec4 v0x1df3360_0, 0; - %load/vec4 v0x1e291c0_0; + %assign/vec4 v0x11de280_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x1df3360_0; - %load/vec4 v0x1e28ed0_0; + %load/vec4 v0x11de280_0; + %load/vec4 v0x11fade0_0; %sub; - %assign/vec4 v0x1df3360_0, 0; - %load/vec4 v0x1e291c0_0; + %assign/vec4 v0x11de280_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fb0d0_0; %pad/u 11; - %load/vec4 v0x1e28ed0_0; + %load/vec4 v0x11fade0_0; %add; %pad/u 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x1e28d00_0; - %assign/vec4 v0x1df3360_0, 0; - %load/vec4 v0x1df3360_0; - %assign/vec4 v0x1e28d00_0, 0; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fac10_0; + %assign/vec4 v0x11de280_0, 0; + %load/vec4 v0x11de280_0; + %assign/vec4 v0x11fac10_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x1df3360_0; - %assign/vec4 v0x1e28d00_0, 0; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11de280_0; + %assign/vec4 v0x11fac10_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x1df3360_0; + %load/vec4 v0x11de280_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1df3360_0, 0; - %load/vec4 v0x1e291c0_0; + %assign/vec4 v0x11de280_0, 0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x1e290e0_0; - %assign/vec4 v0x1e292a0_0, 0; + %load/vec4 v0x11faff0_0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x1df3360_0; + %load/vec4 v0x11de280_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x1e290e0_0; - %assign/vec4 v0x1e292a0_0, 0; + %load/vec4 v0x11faff0_0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x1df3360_0; + %load/vec4 v0x11de280_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x1e290e0_0; - %assign/vec4 v0x1e292a0_0, 0; + %load/vec4 v0x11faff0_0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1df3360_0; + %load/vec4 v0x11de280_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x1e290e0_0; - %assign/vec4 v0x1e292a0_0, 0; + %load/vec4 v0x11faff0_0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x1df3360_0; + %load/vec4 v0x11de280_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x1e290e0_0; - %assign/vec4 v0x1e292a0_0, 0; + %load/vec4 v0x11faff0_0; + %assign/vec4 v0x11fb1b0_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x1e291c0_0; + %load/vec4 v0x11fb0d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1e292a0_0, 0; + %assign/vec4 v0x11fb1b0_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x1e28fb0_0; + %load/vec4 v0x11faec0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1e28fb0_0; + %load/vec4 v0x11faec0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x1e28de0_0; + %load/vec4 v0x11facf0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1e28de0_0; + %load/vec4 v0x11facf0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -742,162 +914,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x1e28de0_0; + %load/vec4 v0x11facf0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x1e2d750_0; - %assign/vec4 v0x1df3360_0, 0; + %load/vec4 v0x11ff660_0; + %assign/vec4 v0x11de280_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; - %load/vec4 v0x1e28de0_0; + %assign/vec4 v0x11fe260_0, 0; + %load/vec4 v0x11facf0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x1e2c0b0_0; - %assign/vec4 v0x1e2d670_0, 0; - %load/vec4 v0x1e2d750_0; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; + %assign/vec4 v0x11ff580_0, 0; + %load/vec4 v0x11ff660_0; + %load/vec4 v0x11fdfc0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e2c0b0_0; + %load/vec4 v0x11fdfc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; + %assign/vec4/off/d v0x11ff200_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x1e28de0_0; + %load/vec4 v0x11facf0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x1e28de0_0; - %assign/vec4 v0x1e2d670_0, 0; - %load/vec4 v0x1e2d750_0; - %load/vec4 v0x1e28de0_0; + %load/vec4 v0x11facf0_0; + %assign/vec4 v0x11ff580_0, 0; + %load/vec4 v0x11ff660_0; + %load/vec4 v0x11facf0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e28de0_0; + %load/vec4 v0x11facf0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e28de0_0; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11facf0_0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x1e2bb10_0; + %load/vec4 v0x11fda20_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x1e28de0_0; - %assign/vec4 v0x1e2d670_0, 0; + %load/vec4 v0x11facf0_0; + %assign/vec4 v0x11ff580_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x1e2c570_0; + %load/vec4 v0x11fe480_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -912,82 +1084,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x1e2cba0_0; + %load/vec4 v0x11feab0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x1e2b990_0; + %load/vec4 v0x11fd8a0_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; + %assign/vec4 v0x11fe260_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e2d3d0_0, 0, 4; - %load/vec4 v0x1e2c650_0; + %store/vec4 v0x11ff2e0_0, 0, 4; + %load/vec4 v0x11fe560_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x1e2c650_0; + %load/vec4 v0x11fe560_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -995,54 +1167,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x1e2c650_0; - %load/vec4 v0x1e2cba0_0; + %load/vec4 v0x11fe560_0; + %load/vec4 v0x11feab0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; - %load/vec4 v0x1e2cba0_0; + %assign/vec4 v0x11fe260_0, 0; + %load/vec4 v0x11feab0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1e2cd60, 4; - %assign/vec4 v0x1e2cc80_0, 0; + %load/vec4a v0x11fec70, 4; + %assign/vec4 v0x11feb90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e2cba0_0; + %load/vec4 v0x11feab0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2cb00_0, 4, 5; + %assign/vec4/off/d v0x11fea10_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1e2cba0_0; + %load/vec4 v0x11feab0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e2d3d0_0, 4, 5; - %load/vec4 v0x1e2cba0_0; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4/off/d v0x11ff2e0_0, 4, 5; + %load/vec4 v0x11feab0_0; + %assign/vec4 v0x11fdfc0_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x1e2c570_0; + %load/vec4 v0x11fe480_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1058,93 +1230,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x1e2d670_0; + %load/vec4 v0x11ff580_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x1e2bb10_0; + %load/vec4 v0x11fda20_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x1e2aa40_0; + %load/vec4 v0x11fc950_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e2d670_0, 0; + %assign/vec4 v0x11ff580_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e2d2f0_0, 4, 5; - %load/vec4 v0x1e2d750_0; + %assign/vec4/off/d v0x11ff200_0, 4, 5; + %load/vec4 v0x11ff660_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1e2c430, 0, 4; + %assign/vec4/a/d v0x11fe340, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e2c0b0_0, 0; + %assign/vec4 v0x11fdfc0_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1152,31 +1324,31 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x1e2d670_0; + %load/vec4 v0x11ff580_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x1e2d4b0_0; - %load/vec4 v0x1e2d670_0; + %load/vec4 v0x11ff3c0_0; + %load/vec4 v0x11ff580_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1e2d670_0; + %load/vec4 v0x11ff580_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1e2d2f0_0, 4, 1; + %store/vec4 v0x11ff200_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1e2c350_0, 0; + %assign/vec4 v0x11fe260_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1e2c570_0, 0; + %assign/vec4 v0x11fe480_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1185,19 +1357,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x1df4ed0; + .scope S_0x1154c70; T_2 ; - %wait E_0x1db4c40; - %load/vec4 v0x1e2c570_0; + %wait E_0x11c3a70; + %load/vec4 v0x11fe480_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1e2c350_0; + %load/vec4 v0x11fe260_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1e292a0_0; + %load/vec4 v0x11fb1b0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1206,53 +1378,1068 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x1e292a0_0; - %assign/vec4 v0x1e291c0_0, 0; + %load/vec4 v0x11fb1b0_0; + %assign/vec4 v0x11fb0d0_0, 0; T_2.0 ; - %load/vec4 v0x1e2c570_0; + %load/vec4 v0x11fe480_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e2cb00_0, 0, 4; + %store/vec4 v0x11fea10_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x1da8740; + .scope S_0x11ff8e0; T_3 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x12033c0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x12035f0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1203150_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x11ffd10_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x11ffe10_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x12002a0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1203b80_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1204410_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x12045d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1204330_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1203480, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1203480, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1203480, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1203480, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x11ffad0, v0x1203090 {0 0 0}; + %end; + .thread T_3; + .scope S_0x11ff8e0; +T_4 ; + %wait E_0x11a1470; + %load/vec4 v0x12033c0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x12035f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.6, 6; + %jmp T_4.7; +T_4.4 ; + %load/vec4 v0x1200090_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x1200460_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_4.10, 5; + %load/vec4 v0x1200460_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %jmp T_4.11; +T_4.10 ; + %load/vec4 v0x1200460_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_4.12, 5; + %load/vec4 v0x12036d0_0; + %load/vec4 v0x1200460_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.14, 8; + %load/vec4 v0x1200460_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1200460_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %load/vec4 v0x1200460_0; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.15; +T_4.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x12033c0_0, 0; + %load/vec4 v0x1200460_0; + %assign/vec4 v0x1203c20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1200460_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1204410_0, 4, 5; +T_4.15 ; + %jmp T_4.13; +T_4.12 ; + %load/vec4 v0x1200460_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.16, 4; + %load/vec4 v0x1203150_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_4.18, 4; + %load/vec4 v0x1203150_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %jmp T_4.19; +T_4.18 ; + %load/vec4 v0x12036d0_0; + %load/vec4 v0x1203150_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.20, 8; + %load/vec4 v0x1203150_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1203150_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %jmp T_4.21; +T_4.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x12033c0_0, 0; + %load/vec4 v0x1203150_0; + %assign/vec4 v0x1203c20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1203150_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1204410_0, 4, 5; +T_4.21 ; +T_4.19 ; + %jmp T_4.17; +T_4.16 ; + %load/vec4 v0x1200460_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.22, 4; + %load/vec4 v0x1202a70_0; + %flag_set/vec4 8; + %jmp/0xz T_4.24, 8; + %load/vec4 v0x12036d0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.26, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.27; +T_4.26 ; + %load/vec4 v0x12036d0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.28, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.29; +T_4.28 ; + %load/vec4 v0x12036d0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.30, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.31; +T_4.30 ; + %load/vec4 v0x12036d0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.32, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1203150_0, 0; +T_4.32 ; +T_4.31 ; +T_4.29 ; +T_4.27 ; + %jmp T_4.25; +T_4.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x12033c0_0, 0; + %load/vec4 v0x1200460_0; + %assign/vec4 v0x1203c20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204410_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204410_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204410_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204410_0, 4, 5; +T_4.25 ; +T_4.22 ; +T_4.17 ; +T_4.13 ; +T_4.11 ; +T_4.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.7; +T_4.5 ; + %load/vec4 v0x1200090_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_4.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_4.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_4.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_4.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_4.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_4.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_4.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_4.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_4.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_4.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_4.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_4.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_4.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_4.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_4.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_4.49, 6; + %jmp T_4.50; +T_4.34 ; + %load/vec4 v0x11ffd10_0; + %load/vec4 v0x1203cc0_0; + %add; + %assign/vec4 v0x11ffd10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.35 ; + %load/vec4 v0x11ffd10_0; + %load/vec4 v0x1203cc0_0; + %sub; + %assign/vec4 v0x11ffd10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.36 ; + %load/vec4 v0x12002a0_0; + %pad/u 11; + %load/vec4 v0x1203cc0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.37 ; + %load/vec4 v0x1203cc0_0; + %assign/vec4 v0x1204790_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.38 ; + %vpi_call 3 278 "$display", "here" {0 0 0}; + %load/vec4 v0x11fffb0_0; + %assign/vec4 v0x1204790_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.39 ; + %load/vec4 v0x11ffd10_0; + %load/vec4 v0x11fffb0_0; + %add; + %assign/vec4 v0x11ffd10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.40 ; + %load/vec4 v0x11ffd10_0; + %load/vec4 v0x11fffb0_0; + %sub; + %assign/vec4 v0x11ffd10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.41 ; + %load/vec4 v0x12002a0_0; + %pad/u 11; + %load/vec4 v0x11fffb0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.42 ; + %load/vec4 v0x11ffe10_0; + %assign/vec4 v0x11ffd10_0, 0; + %load/vec4 v0x11ffd10_0; + %assign/vec4 v0x11ffe10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.43 ; + %load/vec4 v0x11ffd10_0; + %assign/vec4 v0x11ffe10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.44 ; + %load/vec4 v0x11ffd10_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x11ffd10_0, 0; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.45 ; + %load/vec4 v0x12001c0_0; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.50; +T_4.46 ; + %load/vec4 v0x11ffd10_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_4.51, 4; + %load/vec4 v0x12001c0_0; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.52; +T_4.51 ; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; +T_4.52 ; + %jmp T_4.50; +T_4.47 ; + %load/vec4 v0x11ffd10_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_4.53, 4; + %load/vec4 v0x12001c0_0; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.54; +T_4.53 ; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; +T_4.54 ; + %jmp T_4.50; +T_4.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x11ffd10_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_4.55, 5; + %load/vec4 v0x12001c0_0; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.56; +T_4.55 ; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; +T_4.56 ; + %jmp T_4.50; +T_4.49 ; + %load/vec4 v0x11ffd10_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_4.57, 5; + %load/vec4 v0x12001c0_0; + %assign/vec4 v0x1200380_0, 0; + %jmp T_4.58; +T_4.57 ; + %load/vec4 v0x12002a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1200380_0, 0; +T_4.58 ; + %jmp T_4.50; +T_4.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.7; +T_4.6 ; + %load/vec4 v0x1200090_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1200090_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_4.59, 4; + %load/vec4 v0x11ffef0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x11ffef0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1203150_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_4.61, 9; + %load/vec4 v0x11ffef0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_4.63, 4; + %load/vec4 v0x1204790_0; + %assign/vec4 v0x11ffd10_0, 0; +T_4.63 ; + %jmp T_4.62; +T_4.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x12033c0_0, 0; + %load/vec4 v0x11ffef0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.65, 4; + %load/vec4 v0x1203150_0; + %assign/vec4 v0x12046b0_0, 0; + %load/vec4 v0x1204790_0; + %load/vec4 v0x1203150_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1203150_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %jmp T_4.66; +T_4.65 ; + %load/vec4 v0x11ffef0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.67, 4; + %load/vec4 v0x11ffef0_0; + %assign/vec4 v0x12046b0_0, 0; + %load/vec4 v0x1204790_0; + %load/vec4 v0x11ffef0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x11ffef0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x11ffef0_0; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.68; +T_4.67 ; + %load/vec4 v0x1202bf0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.69, 8; + %load/vec4 v0x1201b20_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.72; +T_4.71 ; + %load/vec4 v0x1201b20_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.73, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.74; +T_4.73 ; + %load/vec4 v0x1201b20_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.75, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.76; +T_4.75 ; + %load/vec4 v0x1201b20_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.77, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1203150_0, 0; +T_4.77 ; +T_4.76 ; +T_4.74 ; +T_4.72 ; + %jmp T_4.70; +T_4.69 ; + %load/vec4 v0x11ffef0_0; + %assign/vec4 v0x12046b0_0, 0; +T_4.70 ; +T_4.68 ; +T_4.66 ; +T_4.62 ; +T_4.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.7; +T_4.7 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.1 ; + %load/vec4 v0x12035f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.81, 6; + %jmp T_4.82; +T_4.79 ; + %load/vec4 v0x1203c20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.83, 4; + %load/vec4 v0x1202a70_0; + %flag_set/vec4 8; + %jmp/0xz T_4.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x12033c0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1204410_0, 0, 4; + %load/vec4 v0x12036d0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.87, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.88; +T_4.87 ; + %load/vec4 v0x12036d0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.89, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.90; +T_4.89 ; + %load/vec4 v0x12036d0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.91, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.92; +T_4.91 ; + %load/vec4 v0x12036d0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.93, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1203150_0, 0; +T_4.93 ; +T_4.92 ; +T_4.90 ; +T_4.88 ; +T_4.85 ; + %jmp T_4.84; +T_4.83 ; + %load/vec4 v0x12036d0_0; + %load/vec4 v0x1203c20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x12033c0_0, 0; + %load/vec4 v0x1203c20_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1203da0, 4; + %assign/vec4 v0x1203cc0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1203c20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1203b80_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1203c20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1204410_0, 4, 5; + %load/vec4 v0x1203c20_0; + %assign/vec4 v0x1203150_0, 0; +T_4.95 ; +T_4.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.82; +T_4.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.82; +T_4.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.82; +T_4.82 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.2 ; + %load/vec4 v0x12035f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.99, 6; + %jmp T_4.100; +T_4.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.100; +T_4.98 ; + %load/vec4 v0x12046b0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.101, 4; + %load/vec4 v0x1202bf0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.103, 8; + %load/vec4 v0x1201b20_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.106; +T_4.105 ; + %load/vec4 v0x1201b20_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.107, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.108; +T_4.107 ; + %load/vec4 v0x1201b20_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.109, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1203150_0, 0; + %jmp T_4.110; +T_4.109 ; + %load/vec4 v0x1201b20_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.111, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x12046b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1204330_0, 4, 5; + %load/vec4 v0x1204790_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1203480, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1203150_0, 0; +T_4.111 ; +T_4.110 ; +T_4.108 ; +T_4.106 ; +T_4.103 ; +T_4.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.100; +T_4.99 ; + %load/vec4 v0x12046b0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.113, 4; + %load/vec4 v0x12044f0_0; + %load/vec4 v0x12046b0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x12046b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1204330_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x12033c0_0, 0; +T_4.115 ; +T_4.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x12035f0_0, 0; + %jmp T_4.100; +T_4.100 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x11ff8e0; +T_5 ; + %wait E_0x11c3a70; + %load/vec4 v0x12035f0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x12033c0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1200380_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %load/vec4 v0x1200380_0; + %assign/vec4 v0x12002a0_0, 0; +T_5.0 ; + %load/vec4 v0x12035f0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_5.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1203b80_0, 0, 4; +T_5.2 ; + %jmp T_5; + .thread T_5; + .scope S_0x11b8110; +T_6 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x1e2dbb0_0, 0, 33; + %store/vec4 v0x1204f00_0, 0, 33; %pushi/vec4 0, 0, 33; - %store/vec4 v0x1e2dbb0_0, 0, 33; -T_3.0 ; - %load/vec4 v0x1e2dbb0_0; - %cmpi/u 10, 0, 33; - %jmp/0xz T_3.1, 5; + %store/vec4 v0x1204f00_0, 0, 33; +T_6.0 ; + %load/vec4 v0x1204f00_0; + %cmpi/u 100, 0, 33; + %jmp/0xz T_6.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1e2dae0_0, 0, 1; + %store/vec4 v0x1204dc0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e2dae0_0, 0, 1; + %store/vec4 v0x1204dc0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1e2dae0_0, 0, 1; + %store/vec4 v0x1204dc0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e2dae0_0, 0, 1; + %store/vec4 v0x1204dc0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1e2dae0_0, 0, 1; + %store/vec4 v0x1204dc0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e2dae0_0, 0, 1; + %store/vec4 v0x1204dc0_0, 0, 1; %delay 1, 0; - %vpi_call 2 19 "$display", v0x1e2d9d0_0 {0 0 0}; - %load/vec4 v0x1e2dbb0_0; + %vpi_call 2 24 "$display", "accLeft = %d \012accRight= %d\012", v0x1204c50_0, v0x1204cf0_0 {0 0 0}; + %load/vec4 v0x1204f00_0; %addi 1, 0, 33; - %store/vec4 v0x1e2dbb0_0, 0, 33; - %jmp T_3.0; -T_3.1 ; + %store/vec4 v0x1204f00_0, 0, 33; + %jmp T_6.0; +T_6.1 ; %end; - .thread T_3; + .thread T_6; # The file index is used to find the file name in the following table. :file_names 4; "N/A"; diff --git a/test.vcd b/test.vcd new file mode 100644 index 0000000..362cc40 --- /dev/null +++ b/test.vcd @@ -0,0 +1,577 @@ +$date + Mon Dec 11 21:06:40 2017 +$end +$version + Icarus Verilog +$end +$timescale + 1s +$end +$scope module stackMemoryTestBench $end +$var wire 15 ! out [14:0] $end +$var reg 1 " clk $end +$var reg 6 # counter [5:0] $end +$var reg 1 $ dutpassed $end +$var reg 15 % in [14:0] $end +$var reg 3 & phase [2:0] $end +$var reg 4 ' testcase [3:0] $end +$var reg 11 ( val [10:0] $end +$scope module dut $end +$var wire 1 " clk $end +$var wire 15 ) in [14:0] $end +$var reg 15 * out [14:0] $end +$var reg 3 + phase [2:0] $end +$var reg 4 , pointer [3:0] $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +b100 , +b1 + +b1110101110010 * +b0 ) +bx ( +b0 ' +b1 & +b0 % +1$ +b1 # +0" +b1110101110010 ! +$end +#10 +1" +#20 +b10 & +b10 + +0" +#30 +b101110101110010 ! +b101110101110010 * +b11 , +1" +b1 ' +b1000000000000 % +b1000000000000 ) +#40 +b0 + +b1110101110010 ! +b1110101110010 * +b0 & +0" +#50 +b1110101110110 ! +b1110101110110 * +b10 , +b100000000000000 % +b100000000000000 ) +b10101110010 ( +b10 ' +1" +#60 +b1 & +b1 + +0" +#70 +1" +#80 +b10 + +b10 & +0" +#90 +b100100010111010 % +b100100010111010 ) +b10111010 ( +1" +#100 +b0 & +b100010111010 % +b100010111010 ) +b0 + +0" +#110 +b10111010 % +b10111010 ) +b11 ' +b11110101110110 ! +b11110101110110 * +b11 , +1" +#120 +b1 + +b1 & +0" +#130 +1" +#140 +b10 & +b10 + +0" +#150 +b11100010111010 ! +b11100010111010 * +1" +#160 +b0 + +b1100010111010 ! +b1100010111010 * +b0 & +0" +#170 +b1110101110110 ! +b1110101110110 * +b10 , +b100 ' +b101000010111010 % +b101000010111010 ) +1" +#180 +b1 & +b1 + +0" +#190 +1" +#200 +b10 + +b10 & +0" +#210 +b10 # +b101110101110110 ! +b101110101110110 * +b1 , +1" +#220 +b0 & +b1000010111010 % +b1000010111010 ) +b0 + +b1110101110110 ! +b1110101110110 * +0" +#230 +1" +#240 +b1 + +b1 & +0" +#250 +1" +#260 +b10 & +b10 + +0" +#270 +b101 ' +b100000000000 % +b100000000000 ) +b0 # +b101000000000000 ! +b101000000000000 * +b0 , +1" +#280 +b0 + +b1000000000000 ! +b1000000000000 * +b0 & +0" +#290 +b100000000001 % +b100000000001 ) +b1 # +b11100000000000 ! +b11100000000000 * +b1 , +1" +#300 +b1 & +b1 + +0" +#310 +1" +#320 +b10 + +b10 & +0" +#330 +1" +#340 +b0 & +b0 + +b1100000000000 ! +b1100000000000 * +0" +#350 +b100000000010 % +b100000000010 ) +b10 # +b11100000000000 ! +b11100000000000 * +b10 , +1" +#360 +b1 + +b1 & +0" +#370 +1" +#380 +b10 & +b10 + +0" +#390 +b11100000000001 ! +b11100000000001 * +1" +#400 +b0 + +b1100000000001 ! +b1100000000001 * +b0 & +0" +#410 +b100000000011 % +b100000000011 ) +b11 # +b11100000000001 ! +b11100000000001 * +b11 , +1" +#420 +b1 & +b1 + +0" +#430 +1" +#440 +b10 + +b10 & +0" +#450 +b11100000000010 ! +b11100000000010 * +1" +#460 +b0 & +b0 + +b1100000000010 ! +b1100000000010 * +0" +#470 +b100000000100 % +b100000000100 ) +b100 # +b11100000000010 ! +b11100000000010 * +b100 , +1" +#480 +b1 + +b1 & +0" +#490 +1" +#500 +b10 & +b10 + +0" +#510 +b11100000000011 ! +b11100000000011 * +1" +#520 +b0 + +b1100000000011 ! +b1100000000011 * +b0 & +0" +#530 +b100000000101 % +b100000000101 ) +b101 # +b11100000000011 ! +b11100000000011 * +b101 , +1" +#540 +b1 & +b1 + +0" +#550 +1" +#560 +b10 + +b10 & +0" +#570 +b11100000000100 ! +b11100000000100 * +1" +#580 +b0 & +b0 + +b1100000000100 ! +b1100000000100 * +0" +#590 +b100000000110 % +b100000000110 ) +b110 # +b11100000000100 ! +b11100000000100 * +b110 , +1" +#600 +b1 + +b1 & +0" +#610 +1" +#620 +b10 & +b10 + +0" +#630 +b11100000000101 ! +b11100000000101 * +1" +#640 +b0 + +b1100000000101 ! +b1100000000101 * +b0 & +0" +#650 +b100000000111 % +b100000000111 ) +b111 # +b11100000000101 ! +b11100000000101 * +b111 , +1" +#660 +b1 & +b1 + +0" +#670 +1" +#680 +b10 + +b10 & +0" +#690 +b11100000000110 ! +b11100000000110 * +1" +#700 +b0 & +b0 + +b1100000000110 ! +b1100000000110 * +0" +#710 +b100000001000 % +b100000001000 ) +b1000 # +b11100000000110 ! +b11100000000110 * +b1000 , +1" +#720 +b1 + +b1 & +0" +#730 +1" +#740 +b10 & +b10 + +0" +#750 +b11100000000111 ! +b11100000000111 * +1" +#760 +b0 + +b1100000000111 ! +b1100000000111 * +b0 & +0" +#770 +b100000001001 % +b100000001001 ) +b1001 # +b11100000000111 ! +b11100000000111 * +b1001 , +1" +#780 +b1 & +b1 + +0" +#790 +1" +#800 +b10 + +b10 & +0" +#810 +b11100000001000 ! +b11100000001000 * +1" +#820 +b0 & +b0 + +b1100000001000 ! +b1100000001000 * +0" +#830 +b100000001010 % +b100000001010 ) +b1010 # +b11100000001000 ! +b11100000001000 * +b1010 , +1" +#840 +b1 + +b1 & +0" +#850 +1" +#860 +b10 & +b10 + +0" +#870 +b11100000001001 ! +b11100000001001 * +1" +#880 +b0 + +b1100000001001 ! +b1100000001001 * +b0 & +0" +#890 +b100000001011 % +b100000001011 ) +b1011 # +b11100000001001 ! +b11100000001001 * +b1011 , +1" +#900 +b1 & +b1 + +0" +#910 +1" +#920 +b10 + +b10 & +0" +#930 +b11100000001010 ! +b11100000001010 * +1" +#940 +b0 & +b0 + +b1100000001010 ! +b1100000001010 * +0" +#950 +b100000001100 % +b100000001100 ) +b1100 # +b11100000001010 ! +b11100000001010 * +b1100 , +1" +#960 +b1 + +b1 & +0" +#970 +1" +#980 +b10 & +b10 + +0" +#990 +b11100000001011 ! +b11100000001011 * +1" +#1000 +b0 + +b1100000001011 ! +b1100000001011 * +b0 & +0" +#1010 +b100000001101 % +b100000001101 ) +b1101 # +b11100000001011 ! +b11100000001011 * +b1101 , +1" +#1020 +b1 & +b1 + +0" +#1030 +1" +#1040 +b10 + +b10 & +0" +#1050 +b11100000001100 ! +b11100000001100 * +1" +#1060 +b0 & +b0 + +b1100000001100 ! +b1100000001100 * +0" +#1070 +b100000001110 % +b100000001110 ) +b1110 # +b11100000001100 ! +b11100000001100 * +b1110 , +1" +#1080 +b1 + +b1 & +0" +#1090 +1" +#1100 +b10 & +b10 + +0" +#1110 +b11100000001101 ! +b11100000001101 * +1" +#1120 +b0 + +b1100000001101 ! +b1100000001101 * +b0 & +0" +#1130 +b100000001111 % +b100000001111 ) +b1111 # +b10100000001101 ! +b10100000001101 * +b1111 , +1" diff --git a/tis100 b/tis100 new file mode 100755 index 0000000..2a7d711 --- /dev/null +++ b/tis100 @@ -0,0 +1,2448 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1117100 .scope module, "tis100Test" "tis100Test" 2 2; + .timescale 0 0; +v0x1163a00_0 .net "L2R", 14 0, L_0x1177b30; 1 drivers +v0x1163b30_0 .net "R2L", 14 0, L_0x117b450; 1 drivers +v0x1163c40_0 .net/s "accOutLeft", 10 0, L_0x1163fb0; 1 drivers +v0x1163ce0_0 .net/s "accOutRight", 10 0, L_0x1177e80; 1 drivers +v0x1163db0_0 .var "clk", 0 0; +v0x1163ef0_0 .var "i", 32 0; +S_0x10b3c70 .scope module, "left" "tis100" 2 12, 3 49 0, S_0x1117100; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1116830 .param/str "memFile" 0 3 60, "left.dat"; +L_0x1163fb0 .functor BUFZ 11, v0x113d270_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x11740a0 .functor BUFZ 11, v0x113d270_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1174e40 .functor BUFZ 18, L_0x1176e00, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x113d270_0 .var/s "ACC", 10 0; +v0x1159c00_0 .var/s "BAK", 10 0; +v0x1159ce0_0 .net "DST", 2 0, L_0x1177f40; 1 drivers +v0x1159dd0_0 .net/s "IMM", 10 0, L_0x1177fe0; 1 drivers +v0x1159eb0_0 .net "INST", 3 0, L_0x1177820; 1 drivers +v0x1159fe0_0 .net "LABEL", 3 0, L_0x1178190; 1 drivers +v0x115a0c0_0 .var "PC", 3 0; +v0x115a1a0_0 .var "PCNEXT", 3 0; +v0x115a280_0 .net "SRC", 2 0, L_0x1177d50; 1 drivers +v0x115a3f0_0 .net *"_s103", 0 0, L_0x1176140; 1 drivers +v0x115a4d0_0 .net *"_s107", 0 0, L_0x1176050; 1 drivers +v0x115a5b0_0 .net *"_s111", 0 0, L_0x1176330; 1 drivers +v0x115a690_0 .net *"_s115", 0 0, L_0x1176230; 1 drivers +v0x115a770_0 .net *"_s119", 0 0, L_0x1176570; 1 drivers +v0x115a850_0 .net *"_s123", 0 0, L_0x1176460; 1 drivers +v0x115a930_0 .net *"_s127", 0 0, L_0x1176730; 1 drivers +v0x115aa10_0 .net *"_s131", 0 0, L_0x1176610; 1 drivers +v0x115abc0_0 .net *"_s135", 0 0, L_0x1176990; 1 drivers +v0x115ac60_0 .net *"_s139", 0 0, L_0x1176860; 1 drivers +v0x115ad40_0 .net *"_s143", 0 0, L_0x1176b70; 1 drivers +v0x115ae20_0 .net *"_s147", 0 0, L_0x1176a30; 1 drivers +v0x115af00_0 .net *"_s151", 0 0, L_0x1176d60; 1 drivers +v0x115afe0_0 .net *"_s155", 0 0, L_0x1176c10; 1 drivers +v0x115b0c0_0 .net *"_s159", 0 0, L_0x1176cb0; 1 drivers +v0x115b1a0_0 .net *"_s160", 17 0, L_0x1176e00; 1 drivers +v0x115b280_0 .net *"_s162", 5 0, L_0x1177160; 1 drivers +L_0x2b8432d3a060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x115b360_0 .net *"_s165", 1 0, L_0x2b8432d3a060; 1 drivers +v0x115d330_2 .array/port v0x115d330, 2; +v0x115b440_0 .net *"_s173", 10 0, v0x115d330_2; 1 drivers +v0x115d330_3 .array/port v0x115d330, 3; +v0x115b520_0 .net *"_s179", 10 0, v0x115d330_3; 1 drivers +v0x115d330_0 .array/port v0x115d330, 0; +v0x115b600_0 .net *"_s185", 10 0, v0x115d330_0; 1 drivers +v0x115d330_1 .array/port v0x115d330, 1; +v0x115b6e0_0 .net *"_s191", 10 0, v0x115d330_1; 1 drivers +v0x115b7c0_0 .net *"_s23", 0 0, L_0x1174530; 1 drivers +v0x115b8a0_0 .net *"_s27", 0 0, L_0x1174650; 1 drivers +v0x115aaf0_0 .net *"_s31", 0 0, L_0x11747c0; 1 drivers +v0x115bb70_0 .net *"_s36", 0 0, L_0x1174a70; 1 drivers +v0x115bc50_0 .net *"_s42", 0 0, L_0x1174d00; 1 drivers +v0x115bd30_0 .net *"_s46", 0 0, L_0x1174da0; 1 drivers +v0x115be10_0 .net *"_s50", 0 0, L_0x1174eb0; 1 drivers +v0x115bef0_0 .net *"_s55", 0 0, L_0x1175110; 1 drivers +v0x115bfd0_0 .net *"_s61", 0 0, L_0x1175380; 1 drivers +v0x115c0b0_0 .net *"_s65", 0 0, L_0x11754b0; 1 drivers +v0x115c190_0 .net *"_s69", 0 0, L_0x11755f0; 1 drivers +v0x115c270_0 .net *"_s74", 0 0, L_0x1175550; 1 drivers +v0x115c350_0 .net *"_s80", 0 0, L_0x11757e0; 1 drivers +v0x115c430_0 .net *"_s84", 0 0, L_0x1175ad0; 1 drivers +v0x115c510_0 .net *"_s88", 0 0, L_0x1175a10; 1 drivers +v0x115c5f0_0 .net *"_s93", 0 0, L_0x1175b70; 1 drivers +v0x115c6d0_0 .net *"_s99", 0 0, L_0x1175e30; 1 drivers +v0x115c7b0_0 .net/s "accOut", 10 0, L_0x1163fb0; alias, 1 drivers +v0x115c890_0 .net "anyHasData", 0 0, L_0x1174bb0; 1 drivers +v0x115c950_0 .net "anyReadAck", 0 0, L_0x1175970; 1 drivers +v0x115ca10_0 .net "anyWantData", 0 0, L_0x1175200; 1 drivers +v0x115cad0_0 .net "anyWriteAck", 0 0, L_0x1175f60; 1 drivers +v0x115cb90_0 .net "clk", 0 0, v0x1163db0_0; 1 drivers +o0x2b8432d09a38 .functor BUFZ 15, C4; HiZ drive +v0x115cc50_0 .net "down", 14 0, o0x2b8432d09a38; 0 drivers +v0x115cd30_0 .net "downOut", 14 0, L_0x1177580; 1 drivers +v0x115ce10_0 .net "instruction", 17 0, L_0x1174e40; 1 drivers +v0x115cef0 .array "instructions", 0 15, 17 0; +v0x115cfb0_0 .var "last", 2 0; +o0x2b8432d09af8 .functor BUFZ 15, C4; HiZ drive +v0x115d090_0 .net "left", 14 0, o0x2b8432d09af8; 0 drivers +v0x115d170_0 .net "leftOut", 14 0, L_0x11772c0; 1 drivers +v0x115d250_0 .var "mode", 2 0; +v0x115d330 .array/s "outVals", 2 5, 10 0; +v0x115d470_0 .var "phase", 2 0; +v0x115d550_0 .net "portsHaveData", 5 2, L_0x1174860; 1 drivers +v0x115b940_0 .net "portsWantData", 5 2, L_0x1174f50; 1 drivers +v0x115ba20_0 .net "readAckIn", 5 2, L_0x1175690; 1 drivers +v0x115da00_0 .var "readAckOut", 5 2; +v0x115daa0_0 .var "readTarget", 2 0; +v0x115db80_0 .var/s "readValue", 10 0; +L_0x2b8432d3a018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x115dc60 .array "regVals", 0 7; +v0x115dc60_0 .net/s v0x115dc60 0, 10 0, L_0x2b8432d3a018; 1 drivers +v0x115dc60_1 .net/s v0x115dc60 1, 10 0, L_0x11740a0; 1 drivers +v0x115dc60_2 .net/s v0x115dc60 2, 10 0, L_0x1174160; 1 drivers +v0x115dc60_3 .net/s v0x115dc60 3, 10 0, L_0x1174230; 1 drivers +v0x115dc60_4 .net/s v0x115dc60 4, 10 0, L_0x1174300; 1 drivers +v0x115dc60_5 .net/s v0x115dc60 5, 10 0, L_0x1174400; 1 drivers +o0x2b8432d09eb8 .functor BUFZ 11, C4; HiZ drive +v0x115dc60_6 .net/s v0x115dc60 6, 10 0, o0x2b8432d09eb8; 0 drivers +o0x2b8432d09ee8 .functor BUFZ 11, C4; HiZ drive +v0x115dc60_7 .net/s v0x115dc60 7, 10 0, o0x2b8432d09ee8; 0 drivers +v0x115de70_0 .net "right", 14 0, L_0x117b450; alias, 1 drivers +v0x115df50_0 .net "rightOut", 14 0, L_0x1177b30; alias, 1 drivers +o0x2b8432d09f78 .functor BUFZ 15, C4; HiZ drive +v0x115e030_0 .net "up", 14 0, o0x2b8432d09f78; 0 drivers +v0x115e110_0 .net "upOut", 14 0, L_0x1177070; 1 drivers +v0x115e1f0_0 .var "weHaveData", 5 2; +v0x115e2d0_0 .var "weWantData", 5 2; +v0x115e3b0_0 .net "writeAckIn", 5 2, L_0x1175c40; 1 drivers +v0x115e490_0 .var "writeAckOut", 5 2; +v0x115e570_0 .var "writeTarget", 2 0; +v0x115e650_0 .var/s "writeValue", 10 0; +E_0x1122a60 .event negedge, v0x115cb90_0; +E_0x1100460 .event posedge, v0x115cb90_0; +L_0x1174160 .part o0x2b8432d09af8, 0, 11; +L_0x1174230 .part L_0x117b450, 0, 11; +L_0x1174300 .part o0x2b8432d09f78, 0, 11; +L_0x1174400 .part o0x2b8432d09a38, 0, 11; +L_0x1174530 .part o0x2b8432d09af8, 11, 1; +L_0x1174650 .part L_0x117b450, 11, 1; +L_0x11747c0 .part o0x2b8432d09f78, 11, 1; +L_0x1174860 .concat8 [ 1 1 1 1], L_0x1174530, L_0x1174650, L_0x11747c0, L_0x1174a70; +L_0x1174a70 .part o0x2b8432d09a38, 11, 1; +L_0x1174bb0 .reduce/or L_0x1174860; +L_0x1174d00 .part o0x2b8432d09af8, 12, 1; +L_0x1174da0 .part L_0x117b450, 12, 1; +L_0x1174eb0 .part o0x2b8432d09f78, 12, 1; +L_0x1174f50 .concat8 [ 1 1 1 1], L_0x1174d00, L_0x1174da0, L_0x1174eb0, L_0x1175110; +L_0x1175110 .part o0x2b8432d09a38, 12, 1; +L_0x1175200 .reduce/or L_0x1174f50; +L_0x1175380 .part o0x2b8432d09af8, 13, 1; +L_0x11754b0 .part L_0x117b450, 13, 1; +L_0x11755f0 .part o0x2b8432d09f78, 13, 1; +L_0x1175690 .concat8 [ 1 1 1 1], L_0x1175380, L_0x11754b0, L_0x11755f0, L_0x1175550; +L_0x1175550 .part o0x2b8432d09a38, 13, 1; +L_0x1175970 .reduce/or L_0x1175690; +L_0x11757e0 .part o0x2b8432d09af8, 14, 1; +L_0x1175ad0 .part L_0x117b450, 14, 1; +L_0x1175a10 .part o0x2b8432d09f78, 14, 1; +L_0x1175c40 .concat8 [ 1 1 1 1], L_0x11757e0, L_0x1175ad0, L_0x1175a10, L_0x1175b70; +L_0x1175b70 .part o0x2b8432d09a38, 14, 1; +L_0x1175f60 .reduce/or L_0x1175c40; +L_0x1175e30 .part v0x115da00_0, 0, 1; +L_0x1176140 .part v0x115da00_0, 1, 1; +L_0x1176050 .part v0x115da00_0, 2, 1; +L_0x1176330 .part v0x115da00_0, 3, 1; +L_0x1176230 .part v0x115e490_0, 0, 1; +L_0x1176570 .part v0x115e490_0, 1, 1; +L_0x1176460 .part v0x115e490_0, 2, 1; +L_0x1176730 .part v0x115e490_0, 3, 1; +L_0x1176610 .part v0x115e2d0_0, 0, 1; +L_0x1176990 .part v0x115e2d0_0, 1, 1; +L_0x1176860 .part v0x115e2d0_0, 2, 1; +L_0x1176b70 .part v0x115e2d0_0, 3, 1; +L_0x1176a30 .part v0x115e1f0_0, 0, 1; +L_0x1176d60 .part v0x115e1f0_0, 1, 1; +L_0x1176c10 .part v0x115e1f0_0, 2, 1; +L_0x1176cb0 .part v0x115e1f0_0, 3, 1; +L_0x1176e00 .array/port v0x115cef0, L_0x1177160; +L_0x1177160 .concat [ 4 2 0 0], v0x115a0c0_0, L_0x2b8432d3a060; +LS_0x1177070_0_0 .concat8 [ 11 1 1 1], v0x115d330_2, L_0x1176c10, L_0x1176860, L_0x1176460; +LS_0x1177070_0_4 .concat8 [ 1 0 0 0], L_0x1176050; +L_0x1177070 .concat8 [ 14 1 0 0], LS_0x1177070_0_0, LS_0x1177070_0_4; +LS_0x1177580_0_0 .concat8 [ 11 1 1 1], v0x115d330_3, L_0x1176cb0, L_0x1176b70, L_0x1176730; +LS_0x1177580_0_4 .concat8 [ 1 0 0 0], L_0x1176330; +L_0x1177580 .concat8 [ 14 1 0 0], LS_0x1177580_0_0, LS_0x1177580_0_4; +LS_0x11772c0_0_0 .concat8 [ 11 1 1 1], v0x115d330_0, L_0x1176a30, L_0x1176610, L_0x1176230; +LS_0x11772c0_0_4 .concat8 [ 1 0 0 0], L_0x1175e30; +L_0x11772c0 .concat8 [ 14 1 0 0], LS_0x11772c0_0_0, LS_0x11772c0_0_4; +LS_0x1177b30_0_0 .concat8 [ 11 1 1 1], v0x115d330_1, L_0x1176d60, L_0x1176990, L_0x1176570; +LS_0x1177b30_0_4 .concat8 [ 1 0 0 0], L_0x1176140; +L_0x1177b30 .concat8 [ 14 1 0 0], LS_0x1177b30_0_0, LS_0x1177b30_0_4; +L_0x1177820 .part L_0x1174e40, 14, 4; +L_0x1177f40 .part L_0x1174e40, 11, 3; +L_0x1177d50 .part L_0x1174e40, 8, 3; +L_0x1178190 .part L_0x1174e40, 10, 4; +L_0x1177fe0 .part L_0x1174e40, 0, 11; +S_0x115e8d0 .scope module, "right" "tis100" 2 13, 3 49 0, S_0x1117100; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x115eac0 .param/str "memFile" 0 3 60, "right.dat"; +L_0x1177e80 .functor BUFZ 11, v0x115ed00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1178080 .functor BUFZ 11, v0x115ed00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1178f70 .functor BUFZ 18, L_0x117af90, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x115ed00_0 .var/s "ACC", 10 0; +v0x115ee00_0 .var/s "BAK", 10 0; +v0x115eee0_0 .net "DST", 2 0, L_0x117c140; 1 drivers +v0x115efa0_0 .net/s "IMM", 10 0, L_0x117c1e0; 1 drivers +v0x115f080_0 .net "INST", 3 0, L_0x117b9a0; 1 drivers +v0x115f1b0_0 .net "LABEL", 3 0, L_0x117c390; 1 drivers +v0x115f290_0 .var "PC", 3 0; +v0x115f370_0 .var "PCNEXT", 3 0; +v0x115f450_0 .net "SRC", 2 0, L_0x117bf50; 1 drivers +v0x115f5c0_0 .net *"_s103", 0 0, L_0x117a2d0; 1 drivers +v0x115f6a0_0 .net *"_s107", 0 0, L_0x117a1e0; 1 drivers +v0x115f780_0 .net *"_s111", 0 0, L_0x117a4c0; 1 drivers +v0x115f860_0 .net *"_s115", 0 0, L_0x117a3c0; 1 drivers +v0x115f940_0 .net *"_s119", 0 0, L_0x117a700; 1 drivers +v0x115fa20_0 .net *"_s123", 0 0, L_0x117a5f0; 1 drivers +v0x115fb00_0 .net *"_s127", 0 0, L_0x117a8c0; 1 drivers +v0x115fbe0_0 .net *"_s131", 0 0, L_0x117a7a0; 1 drivers +v0x115fd90_0 .net *"_s135", 0 0, L_0x117ab20; 1 drivers +v0x115fe30_0 .net *"_s139", 0 0, L_0x117a9f0; 1 drivers +v0x115ff10_0 .net *"_s143", 0 0, L_0x117ad00; 1 drivers +v0x115fff0_0 .net *"_s147", 0 0, L_0x117abc0; 1 drivers +v0x11600d0_0 .net *"_s151", 0 0, L_0x117aef0; 1 drivers +v0x11601b0_0 .net *"_s155", 0 0, L_0x117ada0; 1 drivers +v0x1160290_0 .net *"_s159", 0 0, L_0x117ae40; 1 drivers +v0x1160370_0 .net *"_s160", 17 0, L_0x117af90; 1 drivers +v0x1160450_0 .net *"_s162", 5 0, L_0x117b2f0; 1 drivers +L_0x2b8432d3a0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1160530_0 .net *"_s165", 1 0, L_0x2b8432d3a0f0; 1 drivers +v0x1162470_2 .array/port v0x1162470, 2; +v0x1160610_0 .net *"_s173", 10 0, v0x1162470_2; 1 drivers +v0x1162470_3 .array/port v0x1162470, 3; +v0x11606f0_0 .net *"_s179", 10 0, v0x1162470_3; 1 drivers +v0x1162470_0 .array/port v0x1162470, 0; +v0x11607d0_0 .net *"_s185", 10 0, v0x1162470_0; 1 drivers +v0x1162470_1 .array/port v0x1162470, 1; +v0x11608b0_0 .net *"_s191", 10 0, v0x1162470_1; 1 drivers +v0x1160990_0 .net *"_s23", 0 0, L_0x1178790; 1 drivers +v0x1160a70_0 .net *"_s27", 0 0, L_0x1178860; 1 drivers +v0x115fcc0_0 .net *"_s31", 0 0, L_0x1178930; 1 drivers +v0x1160d40_0 .net *"_s36", 0 0, L_0x1178c00; 1 drivers +v0x1160e20_0 .net *"_s42", 0 0, L_0x1178e30; 1 drivers +v0x1160f00_0 .net *"_s46", 0 0, L_0x1178ed0; 1 drivers +v0x1160fe0_0 .net *"_s50", 0 0, L_0x1178fe0; 1 drivers +v0x11610c0_0 .net *"_s55", 0 0, L_0x11791f0; 1 drivers +v0x11611a0_0 .net *"_s61", 0 0, L_0x1179460; 1 drivers +v0x1161280_0 .net *"_s65", 0 0, L_0x1179500; 1 drivers +v0x1161360_0 .net *"_s69", 0 0, L_0x11796d0; 1 drivers +v0x1161440_0 .net *"_s74", 0 0, L_0x1179630; 1 drivers +v0x1161520_0 .net *"_s80", 0 0, L_0x11798c0; 1 drivers +v0x1161600_0 .net *"_s84", 0 0, L_0x1179cc0; 1 drivers +v0x11616e0_0 .net *"_s88", 0 0, L_0x1179af0; 1 drivers +v0x11617c0_0 .net *"_s93", 0 0, L_0x1179d60; 1 drivers +v0x11618a0_0 .net *"_s99", 0 0, L_0x1179fc0; 1 drivers +v0x1161980_0 .net/s "accOut", 10 0, L_0x1177e80; alias, 1 drivers +v0x1161a60_0 .net "anyHasData", 0 0, L_0x1178d40; 1 drivers +v0x1161b20_0 .net "anyReadAck", 0 0, L_0x1179a50; 1 drivers +v0x1161be0_0 .net "anyWantData", 0 0, L_0x11792e0; 1 drivers +v0x1161ca0_0 .net "anyWriteAck", 0 0, L_0x117a0f0; 1 drivers +v0x1161d60_0 .net "clk", 0 0, v0x1163db0_0; alias, 1 drivers +o0x2b8432d0acc8 .functor BUFZ 15, C4; HiZ drive +v0x1161e00_0 .net "down", 14 0, o0x2b8432d0acc8; 0 drivers +v0x1161ec0_0 .net "downOut", 14 0, L_0x117b6c0; 1 drivers +v0x1161fa0_0 .net "instruction", 17 0, L_0x1178f70; 1 drivers +v0x1162080 .array "instructions", 0 15, 17 0; +v0x1162140_0 .var "last", 2 0; +v0x1162220_0 .net "left", 14 0, L_0x1177b30; alias, 1 drivers +v0x11622e0_0 .net "leftOut", 14 0, L_0x117b450; alias, 1 drivers +v0x11623b0_0 .var "mode", 2 0; +v0x1162470 .array/s "outVals", 2 5, 10 0; +v0x11625e0_0 .var "phase", 2 0; +v0x11626c0_0 .net "portsHaveData", 5 2, L_0x1178a20; 1 drivers +v0x1160b10_0 .net "portsWantData", 5 2, L_0x1179080; 1 drivers +v0x1160bf0_0 .net "readAckIn", 5 2, L_0x1179770; 1 drivers +v0x1162b70_0 .var "readAckOut", 5 2; +v0x1162c10_0 .var "readTarget", 2 0; +v0x1162cb0_0 .var/s "readValue", 10 0; +L_0x2b8432d3a0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1162d90 .array "regVals", 0 7; +v0x1162d90_0 .net/s v0x1162d90 0, 10 0, L_0x2b8432d3a0a8; 1 drivers +v0x1162d90_1 .net/s v0x1162d90 1, 10 0, L_0x1178080; 1 drivers +v0x1162d90_2 .net/s v0x1162d90 2, 10 0, L_0x11783f0; 1 drivers +v0x1162d90_3 .net/s v0x1162d90 3, 10 0, L_0x1178520; 1 drivers +v0x1162d90_4 .net/s v0x1162d90 4, 10 0, L_0x11785c0; 1 drivers +v0x1162d90_5 .net/s v0x1162d90 5, 10 0, L_0x1178660; 1 drivers +o0x2b8432d0b0e8 .functor BUFZ 11, C4; HiZ drive +v0x1162d90_6 .net/s v0x1162d90 6, 10 0, o0x2b8432d0b0e8; 0 drivers +o0x2b8432d0b118 .functor BUFZ 11, C4; HiZ drive +v0x1162d90_7 .net/s v0x1162d90 7, 10 0, o0x2b8432d0b118; 0 drivers +o0x2b8432d0b148 .functor BUFZ 15, C4; HiZ drive +v0x1162fa0_0 .net "right", 14 0, o0x2b8432d0b148; 0 drivers +v0x1163080_0 .net "rightOut", 14 0, L_0x117bd30; 1 drivers +o0x2b8432d0b1a8 .functor BUFZ 15, C4; HiZ drive +v0x1163160_0 .net "up", 14 0, o0x2b8432d0b1a8; 0 drivers +v0x1163240_0 .net "upOut", 14 0, L_0x117b1d0; 1 drivers +v0x1163320_0 .var "weHaveData", 5 2; +v0x1163400_0 .var "weWantData", 5 2; +v0x11634e0_0 .net "writeAckIn", 5 2, L_0x1179e30; 1 drivers +v0x11635c0_0 .var "writeAckOut", 5 2; +v0x11636a0_0 .var "writeTarget", 2 0; +v0x1163780_0 .var/s "writeValue", 10 0; +L_0x11783f0 .part L_0x1177b30, 0, 11; +L_0x1178520 .part o0x2b8432d0b148, 0, 11; +L_0x11785c0 .part o0x2b8432d0b1a8, 0, 11; +L_0x1178660 .part o0x2b8432d0acc8, 0, 11; +L_0x1178790 .part L_0x1177b30, 11, 1; +L_0x1178860 .part o0x2b8432d0b148, 11, 1; +L_0x1178930 .part o0x2b8432d0b1a8, 11, 1; +L_0x1178a20 .concat8 [ 1 1 1 1], L_0x1178790, L_0x1178860, L_0x1178930, L_0x1178c00; +L_0x1178c00 .part o0x2b8432d0acc8, 11, 1; +L_0x1178d40 .reduce/or L_0x1178a20; +L_0x1178e30 .part L_0x1177b30, 12, 1; +L_0x1178ed0 .part o0x2b8432d0b148, 12, 1; +L_0x1178fe0 .part o0x2b8432d0b1a8, 12, 1; +L_0x1179080 .concat8 [ 1 1 1 1], L_0x1178e30, L_0x1178ed0, L_0x1178fe0, L_0x11791f0; +L_0x11791f0 .part o0x2b8432d0acc8, 12, 1; +L_0x11792e0 .reduce/or L_0x1179080; +L_0x1179460 .part L_0x1177b30, 13, 1; +L_0x1179500 .part o0x2b8432d0b148, 13, 1; +L_0x11796d0 .part o0x2b8432d0b1a8, 13, 1; +L_0x1179770 .concat8 [ 1 1 1 1], L_0x1179460, L_0x1179500, L_0x11796d0, L_0x1179630; +L_0x1179630 .part o0x2b8432d0acc8, 13, 1; +L_0x1179a50 .reduce/or L_0x1179770; +L_0x11798c0 .part L_0x1177b30, 14, 1; +L_0x1179cc0 .part o0x2b8432d0b148, 14, 1; +L_0x1179af0 .part o0x2b8432d0b1a8, 14, 1; +L_0x1179e30 .concat8 [ 1 1 1 1], L_0x11798c0, L_0x1179cc0, L_0x1179af0, L_0x1179d60; +L_0x1179d60 .part o0x2b8432d0acc8, 14, 1; +L_0x117a0f0 .reduce/or L_0x1179e30; +L_0x1179fc0 .part v0x1162b70_0, 0, 1; +L_0x117a2d0 .part v0x1162b70_0, 1, 1; +L_0x117a1e0 .part v0x1162b70_0, 2, 1; +L_0x117a4c0 .part v0x1162b70_0, 3, 1; +L_0x117a3c0 .part v0x11635c0_0, 0, 1; +L_0x117a700 .part v0x11635c0_0, 1, 1; +L_0x117a5f0 .part v0x11635c0_0, 2, 1; +L_0x117a8c0 .part v0x11635c0_0, 3, 1; +L_0x117a7a0 .part v0x1163400_0, 0, 1; +L_0x117ab20 .part v0x1163400_0, 1, 1; +L_0x117a9f0 .part v0x1163400_0, 2, 1; +L_0x117ad00 .part v0x1163400_0, 3, 1; +L_0x117abc0 .part v0x1163320_0, 0, 1; +L_0x117aef0 .part v0x1163320_0, 1, 1; +L_0x117ada0 .part v0x1163320_0, 2, 1; +L_0x117ae40 .part v0x1163320_0, 3, 1; +L_0x117af90 .array/port v0x1162080, L_0x117b2f0; +L_0x117b2f0 .concat [ 4 2 0 0], v0x115f290_0, L_0x2b8432d3a0f0; +LS_0x117b1d0_0_0 .concat8 [ 11 1 1 1], v0x1162470_2, L_0x117ada0, L_0x117a9f0, L_0x117a5f0; +LS_0x117b1d0_0_4 .concat8 [ 1 0 0 0], L_0x117a1e0; +L_0x117b1d0 .concat8 [ 14 1 0 0], LS_0x117b1d0_0_0, LS_0x117b1d0_0_4; +LS_0x117b6c0_0_0 .concat8 [ 11 1 1 1], v0x1162470_3, L_0x117ae40, L_0x117ad00, L_0x117a8c0; +LS_0x117b6c0_0_4 .concat8 [ 1 0 0 0], L_0x117a4c0; +L_0x117b6c0 .concat8 [ 14 1 0 0], LS_0x117b6c0_0_0, LS_0x117b6c0_0_4; +LS_0x117b450_0_0 .concat8 [ 11 1 1 1], v0x1162470_0, L_0x117abc0, L_0x117a7a0, L_0x117a3c0; +LS_0x117b450_0_4 .concat8 [ 1 0 0 0], L_0x1179fc0; +L_0x117b450 .concat8 [ 14 1 0 0], LS_0x117b450_0_0, LS_0x117b450_0_4; +LS_0x117bd30_0_0 .concat8 [ 11 1 1 1], v0x1162470_1, L_0x117aef0, L_0x117ab20, L_0x117a700; +LS_0x117bd30_0_4 .concat8 [ 1 0 0 0], L_0x117a2d0; +L_0x117bd30 .concat8 [ 14 1 0 0], LS_0x117bd30_0_0, LS_0x117bd30_0_4; +L_0x117b9a0 .part L_0x1178f70, 14, 4; +L_0x117c140 .part L_0x1178f70, 11, 3; +L_0x117bf50 .part L_0x1178f70, 8, 3; +L_0x117c390 .part L_0x1178f70, 10, 4; +L_0x117c1e0 .part L_0x1178f70, 0, 11; + .scope S_0x10b3c70; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x115d250_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x115d470_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x115cfb0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x113d270_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1159c00_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115a0c0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115da00_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115e2d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115e490_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115e1f0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x115d330, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x115d330, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x115d330, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x115d330, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x1116830, v0x115cef0 {0 0 0}; + %end; + .thread T_0; + .scope S_0x10b3c70; +T_1 ; + %wait E_0x1100460; + %load/vec4 v0x115d250_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.2, 6; + %jmp T_1.3; +T_1.0 ; + %load/vec4 v0x115d470_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.6, 6; + %jmp T_1.7; +T_1.4 ; + %load/vec4 v0x1159eb0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_1.8, 5; + %load/vec4 v0x115a280_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_1.10, 5; + %load/vec4 v0x115a280_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %jmp T_1.11; +T_1.10 ; + %load/vec4 v0x115a280_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_1.12, 5; + %load/vec4 v0x115d550_0; + %load/vec4 v0x115a280_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.14, 8; + %load/vec4 v0x115a280_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115a280_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %load/vec4 v0x115a280_0; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.15; +T_1.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x115d250_0, 0; + %load/vec4 v0x115a280_0; + %assign/vec4 v0x115daa0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115a280_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; +T_1.15 ; + %jmp T_1.13; +T_1.12 ; + %load/vec4 v0x115a280_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.16, 4; + %load/vec4 v0x115cfb0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_1.18, 4; + %load/vec4 v0x115cfb0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %jmp T_1.19; +T_1.18 ; + %load/vec4 v0x115d550_0; + %load/vec4 v0x115cfb0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.20, 8; + %load/vec4 v0x115cfb0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115cfb0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %jmp T_1.21; +T_1.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x115d250_0, 0; + %load/vec4 v0x115cfb0_0; + %assign/vec4 v0x115daa0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115cfb0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; +T_1.21 ; +T_1.19 ; + %jmp T_1.17; +T_1.16 ; + %load/vec4 v0x115a280_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.22, 4; + %load/vec4 v0x115c890_0; + %flag_set/vec4 8; + %jmp/0xz T_1.24, 8; + %load/vec4 v0x115d550_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.27; +T_1.26 ; + %load/vec4 v0x115d550_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.29; +T_1.28 ; + %load/vec4 v0x115d550_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.31; +T_1.30 ; + %load/vec4 v0x115d550_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; +T_1.32 ; +T_1.31 ; +T_1.29 ; +T_1.27 ; + %jmp T_1.25; +T_1.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x115d250_0, 0; + %load/vec4 v0x115a280_0; + %assign/vec4 v0x115daa0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; +T_1.25 ; +T_1.22 ; +T_1.17 ; +T_1.13 ; +T_1.11 ; +T_1.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.7; +T_1.5 ; + %load/vec4 v0x1159eb0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_1.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_1.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_1.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_1.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_1.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_1.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_1.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_1.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_1.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_1.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_1.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_1.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_1.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_1.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_1.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_1.49, 6; + %jmp T_1.50; +T_1.34 ; + %load/vec4 v0x113d270_0; + %load/vec4 v0x115db80_0; + %add; + %assign/vec4 v0x113d270_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.35 ; + %load/vec4 v0x113d270_0; + %load/vec4 v0x115db80_0; + %sub; + %assign/vec4 v0x113d270_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.36 ; + %load/vec4 v0x115a0c0_0; + %pad/u 11; + %load/vec4 v0x115db80_0; + %add; + %pad/u 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.37 ; + %load/vec4 v0x115db80_0; + %assign/vec4 v0x115e650_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.38 ; + %vpi_call 3 278 "$display", "here" {0 0 0}; + %load/vec4 v0x1159dd0_0; + %assign/vec4 v0x115e650_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.39 ; + %load/vec4 v0x113d270_0; + %load/vec4 v0x1159dd0_0; + %add; + %assign/vec4 v0x113d270_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.40 ; + %load/vec4 v0x113d270_0; + %load/vec4 v0x1159dd0_0; + %sub; + %assign/vec4 v0x113d270_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.41 ; + %load/vec4 v0x115a0c0_0; + %pad/u 11; + %load/vec4 v0x1159dd0_0; + %add; + %pad/u 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.42 ; + %load/vec4 v0x1159c00_0; + %assign/vec4 v0x113d270_0, 0; + %load/vec4 v0x113d270_0; + %assign/vec4 v0x1159c00_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.43 ; + %load/vec4 v0x113d270_0; + %assign/vec4 v0x1159c00_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.44 ; + %load/vec4 v0x113d270_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x113d270_0, 0; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.45 ; + %load/vec4 v0x1159fe0_0; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.50; +T_1.46 ; + %load/vec4 v0x113d270_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_1.51, 4; + %load/vec4 v0x1159fe0_0; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.52; +T_1.51 ; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; +T_1.52 ; + %jmp T_1.50; +T_1.47 ; + %load/vec4 v0x113d270_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_1.53, 4; + %load/vec4 v0x1159fe0_0; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.54; +T_1.53 ; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; +T_1.54 ; + %jmp T_1.50; +T_1.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x113d270_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_1.55, 5; + %load/vec4 v0x1159fe0_0; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.56; +T_1.55 ; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; +T_1.56 ; + %jmp T_1.50; +T_1.49 ; + %load/vec4 v0x113d270_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_1.57, 5; + %load/vec4 v0x1159fe0_0; + %assign/vec4 v0x115a1a0_0, 0; + %jmp T_1.58; +T_1.57 ; + %load/vec4 v0x115a0c0_0; + %addi 1, 0, 4; + %assign/vec4 v0x115a1a0_0, 0; +T_1.58 ; + %jmp T_1.50; +T_1.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.7; +T_1.6 ; + %load/vec4 v0x1159eb0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1159eb0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_1.59, 4; + %load/vec4 v0x1159ce0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1159ce0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x115cfb0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_1.61, 9; + %load/vec4 v0x1159ce0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_1.63, 4; + %load/vec4 v0x115e650_0; + %assign/vec4 v0x113d270_0, 0; +T_1.63 ; + %jmp T_1.62; +T_1.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115d250_0, 0; + %load/vec4 v0x1159ce0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_1.65, 4; + %load/vec4 v0x115cfb0_0; + %assign/vec4 v0x115e570_0, 0; + %load/vec4 v0x115e650_0; + %load/vec4 v0x115cfb0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115cfb0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %jmp T_1.66; +T_1.65 ; + %load/vec4 v0x1159ce0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.67, 4; + %load/vec4 v0x1159ce0_0; + %assign/vec4 v0x115e570_0, 0; + %load/vec4 v0x115e650_0; + %load/vec4 v0x1159ce0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1159ce0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x1159ce0_0; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.68; +T_1.67 ; + %load/vec4 v0x115ca10_0; + %flag_set/vec4 8; + %jmp/0xz T_1.69, 8; + %load/vec4 v0x115b940_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.72; +T_1.71 ; + %load/vec4 v0x115b940_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.74; +T_1.73 ; + %load/vec4 v0x115b940_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.76; +T_1.75 ; + %load/vec4 v0x115b940_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; +T_1.77 ; +T_1.76 ; +T_1.74 ; +T_1.72 ; + %jmp T_1.70; +T_1.69 ; + %load/vec4 v0x1159ce0_0; + %assign/vec4 v0x115e570_0, 0; +T_1.70 ; +T_1.68 ; +T_1.66 ; +T_1.62 ; +T_1.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.7; +T_1.7 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.1 ; + %load/vec4 v0x115d470_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.81, 6; + %jmp T_1.82; +T_1.79 ; + %load/vec4 v0x115daa0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.83, 4; + %load/vec4 v0x115c890_0; + %flag_set/vec4 8; + %jmp/0xz T_1.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x115d250_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115e2d0_0, 0, 4; + %load/vec4 v0x115d550_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.88; +T_1.87 ; + %load/vec4 v0x115d550_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.90; +T_1.89 ; + %load/vec4 v0x115d550_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.92; +T_1.91 ; + %load/vec4 v0x115d550_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; +T_1.93 ; +T_1.92 ; +T_1.90 ; +T_1.88 ; +T_1.85 ; + %jmp T_1.84; +T_1.83 ; + %load/vec4 v0x115d550_0; + %load/vec4 v0x115daa0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x115d250_0, 0; + %load/vec4 v0x115daa0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x115dc60, 4; + %assign/vec4 v0x115db80_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115daa0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115da00_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115daa0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x115e2d0_0, 4, 5; + %load/vec4 v0x115daa0_0; + %assign/vec4 v0x115cfb0_0, 0; +T_1.95 ; +T_1.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.82; +T_1.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.82; +T_1.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.82; +T_1.82 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.2 ; + %load/vec4 v0x115d470_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_1.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_1.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_1.99, 6; + %jmp T_1.100; +T_1.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.100; +T_1.98 ; + %load/vec4 v0x115e570_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_1.101, 4; + %load/vec4 v0x115ca10_0; + %flag_set/vec4 8; + %jmp/0xz T_1.103, 8; + %load/vec4 v0x115b940_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.106; +T_1.105 ; + %load/vec4 v0x115b940_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.108; +T_1.107 ; + %load/vec4 v0x115b940_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_1.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; + %jmp T_1.110; +T_1.109 ; + %load/vec4 v0x115b940_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_1.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x115e570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x115e1f0_0, 4, 5; + %load/vec4 v0x115e650_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x115d330, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x115cfb0_0, 0; +T_1.111 ; +T_1.110 ; +T_1.108 ; +T_1.106 ; +T_1.103 ; +T_1.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.100; +T_1.99 ; + %load/vec4 v0x115e570_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_1.113, 4; + %load/vec4 v0x115e3b0_0; + %load/vec4 v0x115e570_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_1.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x115e570_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x115e1f0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x115d250_0, 0; +T_1.115 ; +T_1.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x115d470_0, 0; + %jmp T_1.100; +T_1.100 ; + %pop/vec4 1; + %jmp T_1.3; +T_1.3 ; + %pop/vec4 1; + %jmp T_1; + .thread T_1; + .scope S_0x10b3c70; +T_2 ; + %wait E_0x1122a60; + %load/vec4 v0x115d470_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x115d250_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x115a1a0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_2.0, 8; + %load/vec4 v0x115a1a0_0; + %assign/vec4 v0x115a0c0_0, 0; +T_2.0 ; + %load/vec4 v0x115d470_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_2.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115da00_0, 0, 4; +T_2.2 ; + %jmp T_2; + .thread T_2; + .scope S_0x115e8d0; +T_3 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11623b0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x11625e0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1162140_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x115ed00_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x115ee00_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x115f290_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1162b70_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1163400_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x11635c0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1163320_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1162470, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1162470, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1162470, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1162470, 4, 0; + %vpi_call 3 185 "$readmemb", P_0x115eac0, v0x1162080 {0 0 0}; + %end; + .thread T_3; + .scope S_0x115e8d0; +T_4 ; + %wait E_0x1100460; + %load/vec4 v0x11623b0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x11625e0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.6, 6; + %jmp T_4.7; +T_4.4 ; + %load/vec4 v0x115f080_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x115f450_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_4.10, 5; + %load/vec4 v0x115f450_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %jmp T_4.11; +T_4.10 ; + %load/vec4 v0x115f450_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_4.12, 5; + %load/vec4 v0x11626c0_0; + %load/vec4 v0x115f450_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.14, 8; + %load/vec4 v0x115f450_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115f450_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %load/vec4 v0x115f450_0; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.15; +T_4.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11623b0_0, 0; + %load/vec4 v0x115f450_0; + %assign/vec4 v0x1162c10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115f450_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1163400_0, 4, 5; +T_4.15 ; + %jmp T_4.13; +T_4.12 ; + %load/vec4 v0x115f450_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.16, 4; + %load/vec4 v0x1162140_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_4.18, 4; + %load/vec4 v0x1162140_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %jmp T_4.19; +T_4.18 ; + %load/vec4 v0x11626c0_0; + %load/vec4 v0x1162140_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.20, 8; + %load/vec4 v0x1162140_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1162140_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %jmp T_4.21; +T_4.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11623b0_0, 0; + %load/vec4 v0x1162140_0; + %assign/vec4 v0x1162c10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1162140_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1163400_0, 4, 5; +T_4.21 ; +T_4.19 ; + %jmp T_4.17; +T_4.16 ; + %load/vec4 v0x115f450_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.22, 4; + %load/vec4 v0x1161a60_0; + %flag_set/vec4 8; + %jmp/0xz T_4.24, 8; + %load/vec4 v0x11626c0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.27; +T_4.26 ; + %load/vec4 v0x11626c0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.29; +T_4.28 ; + %load/vec4 v0x11626c0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.31; +T_4.30 ; + %load/vec4 v0x11626c0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1162140_0, 0; +T_4.32 ; +T_4.31 ; +T_4.29 ; +T_4.27 ; + %jmp T_4.25; +T_4.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11623b0_0, 0; + %load/vec4 v0x115f450_0; + %assign/vec4 v0x1162c10_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163400_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163400_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163400_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163400_0, 4, 5; +T_4.25 ; +T_4.22 ; +T_4.17 ; +T_4.13 ; +T_4.11 ; +T_4.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.7; +T_4.5 ; + %load/vec4 v0x115f080_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_4.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_4.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_4.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_4.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_4.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_4.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_4.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_4.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_4.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_4.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_4.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_4.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_4.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_4.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_4.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_4.49, 6; + %jmp T_4.50; +T_4.34 ; + %load/vec4 v0x115ed00_0; + %load/vec4 v0x1162cb0_0; + %add; + %assign/vec4 v0x115ed00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.35 ; + %load/vec4 v0x115ed00_0; + %load/vec4 v0x1162cb0_0; + %sub; + %assign/vec4 v0x115ed00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.36 ; + %load/vec4 v0x115f290_0; + %pad/u 11; + %load/vec4 v0x1162cb0_0; + %add; + %pad/u 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.37 ; + %load/vec4 v0x1162cb0_0; + %assign/vec4 v0x1163780_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.38 ; + %vpi_call 3 278 "$display", "here" {0 0 0}; + %load/vec4 v0x115efa0_0; + %assign/vec4 v0x1163780_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.39 ; + %load/vec4 v0x115ed00_0; + %load/vec4 v0x115efa0_0; + %add; + %assign/vec4 v0x115ed00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.40 ; + %load/vec4 v0x115ed00_0; + %load/vec4 v0x115efa0_0; + %sub; + %assign/vec4 v0x115ed00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.41 ; + %load/vec4 v0x115f290_0; + %pad/u 11; + %load/vec4 v0x115efa0_0; + %add; + %pad/u 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.42 ; + %load/vec4 v0x115ee00_0; + %assign/vec4 v0x115ed00_0, 0; + %load/vec4 v0x115ed00_0; + %assign/vec4 v0x115ee00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.43 ; + %load/vec4 v0x115ed00_0; + %assign/vec4 v0x115ee00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.44 ; + %load/vec4 v0x115ed00_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x115ed00_0, 0; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.45 ; + %load/vec4 v0x115f1b0_0; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.50; +T_4.46 ; + %load/vec4 v0x115ed00_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_4.51, 4; + %load/vec4 v0x115f1b0_0; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.52; +T_4.51 ; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; +T_4.52 ; + %jmp T_4.50; +T_4.47 ; + %load/vec4 v0x115ed00_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_4.53, 4; + %load/vec4 v0x115f1b0_0; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.54; +T_4.53 ; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; +T_4.54 ; + %jmp T_4.50; +T_4.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x115ed00_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_4.55, 5; + %load/vec4 v0x115f1b0_0; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.56; +T_4.55 ; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; +T_4.56 ; + %jmp T_4.50; +T_4.49 ; + %load/vec4 v0x115ed00_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_4.57, 5; + %load/vec4 v0x115f1b0_0; + %assign/vec4 v0x115f370_0, 0; + %jmp T_4.58; +T_4.57 ; + %load/vec4 v0x115f290_0; + %addi 1, 0, 4; + %assign/vec4 v0x115f370_0, 0; +T_4.58 ; + %jmp T_4.50; +T_4.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.7; +T_4.6 ; + %load/vec4 v0x115f080_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x115f080_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_4.59, 4; + %load/vec4 v0x115eee0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x115eee0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1162140_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_4.61, 9; + %load/vec4 v0x115eee0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_4.63, 4; + %load/vec4 v0x1163780_0; + %assign/vec4 v0x115ed00_0, 0; +T_4.63 ; + %jmp T_4.62; +T_4.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11623b0_0, 0; + %load/vec4 v0x115eee0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_4.65, 4; + %load/vec4 v0x1162140_0; + %assign/vec4 v0x11636a0_0, 0; + %load/vec4 v0x1163780_0; + %load/vec4 v0x1162140_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1162140_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %jmp T_4.66; +T_4.65 ; + %load/vec4 v0x115eee0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.67, 4; + %load/vec4 v0x115eee0_0; + %assign/vec4 v0x11636a0_0, 0; + %load/vec4 v0x1163780_0; + %load/vec4 v0x115eee0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x115eee0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x115eee0_0; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.68; +T_4.67 ; + %load/vec4 v0x1161be0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.69, 8; + %load/vec4 v0x1160b10_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.72; +T_4.71 ; + %load/vec4 v0x1160b10_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.74; +T_4.73 ; + %load/vec4 v0x1160b10_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.76; +T_4.75 ; + %load/vec4 v0x1160b10_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1162140_0, 0; +T_4.77 ; +T_4.76 ; +T_4.74 ; +T_4.72 ; + %jmp T_4.70; +T_4.69 ; + %load/vec4 v0x115eee0_0; + %assign/vec4 v0x11636a0_0, 0; +T_4.70 ; +T_4.68 ; +T_4.66 ; +T_4.62 ; +T_4.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.7; +T_4.7 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.1 ; + %load/vec4 v0x11625e0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.81, 6; + %jmp T_4.82; +T_4.79 ; + %load/vec4 v0x1162c10_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.83, 4; + %load/vec4 v0x1161a60_0; + %flag_set/vec4 8; + %jmp/0xz T_4.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11623b0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1163400_0, 0, 4; + %load/vec4 v0x11626c0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.88; +T_4.87 ; + %load/vec4 v0x11626c0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.90; +T_4.89 ; + %load/vec4 v0x11626c0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.92; +T_4.91 ; + %load/vec4 v0x11626c0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1162140_0, 0; +T_4.93 ; +T_4.92 ; +T_4.90 ; +T_4.88 ; +T_4.85 ; + %jmp T_4.84; +T_4.83 ; + %load/vec4 v0x11626c0_0; + %load/vec4 v0x1162c10_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11623b0_0, 0; + %load/vec4 v0x1162c10_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1162d90, 4; + %assign/vec4 v0x1162cb0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1162c10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1162b70_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1162c10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1163400_0, 4, 5; + %load/vec4 v0x1162c10_0; + %assign/vec4 v0x1162140_0, 0; +T_4.95 ; +T_4.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.82; +T_4.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.82; +T_4.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.82; +T_4.82 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.2 ; + %load/vec4 v0x11625e0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.99, 6; + %jmp T_4.100; +T_4.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.100; +T_4.98 ; + %load/vec4 v0x11636a0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_4.101, 4; + %load/vec4 v0x1161be0_0; + %flag_set/vec4 8; + %jmp/0xz T_4.103, 8; + %load/vec4 v0x1160b10_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.106; +T_4.105 ; + %load/vec4 v0x1160b10_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.108; +T_4.107 ; + %load/vec4 v0x1160b10_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_4.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1162140_0, 0; + %jmp T_4.110; +T_4.109 ; + %load/vec4 v0x1160b10_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_4.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x11636a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1163320_0, 4, 5; + %load/vec4 v0x1163780_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1162470, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1162140_0, 0; +T_4.111 ; +T_4.110 ; +T_4.108 ; +T_4.106 ; +T_4.103 ; +T_4.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.100; +T_4.99 ; + %load/vec4 v0x11636a0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_4.113, 4; + %load/vec4 v0x11634e0_0; + %load/vec4 v0x11636a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_4.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x11636a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1163320_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11623b0_0, 0; +T_4.115 ; +T_4.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x11625e0_0, 0; + %jmp T_4.100; +T_4.100 ; + %pop/vec4 1; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x115e8d0; +T_5 ; + %wait E_0x1122a60; + %load/vec4 v0x11625e0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x11623b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x115f370_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_5.0, 8; + %load/vec4 v0x115f370_0; + %assign/vec4 v0x115f290_0, 0; +T_5.0 ; + %load/vec4 v0x11625e0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_5.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1162b70_0, 0, 4; +T_5.2 ; + %jmp T_5; + .thread T_5; + .scope S_0x1117100; +T_6 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x1163ef0_0, 0, 33; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x1163ef0_0, 0, 33; +T_6.0 ; + %load/vec4 v0x1163ef0_0; + %cmpi/u 10, 0, 33; + %jmp/0xz T_6.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1163db0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1163db0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1163db0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1163db0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1163db0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1163db0_0, 0, 1; + %delay 1, 0; + %vpi_call 2 24 "$display", "accLeft = %d \012accRight= %d\012", v0x1163c40_0, v0x1163ce0_0 {0 0 0}; + %load/vec4 v0x1163ef0_0; + %addi 1, 0, 33; + %store/vec4 v0x1163ef0_0, 0, 33; + %jmp T_6.0; +T_6.1 ; + %end; + .thread T_6; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "tis100.t.v"; + "./tis100.v"; diff --git a/tis100.t.v b/tis100.t.v index 52b247a..ca376bc 100644 --- a/tis100.t.v +++ b/tis100.t.v @@ -9,8 +9,8 @@ reg[32:0] i; wire[14:0] L2R; wire[14:0] R2L; -tis100 left( .clk(clk), .accOut(accOutLeft), .rightOut(L2R) .right(R2L)); -tis100 right(.clk(clk), .accOut(accOutRight), .left(L2R) .leftOut(R2L)); +tis100 #("left.dat") left( .clk(clk), .accOut(accOutLeft), .rightOut(L2R), .right(R2L)); +tis100 #("right.dat") right(.clk(clk), .accOut(accOutRight), .left(L2R), .leftOut(R2L)); initial begin i = 0; @@ -21,7 +21,7 @@ initial begin clk = 1; #1; clk = 0; #1; clk = 1; #1; - $display(accOut); + $display("accLeft = %d \naccRight= %d\n",accOutLeft,accOutRight); end end diff --git a/tis100.v b/tis100.v index f8a4cb0..02e539f 100644 --- a/tis100.v +++ b/tis100.v @@ -57,7 +57,7 @@ module tis100(input clk, output[14:0] rightOut, output signed[10:0] accOut); -parameter memFile = "memory.txt"; +parameter memFile = "memory.dat"; //internal registers reg[2:0] mode; @@ -68,7 +68,7 @@ reg[`ADDR_SIZE-1:0] readTarget; reg signed[10:0] readValue; reg signed[10:0] writeValue; -reg[`INST_SIZE-1:0] instructions[15:0]; +reg[`INST_SIZE-1:0] instructions[0:15]; reg[3:0] PC; reg[3:0] PCNEXT; @@ -182,9 +182,7 @@ initial begin outVals[`LEFT_ADDR] = 0; outVals[`RIGHT_ADDR] = 0; - instructions[0] = {`ADDI, 3'd0, 11'd1}; - instructions[1] = {`ADD, 3'd0, `ACC_ADDR, 8'd0}; - instructions[2] = {`JMP, 4'd1, 10'd0}; + $readmemb(memFile, instructions); end always @(posedge clk) begin @@ -206,6 +204,7 @@ always @(posedge clk) begin mode <= `READ_MODE; readTarget <= SRC; weWantData[SRC] <= 1; + last <= SRC; end end//src is a port else if (SRC == `LAST_ADDR) begin//src is LAST @@ -226,17 +225,7 @@ always @(posedge clk) begin end//src is last else if (SRC == `ANY_ADDR) begin//src is ANY if(anyHasData) begin//any port has data - if(portsHaveData[`UP_ADDR]) begin - readValue <= regVals[`UP_ADDR]; - readAckOut[`UP_ADDR] <= 1; - last <= `UP_ADDR; - end - else if(portsHaveData[`DOWN_ADDR]) begin - readValue <= regVals[`DOWN_ADDR]; - readAckOut[`DOWN_ADDR] <= 1; - last <= `DOWN_ADDR; - end - else if(portsHaveData[`LEFT_ADDR]) begin + if(portsHaveData[`LEFT_ADDR]) begin readValue <= regVals[`LEFT_ADDR]; readAckOut[`LEFT_ADDR] <= 1; last <= `LEFT_ADDR; @@ -246,6 +235,16 @@ always @(posedge clk) begin readAckOut[`RIGHT_ADDR] <= 1; last <= `RIGHT_ADDR; end + else if(portsHaveData[`UP_ADDR]) begin + readValue <= regVals[`UP_ADDR]; + readAckOut[`UP_ADDR] <= 1; + last <= `UP_ADDR; + end + else if(portsHaveData[`DOWN_ADDR]) begin + readValue <= regVals[`DOWN_ADDR]; + readAckOut[`DOWN_ADDR] <= 1; + last <= `DOWN_ADDR; + end end//any port has data else begin//no port has data mode <= `READ_MODE; @@ -354,12 +353,6 @@ always @(posedge clk) begin outVals[`UP_ADDR] <= writeValue; last <= `UP_ADDR; end - else if(portsWantData[`DOWN_ADDR]) begin - writeTarget <= `DOWN_ADDR; - weHaveData[`DOWN_ADDR] <= 1; - outVals[`DOWN_ADDR] <= writeValue; - last <= `DOWN_ADDR; - end else if(portsWantData[`LEFT_ADDR]) begin writeTarget <= `LEFT_ADDR; weHaveData[`LEFT_ADDR] <= 1; @@ -372,6 +365,12 @@ always @(posedge clk) begin outVals[`RIGHT_ADDR] <= writeValue; last <= `RIGHT_ADDR; end + else if(portsWantData[`DOWN_ADDR]) begin + writeTarget <= `DOWN_ADDR; + weHaveData[`DOWN_ADDR] <= 1; + outVals[`DOWN_ADDR] <= writeValue; + last <= `DOWN_ADDR; + end end else begin//no one wants data writeTarget <= DST; @@ -390,17 +389,7 @@ always @(posedge clk) begin if(anyHasData) begin mode <= `RUN_MODE; weWantData = 4'd0; - if(portsHaveData[`UP_ADDR]) begin - readValue <= regVals[`UP_ADDR]; - readAckOut[`UP_ADDR] <= 1; - last <= `UP_ADDR; - end - else if(portsHaveData[`DOWN_ADDR]) begin - readValue <= regVals[`DOWN_ADDR]; - readAckOut[`DOWN_ADDR] <= 1; - last <= `DOWN_ADDR; - end - else if(portsHaveData[`LEFT_ADDR]) begin + if(portsHaveData[`LEFT_ADDR]) begin readValue <= regVals[`LEFT_ADDR]; readAckOut[`LEFT_ADDR] <= 1; last <= `LEFT_ADDR; @@ -410,6 +399,16 @@ always @(posedge clk) begin readAckOut[`RIGHT_ADDR] <= 1; last <= `RIGHT_ADDR; end + else if(portsHaveData[`UP_ADDR]) begin + readValue <= regVals[`UP_ADDR]; + readAckOut[`UP_ADDR] <= 1; + last <= `UP_ADDR; + end + else if(portsHaveData[`DOWN_ADDR]) begin + readValue <= regVals[`DOWN_ADDR]; + readAckOut[`DOWN_ADDR] <= 1; + last <= `DOWN_ADDR; + end end end//target is not ANY else begin @@ -445,12 +444,6 @@ always @(posedge clk) begin outVals[`UP_ADDR] <= writeValue; last <= `UP_ADDR; end - else if(portsWantData[`DOWN_ADDR]) begin - writeTarget <= `DOWN_ADDR; - weHaveData[`DOWN_ADDR] <= 1; - outVals[`DOWN_ADDR] <= writeValue; - last <= `DOWN_ADDR; - end else if(portsWantData[`LEFT_ADDR]) begin writeTarget <= `LEFT_ADDR; weHaveData[`LEFT_ADDR] <= 1; @@ -463,18 +456,25 @@ always @(posedge clk) begin outVals[`RIGHT_ADDR] <= writeValue; last <= `RIGHT_ADDR; end + else if(portsWantData[`DOWN_ADDR]) begin + writeTarget <= `DOWN_ADDR; + weHaveData[`DOWN_ADDR] <= 1; + outVals[`DOWN_ADDR] <= writeValue; + last <= `DOWN_ADDR; + end end end phase <= `WRITE_PHASE; end `WRITE_PHASE: begin - if(writeTarget != `ANY_ADDR) begin//target is not any - if(writeAckIn[writeTarget]) begin//write was acked - weHaveData[writeTarget] = 0; - mode <= `RUN_MODE; + if(writeTarget != `ANY_ADDR) begin//target is not any + if(writeAckIn[writeTarget]) begin//write was acked + weHaveData[writeTarget] = 0; + mode <= `RUN_MODE; + last <= writeTarget; + end end - end - phase <= `READ_PHASE; + phase <= `READ_PHASE; end endcase end From 24af3108cfe1dd8661698dda770a032dbb533089 Mon Sep 17 00:00:00 2001 From: Henry Rachootin Date: Mon, 11 Dec 2017 22:52:06 -0500 Subject: [PATCH 09/14] made a demo --- Makefile | 7 +- anyRead/center.dat | 20 +- anyRead/left.dat | 28 +- anyRead/right.dat | 28 +- anyRead/test | 4795 +++++++++--------- anyRead/up.dat | 28 +- anyWrite/center.dat | 20 +- anyWrite/left.dat | 28 +- anyWrite/right.dat | 28 +- anyWrite/test | 4795 +++++++++--------- anyWrite/up.dat | 28 +- assembler.py | 25 +- demo/demo | 11131 ++++++++++++++++++++++++++++++++++++++++++ demo/demo.asm | 86 + demo/demo.v | 87 + demo/five.dat | 16 + demo/four.dat | 16 + demo/in.dat | 16 + demo/one.dat | 16 + demo/out.dat | 16 + demo/seven.dat | 16 + demo/six.dat | 16 + demo/testmem.dat | 6 + demo/three.dat | 16 + demo/two.dat | 16 + jumpTest/center.dat | 24 +- jumpTest/left.dat | 24 +- jumpTest/right.dat | 24 +- jumpTest/test | 4805 +++++++++--------- jumpTest/up.dat | 22 +- regTest/center.dat | 16 +- regTest/left.dat | 26 +- regTest/right.dat | 20 +- regTest/test | 4805 +++++++++--------- regTest/up.dat | 20 +- stackmemory | 391 +- stackmemory.v | 13 +- test | 2448 ---------- test.vcd | 2 +- tis100.v | 5 + 40 files changed, 21490 insertions(+), 12439 deletions(-) create mode 100755 demo/demo create mode 100644 demo/demo.asm create mode 100644 demo/demo.v create mode 100644 demo/five.dat create mode 100644 demo/four.dat create mode 100644 demo/in.dat create mode 100644 demo/one.dat create mode 100644 demo/out.dat create mode 100644 demo/seven.dat create mode 100644 demo/six.dat create mode 100644 demo/testmem.dat create mode 100644 demo/three.dat create mode 100644 demo/two.dat delete mode 100755 test diff --git a/Makefile b/Makefile index 08c0ecc..79cc09e 100644 --- a/Makefile +++ b/Makefile @@ -3,15 +3,18 @@ test: build ./anyWrite/test ./jumpTest/test ./regTest/test - ./stackmemory + #./stackmemory + ./demo/demo build: anyRead/test.v anyRead/test.asm python assembler.py anyRead/test.asm python assembler.py anyWrite/test.asm python assembler.py jumpTest/test.asm python assembler.py regTest/test.asm + python assembler.py demo/demo.asm iverilog -o anyRead/test anyRead/test.v iverilog -o anyWrite/test anyWrite/test.v iverilog -o jumpTest/test jumpTest/test.v iverilog -o regTest/test regTest/test.v - iverilog -o stackmemory stackmemory.t.v + #iverilog -o stackmemory stackmemory.t.v + iverilog -o demo/demo demo/demo.v diff --git a/anyRead/center.dat b/anyRead/center.dat index c0aaf20..c2f1dc1 100644 --- a/anyRead/center.dat +++ b/anyRead/center.dat @@ -4,13 +4,13 @@ 001100111100000000 001100111000000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyRead/left.dat b/anyRead/left.dat index 415d0ff..4b226e2 100644 --- a/anyRead/left.dat +++ b/anyRead/left.dat @@ -1,16 +1,16 @@ 010001100000000001 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyRead/right.dat b/anyRead/right.dat index 9ac651a..4f2da29 100644 --- a/anyRead/right.dat +++ b/anyRead/right.dat @@ -1,16 +1,16 @@ 010001000000000010 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyRead/test b/anyRead/test index 65943e2..4cafcea 100755 --- a/anyRead/test +++ b/anyRead/test @@ -6,22 +6,22 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x2836a60 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x11b0b30 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x28dc590_0 .net "C2D", 14 0, L_0x2900a30; 1 drivers -v0x28dc6c0_0 .net "C2L", 14 0, L_0x2900750; 1 drivers -v0x28dc7d0_0 .net "C2R", 14 0, L_0x2901120; 1 drivers -v0x28dc8c0_0 .net "C2U", 14 0, L_0x2900480; 1 drivers -v0x28dc9d0_0 .net "D2C", 14 0, L_0x28fc290; 1 drivers -v0x28dcb30_0 .net "L2C", 14 0, L_0x28f0ce0; 1 drivers -v0x28dcc40_0 .net "R2C", 14 0, L_0x28f4280; 1 drivers -v0x28dcd50_0 .net "U2C", 14 0, L_0x28f8730; 1 drivers -v0x28dce60_0 .net/s "accOutCenter", 10 0, L_0x28fd050; 1 drivers -v0x28dcfb0_0 .var "clk", 0 0; -v0x28dd050_0 .var "dutPassed", 0 0; -v0x28dd0f0 .array/s "expected", 6 0, 10 0; -v0x28dd1b0_0 .var "i", 32 0; -S_0x280ede0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x2836a60; +v0x127e5a0_0 .net "C2D", 14 0, L_0x12a2b90; 1 drivers +v0x127e6d0_0 .net "C2L", 14 0, L_0x12a28b0; 1 drivers +v0x127e7e0_0 .net "C2R", 14 0, L_0x12a3280; 1 drivers +v0x127e8d0_0 .net "C2U", 14 0, L_0x12a25e0; 1 drivers +v0x127e9e0_0 .net "D2C", 14 0, L_0x129e3b0; 1 drivers +v0x127eb40_0 .net "L2C", 14 0, L_0x1292cc0; 1 drivers +v0x127ec50_0 .net "R2C", 14 0, L_0x1296460; 1 drivers +v0x127ed60_0 .net "U2C", 14 0, L_0x129a800; 1 drivers +v0x127ee70_0 .net/s "accOutCenter", 10 0, L_0x129f1e0; 1 drivers +v0x127efc0_0 .var "clk", 0 0; +v0x127f060_0 .var "dutPassed", 0 0; +v0x127f100 .array/s "expected", 6 0, 10 0; +v0x127f1c0_0 .var "i", 32 0; +S_0x12003b0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x11b0b30; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -33,173 +33,174 @@ S_0x280ede0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x2836a60; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x281f8b0 .param/str "memFile" 0 3 60, "anyRead/center.dat"; -L_0x28fd050 .functor BUFZ 11, v0x2884a60_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28fd2e0 .functor BUFZ 11, v0x2884a60_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28fe110 .functor BUFZ 18, L_0x2900290, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2884a60_0 .var/s "ACC", 10 0; -v0x28c33a0_0 .var/s "BAK", 10 0; -v0x28c3480_0 .net "DST", 2 0, L_0x29015b0; 1 drivers -v0x28c3570_0 .net/s "IMM", 10 0, L_0x2901650; 1 drivers -v0x28c3650_0 .net "INST", 3 0, L_0x2900d90; 1 drivers -v0x28c3780_0 .net "LABEL", 3 0, L_0x2901800; 1 drivers -v0x28c3860_0 .var "PC", 3 0; -v0x28c3940_0 .var "PCNEXT", 3 0; -v0x28c3a20_0 .net "SRC", 2 0, L_0x29013c0; 1 drivers -v0x28c3b90_0 .net *"_s103", 0 0, L_0x28ff5d0; 1 drivers -v0x28c3c70_0 .net *"_s107", 0 0, L_0x28ff4e0; 1 drivers -v0x28c3d50_0 .net *"_s111", 0 0, L_0x28ff7c0; 1 drivers -v0x28c3e30_0 .net *"_s115", 0 0, L_0x28ff6c0; 1 drivers -v0x28c3f10_0 .net *"_s119", 0 0, L_0x28ffa00; 1 drivers -v0x28c3ff0_0 .net *"_s123", 0 0, L_0x28ff8f0; 1 drivers -v0x28c40d0_0 .net *"_s127", 0 0, L_0x28ffbc0; 1 drivers -v0x28c41b0_0 .net *"_s131", 0 0, L_0x28ffaa0; 1 drivers -v0x28c4360_0 .net *"_s135", 0 0, L_0x28ffe20; 1 drivers -v0x28c4400_0 .net *"_s139", 0 0, L_0x28ffcf0; 1 drivers -v0x28c44e0_0 .net *"_s143", 0 0, L_0x2900000; 1 drivers -v0x28c45c0_0 .net *"_s147", 0 0, L_0x28ffec0; 1 drivers -v0x28c46a0_0 .net *"_s151", 0 0, L_0x29001f0; 1 drivers -v0x28c4780_0 .net *"_s155", 0 0, L_0x29000a0; 1 drivers -v0x28c4860_0 .net *"_s159", 0 0, L_0x2900140; 1 drivers -v0x28c4940_0 .net *"_s160", 17 0, L_0x2900290; 1 drivers -v0x28c4a20_0 .net *"_s162", 5 0, L_0x29005f0; 1 drivers -L_0x2b505a79b2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x28c4b00_0 .net *"_s165", 1 0, L_0x2b505a79b2a0; 1 drivers -v0x28c6ad0_2 .array/port v0x28c6ad0, 2; -v0x28c4be0_0 .net *"_s173", 10 0, v0x28c6ad0_2; 1 drivers -v0x28c6ad0_3 .array/port v0x28c6ad0, 3; -v0x28c4cc0_0 .net *"_s179", 10 0, v0x28c6ad0_3; 1 drivers -v0x28c6ad0_0 .array/port v0x28c6ad0, 0; -v0x28c4da0_0 .net *"_s185", 10 0, v0x28c6ad0_0; 1 drivers -v0x28c6ad0_1 .array/port v0x28c6ad0, 1; -v0x28c4e80_0 .net *"_s191", 10 0, v0x28c6ad0_1; 1 drivers -v0x28c4f60_0 .net *"_s23", 0 0, L_0x28fdab0; 1 drivers -v0x28c5040_0 .net *"_s27", 0 0, L_0x28fdb80; 1 drivers -v0x28c4290_0 .net *"_s31", 0 0, L_0x28fdc50; 1 drivers -v0x28c5310_0 .net *"_s36", 0 0, L_0x28fddf0; 1 drivers -v0x28c53f0_0 .net *"_s42", 0 0, L_0x28fdfd0; 1 drivers -v0x28c54d0_0 .net *"_s46", 0 0, L_0x28fe070; 1 drivers -v0x28c55b0_0 .net *"_s50", 0 0, L_0x28fe180; 1 drivers -v0x28c5690_0 .net *"_s55", 0 0, L_0x28fe390; 1 drivers -v0x28c5770_0 .net *"_s61", 0 0, L_0x28fe600; 1 drivers -v0x28c5850_0 .net *"_s65", 0 0, L_0x28fe6a0; 1 drivers -v0x28c5930_0 .net *"_s69", 0 0, L_0x28fe7e0; 1 drivers -v0x28c5a10_0 .net *"_s74", 0 0, L_0x28fe740; 1 drivers -v0x28c5af0_0 .net *"_s80", 0 0, L_0x28fea10; 1 drivers -v0x28c5bd0_0 .net *"_s84", 0 0, L_0x28fedd0; 1 drivers -v0x28c5cb0_0 .net *"_s88", 0 0, L_0x28fec00; 1 drivers -v0x28c5d90_0 .net *"_s93", 0 0, L_0x28fef80; 1 drivers -v0x28c5e70_0 .net *"_s99", 0 0, L_0x28ff200; 1 drivers -v0x28c5f50_0 .net/s "accOut", 10 0, L_0x28fd050; alias, 1 drivers -v0x28c6030_0 .net "anyHasData", 0 0, L_0x28fdee0; 1 drivers -v0x28c60f0_0 .net "anyReadAck", 0 0, L_0x28feb10; 1 drivers -v0x28c61b0_0 .net "anyWantData", 0 0, L_0x28fe480; 1 drivers -v0x28c6270_0 .net "anyWriteAck", 0 0, L_0x28ff440; 1 drivers -v0x28c6330_0 .net "clk", 0 0, v0x28dcfb0_0; 1 drivers -v0x28c63f0_0 .net "down", 14 0, L_0x28fc290; alias, 1 drivers -v0x28c64d0_0 .net "downOut", 14 0, L_0x2900a30; alias, 1 drivers -v0x28c65b0_0 .net "instruction", 17 0, L_0x28fe110; 1 drivers -v0x28c6690 .array "instructions", 15 0, 17 0; -v0x28c6750_0 .var "last", 2 0; -v0x28c6830_0 .net "left", 14 0, L_0x28f0ce0; alias, 1 drivers -v0x28c6910_0 .net "leftOut", 14 0, L_0x2900750; alias, 1 drivers -v0x28c69f0_0 .var "mode", 2 0; -v0x28c6ad0 .array/s "outVals", 2 5, 10 0; -v0x28c6c10_0 .var "phase", 2 0; -v0x28c6cf0_0 .net "portsHaveData", 5 2, L_0x28fdcf0; 1 drivers -v0x28c50e0_0 .net "portsWantData", 5 2, L_0x28fe220; 1 drivers -v0x28c51c0_0 .net "readAckIn", 5 2, L_0x28fe880; 1 drivers -v0x28c71a0_0 .var "readAckOut", 5 2; -v0x28c7240_0 .var "readTarget", 2 0; -v0x28c7320_0 .var/s "readValue", 10 0; -L_0x2b505a79b258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x28c7400 .array "regVals", 0 7; -v0x28c7400_0 .net/s v0x28c7400 0, 10 0, L_0x2b505a79b258; 1 drivers -v0x28c7400_1 .net/s v0x28c7400 1, 10 0, L_0x28fd2e0; 1 drivers -v0x28c7400_2 .net/s v0x28c7400 2, 10 0, L_0x28fd5c0; 1 drivers -v0x28c7400_3 .net/s v0x28c7400 3, 10 0, L_0x28fd6f0; 1 drivers -v0x28c7400_4 .net/s v0x28c7400 4, 10 0, L_0x28fd820; 1 drivers -v0x28c7400_5 .net/s v0x28c7400 5, 10 0, L_0x28fd950; 1 drivers -o0x2b505a76aeb8 .functor BUFZ 11, C4; HiZ drive -v0x28c7400_6 .net/s v0x28c7400 6, 10 0, o0x2b505a76aeb8; 0 drivers -o0x2b505a76aee8 .functor BUFZ 11, C4; HiZ drive -v0x28c7400_7 .net/s v0x28c7400 7, 10 0, o0x2b505a76aee8; 0 drivers -v0x28c7610_0 .net "right", 14 0, L_0x28f4280; alias, 1 drivers -v0x28c76f0_0 .net "rightOut", 14 0, L_0x2901120; alias, 1 drivers -v0x28c77d0_0 .net "up", 14 0, L_0x28f8730; alias, 1 drivers -v0x28c78b0_0 .net "upOut", 14 0, L_0x2900480; alias, 1 drivers -v0x28c7990_0 .var "weHaveData", 5 2; -v0x28c7a70_0 .var "weWantData", 5 2; -v0x28c7b50_0 .net "writeAckIn", 5 2, L_0x28ff160; 1 drivers -v0x28c7c30_0 .var "writeAckOut", 5 2; -v0x28c7d10_0 .var "writeTarget", 2 0; -v0x28c7df0_0 .var/s "writeValue", 10 0; -E_0x281fc70 .event negedge, v0x28c6330_0; -E_0x28423d0 .event posedge, v0x28c6330_0; -L_0x28fd5c0 .part L_0x28f0ce0, 0, 11; -L_0x28fd6f0 .part L_0x28f4280, 0, 11; -L_0x28fd820 .part L_0x28f8730, 0, 11; -L_0x28fd950 .part L_0x28fc290, 0, 11; -L_0x28fdab0 .part L_0x28f0ce0, 11, 1; -L_0x28fdb80 .part L_0x28f4280, 11, 1; -L_0x28fdc50 .part L_0x28f8730, 11, 1; -L_0x28fdcf0 .concat8 [ 1 1 1 1], L_0x28fdab0, L_0x28fdb80, L_0x28fdc50, L_0x28fddf0; -L_0x28fddf0 .part L_0x28fc290, 11, 1; -L_0x28fdee0 .reduce/or L_0x28fdcf0; -L_0x28fdfd0 .part L_0x28f0ce0, 12, 1; -L_0x28fe070 .part L_0x28f4280, 12, 1; -L_0x28fe180 .part L_0x28f8730, 12, 1; -L_0x28fe220 .concat8 [ 1 1 1 1], L_0x28fdfd0, L_0x28fe070, L_0x28fe180, L_0x28fe390; -L_0x28fe390 .part L_0x28fc290, 12, 1; -L_0x28fe480 .reduce/or L_0x28fe220; -L_0x28fe600 .part L_0x28f0ce0, 13, 1; -L_0x28fe6a0 .part L_0x28f4280, 13, 1; -L_0x28fe7e0 .part L_0x28f8730, 13, 1; -L_0x28fe880 .concat8 [ 1 1 1 1], L_0x28fe600, L_0x28fe6a0, L_0x28fe7e0, L_0x28fe740; -L_0x28fe740 .part L_0x28fc290, 13, 1; -L_0x28feb10 .reduce/or L_0x28fe880; -L_0x28fea10 .part L_0x28f0ce0, 14, 1; -L_0x28fedd0 .part L_0x28f4280, 14, 1; -L_0x28fec00 .part L_0x28f8730, 14, 1; -L_0x28ff160 .concat8 [ 1 1 1 1], L_0x28fea10, L_0x28fedd0, L_0x28fec00, L_0x28fef80; -L_0x28fef80 .part L_0x28fc290, 14, 1; -L_0x28ff440 .reduce/or L_0x28ff160; -L_0x28ff200 .part v0x28c71a0_0, 0, 1; -L_0x28ff5d0 .part v0x28c71a0_0, 1, 1; -L_0x28ff4e0 .part v0x28c71a0_0, 2, 1; -L_0x28ff7c0 .part v0x28c71a0_0, 3, 1; -L_0x28ff6c0 .part v0x28c7c30_0, 0, 1; -L_0x28ffa00 .part v0x28c7c30_0, 1, 1; -L_0x28ff8f0 .part v0x28c7c30_0, 2, 1; -L_0x28ffbc0 .part v0x28c7c30_0, 3, 1; -L_0x28ffaa0 .part v0x28c7a70_0, 0, 1; -L_0x28ffe20 .part v0x28c7a70_0, 1, 1; -L_0x28ffcf0 .part v0x28c7a70_0, 2, 1; -L_0x2900000 .part v0x28c7a70_0, 3, 1; -L_0x28ffec0 .part v0x28c7990_0, 0, 1; -L_0x29001f0 .part v0x28c7990_0, 1, 1; -L_0x29000a0 .part v0x28c7990_0, 2, 1; -L_0x2900140 .part v0x28c7990_0, 3, 1; -L_0x2900290 .array/port v0x28c6690, L_0x29005f0; -L_0x29005f0 .concat [ 4 2 0 0], v0x28c3860_0, L_0x2b505a79b2a0; -LS_0x2900480_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_2, L_0x29000a0, L_0x28ffcf0, L_0x28ff8f0; -LS_0x2900480_0_4 .concat8 [ 1 0 0 0], L_0x28ff4e0; -L_0x2900480 .concat8 [ 14 1 0 0], LS_0x2900480_0_0, LS_0x2900480_0_4; -LS_0x2900a30_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_3, L_0x2900140, L_0x2900000, L_0x28ffbc0; -LS_0x2900a30_0_4 .concat8 [ 1 0 0 0], L_0x28ff7c0; -L_0x2900a30 .concat8 [ 14 1 0 0], LS_0x2900a30_0_0, LS_0x2900a30_0_4; -LS_0x2900750_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_0, L_0x28ffec0, L_0x28ffaa0, L_0x28ff6c0; -LS_0x2900750_0_4 .concat8 [ 1 0 0 0], L_0x28ff200; -L_0x2900750 .concat8 [ 14 1 0 0], LS_0x2900750_0_0, LS_0x2900750_0_4; -LS_0x2901120_0_0 .concat8 [ 11 1 1 1], v0x28c6ad0_1, L_0x29001f0, L_0x28ffe20, L_0x28ffa00; -LS_0x2901120_0_4 .concat8 [ 1 0 0 0], L_0x28ff5d0; -L_0x2901120 .concat8 [ 14 1 0 0], LS_0x2901120_0_0, LS_0x2901120_0_4; -L_0x2900d90 .part L_0x28fe110, 14, 4; -L_0x29015b0 .part L_0x28fe110, 11, 3; -L_0x29013c0 .part L_0x28fe110, 8, 3; -L_0x2901800 .part L_0x28fe110, 10, 4; -L_0x2901650 .part L_0x28fe110, 0, 11; -S_0x28c8070 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x2836a60; +P_0x11cf1b0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x11cf1f0 .param/str "memFile" 0 3 60, "anyRead/center.dat"; +L_0x129f1e0 .functor BUFZ 11, v0x1226750_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x129f470 .functor BUFZ 11, v0x1226750_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x12a0270 .functor BUFZ 18, L_0x12a23f0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1226750_0 .var/s "ACC", 10 0; +v0x1265090_0 .var/s "BAK", 10 0; +v0x1265170_0 .net "DST", 2 0, L_0x12a3710; 1 drivers +v0x1265260_0 .net/s "IMM", 10 0, L_0x12a37b0; 1 drivers +v0x1265340_0 .net "INST", 3 0, L_0x12a2ef0; 1 drivers +v0x1265470_0 .net "LABEL", 3 0, L_0x12a3960; 1 drivers +v0x1265550_0 .var "PC", 3 0; +v0x1265630_0 .var "PCNEXT", 3 0; +v0x1265710_0 .net "SRC", 2 0, L_0x12a3520; 1 drivers +v0x1265880_0 .net *"_s103", 0 0, L_0x12a1730; 1 drivers +v0x1265960_0 .net *"_s107", 0 0, L_0x12a1640; 1 drivers +v0x1265a40_0 .net *"_s111", 0 0, L_0x12a1920; 1 drivers +v0x1265b20_0 .net *"_s115", 0 0, L_0x12a1820; 1 drivers +v0x1265c00_0 .net *"_s119", 0 0, L_0x12a1b60; 1 drivers +v0x1265ce0_0 .net *"_s123", 0 0, L_0x12a1a50; 1 drivers +v0x1265dc0_0 .net *"_s127", 0 0, L_0x12a1d20; 1 drivers +v0x1265ea0_0 .net *"_s131", 0 0, L_0x12a1c00; 1 drivers +v0x1266050_0 .net *"_s135", 0 0, L_0x12a1f80; 1 drivers +v0x12660f0_0 .net *"_s139", 0 0, L_0x12a1e50; 1 drivers +v0x12661d0_0 .net *"_s143", 0 0, L_0x12a2160; 1 drivers +v0x12662b0_0 .net *"_s147", 0 0, L_0x12a2020; 1 drivers +v0x1266390_0 .net *"_s151", 0 0, L_0x12a2350; 1 drivers +v0x1266470_0 .net *"_s155", 0 0, L_0x12a2200; 1 drivers +v0x1266550_0 .net *"_s159", 0 0, L_0x12a22a0; 1 drivers +v0x1266630_0 .net *"_s160", 17 0, L_0x12a23f0; 1 drivers +v0x1266710_0 .net *"_s162", 5 0, L_0x12a2750; 1 drivers +L_0x2b8e31c882a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x12667f0_0 .net *"_s165", 1 0, L_0x2b8e31c882a0; 1 drivers +v0x12687c0_2 .array/port v0x12687c0, 2; +v0x12668d0_0 .net *"_s173", 10 0, v0x12687c0_2; 1 drivers +v0x12687c0_3 .array/port v0x12687c0, 3; +v0x12669b0_0 .net *"_s179", 10 0, v0x12687c0_3; 1 drivers +v0x12687c0_0 .array/port v0x12687c0, 0; +v0x1266a90_0 .net *"_s185", 10 0, v0x12687c0_0; 1 drivers +v0x12687c0_1 .array/port v0x12687c0, 1; +v0x1266b70_0 .net *"_s191", 10 0, v0x12687c0_1; 1 drivers +v0x1266c50_0 .net *"_s23", 0 0, L_0x129fc10; 1 drivers +v0x1266d30_0 .net *"_s27", 0 0, L_0x129fce0; 1 drivers +v0x1265f80_0 .net *"_s31", 0 0, L_0x129fdb0; 1 drivers +v0x1267000_0 .net *"_s36", 0 0, L_0x129ff50; 1 drivers +v0x12670e0_0 .net *"_s42", 0 0, L_0x12a0130; 1 drivers +v0x12671c0_0 .net *"_s46", 0 0, L_0x12a01d0; 1 drivers +v0x12672a0_0 .net *"_s50", 0 0, L_0x12a02e0; 1 drivers +v0x1267380_0 .net *"_s55", 0 0, L_0x12a04f0; 1 drivers +v0x1267460_0 .net *"_s61", 0 0, L_0x12a0760; 1 drivers +v0x1267540_0 .net *"_s65", 0 0, L_0x12a0800; 1 drivers +v0x1267620_0 .net *"_s69", 0 0, L_0x12a0940; 1 drivers +v0x1267700_0 .net *"_s74", 0 0, L_0x12a08a0; 1 drivers +v0x12677e0_0 .net *"_s80", 0 0, L_0x12a0b70; 1 drivers +v0x12678c0_0 .net *"_s84", 0 0, L_0x12a0f30; 1 drivers +v0x12679a0_0 .net *"_s88", 0 0, L_0x12a0d60; 1 drivers +v0x1267a80_0 .net *"_s93", 0 0, L_0x12a10e0; 1 drivers +v0x1267b60_0 .net *"_s99", 0 0, L_0x12a1360; 1 drivers +v0x1267c40_0 .net/s "accOut", 10 0, L_0x129f1e0; alias, 1 drivers +v0x1267d20_0 .net "anyHasData", 0 0, L_0x12a0040; 1 drivers +v0x1267de0_0 .net "anyReadAck", 0 0, L_0x12a0c70; 1 drivers +v0x1267ea0_0 .net "anyWantData", 0 0, L_0x12a05e0; 1 drivers +v0x1267f60_0 .net "anyWriteAck", 0 0, L_0x12a15a0; 1 drivers +v0x1268020_0 .net "clk", 0 0, v0x127efc0_0; 1 drivers +v0x12680e0_0 .net "down", 14 0, L_0x129e3b0; alias, 1 drivers +v0x12681c0_0 .net "downOut", 14 0, L_0x12a2b90; alias, 1 drivers +v0x12682a0_0 .net "instruction", 17 0, L_0x12a0270; 1 drivers +v0x1268380 .array "instructions", 15 0, 17 0; +v0x1268440_0 .var "last", 2 0; +v0x1268520_0 .net "left", 14 0, L_0x1292cc0; alias, 1 drivers +v0x1268600_0 .net "leftOut", 14 0, L_0x12a28b0; alias, 1 drivers +v0x12686e0_0 .var "mode", 2 0; +v0x12687c0 .array/s "outVals", 2 5, 10 0; +v0x1268900_0 .var "phase", 2 0; +v0x12689e0_0 .net "portsHaveData", 5 2, L_0x129fe50; 1 drivers +v0x1266dd0_0 .net "portsWantData", 5 2, L_0x12a0380; 1 drivers +v0x1266eb0_0 .net "readAckIn", 5 2, L_0x12a09e0; 1 drivers +v0x1268e90_0 .var "readAckOut", 5 2; +v0x1268f30_0 .var "readTarget", 2 0; +v0x1269010_0 .var/s "readValue", 10 0; +L_0x2b8e31c88258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x12690f0 .array "regVals", 0 7; +v0x12690f0_0 .net/s v0x12690f0 0, 10 0, L_0x2b8e31c88258; 1 drivers +v0x12690f0_1 .net/s v0x12690f0 1, 10 0, L_0x129f470; 1 drivers +v0x12690f0_2 .net/s v0x12690f0 2, 10 0, L_0x129f750; 1 drivers +v0x12690f0_3 .net/s v0x12690f0 3, 10 0, L_0x129f880; 1 drivers +v0x12690f0_4 .net/s v0x12690f0 4, 10 0, L_0x129f9b0; 1 drivers +v0x12690f0_5 .net/s v0x12690f0 5, 10 0, L_0x129fae0; 1 drivers +o0x2b8e31c57eb8 .functor BUFZ 11, C4; HiZ drive +v0x12690f0_6 .net/s v0x12690f0 6, 10 0, o0x2b8e31c57eb8; 0 drivers +o0x2b8e31c57ee8 .functor BUFZ 11, C4; HiZ drive +v0x12690f0_7 .net/s v0x12690f0 7, 10 0, o0x2b8e31c57ee8; 0 drivers +v0x1269300_0 .net "right", 14 0, L_0x1296460; alias, 1 drivers +v0x12693e0_0 .net "rightOut", 14 0, L_0x12a3280; alias, 1 drivers +v0x12694c0_0 .net "up", 14 0, L_0x129a800; alias, 1 drivers +v0x12695a0_0 .net "upOut", 14 0, L_0x12a25e0; alias, 1 drivers +v0x1269680_0 .var "weHaveData", 5 2; +v0x1269760_0 .var "weWantData", 5 2; +v0x1269840_0 .net "writeAckIn", 5 2, L_0x12a12c0; 1 drivers +v0x1269920_0 .var "writeAckOut", 5 2; +v0x1269a00_0 .var "writeTarget", 2 0; +v0x1269ae0_0 .var/s "writeValue", 10 0; +E_0x11c19c0 .event negedge, v0x1268020_0; +E_0x11e4150 .event posedge, v0x1268020_0; +L_0x129f750 .part L_0x1292cc0, 0, 11; +L_0x129f880 .part L_0x1296460, 0, 11; +L_0x129f9b0 .part L_0x129a800, 0, 11; +L_0x129fae0 .part L_0x129e3b0, 0, 11; +L_0x129fc10 .part L_0x1292cc0, 11, 1; +L_0x129fce0 .part L_0x1296460, 11, 1; +L_0x129fdb0 .part L_0x129a800, 11, 1; +L_0x129fe50 .concat8 [ 1 1 1 1], L_0x129fc10, L_0x129fce0, L_0x129fdb0, L_0x129ff50; +L_0x129ff50 .part L_0x129e3b0, 11, 1; +L_0x12a0040 .reduce/or L_0x129fe50; +L_0x12a0130 .part L_0x1292cc0, 12, 1; +L_0x12a01d0 .part L_0x1296460, 12, 1; +L_0x12a02e0 .part L_0x129a800, 12, 1; +L_0x12a0380 .concat8 [ 1 1 1 1], L_0x12a0130, L_0x12a01d0, L_0x12a02e0, L_0x12a04f0; +L_0x12a04f0 .part L_0x129e3b0, 12, 1; +L_0x12a05e0 .reduce/or L_0x12a0380; +L_0x12a0760 .part L_0x1292cc0, 13, 1; +L_0x12a0800 .part L_0x1296460, 13, 1; +L_0x12a0940 .part L_0x129a800, 13, 1; +L_0x12a09e0 .concat8 [ 1 1 1 1], L_0x12a0760, L_0x12a0800, L_0x12a0940, L_0x12a08a0; +L_0x12a08a0 .part L_0x129e3b0, 13, 1; +L_0x12a0c70 .reduce/or L_0x12a09e0; +L_0x12a0b70 .part L_0x1292cc0, 14, 1; +L_0x12a0f30 .part L_0x1296460, 14, 1; +L_0x12a0d60 .part L_0x129a800, 14, 1; +L_0x12a12c0 .concat8 [ 1 1 1 1], L_0x12a0b70, L_0x12a0f30, L_0x12a0d60, L_0x12a10e0; +L_0x12a10e0 .part L_0x129e3b0, 14, 1; +L_0x12a15a0 .reduce/or L_0x12a12c0; +L_0x12a1360 .part v0x1268e90_0, 0, 1; +L_0x12a1730 .part v0x1268e90_0, 1, 1; +L_0x12a1640 .part v0x1268e90_0, 2, 1; +L_0x12a1920 .part v0x1268e90_0, 3, 1; +L_0x12a1820 .part v0x1269920_0, 0, 1; +L_0x12a1b60 .part v0x1269920_0, 1, 1; +L_0x12a1a50 .part v0x1269920_0, 2, 1; +L_0x12a1d20 .part v0x1269920_0, 3, 1; +L_0x12a1c00 .part v0x1269760_0, 0, 1; +L_0x12a1f80 .part v0x1269760_0, 1, 1; +L_0x12a1e50 .part v0x1269760_0, 2, 1; +L_0x12a2160 .part v0x1269760_0, 3, 1; +L_0x12a2020 .part v0x1269680_0, 0, 1; +L_0x12a2350 .part v0x1269680_0, 1, 1; +L_0x12a2200 .part v0x1269680_0, 2, 1; +L_0x12a22a0 .part v0x1269680_0, 3, 1; +L_0x12a23f0 .array/port v0x1268380, L_0x12a2750; +L_0x12a2750 .concat [ 4 2 0 0], v0x1265550_0, L_0x2b8e31c882a0; +LS_0x12a25e0_0_0 .concat8 [ 11 1 1 1], v0x12687c0_2, L_0x12a2200, L_0x12a1e50, L_0x12a1a50; +LS_0x12a25e0_0_4 .concat8 [ 1 0 0 0], L_0x12a1640; +L_0x12a25e0 .concat8 [ 14 1 0 0], LS_0x12a25e0_0_0, LS_0x12a25e0_0_4; +LS_0x12a2b90_0_0 .concat8 [ 11 1 1 1], v0x12687c0_3, L_0x12a22a0, L_0x12a2160, L_0x12a1d20; +LS_0x12a2b90_0_4 .concat8 [ 1 0 0 0], L_0x12a1920; +L_0x12a2b90 .concat8 [ 14 1 0 0], LS_0x12a2b90_0_0, LS_0x12a2b90_0_4; +LS_0x12a28b0_0_0 .concat8 [ 11 1 1 1], v0x12687c0_0, L_0x12a2020, L_0x12a1c00, L_0x12a1820; +LS_0x12a28b0_0_4 .concat8 [ 1 0 0 0], L_0x12a1360; +L_0x12a28b0 .concat8 [ 14 1 0 0], LS_0x12a28b0_0_0, LS_0x12a28b0_0_4; +LS_0x12a3280_0_0 .concat8 [ 11 1 1 1], v0x12687c0_1, L_0x12a2350, L_0x12a1f80, L_0x12a1b60; +LS_0x12a3280_0_4 .concat8 [ 1 0 0 0], L_0x12a1730; +L_0x12a3280 .concat8 [ 14 1 0 0], LS_0x12a3280_0_0, LS_0x12a3280_0_4; +L_0x12a2ef0 .part L_0x12a0270, 14, 4; +L_0x12a3710 .part L_0x12a0270, 11, 3; +L_0x12a3520 .part L_0x12a0270, 8, 3; +L_0x12a3960 .part L_0x12a0270, 10, 4; +L_0x12a37b0 .part L_0x12a0270, 0, 11; +S_0x1269d60 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x11b0b30; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -211,174 +212,175 @@ S_0x28c8070 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x2836a60; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x28c8260 .param/str "memFile" 0 3 60, "anyRead/down.dat"; -L_0x28f9030 .functor BUFZ 11, v0x28c84e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28f9230 .functor BUFZ 11, v0x28c84e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28fa0e0 .functor BUFZ 18, L_0x28fc020, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x28c84e0_0 .var/s "ACC", 10 0; -v0x28c85e0_0 .var/s "BAK", 10 0; -v0x28c86c0_0 .net "DST", 2 0, L_0x28fd110; 1 drivers -v0x28c8780_0 .net/s "IMM", 10 0, L_0x28fd1b0; 1 drivers -v0x28c8860_0 .net "INST", 3 0, L_0x28fc9f0; 1 drivers -v0x28c8990_0 .net "LABEL", 3 0, L_0x28fd360; 1 drivers -v0x28c8a70_0 .var "PC", 3 0; -v0x28c8b50_0 .var "PCNEXT", 3 0; -v0x28c8c30_0 .net "SRC", 2 0, L_0x28fcf20; 1 drivers -v0x28c8da0_0 .net *"_s103", 0 0, L_0x28fb360; 1 drivers -v0x28c8e80_0 .net *"_s107", 0 0, L_0x28fb270; 1 drivers -v0x28c8f60_0 .net *"_s111", 0 0, L_0x28fb550; 1 drivers -v0x28c9040_0 .net *"_s115", 0 0, L_0x28fb450; 1 drivers -v0x28c9120_0 .net *"_s119", 0 0, L_0x28fb790; 1 drivers -v0x28c9200_0 .net *"_s123", 0 0, L_0x28fb680; 1 drivers -v0x28c92e0_0 .net *"_s127", 0 0, L_0x28fb950; 1 drivers -v0x28c93c0_0 .net *"_s131", 0 0, L_0x28fb830; 1 drivers -v0x28c9570_0 .net *"_s135", 0 0, L_0x28fbbb0; 1 drivers -v0x28c9610_0 .net *"_s139", 0 0, L_0x28fba80; 1 drivers -v0x28c96f0_0 .net *"_s143", 0 0, L_0x28fbd90; 1 drivers -v0x28c97d0_0 .net *"_s147", 0 0, L_0x28fbc50; 1 drivers -v0x28c98b0_0 .net *"_s151", 0 0, L_0x28fbf80; 1 drivers -v0x28c9990_0 .net *"_s155", 0 0, L_0x28fbe30; 1 drivers -v0x28c9a70_0 .net *"_s159", 0 0, L_0x28fbed0; 1 drivers -v0x28c9b50_0 .net *"_s160", 17 0, L_0x28fc020; 1 drivers -v0x28c9c30_0 .net *"_s162", 5 0, L_0x28fc380; 1 drivers -L_0x2b505a79b210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x28c9d10_0 .net *"_s165", 1 0, L_0x2b505a79b210; 1 drivers -v0x28cbca0_2 .array/port v0x28cbca0, 2; -v0x28c9df0_0 .net *"_s173", 10 0, v0x28cbca0_2; 1 drivers -v0x28cbca0_3 .array/port v0x28cbca0, 3; -v0x28c9ed0_0 .net *"_s179", 10 0, v0x28cbca0_3; 1 drivers -v0x28cbca0_0 .array/port v0x28cbca0, 0; -v0x28c9fb0_0 .net *"_s185", 10 0, v0x28cbca0_0; 1 drivers -v0x28cbca0_1 .array/port v0x28cbca0, 1; -v0x28ca090_0 .net *"_s191", 10 0, v0x28cbca0_1; 1 drivers -v0x28ca170_0 .net *"_s23", 0 0, L_0x28f9870; 1 drivers -v0x28ca250_0 .net *"_s27", 0 0, L_0x28f9990; 1 drivers -v0x28c94a0_0 .net *"_s31", 0 0, L_0x28f9a80; 1 drivers -v0x28ca520_0 .net *"_s36", 0 0, L_0x28f9d70; 1 drivers -v0x28ca600_0 .net *"_s42", 0 0, L_0x28f9fa0; 1 drivers -v0x28ca6e0_0 .net *"_s46", 0 0, L_0x28fa040; 1 drivers -v0x28ca7c0_0 .net *"_s50", 0 0, L_0x28fa150; 1 drivers -v0x28ca8a0_0 .net *"_s55", 0 0, L_0x28fa330; 1 drivers -v0x28ca980_0 .net *"_s61", 0 0, L_0x28fa5a0; 1 drivers -v0x28caa60_0 .net *"_s65", 0 0, L_0x28fa6d0; 1 drivers -v0x28cab40_0 .net *"_s69", 0 0, L_0x28fa8a0; 1 drivers -v0x28cac20_0 .net *"_s74", 0 0, L_0x28fa800; 1 drivers -v0x28cad00_0 .net *"_s80", 0 0, L_0x28faa30; 1 drivers -v0x28cade0_0 .net *"_s84", 0 0, L_0x28fad20; 1 drivers -v0x28caec0_0 .net *"_s88", 0 0, L_0x28fac60; 1 drivers -v0x28cafa0_0 .net *"_s93", 0 0, L_0x28fadc0; 1 drivers -v0x28cb080_0 .net *"_s99", 0 0, L_0x28fb050; 1 drivers -v0x28cb160_0 .net/s "accOut", 10 0, L_0x28f9030; 1 drivers -v0x28cb240_0 .net "anyHasData", 0 0, L_0x28f9eb0; 1 drivers -v0x28cb300_0 .net "anyReadAck", 0 0, L_0x28fabc0; 1 drivers -v0x28cb3c0_0 .net "anyWantData", 0 0, L_0x28fa420; 1 drivers -v0x28cb480_0 .net "anyWriteAck", 0 0, L_0x28fb180; 1 drivers -v0x28cb540_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers -o0x2b505a76bcc8 .functor BUFZ 15, C4; HiZ drive -v0x28cb5e0_0 .net "down", 14 0, o0x2b505a76bcc8; 0 drivers -v0x28cb6a0_0 .net "downOut", 14 0, L_0x28fc750; 1 drivers -v0x28cb780_0 .net "instruction", 17 0, L_0x28fa0e0; 1 drivers -v0x28cb860 .array "instructions", 15 0, 17 0; -v0x28cb920_0 .var "last", 2 0; -o0x2b505a76bd88 .functor BUFZ 15, C4; HiZ drive -v0x28cba00_0 .net "left", 14 0, o0x2b505a76bd88; 0 drivers -v0x28cbae0_0 .net "leftOut", 14 0, L_0x28fc4e0; 1 drivers -v0x28cbbc0_0 .var "mode", 2 0; -v0x28cbca0 .array/s "outVals", 2 5, 10 0; -v0x28cbde0_0 .var "phase", 2 0; -v0x28cbec0_0 .net "portsHaveData", 5 2, L_0x28f9bb0; 1 drivers -v0x28ca2f0_0 .net "portsWantData", 5 2, L_0x28fa1f0; 1 drivers -v0x28ca3d0_0 .net "readAckIn", 5 2, L_0x28fa940; 1 drivers -v0x28cc370_0 .var "readAckOut", 5 2; -v0x28cc410_0 .var "readTarget", 2 0; -v0x28cc4b0_0 .var/s "readValue", 10 0; -L_0x2b505a79b1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x28cc550 .array "regVals", 0 7; -v0x28cc550_0 .net/s v0x28cc550 0, 10 0, L_0x2b505a79b1c8; 1 drivers -v0x28cc550_1 .net/s v0x28cc550 1, 10 0, L_0x28f9230; 1 drivers -v0x28cc550_2 .net/s v0x28cc550 2, 10 0, L_0x28f92a0; 1 drivers -v0x28cc550_3 .net/s v0x28cc550 3, 10 0, L_0x28f95a0; 1 drivers -v0x28cc550_4 .net/s v0x28cc550 4, 10 0, L_0x28f9670; 1 drivers -v0x28cc550_5 .net/s v0x28cc550 5, 10 0, L_0x28f9740; 1 drivers -o0x2b505a76c148 .functor BUFZ 11, C4; HiZ drive -v0x28cc550_6 .net/s v0x28cc550 6, 10 0, o0x2b505a76c148; 0 drivers -o0x2b505a76c178 .functor BUFZ 11, C4; HiZ drive -v0x28cc550_7 .net/s v0x28cc550 7, 10 0, o0x2b505a76c178; 0 drivers -o0x2b505a76c1a8 .functor BUFZ 15, C4; HiZ drive -v0x28cc760_0 .net "right", 14 0, o0x2b505a76c1a8; 0 drivers -v0x28cc840_0 .net "rightOut", 14 0, L_0x28fcd00; 1 drivers -v0x28cc920_0 .net "up", 14 0, L_0x2900a30; alias, 1 drivers -v0x28cca10_0 .net "upOut", 14 0, L_0x28fc290; alias, 1 drivers -v0x28ccae0_0 .var "weHaveData", 5 2; -v0x28ccba0_0 .var "weWantData", 5 2; -v0x28ccc80_0 .net "writeAckIn", 5 2, L_0x28fae90; 1 drivers -v0x28ccd60_0 .var "writeAckOut", 5 2; -v0x28cce40_0 .var "writeTarget", 2 0; -v0x28ccf20_0 .var/s "writeValue", 10 0; -L_0x28f92a0 .part o0x2b505a76bd88, 0, 11; -L_0x28f95a0 .part o0x2b505a76c1a8, 0, 11; -L_0x28f9670 .part L_0x2900a30, 0, 11; -L_0x28f9740 .part o0x2b505a76bcc8, 0, 11; -L_0x28f9870 .part o0x2b505a76bd88, 11, 1; -L_0x28f9990 .part o0x2b505a76c1a8, 11, 1; -L_0x28f9a80 .part L_0x2900a30, 11, 1; -L_0x28f9bb0 .concat8 [ 1 1 1 1], L_0x28f9870, L_0x28f9990, L_0x28f9a80, L_0x28f9d70; -L_0x28f9d70 .part o0x2b505a76bcc8, 11, 1; -L_0x28f9eb0 .reduce/or L_0x28f9bb0; -L_0x28f9fa0 .part o0x2b505a76bd88, 12, 1; -L_0x28fa040 .part o0x2b505a76c1a8, 12, 1; -L_0x28fa150 .part L_0x2900a30, 12, 1; -L_0x28fa1f0 .concat8 [ 1 1 1 1], L_0x28f9fa0, L_0x28fa040, L_0x28fa150, L_0x28fa330; -L_0x28fa330 .part o0x2b505a76bcc8, 12, 1; -L_0x28fa420 .reduce/or L_0x28fa1f0; -L_0x28fa5a0 .part o0x2b505a76bd88, 13, 1; -L_0x28fa6d0 .part o0x2b505a76c1a8, 13, 1; -L_0x28fa8a0 .part L_0x2900a30, 13, 1; -L_0x28fa940 .concat8 [ 1 1 1 1], L_0x28fa5a0, L_0x28fa6d0, L_0x28fa8a0, L_0x28fa800; -L_0x28fa800 .part o0x2b505a76bcc8, 13, 1; -L_0x28fabc0 .reduce/or L_0x28fa940; -L_0x28faa30 .part o0x2b505a76bd88, 14, 1; -L_0x28fad20 .part o0x2b505a76c1a8, 14, 1; -L_0x28fac60 .part L_0x2900a30, 14, 1; -L_0x28fae90 .concat8 [ 1 1 1 1], L_0x28faa30, L_0x28fad20, L_0x28fac60, L_0x28fadc0; -L_0x28fadc0 .part o0x2b505a76bcc8, 14, 1; -L_0x28fb180 .reduce/or L_0x28fae90; -L_0x28fb050 .part v0x28cc370_0, 0, 1; -L_0x28fb360 .part v0x28cc370_0, 1, 1; -L_0x28fb270 .part v0x28cc370_0, 2, 1; -L_0x28fb550 .part v0x28cc370_0, 3, 1; -L_0x28fb450 .part v0x28ccd60_0, 0, 1; -L_0x28fb790 .part v0x28ccd60_0, 1, 1; -L_0x28fb680 .part v0x28ccd60_0, 2, 1; -L_0x28fb950 .part v0x28ccd60_0, 3, 1; -L_0x28fb830 .part v0x28ccba0_0, 0, 1; -L_0x28fbbb0 .part v0x28ccba0_0, 1, 1; -L_0x28fba80 .part v0x28ccba0_0, 2, 1; -L_0x28fbd90 .part v0x28ccba0_0, 3, 1; -L_0x28fbc50 .part v0x28ccae0_0, 0, 1; -L_0x28fbf80 .part v0x28ccae0_0, 1, 1; -L_0x28fbe30 .part v0x28ccae0_0, 2, 1; -L_0x28fbed0 .part v0x28ccae0_0, 3, 1; -L_0x28fc020 .array/port v0x28cb860, L_0x28fc380; -L_0x28fc380 .concat [ 4 2 0 0], v0x28c8a70_0, L_0x2b505a79b210; -LS_0x28fc290_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_2, L_0x28fbe30, L_0x28fba80, L_0x28fb680; -LS_0x28fc290_0_4 .concat8 [ 1 0 0 0], L_0x28fb270; -L_0x28fc290 .concat8 [ 14 1 0 0], LS_0x28fc290_0_0, LS_0x28fc290_0_4; -LS_0x28fc750_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_3, L_0x28fbed0, L_0x28fbd90, L_0x28fb950; -LS_0x28fc750_0_4 .concat8 [ 1 0 0 0], L_0x28fb550; -L_0x28fc750 .concat8 [ 14 1 0 0], LS_0x28fc750_0_0, LS_0x28fc750_0_4; -LS_0x28fc4e0_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_0, L_0x28fbc50, L_0x28fb830, L_0x28fb450; -LS_0x28fc4e0_0_4 .concat8 [ 1 0 0 0], L_0x28fb050; -L_0x28fc4e0 .concat8 [ 14 1 0 0], LS_0x28fc4e0_0_0, LS_0x28fc4e0_0_4; -LS_0x28fcd00_0_0 .concat8 [ 11 1 1 1], v0x28cbca0_1, L_0x28fbf80, L_0x28fbbb0, L_0x28fb790; -LS_0x28fcd00_0_4 .concat8 [ 1 0 0 0], L_0x28fb360; -L_0x28fcd00 .concat8 [ 14 1 0 0], LS_0x28fcd00_0_0, LS_0x28fcd00_0_4; -L_0x28fc9f0 .part L_0x28fa0e0, 14, 4; -L_0x28fd110 .part L_0x28fa0e0, 11, 3; -L_0x28fcf20 .part L_0x28fa0e0, 8, 3; -L_0x28fd360 .part L_0x28fa0e0, 10, 4; -L_0x28fd1b0 .part L_0x28fa0e0, 0, 11; -S_0x28cd1a0 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x2836a60; +P_0x1269f50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1269f90 .param/str "memFile" 0 3 60, "anyRead/down.dat"; +L_0x129b100 .functor BUFZ 11, v0x126a290_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x129b300 .functor BUFZ 11, v0x126a290_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x129c1b0 .functor BUFZ 18, L_0x129e120, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x126a290_0 .var/s "ACC", 10 0; +v0x126a390_0 .var/s "BAK", 10 0; +v0x126a470_0 .net "DST", 2 0, L_0x129f2a0; 1 drivers +v0x126a530_0 .net/s "IMM", 10 0, L_0x129f340; 1 drivers +v0x126a610_0 .net "INST", 3 0, L_0x129eb80; 1 drivers +v0x126a740_0 .net "LABEL", 3 0, L_0x129f4f0; 1 drivers +v0x126a820_0 .var "PC", 3 0; +v0x126a900_0 .var "PCNEXT", 3 0; +v0x126a9e0_0 .net "SRC", 2 0, L_0x129f0b0; 1 drivers +v0x126ab50_0 .net *"_s103", 0 0, L_0x129d460; 1 drivers +v0x126ac30_0 .net *"_s107", 0 0, L_0x129d370; 1 drivers +v0x126ad10_0 .net *"_s111", 0 0, L_0x129d650; 1 drivers +v0x126adf0_0 .net *"_s115", 0 0, L_0x129d550; 1 drivers +v0x126aed0_0 .net *"_s119", 0 0, L_0x129d890; 1 drivers +v0x126afb0_0 .net *"_s123", 0 0, L_0x129d780; 1 drivers +v0x126b090_0 .net *"_s127", 0 0, L_0x129da50; 1 drivers +v0x126b170_0 .net *"_s131", 0 0, L_0x129d930; 1 drivers +v0x126b320_0 .net *"_s135", 0 0, L_0x129dcb0; 1 drivers +v0x126b3c0_0 .net *"_s139", 0 0, L_0x129db80; 1 drivers +v0x126b4a0_0 .net *"_s143", 0 0, L_0x129de90; 1 drivers +v0x126b580_0 .net *"_s147", 0 0, L_0x129dd50; 1 drivers +v0x126b660_0 .net *"_s151", 0 0, L_0x129e080; 1 drivers +v0x126b740_0 .net *"_s155", 0 0, L_0x129df30; 1 drivers +v0x126b820_0 .net *"_s159", 0 0, L_0x129dfd0; 1 drivers +v0x126b900_0 .net *"_s160", 17 0, L_0x129e120; 1 drivers +v0x126b9e0_0 .net *"_s162", 5 0, L_0x129e480; 1 drivers +L_0x2b8e31c88210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x126bac0_0 .net *"_s165", 1 0, L_0x2b8e31c88210; 1 drivers +v0x126da50_2 .array/port v0x126da50, 2; +v0x126bba0_0 .net *"_s173", 10 0, v0x126da50_2; 1 drivers +v0x126da50_3 .array/port v0x126da50, 3; +v0x126bc80_0 .net *"_s179", 10 0, v0x126da50_3; 1 drivers +v0x126da50_0 .array/port v0x126da50, 0; +v0x126bd60_0 .net *"_s185", 10 0, v0x126da50_0; 1 drivers +v0x126da50_1 .array/port v0x126da50, 1; +v0x126be40_0 .net *"_s191", 10 0, v0x126da50_1; 1 drivers +v0x126bf20_0 .net *"_s23", 0 0, L_0x129b940; 1 drivers +v0x126c000_0 .net *"_s27", 0 0, L_0x129ba60; 1 drivers +v0x126b250_0 .net *"_s31", 0 0, L_0x129bb50; 1 drivers +v0x126c2d0_0 .net *"_s36", 0 0, L_0x129be40; 1 drivers +v0x126c3b0_0 .net *"_s42", 0 0, L_0x129c070; 1 drivers +v0x126c490_0 .net *"_s46", 0 0, L_0x129c110; 1 drivers +v0x126c570_0 .net *"_s50", 0 0, L_0x129c220; 1 drivers +v0x126c650_0 .net *"_s55", 0 0, L_0x129c430; 1 drivers +v0x126c730_0 .net *"_s61", 0 0, L_0x129c6a0; 1 drivers +v0x126c810_0 .net *"_s65", 0 0, L_0x129c7d0; 1 drivers +v0x126c8f0_0 .net *"_s69", 0 0, L_0x129c9a0; 1 drivers +v0x126c9d0_0 .net *"_s74", 0 0, L_0x129c900; 1 drivers +v0x126cab0_0 .net *"_s80", 0 0, L_0x129cb30; 1 drivers +v0x126cb90_0 .net *"_s84", 0 0, L_0x129ce20; 1 drivers +v0x126cc70_0 .net *"_s88", 0 0, L_0x129cd60; 1 drivers +v0x126cd50_0 .net *"_s93", 0 0, L_0x129cec0; 1 drivers +v0x126ce30_0 .net *"_s99", 0 0, L_0x129d150; 1 drivers +v0x126cf10_0 .net/s "accOut", 10 0, L_0x129b100; 1 drivers +v0x126cff0_0 .net "anyHasData", 0 0, L_0x129bf80; 1 drivers +v0x126d0b0_0 .net "anyReadAck", 0 0, L_0x129ccc0; 1 drivers +v0x126d170_0 .net "anyWantData", 0 0, L_0x129c520; 1 drivers +v0x126d230_0 .net "anyWriteAck", 0 0, L_0x129d280; 1 drivers +v0x126d2f0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers +o0x2b8e31c58cc8 .functor BUFZ 15, C4; HiZ drive +v0x126d390_0 .net "down", 14 0, o0x2b8e31c58cc8; 0 drivers +v0x126d450_0 .net "downOut", 14 0, L_0x129e8a0; 1 drivers +v0x126d530_0 .net "instruction", 17 0, L_0x129c1b0; 1 drivers +v0x126d610 .array "instructions", 15 0, 17 0; +v0x126d6d0_0 .var "last", 2 0; +o0x2b8e31c58d88 .functor BUFZ 15, C4; HiZ drive +v0x126d7b0_0 .net "left", 14 0, o0x2b8e31c58d88; 0 drivers +v0x126d890_0 .net "leftOut", 14 0, L_0x129e5e0; 1 drivers +v0x126d970_0 .var "mode", 2 0; +v0x126da50 .array/s "outVals", 2 5, 10 0; +v0x126db90_0 .var "phase", 2 0; +v0x126dc70_0 .net "portsHaveData", 5 2, L_0x129bc80; 1 drivers +v0x126c0a0_0 .net "portsWantData", 5 2, L_0x129c2c0; 1 drivers +v0x126c180_0 .net "readAckIn", 5 2, L_0x129ca40; 1 drivers +v0x126e120_0 .var "readAckOut", 5 2; +v0x126e1c0_0 .var "readTarget", 2 0; +v0x126e260_0 .var/s "readValue", 10 0; +L_0x2b8e31c881c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x126e300 .array "regVals", 0 7; +v0x126e300_0 .net/s v0x126e300 0, 10 0, L_0x2b8e31c881c8; 1 drivers +v0x126e300_1 .net/s v0x126e300 1, 10 0, L_0x129b300; 1 drivers +v0x126e300_2 .net/s v0x126e300 2, 10 0, L_0x129b370; 1 drivers +v0x126e300_3 .net/s v0x126e300 3, 10 0, L_0x129b670; 1 drivers +v0x126e300_4 .net/s v0x126e300 4, 10 0, L_0x129b740; 1 drivers +v0x126e300_5 .net/s v0x126e300 5, 10 0, L_0x129b810; 1 drivers +o0x2b8e31c59148 .functor BUFZ 11, C4; HiZ drive +v0x126e300_6 .net/s v0x126e300 6, 10 0, o0x2b8e31c59148; 0 drivers +o0x2b8e31c59178 .functor BUFZ 11, C4; HiZ drive +v0x126e300_7 .net/s v0x126e300 7, 10 0, o0x2b8e31c59178; 0 drivers +o0x2b8e31c591a8 .functor BUFZ 15, C4; HiZ drive +v0x126e510_0 .net "right", 14 0, o0x2b8e31c591a8; 0 drivers +v0x126e5f0_0 .net "rightOut", 14 0, L_0x129ee90; 1 drivers +v0x126e6d0_0 .net "up", 14 0, L_0x12a2b90; alias, 1 drivers +v0x126e7c0_0 .net "upOut", 14 0, L_0x129e3b0; alias, 1 drivers +v0x126e890_0 .var "weHaveData", 5 2; +v0x126e950_0 .var "weWantData", 5 2; +v0x126ea30_0 .net "writeAckIn", 5 2, L_0x129cf90; 1 drivers +v0x126eb10_0 .var "writeAckOut", 5 2; +v0x126ebf0_0 .var "writeTarget", 2 0; +v0x126ecd0_0 .var/s "writeValue", 10 0; +L_0x129b370 .part o0x2b8e31c58d88, 0, 11; +L_0x129b670 .part o0x2b8e31c591a8, 0, 11; +L_0x129b740 .part L_0x12a2b90, 0, 11; +L_0x129b810 .part o0x2b8e31c58cc8, 0, 11; +L_0x129b940 .part o0x2b8e31c58d88, 11, 1; +L_0x129ba60 .part o0x2b8e31c591a8, 11, 1; +L_0x129bb50 .part L_0x12a2b90, 11, 1; +L_0x129bc80 .concat8 [ 1 1 1 1], L_0x129b940, L_0x129ba60, L_0x129bb50, L_0x129be40; +L_0x129be40 .part o0x2b8e31c58cc8, 11, 1; +L_0x129bf80 .reduce/or L_0x129bc80; +L_0x129c070 .part o0x2b8e31c58d88, 12, 1; +L_0x129c110 .part o0x2b8e31c591a8, 12, 1; +L_0x129c220 .part L_0x12a2b90, 12, 1; +L_0x129c2c0 .concat8 [ 1 1 1 1], L_0x129c070, L_0x129c110, L_0x129c220, L_0x129c430; +L_0x129c430 .part o0x2b8e31c58cc8, 12, 1; +L_0x129c520 .reduce/or L_0x129c2c0; +L_0x129c6a0 .part o0x2b8e31c58d88, 13, 1; +L_0x129c7d0 .part o0x2b8e31c591a8, 13, 1; +L_0x129c9a0 .part L_0x12a2b90, 13, 1; +L_0x129ca40 .concat8 [ 1 1 1 1], L_0x129c6a0, L_0x129c7d0, L_0x129c9a0, L_0x129c900; +L_0x129c900 .part o0x2b8e31c58cc8, 13, 1; +L_0x129ccc0 .reduce/or L_0x129ca40; +L_0x129cb30 .part o0x2b8e31c58d88, 14, 1; +L_0x129ce20 .part o0x2b8e31c591a8, 14, 1; +L_0x129cd60 .part L_0x12a2b90, 14, 1; +L_0x129cf90 .concat8 [ 1 1 1 1], L_0x129cb30, L_0x129ce20, L_0x129cd60, L_0x129cec0; +L_0x129cec0 .part o0x2b8e31c58cc8, 14, 1; +L_0x129d280 .reduce/or L_0x129cf90; +L_0x129d150 .part v0x126e120_0, 0, 1; +L_0x129d460 .part v0x126e120_0, 1, 1; +L_0x129d370 .part v0x126e120_0, 2, 1; +L_0x129d650 .part v0x126e120_0, 3, 1; +L_0x129d550 .part v0x126eb10_0, 0, 1; +L_0x129d890 .part v0x126eb10_0, 1, 1; +L_0x129d780 .part v0x126eb10_0, 2, 1; +L_0x129da50 .part v0x126eb10_0, 3, 1; +L_0x129d930 .part v0x126e950_0, 0, 1; +L_0x129dcb0 .part v0x126e950_0, 1, 1; +L_0x129db80 .part v0x126e950_0, 2, 1; +L_0x129de90 .part v0x126e950_0, 3, 1; +L_0x129dd50 .part v0x126e890_0, 0, 1; +L_0x129e080 .part v0x126e890_0, 1, 1; +L_0x129df30 .part v0x126e890_0, 2, 1; +L_0x129dfd0 .part v0x126e890_0, 3, 1; +L_0x129e120 .array/port v0x126d610, L_0x129e480; +L_0x129e480 .concat [ 4 2 0 0], v0x126a820_0, L_0x2b8e31c88210; +LS_0x129e3b0_0_0 .concat8 [ 11 1 1 1], v0x126da50_2, L_0x129df30, L_0x129db80, L_0x129d780; +LS_0x129e3b0_0_4 .concat8 [ 1 0 0 0], L_0x129d370; +L_0x129e3b0 .concat8 [ 14 1 0 0], LS_0x129e3b0_0_0, LS_0x129e3b0_0_4; +LS_0x129e8a0_0_0 .concat8 [ 11 1 1 1], v0x126da50_3, L_0x129dfd0, L_0x129de90, L_0x129da50; +LS_0x129e8a0_0_4 .concat8 [ 1 0 0 0], L_0x129d650; +L_0x129e8a0 .concat8 [ 14 1 0 0], LS_0x129e8a0_0_0, LS_0x129e8a0_0_4; +LS_0x129e5e0_0_0 .concat8 [ 11 1 1 1], v0x126da50_0, L_0x129dd50, L_0x129d930, L_0x129d550; +LS_0x129e5e0_0_4 .concat8 [ 1 0 0 0], L_0x129d150; +L_0x129e5e0 .concat8 [ 14 1 0 0], LS_0x129e5e0_0_0, LS_0x129e5e0_0_4; +LS_0x129ee90_0_0 .concat8 [ 11 1 1 1], v0x126da50_1, L_0x129e080, L_0x129dcb0, L_0x129d890; +LS_0x129ee90_0_4 .concat8 [ 1 0 0 0], L_0x129d460; +L_0x129ee90 .concat8 [ 14 1 0 0], LS_0x129ee90_0_0, LS_0x129ee90_0_4; +L_0x129eb80 .part L_0x129c1b0, 14, 4; +L_0x129f2a0 .part L_0x129c1b0, 11, 3; +L_0x129f0b0 .part L_0x129c1b0, 8, 3; +L_0x129f4f0 .part L_0x129c1b0, 10, 4; +L_0x129f340 .part L_0x129c1b0, 0, 11; +S_0x126ef50 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x11b0b30; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -390,174 +392,175 @@ S_0x28cd1a0 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x2836a60; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x28cd3a0 .param/str "memFile" 0 3 60, "anyRead/left.dat"; -L_0x28dd290 .functor BUFZ 11, v0x28cd620_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28ed330 .functor BUFZ 11, v0x28cd620_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28edfc0 .functor BUFZ 18, L_0x28effb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x28cd620_0 .var/s "ACC", 10 0; -v0x28cd720_0 .var/s "BAK", 10 0; -v0x28cd800_0 .net "DST", 2 0, L_0x28f10f0; 1 drivers -v0x28cd8c0_0 .net/s "IMM", 10 0, L_0x28f1190; 1 drivers -v0x28cd9a0_0 .net "INST", 3 0, L_0x28f09d0; 1 drivers -v0x28cdad0_0 .net "LABEL", 3 0, L_0x28f1340; 1 drivers -v0x28cdbb0_0 .var "PC", 3 0; -v0x28cdc90_0 .var "PCNEXT", 3 0; -v0x28cdd70_0 .net "SRC", 2 0, L_0x28f0f00; 1 drivers -v0x28cdee0_0 .net *"_s103", 0 0, L_0x28ef2f0; 1 drivers -v0x28cdfc0_0 .net *"_s107", 0 0, L_0x28ef200; 1 drivers -v0x28ce0a0_0 .net *"_s111", 0 0, L_0x28ef4e0; 1 drivers -v0x28ce180_0 .net *"_s115", 0 0, L_0x28ef3e0; 1 drivers -v0x28ce260_0 .net *"_s119", 0 0, L_0x28ef720; 1 drivers -v0x28ce340_0 .net *"_s123", 0 0, L_0x28ef610; 1 drivers -v0x28ce420_0 .net *"_s127", 0 0, L_0x28ef8e0; 1 drivers -v0x28ce500_0 .net *"_s131", 0 0, L_0x28ef7c0; 1 drivers -v0x28ce6b0_0 .net *"_s135", 0 0, L_0x28efb40; 1 drivers -v0x28ce750_0 .net *"_s139", 0 0, L_0x28efa10; 1 drivers -v0x28ce830_0 .net *"_s143", 0 0, L_0x28efd20; 1 drivers -v0x28ce910_0 .net *"_s147", 0 0, L_0x28efbe0; 1 drivers -v0x28ce9f0_0 .net *"_s151", 0 0, L_0x28eff10; 1 drivers -v0x28cead0_0 .net *"_s155", 0 0, L_0x28efdc0; 1 drivers -v0x28cebb0_0 .net *"_s159", 0 0, L_0x28efe60; 1 drivers -v0x28cec90_0 .net *"_s160", 17 0, L_0x28effb0; 1 drivers -v0x28ced70_0 .net *"_s162", 5 0, L_0x28f0310; 1 drivers -L_0x2b505a79b060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x28cee50_0 .net *"_s165", 1 0, L_0x2b505a79b060; 1 drivers -v0x28d0e00_2 .array/port v0x28d0e00, 2; -v0x28cef30_0 .net *"_s173", 10 0, v0x28d0e00_2; 1 drivers -v0x28d0e00_3 .array/port v0x28d0e00, 3; -v0x28cf010_0 .net *"_s179", 10 0, v0x28d0e00_3; 1 drivers -v0x28d0e00_0 .array/port v0x28d0e00, 0; -v0x28cf0f0_0 .net *"_s185", 10 0, v0x28d0e00_0; 1 drivers -v0x28d0e00_1 .array/port v0x28d0e00, 1; -v0x28cf1d0_0 .net *"_s191", 10 0, v0x28d0e00_1; 1 drivers -v0x28cf2b0_0 .net *"_s23", 0 0, L_0x28ed6b0; 1 drivers -v0x28cf390_0 .net *"_s27", 0 0, L_0x28ed7d0; 1 drivers -v0x28ce5e0_0 .net *"_s31", 0 0, L_0x28ed940; 1 drivers -v0x28cf660_0 .net *"_s36", 0 0, L_0x28edbf0; 1 drivers -v0x28cf740_0 .net *"_s42", 0 0, L_0x28ede80; 1 drivers -v0x28cf820_0 .net *"_s46", 0 0, L_0x28edf20; 1 drivers -v0x28cf900_0 .net *"_s50", 0 0, L_0x28ee030; 1 drivers -v0x28cf9e0_0 .net *"_s55", 0 0, L_0x28ee2c0; 1 drivers -v0x28cfac0_0 .net *"_s61", 0 0, L_0x28ee530; 1 drivers -v0x28cfba0_0 .net *"_s65", 0 0, L_0x28ee660; 1 drivers -v0x28cfc80_0 .net *"_s69", 0 0, L_0x28ee7a0; 1 drivers -v0x28cfd60_0 .net *"_s74", 0 0, L_0x28ee700; 1 drivers -v0x28cfe40_0 .net *"_s80", 0 0, L_0x28ee990; 1 drivers -v0x28cff20_0 .net *"_s84", 0 0, L_0x28eec80; 1 drivers -v0x28d0000_0 .net *"_s88", 0 0, L_0x28eebc0; 1 drivers -v0x28d00e0_0 .net *"_s93", 0 0, L_0x28eed20; 1 drivers -v0x28d01c0_0 .net *"_s99", 0 0, L_0x28eefe0; 1 drivers -v0x28d02a0_0 .net/s "accOut", 10 0, L_0x28dd290; 1 drivers -v0x28d0380_0 .net "anyHasData", 0 0, L_0x28edd30; 1 drivers -v0x28d0440_0 .net "anyReadAck", 0 0, L_0x28eeb20; 1 drivers -v0x28d0500_0 .net "anyWantData", 0 0, L_0x28ee3b0; 1 drivers -v0x28d05c0_0 .net "anyWriteAck", 0 0, L_0x28ef110; 1 drivers -v0x28d0680_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers -o0x2b505a76cef8 .functor BUFZ 15, C4; HiZ drive -v0x28d0720_0 .net "down", 14 0, o0x2b505a76cef8; 0 drivers -v0x28d0800_0 .net "downOut", 14 0, L_0x28f0730; 1 drivers -v0x28d08e0_0 .net "instruction", 17 0, L_0x28edfc0; 1 drivers -v0x28d09c0 .array "instructions", 15 0, 17 0; -v0x28d0a80_0 .var "last", 2 0; -o0x2b505a76cfb8 .functor BUFZ 15, C4; HiZ drive -v0x28d0b60_0 .net "left", 14 0, o0x2b505a76cfb8; 0 drivers -v0x28d0c40_0 .net "leftOut", 14 0, L_0x28f0470; 1 drivers -v0x28d0d20_0 .var "mode", 2 0; -v0x28d0e00 .array/s "outVals", 2 5, 10 0; -v0x28d0f40_0 .var "phase", 2 0; -v0x28d1020_0 .net "portsHaveData", 5 2, L_0x28ed9e0; 1 drivers -v0x28cd480_0 .net "portsWantData", 5 2, L_0x28ee0d0; 1 drivers -v0x28cf470_0 .net "readAckIn", 5 2, L_0x28ee840; 1 drivers -v0x28cf550_0 .var "readAckOut", 5 2; -v0x28d14d0_0 .var "readTarget", 2 0; -v0x28d15b0_0 .var/s "readValue", 10 0; -L_0x2b505a79b018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x28d1690 .array "regVals", 0 7; -v0x28d1690_0 .net/s v0x28d1690 0, 10 0, L_0x2b505a79b018; 1 drivers -v0x28d1690_1 .net/s v0x28d1690 1, 10 0, L_0x28ed330; 1 drivers -v0x28d1690_2 .net/s v0x28d1690 2, 10 0, L_0x28ed3a0; 1 drivers -v0x28d1690_3 .net/s v0x28d1690 3, 10 0, L_0x28ed440; 1 drivers -v0x28d1690_4 .net/s v0x28d1690 4, 10 0, L_0x28ed4e0; 1 drivers -v0x28d1690_5 .net/s v0x28d1690 5, 10 0, L_0x28ed580; 1 drivers -o0x2b505a76d378 .functor BUFZ 11, C4; HiZ drive -v0x28d1690_6 .net/s v0x28d1690 6, 10 0, o0x2b505a76d378; 0 drivers -o0x2b505a76d3a8 .functor BUFZ 11, C4; HiZ drive -v0x28d1690_7 .net/s v0x28d1690 7, 10 0, o0x2b505a76d3a8; 0 drivers -v0x28d18a0_0 .net "right", 14 0, L_0x2900750; alias, 1 drivers -v0x28d1990_0 .net "rightOut", 14 0, L_0x28f0ce0; alias, 1 drivers -o0x2b505a76d3d8 .functor BUFZ 15, C4; HiZ drive -v0x28d1a60_0 .net "up", 14 0, o0x2b505a76d3d8; 0 drivers -v0x28d1b20_0 .net "upOut", 14 0, L_0x28f0220; 1 drivers -v0x28d1c00_0 .var "weHaveData", 5 2; -v0x28d1ce0_0 .var "weWantData", 5 2; -v0x28d1dc0_0 .net "writeAckIn", 5 2, L_0x28eedf0; 1 drivers -v0x28d1ea0_0 .var "writeAckOut", 5 2; -v0x28d1f80_0 .var "writeTarget", 2 0; -v0x28d2060_0 .var/s "writeValue", 10 0; -L_0x28ed3a0 .part o0x2b505a76cfb8, 0, 11; -L_0x28ed440 .part L_0x2900750, 0, 11; -L_0x28ed4e0 .part o0x2b505a76d3d8, 0, 11; -L_0x28ed580 .part o0x2b505a76cef8, 0, 11; -L_0x28ed6b0 .part o0x2b505a76cfb8, 11, 1; -L_0x28ed7d0 .part L_0x2900750, 11, 1; -L_0x28ed940 .part o0x2b505a76d3d8, 11, 1; -L_0x28ed9e0 .concat8 [ 1 1 1 1], L_0x28ed6b0, L_0x28ed7d0, L_0x28ed940, L_0x28edbf0; -L_0x28edbf0 .part o0x2b505a76cef8, 11, 1; -L_0x28edd30 .reduce/or L_0x28ed9e0; -L_0x28ede80 .part o0x2b505a76cfb8, 12, 1; -L_0x28edf20 .part L_0x2900750, 12, 1; -L_0x28ee030 .part o0x2b505a76d3d8, 12, 1; -L_0x28ee0d0 .concat8 [ 1 1 1 1], L_0x28ede80, L_0x28edf20, L_0x28ee030, L_0x28ee2c0; -L_0x28ee2c0 .part o0x2b505a76cef8, 12, 1; -L_0x28ee3b0 .reduce/or L_0x28ee0d0; -L_0x28ee530 .part o0x2b505a76cfb8, 13, 1; -L_0x28ee660 .part L_0x2900750, 13, 1; -L_0x28ee7a0 .part o0x2b505a76d3d8, 13, 1; -L_0x28ee840 .concat8 [ 1 1 1 1], L_0x28ee530, L_0x28ee660, L_0x28ee7a0, L_0x28ee700; -L_0x28ee700 .part o0x2b505a76cef8, 13, 1; -L_0x28eeb20 .reduce/or L_0x28ee840; -L_0x28ee990 .part o0x2b505a76cfb8, 14, 1; -L_0x28eec80 .part L_0x2900750, 14, 1; -L_0x28eebc0 .part o0x2b505a76d3d8, 14, 1; -L_0x28eedf0 .concat8 [ 1 1 1 1], L_0x28ee990, L_0x28eec80, L_0x28eebc0, L_0x28eed20; -L_0x28eed20 .part o0x2b505a76cef8, 14, 1; -L_0x28ef110 .reduce/or L_0x28eedf0; -L_0x28eefe0 .part v0x28cf550_0, 0, 1; -L_0x28ef2f0 .part v0x28cf550_0, 1, 1; -L_0x28ef200 .part v0x28cf550_0, 2, 1; -L_0x28ef4e0 .part v0x28cf550_0, 3, 1; -L_0x28ef3e0 .part v0x28d1ea0_0, 0, 1; -L_0x28ef720 .part v0x28d1ea0_0, 1, 1; -L_0x28ef610 .part v0x28d1ea0_0, 2, 1; -L_0x28ef8e0 .part v0x28d1ea0_0, 3, 1; -L_0x28ef7c0 .part v0x28d1ce0_0, 0, 1; -L_0x28efb40 .part v0x28d1ce0_0, 1, 1; -L_0x28efa10 .part v0x28d1ce0_0, 2, 1; -L_0x28efd20 .part v0x28d1ce0_0, 3, 1; -L_0x28efbe0 .part v0x28d1c00_0, 0, 1; -L_0x28eff10 .part v0x28d1c00_0, 1, 1; -L_0x28efdc0 .part v0x28d1c00_0, 2, 1; -L_0x28efe60 .part v0x28d1c00_0, 3, 1; -L_0x28effb0 .array/port v0x28d09c0, L_0x28f0310; -L_0x28f0310 .concat [ 4 2 0 0], v0x28cdbb0_0, L_0x2b505a79b060; -LS_0x28f0220_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_2, L_0x28efdc0, L_0x28efa10, L_0x28ef610; -LS_0x28f0220_0_4 .concat8 [ 1 0 0 0], L_0x28ef200; -L_0x28f0220 .concat8 [ 14 1 0 0], LS_0x28f0220_0_0, LS_0x28f0220_0_4; -LS_0x28f0730_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_3, L_0x28efe60, L_0x28efd20, L_0x28ef8e0; -LS_0x28f0730_0_4 .concat8 [ 1 0 0 0], L_0x28ef4e0; -L_0x28f0730 .concat8 [ 14 1 0 0], LS_0x28f0730_0_0, LS_0x28f0730_0_4; -LS_0x28f0470_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_0, L_0x28efbe0, L_0x28ef7c0, L_0x28ef3e0; -LS_0x28f0470_0_4 .concat8 [ 1 0 0 0], L_0x28eefe0; -L_0x28f0470 .concat8 [ 14 1 0 0], LS_0x28f0470_0_0, LS_0x28f0470_0_4; -LS_0x28f0ce0_0_0 .concat8 [ 11 1 1 1], v0x28d0e00_1, L_0x28eff10, L_0x28efb40, L_0x28ef720; -LS_0x28f0ce0_0_4 .concat8 [ 1 0 0 0], L_0x28ef2f0; -L_0x28f0ce0 .concat8 [ 14 1 0 0], LS_0x28f0ce0_0_0, LS_0x28f0ce0_0_4; -L_0x28f09d0 .part L_0x28edfc0, 14, 4; -L_0x28f10f0 .part L_0x28edfc0, 11, 3; -L_0x28f0f00 .part L_0x28edfc0, 8, 3; -L_0x28f1340 .part L_0x28edfc0, 10, 4; -L_0x28f1190 .part L_0x28edfc0, 0, 11; -S_0x28d22e0 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x2836a60; +P_0x126f150 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x126f190 .param/str "memFile" 0 3 60, "anyRead/left.dat"; +L_0x127f2a0 .functor BUFZ 11, v0x126f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x128f340 .functor BUFZ 11, v0x126f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x128ffd0 .functor BUFZ 18, L_0x1291f90, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x126f490_0 .var/s "ACC", 10 0; +v0x126f590_0 .var/s "BAK", 10 0; +v0x126f670_0 .net "DST", 2 0, L_0x1291c60; 1 drivers +v0x126f730_0 .net/s "IMM", 10 0, L_0x1292ee0; 1 drivers +v0x126f810_0 .net "INST", 3 0, L_0x1273640; 1 drivers +v0x126f940_0 .net "LABEL", 3 0, L_0x1293090; 1 drivers +v0x126fa20_0 .var "PC", 3 0; +v0x126fb00_0 .var "PCNEXT", 3 0; +v0x126fbe0_0 .net "SRC", 2 0, L_0x12928f0; 1 drivers +v0x126fd50_0 .net *"_s103", 0 0, L_0x12912d0; 1 drivers +v0x126fe30_0 .net *"_s107", 0 0, L_0x12911e0; 1 drivers +v0x126ff10_0 .net *"_s111", 0 0, L_0x12914c0; 1 drivers +v0x126fff0_0 .net *"_s115", 0 0, L_0x12913c0; 1 drivers +v0x12700d0_0 .net *"_s119", 0 0, L_0x1291700; 1 drivers +v0x12701b0_0 .net *"_s123", 0 0, L_0x12915f0; 1 drivers +v0x1270290_0 .net *"_s127", 0 0, L_0x12918c0; 1 drivers +v0x1270370_0 .net *"_s131", 0 0, L_0x12917a0; 1 drivers +v0x1270520_0 .net *"_s135", 0 0, L_0x1291b20; 1 drivers +v0x12705c0_0 .net *"_s139", 0 0, L_0x12919f0; 1 drivers +v0x12706a0_0 .net *"_s143", 0 0, L_0x1291d00; 1 drivers +v0x1270780_0 .net *"_s147", 0 0, L_0x1291bc0; 1 drivers +v0x1270860_0 .net *"_s151", 0 0, L_0x1291ef0; 1 drivers +v0x1270940_0 .net *"_s155", 0 0, L_0x1291da0; 1 drivers +v0x1270a20_0 .net *"_s159", 0 0, L_0x1291e40; 1 drivers +v0x1270b00_0 .net *"_s160", 17 0, L_0x1291f90; 1 drivers +v0x1270be0_0 .net *"_s162", 5 0, L_0x12922f0; 1 drivers +L_0x2b8e31c88060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1270cc0_0 .net *"_s165", 1 0, L_0x2b8e31c88060; 1 drivers +v0x1272ba0_2 .array/port v0x1272ba0, 2; +v0x1270da0_0 .net *"_s173", 10 0, v0x1272ba0_2; 1 drivers +v0x1272ba0_3 .array/port v0x1272ba0, 3; +v0x1270e80_0 .net *"_s179", 10 0, v0x1272ba0_3; 1 drivers +v0x1272ba0_0 .array/port v0x1272ba0, 0; +v0x1270f60_0 .net *"_s185", 10 0, v0x1272ba0_0; 1 drivers +v0x1272ba0_1 .array/port v0x1272ba0, 1; +v0x1271040_0 .net *"_s191", 10 0, v0x1272ba0_1; 1 drivers +v0x1271120_0 .net *"_s23", 0 0, L_0x128f6c0; 1 drivers +v0x1271200_0 .net *"_s27", 0 0, L_0x128f7e0; 1 drivers +v0x1270450_0 .net *"_s31", 0 0, L_0x128f950; 1 drivers +v0x12714d0_0 .net *"_s36", 0 0, L_0x128fc00; 1 drivers +v0x12715b0_0 .net *"_s42", 0 0, L_0x128fe90; 1 drivers +v0x1271690_0 .net *"_s46", 0 0, L_0x128ff30; 1 drivers +v0x1271770_0 .net *"_s50", 0 0, L_0x1290040; 1 drivers +v0x1271850_0 .net *"_s55", 0 0, L_0x12902d0; 1 drivers +v0x1271930_0 .net *"_s61", 0 0, L_0x1290540; 1 drivers +v0x1271a10_0 .net *"_s65", 0 0, L_0x1290670; 1 drivers +v0x1271af0_0 .net *"_s69", 0 0, L_0x12907b0; 1 drivers +v0x1271bd0_0 .net *"_s74", 0 0, L_0x1290710; 1 drivers +v0x1271cb0_0 .net *"_s80", 0 0, L_0x12909a0; 1 drivers +v0x1271d90_0 .net *"_s84", 0 0, L_0x1290c90; 1 drivers +v0x1271e70_0 .net *"_s88", 0 0, L_0x1290bd0; 1 drivers +v0x1271f50_0 .net *"_s93", 0 0, L_0x1290d30; 1 drivers +v0x126f2f0_0 .net *"_s99", 0 0, L_0x1290fc0; 1 drivers +v0x1271ff0_0 .net/s "accOut", 10 0, L_0x127f2a0; 1 drivers +v0x12720d0_0 .net "anyHasData", 0 0, L_0x128fd40; 1 drivers +v0x1272190_0 .net "anyReadAck", 0 0, L_0x1290b30; 1 drivers +v0x1272250_0 .net "anyWantData", 0 0, L_0x12903c0; 1 drivers +v0x1272310_0 .net "anyWriteAck", 0 0, L_0x12910f0; 1 drivers +v0x12723d0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers +o0x2b8e31c59ef8 .functor BUFZ 15, C4; HiZ drive +v0x12724c0_0 .net "down", 14 0, o0x2b8e31c59ef8; 0 drivers +v0x12725a0_0 .net "downOut", 14 0, L_0x1292710; 1 drivers +v0x1272680_0 .net "instruction", 17 0, L_0x128ffd0; 1 drivers +v0x1272760 .array "instructions", 15 0, 17 0; +v0x1272820_0 .var "last", 2 0; +o0x2b8e31c59fb8 .functor BUFZ 15, C4; HiZ drive +v0x1272900_0 .net "left", 14 0, o0x2b8e31c59fb8; 0 drivers +v0x12729e0_0 .net "leftOut", 14 0, L_0x1292450; 1 drivers +v0x1272ac0_0 .var "mode", 2 0; +v0x1272ba0 .array/s "outVals", 2 5, 10 0; +v0x1272ce0_0 .var "phase", 2 0; +v0x1272dc0_0 .net "portsHaveData", 5 2, L_0x128f9f0; 1 drivers +v0x12712e0_0 .net "portsWantData", 5 2, L_0x12900e0; 1 drivers +v0x12713c0_0 .net "readAckIn", 5 2, L_0x1290850; 1 drivers +v0x1273270_0 .var "readAckOut", 5 2; +v0x1273350_0 .var "readTarget", 2 0; +v0x1273430_0 .var/s "readValue", 10 0; +L_0x2b8e31c88018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1273510 .array "regVals", 0 7; +v0x1273510_0 .net/s v0x1273510 0, 10 0, L_0x2b8e31c88018; 1 drivers +v0x1273510_1 .net/s v0x1273510 1, 10 0, L_0x128f340; 1 drivers +v0x1273510_2 .net/s v0x1273510 2, 10 0, L_0x128f3b0; 1 drivers +v0x1273510_3 .net/s v0x1273510 3, 10 0, L_0x128f450; 1 drivers +v0x1273510_4 .net/s v0x1273510 4, 10 0, L_0x128f4f0; 1 drivers +v0x1273510_5 .net/s v0x1273510 5, 10 0, L_0x128f590; 1 drivers +o0x2b8e31c5a378 .functor BUFZ 11, C4; HiZ drive +v0x1273510_6 .net/s v0x1273510 6, 10 0, o0x2b8e31c5a378; 0 drivers +o0x2b8e31c5a3a8 .functor BUFZ 11, C4; HiZ drive +v0x1273510_7 .net/s v0x1273510 7, 10 0, o0x2b8e31c5a3a8; 0 drivers +v0x1273720_0 .net "right", 14 0, L_0x12a28b0; alias, 1 drivers +v0x1273810_0 .net "rightOut", 14 0, L_0x1292cc0; alias, 1 drivers +o0x2b8e31c5a3d8 .functor BUFZ 15, C4; HiZ drive +v0x12738e0_0 .net "up", 14 0, o0x2b8e31c5a3d8; 0 drivers +v0x12739a0_0 .net "upOut", 14 0, L_0x1292200; 1 drivers +v0x1273a80_0 .var "weHaveData", 5 2; +v0x1273b60_0 .var "weWantData", 5 2; +v0x1273c40_0 .net "writeAckIn", 5 2, L_0x1290e00; 1 drivers +v0x1273d20_0 .var "writeAckOut", 5 2; +v0x1273e00_0 .var "writeTarget", 2 0; +v0x1273ee0_0 .var/s "writeValue", 10 0; +L_0x128f3b0 .part o0x2b8e31c59fb8, 0, 11; +L_0x128f450 .part L_0x12a28b0, 0, 11; +L_0x128f4f0 .part o0x2b8e31c5a3d8, 0, 11; +L_0x128f590 .part o0x2b8e31c59ef8, 0, 11; +L_0x128f6c0 .part o0x2b8e31c59fb8, 11, 1; +L_0x128f7e0 .part L_0x12a28b0, 11, 1; +L_0x128f950 .part o0x2b8e31c5a3d8, 11, 1; +L_0x128f9f0 .concat8 [ 1 1 1 1], L_0x128f6c0, L_0x128f7e0, L_0x128f950, L_0x128fc00; +L_0x128fc00 .part o0x2b8e31c59ef8, 11, 1; +L_0x128fd40 .reduce/or L_0x128f9f0; +L_0x128fe90 .part o0x2b8e31c59fb8, 12, 1; +L_0x128ff30 .part L_0x12a28b0, 12, 1; +L_0x1290040 .part o0x2b8e31c5a3d8, 12, 1; +L_0x12900e0 .concat8 [ 1 1 1 1], L_0x128fe90, L_0x128ff30, L_0x1290040, L_0x12902d0; +L_0x12902d0 .part o0x2b8e31c59ef8, 12, 1; +L_0x12903c0 .reduce/or L_0x12900e0; +L_0x1290540 .part o0x2b8e31c59fb8, 13, 1; +L_0x1290670 .part L_0x12a28b0, 13, 1; +L_0x12907b0 .part o0x2b8e31c5a3d8, 13, 1; +L_0x1290850 .concat8 [ 1 1 1 1], L_0x1290540, L_0x1290670, L_0x12907b0, L_0x1290710; +L_0x1290710 .part o0x2b8e31c59ef8, 13, 1; +L_0x1290b30 .reduce/or L_0x1290850; +L_0x12909a0 .part o0x2b8e31c59fb8, 14, 1; +L_0x1290c90 .part L_0x12a28b0, 14, 1; +L_0x1290bd0 .part o0x2b8e31c5a3d8, 14, 1; +L_0x1290e00 .concat8 [ 1 1 1 1], L_0x12909a0, L_0x1290c90, L_0x1290bd0, L_0x1290d30; +L_0x1290d30 .part o0x2b8e31c59ef8, 14, 1; +L_0x12910f0 .reduce/or L_0x1290e00; +L_0x1290fc0 .part v0x1273270_0, 0, 1; +L_0x12912d0 .part v0x1273270_0, 1, 1; +L_0x12911e0 .part v0x1273270_0, 2, 1; +L_0x12914c0 .part v0x1273270_0, 3, 1; +L_0x12913c0 .part v0x1273d20_0, 0, 1; +L_0x1291700 .part v0x1273d20_0, 1, 1; +L_0x12915f0 .part v0x1273d20_0, 2, 1; +L_0x12918c0 .part v0x1273d20_0, 3, 1; +L_0x12917a0 .part v0x1273b60_0, 0, 1; +L_0x1291b20 .part v0x1273b60_0, 1, 1; +L_0x12919f0 .part v0x1273b60_0, 2, 1; +L_0x1291d00 .part v0x1273b60_0, 3, 1; +L_0x1291bc0 .part v0x1273a80_0, 0, 1; +L_0x1291ef0 .part v0x1273a80_0, 1, 1; +L_0x1291da0 .part v0x1273a80_0, 2, 1; +L_0x1291e40 .part v0x1273a80_0, 3, 1; +L_0x1291f90 .array/port v0x1272760, L_0x12922f0; +L_0x12922f0 .concat [ 4 2 0 0], v0x126fa20_0, L_0x2b8e31c88060; +LS_0x1292200_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_2, L_0x1291da0, L_0x12919f0, L_0x12915f0; +LS_0x1292200_0_4 .concat8 [ 1 0 0 0], L_0x12911e0; +L_0x1292200 .concat8 [ 14 1 0 0], LS_0x1292200_0_0, LS_0x1292200_0_4; +LS_0x1292710_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_3, L_0x1291e40, L_0x1291d00, L_0x12918c0; +LS_0x1292710_0_4 .concat8 [ 1 0 0 0], L_0x12914c0; +L_0x1292710 .concat8 [ 14 1 0 0], LS_0x1292710_0_0, LS_0x1292710_0_4; +LS_0x1292450_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_0, L_0x1291bc0, L_0x12917a0, L_0x12913c0; +LS_0x1292450_0_4 .concat8 [ 1 0 0 0], L_0x1290fc0; +L_0x1292450 .concat8 [ 14 1 0 0], LS_0x1292450_0_0, LS_0x1292450_0_4; +LS_0x1292cc0_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_1, L_0x1291ef0, L_0x1291b20, L_0x1291700; +LS_0x1292cc0_0_4 .concat8 [ 1 0 0 0], L_0x12912d0; +L_0x1292cc0 .concat8 [ 14 1 0 0], LS_0x1292cc0_0_0, LS_0x1292cc0_0_4; +L_0x1273640 .part L_0x128ffd0, 14, 4; +L_0x1291c60 .part L_0x128ffd0, 11, 3; +L_0x12928f0 .part L_0x128ffd0, 8, 3; +L_0x1293090 .part L_0x128ffd0, 10, 4; +L_0x1292ee0 .part L_0x128ffd0, 0, 11; +S_0x1274160 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x11b0b30; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -569,174 +572,175 @@ S_0x28d22e0 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x2836a60; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x28d24b0 .param/str "memFile" 0 3 60, "anyRead/right.dat"; -L_0x28f1030 .functor BUFZ 11, v0x28d27a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28f1230 .functor BUFZ 11, v0x28d27a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28f3fb0 .functor BUFZ 18, L_0x28f3dc0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x28d27a0_0 .var/s "ACC", 10 0; -v0x28d28a0_0 .var/s "BAK", 10 0; -v0x28d2980_0 .net "DST", 2 0, L_0x28f4f00; 1 drivers -v0x28d2a40_0 .net/s "IMM", 10 0, L_0x28f4fa0; 1 drivers -v0x28d2b20_0 .net "INST", 3 0, L_0x28f47e0; 1 drivers -v0x28d2c00_0 .net "LABEL", 3 0, L_0x28f5150; 1 drivers -v0x28d2ce0_0 .var "PC", 3 0; -v0x28d2dc0_0 .var "PCNEXT", 3 0; -v0x28d2ea0_0 .net "SRC", 2 0, L_0x28f4d10; 1 drivers -v0x28d3010_0 .net *"_s103", 0 0, L_0x28f3150; 1 drivers -v0x28d30f0_0 .net *"_s107", 0 0, L_0x28f2fc0; 1 drivers -v0x28d31d0_0 .net *"_s111", 0 0, L_0x28f32f0; 1 drivers -v0x28d32b0_0 .net *"_s115", 0 0, L_0x28f31f0; 1 drivers -v0x28d3390_0 .net *"_s119", 0 0, L_0x28f3530; 1 drivers -v0x28d3470_0 .net *"_s123", 0 0, L_0x28f3420; 1 drivers -v0x28d3550_0 .net *"_s127", 0 0, L_0x28f36f0; 1 drivers -v0x28d3630_0 .net *"_s131", 0 0, L_0x28f35d0; 1 drivers -v0x28d37e0_0 .net *"_s135", 0 0, L_0x28f3950; 1 drivers -v0x28d3880_0 .net *"_s139", 0 0, L_0x28f3820; 1 drivers -v0x28d3960_0 .net *"_s143", 0 0, L_0x28f3b30; 1 drivers -v0x28d3a40_0 .net *"_s147", 0 0, L_0x28f39f0; 1 drivers -v0x28d3b20_0 .net *"_s151", 0 0, L_0x28f3d20; 1 drivers -v0x28d3c00_0 .net *"_s155", 0 0, L_0x28f3bd0; 1 drivers -v0x28d3ce0_0 .net *"_s159", 0 0, L_0x28f3c70; 1 drivers -v0x28d3dc0_0 .net *"_s160", 17 0, L_0x28f3dc0; 1 drivers -v0x28d3ea0_0 .net *"_s162", 5 0, L_0x28f4120; 1 drivers -L_0x2b505a79b0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x28d3f80_0 .net *"_s165", 1 0, L_0x2b505a79b0f0; 1 drivers -v0x28d5eb0_2 .array/port v0x28d5eb0, 2; -v0x28d4060_0 .net *"_s173", 10 0, v0x28d5eb0_2; 1 drivers -v0x28d5eb0_3 .array/port v0x28d5eb0, 3; -v0x28d4140_0 .net *"_s179", 10 0, v0x28d5eb0_3; 1 drivers -v0x28d5eb0_0 .array/port v0x28d5eb0, 0; -v0x28d4220_0 .net *"_s185", 10 0, v0x28d5eb0_0; 1 drivers -v0x28d5eb0_1 .array/port v0x28d5eb0, 1; -v0x28d4300_0 .net *"_s191", 10 0, v0x28d5eb0_1; 1 drivers -v0x28d43e0_0 .net *"_s23", 0 0, L_0x28f18a0; 1 drivers -v0x28d44c0_0 .net *"_s27", 0 0, L_0x28f1a00; 1 drivers -v0x28d3710_0 .net *"_s31", 0 0, L_0x28f1ad0; 1 drivers -v0x28d4790_0 .net *"_s36", 0 0, L_0x28f1da0; 1 drivers -v0x28d4870_0 .net *"_s42", 0 0, L_0x28f1fd0; 1 drivers -v0x28d4950_0 .net *"_s46", 0 0, L_0x28f2070; 1 drivers -v0x28d4a30_0 .net *"_s50", 0 0, L_0x28f2180; 1 drivers -v0x28d4b10_0 .net *"_s55", 0 0, L_0x28f2390; 1 drivers -v0x28d4bf0_0 .net *"_s61", 0 0, L_0x28f2600; 1 drivers -v0x28d4cd0_0 .net *"_s65", 0 0, L_0x28f26a0; 1 drivers -v0x28d4db0_0 .net *"_s69", 0 0, L_0x28f2870; 1 drivers -v0x28d4e90_0 .net *"_s74", 0 0, L_0x28f27d0; 1 drivers -v0x28d4f70_0 .net *"_s80", 0 0, L_0x28f2a60; 1 drivers -v0x28d5050_0 .net *"_s84", 0 0, L_0x28f2d50; 1 drivers -v0x28d5130_0 .net *"_s88", 0 0, L_0x28f2c90; 1 drivers -v0x28d5210_0 .net *"_s93", 0 0, L_0x28d17c0; 1 drivers -v0x28d52f0_0 .net *"_s99", 0 0, L_0x28f30b0; 1 drivers -v0x28d53d0_0 .net/s "accOut", 10 0, L_0x28f1030; 1 drivers -v0x28d54b0_0 .net "anyHasData", 0 0, L_0x28f1ee0; 1 drivers -v0x28d5570_0 .net "anyReadAck", 0 0, L_0x28f2bf0; 1 drivers -v0x28d5630_0 .net "anyWantData", 0 0, L_0x28f2480; 1 drivers -v0x28d56f0_0 .net "anyWriteAck", 0 0, L_0x28d68a0; 1 drivers -v0x28d57b0_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers -o0x2b505a76e128 .functor BUFZ 15, C4; HiZ drive -v0x28d5850_0 .net "down", 14 0, o0x2b505a76e128; 0 drivers -v0x28d5930_0 .net "downOut", 14 0, L_0x28f4540; 1 drivers -v0x28d5a10_0 .net "instruction", 17 0, L_0x28f3fb0; 1 drivers -v0x28d5af0 .array "instructions", 15 0, 17 0; -v0x28d5bb0_0 .var "last", 2 0; -v0x28d5c90_0 .net "left", 14 0, L_0x2901120; alias, 1 drivers -v0x28d5d50_0 .net "leftOut", 14 0, L_0x28f4280; alias, 1 drivers -v0x28d5df0_0 .var "mode", 2 0; -v0x28d5eb0 .array/s "outVals", 2 5, 10 0; -v0x28d6020_0 .var "phase", 2 0; -v0x28d6100_0 .net "portsHaveData", 5 2, L_0x28f1bc0; 1 drivers -v0x28d4560_0 .net "portsWantData", 5 2, L_0x28f2220; 1 drivers -v0x28d4640_0 .net "readAckIn", 5 2, L_0x28f2910; 1 drivers -v0x28d65b0_0 .var "readAckOut", 5 2; -v0x28d6650_0 .var "readTarget", 2 0; -v0x28d66f0_0 .var/s "readValue", 10 0; -L_0x2b505a79b0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x28d6790 .array "regVals", 0 7; -v0x28d6790_0 .net/s v0x28d6790 0, 10 0, L_0x2b505a79b0a8; 1 drivers -v0x28d6790_1 .net/s v0x28d6790 1, 10 0, L_0x28f1230; 1 drivers -v0x28d6790_2 .net/s v0x28d6790 2, 10 0, L_0x28f12a0; 1 drivers -v0x28d6790_3 .net/s v0x28d6790 3, 10 0, L_0x28f15a0; 1 drivers -v0x28d6790_4 .net/s v0x28d6790 4, 10 0, L_0x28f1670; 1 drivers -v0x28d6790_5 .net/s v0x28d6790 5, 10 0, L_0x28f1770; 1 drivers -o0x2b505a76e548 .functor BUFZ 11, C4; HiZ drive -v0x28d6790_6 .net/s v0x28d6790 6, 10 0, o0x2b505a76e548; 0 drivers -o0x2b505a76e578 .functor BUFZ 11, C4; HiZ drive -v0x28d6790_7 .net/s v0x28d6790 7, 10 0, o0x2b505a76e578; 0 drivers -o0x2b505a76e5a8 .functor BUFZ 15, C4; HiZ drive -v0x28d69a0_0 .net "right", 14 0, o0x2b505a76e5a8; 0 drivers -v0x28d6a80_0 .net "rightOut", 14 0, L_0x28f4af0; 1 drivers -o0x2b505a76e608 .functor BUFZ 15, C4; HiZ drive -v0x28d6b60_0 .net "up", 14 0, o0x2b505a76e608; 0 drivers -v0x28d6c40_0 .net "upOut", 14 0, L_0x28f4070; 1 drivers -v0x28d6d20_0 .var "weHaveData", 5 2; -v0x28d6e00_0 .var "weWantData", 5 2; -v0x28d6ee0_0 .net "writeAckIn", 5 2, L_0x28f2ec0; 1 drivers -v0x28d6fc0_0 .var "writeAckOut", 5 2; -v0x28d70a0_0 .var "writeTarget", 2 0; -v0x28d7180_0 .var/s "writeValue", 10 0; -L_0x28f12a0 .part L_0x2901120, 0, 11; -L_0x28f15a0 .part o0x2b505a76e5a8, 0, 11; -L_0x28f1670 .part o0x2b505a76e608, 0, 11; -L_0x28f1770 .part o0x2b505a76e128, 0, 11; -L_0x28f18a0 .part L_0x2901120, 11, 1; -L_0x28f1a00 .part o0x2b505a76e5a8, 11, 1; -L_0x28f1ad0 .part o0x2b505a76e608, 11, 1; -L_0x28f1bc0 .concat8 [ 1 1 1 1], L_0x28f18a0, L_0x28f1a00, L_0x28f1ad0, L_0x28f1da0; -L_0x28f1da0 .part o0x2b505a76e128, 11, 1; -L_0x28f1ee0 .reduce/or L_0x28f1bc0; -L_0x28f1fd0 .part L_0x2901120, 12, 1; -L_0x28f2070 .part o0x2b505a76e5a8, 12, 1; -L_0x28f2180 .part o0x2b505a76e608, 12, 1; -L_0x28f2220 .concat8 [ 1 1 1 1], L_0x28f1fd0, L_0x28f2070, L_0x28f2180, L_0x28f2390; -L_0x28f2390 .part o0x2b505a76e128, 12, 1; -L_0x28f2480 .reduce/or L_0x28f2220; -L_0x28f2600 .part L_0x2901120, 13, 1; -L_0x28f26a0 .part o0x2b505a76e5a8, 13, 1; -L_0x28f2870 .part o0x2b505a76e608, 13, 1; -L_0x28f2910 .concat8 [ 1 1 1 1], L_0x28f2600, L_0x28f26a0, L_0x28f2870, L_0x28f27d0; -L_0x28f27d0 .part o0x2b505a76e128, 13, 1; -L_0x28f2bf0 .reduce/or L_0x28f2910; -L_0x28f2a60 .part L_0x2901120, 14, 1; -L_0x28f2d50 .part o0x2b505a76e5a8, 14, 1; -L_0x28f2c90 .part o0x2b505a76e608, 14, 1; -L_0x28f2ec0 .concat8 [ 1 1 1 1], L_0x28f2a60, L_0x28f2d50, L_0x28f2c90, L_0x28d17c0; -L_0x28d17c0 .part o0x2b505a76e128, 14, 1; -L_0x28d68a0 .reduce/or L_0x28f2ec0; -L_0x28f30b0 .part v0x28d65b0_0, 0, 1; -L_0x28f3150 .part v0x28d65b0_0, 1, 1; -L_0x28f2fc0 .part v0x28d65b0_0, 2, 1; -L_0x28f32f0 .part v0x28d65b0_0, 3, 1; -L_0x28f31f0 .part v0x28d6fc0_0, 0, 1; -L_0x28f3530 .part v0x28d6fc0_0, 1, 1; -L_0x28f3420 .part v0x28d6fc0_0, 2, 1; -L_0x28f36f0 .part v0x28d6fc0_0, 3, 1; -L_0x28f35d0 .part v0x28d6e00_0, 0, 1; -L_0x28f3950 .part v0x28d6e00_0, 1, 1; -L_0x28f3820 .part v0x28d6e00_0, 2, 1; -L_0x28f3b30 .part v0x28d6e00_0, 3, 1; -L_0x28f39f0 .part v0x28d6d20_0, 0, 1; -L_0x28f3d20 .part v0x28d6d20_0, 1, 1; -L_0x28f3bd0 .part v0x28d6d20_0, 2, 1; -L_0x28f3c70 .part v0x28d6d20_0, 3, 1; -L_0x28f3dc0 .array/port v0x28d5af0, L_0x28f4120; -L_0x28f4120 .concat [ 4 2 0 0], v0x28d2ce0_0, L_0x2b505a79b0f0; -LS_0x28f4070_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_2, L_0x28f3bd0, L_0x28f3820, L_0x28f3420; -LS_0x28f4070_0_4 .concat8 [ 1 0 0 0], L_0x28f2fc0; -L_0x28f4070 .concat8 [ 14 1 0 0], LS_0x28f4070_0_0, LS_0x28f4070_0_4; -LS_0x28f4540_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_3, L_0x28f3c70, L_0x28f3b30, L_0x28f36f0; -LS_0x28f4540_0_4 .concat8 [ 1 0 0 0], L_0x28f32f0; -L_0x28f4540 .concat8 [ 14 1 0 0], LS_0x28f4540_0_0, LS_0x28f4540_0_4; -LS_0x28f4280_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_0, L_0x28f39f0, L_0x28f35d0, L_0x28f31f0; -LS_0x28f4280_0_4 .concat8 [ 1 0 0 0], L_0x28f30b0; -L_0x28f4280 .concat8 [ 14 1 0 0], LS_0x28f4280_0_0, LS_0x28f4280_0_4; -LS_0x28f4af0_0_0 .concat8 [ 11 1 1 1], v0x28d5eb0_1, L_0x28f3d20, L_0x28f3950, L_0x28f3530; -LS_0x28f4af0_0_4 .concat8 [ 1 0 0 0], L_0x28f3150; -L_0x28f4af0 .concat8 [ 14 1 0 0], LS_0x28f4af0_0_0, LS_0x28f4af0_0_4; -L_0x28f47e0 .part L_0x28f3fb0, 14, 4; -L_0x28f4f00 .part L_0x28f3fb0, 11, 3; -L_0x28f4d10 .part L_0x28f3fb0, 8, 3; -L_0x28f5150 .part L_0x28f3fb0, 10, 4; -L_0x28f4fa0 .part L_0x28f3fb0, 0, 11; -S_0x28d7400 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x2836a60; +P_0x1274330 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1274370 .param/str "memFile" 0 3 60, "anyRead/right.dat"; +L_0x1292f80 .functor BUFZ 11, v0x12746e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x12932f0 .functor BUFZ 11, v0x12746e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1293fb0 .functor BUFZ 18, L_0x1295fa0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x12746e0_0 .var/s "ACC", 10 0; +v0x12747e0_0 .var/s "BAK", 10 0; +v0x12748c0_0 .net "DST", 2 0, L_0x12970e0; 1 drivers +v0x1274980_0 .net/s "IMM", 10 0, L_0x1297180; 1 drivers +v0x1274a60_0 .net "INST", 3 0, L_0x12969c0; 1 drivers +v0x1274b40_0 .net "LABEL", 3 0, L_0x1297330; 1 drivers +v0x1274c20_0 .var "PC", 3 0; +v0x1274d00_0 .var "PCNEXT", 3 0; +v0x1274de0_0 .net "SRC", 2 0, L_0x1296ef0; 1 drivers +v0x1274f50_0 .net *"_s103", 0 0, L_0x12952e0; 1 drivers +v0x1275030_0 .net *"_s107", 0 0, L_0x12951f0; 1 drivers +v0x1275110_0 .net *"_s111", 0 0, L_0x12954d0; 1 drivers +v0x12751f0_0 .net *"_s115", 0 0, L_0x12953d0; 1 drivers +v0x12752d0_0 .net *"_s119", 0 0, L_0x1295710; 1 drivers +v0x12753b0_0 .net *"_s123", 0 0, L_0x1295600; 1 drivers +v0x1275490_0 .net *"_s127", 0 0, L_0x12958d0; 1 drivers +v0x1275570_0 .net *"_s131", 0 0, L_0x12957b0; 1 drivers +v0x1275720_0 .net *"_s135", 0 0, L_0x1295b30; 1 drivers +v0x12757c0_0 .net *"_s139", 0 0, L_0x1295a00; 1 drivers +v0x12758a0_0 .net *"_s143", 0 0, L_0x1295d10; 1 drivers +v0x1275980_0 .net *"_s147", 0 0, L_0x1295bd0; 1 drivers +v0x1275a60_0 .net *"_s151", 0 0, L_0x1295f00; 1 drivers +v0x1275b40_0 .net *"_s155", 0 0, L_0x1295db0; 1 drivers +v0x1275c20_0 .net *"_s159", 0 0, L_0x1295e50; 1 drivers +v0x1275d00_0 .net *"_s160", 17 0, L_0x1295fa0; 1 drivers +v0x1275de0_0 .net *"_s162", 5 0, L_0x1296300; 1 drivers +L_0x2b8e31c880f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1275ec0_0 .net *"_s165", 1 0, L_0x2b8e31c880f0; 1 drivers +v0x1277df0_2 .array/port v0x1277df0, 2; +v0x1275fa0_0 .net *"_s173", 10 0, v0x1277df0_2; 1 drivers +v0x1277df0_3 .array/port v0x1277df0, 3; +v0x1276080_0 .net *"_s179", 10 0, v0x1277df0_3; 1 drivers +v0x1277df0_0 .array/port v0x1277df0, 0; +v0x1276160_0 .net *"_s185", 10 0, v0x1277df0_0; 1 drivers +v0x1277df0_1 .array/port v0x1277df0, 1; +v0x1276240_0 .net *"_s191", 10 0, v0x1277df0_1; 1 drivers +v0x1276320_0 .net *"_s23", 0 0, L_0x12936a0; 1 drivers +v0x1276400_0 .net *"_s27", 0 0, L_0x1293800; 1 drivers +v0x1275650_0 .net *"_s31", 0 0, L_0x1293910; 1 drivers +v0x12766d0_0 .net *"_s36", 0 0, L_0x1293be0; 1 drivers +v0x12767b0_0 .net *"_s42", 0 0, L_0x1293e70; 1 drivers +v0x1276890_0 .net *"_s46", 0 0, L_0x1293f10; 1 drivers +v0x1276970_0 .net *"_s50", 0 0, L_0x1294020; 1 drivers +v0x1276a50_0 .net *"_s55", 0 0, L_0x12942b0; 1 drivers +v0x1276b30_0 .net *"_s61", 0 0, L_0x1294520; 1 drivers +v0x1276c10_0 .net *"_s65", 0 0, L_0x12945c0; 1 drivers +v0x1276cf0_0 .net *"_s69", 0 0, L_0x1294790; 1 drivers +v0x1276dd0_0 .net *"_s74", 0 0, L_0x12946f0; 1 drivers +v0x1276eb0_0 .net *"_s80", 0 0, L_0x1294980; 1 drivers +v0x1276f90_0 .net *"_s84", 0 0, L_0x1294c70; 1 drivers +v0x1277070_0 .net *"_s88", 0 0, L_0x1294bb0; 1 drivers +v0x1277150_0 .net *"_s93", 0 0, L_0x1294d10; 1 drivers +v0x1277230_0 .net *"_s99", 0 0, L_0x1294fd0; 1 drivers +v0x1277310_0 .net/s "accOut", 10 0, L_0x1292f80; 1 drivers +v0x12773f0_0 .net "anyHasData", 0 0, L_0x1293d20; 1 drivers +v0x12774b0_0 .net "anyReadAck", 0 0, L_0x1294b10; 1 drivers +v0x1277570_0 .net "anyWantData", 0 0, L_0x12943a0; 1 drivers +v0x1277630_0 .net "anyWriteAck", 0 0, L_0x1295100; 1 drivers +v0x12776f0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers +o0x2b8e31c5b128 .functor BUFZ 15, C4; HiZ drive +v0x1277790_0 .net "down", 14 0, o0x2b8e31c5b128; 0 drivers +v0x1277870_0 .net "downOut", 14 0, L_0x1296720; 1 drivers +v0x1277950_0 .net "instruction", 17 0, L_0x1293fb0; 1 drivers +v0x1277a30 .array "instructions", 15 0, 17 0; +v0x1277af0_0 .var "last", 2 0; +v0x1277bd0_0 .net "left", 14 0, L_0x12a3280; alias, 1 drivers +v0x1277c90_0 .net "leftOut", 14 0, L_0x1296460; alias, 1 drivers +v0x1277d30_0 .var "mode", 2 0; +v0x1277df0 .array/s "outVals", 2 5, 10 0; +v0x1277f60_0 .var "phase", 2 0; +v0x1278040_0 .net "portsHaveData", 5 2, L_0x1293a00; 1 drivers +v0x12764a0_0 .net "portsWantData", 5 2, L_0x12940c0; 1 drivers +v0x1276580_0 .net "readAckIn", 5 2, L_0x1294830; 1 drivers +v0x12784f0_0 .var "readAckOut", 5 2; +v0x1278590_0 .var "readTarget", 2 0; +v0x1278630_0 .var/s "readValue", 10 0; +L_0x2b8e31c880a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x12786d0 .array "regVals", 0 7; +v0x12786d0_0 .net/s v0x12786d0 0, 10 0, L_0x2b8e31c880a8; 1 drivers +v0x12786d0_1 .net/s v0x12786d0 1, 10 0, L_0x12932f0; 1 drivers +v0x12786d0_2 .net/s v0x12786d0 2, 10 0, L_0x1293360; 1 drivers +v0x12786d0_3 .net/s v0x12786d0 3, 10 0, L_0x1293400; 1 drivers +v0x12786d0_4 .net/s v0x12786d0 4, 10 0, L_0x12934a0; 1 drivers +v0x12786d0_5 .net/s v0x12786d0 5, 10 0, L_0x1293570; 1 drivers +o0x2b8e31c5b548 .functor BUFZ 11, C4; HiZ drive +v0x12786d0_6 .net/s v0x12786d0 6, 10 0, o0x2b8e31c5b548; 0 drivers +o0x2b8e31c5b578 .functor BUFZ 11, C4; HiZ drive +v0x12786d0_7 .net/s v0x12786d0 7, 10 0, o0x2b8e31c5b578; 0 drivers +o0x2b8e31c5b5a8 .functor BUFZ 15, C4; HiZ drive +v0x12788e0_0 .net "right", 14 0, o0x2b8e31c5b5a8; 0 drivers +v0x12789c0_0 .net "rightOut", 14 0, L_0x1296cd0; 1 drivers +o0x2b8e31c5b608 .functor BUFZ 15, C4; HiZ drive +v0x1278aa0_0 .net "up", 14 0, o0x2b8e31c5b608; 0 drivers +v0x1278b80_0 .net "upOut", 14 0, L_0x1296210; 1 drivers +v0x1278c60_0 .var "weHaveData", 5 2; +v0x1278d40_0 .var "weWantData", 5 2; +v0x1278e20_0 .net "writeAckIn", 5 2, L_0x1294de0; 1 drivers +v0x1278f00_0 .var "writeAckOut", 5 2; +v0x1278fe0_0 .var "writeTarget", 2 0; +v0x12790c0_0 .var/s "writeValue", 10 0; +L_0x1293360 .part L_0x12a3280, 0, 11; +L_0x1293400 .part o0x2b8e31c5b5a8, 0, 11; +L_0x12934a0 .part o0x2b8e31c5b608, 0, 11; +L_0x1293570 .part o0x2b8e31c5b128, 0, 11; +L_0x12936a0 .part L_0x12a3280, 11, 1; +L_0x1293800 .part o0x2b8e31c5b5a8, 11, 1; +L_0x1293910 .part o0x2b8e31c5b608, 11, 1; +L_0x1293a00 .concat8 [ 1 1 1 1], L_0x12936a0, L_0x1293800, L_0x1293910, L_0x1293be0; +L_0x1293be0 .part o0x2b8e31c5b128, 11, 1; +L_0x1293d20 .reduce/or L_0x1293a00; +L_0x1293e70 .part L_0x12a3280, 12, 1; +L_0x1293f10 .part o0x2b8e31c5b5a8, 12, 1; +L_0x1294020 .part o0x2b8e31c5b608, 12, 1; +L_0x12940c0 .concat8 [ 1 1 1 1], L_0x1293e70, L_0x1293f10, L_0x1294020, L_0x12942b0; +L_0x12942b0 .part o0x2b8e31c5b128, 12, 1; +L_0x12943a0 .reduce/or L_0x12940c0; +L_0x1294520 .part L_0x12a3280, 13, 1; +L_0x12945c0 .part o0x2b8e31c5b5a8, 13, 1; +L_0x1294790 .part o0x2b8e31c5b608, 13, 1; +L_0x1294830 .concat8 [ 1 1 1 1], L_0x1294520, L_0x12945c0, L_0x1294790, L_0x12946f0; +L_0x12946f0 .part o0x2b8e31c5b128, 13, 1; +L_0x1294b10 .reduce/or L_0x1294830; +L_0x1294980 .part L_0x12a3280, 14, 1; +L_0x1294c70 .part o0x2b8e31c5b5a8, 14, 1; +L_0x1294bb0 .part o0x2b8e31c5b608, 14, 1; +L_0x1294de0 .concat8 [ 1 1 1 1], L_0x1294980, L_0x1294c70, L_0x1294bb0, L_0x1294d10; +L_0x1294d10 .part o0x2b8e31c5b128, 14, 1; +L_0x1295100 .reduce/or L_0x1294de0; +L_0x1294fd0 .part v0x12784f0_0, 0, 1; +L_0x12952e0 .part v0x12784f0_0, 1, 1; +L_0x12951f0 .part v0x12784f0_0, 2, 1; +L_0x12954d0 .part v0x12784f0_0, 3, 1; +L_0x12953d0 .part v0x1278f00_0, 0, 1; +L_0x1295710 .part v0x1278f00_0, 1, 1; +L_0x1295600 .part v0x1278f00_0, 2, 1; +L_0x12958d0 .part v0x1278f00_0, 3, 1; +L_0x12957b0 .part v0x1278d40_0, 0, 1; +L_0x1295b30 .part v0x1278d40_0, 1, 1; +L_0x1295a00 .part v0x1278d40_0, 2, 1; +L_0x1295d10 .part v0x1278d40_0, 3, 1; +L_0x1295bd0 .part v0x1278c60_0, 0, 1; +L_0x1295f00 .part v0x1278c60_0, 1, 1; +L_0x1295db0 .part v0x1278c60_0, 2, 1; +L_0x1295e50 .part v0x1278c60_0, 3, 1; +L_0x1295fa0 .array/port v0x1277a30, L_0x1296300; +L_0x1296300 .concat [ 4 2 0 0], v0x1274c20_0, L_0x2b8e31c880f0; +LS_0x1296210_0_0 .concat8 [ 11 1 1 1], v0x1277df0_2, L_0x1295db0, L_0x1295a00, L_0x1295600; +LS_0x1296210_0_4 .concat8 [ 1 0 0 0], L_0x12951f0; +L_0x1296210 .concat8 [ 14 1 0 0], LS_0x1296210_0_0, LS_0x1296210_0_4; +LS_0x1296720_0_0 .concat8 [ 11 1 1 1], v0x1277df0_3, L_0x1295e50, L_0x1295d10, L_0x12958d0; +LS_0x1296720_0_4 .concat8 [ 1 0 0 0], L_0x12954d0; +L_0x1296720 .concat8 [ 14 1 0 0], LS_0x1296720_0_0, LS_0x1296720_0_4; +LS_0x1296460_0_0 .concat8 [ 11 1 1 1], v0x1277df0_0, L_0x1295bd0, L_0x12957b0, L_0x12953d0; +LS_0x1296460_0_4 .concat8 [ 1 0 0 0], L_0x1294fd0; +L_0x1296460 .concat8 [ 14 1 0 0], LS_0x1296460_0_0, LS_0x1296460_0_4; +LS_0x1296cd0_0_0 .concat8 [ 11 1 1 1], v0x1277df0_1, L_0x1295f00, L_0x1295b30, L_0x1295710; +LS_0x1296cd0_0_4 .concat8 [ 1 0 0 0], L_0x12952e0; +L_0x1296cd0 .concat8 [ 14 1 0 0], LS_0x1296cd0_0_0, LS_0x1296cd0_0_4; +L_0x12969c0 .part L_0x1293fb0, 14, 4; +L_0x12970e0 .part L_0x1293fb0, 11, 3; +L_0x1296ef0 .part L_0x1293fb0, 8, 3; +L_0x1297330 .part L_0x1293fb0, 10, 4; +L_0x1297180 .part L_0x1293fb0, 0, 11; +S_0x1279340 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x11b0b30; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -748,218 +752,219 @@ S_0x28d7400 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x2836a60; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x28d7620 .param/str "memFile" 0 3 60, "anyRead/up.dat"; -L_0x28f4e40 .functor BUFZ 11, v0x28d7850_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28f5040 .functor BUFZ 11, v0x28d7850_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x28f5f90 .functor BUFZ 18, L_0x28f7fb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x28d7850_0 .var/s "ACC", 10 0; -v0x28d7950_0 .var/s "BAK", 10 0; -v0x28d7a30_0 .net "DST", 2 0, L_0x28f90f0; 1 drivers -v0x28d7af0_0 .net/s "IMM", 10 0, L_0x28f9190; 1 drivers -v0x28d7bd0_0 .net "INST", 3 0, L_0x28f89d0; 1 drivers -v0x28d7d00_0 .net "LABEL", 3 0, L_0x28f9340; 1 drivers -v0x28d7de0_0 .var "PC", 3 0; -v0x28d7ec0_0 .var "PCNEXT", 3 0; -v0x28d7fa0_0 .net "SRC", 2 0, L_0x28f8f00; 1 drivers -v0x28d8110_0 .net *"_s103", 0 0, L_0x28f72f0; 1 drivers -v0x28d81f0_0 .net *"_s107", 0 0, L_0x28f7200; 1 drivers -v0x28d82d0_0 .net *"_s111", 0 0, L_0x28f74e0; 1 drivers -v0x28d83b0_0 .net *"_s115", 0 0, L_0x28f73e0; 1 drivers -v0x28d8490_0 .net *"_s119", 0 0, L_0x28f7720; 1 drivers -v0x28d8570_0 .net *"_s123", 0 0, L_0x28f7610; 1 drivers -v0x28d8650_0 .net *"_s127", 0 0, L_0x28f78e0; 1 drivers -v0x28d8730_0 .net *"_s131", 0 0, L_0x28f77c0; 1 drivers -v0x28d88e0_0 .net *"_s135", 0 0, L_0x28f7b40; 1 drivers -v0x28d8980_0 .net *"_s139", 0 0, L_0x28f7a10; 1 drivers -v0x28d8a60_0 .net *"_s143", 0 0, L_0x28f7d20; 1 drivers -v0x28d8b40_0 .net *"_s147", 0 0, L_0x28f7be0; 1 drivers -v0x28d8c20_0 .net *"_s151", 0 0, L_0x28f7f10; 1 drivers -v0x28d8d00_0 .net *"_s155", 0 0, L_0x28f7dc0; 1 drivers -v0x28d8de0_0 .net *"_s159", 0 0, L_0x28f7e60; 1 drivers -v0x28d8ec0_0 .net *"_s160", 17 0, L_0x28f7fb0; 1 drivers -v0x28d8fa0_0 .net *"_s162", 5 0, L_0x28f8310; 1 drivers -L_0x2b505a79b180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x28d9080_0 .net *"_s165", 1 0, L_0x2b505a79b180; 1 drivers -v0x28db040_2 .array/port v0x28db040, 2; -v0x28d9160_0 .net *"_s173", 10 0, v0x28db040_2; 1 drivers -v0x28db040_3 .array/port v0x28db040, 3; -v0x28d9240_0 .net *"_s179", 10 0, v0x28db040_3; 1 drivers -v0x28db040_0 .array/port v0x28db040, 0; -v0x28d9320_0 .net *"_s185", 10 0, v0x28db040_0; 1 drivers -v0x28db040_1 .array/port v0x28db040, 1; -v0x28d9400_0 .net *"_s191", 10 0, v0x28db040_1; 1 drivers -v0x28d94e0_0 .net *"_s23", 0 0, L_0x28f56f0; 1 drivers -v0x28d95c0_0 .net *"_s27", 0 0, L_0x28f5810; 1 drivers -v0x28d8810_0 .net *"_s31", 0 0, L_0x28f5900; 1 drivers -v0x28d9890_0 .net *"_s36", 0 0, L_0x28f5bd0; 1 drivers -v0x28d9970_0 .net *"_s42", 0 0, L_0x28f5e50; 1 drivers -v0x28d9a50_0 .net *"_s46", 0 0, L_0x28f5ef0; 1 drivers -v0x28d9b30_0 .net *"_s50", 0 0, L_0x28f6000; 1 drivers -v0x28d9c10_0 .net *"_s55", 0 0, L_0x28f62c0; 1 drivers -v0x28d9cf0_0 .net *"_s61", 0 0, L_0x28f6530; 1 drivers -v0x28d9dd0_0 .net *"_s65", 0 0, L_0x28f6660; 1 drivers -v0x28d9eb0_0 .net *"_s69", 0 0, L_0x28f6830; 1 drivers -v0x28d9f90_0 .net *"_s74", 0 0, L_0x28f6790; 1 drivers -v0x28da070_0 .net *"_s80", 0 0, L_0x28f69d0; 1 drivers -v0x28da150_0 .net *"_s84", 0 0, L_0x28f6c80; 1 drivers -v0x28da230_0 .net *"_s88", 0 0, L_0x28f6bc0; 1 drivers -v0x28da310_0 .net *"_s93", 0 0, L_0x28f6d20; 1 drivers -v0x28da3f0_0 .net *"_s99", 0 0, L_0x28f6fe0; 1 drivers -v0x28da4d0_0 .net/s "accOut", 10 0, L_0x28f4e40; 1 drivers -v0x28da5b0_0 .net "anyHasData", 0 0, L_0x28f5d50; 1 drivers -v0x28da670_0 .net "anyReadAck", 0 0, L_0x28f6ad0; 1 drivers -v0x28da730_0 .net "anyWantData", 0 0, L_0x28f63b0; 1 drivers -v0x28da7f0_0 .net "anyWriteAck", 0 0, L_0x28f7110; 1 drivers -v0x28da8b0_0 .net "clk", 0 0, v0x28dcfb0_0; alias, 1 drivers -v0x28da9e0_0 .net "down", 14 0, L_0x2900480; alias, 1 drivers -v0x28daaa0_0 .net "downOut", 14 0, L_0x28f8730; alias, 1 drivers -v0x28dab40_0 .net "instruction", 17 0, L_0x28f5f90; 1 drivers -v0x28dac00 .array "instructions", 15 0, 17 0; -v0x28dacc0_0 .var "last", 2 0; -o0x2b505a76f3b8 .functor BUFZ 15, C4; HiZ drive -v0x28dada0_0 .net "left", 14 0, o0x2b505a76f3b8; 0 drivers -v0x28dae80_0 .net "leftOut", 14 0, L_0x28f8470; 1 drivers -v0x28daf60_0 .var "mode", 2 0; -v0x28db040 .array/s "outVals", 2 5, 10 0; -v0x28db1b0_0 .var "phase", 2 0; -v0x28db290_0 .net "portsHaveData", 5 2, L_0x28f59f0; 1 drivers -v0x28d9660_0 .net "portsWantData", 5 2, L_0x28f60a0; 1 drivers -v0x28d9740_0 .net "readAckIn", 5 2, L_0x28f68d0; 1 drivers -v0x28db740_0 .var "readAckOut", 5 2; -v0x28db7e0_0 .var "readTarget", 2 0; -v0x28db880_0 .var/s "readValue", 10 0; -L_0x2b505a79b138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x28db920 .array "regVals", 0 7; -v0x28db920_0 .net/s v0x28db920 0, 10 0, L_0x2b505a79b138; 1 drivers -v0x28db920_1 .net/s v0x28db920 1, 10 0, L_0x28f5040; 1 drivers -v0x28db920_2 .net/s v0x28db920 2, 10 0, L_0x28f53b0; 1 drivers -v0x28db920_3 .net/s v0x28db920 3, 10 0, L_0x28f5450; 1 drivers -v0x28db920_4 .net/s v0x28db920 4, 10 0, L_0x28f54f0; 1 drivers -v0x28db920_5 .net/s v0x28db920 5, 10 0, L_0x28f55f0; 1 drivers -o0x2b505a76f778 .functor BUFZ 11, C4; HiZ drive -v0x28db920_6 .net/s v0x28db920 6, 10 0, o0x2b505a76f778; 0 drivers -o0x2b505a76f7a8 .functor BUFZ 11, C4; HiZ drive -v0x28db920_7 .net/s v0x28db920 7, 10 0, o0x2b505a76f7a8; 0 drivers -o0x2b505a76f7d8 .functor BUFZ 15, C4; HiZ drive -v0x28dbb30_0 .net "right", 14 0, o0x2b505a76f7d8; 0 drivers -v0x28dbc10_0 .net "rightOut", 14 0, L_0x28f8ce0; 1 drivers -o0x2b505a76f838 .functor BUFZ 15, C4; HiZ drive -v0x28dbcf0_0 .net "up", 14 0, o0x2b505a76f838; 0 drivers -v0x28dbdd0_0 .net "upOut", 14 0, L_0x28f8220; 1 drivers -v0x28dbeb0_0 .var "weHaveData", 5 2; -v0x28dbf90_0 .var "weWantData", 5 2; -v0x28dc070_0 .net "writeAckIn", 5 2, L_0x28f6df0; 1 drivers -v0x28dc150_0 .var "writeAckOut", 5 2; -v0x28dc230_0 .var "writeTarget", 2 0; -v0x28dc310_0 .var/s "writeValue", 10 0; -L_0x28f53b0 .part o0x2b505a76f3b8, 0, 11; -L_0x28f5450 .part o0x2b505a76f7d8, 0, 11; -L_0x28f54f0 .part o0x2b505a76f838, 0, 11; -L_0x28f55f0 .part L_0x2900480, 0, 11; -L_0x28f56f0 .part o0x2b505a76f3b8, 11, 1; -L_0x28f5810 .part o0x2b505a76f7d8, 11, 1; -L_0x28f5900 .part o0x2b505a76f838, 11, 1; -L_0x28f59f0 .concat8 [ 1 1 1 1], L_0x28f56f0, L_0x28f5810, L_0x28f5900, L_0x28f5bd0; -L_0x28f5bd0 .part L_0x2900480, 11, 1; -L_0x28f5d50 .reduce/or L_0x28f59f0; -L_0x28f5e50 .part o0x2b505a76f3b8, 12, 1; -L_0x28f5ef0 .part o0x2b505a76f7d8, 12, 1; -L_0x28f6000 .part o0x2b505a76f838, 12, 1; -L_0x28f60a0 .concat8 [ 1 1 1 1], L_0x28f5e50, L_0x28f5ef0, L_0x28f6000, L_0x28f62c0; -L_0x28f62c0 .part L_0x2900480, 12, 1; -L_0x28f63b0 .reduce/or L_0x28f60a0; -L_0x28f6530 .part o0x2b505a76f3b8, 13, 1; -L_0x28f6660 .part o0x2b505a76f7d8, 13, 1; -L_0x28f6830 .part o0x2b505a76f838, 13, 1; -L_0x28f68d0 .concat8 [ 1 1 1 1], L_0x28f6530, L_0x28f6660, L_0x28f6830, L_0x28f6790; -L_0x28f6790 .part L_0x2900480, 13, 1; -L_0x28f6ad0 .reduce/or L_0x28f68d0; -L_0x28f69d0 .part o0x2b505a76f3b8, 14, 1; -L_0x28f6c80 .part o0x2b505a76f7d8, 14, 1; -L_0x28f6bc0 .part o0x2b505a76f838, 14, 1; -L_0x28f6df0 .concat8 [ 1 1 1 1], L_0x28f69d0, L_0x28f6c80, L_0x28f6bc0, L_0x28f6d20; -L_0x28f6d20 .part L_0x2900480, 14, 1; -L_0x28f7110 .reduce/or L_0x28f6df0; -L_0x28f6fe0 .part v0x28db740_0, 0, 1; -L_0x28f72f0 .part v0x28db740_0, 1, 1; -L_0x28f7200 .part v0x28db740_0, 2, 1; -L_0x28f74e0 .part v0x28db740_0, 3, 1; -L_0x28f73e0 .part v0x28dc150_0, 0, 1; -L_0x28f7720 .part v0x28dc150_0, 1, 1; -L_0x28f7610 .part v0x28dc150_0, 2, 1; -L_0x28f78e0 .part v0x28dc150_0, 3, 1; -L_0x28f77c0 .part v0x28dbf90_0, 0, 1; -L_0x28f7b40 .part v0x28dbf90_0, 1, 1; -L_0x28f7a10 .part v0x28dbf90_0, 2, 1; -L_0x28f7d20 .part v0x28dbf90_0, 3, 1; -L_0x28f7be0 .part v0x28dbeb0_0, 0, 1; -L_0x28f7f10 .part v0x28dbeb0_0, 1, 1; -L_0x28f7dc0 .part v0x28dbeb0_0, 2, 1; -L_0x28f7e60 .part v0x28dbeb0_0, 3, 1; -L_0x28f7fb0 .array/port v0x28dac00, L_0x28f8310; -L_0x28f8310 .concat [ 4 2 0 0], v0x28d7de0_0, L_0x2b505a79b180; -LS_0x28f8220_0_0 .concat8 [ 11 1 1 1], v0x28db040_2, L_0x28f7dc0, L_0x28f7a10, L_0x28f7610; -LS_0x28f8220_0_4 .concat8 [ 1 0 0 0], L_0x28f7200; -L_0x28f8220 .concat8 [ 14 1 0 0], LS_0x28f8220_0_0, LS_0x28f8220_0_4; -LS_0x28f8730_0_0 .concat8 [ 11 1 1 1], v0x28db040_3, L_0x28f7e60, L_0x28f7d20, L_0x28f78e0; -LS_0x28f8730_0_4 .concat8 [ 1 0 0 0], L_0x28f74e0; -L_0x28f8730 .concat8 [ 14 1 0 0], LS_0x28f8730_0_0, LS_0x28f8730_0_4; -LS_0x28f8470_0_0 .concat8 [ 11 1 1 1], v0x28db040_0, L_0x28f7be0, L_0x28f77c0, L_0x28f73e0; -LS_0x28f8470_0_4 .concat8 [ 1 0 0 0], L_0x28f6fe0; -L_0x28f8470 .concat8 [ 14 1 0 0], LS_0x28f8470_0_0, LS_0x28f8470_0_4; -LS_0x28f8ce0_0_0 .concat8 [ 11 1 1 1], v0x28db040_1, L_0x28f7f10, L_0x28f7b40, L_0x28f7720; -LS_0x28f8ce0_0_4 .concat8 [ 1 0 0 0], L_0x28f72f0; -L_0x28f8ce0 .concat8 [ 14 1 0 0], LS_0x28f8ce0_0_0, LS_0x28f8ce0_0_4; -L_0x28f89d0 .part L_0x28f5f90, 14, 4; -L_0x28f90f0 .part L_0x28f5f90, 11, 3; -L_0x28f8f00 .part L_0x28f5f90, 8, 3; -L_0x28f9340 .part L_0x28f5f90, 10, 4; -L_0x28f9190 .part L_0x28f5f90, 0, 11; - .scope S_0x28cd1a0; +P_0x1279560 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x12795a0 .param/str "memFile" 0 3 60, "anyRead/up.dat"; +L_0x1297020 .functor BUFZ 11, v0x1279860_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1297220 .functor BUFZ 11, v0x1279860_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x12980e0 .functor BUFZ 18, L_0x129a080, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1279860_0 .var/s "ACC", 10 0; +v0x1279960_0 .var/s "BAK", 10 0; +v0x1279a40_0 .net "DST", 2 0, L_0x129b1c0; 1 drivers +v0x1279b00_0 .net/s "IMM", 10 0, L_0x129b260; 1 drivers +v0x1279be0_0 .net "INST", 3 0, L_0x129aaa0; 1 drivers +v0x1279d10_0 .net "LABEL", 3 0, L_0x129b410; 1 drivers +v0x1279df0_0 .var "PC", 3 0; +v0x1279ed0_0 .var "PCNEXT", 3 0; +v0x1279fb0_0 .net "SRC", 2 0, L_0x129afd0; 1 drivers +v0x127a120_0 .net *"_s103", 0 0, L_0x12993c0; 1 drivers +v0x127a200_0 .net *"_s107", 0 0, L_0x12992d0; 1 drivers +v0x127a2e0_0 .net *"_s111", 0 0, L_0x12995b0; 1 drivers +v0x127a3c0_0 .net *"_s115", 0 0, L_0x12994b0; 1 drivers +v0x127a4a0_0 .net *"_s119", 0 0, L_0x12997f0; 1 drivers +v0x127a580_0 .net *"_s123", 0 0, L_0x12996e0; 1 drivers +v0x127a660_0 .net *"_s127", 0 0, L_0x12999b0; 1 drivers +v0x127a740_0 .net *"_s131", 0 0, L_0x1299890; 1 drivers +v0x127a8f0_0 .net *"_s135", 0 0, L_0x1299c10; 1 drivers +v0x127a990_0 .net *"_s139", 0 0, L_0x1299ae0; 1 drivers +v0x127aa70_0 .net *"_s143", 0 0, L_0x1299df0; 1 drivers +v0x127ab50_0 .net *"_s147", 0 0, L_0x1299cb0; 1 drivers +v0x127ac30_0 .net *"_s151", 0 0, L_0x1299fe0; 1 drivers +v0x127ad10_0 .net *"_s155", 0 0, L_0x1299e90; 1 drivers +v0x127adf0_0 .net *"_s159", 0 0, L_0x1299f30; 1 drivers +v0x127aed0_0 .net *"_s160", 17 0, L_0x129a080; 1 drivers +v0x127afb0_0 .net *"_s162", 5 0, L_0x129a3e0; 1 drivers +L_0x2b8e31c88180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x127b090_0 .net *"_s165", 1 0, L_0x2b8e31c88180; 1 drivers +v0x127d050_2 .array/port v0x127d050, 2; +v0x127b170_0 .net *"_s173", 10 0, v0x127d050_2; 1 drivers +v0x127d050_3 .array/port v0x127d050, 3; +v0x127b250_0 .net *"_s179", 10 0, v0x127d050_3; 1 drivers +v0x127d050_0 .array/port v0x127d050, 0; +v0x127b330_0 .net *"_s185", 10 0, v0x127d050_0; 1 drivers +v0x127d050_1 .array/port v0x127d050, 1; +v0x127b410_0 .net *"_s191", 10 0, v0x127d050_1; 1 drivers +v0x127b4f0_0 .net *"_s23", 0 0, L_0x12978a0; 1 drivers +v0x127b5d0_0 .net *"_s27", 0 0, L_0x12979c0; 1 drivers +v0x127a820_0 .net *"_s31", 0 0, L_0x1297ab0; 1 drivers +v0x127b8a0_0 .net *"_s36", 0 0, L_0x1297d80; 1 drivers +v0x127b980_0 .net *"_s42", 0 0, L_0x1297fa0; 1 drivers +v0x127ba60_0 .net *"_s46", 0 0, L_0x1298040; 1 drivers +v0x127bb40_0 .net *"_s50", 0 0, L_0x1298150; 1 drivers +v0x127bc20_0 .net *"_s55", 0 0, L_0x1298390; 1 drivers +v0x127bd00_0 .net *"_s61", 0 0, L_0x1298600; 1 drivers +v0x127bde0_0 .net *"_s65", 0 0, L_0x1298730; 1 drivers +v0x127bec0_0 .net *"_s69", 0 0, L_0x1298900; 1 drivers +v0x127bfa0_0 .net *"_s74", 0 0, L_0x1298860; 1 drivers +v0x127c080_0 .net *"_s80", 0 0, L_0x1298aa0; 1 drivers +v0x127c160_0 .net *"_s84", 0 0, L_0x1298d50; 1 drivers +v0x127c240_0 .net *"_s88", 0 0, L_0x1298c90; 1 drivers +v0x127c320_0 .net *"_s93", 0 0, L_0x1298df0; 1 drivers +v0x127c400_0 .net *"_s99", 0 0, L_0x12990b0; 1 drivers +v0x127c4e0_0 .net/s "accOut", 10 0, L_0x1297020; 1 drivers +v0x127c5c0_0 .net "anyHasData", 0 0, L_0x1297f00; 1 drivers +v0x127c680_0 .net "anyReadAck", 0 0, L_0x1298ba0; 1 drivers +v0x127c740_0 .net "anyWantData", 0 0, L_0x1298480; 1 drivers +v0x127c800_0 .net "anyWriteAck", 0 0, L_0x12991e0; 1 drivers +v0x127c8c0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers +v0x127c9f0_0 .net "down", 14 0, L_0x12a25e0; alias, 1 drivers +v0x127cab0_0 .net "downOut", 14 0, L_0x129a800; alias, 1 drivers +v0x127cb50_0 .net "instruction", 17 0, L_0x12980e0; 1 drivers +v0x127cc10 .array "instructions", 15 0, 17 0; +v0x127ccd0_0 .var "last", 2 0; +o0x2b8e31c5c3b8 .functor BUFZ 15, C4; HiZ drive +v0x127cdb0_0 .net "left", 14 0, o0x2b8e31c5c3b8; 0 drivers +v0x127ce90_0 .net "leftOut", 14 0, L_0x129a540; 1 drivers +v0x127cf70_0 .var "mode", 2 0; +v0x127d050 .array/s "outVals", 2 5, 10 0; +v0x127d1c0_0 .var "phase", 2 0; +v0x127d2a0_0 .net "portsHaveData", 5 2, L_0x1297ba0; 1 drivers +v0x127b670_0 .net "portsWantData", 5 2, L_0x12981f0; 1 drivers +v0x127b750_0 .net "readAckIn", 5 2, L_0x12989a0; 1 drivers +v0x127d750_0 .var "readAckOut", 5 2; +v0x127d7f0_0 .var "readTarget", 2 0; +v0x127d890_0 .var/s "readValue", 10 0; +L_0x2b8e31c88138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x127d930 .array "regVals", 0 7; +v0x127d930_0 .net/s v0x127d930 0, 10 0, L_0x2b8e31c88138; 1 drivers +v0x127d930_1 .net/s v0x127d930 1, 10 0, L_0x1297220; 1 drivers +v0x127d930_2 .net/s v0x127d930 2, 10 0, L_0x1297590; 1 drivers +v0x127d930_3 .net/s v0x127d930 3, 10 0, L_0x1297630; 1 drivers +v0x127d930_4 .net/s v0x127d930 4, 10 0, L_0x12976d0; 1 drivers +v0x127d930_5 .net/s v0x127d930 5, 10 0, L_0x12977a0; 1 drivers +o0x2b8e31c5c778 .functor BUFZ 11, C4; HiZ drive +v0x127d930_6 .net/s v0x127d930 6, 10 0, o0x2b8e31c5c778; 0 drivers +o0x2b8e31c5c7a8 .functor BUFZ 11, C4; HiZ drive +v0x127d930_7 .net/s v0x127d930 7, 10 0, o0x2b8e31c5c7a8; 0 drivers +o0x2b8e31c5c7d8 .functor BUFZ 15, C4; HiZ drive +v0x127db40_0 .net "right", 14 0, o0x2b8e31c5c7d8; 0 drivers +v0x127dc20_0 .net "rightOut", 14 0, L_0x129adb0; 1 drivers +o0x2b8e31c5c838 .functor BUFZ 15, C4; HiZ drive +v0x127dd00_0 .net "up", 14 0, o0x2b8e31c5c838; 0 drivers +v0x127dde0_0 .net "upOut", 14 0, L_0x129a2f0; 1 drivers +v0x127dec0_0 .var "weHaveData", 5 2; +v0x127dfa0_0 .var "weWantData", 5 2; +v0x127e080_0 .net "writeAckIn", 5 2, L_0x1298ec0; 1 drivers +v0x127e160_0 .var "writeAckOut", 5 2; +v0x127e240_0 .var "writeTarget", 2 0; +v0x127e320_0 .var/s "writeValue", 10 0; +L_0x1297590 .part o0x2b8e31c5c3b8, 0, 11; +L_0x1297630 .part o0x2b8e31c5c7d8, 0, 11; +L_0x12976d0 .part o0x2b8e31c5c838, 0, 11; +L_0x12977a0 .part L_0x12a25e0, 0, 11; +L_0x12978a0 .part o0x2b8e31c5c3b8, 11, 1; +L_0x12979c0 .part o0x2b8e31c5c7d8, 11, 1; +L_0x1297ab0 .part o0x2b8e31c5c838, 11, 1; +L_0x1297ba0 .concat8 [ 1 1 1 1], L_0x12978a0, L_0x12979c0, L_0x1297ab0, L_0x1297d80; +L_0x1297d80 .part L_0x12a25e0, 11, 1; +L_0x1297f00 .reduce/or L_0x1297ba0; +L_0x1297fa0 .part o0x2b8e31c5c3b8, 12, 1; +L_0x1298040 .part o0x2b8e31c5c7d8, 12, 1; +L_0x1298150 .part o0x2b8e31c5c838, 12, 1; +L_0x12981f0 .concat8 [ 1 1 1 1], L_0x1297fa0, L_0x1298040, L_0x1298150, L_0x1298390; +L_0x1298390 .part L_0x12a25e0, 12, 1; +L_0x1298480 .reduce/or L_0x12981f0; +L_0x1298600 .part o0x2b8e31c5c3b8, 13, 1; +L_0x1298730 .part o0x2b8e31c5c7d8, 13, 1; +L_0x1298900 .part o0x2b8e31c5c838, 13, 1; +L_0x12989a0 .concat8 [ 1 1 1 1], L_0x1298600, L_0x1298730, L_0x1298900, L_0x1298860; +L_0x1298860 .part L_0x12a25e0, 13, 1; +L_0x1298ba0 .reduce/or L_0x12989a0; +L_0x1298aa0 .part o0x2b8e31c5c3b8, 14, 1; +L_0x1298d50 .part o0x2b8e31c5c7d8, 14, 1; +L_0x1298c90 .part o0x2b8e31c5c838, 14, 1; +L_0x1298ec0 .concat8 [ 1 1 1 1], L_0x1298aa0, L_0x1298d50, L_0x1298c90, L_0x1298df0; +L_0x1298df0 .part L_0x12a25e0, 14, 1; +L_0x12991e0 .reduce/or L_0x1298ec0; +L_0x12990b0 .part v0x127d750_0, 0, 1; +L_0x12993c0 .part v0x127d750_0, 1, 1; +L_0x12992d0 .part v0x127d750_0, 2, 1; +L_0x12995b0 .part v0x127d750_0, 3, 1; +L_0x12994b0 .part v0x127e160_0, 0, 1; +L_0x12997f0 .part v0x127e160_0, 1, 1; +L_0x12996e0 .part v0x127e160_0, 2, 1; +L_0x12999b0 .part v0x127e160_0, 3, 1; +L_0x1299890 .part v0x127dfa0_0, 0, 1; +L_0x1299c10 .part v0x127dfa0_0, 1, 1; +L_0x1299ae0 .part v0x127dfa0_0, 2, 1; +L_0x1299df0 .part v0x127dfa0_0, 3, 1; +L_0x1299cb0 .part v0x127dec0_0, 0, 1; +L_0x1299fe0 .part v0x127dec0_0, 1, 1; +L_0x1299e90 .part v0x127dec0_0, 2, 1; +L_0x1299f30 .part v0x127dec0_0, 3, 1; +L_0x129a080 .array/port v0x127cc10, L_0x129a3e0; +L_0x129a3e0 .concat [ 4 2 0 0], v0x1279df0_0, L_0x2b8e31c88180; +LS_0x129a2f0_0_0 .concat8 [ 11 1 1 1], v0x127d050_2, L_0x1299e90, L_0x1299ae0, L_0x12996e0; +LS_0x129a2f0_0_4 .concat8 [ 1 0 0 0], L_0x12992d0; +L_0x129a2f0 .concat8 [ 14 1 0 0], LS_0x129a2f0_0_0, LS_0x129a2f0_0_4; +LS_0x129a800_0_0 .concat8 [ 11 1 1 1], v0x127d050_3, L_0x1299f30, L_0x1299df0, L_0x12999b0; +LS_0x129a800_0_4 .concat8 [ 1 0 0 0], L_0x12995b0; +L_0x129a800 .concat8 [ 14 1 0 0], LS_0x129a800_0_0, LS_0x129a800_0_4; +LS_0x129a540_0_0 .concat8 [ 11 1 1 1], v0x127d050_0, L_0x1299cb0, L_0x1299890, L_0x12994b0; +LS_0x129a540_0_4 .concat8 [ 1 0 0 0], L_0x12990b0; +L_0x129a540 .concat8 [ 14 1 0 0], LS_0x129a540_0_0, LS_0x129a540_0_4; +LS_0x129adb0_0_0 .concat8 [ 11 1 1 1], v0x127d050_1, L_0x1299fe0, L_0x1299c10, L_0x12997f0; +LS_0x129adb0_0_4 .concat8 [ 1 0 0 0], L_0x12993c0; +L_0x129adb0 .concat8 [ 14 1 0 0], LS_0x129adb0_0_0, LS_0x129adb0_0_4; +L_0x129aaa0 .part L_0x12980e0, 14, 4; +L_0x129b1c0 .part L_0x12980e0, 11, 3; +L_0x129afd0 .part L_0x12980e0, 8, 3; +L_0x129b410 .part L_0x12980e0, 10, 4; +L_0x129b260 .part L_0x12980e0, 0, 11; + .scope S_0x126ef50; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28d0d20_0, 0, 3; + %store/vec4 v0x1272ac0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28d0f40_0, 0, 3; + %store/vec4 v0x1272ce0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28d0a80_0, 0, 3; + %store/vec4 v0x1272820_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28cd620_0, 0, 11; + %store/vec4 v0x126f490_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28cd720_0, 0, 11; + %store/vec4 v0x126f590_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28cdbb0_0, 0, 4; + %store/vec4 v0x126fa20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28cf550_0, 0, 4; + %store/vec4 v0x1273270_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d1ce0_0, 0, 4; + %store/vec4 v0x1273b60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d1ea0_0, 0, 4; + %store/vec4 v0x1273d20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d1c00_0, 0, 4; + %store/vec4 v0x1273a80_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d0e00, 4, 0; + %store/vec4a v0x1272ba0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d0e00, 4, 0; + %store/vec4a v0x1272ba0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d0e00, 4, 0; + %store/vec4a v0x1272ba0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d0e00, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x28cd3a0, v0x28d09c0 {0 0 0}; + %store/vec4a v0x1272ba0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x126f190, v0x1272760 {0 0 0}; %end; .thread T_0; - .scope S_0x28cd1a0; + .scope S_0x126ef50; T_1 ; - %wait E_0x28423d0; - %load/vec4 v0x28d0d20_0; + %wait E_0x11e4150; + %load/vec4 v0x1272ac0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -974,7 +979,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x28d0f40_0; + %load/vec4 v0x1272ce0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -989,185 +994,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x28cd9a0_0; + %load/vec4 v0x126f810_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x28d1020_0; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x1272dc0_0; + %load/vec4 v0x126fbe0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28cf550_0, 4, 5; - %load/vec4 v0x28cdd70_0; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4/off/d v0x1273270_0, 4, 5; + %load/vec4 v0x126fbe0_0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; - %load/vec4 v0x28cdd70_0; - %assign/vec4 v0x28d14d0_0, 0; + %assign/vec4 v0x1272ac0_0, 0; + %load/vec4 v0x126fbe0_0; + %assign/vec4 v0x1273350_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; - %load/vec4 v0x28cdd70_0; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4/off/d v0x1273b60_0, 4, 5; + %load/vec4 v0x126fbe0_0; + %assign/vec4 v0x1272820_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x28d1020_0; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272dc0_0; + %load/vec4 v0x1272820_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; - %load/vec4 v0x28d0a80_0; - %assign/vec4 v0x28d14d0_0, 0; + %assign/vec4 v0x1272ac0_0, 0; + %load/vec4 v0x1272820_0; + %assign/vec4 v0x1273350_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %assign/vec4/off/d v0x1273b60_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x28cdd70_0; + %load/vec4 v0x126fbe0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x28d0380_0; + %load/vec4 v0x12720d0_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1175,29 +1180,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; - %load/vec4 v0x28cdd70_0; - %assign/vec4 v0x28d14d0_0, 0; + %assign/vec4 v0x1272ac0_0, 0; + %load/vec4 v0x126fbe0_0; + %assign/vec4 v0x1273350_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %assign/vec4/off/d v0x1273b60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %assign/vec4/off/d v0x1273b60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %assign/vec4/off/d v0x1273b60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; + %assign/vec4/off/d v0x1273b60_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1205,10 +1210,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x28cd9a0_0; + %load/vec4 v0x126f810_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1275,180 +1280,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x28cd620_0; - %load/vec4 v0x28d15b0_0; + %load/vec4 v0x126f490_0; + %load/vec4 v0x1273430_0; %add; - %assign/vec4 v0x28cd620_0, 0; - %load/vec4 v0x28cdbb0_0; + %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x28cd620_0; - %load/vec4 v0x28d15b0_0; + %load/vec4 v0x126f490_0; + %load/vec4 v0x1273430_0; %sub; - %assign/vec4 v0x28cd620_0, 0; - %load/vec4 v0x28cdbb0_0; + %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126fa20_0; %pad/u 11; - %load/vec4 v0x28d15b0_0; + %load/vec4 v0x1273430_0; %add; %pad/u 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x28d15b0_0; - %assign/vec4 v0x28d2060_0, 0; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x1273430_0; + %assign/vec4 v0x1273ee0_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x28cd8c0_0; - %assign/vec4 v0x28d2060_0, 0; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126f730_0; + %assign/vec4 v0x1273ee0_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x28cd620_0; - %load/vec4 v0x28cd8c0_0; + %load/vec4 v0x126f490_0; + %load/vec4 v0x126f730_0; %add; - %assign/vec4 v0x28cd620_0, 0; - %load/vec4 v0x28cdbb0_0; + %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x28cd620_0; - %load/vec4 v0x28cd8c0_0; + %load/vec4 v0x126f490_0; + %load/vec4 v0x126f730_0; %sub; - %assign/vec4 v0x28cd620_0, 0; - %load/vec4 v0x28cdbb0_0; + %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126fa20_0; %pad/u 11; - %load/vec4 v0x28cd8c0_0; + %load/vec4 v0x126f730_0; %add; %pad/u 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x28cd720_0; - %assign/vec4 v0x28cd620_0, 0; - %load/vec4 v0x28cd620_0; - %assign/vec4 v0x28cd720_0, 0; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126f590_0; + %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x126f490_0; + %assign/vec4 v0x126f590_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x28cd620_0; - %assign/vec4 v0x28cd720_0, 0; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126f490_0; + %assign/vec4 v0x126f590_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x28cd620_0; + %load/vec4 v0x126f490_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x28cd620_0, 0; - %load/vec4 v0x28cdbb0_0; + %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x28cdad0_0; - %assign/vec4 v0x28cdc90_0, 0; + %load/vec4 v0x126f940_0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x28cd620_0; + %load/vec4 v0x126f490_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x28cdad0_0; - %assign/vec4 v0x28cdc90_0, 0; + %load/vec4 v0x126f940_0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x28cd620_0; + %load/vec4 v0x126f490_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x28cdad0_0; - %assign/vec4 v0x28cdc90_0, 0; + %load/vec4 v0x126f940_0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x28cd620_0; + %load/vec4 v0x126f490_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x28cdad0_0; - %assign/vec4 v0x28cdc90_0, 0; + %load/vec4 v0x126f940_0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x28cd620_0; + %load/vec4 v0x126f490_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x28cdad0_0; - %assign/vec4 v0x28cdc90_0, 0; + %load/vec4 v0x126f940_0; + %assign/vec4 v0x126fb00_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x28cdbb0_0; + %load/vec4 v0x126fa20_0; %addi 1, 0, 4; - %assign/vec4 v0x28cdc90_0, 0; + %assign/vec4 v0x126fb00_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x28cd9a0_0; + %load/vec4 v0x126f810_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x28cd9a0_0; + %load/vec4 v0x126f810_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x28cd800_0; + %load/vec4 v0x126f670_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x28cd800_0; + %load/vec4 v0x126f670_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1456,162 +1461,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x28cd800_0; + %load/vec4 v0x126f670_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x28d2060_0; - %assign/vec4 v0x28cd620_0, 0; + %load/vec4 v0x1273ee0_0; + %assign/vec4 v0x126f490_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; - %load/vec4 v0x28cd800_0; + %assign/vec4 v0x1272ac0_0, 0; + %load/vec4 v0x126f670_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x28d0a80_0; - %assign/vec4 v0x28d1f80_0, 0; - %load/vec4 v0x28d2060_0; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; + %assign/vec4 v0x1273e00_0, 0; + %load/vec4 v0x1273ee0_0; + %load/vec4 v0x1272820_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d0a80_0; + %load/vec4 v0x1272820_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; + %assign/vec4/off/d v0x1273a80_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x28cd800_0; + %load/vec4 v0x126f670_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x28cd800_0; - %assign/vec4 v0x28d1f80_0, 0; - %load/vec4 v0x28d2060_0; - %load/vec4 v0x28cd800_0; + %load/vec4 v0x126f670_0; + %assign/vec4 v0x1273e00_0, 0; + %load/vec4 v0x1273ee0_0; + %load/vec4 v0x126f670_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cd800_0; + %load/vec4 v0x126f670_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28cd800_0; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x126f670_0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x28d0500_0; + %load/vec4 v0x1272250_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x28cd800_0; - %assign/vec4 v0x28d1f80_0, 0; + %load/vec4 v0x126f670_0; + %assign/vec4 v0x1273e00_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x28d0f40_0; + %load/vec4 v0x1272ce0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1626,82 +1631,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x28d14d0_0; + %load/vec4 v0x1273350_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x28d0380_0; + %load/vec4 v0x12720d0_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; + %assign/vec4 v0x1272ac0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d1ce0_0, 0, 4; - %load/vec4 v0x28d1020_0; + %store/vec4 v0x1273b60_0, 0, 4; + %load/vec4 v0x1272dc0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x28d1020_0; + %load/vec4 v0x1272dc0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1709,54 +1714,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x28d1020_0; - %load/vec4 v0x28d14d0_0; + %load/vec4 v0x1272dc0_0; + %load/vec4 v0x1273350_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; - %load/vec4 v0x28d14d0_0; + %assign/vec4 v0x1272ac0_0, 0; + %load/vec4 v0x1273350_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d1690, 4; - %assign/vec4 v0x28d15b0_0, 0; + %load/vec4a v0x1273510, 4; + %assign/vec4 v0x1273430_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d14d0_0; + %load/vec4 v0x1273350_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28cf550_0, 4, 5; + %assign/vec4/off/d v0x1273270_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d14d0_0; + %load/vec4 v0x1273350_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d1ce0_0, 4, 5; - %load/vec4 v0x28d14d0_0; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4/off/d v0x1273b60_0, 4, 5; + %load/vec4 v0x1273350_0; + %assign/vec4 v0x1272820_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x28d0f40_0; + %load/vec4 v0x1272ce0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1772,93 +1777,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x28d1f80_0; + %load/vec4 v0x1273e00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x28d0500_0; + %load/vec4 v0x1272250_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x28cd480_0; + %load/vec4 v0x12712e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d1f80_0, 0; + %assign/vec4 v0x1273e00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d1c00_0, 4, 5; - %load/vec4 v0x28d2060_0; + %assign/vec4/off/d v0x1273a80_0, 4, 5; + %load/vec4 v0x1273ee0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d0e00, 0, 4; + %assign/vec4/a/d v0x1272ba0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272820_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1866,33 +1871,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x28d1f80_0; + %load/vec4 v0x1273e00_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x28d1dc0_0; - %load/vec4 v0x28d1f80_0; + %load/vec4 v0x1273c40_0; + %load/vec4 v0x1273e00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x28d1f80_0; + %load/vec4 v0x1273e00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x28d1c00_0, 4, 1; + %store/vec4 v0x1273a80_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d0d20_0, 0; - %load/vec4 v0x28d1f80_0; - %assign/vec4 v0x28d0a80_0, 0; + %assign/vec4 v0x1272ac0_0, 0; + %load/vec4 v0x1273e00_0; + %assign/vec4 v0x1272820_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d0f40_0, 0; + %assign/vec4 v0x1272ce0_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1901,19 +1906,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x28cd1a0; + .scope S_0x126ef50; T_2 ; - %wait E_0x281fc70; - %load/vec4 v0x28d0f40_0; + %wait E_0x11c19c0; + %load/vec4 v0x1272ce0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28d0d20_0; + %load/vec4 v0x1272ac0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x28cdc90_0; + %load/vec4 v0x126fb00_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1922,62 +1927,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x28cdc90_0; - %assign/vec4 v0x28cdbb0_0, 0; + %load/vec4 v0x126fb00_0; + %assign/vec4 v0x126fa20_0, 0; T_2.0 ; - %load/vec4 v0x28d0f40_0; + %load/vec4 v0x1272ce0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28cf550_0, 0, 4; + %store/vec4 v0x1273270_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x28d22e0; + .scope S_0x1274160; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28d5df0_0, 0, 3; + %store/vec4 v0x1277d30_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28d6020_0, 0, 3; + %store/vec4 v0x1277f60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28d5bb0_0, 0, 3; + %store/vec4 v0x1277af0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28d27a0_0, 0, 11; + %store/vec4 v0x12746e0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28d28a0_0, 0, 11; + %store/vec4 v0x12747e0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d2ce0_0, 0, 4; + %store/vec4 v0x1274c20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d65b0_0, 0, 4; + %store/vec4 v0x12784f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d6e00_0, 0, 4; + %store/vec4 v0x1278d40_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d6fc0_0, 0, 4; + %store/vec4 v0x1278f00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d6d20_0, 0, 4; + %store/vec4 v0x1278c60_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d5eb0, 4, 0; + %store/vec4a v0x1277df0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d5eb0, 4, 0; + %store/vec4a v0x1277df0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d5eb0, 4, 0; + %store/vec4a v0x1277df0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28d5eb0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x28d24b0, v0x28d5af0 {0 0 0}; + %store/vec4a v0x1277df0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1274370, v0x1277a30 {0 0 0}; %end; .thread T_3; - .scope S_0x28d22e0; + .scope S_0x1274160; T_4 ; - %wait E_0x28423d0; - %load/vec4 v0x28d5df0_0; + %wait E_0x11e4150; + %load/vec4 v0x1277d30_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1992,7 +1997,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x28d6020_0; + %load/vec4 v0x1277f60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2007,185 +2012,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x28d2b20_0; + %load/vec4 v0x1274a60_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x28d6100_0; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1278040_0; + %load/vec4 v0x1274de0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; - %load/vec4 v0x28d2ea0_0; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4/off/d v0x12784f0_0, 4, 5; + %load/vec4 v0x1274de0_0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; - %load/vec4 v0x28d2ea0_0; - %assign/vec4 v0x28d6650_0, 0; + %assign/vec4 v0x1277d30_0, 0; + %load/vec4 v0x1274de0_0; + %assign/vec4 v0x1278590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; - %load/vec4 v0x28d2ea0_0; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4/off/d v0x1278d40_0, 4, 5; + %load/vec4 v0x1274de0_0; + %assign/vec4 v0x1277af0_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x28d6100_0; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1278040_0; + %load/vec4 v0x1277af0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; - %load/vec4 v0x28d5bb0_0; - %assign/vec4 v0x28d6650_0, 0; + %assign/vec4 v0x1277d30_0, 0; + %load/vec4 v0x1277af0_0; + %assign/vec4 v0x1278590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %assign/vec4/off/d v0x1278d40_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x28d2ea0_0; + %load/vec4 v0x1274de0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x28d54b0_0; + %load/vec4 v0x12773f0_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2193,29 +2198,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; - %load/vec4 v0x28d2ea0_0; - %assign/vec4 v0x28d6650_0, 0; + %assign/vec4 v0x1277d30_0, 0; + %load/vec4 v0x1274de0_0; + %assign/vec4 v0x1278590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %assign/vec4/off/d v0x1278d40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %assign/vec4/off/d v0x1278d40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %assign/vec4/off/d v0x1278d40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; + %assign/vec4/off/d v0x1278d40_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2223,10 +2228,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x28d2b20_0; + %load/vec4 v0x1274a60_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2293,180 +2298,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x28d27a0_0; - %load/vec4 v0x28d66f0_0; + %load/vec4 v0x12746e0_0; + %load/vec4 v0x1278630_0; %add; - %assign/vec4 v0x28d27a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x28d27a0_0; - %load/vec4 v0x28d66f0_0; + %load/vec4 v0x12746e0_0; + %load/vec4 v0x1278630_0; %sub; - %assign/vec4 v0x28d27a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274c20_0; %pad/u 11; - %load/vec4 v0x28d66f0_0; + %load/vec4 v0x1278630_0; %add; %pad/u 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x28d66f0_0; - %assign/vec4 v0x28d7180_0, 0; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1278630_0; + %assign/vec4 v0x12790c0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x28d2a40_0; - %assign/vec4 v0x28d7180_0, 0; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274980_0; + %assign/vec4 v0x12790c0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x28d27a0_0; - %load/vec4 v0x28d2a40_0; + %load/vec4 v0x12746e0_0; + %load/vec4 v0x1274980_0; %add; - %assign/vec4 v0x28d27a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x28d27a0_0; - %load/vec4 v0x28d2a40_0; + %load/vec4 v0x12746e0_0; + %load/vec4 v0x1274980_0; %sub; - %assign/vec4 v0x28d27a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274c20_0; %pad/u 11; - %load/vec4 v0x28d2a40_0; + %load/vec4 v0x1274980_0; %add; %pad/u 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x28d28a0_0; - %assign/vec4 v0x28d27a0_0, 0; - %load/vec4 v0x28d27a0_0; - %assign/vec4 v0x28d28a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x12747e0_0; + %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x12746e0_0; + %assign/vec4 v0x12747e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x28d27a0_0; - %assign/vec4 v0x28d28a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x12746e0_0; + %assign/vec4 v0x12747e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x28d27a0_0; + %load/vec4 v0x12746e0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x28d27a0_0, 0; - %load/vec4 v0x28d2ce0_0; + %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x28d2c00_0; - %assign/vec4 v0x28d2dc0_0, 0; + %load/vec4 v0x1274b40_0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x28d27a0_0; + %load/vec4 v0x12746e0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x28d2c00_0; - %assign/vec4 v0x28d2dc0_0, 0; + %load/vec4 v0x1274b40_0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x28d27a0_0; + %load/vec4 v0x12746e0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x28d2c00_0; - %assign/vec4 v0x28d2dc0_0, 0; + %load/vec4 v0x1274b40_0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x28d27a0_0; + %load/vec4 v0x12746e0_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x28d2c00_0; - %assign/vec4 v0x28d2dc0_0, 0; + %load/vec4 v0x1274b40_0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x28d27a0_0; + %load/vec4 v0x12746e0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x28d2c00_0; - %assign/vec4 v0x28d2dc0_0, 0; + %load/vec4 v0x1274b40_0; + %assign/vec4 v0x1274d00_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x28d2ce0_0; + %load/vec4 v0x1274c20_0; %addi 1, 0, 4; - %assign/vec4 v0x28d2dc0_0, 0; + %assign/vec4 v0x1274d00_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x28d2b20_0; + %load/vec4 v0x1274a60_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x28d2b20_0; + %load/vec4 v0x1274a60_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x28d2980_0; + %load/vec4 v0x12748c0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x28d2980_0; + %load/vec4 v0x12748c0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2474,162 +2479,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x28d2980_0; + %load/vec4 v0x12748c0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x28d7180_0; - %assign/vec4 v0x28d27a0_0, 0; + %load/vec4 v0x12790c0_0; + %assign/vec4 v0x12746e0_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; - %load/vec4 v0x28d2980_0; + %assign/vec4 v0x1277d30_0, 0; + %load/vec4 v0x12748c0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x28d5bb0_0; - %assign/vec4 v0x28d70a0_0, 0; - %load/vec4 v0x28d7180_0; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; + %assign/vec4 v0x1278fe0_0, 0; + %load/vec4 v0x12790c0_0; + %load/vec4 v0x1277af0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d5bb0_0; + %load/vec4 v0x1277af0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; + %assign/vec4/off/d v0x1278c60_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x28d2980_0; + %load/vec4 v0x12748c0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x28d2980_0; - %assign/vec4 v0x28d70a0_0, 0; - %load/vec4 v0x28d7180_0; - %load/vec4 v0x28d2980_0; + %load/vec4 v0x12748c0_0; + %assign/vec4 v0x1278fe0_0, 0; + %load/vec4 v0x12790c0_0; + %load/vec4 v0x12748c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d2980_0; + %load/vec4 v0x12748c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d2980_0; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12748c0_0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x28d5630_0; + %load/vec4 v0x1277570_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x28d2980_0; - %assign/vec4 v0x28d70a0_0, 0; + %load/vec4 v0x12748c0_0; + %assign/vec4 v0x1278fe0_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x28d6020_0; + %load/vec4 v0x1277f60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2644,82 +2649,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x28d6650_0; + %load/vec4 v0x1278590_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x28d54b0_0; + %load/vec4 v0x12773f0_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; + %assign/vec4 v0x1277d30_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d6e00_0, 0, 4; - %load/vec4 v0x28d6100_0; + %store/vec4 v0x1278d40_0, 0, 4; + %load/vec4 v0x1278040_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x28d6100_0; + %load/vec4 v0x1278040_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2727,54 +2732,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x28d6100_0; - %load/vec4 v0x28d6650_0; + %load/vec4 v0x1278040_0; + %load/vec4 v0x1278590_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; - %load/vec4 v0x28d6650_0; + %assign/vec4 v0x1277d30_0, 0; + %load/vec4 v0x1278590_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28d6790, 4; - %assign/vec4 v0x28d66f0_0, 0; + %load/vec4a v0x12786d0, 4; + %assign/vec4 v0x1278630_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d6650_0; + %load/vec4 v0x1278590_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d65b0_0, 4, 5; + %assign/vec4/off/d v0x12784f0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d6650_0; + %load/vec4 v0x1278590_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28d6e00_0, 4, 5; - %load/vec4 v0x28d6650_0; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4/off/d v0x1278d40_0, 4, 5; + %load/vec4 v0x1278590_0; + %assign/vec4 v0x1277af0_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x28d6020_0; + %load/vec4 v0x1277f60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2790,93 +2795,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x28d70a0_0; + %load/vec4 v0x1278fe0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x28d5630_0; + %load/vec4 v0x1277570_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x28d4560_0; + %load/vec4 v0x12764a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d70a0_0, 0; + %assign/vec4 v0x1278fe0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28d6d20_0, 4, 5; - %load/vec4 v0x28d7180_0; + %assign/vec4/off/d v0x1278c60_0, 4, 5; + %load/vec4 v0x12790c0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28d5eb0, 0, 4; + %assign/vec4/a/d v0x1277df0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277af0_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2884,33 +2889,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x28d70a0_0; + %load/vec4 v0x1278fe0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x28d6ee0_0; - %load/vec4 v0x28d70a0_0; + %load/vec4 v0x1278e20_0; + %load/vec4 v0x1278fe0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x28d70a0_0; + %load/vec4 v0x1278fe0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x28d6d20_0, 4, 1; + %store/vec4 v0x1278c60_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d5df0_0, 0; - %load/vec4 v0x28d70a0_0; - %assign/vec4 v0x28d5bb0_0, 0; + %assign/vec4 v0x1277d30_0, 0; + %load/vec4 v0x1278fe0_0; + %assign/vec4 v0x1277af0_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28d6020_0, 0; + %assign/vec4 v0x1277f60_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2919,19 +2924,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x28d22e0; + .scope S_0x1274160; T_5 ; - %wait E_0x281fc70; - %load/vec4 v0x28d6020_0; + %wait E_0x11c19c0; + %load/vec4 v0x1277f60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28d5df0_0; + %load/vec4 v0x1277d30_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x28d2dc0_0; + %load/vec4 v0x1274d00_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2940,62 +2945,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x28d2dc0_0; - %assign/vec4 v0x28d2ce0_0, 0; + %load/vec4 v0x1274d00_0; + %assign/vec4 v0x1274c20_0, 0; T_5.0 ; - %load/vec4 v0x28d6020_0; + %load/vec4 v0x1277f60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d65b0_0, 0, 4; + %store/vec4 v0x12784f0_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x28d7400; + .scope S_0x1279340; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28daf60_0, 0, 3; + %store/vec4 v0x127cf70_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28db1b0_0, 0, 3; + %store/vec4 v0x127d1c0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28dacc0_0, 0, 3; + %store/vec4 v0x127ccd0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28d7850_0, 0, 11; + %store/vec4 v0x1279860_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28d7950_0, 0, 11; + %store/vec4 v0x1279960_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28d7de0_0, 0, 4; + %store/vec4 v0x1279df0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28db740_0, 0, 4; + %store/vec4 v0x127d750_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28dbf90_0, 0, 4; + %store/vec4 v0x127dfa0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28dc150_0, 0, 4; + %store/vec4 v0x127e160_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28dbeb0_0, 0, 4; + %store/vec4 v0x127dec0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28db040, 4, 0; + %store/vec4a v0x127d050, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28db040, 4, 0; + %store/vec4a v0x127d050, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28db040, 4, 0; + %store/vec4a v0x127d050, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28db040, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x28d7620, v0x28dac00 {0 0 0}; + %store/vec4a v0x127d050, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x12795a0, v0x127cc10 {0 0 0}; %end; .thread T_6; - .scope S_0x28d7400; + .scope S_0x1279340; T_7 ; - %wait E_0x28423d0; - %load/vec4 v0x28daf60_0; + %wait E_0x11e4150; + %load/vec4 v0x127cf70_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3010,7 +3015,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x28db1b0_0; + %load/vec4 v0x127d1c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3025,185 +3030,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x28d7bd0_0; + %load/vec4 v0x1279be0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x28db290_0; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x127d2a0_0; + %load/vec4 v0x1279fb0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28db740_0, 4, 5; - %load/vec4 v0x28d7fa0_0; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4/off/d v0x127d750_0, 4, 5; + %load/vec4 v0x1279fb0_0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28daf60_0, 0; - %load/vec4 v0x28d7fa0_0; - %assign/vec4 v0x28db7e0_0, 0; + %assign/vec4 v0x127cf70_0, 0; + %load/vec4 v0x1279fb0_0; + %assign/vec4 v0x127d7f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; - %load/vec4 v0x28d7fa0_0; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %load/vec4 v0x1279fb0_0; + %assign/vec4 v0x127ccd0_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x28db290_0; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127d2a0_0; + %load/vec4 v0x127ccd0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28daf60_0, 0; - %load/vec4 v0x28dacc0_0; - %assign/vec4 v0x28db7e0_0, 0; + %assign/vec4 v0x127cf70_0, 0; + %load/vec4 v0x127ccd0_0; + %assign/vec4 v0x127d7f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x28d7fa0_0; + %load/vec4 v0x1279fb0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x28da5b0_0; + %load/vec4 v0x127c5c0_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3211,29 +3216,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28daf60_0, 0; - %load/vec4 v0x28d7fa0_0; - %assign/vec4 v0x28db7e0_0, 0; + %assign/vec4 v0x127cf70_0, 0; + %load/vec4 v0x1279fb0_0; + %assign/vec4 v0x127d7f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3241,10 +3246,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x28d7bd0_0; + %load/vec4 v0x1279be0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3311,180 +3316,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x28d7850_0; - %load/vec4 v0x28db880_0; + %load/vec4 v0x1279860_0; + %load/vec4 v0x127d890_0; %add; - %assign/vec4 v0x28d7850_0, 0; - %load/vec4 v0x28d7de0_0; + %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x28d7850_0; - %load/vec4 v0x28db880_0; + %load/vec4 v0x1279860_0; + %load/vec4 v0x127d890_0; %sub; - %assign/vec4 v0x28d7850_0, 0; - %load/vec4 v0x28d7de0_0; + %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279df0_0; %pad/u 11; - %load/vec4 v0x28db880_0; + %load/vec4 v0x127d890_0; %add; %pad/u 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x28db880_0; - %assign/vec4 v0x28dc310_0, 0; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x127d890_0; + %assign/vec4 v0x127e320_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x28d7af0_0; - %assign/vec4 v0x28dc310_0, 0; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279b00_0; + %assign/vec4 v0x127e320_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x28d7850_0; - %load/vec4 v0x28d7af0_0; + %load/vec4 v0x1279860_0; + %load/vec4 v0x1279b00_0; %add; - %assign/vec4 v0x28d7850_0, 0; - %load/vec4 v0x28d7de0_0; + %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x28d7850_0; - %load/vec4 v0x28d7af0_0; + %load/vec4 v0x1279860_0; + %load/vec4 v0x1279b00_0; %sub; - %assign/vec4 v0x28d7850_0, 0; - %load/vec4 v0x28d7de0_0; + %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279df0_0; %pad/u 11; - %load/vec4 v0x28d7af0_0; + %load/vec4 v0x1279b00_0; %add; %pad/u 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x28d7950_0; - %assign/vec4 v0x28d7850_0, 0; - %load/vec4 v0x28d7850_0; - %assign/vec4 v0x28d7950_0, 0; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279960_0; + %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x1279860_0; + %assign/vec4 v0x1279960_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x28d7850_0; - %assign/vec4 v0x28d7950_0, 0; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279860_0; + %assign/vec4 v0x1279960_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x28d7850_0; + %load/vec4 v0x1279860_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x28d7850_0, 0; - %load/vec4 v0x28d7de0_0; + %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x28d7d00_0; - %assign/vec4 v0x28d7ec0_0, 0; + %load/vec4 v0x1279d10_0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x28d7850_0; + %load/vec4 v0x1279860_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x28d7d00_0; - %assign/vec4 v0x28d7ec0_0, 0; + %load/vec4 v0x1279d10_0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x28d7850_0; + %load/vec4 v0x1279860_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x28d7d00_0; - %assign/vec4 v0x28d7ec0_0, 0; + %load/vec4 v0x1279d10_0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x28d7850_0; + %load/vec4 v0x1279860_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x28d7d00_0; - %assign/vec4 v0x28d7ec0_0, 0; + %load/vec4 v0x1279d10_0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x28d7850_0; + %load/vec4 v0x1279860_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x28d7d00_0; - %assign/vec4 v0x28d7ec0_0, 0; + %load/vec4 v0x1279d10_0; + %assign/vec4 v0x1279ed0_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x28d7de0_0; + %load/vec4 v0x1279df0_0; %addi 1, 0, 4; - %assign/vec4 v0x28d7ec0_0, 0; + %assign/vec4 v0x1279ed0_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x28d7bd0_0; + %load/vec4 v0x1279be0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x28d7bd0_0; + %load/vec4 v0x1279be0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x28d7a30_0; + %load/vec4 v0x1279a40_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x28d7a30_0; + %load/vec4 v0x1279a40_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3492,162 +3497,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x28d7a30_0; + %load/vec4 v0x1279a40_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x28dc310_0; - %assign/vec4 v0x28d7850_0, 0; + %load/vec4 v0x127e320_0; + %assign/vec4 v0x1279860_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28daf60_0, 0; - %load/vec4 v0x28d7a30_0; + %assign/vec4 v0x127cf70_0, 0; + %load/vec4 v0x1279a40_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x28dacc0_0; - %assign/vec4 v0x28dc230_0, 0; - %load/vec4 v0x28dc310_0; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; + %assign/vec4 v0x127e240_0, 0; + %load/vec4 v0x127e320_0; + %load/vec4 v0x127ccd0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28dacc0_0; + %load/vec4 v0x127ccd0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; + %assign/vec4/off/d v0x127dec0_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x28d7a30_0; + %load/vec4 v0x1279a40_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x28d7a30_0; - %assign/vec4 v0x28dc230_0, 0; - %load/vec4 v0x28dc310_0; - %load/vec4 v0x28d7a30_0; + %load/vec4 v0x1279a40_0; + %assign/vec4 v0x127e240_0, 0; + %load/vec4 v0x127e320_0; + %load/vec4 v0x1279a40_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28d7a30_0; + %load/vec4 v0x1279a40_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28d7a30_0; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x1279a40_0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x28da730_0; + %load/vec4 v0x127c740_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x28d7a30_0; - %assign/vec4 v0x28dc230_0, 0; + %load/vec4 v0x1279a40_0; + %assign/vec4 v0x127e240_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x28db1b0_0; + %load/vec4 v0x127d1c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3662,82 +3667,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x28db7e0_0; + %load/vec4 v0x127d7f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x28da5b0_0; + %load/vec4 v0x127c5c0_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28daf60_0, 0; + %assign/vec4 v0x127cf70_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28dbf90_0, 0, 4; - %load/vec4 v0x28db290_0; + %store/vec4 v0x127dfa0_0, 0, 4; + %load/vec4 v0x127d2a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x28db290_0; + %load/vec4 v0x127d2a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3745,54 +3750,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x28db290_0; - %load/vec4 v0x28db7e0_0; + %load/vec4 v0x127d2a0_0; + %load/vec4 v0x127d7f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28daf60_0, 0; - %load/vec4 v0x28db7e0_0; + %assign/vec4 v0x127cf70_0, 0; + %load/vec4 v0x127d7f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28db920, 4; - %assign/vec4 v0x28db880_0, 0; + %load/vec4a v0x127d930, 4; + %assign/vec4 v0x127d890_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28db7e0_0; + %load/vec4 v0x127d7f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28db740_0, 4, 5; + %assign/vec4/off/d v0x127d750_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28db7e0_0; + %load/vec4 v0x127d7f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28dbf90_0, 4, 5; - %load/vec4 v0x28db7e0_0; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %load/vec4 v0x127d7f0_0; + %assign/vec4 v0x127ccd0_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x28db1b0_0; + %load/vec4 v0x127d1c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3808,93 +3813,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x28dc230_0; + %load/vec4 v0x127e240_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x28da730_0; + %load/vec4 v0x127c740_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x28d9660_0; + %load/vec4 v0x127b670_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28dc230_0, 0; + %assign/vec4 v0x127e240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28dbeb0_0, 4, 5; - %load/vec4 v0x28dc310_0; + %assign/vec4/off/d v0x127dec0_0, 4, 5; + %load/vec4 v0x127e320_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28db040, 0, 4; + %assign/vec4/a/d v0x127d050, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127ccd0_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3902,33 +3907,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x28dc230_0; + %load/vec4 v0x127e240_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x28dc070_0; - %load/vec4 v0x28dc230_0; + %load/vec4 v0x127e080_0; + %load/vec4 v0x127e240_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x28dc230_0; + %load/vec4 v0x127e240_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x28dbeb0_0, 4, 1; + %store/vec4 v0x127dec0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28daf60_0, 0; - %load/vec4 v0x28dc230_0; - %assign/vec4 v0x28dacc0_0, 0; + %assign/vec4 v0x127cf70_0, 0; + %load/vec4 v0x127e240_0; + %assign/vec4 v0x127ccd0_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28db1b0_0, 0; + %assign/vec4 v0x127d1c0_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3937,19 +3942,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x28d7400; + .scope S_0x1279340; T_8 ; - %wait E_0x281fc70; - %load/vec4 v0x28db1b0_0; + %wait E_0x11c19c0; + %load/vec4 v0x127d1c0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28daf60_0; + %load/vec4 v0x127cf70_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x28d7ec0_0; + %load/vec4 v0x1279ed0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3958,62 +3963,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x28d7ec0_0; - %assign/vec4 v0x28d7de0_0, 0; + %load/vec4 v0x1279ed0_0; + %assign/vec4 v0x1279df0_0, 0; T_8.0 ; - %load/vec4 v0x28db1b0_0; + %load/vec4 v0x127d1c0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28db740_0, 0, 4; + %store/vec4 v0x127d750_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x28c8070; + .scope S_0x1269d60; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28cbbc0_0, 0, 3; + %store/vec4 v0x126d970_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28cbde0_0, 0, 3; + %store/vec4 v0x126db90_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28cb920_0, 0, 3; + %store/vec4 v0x126d6d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28c84e0_0, 0, 11; + %store/vec4 v0x126a290_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28c85e0_0, 0, 11; + %store/vec4 v0x126a390_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c8a70_0, 0, 4; + %store/vec4 v0x126a820_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28cc370_0, 0, 4; + %store/vec4 v0x126e120_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28ccba0_0, 0, 4; + %store/vec4 v0x126e950_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28ccd60_0, 0, 4; + %store/vec4 v0x126eb10_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28ccae0_0, 0, 4; + %store/vec4 v0x126e890_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28cbca0, 4, 0; + %store/vec4a v0x126da50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28cbca0, 4, 0; + %store/vec4a v0x126da50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28cbca0, 4, 0; + %store/vec4a v0x126da50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28cbca0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x28c8260, v0x28cb860 {0 0 0}; + %store/vec4a v0x126da50, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1269f90, v0x126d610 {0 0 0}; %end; .thread T_9; - .scope S_0x28c8070; + .scope S_0x1269d60; T_10 ; - %wait E_0x28423d0; - %load/vec4 v0x28cbbc0_0; + %wait E_0x11e4150; + %load/vec4 v0x126d970_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4028,7 +4033,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x28cbde0_0; + %load/vec4 v0x126db90_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4043,185 +4048,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x28c8860_0; + %load/vec4 v0x126a610_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x28cbec0_0; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126dc70_0; + %load/vec4 v0x126a9e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28cc370_0, 4, 5; - %load/vec4 v0x28c8c30_0; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4/off/d v0x126e120_0, 4, 5; + %load/vec4 v0x126a9e0_0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; - %load/vec4 v0x28c8c30_0; - %assign/vec4 v0x28cc410_0, 0; + %assign/vec4 v0x126d970_0, 0; + %load/vec4 v0x126a9e0_0; + %assign/vec4 v0x126e1c0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; - %load/vec4 v0x28c8c30_0; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4/off/d v0x126e950_0, 4, 5; + %load/vec4 v0x126a9e0_0; + %assign/vec4 v0x126d6d0_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x28cbec0_0; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126dc70_0; + %load/vec4 v0x126d6d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; - %load/vec4 v0x28cb920_0; - %assign/vec4 v0x28cc410_0, 0; + %assign/vec4 v0x126d970_0, 0; + %load/vec4 v0x126d6d0_0; + %assign/vec4 v0x126e1c0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %assign/vec4/off/d v0x126e950_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x28c8c30_0; + %load/vec4 v0x126a9e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x28cb240_0; + %load/vec4 v0x126cff0_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4229,29 +4234,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; - %load/vec4 v0x28c8c30_0; - %assign/vec4 v0x28cc410_0, 0; + %assign/vec4 v0x126d970_0, 0; + %load/vec4 v0x126a9e0_0; + %assign/vec4 v0x126e1c0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %assign/vec4/off/d v0x126e950_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %assign/vec4/off/d v0x126e950_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %assign/vec4/off/d v0x126e950_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; + %assign/vec4/off/d v0x126e950_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4259,10 +4264,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x28c8860_0; + %load/vec4 v0x126a610_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4329,180 +4334,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x28c84e0_0; - %load/vec4 v0x28cc4b0_0; + %load/vec4 v0x126a290_0; + %load/vec4 v0x126e260_0; %add; - %assign/vec4 v0x28c84e0_0, 0; - %load/vec4 v0x28c8a70_0; + %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x28c84e0_0; - %load/vec4 v0x28cc4b0_0; + %load/vec4 v0x126a290_0; + %load/vec4 v0x126e260_0; %sub; - %assign/vec4 v0x28c84e0_0, 0; - %load/vec4 v0x28c8a70_0; + %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a820_0; %pad/u 11; - %load/vec4 v0x28cc4b0_0; + %load/vec4 v0x126e260_0; %add; %pad/u 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x28cc4b0_0; - %assign/vec4 v0x28ccf20_0, 0; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126e260_0; + %assign/vec4 v0x126ecd0_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x28c8780_0; - %assign/vec4 v0x28ccf20_0, 0; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a530_0; + %assign/vec4 v0x126ecd0_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x28c84e0_0; - %load/vec4 v0x28c8780_0; + %load/vec4 v0x126a290_0; + %load/vec4 v0x126a530_0; %add; - %assign/vec4 v0x28c84e0_0, 0; - %load/vec4 v0x28c8a70_0; + %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x28c84e0_0; - %load/vec4 v0x28c8780_0; + %load/vec4 v0x126a290_0; + %load/vec4 v0x126a530_0; %sub; - %assign/vec4 v0x28c84e0_0, 0; - %load/vec4 v0x28c8a70_0; + %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a820_0; %pad/u 11; - %load/vec4 v0x28c8780_0; + %load/vec4 v0x126a530_0; %add; %pad/u 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x28c85e0_0; - %assign/vec4 v0x28c84e0_0, 0; - %load/vec4 v0x28c84e0_0; - %assign/vec4 v0x28c85e0_0, 0; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a390_0; + %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x126a290_0; + %assign/vec4 v0x126a390_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x28c84e0_0; - %assign/vec4 v0x28c85e0_0, 0; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a290_0; + %assign/vec4 v0x126a390_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x28c84e0_0; + %load/vec4 v0x126a290_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x28c84e0_0, 0; - %load/vec4 v0x28c8a70_0; + %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x28c8990_0; - %assign/vec4 v0x28c8b50_0, 0; + %load/vec4 v0x126a740_0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x28c84e0_0; + %load/vec4 v0x126a290_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x28c8990_0; - %assign/vec4 v0x28c8b50_0, 0; + %load/vec4 v0x126a740_0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x28c84e0_0; + %load/vec4 v0x126a290_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x28c8990_0; - %assign/vec4 v0x28c8b50_0, 0; + %load/vec4 v0x126a740_0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x28c84e0_0; + %load/vec4 v0x126a290_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x28c8990_0; - %assign/vec4 v0x28c8b50_0, 0; + %load/vec4 v0x126a740_0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x28c84e0_0; + %load/vec4 v0x126a290_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x28c8990_0; - %assign/vec4 v0x28c8b50_0, 0; + %load/vec4 v0x126a740_0; + %assign/vec4 v0x126a900_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x28c8a70_0; + %load/vec4 v0x126a820_0; %addi 1, 0, 4; - %assign/vec4 v0x28c8b50_0, 0; + %assign/vec4 v0x126a900_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x28c8860_0; + %load/vec4 v0x126a610_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x28c8860_0; + %load/vec4 v0x126a610_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x28c86c0_0; + %load/vec4 v0x126a470_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x28c86c0_0; + %load/vec4 v0x126a470_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4510,162 +4515,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x28c86c0_0; + %load/vec4 v0x126a470_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x28ccf20_0; - %assign/vec4 v0x28c84e0_0, 0; + %load/vec4 v0x126ecd0_0; + %assign/vec4 v0x126a290_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; - %load/vec4 v0x28c86c0_0; + %assign/vec4 v0x126d970_0, 0; + %load/vec4 v0x126a470_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x28cb920_0; - %assign/vec4 v0x28cce40_0, 0; - %load/vec4 v0x28ccf20_0; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; + %assign/vec4 v0x126ebf0_0, 0; + %load/vec4 v0x126ecd0_0; + %load/vec4 v0x126d6d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cb920_0; + %load/vec4 v0x126d6d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; + %assign/vec4/off/d v0x126e890_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x28c86c0_0; + %load/vec4 v0x126a470_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x28c86c0_0; - %assign/vec4 v0x28cce40_0, 0; - %load/vec4 v0x28ccf20_0; - %load/vec4 v0x28c86c0_0; + %load/vec4 v0x126a470_0; + %assign/vec4 v0x126ebf0_0, 0; + %load/vec4 v0x126ecd0_0; + %load/vec4 v0x126a470_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c86c0_0; + %load/vec4 v0x126a470_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28c86c0_0; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126a470_0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x28cb3c0_0; + %load/vec4 v0x126d170_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x28c86c0_0; - %assign/vec4 v0x28cce40_0, 0; + %load/vec4 v0x126a470_0; + %assign/vec4 v0x126ebf0_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x28cbde0_0; + %load/vec4 v0x126db90_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4680,82 +4685,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x28cc410_0; + %load/vec4 v0x126e1c0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x28cb240_0; + %load/vec4 v0x126cff0_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; + %assign/vec4 v0x126d970_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28ccba0_0, 0, 4; - %load/vec4 v0x28cbec0_0; + %store/vec4 v0x126e950_0, 0, 4; + %load/vec4 v0x126dc70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x28cbec0_0; + %load/vec4 v0x126dc70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4763,54 +4768,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x28cbec0_0; - %load/vec4 v0x28cc410_0; + %load/vec4 v0x126dc70_0; + %load/vec4 v0x126e1c0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; - %load/vec4 v0x28cc410_0; + %assign/vec4 v0x126d970_0, 0; + %load/vec4 v0x126e1c0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28cc550, 4; - %assign/vec4 v0x28cc4b0_0, 0; + %load/vec4a v0x126e300, 4; + %assign/vec4 v0x126e260_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cc410_0; + %load/vec4 v0x126e1c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28cc370_0, 4, 5; + %assign/vec4/off/d v0x126e120_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28cc410_0; + %load/vec4 v0x126e1c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28ccba0_0, 4, 5; - %load/vec4 v0x28cc410_0; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4/off/d v0x126e950_0, 4, 5; + %load/vec4 v0x126e1c0_0; + %assign/vec4 v0x126d6d0_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x28cbde0_0; + %load/vec4 v0x126db90_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4826,93 +4831,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x28cce40_0; + %load/vec4 v0x126ebf0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x28cb3c0_0; + %load/vec4 v0x126d170_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x28ca2f0_0; + %load/vec4 v0x126c0a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28cce40_0, 0; + %assign/vec4 v0x126ebf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28ccae0_0, 4, 5; - %load/vec4 v0x28ccf20_0; + %assign/vec4/off/d v0x126e890_0, 4, 5; + %load/vec4 v0x126ecd0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28cbca0, 0, 4; + %assign/vec4/a/d v0x126da50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d6d0_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4920,33 +4925,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x28cce40_0; + %load/vec4 v0x126ebf0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x28ccc80_0; - %load/vec4 v0x28cce40_0; + %load/vec4 v0x126ea30_0; + %load/vec4 v0x126ebf0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x28cce40_0; + %load/vec4 v0x126ebf0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x28ccae0_0, 4, 1; + %store/vec4 v0x126e890_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28cbbc0_0, 0; - %load/vec4 v0x28cce40_0; - %assign/vec4 v0x28cb920_0, 0; + %assign/vec4 v0x126d970_0, 0; + %load/vec4 v0x126ebf0_0; + %assign/vec4 v0x126d6d0_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28cbde0_0, 0; + %assign/vec4 v0x126db90_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4955,19 +4960,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x28c8070; + .scope S_0x1269d60; T_11 ; - %wait E_0x281fc70; - %load/vec4 v0x28cbde0_0; + %wait E_0x11c19c0; + %load/vec4 v0x126db90_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28cbbc0_0; + %load/vec4 v0x126d970_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x28c8b50_0; + %load/vec4 v0x126a900_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4976,62 +4981,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x28c8b50_0; - %assign/vec4 v0x28c8a70_0, 0; + %load/vec4 v0x126a900_0; + %assign/vec4 v0x126a820_0, 0; T_11.0 ; - %load/vec4 v0x28cbde0_0; + %load/vec4 v0x126db90_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28cc370_0, 0, 4; + %store/vec4 v0x126e120_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x280ede0; + .scope S_0x12003b0; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28c69f0_0, 0, 3; + %store/vec4 v0x12686e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28c6c10_0, 0, 3; + %store/vec4 v0x1268900_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28c6750_0, 0, 3; + %store/vec4 v0x1268440_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2884a60_0, 0, 11; + %store/vec4 v0x1226750_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x28c33a0_0, 0, 11; + %store/vec4 v0x1265090_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c3860_0, 0, 4; + %store/vec4 v0x1265550_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c71a0_0, 0, 4; + %store/vec4 v0x1268e90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c7a70_0, 0, 4; + %store/vec4 v0x1269760_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c7c30_0, 0, 4; + %store/vec4 v0x1269920_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c7990_0, 0, 4; + %store/vec4 v0x1269680_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28c6ad0, 4, 0; + %store/vec4a v0x12687c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28c6ad0, 4, 0; + %store/vec4a v0x12687c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28c6ad0, 4, 0; + %store/vec4a v0x12687c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28c6ad0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x281f8b0, v0x28c6690 {0 0 0}; + %store/vec4a v0x12687c0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x11cf1f0, v0x1268380 {0 0 0}; %end; .thread T_12; - .scope S_0x280ede0; + .scope S_0x12003b0; T_13 ; - %wait E_0x28423d0; - %load/vec4 v0x28c69f0_0; + %wait E_0x11e4150; + %load/vec4 v0x12686e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5046,7 +5051,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x28c6c10_0; + %load/vec4 v0x1268900_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5061,185 +5066,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x28c3650_0; + %load/vec4 v0x1265340_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x28c6cf0_0; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x12689e0_0; + %load/vec4 v0x1265710_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; - %load/vec4 v0x28c3a20_0; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4/off/d v0x1268e90_0, 4, 5; + %load/vec4 v0x1265710_0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; - %load/vec4 v0x28c3a20_0; - %assign/vec4 v0x28c7240_0, 0; + %assign/vec4 v0x12686e0_0, 0; + %load/vec4 v0x1265710_0; + %assign/vec4 v0x1268f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; - %load/vec4 v0x28c3a20_0; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4/off/d v0x1269760_0, 4, 5; + %load/vec4 v0x1265710_0; + %assign/vec4 v0x1268440_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x28c6cf0_0; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x12689e0_0; + %load/vec4 v0x1268440_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; - %load/vec4 v0x28c6750_0; - %assign/vec4 v0x28c7240_0, 0; + %assign/vec4 v0x12686e0_0, 0; + %load/vec4 v0x1268440_0; + %assign/vec4 v0x1268f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %assign/vec4/off/d v0x1269760_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x28c3a20_0; + %load/vec4 v0x1265710_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x28c6030_0; + %load/vec4 v0x1267d20_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5247,29 +5252,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; - %load/vec4 v0x28c3a20_0; - %assign/vec4 v0x28c7240_0, 0; + %assign/vec4 v0x12686e0_0, 0; + %load/vec4 v0x1265710_0; + %assign/vec4 v0x1268f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %assign/vec4/off/d v0x1269760_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %assign/vec4/off/d v0x1269760_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %assign/vec4/off/d v0x1269760_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; + %assign/vec4/off/d v0x1269760_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5277,10 +5282,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x28c3650_0; + %load/vec4 v0x1265340_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5347,180 +5352,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x2884a60_0; - %load/vec4 v0x28c7320_0; + %load/vec4 v0x1226750_0; + %load/vec4 v0x1269010_0; %add; - %assign/vec4 v0x2884a60_0, 0; - %load/vec4 v0x28c3860_0; + %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x2884a60_0; - %load/vec4 v0x28c7320_0; + %load/vec4 v0x1226750_0; + %load/vec4 v0x1269010_0; %sub; - %assign/vec4 v0x2884a60_0, 0; - %load/vec4 v0x28c3860_0; + %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265550_0; %pad/u 11; - %load/vec4 v0x28c7320_0; + %load/vec4 v0x1269010_0; %add; %pad/u 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x28c7320_0; - %assign/vec4 v0x28c7df0_0, 0; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1269010_0; + %assign/vec4 v0x1269ae0_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x28c3570_0; - %assign/vec4 v0x28c7df0_0, 0; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265260_0; + %assign/vec4 v0x1269ae0_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x2884a60_0; - %load/vec4 v0x28c3570_0; + %load/vec4 v0x1226750_0; + %load/vec4 v0x1265260_0; %add; - %assign/vec4 v0x2884a60_0, 0; - %load/vec4 v0x28c3860_0; + %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x2884a60_0; - %load/vec4 v0x28c3570_0; + %load/vec4 v0x1226750_0; + %load/vec4 v0x1265260_0; %sub; - %assign/vec4 v0x2884a60_0, 0; - %load/vec4 v0x28c3860_0; + %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265550_0; %pad/u 11; - %load/vec4 v0x28c3570_0; + %load/vec4 v0x1265260_0; %add; %pad/u 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x28c33a0_0; - %assign/vec4 v0x2884a60_0, 0; - %load/vec4 v0x2884a60_0; - %assign/vec4 v0x28c33a0_0, 0; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265090_0; + %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x1226750_0; + %assign/vec4 v0x1265090_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x2884a60_0; - %assign/vec4 v0x28c33a0_0, 0; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1226750_0; + %assign/vec4 v0x1265090_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x2884a60_0; + %load/vec4 v0x1226750_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2884a60_0, 0; - %load/vec4 v0x28c3860_0; + %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x28c3780_0; - %assign/vec4 v0x28c3940_0, 0; + %load/vec4 v0x1265470_0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x2884a60_0; + %load/vec4 v0x1226750_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x28c3780_0; - %assign/vec4 v0x28c3940_0, 0; + %load/vec4 v0x1265470_0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x2884a60_0; + %load/vec4 v0x1226750_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x28c3780_0; - %assign/vec4 v0x28c3940_0, 0; + %load/vec4 v0x1265470_0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2884a60_0; + %load/vec4 v0x1226750_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x28c3780_0; - %assign/vec4 v0x28c3940_0, 0; + %load/vec4 v0x1265470_0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x2884a60_0; + %load/vec4 v0x1226750_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x28c3780_0; - %assign/vec4 v0x28c3940_0, 0; + %load/vec4 v0x1265470_0; + %assign/vec4 v0x1265630_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x28c3860_0; + %load/vec4 v0x1265550_0; %addi 1, 0, 4; - %assign/vec4 v0x28c3940_0, 0; + %assign/vec4 v0x1265630_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x28c3650_0; + %load/vec4 v0x1265340_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x28c3650_0; + %load/vec4 v0x1265340_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x28c3480_0; + %load/vec4 v0x1265170_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x28c3480_0; + %load/vec4 v0x1265170_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5528,162 +5533,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x28c3480_0; + %load/vec4 v0x1265170_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x28c7df0_0; - %assign/vec4 v0x2884a60_0, 0; + %load/vec4 v0x1269ae0_0; + %assign/vec4 v0x1226750_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; - %load/vec4 v0x28c3480_0; + %assign/vec4 v0x12686e0_0, 0; + %load/vec4 v0x1265170_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x28c6750_0; - %assign/vec4 v0x28c7d10_0, 0; - %load/vec4 v0x28c7df0_0; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; + %assign/vec4 v0x1269a00_0, 0; + %load/vec4 v0x1269ae0_0; + %load/vec4 v0x1268440_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c6750_0; + %load/vec4 v0x1268440_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c7990_0, 4, 5; + %assign/vec4/off/d v0x1269680_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x28c3480_0; + %load/vec4 v0x1265170_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x28c3480_0; - %assign/vec4 v0x28c7d10_0, 0; - %load/vec4 v0x28c7df0_0; - %load/vec4 v0x28c3480_0; + %load/vec4 v0x1265170_0; + %assign/vec4 v0x1269a00_0, 0; + %load/vec4 v0x1269ae0_0; + %load/vec4 v0x1265170_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c3480_0; + %load/vec4 v0x1265170_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c3480_0; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1265170_0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x28c61b0_0; + %load/vec4 v0x1267ea0_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x28c3480_0; - %assign/vec4 v0x28c7d10_0, 0; + %load/vec4 v0x1265170_0; + %assign/vec4 v0x1269a00_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x28c6c10_0; + %load/vec4 v0x1268900_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5698,82 +5703,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x28c7240_0; + %load/vec4 v0x1268f30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x28c6030_0; + %load/vec4 v0x1267d20_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; + %assign/vec4 v0x12686e0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c7a70_0, 0, 4; - %load/vec4 v0x28c6cf0_0; + %store/vec4 v0x1269760_0, 0, 4; + %load/vec4 v0x12689e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x28c6cf0_0; + %load/vec4 v0x12689e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5781,54 +5786,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x28c6cf0_0; - %load/vec4 v0x28c7240_0; + %load/vec4 v0x12689e0_0; + %load/vec4 v0x1268f30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; - %load/vec4 v0x28c7240_0; + %assign/vec4 v0x12686e0_0, 0; + %load/vec4 v0x1268f30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28c7400, 4; - %assign/vec4 v0x28c7320_0, 0; + %load/vec4a v0x12690f0, 4; + %assign/vec4 v0x1269010_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c7240_0; + %load/vec4 v0x1268f30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c71a0_0, 4, 5; + %assign/vec4/off/d v0x1268e90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28c7240_0; + %load/vec4 v0x1268f30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28c7a70_0, 4, 5; - %load/vec4 v0x28c7240_0; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4/off/d v0x1269760_0, 4, 5; + %load/vec4 v0x1268f30_0; + %assign/vec4 v0x1268440_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x28c6c10_0; + %load/vec4 v0x1268900_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5844,93 +5849,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x28c7d10_0; + %load/vec4 v0x1269a00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x28c61b0_0; + %load/vec4 v0x1267ea0_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x28c50e0_0; + %load/vec4 v0x1266dd0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28c7d10_0, 0; + %assign/vec4 v0x1269a00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28c7990_0, 4, 5; - %load/vec4 v0x28c7df0_0; + %assign/vec4/off/d v0x1269680_0, 4, 5; + %load/vec4 v0x1269ae0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28c6ad0, 0, 4; + %assign/vec4/a/d v0x12687c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x1268440_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5938,33 +5943,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x28c7d10_0; + %load/vec4 v0x1269a00_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x28c7b50_0; - %load/vec4 v0x28c7d10_0; + %load/vec4 v0x1269840_0; + %load/vec4 v0x1269a00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x28c7d10_0; + %load/vec4 v0x1269a00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x28c7990_0, 4, 1; + %store/vec4 v0x1269680_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28c69f0_0, 0; - %load/vec4 v0x28c7d10_0; - %assign/vec4 v0x28c6750_0, 0; + %assign/vec4 v0x12686e0_0, 0; + %load/vec4 v0x1269a00_0; + %assign/vec4 v0x1268440_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28c6c10_0, 0; + %assign/vec4 v0x1268900_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5973,19 +5978,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x280ede0; + .scope S_0x12003b0; T_14 ; - %wait E_0x281fc70; - %load/vec4 v0x28c6c10_0; + %wait E_0x11c19c0; + %load/vec4 v0x1268900_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28c69f0_0; + %load/vec4 v0x12686e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x28c3940_0; + %load/vec4 v0x1265630_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -5994,91 +5999,91 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x28c3940_0; - %assign/vec4 v0x28c3860_0, 0; + %load/vec4 v0x1265630_0; + %assign/vec4 v0x1265550_0, 0; T_14.0 ; - %load/vec4 v0x28c6c10_0; + %load/vec4 v0x1268900_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28c71a0_0, 0, 4; + %store/vec4 v0x1268e90_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x2836a60; + .scope S_0x11b0b30; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x28dd1b0_0, 0, 33; + %store/vec4 v0x127f1c0_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x28dd050_0, 0, 1; + %store/vec4 v0x127f060_0, 0, 1; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 1, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 2, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 3, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 4, 0, 11; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 4, 0, 11; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 5, 0, 11; %ix/load 4, 6, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28dd0f0, 4, 0; + %store/vec4a v0x127f100, 4, 0; %pushi/vec4 0, 0, 33; - %store/vec4 v0x28dd1b0_0, 0, 33; + %store/vec4 v0x127f1c0_0, 0, 33; T_15.0 ; - %load/vec4 v0x28dd1b0_0; + %load/vec4 v0x127f1c0_0; %cmpi/u 7, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x28dcfb0_0, 0, 1; + %store/vec4 v0x127efc0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x28dcfb0_0, 0, 1; + %store/vec4 v0x127efc0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x28dcfb0_0, 0, 1; + %store/vec4 v0x127efc0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x28dcfb0_0, 0, 1; + %store/vec4 v0x127efc0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x28dcfb0_0, 0, 1; + %store/vec4 v0x127efc0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x28dcfb0_0, 0, 1; + %store/vec4 v0x127efc0_0, 0, 1; %delay 1, 0; - %vpi_call 2 53 "$display", "acc = %d", v0x28dce60_0 {0 0 0}; - %load/vec4 v0x28dce60_0; - %ix/getv 4, v0x28dd1b0_0; - %load/vec4a v0x28dd0f0, 4; + %vpi_call 2 53 "$display", "acc = %d", v0x127ee70_0 {0 0 0}; + %load/vec4 v0x127ee70_0; + %ix/getv 4, v0x127f1c0_0; + %load/vec4a v0x127f100, 4; %cmp/ne; %jmp/0xz T_15.2, 4; - %vpi_call 2 55 "$display", "anyRead failed on test %d", v0x28dd1b0_0 {0 0 0}; + %vpi_call 2 55 "$display", "anyRead failed on test %d", v0x127f1c0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x28dd050_0, 0, 1; + %store/vec4 v0x127f060_0, 0, 1; T_15.2 ; - %load/vec4 v0x28dd1b0_0; + %load/vec4 v0x127f1c0_0; %addi 1, 0, 33; - %store/vec4 v0x28dd1b0_0, 0, 33; + %store/vec4 v0x127f1c0_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x28dd050_0; + %load/vec4 v0x127f060_0; %flag_set/vec4 8; %jmp/0xz T_15.4, 8; %vpi_call 2 60 "$display", "DUT passed anyRead" {0 0 0}; diff --git a/anyRead/up.dat b/anyRead/up.dat index e8b37d3..ac98802 100644 --- a/anyRead/up.dat +++ b/anyRead/up.dat @@ -1,16 +1,16 @@ 010010100000000011 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyWrite/center.dat b/anyWrite/center.dat index ed213ab..afb975f 100644 --- a/anyWrite/center.dat +++ b/anyWrite/center.dat @@ -4,13 +4,13 @@ 010011100000000100 001100111000000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyWrite/left.dat b/anyWrite/left.dat index 56859e5..515671a 100644 --- a/anyWrite/left.dat +++ b/anyWrite/left.dat @@ -1,16 +1,16 @@ 001100101100000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyWrite/right.dat b/anyWrite/right.dat index b28e75e..05f61fe 100644 --- a/anyWrite/right.dat +++ b/anyWrite/right.dat @@ -1,16 +1,16 @@ 001100101000000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/anyWrite/test b/anyWrite/test index a8017bd..eee6050 100755 --- a/anyWrite/test +++ b/anyWrite/test @@ -6,25 +6,25 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x2585810 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x27b21e0 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x2653d80_0 .net "C2D", 14 0, L_0x2678600; 1 drivers -v0x2653eb0_0 .net "C2L", 14 0, L_0x2678320; 1 drivers -v0x2653fc0_0 .net "C2R", 14 0, L_0x2678cf0; 1 drivers -v0x26540b0_0 .net "C2U", 14 0, L_0x2678050; 1 drivers -v0x26541c0_0 .net "D2C", 14 0, L_0x2673e60; 1 drivers -v0x2654320_0 .net "L2C", 14 0, L_0x2668610; 1 drivers -v0x2654430_0 .net "R2C", 14 0, L_0x266bf90; 1 drivers -v0x2654540_0 .net "U2C", 14 0, L_0x26702c0; 1 drivers -v0x2654650_0 .net/s "accOutCenter", 10 0, L_0x2674c20; 1 drivers -v0x26547a0_0 .net/s "accOutDown", 10 0, L_0x2670bc0; 1 drivers -v0x2654840_0 .net/s "accOutLeft", 10 0, L_0x2654c40; 1 drivers -v0x26548e0_0 .net/s "accOutRight", 10 0, L_0x2668960; 1 drivers -v0x2654980_0 .net/s "accOutUp", 10 0, L_0x266cb10; 1 drivers -v0x2654a20_0 .var "clk", 0 0; -v0x2654ac0_0 .var "dutPassed", 0 0; -v0x2654b60_0 .var "i", 32 0; -S_0x25d50f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x2585810; +v0x2858e40_0 .net "C2D", 14 0, L_0x287d6c0; 1 drivers +v0x2858f70_0 .net "C2L", 14 0, L_0x287d3e0; 1 drivers +v0x2859080_0 .net "C2R", 14 0, L_0x287ddb0; 1 drivers +v0x2859170_0 .net "C2U", 14 0, L_0x287d110; 1 drivers +v0x2859280_0 .net "D2C", 14 0, L_0x2878f20; 1 drivers +v0x28593e0_0 .net "L2C", 14 0, L_0x286d6c0; 1 drivers +v0x28594f0_0 .net "R2C", 14 0, L_0x2871010; 1 drivers +v0x2859600_0 .net "U2C", 14 0, L_0x2875380; 1 drivers +v0x2859710_0 .net/s "accOutCenter", 10 0, L_0x2879ce0; 1 drivers +v0x2859860_0 .net/s "accOutDown", 10 0, L_0x2875c80; 1 drivers +v0x2859900_0 .net/s "accOutLeft", 10 0, L_0x2859d00; 1 drivers +v0x28599a0_0 .net/s "accOutRight", 10 0, L_0x286da10; 1 drivers +v0x2859a40_0 .net/s "accOutUp", 10 0, L_0x2871bd0; 1 drivers +v0x2859ae0_0 .var "clk", 0 0; +v0x2859b80_0 .var "dutPassed", 0 0; +v0x2859c20_0 .var "i", 32 0; +S_0x278a540 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x27b21e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -36,173 +36,174 @@ S_0x25d50f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x2585810; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x2584f40 .param/str "memFile" 0 3 60, "anyWrite/center.dat"; -L_0x2674c20 .functor BUFZ 11, v0x25fb500_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2674eb0 .functor BUFZ 11, v0x25fb500_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2675ce0 .functor BUFZ 18, L_0x2677e60, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x25fb500_0 .var/s "ACC", 10 0; -v0x263ab80_0 .var/s "BAK", 10 0; -v0x263ac60_0 .net "DST", 2 0, L_0x2679180; 1 drivers -v0x263ad50_0 .net/s "IMM", 10 0, L_0x2679220; 1 drivers -v0x263ae30_0 .net "INST", 3 0, L_0x2678960; 1 drivers -v0x263af60_0 .net "LABEL", 3 0, L_0x26793d0; 1 drivers -v0x263b040_0 .var "PC", 3 0; -v0x263b120_0 .var "PCNEXT", 3 0; -v0x263b200_0 .net "SRC", 2 0, L_0x2678f90; 1 drivers -v0x263b370_0 .net *"_s103", 0 0, L_0x26771a0; 1 drivers -v0x263b450_0 .net *"_s107", 0 0, L_0x26770b0; 1 drivers -v0x263b530_0 .net *"_s111", 0 0, L_0x2677390; 1 drivers -v0x263b610_0 .net *"_s115", 0 0, L_0x2677290; 1 drivers -v0x263b6f0_0 .net *"_s119", 0 0, L_0x26775d0; 1 drivers -v0x263b7d0_0 .net *"_s123", 0 0, L_0x26774c0; 1 drivers -v0x263b8b0_0 .net *"_s127", 0 0, L_0x2677790; 1 drivers -v0x263b990_0 .net *"_s131", 0 0, L_0x2677670; 1 drivers -v0x263bb40_0 .net *"_s135", 0 0, L_0x26779f0; 1 drivers -v0x263bbe0_0 .net *"_s139", 0 0, L_0x26778c0; 1 drivers -v0x263bcc0_0 .net *"_s143", 0 0, L_0x2677bd0; 1 drivers -v0x263bda0_0 .net *"_s147", 0 0, L_0x2677a90; 1 drivers -v0x263be80_0 .net *"_s151", 0 0, L_0x2677dc0; 1 drivers -v0x263bf60_0 .net *"_s155", 0 0, L_0x2677c70; 1 drivers -v0x263c040_0 .net *"_s159", 0 0, L_0x2677d10; 1 drivers -v0x263c120_0 .net *"_s160", 17 0, L_0x2677e60; 1 drivers -v0x263c200_0 .net *"_s162", 5 0, L_0x26781c0; 1 drivers -L_0x2b5f641262a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x263c2e0_0 .net *"_s165", 1 0, L_0x2b5f641262a0; 1 drivers -v0x263e2b0_2 .array/port v0x263e2b0, 2; -v0x263c3c0_0 .net *"_s173", 10 0, v0x263e2b0_2; 1 drivers -v0x263e2b0_3 .array/port v0x263e2b0, 3; -v0x263c4a0_0 .net *"_s179", 10 0, v0x263e2b0_3; 1 drivers -v0x263e2b0_0 .array/port v0x263e2b0, 0; -v0x263c580_0 .net *"_s185", 10 0, v0x263e2b0_0; 1 drivers -v0x263e2b0_1 .array/port v0x263e2b0, 1; -v0x263c660_0 .net *"_s191", 10 0, v0x263e2b0_1; 1 drivers -v0x263c740_0 .net *"_s23", 0 0, L_0x2675680; 1 drivers -v0x263c820_0 .net *"_s27", 0 0, L_0x2675750; 1 drivers -v0x263ba70_0 .net *"_s31", 0 0, L_0x2675820; 1 drivers -v0x263caf0_0 .net *"_s36", 0 0, L_0x26759c0; 1 drivers -v0x263cbd0_0 .net *"_s42", 0 0, L_0x2675ba0; 1 drivers -v0x263ccb0_0 .net *"_s46", 0 0, L_0x2675c40; 1 drivers -v0x263cd90_0 .net *"_s50", 0 0, L_0x2675d50; 1 drivers -v0x263ce70_0 .net *"_s55", 0 0, L_0x2675f60; 1 drivers -v0x263cf50_0 .net *"_s61", 0 0, L_0x26761d0; 1 drivers -v0x263d030_0 .net *"_s65", 0 0, L_0x2676270; 1 drivers -v0x263d110_0 .net *"_s69", 0 0, L_0x26763b0; 1 drivers -v0x263d1f0_0 .net *"_s74", 0 0, L_0x2676310; 1 drivers -v0x263d2d0_0 .net *"_s80", 0 0, L_0x26765e0; 1 drivers -v0x263d3b0_0 .net *"_s84", 0 0, L_0x26769a0; 1 drivers -v0x263d490_0 .net *"_s88", 0 0, L_0x26767d0; 1 drivers -v0x263d570_0 .net *"_s93", 0 0, L_0x2676b50; 1 drivers -v0x263d650_0 .net *"_s99", 0 0, L_0x2676dd0; 1 drivers -v0x263d730_0 .net/s "accOut", 10 0, L_0x2674c20; alias, 1 drivers -v0x263d810_0 .net "anyHasData", 0 0, L_0x2675ab0; 1 drivers -v0x263d8d0_0 .net "anyReadAck", 0 0, L_0x26766e0; 1 drivers -v0x263d990_0 .net "anyWantData", 0 0, L_0x2676050; 1 drivers -v0x263da50_0 .net "anyWriteAck", 0 0, L_0x2677010; 1 drivers -v0x263db10_0 .net "clk", 0 0, v0x2654a20_0; 1 drivers -v0x263dbd0_0 .net "down", 14 0, L_0x2673e60; alias, 1 drivers -v0x263dcb0_0 .net "downOut", 14 0, L_0x2678600; alias, 1 drivers -v0x263dd90_0 .net "instruction", 17 0, L_0x2675ce0; 1 drivers -v0x263de70 .array "instructions", 15 0, 17 0; -v0x263df30_0 .var "last", 2 0; -v0x263e010_0 .net "left", 14 0, L_0x2668610; alias, 1 drivers -v0x263e0f0_0 .net "leftOut", 14 0, L_0x2678320; alias, 1 drivers -v0x263e1d0_0 .var "mode", 2 0; -v0x263e2b0 .array/s "outVals", 2 5, 10 0; -v0x263e3f0_0 .var "phase", 2 0; -v0x263e4d0_0 .net "portsHaveData", 5 2, L_0x26758c0; 1 drivers -v0x263c8c0_0 .net "portsWantData", 5 2, L_0x2675df0; 1 drivers -v0x263c9a0_0 .net "readAckIn", 5 2, L_0x2676450; 1 drivers -v0x263e980_0 .var "readAckOut", 5 2; -v0x263ea20_0 .var "readTarget", 2 0; -v0x263eb00_0 .var/s "readValue", 10 0; -L_0x2b5f64126258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x263ebe0 .array "regVals", 0 7; -v0x263ebe0_0 .net/s v0x263ebe0 0, 10 0, L_0x2b5f64126258; 1 drivers -v0x263ebe0_1 .net/s v0x263ebe0 1, 10 0, L_0x2674eb0; 1 drivers -v0x263ebe0_2 .net/s v0x263ebe0 2, 10 0, L_0x2675190; 1 drivers -v0x263ebe0_3 .net/s v0x263ebe0 3, 10 0, L_0x26752c0; 1 drivers -v0x263ebe0_4 .net/s v0x263ebe0 4, 10 0, L_0x26753f0; 1 drivers -v0x263ebe0_5 .net/s v0x263ebe0 5, 10 0, L_0x2675520; 1 drivers -o0x2b5f640f5eb8 .functor BUFZ 11, C4; HiZ drive -v0x263ebe0_6 .net/s v0x263ebe0 6, 10 0, o0x2b5f640f5eb8; 0 drivers -o0x2b5f640f5ee8 .functor BUFZ 11, C4; HiZ drive -v0x263ebe0_7 .net/s v0x263ebe0 7, 10 0, o0x2b5f640f5ee8; 0 drivers -v0x263edf0_0 .net "right", 14 0, L_0x266bf90; alias, 1 drivers -v0x263eed0_0 .net "rightOut", 14 0, L_0x2678cf0; alias, 1 drivers -v0x263efb0_0 .net "up", 14 0, L_0x26702c0; alias, 1 drivers -v0x263f090_0 .net "upOut", 14 0, L_0x2678050; alias, 1 drivers -v0x263f170_0 .var "weHaveData", 5 2; -v0x263f250_0 .var "weWantData", 5 2; -v0x263f330_0 .net "writeAckIn", 5 2, L_0x2676d30; 1 drivers -v0x263f410_0 .var "writeAckOut", 5 2; -v0x263f4f0_0 .var "writeTarget", 2 0; -v0x263f5d0_0 .var/s "writeValue", 10 0; -E_0x25966a0 .event negedge, v0x263db10_0; -E_0x25b8e20 .event posedge, v0x263db10_0; -L_0x2675190 .part L_0x2668610, 0, 11; -L_0x26752c0 .part L_0x266bf90, 0, 11; -L_0x26753f0 .part L_0x26702c0, 0, 11; -L_0x2675520 .part L_0x2673e60, 0, 11; -L_0x2675680 .part L_0x2668610, 11, 1; -L_0x2675750 .part L_0x266bf90, 11, 1; -L_0x2675820 .part L_0x26702c0, 11, 1; -L_0x26758c0 .concat8 [ 1 1 1 1], L_0x2675680, L_0x2675750, L_0x2675820, L_0x26759c0; -L_0x26759c0 .part L_0x2673e60, 11, 1; -L_0x2675ab0 .reduce/or L_0x26758c0; -L_0x2675ba0 .part L_0x2668610, 12, 1; -L_0x2675c40 .part L_0x266bf90, 12, 1; -L_0x2675d50 .part L_0x26702c0, 12, 1; -L_0x2675df0 .concat8 [ 1 1 1 1], L_0x2675ba0, L_0x2675c40, L_0x2675d50, L_0x2675f60; -L_0x2675f60 .part L_0x2673e60, 12, 1; -L_0x2676050 .reduce/or L_0x2675df0; -L_0x26761d0 .part L_0x2668610, 13, 1; -L_0x2676270 .part L_0x266bf90, 13, 1; -L_0x26763b0 .part L_0x26702c0, 13, 1; -L_0x2676450 .concat8 [ 1 1 1 1], L_0x26761d0, L_0x2676270, L_0x26763b0, L_0x2676310; -L_0x2676310 .part L_0x2673e60, 13, 1; -L_0x26766e0 .reduce/or L_0x2676450; -L_0x26765e0 .part L_0x2668610, 14, 1; -L_0x26769a0 .part L_0x266bf90, 14, 1; -L_0x26767d0 .part L_0x26702c0, 14, 1; -L_0x2676d30 .concat8 [ 1 1 1 1], L_0x26765e0, L_0x26769a0, L_0x26767d0, L_0x2676b50; -L_0x2676b50 .part L_0x2673e60, 14, 1; -L_0x2677010 .reduce/or L_0x2676d30; -L_0x2676dd0 .part v0x263e980_0, 0, 1; -L_0x26771a0 .part v0x263e980_0, 1, 1; -L_0x26770b0 .part v0x263e980_0, 2, 1; -L_0x2677390 .part v0x263e980_0, 3, 1; -L_0x2677290 .part v0x263f410_0, 0, 1; -L_0x26775d0 .part v0x263f410_0, 1, 1; -L_0x26774c0 .part v0x263f410_0, 2, 1; -L_0x2677790 .part v0x263f410_0, 3, 1; -L_0x2677670 .part v0x263f250_0, 0, 1; -L_0x26779f0 .part v0x263f250_0, 1, 1; -L_0x26778c0 .part v0x263f250_0, 2, 1; -L_0x2677bd0 .part v0x263f250_0, 3, 1; -L_0x2677a90 .part v0x263f170_0, 0, 1; -L_0x2677dc0 .part v0x263f170_0, 1, 1; -L_0x2677c70 .part v0x263f170_0, 2, 1; -L_0x2677d10 .part v0x263f170_0, 3, 1; -L_0x2677e60 .array/port v0x263de70, L_0x26781c0; -L_0x26781c0 .concat [ 4 2 0 0], v0x263b040_0, L_0x2b5f641262a0; -LS_0x2678050_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_2, L_0x2677c70, L_0x26778c0, L_0x26774c0; -LS_0x2678050_0_4 .concat8 [ 1 0 0 0], L_0x26770b0; -L_0x2678050 .concat8 [ 14 1 0 0], LS_0x2678050_0_0, LS_0x2678050_0_4; -LS_0x2678600_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_3, L_0x2677d10, L_0x2677bd0, L_0x2677790; -LS_0x2678600_0_4 .concat8 [ 1 0 0 0], L_0x2677390; -L_0x2678600 .concat8 [ 14 1 0 0], LS_0x2678600_0_0, LS_0x2678600_0_4; -LS_0x2678320_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_0, L_0x2677a90, L_0x2677670, L_0x2677290; -LS_0x2678320_0_4 .concat8 [ 1 0 0 0], L_0x2676dd0; -L_0x2678320 .concat8 [ 14 1 0 0], LS_0x2678320_0_0, LS_0x2678320_0_4; -LS_0x2678cf0_0_0 .concat8 [ 11 1 1 1], v0x263e2b0_1, L_0x2677dc0, L_0x26779f0, L_0x26775d0; -LS_0x2678cf0_0_4 .concat8 [ 1 0 0 0], L_0x26771a0; -L_0x2678cf0 .concat8 [ 14 1 0 0], LS_0x2678cf0_0_0, LS_0x2678cf0_0_4; -L_0x2678960 .part L_0x2675ce0, 14, 4; -L_0x2679180 .part L_0x2675ce0, 11, 3; -L_0x2678f90 .part L_0x2675ce0, 8, 3; -L_0x26793d0 .part L_0x2675ce0, 10, 4; -L_0x2679220 .part L_0x2675ce0, 0, 11; -S_0x263f850 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x2585810; +P_0x27da600 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x27da640 .param/str "memFile" 0 3 60, "anyWrite/center.dat"; +L_0x2879ce0 .functor BUFZ 11, v0x2800240_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2879f70 .functor BUFZ 11, v0x2800240_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x287ada0 .functor BUFZ 18, L_0x287cf20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2800240_0 .var/s "ACC", 10 0; +v0x283f930_0 .var/s "BAK", 10 0; +v0x283fa10_0 .net "DST", 2 0, L_0x287e240; 1 drivers +v0x283fb00_0 .net/s "IMM", 10 0, L_0x287e2e0; 1 drivers +v0x283fbe0_0 .net "INST", 3 0, L_0x287da20; 1 drivers +v0x283fd10_0 .net "LABEL", 3 0, L_0x287e490; 1 drivers +v0x283fdf0_0 .var "PC", 3 0; +v0x283fed0_0 .var "PCNEXT", 3 0; +v0x283ffb0_0 .net "SRC", 2 0, L_0x287e050; 1 drivers +v0x2840120_0 .net *"_s103", 0 0, L_0x287c260; 1 drivers +v0x2840200_0 .net *"_s107", 0 0, L_0x287c170; 1 drivers +v0x28402e0_0 .net *"_s111", 0 0, L_0x287c450; 1 drivers +v0x28403c0_0 .net *"_s115", 0 0, L_0x287c350; 1 drivers +v0x28404a0_0 .net *"_s119", 0 0, L_0x287c690; 1 drivers +v0x2840580_0 .net *"_s123", 0 0, L_0x287c580; 1 drivers +v0x2840660_0 .net *"_s127", 0 0, L_0x287c850; 1 drivers +v0x2840740_0 .net *"_s131", 0 0, L_0x287c730; 1 drivers +v0x28408f0_0 .net *"_s135", 0 0, L_0x287cab0; 1 drivers +v0x2840990_0 .net *"_s139", 0 0, L_0x287c980; 1 drivers +v0x2840a70_0 .net *"_s143", 0 0, L_0x287cc90; 1 drivers +v0x2840b50_0 .net *"_s147", 0 0, L_0x287cb50; 1 drivers +v0x2840c30_0 .net *"_s151", 0 0, L_0x287ce80; 1 drivers +v0x2840d10_0 .net *"_s155", 0 0, L_0x287cd30; 1 drivers +v0x2840df0_0 .net *"_s159", 0 0, L_0x287cdd0; 1 drivers +v0x2840ed0_0 .net *"_s160", 17 0, L_0x287cf20; 1 drivers +v0x2840fb0_0 .net *"_s162", 5 0, L_0x287d280; 1 drivers +L_0x2b28706ce2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2841090_0 .net *"_s165", 1 0, L_0x2b28706ce2a0; 1 drivers +v0x2843060_2 .array/port v0x2843060, 2; +v0x2841170_0 .net *"_s173", 10 0, v0x2843060_2; 1 drivers +v0x2843060_3 .array/port v0x2843060, 3; +v0x2841250_0 .net *"_s179", 10 0, v0x2843060_3; 1 drivers +v0x2843060_0 .array/port v0x2843060, 0; +v0x2841330_0 .net *"_s185", 10 0, v0x2843060_0; 1 drivers +v0x2843060_1 .array/port v0x2843060, 1; +v0x2841410_0 .net *"_s191", 10 0, v0x2843060_1; 1 drivers +v0x28414f0_0 .net *"_s23", 0 0, L_0x287a740; 1 drivers +v0x28415d0_0 .net *"_s27", 0 0, L_0x287a810; 1 drivers +v0x2840820_0 .net *"_s31", 0 0, L_0x287a8e0; 1 drivers +v0x28418a0_0 .net *"_s36", 0 0, L_0x287aa80; 1 drivers +v0x2841980_0 .net *"_s42", 0 0, L_0x287ac60; 1 drivers +v0x2841a60_0 .net *"_s46", 0 0, L_0x287ad00; 1 drivers +v0x2841b40_0 .net *"_s50", 0 0, L_0x287ae10; 1 drivers +v0x2841c20_0 .net *"_s55", 0 0, L_0x287b020; 1 drivers +v0x2841d00_0 .net *"_s61", 0 0, L_0x287b290; 1 drivers +v0x2841de0_0 .net *"_s65", 0 0, L_0x287b330; 1 drivers +v0x2841ec0_0 .net *"_s69", 0 0, L_0x287b470; 1 drivers +v0x2841fa0_0 .net *"_s74", 0 0, L_0x287b3d0; 1 drivers +v0x2842080_0 .net *"_s80", 0 0, L_0x287b6a0; 1 drivers +v0x2842160_0 .net *"_s84", 0 0, L_0x287ba60; 1 drivers +v0x2842240_0 .net *"_s88", 0 0, L_0x287b890; 1 drivers +v0x2842320_0 .net *"_s93", 0 0, L_0x287bc10; 1 drivers +v0x2842400_0 .net *"_s99", 0 0, L_0x287be90; 1 drivers +v0x28424e0_0 .net/s "accOut", 10 0, L_0x2879ce0; alias, 1 drivers +v0x28425c0_0 .net "anyHasData", 0 0, L_0x287ab70; 1 drivers +v0x2842680_0 .net "anyReadAck", 0 0, L_0x287b7a0; 1 drivers +v0x2842740_0 .net "anyWantData", 0 0, L_0x287b110; 1 drivers +v0x2842800_0 .net "anyWriteAck", 0 0, L_0x287c0d0; 1 drivers +v0x28428c0_0 .net "clk", 0 0, v0x2859ae0_0; 1 drivers +v0x2842980_0 .net "down", 14 0, L_0x2878f20; alias, 1 drivers +v0x2842a60_0 .net "downOut", 14 0, L_0x287d6c0; alias, 1 drivers +v0x2842b40_0 .net "instruction", 17 0, L_0x287ada0; 1 drivers +v0x2842c20 .array "instructions", 15 0, 17 0; +v0x2842ce0_0 .var "last", 2 0; +v0x2842dc0_0 .net "left", 14 0, L_0x286d6c0; alias, 1 drivers +v0x2842ea0_0 .net "leftOut", 14 0, L_0x287d3e0; alias, 1 drivers +v0x2842f80_0 .var "mode", 2 0; +v0x2843060 .array/s "outVals", 2 5, 10 0; +v0x28431a0_0 .var "phase", 2 0; +v0x2843280_0 .net "portsHaveData", 5 2, L_0x287a980; 1 drivers +v0x2841670_0 .net "portsWantData", 5 2, L_0x287aeb0; 1 drivers +v0x2841750_0 .net "readAckIn", 5 2, L_0x287b510; 1 drivers +v0x2843730_0 .var "readAckOut", 5 2; +v0x28437d0_0 .var "readTarget", 2 0; +v0x28438b0_0 .var/s "readValue", 10 0; +L_0x2b28706ce258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2843990 .array "regVals", 0 7; +v0x2843990_0 .net/s v0x2843990 0, 10 0, L_0x2b28706ce258; 1 drivers +v0x2843990_1 .net/s v0x2843990 1, 10 0, L_0x2879f70; 1 drivers +v0x2843990_2 .net/s v0x2843990 2, 10 0, L_0x287a250; 1 drivers +v0x2843990_3 .net/s v0x2843990 3, 10 0, L_0x287a380; 1 drivers +v0x2843990_4 .net/s v0x2843990 4, 10 0, L_0x287a4b0; 1 drivers +v0x2843990_5 .net/s v0x2843990 5, 10 0, L_0x287a5e0; 1 drivers +o0x2b287069deb8 .functor BUFZ 11, C4; HiZ drive +v0x2843990_6 .net/s v0x2843990 6, 10 0, o0x2b287069deb8; 0 drivers +o0x2b287069dee8 .functor BUFZ 11, C4; HiZ drive +v0x2843990_7 .net/s v0x2843990 7, 10 0, o0x2b287069dee8; 0 drivers +v0x2843ba0_0 .net "right", 14 0, L_0x2871010; alias, 1 drivers +v0x2843c80_0 .net "rightOut", 14 0, L_0x287ddb0; alias, 1 drivers +v0x2843d60_0 .net "up", 14 0, L_0x2875380; alias, 1 drivers +v0x2843e40_0 .net "upOut", 14 0, L_0x287d110; alias, 1 drivers +v0x2843f20_0 .var "weHaveData", 5 2; +v0x2844000_0 .var "weWantData", 5 2; +v0x28440e0_0 .net "writeAckIn", 5 2, L_0x287bdf0; 1 drivers +v0x28441c0_0 .var "writeAckOut", 5 2; +v0x28442a0_0 .var "writeTarget", 2 0; +v0x2844380_0 .var/s "writeValue", 10 0; +E_0x279b3d0 .event negedge, v0x28428c0_0; +E_0x27bdb80 .event posedge, v0x28428c0_0; +L_0x287a250 .part L_0x286d6c0, 0, 11; +L_0x287a380 .part L_0x2871010, 0, 11; +L_0x287a4b0 .part L_0x2875380, 0, 11; +L_0x287a5e0 .part L_0x2878f20, 0, 11; +L_0x287a740 .part L_0x286d6c0, 11, 1; +L_0x287a810 .part L_0x2871010, 11, 1; +L_0x287a8e0 .part L_0x2875380, 11, 1; +L_0x287a980 .concat8 [ 1 1 1 1], L_0x287a740, L_0x287a810, L_0x287a8e0, L_0x287aa80; +L_0x287aa80 .part L_0x2878f20, 11, 1; +L_0x287ab70 .reduce/or L_0x287a980; +L_0x287ac60 .part L_0x286d6c0, 12, 1; +L_0x287ad00 .part L_0x2871010, 12, 1; +L_0x287ae10 .part L_0x2875380, 12, 1; +L_0x287aeb0 .concat8 [ 1 1 1 1], L_0x287ac60, L_0x287ad00, L_0x287ae10, L_0x287b020; +L_0x287b020 .part L_0x2878f20, 12, 1; +L_0x287b110 .reduce/or L_0x287aeb0; +L_0x287b290 .part L_0x286d6c0, 13, 1; +L_0x287b330 .part L_0x2871010, 13, 1; +L_0x287b470 .part L_0x2875380, 13, 1; +L_0x287b510 .concat8 [ 1 1 1 1], L_0x287b290, L_0x287b330, L_0x287b470, L_0x287b3d0; +L_0x287b3d0 .part L_0x2878f20, 13, 1; +L_0x287b7a0 .reduce/or L_0x287b510; +L_0x287b6a0 .part L_0x286d6c0, 14, 1; +L_0x287ba60 .part L_0x2871010, 14, 1; +L_0x287b890 .part L_0x2875380, 14, 1; +L_0x287bdf0 .concat8 [ 1 1 1 1], L_0x287b6a0, L_0x287ba60, L_0x287b890, L_0x287bc10; +L_0x287bc10 .part L_0x2878f20, 14, 1; +L_0x287c0d0 .reduce/or L_0x287bdf0; +L_0x287be90 .part v0x2843730_0, 0, 1; +L_0x287c260 .part v0x2843730_0, 1, 1; +L_0x287c170 .part v0x2843730_0, 2, 1; +L_0x287c450 .part v0x2843730_0, 3, 1; +L_0x287c350 .part v0x28441c0_0, 0, 1; +L_0x287c690 .part v0x28441c0_0, 1, 1; +L_0x287c580 .part v0x28441c0_0, 2, 1; +L_0x287c850 .part v0x28441c0_0, 3, 1; +L_0x287c730 .part v0x2844000_0, 0, 1; +L_0x287cab0 .part v0x2844000_0, 1, 1; +L_0x287c980 .part v0x2844000_0, 2, 1; +L_0x287cc90 .part v0x2844000_0, 3, 1; +L_0x287cb50 .part v0x2843f20_0, 0, 1; +L_0x287ce80 .part v0x2843f20_0, 1, 1; +L_0x287cd30 .part v0x2843f20_0, 2, 1; +L_0x287cdd0 .part v0x2843f20_0, 3, 1; +L_0x287cf20 .array/port v0x2842c20, L_0x287d280; +L_0x287d280 .concat [ 4 2 0 0], v0x283fdf0_0, L_0x2b28706ce2a0; +LS_0x287d110_0_0 .concat8 [ 11 1 1 1], v0x2843060_2, L_0x287cd30, L_0x287c980, L_0x287c580; +LS_0x287d110_0_4 .concat8 [ 1 0 0 0], L_0x287c170; +L_0x287d110 .concat8 [ 14 1 0 0], LS_0x287d110_0_0, LS_0x287d110_0_4; +LS_0x287d6c0_0_0 .concat8 [ 11 1 1 1], v0x2843060_3, L_0x287cdd0, L_0x287cc90, L_0x287c850; +LS_0x287d6c0_0_4 .concat8 [ 1 0 0 0], L_0x287c450; +L_0x287d6c0 .concat8 [ 14 1 0 0], LS_0x287d6c0_0_0, LS_0x287d6c0_0_4; +LS_0x287d3e0_0_0 .concat8 [ 11 1 1 1], v0x2843060_0, L_0x287cb50, L_0x287c730, L_0x287c350; +LS_0x287d3e0_0_4 .concat8 [ 1 0 0 0], L_0x287be90; +L_0x287d3e0 .concat8 [ 14 1 0 0], LS_0x287d3e0_0_0, LS_0x287d3e0_0_4; +LS_0x287ddb0_0_0 .concat8 [ 11 1 1 1], v0x2843060_1, L_0x287ce80, L_0x287cab0, L_0x287c690; +LS_0x287ddb0_0_4 .concat8 [ 1 0 0 0], L_0x287c260; +L_0x287ddb0 .concat8 [ 14 1 0 0], LS_0x287ddb0_0_0, LS_0x287ddb0_0_4; +L_0x287da20 .part L_0x287ada0, 14, 4; +L_0x287e240 .part L_0x287ada0, 11, 3; +L_0x287e050 .part L_0x287ada0, 8, 3; +L_0x287e490 .part L_0x287ada0, 10, 4; +L_0x287e2e0 .part L_0x287ada0, 0, 11; +S_0x2844600 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x27b21e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -214,174 +215,175 @@ S_0x263f850 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x2585810; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x263fa40 .param/str "memFile" 0 3 60, "anyWrite/down.dat"; -L_0x2670bc0 .functor BUFZ 11, v0x263fd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2670dc0 .functor BUFZ 11, v0x263fd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2671c80 .functor BUFZ 18, L_0x2673bf0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x263fd10_0 .var/s "ACC", 10 0; -v0x263fe10_0 .var/s "BAK", 10 0; -v0x263fef0_0 .net "DST", 2 0, L_0x2674ce0; 1 drivers -v0x263ffb0_0 .net/s "IMM", 10 0, L_0x2674d80; 1 drivers -v0x2640090_0 .net "INST", 3 0, L_0x26745c0; 1 drivers -v0x2640170_0 .net "LABEL", 3 0, L_0x2674f30; 1 drivers -v0x2640250_0 .var "PC", 3 0; -v0x2640330_0 .var "PCNEXT", 3 0; -v0x2640410_0 .net "SRC", 2 0, L_0x2674af0; 1 drivers -v0x2640580_0 .net *"_s103", 0 0, L_0x2672f30; 1 drivers -v0x2640660_0 .net *"_s107", 0 0, L_0x2672e40; 1 drivers -v0x2640740_0 .net *"_s111", 0 0, L_0x2673120; 1 drivers -v0x2640820_0 .net *"_s115", 0 0, L_0x2673020; 1 drivers -v0x2640900_0 .net *"_s119", 0 0, L_0x2673360; 1 drivers -v0x26409e0_0 .net *"_s123", 0 0, L_0x2673250; 1 drivers -v0x2640ac0_0 .net *"_s127", 0 0, L_0x2673520; 1 drivers -v0x2640ba0_0 .net *"_s131", 0 0, L_0x2673400; 1 drivers -v0x2640d50_0 .net *"_s135", 0 0, L_0x2673780; 1 drivers -v0x2640df0_0 .net *"_s139", 0 0, L_0x2673650; 1 drivers -v0x2640ed0_0 .net *"_s143", 0 0, L_0x2673960; 1 drivers -v0x2640fb0_0 .net *"_s147", 0 0, L_0x2673820; 1 drivers -v0x2641090_0 .net *"_s151", 0 0, L_0x2673b50; 1 drivers -v0x2641170_0 .net *"_s155", 0 0, L_0x2673a00; 1 drivers -v0x2641250_0 .net *"_s159", 0 0, L_0x2673aa0; 1 drivers -v0x2641330_0 .net *"_s160", 17 0, L_0x2673bf0; 1 drivers -v0x2641410_0 .net *"_s162", 5 0, L_0x2673f50; 1 drivers -L_0x2b5f64126210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x26414f0_0 .net *"_s165", 1 0, L_0x2b5f64126210; 1 drivers -v0x2643480_2 .array/port v0x2643480, 2; -v0x26415d0_0 .net *"_s173", 10 0, v0x2643480_2; 1 drivers -v0x2643480_3 .array/port v0x2643480, 3; -v0x26416b0_0 .net *"_s179", 10 0, v0x2643480_3; 1 drivers -v0x2643480_0 .array/port v0x2643480, 0; -v0x2641790_0 .net *"_s185", 10 0, v0x2643480_0; 1 drivers -v0x2643480_1 .array/port v0x2643480, 1; -v0x2641870_0 .net *"_s191", 10 0, v0x2643480_1; 1 drivers -v0x2641950_0 .net *"_s23", 0 0, L_0x2671410; 1 drivers -v0x2641a30_0 .net *"_s27", 0 0, L_0x2671530; 1 drivers -v0x2640c80_0 .net *"_s31", 0 0, L_0x2671620; 1 drivers -v0x2641d00_0 .net *"_s36", 0 0, L_0x2671910; 1 drivers -v0x2641de0_0 .net *"_s42", 0 0, L_0x2671b40; 1 drivers -v0x2641ec0_0 .net *"_s46", 0 0, L_0x2671be0; 1 drivers -v0x2641fa0_0 .net *"_s50", 0 0, L_0x2671cf0; 1 drivers -v0x2642080_0 .net *"_s55", 0 0, L_0x2671f00; 1 drivers -v0x2642160_0 .net *"_s61", 0 0, L_0x2672170; 1 drivers -v0x2642240_0 .net *"_s65", 0 0, L_0x26722a0; 1 drivers -v0x2642320_0 .net *"_s69", 0 0, L_0x2672470; 1 drivers -v0x2642400_0 .net *"_s74", 0 0, L_0x26723d0; 1 drivers -v0x26424e0_0 .net *"_s80", 0 0, L_0x2672600; 1 drivers -v0x26425c0_0 .net *"_s84", 0 0, L_0x26728f0; 1 drivers -v0x26426a0_0 .net *"_s88", 0 0, L_0x2672830; 1 drivers -v0x2642780_0 .net *"_s93", 0 0, L_0x2672990; 1 drivers -v0x2642860_0 .net *"_s99", 0 0, L_0x2672c20; 1 drivers -v0x2642940_0 .net/s "accOut", 10 0, L_0x2670bc0; alias, 1 drivers -v0x2642a20_0 .net "anyHasData", 0 0, L_0x2671a50; 1 drivers -v0x2642ae0_0 .net "anyReadAck", 0 0, L_0x2672790; 1 drivers -v0x2642ba0_0 .net "anyWantData", 0 0, L_0x2671ff0; 1 drivers -v0x2642c60_0 .net "anyWriteAck", 0 0, L_0x2672d50; 1 drivers -v0x2642d20_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers -o0x2b5f640f6cc8 .functor BUFZ 15, C4; HiZ drive -v0x2642dc0_0 .net "down", 14 0, o0x2b5f640f6cc8; 0 drivers -v0x2642e80_0 .net "downOut", 14 0, L_0x2674320; 1 drivers -v0x2642f60_0 .net "instruction", 17 0, L_0x2671c80; 1 drivers -v0x2643040 .array "instructions", 15 0, 17 0; -v0x2643100_0 .var "last", 2 0; -o0x2b5f640f6d88 .functor BUFZ 15, C4; HiZ drive -v0x26431e0_0 .net "left", 14 0, o0x2b5f640f6d88; 0 drivers -v0x26432c0_0 .net "leftOut", 14 0, L_0x26740b0; 1 drivers -v0x26433a0_0 .var "mode", 2 0; -v0x2643480 .array/s "outVals", 2 5, 10 0; -v0x26435c0_0 .var "phase", 2 0; -v0x26436a0_0 .net "portsHaveData", 5 2, L_0x2671750; 1 drivers -v0x2641ad0_0 .net "portsWantData", 5 2, L_0x2671d90; 1 drivers -v0x2641bb0_0 .net "readAckIn", 5 2, L_0x2672510; 1 drivers -v0x2643b50_0 .var "readAckOut", 5 2; -v0x2643bf0_0 .var "readTarget", 2 0; -v0x2643c90_0 .var/s "readValue", 10 0; -L_0x2b5f641261c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x2643d30 .array "regVals", 0 7; -v0x2643d30_0 .net/s v0x2643d30 0, 10 0, L_0x2b5f641261c8; 1 drivers -v0x2643d30_1 .net/s v0x2643d30 1, 10 0, L_0x2670dc0; 1 drivers -v0x2643d30_2 .net/s v0x2643d30 2, 10 0, L_0x2671130; 1 drivers -v0x2643d30_3 .net/s v0x2643d30 3, 10 0, L_0x26711d0; 1 drivers -v0x2643d30_4 .net/s v0x2643d30 4, 10 0, L_0x2671270; 1 drivers -v0x2643d30_5 .net/s v0x2643d30 5, 10 0, L_0x2671310; 1 drivers -o0x2b5f640f7148 .functor BUFZ 11, C4; HiZ drive -v0x2643d30_6 .net/s v0x2643d30 6, 10 0, o0x2b5f640f7148; 0 drivers -o0x2b5f640f7178 .functor BUFZ 11, C4; HiZ drive -v0x2643d30_7 .net/s v0x2643d30 7, 10 0, o0x2b5f640f7178; 0 drivers -o0x2b5f640f71a8 .functor BUFZ 15, C4; HiZ drive -v0x2643f40_0 .net "right", 14 0, o0x2b5f640f71a8; 0 drivers -v0x2644020_0 .net "rightOut", 14 0, L_0x26748d0; 1 drivers -v0x2644100_0 .net "up", 14 0, L_0x2678600; alias, 1 drivers -v0x26441f0_0 .net "upOut", 14 0, L_0x2673e60; alias, 1 drivers -v0x26442c0_0 .var "weHaveData", 5 2; -v0x2644380_0 .var "weWantData", 5 2; -v0x2644460_0 .net "writeAckIn", 5 2, L_0x2672a60; 1 drivers -v0x2644540_0 .var "writeAckOut", 5 2; -v0x2644620_0 .var "writeTarget", 2 0; -v0x2644700_0 .var/s "writeValue", 10 0; -L_0x2671130 .part o0x2b5f640f6d88, 0, 11; -L_0x26711d0 .part o0x2b5f640f71a8, 0, 11; -L_0x2671270 .part L_0x2678600, 0, 11; -L_0x2671310 .part o0x2b5f640f6cc8, 0, 11; -L_0x2671410 .part o0x2b5f640f6d88, 11, 1; -L_0x2671530 .part o0x2b5f640f71a8, 11, 1; -L_0x2671620 .part L_0x2678600, 11, 1; -L_0x2671750 .concat8 [ 1 1 1 1], L_0x2671410, L_0x2671530, L_0x2671620, L_0x2671910; -L_0x2671910 .part o0x2b5f640f6cc8, 11, 1; -L_0x2671a50 .reduce/or L_0x2671750; -L_0x2671b40 .part o0x2b5f640f6d88, 12, 1; -L_0x2671be0 .part o0x2b5f640f71a8, 12, 1; -L_0x2671cf0 .part L_0x2678600, 12, 1; -L_0x2671d90 .concat8 [ 1 1 1 1], L_0x2671b40, L_0x2671be0, L_0x2671cf0, L_0x2671f00; -L_0x2671f00 .part o0x2b5f640f6cc8, 12, 1; -L_0x2671ff0 .reduce/or L_0x2671d90; -L_0x2672170 .part o0x2b5f640f6d88, 13, 1; -L_0x26722a0 .part o0x2b5f640f71a8, 13, 1; -L_0x2672470 .part L_0x2678600, 13, 1; -L_0x2672510 .concat8 [ 1 1 1 1], L_0x2672170, L_0x26722a0, L_0x2672470, L_0x26723d0; -L_0x26723d0 .part o0x2b5f640f6cc8, 13, 1; -L_0x2672790 .reduce/or L_0x2672510; -L_0x2672600 .part o0x2b5f640f6d88, 14, 1; -L_0x26728f0 .part o0x2b5f640f71a8, 14, 1; -L_0x2672830 .part L_0x2678600, 14, 1; -L_0x2672a60 .concat8 [ 1 1 1 1], L_0x2672600, L_0x26728f0, L_0x2672830, L_0x2672990; -L_0x2672990 .part o0x2b5f640f6cc8, 14, 1; -L_0x2672d50 .reduce/or L_0x2672a60; -L_0x2672c20 .part v0x2643b50_0, 0, 1; -L_0x2672f30 .part v0x2643b50_0, 1, 1; -L_0x2672e40 .part v0x2643b50_0, 2, 1; -L_0x2673120 .part v0x2643b50_0, 3, 1; -L_0x2673020 .part v0x2644540_0, 0, 1; -L_0x2673360 .part v0x2644540_0, 1, 1; -L_0x2673250 .part v0x2644540_0, 2, 1; -L_0x2673520 .part v0x2644540_0, 3, 1; -L_0x2673400 .part v0x2644380_0, 0, 1; -L_0x2673780 .part v0x2644380_0, 1, 1; -L_0x2673650 .part v0x2644380_0, 2, 1; -L_0x2673960 .part v0x2644380_0, 3, 1; -L_0x2673820 .part v0x26442c0_0, 0, 1; -L_0x2673b50 .part v0x26442c0_0, 1, 1; -L_0x2673a00 .part v0x26442c0_0, 2, 1; -L_0x2673aa0 .part v0x26442c0_0, 3, 1; -L_0x2673bf0 .array/port v0x2643040, L_0x2673f50; -L_0x2673f50 .concat [ 4 2 0 0], v0x2640250_0, L_0x2b5f64126210; -LS_0x2673e60_0_0 .concat8 [ 11 1 1 1], v0x2643480_2, L_0x2673a00, L_0x2673650, L_0x2673250; -LS_0x2673e60_0_4 .concat8 [ 1 0 0 0], L_0x2672e40; -L_0x2673e60 .concat8 [ 14 1 0 0], LS_0x2673e60_0_0, LS_0x2673e60_0_4; -LS_0x2674320_0_0 .concat8 [ 11 1 1 1], v0x2643480_3, L_0x2673aa0, L_0x2673960, L_0x2673520; -LS_0x2674320_0_4 .concat8 [ 1 0 0 0], L_0x2673120; -L_0x2674320 .concat8 [ 14 1 0 0], LS_0x2674320_0_0, LS_0x2674320_0_4; -LS_0x26740b0_0_0 .concat8 [ 11 1 1 1], v0x2643480_0, L_0x2673820, L_0x2673400, L_0x2673020; -LS_0x26740b0_0_4 .concat8 [ 1 0 0 0], L_0x2672c20; -L_0x26740b0 .concat8 [ 14 1 0 0], LS_0x26740b0_0_0, LS_0x26740b0_0_4; -LS_0x26748d0_0_0 .concat8 [ 11 1 1 1], v0x2643480_1, L_0x2673b50, L_0x2673780, L_0x2673360; -LS_0x26748d0_0_4 .concat8 [ 1 0 0 0], L_0x2672f30; -L_0x26748d0 .concat8 [ 14 1 0 0], LS_0x26748d0_0_0, LS_0x26748d0_0_4; -L_0x26745c0 .part L_0x2671c80, 14, 4; -L_0x2674ce0 .part L_0x2671c80, 11, 3; -L_0x2674af0 .part L_0x2671c80, 8, 3; -L_0x2674f30 .part L_0x2671c80, 10, 4; -L_0x2674d80 .part L_0x2671c80, 0, 11; -S_0x2644980 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x2585810; +P_0x28447f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x2844830 .param/str "memFile" 0 3 60, "anyWrite/down.dat"; +L_0x2875c80 .functor BUFZ 11, v0x2844b80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2875e80 .functor BUFZ 11, v0x2844b80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2876d40 .functor BUFZ 18, L_0x2878cb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2844b80_0 .var/s "ACC", 10 0; +v0x2844c80_0 .var/s "BAK", 10 0; +v0x2844d60_0 .net "DST", 2 0, L_0x2879da0; 1 drivers +v0x2844e20_0 .net/s "IMM", 10 0, L_0x2879e40; 1 drivers +v0x2844f00_0 .net "INST", 3 0, L_0x2879680; 1 drivers +v0x2844fe0_0 .net "LABEL", 3 0, L_0x2879ff0; 1 drivers +v0x28450c0_0 .var "PC", 3 0; +v0x28451a0_0 .var "PCNEXT", 3 0; +v0x2845280_0 .net "SRC", 2 0, L_0x2879bb0; 1 drivers +v0x28453f0_0 .net *"_s103", 0 0, L_0x2877ff0; 1 drivers +v0x28454d0_0 .net *"_s107", 0 0, L_0x2877f00; 1 drivers +v0x28455b0_0 .net *"_s111", 0 0, L_0x28781e0; 1 drivers +v0x2845690_0 .net *"_s115", 0 0, L_0x28780e0; 1 drivers +v0x2845770_0 .net *"_s119", 0 0, L_0x2878420; 1 drivers +v0x2845850_0 .net *"_s123", 0 0, L_0x2878310; 1 drivers +v0x2845930_0 .net *"_s127", 0 0, L_0x28785e0; 1 drivers +v0x2845a10_0 .net *"_s131", 0 0, L_0x28784c0; 1 drivers +v0x2845bc0_0 .net *"_s135", 0 0, L_0x2878840; 1 drivers +v0x2845c60_0 .net *"_s139", 0 0, L_0x2878710; 1 drivers +v0x2845d40_0 .net *"_s143", 0 0, L_0x2878a20; 1 drivers +v0x2845e20_0 .net *"_s147", 0 0, L_0x28788e0; 1 drivers +v0x2845f00_0 .net *"_s151", 0 0, L_0x2878c10; 1 drivers +v0x2845fe0_0 .net *"_s155", 0 0, L_0x2878ac0; 1 drivers +v0x28460c0_0 .net *"_s159", 0 0, L_0x2878b60; 1 drivers +v0x28461a0_0 .net *"_s160", 17 0, L_0x2878cb0; 1 drivers +v0x2846280_0 .net *"_s162", 5 0, L_0x2879010; 1 drivers +L_0x2b28706ce210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2846360_0 .net *"_s165", 1 0, L_0x2b28706ce210; 1 drivers +v0x28482f0_2 .array/port v0x28482f0, 2; +v0x2846440_0 .net *"_s173", 10 0, v0x28482f0_2; 1 drivers +v0x28482f0_3 .array/port v0x28482f0, 3; +v0x2846520_0 .net *"_s179", 10 0, v0x28482f0_3; 1 drivers +v0x28482f0_0 .array/port v0x28482f0, 0; +v0x2846600_0 .net *"_s185", 10 0, v0x28482f0_0; 1 drivers +v0x28482f0_1 .array/port v0x28482f0, 1; +v0x28466e0_0 .net *"_s191", 10 0, v0x28482f0_1; 1 drivers +v0x28467c0_0 .net *"_s23", 0 0, L_0x28764d0; 1 drivers +v0x28468a0_0 .net *"_s27", 0 0, L_0x28765f0; 1 drivers +v0x2845af0_0 .net *"_s31", 0 0, L_0x28766e0; 1 drivers +v0x2846b70_0 .net *"_s36", 0 0, L_0x28769d0; 1 drivers +v0x2846c50_0 .net *"_s42", 0 0, L_0x2876c00; 1 drivers +v0x2846d30_0 .net *"_s46", 0 0, L_0x2876ca0; 1 drivers +v0x2846e10_0 .net *"_s50", 0 0, L_0x2876db0; 1 drivers +v0x2846ef0_0 .net *"_s55", 0 0, L_0x2876fc0; 1 drivers +v0x2846fd0_0 .net *"_s61", 0 0, L_0x2877230; 1 drivers +v0x28470b0_0 .net *"_s65", 0 0, L_0x2877360; 1 drivers +v0x2847190_0 .net *"_s69", 0 0, L_0x2877530; 1 drivers +v0x2847270_0 .net *"_s74", 0 0, L_0x2877490; 1 drivers +v0x2847350_0 .net *"_s80", 0 0, L_0x28776c0; 1 drivers +v0x2847430_0 .net *"_s84", 0 0, L_0x28779b0; 1 drivers +v0x2847510_0 .net *"_s88", 0 0, L_0x28778f0; 1 drivers +v0x28475f0_0 .net *"_s93", 0 0, L_0x2877a50; 1 drivers +v0x28476d0_0 .net *"_s99", 0 0, L_0x2877ce0; 1 drivers +v0x28477b0_0 .net/s "accOut", 10 0, L_0x2875c80; alias, 1 drivers +v0x2847890_0 .net "anyHasData", 0 0, L_0x2876b10; 1 drivers +v0x2847950_0 .net "anyReadAck", 0 0, L_0x2877850; 1 drivers +v0x2847a10_0 .net "anyWantData", 0 0, L_0x28770b0; 1 drivers +v0x2847ad0_0 .net "anyWriteAck", 0 0, L_0x2877e10; 1 drivers +v0x2847b90_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers +o0x2b287069ecc8 .functor BUFZ 15, C4; HiZ drive +v0x2847c30_0 .net "down", 14 0, o0x2b287069ecc8; 0 drivers +v0x2847cf0_0 .net "downOut", 14 0, L_0x28793e0; 1 drivers +v0x2847dd0_0 .net "instruction", 17 0, L_0x2876d40; 1 drivers +v0x2847eb0 .array "instructions", 15 0, 17 0; +v0x2847f70_0 .var "last", 2 0; +o0x2b287069ed88 .functor BUFZ 15, C4; HiZ drive +v0x2848050_0 .net "left", 14 0, o0x2b287069ed88; 0 drivers +v0x2848130_0 .net "leftOut", 14 0, L_0x2879170; 1 drivers +v0x2848210_0 .var "mode", 2 0; +v0x28482f0 .array/s "outVals", 2 5, 10 0; +v0x2848430_0 .var "phase", 2 0; +v0x2848510_0 .net "portsHaveData", 5 2, L_0x2876810; 1 drivers +v0x2846940_0 .net "portsWantData", 5 2, L_0x2876e50; 1 drivers +v0x2846a20_0 .net "readAckIn", 5 2, L_0x28775d0; 1 drivers +v0x28489c0_0 .var "readAckOut", 5 2; +v0x2848a60_0 .var "readTarget", 2 0; +v0x2848b00_0 .var/s "readValue", 10 0; +L_0x2b28706ce1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2848ba0 .array "regVals", 0 7; +v0x2848ba0_0 .net/s v0x2848ba0 0, 10 0, L_0x2b28706ce1c8; 1 drivers +v0x2848ba0_1 .net/s v0x2848ba0 1, 10 0, L_0x2875e80; 1 drivers +v0x2848ba0_2 .net/s v0x2848ba0 2, 10 0, L_0x28761f0; 1 drivers +v0x2848ba0_3 .net/s v0x2848ba0 3, 10 0, L_0x2876290; 1 drivers +v0x2848ba0_4 .net/s v0x2848ba0 4, 10 0, L_0x2876330; 1 drivers +v0x2848ba0_5 .net/s v0x2848ba0 5, 10 0, L_0x28763d0; 1 drivers +o0x2b287069f148 .functor BUFZ 11, C4; HiZ drive +v0x2848ba0_6 .net/s v0x2848ba0 6, 10 0, o0x2b287069f148; 0 drivers +o0x2b287069f178 .functor BUFZ 11, C4; HiZ drive +v0x2848ba0_7 .net/s v0x2848ba0 7, 10 0, o0x2b287069f178; 0 drivers +o0x2b287069f1a8 .functor BUFZ 15, C4; HiZ drive +v0x2848db0_0 .net "right", 14 0, o0x2b287069f1a8; 0 drivers +v0x2848e90_0 .net "rightOut", 14 0, L_0x2879990; 1 drivers +v0x2848f70_0 .net "up", 14 0, L_0x287d6c0; alias, 1 drivers +v0x2849060_0 .net "upOut", 14 0, L_0x2878f20; alias, 1 drivers +v0x2849130_0 .var "weHaveData", 5 2; +v0x28491f0_0 .var "weWantData", 5 2; +v0x28492d0_0 .net "writeAckIn", 5 2, L_0x2877b20; 1 drivers +v0x28493b0_0 .var "writeAckOut", 5 2; +v0x2849490_0 .var "writeTarget", 2 0; +v0x2849570_0 .var/s "writeValue", 10 0; +L_0x28761f0 .part o0x2b287069ed88, 0, 11; +L_0x2876290 .part o0x2b287069f1a8, 0, 11; +L_0x2876330 .part L_0x287d6c0, 0, 11; +L_0x28763d0 .part o0x2b287069ecc8, 0, 11; +L_0x28764d0 .part o0x2b287069ed88, 11, 1; +L_0x28765f0 .part o0x2b287069f1a8, 11, 1; +L_0x28766e0 .part L_0x287d6c0, 11, 1; +L_0x2876810 .concat8 [ 1 1 1 1], L_0x28764d0, L_0x28765f0, L_0x28766e0, L_0x28769d0; +L_0x28769d0 .part o0x2b287069ecc8, 11, 1; +L_0x2876b10 .reduce/or L_0x2876810; +L_0x2876c00 .part o0x2b287069ed88, 12, 1; +L_0x2876ca0 .part o0x2b287069f1a8, 12, 1; +L_0x2876db0 .part L_0x287d6c0, 12, 1; +L_0x2876e50 .concat8 [ 1 1 1 1], L_0x2876c00, L_0x2876ca0, L_0x2876db0, L_0x2876fc0; +L_0x2876fc0 .part o0x2b287069ecc8, 12, 1; +L_0x28770b0 .reduce/or L_0x2876e50; +L_0x2877230 .part o0x2b287069ed88, 13, 1; +L_0x2877360 .part o0x2b287069f1a8, 13, 1; +L_0x2877530 .part L_0x287d6c0, 13, 1; +L_0x28775d0 .concat8 [ 1 1 1 1], L_0x2877230, L_0x2877360, L_0x2877530, L_0x2877490; +L_0x2877490 .part o0x2b287069ecc8, 13, 1; +L_0x2877850 .reduce/or L_0x28775d0; +L_0x28776c0 .part o0x2b287069ed88, 14, 1; +L_0x28779b0 .part o0x2b287069f1a8, 14, 1; +L_0x28778f0 .part L_0x287d6c0, 14, 1; +L_0x2877b20 .concat8 [ 1 1 1 1], L_0x28776c0, L_0x28779b0, L_0x28778f0, L_0x2877a50; +L_0x2877a50 .part o0x2b287069ecc8, 14, 1; +L_0x2877e10 .reduce/or L_0x2877b20; +L_0x2877ce0 .part v0x28489c0_0, 0, 1; +L_0x2877ff0 .part v0x28489c0_0, 1, 1; +L_0x2877f00 .part v0x28489c0_0, 2, 1; +L_0x28781e0 .part v0x28489c0_0, 3, 1; +L_0x28780e0 .part v0x28493b0_0, 0, 1; +L_0x2878420 .part v0x28493b0_0, 1, 1; +L_0x2878310 .part v0x28493b0_0, 2, 1; +L_0x28785e0 .part v0x28493b0_0, 3, 1; +L_0x28784c0 .part v0x28491f0_0, 0, 1; +L_0x2878840 .part v0x28491f0_0, 1, 1; +L_0x2878710 .part v0x28491f0_0, 2, 1; +L_0x2878a20 .part v0x28491f0_0, 3, 1; +L_0x28788e0 .part v0x2849130_0, 0, 1; +L_0x2878c10 .part v0x2849130_0, 1, 1; +L_0x2878ac0 .part v0x2849130_0, 2, 1; +L_0x2878b60 .part v0x2849130_0, 3, 1; +L_0x2878cb0 .array/port v0x2847eb0, L_0x2879010; +L_0x2879010 .concat [ 4 2 0 0], v0x28450c0_0, L_0x2b28706ce210; +LS_0x2878f20_0_0 .concat8 [ 11 1 1 1], v0x28482f0_2, L_0x2878ac0, L_0x2878710, L_0x2878310; +LS_0x2878f20_0_4 .concat8 [ 1 0 0 0], L_0x2877f00; +L_0x2878f20 .concat8 [ 14 1 0 0], LS_0x2878f20_0_0, LS_0x2878f20_0_4; +LS_0x28793e0_0_0 .concat8 [ 11 1 1 1], v0x28482f0_3, L_0x2878b60, L_0x2878a20, L_0x28785e0; +LS_0x28793e0_0_4 .concat8 [ 1 0 0 0], L_0x28781e0; +L_0x28793e0 .concat8 [ 14 1 0 0], LS_0x28793e0_0_0, LS_0x28793e0_0_4; +LS_0x2879170_0_0 .concat8 [ 11 1 1 1], v0x28482f0_0, L_0x28788e0, L_0x28784c0, L_0x28780e0; +LS_0x2879170_0_4 .concat8 [ 1 0 0 0], L_0x2877ce0; +L_0x2879170 .concat8 [ 14 1 0 0], LS_0x2879170_0_0, LS_0x2879170_0_4; +LS_0x2879990_0_0 .concat8 [ 11 1 1 1], v0x28482f0_1, L_0x2878c10, L_0x2878840, L_0x2878420; +LS_0x2879990_0_4 .concat8 [ 1 0 0 0], L_0x2877ff0; +L_0x2879990 .concat8 [ 14 1 0 0], LS_0x2879990_0_0, LS_0x2879990_0_4; +L_0x2879680 .part L_0x2876d40, 14, 4; +L_0x2879da0 .part L_0x2876d40, 11, 3; +L_0x2879bb0 .part L_0x2876d40, 8, 3; +L_0x2879ff0 .part L_0x2876d40, 10, 4; +L_0x2879e40 .part L_0x2876d40, 0, 11; +S_0x28497f0 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x27b21e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -393,174 +395,175 @@ S_0x2644980 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x2585810; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x2644b80 .param/str "memFile" 0 3 60, "anyWrite/left.dat"; -L_0x2654c40 .functor BUFZ 11, v0x2644e50_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2664ce0 .functor BUFZ 11, v0x2644e50_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2665cd0 .functor BUFZ 18, L_0x2667980, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2644e50_0 .var/s "ACC", 10 0; -v0x2644f50_0 .var/s "BAK", 10 0; -v0x2645030_0 .net "DST", 2 0, L_0x2668a20; 1 drivers -v0x26450f0_0 .net/s "IMM", 10 0, L_0x2668ac0; 1 drivers -v0x26451d0_0 .net "INST", 3 0, L_0x2668300; 1 drivers -v0x26452b0_0 .net "LABEL", 3 0, L_0x2668c70; 1 drivers -v0x2645390_0 .var "PC", 3 0; -v0x2645470_0 .var "PCNEXT", 3 0; -v0x2645550_0 .net "SRC", 2 0, L_0x2668830; 1 drivers -v0x26456c0_0 .net *"_s103", 0 0, L_0x2666d50; 1 drivers -v0x26457a0_0 .net *"_s107", 0 0, L_0x2666c60; 1 drivers -v0x2645880_0 .net *"_s111", 0 0, L_0x2666f40; 1 drivers -v0x2645960_0 .net *"_s115", 0 0, L_0x2666df0; 1 drivers -v0x2645a40_0 .net *"_s119", 0 0, L_0x26670f0; 1 drivers -v0x2645b20_0 .net *"_s123", 0 0, L_0x2666fe0; 1 drivers -v0x2645c00_0 .net *"_s127", 0 0, L_0x26672b0; 1 drivers -v0x2645ce0_0 .net *"_s131", 0 0, L_0x2667190; 1 drivers -v0x2645e90_0 .net *"_s135", 0 0, L_0x2667510; 1 drivers -v0x2645f30_0 .net *"_s139", 0 0, L_0x26673e0; 1 drivers -v0x2644c40_0 .net *"_s143", 0 0, L_0x26676f0; 1 drivers -v0x2645ff0_0 .net *"_s147", 0 0, L_0x26675b0; 1 drivers -v0x26460b0_0 .net *"_s151", 0 0, L_0x26678e0; 1 drivers -v0x2646190_0 .net *"_s155", 0 0, L_0x2667790; 1 drivers -v0x2646270_0 .net *"_s159", 0 0, L_0x2667830; 1 drivers -v0x2646350_0 .net *"_s160", 17 0, L_0x2667980; 1 drivers -v0x2646430_0 .net *"_s162", 5 0, L_0x2667ce0; 1 drivers -L_0x2b5f64126060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x2646510_0 .net *"_s165", 1 0, L_0x2b5f64126060; 1 drivers -v0x2648510_2 .array/port v0x2648510, 2; -v0x26465f0_0 .net *"_s173", 10 0, v0x2648510_2; 1 drivers -v0x2648510_3 .array/port v0x2648510, 3; -v0x26466d0_0 .net *"_s179", 10 0, v0x2648510_3; 1 drivers -v0x2648510_0 .array/port v0x2648510, 0; -v0x26467b0_0 .net *"_s185", 10 0, v0x2648510_0; 1 drivers -v0x2648510_1 .array/port v0x2648510, 1; -v0x2646890_0 .net *"_s191", 10 0, v0x2648510_1; 1 drivers -v0x2646970_0 .net *"_s23", 0 0, L_0x2665140; 1 drivers -v0x2646a50_0 .net *"_s27", 0 0, L_0x2665260; 1 drivers -v0x2645dc0_0 .net *"_s31", 0 0, L_0x26653d0; 1 drivers -v0x2646d20_0 .net *"_s36", 0 0, L_0x2665680; 1 drivers -v0x2646e00_0 .net *"_s42", 0 0, L_0x2665910; 1 drivers -v0x2646ee0_0 .net *"_s46", 0 0, L_0x26659b0; 1 drivers -v0x2646fc0_0 .net *"_s50", 0 0, L_0x2665ac0; 1 drivers -v0x26470a0_0 .net *"_s55", 0 0, L_0x2665d50; 1 drivers -v0x2647180_0 .net *"_s61", 0 0, L_0x2665fc0; 1 drivers -v0x2647260_0 .net *"_s65", 0 0, L_0x26660f0; 1 drivers -v0x2647340_0 .net *"_s69", 0 0, L_0x2666230; 1 drivers -v0x2647420_0 .net *"_s74", 0 0, L_0x2666190; 1 drivers -v0x2647500_0 .net *"_s80", 0 0, L_0x2666420; 1 drivers -v0x26475e0_0 .net *"_s84", 0 0, L_0x2666710; 1 drivers -v0x26476c0_0 .net *"_s88", 0 0, L_0x2666650; 1 drivers -v0x26477a0_0 .net *"_s93", 0 0, L_0x26667b0; 1 drivers -v0x2647880_0 .net *"_s99", 0 0, L_0x2666a40; 1 drivers -v0x2647960_0 .net/s "accOut", 10 0, L_0x2654c40; alias, 1 drivers -v0x2647a40_0 .net "anyHasData", 0 0, L_0x26657c0; 1 drivers -v0x2647b00_0 .net "anyReadAck", 0 0, L_0x26665b0; 1 drivers -v0x2647bc0_0 .net "anyWantData", 0 0, L_0x2665e40; 1 drivers -v0x2647c80_0 .net "anyWriteAck", 0 0, L_0x2666b70; 1 drivers -v0x2647d40_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers -o0x2b5f640f7ef8 .functor BUFZ 15, C4; HiZ drive -v0x2647e30_0 .net "down", 14 0, o0x2b5f640f7ef8; 0 drivers -v0x2647f10_0 .net "downOut", 14 0, L_0x2668060; 1 drivers -v0x2647ff0_0 .net "instruction", 17 0, L_0x2665cd0; 1 drivers -v0x26480d0 .array "instructions", 15 0, 17 0; -v0x2648190_0 .var "last", 2 0; -o0x2b5f640f7fb8 .functor BUFZ 15, C4; HiZ drive -v0x2648270_0 .net "left", 14 0, o0x2b5f640f7fb8; 0 drivers -v0x2648350_0 .net "leftOut", 14 0, L_0x2667e40; 1 drivers -v0x2648430_0 .var "mode", 2 0; -v0x2648510 .array/s "outVals", 2 5, 10 0; -v0x2648650_0 .var "phase", 2 0; -v0x2648730_0 .net "portsHaveData", 5 2, L_0x2665470; 1 drivers -v0x2646b30_0 .net "portsWantData", 5 2, L_0x2665b60; 1 drivers -v0x2646c10_0 .net "readAckIn", 5 2, L_0x26662d0; 1 drivers -v0x2648be0_0 .var "readAckOut", 5 2; -v0x2648cc0_0 .var "readTarget", 2 0; -v0x2648da0_0 .var/s "readValue", 10 0; -L_0x2b5f64126018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x2648e80 .array "regVals", 0 7; -v0x2648e80_0 .net/s v0x2648e80 0, 10 0, L_0x2b5f64126018; 1 drivers -v0x2648e80_1 .net/s v0x2648e80 1, 10 0, L_0x2664ce0; 1 drivers -v0x2648e80_2 .net/s v0x2648e80 2, 10 0, L_0x2664da0; 1 drivers -v0x2648e80_3 .net/s v0x2648e80 3, 10 0, L_0x2664e40; 1 drivers -v0x2648e80_4 .net/s v0x2648e80 4, 10 0, L_0x2664f10; 1 drivers -v0x2648e80_5 .net/s v0x2648e80 5, 10 0, L_0x2665010; 1 drivers -o0x2b5f640f8378 .functor BUFZ 11, C4; HiZ drive -v0x2648e80_6 .net/s v0x2648e80 6, 10 0, o0x2b5f640f8378; 0 drivers -o0x2b5f640f83a8 .functor BUFZ 11, C4; HiZ drive -v0x2648e80_7 .net/s v0x2648e80 7, 10 0, o0x2b5f640f83a8; 0 drivers -v0x2649090_0 .net "right", 14 0, L_0x2678320; alias, 1 drivers -v0x2649180_0 .net "rightOut", 14 0, L_0x2668610; alias, 1 drivers -o0x2b5f640f83d8 .functor BUFZ 15, C4; HiZ drive -v0x2649250_0 .net "up", 14 0, o0x2b5f640f83d8; 0 drivers -v0x2649310_0 .net "upOut", 14 0, L_0x2667b70; 1 drivers -v0x26493f0_0 .var "weHaveData", 5 2; -v0x26494d0_0 .var "weWantData", 5 2; -v0x26495b0_0 .net "writeAckIn", 5 2, L_0x2666880; 1 drivers -v0x2649690_0 .var "writeAckOut", 5 2; -v0x2649770_0 .var "writeTarget", 2 0; -v0x2649850_0 .var/s "writeValue", 10 0; -L_0x2664da0 .part o0x2b5f640f7fb8, 0, 11; -L_0x2664e40 .part L_0x2678320, 0, 11; -L_0x2664f10 .part o0x2b5f640f83d8, 0, 11; -L_0x2665010 .part o0x2b5f640f7ef8, 0, 11; -L_0x2665140 .part o0x2b5f640f7fb8, 11, 1; -L_0x2665260 .part L_0x2678320, 11, 1; -L_0x26653d0 .part o0x2b5f640f83d8, 11, 1; -L_0x2665470 .concat8 [ 1 1 1 1], L_0x2665140, L_0x2665260, L_0x26653d0, L_0x2665680; -L_0x2665680 .part o0x2b5f640f7ef8, 11, 1; -L_0x26657c0 .reduce/or L_0x2665470; -L_0x2665910 .part o0x2b5f640f7fb8, 12, 1; -L_0x26659b0 .part L_0x2678320, 12, 1; -L_0x2665ac0 .part o0x2b5f640f83d8, 12, 1; -L_0x2665b60 .concat8 [ 1 1 1 1], L_0x2665910, L_0x26659b0, L_0x2665ac0, L_0x2665d50; -L_0x2665d50 .part o0x2b5f640f7ef8, 12, 1; -L_0x2665e40 .reduce/or L_0x2665b60; -L_0x2665fc0 .part o0x2b5f640f7fb8, 13, 1; -L_0x26660f0 .part L_0x2678320, 13, 1; -L_0x2666230 .part o0x2b5f640f83d8, 13, 1; -L_0x26662d0 .concat8 [ 1 1 1 1], L_0x2665fc0, L_0x26660f0, L_0x2666230, L_0x2666190; -L_0x2666190 .part o0x2b5f640f7ef8, 13, 1; -L_0x26665b0 .reduce/or L_0x26662d0; -L_0x2666420 .part o0x2b5f640f7fb8, 14, 1; -L_0x2666710 .part L_0x2678320, 14, 1; -L_0x2666650 .part o0x2b5f640f83d8, 14, 1; -L_0x2666880 .concat8 [ 1 1 1 1], L_0x2666420, L_0x2666710, L_0x2666650, L_0x26667b0; -L_0x26667b0 .part o0x2b5f640f7ef8, 14, 1; -L_0x2666b70 .reduce/or L_0x2666880; -L_0x2666a40 .part v0x2648be0_0, 0, 1; -L_0x2666d50 .part v0x2648be0_0, 1, 1; -L_0x2666c60 .part v0x2648be0_0, 2, 1; -L_0x2666f40 .part v0x2648be0_0, 3, 1; -L_0x2666df0 .part v0x2649690_0, 0, 1; -L_0x26670f0 .part v0x2649690_0, 1, 1; -L_0x2666fe0 .part v0x2649690_0, 2, 1; -L_0x26672b0 .part v0x2649690_0, 3, 1; -L_0x2667190 .part v0x26494d0_0, 0, 1; -L_0x2667510 .part v0x26494d0_0, 1, 1; -L_0x26673e0 .part v0x26494d0_0, 2, 1; -L_0x26676f0 .part v0x26494d0_0, 3, 1; -L_0x26675b0 .part v0x26493f0_0, 0, 1; -L_0x26678e0 .part v0x26493f0_0, 1, 1; -L_0x2667790 .part v0x26493f0_0, 2, 1; -L_0x2667830 .part v0x26493f0_0, 3, 1; -L_0x2667980 .array/port v0x26480d0, L_0x2667ce0; -L_0x2667ce0 .concat [ 4 2 0 0], v0x2645390_0, L_0x2b5f64126060; -LS_0x2667b70_0_0 .concat8 [ 11 1 1 1], v0x2648510_2, L_0x2667790, L_0x26673e0, L_0x2666fe0; -LS_0x2667b70_0_4 .concat8 [ 1 0 0 0], L_0x2666c60; -L_0x2667b70 .concat8 [ 14 1 0 0], LS_0x2667b70_0_0, LS_0x2667b70_0_4; -LS_0x2668060_0_0 .concat8 [ 11 1 1 1], v0x2648510_3, L_0x2667830, L_0x26676f0, L_0x26672b0; -LS_0x2668060_0_4 .concat8 [ 1 0 0 0], L_0x2666f40; -L_0x2668060 .concat8 [ 14 1 0 0], LS_0x2668060_0_0, LS_0x2668060_0_4; -LS_0x2667e40_0_0 .concat8 [ 11 1 1 1], v0x2648510_0, L_0x26675b0, L_0x2667190, L_0x2666df0; -LS_0x2667e40_0_4 .concat8 [ 1 0 0 0], L_0x2666a40; -L_0x2667e40 .concat8 [ 14 1 0 0], LS_0x2667e40_0_0, LS_0x2667e40_0_4; -LS_0x2668610_0_0 .concat8 [ 11 1 1 1], v0x2648510_1, L_0x26678e0, L_0x2667510, L_0x26670f0; -LS_0x2668610_0_4 .concat8 [ 1 0 0 0], L_0x2666d50; -L_0x2668610 .concat8 [ 14 1 0 0], LS_0x2668610_0_0, LS_0x2668610_0_4; -L_0x2668300 .part L_0x2665cd0, 14, 4; -L_0x2668a20 .part L_0x2665cd0, 11, 3; -L_0x2668830 .part L_0x2665cd0, 8, 3; -L_0x2668c70 .part L_0x2665cd0, 10, 4; -L_0x2668ac0 .part L_0x2665cd0, 0, 11; -S_0x2649ad0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x2585810; +P_0x28499f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x2849a30 .param/str "memFile" 0 3 60, "anyWrite/left.dat"; +L_0x2859d00 .functor BUFZ 11, v0x2849d80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2869da0 .functor BUFZ 11, v0x2849d80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x286caf0 .functor BUFZ 18, L_0x286c900, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2849d80_0 .var/s "ACC", 10 0; +v0x2849e80_0 .var/s "BAK", 10 0; +v0x2849b90_0 .net "DST", 2 0, L_0x286dad0; 1 drivers +v0x2849f60_0 .net/s "IMM", 10 0, L_0x286db70; 1 drivers +v0x284a020_0 .net "INST", 3 0, L_0x286d3b0; 1 drivers +v0x284a150_0 .net "LABEL", 3 0, L_0x286dd20; 1 drivers +v0x284a230_0 .var "PC", 3 0; +v0x284a310_0 .var "PCNEXT", 3 0; +v0x284a3f0_0 .net "SRC", 2 0, L_0x286d8e0; 1 drivers +v0x284a560_0 .net *"_s103", 0 0, L_0x286bc40; 1 drivers +v0x284a640_0 .net *"_s107", 0 0, L_0x286bb50; 1 drivers +v0x284a720_0 .net *"_s111", 0 0, L_0x286be30; 1 drivers +v0x284a800_0 .net *"_s115", 0 0, L_0x286bd30; 1 drivers +v0x284a8e0_0 .net *"_s119", 0 0, L_0x286c070; 1 drivers +v0x284a9c0_0 .net *"_s123", 0 0, L_0x286bf60; 1 drivers +v0x284aaa0_0 .net *"_s127", 0 0, L_0x286c230; 1 drivers +v0x284ab80_0 .net *"_s131", 0 0, L_0x286c110; 1 drivers +v0x284ad30_0 .net *"_s135", 0 0, L_0x286c490; 1 drivers +v0x284add0_0 .net *"_s139", 0 0, L_0x286c360; 1 drivers +v0x284aeb0_0 .net *"_s143", 0 0, L_0x286c670; 1 drivers +v0x284af90_0 .net *"_s147", 0 0, L_0x286c530; 1 drivers +v0x284b070_0 .net *"_s151", 0 0, L_0x286c860; 1 drivers +v0x284b150_0 .net *"_s155", 0 0, L_0x286c710; 1 drivers +v0x284b230_0 .net *"_s159", 0 0, L_0x286c7b0; 1 drivers +v0x284b310_0 .net *"_s160", 17 0, L_0x286c900; 1 drivers +v0x284b3f0_0 .net *"_s162", 5 0, L_0x286cc60; 1 drivers +L_0x2b28706ce060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x284b4d0_0 .net *"_s165", 1 0, L_0x2b28706ce060; 1 drivers +v0x284d480_2 .array/port v0x284d480, 2; +v0x284b5b0_0 .net *"_s173", 10 0, v0x284d480_2; 1 drivers +v0x284d480_3 .array/port v0x284d480, 3; +v0x284b690_0 .net *"_s179", 10 0, v0x284d480_3; 1 drivers +v0x284d480_0 .array/port v0x284d480, 0; +v0x284b770_0 .net *"_s185", 10 0, v0x284d480_0; 1 drivers +v0x284d480_1 .array/port v0x284d480, 1; +v0x284b850_0 .net *"_s191", 10 0, v0x284d480_1; 1 drivers +v0x284b930_0 .net *"_s23", 0 0, L_0x286a200; 1 drivers +v0x284ba10_0 .net *"_s27", 0 0, L_0x286a320; 1 drivers +v0x284ac60_0 .net *"_s31", 0 0, L_0x286a490; 1 drivers +v0x284bce0_0 .net *"_s36", 0 0, L_0x286a740; 1 drivers +v0x284bdc0_0 .net *"_s42", 0 0, L_0x286a9d0; 1 drivers +v0x284bea0_0 .net *"_s46", 0 0, L_0x286aa70; 1 drivers +v0x284bf80_0 .net *"_s50", 0 0, L_0x286ab80; 1 drivers +v0x284c060_0 .net *"_s55", 0 0, L_0x286ae10; 1 drivers +v0x284c140_0 .net *"_s61", 0 0, L_0x286aff0; 1 drivers +v0x284c220_0 .net *"_s65", 0 0, L_0x286b120; 1 drivers +v0x284c300_0 .net *"_s69", 0 0, L_0x286b1c0; 1 drivers +v0x284c3e0_0 .net *"_s74", 0 0, L_0x284dee0; 1 drivers +v0x284c4c0_0 .net *"_s80", 0 0, L_0x286b390; 1 drivers +v0x284c5a0_0 .net *"_s84", 0 0, L_0x286b630; 1 drivers +v0x284c680_0 .net *"_s88", 0 0, L_0x286b570; 1 drivers +v0x284c760_0 .net *"_s93", 0 0, L_0x286b6d0; 1 drivers +v0x284c840_0 .net *"_s99", 0 0, L_0x286b930; 1 drivers +v0x284c920_0 .net/s "accOut", 10 0, L_0x2859d00; alias, 1 drivers +v0x284ca00_0 .net "anyHasData", 0 0, L_0x286a880; 1 drivers +v0x284cac0_0 .net "anyReadAck", 0 0, L_0x286b4d0; 1 drivers +v0x284cb80_0 .net "anyWantData", 0 0, L_0x286af00; 1 drivers +v0x284cc40_0 .net "anyWriteAck", 0 0, L_0x286ba60; 1 drivers +v0x284cd00_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers +o0x2b287069fef8 .functor BUFZ 15, C4; HiZ drive +v0x284cda0_0 .net "down", 14 0, o0x2b287069fef8; 0 drivers +v0x284ce80_0 .net "downOut", 14 0, L_0x286d0d0; 1 drivers +v0x284cf60_0 .net "instruction", 17 0, L_0x286caf0; 1 drivers +v0x284d040 .array "instructions", 15 0, 17 0; +v0x284d100_0 .var "last", 2 0; +o0x2b287069ffb8 .functor BUFZ 15, C4; HiZ drive +v0x284d1e0_0 .net "left", 14 0, o0x2b287069ffb8; 0 drivers +v0x284d2c0_0 .net "leftOut", 14 0, L_0x286cdc0; 1 drivers +v0x284d3a0_0 .var "mode", 2 0; +v0x284d480 .array/s "outVals", 2 5, 10 0; +v0x284d5c0_0 .var "phase", 2 0; +v0x284d6a0_0 .net "portsHaveData", 5 2, L_0x286a530; 1 drivers +v0x284bab0_0 .net "portsWantData", 5 2, L_0x286ac20; 1 drivers +v0x284bb90_0 .net "readAckIn", 5 2, L_0x286b2f0; 1 drivers +v0x284db50_0 .var "readAckOut", 5 2; +v0x284dbf0_0 .var "readTarget", 2 0; +v0x284dcd0_0 .var/s "readValue", 10 0; +L_0x2b28706ce018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x284ddb0 .array "regVals", 0 7; +v0x284ddb0_0 .net/s v0x284ddb0 0, 10 0, L_0x2b28706ce018; 1 drivers +v0x284ddb0_1 .net/s v0x284ddb0 1, 10 0, L_0x2869da0; 1 drivers +v0x284ddb0_2 .net/s v0x284ddb0 2, 10 0, L_0x2869e60; 1 drivers +v0x284ddb0_3 .net/s v0x284ddb0 3, 10 0, L_0x2869f00; 1 drivers +v0x284ddb0_4 .net/s v0x284ddb0 4, 10 0, L_0x2869fd0; 1 drivers +v0x284ddb0_5 .net/s v0x284ddb0 5, 10 0, L_0x286a0d0; 1 drivers +o0x2b28706a0378 .functor BUFZ 11, C4; HiZ drive +v0x284ddb0_6 .net/s v0x284ddb0 6, 10 0, o0x2b28706a0378; 0 drivers +o0x2b28706a03a8 .functor BUFZ 11, C4; HiZ drive +v0x284ddb0_7 .net/s v0x284ddb0 7, 10 0, o0x2b28706a03a8; 0 drivers +v0x284dfc0_0 .net "right", 14 0, L_0x287d3e0; alias, 1 drivers +v0x284e0b0_0 .net "rightOut", 14 0, L_0x286d6c0; alias, 1 drivers +o0x2b28706a03d8 .functor BUFZ 15, C4; HiZ drive +v0x284e180_0 .net "up", 14 0, o0x2b28706a03d8; 0 drivers +v0x284e240_0 .net "upOut", 14 0, L_0x286ce80; 1 drivers +v0x284e320_0 .var "weHaveData", 5 2; +v0x284e400_0 .var "weWantData", 5 2; +v0x284e4e0_0 .net "writeAckIn", 5 2, L_0x286b7a0; 1 drivers +v0x284e5c0_0 .var "writeAckOut", 5 2; +v0x284e6a0_0 .var "writeTarget", 2 0; +v0x284e780_0 .var/s "writeValue", 10 0; +L_0x2869e60 .part o0x2b287069ffb8, 0, 11; +L_0x2869f00 .part L_0x287d3e0, 0, 11; +L_0x2869fd0 .part o0x2b28706a03d8, 0, 11; +L_0x286a0d0 .part o0x2b287069fef8, 0, 11; +L_0x286a200 .part o0x2b287069ffb8, 11, 1; +L_0x286a320 .part L_0x287d3e0, 11, 1; +L_0x286a490 .part o0x2b28706a03d8, 11, 1; +L_0x286a530 .concat8 [ 1 1 1 1], L_0x286a200, L_0x286a320, L_0x286a490, L_0x286a740; +L_0x286a740 .part o0x2b287069fef8, 11, 1; +L_0x286a880 .reduce/or L_0x286a530; +L_0x286a9d0 .part o0x2b287069ffb8, 12, 1; +L_0x286aa70 .part L_0x287d3e0, 12, 1; +L_0x286ab80 .part o0x2b28706a03d8, 12, 1; +L_0x286ac20 .concat8 [ 1 1 1 1], L_0x286a9d0, L_0x286aa70, L_0x286ab80, L_0x286ae10; +L_0x286ae10 .part o0x2b287069fef8, 12, 1; +L_0x286af00 .reduce/or L_0x286ac20; +L_0x286aff0 .part o0x2b287069ffb8, 13, 1; +L_0x286b120 .part L_0x287d3e0, 13, 1; +L_0x286b1c0 .part o0x2b28706a03d8, 13, 1; +L_0x286b2f0 .concat8 [ 1 1 1 1], L_0x286aff0, L_0x286b120, L_0x286b1c0, L_0x284dee0; +L_0x284dee0 .part o0x2b287069fef8, 13, 1; +L_0x286b4d0 .reduce/or L_0x286b2f0; +L_0x286b390 .part o0x2b287069ffb8, 14, 1; +L_0x286b630 .part L_0x287d3e0, 14, 1; +L_0x286b570 .part o0x2b28706a03d8, 14, 1; +L_0x286b7a0 .concat8 [ 1 1 1 1], L_0x286b390, L_0x286b630, L_0x286b570, L_0x286b6d0; +L_0x286b6d0 .part o0x2b287069fef8, 14, 1; +L_0x286ba60 .reduce/or L_0x286b7a0; +L_0x286b930 .part v0x284db50_0, 0, 1; +L_0x286bc40 .part v0x284db50_0, 1, 1; +L_0x286bb50 .part v0x284db50_0, 2, 1; +L_0x286be30 .part v0x284db50_0, 3, 1; +L_0x286bd30 .part v0x284e5c0_0, 0, 1; +L_0x286c070 .part v0x284e5c0_0, 1, 1; +L_0x286bf60 .part v0x284e5c0_0, 2, 1; +L_0x286c230 .part v0x284e5c0_0, 3, 1; +L_0x286c110 .part v0x284e400_0, 0, 1; +L_0x286c490 .part v0x284e400_0, 1, 1; +L_0x286c360 .part v0x284e400_0, 2, 1; +L_0x286c670 .part v0x284e400_0, 3, 1; +L_0x286c530 .part v0x284e320_0, 0, 1; +L_0x286c860 .part v0x284e320_0, 1, 1; +L_0x286c710 .part v0x284e320_0, 2, 1; +L_0x286c7b0 .part v0x284e320_0, 3, 1; +L_0x286c900 .array/port v0x284d040, L_0x286cc60; +L_0x286cc60 .concat [ 4 2 0 0], v0x284a230_0, L_0x2b28706ce060; +LS_0x286ce80_0_0 .concat8 [ 11 1 1 1], v0x284d480_2, L_0x286c710, L_0x286c360, L_0x286bf60; +LS_0x286ce80_0_4 .concat8 [ 1 0 0 0], L_0x286bb50; +L_0x286ce80 .concat8 [ 14 1 0 0], LS_0x286ce80_0_0, LS_0x286ce80_0_4; +LS_0x286d0d0_0_0 .concat8 [ 11 1 1 1], v0x284d480_3, L_0x286c7b0, L_0x286c670, L_0x286c230; +LS_0x286d0d0_0_4 .concat8 [ 1 0 0 0], L_0x286be30; +L_0x286d0d0 .concat8 [ 14 1 0 0], LS_0x286d0d0_0_0, LS_0x286d0d0_0_4; +LS_0x286cdc0_0_0 .concat8 [ 11 1 1 1], v0x284d480_0, L_0x286c530, L_0x286c110, L_0x286bd30; +LS_0x286cdc0_0_4 .concat8 [ 1 0 0 0], L_0x286b930; +L_0x286cdc0 .concat8 [ 14 1 0 0], LS_0x286cdc0_0_0, LS_0x286cdc0_0_4; +LS_0x286d6c0_0_0 .concat8 [ 11 1 1 1], v0x284d480_1, L_0x286c860, L_0x286c490, L_0x286c070; +LS_0x286d6c0_0_4 .concat8 [ 1 0 0 0], L_0x286bc40; +L_0x286d6c0 .concat8 [ 14 1 0 0], LS_0x286d6c0_0_0, LS_0x286d6c0_0_4; +L_0x286d3b0 .part L_0x286caf0, 14, 4; +L_0x286dad0 .part L_0x286caf0, 11, 3; +L_0x286d8e0 .part L_0x286caf0, 8, 3; +L_0x286dd20 .part L_0x286caf0, 10, 4; +L_0x286db70 .part L_0x286caf0, 0, 11; +S_0x284ea00 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x27b21e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -572,174 +575,175 @@ S_0x2649ad0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x2585810; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x2649ca0 .param/str "memFile" 0 3 60, "anyWrite/right.dat"; -L_0x2668960 .functor BUFZ 11, v0x2649f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2668b60 .functor BUFZ 11, v0x2649f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2669ae0 .functor BUFZ 18, L_0x266bad0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2649f90_0 .var/s "ACC", 10 0; -v0x264a090_0 .var/s "BAK", 10 0; -v0x264a170_0 .net "DST", 2 0, L_0x266cbd0; 1 drivers -v0x264a230_0 .net/s "IMM", 10 0, L_0x266cc70; 1 drivers -v0x264a310_0 .net "INST", 3 0, L_0x266c4f0; 1 drivers -v0x264a3f0_0 .net "LABEL", 3 0, L_0x266ce20; 1 drivers -v0x264a4d0_0 .var "PC", 3 0; -v0x264a5b0_0 .var "PCNEXT", 3 0; -v0x264a690_0 .net "SRC", 2 0, L_0x266c9e0; 1 drivers -v0x264a800_0 .net *"_s103", 0 0, L_0x266ae10; 1 drivers -v0x264a8e0_0 .net *"_s107", 0 0, L_0x266ad20; 1 drivers -v0x264a9c0_0 .net *"_s111", 0 0, L_0x266b000; 1 drivers -v0x264aaa0_0 .net *"_s115", 0 0, L_0x266af00; 1 drivers -v0x264ab80_0 .net *"_s119", 0 0, L_0x266b240; 1 drivers -v0x264ac60_0 .net *"_s123", 0 0, L_0x266b130; 1 drivers -v0x264ad40_0 .net *"_s127", 0 0, L_0x266b400; 1 drivers -v0x264ae20_0 .net *"_s131", 0 0, L_0x266b2e0; 1 drivers -v0x264afd0_0 .net *"_s135", 0 0, L_0x266b660; 1 drivers -v0x264b070_0 .net *"_s139", 0 0, L_0x266b530; 1 drivers -v0x264b150_0 .net *"_s143", 0 0, L_0x266b840; 1 drivers -v0x264b230_0 .net *"_s147", 0 0, L_0x266b700; 1 drivers -v0x264b310_0 .net *"_s151", 0 0, L_0x266ba30; 1 drivers -v0x264b3f0_0 .net *"_s155", 0 0, L_0x266b8e0; 1 drivers -v0x264b4d0_0 .net *"_s159", 0 0, L_0x266b980; 1 drivers -v0x264b5b0_0 .net *"_s160", 17 0, L_0x266bad0; 1 drivers -v0x264b690_0 .net *"_s162", 5 0, L_0x266be30; 1 drivers -L_0x2b5f641260f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x264b770_0 .net *"_s165", 1 0, L_0x2b5f641260f0; 1 drivers -v0x264d6a0_2 .array/port v0x264d6a0, 2; -v0x264b850_0 .net *"_s173", 10 0, v0x264d6a0_2; 1 drivers -v0x264d6a0_3 .array/port v0x264d6a0, 3; -v0x264b930_0 .net *"_s179", 10 0, v0x264d6a0_3; 1 drivers -v0x264d6a0_0 .array/port v0x264d6a0, 0; -v0x264ba10_0 .net *"_s185", 10 0, v0x264d6a0_0; 1 drivers -v0x264d6a0_1 .array/port v0x264d6a0, 1; -v0x264baf0_0 .net *"_s191", 10 0, v0x264d6a0_1; 1 drivers -v0x264bbd0_0 .net *"_s23", 0 0, L_0x2669210; 1 drivers -v0x264bcb0_0 .net *"_s27", 0 0, L_0x2669370; 1 drivers -v0x264af00_0 .net *"_s31", 0 0, L_0x2669440; 1 drivers -v0x264bf80_0 .net *"_s36", 0 0, L_0x2669710; 1 drivers -v0x264c060_0 .net *"_s42", 0 0, L_0x26699a0; 1 drivers -v0x264c140_0 .net *"_s46", 0 0, L_0x2669a40; 1 drivers -v0x264c220_0 .net *"_s50", 0 0, L_0x2669b50; 1 drivers -v0x264c300_0 .net *"_s55", 0 0, L_0x2669de0; 1 drivers -v0x264c3e0_0 .net *"_s61", 0 0, L_0x266a050; 1 drivers -v0x264c4c0_0 .net *"_s65", 0 0, L_0x266a0f0; 1 drivers -v0x264c5a0_0 .net *"_s69", 0 0, L_0x266a2c0; 1 drivers -v0x264c680_0 .net *"_s74", 0 0, L_0x266a220; 1 drivers -v0x264c760_0 .net *"_s80", 0 0, L_0x266a4b0; 1 drivers -v0x264c840_0 .net *"_s84", 0 0, L_0x266a7a0; 1 drivers -v0x264c920_0 .net *"_s88", 0 0, L_0x266a6e0; 1 drivers -v0x264ca00_0 .net *"_s93", 0 0, L_0x266a840; 1 drivers -v0x264cae0_0 .net *"_s99", 0 0, L_0x266ab00; 1 drivers -v0x264cbc0_0 .net/s "accOut", 10 0, L_0x2668960; alias, 1 drivers -v0x264cca0_0 .net "anyHasData", 0 0, L_0x2669850; 1 drivers -v0x264cd60_0 .net "anyReadAck", 0 0, L_0x266a640; 1 drivers -v0x264ce20_0 .net "anyWantData", 0 0, L_0x2669ed0; 1 drivers -v0x264cee0_0 .net "anyWriteAck", 0 0, L_0x266ac30; 1 drivers -v0x264cfa0_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers -o0x2b5f640f9128 .functor BUFZ 15, C4; HiZ drive -v0x264d040_0 .net "down", 14 0, o0x2b5f640f9128; 0 drivers -v0x264d120_0 .net "downOut", 14 0, L_0x266c250; 1 drivers -v0x264d200_0 .net "instruction", 17 0, L_0x2669ae0; 1 drivers -v0x264d2e0 .array "instructions", 15 0, 17 0; -v0x264d3a0_0 .var "last", 2 0; -v0x264d480_0 .net "left", 14 0, L_0x2678cf0; alias, 1 drivers -v0x264d540_0 .net "leftOut", 14 0, L_0x266bf90; alias, 1 drivers -v0x264d5e0_0 .var "mode", 2 0; -v0x264d6a0 .array/s "outVals", 2 5, 10 0; -v0x264d810_0 .var "phase", 2 0; -v0x264d8f0_0 .net "portsHaveData", 5 2, L_0x2669530; 1 drivers -v0x264bd50_0 .net "portsWantData", 5 2, L_0x2669bf0; 1 drivers -v0x264be30_0 .net "readAckIn", 5 2, L_0x266a360; 1 drivers -v0x264dda0_0 .var "readAckOut", 5 2; -v0x264de40_0 .var "readTarget", 2 0; -v0x264dee0_0 .var/s "readValue", 10 0; -L_0x2b5f641260a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x264df80 .array "regVals", 0 7; -v0x264df80_0 .net/s v0x264df80 0, 10 0, L_0x2b5f641260a8; 1 drivers -v0x264df80_1 .net/s v0x264df80 1, 10 0, L_0x2668b60; 1 drivers -v0x264df80_2 .net/s v0x264df80 2, 10 0, L_0x2668ed0; 1 drivers -v0x264df80_3 .net/s v0x264df80 3, 10 0, L_0x2668f70; 1 drivers -v0x264df80_4 .net/s v0x264df80 4, 10 0, L_0x2669010; 1 drivers -v0x264df80_5 .net/s v0x264df80 5, 10 0, L_0x26690e0; 1 drivers -o0x2b5f640f9548 .functor BUFZ 11, C4; HiZ drive -v0x264df80_6 .net/s v0x264df80 6, 10 0, o0x2b5f640f9548; 0 drivers -o0x2b5f640f9578 .functor BUFZ 11, C4; HiZ drive -v0x264df80_7 .net/s v0x264df80 7, 10 0, o0x2b5f640f9578; 0 drivers -o0x2b5f640f95a8 .functor BUFZ 15, C4; HiZ drive -v0x264e190_0 .net "right", 14 0, o0x2b5f640f95a8; 0 drivers -v0x264e270_0 .net "rightOut", 14 0, L_0x266c7c0; 1 drivers -o0x2b5f640f9608 .functor BUFZ 15, C4; HiZ drive -v0x264e350_0 .net "up", 14 0, o0x2b5f640f9608; 0 drivers -v0x264e430_0 .net "upOut", 14 0, L_0x266bd40; 1 drivers -v0x264e510_0 .var "weHaveData", 5 2; -v0x264e5f0_0 .var "weWantData", 5 2; -v0x264e6d0_0 .net "writeAckIn", 5 2, L_0x266a910; 1 drivers -v0x264e7b0_0 .var "writeAckOut", 5 2; -v0x264e890_0 .var "writeTarget", 2 0; -v0x264e970_0 .var/s "writeValue", 10 0; -L_0x2668ed0 .part L_0x2678cf0, 0, 11; -L_0x2668f70 .part o0x2b5f640f95a8, 0, 11; -L_0x2669010 .part o0x2b5f640f9608, 0, 11; -L_0x26690e0 .part o0x2b5f640f9128, 0, 11; -L_0x2669210 .part L_0x2678cf0, 11, 1; -L_0x2669370 .part o0x2b5f640f95a8, 11, 1; -L_0x2669440 .part o0x2b5f640f9608, 11, 1; -L_0x2669530 .concat8 [ 1 1 1 1], L_0x2669210, L_0x2669370, L_0x2669440, L_0x2669710; -L_0x2669710 .part o0x2b5f640f9128, 11, 1; -L_0x2669850 .reduce/or L_0x2669530; -L_0x26699a0 .part L_0x2678cf0, 12, 1; -L_0x2669a40 .part o0x2b5f640f95a8, 12, 1; -L_0x2669b50 .part o0x2b5f640f9608, 12, 1; -L_0x2669bf0 .concat8 [ 1 1 1 1], L_0x26699a0, L_0x2669a40, L_0x2669b50, L_0x2669de0; -L_0x2669de0 .part o0x2b5f640f9128, 12, 1; -L_0x2669ed0 .reduce/or L_0x2669bf0; -L_0x266a050 .part L_0x2678cf0, 13, 1; -L_0x266a0f0 .part o0x2b5f640f95a8, 13, 1; -L_0x266a2c0 .part o0x2b5f640f9608, 13, 1; -L_0x266a360 .concat8 [ 1 1 1 1], L_0x266a050, L_0x266a0f0, L_0x266a2c0, L_0x266a220; -L_0x266a220 .part o0x2b5f640f9128, 13, 1; -L_0x266a640 .reduce/or L_0x266a360; -L_0x266a4b0 .part L_0x2678cf0, 14, 1; -L_0x266a7a0 .part o0x2b5f640f95a8, 14, 1; -L_0x266a6e0 .part o0x2b5f640f9608, 14, 1; -L_0x266a910 .concat8 [ 1 1 1 1], L_0x266a4b0, L_0x266a7a0, L_0x266a6e0, L_0x266a840; -L_0x266a840 .part o0x2b5f640f9128, 14, 1; -L_0x266ac30 .reduce/or L_0x266a910; -L_0x266ab00 .part v0x264dda0_0, 0, 1; -L_0x266ae10 .part v0x264dda0_0, 1, 1; -L_0x266ad20 .part v0x264dda0_0, 2, 1; -L_0x266b000 .part v0x264dda0_0, 3, 1; -L_0x266af00 .part v0x264e7b0_0, 0, 1; -L_0x266b240 .part v0x264e7b0_0, 1, 1; -L_0x266b130 .part v0x264e7b0_0, 2, 1; -L_0x266b400 .part v0x264e7b0_0, 3, 1; -L_0x266b2e0 .part v0x264e5f0_0, 0, 1; -L_0x266b660 .part v0x264e5f0_0, 1, 1; -L_0x266b530 .part v0x264e5f0_0, 2, 1; -L_0x266b840 .part v0x264e5f0_0, 3, 1; -L_0x266b700 .part v0x264e510_0, 0, 1; -L_0x266ba30 .part v0x264e510_0, 1, 1; -L_0x266b8e0 .part v0x264e510_0, 2, 1; -L_0x266b980 .part v0x264e510_0, 3, 1; -L_0x266bad0 .array/port v0x264d2e0, L_0x266be30; -L_0x266be30 .concat [ 4 2 0 0], v0x264a4d0_0, L_0x2b5f641260f0; -LS_0x266bd40_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_2, L_0x266b8e0, L_0x266b530, L_0x266b130; -LS_0x266bd40_0_4 .concat8 [ 1 0 0 0], L_0x266ad20; -L_0x266bd40 .concat8 [ 14 1 0 0], LS_0x266bd40_0_0, LS_0x266bd40_0_4; -LS_0x266c250_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_3, L_0x266b980, L_0x266b840, L_0x266b400; -LS_0x266c250_0_4 .concat8 [ 1 0 0 0], L_0x266b000; -L_0x266c250 .concat8 [ 14 1 0 0], LS_0x266c250_0_0, LS_0x266c250_0_4; -LS_0x266bf90_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_0, L_0x266b700, L_0x266b2e0, L_0x266af00; -LS_0x266bf90_0_4 .concat8 [ 1 0 0 0], L_0x266ab00; -L_0x266bf90 .concat8 [ 14 1 0 0], LS_0x266bf90_0_0, LS_0x266bf90_0_4; -LS_0x266c7c0_0_0 .concat8 [ 11 1 1 1], v0x264d6a0_1, L_0x266ba30, L_0x266b660, L_0x266b240; -LS_0x266c7c0_0_4 .concat8 [ 1 0 0 0], L_0x266ae10; -L_0x266c7c0 .concat8 [ 14 1 0 0], LS_0x266c7c0_0_0, LS_0x266c7c0_0_4; -L_0x266c4f0 .part L_0x2669ae0, 14, 4; -L_0x266cbd0 .part L_0x2669ae0, 11, 3; -L_0x266c9e0 .part L_0x2669ae0, 8, 3; -L_0x266ce20 .part L_0x2669ae0, 10, 4; -L_0x266cc70 .part L_0x2669ae0, 0, 11; -S_0x264ebf0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x2585810; +P_0x284ebd0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x284ec10 .param/str "memFile" 0 3 60, "anyWrite/right.dat"; +L_0x286da10 .functor BUFZ 11, v0x284ef80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x286dc10 .functor BUFZ 11, v0x284ef80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x286eb60 .functor BUFZ 18, L_0x2870b50, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x284ef80_0 .var/s "ACC", 10 0; +v0x284f080_0 .var/s "BAK", 10 0; +v0x284f160_0 .net "DST", 2 0, L_0x2871c90; 1 drivers +v0x284f220_0 .net/s "IMM", 10 0, L_0x2871d30; 1 drivers +v0x284f300_0 .net "INST", 3 0, L_0x2871570; 1 drivers +v0x284f3e0_0 .net "LABEL", 3 0, L_0x2871ee0; 1 drivers +v0x284f4c0_0 .var "PC", 3 0; +v0x284f5a0_0 .var "PCNEXT", 3 0; +v0x284f680_0 .net "SRC", 2 0, L_0x2871aa0; 1 drivers +v0x284f7f0_0 .net *"_s103", 0 0, L_0x286fe90; 1 drivers +v0x284f8d0_0 .net *"_s107", 0 0, L_0x286fda0; 1 drivers +v0x284f9b0_0 .net *"_s111", 0 0, L_0x2870080; 1 drivers +v0x284fa90_0 .net *"_s115", 0 0, L_0x286ff80; 1 drivers +v0x284fb70_0 .net *"_s119", 0 0, L_0x28702c0; 1 drivers +v0x284fc50_0 .net *"_s123", 0 0, L_0x28701b0; 1 drivers +v0x284fd30_0 .net *"_s127", 0 0, L_0x2870480; 1 drivers +v0x284fe10_0 .net *"_s131", 0 0, L_0x2870360; 1 drivers +v0x284ffc0_0 .net *"_s135", 0 0, L_0x28706e0; 1 drivers +v0x2850060_0 .net *"_s139", 0 0, L_0x28705b0; 1 drivers +v0x2850140_0 .net *"_s143", 0 0, L_0x28708c0; 1 drivers +v0x2850220_0 .net *"_s147", 0 0, L_0x2870780; 1 drivers +v0x2850300_0 .net *"_s151", 0 0, L_0x2870ab0; 1 drivers +v0x28503e0_0 .net *"_s155", 0 0, L_0x2870960; 1 drivers +v0x28504c0_0 .net *"_s159", 0 0, L_0x2870a00; 1 drivers +v0x28505a0_0 .net *"_s160", 17 0, L_0x2870b50; 1 drivers +v0x2850680_0 .net *"_s162", 5 0, L_0x2870eb0; 1 drivers +L_0x2b28706ce0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2850760_0 .net *"_s165", 1 0, L_0x2b28706ce0f0; 1 drivers +v0x2852690_2 .array/port v0x2852690, 2; +v0x2850840_0 .net *"_s173", 10 0, v0x2852690_2; 1 drivers +v0x2852690_3 .array/port v0x2852690, 3; +v0x2850920_0 .net *"_s179", 10 0, v0x2852690_3; 1 drivers +v0x2852690_0 .array/port v0x2852690, 0; +v0x2850a00_0 .net *"_s185", 10 0, v0x2852690_0; 1 drivers +v0x2852690_1 .array/port v0x2852690, 1; +v0x2850ae0_0 .net *"_s191", 10 0, v0x2852690_1; 1 drivers +v0x2850bc0_0 .net *"_s23", 0 0, L_0x286e290; 1 drivers +v0x2850ca0_0 .net *"_s27", 0 0, L_0x286e3f0; 1 drivers +v0x284fef0_0 .net *"_s31", 0 0, L_0x286e4c0; 1 drivers +v0x2850f70_0 .net *"_s36", 0 0, L_0x286e790; 1 drivers +v0x2851050_0 .net *"_s42", 0 0, L_0x286ea20; 1 drivers +v0x2851130_0 .net *"_s46", 0 0, L_0x286eac0; 1 drivers +v0x2851210_0 .net *"_s50", 0 0, L_0x286ebd0; 1 drivers +v0x28512f0_0 .net *"_s55", 0 0, L_0x286ee60; 1 drivers +v0x28513d0_0 .net *"_s61", 0 0, L_0x286f0d0; 1 drivers +v0x28514b0_0 .net *"_s65", 0 0, L_0x286f170; 1 drivers +v0x2851590_0 .net *"_s69", 0 0, L_0x286f340; 1 drivers +v0x2851670_0 .net *"_s74", 0 0, L_0x286f2a0; 1 drivers +v0x2851750_0 .net *"_s80", 0 0, L_0x286f530; 1 drivers +v0x2851830_0 .net *"_s84", 0 0, L_0x286f820; 1 drivers +v0x2851910_0 .net *"_s88", 0 0, L_0x286f760; 1 drivers +v0x28519f0_0 .net *"_s93", 0 0, L_0x286f8c0; 1 drivers +v0x2851ad0_0 .net *"_s99", 0 0, L_0x286fb80; 1 drivers +v0x2851bb0_0 .net/s "accOut", 10 0, L_0x286da10; alias, 1 drivers +v0x2851c90_0 .net "anyHasData", 0 0, L_0x286e8d0; 1 drivers +v0x2851d50_0 .net "anyReadAck", 0 0, L_0x286f6c0; 1 drivers +v0x2851e10_0 .net "anyWantData", 0 0, L_0x286ef50; 1 drivers +v0x2851ed0_0 .net "anyWriteAck", 0 0, L_0x286fcb0; 1 drivers +v0x2851f90_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers +o0x2b28706a1128 .functor BUFZ 15, C4; HiZ drive +v0x2852030_0 .net "down", 14 0, o0x2b28706a1128; 0 drivers +v0x2852110_0 .net "downOut", 14 0, L_0x28712d0; 1 drivers +v0x28521f0_0 .net "instruction", 17 0, L_0x286eb60; 1 drivers +v0x28522d0 .array "instructions", 15 0, 17 0; +v0x2852390_0 .var "last", 2 0; +v0x2852470_0 .net "left", 14 0, L_0x287ddb0; alias, 1 drivers +v0x2852530_0 .net "leftOut", 14 0, L_0x2871010; alias, 1 drivers +v0x28525d0_0 .var "mode", 2 0; +v0x2852690 .array/s "outVals", 2 5, 10 0; +v0x2852800_0 .var "phase", 2 0; +v0x28528e0_0 .net "portsHaveData", 5 2, L_0x286e5b0; 1 drivers +v0x2850d40_0 .net "portsWantData", 5 2, L_0x286ec70; 1 drivers +v0x2850e20_0 .net "readAckIn", 5 2, L_0x286f3e0; 1 drivers +v0x2852d90_0 .var "readAckOut", 5 2; +v0x2852e30_0 .var "readTarget", 2 0; +v0x2852ed0_0 .var/s "readValue", 10 0; +L_0x2b28706ce0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2852f70 .array "regVals", 0 7; +v0x2852f70_0 .net/s v0x2852f70 0, 10 0, L_0x2b28706ce0a8; 1 drivers +v0x2852f70_1 .net/s v0x2852f70 1, 10 0, L_0x286dc10; 1 drivers +v0x2852f70_2 .net/s v0x2852f70 2, 10 0, L_0x286df80; 1 drivers +v0x2852f70_3 .net/s v0x2852f70 3, 10 0, L_0x286e020; 1 drivers +v0x2852f70_4 .net/s v0x2852f70 4, 10 0, L_0x286e0c0; 1 drivers +v0x2852f70_5 .net/s v0x2852f70 5, 10 0, L_0x286e160; 1 drivers +o0x2b28706a1548 .functor BUFZ 11, C4; HiZ drive +v0x2852f70_6 .net/s v0x2852f70 6, 10 0, o0x2b28706a1548; 0 drivers +o0x2b28706a1578 .functor BUFZ 11, C4; HiZ drive +v0x2852f70_7 .net/s v0x2852f70 7, 10 0, o0x2b28706a1578; 0 drivers +o0x2b28706a15a8 .functor BUFZ 15, C4; HiZ drive +v0x2853180_0 .net "right", 14 0, o0x2b28706a15a8; 0 drivers +v0x2853260_0 .net "rightOut", 14 0, L_0x2871880; 1 drivers +o0x2b28706a1608 .functor BUFZ 15, C4; HiZ drive +v0x2853340_0 .net "up", 14 0, o0x2b28706a1608; 0 drivers +v0x2853420_0 .net "upOut", 14 0, L_0x2870dc0; 1 drivers +v0x2853500_0 .var "weHaveData", 5 2; +v0x28535e0_0 .var "weWantData", 5 2; +v0x28536c0_0 .net "writeAckIn", 5 2, L_0x286f990; 1 drivers +v0x28537a0_0 .var "writeAckOut", 5 2; +v0x2853880_0 .var "writeTarget", 2 0; +v0x2853960_0 .var/s "writeValue", 10 0; +L_0x286df80 .part L_0x287ddb0, 0, 11; +L_0x286e020 .part o0x2b28706a15a8, 0, 11; +L_0x286e0c0 .part o0x2b28706a1608, 0, 11; +L_0x286e160 .part o0x2b28706a1128, 0, 11; +L_0x286e290 .part L_0x287ddb0, 11, 1; +L_0x286e3f0 .part o0x2b28706a15a8, 11, 1; +L_0x286e4c0 .part o0x2b28706a1608, 11, 1; +L_0x286e5b0 .concat8 [ 1 1 1 1], L_0x286e290, L_0x286e3f0, L_0x286e4c0, L_0x286e790; +L_0x286e790 .part o0x2b28706a1128, 11, 1; +L_0x286e8d0 .reduce/or L_0x286e5b0; +L_0x286ea20 .part L_0x287ddb0, 12, 1; +L_0x286eac0 .part o0x2b28706a15a8, 12, 1; +L_0x286ebd0 .part o0x2b28706a1608, 12, 1; +L_0x286ec70 .concat8 [ 1 1 1 1], L_0x286ea20, L_0x286eac0, L_0x286ebd0, L_0x286ee60; +L_0x286ee60 .part o0x2b28706a1128, 12, 1; +L_0x286ef50 .reduce/or L_0x286ec70; +L_0x286f0d0 .part L_0x287ddb0, 13, 1; +L_0x286f170 .part o0x2b28706a15a8, 13, 1; +L_0x286f340 .part o0x2b28706a1608, 13, 1; +L_0x286f3e0 .concat8 [ 1 1 1 1], L_0x286f0d0, L_0x286f170, L_0x286f340, L_0x286f2a0; +L_0x286f2a0 .part o0x2b28706a1128, 13, 1; +L_0x286f6c0 .reduce/or L_0x286f3e0; +L_0x286f530 .part L_0x287ddb0, 14, 1; +L_0x286f820 .part o0x2b28706a15a8, 14, 1; +L_0x286f760 .part o0x2b28706a1608, 14, 1; +L_0x286f990 .concat8 [ 1 1 1 1], L_0x286f530, L_0x286f820, L_0x286f760, L_0x286f8c0; +L_0x286f8c0 .part o0x2b28706a1128, 14, 1; +L_0x286fcb0 .reduce/or L_0x286f990; +L_0x286fb80 .part v0x2852d90_0, 0, 1; +L_0x286fe90 .part v0x2852d90_0, 1, 1; +L_0x286fda0 .part v0x2852d90_0, 2, 1; +L_0x2870080 .part v0x2852d90_0, 3, 1; +L_0x286ff80 .part v0x28537a0_0, 0, 1; +L_0x28702c0 .part v0x28537a0_0, 1, 1; +L_0x28701b0 .part v0x28537a0_0, 2, 1; +L_0x2870480 .part v0x28537a0_0, 3, 1; +L_0x2870360 .part v0x28535e0_0, 0, 1; +L_0x28706e0 .part v0x28535e0_0, 1, 1; +L_0x28705b0 .part v0x28535e0_0, 2, 1; +L_0x28708c0 .part v0x28535e0_0, 3, 1; +L_0x2870780 .part v0x2853500_0, 0, 1; +L_0x2870ab0 .part v0x2853500_0, 1, 1; +L_0x2870960 .part v0x2853500_0, 2, 1; +L_0x2870a00 .part v0x2853500_0, 3, 1; +L_0x2870b50 .array/port v0x28522d0, L_0x2870eb0; +L_0x2870eb0 .concat [ 4 2 0 0], v0x284f4c0_0, L_0x2b28706ce0f0; +LS_0x2870dc0_0_0 .concat8 [ 11 1 1 1], v0x2852690_2, L_0x2870960, L_0x28705b0, L_0x28701b0; +LS_0x2870dc0_0_4 .concat8 [ 1 0 0 0], L_0x286fda0; +L_0x2870dc0 .concat8 [ 14 1 0 0], LS_0x2870dc0_0_0, LS_0x2870dc0_0_4; +LS_0x28712d0_0_0 .concat8 [ 11 1 1 1], v0x2852690_3, L_0x2870a00, L_0x28708c0, L_0x2870480; +LS_0x28712d0_0_4 .concat8 [ 1 0 0 0], L_0x2870080; +L_0x28712d0 .concat8 [ 14 1 0 0], LS_0x28712d0_0_0, LS_0x28712d0_0_4; +LS_0x2871010_0_0 .concat8 [ 11 1 1 1], v0x2852690_0, L_0x2870780, L_0x2870360, L_0x286ff80; +LS_0x2871010_0_4 .concat8 [ 1 0 0 0], L_0x286fb80; +L_0x2871010 .concat8 [ 14 1 0 0], LS_0x2871010_0_0, LS_0x2871010_0_4; +LS_0x2871880_0_0 .concat8 [ 11 1 1 1], v0x2852690_1, L_0x2870ab0, L_0x28706e0, L_0x28702c0; +LS_0x2871880_0_4 .concat8 [ 1 0 0 0], L_0x286fe90; +L_0x2871880 .concat8 [ 14 1 0 0], LS_0x2871880_0_0, LS_0x2871880_0_4; +L_0x2871570 .part L_0x286eb60, 14, 4; +L_0x2871c90 .part L_0x286eb60, 11, 3; +L_0x2871aa0 .part L_0x286eb60, 8, 3; +L_0x2871ee0 .part L_0x286eb60, 10, 4; +L_0x2871d30 .part L_0x286eb60, 0, 11; +S_0x2853be0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x27b21e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -751,218 +755,219 @@ S_0x264ebf0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x2585810; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x264ee10 .param/str "memFile" 0 3 60, "anyWrite/up.dat"; -L_0x266cb10 .functor BUFZ 11, v0x264f040_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x266cd60 .functor BUFZ 11, v0x264f040_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x266dba0 .functor BUFZ 18, L_0x266fb40, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x264f040_0 .var/s "ACC", 10 0; -v0x264f140_0 .var/s "BAK", 10 0; -v0x264f220_0 .net "DST", 2 0, L_0x2670c80; 1 drivers -v0x264f2e0_0 .net/s "IMM", 10 0, L_0x2670d20; 1 drivers -v0x264f3c0_0 .net "INST", 3 0, L_0x2670560; 1 drivers -v0x264f4f0_0 .net "LABEL", 3 0, L_0x2670ed0; 1 drivers -v0x264f5d0_0 .var "PC", 3 0; -v0x264f6b0_0 .var "PCNEXT", 3 0; -v0x264f790_0 .net "SRC", 2 0, L_0x2670a90; 1 drivers -v0x264f900_0 .net *"_s103", 0 0, L_0x266ee80; 1 drivers -v0x264f9e0_0 .net *"_s107", 0 0, L_0x266ed90; 1 drivers -v0x264fac0_0 .net *"_s111", 0 0, L_0x266f070; 1 drivers -v0x264fba0_0 .net *"_s115", 0 0, L_0x266ef70; 1 drivers -v0x264fc80_0 .net *"_s119", 0 0, L_0x266f2b0; 1 drivers -v0x264fd60_0 .net *"_s123", 0 0, L_0x266f1a0; 1 drivers -v0x264fe40_0 .net *"_s127", 0 0, L_0x266f470; 1 drivers -v0x264ff20_0 .net *"_s131", 0 0, L_0x266f350; 1 drivers -v0x26500d0_0 .net *"_s135", 0 0, L_0x266f6d0; 1 drivers -v0x2650170_0 .net *"_s139", 0 0, L_0x266f5a0; 1 drivers -v0x2650250_0 .net *"_s143", 0 0, L_0x266f8b0; 1 drivers -v0x2650330_0 .net *"_s147", 0 0, L_0x266f770; 1 drivers -v0x2650410_0 .net *"_s151", 0 0, L_0x266faa0; 1 drivers -v0x26504f0_0 .net *"_s155", 0 0, L_0x266f950; 1 drivers -v0x26505d0_0 .net *"_s159", 0 0, L_0x266f9f0; 1 drivers -v0x26506b0_0 .net *"_s160", 17 0, L_0x266fb40; 1 drivers -v0x2650790_0 .net *"_s162", 5 0, L_0x266fea0; 1 drivers -L_0x2b5f64126180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x2650870_0 .net *"_s165", 1 0, L_0x2b5f64126180; 1 drivers -v0x2652830_2 .array/port v0x2652830, 2; -v0x2650950_0 .net *"_s173", 10 0, v0x2652830_2; 1 drivers -v0x2652830_3 .array/port v0x2652830, 3; -v0x2650a30_0 .net *"_s179", 10 0, v0x2652830_3; 1 drivers -v0x2652830_0 .array/port v0x2652830, 0; -v0x2650b10_0 .net *"_s185", 10 0, v0x2652830_0; 1 drivers -v0x2652830_1 .array/port v0x2652830, 1; -v0x2650bf0_0 .net *"_s191", 10 0, v0x2652830_1; 1 drivers -v0x2650cd0_0 .net *"_s23", 0 0, L_0x266d360; 1 drivers -v0x2650db0_0 .net *"_s27", 0 0, L_0x266d480; 1 drivers -v0x2650000_0 .net *"_s31", 0 0, L_0x266d570; 1 drivers -v0x2651080_0 .net *"_s36", 0 0, L_0x266d840; 1 drivers -v0x2651160_0 .net *"_s42", 0 0, L_0x266da60; 1 drivers -v0x2651240_0 .net *"_s46", 0 0, L_0x266db00; 1 drivers -v0x2651320_0 .net *"_s50", 0 0, L_0x266dc10; 1 drivers -v0x2651400_0 .net *"_s55", 0 0, L_0x266de50; 1 drivers -v0x26514e0_0 .net *"_s61", 0 0, L_0x266e0c0; 1 drivers -v0x26515c0_0 .net *"_s65", 0 0, L_0x266e1f0; 1 drivers -v0x26516a0_0 .net *"_s69", 0 0, L_0x266e3c0; 1 drivers -v0x2651780_0 .net *"_s74", 0 0, L_0x266e320; 1 drivers -v0x2651860_0 .net *"_s80", 0 0, L_0x266e560; 1 drivers -v0x2651940_0 .net *"_s84", 0 0, L_0x266e810; 1 drivers -v0x2651a20_0 .net *"_s88", 0 0, L_0x266e750; 1 drivers -v0x2651b00_0 .net *"_s93", 0 0, L_0x266e8b0; 1 drivers -v0x2651be0_0 .net *"_s99", 0 0, L_0x266eb70; 1 drivers -v0x2651cc0_0 .net/s "accOut", 10 0, L_0x266cb10; alias, 1 drivers -v0x2651da0_0 .net "anyHasData", 0 0, L_0x266d9c0; 1 drivers -v0x2651e60_0 .net "anyReadAck", 0 0, L_0x266e660; 1 drivers -v0x2651f20_0 .net "anyWantData", 0 0, L_0x266df40; 1 drivers -v0x2651fe0_0 .net "anyWriteAck", 0 0, L_0x266eca0; 1 drivers -v0x26520a0_0 .net "clk", 0 0, v0x2654a20_0; alias, 1 drivers -v0x26521d0_0 .net "down", 14 0, L_0x2678050; alias, 1 drivers -v0x2652290_0 .net "downOut", 14 0, L_0x26702c0; alias, 1 drivers -v0x2652330_0 .net "instruction", 17 0, L_0x266dba0; 1 drivers -v0x26523f0 .array "instructions", 15 0, 17 0; -v0x26524b0_0 .var "last", 2 0; -o0x2b5f640fa3b8 .functor BUFZ 15, C4; HiZ drive -v0x2652590_0 .net "left", 14 0, o0x2b5f640fa3b8; 0 drivers -v0x2652670_0 .net "leftOut", 14 0, L_0x2670000; 1 drivers -v0x2652750_0 .var "mode", 2 0; -v0x2652830 .array/s "outVals", 2 5, 10 0; -v0x26529a0_0 .var "phase", 2 0; -v0x2652a80_0 .net "portsHaveData", 5 2, L_0x266d660; 1 drivers -v0x2650e50_0 .net "portsWantData", 5 2, L_0x266dcb0; 1 drivers -v0x2650f30_0 .net "readAckIn", 5 2, L_0x266e460; 1 drivers -v0x2652f30_0 .var "readAckOut", 5 2; -v0x2652fd0_0 .var "readTarget", 2 0; -v0x2653070_0 .var/s "readValue", 10 0; -L_0x2b5f64126138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x2653110 .array "regVals", 0 7; -v0x2653110_0 .net/s v0x2653110 0, 10 0, L_0x2b5f64126138; 1 drivers -v0x2653110_1 .net/s v0x2653110 1, 10 0, L_0x266cd60; 1 drivers -v0x2653110_2 .net/s v0x2653110 2, 10 0, L_0x266d080; 1 drivers -v0x2653110_3 .net/s v0x2653110 3, 10 0, L_0x266d120; 1 drivers -v0x2653110_4 .net/s v0x2653110 4, 10 0, L_0x266d1c0; 1 drivers -v0x2653110_5 .net/s v0x2653110 5, 10 0, L_0x266d260; 1 drivers -o0x2b5f640fa778 .functor BUFZ 11, C4; HiZ drive -v0x2653110_6 .net/s v0x2653110 6, 10 0, o0x2b5f640fa778; 0 drivers -o0x2b5f640fa7a8 .functor BUFZ 11, C4; HiZ drive -v0x2653110_7 .net/s v0x2653110 7, 10 0, o0x2b5f640fa7a8; 0 drivers -o0x2b5f640fa7d8 .functor BUFZ 15, C4; HiZ drive -v0x2653320_0 .net "right", 14 0, o0x2b5f640fa7d8; 0 drivers -v0x2653400_0 .net "rightOut", 14 0, L_0x2670870; 1 drivers -o0x2b5f640fa838 .functor BUFZ 15, C4; HiZ drive -v0x26534e0_0 .net "up", 14 0, o0x2b5f640fa838; 0 drivers -v0x26535c0_0 .net "upOut", 14 0, L_0x266fdb0; 1 drivers -v0x26536a0_0 .var "weHaveData", 5 2; -v0x2653780_0 .var "weWantData", 5 2; -v0x2653860_0 .net "writeAckIn", 5 2, L_0x266e980; 1 drivers -v0x2653940_0 .var "writeAckOut", 5 2; -v0x2653a20_0 .var "writeTarget", 2 0; -v0x2653b00_0 .var/s "writeValue", 10 0; -L_0x266d080 .part o0x2b5f640fa3b8, 0, 11; -L_0x266d120 .part o0x2b5f640fa7d8, 0, 11; -L_0x266d1c0 .part o0x2b5f640fa838, 0, 11; -L_0x266d260 .part L_0x2678050, 0, 11; -L_0x266d360 .part o0x2b5f640fa3b8, 11, 1; -L_0x266d480 .part o0x2b5f640fa7d8, 11, 1; -L_0x266d570 .part o0x2b5f640fa838, 11, 1; -L_0x266d660 .concat8 [ 1 1 1 1], L_0x266d360, L_0x266d480, L_0x266d570, L_0x266d840; -L_0x266d840 .part L_0x2678050, 11, 1; -L_0x266d9c0 .reduce/or L_0x266d660; -L_0x266da60 .part o0x2b5f640fa3b8, 12, 1; -L_0x266db00 .part o0x2b5f640fa7d8, 12, 1; -L_0x266dc10 .part o0x2b5f640fa838, 12, 1; -L_0x266dcb0 .concat8 [ 1 1 1 1], L_0x266da60, L_0x266db00, L_0x266dc10, L_0x266de50; -L_0x266de50 .part L_0x2678050, 12, 1; -L_0x266df40 .reduce/or L_0x266dcb0; -L_0x266e0c0 .part o0x2b5f640fa3b8, 13, 1; -L_0x266e1f0 .part o0x2b5f640fa7d8, 13, 1; -L_0x266e3c0 .part o0x2b5f640fa838, 13, 1; -L_0x266e460 .concat8 [ 1 1 1 1], L_0x266e0c0, L_0x266e1f0, L_0x266e3c0, L_0x266e320; -L_0x266e320 .part L_0x2678050, 13, 1; -L_0x266e660 .reduce/or L_0x266e460; -L_0x266e560 .part o0x2b5f640fa3b8, 14, 1; -L_0x266e810 .part o0x2b5f640fa7d8, 14, 1; -L_0x266e750 .part o0x2b5f640fa838, 14, 1; -L_0x266e980 .concat8 [ 1 1 1 1], L_0x266e560, L_0x266e810, L_0x266e750, L_0x266e8b0; -L_0x266e8b0 .part L_0x2678050, 14, 1; -L_0x266eca0 .reduce/or L_0x266e980; -L_0x266eb70 .part v0x2652f30_0, 0, 1; -L_0x266ee80 .part v0x2652f30_0, 1, 1; -L_0x266ed90 .part v0x2652f30_0, 2, 1; -L_0x266f070 .part v0x2652f30_0, 3, 1; -L_0x266ef70 .part v0x2653940_0, 0, 1; -L_0x266f2b0 .part v0x2653940_0, 1, 1; -L_0x266f1a0 .part v0x2653940_0, 2, 1; -L_0x266f470 .part v0x2653940_0, 3, 1; -L_0x266f350 .part v0x2653780_0, 0, 1; -L_0x266f6d0 .part v0x2653780_0, 1, 1; -L_0x266f5a0 .part v0x2653780_0, 2, 1; -L_0x266f8b0 .part v0x2653780_0, 3, 1; -L_0x266f770 .part v0x26536a0_0, 0, 1; -L_0x266faa0 .part v0x26536a0_0, 1, 1; -L_0x266f950 .part v0x26536a0_0, 2, 1; -L_0x266f9f0 .part v0x26536a0_0, 3, 1; -L_0x266fb40 .array/port v0x26523f0, L_0x266fea0; -L_0x266fea0 .concat [ 4 2 0 0], v0x264f5d0_0, L_0x2b5f64126180; -LS_0x266fdb0_0_0 .concat8 [ 11 1 1 1], v0x2652830_2, L_0x266f950, L_0x266f5a0, L_0x266f1a0; -LS_0x266fdb0_0_4 .concat8 [ 1 0 0 0], L_0x266ed90; -L_0x266fdb0 .concat8 [ 14 1 0 0], LS_0x266fdb0_0_0, LS_0x266fdb0_0_4; -LS_0x26702c0_0_0 .concat8 [ 11 1 1 1], v0x2652830_3, L_0x266f9f0, L_0x266f8b0, L_0x266f470; -LS_0x26702c0_0_4 .concat8 [ 1 0 0 0], L_0x266f070; -L_0x26702c0 .concat8 [ 14 1 0 0], LS_0x26702c0_0_0, LS_0x26702c0_0_4; -LS_0x2670000_0_0 .concat8 [ 11 1 1 1], v0x2652830_0, L_0x266f770, L_0x266f350, L_0x266ef70; -LS_0x2670000_0_4 .concat8 [ 1 0 0 0], L_0x266eb70; -L_0x2670000 .concat8 [ 14 1 0 0], LS_0x2670000_0_0, LS_0x2670000_0_4; -LS_0x2670870_0_0 .concat8 [ 11 1 1 1], v0x2652830_1, L_0x266faa0, L_0x266f6d0, L_0x266f2b0; -LS_0x2670870_0_4 .concat8 [ 1 0 0 0], L_0x266ee80; -L_0x2670870 .concat8 [ 14 1 0 0], LS_0x2670870_0_0, LS_0x2670870_0_4; -L_0x2670560 .part L_0x266dba0, 14, 4; -L_0x2670c80 .part L_0x266dba0, 11, 3; -L_0x2670a90 .part L_0x266dba0, 8, 3; -L_0x2670ed0 .part L_0x266dba0, 10, 4; -L_0x2670d20 .part L_0x266dba0, 0, 11; - .scope S_0x2644980; +P_0x2853e00 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x2853e40 .param/str "memFile" 0 3 60, "anyWrite/up.dat"; +L_0x2871bd0 .functor BUFZ 11, v0x2854100_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2871e20 .functor BUFZ 11, v0x2854100_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2872c60 .functor BUFZ 18, L_0x2874c00, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2854100_0 .var/s "ACC", 10 0; +v0x2854200_0 .var/s "BAK", 10 0; +v0x28542e0_0 .net "DST", 2 0, L_0x2875d40; 1 drivers +v0x28543a0_0 .net/s "IMM", 10 0, L_0x2875de0; 1 drivers +v0x2854480_0 .net "INST", 3 0, L_0x2875620; 1 drivers +v0x28545b0_0 .net "LABEL", 3 0, L_0x2875f90; 1 drivers +v0x2854690_0 .var "PC", 3 0; +v0x2854770_0 .var "PCNEXT", 3 0; +v0x2854850_0 .net "SRC", 2 0, L_0x2875b50; 1 drivers +v0x28549c0_0 .net *"_s103", 0 0, L_0x2873f40; 1 drivers +v0x2854aa0_0 .net *"_s107", 0 0, L_0x2873e50; 1 drivers +v0x2854b80_0 .net *"_s111", 0 0, L_0x2874130; 1 drivers +v0x2854c60_0 .net *"_s115", 0 0, L_0x2874030; 1 drivers +v0x2854d40_0 .net *"_s119", 0 0, L_0x2874370; 1 drivers +v0x2854e20_0 .net *"_s123", 0 0, L_0x2874260; 1 drivers +v0x2854f00_0 .net *"_s127", 0 0, L_0x2874530; 1 drivers +v0x2854fe0_0 .net *"_s131", 0 0, L_0x2874410; 1 drivers +v0x2855190_0 .net *"_s135", 0 0, L_0x2874790; 1 drivers +v0x2855230_0 .net *"_s139", 0 0, L_0x2874660; 1 drivers +v0x2855310_0 .net *"_s143", 0 0, L_0x2874970; 1 drivers +v0x28553f0_0 .net *"_s147", 0 0, L_0x2874830; 1 drivers +v0x28554d0_0 .net *"_s151", 0 0, L_0x2874b60; 1 drivers +v0x28555b0_0 .net *"_s155", 0 0, L_0x2874a10; 1 drivers +v0x2855690_0 .net *"_s159", 0 0, L_0x2874ab0; 1 drivers +v0x2855770_0 .net *"_s160", 17 0, L_0x2874c00; 1 drivers +v0x2855850_0 .net *"_s162", 5 0, L_0x2874f60; 1 drivers +L_0x2b28706ce180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2855930_0 .net *"_s165", 1 0, L_0x2b28706ce180; 1 drivers +v0x28578f0_2 .array/port v0x28578f0, 2; +v0x2855a10_0 .net *"_s173", 10 0, v0x28578f0_2; 1 drivers +v0x28578f0_3 .array/port v0x28578f0, 3; +v0x2855af0_0 .net *"_s179", 10 0, v0x28578f0_3; 1 drivers +v0x28578f0_0 .array/port v0x28578f0, 0; +v0x2855bd0_0 .net *"_s185", 10 0, v0x28578f0_0; 1 drivers +v0x28578f0_1 .array/port v0x28578f0, 1; +v0x2855cb0_0 .net *"_s191", 10 0, v0x28578f0_1; 1 drivers +v0x2855d90_0 .net *"_s23", 0 0, L_0x2872420; 1 drivers +v0x2855e70_0 .net *"_s27", 0 0, L_0x2872540; 1 drivers +v0x28550c0_0 .net *"_s31", 0 0, L_0x2872630; 1 drivers +v0x2856140_0 .net *"_s36", 0 0, L_0x2872900; 1 drivers +v0x2856220_0 .net *"_s42", 0 0, L_0x2872b20; 1 drivers +v0x2856300_0 .net *"_s46", 0 0, L_0x2872bc0; 1 drivers +v0x28563e0_0 .net *"_s50", 0 0, L_0x2872cd0; 1 drivers +v0x28564c0_0 .net *"_s55", 0 0, L_0x2872f10; 1 drivers +v0x28565a0_0 .net *"_s61", 0 0, L_0x2873180; 1 drivers +v0x2856680_0 .net *"_s65", 0 0, L_0x28732b0; 1 drivers +v0x2856760_0 .net *"_s69", 0 0, L_0x2873480; 1 drivers +v0x2856840_0 .net *"_s74", 0 0, L_0x28733e0; 1 drivers +v0x2856920_0 .net *"_s80", 0 0, L_0x2873620; 1 drivers +v0x2856a00_0 .net *"_s84", 0 0, L_0x28738d0; 1 drivers +v0x2856ae0_0 .net *"_s88", 0 0, L_0x2873810; 1 drivers +v0x2856bc0_0 .net *"_s93", 0 0, L_0x2873970; 1 drivers +v0x2856ca0_0 .net *"_s99", 0 0, L_0x2873c30; 1 drivers +v0x2856d80_0 .net/s "accOut", 10 0, L_0x2871bd0; alias, 1 drivers +v0x2856e60_0 .net "anyHasData", 0 0, L_0x2872a80; 1 drivers +v0x2856f20_0 .net "anyReadAck", 0 0, L_0x2873720; 1 drivers +v0x2856fe0_0 .net "anyWantData", 0 0, L_0x2873000; 1 drivers +v0x28570a0_0 .net "anyWriteAck", 0 0, L_0x2873d60; 1 drivers +v0x2857160_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers +v0x2857290_0 .net "down", 14 0, L_0x287d110; alias, 1 drivers +v0x2857350_0 .net "downOut", 14 0, L_0x2875380; alias, 1 drivers +v0x28573f0_0 .net "instruction", 17 0, L_0x2872c60; 1 drivers +v0x28574b0 .array "instructions", 15 0, 17 0; +v0x2857570_0 .var "last", 2 0; +o0x2b28706a23b8 .functor BUFZ 15, C4; HiZ drive +v0x2857650_0 .net "left", 14 0, o0x2b28706a23b8; 0 drivers +v0x2857730_0 .net "leftOut", 14 0, L_0x28750c0; 1 drivers +v0x2857810_0 .var "mode", 2 0; +v0x28578f0 .array/s "outVals", 2 5, 10 0; +v0x2857a60_0 .var "phase", 2 0; +v0x2857b40_0 .net "portsHaveData", 5 2, L_0x2872720; 1 drivers +v0x2855f10_0 .net "portsWantData", 5 2, L_0x2872d70; 1 drivers +v0x2855ff0_0 .net "readAckIn", 5 2, L_0x2873520; 1 drivers +v0x2857ff0_0 .var "readAckOut", 5 2; +v0x2858090_0 .var "readTarget", 2 0; +v0x2858130_0 .var/s "readValue", 10 0; +L_0x2b28706ce138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x28581d0 .array "regVals", 0 7; +v0x28581d0_0 .net/s v0x28581d0 0, 10 0, L_0x2b28706ce138; 1 drivers +v0x28581d0_1 .net/s v0x28581d0 1, 10 0, L_0x2871e20; 1 drivers +v0x28581d0_2 .net/s v0x28581d0 2, 10 0, L_0x2872140; 1 drivers +v0x28581d0_3 .net/s v0x28581d0 3, 10 0, L_0x28721e0; 1 drivers +v0x28581d0_4 .net/s v0x28581d0 4, 10 0, L_0x2872280; 1 drivers +v0x28581d0_5 .net/s v0x28581d0 5, 10 0, L_0x2872320; 1 drivers +o0x2b28706a2778 .functor BUFZ 11, C4; HiZ drive +v0x28581d0_6 .net/s v0x28581d0 6, 10 0, o0x2b28706a2778; 0 drivers +o0x2b28706a27a8 .functor BUFZ 11, C4; HiZ drive +v0x28581d0_7 .net/s v0x28581d0 7, 10 0, o0x2b28706a27a8; 0 drivers +o0x2b28706a27d8 .functor BUFZ 15, C4; HiZ drive +v0x28583e0_0 .net "right", 14 0, o0x2b28706a27d8; 0 drivers +v0x28584c0_0 .net "rightOut", 14 0, L_0x2875930; 1 drivers +o0x2b28706a2838 .functor BUFZ 15, C4; HiZ drive +v0x28585a0_0 .net "up", 14 0, o0x2b28706a2838; 0 drivers +v0x2858680_0 .net "upOut", 14 0, L_0x2874e70; 1 drivers +v0x2858760_0 .var "weHaveData", 5 2; +v0x2858840_0 .var "weWantData", 5 2; +v0x2858920_0 .net "writeAckIn", 5 2, L_0x2873a40; 1 drivers +v0x2858a00_0 .var "writeAckOut", 5 2; +v0x2858ae0_0 .var "writeTarget", 2 0; +v0x2858bc0_0 .var/s "writeValue", 10 0; +L_0x2872140 .part o0x2b28706a23b8, 0, 11; +L_0x28721e0 .part o0x2b28706a27d8, 0, 11; +L_0x2872280 .part o0x2b28706a2838, 0, 11; +L_0x2872320 .part L_0x287d110, 0, 11; +L_0x2872420 .part o0x2b28706a23b8, 11, 1; +L_0x2872540 .part o0x2b28706a27d8, 11, 1; +L_0x2872630 .part o0x2b28706a2838, 11, 1; +L_0x2872720 .concat8 [ 1 1 1 1], L_0x2872420, L_0x2872540, L_0x2872630, L_0x2872900; +L_0x2872900 .part L_0x287d110, 11, 1; +L_0x2872a80 .reduce/or L_0x2872720; +L_0x2872b20 .part o0x2b28706a23b8, 12, 1; +L_0x2872bc0 .part o0x2b28706a27d8, 12, 1; +L_0x2872cd0 .part o0x2b28706a2838, 12, 1; +L_0x2872d70 .concat8 [ 1 1 1 1], L_0x2872b20, L_0x2872bc0, L_0x2872cd0, L_0x2872f10; +L_0x2872f10 .part L_0x287d110, 12, 1; +L_0x2873000 .reduce/or L_0x2872d70; +L_0x2873180 .part o0x2b28706a23b8, 13, 1; +L_0x28732b0 .part o0x2b28706a27d8, 13, 1; +L_0x2873480 .part o0x2b28706a2838, 13, 1; +L_0x2873520 .concat8 [ 1 1 1 1], L_0x2873180, L_0x28732b0, L_0x2873480, L_0x28733e0; +L_0x28733e0 .part L_0x287d110, 13, 1; +L_0x2873720 .reduce/or L_0x2873520; +L_0x2873620 .part o0x2b28706a23b8, 14, 1; +L_0x28738d0 .part o0x2b28706a27d8, 14, 1; +L_0x2873810 .part o0x2b28706a2838, 14, 1; +L_0x2873a40 .concat8 [ 1 1 1 1], L_0x2873620, L_0x28738d0, L_0x2873810, L_0x2873970; +L_0x2873970 .part L_0x287d110, 14, 1; +L_0x2873d60 .reduce/or L_0x2873a40; +L_0x2873c30 .part v0x2857ff0_0, 0, 1; +L_0x2873f40 .part v0x2857ff0_0, 1, 1; +L_0x2873e50 .part v0x2857ff0_0, 2, 1; +L_0x2874130 .part v0x2857ff0_0, 3, 1; +L_0x2874030 .part v0x2858a00_0, 0, 1; +L_0x2874370 .part v0x2858a00_0, 1, 1; +L_0x2874260 .part v0x2858a00_0, 2, 1; +L_0x2874530 .part v0x2858a00_0, 3, 1; +L_0x2874410 .part v0x2858840_0, 0, 1; +L_0x2874790 .part v0x2858840_0, 1, 1; +L_0x2874660 .part v0x2858840_0, 2, 1; +L_0x2874970 .part v0x2858840_0, 3, 1; +L_0x2874830 .part v0x2858760_0, 0, 1; +L_0x2874b60 .part v0x2858760_0, 1, 1; +L_0x2874a10 .part v0x2858760_0, 2, 1; +L_0x2874ab0 .part v0x2858760_0, 3, 1; +L_0x2874c00 .array/port v0x28574b0, L_0x2874f60; +L_0x2874f60 .concat [ 4 2 0 0], v0x2854690_0, L_0x2b28706ce180; +LS_0x2874e70_0_0 .concat8 [ 11 1 1 1], v0x28578f0_2, L_0x2874a10, L_0x2874660, L_0x2874260; +LS_0x2874e70_0_4 .concat8 [ 1 0 0 0], L_0x2873e50; +L_0x2874e70 .concat8 [ 14 1 0 0], LS_0x2874e70_0_0, LS_0x2874e70_0_4; +LS_0x2875380_0_0 .concat8 [ 11 1 1 1], v0x28578f0_3, L_0x2874ab0, L_0x2874970, L_0x2874530; +LS_0x2875380_0_4 .concat8 [ 1 0 0 0], L_0x2874130; +L_0x2875380 .concat8 [ 14 1 0 0], LS_0x2875380_0_0, LS_0x2875380_0_4; +LS_0x28750c0_0_0 .concat8 [ 11 1 1 1], v0x28578f0_0, L_0x2874830, L_0x2874410, L_0x2874030; +LS_0x28750c0_0_4 .concat8 [ 1 0 0 0], L_0x2873c30; +L_0x28750c0 .concat8 [ 14 1 0 0], LS_0x28750c0_0_0, LS_0x28750c0_0_4; +LS_0x2875930_0_0 .concat8 [ 11 1 1 1], v0x28578f0_1, L_0x2874b60, L_0x2874790, L_0x2874370; +LS_0x2875930_0_4 .concat8 [ 1 0 0 0], L_0x2873f40; +L_0x2875930 .concat8 [ 14 1 0 0], LS_0x2875930_0_0, LS_0x2875930_0_4; +L_0x2875620 .part L_0x2872c60, 14, 4; +L_0x2875d40 .part L_0x2872c60, 11, 3; +L_0x2875b50 .part L_0x2872c60, 8, 3; +L_0x2875f90 .part L_0x2872c60, 10, 4; +L_0x2875de0 .part L_0x2872c60, 0, 11; + .scope S_0x28497f0; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2648430_0, 0, 3; + %store/vec4 v0x284d3a0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2648650_0, 0, 3; + %store/vec4 v0x284d5c0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2648190_0, 0, 3; + %store/vec4 v0x284d100_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2644e50_0, 0, 11; + %store/vec4 v0x2849d80_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2644f50_0, 0, 11; + %store/vec4 v0x2849e80_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2645390_0, 0, 4; + %store/vec4 v0x284a230_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2648be0_0, 0, 4; + %store/vec4 v0x284db50_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x26494d0_0, 0, 4; + %store/vec4 v0x284e400_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2649690_0, 0, 4; + %store/vec4 v0x284e5c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x26493f0_0, 0, 4; + %store/vec4 v0x284e320_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2648510, 4, 0; + %store/vec4a v0x284d480, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2648510, 4, 0; + %store/vec4a v0x284d480, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2648510, 4, 0; + %store/vec4a v0x284d480, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2648510, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x2644b80, v0x26480d0 {0 0 0}; + %store/vec4a v0x284d480, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x2849a30, v0x284d040 {0 0 0}; %end; .thread T_0; - .scope S_0x2644980; + .scope S_0x28497f0; T_1 ; - %wait E_0x25b8e20; - %load/vec4 v0x2648430_0; + %wait E_0x27bdb80; + %load/vec4 v0x284d3a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -977,7 +982,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x2648650_0; + %load/vec4 v0x284d5c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -992,185 +997,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x26451d0_0; + %load/vec4 v0x284a020_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x2648730_0; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284d6a0_0; + %load/vec4 v0x284a3f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2648be0_0, 4, 5; - %load/vec4 v0x2645550_0; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4/off/d v0x284db50_0, 4, 5; + %load/vec4 v0x284a3f0_0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2648430_0, 0; - %load/vec4 v0x2645550_0; - %assign/vec4 v0x2648cc0_0, 0; + %assign/vec4 v0x284d3a0_0, 0; + %load/vec4 v0x284a3f0_0; + %assign/vec4 v0x284dbf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26494d0_0, 4, 5; - %load/vec4 v0x2645550_0; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4/off/d v0x284e400_0, 4, 5; + %load/vec4 v0x284a3f0_0; + %assign/vec4 v0x284d100_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x2648730_0; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d6a0_0; + %load/vec4 v0x284d100_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2648430_0, 0; - %load/vec4 v0x2648190_0; - %assign/vec4 v0x2648cc0_0, 0; + %assign/vec4 v0x284d3a0_0, 0; + %load/vec4 v0x284d100_0; + %assign/vec4 v0x284dbf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26494d0_0, 4, 5; + %assign/vec4/off/d v0x284e400_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x2645550_0; + %load/vec4 v0x284a3f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x2647a40_0; + %load/vec4 v0x284ca00_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1178,29 +1183,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2648430_0, 0; - %load/vec4 v0x2645550_0; - %assign/vec4 v0x2648cc0_0, 0; + %assign/vec4 v0x284d3a0_0, 0; + %load/vec4 v0x284a3f0_0; + %assign/vec4 v0x284dbf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26494d0_0, 4, 5; + %assign/vec4/off/d v0x284e400_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26494d0_0, 4, 5; + %assign/vec4/off/d v0x284e400_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26494d0_0, 4, 5; + %assign/vec4/off/d v0x284e400_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26494d0_0, 4, 5; + %assign/vec4/off/d v0x284e400_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1208,10 +1213,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x26451d0_0; + %load/vec4 v0x284a020_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1278,180 +1283,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x2644e50_0; - %load/vec4 v0x2648da0_0; + %load/vec4 v0x2849d80_0; + %load/vec4 v0x284dcd0_0; %add; - %assign/vec4 v0x2644e50_0, 0; - %load/vec4 v0x2645390_0; + %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x2644e50_0; - %load/vec4 v0x2648da0_0; + %load/vec4 v0x2849d80_0; + %load/vec4 v0x284dcd0_0; %sub; - %assign/vec4 v0x2644e50_0, 0; - %load/vec4 v0x2645390_0; + %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284a230_0; %pad/u 11; - %load/vec4 v0x2648da0_0; + %load/vec4 v0x284dcd0_0; %add; %pad/u 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x2648da0_0; - %assign/vec4 v0x2649850_0, 0; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284dcd0_0; + %assign/vec4 v0x284e780_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x26450f0_0; - %assign/vec4 v0x2649850_0, 0; - %load/vec4 v0x2645390_0; + %load/vec4 v0x2849f60_0; + %assign/vec4 v0x284e780_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x2644e50_0; - %load/vec4 v0x26450f0_0; + %load/vec4 v0x2849d80_0; + %load/vec4 v0x2849f60_0; %add; - %assign/vec4 v0x2644e50_0, 0; - %load/vec4 v0x2645390_0; + %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x2644e50_0; - %load/vec4 v0x26450f0_0; + %load/vec4 v0x2849d80_0; + %load/vec4 v0x2849f60_0; %sub; - %assign/vec4 v0x2644e50_0, 0; - %load/vec4 v0x2645390_0; + %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284a230_0; %pad/u 11; - %load/vec4 v0x26450f0_0; + %load/vec4 v0x2849f60_0; %add; %pad/u 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x2644f50_0; - %assign/vec4 v0x2644e50_0, 0; - %load/vec4 v0x2644e50_0; - %assign/vec4 v0x2644f50_0, 0; - %load/vec4 v0x2645390_0; + %load/vec4 v0x2849e80_0; + %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x2849d80_0; + %assign/vec4 v0x2849e80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x2644e50_0; - %assign/vec4 v0x2644f50_0, 0; - %load/vec4 v0x2645390_0; + %load/vec4 v0x2849d80_0; + %assign/vec4 v0x2849e80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x2644e50_0; + %load/vec4 v0x2849d80_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2644e50_0, 0; - %load/vec4 v0x2645390_0; + %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x26452b0_0; - %assign/vec4 v0x2645470_0, 0; + %load/vec4 v0x284a150_0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x2644e50_0; + %load/vec4 v0x2849d80_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x26452b0_0; - %assign/vec4 v0x2645470_0, 0; + %load/vec4 v0x284a150_0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x2644e50_0; + %load/vec4 v0x2849d80_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x26452b0_0; - %assign/vec4 v0x2645470_0, 0; + %load/vec4 v0x284a150_0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2644e50_0; + %load/vec4 v0x2849d80_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x26452b0_0; - %assign/vec4 v0x2645470_0, 0; + %load/vec4 v0x284a150_0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x2644e50_0; + %load/vec4 v0x2849d80_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x26452b0_0; - %assign/vec4 v0x2645470_0, 0; + %load/vec4 v0x284a150_0; + %assign/vec4 v0x284a310_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x2645390_0; + %load/vec4 v0x284a230_0; %addi 1, 0, 4; - %assign/vec4 v0x2645470_0, 0; + %assign/vec4 v0x284a310_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x26451d0_0; + %load/vec4 v0x284a020_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x26451d0_0; + %load/vec4 v0x284a020_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x2645030_0; + %load/vec4 v0x2849b90_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x2645030_0; + %load/vec4 v0x2849b90_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1459,162 +1464,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x2645030_0; + %load/vec4 v0x2849b90_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x2649850_0; - %assign/vec4 v0x2644e50_0, 0; + %load/vec4 v0x284e780_0; + %assign/vec4 v0x2849d80_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648430_0, 0; - %load/vec4 v0x2645030_0; + %assign/vec4 v0x284d3a0_0, 0; + %load/vec4 v0x2849b90_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x2648190_0; - %assign/vec4 v0x2649770_0, 0; - %load/vec4 v0x2649850_0; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; + %assign/vec4 v0x284e6a0_0, 0; + %load/vec4 v0x284e780_0; + %load/vec4 v0x284d100_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2648190_0; + %load/vec4 v0x284d100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26493f0_0, 4, 5; + %assign/vec4/off/d v0x284e320_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x2645030_0; + %load/vec4 v0x2849b90_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x2645030_0; - %assign/vec4 v0x2649770_0, 0; - %load/vec4 v0x2649850_0; - %load/vec4 v0x2645030_0; + %load/vec4 v0x2849b90_0; + %assign/vec4 v0x284e6a0_0, 0; + %load/vec4 v0x284e780_0; + %load/vec4 v0x2849b90_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2645030_0; + %load/vec4 v0x2849b90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2645030_0; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x2849b90_0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x2647bc0_0; + %load/vec4 v0x284cb80_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x2645030_0; - %assign/vec4 v0x2649770_0, 0; + %load/vec4 v0x2849b90_0; + %assign/vec4 v0x284e6a0_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x2648650_0; + %load/vec4 v0x284d5c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1629,82 +1634,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x2648cc0_0; + %load/vec4 v0x284dbf0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x2647a40_0; + %load/vec4 v0x284ca00_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2648430_0, 0; + %assign/vec4 v0x284d3a0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x26494d0_0, 0, 4; - %load/vec4 v0x2648730_0; + %store/vec4 v0x284e400_0, 0, 4; + %load/vec4 v0x284d6a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x2648730_0; + %load/vec4 v0x284d6a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1712,54 +1717,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x2648730_0; - %load/vec4 v0x2648cc0_0; + %load/vec4 v0x284d6a0_0; + %load/vec4 v0x284dbf0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2648430_0, 0; - %load/vec4 v0x2648cc0_0; + %assign/vec4 v0x284d3a0_0, 0; + %load/vec4 v0x284dbf0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2648e80, 4; - %assign/vec4 v0x2648da0_0, 0; + %load/vec4a v0x284ddb0, 4; + %assign/vec4 v0x284dcd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2648cc0_0; + %load/vec4 v0x284dbf0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2648be0_0, 4, 5; + %assign/vec4/off/d v0x284db50_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2648cc0_0; + %load/vec4 v0x284dbf0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26494d0_0, 4, 5; - %load/vec4 v0x2648cc0_0; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4/off/d v0x284e400_0, 4, 5; + %load/vec4 v0x284dbf0_0; + %assign/vec4 v0x284d100_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x2648650_0; + %load/vec4 v0x284d5c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1775,93 +1780,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x2649770_0; + %load/vec4 v0x284e6a0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x2647bc0_0; + %load/vec4 v0x284cb80_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x2646b30_0; + %load/vec4 v0x284bab0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2649770_0, 0; + %assign/vec4 v0x284e6a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26493f0_0, 4, 5; - %load/vec4 v0x2649850_0; + %assign/vec4/off/d v0x284e320_0, 4, 5; + %load/vec4 v0x284e780_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2648510, 0, 4; + %assign/vec4/a/d v0x284d480, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d100_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1869,33 +1874,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x2649770_0; + %load/vec4 v0x284e6a0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x26495b0_0; - %load/vec4 v0x2649770_0; + %load/vec4 v0x284e4e0_0; + %load/vec4 v0x284e6a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x2649770_0; + %load/vec4 v0x284e6a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x26493f0_0, 4, 1; + %store/vec4 v0x284e320_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2648430_0, 0; - %load/vec4 v0x2649770_0; - %assign/vec4 v0x2648190_0, 0; + %assign/vec4 v0x284d3a0_0, 0; + %load/vec4 v0x284e6a0_0; + %assign/vec4 v0x284d100_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2648650_0, 0; + %assign/vec4 v0x284d5c0_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1904,19 +1909,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x2644980; + .scope S_0x28497f0; T_2 ; - %wait E_0x25966a0; - %load/vec4 v0x2648650_0; + %wait E_0x279b3d0; + %load/vec4 v0x284d5c0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2648430_0; + %load/vec4 v0x284d3a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x2645470_0; + %load/vec4 v0x284a310_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1925,62 +1930,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x2645470_0; - %assign/vec4 v0x2645390_0, 0; + %load/vec4 v0x284a310_0; + %assign/vec4 v0x284a230_0, 0; T_2.0 ; - %load/vec4 v0x2648650_0; + %load/vec4 v0x284d5c0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2648be0_0, 0, 4; + %store/vec4 v0x284db50_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x2649ad0; + .scope S_0x284ea00; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x264d5e0_0, 0, 3; + %store/vec4 v0x28525d0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x264d810_0, 0, 3; + %store/vec4 v0x2852800_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x264d3a0_0, 0, 3; + %store/vec4 v0x2852390_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2649f90_0, 0, 11; + %store/vec4 v0x284ef80_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x264a090_0, 0, 11; + %store/vec4 v0x284f080_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264a4d0_0, 0, 4; + %store/vec4 v0x284f4c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264dda0_0, 0, 4; + %store/vec4 v0x2852d90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264e5f0_0, 0, 4; + %store/vec4 v0x28535e0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264e7b0_0, 0, 4; + %store/vec4 v0x28537a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264e510_0, 0, 4; + %store/vec4 v0x2853500_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x264d6a0, 4, 0; + %store/vec4a v0x2852690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x264d6a0, 4, 0; + %store/vec4a v0x2852690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x264d6a0, 4, 0; + %store/vec4a v0x2852690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x264d6a0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x2649ca0, v0x264d2e0 {0 0 0}; + %store/vec4a v0x2852690, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x284ec10, v0x28522d0 {0 0 0}; %end; .thread T_3; - .scope S_0x2649ad0; + .scope S_0x284ea00; T_4 ; - %wait E_0x25b8e20; - %load/vec4 v0x264d5e0_0; + %wait E_0x27bdb80; + %load/vec4 v0x28525d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1995,7 +2000,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x264d810_0; + %load/vec4 v0x2852800_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2010,185 +2015,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x264a310_0; + %load/vec4 v0x284f300_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x264d8f0_0; - %load/vec4 v0x264a690_0; + %load/vec4 v0x28528e0_0; + %load/vec4 v0x284f680_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264dda0_0, 4, 5; - %load/vec4 v0x264a690_0; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4/off/d v0x2852d90_0, 4, 5; + %load/vec4 v0x284f680_0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; - %load/vec4 v0x264a690_0; - %assign/vec4 v0x264de40_0, 0; + %assign/vec4 v0x28525d0_0, 0; + %load/vec4 v0x284f680_0; + %assign/vec4 v0x2852e30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; - %load/vec4 v0x264a690_0; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4/off/d v0x28535e0_0, 4, 5; + %load/vec4 v0x284f680_0; + %assign/vec4 v0x2852390_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x264d8f0_0; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x28528e0_0; + %load/vec4 v0x2852390_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; - %load/vec4 v0x264d3a0_0; - %assign/vec4 v0x264de40_0, 0; + %assign/vec4 v0x28525d0_0, 0; + %load/vec4 v0x2852390_0; + %assign/vec4 v0x2852e30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %assign/vec4/off/d v0x28535e0_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x264a690_0; + %load/vec4 v0x284f680_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x264cca0_0; + %load/vec4 v0x2851c90_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2196,29 +2201,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; - %load/vec4 v0x264a690_0; - %assign/vec4 v0x264de40_0, 0; + %assign/vec4 v0x28525d0_0, 0; + %load/vec4 v0x284f680_0; + %assign/vec4 v0x2852e30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %assign/vec4/off/d v0x28535e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %assign/vec4/off/d v0x28535e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %assign/vec4/off/d v0x28535e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; + %assign/vec4/off/d v0x28535e0_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2226,10 +2231,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x264a310_0; + %load/vec4 v0x284f300_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2296,180 +2301,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x2649f90_0; - %load/vec4 v0x264dee0_0; + %load/vec4 v0x284ef80_0; + %load/vec4 v0x2852ed0_0; %add; - %assign/vec4 v0x2649f90_0, 0; - %load/vec4 v0x264a4d0_0; + %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x2649f90_0; - %load/vec4 v0x264dee0_0; + %load/vec4 v0x284ef80_0; + %load/vec4 v0x2852ed0_0; %sub; - %assign/vec4 v0x2649f90_0, 0; - %load/vec4 v0x264a4d0_0; + %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f4c0_0; %pad/u 11; - %load/vec4 v0x264dee0_0; + %load/vec4 v0x2852ed0_0; %add; %pad/u 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x264dee0_0; - %assign/vec4 v0x264e970_0, 0; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x2852ed0_0; + %assign/vec4 v0x2853960_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x264a230_0; - %assign/vec4 v0x264e970_0, 0; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f220_0; + %assign/vec4 v0x2853960_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x2649f90_0; - %load/vec4 v0x264a230_0; + %load/vec4 v0x284ef80_0; + %load/vec4 v0x284f220_0; %add; - %assign/vec4 v0x2649f90_0, 0; - %load/vec4 v0x264a4d0_0; + %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x2649f90_0; - %load/vec4 v0x264a230_0; + %load/vec4 v0x284ef80_0; + %load/vec4 v0x284f220_0; %sub; - %assign/vec4 v0x2649f90_0, 0; - %load/vec4 v0x264a4d0_0; + %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f4c0_0; %pad/u 11; - %load/vec4 v0x264a230_0; + %load/vec4 v0x284f220_0; %add; %pad/u 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x264a090_0; - %assign/vec4 v0x2649f90_0, 0; - %load/vec4 v0x2649f90_0; - %assign/vec4 v0x264a090_0, 0; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f080_0; + %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x284ef80_0; + %assign/vec4 v0x284f080_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x2649f90_0; - %assign/vec4 v0x264a090_0, 0; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284ef80_0; + %assign/vec4 v0x284f080_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x2649f90_0; + %load/vec4 v0x284ef80_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2649f90_0, 0; - %load/vec4 v0x264a4d0_0; + %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x264a3f0_0; - %assign/vec4 v0x264a5b0_0, 0; + %load/vec4 v0x284f3e0_0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x2649f90_0; + %load/vec4 v0x284ef80_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x264a3f0_0; - %assign/vec4 v0x264a5b0_0, 0; + %load/vec4 v0x284f3e0_0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x2649f90_0; + %load/vec4 v0x284ef80_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x264a3f0_0; - %assign/vec4 v0x264a5b0_0, 0; + %load/vec4 v0x284f3e0_0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2649f90_0; + %load/vec4 v0x284ef80_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x264a3f0_0; - %assign/vec4 v0x264a5b0_0, 0; + %load/vec4 v0x284f3e0_0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x2649f90_0; + %load/vec4 v0x284ef80_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x264a3f0_0; - %assign/vec4 v0x264a5b0_0, 0; + %load/vec4 v0x284f3e0_0; + %assign/vec4 v0x284f5a0_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x264a4d0_0; + %load/vec4 v0x284f4c0_0; %addi 1, 0, 4; - %assign/vec4 v0x264a5b0_0, 0; + %assign/vec4 v0x284f5a0_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x264a310_0; + %load/vec4 v0x284f300_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x264a310_0; + %load/vec4 v0x284f300_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x264a170_0; + %load/vec4 v0x284f160_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x264a170_0; + %load/vec4 v0x284f160_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2477,162 +2482,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x264a170_0; + %load/vec4 v0x284f160_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x264e970_0; - %assign/vec4 v0x2649f90_0, 0; + %load/vec4 v0x2853960_0; + %assign/vec4 v0x284ef80_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; - %load/vec4 v0x264a170_0; + %assign/vec4 v0x28525d0_0, 0; + %load/vec4 v0x284f160_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x264d3a0_0; - %assign/vec4 v0x264e890_0, 0; - %load/vec4 v0x264e970_0; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; + %assign/vec4 v0x2853880_0, 0; + %load/vec4 v0x2853960_0; + %load/vec4 v0x2852390_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264d3a0_0; + %load/vec4 v0x2852390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264e510_0, 4, 5; + %assign/vec4/off/d v0x2853500_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x264a170_0; + %load/vec4 v0x284f160_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x264a170_0; - %assign/vec4 v0x264e890_0, 0; - %load/vec4 v0x264e970_0; - %load/vec4 v0x264a170_0; + %load/vec4 v0x284f160_0; + %assign/vec4 v0x2853880_0, 0; + %load/vec4 v0x2853960_0; + %load/vec4 v0x284f160_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264a170_0; + %load/vec4 v0x284f160_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264a170_0; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x284f160_0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x264ce20_0; + %load/vec4 v0x2851e10_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x264a170_0; - %assign/vec4 v0x264e890_0, 0; + %load/vec4 v0x284f160_0; + %assign/vec4 v0x2853880_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x264d810_0; + %load/vec4 v0x2852800_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2647,82 +2652,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x264de40_0; + %load/vec4 v0x2852e30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x264cca0_0; + %load/vec4 v0x2851c90_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; + %assign/vec4 v0x28525d0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264e5f0_0, 0, 4; - %load/vec4 v0x264d8f0_0; + %store/vec4 v0x28535e0_0, 0, 4; + %load/vec4 v0x28528e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x264d8f0_0; + %load/vec4 v0x28528e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2730,54 +2735,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x264d8f0_0; - %load/vec4 v0x264de40_0; + %load/vec4 v0x28528e0_0; + %load/vec4 v0x2852e30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; - %load/vec4 v0x264de40_0; + %assign/vec4 v0x28525d0_0, 0; + %load/vec4 v0x2852e30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x264df80, 4; - %assign/vec4 v0x264dee0_0, 0; + %load/vec4a v0x2852f70, 4; + %assign/vec4 v0x2852ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264de40_0; + %load/vec4 v0x2852e30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264dda0_0, 4, 5; + %assign/vec4/off/d v0x2852d90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264de40_0; + %load/vec4 v0x2852e30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x264e5f0_0, 4, 5; - %load/vec4 v0x264de40_0; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4/off/d v0x28535e0_0, 4, 5; + %load/vec4 v0x2852e30_0; + %assign/vec4 v0x2852390_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x264d810_0; + %load/vec4 v0x2852800_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2793,93 +2798,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x264e890_0; + %load/vec4 v0x2853880_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x264ce20_0; + %load/vec4 v0x2851e10_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x264bd50_0; + %load/vec4 v0x2850d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x264e890_0, 0; + %assign/vec4 v0x2853880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x264e510_0, 4, 5; - %load/vec4 v0x264e970_0; + %assign/vec4/off/d v0x2853500_0, 4, 5; + %load/vec4 v0x2853960_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x264d6a0, 0, 4; + %assign/vec4/a/d v0x2852690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x2852390_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2887,33 +2892,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x264e890_0; + %load/vec4 v0x2853880_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x264e6d0_0; - %load/vec4 v0x264e890_0; + %load/vec4 v0x28536c0_0; + %load/vec4 v0x2853880_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x264e890_0; + %load/vec4 v0x2853880_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x264e510_0, 4, 1; + %store/vec4 v0x2853500_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x264d5e0_0, 0; - %load/vec4 v0x264e890_0; - %assign/vec4 v0x264d3a0_0, 0; + %assign/vec4 v0x28525d0_0, 0; + %load/vec4 v0x2853880_0; + %assign/vec4 v0x2852390_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x264d810_0, 0; + %assign/vec4 v0x2852800_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2922,19 +2927,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x2649ad0; + .scope S_0x284ea00; T_5 ; - %wait E_0x25966a0; - %load/vec4 v0x264d810_0; + %wait E_0x279b3d0; + %load/vec4 v0x2852800_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x264d5e0_0; + %load/vec4 v0x28525d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x264a5b0_0; + %load/vec4 v0x284f5a0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2943,62 +2948,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x264a5b0_0; - %assign/vec4 v0x264a4d0_0, 0; + %load/vec4 v0x284f5a0_0; + %assign/vec4 v0x284f4c0_0, 0; T_5.0 ; - %load/vec4 v0x264d810_0; + %load/vec4 v0x2852800_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264dda0_0, 0, 4; + %store/vec4 v0x2852d90_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x264ebf0; + .scope S_0x2853be0; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2652750_0, 0, 3; + %store/vec4 v0x2857810_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x26529a0_0, 0, 3; + %store/vec4 v0x2857a60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x26524b0_0, 0, 3; + %store/vec4 v0x2857570_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x264f040_0, 0, 11; + %store/vec4 v0x2854100_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x264f140_0, 0, 11; + %store/vec4 v0x2854200_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x264f5d0_0, 0, 4; + %store/vec4 v0x2854690_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2652f30_0, 0, 4; + %store/vec4 v0x2857ff0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2653780_0, 0, 4; + %store/vec4 v0x2858840_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2653940_0, 0, 4; + %store/vec4 v0x2858a00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x26536a0_0, 0, 4; + %store/vec4 v0x2858760_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2652830, 4, 0; + %store/vec4a v0x28578f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2652830, 4, 0; + %store/vec4a v0x28578f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2652830, 4, 0; + %store/vec4a v0x28578f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2652830, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x264ee10, v0x26523f0 {0 0 0}; + %store/vec4a v0x28578f0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x2853e40, v0x28574b0 {0 0 0}; %end; .thread T_6; - .scope S_0x264ebf0; + .scope S_0x2853be0; T_7 ; - %wait E_0x25b8e20; - %load/vec4 v0x2652750_0; + %wait E_0x27bdb80; + %load/vec4 v0x2857810_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3013,7 +3018,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x26529a0_0; + %load/vec4 v0x2857a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3028,185 +3033,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x264f3c0_0; + %load/vec4 v0x2854480_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x2652a80_0; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2857b40_0; + %load/vec4 v0x2854850_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2652f30_0, 4, 5; - %load/vec4 v0x264f790_0; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %load/vec4 v0x2854850_0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2652750_0, 0; - %load/vec4 v0x264f790_0; - %assign/vec4 v0x2652fd0_0, 0; + %assign/vec4 v0x2857810_0, 0; + %load/vec4 v0x2854850_0; + %assign/vec4 v0x2858090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2653780_0, 4, 5; - %load/vec4 v0x264f790_0; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4/off/d v0x2858840_0, 4, 5; + %load/vec4 v0x2854850_0; + %assign/vec4 v0x2857570_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x2652a80_0; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857b40_0; + %load/vec4 v0x2857570_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2652750_0, 0; - %load/vec4 v0x26524b0_0; - %assign/vec4 v0x2652fd0_0, 0; + %assign/vec4 v0x2857810_0, 0; + %load/vec4 v0x2857570_0; + %assign/vec4 v0x2858090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2653780_0, 4, 5; + %assign/vec4/off/d v0x2858840_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x264f790_0; + %load/vec4 v0x2854850_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x2651da0_0; + %load/vec4 v0x2856e60_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3214,29 +3219,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2652750_0, 0; - %load/vec4 v0x264f790_0; - %assign/vec4 v0x2652fd0_0, 0; + %assign/vec4 v0x2857810_0, 0; + %load/vec4 v0x2854850_0; + %assign/vec4 v0x2858090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2653780_0, 4, 5; + %assign/vec4/off/d v0x2858840_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2653780_0, 4, 5; + %assign/vec4/off/d v0x2858840_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2653780_0, 4, 5; + %assign/vec4/off/d v0x2858840_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2653780_0, 4, 5; + %assign/vec4/off/d v0x2858840_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3244,10 +3249,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x264f3c0_0; + %load/vec4 v0x2854480_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3314,180 +3319,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x264f040_0; - %load/vec4 v0x2653070_0; + %load/vec4 v0x2854100_0; + %load/vec4 v0x2858130_0; %add; - %assign/vec4 v0x264f040_0, 0; - %load/vec4 v0x264f5d0_0; + %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x264f040_0; - %load/vec4 v0x2653070_0; + %load/vec4 v0x2854100_0; + %load/vec4 v0x2858130_0; %sub; - %assign/vec4 v0x264f040_0, 0; - %load/vec4 v0x264f5d0_0; + %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854690_0; %pad/u 11; - %load/vec4 v0x2653070_0; + %load/vec4 v0x2858130_0; %add; %pad/u 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x2653070_0; - %assign/vec4 v0x2653b00_0, 0; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2858130_0; + %assign/vec4 v0x2858bc0_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x264f2e0_0; - %assign/vec4 v0x2653b00_0, 0; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x28543a0_0; + %assign/vec4 v0x2858bc0_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x264f040_0; - %load/vec4 v0x264f2e0_0; + %load/vec4 v0x2854100_0; + %load/vec4 v0x28543a0_0; %add; - %assign/vec4 v0x264f040_0, 0; - %load/vec4 v0x264f5d0_0; + %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x264f040_0; - %load/vec4 v0x264f2e0_0; + %load/vec4 v0x2854100_0; + %load/vec4 v0x28543a0_0; %sub; - %assign/vec4 v0x264f040_0, 0; - %load/vec4 v0x264f5d0_0; + %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854690_0; %pad/u 11; - %load/vec4 v0x264f2e0_0; + %load/vec4 v0x28543a0_0; %add; %pad/u 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x264f140_0; - %assign/vec4 v0x264f040_0, 0; - %load/vec4 v0x264f040_0; - %assign/vec4 v0x264f140_0, 0; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854200_0; + %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x2854100_0; + %assign/vec4 v0x2854200_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x264f040_0; - %assign/vec4 v0x264f140_0, 0; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854100_0; + %assign/vec4 v0x2854200_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x264f040_0; + %load/vec4 v0x2854100_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x264f040_0, 0; - %load/vec4 v0x264f5d0_0; + %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x264f4f0_0; - %assign/vec4 v0x264f6b0_0, 0; + %load/vec4 v0x28545b0_0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x264f040_0; + %load/vec4 v0x2854100_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x264f4f0_0; - %assign/vec4 v0x264f6b0_0, 0; + %load/vec4 v0x28545b0_0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x264f040_0; + %load/vec4 v0x2854100_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x264f4f0_0; - %assign/vec4 v0x264f6b0_0, 0; + %load/vec4 v0x28545b0_0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x264f040_0; + %load/vec4 v0x2854100_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x264f4f0_0; - %assign/vec4 v0x264f6b0_0, 0; + %load/vec4 v0x28545b0_0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x264f040_0; + %load/vec4 v0x2854100_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x264f4f0_0; - %assign/vec4 v0x264f6b0_0, 0; + %load/vec4 v0x28545b0_0; + %assign/vec4 v0x2854770_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x264f5d0_0; + %load/vec4 v0x2854690_0; %addi 1, 0, 4; - %assign/vec4 v0x264f6b0_0, 0; + %assign/vec4 v0x2854770_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x264f3c0_0; + %load/vec4 v0x2854480_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x264f3c0_0; + %load/vec4 v0x2854480_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x264f220_0; + %load/vec4 v0x28542e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x264f220_0; + %load/vec4 v0x28542e0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3495,162 +3500,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x264f220_0; + %load/vec4 v0x28542e0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x2653b00_0; - %assign/vec4 v0x264f040_0, 0; + %load/vec4 v0x2858bc0_0; + %assign/vec4 v0x2854100_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2652750_0, 0; - %load/vec4 v0x264f220_0; + %assign/vec4 v0x2857810_0, 0; + %load/vec4 v0x28542e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x26524b0_0; - %assign/vec4 v0x2653a20_0, 0; - %load/vec4 v0x2653b00_0; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; + %assign/vec4 v0x2858ae0_0, 0; + %load/vec4 v0x2858bc0_0; + %load/vec4 v0x2857570_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x26524b0_0; + %load/vec4 v0x2857570_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26536a0_0, 4, 5; + %assign/vec4/off/d v0x2858760_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x264f220_0; + %load/vec4 v0x28542e0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x264f220_0; - %assign/vec4 v0x2653a20_0, 0; - %load/vec4 v0x2653b00_0; - %load/vec4 v0x264f220_0; + %load/vec4 v0x28542e0_0; + %assign/vec4 v0x2858ae0_0, 0; + %load/vec4 v0x2858bc0_0; + %load/vec4 v0x28542e0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x264f220_0; + %load/vec4 v0x28542e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x264f220_0; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x28542e0_0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x2651f20_0; + %load/vec4 v0x2856fe0_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x264f220_0; - %assign/vec4 v0x2653a20_0, 0; + %load/vec4 v0x28542e0_0; + %assign/vec4 v0x2858ae0_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x26529a0_0; + %load/vec4 v0x2857a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3665,82 +3670,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x2652fd0_0; + %load/vec4 v0x2858090_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x2651da0_0; + %load/vec4 v0x2856e60_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2652750_0, 0; + %assign/vec4 v0x2857810_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2653780_0, 0, 4; - %load/vec4 v0x2652a80_0; + %store/vec4 v0x2858840_0, 0, 4; + %load/vec4 v0x2857b40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x2652a80_0; + %load/vec4 v0x2857b40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3748,54 +3753,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x2652a80_0; - %load/vec4 v0x2652fd0_0; + %load/vec4 v0x2857b40_0; + %load/vec4 v0x2858090_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2652750_0, 0; - %load/vec4 v0x2652fd0_0; + %assign/vec4 v0x2857810_0, 0; + %load/vec4 v0x2858090_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2653110, 4; - %assign/vec4 v0x2653070_0, 0; + %load/vec4a v0x28581d0, 4; + %assign/vec4 v0x2858130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2652fd0_0; + %load/vec4 v0x2858090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2652f30_0, 4, 5; + %assign/vec4/off/d v0x2857ff0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2652fd0_0; + %load/vec4 v0x2858090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2653780_0, 4, 5; - %load/vec4 v0x2652fd0_0; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4/off/d v0x2858840_0, 4, 5; + %load/vec4 v0x2858090_0; + %assign/vec4 v0x2857570_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x26529a0_0; + %load/vec4 v0x2857a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3811,93 +3816,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x2653a20_0; + %load/vec4 v0x2858ae0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x2651f20_0; + %load/vec4 v0x2856fe0_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x2650e50_0; + %load/vec4 v0x2855f10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2653a20_0, 0; + %assign/vec4 v0x2858ae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26536a0_0, 4, 5; - %load/vec4 v0x2653b00_0; + %assign/vec4/off/d v0x2858760_0, 4, 5; + %load/vec4 v0x2858bc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2652830, 0, 4; + %assign/vec4/a/d v0x28578f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857570_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3905,33 +3910,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x2653a20_0; + %load/vec4 v0x2858ae0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x2653860_0; - %load/vec4 v0x2653a20_0; + %load/vec4 v0x2858920_0; + %load/vec4 v0x2858ae0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x2653a20_0; + %load/vec4 v0x2858ae0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x26536a0_0, 4, 1; + %store/vec4 v0x2858760_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2652750_0, 0; - %load/vec4 v0x2653a20_0; - %assign/vec4 v0x26524b0_0, 0; + %assign/vec4 v0x2857810_0, 0; + %load/vec4 v0x2858ae0_0; + %assign/vec4 v0x2857570_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26529a0_0, 0; + %assign/vec4 v0x2857a60_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3940,19 +3945,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x264ebf0; + .scope S_0x2853be0; T_8 ; - %wait E_0x25966a0; - %load/vec4 v0x26529a0_0; + %wait E_0x279b3d0; + %load/vec4 v0x2857a60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2652750_0; + %load/vec4 v0x2857810_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x264f6b0_0; + %load/vec4 v0x2854770_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3961,62 +3966,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x264f6b0_0; - %assign/vec4 v0x264f5d0_0, 0; + %load/vec4 v0x2854770_0; + %assign/vec4 v0x2854690_0, 0; T_8.0 ; - %load/vec4 v0x26529a0_0; + %load/vec4 v0x2857a60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2652f30_0, 0, 4; + %store/vec4 v0x2857ff0_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x263f850; + .scope S_0x2844600; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x26433a0_0, 0, 3; + %store/vec4 v0x2848210_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x26435c0_0, 0, 3; + %store/vec4 v0x2848430_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2643100_0, 0, 3; + %store/vec4 v0x2847f70_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x263fd10_0, 0, 11; + %store/vec4 v0x2844b80_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x263fe10_0, 0, 11; + %store/vec4 v0x2844c80_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2640250_0, 0, 4; + %store/vec4 v0x28450c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2643b50_0, 0, 4; + %store/vec4 v0x28489c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2644380_0, 0, 4; + %store/vec4 v0x28491f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2644540_0, 0, 4; + %store/vec4 v0x28493b0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x26442c0_0, 0, 4; + %store/vec4 v0x2849130_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2643480, 4, 0; + %store/vec4a v0x28482f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2643480, 4, 0; + %store/vec4a v0x28482f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2643480, 4, 0; + %store/vec4a v0x28482f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2643480, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x263fa40, v0x2643040 {0 0 0}; + %store/vec4a v0x28482f0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x2844830, v0x2847eb0 {0 0 0}; %end; .thread T_9; - .scope S_0x263f850; + .scope S_0x2844600; T_10 ; - %wait E_0x25b8e20; - %load/vec4 v0x26433a0_0; + %wait E_0x27bdb80; + %load/vec4 v0x2848210_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4031,7 +4036,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x26435c0_0; + %load/vec4 v0x2848430_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4046,185 +4051,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x2640090_0; + %load/vec4 v0x2844f00_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x26436a0_0; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2848510_0; + %load/vec4 v0x2845280_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2643b50_0, 4, 5; - %load/vec4 v0x2640410_0; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4/off/d v0x28489c0_0, 4, 5; + %load/vec4 v0x2845280_0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26433a0_0, 0; - %load/vec4 v0x2640410_0; - %assign/vec4 v0x2643bf0_0, 0; + %assign/vec4 v0x2848210_0, 0; + %load/vec4 v0x2845280_0; + %assign/vec4 v0x2848a60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2644380_0, 4, 5; - %load/vec4 v0x2640410_0; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4/off/d v0x28491f0_0, 4, 5; + %load/vec4 v0x2845280_0; + %assign/vec4 v0x2847f70_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x26436a0_0; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2848510_0; + %load/vec4 v0x2847f70_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26433a0_0, 0; - %load/vec4 v0x2643100_0; - %assign/vec4 v0x2643bf0_0, 0; + %assign/vec4 v0x2848210_0, 0; + %load/vec4 v0x2847f70_0; + %assign/vec4 v0x2848a60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2644380_0, 4, 5; + %assign/vec4/off/d v0x28491f0_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x2640410_0; + %load/vec4 v0x2845280_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x2642a20_0; + %load/vec4 v0x2847890_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4232,29 +4237,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26433a0_0, 0; - %load/vec4 v0x2640410_0; - %assign/vec4 v0x2643bf0_0, 0; + %assign/vec4 v0x2848210_0, 0; + %load/vec4 v0x2845280_0; + %assign/vec4 v0x2848a60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2644380_0, 4, 5; + %assign/vec4/off/d v0x28491f0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2644380_0, 4, 5; + %assign/vec4/off/d v0x28491f0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2644380_0, 4, 5; + %assign/vec4/off/d v0x28491f0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2644380_0, 4, 5; + %assign/vec4/off/d v0x28491f0_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4262,10 +4267,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x2640090_0; + %load/vec4 v0x2844f00_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4332,180 +4337,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x263fd10_0; - %load/vec4 v0x2643c90_0; + %load/vec4 v0x2844b80_0; + %load/vec4 v0x2848b00_0; %add; - %assign/vec4 v0x263fd10_0, 0; - %load/vec4 v0x2640250_0; + %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x263fd10_0; - %load/vec4 v0x2643c90_0; + %load/vec4 v0x2844b80_0; + %load/vec4 v0x2848b00_0; %sub; - %assign/vec4 v0x263fd10_0, 0; - %load/vec4 v0x2640250_0; + %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x2640250_0; + %load/vec4 v0x28450c0_0; %pad/u 11; - %load/vec4 v0x2643c90_0; + %load/vec4 v0x2848b00_0; %add; %pad/u 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x2643c90_0; - %assign/vec4 v0x2644700_0, 0; - %load/vec4 v0x2640250_0; + %load/vec4 v0x2848b00_0; + %assign/vec4 v0x2849570_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x263ffb0_0; - %assign/vec4 v0x2644700_0, 0; - %load/vec4 v0x2640250_0; + %load/vec4 v0x2844e20_0; + %assign/vec4 v0x2849570_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x263fd10_0; - %load/vec4 v0x263ffb0_0; + %load/vec4 v0x2844b80_0; + %load/vec4 v0x2844e20_0; %add; - %assign/vec4 v0x263fd10_0, 0; - %load/vec4 v0x2640250_0; + %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x263fd10_0; - %load/vec4 v0x263ffb0_0; + %load/vec4 v0x2844b80_0; + %load/vec4 v0x2844e20_0; %sub; - %assign/vec4 v0x263fd10_0, 0; - %load/vec4 v0x2640250_0; + %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x2640250_0; + %load/vec4 v0x28450c0_0; %pad/u 11; - %load/vec4 v0x263ffb0_0; + %load/vec4 v0x2844e20_0; %add; %pad/u 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x263fe10_0; - %assign/vec4 v0x263fd10_0, 0; - %load/vec4 v0x263fd10_0; - %assign/vec4 v0x263fe10_0, 0; - %load/vec4 v0x2640250_0; + %load/vec4 v0x2844c80_0; + %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x2844b80_0; + %assign/vec4 v0x2844c80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x263fd10_0; - %assign/vec4 v0x263fe10_0, 0; - %load/vec4 v0x2640250_0; + %load/vec4 v0x2844b80_0; + %assign/vec4 v0x2844c80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x263fd10_0; + %load/vec4 v0x2844b80_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x263fd10_0, 0; - %load/vec4 v0x2640250_0; + %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x2640170_0; - %assign/vec4 v0x2640330_0, 0; + %load/vec4 v0x2844fe0_0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x263fd10_0; + %load/vec4 v0x2844b80_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x2640170_0; - %assign/vec4 v0x2640330_0, 0; + %load/vec4 v0x2844fe0_0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x2640250_0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x263fd10_0; + %load/vec4 v0x2844b80_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x2640170_0; - %assign/vec4 v0x2640330_0, 0; + %load/vec4 v0x2844fe0_0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x2640250_0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x263fd10_0; + %load/vec4 v0x2844b80_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x2640170_0; - %assign/vec4 v0x2640330_0, 0; + %load/vec4 v0x2844fe0_0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x2640250_0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x263fd10_0; + %load/vec4 v0x2844b80_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x2640170_0; - %assign/vec4 v0x2640330_0, 0; + %load/vec4 v0x2844fe0_0; + %assign/vec4 v0x28451a0_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x2640250_0; + %load/vec4 v0x28450c0_0; %addi 1, 0, 4; - %assign/vec4 v0x2640330_0, 0; + %assign/vec4 v0x28451a0_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x2640090_0; + %load/vec4 v0x2844f00_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x2640090_0; + %load/vec4 v0x2844f00_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x263fef0_0; + %load/vec4 v0x2844d60_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x263fef0_0; + %load/vec4 v0x2844d60_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4513,162 +4518,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x263fef0_0; + %load/vec4 v0x2844d60_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x2644700_0; - %assign/vec4 v0x263fd10_0, 0; + %load/vec4 v0x2849570_0; + %assign/vec4 v0x2844b80_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26433a0_0, 0; - %load/vec4 v0x263fef0_0; + %assign/vec4 v0x2848210_0, 0; + %load/vec4 v0x2844d60_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x2643100_0; - %assign/vec4 v0x2644620_0, 0; - %load/vec4 v0x2644700_0; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; + %assign/vec4 v0x2849490_0, 0; + %load/vec4 v0x2849570_0; + %load/vec4 v0x2847f70_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2643100_0; + %load/vec4 v0x2847f70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26442c0_0, 4, 5; + %assign/vec4/off/d v0x2849130_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x263fef0_0; + %load/vec4 v0x2844d60_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x263fef0_0; - %assign/vec4 v0x2644620_0, 0; - %load/vec4 v0x2644700_0; - %load/vec4 v0x263fef0_0; + %load/vec4 v0x2844d60_0; + %assign/vec4 v0x2849490_0, 0; + %load/vec4 v0x2849570_0; + %load/vec4 v0x2844d60_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263fef0_0; + %load/vec4 v0x2844d60_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x263fef0_0; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2844d60_0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x2642ba0_0; + %load/vec4 v0x2847a10_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x263fef0_0; - %assign/vec4 v0x2644620_0, 0; + %load/vec4 v0x2844d60_0; + %assign/vec4 v0x2849490_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x26435c0_0; + %load/vec4 v0x2848430_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4683,82 +4688,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x2643bf0_0; + %load/vec4 v0x2848a60_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x2642a20_0; + %load/vec4 v0x2847890_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26433a0_0, 0; + %assign/vec4 v0x2848210_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2644380_0, 0, 4; - %load/vec4 v0x26436a0_0; + %store/vec4 v0x28491f0_0, 0, 4; + %load/vec4 v0x2848510_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x26436a0_0; + %load/vec4 v0x2848510_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4766,54 +4771,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x26436a0_0; - %load/vec4 v0x2643bf0_0; + %load/vec4 v0x2848510_0; + %load/vec4 v0x2848a60_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26433a0_0, 0; - %load/vec4 v0x2643bf0_0; + %assign/vec4 v0x2848210_0, 0; + %load/vec4 v0x2848a60_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2643d30, 4; - %assign/vec4 v0x2643c90_0, 0; + %load/vec4a v0x2848ba0, 4; + %assign/vec4 v0x2848b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2643bf0_0; + %load/vec4 v0x2848a60_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2643b50_0, 4, 5; + %assign/vec4/off/d v0x28489c0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2643bf0_0; + %load/vec4 v0x2848a60_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2644380_0, 4, 5; - %load/vec4 v0x2643bf0_0; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4/off/d v0x28491f0_0, 4, 5; + %load/vec4 v0x2848a60_0; + %assign/vec4 v0x2847f70_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x26435c0_0; + %load/vec4 v0x2848430_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4829,93 +4834,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x2644620_0; + %load/vec4 v0x2849490_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x2642ba0_0; + %load/vec4 v0x2847a10_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x2641ad0_0; + %load/vec4 v0x2846940_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2644620_0, 0; + %assign/vec4 v0x2849490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x26442c0_0, 4, 5; - %load/vec4 v0x2644700_0; + %assign/vec4/off/d v0x2849130_0, 4, 5; + %load/vec4 v0x2849570_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2643480, 0, 4; + %assign/vec4/a/d v0x28482f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2847f70_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4923,33 +4928,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x2644620_0; + %load/vec4 v0x2849490_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x2644460_0; - %load/vec4 v0x2644620_0; + %load/vec4 v0x28492d0_0; + %load/vec4 v0x2849490_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x2644620_0; + %load/vec4 v0x2849490_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x26442c0_0, 4, 1; + %store/vec4 v0x2849130_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26433a0_0, 0; - %load/vec4 v0x2644620_0; - %assign/vec4 v0x2643100_0, 0; + %assign/vec4 v0x2848210_0, 0; + %load/vec4 v0x2849490_0; + %assign/vec4 v0x2847f70_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x26435c0_0, 0; + %assign/vec4 v0x2848430_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4958,19 +4963,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x263f850; + .scope S_0x2844600; T_11 ; - %wait E_0x25966a0; - %load/vec4 v0x26435c0_0; + %wait E_0x279b3d0; + %load/vec4 v0x2848430_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x26433a0_0; + %load/vec4 v0x2848210_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x2640330_0; + %load/vec4 v0x28451a0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4979,62 +4984,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x2640330_0; - %assign/vec4 v0x2640250_0, 0; + %load/vec4 v0x28451a0_0; + %assign/vec4 v0x28450c0_0, 0; T_11.0 ; - %load/vec4 v0x26435c0_0; + %load/vec4 v0x2848430_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2643b50_0, 0, 4; + %store/vec4 v0x28489c0_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x25d50f0; + .scope S_0x278a540; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x263e1d0_0, 0, 3; + %store/vec4 v0x2842f80_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x263e3f0_0, 0, 3; + %store/vec4 v0x28431a0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x263df30_0, 0, 3; + %store/vec4 v0x2842ce0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x25fb500_0, 0, 11; + %store/vec4 v0x2800240_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x263ab80_0, 0, 11; + %store/vec4 v0x283f930_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263b040_0, 0, 4; + %store/vec4 v0x283fdf0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263e980_0, 0, 4; + %store/vec4 v0x2843730_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263f250_0, 0, 4; + %store/vec4 v0x2844000_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263f410_0, 0, 4; + %store/vec4 v0x28441c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263f170_0, 0, 4; + %store/vec4 v0x2843f20_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x263e2b0, 4, 0; + %store/vec4a v0x2843060, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x263e2b0, 4, 0; + %store/vec4a v0x2843060, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x263e2b0, 4, 0; + %store/vec4a v0x2843060, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x263e2b0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x2584f40, v0x263de70 {0 0 0}; + %store/vec4a v0x2843060, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x27da640, v0x2842c20 {0 0 0}; %end; .thread T_12; - .scope S_0x25d50f0; + .scope S_0x278a540; T_13 ; - %wait E_0x25b8e20; - %load/vec4 v0x263e1d0_0; + %wait E_0x27bdb80; + %load/vec4 v0x2842f80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5049,7 +5054,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x263e3f0_0; + %load/vec4 v0x28431a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5064,185 +5069,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x263ae30_0; + %load/vec4 v0x283fbe0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x263e4d0_0; - %load/vec4 v0x263b200_0; + %load/vec4 v0x2843280_0; + %load/vec4 v0x283ffb0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263e980_0, 4, 5; - %load/vec4 v0x263b200_0; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4/off/d v0x2843730_0, 4, 5; + %load/vec4 v0x283ffb0_0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; - %load/vec4 v0x263b200_0; - %assign/vec4 v0x263ea20_0, 0; + %assign/vec4 v0x2842f80_0, 0; + %load/vec4 v0x283ffb0_0; + %assign/vec4 v0x28437d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263f250_0, 4, 5; - %load/vec4 v0x263b200_0; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4/off/d v0x2844000_0, 4, 5; + %load/vec4 v0x283ffb0_0; + %assign/vec4 v0x2842ce0_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x263e4d0_0; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2843280_0; + %load/vec4 v0x2842ce0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; - %load/vec4 v0x263df30_0; - %assign/vec4 v0x263ea20_0, 0; + %assign/vec4 v0x2842f80_0, 0; + %load/vec4 v0x2842ce0_0; + %assign/vec4 v0x28437d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263f250_0, 4, 5; + %assign/vec4/off/d v0x2844000_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x263b200_0; + %load/vec4 v0x283ffb0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x263d810_0; + %load/vec4 v0x28425c0_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5250,29 +5255,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; - %load/vec4 v0x263b200_0; - %assign/vec4 v0x263ea20_0, 0; + %assign/vec4 v0x2842f80_0, 0; + %load/vec4 v0x283ffb0_0; + %assign/vec4 v0x28437d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f250_0, 4, 5; + %assign/vec4/off/d v0x2844000_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f250_0, 4, 5; + %assign/vec4/off/d v0x2844000_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f250_0, 4, 5; + %assign/vec4/off/d v0x2844000_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f250_0, 4, 5; + %assign/vec4/off/d v0x2844000_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5280,10 +5285,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x263ae30_0; + %load/vec4 v0x283fbe0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5350,180 +5355,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x25fb500_0; - %load/vec4 v0x263eb00_0; + %load/vec4 v0x2800240_0; + %load/vec4 v0x28438b0_0; %add; - %assign/vec4 v0x25fb500_0, 0; - %load/vec4 v0x263b040_0; + %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x25fb500_0; - %load/vec4 v0x263eb00_0; + %load/vec4 v0x2800240_0; + %load/vec4 v0x28438b0_0; %sub; - %assign/vec4 v0x25fb500_0, 0; - %load/vec4 v0x263b040_0; + %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fdf0_0; %pad/u 11; - %load/vec4 v0x263eb00_0; + %load/vec4 v0x28438b0_0; %add; %pad/u 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x263eb00_0; - %assign/vec4 v0x263f5d0_0, 0; - %load/vec4 v0x263b040_0; + %load/vec4 v0x28438b0_0; + %assign/vec4 v0x2844380_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x263ad50_0; - %assign/vec4 v0x263f5d0_0, 0; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fb00_0; + %assign/vec4 v0x2844380_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x25fb500_0; - %load/vec4 v0x263ad50_0; + %load/vec4 v0x2800240_0; + %load/vec4 v0x283fb00_0; %add; - %assign/vec4 v0x25fb500_0, 0; - %load/vec4 v0x263b040_0; + %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x25fb500_0; - %load/vec4 v0x263ad50_0; + %load/vec4 v0x2800240_0; + %load/vec4 v0x283fb00_0; %sub; - %assign/vec4 v0x25fb500_0, 0; - %load/vec4 v0x263b040_0; + %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fdf0_0; %pad/u 11; - %load/vec4 v0x263ad50_0; + %load/vec4 v0x283fb00_0; %add; %pad/u 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x263ab80_0; - %assign/vec4 v0x25fb500_0, 0; - %load/vec4 v0x25fb500_0; - %assign/vec4 v0x263ab80_0, 0; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283f930_0; + %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x2800240_0; + %assign/vec4 v0x283f930_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x25fb500_0; - %assign/vec4 v0x263ab80_0, 0; - %load/vec4 v0x263b040_0; + %load/vec4 v0x2800240_0; + %assign/vec4 v0x283f930_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x25fb500_0; + %load/vec4 v0x2800240_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x25fb500_0, 0; - %load/vec4 v0x263b040_0; + %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x263af60_0; - %assign/vec4 v0x263b120_0, 0; + %load/vec4 v0x283fd10_0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x25fb500_0; + %load/vec4 v0x2800240_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x263af60_0; - %assign/vec4 v0x263b120_0, 0; + %load/vec4 v0x283fd10_0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x25fb500_0; + %load/vec4 v0x2800240_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x263af60_0; - %assign/vec4 v0x263b120_0, 0; + %load/vec4 v0x283fd10_0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x25fb500_0; + %load/vec4 v0x2800240_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x263af60_0; - %assign/vec4 v0x263b120_0, 0; + %load/vec4 v0x283fd10_0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x25fb500_0; + %load/vec4 v0x2800240_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x263af60_0; - %assign/vec4 v0x263b120_0, 0; + %load/vec4 v0x283fd10_0; + %assign/vec4 v0x283fed0_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x263b040_0; + %load/vec4 v0x283fdf0_0; %addi 1, 0, 4; - %assign/vec4 v0x263b120_0, 0; + %assign/vec4 v0x283fed0_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x263ae30_0; + %load/vec4 v0x283fbe0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x263ae30_0; + %load/vec4 v0x283fbe0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x263ac60_0; + %load/vec4 v0x283fa10_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x263ac60_0; + %load/vec4 v0x283fa10_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5531,162 +5536,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x263ac60_0; + %load/vec4 v0x283fa10_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x263f5d0_0; - %assign/vec4 v0x25fb500_0, 0; + %load/vec4 v0x2844380_0; + %assign/vec4 v0x2800240_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; - %load/vec4 v0x263ac60_0; + %assign/vec4 v0x2842f80_0, 0; + %load/vec4 v0x283fa10_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x263df30_0; - %assign/vec4 v0x263f4f0_0, 0; - %load/vec4 v0x263f5d0_0; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; + %assign/vec4 v0x28442a0_0, 0; + %load/vec4 v0x2844380_0; + %load/vec4 v0x2842ce0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263df30_0; + %load/vec4 v0x2842ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263f170_0, 4, 5; + %assign/vec4/off/d v0x2843f20_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x263ac60_0; + %load/vec4 v0x283fa10_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x263ac60_0; - %assign/vec4 v0x263f4f0_0, 0; - %load/vec4 v0x263f5d0_0; - %load/vec4 v0x263ac60_0; + %load/vec4 v0x283fa10_0; + %assign/vec4 v0x28442a0_0, 0; + %load/vec4 v0x2844380_0; + %load/vec4 v0x283fa10_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263ac60_0; + %load/vec4 v0x283fa10_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263ac60_0; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x283fa10_0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x263d990_0; + %load/vec4 v0x2842740_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x263ac60_0; - %assign/vec4 v0x263f4f0_0, 0; + %load/vec4 v0x283fa10_0; + %assign/vec4 v0x28442a0_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x263e3f0_0; + %load/vec4 v0x28431a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5701,82 +5706,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x263ea20_0; + %load/vec4 v0x28437d0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x263d810_0; + %load/vec4 v0x28425c0_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; + %assign/vec4 v0x2842f80_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263f250_0, 0, 4; - %load/vec4 v0x263e4d0_0; + %store/vec4 v0x2844000_0, 0, 4; + %load/vec4 v0x2843280_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x263e4d0_0; + %load/vec4 v0x2843280_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5784,54 +5789,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x263e4d0_0; - %load/vec4 v0x263ea20_0; + %load/vec4 v0x2843280_0; + %load/vec4 v0x28437d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; - %load/vec4 v0x263ea20_0; + %assign/vec4 v0x2842f80_0, 0; + %load/vec4 v0x28437d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x263ebe0, 4; - %assign/vec4 v0x263eb00_0, 0; + %load/vec4a v0x2843990, 4; + %assign/vec4 v0x28438b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263ea20_0; + %load/vec4 v0x28437d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263e980_0, 4, 5; + %assign/vec4/off/d v0x2843730_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x263ea20_0; + %load/vec4 v0x28437d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x263f250_0, 4, 5; - %load/vec4 v0x263ea20_0; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4/off/d v0x2844000_0, 4, 5; + %load/vec4 v0x28437d0_0; + %assign/vec4 v0x2842ce0_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x263e3f0_0; + %load/vec4 v0x28431a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5847,93 +5852,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x263f4f0_0; + %load/vec4 v0x28442a0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x263d990_0; + %load/vec4 v0x2842740_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x263c8c0_0; + %load/vec4 v0x2841670_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x263f4f0_0, 0; + %assign/vec4 v0x28442a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x263f170_0, 4, 5; - %load/vec4 v0x263f5d0_0; + %assign/vec4/off/d v0x2843f20_0, 4, 5; + %load/vec4 v0x2844380_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x263e2b0, 0, 4; + %assign/vec4/a/d v0x2843060, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842ce0_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5941,33 +5946,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x263f4f0_0; + %load/vec4 v0x28442a0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x263f330_0; - %load/vec4 v0x263f4f0_0; + %load/vec4 v0x28440e0_0; + %load/vec4 v0x28442a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x263f4f0_0; + %load/vec4 v0x28442a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x263f170_0, 4, 1; + %store/vec4 v0x2843f20_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x263e1d0_0, 0; - %load/vec4 v0x263f4f0_0; - %assign/vec4 v0x263df30_0, 0; + %assign/vec4 v0x2842f80_0, 0; + %load/vec4 v0x28442a0_0; + %assign/vec4 v0x2842ce0_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x263e3f0_0, 0; + %assign/vec4 v0x28431a0_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5976,19 +5981,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x25d50f0; + .scope S_0x278a540; T_14 ; - %wait E_0x25966a0; - %load/vec4 v0x263e3f0_0; + %wait E_0x279b3d0; + %load/vec4 v0x28431a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x263e1d0_0; + %load/vec4 v0x2842f80_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x263b120_0; + %load/vec4 v0x283fed0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -5997,93 +6002,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x263b120_0; - %assign/vec4 v0x263b040_0, 0; + %load/vec4 v0x283fed0_0; + %assign/vec4 v0x283fdf0_0, 0; T_14.0 ; - %load/vec4 v0x263e3f0_0; + %load/vec4 v0x28431a0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x263e980_0, 0, 4; + %store/vec4 v0x2843730_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x2585810; + .scope S_0x27b21e0; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x2654b60_0, 0, 33; + %store/vec4 v0x2859c20_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2654ac0_0, 0, 1; + %store/vec4 v0x2859b80_0, 0, 1; %pushi/vec4 0, 0, 33; - %store/vec4 v0x2654b60_0, 0, 33; + %store/vec4 v0x2859c20_0, 0, 33; T_15.0 ; - %load/vec4 v0x2654b60_0; + %load/vec4 v0x2859c20_0; %cmpi/u 10, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654a20_0, 0, 1; + %store/vec4 v0x2859ae0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2654a20_0, 0, 1; + %store/vec4 v0x2859ae0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654a20_0, 0, 1; + %store/vec4 v0x2859ae0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2654a20_0, 0, 1; + %store/vec4 v0x2859ae0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654a20_0, 0, 1; + %store/vec4 v0x2859ae0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2654a20_0, 0, 1; + %store/vec4 v0x2859ae0_0, 0, 1; %delay 1, 0; - %load/vec4 v0x2654b60_0; + %load/vec4 v0x2859c20_0; %addi 1, 0, 33; - %store/vec4 v0x2654b60_0, 0, 33; + %store/vec4 v0x2859c20_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x2654980_0; + %load/vec4 v0x2859a40_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.2, 4; %vpi_call 2 51 "$display", "Failed on up test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654ac0_0, 0, 1; + %store/vec4 v0x2859b80_0, 0, 1; T_15.2 ; - %load/vec4 v0x2654840_0; + %load/vec4 v0x2859900_0; %pad/s 32; %cmpi/ne 2, 0, 32; %jmp/0xz T_15.4, 4; %vpi_call 2 55 "$display", "Failed on left test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654ac0_0, 0, 1; + %store/vec4 v0x2859b80_0, 0, 1; T_15.4 ; - %load/vec4 v0x26548e0_0; + %load/vec4 v0x28599a0_0; %pad/s 32; %cmpi/ne 3, 0, 32; %jmp/0xz T_15.6, 4; %vpi_call 2 59 "$display", "Failed on right test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654ac0_0, 0, 1; + %store/vec4 v0x2859b80_0, 0, 1; T_15.6 ; - %load/vec4 v0x26547a0_0; + %load/vec4 v0x2859860_0; %pad/s 32; %cmpi/ne 4, 0, 32; %jmp/0xz T_15.8, 4; %vpi_call 2 63 "$display", "Failed on down test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654ac0_0, 0, 1; + %store/vec4 v0x2859b80_0, 0, 1; T_15.8 ; - %load/vec4 v0x2654650_0; + %load/vec4 v0x2859710_0; %pad/s 32; %cmpi/ne 5, 0, 32; %jmp/0xz T_15.10, 4; %vpi_call 2 67 "$display", "Failed on center test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2654ac0_0, 0, 1; + %store/vec4 v0x2859b80_0, 0, 1; T_15.10 ; - %load/vec4 v0x2654ac0_0; + %load/vec4 v0x2859b80_0; %flag_set/vec4 8; %jmp/0xz T_15.12, 8; %vpi_call 2 71 "$display", "DUT passed anyWrite" {0 0 0}; diff --git a/anyWrite/up.dat b/anyWrite/up.dat index 6e22a75..0868014 100644 --- a/anyWrite/up.dat +++ b/anyWrite/up.dat @@ -1,16 +1,16 @@ 001100110100000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/assembler.py b/assembler.py index 098fd96..467990d 100644 --- a/assembler.py +++ b/assembler.py @@ -51,6 +51,7 @@ immDst = ["MOVI"] labelList = ["JMP", "JEZ", "JNZ", "JGZ", "JLZ"] +symbols = {} def assemble(line): line = line.replace(',', '') @@ -83,11 +84,17 @@ def assemble(line): dst = Bits(uint=addresses[tokens[2]], length=3).bin return inst+dst+imm if instruction in labelList: - label = Bits(uint=int(tokens[1]), length=4).bin + try: + label = Bits(uint=int(tokens[1]), length=4).bin + except: + label = Bits(uint=symbols[tokens[1]], length=4).bin pad = Bits(uint=0, length=10).bin return inst+label+pad pad = Bits(uint=0, length = 14).bin; return inst+pad + + + if __name__ == '__main__': infile = sys.argv[1] prefix = infile.split("/")[0]+"/" @@ -97,23 +104,33 @@ def assemble(line): fName = "" f = None nLines = 0; + currentLines = []; for line in lines: line = line.replace("\n","") if(line.startswith(":")): + for line2 in currentLines: + f.write(assemble(line2)+"\n") while nLines < 16 and f is not None: - f.write("000000000000000000\n") + f.write(assemble("JMP 0")+"\n") nLines += 1 fName = prefix+line[1:]+".dat" nLines = 0 + symbols = {} + currentLines = [] if f is not None: f.close() f = open(fName,'w') elif(line == ""): continue else: - f.write(assemble(line)+"\n") - nLines += 1 + if(line.endswith(":")): + symbols[line[:-1]]=nLines + else: + currentLines.append(line) + nLines += 1 + for line2 in currentLines: + f.write(assemble(line2)+"\n") while nLines < 16: f.write("000000000000000000\n") nLines += 1 diff --git a/demo/demo b/demo/demo new file mode 100755 index 0000000..a4cabe3 --- /dev/null +++ b/demo/demo @@ -0,0 +1,11131 @@ +#! /usr/local/bin/vvp +:ivl_version "0.10.0 (devel)" "(s20150513)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "vhdl_sys"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1c89a30 .scope module, "stackMemory" "stackMemory" 2 11; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "in" + .port_info 2 /OUTPUT 15 "out" +P_0x1da0d60 .param/l "initialpointer" 0 2 15, +C4<00000000000000000000000000000000>; +P_0x1da0da0 .param/l "loadmemory" 0 2 13, +C4<00000000000000000000000000000000>; +P_0x1da0de0 .param/str "memoryfile" 0 2 14, "mem.dat"; +v0x1cff4c0_0 .net *"_s2", 0 0, L_0x1e01d00; 1 drivers +v0x1dd1d10_0 .net *"_s6", 0 0, L_0x1e01da0; 1 drivers +o0x2b89f58f6078 .functor BUFZ 1, C4; HiZ drive +v0x1dd1df0_0 .net "clk", 0 0, o0x2b89f58f6078; 0 drivers +o0x2b89f58f60a8 .functor BUFZ 15, C4; HiZ drive +v0x1dd1ec0_0 .net "in", 14 0, o0x2b89f58f60a8; 0 drivers +v0x1dd1fa0 .array "mem", 1 15, 10 0; +v0x1dd20b0_0 .var "out", 14 0; +v0x1dd2190_0 .var "phase", 2 0; +v0x1dd2270_0 .var "pointer", 3 0; +E_0x1c95390 .event negedge, v0x1dd1df0_0; +E_0x1cc17e0 .event posedge, v0x1dd1df0_0; +E_0x1cbd520 .event edge, v0x1dd2270_0; +E_0x1cb1f20 .event posedge, L_0x1e01da0; +E_0x1d39760 .event posedge, L_0x1e01d00; +L_0x1e01d00 .part o0x2b89f58f60a8, 14, 1; +L_0x1e01da0 .part o0x2b89f58f60a8, 13, 1; +S_0x1cc1e10 .scope module, "tis100Test" "tis100Test" 3 3; + .timescale 0 0; +v0x1e007c0_0 .var "clk", 0 0; +v0x1e00880_0 .var "dutPassed", 0 0; +v0x1e00940 .array/s "expected", 6 0, 10 0; +v0x1e00a10_0 .net "fiveToFour", 14 0, L_0x1e25380; 1 drivers +v0x1e00b20_0 .net "fiveToSeven", 14 0, L_0x1e256b0; 1 drivers +v0x1e00c80_0 .net "fiveToTwo", 14 0, L_0x1e25130; 1 drivers +v0x1e00d90_0 .net "fourToFive", 14 0, L_0x1e21ab0; 1 drivers +v0x1e00ea0_0 .net "fourToThree", 14 0, L_0x1e211d0; 1 drivers +v0x1e00fb0_0 .var "i", 32 0; +v0x1e01120_0 .net "inToOne", 14 0, L_0x1e31a80; 1 drivers +v0x1e011e0_0 .net "oneToIn", 14 0, L_0x1e14cb0; 1 drivers +v0x1e012f0_0 .net "oneToThree", 14 0, L_0x1e151a0; 1 drivers +v0x1e01400_0 .net "outToSix", 14 0, L_0x1e34ea0; 1 drivers +v0x1e01510_0 .net "sevenToFive", 14 0, L_0x1e2d360; 1 drivers +v0x1e01620_0 .net "sevenToSix", 14 0, L_0x1e2d5b0; 1 drivers +v0x1e01730_0 .net "sixToOut", 14 0, L_0x1e29740; 1 drivers +v0x1e01840_0 .net "sixToSeven", 14 0, L_0x1e29cb0; 1 drivers +v0x1e019f0_0 .net "threeToFour", 14 0, L_0x1e1d940; 1 drivers +v0x1e01ae0_0 .net "threeToOne", 14 0, L_0x1e1ce50; 1 drivers +v0x1e01bf0_0 .net "twoToFive", 14 0, L_0x1e19280; 1 drivers +S_0x1dd23d0 .scope module, "five" "tis100" 3 49, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1dd25a0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1dd25e0 .param/str "memFile" 0 4 60, "demo/five.dat"; +L_0x1e21e00 .functor BUFZ 11, v0x1dd2990_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e22090 .functor BUFZ 11, v0x1dd2990_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e22e50 .functor BUFZ 18, L_0x1e24ec0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1dd2990_0 .var/s "ACC", 10 0; +v0x1dd2a90_0 .var/s "BAK", 10 0; +v0x1dd2b70_0 .net "DST", 2 0, L_0x1e260b0; 1 drivers +v0x1dd2c30_0 .net/s "IMM", 10 0, L_0x1e26150; 1 drivers +v0x1dd2d10_0 .net "INST", 3 0, L_0x1e25950; 1 drivers +v0x1dd2e40_0 .net "LABEL", 3 0, L_0x1e26300; 1 drivers +v0x1dd2f20_0 .var "PC", 3 0; +v0x1dd3000_0 .var "PCNEXT", 3 0; +v0x1dd30e0_0 .net "SRC", 2 0, L_0x1e25ec0; 1 drivers +v0x1dd3250_0 .net *"_s103", 0 0, L_0x1e24200; 1 drivers +v0x1dd3330_0 .net *"_s107", 0 0, L_0x1e24110; 1 drivers +v0x1dd3410_0 .net *"_s111", 0 0, L_0x1e243f0; 1 drivers +v0x1dd34f0_0 .net *"_s115", 0 0, L_0x1e242f0; 1 drivers +v0x1dd35d0_0 .net *"_s119", 0 0, L_0x1e24630; 1 drivers +v0x1dd36b0_0 .net *"_s123", 0 0, L_0x1e24520; 1 drivers +v0x1dd3790_0 .net *"_s127", 0 0, L_0x1e247f0; 1 drivers +v0x1dd3870_0 .net *"_s131", 0 0, L_0x1e246d0; 1 drivers +v0x1dd3a20_0 .net *"_s135", 0 0, L_0x1e24a50; 1 drivers +v0x1dd3ac0_0 .net *"_s139", 0 0, L_0x1e24920; 1 drivers +v0x1dd3ba0_0 .net *"_s143", 0 0, L_0x1e24c30; 1 drivers +v0x1dd3c80_0 .net *"_s147", 0 0, L_0x1e24af0; 1 drivers +v0x1dd3d60_0 .net *"_s151", 0 0, L_0x1e24e20; 1 drivers +v0x1dd3e40_0 .net *"_s155", 0 0, L_0x1e24cd0; 1 drivers +v0x1dd3f20_0 .net *"_s159", 0 0, L_0x1e24d70; 1 drivers +v0x1dd4000_0 .net *"_s160", 17 0, L_0x1e24ec0; 1 drivers +v0x1dd40e0_0 .net *"_s162", 5 0, L_0x1e25220; 1 drivers +L_0x2b89f59272a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1dd41c0_0 .net *"_s165", 1 0, L_0x2b89f59272a0; 1 drivers +v0x1dd6190_2 .array/port v0x1dd6190, 2; +v0x1dd42a0_0 .net *"_s173", 10 0, v0x1dd6190_2; 1 drivers +v0x1dd6190_3 .array/port v0x1dd6190, 3; +v0x1dd4380_0 .net *"_s179", 10 0, v0x1dd6190_3; 1 drivers +v0x1dd6190_0 .array/port v0x1dd6190, 0; +v0x1dd4460_0 .net *"_s185", 10 0, v0x1dd6190_0; 1 drivers +v0x1dd6190_1 .array/port v0x1dd6190, 1; +v0x1dd4540_0 .net *"_s191", 10 0, v0x1dd6190_1; 1 drivers +v0x1dd4620_0 .net *"_s23", 0 0, L_0x1e22740; 1 drivers +v0x1dd4700_0 .net *"_s27", 0 0, L_0x1e22810; 1 drivers +v0x1dd3950_0 .net *"_s31", 0 0, L_0x1e228e0; 1 drivers +v0x1dd49d0_0 .net *"_s36", 0 0, L_0x1e22af0; 1 drivers +v0x1dd4ab0_0 .net *"_s42", 0 0, L_0x1e22d10; 1 drivers +v0x1dd4b90_0 .net *"_s46", 0 0, L_0x1e22db0; 1 drivers +v0x1dd4c70_0 .net *"_s50", 0 0, L_0x1e22ec0; 1 drivers +v0x1dd4d50_0 .net *"_s55", 0 0, L_0x1e23100; 1 drivers +v0x1dd4e30_0 .net *"_s61", 0 0, L_0x1e23370; 1 drivers +v0x1dd4f10_0 .net *"_s65", 0 0, L_0x1e23410; 1 drivers +v0x1dd4ff0_0 .net *"_s69", 0 0, L_0x1e235e0; 1 drivers +v0x1dd50d0_0 .net *"_s74", 0 0, L_0x1e23540; 1 drivers +v0x1dd51b0_0 .net *"_s80", 0 0, L_0x1e237c0; 1 drivers +v0x1dd5290_0 .net *"_s84", 0 0, L_0x1e23b80; 1 drivers +v0x1dd5370_0 .net *"_s88", 0 0, L_0x1e239b0; 1 drivers +v0x1dd5450_0 .net *"_s93", 0 0, L_0x1e23c20; 1 drivers +v0x1dd5530_0 .net *"_s99", 0 0, L_0x1e23ef0; 1 drivers +v0x1dd5610_0 .net/s "accOut", 10 0, L_0x1e21e00; 1 drivers +v0x1dd56f0_0 .net "anyHasData", 0 0, L_0x1e22c70; 1 drivers +v0x1dd57b0_0 .net "anyReadAck", 0 0, L_0x1e238c0; 1 drivers +v0x1dd5870_0 .net "anyWantData", 0 0, L_0x1e231f0; 1 drivers +v0x1dd5930_0 .net "anyWriteAck", 0 0, L_0x1e24020; 1 drivers +v0x1dd59f0_0 .net "clk", 0 0, v0x1e007c0_0; 1 drivers +v0x1dd5ab0_0 .net "down", 14 0, L_0x1e2d360; alias, 1 drivers +v0x1dd5b90_0 .net "downOut", 14 0, L_0x1e256b0; alias, 1 drivers +v0x1dd5c70_0 .net "instruction", 17 0, L_0x1e22e50; 1 drivers +v0x1dd5d50 .array "instructions", 15 0, 17 0; +v0x1dd5e10_0 .var "last", 2 0; +v0x1dd5ef0_0 .net "left", 14 0, L_0x1e21ab0; alias, 1 drivers +v0x1dd5fd0_0 .net "leftOut", 14 0, L_0x1e25380; alias, 1 drivers +v0x1dd60b0_0 .var "mode", 2 0; +v0x1dd6190 .array/s "outVals", 2 5, 10 0; +v0x1dd62d0_0 .var "phase", 2 0; +v0x1dd63b0_0 .net "portsHaveData", 5 2, L_0x1e22980; 1 drivers +v0x1dd47a0_0 .net "portsWantData", 5 2, L_0x1e22f60; 1 drivers +v0x1dd4880_0 .net "readAckIn", 5 2, L_0x1e23680; 1 drivers +v0x1dd6860_0 .var "readAckOut", 5 2; +v0x1dd6900_0 .var "readTarget", 2 0; +v0x1dd69c0_0 .var/s "readValue", 10 0; +L_0x2b89f5927258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1dd6aa0 .array "regVals", 0 7; +v0x1dd6aa0_0 .net/s v0x1dd6aa0 0, 10 0, L_0x2b89f5927258; 1 drivers +v0x1dd6aa0_1 .net/s v0x1dd6aa0 1, 10 0, L_0x1e22090; 1 drivers +v0x1dd6aa0_2 .net/s v0x1dd6aa0 2, 10 0, L_0x1e22370; 1 drivers +v0x1dd6aa0_3 .net/s v0x1dd6aa0 3, 10 0, L_0x1e224a0; 1 drivers +v0x1dd6aa0_4 .net/s v0x1dd6aa0 4, 10 0, L_0x1e22540; 1 drivers +v0x1dd6aa0_5 .net/s v0x1dd6aa0 5, 10 0, L_0x1e22670; 1 drivers +o0x2b89f58f7098 .functor BUFZ 11, C4; HiZ drive +v0x1dd6aa0_6 .net/s v0x1dd6aa0 6, 10 0, o0x2b89f58f7098; 0 drivers +o0x2b89f58f70c8 .functor BUFZ 11, C4; HiZ drive +v0x1dd6aa0_7 .net/s v0x1dd6aa0 7, 10 0, o0x2b89f58f70c8; 0 drivers +o0x2b89f58f70f8 .functor BUFZ 15, C4; HiZ drive +v0x1dd6cb0_0 .net "right", 14 0, o0x2b89f58f70f8; 0 drivers +v0x1dd6d90_0 .net "rightOut", 14 0, L_0x1e25ce0; 1 drivers +v0x1dd6e70_0 .net "up", 14 0, L_0x1e19280; alias, 1 drivers +v0x1dd6f50_0 .net "upOut", 14 0, L_0x1e25130; alias, 1 drivers +v0x1dd7030_0 .var "weHaveData", 5 2; +v0x1dd7110_0 .var "weWantData", 5 2; +v0x1dd71f0_0 .net "writeAckIn", 5 2, L_0x1e23e00; 1 drivers +v0x1dd72d0_0 .var "writeAckOut", 5 2; +v0x1dd73b0_0 .var "writeTarget", 2 0; +v0x1dd7490_0 .var/s "writeValue", 10 0; +E_0x1dd2730 .event negedge, v0x1dd59f0_0; +E_0x1dd2930 .event posedge, v0x1dd59f0_0; +L_0x1e22370 .part L_0x1e21ab0, 0, 11; +L_0x1e224a0 .part o0x2b89f58f70f8, 0, 11; +L_0x1e22540 .part L_0x1e19280, 0, 11; +L_0x1e22670 .part L_0x1e2d360, 0, 11; +L_0x1e22740 .part L_0x1e21ab0, 11, 1; +L_0x1e22810 .part o0x2b89f58f70f8, 11, 1; +L_0x1e228e0 .part L_0x1e19280, 11, 1; +L_0x1e22980 .concat8 [ 1 1 1 1], L_0x1e22740, L_0x1e22810, L_0x1e228e0, L_0x1e22af0; +L_0x1e22af0 .part L_0x1e2d360, 11, 1; +L_0x1e22c70 .reduce/or L_0x1e22980; +L_0x1e22d10 .part L_0x1e21ab0, 12, 1; +L_0x1e22db0 .part o0x2b89f58f70f8, 12, 1; +L_0x1e22ec0 .part L_0x1e19280, 12, 1; +L_0x1e22f60 .concat8 [ 1 1 1 1], L_0x1e22d10, L_0x1e22db0, L_0x1e22ec0, L_0x1e23100; +L_0x1e23100 .part L_0x1e2d360, 12, 1; +L_0x1e231f0 .reduce/or L_0x1e22f60; +L_0x1e23370 .part L_0x1e21ab0, 13, 1; +L_0x1e23410 .part o0x2b89f58f70f8, 13, 1; +L_0x1e235e0 .part L_0x1e19280, 13, 1; +L_0x1e23680 .concat8 [ 1 1 1 1], L_0x1e23370, L_0x1e23410, L_0x1e235e0, L_0x1e23540; +L_0x1e23540 .part L_0x1e2d360, 13, 1; +L_0x1e238c0 .reduce/or L_0x1e23680; +L_0x1e237c0 .part L_0x1e21ab0, 14, 1; +L_0x1e23b80 .part o0x2b89f58f70f8, 14, 1; +L_0x1e239b0 .part L_0x1e19280, 14, 1; +L_0x1e23e00 .concat8 [ 1 1 1 1], L_0x1e237c0, L_0x1e23b80, L_0x1e239b0, L_0x1e23c20; +L_0x1e23c20 .part L_0x1e2d360, 14, 1; +L_0x1e24020 .reduce/or L_0x1e23e00; +L_0x1e23ef0 .part v0x1dd6860_0, 0, 1; +L_0x1e24200 .part v0x1dd6860_0, 1, 1; +L_0x1e24110 .part v0x1dd6860_0, 2, 1; +L_0x1e243f0 .part v0x1dd6860_0, 3, 1; +L_0x1e242f0 .part v0x1dd72d0_0, 0, 1; +L_0x1e24630 .part v0x1dd72d0_0, 1, 1; +L_0x1e24520 .part v0x1dd72d0_0, 2, 1; +L_0x1e247f0 .part v0x1dd72d0_0, 3, 1; +L_0x1e246d0 .part v0x1dd7110_0, 0, 1; +L_0x1e24a50 .part v0x1dd7110_0, 1, 1; +L_0x1e24920 .part v0x1dd7110_0, 2, 1; +L_0x1e24c30 .part v0x1dd7110_0, 3, 1; +L_0x1e24af0 .part v0x1dd7030_0, 0, 1; +L_0x1e24e20 .part v0x1dd7030_0, 1, 1; +L_0x1e24cd0 .part v0x1dd7030_0, 2, 1; +L_0x1e24d70 .part v0x1dd7030_0, 3, 1; +L_0x1e24ec0 .array/port v0x1dd5d50, L_0x1e25220; +L_0x1e25220 .concat [ 4 2 0 0], v0x1dd2f20_0, L_0x2b89f59272a0; +LS_0x1e25130_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_2, L_0x1e24cd0, L_0x1e24920, L_0x1e24520; +LS_0x1e25130_0_4 .concat8 [ 1 0 0 0], L_0x1e24110; +L_0x1e25130 .concat8 [ 14 1 0 0], LS_0x1e25130_0_0, LS_0x1e25130_0_4; +LS_0x1e256b0_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_3, L_0x1e24d70, L_0x1e24c30, L_0x1e247f0; +LS_0x1e256b0_0_4 .concat8 [ 1 0 0 0], L_0x1e243f0; +L_0x1e256b0 .concat8 [ 14 1 0 0], LS_0x1e256b0_0_0, LS_0x1e256b0_0_4; +LS_0x1e25380_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_0, L_0x1e24af0, L_0x1e246d0, L_0x1e242f0; +LS_0x1e25380_0_4 .concat8 [ 1 0 0 0], L_0x1e23ef0; +L_0x1e25380 .concat8 [ 14 1 0 0], LS_0x1e25380_0_0, LS_0x1e25380_0_4; +LS_0x1e25ce0_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_1, L_0x1e24e20, L_0x1e24a50, L_0x1e24630; +LS_0x1e25ce0_0_4 .concat8 [ 1 0 0 0], L_0x1e24200; +L_0x1e25ce0 .concat8 [ 14 1 0 0], LS_0x1e25ce0_0_0, LS_0x1e25ce0_0_4; +L_0x1e25950 .part L_0x1e22e50, 14, 4; +L_0x1e260b0 .part L_0x1e22e50, 11, 3; +L_0x1e25ec0 .part L_0x1e22e50, 8, 3; +L_0x1e26300 .part L_0x1e22e50, 10, 4; +L_0x1e26150 .part L_0x1e22e50, 0, 11; +S_0x1dd7710 .scope module, "four" "tis100" 3 45, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1dd7900 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1dd7940 .param/str "memFile" 0 4 60, "demo/four.dat"; +L_0x1e1dc90 .functor BUFZ 11, v0x1dd7c00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e1de90 .functor BUFZ 11, v0x1dd7c00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e1ed30 .functor BUFZ 18, L_0x1e20d10, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1dd7c00_0 .var/s "ACC", 10 0; +v0x1dd7d00_0 .var/s "BAK", 10 0; +v0x1dd7de0_0 .net "DST", 2 0, L_0x1e21ec0; 1 drivers +v0x1dd7ea0_0 .net/s "IMM", 10 0, L_0x1e21f60; 1 drivers +v0x1dd7f80_0 .net "INST", 3 0, L_0x1e21720; 1 drivers +v0x1dd80b0_0 .net "LABEL", 3 0, L_0x1e22110; 1 drivers +v0x1dd8190_0 .var "PC", 3 0; +v0x1dd8270_0 .var "PCNEXT", 3 0; +v0x1dd8350_0 .net "SRC", 2 0, L_0x1e21cd0; 1 drivers +v0x1dd84c0_0 .net *"_s103", 0 0, L_0x1e20050; 1 drivers +v0x1dd85a0_0 .net *"_s107", 0 0, L_0x1e1ff60; 1 drivers +v0x1dd8680_0 .net *"_s111", 0 0, L_0x1e20240; 1 drivers +v0x1dd8760_0 .net *"_s115", 0 0, L_0x1e20140; 1 drivers +v0x1dd8840_0 .net *"_s119", 0 0, L_0x1e20480; 1 drivers +v0x1dd8920_0 .net *"_s123", 0 0, L_0x1e20370; 1 drivers +v0x1dd8a00_0 .net *"_s127", 0 0, L_0x1e20640; 1 drivers +v0x1dd8ae0_0 .net *"_s131", 0 0, L_0x1e20520; 1 drivers +v0x1dd8c90_0 .net *"_s135", 0 0, L_0x1e208a0; 1 drivers +v0x1dd8d30_0 .net *"_s139", 0 0, L_0x1e20770; 1 drivers +v0x1dd8e10_0 .net *"_s143", 0 0, L_0x1e20a80; 1 drivers +v0x1dd8ef0_0 .net *"_s147", 0 0, L_0x1e20940; 1 drivers +v0x1dd8fd0_0 .net *"_s151", 0 0, L_0x1e20c70; 1 drivers +v0x1dd90b0_0 .net *"_s155", 0 0, L_0x1e20b20; 1 drivers +v0x1dd9190_0 .net *"_s159", 0 0, L_0x1e20bc0; 1 drivers +v0x1dd9270_0 .net *"_s160", 17 0, L_0x1e20d10; 1 drivers +v0x1dd9350_0 .net *"_s162", 5 0, L_0x1e21070; 1 drivers +L_0x2b89f5927210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1dd9430_0 .net *"_s165", 1 0, L_0x2b89f5927210; 1 drivers +v0x1ddb3c0_2 .array/port v0x1ddb3c0, 2; +v0x1dd9510_0 .net *"_s173", 10 0, v0x1ddb3c0_2; 1 drivers +v0x1ddb3c0_3 .array/port v0x1ddb3c0, 3; +v0x1dd95f0_0 .net *"_s179", 10 0, v0x1ddb3c0_3; 1 drivers +v0x1ddb3c0_0 .array/port v0x1ddb3c0, 0; +v0x1dd96d0_0 .net *"_s185", 10 0, v0x1ddb3c0_0; 1 drivers +v0x1ddb3c0_1 .array/port v0x1ddb3c0, 1; +v0x1dd97b0_0 .net *"_s191", 10 0, v0x1ddb3c0_1; 1 drivers +v0x1dd9890_0 .net *"_s23", 0 0, L_0x1e1e530; 1 drivers +v0x1dd9970_0 .net *"_s27", 0 0, L_0x1e1e600; 1 drivers +v0x1dd8bc0_0 .net *"_s31", 0 0, L_0x1e1e760; 1 drivers +v0x1dd9c40_0 .net *"_s36", 0 0, L_0x1e1e9c0; 1 drivers +v0x1dd9d20_0 .net *"_s42", 0 0, L_0x1e1ebf0; 1 drivers +v0x1dd9e00_0 .net *"_s46", 0 0, L_0x1e1ec90; 1 drivers +v0x1dd9ee0_0 .net *"_s50", 0 0, L_0x1e1eda0; 1 drivers +v0x1dd9fc0_0 .net *"_s55", 0 0, L_0x1e1efb0; 1 drivers +v0x1dda0a0_0 .net *"_s61", 0 0, L_0x1e1f220; 1 drivers +v0x1dda180_0 .net *"_s65", 0 0, L_0x1e1f2c0; 1 drivers +v0x1dda260_0 .net *"_s69", 0 0, L_0x1e1f400; 1 drivers +v0x1dda340_0 .net *"_s74", 0 0, L_0x1e1f360; 1 drivers +v0x1dda420_0 .net *"_s80", 0 0, L_0x1e1f640; 1 drivers +v0x1dda500_0 .net *"_s84", 0 0, L_0x1e1fa40; 1 drivers +v0x1dda5e0_0 .net *"_s88", 0 0, L_0x1e1f870; 1 drivers +v0x1dda6c0_0 .net *"_s93", 0 0, L_0x1e1fae0; 1 drivers +v0x1dda7a0_0 .net *"_s99", 0 0, L_0x1e1fd40; 1 drivers +v0x1dda880_0 .net/s "accOut", 10 0, L_0x1e1dc90; 1 drivers +v0x1dda960_0 .net "anyHasData", 0 0, L_0x1e1eb00; 1 drivers +v0x1ddaa20_0 .net "anyReadAck", 0 0, L_0x1e1f7d0; 1 drivers +v0x1ddaae0_0 .net "anyWantData", 0 0, L_0x1e1f0a0; 1 drivers +v0x1ddaba0_0 .net "anyWriteAck", 0 0, L_0x1e1fe70; 1 drivers +v0x1ddac60_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +o0x2b89f58f7ea8 .functor BUFZ 15, C4; HiZ drive +v0x1ddad00_0 .net "down", 14 0, o0x2b89f58f7ea8; 0 drivers +v0x1ddadc0_0 .net "downOut", 14 0, L_0x1e21440; 1 drivers +v0x1ddaea0_0 .net "instruction", 17 0, L_0x1e1ed30; 1 drivers +v0x1ddaf80 .array "instructions", 15 0, 17 0; +v0x1ddb040_0 .var "last", 2 0; +v0x1ddb120_0 .net "left", 14 0, L_0x1e1d940; alias, 1 drivers +v0x1ddb200_0 .net "leftOut", 14 0, L_0x1e211d0; alias, 1 drivers +v0x1ddb2e0_0 .var "mode", 2 0; +v0x1ddb3c0 .array/s "outVals", 2 5, 10 0; +v0x1ddb500_0 .var "phase", 2 0; +v0x1ddb5e0_0 .net "portsHaveData", 5 2, L_0x1e1e800; 1 drivers +v0x1dd9a10_0 .net "portsWantData", 5 2, L_0x1e1ee40; 1 drivers +v0x1dd9af0_0 .net "readAckIn", 5 2, L_0x1e1f4a0; 1 drivers +v0x1ddba90_0 .var "readAckOut", 5 2; +v0x1ddbb30_0 .var "readTarget", 2 0; +v0x1ddbbd0_0 .var/s "readValue", 10 0; +L_0x2b89f59271c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1ddbcb0 .array "regVals", 0 7; +v0x1ddbcb0_0 .net/s v0x1ddbcb0 0, 10 0, L_0x2b89f59271c8; 1 drivers +v0x1ddbcb0_1 .net/s v0x1ddbcb0 1, 10 0, L_0x1e1de90; 1 drivers +v0x1ddbcb0_2 .net/s v0x1ddbcb0 2, 10 0, L_0x1e1df00; 1 drivers +v0x1ddbcb0_3 .net/s v0x1ddbcb0 3, 10 0, L_0x1e1e290; 1 drivers +v0x1ddbcb0_4 .net/s v0x1ddbcb0 4, 10 0, L_0x1e1e330; 1 drivers +v0x1ddbcb0_5 .net/s v0x1ddbcb0 5, 10 0, L_0x1e1e400; 1 drivers +o0x2b89f58f8328 .functor BUFZ 11, C4; HiZ drive +v0x1ddbcb0_6 .net/s v0x1ddbcb0 6, 10 0, o0x2b89f58f8328; 0 drivers +o0x2b89f58f8358 .functor BUFZ 11, C4; HiZ drive +v0x1ddbcb0_7 .net/s v0x1ddbcb0 7, 10 0, o0x2b89f58f8358; 0 drivers +v0x1ddbec0_0 .net "right", 14 0, L_0x1e25380; alias, 1 drivers +v0x1ddbfb0_0 .net "rightOut", 14 0, L_0x1e21ab0; alias, 1 drivers +o0x2b89f58f8388 .functor BUFZ 15, C4; HiZ drive +v0x1ddc080_0 .net "up", 14 0, o0x2b89f58f8388; 0 drivers +v0x1ddc140_0 .net "upOut", 14 0, L_0x1e20f50; 1 drivers +v0x1ddc220_0 .var "weHaveData", 5 2; +v0x1ddc300_0 .var "weWantData", 5 2; +v0x1ddc3e0_0 .net "writeAckIn", 5 2, L_0x1e1fbb0; 1 drivers +v0x1ddc4c0_0 .var "writeAckOut", 5 2; +v0x1ddc5a0_0 .var "writeTarget", 2 0; +v0x1ddc680_0 .var/s "writeValue", 10 0; +L_0x1e1df00 .part L_0x1e1d940, 0, 11; +L_0x1e1e290 .part L_0x1e25380, 0, 11; +L_0x1e1e330 .part o0x2b89f58f8388, 0, 11; +L_0x1e1e400 .part o0x2b89f58f7ea8, 0, 11; +L_0x1e1e530 .part L_0x1e1d940, 11, 1; +L_0x1e1e600 .part L_0x1e25380, 11, 1; +L_0x1e1e760 .part o0x2b89f58f8388, 11, 1; +L_0x1e1e800 .concat8 [ 1 1 1 1], L_0x1e1e530, L_0x1e1e600, L_0x1e1e760, L_0x1e1e9c0; +L_0x1e1e9c0 .part o0x2b89f58f7ea8, 11, 1; +L_0x1e1eb00 .reduce/or L_0x1e1e800; +L_0x1e1ebf0 .part L_0x1e1d940, 12, 1; +L_0x1e1ec90 .part L_0x1e25380, 12, 1; +L_0x1e1eda0 .part o0x2b89f58f8388, 12, 1; +L_0x1e1ee40 .concat8 [ 1 1 1 1], L_0x1e1ebf0, L_0x1e1ec90, L_0x1e1eda0, L_0x1e1efb0; +L_0x1e1efb0 .part o0x2b89f58f7ea8, 12, 1; +L_0x1e1f0a0 .reduce/or L_0x1e1ee40; +L_0x1e1f220 .part L_0x1e1d940, 13, 1; +L_0x1e1f2c0 .part L_0x1e25380, 13, 1; +L_0x1e1f400 .part o0x2b89f58f8388, 13, 1; +L_0x1e1f4a0 .concat8 [ 1 1 1 1], L_0x1e1f220, L_0x1e1f2c0, L_0x1e1f400, L_0x1e1f360; +L_0x1e1f360 .part o0x2b89f58f7ea8, 13, 1; +L_0x1e1f7d0 .reduce/or L_0x1e1f4a0; +L_0x1e1f640 .part L_0x1e1d940, 14, 1; +L_0x1e1fa40 .part L_0x1e25380, 14, 1; +L_0x1e1f870 .part o0x2b89f58f8388, 14, 1; +L_0x1e1fbb0 .concat8 [ 1 1 1 1], L_0x1e1f640, L_0x1e1fa40, L_0x1e1f870, L_0x1e1fae0; +L_0x1e1fae0 .part o0x2b89f58f7ea8, 14, 1; +L_0x1e1fe70 .reduce/or L_0x1e1fbb0; +L_0x1e1fd40 .part v0x1ddba90_0, 0, 1; +L_0x1e20050 .part v0x1ddba90_0, 1, 1; +L_0x1e1ff60 .part v0x1ddba90_0, 2, 1; +L_0x1e20240 .part v0x1ddba90_0, 3, 1; +L_0x1e20140 .part v0x1ddc4c0_0, 0, 1; +L_0x1e20480 .part v0x1ddc4c0_0, 1, 1; +L_0x1e20370 .part v0x1ddc4c0_0, 2, 1; +L_0x1e20640 .part v0x1ddc4c0_0, 3, 1; +L_0x1e20520 .part v0x1ddc300_0, 0, 1; +L_0x1e208a0 .part v0x1ddc300_0, 1, 1; +L_0x1e20770 .part v0x1ddc300_0, 2, 1; +L_0x1e20a80 .part v0x1ddc300_0, 3, 1; +L_0x1e20940 .part v0x1ddc220_0, 0, 1; +L_0x1e20c70 .part v0x1ddc220_0, 1, 1; +L_0x1e20b20 .part v0x1ddc220_0, 2, 1; +L_0x1e20bc0 .part v0x1ddc220_0, 3, 1; +L_0x1e20d10 .array/port v0x1ddaf80, L_0x1e21070; +L_0x1e21070 .concat [ 4 2 0 0], v0x1dd8190_0, L_0x2b89f5927210; +LS_0x1e20f50_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_2, L_0x1e20b20, L_0x1e20770, L_0x1e20370; +LS_0x1e20f50_0_4 .concat8 [ 1 0 0 0], L_0x1e1ff60; +L_0x1e20f50 .concat8 [ 14 1 0 0], LS_0x1e20f50_0_0, LS_0x1e20f50_0_4; +LS_0x1e21440_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_3, L_0x1e20bc0, L_0x1e20a80, L_0x1e20640; +LS_0x1e21440_0_4 .concat8 [ 1 0 0 0], L_0x1e20240; +L_0x1e21440 .concat8 [ 14 1 0 0], LS_0x1e21440_0_0, LS_0x1e21440_0_4; +LS_0x1e211d0_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_0, L_0x1e20940, L_0x1e20520, L_0x1e20140; +LS_0x1e211d0_0_4 .concat8 [ 1 0 0 0], L_0x1e1fd40; +L_0x1e211d0 .concat8 [ 14 1 0 0], LS_0x1e211d0_0_0, LS_0x1e211d0_0_4; +LS_0x1e21ab0_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_1, L_0x1e20c70, L_0x1e208a0, L_0x1e20480; +LS_0x1e21ab0_0_4 .concat8 [ 1 0 0 0], L_0x1e20050; +L_0x1e21ab0 .concat8 [ 14 1 0 0], LS_0x1e21ab0_0_0, LS_0x1e21ab0_0_4; +L_0x1e21720 .part L_0x1e1ed30, 14, 4; +L_0x1e21ec0 .part L_0x1e1ed30, 11, 3; +L_0x1e21cd0 .part L_0x1e1ed30, 8, 3; +L_0x1e22110 .part L_0x1e1ed30, 10, 4; +L_0x1e21f60 .part L_0x1e1ed30, 0, 11; +S_0x1ddc900 .scope module, "in" "tis100" 3 62, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1ddcb00 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1ddcb40 .param/str "memFile" 0 4 60, "demo/in.dat"; +L_0x1e2e220 .functor BUFZ 11, v0x1ddce00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e2e420 .functor BUFZ 11, v0x1ddce00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e2f2a0 .functor BUFZ 18, L_0x1e31300, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1ddce00_0 .var/s "ACC", 10 0; +v0x1ddcf00_0 .var/s "BAK", 10 0; +v0x1ddcfe0_0 .net "DST", 2 0, L_0x1df5820; 1 drivers +v0x1ddd0a0_0 .net/s "IMM", 10 0, L_0x1de61e0; 1 drivers +v0x1ddd180_0 .net "INST", 3 0, L_0x1df0660; 1 drivers +v0x1ddd2b0_0 .net "LABEL", 3 0, L_0x1dfaa10; 1 drivers +v0x1ddd390_0 .var "PC", 3 0; +v0x1ddd470_0 .var "PCNEXT", 3 0; +v0x1ddd550_0 .net "SRC", 2 0, L_0x1dd6bd0; 1 drivers +v0x1ddd6c0_0 .net *"_s103", 0 0, L_0x1e30640; 1 drivers +v0x1ddd7a0_0 .net *"_s107", 0 0, L_0x1e30550; 1 drivers +v0x1ddd880_0 .net *"_s111", 0 0, L_0x1e30830; 1 drivers +v0x1ddd960_0 .net *"_s115", 0 0, L_0x1e30730; 1 drivers +v0x1ddda40_0 .net *"_s119", 0 0, L_0x1e30a70; 1 drivers +v0x1dddb20_0 .net *"_s123", 0 0, L_0x1e30960; 1 drivers +v0x1dddc00_0 .net *"_s127", 0 0, L_0x1e30c30; 1 drivers +v0x1dddce0_0 .net *"_s131", 0 0, L_0x1e30b10; 1 drivers +v0x1ddde90_0 .net *"_s135", 0 0, L_0x1e30e90; 1 drivers +v0x1dddf30_0 .net *"_s139", 0 0, L_0x1e30d60; 1 drivers +v0x1dde010_0 .net *"_s143", 0 0, L_0x1e31070; 1 drivers +v0x1dde0f0_0 .net *"_s147", 0 0, L_0x1e30f30; 1 drivers +v0x1dde1d0_0 .net *"_s151", 0 0, L_0x1e31260; 1 drivers +v0x1dde2b0_0 .net *"_s155", 0 0, L_0x1e31110; 1 drivers +v0x1dde390_0 .net *"_s159", 0 0, L_0x1e311b0; 1 drivers +v0x1dde470_0 .net *"_s160", 17 0, L_0x1e31300; 1 drivers +v0x1dde550_0 .net *"_s162", 5 0, L_0x1e31660; 1 drivers +L_0x2b89f5927450 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1dde630_0 .net *"_s165", 1 0, L_0x2b89f5927450; 1 drivers +v0x1de05e0_2 .array/port v0x1de05e0, 2; +v0x1dde710_0 .net *"_s173", 10 0, v0x1de05e0_2; 1 drivers +v0x1de05e0_3 .array/port v0x1de05e0, 3; +v0x1dde7f0_0 .net *"_s179", 10 0, v0x1de05e0_3; 1 drivers +v0x1de05e0_0 .array/port v0x1de05e0, 0; +v0x1dde8d0_0 .net *"_s185", 10 0, v0x1de05e0_0; 1 drivers +v0x1de05e0_1 .array/port v0x1de05e0, 1; +v0x1dde9b0_0 .net *"_s191", 10 0, v0x1de05e0_1; 1 drivers +v0x1ddea90_0 .net *"_s23", 0 0, L_0x1e2eac0; 1 drivers +v0x1ddeb70_0 .net *"_s27", 0 0, L_0x1e2eb90; 1 drivers +v0x1ddddc0_0 .net *"_s31", 0 0, L_0x1e2ec80; 1 drivers +v0x1ddee40_0 .net *"_s36", 0 0, L_0x1e2ef80; 1 drivers +v0x1ddef20_0 .net *"_s42", 0 0, L_0x1e2f160; 1 drivers +v0x1ddf000_0 .net *"_s46", 0 0, L_0x1e2f200; 1 drivers +v0x1ddf0e0_0 .net *"_s50", 0 0, L_0x1e2f310; 1 drivers +v0x1ddf1c0_0 .net *"_s55", 0 0, L_0x1e2f550; 1 drivers +v0x1ddf2a0_0 .net *"_s61", 0 0, L_0x1e2f7c0; 1 drivers +v0x1ddf380_0 .net *"_s65", 0 0, L_0x1e2f8f0; 1 drivers +v0x1ddf460_0 .net *"_s69", 0 0, L_0x1e2fac0; 1 drivers +v0x1ddf540_0 .net *"_s74", 0 0, L_0x1e2fa20; 1 drivers +v0x1ddf620_0 .net *"_s80", 0 0, L_0x1e2fc60; 1 drivers +v0x1ddf700_0 .net *"_s84", 0 0, L_0x1e2ff10; 1 drivers +v0x1ddf7e0_0 .net *"_s88", 0 0, L_0x1e2fe50; 1 drivers +v0x1ddf8c0_0 .net *"_s93", 0 0, L_0x1e2ffb0; 1 drivers +v0x1ddf9a0_0 .net *"_s99", 0 0, L_0x1e30270; 1 drivers +v0x1ddfa80_0 .net/s "accOut", 10 0, L_0x1e2e220; 1 drivers +v0x1ddfb60_0 .net "anyHasData", 0 0, L_0x1e2f070; 1 drivers +v0x1ddfc20_0 .net "anyReadAck", 0 0, L_0x1e2fd60; 1 drivers +v0x1ddfce0_0 .net "anyWantData", 0 0, L_0x1e2f640; 1 drivers +v0x1ddfda0_0 .net "anyWriteAck", 0 0, L_0x1e304b0; 1 drivers +v0x1ddfe60_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +v0x1ddff00_0 .net "down", 14 0, L_0x1e14cb0; alias, 1 drivers +v0x1ddffe0_0 .net "downOut", 14 0, L_0x1e31a80; alias, 1 drivers +v0x1de00c0_0 .net "instruction", 17 0, L_0x1e2f2a0; 1 drivers +v0x1de01a0 .array "instructions", 15 0, 17 0; +v0x1de0260_0 .var "last", 2 0; +o0x2b89f58f9198 .functor BUFZ 15, C4; HiZ drive +v0x1de0340_0 .net "left", 14 0, o0x2b89f58f9198; 0 drivers +v0x1de0420_0 .net "leftOut", 14 0, L_0x1e317c0; 1 drivers +v0x1de0500_0 .var "mode", 2 0; +v0x1de05e0 .array/s "outVals", 2 5, 10 0; +v0x1de0720_0 .var "phase", 2 0; +v0x1de0800_0 .net "portsHaveData", 5 2, L_0x1e2ed70; 1 drivers +v0x1ddec10_0 .net "portsWantData", 5 2, L_0x1e2f3b0; 1 drivers +v0x1ddecf0_0 .net "readAckIn", 5 2, L_0x1e2fb60; 1 drivers +v0x1de0cb0_0 .var "readAckOut", 5 2; +v0x1de0d50_0 .var "readTarget", 2 0; +v0x1de0df0_0 .var/s "readValue", 10 0; +L_0x2b89f5927408 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1de0eb0 .array "regVals", 0 7; +v0x1de0eb0_0 .net/s v0x1de0eb0 0, 10 0, L_0x2b89f5927408; 1 drivers +v0x1de0eb0_1 .net/s v0x1de0eb0 1, 10 0, L_0x1e2e420; 1 drivers +v0x1de0eb0_2 .net/s v0x1de0eb0 2, 10 0, L_0x1e2e490; 1 drivers +v0x1de0eb0_3 .net/s v0x1de0eb0 3, 10 0, L_0x1e2e790; 1 drivers +v0x1de0eb0_4 .net/s v0x1de0eb0 4, 10 0, L_0x1e2e830; 1 drivers +v0x1de0eb0_5 .net/s v0x1de0eb0 5, 10 0, L_0x1e2e930; 1 drivers +o0x2b89f58f9558 .functor BUFZ 11, C4; HiZ drive +v0x1de0eb0_6 .net/s v0x1de0eb0 6, 10 0, o0x2b89f58f9558; 0 drivers +o0x2b89f58f9588 .functor BUFZ 11, C4; HiZ drive +v0x1de0eb0_7 .net/s v0x1de0eb0 7, 10 0, o0x2b89f58f9588; 0 drivers +o0x2b89f58f95b8 .functor BUFZ 15, C4; HiZ drive +v0x1de10c0_0 .net "right", 14 0, o0x2b89f58f95b8; 0 drivers +v0x1de11a0_0 .net "rightOut", 14 0, L_0x1de0fe0; 1 drivers +o0x2b89f58f9618 .functor BUFZ 15, C4; HiZ drive +v0x1de1280_0 .net "up", 14 0, o0x2b89f58f9618; 0 drivers +v0x1de1360_0 .net "upOut", 14 0, L_0x1e31570; 1 drivers +v0x1de1440_0 .var "weHaveData", 5 2; +v0x1de1520_0 .var "weWantData", 5 2; +v0x1de1600_0 .net "writeAckIn", 5 2, L_0x1e30080; 1 drivers +v0x1de16e0_0 .var "writeAckOut", 5 2; +v0x1de17c0_0 .var "writeTarget", 2 0; +v0x1de18a0_0 .var/s "writeValue", 10 0; +L_0x1e2e490 .part o0x2b89f58f9198, 0, 11; +L_0x1e2e790 .part o0x2b89f58f95b8, 0, 11; +L_0x1e2e830 .part o0x2b89f58f9618, 0, 11; +L_0x1e2e930 .part L_0x1e14cb0, 0, 11; +L_0x1e2eac0 .part o0x2b89f58f9198, 11, 1; +L_0x1e2eb90 .part o0x2b89f58f95b8, 11, 1; +L_0x1e2ec80 .part o0x2b89f58f9618, 11, 1; +L_0x1e2ed70 .concat8 [ 1 1 1 1], L_0x1e2eac0, L_0x1e2eb90, L_0x1e2ec80, L_0x1e2ef80; +L_0x1e2ef80 .part L_0x1e14cb0, 11, 1; +L_0x1e2f070 .reduce/or L_0x1e2ed70; +L_0x1e2f160 .part o0x2b89f58f9198, 12, 1; +L_0x1e2f200 .part o0x2b89f58f95b8, 12, 1; +L_0x1e2f310 .part o0x2b89f58f9618, 12, 1; +L_0x1e2f3b0 .concat8 [ 1 1 1 1], L_0x1e2f160, L_0x1e2f200, L_0x1e2f310, L_0x1e2f550; +L_0x1e2f550 .part L_0x1e14cb0, 12, 1; +L_0x1e2f640 .reduce/or L_0x1e2f3b0; +L_0x1e2f7c0 .part o0x2b89f58f9198, 13, 1; +L_0x1e2f8f0 .part o0x2b89f58f95b8, 13, 1; +L_0x1e2fac0 .part o0x2b89f58f9618, 13, 1; +L_0x1e2fb60 .concat8 [ 1 1 1 1], L_0x1e2f7c0, L_0x1e2f8f0, L_0x1e2fac0, L_0x1e2fa20; +L_0x1e2fa20 .part L_0x1e14cb0, 13, 1; +L_0x1e2fd60 .reduce/or L_0x1e2fb60; +L_0x1e2fc60 .part o0x2b89f58f9198, 14, 1; +L_0x1e2ff10 .part o0x2b89f58f95b8, 14, 1; +L_0x1e2fe50 .part o0x2b89f58f9618, 14, 1; +L_0x1e30080 .concat8 [ 1 1 1 1], L_0x1e2fc60, L_0x1e2ff10, L_0x1e2fe50, L_0x1e2ffb0; +L_0x1e2ffb0 .part L_0x1e14cb0, 14, 1; +L_0x1e304b0 .reduce/or L_0x1e30080; +L_0x1e30270 .part v0x1de0cb0_0, 0, 1; +L_0x1e30640 .part v0x1de0cb0_0, 1, 1; +L_0x1e30550 .part v0x1de0cb0_0, 2, 1; +L_0x1e30830 .part v0x1de0cb0_0, 3, 1; +L_0x1e30730 .part v0x1de16e0_0, 0, 1; +L_0x1e30a70 .part v0x1de16e0_0, 1, 1; +L_0x1e30960 .part v0x1de16e0_0, 2, 1; +L_0x1e30c30 .part v0x1de16e0_0, 3, 1; +L_0x1e30b10 .part v0x1de1520_0, 0, 1; +L_0x1e30e90 .part v0x1de1520_0, 1, 1; +L_0x1e30d60 .part v0x1de1520_0, 2, 1; +L_0x1e31070 .part v0x1de1520_0, 3, 1; +L_0x1e30f30 .part v0x1de1440_0, 0, 1; +L_0x1e31260 .part v0x1de1440_0, 1, 1; +L_0x1e31110 .part v0x1de1440_0, 2, 1; +L_0x1e311b0 .part v0x1de1440_0, 3, 1; +L_0x1e31300 .array/port v0x1de01a0, L_0x1e31660; +L_0x1e31660 .concat [ 4 2 0 0], v0x1ddd390_0, L_0x2b89f5927450; +LS_0x1e31570_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_2, L_0x1e31110, L_0x1e30d60, L_0x1e30960; +LS_0x1e31570_0_4 .concat8 [ 1 0 0 0], L_0x1e30550; +L_0x1e31570 .concat8 [ 14 1 0 0], LS_0x1e31570_0_0, LS_0x1e31570_0_4; +LS_0x1e31a80_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_3, L_0x1e311b0, L_0x1e31070, L_0x1e30c30; +LS_0x1e31a80_0_4 .concat8 [ 1 0 0 0], L_0x1e30830; +L_0x1e31a80 .concat8 [ 14 1 0 0], LS_0x1e31a80_0_0, LS_0x1e31a80_0_4; +LS_0x1e317c0_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_0, L_0x1e30f30, L_0x1e30b10, L_0x1e30730; +LS_0x1e317c0_0_4 .concat8 [ 1 0 0 0], L_0x1e30270; +L_0x1e317c0 .concat8 [ 14 1 0 0], LS_0x1e317c0_0_0, LS_0x1e317c0_0_4; +LS_0x1de0fe0_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_1, L_0x1e31260, L_0x1e30e90, L_0x1e30a70; +LS_0x1de0fe0_0_4 .concat8 [ 1 0 0 0], L_0x1e30640; +L_0x1de0fe0 .concat8 [ 14 1 0 0], LS_0x1de0fe0_0_0, LS_0x1de0fe0_0_4; +L_0x1df0660 .part L_0x1e2f2a0, 14, 4; +L_0x1df5820 .part L_0x1e2f2a0, 11, 3; +L_0x1dd6bd0 .part L_0x1e2f2a0, 8, 3; +L_0x1dfaa10 .part L_0x1e2f2a0, 10, 4; +L_0x1de61e0 .part L_0x1e2f2a0, 0, 11; +S_0x1de1b20 .scope module, "one" "tis100" 3 34, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1de1cf0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1de1d30 .param/str "memFile" 0 4 60, "demo/one.dat"; +L_0x1e01e90 .functor BUFZ 11, v0x1de2010_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e11f10 .functor BUFZ 11, v0x1de2010_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e12a50 .functor BUFZ 18, L_0x1e14a20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1de2010_0 .var/s "ACC", 10 0; +v0x1de2110_0 .var/s "BAK", 10 0; +v0x1de21f0_0 .net "DST", 2 0, L_0x1e15ba0; 1 drivers +v0x1de22b0_0 .net/s "IMM", 10 0, L_0x1e15c40; 1 drivers +v0x1de2390_0 .net "INST", 3 0, L_0x1e15480; 1 drivers +v0x1de24c0_0 .net "LABEL", 3 0, L_0x1e15df0; 1 drivers +v0x1de25a0_0 .var "PC", 3 0; +v0x1de2680_0 .var "PCNEXT", 3 0; +v0x1de2760_0 .net "SRC", 2 0, L_0x1e159b0; 1 drivers +v0x1de28d0_0 .net *"_s103", 0 0, L_0x1e13d60; 1 drivers +v0x1de29b0_0 .net *"_s107", 0 0, L_0x1e13c70; 1 drivers +v0x1de2a90_0 .net *"_s111", 0 0, L_0x1e13f50; 1 drivers +v0x1de2b70_0 .net *"_s115", 0 0, L_0x1e13e50; 1 drivers +v0x1de2c50_0 .net *"_s119", 0 0, L_0x1e14190; 1 drivers +v0x1de2d30_0 .net *"_s123", 0 0, L_0x1e14080; 1 drivers +v0x1de2e10_0 .net *"_s127", 0 0, L_0x1e14350; 1 drivers +v0x1de2ef0_0 .net *"_s131", 0 0, L_0x1e14230; 1 drivers +v0x1de30a0_0 .net *"_s135", 0 0, L_0x1e145b0; 1 drivers +v0x1de3140_0 .net *"_s139", 0 0, L_0x1e14480; 1 drivers +v0x1de31e0_0 .net *"_s143", 0 0, L_0x1e14790; 1 drivers +v0x1de3280_0 .net *"_s147", 0 0, L_0x1e14650; 1 drivers +v0x1de3320_0 .net *"_s151", 0 0, L_0x1e14980; 1 drivers +v0x1de33e0_0 .net *"_s155", 0 0, L_0x1e14830; 1 drivers +v0x1de34c0_0 .net *"_s159", 0 0, L_0x1e148d0; 1 drivers +v0x1de35a0_0 .net *"_s160", 17 0, L_0x1e14a20; 1 drivers +v0x1de3680_0 .net *"_s162", 5 0, L_0x1e14d80; 1 drivers +L_0x2b89f5927060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1de3760_0 .net *"_s165", 1 0, L_0x2b89f5927060; 1 drivers +v0x1de5710_2 .array/port v0x1de5710, 2; +v0x1de3840_0 .net *"_s173", 10 0, v0x1de5710_2; 1 drivers +v0x1de5710_3 .array/port v0x1de5710, 3; +v0x1de3920_0 .net *"_s179", 10 0, v0x1de5710_3; 1 drivers +v0x1de5710_0 .array/port v0x1de5710, 0; +v0x1de3a00_0 .net *"_s185", 10 0, v0x1de5710_0; 1 drivers +v0x1de5710_1 .array/port v0x1de5710, 1; +v0x1de3ae0_0 .net *"_s191", 10 0, v0x1de5710_1; 1 drivers +v0x1de3bc0_0 .net *"_s23", 0 0, L_0x1e12200; 1 drivers +v0x1de3ca0_0 .net *"_s27", 0 0, L_0x1e122a0; 1 drivers +v0x1de2fd0_0 .net *"_s31", 0 0, L_0x1e123d0; 1 drivers +v0x1de3f70_0 .net *"_s36", 0 0, L_0x1e12690; 1 drivers +v0x1de4050_0 .net *"_s42", 0 0, L_0x1e12910; 1 drivers +v0x1de4130_0 .net *"_s46", 0 0, L_0x1e129b0; 1 drivers +v0x1de4210_0 .net *"_s50", 0 0, L_0x1e12ac0; 1 drivers +v0x1de42f0_0 .net *"_s55", 0 0, L_0x1e12d50; 1 drivers +v0x1de43d0_0 .net *"_s61", 0 0, L_0x1e12fc0; 1 drivers +v0x1de44b0_0 .net *"_s65", 0 0, L_0x1e130f0; 1 drivers +v0x1de4590_0 .net *"_s69", 0 0, L_0x1e132c0; 1 drivers +v0x1de4670_0 .net *"_s74", 0 0, L_0x1e13220; 1 drivers +v0x1de4750_0 .net *"_s80", 0 0, L_0x1e134a0; 1 drivers +v0x1de4830_0 .net *"_s84", 0 0, L_0x1e13750; 1 drivers +v0x1de4910_0 .net *"_s88", 0 0, L_0x1e13690; 1 drivers +v0x1de49f0_0 .net *"_s93", 0 0, L_0x1e137f0; 1 drivers +v0x1de4ad0_0 .net *"_s99", 0 0, L_0x1e13a50; 1 drivers +v0x1de4bb0_0 .net/s "accOut", 10 0, L_0x1e01e90; 1 drivers +v0x1de4c90_0 .net "anyHasData", 0 0, L_0x1e12810; 1 drivers +v0x1de4d50_0 .net "anyReadAck", 0 0, L_0x1e135a0; 1 drivers +v0x1de4e10_0 .net "anyWantData", 0 0, L_0x1e12e40; 1 drivers +v0x1de4ed0_0 .net "anyWriteAck", 0 0, L_0x1e13b80; 1 drivers +v0x1de4f90_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +v0x1de5030_0 .net "down", 14 0, L_0x1e1ce50; alias, 1 drivers +v0x1de5110_0 .net "downOut", 14 0, L_0x1e151a0; alias, 1 drivers +v0x1de51f0_0 .net "instruction", 17 0, L_0x1e12a50; 1 drivers +v0x1de52d0 .array "instructions", 15 0, 17 0; +v0x1de5390_0 .var "last", 2 0; +o0x2b89f58fa428 .functor BUFZ 15, C4; HiZ drive +v0x1de5470_0 .net "left", 14 0, o0x2b89f58fa428; 0 drivers +v0x1de5550_0 .net "leftOut", 14 0, L_0x1e14ee0; 1 drivers +v0x1de5630_0 .var "mode", 2 0; +v0x1de5710 .array/s "outVals", 2 5, 10 0; +v0x1de5880_0 .var "phase", 2 0; +v0x1de5960_0 .net "portsHaveData", 5 2, L_0x1e12500; 1 drivers +v0x1de3d80_0 .net "portsWantData", 5 2, L_0x1e12b60; 1 drivers +v0x1de3e60_0 .net "readAckIn", 5 2, L_0x1e13360; 1 drivers +v0x1de5e10_0 .var "readAckOut", 5 2; +v0x1de5ef0_0 .var "readTarget", 2 0; +v0x1de5fd0_0 .var/s "readValue", 10 0; +L_0x2b89f5927018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1de60b0 .array "regVals", 0 7; +v0x1de60b0_0 .net/s v0x1de60b0 0, 10 0, L_0x2b89f5927018; 1 drivers +v0x1de60b0_1 .net/s v0x1de60b0 1, 10 0, L_0x1e11f10; 1 drivers +v0x1de60b0_2 .net/s v0x1de60b0 2, 10 0, L_0x1e11f80; 1 drivers +v0x1de60b0_3 .net/s v0x1de60b0 3, 10 0, L_0x1e12020; 1 drivers +v0x1de60b0_4 .net/s v0x1de60b0 4, 10 0, L_0x1e120c0; 1 drivers +v0x1de60b0_5 .net/s v0x1de60b0 5, 10 0, L_0x1e12160; 1 drivers +o0x2b89f58fa7e8 .functor BUFZ 11, C4; HiZ drive +v0x1de60b0_6 .net/s v0x1de60b0 6, 10 0, o0x2b89f58fa7e8; 0 drivers +o0x2b89f58fa818 .functor BUFZ 11, C4; HiZ drive +v0x1de60b0_7 .net/s v0x1de60b0 7, 10 0, o0x2b89f58fa818; 0 drivers +o0x2b89f58fa848 .functor BUFZ 15, C4; HiZ drive +v0x1de62c0_0 .net "right", 14 0, o0x2b89f58fa848; 0 drivers +v0x1de63a0_0 .net "rightOut", 14 0, L_0x1e15790; 1 drivers +v0x1de6480_0 .net "up", 14 0, L_0x1e31a80; alias, 1 drivers +v0x1de6570_0 .net "upOut", 14 0, L_0x1e14cb0; alias, 1 drivers +v0x1de6640_0 .var "weHaveData", 5 2; +v0x1de6700_0 .var "weWantData", 5 2; +v0x1de67e0_0 .net "writeAckIn", 5 2, L_0x1e138c0; 1 drivers +v0x1de68c0_0 .var "writeAckOut", 5 2; +v0x1de69a0_0 .var "writeTarget", 2 0; +v0x1de6a80_0 .var/s "writeValue", 10 0; +L_0x1e11f80 .part o0x2b89f58fa428, 0, 11; +L_0x1e12020 .part o0x2b89f58fa848, 0, 11; +L_0x1e120c0 .part L_0x1e31a80, 0, 11; +L_0x1e12160 .part L_0x1e1ce50, 0, 11; +L_0x1e12200 .part o0x2b89f58fa428, 11, 1; +L_0x1e122a0 .part o0x2b89f58fa848, 11, 1; +L_0x1e123d0 .part L_0x1e31a80, 11, 1; +L_0x1e12500 .concat8 [ 1 1 1 1], L_0x1e12200, L_0x1e122a0, L_0x1e123d0, L_0x1e12690; +L_0x1e12690 .part L_0x1e1ce50, 11, 1; +L_0x1e12810 .reduce/or L_0x1e12500; +L_0x1e12910 .part o0x2b89f58fa428, 12, 1; +L_0x1e129b0 .part o0x2b89f58fa848, 12, 1; +L_0x1e12ac0 .part L_0x1e31a80, 12, 1; +L_0x1e12b60 .concat8 [ 1 1 1 1], L_0x1e12910, L_0x1e129b0, L_0x1e12ac0, L_0x1e12d50; +L_0x1e12d50 .part L_0x1e1ce50, 12, 1; +L_0x1e12e40 .reduce/or L_0x1e12b60; +L_0x1e12fc0 .part o0x2b89f58fa428, 13, 1; +L_0x1e130f0 .part o0x2b89f58fa848, 13, 1; +L_0x1e132c0 .part L_0x1e31a80, 13, 1; +L_0x1e13360 .concat8 [ 1 1 1 1], L_0x1e12fc0, L_0x1e130f0, L_0x1e132c0, L_0x1e13220; +L_0x1e13220 .part L_0x1e1ce50, 13, 1; +L_0x1e135a0 .reduce/or L_0x1e13360; +L_0x1e134a0 .part o0x2b89f58fa428, 14, 1; +L_0x1e13750 .part o0x2b89f58fa848, 14, 1; +L_0x1e13690 .part L_0x1e31a80, 14, 1; +L_0x1e138c0 .concat8 [ 1 1 1 1], L_0x1e134a0, L_0x1e13750, L_0x1e13690, L_0x1e137f0; +L_0x1e137f0 .part L_0x1e1ce50, 14, 1; +L_0x1e13b80 .reduce/or L_0x1e138c0; +L_0x1e13a50 .part v0x1de5e10_0, 0, 1; +L_0x1e13d60 .part v0x1de5e10_0, 1, 1; +L_0x1e13c70 .part v0x1de5e10_0, 2, 1; +L_0x1e13f50 .part v0x1de5e10_0, 3, 1; +L_0x1e13e50 .part v0x1de68c0_0, 0, 1; +L_0x1e14190 .part v0x1de68c0_0, 1, 1; +L_0x1e14080 .part v0x1de68c0_0, 2, 1; +L_0x1e14350 .part v0x1de68c0_0, 3, 1; +L_0x1e14230 .part v0x1de6700_0, 0, 1; +L_0x1e145b0 .part v0x1de6700_0, 1, 1; +L_0x1e14480 .part v0x1de6700_0, 2, 1; +L_0x1e14790 .part v0x1de6700_0, 3, 1; +L_0x1e14650 .part v0x1de6640_0, 0, 1; +L_0x1e14980 .part v0x1de6640_0, 1, 1; +L_0x1e14830 .part v0x1de6640_0, 2, 1; +L_0x1e148d0 .part v0x1de6640_0, 3, 1; +L_0x1e14a20 .array/port v0x1de52d0, L_0x1e14d80; +L_0x1e14d80 .concat [ 4 2 0 0], v0x1de25a0_0, L_0x2b89f5927060; +LS_0x1e14cb0_0_0 .concat8 [ 11 1 1 1], v0x1de5710_2, L_0x1e14830, L_0x1e14480, L_0x1e14080; +LS_0x1e14cb0_0_4 .concat8 [ 1 0 0 0], L_0x1e13c70; +L_0x1e14cb0 .concat8 [ 14 1 0 0], LS_0x1e14cb0_0_0, LS_0x1e14cb0_0_4; +LS_0x1e151a0_0_0 .concat8 [ 11 1 1 1], v0x1de5710_3, L_0x1e148d0, L_0x1e14790, L_0x1e14350; +LS_0x1e151a0_0_4 .concat8 [ 1 0 0 0], L_0x1e13f50; +L_0x1e151a0 .concat8 [ 14 1 0 0], LS_0x1e151a0_0_0, LS_0x1e151a0_0_4; +LS_0x1e14ee0_0_0 .concat8 [ 11 1 1 1], v0x1de5710_0, L_0x1e14650, L_0x1e14230, L_0x1e13e50; +LS_0x1e14ee0_0_4 .concat8 [ 1 0 0 0], L_0x1e13a50; +L_0x1e14ee0 .concat8 [ 14 1 0 0], LS_0x1e14ee0_0_0, LS_0x1e14ee0_0_4; +LS_0x1e15790_0_0 .concat8 [ 11 1 1 1], v0x1de5710_1, L_0x1e14980, L_0x1e145b0, L_0x1e14190; +LS_0x1e15790_0_4 .concat8 [ 1 0 0 0], L_0x1e13d60; +L_0x1e15790 .concat8 [ 14 1 0 0], LS_0x1e15790_0_0, LS_0x1e15790_0_4; +L_0x1e15480 .part L_0x1e12a50, 14, 4; +L_0x1e15ba0 .part L_0x1e12a50, 11, 3; +L_0x1e159b0 .part L_0x1e12a50, 8, 3; +L_0x1e15df0 .part L_0x1e12a50, 10, 4; +L_0x1e15c40 .part L_0x1e12a50, 0, 11; +S_0x1de6d00 .scope module, "out" "tis100" 3 63, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1de6f20 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000001>; +P_0x1de6f60 .param/str "memFile" 0 4 60, "demo/out.dat"; +L_0x1dfa0d0 .functor BUFZ 11, v0x1de7220_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1dff320 .functor BUFZ 11, v0x1de7220_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e32bb0 .functor BUFZ 18, L_0x1e34c30, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1de7220_0 .var/s "ACC", 10 0; +v0x1de7320_0 .var/s "BAK", 10 0; +v0x1de7400_0 .net "DST", 2 0, L_0x1e35d60; 1 drivers +v0x1de74c0_0 .net/s "IMM", 10 0, L_0x1e35e00; 1 drivers +v0x1de75a0_0 .net "INST", 3 0, L_0x1e356c0; 1 drivers +v0x1de76d0_0 .net "LABEL", 3 0, L_0x1e35fb0; 1 drivers +v0x1de77b0_0 .var "PC", 3 0; +v0x1de7890_0 .var "PCNEXT", 3 0; +v0x1de7970_0 .net "SRC", 2 0, L_0x1e35b70; 1 drivers +v0x1de7ae0_0 .net *"_s103", 0 0, L_0x1e33f70; 1 drivers +v0x1de7bc0_0 .net *"_s107", 0 0, L_0x1e33e80; 1 drivers +v0x1de7ca0_0 .net *"_s111", 0 0, L_0x1e34160; 1 drivers +v0x1de7d80_0 .net *"_s115", 0 0, L_0x1e34060; 1 drivers +v0x1de7e60_0 .net *"_s119", 0 0, L_0x1e343a0; 1 drivers +v0x1de7f40_0 .net *"_s123", 0 0, L_0x1e34290; 1 drivers +v0x1de8020_0 .net *"_s127", 0 0, L_0x1e34560; 1 drivers +v0x1de8100_0 .net *"_s131", 0 0, L_0x1e34440; 1 drivers +v0x1de82b0_0 .net *"_s135", 0 0, L_0x1e347c0; 1 drivers +v0x1de8350_0 .net *"_s139", 0 0, L_0x1e34690; 1 drivers +v0x1de8430_0 .net *"_s143", 0 0, L_0x1e349a0; 1 drivers +v0x1de8510_0 .net *"_s147", 0 0, L_0x1e34860; 1 drivers +v0x1de85f0_0 .net *"_s151", 0 0, L_0x1e34b90; 1 drivers +v0x1de86d0_0 .net *"_s155", 0 0, L_0x1e34a40; 1 drivers +v0x1de87b0_0 .net *"_s159", 0 0, L_0x1e34ae0; 1 drivers +v0x1de8890_0 .net *"_s160", 17 0, L_0x1e34c30; 1 drivers +v0x1de8970_0 .net *"_s162", 5 0, L_0x1e34f90; 1 drivers +L_0x2b89f59274e0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1de8a50_0 .net *"_s165", 1 0, L_0x2b89f59274e0; 1 drivers +v0x1deaa90_2 .array/port v0x1deaa90, 2; +v0x1de8b30_0 .net *"_s173", 10 0, v0x1deaa90_2; 1 drivers +v0x1deaa90_3 .array/port v0x1deaa90, 3; +v0x1de8c10_0 .net *"_s179", 10 0, v0x1deaa90_3; 1 drivers +v0x1deaa90_0 .array/port v0x1deaa90, 0; +v0x1de8cf0_0 .net *"_s185", 10 0, v0x1deaa90_0; 1 drivers +v0x1deaa90_1 .array/port v0x1deaa90, 1; +v0x1de8dd0_0 .net *"_s191", 10 0, v0x1deaa90_1; 1 drivers +v0x1de8eb0_0 .net *"_s23", 0 0, L_0x1e32390; 1 drivers +v0x1de8f90_0 .net *"_s27", 0 0, L_0x1e32430; 1 drivers +v0x1de81e0_0 .net *"_s31", 0 0, L_0x1e32520; 1 drivers +v0x1de9260_0 .net *"_s36", 0 0, L_0x1e327e0; 1 drivers +v0x1de9340_0 .net *"_s42", 0 0, L_0x1e32a70; 1 drivers +v0x1de9420_0 .net *"_s46", 0 0, L_0x1e32b10; 1 drivers +v0x1de9500_0 .net *"_s50", 0 0, L_0x1e32c20; 1 drivers +v0x1de95e0_0 .net *"_s55", 0 0, L_0x1e32eb0; 1 drivers +v0x1de96c0_0 .net *"_s61", 0 0, L_0x1e33120; 1 drivers +v0x1de97a0_0 .net *"_s65", 0 0, L_0x1e33250; 1 drivers +v0x1de9880_0 .net *"_s69", 0 0, L_0x1e33420; 1 drivers +v0x1de9960_0 .net *"_s74", 0 0, L_0x1e33380; 1 drivers +v0x1de9a40_0 .net *"_s80", 0 0, L_0x1e335b0; 1 drivers +v0x1de9b20_0 .net *"_s84", 0 0, L_0x1e338a0; 1 drivers +v0x1de9c00_0 .net *"_s88", 0 0, L_0x1e337e0; 1 drivers +v0x1de9ce0_0 .net *"_s93", 0 0, L_0x1e33940; 1 drivers +v0x1de9dc0_0 .net *"_s99", 0 0, L_0x1e33c60; 1 drivers +v0x1de9ea0_0 .net/s "accOut", 10 0, L_0x1dfa0d0; 1 drivers +v0x1de9f80_0 .net "anyHasData", 0 0, L_0x1e32920; 1 drivers +v0x1dea040_0 .net "anyReadAck", 0 0, L_0x1e33740; 1 drivers +v0x1dea100_0 .net "anyWantData", 0 0, L_0x1e32fa0; 1 drivers +v0x1dea1c0_0 .net "anyWriteAck", 0 0, L_0x1e33d90; 1 drivers +v0x1dea280_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +o0x2b89f58fb598 .functor BUFZ 15, C4; HiZ drive +v0x1dea3b0_0 .net "down", 14 0, o0x2b89f58fb598; 0 drivers +v0x1dea490_0 .net "downOut", 14 0, L_0x1e35420; 1 drivers +v0x1dea570_0 .net "instruction", 17 0, L_0x1e32bb0; 1 drivers +v0x1dea650 .array "instructions", 15 0, 17 0; +v0x1dea710_0 .var "last", 2 0; +o0x2b89f58fb658 .functor BUFZ 15, C4; HiZ drive +v0x1dea7f0_0 .net "left", 14 0, o0x2b89f58fb658; 0 drivers +v0x1dea8d0_0 .net "leftOut", 14 0, L_0x1e350f0; 1 drivers +v0x1dea9b0_0 .var "mode", 2 0; +v0x1deaa90 .array/s "outVals", 2 5, 10 0; +v0x1deabd0_0 .var "phase", 2 0; +v0x1deacb0_0 .net "portsHaveData", 5 2, L_0x1e325f0; 1 drivers +v0x1de9030_0 .net "portsWantData", 5 2, L_0x1e32cc0; 1 drivers +v0x1de90f0_0 .net "readAckIn", 5 2, L_0x1e334c0; 1 drivers +v0x1deb160_0 .var "readAckOut", 5 2; +v0x1deb200_0 .var "readTarget", 2 0; +v0x1deb2a0_0 .var/s "readValue", 10 0; +L_0x2b89f5927498 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1deb340 .array "regVals", 0 7; +v0x1deb340_0 .net/s v0x1deb340 0, 10 0, L_0x2b89f5927498; 1 drivers +v0x1deb340_1 .net/s v0x1deb340 1, 10 0, L_0x1dff320; 1 drivers +v0x1deb340_2 .net/s v0x1deb340 2, 10 0, L_0x1dffc60; 1 drivers +v0x1deb340_3 .net/s v0x1deb340 3, 10 0, L_0x1e321b0; 1 drivers +v0x1deb340_4 .net/s v0x1deb340 4, 10 0, L_0x1e32250; 1 drivers +v0x1deb340_5 .net/s v0x1deb340 5, 10 0, L_0x1e322f0; 1 drivers +o0x2b89f58fba18 .functor BUFZ 11, C4; HiZ drive +v0x1deb340_6 .net/s v0x1deb340 6, 10 0, o0x2b89f58fba18; 0 drivers +o0x2b89f58fba48 .functor BUFZ 11, C4; HiZ drive +v0x1deb340_7 .net/s v0x1deb340 7, 10 0, o0x2b89f58fba48; 0 drivers +o0x2b89f58fba78 .functor BUFZ 15, C4; HiZ drive +v0x1deb530_0 .net "right", 14 0, o0x2b89f58fba78; 0 drivers +v0x1deb610_0 .net "rightOut", 14 0, L_0x1e35990; 1 drivers +v0x1deb6f0_0 .net "up", 14 0, L_0x1e29740; alias, 1 drivers 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+L_0x1e32eb0 .part o0x2b89f58fb598, 12, 1; +L_0x1e32fa0 .reduce/or L_0x1e32cc0; +L_0x1e33120 .part o0x2b89f58fb658, 13, 1; +L_0x1e33250 .part o0x2b89f58fba78, 13, 1; +L_0x1e33420 .part L_0x1e29740, 13, 1; +L_0x1e334c0 .concat8 [ 1 1 1 1], L_0x1e33120, L_0x1e33250, L_0x1e33420, L_0x1e33380; +L_0x1e33380 .part o0x2b89f58fb598, 13, 1; +L_0x1e33740 .reduce/or L_0x1e334c0; +L_0x1e335b0 .part o0x2b89f58fb658, 14, 1; +L_0x1e338a0 .part o0x2b89f58fba78, 14, 1; +L_0x1e337e0 .part L_0x1e29740, 14, 1; +L_0x1e33b20 .concat8 [ 1 1 1 1], L_0x1e335b0, L_0x1e338a0, L_0x1e337e0, L_0x1e33940; +L_0x1e33940 .part o0x2b89f58fb598, 14, 1; +L_0x1e33d90 .reduce/or L_0x1e33b20; +L_0x1e33c60 .part v0x1deb160_0, 0, 1; +L_0x1e33f70 .part v0x1deb160_0, 1, 1; +L_0x1e33e80 .part v0x1deb160_0, 2, 1; +L_0x1e34160 .part v0x1deb160_0, 3, 1; +L_0x1e34060 .part v0x1debb50_0, 0, 1; +L_0x1e343a0 .part v0x1debb50_0, 1, 1; +L_0x1e34290 .part v0x1debb50_0, 2, 1; +L_0x1e34560 .part v0x1debb50_0, 3, 1; +L_0x1e34440 .part v0x1deb990_0, 0, 1; +L_0x1e347c0 .part v0x1deb990_0, 1, 1; +L_0x1e34690 .part v0x1deb990_0, 2, 1; +L_0x1e349a0 .part v0x1deb990_0, 3, 1; +L_0x1e34860 .part v0x1deb8b0_0, 0, 1; +L_0x1e34b90 .part v0x1deb8b0_0, 1, 1; +L_0x1e34a40 .part v0x1deb8b0_0, 2, 1; +L_0x1e34ae0 .part v0x1deb8b0_0, 3, 1; +L_0x1e34c30 .array/port v0x1dea650, L_0x1e34f90; +L_0x1e34f90 .concat [ 4 2 0 0], v0x1de77b0_0, L_0x2b89f59274e0; +LS_0x1e34ea0_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_2, L_0x1e34a40, L_0x1e34690, L_0x1e34290; +LS_0x1e34ea0_0_4 .concat8 [ 1 0 0 0], L_0x1e33e80; +L_0x1e34ea0 .concat8 [ 14 1 0 0], LS_0x1e34ea0_0_0, LS_0x1e34ea0_0_4; +LS_0x1e35420_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_3, L_0x1e34ae0, L_0x1e349a0, L_0x1e34560; +LS_0x1e35420_0_4 .concat8 [ 1 0 0 0], L_0x1e34160; +L_0x1e35420 .concat8 [ 14 1 0 0], LS_0x1e35420_0_0, LS_0x1e35420_0_4; +LS_0x1e350f0_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_0, L_0x1e34860, L_0x1e34440, L_0x1e34060; +LS_0x1e350f0_0_4 .concat8 [ 1 0 0 0], L_0x1e33c60; +L_0x1e350f0 .concat8 [ 14 1 0 0], LS_0x1e350f0_0_0, LS_0x1e350f0_0_4; +LS_0x1e35990_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_1, L_0x1e34b90, L_0x1e347c0, L_0x1e343a0; +LS_0x1e35990_0_4 .concat8 [ 1 0 0 0], L_0x1e33f70; +L_0x1e35990 .concat8 [ 14 1 0 0], LS_0x1e35990_0_0, LS_0x1e35990_0_4; +L_0x1e356c0 .part L_0x1e32bb0, 14, 4; +L_0x1e35d60 .part L_0x1e32bb0, 11, 3; +L_0x1e35b70 .part L_0x1e32bb0, 8, 3; +L_0x1e35fb0 .part L_0x1e32bb0, 10, 4; +L_0x1e35e00 .part L_0x1e32bb0, 0, 11; +S_0x1debf90 .scope module, "seven" "tis100" 3 58, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1dec160 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1dec1a0 .param/str "memFile" 0 4 60, "demo/seven.dat"; +L_0x1e2a000 .functor BUFZ 11, v0x1dec480_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e2a200 .functor BUFZ 11, v0x1dec480_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e2b070 .functor BUFZ 18, L_0x1e2d0f0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1dec480_0 .var/s "ACC", 10 0; +v0x1dec580_0 .var/s "BAK", 10 0; +v0x1dec660_0 .net "DST", 2 0, L_0x1e2e2e0; 1 drivers +v0x1dec720_0 .net/s "IMM", 10 0, L_0x1e2e380; 1 drivers +v0x1dec800_0 .net "INST", 3 0, L_0x1e2db80; 1 drivers +v0x1dec930_0 .net "LABEL", 3 0, L_0x1e2e530; 1 drivers +v0x1deca10_0 .var "PC", 3 0; +v0x1decaf0_0 .var "PCNEXT", 3 0; +v0x1decbd0_0 .net "SRC", 2 0, L_0x1e2e0f0; 1 drivers +v0x1decd40_0 .net *"_s103", 0 0, L_0x1e2c430; 1 drivers +v0x1dece20_0 .net *"_s107", 0 0, L_0x1e2c340; 1 drivers +v0x1decf00_0 .net *"_s111", 0 0, L_0x1e2c620; 1 drivers +v0x1decfe0_0 .net *"_s115", 0 0, L_0x1e2c520; 1 drivers +v0x1ded0c0_0 .net *"_s119", 0 0, L_0x1e2c860; 1 drivers +v0x1ded1a0_0 .net *"_s123", 0 0, L_0x1e2c750; 1 drivers +v0x1ded280_0 .net *"_s127", 0 0, L_0x1e2ca20; 1 drivers +v0x1ded360_0 .net *"_s131", 0 0, L_0x1e2c900; 1 drivers +v0x1ded510_0 .net *"_s135", 0 0, L_0x1e2cc80; 1 drivers +v0x1ded5b0_0 .net *"_s139", 0 0, L_0x1e2cb50; 1 drivers +v0x1ded690_0 .net *"_s143", 0 0, L_0x1e2ce60; 1 drivers +v0x1ded770_0 .net *"_s147", 0 0, L_0x1e2cd20; 1 drivers +v0x1ded850_0 .net *"_s151", 0 0, L_0x1e2d050; 1 drivers +v0x1ded930_0 .net *"_s155", 0 0, L_0x1e2cf00; 1 drivers +v0x1deda10_0 .net *"_s159", 0 0, L_0x1e2cfa0; 1 drivers +v0x1dedaf0_0 .net *"_s160", 17 0, L_0x1e2d0f0; 1 drivers +v0x1dedbd0_0 .net *"_s162", 5 0, L_0x1e2d450; 1 drivers +L_0x2b89f59273c0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1dedcb0_0 .net *"_s165", 1 0, L_0x2b89f59273c0; 1 drivers +v0x1defc60_2 .array/port v0x1defc60, 2; +v0x1dedd90_0 .net *"_s173", 10 0, v0x1defc60_2; 1 drivers +v0x1defc60_3 .array/port v0x1defc60, 3; +v0x1dede70_0 .net *"_s179", 10 0, v0x1defc60_3; 1 drivers +v0x1defc60_0 .array/port v0x1defc60, 0; +v0x1dedf50_0 .net *"_s185", 10 0, v0x1defc60_0; 1 drivers +v0x1defc60_1 .array/port v0x1defc60, 1; +v0x1dee030_0 .net *"_s191", 10 0, v0x1defc60_1; 1 drivers +v0x1dee110_0 .net *"_s23", 0 0, L_0x1e2a900; 1 drivers +v0x1dee1f0_0 .net *"_s27", 0 0, L_0x1e2a9d0; 1 drivers +v0x1ded440_0 .net *"_s31", 0 0, L_0x1e2aaa0; 1 drivers +v0x1dee4c0_0 .net *"_s36", 0 0, L_0x1e2ad00; 1 drivers +v0x1dee5a0_0 .net *"_s42", 0 0, L_0x1e2af30; 1 drivers +v0x1dee680_0 .net *"_s46", 0 0, L_0x1e2afd0; 1 drivers +v0x1dee760_0 .net *"_s50", 0 0, L_0x1e2b0e0; 1 drivers +v0x1dee840_0 .net *"_s55", 0 0, L_0x1e2b2f0; 1 drivers +v0x1dee920_0 .net *"_s61", 0 0, L_0x1e2b560; 1 drivers +v0x1deea00_0 .net *"_s65", 0 0, L_0x1e2b600; 1 drivers +v0x1deeae0_0 .net *"_s69", 0 0, L_0x1e2b7d0; 1 drivers +v0x1deebc0_0 .net *"_s74", 0 0, L_0x1e2b730; 1 drivers +v0x1deeca0_0 .net *"_s80", 0 0, L_0x1e2b9b0; 1 drivers +v0x1deed80_0 .net *"_s84", 0 0, L_0x1e2bdb0; 1 drivers +v0x1deee60_0 .net *"_s88", 0 0, L_0x1e2bbe0; 1 drivers +v0x1deef40_0 .net *"_s93", 0 0, L_0x1e2be50; 1 drivers +v0x1def020_0 .net *"_s99", 0 0, L_0x1e2c120; 1 drivers +v0x1def100_0 .net/s "accOut", 10 0, L_0x1e2a000; 1 drivers +v0x1def1e0_0 .net "anyHasData", 0 0, L_0x1e2ae40; 1 drivers +v0x1def2a0_0 .net "anyReadAck", 0 0, L_0x1e2bb40; 1 drivers +v0x1def360_0 .net "anyWantData", 0 0, L_0x1e2b3e0; 1 drivers +v0x1def420_0 .net "anyWriteAck", 0 0, L_0x1e2c250; 1 drivers +v0x1def4e0_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +o0x2b89f58fc828 .functor BUFZ 15, C4; HiZ drive +v0x1def580_0 .net "down", 14 0, o0x2b89f58fc828; 0 drivers +v0x1def660_0 .net "downOut", 14 0, L_0x1e2d8e0; 1 drivers +v0x1def740_0 .net "instruction", 17 0, L_0x1e2b070; 1 drivers +v0x1def820 .array "instructions", 15 0, 17 0; +v0x1def8e0_0 .var "last", 2 0; +v0x1def9c0_0 .net "left", 14 0, L_0x1e29cb0; alias, 1 drivers +v0x1defaa0_0 .net "leftOut", 14 0, L_0x1e2d5b0; alias, 1 drivers +v0x1defb80_0 .var "mode", 2 0; +v0x1defc60 .array/s "outVals", 2 5, 10 0; +v0x1defda0_0 .var "phase", 2 0; +v0x1defe80_0 .net "portsHaveData", 5 2, L_0x1e2ab40; 1 drivers +v0x1dee290_0 .net "portsWantData", 5 2, L_0x1e2b180; 1 drivers +v0x1dee350_0 .net "readAckIn", 5 2, L_0x1e2b870; 1 drivers +v0x1df0330_0 .var "readAckOut", 5 2; +v0x1df03d0_0 .var "readTarget", 2 0; +v0x1df0470_0 .var/s "readValue", 10 0; +L_0x2b89f5927378 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1df0530 .array "regVals", 0 7; +v0x1df0530_0 .net/s v0x1df0530 0, 10 0, L_0x2b89f5927378; 1 drivers +v0x1df0530_1 .net/s v0x1df0530 1, 10 0, L_0x1e2a200; 1 drivers +v0x1df0530_2 .net/s v0x1df0530 2, 10 0, L_0x1e2a270; 1 drivers +v0x1df0530_3 .net/s v0x1df0530 3, 10 0, L_0x1e2a600; 1 drivers +v0x1df0530_4 .net/s v0x1df0530 4, 10 0, L_0x1e2a6a0; 1 drivers +v0x1df0530_5 .net/s v0x1df0530 5, 10 0, L_0x1e2a7d0; 1 drivers +o0x2b89f58fcca8 .functor BUFZ 11, C4; HiZ drive +v0x1df0530_6 .net/s v0x1df0530 6, 10 0, o0x2b89f58fcca8; 0 drivers +o0x2b89f58fccd8 .functor BUFZ 11, C4; HiZ drive +v0x1df0530_7 .net/s v0x1df0530 7, 10 0, o0x2b89f58fccd8; 0 drivers +o0x2b89f58fcd08 .functor BUFZ 15, C4; HiZ drive +v0x1df0740_0 .net "right", 14 0, o0x2b89f58fcd08; 0 drivers +v0x1df0820_0 .net "rightOut", 14 0, L_0x1e2df10; 1 drivers +v0x1df0900_0 .net "up", 14 0, L_0x1e256b0; alias, 1 drivers +v0x1df09f0_0 .net "upOut", 14 0, L_0x1e2d360; alias, 1 drivers +v0x1df0ac0_0 .var "weHaveData", 5 2; +v0x1df0b80_0 .var "weWantData", 5 2; +v0x1df0c60_0 .net "writeAckIn", 5 2, L_0x1e2c030; 1 drivers +v0x1df0d40_0 .var "writeAckOut", 5 2; +v0x1df0e20_0 .var "writeTarget", 2 0; +v0x1df0f00_0 .var/s "writeValue", 10 0; +L_0x1e2a270 .part L_0x1e29cb0, 0, 11; +L_0x1e2a600 .part o0x2b89f58fcd08, 0, 11; +L_0x1e2a6a0 .part L_0x1e256b0, 0, 11; +L_0x1e2a7d0 .part o0x2b89f58fc828, 0, 11; +L_0x1e2a900 .part L_0x1e29cb0, 11, 1; +L_0x1e2a9d0 .part o0x2b89f58fcd08, 11, 1; +L_0x1e2aaa0 .part L_0x1e256b0, 11, 1; +L_0x1e2ab40 .concat8 [ 1 1 1 1], L_0x1e2a900, L_0x1e2a9d0, L_0x1e2aaa0, L_0x1e2ad00; +L_0x1e2ad00 .part o0x2b89f58fc828, 11, 1; +L_0x1e2ae40 .reduce/or L_0x1e2ab40; +L_0x1e2af30 .part L_0x1e29cb0, 12, 1; +L_0x1e2afd0 .part o0x2b89f58fcd08, 12, 1; +L_0x1e2b0e0 .part L_0x1e256b0, 12, 1; +L_0x1e2b180 .concat8 [ 1 1 1 1], L_0x1e2af30, L_0x1e2afd0, L_0x1e2b0e0, L_0x1e2b2f0; +L_0x1e2b2f0 .part o0x2b89f58fc828, 12, 1; +L_0x1e2b3e0 .reduce/or L_0x1e2b180; +L_0x1e2b560 .part L_0x1e29cb0, 13, 1; +L_0x1e2b600 .part o0x2b89f58fcd08, 13, 1; +L_0x1e2b7d0 .part L_0x1e256b0, 13, 1; +L_0x1e2b870 .concat8 [ 1 1 1 1], L_0x1e2b560, L_0x1e2b600, L_0x1e2b7d0, L_0x1e2b730; +L_0x1e2b730 .part o0x2b89f58fc828, 13, 1; +L_0x1e2bb40 .reduce/or L_0x1e2b870; +L_0x1e2b9b0 .part L_0x1e29cb0, 14, 1; +L_0x1e2bdb0 .part o0x2b89f58fcd08, 14, 1; +L_0x1e2bbe0 .part L_0x1e256b0, 14, 1; +L_0x1e2c030 .concat8 [ 1 1 1 1], L_0x1e2b9b0, L_0x1e2bdb0, L_0x1e2bbe0, L_0x1e2be50; +L_0x1e2be50 .part o0x2b89f58fc828, 14, 1; +L_0x1e2c250 .reduce/or L_0x1e2c030; +L_0x1e2c120 .part v0x1df0330_0, 0, 1; +L_0x1e2c430 .part v0x1df0330_0, 1, 1; +L_0x1e2c340 .part v0x1df0330_0, 2, 1; +L_0x1e2c620 .part v0x1df0330_0, 3, 1; +L_0x1e2c520 .part v0x1df0d40_0, 0, 1; +L_0x1e2c860 .part v0x1df0d40_0, 1, 1; +L_0x1e2c750 .part v0x1df0d40_0, 2, 1; +L_0x1e2ca20 .part v0x1df0d40_0, 3, 1; +L_0x1e2c900 .part v0x1df0b80_0, 0, 1; +L_0x1e2cc80 .part v0x1df0b80_0, 1, 1; +L_0x1e2cb50 .part v0x1df0b80_0, 2, 1; +L_0x1e2ce60 .part v0x1df0b80_0, 3, 1; +L_0x1e2cd20 .part v0x1df0ac0_0, 0, 1; +L_0x1e2d050 .part v0x1df0ac0_0, 1, 1; +L_0x1e2cf00 .part v0x1df0ac0_0, 2, 1; +L_0x1e2cfa0 .part v0x1df0ac0_0, 3, 1; +L_0x1e2d0f0 .array/port v0x1def820, L_0x1e2d450; +L_0x1e2d450 .concat [ 4 2 0 0], v0x1deca10_0, L_0x2b89f59273c0; +LS_0x1e2d360_0_0 .concat8 [ 11 1 1 1], v0x1defc60_2, L_0x1e2cf00, L_0x1e2cb50, L_0x1e2c750; +LS_0x1e2d360_0_4 .concat8 [ 1 0 0 0], L_0x1e2c340; +L_0x1e2d360 .concat8 [ 14 1 0 0], LS_0x1e2d360_0_0, LS_0x1e2d360_0_4; +LS_0x1e2d8e0_0_0 .concat8 [ 11 1 1 1], v0x1defc60_3, L_0x1e2cfa0, L_0x1e2ce60, L_0x1e2ca20; +LS_0x1e2d8e0_0_4 .concat8 [ 1 0 0 0], L_0x1e2c620; +L_0x1e2d8e0 .concat8 [ 14 1 0 0], LS_0x1e2d8e0_0_0, LS_0x1e2d8e0_0_4; +LS_0x1e2d5b0_0_0 .concat8 [ 11 1 1 1], v0x1defc60_0, L_0x1e2cd20, L_0x1e2c900, L_0x1e2c520; +LS_0x1e2d5b0_0_4 .concat8 [ 1 0 0 0], L_0x1e2c120; +L_0x1e2d5b0 .concat8 [ 14 1 0 0], LS_0x1e2d5b0_0_0, LS_0x1e2d5b0_0_4; +LS_0x1e2df10_0_0 .concat8 [ 11 1 1 1], v0x1defc60_1, L_0x1e2d050, L_0x1e2cc80, L_0x1e2c860; +LS_0x1e2df10_0_4 .concat8 [ 1 0 0 0], L_0x1e2c430; +L_0x1e2df10 .concat8 [ 14 1 0 0], LS_0x1e2df10_0_0, LS_0x1e2df10_0_4; +L_0x1e2db80 .part L_0x1e2b070, 14, 4; +L_0x1e2e2e0 .part L_0x1e2b070, 11, 3; +L_0x1e2e0f0 .part L_0x1e2b070, 8, 3; +L_0x1e2e530 .part L_0x1e2b070, 10, 4; +L_0x1e2e380 .part L_0x1e2b070, 0, 11; +S_0x1df1180 .scope module, "six" "tis100" 3 54, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1df1350 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1df1390 .param/str "memFile" 0 4 60, "demo/six.dat"; +L_0x1e25ff0 .functor BUFZ 11, v0x1df1670_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e261f0 .functor BUFZ 11, v0x1df1670_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e27060 .functor BUFZ 18, L_0x1e28fc0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1df1670_0 .var/s "ACC", 10 0; +v0x1df1770_0 .var/s "BAK", 10 0; +v0x1df1850_0 .net "DST", 2 0, L_0x1e2a0c0; 1 drivers +v0x1df1910_0 .net/s "IMM", 10 0, L_0x1e2a160; 1 drivers +v0x1df19f0_0 .net "INST", 3 0, L_0x1e299e0; 1 drivers +v0x1df1b20_0 .net "LABEL", 3 0, L_0x1e2a310; 1 drivers +v0x1df1c00_0 .var "PC", 3 0; +v0x1df1ce0_0 .var "PCNEXT", 3 0; +v0x1df1dc0_0 .net "SRC", 2 0, L_0x1e29ed0; 1 drivers +v0x1df1f30_0 .net *"_s103", 0 0, L_0x1e28300; 1 drivers +v0x1df2010_0 .net *"_s107", 0 0, L_0x1e28210; 1 drivers +v0x1df20f0_0 .net *"_s111", 0 0, L_0x1e284f0; 1 drivers +v0x1df21d0_0 .net *"_s115", 0 0, L_0x1e283f0; 1 drivers +v0x1df22b0_0 .net *"_s119", 0 0, L_0x1e28730; 1 drivers +v0x1df2390_0 .net *"_s123", 0 0, L_0x1e28620; 1 drivers +v0x1df2470_0 .net *"_s127", 0 0, L_0x1e288f0; 1 drivers +v0x1df2550_0 .net *"_s131", 0 0, L_0x1e287d0; 1 drivers +v0x1df2700_0 .net *"_s135", 0 0, L_0x1e28b50; 1 drivers +v0x1df27a0_0 .net *"_s139", 0 0, L_0x1e28a20; 1 drivers +v0x1df2880_0 .net *"_s143", 0 0, L_0x1e28d30; 1 drivers +v0x1df2960_0 .net *"_s147", 0 0, L_0x1e28bf0; 1 drivers +v0x1df2a40_0 .net *"_s151", 0 0, L_0x1e28f20; 1 drivers +v0x1df2b20_0 .net *"_s155", 0 0, L_0x1e28dd0; 1 drivers +v0x1df2c00_0 .net *"_s159", 0 0, L_0x1e28e70; 1 drivers +v0x1df2ce0_0 .net *"_s160", 17 0, L_0x1e28fc0; 1 drivers +v0x1df2dc0_0 .net *"_s162", 5 0, L_0x1e29320; 1 drivers +L_0x2b89f5927330 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1df2ea0_0 .net *"_s165", 1 0, L_0x2b89f5927330; 1 drivers +v0x1df4dd0_2 .array/port v0x1df4dd0, 2; +v0x1df2f80_0 .net *"_s173", 10 0, v0x1df4dd0_2; 1 drivers +v0x1df4dd0_3 .array/port v0x1df4dd0, 3; +v0x1df3060_0 .net *"_s179", 10 0, v0x1df4dd0_3; 1 drivers +v0x1df4dd0_0 .array/port v0x1df4dd0, 0; +v0x1df3140_0 .net *"_s185", 10 0, v0x1df4dd0_0; 1 drivers +v0x1df4dd0_1 .array/port v0x1df4dd0, 1; +v0x1df3220_0 .net *"_s191", 10 0, v0x1df4dd0_1; 1 drivers +v0x1df3300_0 .net *"_s23", 0 0, L_0x1e26800; 1 drivers +v0x1df33e0_0 .net *"_s27", 0 0, L_0x1e26920; 1 drivers +v0x1df2630_0 .net *"_s31", 0 0, L_0x1e26a50; 1 drivers +v0x1df36b0_0 .net *"_s36", 0 0, L_0x1e26d00; 1 drivers +v0x1df3790_0 .net *"_s42", 0 0, L_0x1e26f20; 1 drivers +v0x1df3870_0 .net *"_s46", 0 0, L_0x1e26fc0; 1 drivers +v0x1df3950_0 .net *"_s50", 0 0, L_0x1e270d0; 1 drivers +v0x1df3a30_0 .net *"_s55", 0 0, L_0x1e27310; 1 drivers +v0x1df3b10_0 .net *"_s61", 0 0, L_0x1e27580; 1 drivers +v0x1df3bf0_0 .net *"_s65", 0 0, L_0x1e276b0; 1 drivers +v0x1df3cd0_0 .net *"_s69", 0 0, L_0x1e277f0; 1 drivers +v0x1df3db0_0 .net *"_s74", 0 0, L_0x1e27750; 1 drivers +v0x1df3e90_0 .net *"_s80", 0 0, L_0x1e279e0; 1 drivers +v0x1df3f70_0 .net *"_s84", 0 0, L_0x1e27c90; 1 drivers +v0x1df4050_0 .net *"_s88", 0 0, L_0x1e27bd0; 1 drivers +v0x1df4130_0 .net *"_s93", 0 0, L_0x1e27d30; 1 drivers +v0x1df4210_0 .net *"_s99", 0 0, L_0x1e27ff0; 1 drivers +v0x1df42f0_0 .net/s "accOut", 10 0, L_0x1e25ff0; 1 drivers +v0x1df43d0_0 .net "anyHasData", 0 0, L_0x1e26e80; 1 drivers +v0x1df4490_0 .net "anyReadAck", 0 0, L_0x1e27ae0; 1 drivers +v0x1df4550_0 .net "anyWantData", 0 0, L_0x1e27400; 1 drivers +v0x1df4610_0 .net "anyWriteAck", 0 0, L_0x1e28120; 1 drivers +v0x1df46d0_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +v0x1df4770_0 .net "down", 14 0, L_0x1e34ea0; alias, 1 drivers +v0x1df4830_0 .net "downOut", 14 0, L_0x1e29740; alias, 1 drivers +v0x1df48d0_0 .net "instruction", 17 0, L_0x1e27060; 1 drivers +v0x1df4990 .array "instructions", 15 0, 17 0; +v0x1df4a50_0 .var "last", 2 0; +o0x2b89f58fdab8 .functor BUFZ 15, C4; HiZ drive +v0x1df4b30_0 .net "left", 14 0, o0x2b89f58fdab8; 0 drivers +v0x1df4c10_0 .net "leftOut", 14 0, L_0x1e29480; 1 drivers +v0x1df4cf0_0 .var "mode", 2 0; +v0x1df4dd0 .array/s "outVals", 2 5, 10 0; +v0x1df4f40_0 .var "phase", 2 0; +v0x1df5020_0 .net "portsHaveData", 5 2, L_0x1e26af0; 1 drivers +v0x1df3480_0 .net "portsWantData", 5 2, L_0x1e27170; 1 drivers +v0x1df3560_0 .net "readAckIn", 5 2, L_0x1e27890; 1 drivers +v0x1df54d0_0 .var "readAckOut", 5 2; +v0x1df5570_0 .var "readTarget", 2 0; +v0x1df5610_0 .var/s "readValue", 10 0; +L_0x2b89f59272e8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1df56f0 .array "regVals", 0 7; +v0x1df56f0_0 .net/s v0x1df56f0 0, 10 0, L_0x2b89f59272e8; 1 drivers +v0x1df56f0_1 .net/s v0x1df56f0 1, 10 0, L_0x1e261f0; 1 drivers +v0x1df56f0_2 .net/s v0x1df56f0 2, 10 0, L_0x1e26260; 1 drivers +v0x1df56f0_3 .net/s v0x1df56f0 3, 10 0, L_0x1e26560; 1 drivers +v0x1df56f0_4 .net/s v0x1df56f0 4, 10 0, L_0x1e26600; 1 drivers +v0x1df56f0_5 .net/s v0x1df56f0 5, 10 0, L_0x1e26700; 1 drivers +o0x2b89f58fde78 .functor BUFZ 11, C4; HiZ drive +v0x1df56f0_6 .net/s v0x1df56f0 6, 10 0, o0x2b89f58fde78; 0 drivers +o0x2b89f58fdea8 .functor BUFZ 11, C4; HiZ drive +v0x1df56f0_7 .net/s v0x1df56f0 7, 10 0, o0x2b89f58fdea8; 0 drivers +v0x1df5900_0 .net "right", 14 0, L_0x1e2d5b0; alias, 1 drivers +v0x1df59f0_0 .net "rightOut", 14 0, L_0x1e29cb0; alias, 1 drivers +o0x2b89f58fded8 .functor BUFZ 15, C4; HiZ drive +v0x1df5ac0_0 .net "up", 14 0, o0x2b89f58fded8; 0 drivers +v0x1df5b80_0 .net "upOut", 14 0, L_0x1e29230; 1 drivers +v0x1df5c60_0 .var "weHaveData", 5 2; +v0x1df5d40_0 .var "weWantData", 5 2; +v0x1df5e20_0 .net "writeAckIn", 5 2, L_0x1e27e00; 1 drivers +v0x1df5f00_0 .var "writeAckOut", 5 2; +v0x1df5fe0_0 .var "writeTarget", 2 0; +v0x1df60c0_0 .var/s "writeValue", 10 0; +L_0x1e26260 .part o0x2b89f58fdab8, 0, 11; +L_0x1e26560 .part L_0x1e2d5b0, 0, 11; +L_0x1e26600 .part o0x2b89f58fded8, 0, 11; +L_0x1e26700 .part L_0x1e34ea0, 0, 11; +L_0x1e26800 .part o0x2b89f58fdab8, 11, 1; +L_0x1e26920 .part L_0x1e2d5b0, 11, 1; +L_0x1e26a50 .part o0x2b89f58fded8, 11, 1; +L_0x1e26af0 .concat8 [ 1 1 1 1], L_0x1e26800, L_0x1e26920, L_0x1e26a50, L_0x1e26d00; +L_0x1e26d00 .part L_0x1e34ea0, 11, 1; +L_0x1e26e80 .reduce/or L_0x1e26af0; +L_0x1e26f20 .part o0x2b89f58fdab8, 12, 1; +L_0x1e26fc0 .part L_0x1e2d5b0, 12, 1; +L_0x1e270d0 .part o0x2b89f58fded8, 12, 1; +L_0x1e27170 .concat8 [ 1 1 1 1], L_0x1e26f20, L_0x1e26fc0, L_0x1e270d0, L_0x1e27310; +L_0x1e27310 .part L_0x1e34ea0, 12, 1; +L_0x1e27400 .reduce/or L_0x1e27170; +L_0x1e27580 .part o0x2b89f58fdab8, 13, 1; +L_0x1e276b0 .part L_0x1e2d5b0, 13, 1; +L_0x1e277f0 .part o0x2b89f58fded8, 13, 1; +L_0x1e27890 .concat8 [ 1 1 1 1], L_0x1e27580, L_0x1e276b0, L_0x1e277f0, L_0x1e27750; +L_0x1e27750 .part L_0x1e34ea0, 13, 1; +L_0x1e27ae0 .reduce/or L_0x1e27890; +L_0x1e279e0 .part o0x2b89f58fdab8, 14, 1; +L_0x1e27c90 .part L_0x1e2d5b0, 14, 1; +L_0x1e27bd0 .part o0x2b89f58fded8, 14, 1; +L_0x1e27e00 .concat8 [ 1 1 1 1], L_0x1e279e0, L_0x1e27c90, L_0x1e27bd0, L_0x1e27d30; +L_0x1e27d30 .part L_0x1e34ea0, 14, 1; +L_0x1e28120 .reduce/or L_0x1e27e00; +L_0x1e27ff0 .part v0x1df54d0_0, 0, 1; +L_0x1e28300 .part v0x1df54d0_0, 1, 1; +L_0x1e28210 .part v0x1df54d0_0, 2, 1; +L_0x1e284f0 .part v0x1df54d0_0, 3, 1; +L_0x1e283f0 .part v0x1df5f00_0, 0, 1; +L_0x1e28730 .part v0x1df5f00_0, 1, 1; +L_0x1e28620 .part v0x1df5f00_0, 2, 1; +L_0x1e288f0 .part v0x1df5f00_0, 3, 1; +L_0x1e287d0 .part v0x1df5d40_0, 0, 1; +L_0x1e28b50 .part v0x1df5d40_0, 1, 1; +L_0x1e28a20 .part v0x1df5d40_0, 2, 1; +L_0x1e28d30 .part v0x1df5d40_0, 3, 1; +L_0x1e28bf0 .part v0x1df5c60_0, 0, 1; +L_0x1e28f20 .part v0x1df5c60_0, 1, 1; +L_0x1e28dd0 .part v0x1df5c60_0, 2, 1; +L_0x1e28e70 .part v0x1df5c60_0, 3, 1; +L_0x1e28fc0 .array/port v0x1df4990, L_0x1e29320; +L_0x1e29320 .concat [ 4 2 0 0], v0x1df1c00_0, L_0x2b89f5927330; +LS_0x1e29230_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_2, L_0x1e28dd0, L_0x1e28a20, L_0x1e28620; +LS_0x1e29230_0_4 .concat8 [ 1 0 0 0], L_0x1e28210; +L_0x1e29230 .concat8 [ 14 1 0 0], LS_0x1e29230_0_0, LS_0x1e29230_0_4; +LS_0x1e29740_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_3, L_0x1e28e70, L_0x1e28d30, L_0x1e288f0; +LS_0x1e29740_0_4 .concat8 [ 1 0 0 0], L_0x1e284f0; +L_0x1e29740 .concat8 [ 14 1 0 0], LS_0x1e29740_0_0, LS_0x1e29740_0_4; +LS_0x1e29480_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_0, L_0x1e28bf0, L_0x1e287d0, L_0x1e283f0; +LS_0x1e29480_0_4 .concat8 [ 1 0 0 0], L_0x1e27ff0; +L_0x1e29480 .concat8 [ 14 1 0 0], LS_0x1e29480_0_0, LS_0x1e29480_0_4; +LS_0x1e29cb0_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_1, L_0x1e28f20, L_0x1e28b50, L_0x1e28730; +LS_0x1e29cb0_0_4 .concat8 [ 1 0 0 0], L_0x1e28300; +L_0x1e29cb0 .concat8 [ 14 1 0 0], LS_0x1e29cb0_0_0, LS_0x1e29cb0_0_4; +L_0x1e299e0 .part L_0x1e27060, 14, 4; +L_0x1e2a0c0 .part L_0x1e27060, 11, 3; +L_0x1e29ed0 .part L_0x1e27060, 8, 3; +L_0x1e2a310 .part L_0x1e27060, 10, 4; +L_0x1e2a160 .part L_0x1e27060, 0, 11; +S_0x1df6340 .scope module, "three" "tis100" 3 41, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1df6510 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1df6550 .param/str "memFile" 0 4 60, "demo/three.dat"; +L_0x1e19b40 .functor BUFZ 11, v0x1df6830_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e19d40 .functor BUFZ 11, v0x1df6830_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e1ac20 .functor BUFZ 18, L_0x1e1cbe0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1df6830_0 .var/s "ACC", 10 0; +v0x1df6930_0 .var/s "BAK", 10 0; +v0x1df6a10_0 .net "DST", 2 0, L_0x1e1dd50; 1 drivers +v0x1df6ad0_0 .net/s "IMM", 10 0, L_0x1e1ddf0; 1 drivers +v0x1df6bb0_0 .net "INST", 3 0, L_0x1e1d670; 1 drivers +v0x1df6ce0_0 .net "LABEL", 3 0, L_0x1e1dfa0; 1 drivers +v0x1df6dc0_0 .var "PC", 3 0; +v0x1df6ea0_0 .var "PCNEXT", 3 0; +v0x1df6f80_0 .net "SRC", 2 0, L_0x1e1db60; 1 drivers +v0x1df70f0_0 .net *"_s103", 0 0, L_0x1e1bf20; 1 drivers +v0x1df71d0_0 .net *"_s107", 0 0, L_0x1e1be30; 1 drivers +v0x1df72b0_0 .net *"_s111", 0 0, L_0x1e1c110; 1 drivers +v0x1df7390_0 .net *"_s115", 0 0, L_0x1e1c010; 1 drivers +v0x1df7470_0 .net *"_s119", 0 0, L_0x1e1c350; 1 drivers +v0x1df7550_0 .net *"_s123", 0 0, L_0x1e1c240; 1 drivers +v0x1df7630_0 .net *"_s127", 0 0, L_0x1e1c510; 1 drivers +v0x1df7710_0 .net *"_s131", 0 0, L_0x1e1c3f0; 1 drivers +v0x1df78c0_0 .net *"_s135", 0 0, L_0x1e1c770; 1 drivers +v0x1df7960_0 .net *"_s139", 0 0, L_0x1e1c640; 1 drivers +v0x1df7a40_0 .net *"_s143", 0 0, L_0x1e1c950; 1 drivers +v0x1df7b20_0 .net *"_s147", 0 0, L_0x1e1c810; 1 drivers +v0x1df7c00_0 .net *"_s151", 0 0, L_0x1e1cb40; 1 drivers +v0x1df7ce0_0 .net *"_s155", 0 0, L_0x1e1c9f0; 1 drivers +v0x1df7dc0_0 .net *"_s159", 0 0, L_0x1e1ca90; 1 drivers +v0x1df7ea0_0 .net *"_s160", 17 0, L_0x1e1cbe0; 1 drivers +v0x1df7f80_0 .net *"_s162", 5 0, L_0x1e1cf40; 1 drivers +L_0x2b89f5927180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1df8060_0 .net *"_s165", 1 0, L_0x2b89f5927180; 1 drivers +v0x1dfa010_2 .array/port v0x1dfa010, 2; +v0x1df8140_0 .net *"_s173", 10 0, v0x1dfa010_2; 1 drivers +v0x1dfa010_3 .array/port v0x1dfa010, 3; +v0x1df8220_0 .net *"_s179", 10 0, v0x1dfa010_3; 1 drivers +v0x1dfa010_0 .array/port v0x1dfa010, 0; +v0x1df8300_0 .net *"_s185", 10 0, v0x1dfa010_0; 1 drivers +v0x1dfa010_1 .array/port v0x1dfa010, 1; +v0x1df83e0_0 .net *"_s191", 10 0, v0x1dfa010_1; 1 drivers +v0x1df84c0_0 .net *"_s23", 0 0, L_0x1e1a420; 1 drivers +v0x1df85a0_0 .net *"_s27", 0 0, L_0x1e1a4f0; 1 drivers +v0x1df77f0_0 .net *"_s31", 0 0, L_0x1e1a620; 1 drivers +v0x1df8870_0 .net *"_s36", 0 0, L_0x1e1a8b0; 1 drivers +v0x1df8950_0 .net *"_s42", 0 0, L_0x1e1aae0; 1 drivers +v0x1df8a30_0 .net *"_s46", 0 0, L_0x1e1ab80; 1 drivers +v0x1df8b10_0 .net *"_s50", 0 0, L_0x1e1ac90; 1 drivers +v0x1df8bf0_0 .net *"_s55", 0 0, L_0x1e1aea0; 1 drivers +v0x1df8cd0_0 .net *"_s61", 0 0, L_0x1e1b110; 1 drivers +v0x1df8db0_0 .net *"_s65", 0 0, L_0x1e1b240; 1 drivers +v0x1df8e90_0 .net *"_s69", 0 0, L_0x1e1b380; 1 drivers +v0x1df8f70_0 .net *"_s74", 0 0, L_0x1e1b2e0; 1 drivers +v0x1df9050_0 .net *"_s80", 0 0, L_0x1e1b560; 1 drivers +v0x1df9130_0 .net *"_s84", 0 0, L_0x1e1b850; 1 drivers +v0x1df9210_0 .net *"_s88", 0 0, L_0x1e1b790; 1 drivers +v0x1df92f0_0 .net *"_s93", 0 0, L_0x1e1b8f0; 1 drivers +v0x1df93d0_0 .net *"_s99", 0 0, L_0x1e1bc10; 1 drivers +v0x1df94b0_0 .net/s "accOut", 10 0, L_0x1e19b40; 1 drivers +v0x1df9590_0 .net "anyHasData", 0 0, L_0x1e1a9f0; 1 drivers +v0x1df9650_0 .net "anyReadAck", 0 0, L_0x1e1b6f0; 1 drivers +v0x1df9710_0 .net "anyWantData", 0 0, L_0x1e1af90; 1 drivers +v0x1df97d0_0 .net "anyWriteAck", 0 0, L_0x1e1bd40; 1 drivers +v0x1df9890_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +o0x2b89f58fec28 .functor BUFZ 15, C4; HiZ drive +v0x1df9930_0 .net "down", 14 0, o0x2b89f58fec28; 0 drivers +v0x1df9a10_0 .net "downOut", 14 0, L_0x1e1d3d0; 1 drivers +v0x1df9af0_0 .net "instruction", 17 0, L_0x1e1ac20; 1 drivers +v0x1df9bd0 .array "instructions", 15 0, 17 0; +v0x1df9c90_0 .var "last", 2 0; +o0x2b89f58fece8 .functor BUFZ 15, C4; HiZ drive +v0x1df9d70_0 .net "left", 14 0, o0x2b89f58fece8; 0 drivers +v0x1df9e50_0 .net "leftOut", 14 0, L_0x1e1d0a0; 1 drivers +v0x1df9f30_0 .var "mode", 2 0; +v0x1dfa010 .array/s "outVals", 2 5, 10 0; +v0x1dfa150_0 .var "phase", 2 0; +v0x1dfa230_0 .net "portsHaveData", 5 2, L_0x1e1a6c0; 1 drivers +v0x1df8640_0 .net "portsWantData", 5 2, L_0x1e1ad30; 1 drivers +v0x1df8700_0 .net "readAckIn", 5 2, L_0x1e1b420; 1 drivers +v0x1dfa6e0_0 .var "readAckOut", 5 2; +v0x1dfa780_0 .var "readTarget", 2 0; +v0x1dfa820_0 .var/s "readValue", 10 0; +L_0x2b89f5927138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1dfa8e0 .array "regVals", 0 7; +v0x1dfa8e0_0 .net/s v0x1dfa8e0 0, 10 0, L_0x2b89f5927138; 1 drivers +v0x1dfa8e0_1 .net/s v0x1dfa8e0 1, 10 0, L_0x1e19d40; 1 drivers +v0x1dfa8e0_2 .net/s v0x1dfa8e0 2, 10 0, L_0x1e1a0b0; 1 drivers +v0x1dfa8e0_3 .net/s v0x1dfa8e0 3, 10 0, L_0x1e1a150; 1 drivers +v0x1dfa8e0_4 .net/s v0x1dfa8e0 4, 10 0, L_0x1e1a1f0; 1 drivers +v0x1dfa8e0_5 .net/s v0x1dfa8e0 5, 10 0, L_0x1e1a320; 1 drivers +o0x2b89f58ff0a8 .functor BUFZ 11, C4; HiZ drive +v0x1dfa8e0_6 .net/s v0x1dfa8e0 6, 10 0, o0x2b89f58ff0a8; 0 drivers +o0x2b89f58ff0d8 .functor BUFZ 11, C4; HiZ drive +v0x1dfa8e0_7 .net/s v0x1dfa8e0 7, 10 0, o0x2b89f58ff0d8; 0 drivers +v0x1dfaaf0_0 .net "right", 14 0, L_0x1e211d0; alias, 1 drivers +v0x1dfabe0_0 .net "rightOut", 14 0, L_0x1e1d940; alias, 1 drivers +v0x1dfacb0_0 .net "up", 14 0, L_0x1e151a0; alias, 1 drivers +v0x1dfad80_0 .net "upOut", 14 0, L_0x1e1ce50; alias, 1 drivers +v0x1dfae50_0 .var "weHaveData", 5 2; +v0x1dfaf10_0 .var "weWantData", 5 2; +v0x1dfaff0_0 .net "writeAckIn", 5 2, L_0x1e1bad0; 1 drivers +v0x1dfb0d0_0 .var "writeAckOut", 5 2; +v0x1dfb1b0_0 .var "writeTarget", 2 0; +v0x1dfb290_0 .var/s "writeValue", 10 0; +L_0x1e1a0b0 .part o0x2b89f58fece8, 0, 11; +L_0x1e1a150 .part L_0x1e211d0, 0, 11; +L_0x1e1a1f0 .part L_0x1e151a0, 0, 11; +L_0x1e1a320 .part o0x2b89f58fec28, 0, 11; +L_0x1e1a420 .part o0x2b89f58fece8, 11, 1; +L_0x1e1a4f0 .part L_0x1e211d0, 11, 1; +L_0x1e1a620 .part L_0x1e151a0, 11, 1; +L_0x1e1a6c0 .concat8 [ 1 1 1 1], L_0x1e1a420, L_0x1e1a4f0, L_0x1e1a620, L_0x1e1a8b0; +L_0x1e1a8b0 .part o0x2b89f58fec28, 11, 1; +L_0x1e1a9f0 .reduce/or L_0x1e1a6c0; +L_0x1e1aae0 .part o0x2b89f58fece8, 12, 1; +L_0x1e1ab80 .part L_0x1e211d0, 12, 1; +L_0x1e1ac90 .part L_0x1e151a0, 12, 1; +L_0x1e1ad30 .concat8 [ 1 1 1 1], L_0x1e1aae0, L_0x1e1ab80, L_0x1e1ac90, L_0x1e1aea0; +L_0x1e1aea0 .part o0x2b89f58fec28, 12, 1; +L_0x1e1af90 .reduce/or L_0x1e1ad30; +L_0x1e1b110 .part o0x2b89f58fece8, 13, 1; +L_0x1e1b240 .part L_0x1e211d0, 13, 1; +L_0x1e1b380 .part L_0x1e151a0, 13, 1; +L_0x1e1b420 .concat8 [ 1 1 1 1], L_0x1e1b110, L_0x1e1b240, L_0x1e1b380, L_0x1e1b2e0; +L_0x1e1b2e0 .part o0x2b89f58fec28, 13, 1; +L_0x1e1b6f0 .reduce/or L_0x1e1b420; +L_0x1e1b560 .part o0x2b89f58fece8, 14, 1; +L_0x1e1b850 .part L_0x1e211d0, 14, 1; +L_0x1e1b790 .part L_0x1e151a0, 14, 1; +L_0x1e1bad0 .concat8 [ 1 1 1 1], L_0x1e1b560, L_0x1e1b850, L_0x1e1b790, L_0x1e1b8f0; +L_0x1e1b8f0 .part o0x2b89f58fec28, 14, 1; +L_0x1e1bd40 .reduce/or L_0x1e1bad0; +L_0x1e1bc10 .part v0x1dfa6e0_0, 0, 1; +L_0x1e1bf20 .part v0x1dfa6e0_0, 1, 1; +L_0x1e1be30 .part v0x1dfa6e0_0, 2, 1; +L_0x1e1c110 .part v0x1dfa6e0_0, 3, 1; +L_0x1e1c010 .part v0x1dfb0d0_0, 0, 1; +L_0x1e1c350 .part v0x1dfb0d0_0, 1, 1; +L_0x1e1c240 .part v0x1dfb0d0_0, 2, 1; +L_0x1e1c510 .part v0x1dfb0d0_0, 3, 1; +L_0x1e1c3f0 .part v0x1dfaf10_0, 0, 1; +L_0x1e1c770 .part v0x1dfaf10_0, 1, 1; +L_0x1e1c640 .part v0x1dfaf10_0, 2, 1; +L_0x1e1c950 .part v0x1dfaf10_0, 3, 1; +L_0x1e1c810 .part v0x1dfae50_0, 0, 1; +L_0x1e1cb40 .part v0x1dfae50_0, 1, 1; +L_0x1e1c9f0 .part v0x1dfae50_0, 2, 1; +L_0x1e1ca90 .part v0x1dfae50_0, 3, 1; +L_0x1e1cbe0 .array/port v0x1df9bd0, L_0x1e1cf40; +L_0x1e1cf40 .concat [ 4 2 0 0], v0x1df6dc0_0, L_0x2b89f5927180; +LS_0x1e1ce50_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_2, L_0x1e1c9f0, L_0x1e1c640, L_0x1e1c240; +LS_0x1e1ce50_0_4 .concat8 [ 1 0 0 0], L_0x1e1be30; +L_0x1e1ce50 .concat8 [ 14 1 0 0], LS_0x1e1ce50_0_0, LS_0x1e1ce50_0_4; +LS_0x1e1d3d0_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_3, L_0x1e1ca90, L_0x1e1c950, L_0x1e1c510; +LS_0x1e1d3d0_0_4 .concat8 [ 1 0 0 0], L_0x1e1c110; +L_0x1e1d3d0 .concat8 [ 14 1 0 0], LS_0x1e1d3d0_0_0, LS_0x1e1d3d0_0_4; +LS_0x1e1d0a0_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_0, L_0x1e1c810, L_0x1e1c3f0, L_0x1e1c010; +LS_0x1e1d0a0_0_4 .concat8 [ 1 0 0 0], L_0x1e1bc10; +L_0x1e1d0a0 .concat8 [ 14 1 0 0], LS_0x1e1d0a0_0_0, LS_0x1e1d0a0_0_4; +LS_0x1e1d940_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_1, L_0x1e1cb40, L_0x1e1c770, L_0x1e1c350; +LS_0x1e1d940_0_4 .concat8 [ 1 0 0 0], L_0x1e1bf20; +L_0x1e1d940 .concat8 [ 14 1 0 0], LS_0x1e1d940_0_0, LS_0x1e1d940_0_4; +L_0x1e1d670 .part L_0x1e1ac20, 14, 4; +L_0x1e1dd50 .part L_0x1e1ac20, 11, 3; +L_0x1e1db60 .part L_0x1e1ac20, 8, 3; +L_0x1e1dfa0 .part L_0x1e1ac20, 10, 4; +L_0x1e1ddf0 .part L_0x1e1ac20, 0, 11; +S_0x1dfb510 .scope module, "two" "tis100" 3 38, 4 49 0, S_0x1cc1e10; + .timescale 0 0; + .port_info 0 /INPUT 1 "clk" + .port_info 1 /INPUT 15 "up" + .port_info 2 /INPUT 15 "down" + .port_info 3 /INPUT 15 "left" + .port_info 4 /INPUT 15 "right" + .port_info 5 /OUTPUT 15 "upOut" + .port_info 6 /OUTPUT 15 "downOut" + .port_info 7 /OUTPUT 15 "leftOut" + .port_info 8 /OUTPUT 15 "rightOut" + .port_info 9 /OUTPUT 11 "accOut" +P_0x1dfb770 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x1dfb7b0 .param/str "memFile" 0 4 60, "demo/two.dat"; +L_0x1e15ae0 .functor BUFZ 11, v0x1dfba40_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e15ce0 .functor BUFZ 11, v0x1dfba40_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1e16b60 .functor BUFZ 18, L_0x1e18b00, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1dfba40_0 .var/s "ACC", 10 0; +v0x1dfbb40_0 .var/s "BAK", 10 0; +v0x1dfbc20_0 .net "DST", 2 0, L_0x1e19c00; 1 drivers +v0x1dfbce0_0 .net/s "IMM", 10 0, L_0x1e19ca0; 1 drivers +v0x1dfbdc0_0 .net "INST", 3 0, L_0x1e19520; 1 drivers +v0x1dfbef0_0 .net "LABEL", 3 0, L_0x1e19e50; 1 drivers +v0x1dfbfd0_0 .var "PC", 3 0; +v0x1dfc0b0_0 .var "PCNEXT", 3 0; +v0x1dfc190_0 .net "SRC", 2 0, L_0x1e19a10; 1 drivers +v0x1dfc300_0 .net *"_s103", 0 0, L_0x1e17e40; 1 drivers +v0x1dfc3e0_0 .net *"_s107", 0 0, L_0x1e17d50; 1 drivers +v0x1dfc4c0_0 .net *"_s111", 0 0, L_0x1e18030; 1 drivers +v0x1dfc5a0_0 .net *"_s115", 0 0, L_0x1e17f30; 1 drivers +v0x1dfc680_0 .net *"_s119", 0 0, L_0x1e18270; 1 drivers +v0x1dfc760_0 .net *"_s123", 0 0, L_0x1e18160; 1 drivers +v0x1dfc840_0 .net *"_s127", 0 0, L_0x1e18430; 1 drivers +v0x1dfc920_0 .net *"_s131", 0 0, L_0x1e18310; 1 drivers +v0x1dfcad0_0 .net *"_s135", 0 0, L_0x1e18690; 1 drivers +v0x1dfcb70_0 .net *"_s139", 0 0, L_0x1e18560; 1 drivers +v0x1dfcc50_0 .net *"_s143", 0 0, L_0x1e18870; 1 drivers +v0x1dfcd30_0 .net *"_s147", 0 0, L_0x1e18730; 1 drivers +v0x1dfce10_0 .net *"_s151", 0 0, L_0x1e18a60; 1 drivers +v0x1dfcef0_0 .net *"_s155", 0 0, L_0x1e18910; 1 drivers +v0x1dfcfd0_0 .net *"_s159", 0 0, L_0x1e189b0; 1 drivers +v0x1dfd0b0_0 .net *"_s160", 17 0, L_0x1e18b00; 1 drivers +v0x1dfd190_0 .net *"_s162", 5 0, L_0x1e18e60; 1 drivers +L_0x2b89f59270f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1dfd270_0 .net *"_s165", 1 0, L_0x2b89f59270f0; 1 drivers +v0x1dff230_2 .array/port v0x1dff230, 2; +v0x1dfd350_0 .net *"_s173", 10 0, v0x1dff230_2; 1 drivers +v0x1dff230_3 .array/port v0x1dff230, 3; +v0x1dfd430_0 .net *"_s179", 10 0, v0x1dff230_3; 1 drivers +v0x1dff230_0 .array/port v0x1dff230, 0; +v0x1dfd510_0 .net *"_s185", 10 0, v0x1dff230_0; 1 drivers +v0x1dff230_1 .array/port v0x1dff230, 1; +v0x1dfd5f0_0 .net *"_s191", 10 0, v0x1dff230_1; 1 drivers +v0x1dfd6d0_0 .net *"_s23", 0 0, L_0x1e16320; 1 drivers +v0x1dfd7b0_0 .net *"_s27", 0 0, L_0x1e16440; 1 drivers +v0x1dfca00_0 .net *"_s31", 0 0, L_0x1e16530; 1 drivers +v0x1dfda80_0 .net *"_s36", 0 0, L_0x1e16800; 1 drivers +v0x1dfdb60_0 .net *"_s42", 0 0, L_0x1e16a20; 1 drivers +v0x1dfdc40_0 .net *"_s46", 0 0, L_0x1e16ac0; 1 drivers +v0x1dfdd20_0 .net *"_s50", 0 0, L_0x1e16bd0; 1 drivers +v0x1dfde00_0 .net *"_s55", 0 0, L_0x1e16e10; 1 drivers +v0x1dfdee0_0 .net *"_s61", 0 0, L_0x1e17080; 1 drivers +v0x1dfdfc0_0 .net *"_s65", 0 0, L_0x1e171b0; 1 drivers +v0x1dfe0a0_0 .net *"_s69", 0 0, L_0x1e17380; 1 drivers +v0x1dfe180_0 .net *"_s74", 0 0, L_0x1e172e0; 1 drivers +v0x1dfe260_0 .net *"_s80", 0 0, L_0x1e17520; 1 drivers +v0x1dfe340_0 .net *"_s84", 0 0, L_0x1e177d0; 1 drivers +v0x1dfe420_0 .net *"_s88", 0 0, L_0x1e17710; 1 drivers +v0x1dfe500_0 .net *"_s93", 0 0, L_0x1e17870; 1 drivers +v0x1dfe5e0_0 .net *"_s99", 0 0, L_0x1e17b30; 1 drivers +v0x1dfe6c0_0 .net/s "accOut", 10 0, L_0x1e15ae0; 1 drivers +v0x1dfe7a0_0 .net "anyHasData", 0 0, L_0x1e16980; 1 drivers +v0x1dfe860_0 .net "anyReadAck", 0 0, L_0x1e17620; 1 drivers +v0x1dfe920_0 .net "anyWantData", 0 0, L_0x1e16f00; 1 drivers +v0x1dfe9e0_0 .net "anyWriteAck", 0 0, L_0x1e17c60; 1 drivers +v0x1dfeaa0_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers +v0x1dfec50_0 .net "down", 14 0, L_0x1e25130; alias, 1 drivers +v0x1dfecf0_0 .net "downOut", 14 0, L_0x1e19280; alias, 1 drivers +v0x1dfed90_0 .net "instruction", 17 0, L_0x1e16b60; 1 drivers +v0x1dfee30 .array "instructions", 15 0, 17 0; +v0x1dfeed0_0 .var "last", 2 0; +o0x2b89f58ffe58 .functor BUFZ 15, C4; HiZ drive +v0x1dfef90_0 .net "left", 14 0, o0x2b89f58ffe58; 0 drivers +v0x1dff070_0 .net "leftOut", 14 0, L_0x1e18fc0; 1 drivers +v0x1dff150_0 .var "mode", 2 0; +v0x1dff230 .array/s "outVals", 2 5, 10 0; +v0x1dff3a0_0 .var "phase", 2 0; +v0x1dff480_0 .net "portsHaveData", 5 2, L_0x1e16620; 1 drivers +v0x1dfd850_0 .net "portsWantData", 5 2, L_0x1e16c70; 1 drivers +v0x1dfd930_0 .net "readAckIn", 5 2, L_0x1e17420; 1 drivers +v0x1dff930_0 .var "readAckOut", 5 2; +v0x1dff9d0_0 .var "readTarget", 2 0; +v0x1dffa70_0 .var/s "readValue", 10 0; +L_0x2b89f59270a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1dffb50 .array "regVals", 0 7; +v0x1dffb50_0 .net/s v0x1dffb50 0, 10 0, L_0x2b89f59270a8; 1 drivers +v0x1dffb50_1 .net/s v0x1dffb50 1, 10 0, L_0x1e15ce0; 1 drivers +v0x1dffb50_2 .net/s v0x1dffb50 2, 10 0, L_0x1e15d50; 1 drivers +v0x1dffb50_3 .net/s v0x1dffb50 3, 10 0, L_0x1e16050; 1 drivers +v0x1dffb50_4 .net/s v0x1dffb50 4, 10 0, L_0x1e16120; 1 drivers +v0x1dffb50_5 .net/s v0x1dffb50 5, 10 0, L_0x1e16220; 1 drivers +o0x2b89f5900218 .functor BUFZ 11, C4; HiZ drive +v0x1dffb50_6 .net/s v0x1dffb50 6, 10 0, o0x2b89f5900218; 0 drivers +o0x2b89f5900248 .functor BUFZ 11, C4; HiZ drive +v0x1dffb50_7 .net/s v0x1dffb50 7, 10 0, o0x2b89f5900248; 0 drivers +o0x2b89f5900278 .functor BUFZ 15, C4; HiZ drive +v0x1dffd60_0 .net "right", 14 0, o0x2b89f5900278; 0 drivers +v0x1dffe40_0 .net "rightOut", 14 0, L_0x1e197f0; 1 drivers +o0x2b89f59002d8 .functor BUFZ 15, C4; HiZ drive +v0x1dfff20_0 .net "up", 14 0, o0x2b89f59002d8; 0 drivers +v0x1e00000_0 .net "upOut", 14 0, L_0x1e18d70; 1 drivers +v0x1e000e0_0 .var "weHaveData", 5 2; +v0x1e001c0_0 .var "weWantData", 5 2; +v0x1e002a0_0 .net "writeAckIn", 5 2, L_0x1e17940; 1 drivers +v0x1e00380_0 .var "writeAckOut", 5 2; +v0x1e00460_0 .var "writeTarget", 2 0; +v0x1e00540_0 .var/s "writeValue", 10 0; +L_0x1e15d50 .part o0x2b89f58ffe58, 0, 11; +L_0x1e16050 .part o0x2b89f5900278, 0, 11; +L_0x1e16120 .part o0x2b89f59002d8, 0, 11; +L_0x1e16220 .part L_0x1e25130, 0, 11; +L_0x1e16320 .part o0x2b89f58ffe58, 11, 1; +L_0x1e16440 .part o0x2b89f5900278, 11, 1; +L_0x1e16530 .part o0x2b89f59002d8, 11, 1; +L_0x1e16620 .concat8 [ 1 1 1 1], L_0x1e16320, L_0x1e16440, L_0x1e16530, L_0x1e16800; +L_0x1e16800 .part L_0x1e25130, 11, 1; +L_0x1e16980 .reduce/or L_0x1e16620; +L_0x1e16a20 .part o0x2b89f58ffe58, 12, 1; +L_0x1e16ac0 .part o0x2b89f5900278, 12, 1; +L_0x1e16bd0 .part o0x2b89f59002d8, 12, 1; +L_0x1e16c70 .concat8 [ 1 1 1 1], L_0x1e16a20, L_0x1e16ac0, L_0x1e16bd0, L_0x1e16e10; +L_0x1e16e10 .part L_0x1e25130, 12, 1; +L_0x1e16f00 .reduce/or L_0x1e16c70; +L_0x1e17080 .part o0x2b89f58ffe58, 13, 1; +L_0x1e171b0 .part o0x2b89f5900278, 13, 1; +L_0x1e17380 .part o0x2b89f59002d8, 13, 1; +L_0x1e17420 .concat8 [ 1 1 1 1], L_0x1e17080, L_0x1e171b0, L_0x1e17380, L_0x1e172e0; +L_0x1e172e0 .part L_0x1e25130, 13, 1; +L_0x1e17620 .reduce/or L_0x1e17420; +L_0x1e17520 .part o0x2b89f58ffe58, 14, 1; +L_0x1e177d0 .part o0x2b89f5900278, 14, 1; +L_0x1e17710 .part o0x2b89f59002d8, 14, 1; +L_0x1e17940 .concat8 [ 1 1 1 1], L_0x1e17520, L_0x1e177d0, L_0x1e17710, L_0x1e17870; +L_0x1e17870 .part L_0x1e25130, 14, 1; +L_0x1e17c60 .reduce/or L_0x1e17940; +L_0x1e17b30 .part v0x1dff930_0, 0, 1; +L_0x1e17e40 .part v0x1dff930_0, 1, 1; +L_0x1e17d50 .part v0x1dff930_0, 2, 1; +L_0x1e18030 .part v0x1dff930_0, 3, 1; +L_0x1e17f30 .part v0x1e00380_0, 0, 1; +L_0x1e18270 .part v0x1e00380_0, 1, 1; +L_0x1e18160 .part v0x1e00380_0, 2, 1; +L_0x1e18430 .part v0x1e00380_0, 3, 1; +L_0x1e18310 .part v0x1e001c0_0, 0, 1; +L_0x1e18690 .part v0x1e001c0_0, 1, 1; +L_0x1e18560 .part v0x1e001c0_0, 2, 1; +L_0x1e18870 .part v0x1e001c0_0, 3, 1; +L_0x1e18730 .part v0x1e000e0_0, 0, 1; +L_0x1e18a60 .part v0x1e000e0_0, 1, 1; +L_0x1e18910 .part v0x1e000e0_0, 2, 1; +L_0x1e189b0 .part v0x1e000e0_0, 3, 1; +L_0x1e18b00 .array/port v0x1dfee30, L_0x1e18e60; +L_0x1e18e60 .concat [ 4 2 0 0], v0x1dfbfd0_0, L_0x2b89f59270f0; +LS_0x1e18d70_0_0 .concat8 [ 11 1 1 1], v0x1dff230_2, L_0x1e18910, L_0x1e18560, L_0x1e18160; +LS_0x1e18d70_0_4 .concat8 [ 1 0 0 0], L_0x1e17d50; +L_0x1e18d70 .concat8 [ 14 1 0 0], LS_0x1e18d70_0_0, LS_0x1e18d70_0_4; +LS_0x1e19280_0_0 .concat8 [ 11 1 1 1], v0x1dff230_3, L_0x1e189b0, L_0x1e18870, L_0x1e18430; +LS_0x1e19280_0_4 .concat8 [ 1 0 0 0], L_0x1e18030; +L_0x1e19280 .concat8 [ 14 1 0 0], LS_0x1e19280_0_0, LS_0x1e19280_0_4; +LS_0x1e18fc0_0_0 .concat8 [ 11 1 1 1], v0x1dff230_0, L_0x1e18730, L_0x1e18310, L_0x1e17f30; +LS_0x1e18fc0_0_4 .concat8 [ 1 0 0 0], L_0x1e17b30; +L_0x1e18fc0 .concat8 [ 14 1 0 0], LS_0x1e18fc0_0_0, LS_0x1e18fc0_0_4; +LS_0x1e197f0_0_0 .concat8 [ 11 1 1 1], v0x1dff230_1, L_0x1e18a60, L_0x1e18690, L_0x1e18270; +LS_0x1e197f0_0_4 .concat8 [ 1 0 0 0], L_0x1e17e40; +L_0x1e197f0 .concat8 [ 14 1 0 0], LS_0x1e197f0_0_0, LS_0x1e197f0_0_4; +L_0x1e19520 .part L_0x1e16b60, 14, 4; +L_0x1e19c00 .part L_0x1e16b60, 11, 3; +L_0x1e19a10 .part L_0x1e16b60, 8, 3; +L_0x1e19e50 .part L_0x1e16b60, 10, 4; +L_0x1e19ca0 .part L_0x1e16b60, 0, 11; + .scope S_0x1c89a30; +T_0 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dd2190_0, 0, 3; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd2270_0, 0, 4; + %pushi/vec4 0, 0, 15; + %store/vec4 v0x1dd20b0_0, 0, 15; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_0.0, 5; + %load/vec4 v0x1dd2270_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1dd1fa0, 4; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1dd20b0_0, 4, 11; +T_0.0 ; + %end; + .thread T_0; + .scope S_0x1c89a30; +T_1 ; + %wait E_0x1d39760; + %load/vec4 v0x1dd2270_0; + %subi 1, 0, 4; + %store/vec4 v0x1dd2270_0, 0, 4; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_1.0, 5; + %load/vec4 v0x1dd2270_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1dd1fa0, 4; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1dd20b0_0, 4, 11; +T_1.0 ; + %jmp T_1; + .thread T_1; + .scope S_0x1c89a30; +T_2 ; + %wait E_0x1cb1f20; + %load/vec4 v0x1dd2270_0; + %subi 1, 0, 4; + %store/vec4 v0x1dd2270_0, 0, 4; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_2.0, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %load/vec4 v0x1dd2270_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1dd1fa0, 4; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %jmp T_2.1; +T_2.0 ; + %pushi/vec4 0, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; +T_2.1 ; + %jmp T_2; + .thread T_2; + .scope S_0x1c89a30; +T_3 ; + %wait E_0x1cbd520; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmpi/u 15, 0, 32; + %jmp/0xz T_3.0, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 12, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %jmp T_3.1; +T_3.0 ; + %pushi/vec4 0, 0, 1; + %ix/load 4, 12, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; +T_3.1 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_3.2, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %jmp T_3.3; +T_3.2 ; + %pushi/vec4 0, 0, 1; + %ix/load 4, 11, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; +T_3.3 ; + %jmp T_3; + .thread T_3, $push; + .scope S_0x1c89a30; +T_4 ; + %wait E_0x1cc17e0; + %load/vec4 v0x1dd2190_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_4.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_4.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_4.2, 6; + %jmp T_4.3; +T_4.0 ; + %load/vec4 v0x1dd1ec0_0; + %parti/s 1, 11, 5; + %flag_set/vec4 8; + %jmp/0xz T_4.4, 8; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmpi/u 15, 0, 32; + %jmp/0xz T_4.6, 5; + %load/vec4 v0x1dd2270_0; + %addi 1, 0, 4; + %store/vec4 v0x1dd2270_0, 0, 4; + %load/vec4 v0x1dd1ec0_0; + %parti/s 11, 0, 2; + %load/vec4 v0x1dd2270_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %store/vec4a v0x1dd1fa0, 4, 0; + %vpi_call 2 72 "$display", "%b", &PV {0 0 0}; + %pushi/vec4 1, 0, 1; + %ix/load 4, 13, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; +T_4.6 ; +T_4.4 ; + %jmp T_4.3; +T_4.1 ; + %jmp T_4.3; +T_4.2 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd2270_0; + %pad/u 32; + %cmp/u; + %jmp/0xz T_4.8, 5; + %load/vec4 v0x1dd2270_0; + %pad/u 6; + %subi 1, 0, 6; + %ix/vec4 4; + %load/vec4a v0x1dd1fa0, 4; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %load/vec4 v0x1dd1ec0_0; + %parti/s 1, 12, 5; + %flag_set/vec4 8; + %jmp/0xz T_4.10, 8; + %load/vec4 v0x1dd2270_0; + %subi 1, 0, 4; + %store/vec4 v0x1dd2270_0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 4, 14, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd20b0_0, 4, 5; +T_4.10 ; +T_4.8 ; + %jmp T_4.3; +T_4.3 ; + %pop/vec4 1; + %jmp T_4; + .thread T_4; + .scope S_0x1c89a30; +T_5 ; + %wait E_0x1c95390; + %load/vec4 v0x1dd2190_0; + %cmpi/e 2, 0, 3; + %jmp/0xz T_5.0, 4; + %pushi/vec4 0, 0, 1; + %ix/load 4, 13, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1dd20b0_0, 4, 1; + %pushi/vec4 0, 0, 1; + %ix/load 4, 14, 0; + %flag_set/imm 4, 0; + %store/vec4 v0x1dd20b0_0, 4, 1; +T_5.0 ; + %load/vec4 v0x1dd2190_0; + %pad/u 32; + %addi 1, 0, 32; + %pushi/vec4 3, 0, 32; + %mod; + %pad/u 3; + %store/vec4 v0x1dd2190_0, 0, 3; + %jmp T_5; + .thread T_5; + .scope S_0x1de1b20; +T_6 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1de5630_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1de5880_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1de5390_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1de2010_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1de2110_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de25a0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de5e10_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de6700_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de68c0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de6640_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de5710, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de5710, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de5710, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de5710, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1de1d30, v0x1de52d0 {0 0 0}; + %end; + .thread T_6; + .scope S_0x1de1b20; +T_7 ; + %wait E_0x1dd2930; + %load/vec4 v0x1de5630_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.2, 6; + %jmp T_7.3; +T_7.0 ; + %load/vec4 v0x1de5880_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.6, 6; + %jmp T_7.7; +T_7.4 ; + %load/vec4 v0x1de2390_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_7.8, 5; + %load/vec4 v0x1de2760_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_7.10, 5; + %load/vec4 v0x1de2760_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %jmp T_7.11; +T_7.10 ; + %load/vec4 v0x1de2760_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_7.12, 5; + %load/vec4 v0x1de5960_0; + %load/vec4 v0x1de2760_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.14, 8; + %load/vec4 v0x1de2760_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de2760_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %load/vec4 v0x1de2760_0; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.15; +T_7.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %load/vec4 v0x1de2760_0; + %assign/vec4 v0x1de5ef0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de2760_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de6700_0, 4, 5; + %load/vec4 v0x1de2760_0; + %assign/vec4 v0x1de5390_0, 0; +T_7.15 ; + %jmp T_7.13; +T_7.12 ; + %load/vec4 v0x1de2760_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.16, 4; + %load/vec4 v0x1de5390_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_7.18, 4; + %load/vec4 v0x1de5390_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %jmp T_7.19; +T_7.18 ; + %load/vec4 v0x1de5960_0; + %load/vec4 v0x1de5390_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.20, 8; + %load/vec4 v0x1de5390_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de5390_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %jmp T_7.21; +T_7.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %load/vec4 v0x1de5390_0; + %assign/vec4 v0x1de5ef0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de5390_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de6700_0, 4, 5; +T_7.21 ; +T_7.19 ; + %jmp T_7.17; +T_7.16 ; + %load/vec4 v0x1de2760_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.22, 4; + %load/vec4 v0x1de4c90_0; + %flag_set/vec4 8; + %jmp/0xz T_7.24, 8; + %load/vec4 v0x1de5960_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.27; +T_7.26 ; + %load/vec4 v0x1de5960_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.29; +T_7.28 ; + %load/vec4 v0x1de5960_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.31; +T_7.30 ; + %load/vec4 v0x1de5960_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de5390_0, 0; +T_7.32 ; +T_7.31 ; +T_7.29 ; +T_7.27 ; + %jmp T_7.25; +T_7.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %load/vec4 v0x1de2760_0; + %assign/vec4 v0x1de5ef0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6700_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6700_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6700_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6700_0, 4, 5; +T_7.25 ; +T_7.22 ; +T_7.17 ; +T_7.13 ; +T_7.11 ; +T_7.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.7; +T_7.5 ; + %load/vec4 v0x1de2390_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_7.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_7.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_7.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_7.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_7.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_7.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_7.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_7.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_7.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_7.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_7.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_7.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_7.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_7.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_7.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_7.49, 6; + %jmp T_7.50; +T_7.34 ; + %load/vec4 v0x1de2010_0; + %load/vec4 v0x1de5fd0_0; + %add; + %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.35 ; + %load/vec4 v0x1de2010_0; + %load/vec4 v0x1de5fd0_0; + %sub; + %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.36 ; + %load/vec4 v0x1de25a0_0; + %pad/u 11; + %load/vec4 v0x1de5fd0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.37 ; + %load/vec4 v0x1de5fd0_0; + %assign/vec4 v0x1de6a80_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.38 ; + %load/vec4 v0x1de22b0_0; + %assign/vec4 v0x1de6a80_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.39 ; + %load/vec4 v0x1de2010_0; + %load/vec4 v0x1de22b0_0; + %add; + %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.40 ; + %load/vec4 v0x1de2010_0; + %load/vec4 v0x1de22b0_0; + %sub; + %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.41 ; + %load/vec4 v0x1de25a0_0; + %pad/u 11; + %load/vec4 v0x1de22b0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.42 ; + %load/vec4 v0x1de2110_0; + %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x1de2010_0; + %assign/vec4 v0x1de2110_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.43 ; + %load/vec4 v0x1de2010_0; + %assign/vec4 v0x1de2110_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.44 ; + %load/vec4 v0x1de2010_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.45 ; + %load/vec4 v0x1de24c0_0; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.50; +T_7.46 ; + %load/vec4 v0x1de2010_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_7.51, 4; + %load/vec4 v0x1de24c0_0; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.52; +T_7.51 ; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; +T_7.52 ; + %jmp T_7.50; +T_7.47 ; + %load/vec4 v0x1de2010_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_7.53, 4; + %load/vec4 v0x1de24c0_0; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.54; +T_7.53 ; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; +T_7.54 ; + %jmp T_7.50; +T_7.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1de2010_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_7.55, 5; + %load/vec4 v0x1de24c0_0; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.56; +T_7.55 ; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; +T_7.56 ; + %jmp T_7.50; +T_7.49 ; + %load/vec4 v0x1de2010_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_7.57, 5; + %load/vec4 v0x1de24c0_0; + %assign/vec4 v0x1de2680_0, 0; + %jmp T_7.58; +T_7.57 ; + %load/vec4 v0x1de25a0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de2680_0, 0; +T_7.58 ; + %jmp T_7.50; +T_7.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.7; +T_7.6 ; + %load/vec4 v0x1de2390_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1de2390_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_7.59, 4; + %load/vec4 v0x1de21f0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1de21f0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1de5390_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_7.61, 9; + %load/vec4 v0x1de21f0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_7.63, 4; + %load/vec4 v0x1de6a80_0; + %assign/vec4 v0x1de2010_0, 0; +T_7.63 ; + %jmp T_7.62; +T_7.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %load/vec4 v0x1de21f0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_7.65, 4; + %load/vec4 v0x1de5390_0; + %assign/vec4 v0x1de69a0_0, 0; + %load/vec4 v0x1de6a80_0; + %load/vec4 v0x1de5390_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de5390_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %jmp T_7.66; +T_7.65 ; + %load/vec4 v0x1de21f0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.67, 4; + %load/vec4 v0x1de21f0_0; + %assign/vec4 v0x1de69a0_0, 0; + %load/vec4 v0x1de6a80_0; + %load/vec4 v0x1de21f0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de21f0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de21f0_0; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.68; +T_7.67 ; + %load/vec4 v0x1de4e10_0; + %flag_set/vec4 8; + %jmp/0xz T_7.69, 8; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.72; +T_7.71 ; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.74; +T_7.73 ; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.76; +T_7.75 ; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de5390_0, 0; +T_7.77 ; +T_7.76 ; +T_7.74 ; +T_7.72 ; + %jmp T_7.70; +T_7.69 ; + %load/vec4 v0x1de21f0_0; + %assign/vec4 v0x1de69a0_0, 0; +T_7.70 ; +T_7.68 ; +T_7.66 ; +T_7.62 ; +T_7.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.7; +T_7.7 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.1 ; + %load/vec4 v0x1de5880_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.81, 6; + %jmp T_7.82; +T_7.79 ; + %load/vec4 v0x1de5ef0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.83, 4; + %load/vec4 v0x1de4c90_0; + %flag_set/vec4 8; + %jmp/0xz T_7.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de6700_0, 0, 4; + %load/vec4 v0x1de5960_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.88; +T_7.87 ; + %load/vec4 v0x1de5960_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.90; +T_7.89 ; + %load/vec4 v0x1de5960_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.92; +T_7.91 ; + %load/vec4 v0x1de5960_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de5390_0, 0; +T_7.93 ; +T_7.92 ; +T_7.90 ; +T_7.88 ; +T_7.85 ; + %jmp T_7.84; +T_7.83 ; + %load/vec4 v0x1de5960_0; + %load/vec4 v0x1de5ef0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %load/vec4 v0x1de5ef0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de60b0, 4; + %assign/vec4 v0x1de5fd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de5ef0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de5ef0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de6700_0, 4, 5; + %load/vec4 v0x1de5ef0_0; + %assign/vec4 v0x1de5390_0, 0; +T_7.95 ; +T_7.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.82; +T_7.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.82; +T_7.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.82; +T_7.82 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.2 ; + %load/vec4 v0x1de5880_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_7.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_7.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_7.99, 6; + %jmp T_7.100; +T_7.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.100; +T_7.98 ; + %load/vec4 v0x1de69a0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_7.101, 4; + %load/vec4 v0x1de4e10_0; + %flag_set/vec4 8; + %jmp/0xz T_7.103, 8; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.106; +T_7.105 ; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.108; +T_7.107 ; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_7.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de5390_0, 0; + %jmp T_7.110; +T_7.109 ; + %load/vec4 v0x1de3d80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_7.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de69a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de6640_0, 4, 5; + %load/vec4 v0x1de6a80_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de5710, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de5390_0, 0; +T_7.111 ; +T_7.110 ; +T_7.108 ; +T_7.106 ; +T_7.103 ; +T_7.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.100; +T_7.99 ; + %load/vec4 v0x1de69a0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_7.113, 4; + %load/vec4 v0x1de67e0_0; + %load/vec4 v0x1de69a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_7.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1de69a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1de6640_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de5630_0, 0; + %load/vec4 v0x1de69a0_0; + %assign/vec4 v0x1de5390_0, 0; +T_7.115 ; +T_7.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de5880_0, 0; + %jmp T_7.100; +T_7.100 ; + %pop/vec4 1; + %jmp T_7.3; +T_7.3 ; + %pop/vec4 1; + %jmp T_7; + .thread T_7; + .scope S_0x1de1b20; +T_8 ; + %wait E_0x1dd2730; + %load/vec4 v0x1de5880_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1de5630_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1de2680_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_8.0, 8; + %load/vec4 v0x1de2680_0; + %assign/vec4 v0x1de25a0_0, 0; +T_8.0 ; + %load/vec4 v0x1de5880_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_8.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de5e10_0, 0, 4; +T_8.2 ; + %jmp T_8; + .thread T_8; + .scope S_0x1dfb510; +T_9 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dff150_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dff3a0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dfeed0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dfba40_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dfbb40_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfbfd0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dff930_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e001c0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e00380_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e000e0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dff230, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dff230, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dff230, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dff230, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1dfb7b0, v0x1dfee30 {0 0 0}; + %end; + .thread T_9; + .scope S_0x1dfb510; +T_10 ; + %wait E_0x1dd2930; + %load/vec4 v0x1dff150_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.2, 6; + %jmp T_10.3; +T_10.0 ; + %load/vec4 v0x1dff3a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.6, 6; + %jmp T_10.7; +T_10.4 ; + %load/vec4 v0x1dfbdc0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_10.8, 5; + %load/vec4 v0x1dfc190_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_10.10, 5; + %load/vec4 v0x1dfc190_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %jmp T_10.11; +T_10.10 ; + %load/vec4 v0x1dfc190_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_10.12, 5; + %load/vec4 v0x1dff480_0; + %load/vec4 v0x1dfc190_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.14, 8; + %load/vec4 v0x1dfc190_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfc190_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %load/vec4 v0x1dfc190_0; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.15; +T_10.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %load/vec4 v0x1dfc190_0; + %assign/vec4 v0x1dff9d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfc190_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %load/vec4 v0x1dfc190_0; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.15 ; + %jmp T_10.13; +T_10.12 ; + %load/vec4 v0x1dfc190_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.16, 4; + %load/vec4 v0x1dfeed0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_10.18, 4; + %load/vec4 v0x1dfeed0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %jmp T_10.19; +T_10.18 ; + %load/vec4 v0x1dff480_0; + %load/vec4 v0x1dfeed0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.20, 8; + %load/vec4 v0x1dfeed0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfeed0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %jmp T_10.21; +T_10.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %load/vec4 v0x1dfeed0_0; + %assign/vec4 v0x1dff9d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfeed0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; +T_10.21 ; +T_10.19 ; + %jmp T_10.17; +T_10.16 ; + %load/vec4 v0x1dfc190_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.22, 4; + %load/vec4 v0x1dfe7a0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.24, 8; + %load/vec4 v0x1dff480_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.27; +T_10.26 ; + %load/vec4 v0x1dff480_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.29; +T_10.28 ; + %load/vec4 v0x1dff480_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.31; +T_10.30 ; + %load/vec4 v0x1dff480_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.32 ; +T_10.31 ; +T_10.29 ; +T_10.27 ; + %jmp T_10.25; +T_10.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %load/vec4 v0x1dfc190_0; + %assign/vec4 v0x1dff9d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; +T_10.25 ; +T_10.22 ; +T_10.17 ; +T_10.13 ; +T_10.11 ; +T_10.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.7; +T_10.5 ; + %load/vec4 v0x1dfbdc0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_10.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_10.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_10.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_10.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_10.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_10.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_10.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_10.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_10.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_10.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_10.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_10.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_10.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_10.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_10.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_10.49, 6; + %jmp T_10.50; +T_10.34 ; + %load/vec4 v0x1dfba40_0; + %load/vec4 v0x1dffa70_0; + %add; + %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.35 ; + %load/vec4 v0x1dfba40_0; + %load/vec4 v0x1dffa70_0; + %sub; + %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.36 ; + %load/vec4 v0x1dfbfd0_0; + %pad/u 11; + %load/vec4 v0x1dffa70_0; + %add; + %pad/u 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.37 ; + %load/vec4 v0x1dffa70_0; + %assign/vec4 v0x1e00540_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.38 ; + %load/vec4 v0x1dfbce0_0; + %assign/vec4 v0x1e00540_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.39 ; + %load/vec4 v0x1dfba40_0; + %load/vec4 v0x1dfbce0_0; + %add; + %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.40 ; + %load/vec4 v0x1dfba40_0; + %load/vec4 v0x1dfbce0_0; + %sub; + %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.41 ; + %load/vec4 v0x1dfbfd0_0; + %pad/u 11; + %load/vec4 v0x1dfbce0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.42 ; + %load/vec4 v0x1dfbb40_0; + %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x1dfba40_0; + %assign/vec4 v0x1dfbb40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.43 ; + %load/vec4 v0x1dfba40_0; + %assign/vec4 v0x1dfbb40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.44 ; + %load/vec4 v0x1dfba40_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.45 ; + %load/vec4 v0x1dfbef0_0; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.50; +T_10.46 ; + %load/vec4 v0x1dfba40_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_10.51, 4; + %load/vec4 v0x1dfbef0_0; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.52; +T_10.51 ; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; +T_10.52 ; + %jmp T_10.50; +T_10.47 ; + %load/vec4 v0x1dfba40_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_10.53, 4; + %load/vec4 v0x1dfbef0_0; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.54; +T_10.53 ; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; +T_10.54 ; + %jmp T_10.50; +T_10.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dfba40_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_10.55, 5; + %load/vec4 v0x1dfbef0_0; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.56; +T_10.55 ; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; +T_10.56 ; + %jmp T_10.50; +T_10.49 ; + %load/vec4 v0x1dfba40_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_10.57, 5; + %load/vec4 v0x1dfbef0_0; + %assign/vec4 v0x1dfc0b0_0, 0; + %jmp T_10.58; +T_10.57 ; + %load/vec4 v0x1dfbfd0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dfc0b0_0, 0; +T_10.58 ; + %jmp T_10.50; +T_10.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.7; +T_10.6 ; + %load/vec4 v0x1dfbdc0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1dfbdc0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_10.59, 4; + %load/vec4 v0x1dfbc20_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1dfbc20_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1dfeed0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_10.61, 9; + %load/vec4 v0x1dfbc20_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_10.63, 4; + %load/vec4 v0x1e00540_0; + %assign/vec4 v0x1dfba40_0, 0; +T_10.63 ; + %jmp T_10.62; +T_10.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %load/vec4 v0x1dfbc20_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_10.65, 4; + %load/vec4 v0x1dfeed0_0; + %assign/vec4 v0x1e00460_0, 0; + %load/vec4 v0x1e00540_0; + %load/vec4 v0x1dfeed0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfeed0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %jmp T_10.66; +T_10.65 ; + %load/vec4 v0x1dfbc20_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.67, 4; + %load/vec4 v0x1dfbc20_0; + %assign/vec4 v0x1e00460_0, 0; + %load/vec4 v0x1e00540_0; + %load/vec4 v0x1dfbc20_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfbc20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1dfbc20_0; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.68; +T_10.67 ; + %load/vec4 v0x1dfe920_0; + %flag_set/vec4 8; + %jmp/0xz T_10.69, 8; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.72; +T_10.71 ; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.74; +T_10.73 ; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.76; +T_10.75 ; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.77 ; +T_10.76 ; +T_10.74 ; +T_10.72 ; + %jmp T_10.70; +T_10.69 ; + %load/vec4 v0x1dfbc20_0; + %assign/vec4 v0x1e00460_0, 0; +T_10.70 ; +T_10.68 ; +T_10.66 ; +T_10.62 ; +T_10.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.7; +T_10.7 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.1 ; + %load/vec4 v0x1dff3a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.81, 6; + %jmp T_10.82; +T_10.79 ; + %load/vec4 v0x1dff9d0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.83, 4; + %load/vec4 v0x1dfe7a0_0; + %flag_set/vec4 8; + %jmp/0xz T_10.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1e001c0_0, 0, 4; + %load/vec4 v0x1dff480_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.88; +T_10.87 ; + %load/vec4 v0x1dff480_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.90; +T_10.89 ; + %load/vec4 v0x1dff480_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.92; +T_10.91 ; + %load/vec4 v0x1dff480_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.93 ; +T_10.92 ; +T_10.90 ; +T_10.88 ; +T_10.85 ; + %jmp T_10.84; +T_10.83 ; + %load/vec4 v0x1dff480_0; + %load/vec4 v0x1dff9d0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %load/vec4 v0x1dff9d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dffb50, 4; + %assign/vec4 v0x1dffa70_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dff9d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dff930_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dff9d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %load/vec4 v0x1dff9d0_0; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.95 ; +T_10.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.82; +T_10.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.82; +T_10.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.82; +T_10.82 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.2 ; + %load/vec4 v0x1dff3a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_10.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_10.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_10.99, 6; + %jmp T_10.100; +T_10.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.100; +T_10.98 ; + %load/vec4 v0x1e00460_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_10.101, 4; + %load/vec4 v0x1dfe920_0; + %flag_set/vec4 8; + %jmp/0xz T_10.103, 8; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.106; +T_10.105 ; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.108; +T_10.107 ; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_10.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; + %jmp T_10.110; +T_10.109 ; + %load/vec4 v0x1dfd850_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_10.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1e00460_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %load/vec4 v0x1e00540_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dff230, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.111 ; +T_10.110 ; +T_10.108 ; +T_10.106 ; +T_10.103 ; +T_10.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.100; +T_10.99 ; + %load/vec4 v0x1e00460_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_10.113, 4; + %load/vec4 v0x1e002a0_0; + %load/vec4 v0x1e00460_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_10.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1e00460_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1e000e0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dff150_0, 0; + %load/vec4 v0x1e00460_0; + %assign/vec4 v0x1dfeed0_0, 0; +T_10.115 ; +T_10.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dff3a0_0, 0; + %jmp T_10.100; +T_10.100 ; + %pop/vec4 1; + %jmp T_10.3; +T_10.3 ; + %pop/vec4 1; + %jmp T_10; + .thread T_10; + .scope S_0x1dfb510; +T_11 ; + %wait E_0x1dd2730; + %load/vec4 v0x1dff3a0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1dff150_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1dfc0b0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_11.0, 8; + %load/vec4 v0x1dfc0b0_0; + %assign/vec4 v0x1dfbfd0_0, 0; +T_11.0 ; + %load/vec4 v0x1dff3a0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_11.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dff930_0, 0, 4; +T_11.2 ; + %jmp T_11; + .thread T_11; + .scope S_0x1df6340; +T_12 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1df9f30_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dfa150_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1df9c90_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1df6830_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1df6930_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df6dc0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfa6e0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfaf10_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfb0d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfae50_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dfa010, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dfa010, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dfa010, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dfa010, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1df6550, v0x1df9bd0 {0 0 0}; + %end; + .thread T_12; + .scope S_0x1df6340; +T_13 ; + %wait E_0x1dd2930; + %load/vec4 v0x1df9f30_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.2, 6; + %jmp T_13.3; +T_13.0 ; + %load/vec4 v0x1dfa150_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.6, 6; + %jmp T_13.7; +T_13.4 ; + %load/vec4 v0x1df6bb0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_13.8, 5; + %load/vec4 v0x1df6f80_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_13.10, 5; + %load/vec4 v0x1df6f80_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %jmp T_13.11; +T_13.10 ; + %load/vec4 v0x1df6f80_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_13.12, 5; + %load/vec4 v0x1dfa230_0; + %load/vec4 v0x1df6f80_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.14, 8; + %load/vec4 v0x1df6f80_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df6f80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %load/vec4 v0x1df6f80_0; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.15; +T_13.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %load/vec4 v0x1df6f80_0; + %assign/vec4 v0x1dfa780_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df6f80_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %load/vec4 v0x1df6f80_0; + %assign/vec4 v0x1df9c90_0, 0; +T_13.15 ; + %jmp T_13.13; +T_13.12 ; + %load/vec4 v0x1df6f80_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.16, 4; + %load/vec4 v0x1df9c90_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_13.18, 4; + %load/vec4 v0x1df9c90_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %jmp T_13.19; +T_13.18 ; + %load/vec4 v0x1dfa230_0; + %load/vec4 v0x1df9c90_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.20, 8; + %load/vec4 v0x1df9c90_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df9c90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %jmp T_13.21; +T_13.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %load/vec4 v0x1df9c90_0; + %assign/vec4 v0x1dfa780_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df9c90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; +T_13.21 ; +T_13.19 ; + %jmp T_13.17; +T_13.16 ; + %load/vec4 v0x1df6f80_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.22, 4; + %load/vec4 v0x1df9590_0; + %flag_set/vec4 8; + %jmp/0xz T_13.24, 8; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.27; +T_13.26 ; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.29; +T_13.28 ; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.31; +T_13.30 ; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; +T_13.32 ; +T_13.31 ; +T_13.29 ; +T_13.27 ; + %jmp T_13.25; +T_13.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %load/vec4 v0x1df6f80_0; + %assign/vec4 v0x1dfa780_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; +T_13.25 ; +T_13.22 ; +T_13.17 ; +T_13.13 ; +T_13.11 ; +T_13.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.7; +T_13.5 ; + %load/vec4 v0x1df6bb0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_13.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_13.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_13.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_13.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_13.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_13.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_13.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_13.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_13.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_13.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_13.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_13.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_13.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_13.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_13.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_13.49, 6; + %jmp T_13.50; +T_13.34 ; + %load/vec4 v0x1df6830_0; + %load/vec4 v0x1dfa820_0; + %add; + %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.35 ; + %load/vec4 v0x1df6830_0; + %load/vec4 v0x1dfa820_0; + %sub; + %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.36 ; + %load/vec4 v0x1df6dc0_0; + %pad/u 11; + %load/vec4 v0x1dfa820_0; + %add; + %pad/u 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.37 ; + %load/vec4 v0x1dfa820_0; + %assign/vec4 v0x1dfb290_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.38 ; + %load/vec4 v0x1df6ad0_0; + %assign/vec4 v0x1dfb290_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.39 ; + %load/vec4 v0x1df6830_0; + %load/vec4 v0x1df6ad0_0; + %add; + %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.40 ; + %load/vec4 v0x1df6830_0; + %load/vec4 v0x1df6ad0_0; + %sub; + %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.41 ; + %load/vec4 v0x1df6dc0_0; + %pad/u 11; + %load/vec4 v0x1df6ad0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.42 ; + %load/vec4 v0x1df6930_0; + %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x1df6830_0; + %assign/vec4 v0x1df6930_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.43 ; + %load/vec4 v0x1df6830_0; + %assign/vec4 v0x1df6930_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.44 ; + %load/vec4 v0x1df6830_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.45 ; + %load/vec4 v0x1df6ce0_0; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.50; +T_13.46 ; + %load/vec4 v0x1df6830_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_13.51, 4; + %load/vec4 v0x1df6ce0_0; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.52; +T_13.51 ; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; +T_13.52 ; + %jmp T_13.50; +T_13.47 ; + %load/vec4 v0x1df6830_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_13.53, 4; + %load/vec4 v0x1df6ce0_0; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.54; +T_13.53 ; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; +T_13.54 ; + %jmp T_13.50; +T_13.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1df6830_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_13.55, 5; + %load/vec4 v0x1df6ce0_0; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.56; +T_13.55 ; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; +T_13.56 ; + %jmp T_13.50; +T_13.49 ; + %load/vec4 v0x1df6830_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_13.57, 5; + %load/vec4 v0x1df6ce0_0; + %assign/vec4 v0x1df6ea0_0, 0; + %jmp T_13.58; +T_13.57 ; + %load/vec4 v0x1df6dc0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df6ea0_0, 0; +T_13.58 ; + %jmp T_13.50; +T_13.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.7; +T_13.6 ; + %load/vec4 v0x1df6bb0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1df6bb0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_13.59, 4; + %load/vec4 v0x1df6a10_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1df6a10_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1df9c90_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_13.61, 9; + %load/vec4 v0x1df6a10_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_13.63, 4; + %load/vec4 v0x1dfb290_0; + %assign/vec4 v0x1df6830_0, 0; +T_13.63 ; + %jmp T_13.62; +T_13.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %load/vec4 v0x1df6a10_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_13.65, 4; + %load/vec4 v0x1df9c90_0; + %assign/vec4 v0x1dfb1b0_0, 0; + %load/vec4 v0x1dfb290_0; + %load/vec4 v0x1df9c90_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df9c90_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %jmp T_13.66; +T_13.65 ; + %load/vec4 v0x1df6a10_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.67, 4; + %load/vec4 v0x1df6a10_0; + %assign/vec4 v0x1dfb1b0_0, 0; + %load/vec4 v0x1dfb290_0; + %load/vec4 v0x1df6a10_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df6a10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1df6a10_0; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.68; +T_13.67 ; + %load/vec4 v0x1df9710_0; + %flag_set/vec4 8; + %jmp/0xz T_13.69, 8; + %load/vec4 v0x1df8640_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.72; +T_13.71 ; + %load/vec4 v0x1df8640_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.74; +T_13.73 ; + %load/vec4 v0x1df8640_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.76; +T_13.75 ; + %load/vec4 v0x1df8640_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; +T_13.77 ; +T_13.76 ; +T_13.74 ; +T_13.72 ; + %jmp T_13.70; +T_13.69 ; + %load/vec4 v0x1df6a10_0; + %assign/vec4 v0x1dfb1b0_0, 0; +T_13.70 ; +T_13.68 ; +T_13.66 ; +T_13.62 ; +T_13.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.7; +T_13.7 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.1 ; + %load/vec4 v0x1dfa150_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.81, 6; + %jmp T_13.82; +T_13.79 ; + %load/vec4 v0x1dfa780_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.83, 4; + %load/vec4 v0x1df9590_0; + %flag_set/vec4 8; + %jmp/0xz T_13.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfaf10_0, 0, 4; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.88; +T_13.87 ; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.90; +T_13.89 ; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.92; +T_13.91 ; + %load/vec4 v0x1dfa230_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; +T_13.93 ; +T_13.92 ; +T_13.90 ; +T_13.88 ; +T_13.85 ; + %jmp T_13.84; +T_13.83 ; + %load/vec4 v0x1dfa230_0; + %load/vec4 v0x1dfa780_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %load/vec4 v0x1dfa780_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dfa8e0, 4; + %assign/vec4 v0x1dfa820_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfa780_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dfa780_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %load/vec4 v0x1dfa780_0; + %assign/vec4 v0x1df9c90_0, 0; +T_13.95 ; +T_13.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.82; +T_13.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.82; +T_13.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.82; +T_13.82 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.2 ; + %load/vec4 v0x1dfa150_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_13.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_13.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_13.99, 6; + %jmp T_13.100; +T_13.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.100; +T_13.98 ; + %load/vec4 v0x1dfb1b0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_13.101, 4; + %load/vec4 v0x1df9710_0; + %flag_set/vec4 8; + %jmp/0xz T_13.103, 8; + %load/vec4 v0x1df8640_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.106; +T_13.105 ; + %load/vec4 v0x1df8640_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.108; +T_13.107 ; + %load/vec4 v0x1df8640_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_13.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; + %jmp T_13.110; +T_13.109 ; + %load/vec4 v0x1df8640_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_13.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dfb1b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %load/vec4 v0x1dfb290_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dfa010, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df9c90_0, 0; +T_13.111 ; +T_13.110 ; +T_13.108 ; +T_13.106 ; +T_13.103 ; +T_13.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.100; +T_13.99 ; + %load/vec4 v0x1dfb1b0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_13.113, 4; + %load/vec4 v0x1dfaff0_0; + %load/vec4 v0x1dfb1b0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_13.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1dfb1b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1dfae50_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df9f30_0, 0; + %load/vec4 v0x1dfb1b0_0; + %assign/vec4 v0x1df9c90_0, 0; +T_13.115 ; +T_13.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dfa150_0, 0; + %jmp T_13.100; +T_13.100 ; + %pop/vec4 1; + %jmp T_13.3; +T_13.3 ; + %pop/vec4 1; + %jmp T_13; + .thread T_13; + .scope S_0x1df6340; +T_14 ; + %wait E_0x1dd2730; + %load/vec4 v0x1dfa150_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1df9f30_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1df6ea0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_14.0, 8; + %load/vec4 v0x1df6ea0_0; + %assign/vec4 v0x1df6dc0_0, 0; +T_14.0 ; + %load/vec4 v0x1dfa150_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_14.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dfa6e0_0, 0, 4; +T_14.2 ; + %jmp T_14; + .thread T_14; + .scope S_0x1dd7710; +T_15 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1ddb2e0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1ddb500_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1ddb040_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dd7c00_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dd7d00_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd8190_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddba90_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddc300_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddc4c0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddc220_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1ddb3c0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1ddb3c0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1ddb3c0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1ddb3c0, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1dd7940, v0x1ddaf80 {0 0 0}; + %end; + .thread T_15; + .scope S_0x1dd7710; +T_16 ; + %wait E_0x1dd2930; + %load/vec4 v0x1ddb2e0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_16.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_16.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_16.2, 6; + %jmp T_16.3; +T_16.0 ; + %load/vec4 v0x1ddb500_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_16.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_16.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_16.6, 6; + %jmp T_16.7; +T_16.4 ; + %load/vec4 v0x1dd7f80_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_16.8, 5; + %load/vec4 v0x1dd8350_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_16.10, 5; + %load/vec4 v0x1dd8350_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %jmp T_16.11; +T_16.10 ; + %load/vec4 v0x1dd8350_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_16.12, 5; + %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x1dd8350_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_16.14, 8; + %load/vec4 v0x1dd8350_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd8350_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %load/vec4 v0x1dd8350_0; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.15; +T_16.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %load/vec4 v0x1dd8350_0; + %assign/vec4 v0x1ddbb30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd8350_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %load/vec4 v0x1dd8350_0; + %assign/vec4 v0x1ddb040_0, 0; +T_16.15 ; + %jmp T_16.13; +T_16.12 ; + %load/vec4 v0x1dd8350_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_16.16, 4; + %load/vec4 v0x1ddb040_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_16.18, 4; + %load/vec4 v0x1ddb040_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %jmp T_16.19; +T_16.18 ; + %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x1ddb040_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_16.20, 8; + %load/vec4 v0x1ddb040_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddb040_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %jmp T_16.21; +T_16.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %load/vec4 v0x1ddb040_0; + %assign/vec4 v0x1ddbb30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddb040_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; +T_16.21 ; +T_16.19 ; + %jmp T_16.17; +T_16.16 ; + %load/vec4 v0x1dd8350_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_16.22, 4; + %load/vec4 v0x1dda960_0; + %flag_set/vec4 8; + %jmp/0xz T_16.24, 8; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.27; +T_16.26 ; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.29; +T_16.28 ; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.31; +T_16.30 ; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; +T_16.32 ; +T_16.31 ; +T_16.29 ; +T_16.27 ; + %jmp T_16.25; +T_16.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %load/vec4 v0x1dd8350_0; + %assign/vec4 v0x1ddbb30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; +T_16.25 ; +T_16.22 ; +T_16.17 ; +T_16.13 ; +T_16.11 ; +T_16.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.7; +T_16.5 ; + %load/vec4 v0x1dd7f80_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_16.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_16.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_16.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_16.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_16.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_16.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_16.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_16.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_16.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_16.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_16.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_16.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_16.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_16.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_16.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_16.49, 6; + %jmp T_16.50; +T_16.34 ; + %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x1ddbbd0_0; + %add; + %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.35 ; + %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x1ddbbd0_0; + %sub; + %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.36 ; + %load/vec4 v0x1dd8190_0; + %pad/u 11; + %load/vec4 v0x1ddbbd0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.37 ; + %load/vec4 v0x1ddbbd0_0; + %assign/vec4 v0x1ddc680_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.38 ; + %load/vec4 v0x1dd7ea0_0; + %assign/vec4 v0x1ddc680_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.39 ; + %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x1dd7ea0_0; + %add; + %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.40 ; + %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x1dd7ea0_0; + %sub; + %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.41 ; + %load/vec4 v0x1dd8190_0; + %pad/u 11; + %load/vec4 v0x1dd7ea0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.42 ; + %load/vec4 v0x1dd7d00_0; + %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x1dd7c00_0; + %assign/vec4 v0x1dd7d00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.43 ; + %load/vec4 v0x1dd7c00_0; + %assign/vec4 v0x1dd7d00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.44 ; + %load/vec4 v0x1dd7c00_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.45 ; + %load/vec4 v0x1dd80b0_0; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.50; +T_16.46 ; + %load/vec4 v0x1dd7c00_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_16.51, 4; + %load/vec4 v0x1dd80b0_0; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.52; +T_16.51 ; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; +T_16.52 ; + %jmp T_16.50; +T_16.47 ; + %load/vec4 v0x1dd7c00_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_16.53, 4; + %load/vec4 v0x1dd80b0_0; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.54; +T_16.53 ; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; +T_16.54 ; + %jmp T_16.50; +T_16.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd7c00_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_16.55, 5; + %load/vec4 v0x1dd80b0_0; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.56; +T_16.55 ; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; +T_16.56 ; + %jmp T_16.50; +T_16.49 ; + %load/vec4 v0x1dd7c00_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_16.57, 5; + %load/vec4 v0x1dd80b0_0; + %assign/vec4 v0x1dd8270_0, 0; + %jmp T_16.58; +T_16.57 ; + %load/vec4 v0x1dd8190_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd8270_0, 0; +T_16.58 ; + %jmp T_16.50; +T_16.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.7; +T_16.6 ; + %load/vec4 v0x1dd7f80_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1dd7f80_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_16.59, 4; + %load/vec4 v0x1dd7de0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1dd7de0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1ddb040_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_16.61, 9; + %load/vec4 v0x1dd7de0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_16.63, 4; + %load/vec4 v0x1ddc680_0; + %assign/vec4 v0x1dd7c00_0, 0; +T_16.63 ; + %jmp T_16.62; +T_16.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %load/vec4 v0x1dd7de0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_16.65, 4; + %load/vec4 v0x1ddb040_0; + %assign/vec4 v0x1ddc5a0_0, 0; + %load/vec4 v0x1ddc680_0; + %load/vec4 v0x1ddb040_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddb040_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %jmp T_16.66; +T_16.65 ; + %load/vec4 v0x1dd7de0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_16.67, 4; + %load/vec4 v0x1dd7de0_0; + %assign/vec4 v0x1ddc5a0_0, 0; + %load/vec4 v0x1ddc680_0; + %load/vec4 v0x1dd7de0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd7de0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1dd7de0_0; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.68; +T_16.67 ; + %load/vec4 v0x1ddaae0_0; + %flag_set/vec4 8; + %jmp/0xz T_16.69, 8; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.72; +T_16.71 ; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.74; +T_16.73 ; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.76; +T_16.75 ; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; +T_16.77 ; +T_16.76 ; +T_16.74 ; +T_16.72 ; + %jmp T_16.70; +T_16.69 ; + %load/vec4 v0x1dd7de0_0; + %assign/vec4 v0x1ddc5a0_0, 0; +T_16.70 ; +T_16.68 ; +T_16.66 ; +T_16.62 ; +T_16.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.7; +T_16.7 ; + %pop/vec4 1; + %jmp T_16.3; +T_16.1 ; + %load/vec4 v0x1ddb500_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_16.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_16.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_16.81, 6; + %jmp T_16.82; +T_16.79 ; + %load/vec4 v0x1ddbb30_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_16.83, 4; + %load/vec4 v0x1dda960_0; + %flag_set/vec4 8; + %jmp/0xz T_16.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddc300_0, 0, 4; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.88; +T_16.87 ; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.90; +T_16.89 ; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.92; +T_16.91 ; + %load/vec4 v0x1ddb5e0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; +T_16.93 ; +T_16.92 ; +T_16.90 ; +T_16.88 ; +T_16.85 ; + %jmp T_16.84; +T_16.83 ; + %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x1ddbb30_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_16.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %load/vec4 v0x1ddbb30_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1ddbcb0, 4; + %assign/vec4 v0x1ddbbd0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddbb30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddbb30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %load/vec4 v0x1ddbb30_0; + %assign/vec4 v0x1ddb040_0, 0; +T_16.95 ; +T_16.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.82; +T_16.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.82; +T_16.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.82; +T_16.82 ; + %pop/vec4 1; + %jmp T_16.3; +T_16.2 ; + %load/vec4 v0x1ddb500_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_16.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_16.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_16.99, 6; + %jmp T_16.100; +T_16.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.100; +T_16.98 ; + %load/vec4 v0x1ddc5a0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_16.101, 4; + %load/vec4 v0x1ddaae0_0; + %flag_set/vec4 8; + %jmp/0xz T_16.103, 8; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.106; +T_16.105 ; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.108; +T_16.107 ; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_16.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; + %jmp T_16.110; +T_16.109 ; + %load/vec4 v0x1dd9a10_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_16.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1ddc5a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %load/vec4 v0x1ddc680_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1ddb040_0, 0; +T_16.111 ; +T_16.110 ; +T_16.108 ; +T_16.106 ; +T_16.103 ; +T_16.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.100; +T_16.99 ; + %load/vec4 v0x1ddc5a0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_16.113, 4; + %load/vec4 v0x1ddc3e0_0; + %load/vec4 v0x1ddc5a0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_16.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1ddc5a0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1ddc220_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1ddb2e0_0, 0; + %load/vec4 v0x1ddc5a0_0; + %assign/vec4 v0x1ddb040_0, 0; +T_16.115 ; +T_16.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1ddb500_0, 0; + %jmp T_16.100; +T_16.100 ; + %pop/vec4 1; + %jmp T_16.3; +T_16.3 ; + %pop/vec4 1; + %jmp T_16; + .thread T_16; + .scope S_0x1dd7710; +T_17 ; + %wait E_0x1dd2730; + %load/vec4 v0x1ddb500_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1ddb2e0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1dd8270_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_17.0, 8; + %load/vec4 v0x1dd8270_0; + %assign/vec4 v0x1dd8190_0, 0; +T_17.0 ; + %load/vec4 v0x1ddb500_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_17.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddba90_0, 0, 4; +T_17.2 ; + %jmp T_17; + .thread T_17; + .scope S_0x1dd23d0; +T_18 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dd60b0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dd62d0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dd5e10_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dd2990_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dd2a90_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd2f20_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd6860_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd7110_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd72d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd7030_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dd6190, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dd6190, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dd6190, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1dd6190, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1dd25e0, v0x1dd5d50 {0 0 0}; + %end; + .thread T_18; + .scope S_0x1dd23d0; +T_19 ; + %wait E_0x1dd2930; + %load/vec4 v0x1dd60b0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_19.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_19.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_19.2, 6; + %jmp T_19.3; +T_19.0 ; + %load/vec4 v0x1dd62d0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_19.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_19.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_19.6, 6; + %jmp T_19.7; +T_19.4 ; + %load/vec4 v0x1dd2d10_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_19.8, 5; + %load/vec4 v0x1dd30e0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_19.10, 5; + %load/vec4 v0x1dd30e0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %jmp T_19.11; +T_19.10 ; + %load/vec4 v0x1dd30e0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_19.12, 5; + %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x1dd30e0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_19.14, 8; + %load/vec4 v0x1dd30e0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd30e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %load/vec4 v0x1dd30e0_0; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.15; +T_19.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %load/vec4 v0x1dd30e0_0; + %assign/vec4 v0x1dd6900_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd30e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %load/vec4 v0x1dd30e0_0; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.15 ; + %jmp T_19.13; +T_19.12 ; + %load/vec4 v0x1dd30e0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_19.16, 4; + %load/vec4 v0x1dd5e10_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_19.18, 4; + %load/vec4 v0x1dd5e10_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %jmp T_19.19; +T_19.18 ; + %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x1dd5e10_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_19.20, 8; + %load/vec4 v0x1dd5e10_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd5e10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %jmp T_19.21; +T_19.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %load/vec4 v0x1dd5e10_0; + %assign/vec4 v0x1dd6900_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd5e10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; +T_19.21 ; +T_19.19 ; + %jmp T_19.17; +T_19.16 ; + %load/vec4 v0x1dd30e0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_19.22, 4; + %load/vec4 v0x1dd56f0_0; + %flag_set/vec4 8; + %jmp/0xz T_19.24, 8; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.27; +T_19.26 ; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.29; +T_19.28 ; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.31; +T_19.30 ; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.32 ; +T_19.31 ; +T_19.29 ; +T_19.27 ; + %jmp T_19.25; +T_19.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %load/vec4 v0x1dd30e0_0; + %assign/vec4 v0x1dd6900_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; +T_19.25 ; +T_19.22 ; +T_19.17 ; +T_19.13 ; +T_19.11 ; +T_19.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.7; +T_19.5 ; + %load/vec4 v0x1dd2d10_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_19.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_19.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_19.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_19.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_19.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_19.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_19.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_19.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_19.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_19.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_19.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_19.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_19.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_19.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_19.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_19.49, 6; + %jmp T_19.50; +T_19.34 ; + %load/vec4 v0x1dd2990_0; + %load/vec4 v0x1dd69c0_0; + %add; + %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.35 ; + %load/vec4 v0x1dd2990_0; + %load/vec4 v0x1dd69c0_0; + %sub; + %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.36 ; + %load/vec4 v0x1dd2f20_0; + %pad/u 11; + %load/vec4 v0x1dd69c0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.37 ; + %load/vec4 v0x1dd69c0_0; + %assign/vec4 v0x1dd7490_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.38 ; + %load/vec4 v0x1dd2c30_0; + %assign/vec4 v0x1dd7490_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.39 ; + %load/vec4 v0x1dd2990_0; + %load/vec4 v0x1dd2c30_0; + %add; + %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.40 ; + %load/vec4 v0x1dd2990_0; + %load/vec4 v0x1dd2c30_0; + %sub; + %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.41 ; + %load/vec4 v0x1dd2f20_0; + %pad/u 11; + %load/vec4 v0x1dd2c30_0; + %add; + %pad/u 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.42 ; + %load/vec4 v0x1dd2a90_0; + %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x1dd2990_0; + %assign/vec4 v0x1dd2a90_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.43 ; + %load/vec4 v0x1dd2990_0; + %assign/vec4 v0x1dd2a90_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.44 ; + %load/vec4 v0x1dd2990_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.45 ; + %load/vec4 v0x1dd2e40_0; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.50; +T_19.46 ; + %load/vec4 v0x1dd2990_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_19.51, 4; + %load/vec4 v0x1dd2e40_0; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.52; +T_19.51 ; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; +T_19.52 ; + %jmp T_19.50; +T_19.47 ; + %load/vec4 v0x1dd2990_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_19.53, 4; + %load/vec4 v0x1dd2e40_0; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.54; +T_19.53 ; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; +T_19.54 ; + %jmp T_19.50; +T_19.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dd2990_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_19.55, 5; + %load/vec4 v0x1dd2e40_0; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.56; +T_19.55 ; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; +T_19.56 ; + %jmp T_19.50; +T_19.49 ; + %load/vec4 v0x1dd2990_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_19.57, 5; + %load/vec4 v0x1dd2e40_0; + %assign/vec4 v0x1dd3000_0, 0; + %jmp T_19.58; +T_19.57 ; + %load/vec4 v0x1dd2f20_0; + %addi 1, 0, 4; + %assign/vec4 v0x1dd3000_0, 0; +T_19.58 ; + %jmp T_19.50; +T_19.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.7; +T_19.6 ; + %load/vec4 v0x1dd2d10_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1dd2d10_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_19.59, 4; + %load/vec4 v0x1dd2b70_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1dd2b70_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1dd5e10_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_19.61, 9; + %load/vec4 v0x1dd2b70_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_19.63, 4; + %load/vec4 v0x1dd7490_0; + %assign/vec4 v0x1dd2990_0, 0; +T_19.63 ; + %jmp T_19.62; +T_19.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %load/vec4 v0x1dd2b70_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_19.65, 4; + %load/vec4 v0x1dd5e10_0; + %assign/vec4 v0x1dd73b0_0, 0; + %load/vec4 v0x1dd7490_0; + %load/vec4 v0x1dd5e10_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd5e10_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %jmp T_19.66; +T_19.65 ; + %load/vec4 v0x1dd2b70_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_19.67, 4; + %load/vec4 v0x1dd2b70_0; + %assign/vec4 v0x1dd73b0_0, 0; + %load/vec4 v0x1dd7490_0; + %load/vec4 v0x1dd2b70_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd2b70_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd2b70_0; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.68; +T_19.67 ; + %load/vec4 v0x1dd5870_0; + %flag_set/vec4 8; + %jmp/0xz T_19.69, 8; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.72; +T_19.71 ; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.74; +T_19.73 ; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.76; +T_19.75 ; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.77 ; +T_19.76 ; +T_19.74 ; +T_19.72 ; + %jmp T_19.70; +T_19.69 ; + %load/vec4 v0x1dd2b70_0; + %assign/vec4 v0x1dd73b0_0, 0; +T_19.70 ; +T_19.68 ; +T_19.66 ; +T_19.62 ; +T_19.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.7; +T_19.7 ; + %pop/vec4 1; + %jmp T_19.3; +T_19.1 ; + %load/vec4 v0x1dd62d0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_19.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_19.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_19.81, 6; + %jmp T_19.82; +T_19.79 ; + %load/vec4 v0x1dd6900_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_19.83, 4; + %load/vec4 v0x1dd56f0_0; + %flag_set/vec4 8; + %jmp/0xz T_19.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd7110_0, 0, 4; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.88; +T_19.87 ; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.90; +T_19.89 ; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.92; +T_19.91 ; + %load/vec4 v0x1dd63b0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.93 ; +T_19.92 ; +T_19.90 ; +T_19.88 ; +T_19.85 ; + %jmp T_19.84; +T_19.83 ; + %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x1dd6900_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_19.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %load/vec4 v0x1dd6900_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1dd6aa0, 4; + %assign/vec4 v0x1dd69c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd6900_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dd6900_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %load/vec4 v0x1dd6900_0; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.95 ; +T_19.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.82; +T_19.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.82; +T_19.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.82; +T_19.82 ; + %pop/vec4 1; + %jmp T_19.3; +T_19.2 ; + %load/vec4 v0x1dd62d0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_19.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_19.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_19.99, 6; + %jmp T_19.100; +T_19.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.100; +T_19.98 ; + %load/vec4 v0x1dd73b0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_19.101, 4; + %load/vec4 v0x1dd5870_0; + %flag_set/vec4 8; + %jmp/0xz T_19.103, 8; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.106; +T_19.105 ; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.108; +T_19.107 ; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_19.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; + %jmp T_19.110; +T_19.109 ; + %load/vec4 v0x1dd47a0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_19.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dd73b0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %load/vec4 v0x1dd7490_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1dd6190, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.111 ; +T_19.110 ; +T_19.108 ; +T_19.106 ; +T_19.103 ; +T_19.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.100; +T_19.99 ; + %load/vec4 v0x1dd73b0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_19.113, 4; + %load/vec4 v0x1dd71f0_0; + %load/vec4 v0x1dd73b0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_19.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1dd73b0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1dd7030_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dd60b0_0, 0; + %load/vec4 v0x1dd73b0_0; + %assign/vec4 v0x1dd5e10_0, 0; +T_19.115 ; +T_19.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dd62d0_0, 0; + %jmp T_19.100; +T_19.100 ; + %pop/vec4 1; + %jmp T_19.3; +T_19.3 ; + %pop/vec4 1; + %jmp T_19; + .thread T_19; + .scope S_0x1dd23d0; +T_20 ; + %wait E_0x1dd2730; + %load/vec4 v0x1dd62d0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1dd60b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1dd3000_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_20.0, 8; + %load/vec4 v0x1dd3000_0; + %assign/vec4 v0x1dd2f20_0, 0; +T_20.0 ; + %load/vec4 v0x1dd62d0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_20.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1dd6860_0, 0, 4; +T_20.2 ; + %jmp T_20; + .thread T_20; + .scope S_0x1df1180; +T_21 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1df4cf0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1df4f40_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1df4a50_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1df1670_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1df1770_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df1c00_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df54d0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df5d40_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df5f00_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df5c60_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1df4dd0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1df4dd0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1df4dd0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1df4dd0, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1df1390, v0x1df4990 {0 0 0}; + %end; + .thread T_21; + .scope S_0x1df1180; +T_22 ; + %wait E_0x1dd2930; + %load/vec4 v0x1df4cf0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_22.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_22.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_22.2, 6; + %jmp T_22.3; +T_22.0 ; + %load/vec4 v0x1df4f40_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_22.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_22.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_22.6, 6; + %jmp T_22.7; +T_22.4 ; + %load/vec4 v0x1df19f0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_22.8, 5; + %load/vec4 v0x1df1dc0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_22.10, 5; + %load/vec4 v0x1df1dc0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %jmp T_22.11; +T_22.10 ; + %load/vec4 v0x1df1dc0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_22.12, 5; + %load/vec4 v0x1df5020_0; + %load/vec4 v0x1df1dc0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_22.14, 8; + %load/vec4 v0x1df1dc0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df1dc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %load/vec4 v0x1df1dc0_0; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.15; +T_22.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %load/vec4 v0x1df1dc0_0; + %assign/vec4 v0x1df5570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df1dc0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %load/vec4 v0x1df1dc0_0; + %assign/vec4 v0x1df4a50_0, 0; +T_22.15 ; + %jmp T_22.13; +T_22.12 ; + %load/vec4 v0x1df1dc0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_22.16, 4; + %load/vec4 v0x1df4a50_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_22.18, 4; + %load/vec4 v0x1df4a50_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %jmp T_22.19; +T_22.18 ; + %load/vec4 v0x1df5020_0; + %load/vec4 v0x1df4a50_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_22.20, 8; + %load/vec4 v0x1df4a50_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df4a50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %jmp T_22.21; +T_22.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %load/vec4 v0x1df4a50_0; + %assign/vec4 v0x1df5570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df4a50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; +T_22.21 ; +T_22.19 ; + %jmp T_22.17; +T_22.16 ; + %load/vec4 v0x1df1dc0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_22.22, 4; + %load/vec4 v0x1df43d0_0; + %flag_set/vec4 8; + %jmp/0xz T_22.24, 8; + %load/vec4 v0x1df5020_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.27; +T_22.26 ; + %load/vec4 v0x1df5020_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.29; +T_22.28 ; + %load/vec4 v0x1df5020_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.31; +T_22.30 ; + %load/vec4 v0x1df5020_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; +T_22.32 ; +T_22.31 ; +T_22.29 ; +T_22.27 ; + %jmp T_22.25; +T_22.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %load/vec4 v0x1df1dc0_0; + %assign/vec4 v0x1df5570_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; +T_22.25 ; +T_22.22 ; +T_22.17 ; +T_22.13 ; +T_22.11 ; +T_22.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.7; +T_22.5 ; + %load/vec4 v0x1df19f0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_22.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_22.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_22.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_22.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_22.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_22.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_22.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_22.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_22.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_22.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_22.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_22.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_22.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_22.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_22.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_22.49, 6; + %jmp T_22.50; +T_22.34 ; + %load/vec4 v0x1df1670_0; + %load/vec4 v0x1df5610_0; + %add; + %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.35 ; + %load/vec4 v0x1df1670_0; + %load/vec4 v0x1df5610_0; + %sub; + %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.36 ; + %load/vec4 v0x1df1c00_0; + %pad/u 11; + %load/vec4 v0x1df5610_0; + %add; + %pad/u 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.37 ; + %load/vec4 v0x1df5610_0; + %assign/vec4 v0x1df60c0_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.38 ; + %load/vec4 v0x1df1910_0; + %assign/vec4 v0x1df60c0_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.39 ; + %load/vec4 v0x1df1670_0; + %load/vec4 v0x1df1910_0; + %add; + %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.40 ; + %load/vec4 v0x1df1670_0; + %load/vec4 v0x1df1910_0; + %sub; + %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.41 ; + %load/vec4 v0x1df1c00_0; + %pad/u 11; + %load/vec4 v0x1df1910_0; + %add; + %pad/u 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.42 ; + %load/vec4 v0x1df1770_0; + %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x1df1670_0; + %assign/vec4 v0x1df1770_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.43 ; + %load/vec4 v0x1df1670_0; + %assign/vec4 v0x1df1770_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.44 ; + %load/vec4 v0x1df1670_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.45 ; + %load/vec4 v0x1df1b20_0; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.50; +T_22.46 ; + %load/vec4 v0x1df1670_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_22.51, 4; + %load/vec4 v0x1df1b20_0; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.52; +T_22.51 ; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; +T_22.52 ; + %jmp T_22.50; +T_22.47 ; + %load/vec4 v0x1df1670_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_22.53, 4; + %load/vec4 v0x1df1b20_0; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.54; +T_22.53 ; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; +T_22.54 ; + %jmp T_22.50; +T_22.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1df1670_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_22.55, 5; + %load/vec4 v0x1df1b20_0; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.56; +T_22.55 ; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; +T_22.56 ; + %jmp T_22.50; +T_22.49 ; + %load/vec4 v0x1df1670_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_22.57, 5; + %load/vec4 v0x1df1b20_0; + %assign/vec4 v0x1df1ce0_0, 0; + %jmp T_22.58; +T_22.57 ; + %load/vec4 v0x1df1c00_0; + %addi 1, 0, 4; + %assign/vec4 v0x1df1ce0_0, 0; +T_22.58 ; + %jmp T_22.50; +T_22.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.7; +T_22.6 ; + %load/vec4 v0x1df19f0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1df19f0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_22.59, 4; + %load/vec4 v0x1df1850_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1df1850_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1df4a50_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_22.61, 9; + %load/vec4 v0x1df1850_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_22.63, 4; + %load/vec4 v0x1df60c0_0; + %assign/vec4 v0x1df1670_0, 0; +T_22.63 ; + %jmp T_22.62; +T_22.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %load/vec4 v0x1df1850_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_22.65, 4; + %load/vec4 v0x1df4a50_0; + %assign/vec4 v0x1df5fe0_0, 0; + %load/vec4 v0x1df60c0_0; + %load/vec4 v0x1df4a50_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df4a50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %jmp T_22.66; +T_22.65 ; + %load/vec4 v0x1df1850_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_22.67, 4; + %load/vec4 v0x1df1850_0; + %assign/vec4 v0x1df5fe0_0, 0; + %load/vec4 v0x1df60c0_0; + %load/vec4 v0x1df1850_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df1850_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df1850_0; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.68; +T_22.67 ; + %load/vec4 v0x1df4550_0; + %flag_set/vec4 8; + %jmp/0xz T_22.69, 8; + %load/vec4 v0x1df3480_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.72; +T_22.71 ; + %load/vec4 v0x1df3480_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.74; +T_22.73 ; + %load/vec4 v0x1df3480_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.76; +T_22.75 ; + %load/vec4 v0x1df3480_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; +T_22.77 ; +T_22.76 ; +T_22.74 ; +T_22.72 ; + %jmp T_22.70; +T_22.69 ; + %load/vec4 v0x1df1850_0; + %assign/vec4 v0x1df5fe0_0, 0; +T_22.70 ; +T_22.68 ; +T_22.66 ; +T_22.62 ; +T_22.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.7; +T_22.7 ; + %pop/vec4 1; + %jmp T_22.3; +T_22.1 ; + %load/vec4 v0x1df4f40_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_22.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_22.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_22.81, 6; + %jmp T_22.82; +T_22.79 ; + %load/vec4 v0x1df5570_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_22.83, 4; + %load/vec4 v0x1df43d0_0; + %flag_set/vec4 8; + %jmp/0xz T_22.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df5d40_0, 0, 4; + %load/vec4 v0x1df5020_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.88; +T_22.87 ; + %load/vec4 v0x1df5020_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.90; +T_22.89 ; + %load/vec4 v0x1df5020_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.92; +T_22.91 ; + %load/vec4 v0x1df5020_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; +T_22.93 ; +T_22.92 ; +T_22.90 ; +T_22.88 ; +T_22.85 ; + %jmp T_22.84; +T_22.83 ; + %load/vec4 v0x1df5020_0; + %load/vec4 v0x1df5570_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_22.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %load/vec4 v0x1df5570_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df56f0, 4; + %assign/vec4 v0x1df5610_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df5570_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df5570_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %load/vec4 v0x1df5570_0; + %assign/vec4 v0x1df4a50_0, 0; +T_22.95 ; +T_22.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.82; +T_22.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.82; +T_22.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.82; +T_22.82 ; + %pop/vec4 1; + %jmp T_22.3; +T_22.2 ; + %load/vec4 v0x1df4f40_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_22.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_22.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_22.99, 6; + %jmp T_22.100; +T_22.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.100; +T_22.98 ; + %load/vec4 v0x1df5fe0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_22.101, 4; + %load/vec4 v0x1df4550_0; + %flag_set/vec4 8; + %jmp/0xz T_22.103, 8; + %load/vec4 v0x1df3480_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.106; +T_22.105 ; + %load/vec4 v0x1df3480_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.108; +T_22.107 ; + %load/vec4 v0x1df3480_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_22.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; + %jmp T_22.110; +T_22.109 ; + %load/vec4 v0x1df3480_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_22.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df5fe0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %load/vec4 v0x1df60c0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1df4dd0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df4a50_0, 0; +T_22.111 ; +T_22.110 ; +T_22.108 ; +T_22.106 ; +T_22.103 ; +T_22.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.100; +T_22.99 ; + %load/vec4 v0x1df5fe0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_22.113, 4; + %load/vec4 v0x1df5e20_0; + %load/vec4 v0x1df5fe0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_22.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1df5fe0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1df5c60_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df4cf0_0, 0; + %load/vec4 v0x1df5fe0_0; + %assign/vec4 v0x1df4a50_0, 0; +T_22.115 ; +T_22.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1df4f40_0, 0; + %jmp T_22.100; +T_22.100 ; + %pop/vec4 1; + %jmp T_22.3; +T_22.3 ; + %pop/vec4 1; + %jmp T_22; + .thread T_22; + .scope S_0x1df1180; +T_23 ; + %wait E_0x1dd2730; + %load/vec4 v0x1df4f40_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1df4cf0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1df1ce0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_23.0, 8; + %load/vec4 v0x1df1ce0_0; + %assign/vec4 v0x1df1c00_0, 0; +T_23.0 ; + %load/vec4 v0x1df4f40_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_23.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df54d0_0, 0, 4; +T_23.2 ; + %jmp T_23; + .thread T_23; + .scope S_0x1debf90; +T_24 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1defb80_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1defda0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1def8e0_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dec480_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1dec580_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1deca10_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df0330_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df0b80_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df0d40_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df0ac0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1defc60, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1defc60, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1defc60, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1defc60, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1dec1a0, v0x1def820 {0 0 0}; + %end; + .thread T_24; + .scope S_0x1debf90; +T_25 ; + %wait E_0x1dd2930; + %load/vec4 v0x1defb80_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_25.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_25.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_25.2, 6; + %jmp T_25.3; +T_25.0 ; + %load/vec4 v0x1defda0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_25.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_25.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_25.6, 6; + %jmp T_25.7; +T_25.4 ; + %load/vec4 v0x1dec800_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_25.8, 5; + %load/vec4 v0x1decbd0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_25.10, 5; + %load/vec4 v0x1decbd0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %jmp T_25.11; +T_25.10 ; + %load/vec4 v0x1decbd0_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_25.12, 5; + %load/vec4 v0x1defe80_0; + %load/vec4 v0x1decbd0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_25.14, 8; + %load/vec4 v0x1decbd0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1decbd0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %load/vec4 v0x1decbd0_0; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.15; +T_25.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %load/vec4 v0x1decbd0_0; + %assign/vec4 v0x1df03d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1decbd0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %load/vec4 v0x1decbd0_0; + %assign/vec4 v0x1def8e0_0, 0; +T_25.15 ; + %jmp T_25.13; +T_25.12 ; + %load/vec4 v0x1decbd0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_25.16, 4; + %load/vec4 v0x1def8e0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_25.18, 4; + %load/vec4 v0x1def8e0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %jmp T_25.19; +T_25.18 ; + %load/vec4 v0x1defe80_0; + %load/vec4 v0x1def8e0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_25.20, 8; + %load/vec4 v0x1def8e0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1def8e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %jmp T_25.21; +T_25.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %load/vec4 v0x1def8e0_0; + %assign/vec4 v0x1df03d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1def8e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; +T_25.21 ; +T_25.19 ; + %jmp T_25.17; +T_25.16 ; + %load/vec4 v0x1decbd0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_25.22, 4; + %load/vec4 v0x1def1e0_0; + %flag_set/vec4 8; + %jmp/0xz T_25.24, 8; + %load/vec4 v0x1defe80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.27; +T_25.26 ; + %load/vec4 v0x1defe80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.29; +T_25.28 ; + %load/vec4 v0x1defe80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.31; +T_25.30 ; + %load/vec4 v0x1defe80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; +T_25.32 ; +T_25.31 ; +T_25.29 ; +T_25.27 ; + %jmp T_25.25; +T_25.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %load/vec4 v0x1decbd0_0; + %assign/vec4 v0x1df03d0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; +T_25.25 ; +T_25.22 ; +T_25.17 ; +T_25.13 ; +T_25.11 ; +T_25.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.7; +T_25.5 ; + %load/vec4 v0x1dec800_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_25.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_25.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_25.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_25.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_25.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_25.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_25.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_25.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_25.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_25.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_25.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_25.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_25.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_25.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_25.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_25.49, 6; + %jmp T_25.50; +T_25.34 ; + %load/vec4 v0x1dec480_0; + %load/vec4 v0x1df0470_0; + %add; + %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.35 ; + %load/vec4 v0x1dec480_0; + %load/vec4 v0x1df0470_0; + %sub; + %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.36 ; + %load/vec4 v0x1deca10_0; + %pad/u 11; + %load/vec4 v0x1df0470_0; + %add; + %pad/u 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.37 ; + %load/vec4 v0x1df0470_0; + %assign/vec4 v0x1df0f00_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.38 ; + %load/vec4 v0x1dec720_0; + %assign/vec4 v0x1df0f00_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.39 ; + %load/vec4 v0x1dec480_0; + %load/vec4 v0x1dec720_0; + %add; + %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.40 ; + %load/vec4 v0x1dec480_0; + %load/vec4 v0x1dec720_0; + %sub; + %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.41 ; + %load/vec4 v0x1deca10_0; + %pad/u 11; + %load/vec4 v0x1dec720_0; + %add; + %pad/u 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.42 ; + %load/vec4 v0x1dec580_0; + %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x1dec480_0; + %assign/vec4 v0x1dec580_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.43 ; + %load/vec4 v0x1dec480_0; + %assign/vec4 v0x1dec580_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.44 ; + %load/vec4 v0x1dec480_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.45 ; + %load/vec4 v0x1dec930_0; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.50; +T_25.46 ; + %load/vec4 v0x1dec480_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_25.51, 4; + %load/vec4 v0x1dec930_0; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.52; +T_25.51 ; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; +T_25.52 ; + %jmp T_25.50; +T_25.47 ; + %load/vec4 v0x1dec480_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_25.53, 4; + %load/vec4 v0x1dec930_0; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.54; +T_25.53 ; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; +T_25.54 ; + %jmp T_25.50; +T_25.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1dec480_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_25.55, 5; + %load/vec4 v0x1dec930_0; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.56; +T_25.55 ; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; +T_25.56 ; + %jmp T_25.50; +T_25.49 ; + %load/vec4 v0x1dec480_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_25.57, 5; + %load/vec4 v0x1dec930_0; + %assign/vec4 v0x1decaf0_0, 0; + %jmp T_25.58; +T_25.57 ; + %load/vec4 v0x1deca10_0; + %addi 1, 0, 4; + %assign/vec4 v0x1decaf0_0, 0; +T_25.58 ; + %jmp T_25.50; +T_25.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.7; +T_25.6 ; + %load/vec4 v0x1dec800_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1dec800_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_25.59, 4; + %load/vec4 v0x1dec660_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1dec660_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1def8e0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_25.61, 9; + %load/vec4 v0x1dec660_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_25.63, 4; + %load/vec4 v0x1df0f00_0; + %assign/vec4 v0x1dec480_0, 0; +T_25.63 ; + %jmp T_25.62; +T_25.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %load/vec4 v0x1dec660_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_25.65, 4; + %load/vec4 v0x1def8e0_0; + %assign/vec4 v0x1df0e20_0, 0; + %load/vec4 v0x1df0f00_0; + %load/vec4 v0x1def8e0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1def8e0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %jmp T_25.66; +T_25.65 ; + %load/vec4 v0x1dec660_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_25.67, 4; + %load/vec4 v0x1dec660_0; + %assign/vec4 v0x1df0e20_0, 0; + %load/vec4 v0x1df0f00_0; + %load/vec4 v0x1dec660_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dec660_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1dec660_0; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.68; +T_25.67 ; + %load/vec4 v0x1def360_0; + %flag_set/vec4 8; + %jmp/0xz T_25.69, 8; + %load/vec4 v0x1dee290_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.72; +T_25.71 ; + %load/vec4 v0x1dee290_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.74; +T_25.73 ; + %load/vec4 v0x1dee290_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.76; +T_25.75 ; + %load/vec4 v0x1dee290_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; +T_25.77 ; +T_25.76 ; +T_25.74 ; +T_25.72 ; + %jmp T_25.70; +T_25.69 ; + %load/vec4 v0x1dec660_0; + %assign/vec4 v0x1df0e20_0, 0; +T_25.70 ; +T_25.68 ; +T_25.66 ; +T_25.62 ; +T_25.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.7; +T_25.7 ; + %pop/vec4 1; + %jmp T_25.3; +T_25.1 ; + %load/vec4 v0x1defda0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_25.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_25.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_25.81, 6; + %jmp T_25.82; +T_25.79 ; + %load/vec4 v0x1df03d0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_25.83, 4; + %load/vec4 v0x1def1e0_0; + %flag_set/vec4 8; + %jmp/0xz T_25.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df0b80_0, 0, 4; + %load/vec4 v0x1defe80_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.88; +T_25.87 ; + %load/vec4 v0x1defe80_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.90; +T_25.89 ; + %load/vec4 v0x1defe80_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.92; +T_25.91 ; + %load/vec4 v0x1defe80_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; +T_25.93 ; +T_25.92 ; +T_25.90 ; +T_25.88 ; +T_25.85 ; + %jmp T_25.84; +T_25.83 ; + %load/vec4 v0x1defe80_0; + %load/vec4 v0x1df03d0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_25.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %load/vec4 v0x1df03d0_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1df0530, 4; + %assign/vec4 v0x1df0470_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df03d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0330_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1df03d0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %load/vec4 v0x1df03d0_0; + %assign/vec4 v0x1def8e0_0, 0; +T_25.95 ; +T_25.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.82; +T_25.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.82; +T_25.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.82; +T_25.82 ; + %pop/vec4 1; + %jmp T_25.3; +T_25.2 ; + %load/vec4 v0x1defda0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_25.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_25.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_25.99, 6; + %jmp T_25.100; +T_25.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.100; +T_25.98 ; + %load/vec4 v0x1df0e20_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_25.101, 4; + %load/vec4 v0x1def360_0; + %flag_set/vec4 8; + %jmp/0xz T_25.103, 8; + %load/vec4 v0x1dee290_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.106; +T_25.105 ; + %load/vec4 v0x1dee290_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.108; +T_25.107 ; + %load/vec4 v0x1dee290_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_25.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; + %jmp T_25.110; +T_25.109 ; + %load/vec4 v0x1dee290_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_25.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1df0e20_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %load/vec4 v0x1df0f00_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1defc60, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1def8e0_0, 0; +T_25.111 ; +T_25.110 ; +T_25.108 ; +T_25.106 ; +T_25.103 ; +T_25.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.100; +T_25.99 ; + %load/vec4 v0x1df0e20_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_25.113, 4; + %load/vec4 v0x1df0c60_0; + %load/vec4 v0x1df0e20_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_25.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1df0e20_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1df0ac0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1defb80_0, 0; + %load/vec4 v0x1df0e20_0; + %assign/vec4 v0x1def8e0_0, 0; +T_25.115 ; +T_25.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1defda0_0, 0; + %jmp T_25.100; +T_25.100 ; + %pop/vec4 1; + %jmp T_25.3; +T_25.3 ; + %pop/vec4 1; + %jmp T_25; + .thread T_25; + .scope S_0x1debf90; +T_26 ; + %wait E_0x1dd2730; + %load/vec4 v0x1defda0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1defb80_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1decaf0_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_26.0, 8; + %load/vec4 v0x1decaf0_0; + %assign/vec4 v0x1deca10_0, 0; +T_26.0 ; + %load/vec4 v0x1defda0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_26.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1df0330_0, 0, 4; +T_26.2 ; + %jmp T_26; + .thread T_26; + .scope S_0x1ddc900; +T_27 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1de0500_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1de0720_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1de0260_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1ddce00_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1ddcf00_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1ddd390_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de0cb0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de1520_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de16e0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de1440_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de05e0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de05e0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de05e0, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1de05e0, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1ddcb40, v0x1de01a0 {0 0 0}; + %end; + .thread T_27; + .scope S_0x1ddc900; +T_28 ; + %wait E_0x1dd2930; + %load/vec4 v0x1de0500_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_28.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_28.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_28.2, 6; + %jmp T_28.3; +T_28.0 ; + %load/vec4 v0x1de0720_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_28.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_28.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_28.6, 6; + %jmp T_28.7; +T_28.4 ; + %load/vec4 v0x1ddd180_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_28.8, 5; + %load/vec4 v0x1ddd550_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_28.10, 5; + %load/vec4 v0x1ddd550_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %jmp T_28.11; +T_28.10 ; + %load/vec4 v0x1ddd550_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_28.12, 5; + %load/vec4 v0x1de0800_0; + %load/vec4 v0x1ddd550_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_28.14, 8; + %load/vec4 v0x1ddd550_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddd550_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %load/vec4 v0x1ddd550_0; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.15; +T_28.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %load/vec4 v0x1ddd550_0; + %assign/vec4 v0x1de0d50_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddd550_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de1520_0, 4, 5; + %load/vec4 v0x1ddd550_0; + %assign/vec4 v0x1de0260_0, 0; +T_28.15 ; + %jmp T_28.13; +T_28.12 ; + %load/vec4 v0x1ddd550_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_28.16, 4; + %load/vec4 v0x1de0260_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_28.18, 4; + %load/vec4 v0x1de0260_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %jmp T_28.19; +T_28.18 ; + %load/vec4 v0x1de0800_0; + %load/vec4 v0x1de0260_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_28.20, 8; + %load/vec4 v0x1de0260_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de0260_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %jmp T_28.21; +T_28.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %load/vec4 v0x1de0260_0; + %assign/vec4 v0x1de0d50_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de0260_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de1520_0, 4, 5; +T_28.21 ; +T_28.19 ; + %jmp T_28.17; +T_28.16 ; + %load/vec4 v0x1ddd550_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_28.22, 4; + %load/vec4 v0x1ddfb60_0; + %flag_set/vec4 8; + %jmp/0xz T_28.24, 8; + %load/vec4 v0x1de0800_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.27; +T_28.26 ; + %load/vec4 v0x1de0800_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.29; +T_28.28 ; + %load/vec4 v0x1de0800_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.31; +T_28.30 ; + %load/vec4 v0x1de0800_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de0260_0, 0; +T_28.32 ; +T_28.31 ; +T_28.29 ; +T_28.27 ; + %jmp T_28.25; +T_28.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %load/vec4 v0x1ddd550_0; + %assign/vec4 v0x1de0d50_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1520_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1520_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1520_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1520_0, 4, 5; +T_28.25 ; +T_28.22 ; +T_28.17 ; +T_28.13 ; +T_28.11 ; +T_28.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.7; +T_28.5 ; + %load/vec4 v0x1ddd180_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_28.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_28.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_28.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_28.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_28.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_28.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_28.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_28.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_28.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_28.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_28.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_28.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_28.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_28.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_28.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_28.49, 6; + %jmp T_28.50; +T_28.34 ; + %load/vec4 v0x1ddce00_0; + %load/vec4 v0x1de0df0_0; + %add; + %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.35 ; + %load/vec4 v0x1ddce00_0; + %load/vec4 v0x1de0df0_0; + %sub; + %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.36 ; + %load/vec4 v0x1ddd390_0; + %pad/u 11; + %load/vec4 v0x1de0df0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.37 ; + %load/vec4 v0x1de0df0_0; + %assign/vec4 v0x1de18a0_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.38 ; + %load/vec4 v0x1ddd0a0_0; + %assign/vec4 v0x1de18a0_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.39 ; + %load/vec4 v0x1ddce00_0; + %load/vec4 v0x1ddd0a0_0; + %add; + %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.40 ; + %load/vec4 v0x1ddce00_0; + %load/vec4 v0x1ddd0a0_0; + %sub; + %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.41 ; + %load/vec4 v0x1ddd390_0; + %pad/u 11; + %load/vec4 v0x1ddd0a0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.42 ; + %load/vec4 v0x1ddcf00_0; + %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x1ddce00_0; + %assign/vec4 v0x1ddcf00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.43 ; + %load/vec4 v0x1ddce00_0; + %assign/vec4 v0x1ddcf00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.44 ; + %load/vec4 v0x1ddce00_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.45 ; + %load/vec4 v0x1ddd2b0_0; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.50; +T_28.46 ; + %load/vec4 v0x1ddce00_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_28.51, 4; + %load/vec4 v0x1ddd2b0_0; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.52; +T_28.51 ; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; +T_28.52 ; + %jmp T_28.50; +T_28.47 ; + %load/vec4 v0x1ddce00_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_28.53, 4; + %load/vec4 v0x1ddd2b0_0; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.54; +T_28.53 ; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; +T_28.54 ; + %jmp T_28.50; +T_28.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1ddce00_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_28.55, 5; + %load/vec4 v0x1ddd2b0_0; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.56; +T_28.55 ; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; +T_28.56 ; + %jmp T_28.50; +T_28.49 ; + %load/vec4 v0x1ddce00_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_28.57, 5; + %load/vec4 v0x1ddd2b0_0; + %assign/vec4 v0x1ddd470_0, 0; + %jmp T_28.58; +T_28.57 ; + %load/vec4 v0x1ddd390_0; + %addi 1, 0, 4; + %assign/vec4 v0x1ddd470_0, 0; +T_28.58 ; + %jmp T_28.50; +T_28.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.7; +T_28.6 ; + %load/vec4 v0x1ddd180_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1ddd180_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_28.59, 4; + %load/vec4 v0x1ddcfe0_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1ddcfe0_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1de0260_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_28.61, 9; + %load/vec4 v0x1ddcfe0_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_28.63, 4; + %load/vec4 v0x1de18a0_0; + %assign/vec4 v0x1ddce00_0, 0; +T_28.63 ; + %jmp T_28.62; +T_28.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %load/vec4 v0x1ddcfe0_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_28.65, 4; + %load/vec4 v0x1de0260_0; + %assign/vec4 v0x1de17c0_0, 0; + %load/vec4 v0x1de18a0_0; + %load/vec4 v0x1de0260_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de0260_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %jmp T_28.66; +T_28.65 ; + %load/vec4 v0x1ddcfe0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_28.67, 4; + %load/vec4 v0x1ddcfe0_0; + %assign/vec4 v0x1de17c0_0, 0; + %load/vec4 v0x1de18a0_0; + %load/vec4 v0x1ddcfe0_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1ddcfe0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1ddcfe0_0; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.68; +T_28.67 ; + %load/vec4 v0x1ddfce0_0; + %flag_set/vec4 8; + %jmp/0xz T_28.69, 8; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.72; +T_28.71 ; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.74; +T_28.73 ; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.76; +T_28.75 ; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de0260_0, 0; +T_28.77 ; +T_28.76 ; +T_28.74 ; +T_28.72 ; + %jmp T_28.70; +T_28.69 ; + %load/vec4 v0x1ddcfe0_0; + %assign/vec4 v0x1de17c0_0, 0; +T_28.70 ; +T_28.68 ; +T_28.66 ; +T_28.62 ; +T_28.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.7; +T_28.7 ; + %pop/vec4 1; + %jmp T_28.3; +T_28.1 ; + %load/vec4 v0x1de0720_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_28.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_28.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_28.81, 6; + %jmp T_28.82; +T_28.79 ; + %load/vec4 v0x1de0d50_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_28.83, 4; + %load/vec4 v0x1ddfb60_0; + %flag_set/vec4 8; + %jmp/0xz T_28.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de1520_0, 0, 4; + %load/vec4 v0x1de0800_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.88; +T_28.87 ; + %load/vec4 v0x1de0800_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.90; +T_28.89 ; + %load/vec4 v0x1de0800_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.92; +T_28.91 ; + %load/vec4 v0x1de0800_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de0260_0, 0; +T_28.93 ; +T_28.92 ; +T_28.90 ; +T_28.88 ; +T_28.85 ; + %jmp T_28.84; +T_28.83 ; + %load/vec4 v0x1de0800_0; + %load/vec4 v0x1de0d50_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_28.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %load/vec4 v0x1de0d50_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1de0eb0, 4; + %assign/vec4 v0x1de0df0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de0d50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de0d50_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1de1520_0, 4, 5; + %load/vec4 v0x1de0d50_0; + %assign/vec4 v0x1de0260_0, 0; +T_28.95 ; +T_28.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.82; +T_28.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.82; +T_28.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.82; +T_28.82 ; + %pop/vec4 1; + %jmp T_28.3; +T_28.2 ; + %load/vec4 v0x1de0720_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_28.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_28.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_28.99, 6; + %jmp T_28.100; +T_28.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.100; +T_28.98 ; + %load/vec4 v0x1de17c0_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_28.101, 4; + %load/vec4 v0x1ddfce0_0; + %flag_set/vec4 8; + %jmp/0xz T_28.103, 8; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.106; +T_28.105 ; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.108; +T_28.107 ; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_28.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1de0260_0, 0; + %jmp T_28.110; +T_28.109 ; + %load/vec4 v0x1ddec10_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_28.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de17c0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1de1440_0, 4, 5; + %load/vec4 v0x1de18a0_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1de05e0, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1de0260_0, 0; +T_28.111 ; +T_28.110 ; +T_28.108 ; +T_28.106 ; +T_28.103 ; +T_28.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.100; +T_28.99 ; + %load/vec4 v0x1de17c0_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_28.113, 4; + %load/vec4 v0x1de1600_0; + %load/vec4 v0x1de17c0_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_28.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1de17c0_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1de1440_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de0500_0, 0; + %load/vec4 v0x1de17c0_0; + %assign/vec4 v0x1de0260_0, 0; +T_28.115 ; +T_28.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1de0720_0, 0; + %jmp T_28.100; +T_28.100 ; + %pop/vec4 1; + %jmp T_28.3; +T_28.3 ; + %pop/vec4 1; + %jmp T_28; + .thread T_28; + .scope S_0x1ddc900; +T_29 ; + %wait E_0x1dd2730; + %load/vec4 v0x1de0720_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1de0500_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1ddd470_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_29.0, 8; + %load/vec4 v0x1ddd470_0; + %assign/vec4 v0x1ddd390_0, 0; +T_29.0 ; + %load/vec4 v0x1de0720_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_29.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de0cb0_0, 0, 4; +T_29.2 ; + %jmp T_29; + .thread T_29; + .scope S_0x1de6d00; +T_30 ; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dea9b0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1deabd0_0, 0, 3; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x1dea710_0, 0, 3; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1de7220_0, 0, 11; + %pushi/vec4 0, 0, 11; + %store/vec4 v0x1de7320_0, 0, 11; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1de77b0_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1deb160_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1deb990_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1debb50_0, 0, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1deb8b0_0, 0, 4; + %pushi/vec4 0, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1deaa90, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1deaa90, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1deaa90, 4, 0; + %pushi/vec4 0, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1deaa90, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x1de6f60, v0x1dea650 {0 0 0}; + %end; + .thread T_30; + .scope S_0x1de6d00; +T_31 ; + %wait E_0x1dd2930; + %load/vec4 v0x1dea9b0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_31.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_31.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_31.2, 6; + %jmp T_31.3; +T_31.0 ; + %load/vec4 v0x1deabd0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_31.4, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_31.5, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_31.6, 6; + %jmp T_31.7; +T_31.4 ; + %load/vec4 v0x1de75a0_0; + %pad/u 32; + %cmpi/u 4, 0, 32; + %jmp/0xz T_31.8, 5; + %load/vec4 v0x1de7970_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %jmp/0xz T_31.10, 5; + %load/vec4 v0x1de7970_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %jmp T_31.11; +T_31.10 ; + %load/vec4 v0x1de7970_0; + %pad/u 32; + %cmpi/u 6, 0, 32; + %jmp/0xz T_31.12, 5; + %load/vec4 v0x1deacb0_0; + %load/vec4 v0x1de7970_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_31.14, 8; + %load/vec4 v0x1de7970_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de7970_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %load/vec4 v0x1de7970_0; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.15; +T_31.14 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %load/vec4 v0x1de7970_0; + %assign/vec4 v0x1deb200_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de7970_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb990_0, 4, 5; + %load/vec4 v0x1de7970_0; + %assign/vec4 v0x1dea710_0, 0; +T_31.15 ; + %jmp T_31.13; +T_31.12 ; + %load/vec4 v0x1de7970_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_31.16, 4; + %load/vec4 v0x1dea710_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_31.18, 4; + %load/vec4 v0x1dea710_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %jmp T_31.19; +T_31.18 ; + %load/vec4 v0x1deacb0_0; + %load/vec4 v0x1dea710_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_31.20, 8; + %load/vec4 v0x1dea710_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dea710_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %jmp T_31.21; +T_31.20 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %load/vec4 v0x1dea710_0; + %assign/vec4 v0x1deb200_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dea710_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb990_0, 4, 5; +T_31.21 ; +T_31.19 ; + %jmp T_31.17; +T_31.16 ; + %load/vec4 v0x1de7970_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_31.22, 4; + %load/vec4 v0x1de9f80_0; + %flag_set/vec4 8; + %jmp/0xz T_31.24, 8; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.26, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.27; +T_31.26 ; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.28, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.29; +T_31.28 ; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.30, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.31; +T_31.30 ; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.32, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dea710_0, 0; +T_31.32 ; +T_31.31 ; +T_31.29 ; +T_31.27 ; + %jmp T_31.25; +T_31.24 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %load/vec4 v0x1de7970_0; + %assign/vec4 v0x1deb200_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb990_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb990_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb990_0, 4, 5; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb990_0, 4, 5; +T_31.25 ; +T_31.22 ; +T_31.17 ; +T_31.13 ; +T_31.11 ; +T_31.8 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.7; +T_31.5 ; + %load/vec4 v0x1de75a0_0; + %dup/vec4; + %pushi/vec4 0, 0, 4; + %cmp/u; + %jmp/1 T_31.34, 6; + %dup/vec4; + %pushi/vec4 1, 0, 4; + %cmp/u; + %jmp/1 T_31.35, 6; + %dup/vec4; + %pushi/vec4 2, 0, 4; + %cmp/u; + %jmp/1 T_31.36, 6; + %dup/vec4; + %pushi/vec4 3, 0, 4; + %cmp/u; + %jmp/1 T_31.37, 6; + %dup/vec4; + %pushi/vec4 4, 0, 4; + %cmp/u; + %jmp/1 T_31.38, 6; + %dup/vec4; + %pushi/vec4 5, 0, 4; + %cmp/u; + %jmp/1 T_31.39, 6; + %dup/vec4; + %pushi/vec4 6, 0, 4; + %cmp/u; + %jmp/1 T_31.40, 6; + %dup/vec4; + %pushi/vec4 7, 0, 4; + %cmp/u; + %jmp/1 T_31.41, 6; + %dup/vec4; + %pushi/vec4 8, 0, 4; + %cmp/u; + %jmp/1 T_31.42, 6; + %dup/vec4; + %pushi/vec4 9, 0, 4; + %cmp/u; + %jmp/1 T_31.43, 6; + %dup/vec4; + %pushi/vec4 10, 0, 4; + %cmp/u; + %jmp/1 T_31.44, 6; + %dup/vec4; + %pushi/vec4 11, 0, 4; + %cmp/u; + %jmp/1 T_31.45, 6; + %dup/vec4; + %pushi/vec4 12, 0, 4; + %cmp/u; + %jmp/1 T_31.46, 6; + %dup/vec4; + %pushi/vec4 13, 0, 4; + %cmp/u; + %jmp/1 T_31.47, 6; + %dup/vec4; + %pushi/vec4 14, 0, 4; + %cmp/u; + %jmp/1 T_31.48, 6; + %dup/vec4; + %pushi/vec4 15, 0, 4; + %cmp/u; + %jmp/1 T_31.49, 6; + %jmp T_31.50; +T_31.34 ; + %load/vec4 v0x1de7220_0; + %load/vec4 v0x1deb2a0_0; + %add; + %assign/vec4 v0x1de7220_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.35 ; + %load/vec4 v0x1de7220_0; + %load/vec4 v0x1deb2a0_0; + %sub; + %assign/vec4 v0x1de7220_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.36 ; + %load/vec4 v0x1de77b0_0; + %pad/u 11; + %load/vec4 v0x1deb2a0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.37 ; + %load/vec4 v0x1deb2a0_0; + %assign/vec4 v0x1debd10_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.38 ; + %load/vec4 v0x1de74c0_0; + %assign/vec4 v0x1debd10_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.39 ; + %load/vec4 v0x1de7220_0; + %load/vec4 v0x1de74c0_0; + %add; + %assign/vec4 v0x1de7220_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.40 ; + %load/vec4 v0x1de7220_0; + %load/vec4 v0x1de74c0_0; + %sub; + %assign/vec4 v0x1de7220_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.41 ; + %load/vec4 v0x1de77b0_0; + %pad/u 11; + %load/vec4 v0x1de74c0_0; + %add; + %pad/u 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.42 ; + %load/vec4 v0x1de7320_0; + %assign/vec4 v0x1de7220_0, 0; + %load/vec4 v0x1de7220_0; + %assign/vec4 v0x1de7320_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.43 ; + %load/vec4 v0x1de7220_0; + %assign/vec4 v0x1de7320_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.44 ; + %load/vec4 v0x1de7220_0; + %inv; + %pushi/vec4 1, 0, 11; + %add; + %assign/vec4 v0x1de7220_0, 0; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.45 ; + %load/vec4 v0x1de76d0_0; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.50; +T_31.46 ; + %load/vec4 v0x1de7220_0; + %pad/s 32; + %cmpi/e 0, 0, 32; + %jmp/0xz T_31.51, 4; + %load/vec4 v0x1de76d0_0; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.52; +T_31.51 ; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; +T_31.52 ; + %jmp T_31.50; +T_31.47 ; + %load/vec4 v0x1de7220_0; + %pad/s 32; + %cmpi/ne 0, 0, 32; + %jmp/0xz T_31.53, 4; + %load/vec4 v0x1de76d0_0; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.54; +T_31.53 ; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; +T_31.54 ; + %jmp T_31.50; +T_31.48 ; + %pushi/vec4 0, 0, 32; + %load/vec4 v0x1de7220_0; + %pad/s 32; + %cmp/s; + %jmp/0xz T_31.55, 5; + %load/vec4 v0x1de76d0_0; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.56; +T_31.55 ; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; +T_31.56 ; + %jmp T_31.50; +T_31.49 ; + %load/vec4 v0x1de7220_0; + %pad/s 32; + %cmpi/s 0, 0, 32; + %jmp/0xz T_31.57, 5; + %load/vec4 v0x1de76d0_0; + %assign/vec4 v0x1de7890_0, 0; + %jmp T_31.58; +T_31.57 ; + %load/vec4 v0x1de77b0_0; + %addi 1, 0, 4; + %assign/vec4 v0x1de7890_0, 0; +T_31.58 ; + %jmp T_31.50; +T_31.50 ; + %pop/vec4 1; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.7; +T_31.6 ; + %load/vec4 v0x1de75a0_0; + %cmpi/e 3, 0, 4; + %flag_mov 8, 4; + %load/vec4 v0x1de75a0_0; + %cmpi/e 4, 0, 4; + %flag_or 4, 8; + %jmp/0xz T_31.59, 4; + %load/vec4 v0x1de7400_0; + %pad/u 32; + %cmpi/u 2, 0, 32; + %flag_mov 8, 5; + %load/vec4 v0x1de7400_0; + %pushi/vec4 6, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1dea710_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %flag_set/vec4 9; + %flag_or 9, 8; + %jmp/0xz T_31.61, 9; + %load/vec4 v0x1de7400_0; + %cmpi/e 1, 0, 3; + %jmp/0xz T_31.63, 4; + %load/vec4 v0x1debd10_0; + %assign/vec4 v0x1de7220_0, 0; + %vpi_call 4 336 "$display", "ACC = %d", v0x1debd10_0 {0 0 0}; +T_31.63 ; + %jmp T_31.62; +T_31.61 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %load/vec4 v0x1de7400_0; + %cmpi/e 6, 0, 3; + %jmp/0xz T_31.65, 4; + %load/vec4 v0x1dea710_0; + %assign/vec4 v0x1debc30_0, 0; + %load/vec4 v0x1debd10_0; + %load/vec4 v0x1dea710_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1dea710_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %jmp T_31.66; +T_31.65 ; + %load/vec4 v0x1de7400_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_31.67, 4; + %load/vec4 v0x1de7400_0; + %assign/vec4 v0x1debc30_0, 0; + %load/vec4 v0x1debd10_0; + %load/vec4 v0x1de7400_0; + %pad/u 4; + %subi 2, 0, 4; + %ix/vec4 3; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1de7400_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1de7400_0; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.68; +T_31.67 ; + %load/vec4 v0x1dea100_0; + %flag_set/vec4 8; + %jmp/0xz T_31.69, 8; + %load/vec4 v0x1de9030_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.71, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.72; +T_31.71 ; + %load/vec4 v0x1de9030_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.73, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.74; +T_31.73 ; + %load/vec4 v0x1de9030_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.75, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.76; +T_31.75 ; + %load/vec4 v0x1de9030_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.77, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dea710_0, 0; +T_31.77 ; +T_31.76 ; +T_31.74 ; +T_31.72 ; + %jmp T_31.70; +T_31.69 ; + %load/vec4 v0x1de7400_0; + %assign/vec4 v0x1debc30_0, 0; +T_31.70 ; +T_31.68 ; +T_31.66 ; +T_31.62 ; +T_31.59 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.7; +T_31.7 ; + %pop/vec4 1; + %jmp T_31.3; +T_31.1 ; + %load/vec4 v0x1deabd0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_31.79, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_31.80, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_31.81, 6; + %jmp T_31.82; +T_31.79 ; + %load/vec4 v0x1deb200_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_31.83, 4; + %load/vec4 v0x1de9f80_0; + %flag_set/vec4 8; + %jmp/0xz T_31.85, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1deb990_0, 0, 4; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.87, 8; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.88; +T_31.87 ; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.89, 8; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.90; +T_31.89 ; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.91, 8; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.92; +T_31.91 ; + %load/vec4 v0x1deacb0_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.93, 8; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dea710_0, 0; +T_31.93 ; +T_31.92 ; +T_31.90 ; +T_31.88 ; +T_31.85 ; + %jmp T_31.84; +T_31.83 ; + %load/vec4 v0x1deacb0_0; + %load/vec4 v0x1deb200_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_31.95, 8; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %load/vec4 v0x1deb200_0; + %pad/u 5; + %ix/vec4 4; + %load/vec4a v0x1deb340, 4; + %assign/vec4 v0x1deb2a0_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1deb200_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb160_0, 4, 5; + %pushi/vec4 0, 0, 1; + %ix/load 5, 0, 0; + %load/vec4 v0x1deb200_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %assign/vec4/off/d v0x1deb990_0, 4, 5; + %load/vec4 v0x1deb200_0; + %assign/vec4 v0x1dea710_0, 0; +T_31.95 ; +T_31.84 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.82; +T_31.80 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.82; +T_31.81 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.82; +T_31.82 ; + %pop/vec4 1; + %jmp T_31.3; +T_31.2 ; + %load/vec4 v0x1deabd0_0; + %dup/vec4; + %pushi/vec4 0, 0, 3; + %cmp/u; + %jmp/1 T_31.97, 6; + %dup/vec4; + %pushi/vec4 1, 0, 3; + %cmp/u; + %jmp/1 T_31.98, 6; + %dup/vec4; + %pushi/vec4 2, 0, 3; + %cmp/u; + %jmp/1 T_31.99, 6; + %jmp T_31.100; +T_31.97 ; + %pushi/vec4 1, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.100; +T_31.98 ; + %load/vec4 v0x1debc30_0; + %cmpi/e 7, 0, 3; + %jmp/0xz T_31.101, 4; + %load/vec4 v0x1dea100_0; + %flag_set/vec4 8; + %jmp/0xz T_31.103, 8; + %load/vec4 v0x1de9030_0; + %parti/s 1, 2, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.105, 8; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 2, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 2, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 4, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.106; +T_31.105 ; + %load/vec4 v0x1de9030_0; + %parti/s 1, 0, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.107, 8; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 0, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 0, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.108; +T_31.107 ; + %load/vec4 v0x1de9030_0; + %parti/s 1, 1, 2; + %flag_set/vec4 8; + %jmp/0xz T_31.109, 8; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 1, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 1, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 3, 0, 3; + %assign/vec4 v0x1dea710_0, 0; + %jmp T_31.110; +T_31.109 ; + %load/vec4 v0x1de9030_0; + %parti/s 1, 3, 3; + %flag_set/vec4 8; + %jmp/0xz T_31.111, 8; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1debc30_0, 0; + %pushi/vec4 1, 0, 1; + %ix/load 4, 3, 0; + %ix/load 5, 0, 0; + %flag_set/imm 4, 0; + %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %load/vec4 v0x1debd10_0; + %ix/load 3, 3, 0; + %flag_set/imm 4, 0; + %ix/load 4, 0, 0; Constant delay + %assign/vec4/a/d v0x1deaa90, 0, 4; + %pushi/vec4 5, 0, 3; + %assign/vec4 v0x1dea710_0, 0; +T_31.111 ; +T_31.110 ; +T_31.108 ; +T_31.106 ; +T_31.103 ; +T_31.101 ; + %pushi/vec4 2, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.100; +T_31.99 ; + %load/vec4 v0x1debc30_0; + %cmpi/ne 7, 0, 3; + %jmp/0xz T_31.113, 4; + %load/vec4 v0x1deba70_0; + %load/vec4 v0x1debc30_0; + %pad/u 5; + %subi 2, 0, 5; + %part/s 1; + %flag_set/vec4 8; + %jmp/0xz T_31.115, 8; + %pushi/vec4 0, 0, 1; + %load/vec4 v0x1debc30_0; + %pad/u 5; + %subi 2, 0, 5; + %ix/vec4/s 4; + %store/vec4 v0x1deb8b0_0, 4, 1; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1dea9b0_0, 0; + %load/vec4 v0x1debc30_0; + %assign/vec4 v0x1dea710_0, 0; +T_31.115 ; +T_31.113 ; + %pushi/vec4 0, 0, 3; + %assign/vec4 v0x1deabd0_0, 0; + %jmp T_31.100; +T_31.100 ; + %pop/vec4 1; + %jmp T_31.3; +T_31.3 ; + %pop/vec4 1; + %jmp T_31; + .thread T_31; + .scope S_0x1de6d00; +T_32 ; + %wait E_0x1dd2730; + %load/vec4 v0x1deabd0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %load/vec4 v0x1dea9b0_0; + %pushi/vec4 0, 0, 3; + %cmp/e; + %flag_get/vec4 4; + %and; + %load/vec4 v0x1de7890_0; + %xor/r; + %pushi/vec4 1, 1, 1; + %cmp/e; + %flag_get/vec4 6; + %inv; + %and; + %flag_set/vec4 8; + %jmp/0xz T_32.0, 8; + %load/vec4 v0x1de7890_0; + %assign/vec4 v0x1de77b0_0, 0; +T_32.0 ; + %load/vec4 v0x1deabd0_0; + %cmpi/e 0, 0, 3; + %jmp/0xz T_32.2, 4; + %pushi/vec4 0, 0, 4; + %store/vec4 v0x1deb160_0, 0, 4; +T_32.2 ; + %jmp T_32; + .thread T_32; + .scope S_0x1cc1e10; +T_33 ; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x1e00fb0_0, 0, 33; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e00880_0, 0, 1; + %pushi/vec4 0, 0, 11; + %ix/load 4, 0, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 1, 0, 11; + %ix/load 4, 1, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 2, 0, 11; + %ix/load 4, 2, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 3, 0, 11; + %ix/load 4, 3, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 4, 0, 11; + %ix/load 4, 4, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 4, 0, 11; + %ix/load 4, 5, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 5, 0, 11; + %ix/load 4, 6, 0; + %flag_set/imm 4, 0; + %store/vec4a v0x1e00940, 4, 0; + %pushi/vec4 0, 0, 33; + %store/vec4 v0x1e00fb0_0, 0, 33; +T_33.0 ; + %load/vec4 v0x1e00fb0_0; + %cmpi/u 50000, 0, 33; + %jmp/0xz T_33.1, 5; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1e007c0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e007c0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1e007c0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e007c0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x1e007c0_0, 0, 1; + %delay 1, 0; + %pushi/vec4 1, 0, 1; + %store/vec4 v0x1e007c0_0, 0, 1; + %delay 1, 0; + %load/vec4 v0x1e00fb0_0; + %addi 1, 0, 33; + %store/vec4 v0x1e00fb0_0, 0, 33; + %jmp T_33.0; +T_33.1 ; + %end; + .thread T_33; +# The file index is used to find the file name in the following table. +:file_names 5; + "N/A"; + ""; + "./stackmemory.v"; + "demo/demo.v"; + "./tis100.v"; diff --git a/demo/demo.asm b/demo/demo.asm new file mode 100644 index 0000000..3d0041e --- /dev/null +++ b/demo/demo.asm @@ -0,0 +1,86 @@ +:in +MOV 4 DOWN +MOV 5 DOWN +MOV 6 DOWN +MOV 0 DOWN +MOV 7 DOWN +MOV 8 DOWN +MOV 0 DOWN +JRO 0 + +:out +MOV UP ACC +JMP 0 + +:one +END: +MOV 6 ACC +SAV +LOOP: +SWP +JEZ END +SUB 1 +SAV +MOV UP ACC +JEZ FILL +MOV ACC DOWN +JMP LOOP +FILL: +SWP +FLP: +MOV 0 DOWN +JEZ END +SUB 1 +JMP FLP + +:two +MOV DOWN ACC +SAV +MOV DOWN ACC +MOV ACC DOWN +SWP +MOV ACC DOWN + +:three +MOV UP RIGHT + +:four +MOV LEFT RIGHT + +:five +MOV LEFT UP +MOV LEFT UP +MOV LEFT ACC +SAV +MOV LEFT ACC +MOV LEFT DOWN +MOV LEFT DOWN +MOV ACC DOWN +SWP +MOV ACC DOWN +MOV UP DOWN +MOV UP DOWN + +:six +MOV 6 ACC +SAV +LOOP: +SWP +JEZ END +SUB 1 +SAV +MOV RIGHT ACC +JEZ LOOP +MOV ACC DOWN +JMP LOOP +END: +MOV 0 DOWN + +:seven +MOV UP ACC +MOV UP LEFT +MOV ACC LEFT +MOV UP LEFT +MOV UP LEFT +MOV UP LEFT +MOV UP LEFT diff --git a/demo/demo.v b/demo/demo.v new file mode 100644 index 0000000..570a899 --- /dev/null +++ b/demo/demo.v @@ -0,0 +1,87 @@ +`include "tis100.v" +`include "stackmemory.v" +module tis100Test(); + +reg clk; +reg[32:0] i; + +wire[14:0] inToOne; +wire[14:0] oneToIn; + +wire[14:0] oneToThree; +wire[14:0] threeToOne; + +wire[14:0] twoToFive; +wire[14:0] fiveToTwo; + +wire[14:0] threeToFour; +wire[14:0] fourToThree; + +wire[14:0] fourToFive; +wire[14:0] fiveToFour; + +wire[14:0] sixToSeven; +wire[14:0] sevenToSix; + +wire[14:0] sevenToFive; +wire[14:0] fiveToSeven; + +wire[14:0] sixToOut; +wire[14:0] outToSix; + +reg dutPassed; + +tis100 #("demo/one.dat") one(.clk(clk), + .downOut(oneToThree), .down(threeToOne), + .upOut(oneToIn), .up(inToOne)); + +tis100 #("demo/two.dat") two(.clk(clk), + .downOut(twoToFive), .down(fiveToTwo)); + +tis100 #("demo/three.dat") three(.clk(clk), + .rightOut(threeToFour), .right(fourToThree), + .upOut(threeToOne), .up(oneToThree)); + +tis100 #("demo/four.dat") four(.clk(clk), + .leftOut(fourToThree), .left(threeToFour), + .rightOut(fourToFive), .right(fiveToFour)); + +tis100 #("demo/five.dat") five(.clk(clk), + .leftOut(fiveToFour), .left(fourToFive), + .upOut(fiveToTwo), .up(twoToFive), + .downOut(fiveToSeven), .down(sevenToFive)); + +tis100 #("demo/six.dat") six(.clk(clk), + .rightOut(sixToSeven), .right(sevenToSix), + .downOut(sixToOut), .down(outToSix)); + +tis100 #("demo/seven.dat") seven(.clk(clk), + .leftOut(sevenToSix), .left(sixToSeven), + .upOut(sevenToFive), .up(fiveToSeven)); + +tis100 #("demo/in.dat") in(.clk(clk), .down(oneToIn), .downOut(inToOne)); +tis100 #("demo/out.dat",1) out(.clk(clk), .up(sixToOut), .upOut(outToSix)); + +reg signed[10:0] expected[0:6]; + +initial begin + i = 0; + dutPassed = 1; + expected[0] = 0; + expected[1] = 1; + expected[2] = 2; + expected[3] = 3; + expected[4] = 4; + expected[5] = 4; + expected[6] = 5; + for( i = 0; i<50000; i=i+1) begin + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + clk = 0; #1; + clk = 1; #1; + end +end + +endmodule diff --git a/demo/five.dat b/demo/five.dat new file mode 100644 index 0000000..46c185b --- /dev/null +++ b/demo/five.dat @@ -0,0 +1,16 @@ +001110001000000000 +001110001000000000 +001100101000000000 +100100000000000000 +001100101000000000 +001110101000000000 +001110101000000000 +001110100100000000 +100000000000000000 +001110100100000000 +001110110000000000 +001110110000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/demo/four.dat b/demo/four.dat new file mode 100644 index 0000000..c94d8de --- /dev/null +++ b/demo/four.dat @@ -0,0 +1,16 @@ +001101101000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/demo/in.dat b/demo/in.dat new file mode 100644 index 0000000..cf9622d --- /dev/null +++ b/demo/in.dat @@ -0,0 +1,16 @@ +010010100000000100 +010010100000000101 +010010100000000110 +010010100000000000 +010010100000000111 +010010100000001000 +010010100000000000 +011100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/demo/one.dat b/demo/one.dat new file mode 100644 index 0000000..b87138c --- /dev/null +++ b/demo/one.dat @@ -0,0 +1,16 @@ +010000100000000110 +100100000000000000 +100000000000000000 +110000000000000000 +011000000000000001 +100100000000000000 +001100110000000000 +110010100000000000 +001110100100000000 +101100100000000000 +100000000000000000 +010010100000000000 +110000000000000000 +011000000000000001 +101110110000000000 +101100000000000000 diff --git a/demo/out.dat b/demo/out.dat new file mode 100644 index 0000000..e9b9712 --- /dev/null +++ b/demo/out.dat @@ -0,0 +1,16 @@ +001100110000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/demo/seven.dat b/demo/seven.dat new file mode 100644 index 0000000..702c76a --- /dev/null +++ b/demo/seven.dat @@ -0,0 +1,16 @@ +001100110000000000 +001101010000000000 +001101000100000000 +001101010000000000 +001101010000000000 +001101010000000000 +001101010000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 +000000000000000000 diff --git a/demo/six.dat b/demo/six.dat new file mode 100644 index 0000000..e4702b8 --- /dev/null +++ b/demo/six.dat @@ -0,0 +1,16 @@ +010000100000000110 +100100000000000000 +100000000000000000 +110010100000000000 +011000000000000001 +100100000000000000 +001100101100000000 +110000100000000000 +001110100100000000 +101100100000000000 +010010100000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/demo/testmem.dat b/demo/testmem.dat new file mode 100644 index 0000000..d56c7be --- /dev/null +++ b/demo/testmem.dat @@ -0,0 +1,6 @@ +0000000000 +0101001001 +0100101101 +0010100100 +1001010100 +0101010100 diff --git a/demo/three.dat b/demo/three.dat new file mode 100644 index 0000000..6555908 --- /dev/null +++ b/demo/three.dat @@ -0,0 +1,16 @@ +001101110000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/demo/two.dat b/demo/two.dat new file mode 100644 index 0000000..a1a6feb --- /dev/null +++ b/demo/two.dat @@ -0,0 +1,16 @@ +001100110100000000 +100100000000000000 +001100110100000000 +001110100100000000 +100000000000000000 +001110100100000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/jumpTest/center.dat b/jumpTest/center.dat index 909b5c8..81366c1 100644 --- a/jumpTest/center.dat +++ b/jumpTest/center.dat @@ -2,15 +2,15 @@ 101100110000000000 010000100000101000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/jumpTest/left.dat b/jumpTest/left.dat index 5378fb8..97f8c31 100644 --- a/jumpTest/left.dat +++ b/jumpTest/left.dat @@ -2,15 +2,15 @@ 110100110000000000 010000100000101000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/jumpTest/right.dat b/jumpTest/right.dat index d4f5379..1aef359 100644 --- a/jumpTest/right.dat +++ b/jumpTest/right.dat @@ -2,15 +2,15 @@ 111000110000000000 010000100000101000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/jumpTest/test b/jumpTest/test index 8518d0f..5597acd 100755 --- a/jumpTest/test +++ b/jumpTest/test @@ -6,25 +6,25 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x96baa0 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x16e4740 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0xa3a450_0 .net "C2D", 14 0, L_0xa5eca0; 1 drivers -v0xa3a580_0 .net "C2L", 14 0, L_0xa5e9c0; 1 drivers -v0xa3a690_0 .net "C2R", 14 0, L_0xa5f390; 1 drivers -v0xa3a780_0 .net "C2U", 14 0, L_0xa5e6f0; 1 drivers -v0xa3a890_0 .net "D2C", 14 0, L_0xa5a500; 1 drivers -v0xa3a9f0_0 .net "L2C", 14 0, L_0xa4eca0; 1 drivers -v0xa3ab00_0 .net "R2C", 14 0, L_0xa525f0; 1 drivers -v0xa3ac10_0 .net "U2C", 14 0, L_0xa56960; 1 drivers -v0xa3ad20_0 .net/s "accOutCenter", 10 0, L_0xa5b2c0; 1 drivers -v0xa3ae70_0 .net/s "accOutDown", 10 0, L_0xa57260; 1 drivers -v0xa3af10_0 .net/s "accOutLeft", 10 0, L_0xa3b310; 1 drivers -v0xa3afb0_0 .net/s "accOutRight", 10 0, L_0xa4eff0; 1 drivers -v0xa3b050_0 .net/s "accOutUp", 10 0, L_0xa531b0; 1 drivers -v0xa3b0f0_0 .var "clk", 0 0; -v0xa3b190_0 .var "dutPassed", 0 0; -v0xa3b230_0 .var "i", 32 0; -S_0x9bb360 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x96baa0; +v0x17b3460_0 .net "C2D", 14 0, L_0x17d7cd0; 1 drivers +v0x17b3590_0 .net "C2L", 14 0, L_0x17d79f0; 1 drivers +v0x17b36a0_0 .net "C2R", 14 0, L_0x17d83c0; 1 drivers +v0x17b3790_0 .net "C2U", 14 0, L_0x17d7720; 1 drivers +v0x17b38a0_0 .net "D2C", 14 0, L_0x17d3530; 1 drivers +v0x17b3a00_0 .net "L2C", 14 0, L_0x17c7db0; 1 drivers +v0x17b3b10_0 .net "R2C", 14 0, L_0x17cb620; 1 drivers +v0x17b3c20_0 .net "U2C", 14 0, L_0x17cf990; 1 drivers +v0x17b3d30_0 .net/s "accOutCenter", 10 0, L_0x17d42f0; 1 drivers +v0x17b3e80_0 .net/s "accOutDown", 10 0, L_0x17d0290; 1 drivers +v0x17b3f20_0 .net/s "accOutLeft", 10 0, L_0x17b4320; 1 drivers +v0x17b3fc0_0 .net/s "accOutRight", 10 0, L_0x17c8100; 1 drivers +v0x17b4060_0 .net/s "accOutUp", 10 0, L_0x17cc1e0; 1 drivers +v0x17b4100_0 .var "clk", 0 0; +v0x17b41a0_0 .var "dutPassed", 0 0; +v0x17b4240_0 .var "i", 32 0; +S_0x17447f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x16e4740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -36,173 +36,174 @@ S_0x9bb360 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x96baa0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x9a4250 .param/str "memFile" 0 3 60, "jumpTest/center.dat"; -L_0xa5b2c0 .functor BUFZ 11, v0x9e1720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa5b550 .functor BUFZ 11, v0x9e1720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa5c380 .functor BUFZ 18, L_0xa5e500, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x9e1720_0 .var/s "ACC", 10 0; -v0xa21250_0 .var/s "BAK", 10 0; -v0xa21330_0 .net "DST", 2 0, L_0xa5f820; 1 drivers -v0xa21420_0 .net/s "IMM", 10 0, L_0xa5f8c0; 1 drivers -v0xa21500_0 .net "INST", 3 0, L_0xa5f000; 1 drivers -v0xa21630_0 .net "LABEL", 3 0, L_0xa5fa70; 1 drivers -v0xa21710_0 .var "PC", 3 0; -v0xa217f0_0 .var "PCNEXT", 3 0; -v0xa218d0_0 .net "SRC", 2 0, L_0xa5f630; 1 drivers -v0xa21a40_0 .net *"_s103", 0 0, L_0xa5d840; 1 drivers -v0xa21b20_0 .net *"_s107", 0 0, L_0xa5d750; 1 drivers -v0xa21c00_0 .net *"_s111", 0 0, L_0xa5da30; 1 drivers -v0xa21ce0_0 .net *"_s115", 0 0, L_0xa5d930; 1 drivers -v0xa21dc0_0 .net *"_s119", 0 0, L_0xa5dc70; 1 drivers -v0xa21ea0_0 .net *"_s123", 0 0, L_0xa5db60; 1 drivers -v0xa21f80_0 .net *"_s127", 0 0, L_0xa5de30; 1 drivers -v0xa22060_0 .net *"_s131", 0 0, L_0xa5dd10; 1 drivers -v0xa22210_0 .net *"_s135", 0 0, L_0xa5e090; 1 drivers -v0xa222b0_0 .net *"_s139", 0 0, L_0xa5df60; 1 drivers -v0xa22390_0 .net *"_s143", 0 0, L_0xa5e270; 1 drivers -v0xa22470_0 .net *"_s147", 0 0, L_0xa5e130; 1 drivers -v0xa22550_0 .net *"_s151", 0 0, L_0xa5e460; 1 drivers -v0xa22630_0 .net *"_s155", 0 0, L_0xa5e310; 1 drivers -v0xa22710_0 .net *"_s159", 0 0, L_0xa5e3b0; 1 drivers -v0xa227f0_0 .net *"_s160", 17 0, L_0xa5e500; 1 drivers -v0xa228d0_0 .net *"_s162", 5 0, L_0xa5e860; 1 drivers -L_0x2b1dfaa332a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0xa229b0_0 .net *"_s165", 1 0, L_0x2b1dfaa332a0; 1 drivers -v0xa24980_2 .array/port v0xa24980, 2; -v0xa22a90_0 .net *"_s173", 10 0, v0xa24980_2; 1 drivers -v0xa24980_3 .array/port v0xa24980, 3; -v0xa22b70_0 .net *"_s179", 10 0, v0xa24980_3; 1 drivers -v0xa24980_0 .array/port v0xa24980, 0; -v0xa22c50_0 .net *"_s185", 10 0, v0xa24980_0; 1 drivers -v0xa24980_1 .array/port v0xa24980, 1; -v0xa22d30_0 .net *"_s191", 10 0, v0xa24980_1; 1 drivers -v0xa22e10_0 .net *"_s23", 0 0, L_0xa5bd20; 1 drivers -v0xa22ef0_0 .net *"_s27", 0 0, L_0xa5bdf0; 1 drivers -v0xa22140_0 .net *"_s31", 0 0, L_0xa5bec0; 1 drivers -v0xa231c0_0 .net *"_s36", 0 0, L_0xa5c060; 1 drivers -v0xa232a0_0 .net *"_s42", 0 0, L_0xa5c240; 1 drivers -v0xa23380_0 .net *"_s46", 0 0, L_0xa5c2e0; 1 drivers -v0xa23460_0 .net *"_s50", 0 0, L_0xa5c3f0; 1 drivers -v0xa23540_0 .net *"_s55", 0 0, L_0xa5c600; 1 drivers -v0xa23620_0 .net *"_s61", 0 0, L_0xa5c870; 1 drivers -v0xa23700_0 .net *"_s65", 0 0, L_0xa5c910; 1 drivers -v0xa237e0_0 .net *"_s69", 0 0, L_0xa5ca50; 1 drivers -v0xa238c0_0 .net *"_s74", 0 0, L_0xa5c9b0; 1 drivers -v0xa239a0_0 .net *"_s80", 0 0, L_0xa5cc80; 1 drivers -v0xa23a80_0 .net *"_s84", 0 0, L_0xa5d040; 1 drivers -v0xa23b60_0 .net *"_s88", 0 0, L_0xa5ce70; 1 drivers -v0xa23c40_0 .net *"_s93", 0 0, L_0xa5d1f0; 1 drivers -v0xa23d20_0 .net *"_s99", 0 0, L_0xa5d470; 1 drivers -v0xa23e00_0 .net/s "accOut", 10 0, L_0xa5b2c0; alias, 1 drivers -v0xa23ee0_0 .net "anyHasData", 0 0, L_0xa5c150; 1 drivers -v0xa23fa0_0 .net "anyReadAck", 0 0, L_0xa5cd80; 1 drivers -v0xa24060_0 .net "anyWantData", 0 0, L_0xa5c6f0; 1 drivers -v0xa24120_0 .net "anyWriteAck", 0 0, L_0xa5d6b0; 1 drivers -v0xa241e0_0 .net "clk", 0 0, v0xa3b0f0_0; 1 drivers -v0xa242a0_0 .net "down", 14 0, L_0xa5a500; alias, 1 drivers -v0xa24380_0 .net "downOut", 14 0, L_0xa5eca0; alias, 1 drivers -v0xa24460_0 .net "instruction", 17 0, L_0xa5c380; 1 drivers -v0xa24540 .array "instructions", 15 0, 17 0; -v0xa24600_0 .var "last", 2 0; -v0xa246e0_0 .net "left", 14 0, L_0xa4eca0; alias, 1 drivers -v0xa247c0_0 .net "leftOut", 14 0, L_0xa5e9c0; alias, 1 drivers -v0xa248a0_0 .var "mode", 2 0; -v0xa24980 .array/s "outVals", 2 5, 10 0; -v0xa24ac0_0 .var "phase", 2 0; -v0xa24ba0_0 .net "portsHaveData", 5 2, L_0xa5bf60; 1 drivers -v0xa22f90_0 .net "portsWantData", 5 2, L_0xa5c490; 1 drivers -v0xa23070_0 .net "readAckIn", 5 2, L_0xa5caf0; 1 drivers -v0xa25050_0 .var "readAckOut", 5 2; -v0xa250f0_0 .var "readTarget", 2 0; -v0xa251d0_0 .var/s "readValue", 10 0; -L_0x2b1dfaa33258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0xa252b0 .array "regVals", 0 7; -v0xa252b0_0 .net/s v0xa252b0 0, 10 0, L_0x2b1dfaa33258; 1 drivers -v0xa252b0_1 .net/s v0xa252b0 1, 10 0, L_0xa5b550; 1 drivers -v0xa252b0_2 .net/s v0xa252b0 2, 10 0, L_0xa5b830; 1 drivers -v0xa252b0_3 .net/s v0xa252b0 3, 10 0, L_0xa5b960; 1 drivers -v0xa252b0_4 .net/s v0xa252b0 4, 10 0, L_0xa5ba90; 1 drivers -v0xa252b0_5 .net/s v0xa252b0 5, 10 0, L_0xa5bbc0; 1 drivers -o0x2b1dfaa02eb8 .functor BUFZ 11, C4; HiZ drive -v0xa252b0_6 .net/s v0xa252b0 6, 10 0, o0x2b1dfaa02eb8; 0 drivers -o0x2b1dfaa02ee8 .functor BUFZ 11, C4; HiZ drive -v0xa252b0_7 .net/s v0xa252b0 7, 10 0, o0x2b1dfaa02ee8; 0 drivers -v0xa254c0_0 .net "right", 14 0, L_0xa525f0; alias, 1 drivers -v0xa255a0_0 .net "rightOut", 14 0, L_0xa5f390; alias, 1 drivers -v0xa25680_0 .net "up", 14 0, L_0xa56960; alias, 1 drivers -v0xa25760_0 .net "upOut", 14 0, L_0xa5e6f0; alias, 1 drivers -v0xa25840_0 .var "weHaveData", 5 2; -v0xa25920_0 .var "weWantData", 5 2; -v0xa25a00_0 .net "writeAckIn", 5 2, L_0xa5d3d0; 1 drivers -v0xa25ae0_0 .var "writeAckOut", 5 2; -v0xa25bc0_0 .var "writeTarget", 2 0; -v0xa25ca0_0 .var/s "writeValue", 10 0; -E_0x97c930 .event negedge, v0xa241e0_0; -E_0x99f0f0 .event posedge, v0xa241e0_0; -L_0xa5b830 .part L_0xa4eca0, 0, 11; -L_0xa5b960 .part L_0xa525f0, 0, 11; -L_0xa5ba90 .part L_0xa56960, 0, 11; -L_0xa5bbc0 .part L_0xa5a500, 0, 11; -L_0xa5bd20 .part L_0xa4eca0, 11, 1; -L_0xa5bdf0 .part L_0xa525f0, 11, 1; -L_0xa5bec0 .part L_0xa56960, 11, 1; -L_0xa5bf60 .concat8 [ 1 1 1 1], L_0xa5bd20, L_0xa5bdf0, L_0xa5bec0, L_0xa5c060; -L_0xa5c060 .part L_0xa5a500, 11, 1; -L_0xa5c150 .reduce/or L_0xa5bf60; -L_0xa5c240 .part L_0xa4eca0, 12, 1; -L_0xa5c2e0 .part L_0xa525f0, 12, 1; -L_0xa5c3f0 .part L_0xa56960, 12, 1; -L_0xa5c490 .concat8 [ 1 1 1 1], L_0xa5c240, L_0xa5c2e0, L_0xa5c3f0, L_0xa5c600; -L_0xa5c600 .part L_0xa5a500, 12, 1; -L_0xa5c6f0 .reduce/or L_0xa5c490; -L_0xa5c870 .part L_0xa4eca0, 13, 1; -L_0xa5c910 .part L_0xa525f0, 13, 1; -L_0xa5ca50 .part L_0xa56960, 13, 1; -L_0xa5caf0 .concat8 [ 1 1 1 1], L_0xa5c870, L_0xa5c910, L_0xa5ca50, L_0xa5c9b0; -L_0xa5c9b0 .part L_0xa5a500, 13, 1; -L_0xa5cd80 .reduce/or L_0xa5caf0; -L_0xa5cc80 .part L_0xa4eca0, 14, 1; -L_0xa5d040 .part L_0xa525f0, 14, 1; -L_0xa5ce70 .part L_0xa56960, 14, 1; -L_0xa5d3d0 .concat8 [ 1 1 1 1], L_0xa5cc80, L_0xa5d040, L_0xa5ce70, L_0xa5d1f0; -L_0xa5d1f0 .part L_0xa5a500, 14, 1; -L_0xa5d6b0 .reduce/or L_0xa5d3d0; -L_0xa5d470 .part v0xa25050_0, 0, 1; -L_0xa5d840 .part v0xa25050_0, 1, 1; -L_0xa5d750 .part v0xa25050_0, 2, 1; -L_0xa5da30 .part v0xa25050_0, 3, 1; -L_0xa5d930 .part v0xa25ae0_0, 0, 1; -L_0xa5dc70 .part v0xa25ae0_0, 1, 1; -L_0xa5db60 .part v0xa25ae0_0, 2, 1; -L_0xa5de30 .part v0xa25ae0_0, 3, 1; -L_0xa5dd10 .part v0xa25920_0, 0, 1; -L_0xa5e090 .part v0xa25920_0, 1, 1; -L_0xa5df60 .part v0xa25920_0, 2, 1; -L_0xa5e270 .part v0xa25920_0, 3, 1; -L_0xa5e130 .part v0xa25840_0, 0, 1; -L_0xa5e460 .part v0xa25840_0, 1, 1; -L_0xa5e310 .part v0xa25840_0, 2, 1; -L_0xa5e3b0 .part v0xa25840_0, 3, 1; -L_0xa5e500 .array/port v0xa24540, L_0xa5e860; -L_0xa5e860 .concat [ 4 2 0 0], v0xa21710_0, L_0x2b1dfaa332a0; -LS_0xa5e6f0_0_0 .concat8 [ 11 1 1 1], v0xa24980_2, L_0xa5e310, L_0xa5df60, L_0xa5db60; -LS_0xa5e6f0_0_4 .concat8 [ 1 0 0 0], L_0xa5d750; -L_0xa5e6f0 .concat8 [ 14 1 0 0], LS_0xa5e6f0_0_0, LS_0xa5e6f0_0_4; -LS_0xa5eca0_0_0 .concat8 [ 11 1 1 1], v0xa24980_3, L_0xa5e3b0, L_0xa5e270, L_0xa5de30; -LS_0xa5eca0_0_4 .concat8 [ 1 0 0 0], L_0xa5da30; -L_0xa5eca0 .concat8 [ 14 1 0 0], LS_0xa5eca0_0_0, LS_0xa5eca0_0_4; -LS_0xa5e9c0_0_0 .concat8 [ 11 1 1 1], v0xa24980_0, L_0xa5e130, L_0xa5dd10, L_0xa5d930; -LS_0xa5e9c0_0_4 .concat8 [ 1 0 0 0], L_0xa5d470; -L_0xa5e9c0 .concat8 [ 14 1 0 0], LS_0xa5e9c0_0_0, LS_0xa5e9c0_0_4; -LS_0xa5f390_0_0 .concat8 [ 11 1 1 1], v0xa24980_1, L_0xa5e460, L_0xa5e090, L_0xa5dc70; -LS_0xa5f390_0_4 .concat8 [ 1 0 0 0], L_0xa5d840; -L_0xa5f390 .concat8 [ 14 1 0 0], LS_0xa5f390_0_0, LS_0xa5f390_0_4; -L_0xa5f000 .part L_0xa5c380, 14, 4; -L_0xa5f820 .part L_0xa5c380, 11, 3; -L_0xa5f630 .part L_0xa5c380, 8, 3; -L_0xa5fa70 .part L_0xa5c380, 10, 4; -L_0xa5f8c0 .part L_0xa5c380, 0, 11; -S_0xa25f20 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x96baa0; +P_0x17015c0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1701600 .param/str "memFile" 0 3 60, "jumpTest/center.dat"; +L_0x17d42f0 .functor BUFZ 11, v0x175a400_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17d4580 .functor BUFZ 11, v0x175a400_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17d53b0 .functor BUFZ 18, L_0x17d7530, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x175a400_0 .var/s "ACC", 10 0; +v0x1799f60_0 .var/s "BAK", 10 0; +v0x179a040_0 .net "DST", 2 0, L_0x17d8850; 1 drivers +v0x179a130_0 .net/s "IMM", 10 0, L_0x17d88f0; 1 drivers +v0x179a210_0 .net "INST", 3 0, L_0x17d8030; 1 drivers +v0x179a340_0 .net "LABEL", 3 0, L_0x17d8aa0; 1 drivers +v0x179a420_0 .var "PC", 3 0; +v0x179a500_0 .var "PCNEXT", 3 0; +v0x179a5e0_0 .net "SRC", 2 0, L_0x17d8660; 1 drivers +v0x179a750_0 .net *"_s103", 0 0, L_0x17d6870; 1 drivers +v0x179a830_0 .net *"_s107", 0 0, L_0x17d6780; 1 drivers +v0x179a910_0 .net *"_s111", 0 0, L_0x17d6a60; 1 drivers +v0x179a9f0_0 .net *"_s115", 0 0, L_0x17d6960; 1 drivers +v0x179aad0_0 .net *"_s119", 0 0, L_0x17d6ca0; 1 drivers +v0x179abb0_0 .net *"_s123", 0 0, L_0x17d6b90; 1 drivers +v0x179ac90_0 .net *"_s127", 0 0, L_0x17d6e60; 1 drivers +v0x179ad70_0 .net *"_s131", 0 0, L_0x17d6d40; 1 drivers +v0x179af20_0 .net *"_s135", 0 0, L_0x17d70c0; 1 drivers +v0x179afc0_0 .net *"_s139", 0 0, L_0x17d6f90; 1 drivers +v0x179b0a0_0 .net *"_s143", 0 0, L_0x17d72a0; 1 drivers +v0x179b180_0 .net *"_s147", 0 0, L_0x17d7160; 1 drivers +v0x179b260_0 .net *"_s151", 0 0, L_0x17d7490; 1 drivers +v0x179b340_0 .net *"_s155", 0 0, L_0x17d7340; 1 drivers +v0x179b420_0 .net *"_s159", 0 0, L_0x17d73e0; 1 drivers +v0x179b500_0 .net *"_s160", 17 0, L_0x17d7530; 1 drivers +v0x179b5e0_0 .net *"_s162", 5 0, L_0x17d7890; 1 drivers +L_0x2aef774e32a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x179b6c0_0 .net *"_s165", 1 0, L_0x2aef774e32a0; 1 drivers +v0x179d690_2 .array/port v0x179d690, 2; +v0x179b7a0_0 .net *"_s173", 10 0, v0x179d690_2; 1 drivers +v0x179d690_3 .array/port v0x179d690, 3; +v0x179b880_0 .net *"_s179", 10 0, v0x179d690_3; 1 drivers +v0x179d690_0 .array/port v0x179d690, 0; +v0x179b960_0 .net *"_s185", 10 0, v0x179d690_0; 1 drivers +v0x179d690_1 .array/port v0x179d690, 1; +v0x179ba40_0 .net *"_s191", 10 0, v0x179d690_1; 1 drivers +v0x179bb20_0 .net *"_s23", 0 0, L_0x17d4d50; 1 drivers +v0x179bc00_0 .net *"_s27", 0 0, L_0x17d4e20; 1 drivers +v0x179ae50_0 .net *"_s31", 0 0, L_0x17d4ef0; 1 drivers +v0x179bed0_0 .net *"_s36", 0 0, L_0x17d5090; 1 drivers +v0x179bfb0_0 .net *"_s42", 0 0, L_0x17d5270; 1 drivers +v0x179c090_0 .net *"_s46", 0 0, L_0x17d5310; 1 drivers +v0x179c170_0 .net *"_s50", 0 0, L_0x17d5420; 1 drivers +v0x179c250_0 .net *"_s55", 0 0, L_0x17d5630; 1 drivers +v0x179c330_0 .net *"_s61", 0 0, L_0x17d58a0; 1 drivers +v0x179c410_0 .net *"_s65", 0 0, L_0x17d5940; 1 drivers +v0x179c4f0_0 .net *"_s69", 0 0, L_0x17d5a80; 1 drivers +v0x179c5d0_0 .net *"_s74", 0 0, L_0x17d59e0; 1 drivers +v0x179c6b0_0 .net *"_s80", 0 0, L_0x17d5cb0; 1 drivers +v0x179c790_0 .net *"_s84", 0 0, L_0x17d6070; 1 drivers +v0x179c870_0 .net *"_s88", 0 0, L_0x17d5ea0; 1 drivers +v0x179c950_0 .net *"_s93", 0 0, L_0x17d6220; 1 drivers +v0x179ca30_0 .net *"_s99", 0 0, L_0x17d64a0; 1 drivers +v0x179cb10_0 .net/s "accOut", 10 0, L_0x17d42f0; alias, 1 drivers +v0x179cbf0_0 .net "anyHasData", 0 0, L_0x17d5180; 1 drivers +v0x179ccb0_0 .net "anyReadAck", 0 0, L_0x17d5db0; 1 drivers +v0x179cd70_0 .net "anyWantData", 0 0, L_0x17d5720; 1 drivers +v0x179ce30_0 .net "anyWriteAck", 0 0, L_0x17d66e0; 1 drivers +v0x179cef0_0 .net "clk", 0 0, v0x17b4100_0; 1 drivers +v0x179cfb0_0 .net "down", 14 0, L_0x17d3530; alias, 1 drivers +v0x179d090_0 .net "downOut", 14 0, L_0x17d7cd0; alias, 1 drivers +v0x179d170_0 .net "instruction", 17 0, L_0x17d53b0; 1 drivers +v0x179d250 .array "instructions", 15 0, 17 0; +v0x179d310_0 .var "last", 2 0; +v0x179d3f0_0 .net "left", 14 0, L_0x17c7db0; alias, 1 drivers +v0x179d4d0_0 .net "leftOut", 14 0, L_0x17d79f0; alias, 1 drivers +v0x179d5b0_0 .var "mode", 2 0; +v0x179d690 .array/s "outVals", 2 5, 10 0; +v0x179d7d0_0 .var "phase", 2 0; +v0x179d8b0_0 .net "portsHaveData", 5 2, L_0x17d4f90; 1 drivers +v0x179bca0_0 .net "portsWantData", 5 2, L_0x17d54c0; 1 drivers +v0x179bd80_0 .net "readAckIn", 5 2, L_0x17d5b20; 1 drivers +v0x179dd60_0 .var "readAckOut", 5 2; +v0x179de00_0 .var "readTarget", 2 0; +v0x179dee0_0 .var/s "readValue", 10 0; +L_0x2aef774e3258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x179dfc0 .array "regVals", 0 7; +v0x179dfc0_0 .net/s v0x179dfc0 0, 10 0, L_0x2aef774e3258; 1 drivers +v0x179dfc0_1 .net/s v0x179dfc0 1, 10 0, L_0x17d4580; 1 drivers +v0x179dfc0_2 .net/s v0x179dfc0 2, 10 0, L_0x17d4860; 1 drivers +v0x179dfc0_3 .net/s v0x179dfc0 3, 10 0, L_0x17d4990; 1 drivers +v0x179dfc0_4 .net/s v0x179dfc0 4, 10 0, L_0x17d4ac0; 1 drivers +v0x179dfc0_5 .net/s v0x179dfc0 5, 10 0, L_0x17d4bf0; 1 drivers +o0x2aef774b2eb8 .functor BUFZ 11, C4; HiZ drive +v0x179dfc0_6 .net/s v0x179dfc0 6, 10 0, o0x2aef774b2eb8; 0 drivers +o0x2aef774b2ee8 .functor BUFZ 11, C4; HiZ drive +v0x179dfc0_7 .net/s v0x179dfc0 7, 10 0, o0x2aef774b2ee8; 0 drivers +v0x179e1d0_0 .net "right", 14 0, L_0x17cb620; alias, 1 drivers +v0x179e2b0_0 .net "rightOut", 14 0, L_0x17d83c0; alias, 1 drivers +v0x179e390_0 .net "up", 14 0, L_0x17cf990; alias, 1 drivers +v0x179e470_0 .net "upOut", 14 0, L_0x17d7720; alias, 1 drivers +v0x179e550_0 .var "weHaveData", 5 2; +v0x179e630_0 .var "weWantData", 5 2; +v0x179e710_0 .net "writeAckIn", 5 2, L_0x17d6400; 1 drivers +v0x179e7f0_0 .var "writeAckOut", 5 2; +v0x179e8d0_0 .var "writeTarget", 2 0; +v0x179e9b0_0 .var/s "writeValue", 10 0; +E_0x16f55d0 .event negedge, v0x179cef0_0; +E_0x1717d10 .event posedge, v0x179cef0_0; +L_0x17d4860 .part L_0x17c7db0, 0, 11; +L_0x17d4990 .part L_0x17cb620, 0, 11; +L_0x17d4ac0 .part L_0x17cf990, 0, 11; +L_0x17d4bf0 .part L_0x17d3530, 0, 11; +L_0x17d4d50 .part L_0x17c7db0, 11, 1; +L_0x17d4e20 .part L_0x17cb620, 11, 1; +L_0x17d4ef0 .part L_0x17cf990, 11, 1; +L_0x17d4f90 .concat8 [ 1 1 1 1], L_0x17d4d50, L_0x17d4e20, L_0x17d4ef0, L_0x17d5090; +L_0x17d5090 .part L_0x17d3530, 11, 1; +L_0x17d5180 .reduce/or L_0x17d4f90; +L_0x17d5270 .part L_0x17c7db0, 12, 1; +L_0x17d5310 .part L_0x17cb620, 12, 1; +L_0x17d5420 .part L_0x17cf990, 12, 1; +L_0x17d54c0 .concat8 [ 1 1 1 1], L_0x17d5270, L_0x17d5310, L_0x17d5420, L_0x17d5630; +L_0x17d5630 .part L_0x17d3530, 12, 1; +L_0x17d5720 .reduce/or L_0x17d54c0; +L_0x17d58a0 .part L_0x17c7db0, 13, 1; +L_0x17d5940 .part L_0x17cb620, 13, 1; +L_0x17d5a80 .part L_0x17cf990, 13, 1; +L_0x17d5b20 .concat8 [ 1 1 1 1], L_0x17d58a0, L_0x17d5940, L_0x17d5a80, L_0x17d59e0; +L_0x17d59e0 .part L_0x17d3530, 13, 1; +L_0x17d5db0 .reduce/or L_0x17d5b20; +L_0x17d5cb0 .part L_0x17c7db0, 14, 1; +L_0x17d6070 .part L_0x17cb620, 14, 1; +L_0x17d5ea0 .part L_0x17cf990, 14, 1; +L_0x17d6400 .concat8 [ 1 1 1 1], L_0x17d5cb0, L_0x17d6070, L_0x17d5ea0, L_0x17d6220; +L_0x17d6220 .part L_0x17d3530, 14, 1; +L_0x17d66e0 .reduce/or L_0x17d6400; +L_0x17d64a0 .part v0x179dd60_0, 0, 1; +L_0x17d6870 .part v0x179dd60_0, 1, 1; +L_0x17d6780 .part v0x179dd60_0, 2, 1; +L_0x17d6a60 .part v0x179dd60_0, 3, 1; +L_0x17d6960 .part v0x179e7f0_0, 0, 1; +L_0x17d6ca0 .part v0x179e7f0_0, 1, 1; +L_0x17d6b90 .part v0x179e7f0_0, 2, 1; +L_0x17d6e60 .part v0x179e7f0_0, 3, 1; +L_0x17d6d40 .part v0x179e630_0, 0, 1; +L_0x17d70c0 .part v0x179e630_0, 1, 1; +L_0x17d6f90 .part v0x179e630_0, 2, 1; +L_0x17d72a0 .part v0x179e630_0, 3, 1; +L_0x17d7160 .part v0x179e550_0, 0, 1; +L_0x17d7490 .part v0x179e550_0, 1, 1; +L_0x17d7340 .part v0x179e550_0, 2, 1; +L_0x17d73e0 .part v0x179e550_0, 3, 1; +L_0x17d7530 .array/port v0x179d250, L_0x17d7890; +L_0x17d7890 .concat [ 4 2 0 0], v0x179a420_0, L_0x2aef774e32a0; +LS_0x17d7720_0_0 .concat8 [ 11 1 1 1], v0x179d690_2, L_0x17d7340, L_0x17d6f90, L_0x17d6b90; +LS_0x17d7720_0_4 .concat8 [ 1 0 0 0], L_0x17d6780; +L_0x17d7720 .concat8 [ 14 1 0 0], LS_0x17d7720_0_0, LS_0x17d7720_0_4; +LS_0x17d7cd0_0_0 .concat8 [ 11 1 1 1], v0x179d690_3, L_0x17d73e0, L_0x17d72a0, L_0x17d6e60; +LS_0x17d7cd0_0_4 .concat8 [ 1 0 0 0], L_0x17d6a60; +L_0x17d7cd0 .concat8 [ 14 1 0 0], LS_0x17d7cd0_0_0, LS_0x17d7cd0_0_4; +LS_0x17d79f0_0_0 .concat8 [ 11 1 1 1], v0x179d690_0, L_0x17d7160, L_0x17d6d40, L_0x17d6960; +LS_0x17d79f0_0_4 .concat8 [ 1 0 0 0], L_0x17d64a0; +L_0x17d79f0 .concat8 [ 14 1 0 0], LS_0x17d79f0_0_0, LS_0x17d79f0_0_4; +LS_0x17d83c0_0_0 .concat8 [ 11 1 1 1], v0x179d690_1, L_0x17d7490, L_0x17d70c0, L_0x17d6ca0; +LS_0x17d83c0_0_4 .concat8 [ 1 0 0 0], L_0x17d6870; +L_0x17d83c0 .concat8 [ 14 1 0 0], LS_0x17d83c0_0_0, LS_0x17d83c0_0_4; +L_0x17d8030 .part L_0x17d53b0, 14, 4; +L_0x17d8850 .part L_0x17d53b0, 11, 3; +L_0x17d8660 .part L_0x17d53b0, 8, 3; +L_0x17d8aa0 .part L_0x17d53b0, 10, 4; +L_0x17d88f0 .part L_0x17d53b0, 0, 11; +S_0x179ec30 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x16e4740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -214,174 +215,175 @@ S_0xa25f20 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x96baa0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0xa26110 .param/str "memFile" 0 3 60, "jumpTest/down.dat"; -L_0xa57260 .functor BUFZ 11, v0xa263e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa57460 .functor BUFZ 11, v0xa263e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa58320 .functor BUFZ 18, L_0xa5a290, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0xa263e0_0 .var/s "ACC", 10 0; -v0xa264e0_0 .var/s "BAK", 10 0; -v0xa265c0_0 .net "DST", 2 0, L_0xa5b380; 1 drivers -v0xa26680_0 .net/s "IMM", 10 0, L_0xa5b420; 1 drivers -v0xa26760_0 .net "INST", 3 0, L_0xa5ac60; 1 drivers -v0xa26840_0 .net "LABEL", 3 0, L_0xa5b5d0; 1 drivers -v0xa26920_0 .var "PC", 3 0; -v0xa26a00_0 .var "PCNEXT", 3 0; -v0xa26ae0_0 .net "SRC", 2 0, L_0xa5b190; 1 drivers -v0xa26c50_0 .net *"_s103", 0 0, L_0xa595d0; 1 drivers -v0xa26d30_0 .net *"_s107", 0 0, L_0xa594e0; 1 drivers -v0xa26e10_0 .net *"_s111", 0 0, L_0xa597c0; 1 drivers -v0xa26ef0_0 .net *"_s115", 0 0, L_0xa596c0; 1 drivers -v0xa26fd0_0 .net *"_s119", 0 0, L_0xa59a00; 1 drivers -v0xa270b0_0 .net *"_s123", 0 0, L_0xa598f0; 1 drivers -v0xa27190_0 .net *"_s127", 0 0, L_0xa59bc0; 1 drivers -v0xa27270_0 .net *"_s131", 0 0, L_0xa59aa0; 1 drivers -v0xa27420_0 .net *"_s135", 0 0, L_0xa59e20; 1 drivers -v0xa274c0_0 .net *"_s139", 0 0, L_0xa59cf0; 1 drivers -v0xa275a0_0 .net *"_s143", 0 0, L_0xa5a000; 1 drivers -v0xa27680_0 .net *"_s147", 0 0, L_0xa59ec0; 1 drivers -v0xa27760_0 .net *"_s151", 0 0, L_0xa5a1f0; 1 drivers -v0xa27840_0 .net *"_s155", 0 0, L_0xa5a0a0; 1 drivers -v0xa27920_0 .net *"_s159", 0 0, L_0xa5a140; 1 drivers -v0xa27a00_0 .net *"_s160", 17 0, L_0xa5a290; 1 drivers -v0xa27ae0_0 .net *"_s162", 5 0, L_0xa5a5f0; 1 drivers -L_0x2b1dfaa33210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0xa27bc0_0 .net *"_s165", 1 0, L_0x2b1dfaa33210; 1 drivers -v0xa29b50_2 .array/port v0xa29b50, 2; -v0xa27ca0_0 .net *"_s173", 10 0, v0xa29b50_2; 1 drivers -v0xa29b50_3 .array/port v0xa29b50, 3; -v0xa27d80_0 .net *"_s179", 10 0, v0xa29b50_3; 1 drivers -v0xa29b50_0 .array/port v0xa29b50, 0; -v0xa27e60_0 .net *"_s185", 10 0, v0xa29b50_0; 1 drivers -v0xa29b50_1 .array/port v0xa29b50, 1; -v0xa27f40_0 .net *"_s191", 10 0, v0xa29b50_1; 1 drivers -v0xa28020_0 .net *"_s23", 0 0, L_0xa57ab0; 1 drivers -v0xa28100_0 .net *"_s27", 0 0, L_0xa57bd0; 1 drivers -v0xa27350_0 .net *"_s31", 0 0, L_0xa57cc0; 1 drivers -v0xa283d0_0 .net *"_s36", 0 0, L_0xa57fb0; 1 drivers -v0xa284b0_0 .net *"_s42", 0 0, L_0xa581e0; 1 drivers -v0xa28590_0 .net *"_s46", 0 0, L_0xa58280; 1 drivers -v0xa28670_0 .net *"_s50", 0 0, L_0xa58390; 1 drivers -v0xa28750_0 .net *"_s55", 0 0, L_0xa585a0; 1 drivers -v0xa28830_0 .net *"_s61", 0 0, L_0xa58810; 1 drivers -v0xa28910_0 .net *"_s65", 0 0, L_0xa58940; 1 drivers -v0xa289f0_0 .net *"_s69", 0 0, L_0xa58b10; 1 drivers -v0xa28ad0_0 .net *"_s74", 0 0, L_0xa58a70; 1 drivers -v0xa28bb0_0 .net *"_s80", 0 0, L_0xa58ca0; 1 drivers -v0xa28c90_0 .net *"_s84", 0 0, L_0xa58f90; 1 drivers -v0xa28d70_0 .net *"_s88", 0 0, L_0xa58ed0; 1 drivers -v0xa28e50_0 .net *"_s93", 0 0, L_0xa59030; 1 drivers -v0xa28f30_0 .net *"_s99", 0 0, L_0xa592c0; 1 drivers -v0xa29010_0 .net/s "accOut", 10 0, L_0xa57260; alias, 1 drivers -v0xa290f0_0 .net "anyHasData", 0 0, L_0xa580f0; 1 drivers -v0xa291b0_0 .net "anyReadAck", 0 0, L_0xa58e30; 1 drivers -v0xa29270_0 .net "anyWantData", 0 0, L_0xa58690; 1 drivers -v0xa29330_0 .net "anyWriteAck", 0 0, L_0xa593f0; 1 drivers -v0xa293f0_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers -o0x2b1dfaa03cc8 .functor BUFZ 15, C4; HiZ drive -v0xa29490_0 .net "down", 14 0, o0x2b1dfaa03cc8; 0 drivers -v0xa29550_0 .net "downOut", 14 0, L_0xa5a9c0; 1 drivers -v0xa29630_0 .net "instruction", 17 0, L_0xa58320; 1 drivers -v0xa29710 .array "instructions", 15 0, 17 0; -v0xa297d0_0 .var "last", 2 0; -o0x2b1dfaa03d88 .functor BUFZ 15, C4; HiZ drive -v0xa298b0_0 .net "left", 14 0, o0x2b1dfaa03d88; 0 drivers -v0xa29990_0 .net "leftOut", 14 0, L_0xa5a750; 1 drivers -v0xa29a70_0 .var "mode", 2 0; -v0xa29b50 .array/s "outVals", 2 5, 10 0; -v0xa29c90_0 .var "phase", 2 0; -v0xa29d70_0 .net "portsHaveData", 5 2, L_0xa57df0; 1 drivers -v0xa281a0_0 .net "portsWantData", 5 2, L_0xa58430; 1 drivers -v0xa28280_0 .net "readAckIn", 5 2, L_0xa58bb0; 1 drivers -v0xa2a220_0 .var "readAckOut", 5 2; -v0xa2a2c0_0 .var "readTarget", 2 0; -v0xa2a360_0 .var/s "readValue", 10 0; -L_0x2b1dfaa331c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0xa2a400 .array "regVals", 0 7; -v0xa2a400_0 .net/s v0xa2a400 0, 10 0, L_0x2b1dfaa331c8; 1 drivers -v0xa2a400_1 .net/s v0xa2a400 1, 10 0, L_0xa57460; 1 drivers -v0xa2a400_2 .net/s v0xa2a400 2, 10 0, L_0xa577d0; 1 drivers -v0xa2a400_3 .net/s v0xa2a400 3, 10 0, L_0xa57870; 1 drivers -v0xa2a400_4 .net/s v0xa2a400 4, 10 0, L_0xa57910; 1 drivers -v0xa2a400_5 .net/s v0xa2a400 5, 10 0, L_0xa579b0; 1 drivers -o0x2b1dfaa04148 .functor BUFZ 11, C4; HiZ drive -v0xa2a400_6 .net/s v0xa2a400 6, 10 0, o0x2b1dfaa04148; 0 drivers -o0x2b1dfaa04178 .functor BUFZ 11, C4; HiZ drive -v0xa2a400_7 .net/s v0xa2a400 7, 10 0, o0x2b1dfaa04178; 0 drivers -o0x2b1dfaa041a8 .functor BUFZ 15, C4; HiZ drive -v0xa2a610_0 .net "right", 14 0, o0x2b1dfaa041a8; 0 drivers -v0xa2a6f0_0 .net "rightOut", 14 0, L_0xa5af70; 1 drivers -v0xa2a7d0_0 .net "up", 14 0, L_0xa5eca0; alias, 1 drivers -v0xa2a8c0_0 .net "upOut", 14 0, L_0xa5a500; alias, 1 drivers -v0xa2a990_0 .var "weHaveData", 5 2; -v0xa2aa50_0 .var "weWantData", 5 2; -v0xa2ab30_0 .net "writeAckIn", 5 2, L_0xa59100; 1 drivers -v0xa2ac10_0 .var "writeAckOut", 5 2; -v0xa2acf0_0 .var "writeTarget", 2 0; -v0xa2add0_0 .var/s "writeValue", 10 0; -L_0xa577d0 .part o0x2b1dfaa03d88, 0, 11; -L_0xa57870 .part o0x2b1dfaa041a8, 0, 11; -L_0xa57910 .part L_0xa5eca0, 0, 11; -L_0xa579b0 .part o0x2b1dfaa03cc8, 0, 11; -L_0xa57ab0 .part o0x2b1dfaa03d88, 11, 1; -L_0xa57bd0 .part o0x2b1dfaa041a8, 11, 1; -L_0xa57cc0 .part L_0xa5eca0, 11, 1; -L_0xa57df0 .concat8 [ 1 1 1 1], L_0xa57ab0, L_0xa57bd0, L_0xa57cc0, L_0xa57fb0; -L_0xa57fb0 .part o0x2b1dfaa03cc8, 11, 1; -L_0xa580f0 .reduce/or L_0xa57df0; -L_0xa581e0 .part o0x2b1dfaa03d88, 12, 1; -L_0xa58280 .part o0x2b1dfaa041a8, 12, 1; -L_0xa58390 .part L_0xa5eca0, 12, 1; -L_0xa58430 .concat8 [ 1 1 1 1], L_0xa581e0, L_0xa58280, L_0xa58390, L_0xa585a0; -L_0xa585a0 .part o0x2b1dfaa03cc8, 12, 1; -L_0xa58690 .reduce/or L_0xa58430; -L_0xa58810 .part o0x2b1dfaa03d88, 13, 1; -L_0xa58940 .part o0x2b1dfaa041a8, 13, 1; -L_0xa58b10 .part L_0xa5eca0, 13, 1; -L_0xa58bb0 .concat8 [ 1 1 1 1], L_0xa58810, L_0xa58940, L_0xa58b10, L_0xa58a70; -L_0xa58a70 .part o0x2b1dfaa03cc8, 13, 1; -L_0xa58e30 .reduce/or L_0xa58bb0; -L_0xa58ca0 .part o0x2b1dfaa03d88, 14, 1; -L_0xa58f90 .part o0x2b1dfaa041a8, 14, 1; -L_0xa58ed0 .part L_0xa5eca0, 14, 1; -L_0xa59100 .concat8 [ 1 1 1 1], L_0xa58ca0, L_0xa58f90, L_0xa58ed0, L_0xa59030; -L_0xa59030 .part o0x2b1dfaa03cc8, 14, 1; -L_0xa593f0 .reduce/or L_0xa59100; -L_0xa592c0 .part v0xa2a220_0, 0, 1; -L_0xa595d0 .part v0xa2a220_0, 1, 1; -L_0xa594e0 .part v0xa2a220_0, 2, 1; -L_0xa597c0 .part v0xa2a220_0, 3, 1; -L_0xa596c0 .part v0xa2ac10_0, 0, 1; -L_0xa59a00 .part v0xa2ac10_0, 1, 1; -L_0xa598f0 .part v0xa2ac10_0, 2, 1; -L_0xa59bc0 .part v0xa2ac10_0, 3, 1; -L_0xa59aa0 .part v0xa2aa50_0, 0, 1; -L_0xa59e20 .part v0xa2aa50_0, 1, 1; -L_0xa59cf0 .part v0xa2aa50_0, 2, 1; -L_0xa5a000 .part v0xa2aa50_0, 3, 1; -L_0xa59ec0 .part v0xa2a990_0, 0, 1; -L_0xa5a1f0 .part v0xa2a990_0, 1, 1; -L_0xa5a0a0 .part v0xa2a990_0, 2, 1; -L_0xa5a140 .part v0xa2a990_0, 3, 1; -L_0xa5a290 .array/port v0xa29710, L_0xa5a5f0; -L_0xa5a5f0 .concat [ 4 2 0 0], v0xa26920_0, L_0x2b1dfaa33210; -LS_0xa5a500_0_0 .concat8 [ 11 1 1 1], v0xa29b50_2, L_0xa5a0a0, L_0xa59cf0, L_0xa598f0; -LS_0xa5a500_0_4 .concat8 [ 1 0 0 0], L_0xa594e0; -L_0xa5a500 .concat8 [ 14 1 0 0], LS_0xa5a500_0_0, LS_0xa5a500_0_4; -LS_0xa5a9c0_0_0 .concat8 [ 11 1 1 1], v0xa29b50_3, L_0xa5a140, L_0xa5a000, L_0xa59bc0; -LS_0xa5a9c0_0_4 .concat8 [ 1 0 0 0], L_0xa597c0; -L_0xa5a9c0 .concat8 [ 14 1 0 0], LS_0xa5a9c0_0_0, LS_0xa5a9c0_0_4; -LS_0xa5a750_0_0 .concat8 [ 11 1 1 1], v0xa29b50_0, L_0xa59ec0, L_0xa59aa0, L_0xa596c0; -LS_0xa5a750_0_4 .concat8 [ 1 0 0 0], L_0xa592c0; -L_0xa5a750 .concat8 [ 14 1 0 0], LS_0xa5a750_0_0, LS_0xa5a750_0_4; -LS_0xa5af70_0_0 .concat8 [ 11 1 1 1], v0xa29b50_1, L_0xa5a1f0, L_0xa59e20, L_0xa59a00; -LS_0xa5af70_0_4 .concat8 [ 1 0 0 0], L_0xa595d0; -L_0xa5af70 .concat8 [ 14 1 0 0], LS_0xa5af70_0_0, LS_0xa5af70_0_4; -L_0xa5ac60 .part L_0xa58320, 14, 4; -L_0xa5b380 .part L_0xa58320, 11, 3; -L_0xa5b190 .part L_0xa58320, 8, 3; -L_0xa5b5d0 .part L_0xa58320, 10, 4; -L_0xa5b420 .part L_0xa58320, 0, 11; -S_0xa2b050 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x96baa0; +P_0x179ee20 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x179ee60 .param/str "memFile" 0 3 60, "jumpTest/down.dat"; +L_0x17d0290 .functor BUFZ 11, v0x179f1b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17d0490 .functor BUFZ 11, v0x179f1b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17d1350 .functor BUFZ 18, L_0x17d32c0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x179f1b0_0 .var/s "ACC", 10 0; +v0x179f2b0_0 .var/s "BAK", 10 0; +v0x179f390_0 .net "DST", 2 0, L_0x17d43b0; 1 drivers +v0x179f450_0 .net/s "IMM", 10 0, L_0x17d4450; 1 drivers +v0x179f530_0 .net "INST", 3 0, L_0x17d3c90; 1 drivers +v0x179f610_0 .net "LABEL", 3 0, L_0x17d4600; 1 drivers +v0x179f6f0_0 .var "PC", 3 0; +v0x179f7d0_0 .var "PCNEXT", 3 0; +v0x179f8b0_0 .net "SRC", 2 0, L_0x17d41c0; 1 drivers +v0x179fa20_0 .net *"_s103", 0 0, L_0x17d2600; 1 drivers +v0x179fb00_0 .net *"_s107", 0 0, L_0x17d2510; 1 drivers +v0x179fbe0_0 .net *"_s111", 0 0, L_0x17d27f0; 1 drivers +v0x179fcc0_0 .net *"_s115", 0 0, L_0x17d26f0; 1 drivers +v0x179fda0_0 .net *"_s119", 0 0, L_0x17d2a30; 1 drivers +v0x179fe80_0 .net *"_s123", 0 0, L_0x17d2920; 1 drivers +v0x179ff60_0 .net *"_s127", 0 0, L_0x17d2bf0; 1 drivers +v0x17a0040_0 .net *"_s131", 0 0, L_0x17d2ad0; 1 drivers +v0x17a01f0_0 .net *"_s135", 0 0, L_0x17d2e50; 1 drivers +v0x17a0290_0 .net *"_s139", 0 0, L_0x17d2d20; 1 drivers +v0x17a0370_0 .net *"_s143", 0 0, L_0x17d3030; 1 drivers +v0x17a0450_0 .net *"_s147", 0 0, L_0x17d2ef0; 1 drivers +v0x17a0530_0 .net *"_s151", 0 0, L_0x17d3220; 1 drivers +v0x17a0610_0 .net *"_s155", 0 0, L_0x17d30d0; 1 drivers +v0x17a06f0_0 .net *"_s159", 0 0, L_0x17d3170; 1 drivers +v0x17a07d0_0 .net *"_s160", 17 0, L_0x17d32c0; 1 drivers +v0x17a08b0_0 .net *"_s162", 5 0, L_0x17d3620; 1 drivers +L_0x2aef774e3210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x17a0990_0 .net *"_s165", 1 0, L_0x2aef774e3210; 1 drivers +v0x17a2920_2 .array/port v0x17a2920, 2; +v0x17a0a70_0 .net *"_s173", 10 0, v0x17a2920_2; 1 drivers +v0x17a2920_3 .array/port v0x17a2920, 3; +v0x17a0b50_0 .net *"_s179", 10 0, v0x17a2920_3; 1 drivers +v0x17a2920_0 .array/port v0x17a2920, 0; +v0x17a0c30_0 .net *"_s185", 10 0, v0x17a2920_0; 1 drivers +v0x17a2920_1 .array/port v0x17a2920, 1; +v0x17a0d10_0 .net *"_s191", 10 0, v0x17a2920_1; 1 drivers +v0x17a0df0_0 .net *"_s23", 0 0, L_0x17d0ae0; 1 drivers +v0x17a0ed0_0 .net *"_s27", 0 0, L_0x17d0c00; 1 drivers +v0x17a0120_0 .net *"_s31", 0 0, L_0x17d0cf0; 1 drivers +v0x17a11a0_0 .net *"_s36", 0 0, L_0x17d0fe0; 1 drivers +v0x17a1280_0 .net *"_s42", 0 0, L_0x17d1210; 1 drivers +v0x17a1360_0 .net *"_s46", 0 0, L_0x17d12b0; 1 drivers +v0x17a1440_0 .net *"_s50", 0 0, L_0x17d13c0; 1 drivers +v0x17a1520_0 .net *"_s55", 0 0, L_0x17d15d0; 1 drivers +v0x17a1600_0 .net *"_s61", 0 0, L_0x17d1840; 1 drivers +v0x17a16e0_0 .net *"_s65", 0 0, L_0x17d1970; 1 drivers +v0x17a17c0_0 .net *"_s69", 0 0, L_0x17d1b40; 1 drivers +v0x17a18a0_0 .net *"_s74", 0 0, L_0x17d1aa0; 1 drivers +v0x17a1980_0 .net *"_s80", 0 0, L_0x17d1cd0; 1 drivers +v0x17a1a60_0 .net *"_s84", 0 0, L_0x17d1fc0; 1 drivers +v0x17a1b40_0 .net *"_s88", 0 0, L_0x17d1f00; 1 drivers +v0x17a1c20_0 .net *"_s93", 0 0, L_0x17d2060; 1 drivers +v0x17a1d00_0 .net *"_s99", 0 0, L_0x17d22f0; 1 drivers +v0x17a1de0_0 .net/s "accOut", 10 0, L_0x17d0290; alias, 1 drivers +v0x17a1ec0_0 .net "anyHasData", 0 0, L_0x17d1120; 1 drivers +v0x17a1f80_0 .net "anyReadAck", 0 0, L_0x17d1e60; 1 drivers +v0x17a2040_0 .net "anyWantData", 0 0, L_0x17d16c0; 1 drivers +v0x17a2100_0 .net "anyWriteAck", 0 0, L_0x17d2420; 1 drivers +v0x17a21c0_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers +o0x2aef774b3cc8 .functor BUFZ 15, C4; HiZ drive +v0x17a2260_0 .net "down", 14 0, o0x2aef774b3cc8; 0 drivers +v0x17a2320_0 .net "downOut", 14 0, L_0x17d39f0; 1 drivers +v0x17a2400_0 .net "instruction", 17 0, L_0x17d1350; 1 drivers +v0x17a24e0 .array "instructions", 15 0, 17 0; +v0x17a25a0_0 .var "last", 2 0; +o0x2aef774b3d88 .functor BUFZ 15, C4; HiZ drive +v0x17a2680_0 .net "left", 14 0, o0x2aef774b3d88; 0 drivers +v0x17a2760_0 .net "leftOut", 14 0, L_0x17d3780; 1 drivers +v0x17a2840_0 .var "mode", 2 0; +v0x17a2920 .array/s "outVals", 2 5, 10 0; +v0x17a2a60_0 .var "phase", 2 0; +v0x17a2b40_0 .net "portsHaveData", 5 2, L_0x17d0e20; 1 drivers +v0x17a0f70_0 .net "portsWantData", 5 2, L_0x17d1460; 1 drivers +v0x17a1050_0 .net "readAckIn", 5 2, L_0x17d1be0; 1 drivers +v0x17a2ff0_0 .var "readAckOut", 5 2; +v0x17a3090_0 .var "readTarget", 2 0; +v0x17a3130_0 .var/s "readValue", 10 0; +L_0x2aef774e31c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x17a31d0 .array "regVals", 0 7; +v0x17a31d0_0 .net/s v0x17a31d0 0, 10 0, L_0x2aef774e31c8; 1 drivers +v0x17a31d0_1 .net/s v0x17a31d0 1, 10 0, L_0x17d0490; 1 drivers +v0x17a31d0_2 .net/s v0x17a31d0 2, 10 0, L_0x17d0800; 1 drivers +v0x17a31d0_3 .net/s v0x17a31d0 3, 10 0, L_0x17d08a0; 1 drivers +v0x17a31d0_4 .net/s v0x17a31d0 4, 10 0, L_0x17d0940; 1 drivers +v0x17a31d0_5 .net/s v0x17a31d0 5, 10 0, L_0x17d09e0; 1 drivers +o0x2aef774b4148 .functor BUFZ 11, C4; HiZ drive +v0x17a31d0_6 .net/s v0x17a31d0 6, 10 0, o0x2aef774b4148; 0 drivers +o0x2aef774b4178 .functor BUFZ 11, C4; HiZ drive +v0x17a31d0_7 .net/s v0x17a31d0 7, 10 0, o0x2aef774b4178; 0 drivers +o0x2aef774b41a8 .functor BUFZ 15, C4; HiZ drive +v0x17a33e0_0 .net "right", 14 0, o0x2aef774b41a8; 0 drivers +v0x17a34c0_0 .net "rightOut", 14 0, L_0x17d3fa0; 1 drivers +v0x17a35a0_0 .net "up", 14 0, L_0x17d7cd0; alias, 1 drivers +v0x17a3690_0 .net "upOut", 14 0, L_0x17d3530; alias, 1 drivers +v0x17a3760_0 .var "weHaveData", 5 2; +v0x17a3820_0 .var "weWantData", 5 2; +v0x17a3900_0 .net "writeAckIn", 5 2, L_0x17d2130; 1 drivers +v0x17a39e0_0 .var "writeAckOut", 5 2; +v0x17a3ac0_0 .var "writeTarget", 2 0; +v0x17a3ba0_0 .var/s "writeValue", 10 0; +L_0x17d0800 .part o0x2aef774b3d88, 0, 11; +L_0x17d08a0 .part o0x2aef774b41a8, 0, 11; +L_0x17d0940 .part L_0x17d7cd0, 0, 11; +L_0x17d09e0 .part o0x2aef774b3cc8, 0, 11; +L_0x17d0ae0 .part o0x2aef774b3d88, 11, 1; +L_0x17d0c00 .part o0x2aef774b41a8, 11, 1; +L_0x17d0cf0 .part L_0x17d7cd0, 11, 1; +L_0x17d0e20 .concat8 [ 1 1 1 1], L_0x17d0ae0, L_0x17d0c00, L_0x17d0cf0, L_0x17d0fe0; +L_0x17d0fe0 .part o0x2aef774b3cc8, 11, 1; +L_0x17d1120 .reduce/or L_0x17d0e20; +L_0x17d1210 .part o0x2aef774b3d88, 12, 1; +L_0x17d12b0 .part o0x2aef774b41a8, 12, 1; +L_0x17d13c0 .part L_0x17d7cd0, 12, 1; +L_0x17d1460 .concat8 [ 1 1 1 1], L_0x17d1210, L_0x17d12b0, L_0x17d13c0, L_0x17d15d0; +L_0x17d15d0 .part o0x2aef774b3cc8, 12, 1; +L_0x17d16c0 .reduce/or L_0x17d1460; +L_0x17d1840 .part o0x2aef774b3d88, 13, 1; +L_0x17d1970 .part o0x2aef774b41a8, 13, 1; +L_0x17d1b40 .part L_0x17d7cd0, 13, 1; +L_0x17d1be0 .concat8 [ 1 1 1 1], L_0x17d1840, L_0x17d1970, L_0x17d1b40, L_0x17d1aa0; +L_0x17d1aa0 .part o0x2aef774b3cc8, 13, 1; +L_0x17d1e60 .reduce/or L_0x17d1be0; +L_0x17d1cd0 .part o0x2aef774b3d88, 14, 1; +L_0x17d1fc0 .part o0x2aef774b41a8, 14, 1; +L_0x17d1f00 .part L_0x17d7cd0, 14, 1; +L_0x17d2130 .concat8 [ 1 1 1 1], L_0x17d1cd0, L_0x17d1fc0, L_0x17d1f00, L_0x17d2060; +L_0x17d2060 .part o0x2aef774b3cc8, 14, 1; +L_0x17d2420 .reduce/or L_0x17d2130; +L_0x17d22f0 .part v0x17a2ff0_0, 0, 1; +L_0x17d2600 .part v0x17a2ff0_0, 1, 1; +L_0x17d2510 .part v0x17a2ff0_0, 2, 1; +L_0x17d27f0 .part v0x17a2ff0_0, 3, 1; +L_0x17d26f0 .part v0x17a39e0_0, 0, 1; +L_0x17d2a30 .part v0x17a39e0_0, 1, 1; +L_0x17d2920 .part v0x17a39e0_0, 2, 1; +L_0x17d2bf0 .part v0x17a39e0_0, 3, 1; +L_0x17d2ad0 .part v0x17a3820_0, 0, 1; +L_0x17d2e50 .part v0x17a3820_0, 1, 1; +L_0x17d2d20 .part v0x17a3820_0, 2, 1; +L_0x17d3030 .part v0x17a3820_0, 3, 1; +L_0x17d2ef0 .part v0x17a3760_0, 0, 1; +L_0x17d3220 .part v0x17a3760_0, 1, 1; +L_0x17d30d0 .part v0x17a3760_0, 2, 1; +L_0x17d3170 .part v0x17a3760_0, 3, 1; +L_0x17d32c0 .array/port v0x17a24e0, L_0x17d3620; +L_0x17d3620 .concat [ 4 2 0 0], v0x179f6f0_0, L_0x2aef774e3210; +LS_0x17d3530_0_0 .concat8 [ 11 1 1 1], v0x17a2920_2, L_0x17d30d0, L_0x17d2d20, L_0x17d2920; +LS_0x17d3530_0_4 .concat8 [ 1 0 0 0], L_0x17d2510; +L_0x17d3530 .concat8 [ 14 1 0 0], LS_0x17d3530_0_0, LS_0x17d3530_0_4; +LS_0x17d39f0_0_0 .concat8 [ 11 1 1 1], v0x17a2920_3, L_0x17d3170, L_0x17d3030, L_0x17d2bf0; +LS_0x17d39f0_0_4 .concat8 [ 1 0 0 0], L_0x17d27f0; +L_0x17d39f0 .concat8 [ 14 1 0 0], LS_0x17d39f0_0_0, LS_0x17d39f0_0_4; +LS_0x17d3780_0_0 .concat8 [ 11 1 1 1], v0x17a2920_0, L_0x17d2ef0, L_0x17d2ad0, L_0x17d26f0; +LS_0x17d3780_0_4 .concat8 [ 1 0 0 0], L_0x17d22f0; +L_0x17d3780 .concat8 [ 14 1 0 0], LS_0x17d3780_0_0, LS_0x17d3780_0_4; +LS_0x17d3fa0_0_0 .concat8 [ 11 1 1 1], v0x17a2920_1, L_0x17d3220, L_0x17d2e50, L_0x17d2a30; +LS_0x17d3fa0_0_4 .concat8 [ 1 0 0 0], L_0x17d2600; +L_0x17d3fa0 .concat8 [ 14 1 0 0], LS_0x17d3fa0_0_0, LS_0x17d3fa0_0_4; +L_0x17d3c90 .part L_0x17d1350, 14, 4; +L_0x17d43b0 .part L_0x17d1350, 11, 3; +L_0x17d41c0 .part L_0x17d1350, 8, 3; +L_0x17d4600 .part L_0x17d1350, 10, 4; +L_0x17d4450 .part L_0x17d1350, 0, 11; +S_0x17a3e20 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x16e4740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -393,174 +395,175 @@ S_0xa2b050 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x96baa0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0xa2b250 .param/str "memFile" 0 3 60, "jumpTest/left.dat"; -L_0xa3b310 .functor BUFZ 11, v0xa2b520_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa4b3b0 .functor BUFZ 11, v0xa2b520_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa4e110 .functor BUFZ 18, L_0xa4df20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0xa2b520_0 .var/s "ACC", 10 0; -v0xa2b620_0 .var/s "BAK", 10 0; -v0xa2b700_0 .net "DST", 2 0, L_0xa4f0b0; 1 drivers -v0xa2b7c0_0 .net/s "IMM", 10 0, L_0xa4f150; 1 drivers -v0xa2b8a0_0 .net "INST", 3 0, L_0xa4e990; 1 drivers -v0xa2b980_0 .net "LABEL", 3 0, L_0xa4f300; 1 drivers -v0xa2ba60_0 .var "PC", 3 0; -v0xa2bb40_0 .var "PCNEXT", 3 0; -v0xa2bc20_0 .net "SRC", 2 0, L_0xa4eec0; 1 drivers -v0xa2bd90_0 .net *"_s103", 0 0, L_0xa4d260; 1 drivers -v0xa2be70_0 .net *"_s107", 0 0, L_0xa4d170; 1 drivers -v0xa2bf50_0 .net *"_s111", 0 0, L_0xa4d450; 1 drivers -v0xa2b330_0 .net *"_s115", 0 0, L_0xa4d350; 1 drivers -v0xa2bff0_0 .net *"_s119", 0 0, L_0xa4d690; 1 drivers -v0xa2c0d0_0 .net *"_s123", 0 0, L_0xa4d580; 1 drivers -v0xa2c1b0_0 .net *"_s127", 0 0, L_0xa4d850; 1 drivers -v0xa2c290_0 .net *"_s131", 0 0, L_0xa4d730; 1 drivers -v0xa2c440_0 .net *"_s135", 0 0, L_0xa4dab0; 1 drivers -v0xa2c4e0_0 .net *"_s139", 0 0, L_0xa4d980; 1 drivers -v0xa2c5c0_0 .net *"_s143", 0 0, L_0xa4dc90; 1 drivers -v0xa2c6a0_0 .net *"_s147", 0 0, L_0xa4db50; 1 drivers -v0xa2c780_0 .net *"_s151", 0 0, L_0xa4de80; 1 drivers -v0xa2c860_0 .net *"_s155", 0 0, L_0xa4dd30; 1 drivers -v0xa2c940_0 .net *"_s159", 0 0, L_0xa4ddd0; 1 drivers -v0xa2ca20_0 .net *"_s160", 17 0, L_0xa4df20; 1 drivers -v0xa2cb00_0 .net *"_s162", 5 0, L_0xa4e280; 1 drivers -L_0x2b1dfaa33060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0xa2cbe0_0 .net *"_s165", 1 0, L_0x2b1dfaa33060; 1 drivers -v0xa2ebe0_2 .array/port v0xa2ebe0, 2; -v0xa2ccc0_0 .net *"_s173", 10 0, v0xa2ebe0_2; 1 drivers -v0xa2ebe0_3 .array/port v0xa2ebe0, 3; -v0xa2cda0_0 .net *"_s179", 10 0, v0xa2ebe0_3; 1 drivers -v0xa2ebe0_0 .array/port v0xa2ebe0, 0; -v0xa2ce80_0 .net *"_s185", 10 0, v0xa2ebe0_0; 1 drivers -v0xa2ebe0_1 .array/port v0xa2ebe0, 1; -v0xa2cf60_0 .net *"_s191", 10 0, v0xa2ebe0_1; 1 drivers -v0xa2d040_0 .net *"_s23", 0 0, L_0xa4b810; 1 drivers -v0xa2d120_0 .net *"_s27", 0 0, L_0xa4b930; 1 drivers -v0xa2c370_0 .net *"_s31", 0 0, L_0xa4baa0; 1 drivers -v0xa2d3f0_0 .net *"_s36", 0 0, L_0xa4bd50; 1 drivers -v0xa2d4d0_0 .net *"_s42", 0 0, L_0xa4bfe0; 1 drivers -v0xa2d5b0_0 .net *"_s46", 0 0, L_0xa4c080; 1 drivers -v0xa2d690_0 .net *"_s50", 0 0, L_0xa4c190; 1 drivers -v0xa2d770_0 .net *"_s55", 0 0, L_0xa4c420; 1 drivers -v0xa2d850_0 .net *"_s61", 0 0, L_0xa4c690; 1 drivers -v0xa2d930_0 .net *"_s65", 0 0, L_0xa4c7c0; 1 drivers -v0xa2da10_0 .net *"_s69", 0 0, L_0xa4c900; 1 drivers -v0xa2daf0_0 .net *"_s74", 0 0, L_0xa4c860; 1 drivers -v0xa2dbd0_0 .net *"_s80", 0 0, L_0xa4caf0; 1 drivers -v0xa2dcb0_0 .net *"_s84", 0 0, L_0xa4cde0; 1 drivers -v0xa2dd90_0 .net *"_s88", 0 0, L_0xa4cd20; 1 drivers -v0xa2de70_0 .net *"_s93", 0 0, L_0xa2f680; 1 drivers -v0xa2df50_0 .net *"_s99", 0 0, L_0xa4cff0; 1 drivers -v0xa2e030_0 .net/s "accOut", 10 0, L_0xa3b310; alias, 1 drivers -v0xa2e110_0 .net "anyHasData", 0 0, L_0xa4be90; 1 drivers -v0xa2e1d0_0 .net "anyReadAck", 0 0, L_0xa4cc80; 1 drivers -v0xa2e290_0 .net "anyWantData", 0 0, L_0xa4c510; 1 drivers -v0xa2e350_0 .net "anyWriteAck", 0 0, L_0xa4d0d0; 1 drivers -v0xa2e410_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers -o0x2b1dfaa04ef8 .functor BUFZ 15, C4; HiZ drive -v0xa2e500_0 .net "down", 14 0, o0x2b1dfaa04ef8; 0 drivers -v0xa2e5e0_0 .net "downOut", 14 0, L_0xa4e6f0; 1 drivers -v0xa2e6c0_0 .net "instruction", 17 0, L_0xa4e110; 1 drivers -v0xa2e7a0 .array "instructions", 15 0, 17 0; -v0xa2e860_0 .var "last", 2 0; -o0x2b1dfaa04fb8 .functor BUFZ 15, C4; HiZ drive -v0xa2e940_0 .net "left", 14 0, o0x2b1dfaa04fb8; 0 drivers -v0xa2ea20_0 .net "leftOut", 14 0, L_0xa4e3e0; 1 drivers -v0xa2eb00_0 .var "mode", 2 0; -v0xa2ebe0 .array/s "outVals", 2 5, 10 0; -v0xa2ed20_0 .var "phase", 2 0; -v0xa2ee00_0 .net "portsHaveData", 5 2, L_0xa4bb40; 1 drivers -v0xa2d200_0 .net "portsWantData", 5 2, L_0xa4c230; 1 drivers -v0xa2d2e0_0 .net "readAckIn", 5 2, L_0xa4c9a0; 1 drivers -v0xa2f2b0_0 .var "readAckOut", 5 2; -v0xa2f390_0 .var "readTarget", 2 0; -v0xa2f470_0 .var/s "readValue", 10 0; -L_0x2b1dfaa33018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0xa2f550 .array "regVals", 0 7; -v0xa2f550_0 .net/s v0xa2f550 0, 10 0, L_0x2b1dfaa33018; 1 drivers -v0xa2f550_1 .net/s v0xa2f550 1, 10 0, L_0xa4b3b0; 1 drivers -v0xa2f550_2 .net/s v0xa2f550 2, 10 0, L_0xa4b470; 1 drivers -v0xa2f550_3 .net/s v0xa2f550 3, 10 0, L_0xa4b510; 1 drivers -v0xa2f550_4 .net/s v0xa2f550 4, 10 0, L_0xa4b5e0; 1 drivers -v0xa2f550_5 .net/s v0xa2f550 5, 10 0, L_0xa4b6e0; 1 drivers -o0x2b1dfaa05378 .functor BUFZ 11, C4; HiZ drive -v0xa2f550_6 .net/s v0xa2f550 6, 10 0, o0x2b1dfaa05378; 0 drivers -o0x2b1dfaa053a8 .functor BUFZ 11, C4; HiZ drive -v0xa2f550_7 .net/s v0xa2f550 7, 10 0, o0x2b1dfaa053a8; 0 drivers -v0xa2f760_0 .net "right", 14 0, L_0xa5e9c0; alias, 1 drivers -v0xa2f850_0 .net "rightOut", 14 0, L_0xa4eca0; alias, 1 drivers -o0x2b1dfaa053d8 .functor BUFZ 15, C4; HiZ drive -v0xa2f920_0 .net "up", 14 0, o0x2b1dfaa053d8; 0 drivers -v0xa2f9e0_0 .net "upOut", 14 0, L_0xa4e4a0; 1 drivers -v0xa2fac0_0 .var "weHaveData", 5 2; -v0xa2fba0_0 .var "weWantData", 5 2; -v0xa2fc80_0 .net "writeAckIn", 5 2, L_0xa4cf50; 1 drivers -v0xa2fd60_0 .var "writeAckOut", 5 2; -v0xa2fe40_0 .var "writeTarget", 2 0; -v0xa2ff20_0 .var/s "writeValue", 10 0; -L_0xa4b470 .part o0x2b1dfaa04fb8, 0, 11; -L_0xa4b510 .part L_0xa5e9c0, 0, 11; -L_0xa4b5e0 .part o0x2b1dfaa053d8, 0, 11; -L_0xa4b6e0 .part o0x2b1dfaa04ef8, 0, 11; -L_0xa4b810 .part o0x2b1dfaa04fb8, 11, 1; -L_0xa4b930 .part L_0xa5e9c0, 11, 1; -L_0xa4baa0 .part o0x2b1dfaa053d8, 11, 1; -L_0xa4bb40 .concat8 [ 1 1 1 1], L_0xa4b810, L_0xa4b930, L_0xa4baa0, L_0xa4bd50; -L_0xa4bd50 .part o0x2b1dfaa04ef8, 11, 1; -L_0xa4be90 .reduce/or L_0xa4bb40; -L_0xa4bfe0 .part o0x2b1dfaa04fb8, 12, 1; -L_0xa4c080 .part L_0xa5e9c0, 12, 1; -L_0xa4c190 .part o0x2b1dfaa053d8, 12, 1; -L_0xa4c230 .concat8 [ 1 1 1 1], L_0xa4bfe0, L_0xa4c080, L_0xa4c190, L_0xa4c420; -L_0xa4c420 .part o0x2b1dfaa04ef8, 12, 1; -L_0xa4c510 .reduce/or L_0xa4c230; -L_0xa4c690 .part o0x2b1dfaa04fb8, 13, 1; -L_0xa4c7c0 .part L_0xa5e9c0, 13, 1; -L_0xa4c900 .part o0x2b1dfaa053d8, 13, 1; -L_0xa4c9a0 .concat8 [ 1 1 1 1], L_0xa4c690, L_0xa4c7c0, L_0xa4c900, L_0xa4c860; -L_0xa4c860 .part o0x2b1dfaa04ef8, 13, 1; -L_0xa4cc80 .reduce/or L_0xa4c9a0; -L_0xa4caf0 .part o0x2b1dfaa04fb8, 14, 1; -L_0xa4cde0 .part L_0xa5e9c0, 14, 1; -L_0xa4cd20 .part o0x2b1dfaa053d8, 14, 1; -L_0xa4cf50 .concat8 [ 1 1 1 1], L_0xa4caf0, L_0xa4cde0, L_0xa4cd20, L_0xa2f680; -L_0xa2f680 .part o0x2b1dfaa04ef8, 14, 1; -L_0xa4d0d0 .reduce/or L_0xa4cf50; -L_0xa4cff0 .part v0xa2f2b0_0, 0, 1; -L_0xa4d260 .part v0xa2f2b0_0, 1, 1; -L_0xa4d170 .part v0xa2f2b0_0, 2, 1; -L_0xa4d450 .part v0xa2f2b0_0, 3, 1; -L_0xa4d350 .part v0xa2fd60_0, 0, 1; -L_0xa4d690 .part v0xa2fd60_0, 1, 1; -L_0xa4d580 .part v0xa2fd60_0, 2, 1; -L_0xa4d850 .part v0xa2fd60_0, 3, 1; -L_0xa4d730 .part v0xa2fba0_0, 0, 1; -L_0xa4dab0 .part v0xa2fba0_0, 1, 1; -L_0xa4d980 .part v0xa2fba0_0, 2, 1; -L_0xa4dc90 .part v0xa2fba0_0, 3, 1; -L_0xa4db50 .part v0xa2fac0_0, 0, 1; -L_0xa4de80 .part v0xa2fac0_0, 1, 1; -L_0xa4dd30 .part v0xa2fac0_0, 2, 1; -L_0xa4ddd0 .part v0xa2fac0_0, 3, 1; -L_0xa4df20 .array/port v0xa2e7a0, L_0xa4e280; -L_0xa4e280 .concat [ 4 2 0 0], v0xa2ba60_0, L_0x2b1dfaa33060; -LS_0xa4e4a0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_2, L_0xa4dd30, L_0xa4d980, L_0xa4d580; -LS_0xa4e4a0_0_4 .concat8 [ 1 0 0 0], L_0xa4d170; -L_0xa4e4a0 .concat8 [ 14 1 0 0], LS_0xa4e4a0_0_0, LS_0xa4e4a0_0_4; -LS_0xa4e6f0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_3, L_0xa4ddd0, L_0xa4dc90, L_0xa4d850; -LS_0xa4e6f0_0_4 .concat8 [ 1 0 0 0], L_0xa4d450; -L_0xa4e6f0 .concat8 [ 14 1 0 0], LS_0xa4e6f0_0_0, LS_0xa4e6f0_0_4; -LS_0xa4e3e0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_0, L_0xa4db50, L_0xa4d730, L_0xa4d350; -LS_0xa4e3e0_0_4 .concat8 [ 1 0 0 0], L_0xa4cff0; -L_0xa4e3e0 .concat8 [ 14 1 0 0], LS_0xa4e3e0_0_0, LS_0xa4e3e0_0_4; -LS_0xa4eca0_0_0 .concat8 [ 11 1 1 1], v0xa2ebe0_1, L_0xa4de80, L_0xa4dab0, L_0xa4d690; -LS_0xa4eca0_0_4 .concat8 [ 1 0 0 0], L_0xa4d260; -L_0xa4eca0 .concat8 [ 14 1 0 0], LS_0xa4eca0_0_0, LS_0xa4eca0_0_4; -L_0xa4e990 .part L_0xa4e110, 14, 4; -L_0xa4f0b0 .part L_0xa4e110, 11, 3; -L_0xa4eec0 .part L_0xa4e110, 8, 3; -L_0xa4f300 .part L_0xa4e110, 10, 4; -L_0xa4f150 .part L_0xa4e110, 0, 11; -S_0xa301a0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x96baa0; +P_0x17a3ff0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x17a4030 .param/str "memFile" 0 3 60, "jumpTest/left.dat"; +L_0x17b4320 .functor BUFZ 11, v0x17a43b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17c43c0 .functor BUFZ 11, v0x17a43b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17c5090 .functor BUFZ 18, L_0x17c7080, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x17a43b0_0 .var/s "ACC", 10 0; +v0x17a44b0_0 .var/s "BAK", 10 0; +v0x17a4590_0 .net "DST", 2 0, L_0x17c81c0; 1 drivers +v0x17a4650_0 .net/s "IMM", 10 0, L_0x17c8260; 1 drivers +v0x17a4730_0 .net "INST", 3 0, L_0x17c7aa0; 1 drivers +v0x17a4810_0 .net "LABEL", 3 0, L_0x17c8410; 1 drivers +v0x17a48f0_0 .var "PC", 3 0; +v0x17a49d0_0 .var "PCNEXT", 3 0; +v0x17a4ab0_0 .net "SRC", 2 0, L_0x17c7fd0; 1 drivers +v0x17a4c20_0 .net *"_s103", 0 0, L_0x17c63c0; 1 drivers +v0x17a4d00_0 .net *"_s107", 0 0, L_0x17c62d0; 1 drivers +v0x17a4de0_0 .net *"_s111", 0 0, L_0x17c65b0; 1 drivers +v0x17a4ec0_0 .net *"_s115", 0 0, L_0x17c64b0; 1 drivers +v0x17a4fa0_0 .net *"_s119", 0 0, L_0x17c67f0; 1 drivers +v0x17a5080_0 .net *"_s123", 0 0, L_0x17c66e0; 1 drivers +v0x17a5160_0 .net *"_s127", 0 0, L_0x17c69b0; 1 drivers +v0x17a5240_0 .net *"_s131", 0 0, L_0x17c6890; 1 drivers +v0x17a53f0_0 .net *"_s135", 0 0, L_0x17c6c10; 1 drivers +v0x17a5490_0 .net *"_s139", 0 0, L_0x17c6ae0; 1 drivers +v0x17a5570_0 .net *"_s143", 0 0, L_0x17c6df0; 1 drivers +v0x17a5650_0 .net *"_s147", 0 0, L_0x17c6cb0; 1 drivers +v0x17a5730_0 .net *"_s151", 0 0, L_0x17c6fe0; 1 drivers +v0x17a5810_0 .net *"_s155", 0 0, L_0x17c6e90; 1 drivers +v0x17a58f0_0 .net *"_s159", 0 0, L_0x17c6f30; 1 drivers +v0x17a59d0_0 .net *"_s160", 17 0, L_0x17c7080; 1 drivers +v0x17a5ab0_0 .net *"_s162", 5 0, L_0x17c73e0; 1 drivers +L_0x2aef774e3060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x17a5b90_0 .net *"_s165", 1 0, L_0x2aef774e3060; 1 drivers +v0x17a7b40_2 .array/port v0x17a7b40, 2; +v0x17a5c70_0 .net *"_s173", 10 0, v0x17a7b40_2; 1 drivers +v0x17a7b40_3 .array/port v0x17a7b40, 3; +v0x17a5d50_0 .net *"_s179", 10 0, v0x17a7b40_3; 1 drivers +v0x17a7b40_0 .array/port v0x17a7b40, 0; +v0x17a5e30_0 .net *"_s185", 10 0, v0x17a7b40_0; 1 drivers +v0x17a7b40_1 .array/port v0x17a7b40, 1; +v0x17a5f10_0 .net *"_s191", 10 0, v0x17a7b40_1; 1 drivers +v0x17a5ff0_0 .net *"_s23", 0 0, L_0x17c4820; 1 drivers +v0x17a60d0_0 .net *"_s27", 0 0, L_0x17c4940; 1 drivers +v0x17a5320_0 .net *"_s31", 0 0, L_0x17c4ab0; 1 drivers +v0x17a63a0_0 .net *"_s36", 0 0, L_0x17c4d60; 1 drivers +v0x17a6480_0 .net *"_s42", 0 0, L_0x17a8500; 1 drivers +v0x17a6560_0 .net *"_s46", 0 0, L_0x17c4ff0; 1 drivers +v0x17a6640_0 .net *"_s50", 0 0, L_0x17c5100; 1 drivers +v0x17a6720_0 .net *"_s55", 0 0, L_0x17c5360; 1 drivers +v0x17a6800_0 .net *"_s61", 0 0, L_0x17c55d0; 1 drivers +v0x17a68e0_0 .net *"_s65", 0 0, L_0x17c5700; 1 drivers +v0x17a69c0_0 .net *"_s69", 0 0, L_0x17c5840; 1 drivers +v0x17a6aa0_0 .net *"_s74", 0 0, L_0x17c57a0; 1 drivers +v0x17a6b80_0 .net *"_s80", 0 0, L_0x17c5a60; 1 drivers +v0x17a6c60_0 .net *"_s84", 0 0, L_0x17c5d50; 1 drivers +v0x17a6d40_0 .net *"_s88", 0 0, L_0x17c5c90; 1 drivers +v0x17a6e20_0 .net *"_s93", 0 0, L_0x17c5df0; 1 drivers +v0x17a6f00_0 .net *"_s99", 0 0, L_0x17c60b0; 1 drivers +v0x17a6fe0_0 .net/s "accOut", 10 0, L_0x17b4320; alias, 1 drivers +v0x17a70c0_0 .net "anyHasData", 0 0, L_0x17c4ea0; 1 drivers +v0x17a7180_0 .net "anyReadAck", 0 0, L_0x17c5bf0; 1 drivers +v0x17a7240_0 .net "anyWantData", 0 0, L_0x17c5450; 1 drivers +v0x17a7300_0 .net "anyWriteAck", 0 0, L_0x17c61e0; 1 drivers +v0x17a73c0_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers +o0x2aef774b4ef8 .functor BUFZ 15, C4; HiZ drive +v0x17a7460_0 .net "down", 14 0, o0x2aef774b4ef8; 0 drivers +v0x17a7540_0 .net "downOut", 14 0, L_0x17c7800; 1 drivers +v0x17a7620_0 .net "instruction", 17 0, L_0x17c5090; 1 drivers +v0x17a7700 .array "instructions", 15 0, 17 0; +v0x17a77c0_0 .var "last", 2 0; +o0x2aef774b4fb8 .functor BUFZ 15, C4; HiZ drive +v0x17a78a0_0 .net "left", 14 0, o0x2aef774b4fb8; 0 drivers +v0x17a7980_0 .net "leftOut", 14 0, L_0x17c7540; 1 drivers +v0x17a7a60_0 .var "mode", 2 0; +v0x17a7b40 .array/s "outVals", 2 5, 10 0; +v0x17a7c80_0 .var "phase", 2 0; +v0x17a7d60_0 .net "portsHaveData", 5 2, L_0x17c4b50; 1 drivers +v0x17a4160_0 .net "portsWantData", 5 2, L_0x17c51a0; 1 drivers +v0x17a61b0_0 .net "readAckIn", 5 2, L_0x17c5970; 1 drivers +v0x17a6290_0 .var "readAckOut", 5 2; +v0x17a8210_0 .var "readTarget", 2 0; +v0x17a82f0_0 .var/s "readValue", 10 0; +L_0x2aef774e3018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x17a83d0 .array "regVals", 0 7; +v0x17a83d0_0 .net/s v0x17a83d0 0, 10 0, L_0x2aef774e3018; 1 drivers +v0x17a83d0_1 .net/s v0x17a83d0 1, 10 0, L_0x17c43c0; 1 drivers +v0x17a83d0_2 .net/s v0x17a83d0 2, 10 0, L_0x17c4480; 1 drivers +v0x17a83d0_3 .net/s v0x17a83d0 3, 10 0, L_0x17c4520; 1 drivers +v0x17a83d0_4 .net/s v0x17a83d0 4, 10 0, L_0x17c45f0; 1 drivers +v0x17a83d0_5 .net/s v0x17a83d0 5, 10 0, L_0x17c46f0; 1 drivers +o0x2aef774b5378 .functor BUFZ 11, C4; HiZ drive +v0x17a83d0_6 .net/s v0x17a83d0 6, 10 0, o0x2aef774b5378; 0 drivers +o0x2aef774b53a8 .functor BUFZ 11, C4; HiZ drive +v0x17a83d0_7 .net/s v0x17a83d0 7, 10 0, o0x2aef774b53a8; 0 drivers +v0x17a85e0_0 .net "right", 14 0, L_0x17d79f0; alias, 1 drivers +v0x17a86d0_0 .net "rightOut", 14 0, L_0x17c7db0; alias, 1 drivers +o0x2aef774b53d8 .functor BUFZ 15, C4; HiZ drive +v0x17a87a0_0 .net "up", 14 0, o0x2aef774b53d8; 0 drivers +v0x17a8860_0 .net "upOut", 14 0, L_0x17c72f0; 1 drivers +v0x17a8940_0 .var "weHaveData", 5 2; +v0x17a8a20_0 .var "weWantData", 5 2; +v0x17a8b00_0 .net "writeAckIn", 5 2, L_0x17c5ec0; 1 drivers +v0x17a8be0_0 .var "writeAckOut", 5 2; +v0x17a8cc0_0 .var "writeTarget", 2 0; +v0x17a8da0_0 .var/s "writeValue", 10 0; +L_0x17c4480 .part o0x2aef774b4fb8, 0, 11; +L_0x17c4520 .part L_0x17d79f0, 0, 11; +L_0x17c45f0 .part o0x2aef774b53d8, 0, 11; +L_0x17c46f0 .part o0x2aef774b4ef8, 0, 11; +L_0x17c4820 .part o0x2aef774b4fb8, 11, 1; +L_0x17c4940 .part L_0x17d79f0, 11, 1; +L_0x17c4ab0 .part o0x2aef774b53d8, 11, 1; +L_0x17c4b50 .concat8 [ 1 1 1 1], L_0x17c4820, L_0x17c4940, L_0x17c4ab0, L_0x17c4d60; +L_0x17c4d60 .part o0x2aef774b4ef8, 11, 1; +L_0x17c4ea0 .reduce/or L_0x17c4b50; +L_0x17a8500 .part o0x2aef774b4fb8, 12, 1; +L_0x17c4ff0 .part L_0x17d79f0, 12, 1; +L_0x17c5100 .part o0x2aef774b53d8, 12, 1; +L_0x17c51a0 .concat8 [ 1 1 1 1], L_0x17a8500, L_0x17c4ff0, L_0x17c5100, L_0x17c5360; +L_0x17c5360 .part o0x2aef774b4ef8, 12, 1; +L_0x17c5450 .reduce/or L_0x17c51a0; +L_0x17c55d0 .part o0x2aef774b4fb8, 13, 1; +L_0x17c5700 .part L_0x17d79f0, 13, 1; +L_0x17c5840 .part o0x2aef774b53d8, 13, 1; +L_0x17c5970 .concat8 [ 1 1 1 1], L_0x17c55d0, L_0x17c5700, L_0x17c5840, L_0x17c57a0; +L_0x17c57a0 .part o0x2aef774b4ef8, 13, 1; +L_0x17c5bf0 .reduce/or L_0x17c5970; +L_0x17c5a60 .part o0x2aef774b4fb8, 14, 1; +L_0x17c5d50 .part L_0x17d79f0, 14, 1; +L_0x17c5c90 .part o0x2aef774b53d8, 14, 1; +L_0x17c5ec0 .concat8 [ 1 1 1 1], L_0x17c5a60, L_0x17c5d50, L_0x17c5c90, L_0x17c5df0; +L_0x17c5df0 .part o0x2aef774b4ef8, 14, 1; +L_0x17c61e0 .reduce/or L_0x17c5ec0; +L_0x17c60b0 .part v0x17a6290_0, 0, 1; +L_0x17c63c0 .part v0x17a6290_0, 1, 1; +L_0x17c62d0 .part v0x17a6290_0, 2, 1; +L_0x17c65b0 .part v0x17a6290_0, 3, 1; +L_0x17c64b0 .part v0x17a8be0_0, 0, 1; +L_0x17c67f0 .part v0x17a8be0_0, 1, 1; +L_0x17c66e0 .part v0x17a8be0_0, 2, 1; +L_0x17c69b0 .part v0x17a8be0_0, 3, 1; +L_0x17c6890 .part v0x17a8a20_0, 0, 1; +L_0x17c6c10 .part v0x17a8a20_0, 1, 1; +L_0x17c6ae0 .part v0x17a8a20_0, 2, 1; +L_0x17c6df0 .part v0x17a8a20_0, 3, 1; +L_0x17c6cb0 .part v0x17a8940_0, 0, 1; +L_0x17c6fe0 .part v0x17a8940_0, 1, 1; +L_0x17c6e90 .part v0x17a8940_0, 2, 1; +L_0x17c6f30 .part v0x17a8940_0, 3, 1; +L_0x17c7080 .array/port v0x17a7700, L_0x17c73e0; +L_0x17c73e0 .concat [ 4 2 0 0], v0x17a48f0_0, L_0x2aef774e3060; +LS_0x17c72f0_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_2, L_0x17c6e90, L_0x17c6ae0, L_0x17c66e0; +LS_0x17c72f0_0_4 .concat8 [ 1 0 0 0], L_0x17c62d0; +L_0x17c72f0 .concat8 [ 14 1 0 0], LS_0x17c72f0_0_0, LS_0x17c72f0_0_4; +LS_0x17c7800_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_3, L_0x17c6f30, L_0x17c6df0, L_0x17c69b0; +LS_0x17c7800_0_4 .concat8 [ 1 0 0 0], L_0x17c65b0; +L_0x17c7800 .concat8 [ 14 1 0 0], LS_0x17c7800_0_0, LS_0x17c7800_0_4; +LS_0x17c7540_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_0, L_0x17c6cb0, L_0x17c6890, L_0x17c64b0; +LS_0x17c7540_0_4 .concat8 [ 1 0 0 0], L_0x17c60b0; +L_0x17c7540 .concat8 [ 14 1 0 0], LS_0x17c7540_0_0, LS_0x17c7540_0_4; +LS_0x17c7db0_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_1, L_0x17c6fe0, L_0x17c6c10, L_0x17c67f0; +LS_0x17c7db0_0_4 .concat8 [ 1 0 0 0], L_0x17c63c0; +L_0x17c7db0 .concat8 [ 14 1 0 0], LS_0x17c7db0_0_0, LS_0x17c7db0_0_4; +L_0x17c7aa0 .part L_0x17c5090, 14, 4; +L_0x17c81c0 .part L_0x17c5090, 11, 3; +L_0x17c7fd0 .part L_0x17c5090, 8, 3; +L_0x17c8410 .part L_0x17c5090, 10, 4; +L_0x17c8260 .part L_0x17c5090, 0, 11; +S_0x17a9020 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x16e4740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -572,174 +575,175 @@ S_0xa301a0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x96baa0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0xa30370 .param/str "memFile" 0 3 60, "jumpTest/right.dat"; -L_0xa4eff0 .functor BUFZ 11, v0xa30660_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa4f1f0 .functor BUFZ 11, v0xa30660_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa50140 .functor BUFZ 18, L_0xa52130, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0xa30660_0 .var/s "ACC", 10 0; -v0xa30760_0 .var/s "BAK", 10 0; -v0xa30840_0 .net "DST", 2 0, L_0xa53270; 1 drivers -v0xa30900_0 .net/s "IMM", 10 0, L_0xa53310; 1 drivers -v0xa309e0_0 .net "INST", 3 0, L_0xa52b50; 1 drivers -v0xa30ac0_0 .net "LABEL", 3 0, L_0xa534c0; 1 drivers -v0xa30ba0_0 .var "PC", 3 0; -v0xa30c80_0 .var "PCNEXT", 3 0; -v0xa30d60_0 .net "SRC", 2 0, L_0xa53080; 1 drivers -v0xa30ed0_0 .net *"_s103", 0 0, L_0xa51470; 1 drivers -v0xa30fb0_0 .net *"_s107", 0 0, L_0xa51380; 1 drivers -v0xa31090_0 .net *"_s111", 0 0, L_0xa51660; 1 drivers -v0xa31170_0 .net *"_s115", 0 0, L_0xa51560; 1 drivers -v0xa31250_0 .net *"_s119", 0 0, L_0xa518a0; 1 drivers -v0xa31330_0 .net *"_s123", 0 0, L_0xa51790; 1 drivers -v0xa31410_0 .net *"_s127", 0 0, L_0xa51a60; 1 drivers -v0xa314f0_0 .net *"_s131", 0 0, L_0xa51940; 1 drivers -v0xa316a0_0 .net *"_s135", 0 0, L_0xa51cc0; 1 drivers -v0xa31740_0 .net *"_s139", 0 0, L_0xa51b90; 1 drivers -v0xa31820_0 .net *"_s143", 0 0, L_0xa51ea0; 1 drivers -v0xa31900_0 .net *"_s147", 0 0, L_0xa51d60; 1 drivers -v0xa319e0_0 .net *"_s151", 0 0, L_0xa52090; 1 drivers -v0xa31ac0_0 .net *"_s155", 0 0, L_0xa51f40; 1 drivers -v0xa31ba0_0 .net *"_s159", 0 0, L_0xa51fe0; 1 drivers -v0xa31c80_0 .net *"_s160", 17 0, L_0xa52130; 1 drivers -v0xa31d60_0 .net *"_s162", 5 0, L_0xa52490; 1 drivers -L_0x2b1dfaa330f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0xa31e40_0 .net *"_s165", 1 0, L_0x2b1dfaa330f0; 1 drivers -v0xa33d70_2 .array/port v0xa33d70, 2; -v0xa31f20_0 .net *"_s173", 10 0, v0xa33d70_2; 1 drivers -v0xa33d70_3 .array/port v0xa33d70, 3; -v0xa32000_0 .net *"_s179", 10 0, v0xa33d70_3; 1 drivers -v0xa33d70_0 .array/port v0xa33d70, 0; -v0xa320e0_0 .net *"_s185", 10 0, v0xa33d70_0; 1 drivers -v0xa33d70_1 .array/port v0xa33d70, 1; -v0xa321c0_0 .net *"_s191", 10 0, v0xa33d70_1; 1 drivers -v0xa322a0_0 .net *"_s23", 0 0, L_0xa4f870; 1 drivers -v0xa32380_0 .net *"_s27", 0 0, L_0xa4f9d0; 1 drivers -v0xa315d0_0 .net *"_s31", 0 0, L_0xa4faa0; 1 drivers -v0xa32650_0 .net *"_s36", 0 0, L_0xa4fd70; 1 drivers -v0xa32730_0 .net *"_s42", 0 0, L_0xa50000; 1 drivers -v0xa32810_0 .net *"_s46", 0 0, L_0xa500a0; 1 drivers -v0xa328f0_0 .net *"_s50", 0 0, L_0xa501b0; 1 drivers -v0xa329d0_0 .net *"_s55", 0 0, L_0xa50440; 1 drivers -v0xa32ab0_0 .net *"_s61", 0 0, L_0xa506b0; 1 drivers -v0xa32b90_0 .net *"_s65", 0 0, L_0xa50750; 1 drivers -v0xa32c70_0 .net *"_s69", 0 0, L_0xa50920; 1 drivers -v0xa32d50_0 .net *"_s74", 0 0, L_0xa50880; 1 drivers -v0xa32e30_0 .net *"_s80", 0 0, L_0xa50b10; 1 drivers -v0xa32f10_0 .net *"_s84", 0 0, L_0xa50e00; 1 drivers -v0xa32ff0_0 .net *"_s88", 0 0, L_0xa50d40; 1 drivers -v0xa330d0_0 .net *"_s93", 0 0, L_0xa50ea0; 1 drivers -v0xa331b0_0 .net *"_s99", 0 0, L_0xa51160; 1 drivers -v0xa33290_0 .net/s "accOut", 10 0, L_0xa4eff0; alias, 1 drivers -v0xa33370_0 .net "anyHasData", 0 0, L_0xa4feb0; 1 drivers -v0xa33430_0 .net "anyReadAck", 0 0, L_0xa50ca0; 1 drivers -v0xa334f0_0 .net "anyWantData", 0 0, L_0xa50530; 1 drivers -v0xa335b0_0 .net "anyWriteAck", 0 0, L_0xa51290; 1 drivers -v0xa33670_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers -o0x2b1dfaa06128 .functor BUFZ 15, C4; HiZ drive -v0xa33710_0 .net "down", 14 0, o0x2b1dfaa06128; 0 drivers -v0xa337f0_0 .net "downOut", 14 0, L_0xa528b0; 1 drivers -v0xa338d0_0 .net "instruction", 17 0, L_0xa50140; 1 drivers -v0xa339b0 .array "instructions", 15 0, 17 0; -v0xa33a70_0 .var "last", 2 0; -v0xa33b50_0 .net "left", 14 0, L_0xa5f390; alias, 1 drivers -v0xa33c10_0 .net "leftOut", 14 0, L_0xa525f0; alias, 1 drivers -v0xa33cb0_0 .var "mode", 2 0; -v0xa33d70 .array/s "outVals", 2 5, 10 0; -v0xa33ee0_0 .var "phase", 2 0; -v0xa33fc0_0 .net "portsHaveData", 5 2, L_0xa4fb90; 1 drivers -v0xa32420_0 .net "portsWantData", 5 2, L_0xa50250; 1 drivers -v0xa32500_0 .net "readAckIn", 5 2, L_0xa509c0; 1 drivers -v0xa34470_0 .var "readAckOut", 5 2; -v0xa34510_0 .var "readTarget", 2 0; -v0xa345b0_0 .var/s "readValue", 10 0; -L_0x2b1dfaa330a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0xa34650 .array "regVals", 0 7; -v0xa34650_0 .net/s v0xa34650 0, 10 0, L_0x2b1dfaa330a8; 1 drivers -v0xa34650_1 .net/s v0xa34650 1, 10 0, L_0xa4f1f0; 1 drivers -v0xa34650_2 .net/s v0xa34650 2, 10 0, L_0xa4f560; 1 drivers -v0xa34650_3 .net/s v0xa34650 3, 10 0, L_0xa4f600; 1 drivers -v0xa34650_4 .net/s v0xa34650 4, 10 0, L_0xa4f6a0; 1 drivers -v0xa34650_5 .net/s v0xa34650 5, 10 0, L_0xa4f740; 1 drivers -o0x2b1dfaa06548 .functor BUFZ 11, C4; HiZ drive -v0xa34650_6 .net/s v0xa34650 6, 10 0, o0x2b1dfaa06548; 0 drivers -o0x2b1dfaa06578 .functor BUFZ 11, C4; HiZ drive -v0xa34650_7 .net/s v0xa34650 7, 10 0, o0x2b1dfaa06578; 0 drivers -o0x2b1dfaa065a8 .functor BUFZ 15, C4; HiZ drive -v0xa34860_0 .net "right", 14 0, o0x2b1dfaa065a8; 0 drivers -v0xa34940_0 .net "rightOut", 14 0, L_0xa52e60; 1 drivers -o0x2b1dfaa06608 .functor BUFZ 15, C4; HiZ drive -v0xa34a20_0 .net "up", 14 0, o0x2b1dfaa06608; 0 drivers -v0xa34b00_0 .net "upOut", 14 0, L_0xa523a0; 1 drivers -v0xa34be0_0 .var "weHaveData", 5 2; -v0xa34cc0_0 .var "weWantData", 5 2; -v0xa34da0_0 .net "writeAckIn", 5 2, L_0xa50f70; 1 drivers -v0xa34e80_0 .var "writeAckOut", 5 2; -v0xa34f60_0 .var "writeTarget", 2 0; -v0xa35040_0 .var/s "writeValue", 10 0; -L_0xa4f560 .part L_0xa5f390, 0, 11; -L_0xa4f600 .part o0x2b1dfaa065a8, 0, 11; -L_0xa4f6a0 .part o0x2b1dfaa06608, 0, 11; -L_0xa4f740 .part o0x2b1dfaa06128, 0, 11; -L_0xa4f870 .part L_0xa5f390, 11, 1; -L_0xa4f9d0 .part o0x2b1dfaa065a8, 11, 1; -L_0xa4faa0 .part o0x2b1dfaa06608, 11, 1; -L_0xa4fb90 .concat8 [ 1 1 1 1], L_0xa4f870, L_0xa4f9d0, L_0xa4faa0, L_0xa4fd70; -L_0xa4fd70 .part o0x2b1dfaa06128, 11, 1; -L_0xa4feb0 .reduce/or L_0xa4fb90; -L_0xa50000 .part L_0xa5f390, 12, 1; -L_0xa500a0 .part o0x2b1dfaa065a8, 12, 1; -L_0xa501b0 .part o0x2b1dfaa06608, 12, 1; -L_0xa50250 .concat8 [ 1 1 1 1], L_0xa50000, L_0xa500a0, L_0xa501b0, L_0xa50440; -L_0xa50440 .part o0x2b1dfaa06128, 12, 1; -L_0xa50530 .reduce/or L_0xa50250; -L_0xa506b0 .part L_0xa5f390, 13, 1; -L_0xa50750 .part o0x2b1dfaa065a8, 13, 1; -L_0xa50920 .part o0x2b1dfaa06608, 13, 1; -L_0xa509c0 .concat8 [ 1 1 1 1], L_0xa506b0, L_0xa50750, L_0xa50920, L_0xa50880; -L_0xa50880 .part o0x2b1dfaa06128, 13, 1; -L_0xa50ca0 .reduce/or L_0xa509c0; -L_0xa50b10 .part L_0xa5f390, 14, 1; -L_0xa50e00 .part o0x2b1dfaa065a8, 14, 1; -L_0xa50d40 .part o0x2b1dfaa06608, 14, 1; -L_0xa50f70 .concat8 [ 1 1 1 1], L_0xa50b10, L_0xa50e00, L_0xa50d40, L_0xa50ea0; -L_0xa50ea0 .part o0x2b1dfaa06128, 14, 1; -L_0xa51290 .reduce/or L_0xa50f70; -L_0xa51160 .part v0xa34470_0, 0, 1; -L_0xa51470 .part v0xa34470_0, 1, 1; -L_0xa51380 .part v0xa34470_0, 2, 1; -L_0xa51660 .part v0xa34470_0, 3, 1; -L_0xa51560 .part v0xa34e80_0, 0, 1; -L_0xa518a0 .part v0xa34e80_0, 1, 1; -L_0xa51790 .part v0xa34e80_0, 2, 1; -L_0xa51a60 .part v0xa34e80_0, 3, 1; -L_0xa51940 .part v0xa34cc0_0, 0, 1; -L_0xa51cc0 .part v0xa34cc0_0, 1, 1; -L_0xa51b90 .part v0xa34cc0_0, 2, 1; -L_0xa51ea0 .part v0xa34cc0_0, 3, 1; -L_0xa51d60 .part v0xa34be0_0, 0, 1; -L_0xa52090 .part v0xa34be0_0, 1, 1; -L_0xa51f40 .part v0xa34be0_0, 2, 1; -L_0xa51fe0 .part v0xa34be0_0, 3, 1; -L_0xa52130 .array/port v0xa339b0, L_0xa52490; -L_0xa52490 .concat [ 4 2 0 0], v0xa30ba0_0, L_0x2b1dfaa330f0; -LS_0xa523a0_0_0 .concat8 [ 11 1 1 1], v0xa33d70_2, L_0xa51f40, L_0xa51b90, L_0xa51790; -LS_0xa523a0_0_4 .concat8 [ 1 0 0 0], L_0xa51380; -L_0xa523a0 .concat8 [ 14 1 0 0], LS_0xa523a0_0_0, LS_0xa523a0_0_4; -LS_0xa528b0_0_0 .concat8 [ 11 1 1 1], v0xa33d70_3, L_0xa51fe0, L_0xa51ea0, L_0xa51a60; -LS_0xa528b0_0_4 .concat8 [ 1 0 0 0], L_0xa51660; -L_0xa528b0 .concat8 [ 14 1 0 0], LS_0xa528b0_0_0, LS_0xa528b0_0_4; -LS_0xa525f0_0_0 .concat8 [ 11 1 1 1], v0xa33d70_0, L_0xa51d60, L_0xa51940, L_0xa51560; -LS_0xa525f0_0_4 .concat8 [ 1 0 0 0], L_0xa51160; -L_0xa525f0 .concat8 [ 14 1 0 0], LS_0xa525f0_0_0, LS_0xa525f0_0_4; -LS_0xa52e60_0_0 .concat8 [ 11 1 1 1], v0xa33d70_1, L_0xa52090, L_0xa51cc0, L_0xa518a0; -LS_0xa52e60_0_4 .concat8 [ 1 0 0 0], L_0xa51470; -L_0xa52e60 .concat8 [ 14 1 0 0], LS_0xa52e60_0_0, LS_0xa52e60_0_4; -L_0xa52b50 .part L_0xa50140, 14, 4; -L_0xa53270 .part L_0xa50140, 11, 3; -L_0xa53080 .part L_0xa50140, 8, 3; -L_0xa534c0 .part L_0xa50140, 10, 4; -L_0xa53310 .part L_0xa50140, 0, 11; -S_0xa352c0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x96baa0; +P_0x17a91f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x17a9230 .param/str "memFile" 0 3 60, "jumpTest/right.dat"; +L_0x17c8100 .functor BUFZ 11, v0x17a95a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17c8300 .functor BUFZ 11, v0x17a95a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17c91f0 .functor BUFZ 18, L_0x17cb160, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x17a95a0_0 .var/s "ACC", 10 0; +v0x17a96a0_0 .var/s "BAK", 10 0; +v0x17a9780_0 .net "DST", 2 0, L_0x17cc2a0; 1 drivers +v0x17a9840_0 .net/s "IMM", 10 0, L_0x17cc340; 1 drivers +v0x17a9920_0 .net "INST", 3 0, L_0x17cbb80; 1 drivers +v0x17a9a00_0 .net "LABEL", 3 0, L_0x17cc4f0; 1 drivers +v0x17a9ae0_0 .var "PC", 3 0; +v0x17a9bc0_0 .var "PCNEXT", 3 0; +v0x17a9ca0_0 .net "SRC", 2 0, L_0x17cc0b0; 1 drivers +v0x17a9e10_0 .net *"_s103", 0 0, L_0x17ca4a0; 1 drivers +v0x17a9ef0_0 .net *"_s107", 0 0, L_0x17ca3b0; 1 drivers +v0x17a9fd0_0 .net *"_s111", 0 0, L_0x17ca690; 1 drivers +v0x17aa0b0_0 .net *"_s115", 0 0, L_0x17ca590; 1 drivers +v0x17aa190_0 .net *"_s119", 0 0, L_0x17ca8d0; 1 drivers +v0x17aa270_0 .net *"_s123", 0 0, L_0x17ca7c0; 1 drivers +v0x17aa350_0 .net *"_s127", 0 0, L_0x17caa90; 1 drivers +v0x17aa430_0 .net *"_s131", 0 0, L_0x17ca970; 1 drivers +v0x17aa5e0_0 .net *"_s135", 0 0, L_0x17cacf0; 1 drivers +v0x17aa680_0 .net *"_s139", 0 0, L_0x17cabc0; 1 drivers +v0x17aa760_0 .net *"_s143", 0 0, L_0x17caed0; 1 drivers +v0x17aa840_0 .net *"_s147", 0 0, L_0x17cad90; 1 drivers +v0x17aa920_0 .net *"_s151", 0 0, L_0x17cb0c0; 1 drivers +v0x17aaa00_0 .net *"_s155", 0 0, L_0x17caf70; 1 drivers +v0x17aaae0_0 .net *"_s159", 0 0, L_0x17cb010; 1 drivers +v0x17aabc0_0 .net *"_s160", 17 0, L_0x17cb160; 1 drivers +v0x17aaca0_0 .net *"_s162", 5 0, L_0x17cb4c0; 1 drivers +L_0x2aef774e30f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x17aad80_0 .net *"_s165", 1 0, L_0x2aef774e30f0; 1 drivers +v0x17accb0_2 .array/port v0x17accb0, 2; +v0x17aae60_0 .net *"_s173", 10 0, v0x17accb0_2; 1 drivers +v0x17accb0_3 .array/port v0x17accb0, 3; +v0x17aaf40_0 .net *"_s179", 10 0, v0x17accb0_3; 1 drivers +v0x17accb0_0 .array/port v0x17accb0, 0; +v0x17ab020_0 .net *"_s185", 10 0, v0x17accb0_0; 1 drivers +v0x17accb0_1 .array/port v0x17accb0, 1; +v0x17ab100_0 .net *"_s191", 10 0, v0x17accb0_1; 1 drivers +v0x17ab1e0_0 .net *"_s23", 0 0, L_0x17c8980; 1 drivers +v0x17ab2c0_0 .net *"_s27", 0 0, L_0x17c8ae0; 1 drivers +v0x17aa510_0 .net *"_s31", 0 0, L_0x17c8bb0; 1 drivers +v0x17ab590_0 .net *"_s36", 0 0, L_0x17c8e80; 1 drivers +v0x17ab670_0 .net *"_s42", 0 0, L_0x17c90b0; 1 drivers +v0x17ab750_0 .net *"_s46", 0 0, L_0x17c9150; 1 drivers +v0x17ab830_0 .net *"_s50", 0 0, L_0x17c9260; 1 drivers +v0x17ab910_0 .net *"_s55", 0 0, L_0x17c9470; 1 drivers +v0x17ab9f0_0 .net *"_s61", 0 0, L_0x17c96e0; 1 drivers +v0x17abad0_0 .net *"_s65", 0 0, L_0x17c9780; 1 drivers +v0x17abbb0_0 .net *"_s69", 0 0, L_0x17c9950; 1 drivers +v0x17abc90_0 .net *"_s74", 0 0, L_0x17c98b0; 1 drivers +v0x17abd70_0 .net *"_s80", 0 0, L_0x17c9b40; 1 drivers +v0x17abe50_0 .net *"_s84", 0 0, L_0x17c9e30; 1 drivers +v0x17abf30_0 .net *"_s88", 0 0, L_0x17c9d70; 1 drivers +v0x17ac010_0 .net *"_s93", 0 0, L_0x17c9ed0; 1 drivers +v0x17ac0f0_0 .net *"_s99", 0 0, L_0x17ca190; 1 drivers +v0x17ac1d0_0 .net/s "accOut", 10 0, L_0x17c8100; alias, 1 drivers +v0x17ac2b0_0 .net "anyHasData", 0 0, L_0x17c8fc0; 1 drivers +v0x17ac370_0 .net "anyReadAck", 0 0, L_0x17c9cd0; 1 drivers +v0x17ac430_0 .net "anyWantData", 0 0, L_0x17c9560; 1 drivers +v0x17ac4f0_0 .net "anyWriteAck", 0 0, L_0x17ca2c0; 1 drivers +v0x17ac5b0_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers +o0x2aef774b6128 .functor BUFZ 15, C4; HiZ drive +v0x17ac650_0 .net "down", 14 0, o0x2aef774b6128; 0 drivers +v0x17ac730_0 .net "downOut", 14 0, L_0x17cb8e0; 1 drivers +v0x17ac810_0 .net "instruction", 17 0, L_0x17c91f0; 1 drivers +v0x17ac8f0 .array "instructions", 15 0, 17 0; +v0x17ac9b0_0 .var "last", 2 0; +v0x17aca90_0 .net "left", 14 0, L_0x17d83c0; alias, 1 drivers +v0x17acb50_0 .net "leftOut", 14 0, L_0x17cb620; alias, 1 drivers +v0x17acbf0_0 .var "mode", 2 0; +v0x17accb0 .array/s "outVals", 2 5, 10 0; +v0x17ace20_0 .var "phase", 2 0; +v0x17acf00_0 .net "portsHaveData", 5 2, L_0x17c8ca0; 1 drivers +v0x17ab360_0 .net "portsWantData", 5 2, L_0x17c9300; 1 drivers +v0x17ab440_0 .net "readAckIn", 5 2, L_0x17c99f0; 1 drivers +v0x17ad3b0_0 .var "readAckOut", 5 2; +v0x17ad450_0 .var "readTarget", 2 0; +v0x17ad4f0_0 .var/s "readValue", 10 0; +L_0x2aef774e30a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x17ad590 .array "regVals", 0 7; +v0x17ad590_0 .net/s v0x17ad590 0, 10 0, L_0x2aef774e30a8; 1 drivers +v0x17ad590_1 .net/s v0x17ad590 1, 10 0, L_0x17c8300; 1 drivers +v0x17ad590_2 .net/s v0x17ad590 2, 10 0, L_0x17c8670; 1 drivers +v0x17ad590_3 .net/s v0x17ad590 3, 10 0, L_0x17c8710; 1 drivers +v0x17ad590_4 .net/s v0x17ad590 4, 10 0, L_0x17c87b0; 1 drivers +v0x17ad590_5 .net/s v0x17ad590 5, 10 0, L_0x17c8850; 1 drivers +o0x2aef774b6548 .functor BUFZ 11, C4; HiZ drive +v0x17ad590_6 .net/s v0x17ad590 6, 10 0, o0x2aef774b6548; 0 drivers +o0x2aef774b6578 .functor BUFZ 11, C4; HiZ drive +v0x17ad590_7 .net/s v0x17ad590 7, 10 0, o0x2aef774b6578; 0 drivers +o0x2aef774b65a8 .functor BUFZ 15, C4; HiZ drive +v0x17ad7a0_0 .net "right", 14 0, o0x2aef774b65a8; 0 drivers +v0x17ad880_0 .net "rightOut", 14 0, L_0x17cbe90; 1 drivers +o0x2aef774b6608 .functor BUFZ 15, C4; HiZ drive +v0x17ad960_0 .net "up", 14 0, o0x2aef774b6608; 0 drivers +v0x17ada40_0 .net "upOut", 14 0, L_0x17cb3d0; 1 drivers +v0x17adb20_0 .var "weHaveData", 5 2; +v0x17adc00_0 .var "weWantData", 5 2; +v0x17adce0_0 .net "writeAckIn", 5 2, L_0x17c9fa0; 1 drivers +v0x17addc0_0 .var "writeAckOut", 5 2; +v0x17adea0_0 .var "writeTarget", 2 0; +v0x17adf80_0 .var/s "writeValue", 10 0; +L_0x17c8670 .part L_0x17d83c0, 0, 11; +L_0x17c8710 .part o0x2aef774b65a8, 0, 11; +L_0x17c87b0 .part o0x2aef774b6608, 0, 11; +L_0x17c8850 .part o0x2aef774b6128, 0, 11; +L_0x17c8980 .part L_0x17d83c0, 11, 1; +L_0x17c8ae0 .part o0x2aef774b65a8, 11, 1; +L_0x17c8bb0 .part o0x2aef774b6608, 11, 1; +L_0x17c8ca0 .concat8 [ 1 1 1 1], L_0x17c8980, L_0x17c8ae0, L_0x17c8bb0, L_0x17c8e80; +L_0x17c8e80 .part o0x2aef774b6128, 11, 1; +L_0x17c8fc0 .reduce/or L_0x17c8ca0; +L_0x17c90b0 .part L_0x17d83c0, 12, 1; +L_0x17c9150 .part o0x2aef774b65a8, 12, 1; +L_0x17c9260 .part o0x2aef774b6608, 12, 1; +L_0x17c9300 .concat8 [ 1 1 1 1], L_0x17c90b0, L_0x17c9150, L_0x17c9260, L_0x17c9470; +L_0x17c9470 .part o0x2aef774b6128, 12, 1; +L_0x17c9560 .reduce/or L_0x17c9300; +L_0x17c96e0 .part L_0x17d83c0, 13, 1; +L_0x17c9780 .part o0x2aef774b65a8, 13, 1; +L_0x17c9950 .part o0x2aef774b6608, 13, 1; +L_0x17c99f0 .concat8 [ 1 1 1 1], L_0x17c96e0, L_0x17c9780, L_0x17c9950, L_0x17c98b0; +L_0x17c98b0 .part o0x2aef774b6128, 13, 1; +L_0x17c9cd0 .reduce/or L_0x17c99f0; +L_0x17c9b40 .part L_0x17d83c0, 14, 1; +L_0x17c9e30 .part o0x2aef774b65a8, 14, 1; +L_0x17c9d70 .part o0x2aef774b6608, 14, 1; +L_0x17c9fa0 .concat8 [ 1 1 1 1], L_0x17c9b40, L_0x17c9e30, L_0x17c9d70, L_0x17c9ed0; +L_0x17c9ed0 .part o0x2aef774b6128, 14, 1; +L_0x17ca2c0 .reduce/or L_0x17c9fa0; +L_0x17ca190 .part v0x17ad3b0_0, 0, 1; +L_0x17ca4a0 .part v0x17ad3b0_0, 1, 1; +L_0x17ca3b0 .part v0x17ad3b0_0, 2, 1; +L_0x17ca690 .part v0x17ad3b0_0, 3, 1; +L_0x17ca590 .part v0x17addc0_0, 0, 1; +L_0x17ca8d0 .part v0x17addc0_0, 1, 1; +L_0x17ca7c0 .part v0x17addc0_0, 2, 1; +L_0x17caa90 .part v0x17addc0_0, 3, 1; +L_0x17ca970 .part v0x17adc00_0, 0, 1; +L_0x17cacf0 .part v0x17adc00_0, 1, 1; +L_0x17cabc0 .part v0x17adc00_0, 2, 1; +L_0x17caed0 .part v0x17adc00_0, 3, 1; +L_0x17cad90 .part v0x17adb20_0, 0, 1; +L_0x17cb0c0 .part v0x17adb20_0, 1, 1; +L_0x17caf70 .part v0x17adb20_0, 2, 1; +L_0x17cb010 .part v0x17adb20_0, 3, 1; +L_0x17cb160 .array/port v0x17ac8f0, L_0x17cb4c0; +L_0x17cb4c0 .concat [ 4 2 0 0], v0x17a9ae0_0, L_0x2aef774e30f0; +LS_0x17cb3d0_0_0 .concat8 [ 11 1 1 1], v0x17accb0_2, L_0x17caf70, L_0x17cabc0, L_0x17ca7c0; +LS_0x17cb3d0_0_4 .concat8 [ 1 0 0 0], L_0x17ca3b0; +L_0x17cb3d0 .concat8 [ 14 1 0 0], LS_0x17cb3d0_0_0, LS_0x17cb3d0_0_4; +LS_0x17cb8e0_0_0 .concat8 [ 11 1 1 1], v0x17accb0_3, L_0x17cb010, L_0x17caed0, L_0x17caa90; +LS_0x17cb8e0_0_4 .concat8 [ 1 0 0 0], L_0x17ca690; +L_0x17cb8e0 .concat8 [ 14 1 0 0], LS_0x17cb8e0_0_0, LS_0x17cb8e0_0_4; +LS_0x17cb620_0_0 .concat8 [ 11 1 1 1], v0x17accb0_0, L_0x17cad90, L_0x17ca970, L_0x17ca590; +LS_0x17cb620_0_4 .concat8 [ 1 0 0 0], L_0x17ca190; +L_0x17cb620 .concat8 [ 14 1 0 0], LS_0x17cb620_0_0, LS_0x17cb620_0_4; +LS_0x17cbe90_0_0 .concat8 [ 11 1 1 1], v0x17accb0_1, L_0x17cb0c0, L_0x17cacf0, L_0x17ca8d0; +LS_0x17cbe90_0_4 .concat8 [ 1 0 0 0], L_0x17ca4a0; +L_0x17cbe90 .concat8 [ 14 1 0 0], LS_0x17cbe90_0_0, LS_0x17cbe90_0_4; +L_0x17cbb80 .part L_0x17c91f0, 14, 4; +L_0x17cc2a0 .part L_0x17c91f0, 11, 3; +L_0x17cc0b0 .part L_0x17c91f0, 8, 3; +L_0x17cc4f0 .part L_0x17c91f0, 10, 4; +L_0x17cc340 .part L_0x17c91f0, 0, 11; +S_0x17ae200 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x16e4740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -751,218 +755,219 @@ S_0xa352c0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x96baa0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0xa354e0 .param/str "memFile" 0 3 60, "jumpTest/up.dat"; -L_0xa531b0 .functor BUFZ 11, v0xa35710_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa53400 .functor BUFZ 11, v0xa35710_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0xa54240 .functor BUFZ 18, L_0xa561e0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0xa35710_0 .var/s "ACC", 10 0; -v0xa35810_0 .var/s "BAK", 10 0; -v0xa358f0_0 .net "DST", 2 0, L_0xa57320; 1 drivers -v0xa359b0_0 .net/s "IMM", 10 0, L_0xa573c0; 1 drivers -v0xa35a90_0 .net "INST", 3 0, L_0xa56c00; 1 drivers -v0xa35bc0_0 .net "LABEL", 3 0, L_0xa57570; 1 drivers -v0xa35ca0_0 .var "PC", 3 0; -v0xa35d80_0 .var "PCNEXT", 3 0; -v0xa35e60_0 .net "SRC", 2 0, L_0xa57130; 1 drivers -v0xa35fd0_0 .net *"_s103", 0 0, L_0xa55520; 1 drivers -v0xa360b0_0 .net *"_s107", 0 0, L_0xa55430; 1 drivers -v0xa36190_0 .net *"_s111", 0 0, L_0xa55710; 1 drivers -v0xa36270_0 .net *"_s115", 0 0, L_0xa55610; 1 drivers -v0xa36350_0 .net *"_s119", 0 0, L_0xa55950; 1 drivers -v0xa36430_0 .net *"_s123", 0 0, L_0xa55840; 1 drivers -v0xa36510_0 .net *"_s127", 0 0, L_0xa55b10; 1 drivers -v0xa365f0_0 .net *"_s131", 0 0, L_0xa559f0; 1 drivers -v0xa367a0_0 .net *"_s135", 0 0, L_0xa55d70; 1 drivers -v0xa36840_0 .net *"_s139", 0 0, L_0xa55c40; 1 drivers -v0xa36920_0 .net *"_s143", 0 0, L_0xa55f50; 1 drivers -v0xa36a00_0 .net *"_s147", 0 0, L_0xa55e10; 1 drivers -v0xa36ae0_0 .net *"_s151", 0 0, L_0xa56140; 1 drivers -v0xa36bc0_0 .net *"_s155", 0 0, L_0xa55ff0; 1 drivers -v0xa36ca0_0 .net *"_s159", 0 0, L_0xa56090; 1 drivers -v0xa36d80_0 .net *"_s160", 17 0, L_0xa561e0; 1 drivers -v0xa36e60_0 .net *"_s162", 5 0, L_0xa56540; 1 drivers -L_0x2b1dfaa33180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0xa36f40_0 .net *"_s165", 1 0, L_0x2b1dfaa33180; 1 drivers -v0xa38f00_2 .array/port v0xa38f00, 2; -v0xa37020_0 .net *"_s173", 10 0, v0xa38f00_2; 1 drivers -v0xa38f00_3 .array/port v0xa38f00, 3; -v0xa37100_0 .net *"_s179", 10 0, v0xa38f00_3; 1 drivers -v0xa38f00_0 .array/port v0xa38f00, 0; -v0xa371e0_0 .net *"_s185", 10 0, v0xa38f00_0; 1 drivers -v0xa38f00_1 .array/port v0xa38f00, 1; -v0xa372c0_0 .net *"_s191", 10 0, v0xa38f00_1; 1 drivers -v0xa373a0_0 .net *"_s23", 0 0, L_0xa53a00; 1 drivers -v0xa37480_0 .net *"_s27", 0 0, L_0xa53b20; 1 drivers -v0xa366d0_0 .net *"_s31", 0 0, L_0xa53c10; 1 drivers -v0xa37750_0 .net *"_s36", 0 0, L_0xa53ee0; 1 drivers -v0xa37830_0 .net *"_s42", 0 0, L_0xa54100; 1 drivers -v0xa37910_0 .net *"_s46", 0 0, L_0xa541a0; 1 drivers -v0xa379f0_0 .net *"_s50", 0 0, L_0xa542b0; 1 drivers -v0xa37ad0_0 .net *"_s55", 0 0, L_0xa544f0; 1 drivers -v0xa37bb0_0 .net *"_s61", 0 0, L_0xa54760; 1 drivers -v0xa37c90_0 .net *"_s65", 0 0, L_0xa54890; 1 drivers -v0xa37d70_0 .net *"_s69", 0 0, L_0xa54a60; 1 drivers -v0xa37e50_0 .net *"_s74", 0 0, L_0xa549c0; 1 drivers -v0xa37f30_0 .net *"_s80", 0 0, L_0xa54c00; 1 drivers -v0xa38010_0 .net *"_s84", 0 0, L_0xa54eb0; 1 drivers -v0xa380f0_0 .net *"_s88", 0 0, L_0xa54df0; 1 drivers -v0xa381d0_0 .net *"_s93", 0 0, L_0xa54f50; 1 drivers -v0xa382b0_0 .net *"_s99", 0 0, L_0xa55210; 1 drivers -v0xa38390_0 .net/s "accOut", 10 0, L_0xa531b0; alias, 1 drivers -v0xa38470_0 .net "anyHasData", 0 0, L_0xa54060; 1 drivers -v0xa38530_0 .net "anyReadAck", 0 0, L_0xa54d00; 1 drivers -v0xa385f0_0 .net "anyWantData", 0 0, L_0xa545e0; 1 drivers -v0xa386b0_0 .net "anyWriteAck", 0 0, L_0xa55340; 1 drivers -v0xa38770_0 .net "clk", 0 0, v0xa3b0f0_0; alias, 1 drivers -v0xa388a0_0 .net "down", 14 0, L_0xa5e6f0; alias, 1 drivers -v0xa38960_0 .net "downOut", 14 0, L_0xa56960; alias, 1 drivers -v0xa38a00_0 .net "instruction", 17 0, L_0xa54240; 1 drivers -v0xa38ac0 .array "instructions", 15 0, 17 0; -v0xa38b80_0 .var "last", 2 0; -o0x2b1dfaa073b8 .functor BUFZ 15, C4; HiZ drive -v0xa38c60_0 .net "left", 14 0, o0x2b1dfaa073b8; 0 drivers -v0xa38d40_0 .net "leftOut", 14 0, L_0xa566a0; 1 drivers -v0xa38e20_0 .var "mode", 2 0; -v0xa38f00 .array/s "outVals", 2 5, 10 0; -v0xa39070_0 .var "phase", 2 0; -v0xa39150_0 .net "portsHaveData", 5 2, L_0xa53d00; 1 drivers -v0xa37520_0 .net "portsWantData", 5 2, L_0xa54350; 1 drivers -v0xa37600_0 .net "readAckIn", 5 2, L_0xa54b00; 1 drivers -v0xa39600_0 .var "readAckOut", 5 2; -v0xa396a0_0 .var "readTarget", 2 0; -v0xa39740_0 .var/s "readValue", 10 0; -L_0x2b1dfaa33138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0xa397e0 .array "regVals", 0 7; -v0xa397e0_0 .net/s v0xa397e0 0, 10 0, L_0x2b1dfaa33138; 1 drivers -v0xa397e0_1 .net/s v0xa397e0 1, 10 0, L_0xa53400; 1 drivers -v0xa397e0_2 .net/s v0xa397e0 2, 10 0, L_0xa53720; 1 drivers -v0xa397e0_3 .net/s v0xa397e0 3, 10 0, L_0xa537c0; 1 drivers -v0xa397e0_4 .net/s v0xa397e0 4, 10 0, L_0xa53860; 1 drivers -v0xa397e0_5 .net/s v0xa397e0 5, 10 0, L_0xa53900; 1 drivers -o0x2b1dfaa07778 .functor BUFZ 11, C4; HiZ drive -v0xa397e0_6 .net/s v0xa397e0 6, 10 0, o0x2b1dfaa07778; 0 drivers -o0x2b1dfaa077a8 .functor BUFZ 11, C4; HiZ drive -v0xa397e0_7 .net/s v0xa397e0 7, 10 0, o0x2b1dfaa077a8; 0 drivers -o0x2b1dfaa077d8 .functor BUFZ 15, C4; HiZ drive -v0xa399f0_0 .net "right", 14 0, o0x2b1dfaa077d8; 0 drivers -v0xa39ad0_0 .net "rightOut", 14 0, L_0xa56f10; 1 drivers -o0x2b1dfaa07838 .functor BUFZ 15, C4; HiZ drive -v0xa39bb0_0 .net "up", 14 0, o0x2b1dfaa07838; 0 drivers -v0xa39c90_0 .net "upOut", 14 0, L_0xa56450; 1 drivers -v0xa39d70_0 .var "weHaveData", 5 2; -v0xa39e50_0 .var "weWantData", 5 2; -v0xa39f30_0 .net "writeAckIn", 5 2, L_0xa55020; 1 drivers -v0xa3a010_0 .var "writeAckOut", 5 2; -v0xa3a0f0_0 .var "writeTarget", 2 0; -v0xa3a1d0_0 .var/s "writeValue", 10 0; -L_0xa53720 .part o0x2b1dfaa073b8, 0, 11; -L_0xa537c0 .part o0x2b1dfaa077d8, 0, 11; -L_0xa53860 .part o0x2b1dfaa07838, 0, 11; -L_0xa53900 .part L_0xa5e6f0, 0, 11; -L_0xa53a00 .part o0x2b1dfaa073b8, 11, 1; -L_0xa53b20 .part o0x2b1dfaa077d8, 11, 1; -L_0xa53c10 .part o0x2b1dfaa07838, 11, 1; -L_0xa53d00 .concat8 [ 1 1 1 1], L_0xa53a00, L_0xa53b20, L_0xa53c10, L_0xa53ee0; -L_0xa53ee0 .part L_0xa5e6f0, 11, 1; -L_0xa54060 .reduce/or L_0xa53d00; -L_0xa54100 .part o0x2b1dfaa073b8, 12, 1; -L_0xa541a0 .part o0x2b1dfaa077d8, 12, 1; -L_0xa542b0 .part o0x2b1dfaa07838, 12, 1; -L_0xa54350 .concat8 [ 1 1 1 1], L_0xa54100, L_0xa541a0, L_0xa542b0, L_0xa544f0; -L_0xa544f0 .part L_0xa5e6f0, 12, 1; -L_0xa545e0 .reduce/or L_0xa54350; -L_0xa54760 .part o0x2b1dfaa073b8, 13, 1; -L_0xa54890 .part o0x2b1dfaa077d8, 13, 1; -L_0xa54a60 .part o0x2b1dfaa07838, 13, 1; -L_0xa54b00 .concat8 [ 1 1 1 1], L_0xa54760, L_0xa54890, L_0xa54a60, L_0xa549c0; -L_0xa549c0 .part L_0xa5e6f0, 13, 1; -L_0xa54d00 .reduce/or L_0xa54b00; -L_0xa54c00 .part o0x2b1dfaa073b8, 14, 1; -L_0xa54eb0 .part o0x2b1dfaa077d8, 14, 1; -L_0xa54df0 .part o0x2b1dfaa07838, 14, 1; -L_0xa55020 .concat8 [ 1 1 1 1], L_0xa54c00, L_0xa54eb0, L_0xa54df0, L_0xa54f50; -L_0xa54f50 .part L_0xa5e6f0, 14, 1; -L_0xa55340 .reduce/or L_0xa55020; -L_0xa55210 .part v0xa39600_0, 0, 1; -L_0xa55520 .part v0xa39600_0, 1, 1; -L_0xa55430 .part v0xa39600_0, 2, 1; -L_0xa55710 .part v0xa39600_0, 3, 1; -L_0xa55610 .part v0xa3a010_0, 0, 1; -L_0xa55950 .part v0xa3a010_0, 1, 1; -L_0xa55840 .part v0xa3a010_0, 2, 1; -L_0xa55b10 .part v0xa3a010_0, 3, 1; -L_0xa559f0 .part v0xa39e50_0, 0, 1; -L_0xa55d70 .part v0xa39e50_0, 1, 1; -L_0xa55c40 .part v0xa39e50_0, 2, 1; -L_0xa55f50 .part v0xa39e50_0, 3, 1; -L_0xa55e10 .part v0xa39d70_0, 0, 1; -L_0xa56140 .part v0xa39d70_0, 1, 1; -L_0xa55ff0 .part v0xa39d70_0, 2, 1; -L_0xa56090 .part v0xa39d70_0, 3, 1; -L_0xa561e0 .array/port v0xa38ac0, L_0xa56540; -L_0xa56540 .concat [ 4 2 0 0], v0xa35ca0_0, L_0x2b1dfaa33180; -LS_0xa56450_0_0 .concat8 [ 11 1 1 1], v0xa38f00_2, L_0xa55ff0, L_0xa55c40, L_0xa55840; -LS_0xa56450_0_4 .concat8 [ 1 0 0 0], L_0xa55430; -L_0xa56450 .concat8 [ 14 1 0 0], LS_0xa56450_0_0, LS_0xa56450_0_4; -LS_0xa56960_0_0 .concat8 [ 11 1 1 1], v0xa38f00_3, L_0xa56090, L_0xa55f50, L_0xa55b10; -LS_0xa56960_0_4 .concat8 [ 1 0 0 0], L_0xa55710; -L_0xa56960 .concat8 [ 14 1 0 0], LS_0xa56960_0_0, LS_0xa56960_0_4; -LS_0xa566a0_0_0 .concat8 [ 11 1 1 1], v0xa38f00_0, L_0xa55e10, L_0xa559f0, L_0xa55610; -LS_0xa566a0_0_4 .concat8 [ 1 0 0 0], L_0xa55210; -L_0xa566a0 .concat8 [ 14 1 0 0], LS_0xa566a0_0_0, LS_0xa566a0_0_4; -LS_0xa56f10_0_0 .concat8 [ 11 1 1 1], v0xa38f00_1, L_0xa56140, L_0xa55d70, L_0xa55950; -LS_0xa56f10_0_4 .concat8 [ 1 0 0 0], L_0xa55520; -L_0xa56f10 .concat8 [ 14 1 0 0], LS_0xa56f10_0_0, LS_0xa56f10_0_4; -L_0xa56c00 .part L_0xa54240, 14, 4; -L_0xa57320 .part L_0xa54240, 11, 3; -L_0xa57130 .part L_0xa54240, 8, 3; -L_0xa57570 .part L_0xa54240, 10, 4; -L_0xa573c0 .part L_0xa54240, 0, 11; - .scope S_0xa2b050; +P_0x17ae420 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x17ae460 .param/str "memFile" 0 3 60, "jumpTest/up.dat"; +L_0x17cc1e0 .functor BUFZ 11, v0x17ae720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17cc430 .functor BUFZ 11, v0x17ae720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x17cd270 .functor BUFZ 18, L_0x17cf210, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x17ae720_0 .var/s "ACC", 10 0; +v0x17ae820_0 .var/s "BAK", 10 0; +v0x17ae900_0 .net "DST", 2 0, L_0x17d0350; 1 drivers +v0x17ae9c0_0 .net/s "IMM", 10 0, L_0x17d03f0; 1 drivers +v0x17aeaa0_0 .net "INST", 3 0, L_0x17cfc30; 1 drivers +v0x17aebd0_0 .net "LABEL", 3 0, L_0x17d05a0; 1 drivers +v0x17aecb0_0 .var "PC", 3 0; +v0x17aed90_0 .var "PCNEXT", 3 0; +v0x17aee70_0 .net "SRC", 2 0, L_0x17d0160; 1 drivers +v0x17aefe0_0 .net *"_s103", 0 0, L_0x17ce550; 1 drivers +v0x17af0c0_0 .net *"_s107", 0 0, L_0x17ce460; 1 drivers +v0x17af1a0_0 .net *"_s111", 0 0, L_0x17ce740; 1 drivers +v0x17af280_0 .net *"_s115", 0 0, L_0x17ce640; 1 drivers +v0x17af360_0 .net *"_s119", 0 0, L_0x17ce980; 1 drivers +v0x17af440_0 .net *"_s123", 0 0, L_0x17ce870; 1 drivers +v0x17af520_0 .net *"_s127", 0 0, L_0x17ceb40; 1 drivers +v0x17af600_0 .net *"_s131", 0 0, L_0x17cea20; 1 drivers +v0x17af7b0_0 .net *"_s135", 0 0, L_0x17ceda0; 1 drivers +v0x17af850_0 .net *"_s139", 0 0, L_0x17cec70; 1 drivers +v0x17af930_0 .net *"_s143", 0 0, L_0x17cef80; 1 drivers +v0x17afa10_0 .net *"_s147", 0 0, L_0x17cee40; 1 drivers +v0x17afaf0_0 .net *"_s151", 0 0, L_0x17cf170; 1 drivers +v0x17afbd0_0 .net *"_s155", 0 0, L_0x17cf020; 1 drivers +v0x17afcb0_0 .net *"_s159", 0 0, L_0x17cf0c0; 1 drivers +v0x17afd90_0 .net *"_s160", 17 0, L_0x17cf210; 1 drivers +v0x17afe70_0 .net *"_s162", 5 0, L_0x17cf570; 1 drivers +L_0x2aef774e3180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x17aff50_0 .net *"_s165", 1 0, L_0x2aef774e3180; 1 drivers +v0x17b1f10_2 .array/port v0x17b1f10, 2; +v0x17b0030_0 .net *"_s173", 10 0, v0x17b1f10_2; 1 drivers +v0x17b1f10_3 .array/port v0x17b1f10, 3; +v0x17b0110_0 .net *"_s179", 10 0, v0x17b1f10_3; 1 drivers +v0x17b1f10_0 .array/port v0x17b1f10, 0; +v0x17b01f0_0 .net *"_s185", 10 0, v0x17b1f10_0; 1 drivers +v0x17b1f10_1 .array/port v0x17b1f10, 1; +v0x17b02d0_0 .net *"_s191", 10 0, v0x17b1f10_1; 1 drivers +v0x17b03b0_0 .net *"_s23", 0 0, L_0x17cca30; 1 drivers +v0x17b0490_0 .net *"_s27", 0 0, L_0x17ccb50; 1 drivers +v0x17af6e0_0 .net *"_s31", 0 0, L_0x17ccc40; 1 drivers +v0x17b0760_0 .net *"_s36", 0 0, L_0x17ccf10; 1 drivers +v0x17b0840_0 .net *"_s42", 0 0, L_0x17cd130; 1 drivers +v0x17b0920_0 .net *"_s46", 0 0, L_0x17cd1d0; 1 drivers +v0x17b0a00_0 .net *"_s50", 0 0, L_0x17cd2e0; 1 drivers +v0x17b0ae0_0 .net *"_s55", 0 0, L_0x17cd520; 1 drivers +v0x17b0bc0_0 .net *"_s61", 0 0, L_0x17cd790; 1 drivers +v0x17b0ca0_0 .net *"_s65", 0 0, L_0x17cd8c0; 1 drivers +v0x17b0d80_0 .net *"_s69", 0 0, L_0x17cda90; 1 drivers +v0x17b0e60_0 .net *"_s74", 0 0, L_0x17cd9f0; 1 drivers +v0x17b0f40_0 .net *"_s80", 0 0, L_0x17cdc30; 1 drivers +v0x17b1020_0 .net *"_s84", 0 0, L_0x17cdee0; 1 drivers +v0x17b1100_0 .net *"_s88", 0 0, L_0x17cde20; 1 drivers +v0x17b11e0_0 .net *"_s93", 0 0, L_0x17cdf80; 1 drivers +v0x17b12c0_0 .net *"_s99", 0 0, L_0x17ce240; 1 drivers +v0x17b13a0_0 .net/s "accOut", 10 0, L_0x17cc1e0; alias, 1 drivers +v0x17b1480_0 .net "anyHasData", 0 0, L_0x17cd090; 1 drivers +v0x17b1540_0 .net "anyReadAck", 0 0, L_0x17cdd30; 1 drivers +v0x17b1600_0 .net "anyWantData", 0 0, L_0x17cd610; 1 drivers +v0x17b16c0_0 .net "anyWriteAck", 0 0, L_0x17ce370; 1 drivers +v0x17b1780_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers +v0x17b18b0_0 .net "down", 14 0, L_0x17d7720; alias, 1 drivers +v0x17b1970_0 .net "downOut", 14 0, L_0x17cf990; alias, 1 drivers +v0x17b1a10_0 .net "instruction", 17 0, L_0x17cd270; 1 drivers +v0x17b1ad0 .array "instructions", 15 0, 17 0; +v0x17b1b90_0 .var "last", 2 0; +o0x2aef774b73b8 .functor BUFZ 15, C4; HiZ drive +v0x17b1c70_0 .net "left", 14 0, o0x2aef774b73b8; 0 drivers +v0x17b1d50_0 .net "leftOut", 14 0, L_0x17cf6d0; 1 drivers +v0x17b1e30_0 .var "mode", 2 0; +v0x17b1f10 .array/s "outVals", 2 5, 10 0; +v0x17b2080_0 .var "phase", 2 0; +v0x17b2160_0 .net "portsHaveData", 5 2, L_0x17ccd30; 1 drivers +v0x17b0530_0 .net "portsWantData", 5 2, L_0x17cd380; 1 drivers +v0x17b0610_0 .net "readAckIn", 5 2, L_0x17cdb30; 1 drivers +v0x17b2610_0 .var "readAckOut", 5 2; +v0x17b26b0_0 .var "readTarget", 2 0; +v0x17b2750_0 .var/s "readValue", 10 0; +L_0x2aef774e3138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x17b27f0 .array "regVals", 0 7; +v0x17b27f0_0 .net/s v0x17b27f0 0, 10 0, L_0x2aef774e3138; 1 drivers +v0x17b27f0_1 .net/s v0x17b27f0 1, 10 0, L_0x17cc430; 1 drivers +v0x17b27f0_2 .net/s v0x17b27f0 2, 10 0, L_0x17cc750; 1 drivers +v0x17b27f0_3 .net/s v0x17b27f0 3, 10 0, L_0x17cc7f0; 1 drivers +v0x17b27f0_4 .net/s v0x17b27f0 4, 10 0, L_0x17cc890; 1 drivers +v0x17b27f0_5 .net/s v0x17b27f0 5, 10 0, L_0x17cc930; 1 drivers +o0x2aef774b7778 .functor BUFZ 11, C4; HiZ drive +v0x17b27f0_6 .net/s v0x17b27f0 6, 10 0, o0x2aef774b7778; 0 drivers +o0x2aef774b77a8 .functor BUFZ 11, C4; HiZ drive +v0x17b27f0_7 .net/s v0x17b27f0 7, 10 0, o0x2aef774b77a8; 0 drivers +o0x2aef774b77d8 .functor BUFZ 15, C4; HiZ drive +v0x17b2a00_0 .net "right", 14 0, o0x2aef774b77d8; 0 drivers +v0x17b2ae0_0 .net "rightOut", 14 0, L_0x17cff40; 1 drivers +o0x2aef774b7838 .functor BUFZ 15, C4; HiZ drive +v0x17b2bc0_0 .net "up", 14 0, o0x2aef774b7838; 0 drivers +v0x17b2ca0_0 .net "upOut", 14 0, L_0x17cf480; 1 drivers +v0x17b2d80_0 .var "weHaveData", 5 2; +v0x17b2e60_0 .var "weWantData", 5 2; +v0x17b2f40_0 .net "writeAckIn", 5 2, L_0x17ce050; 1 drivers +v0x17b3020_0 .var "writeAckOut", 5 2; +v0x17b3100_0 .var "writeTarget", 2 0; +v0x17b31e0_0 .var/s "writeValue", 10 0; +L_0x17cc750 .part o0x2aef774b73b8, 0, 11; +L_0x17cc7f0 .part o0x2aef774b77d8, 0, 11; +L_0x17cc890 .part o0x2aef774b7838, 0, 11; +L_0x17cc930 .part L_0x17d7720, 0, 11; +L_0x17cca30 .part o0x2aef774b73b8, 11, 1; +L_0x17ccb50 .part o0x2aef774b77d8, 11, 1; +L_0x17ccc40 .part o0x2aef774b7838, 11, 1; +L_0x17ccd30 .concat8 [ 1 1 1 1], L_0x17cca30, L_0x17ccb50, L_0x17ccc40, L_0x17ccf10; +L_0x17ccf10 .part L_0x17d7720, 11, 1; +L_0x17cd090 .reduce/or L_0x17ccd30; +L_0x17cd130 .part o0x2aef774b73b8, 12, 1; +L_0x17cd1d0 .part o0x2aef774b77d8, 12, 1; +L_0x17cd2e0 .part o0x2aef774b7838, 12, 1; +L_0x17cd380 .concat8 [ 1 1 1 1], L_0x17cd130, L_0x17cd1d0, L_0x17cd2e0, L_0x17cd520; +L_0x17cd520 .part L_0x17d7720, 12, 1; +L_0x17cd610 .reduce/or L_0x17cd380; +L_0x17cd790 .part o0x2aef774b73b8, 13, 1; +L_0x17cd8c0 .part o0x2aef774b77d8, 13, 1; +L_0x17cda90 .part o0x2aef774b7838, 13, 1; +L_0x17cdb30 .concat8 [ 1 1 1 1], L_0x17cd790, L_0x17cd8c0, L_0x17cda90, L_0x17cd9f0; +L_0x17cd9f0 .part L_0x17d7720, 13, 1; +L_0x17cdd30 .reduce/or L_0x17cdb30; +L_0x17cdc30 .part o0x2aef774b73b8, 14, 1; +L_0x17cdee0 .part o0x2aef774b77d8, 14, 1; +L_0x17cde20 .part o0x2aef774b7838, 14, 1; +L_0x17ce050 .concat8 [ 1 1 1 1], L_0x17cdc30, L_0x17cdee0, L_0x17cde20, L_0x17cdf80; +L_0x17cdf80 .part L_0x17d7720, 14, 1; +L_0x17ce370 .reduce/or L_0x17ce050; +L_0x17ce240 .part v0x17b2610_0, 0, 1; +L_0x17ce550 .part v0x17b2610_0, 1, 1; +L_0x17ce460 .part v0x17b2610_0, 2, 1; +L_0x17ce740 .part v0x17b2610_0, 3, 1; +L_0x17ce640 .part v0x17b3020_0, 0, 1; +L_0x17ce980 .part v0x17b3020_0, 1, 1; +L_0x17ce870 .part v0x17b3020_0, 2, 1; +L_0x17ceb40 .part v0x17b3020_0, 3, 1; +L_0x17cea20 .part v0x17b2e60_0, 0, 1; +L_0x17ceda0 .part v0x17b2e60_0, 1, 1; +L_0x17cec70 .part v0x17b2e60_0, 2, 1; +L_0x17cef80 .part v0x17b2e60_0, 3, 1; +L_0x17cee40 .part v0x17b2d80_0, 0, 1; +L_0x17cf170 .part v0x17b2d80_0, 1, 1; +L_0x17cf020 .part v0x17b2d80_0, 2, 1; +L_0x17cf0c0 .part v0x17b2d80_0, 3, 1; +L_0x17cf210 .array/port v0x17b1ad0, L_0x17cf570; +L_0x17cf570 .concat [ 4 2 0 0], v0x17aecb0_0, L_0x2aef774e3180; +LS_0x17cf480_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_2, L_0x17cf020, L_0x17cec70, L_0x17ce870; +LS_0x17cf480_0_4 .concat8 [ 1 0 0 0], L_0x17ce460; +L_0x17cf480 .concat8 [ 14 1 0 0], LS_0x17cf480_0_0, LS_0x17cf480_0_4; +LS_0x17cf990_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_3, L_0x17cf0c0, L_0x17cef80, L_0x17ceb40; +LS_0x17cf990_0_4 .concat8 [ 1 0 0 0], L_0x17ce740; +L_0x17cf990 .concat8 [ 14 1 0 0], LS_0x17cf990_0_0, LS_0x17cf990_0_4; +LS_0x17cf6d0_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_0, L_0x17cee40, L_0x17cea20, L_0x17ce640; +LS_0x17cf6d0_0_4 .concat8 [ 1 0 0 0], L_0x17ce240; +L_0x17cf6d0 .concat8 [ 14 1 0 0], LS_0x17cf6d0_0_0, LS_0x17cf6d0_0_4; +LS_0x17cff40_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_1, L_0x17cf170, L_0x17ceda0, L_0x17ce980; +LS_0x17cff40_0_4 .concat8 [ 1 0 0 0], L_0x17ce550; +L_0x17cff40 .concat8 [ 14 1 0 0], LS_0x17cff40_0_0, LS_0x17cff40_0_4; +L_0x17cfc30 .part L_0x17cd270, 14, 4; +L_0x17d0350 .part L_0x17cd270, 11, 3; +L_0x17d0160 .part L_0x17cd270, 8, 3; +L_0x17d05a0 .part L_0x17cd270, 10, 4; +L_0x17d03f0 .part L_0x17cd270, 0, 11; + .scope S_0x17a3e20; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa2eb00_0, 0, 3; + %store/vec4 v0x17a7a60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa2ed20_0, 0, 3; + %store/vec4 v0x17a7c80_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa2e860_0, 0, 3; + %store/vec4 v0x17a77c0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa2b520_0, 0, 11; + %store/vec4 v0x17a43b0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa2b620_0, 0, 11; + %store/vec4 v0x17a44b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2ba60_0, 0, 4; + %store/vec4 v0x17a48f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2f2b0_0, 0, 4; + %store/vec4 v0x17a6290_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2fba0_0, 0, 4; + %store/vec4 v0x17a8a20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2fd60_0, 0, 4; + %store/vec4 v0x17a8be0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2fac0_0, 0, 4; + %store/vec4 v0x17a8940_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa2ebe0, 4, 0; + %store/vec4a v0x17a7b40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa2ebe0, 4, 0; + %store/vec4a v0x17a7b40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa2ebe0, 4, 0; + %store/vec4a v0x17a7b40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa2ebe0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0xa2b250, v0xa2e7a0 {0 0 0}; + %store/vec4a v0x17a7b40, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x17a4030, v0x17a7700 {0 0 0}; %end; .thread T_0; - .scope S_0xa2b050; + .scope S_0x17a3e20; T_1 ; - %wait E_0x99f0f0; - %load/vec4 v0xa2eb00_0; + %wait E_0x1717d10; + %load/vec4 v0x17a7a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -977,7 +982,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0xa2ed20_0; + %load/vec4 v0x17a7c80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -992,185 +997,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0xa2b8a0_0; + %load/vec4 v0x17a4730_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0xa2ee00_0; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a7d60_0; + %load/vec4 v0x17a4ab0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; - %load/vec4 v0xa2bc20_0; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4/off/d v0x17a6290_0, 4, 5; + %load/vec4 v0x17a4ab0_0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; - %load/vec4 v0xa2bc20_0; - %assign/vec4 v0xa2f390_0, 0; + %assign/vec4 v0x17a7a60_0, 0; + %load/vec4 v0x17a4ab0_0; + %assign/vec4 v0x17a8210_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; - %load/vec4 v0xa2bc20_0; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %load/vec4 v0x17a4ab0_0; + %assign/vec4 v0x17a77c0_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0xa2ee00_0; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a7d60_0; + %load/vec4 v0x17a77c0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; - %load/vec4 v0xa2e860_0; - %assign/vec4 v0xa2f390_0, 0; + %assign/vec4 v0x17a7a60_0, 0; + %load/vec4 v0x17a77c0_0; + %assign/vec4 v0x17a8210_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0xa2bc20_0; + %load/vec4 v0x17a4ab0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0xa2e110_0; + %load/vec4 v0x17a70c0_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1178,29 +1183,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; - %load/vec4 v0xa2bc20_0; - %assign/vec4 v0xa2f390_0, 0; + %assign/vec4 v0x17a7a60_0, 0; + %load/vec4 v0x17a4ab0_0; + %assign/vec4 v0x17a8210_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1208,10 +1213,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0xa2b8a0_0; + %load/vec4 v0x17a4730_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1278,180 +1283,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0xa2b520_0; - %load/vec4 v0xa2f470_0; + %load/vec4 v0x17a43b0_0; + %load/vec4 v0x17a82f0_0; %add; - %assign/vec4 v0xa2b520_0, 0; - %load/vec4 v0xa2ba60_0; + %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0xa2b520_0; - %load/vec4 v0xa2f470_0; + %load/vec4 v0x17a43b0_0; + %load/vec4 v0x17a82f0_0; %sub; - %assign/vec4 v0xa2b520_0, 0; - %load/vec4 v0xa2ba60_0; + %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a48f0_0; %pad/u 11; - %load/vec4 v0xa2f470_0; + %load/vec4 v0x17a82f0_0; %add; %pad/u 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0xa2f470_0; - %assign/vec4 v0xa2ff20_0, 0; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a82f0_0; + %assign/vec4 v0x17a8da0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0xa2b7c0_0; - %assign/vec4 v0xa2ff20_0, 0; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a4650_0; + %assign/vec4 v0x17a8da0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0xa2b520_0; - %load/vec4 v0xa2b7c0_0; + %load/vec4 v0x17a43b0_0; + %load/vec4 v0x17a4650_0; %add; - %assign/vec4 v0xa2b520_0, 0; - %load/vec4 v0xa2ba60_0; + %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0xa2b520_0; - %load/vec4 v0xa2b7c0_0; + %load/vec4 v0x17a43b0_0; + %load/vec4 v0x17a4650_0; %sub; - %assign/vec4 v0xa2b520_0, 0; - %load/vec4 v0xa2ba60_0; + %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a48f0_0; %pad/u 11; - %load/vec4 v0xa2b7c0_0; + %load/vec4 v0x17a4650_0; %add; %pad/u 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0xa2b620_0; - %assign/vec4 v0xa2b520_0, 0; - %load/vec4 v0xa2b520_0; - %assign/vec4 v0xa2b620_0, 0; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a44b0_0; + %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0x17a43b0_0; + %assign/vec4 v0x17a44b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0xa2b520_0; - %assign/vec4 v0xa2b620_0, 0; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a43b0_0; + %assign/vec4 v0x17a44b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0xa2b520_0; + %load/vec4 v0x17a43b0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0xa2b520_0, 0; - %load/vec4 v0xa2ba60_0; + %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0xa2b980_0; - %assign/vec4 v0xa2bb40_0, 0; + %load/vec4 v0x17a4810_0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0xa2b520_0; + %load/vec4 v0x17a43b0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0xa2b980_0; - %assign/vec4 v0xa2bb40_0, 0; + %load/vec4 v0x17a4810_0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0xa2b520_0; + %load/vec4 v0x17a43b0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0xa2b980_0; - %assign/vec4 v0xa2bb40_0, 0; + %load/vec4 v0x17a4810_0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0xa2b520_0; + %load/vec4 v0x17a43b0_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0xa2b980_0; - %assign/vec4 v0xa2bb40_0, 0; + %load/vec4 v0x17a4810_0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0xa2b520_0; + %load/vec4 v0x17a43b0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0xa2b980_0; - %assign/vec4 v0xa2bb40_0, 0; + %load/vec4 v0x17a4810_0; + %assign/vec4 v0x17a49d0_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0xa2ba60_0; + %load/vec4 v0x17a48f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa2bb40_0, 0; + %assign/vec4 v0x17a49d0_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0xa2b8a0_0; + %load/vec4 v0x17a4730_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0xa2b8a0_0; + %load/vec4 v0x17a4730_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0xa2b700_0; + %load/vec4 v0x17a4590_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0xa2b700_0; + %load/vec4 v0x17a4590_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1459,162 +1464,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0xa2b700_0; + %load/vec4 v0x17a4590_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0xa2ff20_0; - %assign/vec4 v0xa2b520_0, 0; + %load/vec4 v0x17a8da0_0; + %assign/vec4 v0x17a43b0_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; - %load/vec4 v0xa2b700_0; + %assign/vec4 v0x17a7a60_0, 0; + %load/vec4 v0x17a4590_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0xa2e860_0; - %assign/vec4 v0xa2fe40_0, 0; - %load/vec4 v0xa2ff20_0; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; + %assign/vec4 v0x17a8cc0_0, 0; + %load/vec4 v0x17a8da0_0; + %load/vec4 v0x17a77c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2e860_0; + %load/vec4 v0x17a77c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; + %assign/vec4/off/d v0x17a8940_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0xa2b700_0; + %load/vec4 v0x17a4590_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0xa2b700_0; - %assign/vec4 v0xa2fe40_0, 0; - %load/vec4 v0xa2ff20_0; - %load/vec4 v0xa2b700_0; + %load/vec4 v0x17a4590_0; + %assign/vec4 v0x17a8cc0_0, 0; + %load/vec4 v0x17a8da0_0; + %load/vec4 v0x17a4590_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2b700_0; + %load/vec4 v0x17a4590_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2b700_0; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a4590_0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0xa2e290_0; + %load/vec4 v0x17a7240_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0xa2b700_0; - %assign/vec4 v0xa2fe40_0, 0; + %load/vec4 v0x17a4590_0; + %assign/vec4 v0x17a8cc0_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0xa2ed20_0; + %load/vec4 v0x17a7c80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1629,82 +1634,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0xa2f390_0; + %load/vec4 v0x17a8210_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0xa2e110_0; + %load/vec4 v0x17a70c0_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; + %assign/vec4 v0x17a7a60_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2fba0_0, 0, 4; - %load/vec4 v0xa2ee00_0; + %store/vec4 v0x17a8a20_0, 0, 4; + %load/vec4 v0x17a7d60_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0xa2ee00_0; + %load/vec4 v0x17a7d60_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1712,54 +1717,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0xa2ee00_0; - %load/vec4 v0xa2f390_0; + %load/vec4 v0x17a7d60_0; + %load/vec4 v0x17a8210_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; - %load/vec4 v0xa2f390_0; + %assign/vec4 v0x17a7a60_0, 0; + %load/vec4 v0x17a8210_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2f550, 4; - %assign/vec4 v0xa2f470_0, 0; + %load/vec4a v0x17a83d0, 4; + %assign/vec4 v0x17a82f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2f390_0; + %load/vec4 v0x17a8210_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2f2b0_0, 4, 5; + %assign/vec4/off/d v0x17a6290_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2f390_0; + %load/vec4 v0x17a8210_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2fba0_0, 4, 5; - %load/vec4 v0xa2f390_0; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %load/vec4 v0x17a8210_0; + %assign/vec4 v0x17a77c0_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0xa2ed20_0; + %load/vec4 v0x17a7c80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1775,93 +1780,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0xa2fe40_0; + %load/vec4 v0x17a8cc0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0xa2e290_0; + %load/vec4 v0x17a7240_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0xa2d200_0; + %load/vec4 v0x17a4160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2fe40_0, 0; + %assign/vec4 v0x17a8cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2fac0_0, 4, 5; - %load/vec4 v0xa2ff20_0; + %assign/vec4/off/d v0x17a8940_0, 4, 5; + %load/vec4 v0x17a8da0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa2ebe0, 0, 4; + %assign/vec4/a/d v0x17a7b40, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a77c0_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1869,33 +1874,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0xa2fe40_0; + %load/vec4 v0x17a8cc0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0xa2fc80_0; - %load/vec4 v0xa2fe40_0; + %load/vec4 v0x17a8b00_0; + %load/vec4 v0x17a8cc0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0xa2fe40_0; + %load/vec4 v0x17a8cc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0xa2fac0_0, 4, 1; + %store/vec4 v0x17a8940_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa2eb00_0, 0; - %load/vec4 v0xa2fe40_0; - %assign/vec4 v0xa2e860_0, 0; + %assign/vec4 v0x17a7a60_0, 0; + %load/vec4 v0x17a8cc0_0; + %assign/vec4 v0x17a77c0_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa2ed20_0, 0; + %assign/vec4 v0x17a7c80_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1904,19 +1909,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0xa2b050; + .scope S_0x17a3e20; T_2 ; - %wait E_0x97c930; - %load/vec4 v0xa2ed20_0; + %wait E_0x16f55d0; + %load/vec4 v0x17a7c80_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa2eb00_0; + %load/vec4 v0x17a7a60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0xa2bb40_0; + %load/vec4 v0x17a49d0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1925,62 +1930,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0xa2bb40_0; - %assign/vec4 v0xa2ba60_0, 0; + %load/vec4 v0x17a49d0_0; + %assign/vec4 v0x17a48f0_0, 0; T_2.0 ; - %load/vec4 v0xa2ed20_0; + %load/vec4 v0x17a7c80_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2f2b0_0, 0, 4; + %store/vec4 v0x17a6290_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0xa301a0; + .scope S_0x17a9020; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa33cb0_0, 0, 3; + %store/vec4 v0x17acbf0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa33ee0_0, 0, 3; + %store/vec4 v0x17ace20_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa33a70_0, 0, 3; + %store/vec4 v0x17ac9b0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa30660_0, 0, 11; + %store/vec4 v0x17a95a0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa30760_0, 0, 11; + %store/vec4 v0x17a96a0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa30ba0_0, 0, 4; + %store/vec4 v0x17a9ae0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa34470_0, 0, 4; + %store/vec4 v0x17ad3b0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa34cc0_0, 0, 4; + %store/vec4 v0x17adc00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa34e80_0, 0, 4; + %store/vec4 v0x17addc0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa34be0_0, 0, 4; + %store/vec4 v0x17adb20_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa33d70, 4, 0; + %store/vec4a v0x17accb0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa33d70, 4, 0; + %store/vec4a v0x17accb0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa33d70, 4, 0; + %store/vec4a v0x17accb0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa33d70, 4, 0; - %vpi_call 3 185 "$readmemb", P_0xa30370, v0xa339b0 {0 0 0}; + %store/vec4a v0x17accb0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x17a9230, v0x17ac8f0 {0 0 0}; %end; .thread T_3; - .scope S_0xa301a0; + .scope S_0x17a9020; T_4 ; - %wait E_0x99f0f0; - %load/vec4 v0xa33cb0_0; + %wait E_0x1717d10; + %load/vec4 v0x17acbf0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1995,7 +2000,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0xa33ee0_0; + %load/vec4 v0x17ace20_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2010,185 +2015,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0xa309e0_0; + %load/vec4 v0x17a9920_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0xa33fc0_0; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17acf00_0; + %load/vec4 v0x17a9ca0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34470_0, 4, 5; - %load/vec4 v0xa30d60_0; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %load/vec4 v0x17a9ca0_0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; - %load/vec4 v0xa30d60_0; - %assign/vec4 v0xa34510_0, 0; + %assign/vec4 v0x17acbf0_0, 0; + %load/vec4 v0x17a9ca0_0; + %assign/vec4 v0x17ad450_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; - %load/vec4 v0xa30d60_0; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4/off/d v0x17adc00_0, 4, 5; + %load/vec4 v0x17a9ca0_0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0xa33fc0_0; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17acf00_0; + %load/vec4 v0x17ac9b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; - %load/vec4 v0xa33a70_0; - %assign/vec4 v0xa34510_0, 0; + %assign/vec4 v0x17acbf0_0, 0; + %load/vec4 v0x17ac9b0_0; + %assign/vec4 v0x17ad450_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %assign/vec4/off/d v0x17adc00_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0xa30d60_0; + %load/vec4 v0x17a9ca0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0xa33370_0; + %load/vec4 v0x17ac2b0_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2196,29 +2201,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; - %load/vec4 v0xa30d60_0; - %assign/vec4 v0xa34510_0, 0; + %assign/vec4 v0x17acbf0_0, 0; + %load/vec4 v0x17a9ca0_0; + %assign/vec4 v0x17ad450_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %assign/vec4/off/d v0x17adc00_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %assign/vec4/off/d v0x17adc00_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %assign/vec4/off/d v0x17adc00_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; + %assign/vec4/off/d v0x17adc00_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2226,10 +2231,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0xa309e0_0; + %load/vec4 v0x17a9920_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2296,180 +2301,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0xa30660_0; - %load/vec4 v0xa345b0_0; + %load/vec4 v0x17a95a0_0; + %load/vec4 v0x17ad4f0_0; %add; - %assign/vec4 v0xa30660_0, 0; - %load/vec4 v0xa30ba0_0; + %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0xa30660_0; - %load/vec4 v0xa345b0_0; + %load/vec4 v0x17a95a0_0; + %load/vec4 v0x17ad4f0_0; %sub; - %assign/vec4 v0xa30660_0, 0; - %load/vec4 v0xa30ba0_0; + %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9ae0_0; %pad/u 11; - %load/vec4 v0xa345b0_0; + %load/vec4 v0x17ad4f0_0; %add; %pad/u 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0xa345b0_0; - %assign/vec4 v0xa35040_0, 0; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17ad4f0_0; + %assign/vec4 v0x17adf80_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0xa30900_0; - %assign/vec4 v0xa35040_0, 0; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9840_0; + %assign/vec4 v0x17adf80_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0xa30660_0; - %load/vec4 v0xa30900_0; + %load/vec4 v0x17a95a0_0; + %load/vec4 v0x17a9840_0; %add; - %assign/vec4 v0xa30660_0, 0; - %load/vec4 v0xa30ba0_0; + %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0xa30660_0; - %load/vec4 v0xa30900_0; + %load/vec4 v0x17a95a0_0; + %load/vec4 v0x17a9840_0; %sub; - %assign/vec4 v0xa30660_0, 0; - %load/vec4 v0xa30ba0_0; + %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9ae0_0; %pad/u 11; - %load/vec4 v0xa30900_0; + %load/vec4 v0x17a9840_0; %add; %pad/u 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0xa30760_0; - %assign/vec4 v0xa30660_0, 0; - %load/vec4 v0xa30660_0; - %assign/vec4 v0xa30760_0, 0; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a96a0_0; + %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0x17a95a0_0; + %assign/vec4 v0x17a96a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0xa30660_0; - %assign/vec4 v0xa30760_0, 0; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a95a0_0; + %assign/vec4 v0x17a96a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0xa30660_0; + %load/vec4 v0x17a95a0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0xa30660_0, 0; - %load/vec4 v0xa30ba0_0; + %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0xa30ac0_0; - %assign/vec4 v0xa30c80_0, 0; + %load/vec4 v0x17a9a00_0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0xa30660_0; + %load/vec4 v0x17a95a0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0xa30ac0_0; - %assign/vec4 v0xa30c80_0, 0; + %load/vec4 v0x17a9a00_0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0xa30660_0; + %load/vec4 v0x17a95a0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0xa30ac0_0; - %assign/vec4 v0xa30c80_0, 0; + %load/vec4 v0x17a9a00_0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0xa30660_0; + %load/vec4 v0x17a95a0_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0xa30ac0_0; - %assign/vec4 v0xa30c80_0, 0; + %load/vec4 v0x17a9a00_0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0xa30660_0; + %load/vec4 v0x17a95a0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0xa30ac0_0; - %assign/vec4 v0xa30c80_0, 0; + %load/vec4 v0x17a9a00_0; + %assign/vec4 v0x17a9bc0_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0xa30ba0_0; + %load/vec4 v0x17a9ae0_0; %addi 1, 0, 4; - %assign/vec4 v0xa30c80_0, 0; + %assign/vec4 v0x17a9bc0_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0xa309e0_0; + %load/vec4 v0x17a9920_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0xa309e0_0; + %load/vec4 v0x17a9920_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0xa30840_0; + %load/vec4 v0x17a9780_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0xa30840_0; + %load/vec4 v0x17a9780_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2477,162 +2482,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0xa30840_0; + %load/vec4 v0x17a9780_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0xa35040_0; - %assign/vec4 v0xa30660_0, 0; + %load/vec4 v0x17adf80_0; + %assign/vec4 v0x17a95a0_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; - %load/vec4 v0xa30840_0; + %assign/vec4 v0x17acbf0_0, 0; + %load/vec4 v0x17a9780_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0xa33a70_0; - %assign/vec4 v0xa34f60_0, 0; - %load/vec4 v0xa35040_0; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; + %assign/vec4 v0x17adea0_0, 0; + %load/vec4 v0x17adf80_0; + %load/vec4 v0x17ac9b0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa33a70_0; + %load/vec4 v0x17ac9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34be0_0, 4, 5; + %assign/vec4/off/d v0x17adb20_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0xa30840_0; + %load/vec4 v0x17a9780_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0xa30840_0; - %assign/vec4 v0xa34f60_0, 0; - %load/vec4 v0xa35040_0; - %load/vec4 v0xa30840_0; + %load/vec4 v0x17a9780_0; + %assign/vec4 v0x17adea0_0, 0; + %load/vec4 v0x17adf80_0; + %load/vec4 v0x17a9780_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa30840_0; + %load/vec4 v0x17a9780_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa30840_0; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17a9780_0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0xa334f0_0; + %load/vec4 v0x17ac430_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0xa30840_0; - %assign/vec4 v0xa34f60_0, 0; + %load/vec4 v0x17a9780_0; + %assign/vec4 v0x17adea0_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0xa33ee0_0; + %load/vec4 v0x17ace20_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2647,82 +2652,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0xa34510_0; + %load/vec4 v0x17ad450_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0xa33370_0; + %load/vec4 v0x17ac2b0_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; + %assign/vec4 v0x17acbf0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa34cc0_0, 0, 4; - %load/vec4 v0xa33fc0_0; + %store/vec4 v0x17adc00_0, 0, 4; + %load/vec4 v0x17acf00_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0xa33fc0_0; + %load/vec4 v0x17acf00_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2730,54 +2735,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0xa33fc0_0; - %load/vec4 v0xa34510_0; + %load/vec4 v0x17acf00_0; + %load/vec4 v0x17ad450_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; - %load/vec4 v0xa34510_0; + %assign/vec4 v0x17acbf0_0, 0; + %load/vec4 v0x17ad450_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa34650, 4; - %assign/vec4 v0xa345b0_0, 0; + %load/vec4a v0x17ad590, 4; + %assign/vec4 v0x17ad4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa34510_0; + %load/vec4 v0x17ad450_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34470_0, 4, 5; + %assign/vec4/off/d v0x17ad3b0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa34510_0; + %load/vec4 v0x17ad450_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa34cc0_0, 4, 5; - %load/vec4 v0xa34510_0; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4/off/d v0x17adc00_0, 4, 5; + %load/vec4 v0x17ad450_0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0xa33ee0_0; + %load/vec4 v0x17ace20_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2793,93 +2798,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0xa34f60_0; + %load/vec4 v0x17adea0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0xa334f0_0; + %load/vec4 v0x17ac430_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0xa32420_0; + %load/vec4 v0x17ab360_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa34f60_0, 0; + %assign/vec4 v0x17adea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa34be0_0, 4, 5; - %load/vec4 v0xa35040_0; + %assign/vec4/off/d v0x17adb20_0, 4, 5; + %load/vec4 v0x17adf80_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa33d70, 0, 4; + %assign/vec4/a/d v0x17accb0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2887,33 +2892,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0xa34f60_0; + %load/vec4 v0x17adea0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0xa34da0_0; - %load/vec4 v0xa34f60_0; + %load/vec4 v0x17adce0_0; + %load/vec4 v0x17adea0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0xa34f60_0; + %load/vec4 v0x17adea0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0xa34be0_0, 4, 1; + %store/vec4 v0x17adb20_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa33cb0_0, 0; - %load/vec4 v0xa34f60_0; - %assign/vec4 v0xa33a70_0, 0; + %assign/vec4 v0x17acbf0_0, 0; + %load/vec4 v0x17adea0_0; + %assign/vec4 v0x17ac9b0_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa33ee0_0, 0; + %assign/vec4 v0x17ace20_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2922,19 +2927,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0xa301a0; + .scope S_0x17a9020; T_5 ; - %wait E_0x97c930; - %load/vec4 v0xa33ee0_0; + %wait E_0x16f55d0; + %load/vec4 v0x17ace20_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa33cb0_0; + %load/vec4 v0x17acbf0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0xa30c80_0; + %load/vec4 v0x17a9bc0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2943,62 +2948,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0xa30c80_0; - %assign/vec4 v0xa30ba0_0, 0; + %load/vec4 v0x17a9bc0_0; + %assign/vec4 v0x17a9ae0_0, 0; T_5.0 ; - %load/vec4 v0xa33ee0_0; + %load/vec4 v0x17ace20_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa34470_0, 0, 4; + %store/vec4 v0x17ad3b0_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0xa352c0; + .scope S_0x17ae200; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa38e20_0, 0, 3; + %store/vec4 v0x17b1e30_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa39070_0, 0, 3; + %store/vec4 v0x17b2080_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa38b80_0, 0, 3; + %store/vec4 v0x17b1b90_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa35710_0, 0, 11; + %store/vec4 v0x17ae720_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa35810_0, 0, 11; + %store/vec4 v0x17ae820_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa35ca0_0, 0, 4; + %store/vec4 v0x17aecb0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa39600_0, 0, 4; + %store/vec4 v0x17b2610_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa39e50_0, 0, 4; + %store/vec4 v0x17b2e60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa3a010_0, 0, 4; + %store/vec4 v0x17b3020_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa39d70_0, 0, 4; + %store/vec4 v0x17b2d80_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa38f00, 4, 0; + %store/vec4a v0x17b1f10, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa38f00, 4, 0; + %store/vec4a v0x17b1f10, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa38f00, 4, 0; + %store/vec4a v0x17b1f10, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa38f00, 4, 0; - %vpi_call 3 185 "$readmemb", P_0xa354e0, v0xa38ac0 {0 0 0}; + %store/vec4a v0x17b1f10, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x17ae460, v0x17b1ad0 {0 0 0}; %end; .thread T_6; - .scope S_0xa352c0; + .scope S_0x17ae200; T_7 ; - %wait E_0x99f0f0; - %load/vec4 v0xa38e20_0; + %wait E_0x1717d10; + %load/vec4 v0x17b1e30_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3013,7 +3018,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0xa39070_0; + %load/vec4 v0x17b2080_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3028,185 +3033,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0xa35a90_0; + %load/vec4 v0x17aeaa0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0xa39150_0; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17b2160_0; + %load/vec4 v0x17aee70_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39600_0, 4, 5; - %load/vec4 v0xa35e60_0; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4/off/d v0x17b2610_0, 4, 5; + %load/vec4 v0x17aee70_0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa38e20_0, 0; - %load/vec4 v0xa35e60_0; - %assign/vec4 v0xa396a0_0, 0; + %assign/vec4 v0x17b1e30_0, 0; + %load/vec4 v0x17aee70_0; + %assign/vec4 v0x17b26b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39e50_0, 4, 5; - %load/vec4 v0xa35e60_0; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %load/vec4 v0x17aee70_0; + %assign/vec4 v0x17b1b90_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0xa39150_0; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b2160_0; + %load/vec4 v0x17b1b90_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa38e20_0, 0; - %load/vec4 v0xa38b80_0; - %assign/vec4 v0xa396a0_0, 0; + %assign/vec4 v0x17b1e30_0, 0; + %load/vec4 v0x17b1b90_0; + %assign/vec4 v0x17b26b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39e50_0, 4, 5; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0xa35e60_0; + %load/vec4 v0x17aee70_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0xa38470_0; + %load/vec4 v0x17b1480_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3214,29 +3219,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa38e20_0, 0; - %load/vec4 v0xa35e60_0; - %assign/vec4 v0xa396a0_0, 0; + %assign/vec4 v0x17b1e30_0, 0; + %load/vec4 v0x17aee70_0; + %assign/vec4 v0x17b26b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39e50_0, 4, 5; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39e50_0, 4, 5; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39e50_0, 4, 5; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39e50_0, 4, 5; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3244,10 +3249,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0xa35a90_0; + %load/vec4 v0x17aeaa0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3314,180 +3319,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0xa35710_0; - %load/vec4 v0xa39740_0; + %load/vec4 v0x17ae720_0; + %load/vec4 v0x17b2750_0; %add; - %assign/vec4 v0xa35710_0, 0; - %load/vec4 v0xa35ca0_0; + %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0xa35710_0; - %load/vec4 v0xa39740_0; + %load/vec4 v0x17ae720_0; + %load/vec4 v0x17b2750_0; %sub; - %assign/vec4 v0xa35710_0, 0; - %load/vec4 v0xa35ca0_0; + %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17aecb0_0; %pad/u 11; - %load/vec4 v0xa39740_0; + %load/vec4 v0x17b2750_0; %add; %pad/u 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0xa39740_0; - %assign/vec4 v0xa3a1d0_0, 0; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17b2750_0; + %assign/vec4 v0x17b31e0_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0xa359b0_0; - %assign/vec4 v0xa3a1d0_0, 0; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17ae9c0_0; + %assign/vec4 v0x17b31e0_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0xa35710_0; - %load/vec4 v0xa359b0_0; + %load/vec4 v0x17ae720_0; + %load/vec4 v0x17ae9c0_0; %add; - %assign/vec4 v0xa35710_0, 0; - %load/vec4 v0xa35ca0_0; + %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0xa35710_0; - %load/vec4 v0xa359b0_0; + %load/vec4 v0x17ae720_0; + %load/vec4 v0x17ae9c0_0; %sub; - %assign/vec4 v0xa35710_0, 0; - %load/vec4 v0xa35ca0_0; + %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17aecb0_0; %pad/u 11; - %load/vec4 v0xa359b0_0; + %load/vec4 v0x17ae9c0_0; %add; %pad/u 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0xa35810_0; - %assign/vec4 v0xa35710_0, 0; - %load/vec4 v0xa35710_0; - %assign/vec4 v0xa35810_0, 0; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17ae820_0; + %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0x17ae720_0; + %assign/vec4 v0x17ae820_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0xa35710_0; - %assign/vec4 v0xa35810_0, 0; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17ae720_0; + %assign/vec4 v0x17ae820_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0xa35710_0; + %load/vec4 v0x17ae720_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0xa35710_0, 0; - %load/vec4 v0xa35ca0_0; + %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0xa35bc0_0; - %assign/vec4 v0xa35d80_0, 0; + %load/vec4 v0x17aebd0_0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0xa35710_0; + %load/vec4 v0x17ae720_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0xa35bc0_0; - %assign/vec4 v0xa35d80_0, 0; + %load/vec4 v0x17aebd0_0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0xa35710_0; + %load/vec4 v0x17ae720_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0xa35bc0_0; - %assign/vec4 v0xa35d80_0, 0; + %load/vec4 v0x17aebd0_0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0xa35710_0; + %load/vec4 v0x17ae720_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0xa35bc0_0; - %assign/vec4 v0xa35d80_0, 0; + %load/vec4 v0x17aebd0_0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0xa35710_0; + %load/vec4 v0x17ae720_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0xa35bc0_0; - %assign/vec4 v0xa35d80_0, 0; + %load/vec4 v0x17aebd0_0; + %assign/vec4 v0x17aed90_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0xa35ca0_0; + %load/vec4 v0x17aecb0_0; %addi 1, 0, 4; - %assign/vec4 v0xa35d80_0, 0; + %assign/vec4 v0x17aed90_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0xa35a90_0; + %load/vec4 v0x17aeaa0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0xa35a90_0; + %load/vec4 v0x17aeaa0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0xa358f0_0; + %load/vec4 v0x17ae900_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0xa358f0_0; + %load/vec4 v0x17ae900_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3495,162 +3500,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0xa358f0_0; + %load/vec4 v0x17ae900_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0xa3a1d0_0; - %assign/vec4 v0xa35710_0, 0; + %load/vec4 v0x17b31e0_0; + %assign/vec4 v0x17ae720_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa38e20_0, 0; - %load/vec4 v0xa358f0_0; + %assign/vec4 v0x17b1e30_0, 0; + %load/vec4 v0x17ae900_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0xa38b80_0; - %assign/vec4 v0xa3a0f0_0, 0; - %load/vec4 v0xa3a1d0_0; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; + %assign/vec4 v0x17b3100_0, 0; + %load/vec4 v0x17b31e0_0; + %load/vec4 v0x17b1b90_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa38b80_0; + %load/vec4 v0x17b1b90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39d70_0, 4, 5; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0xa358f0_0; + %load/vec4 v0x17ae900_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0xa358f0_0; - %assign/vec4 v0xa3a0f0_0, 0; - %load/vec4 v0xa3a1d0_0; - %load/vec4 v0xa358f0_0; + %load/vec4 v0x17ae900_0; + %assign/vec4 v0x17b3100_0, 0; + %load/vec4 v0x17b31e0_0; + %load/vec4 v0x17ae900_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa358f0_0; + %load/vec4 v0x17ae900_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa358f0_0; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17ae900_0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0xa385f0_0; + %load/vec4 v0x17b1600_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0xa358f0_0; - %assign/vec4 v0xa3a0f0_0, 0; + %load/vec4 v0x17ae900_0; + %assign/vec4 v0x17b3100_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0xa39070_0; + %load/vec4 v0x17b2080_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3665,82 +3670,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0xa396a0_0; + %load/vec4 v0x17b26b0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0xa38470_0; + %load/vec4 v0x17b1480_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa38e20_0, 0; + %assign/vec4 v0x17b1e30_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa39e50_0, 0, 4; - %load/vec4 v0xa39150_0; + %store/vec4 v0x17b2e60_0, 0, 4; + %load/vec4 v0x17b2160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0xa39150_0; + %load/vec4 v0x17b2160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3748,54 +3753,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0xa39150_0; - %load/vec4 v0xa396a0_0; + %load/vec4 v0x17b2160_0; + %load/vec4 v0x17b26b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa38e20_0, 0; - %load/vec4 v0xa396a0_0; + %assign/vec4 v0x17b1e30_0, 0; + %load/vec4 v0x17b26b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa397e0, 4; - %assign/vec4 v0xa39740_0, 0; + %load/vec4a v0x17b27f0, 4; + %assign/vec4 v0x17b2750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa396a0_0; + %load/vec4 v0x17b26b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39600_0, 4, 5; + %assign/vec4/off/d v0x17b2610_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa396a0_0; + %load/vec4 v0x17b26b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa39e50_0, 4, 5; - %load/vec4 v0xa396a0_0; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %load/vec4 v0x17b26b0_0; + %assign/vec4 v0x17b1b90_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0xa39070_0; + %load/vec4 v0x17b2080_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3811,93 +3816,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0xa3a0f0_0; + %load/vec4 v0x17b3100_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0xa385f0_0; + %load/vec4 v0x17b1600_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0xa37520_0; + %load/vec4 v0x17b0530_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa3a0f0_0, 0; + %assign/vec4 v0x17b3100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa39d70_0, 4, 5; - %load/vec4 v0xa3a1d0_0; + %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %load/vec4 v0x17b31e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa38f00, 0, 4; + %assign/vec4/a/d v0x17b1f10, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1b90_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3905,33 +3910,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0xa3a0f0_0; + %load/vec4 v0x17b3100_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0xa39f30_0; - %load/vec4 v0xa3a0f0_0; + %load/vec4 v0x17b2f40_0; + %load/vec4 v0x17b3100_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0xa3a0f0_0; + %load/vec4 v0x17b3100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0xa39d70_0, 4, 1; + %store/vec4 v0x17b2d80_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa38e20_0, 0; - %load/vec4 v0xa3a0f0_0; - %assign/vec4 v0xa38b80_0, 0; + %assign/vec4 v0x17b1e30_0, 0; + %load/vec4 v0x17b3100_0; + %assign/vec4 v0x17b1b90_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa39070_0, 0; + %assign/vec4 v0x17b2080_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3940,19 +3945,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0xa352c0; + .scope S_0x17ae200; T_8 ; - %wait E_0x97c930; - %load/vec4 v0xa39070_0; + %wait E_0x16f55d0; + %load/vec4 v0x17b2080_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa38e20_0; + %load/vec4 v0x17b1e30_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0xa35d80_0; + %load/vec4 v0x17aed90_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3961,62 +3966,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0xa35d80_0; - %assign/vec4 v0xa35ca0_0, 0; + %load/vec4 v0x17aed90_0; + %assign/vec4 v0x17aecb0_0, 0; T_8.0 ; - %load/vec4 v0xa39070_0; + %load/vec4 v0x17b2080_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa39600_0, 0, 4; + %store/vec4 v0x17b2610_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0xa25f20; + .scope S_0x179ec30; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa29a70_0, 0, 3; + %store/vec4 v0x17a2840_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa29c90_0, 0, 3; + %store/vec4 v0x17a2a60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa297d0_0, 0, 3; + %store/vec4 v0x17a25a0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa263e0_0, 0, 11; + %store/vec4 v0x179f1b0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa264e0_0, 0, 11; + %store/vec4 v0x179f2b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa26920_0, 0, 4; + %store/vec4 v0x179f6f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2a220_0, 0, 4; + %store/vec4 v0x17a2ff0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2aa50_0, 0, 4; + %store/vec4 v0x17a3820_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2ac10_0, 0, 4; + %store/vec4 v0x17a39e0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2a990_0, 0, 4; + %store/vec4 v0x17a3760_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa29b50, 4, 0; + %store/vec4a v0x17a2920, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa29b50, 4, 0; + %store/vec4a v0x17a2920, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa29b50, 4, 0; + %store/vec4a v0x17a2920, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa29b50, 4, 0; - %vpi_call 3 185 "$readmemb", P_0xa26110, v0xa29710 {0 0 0}; + %store/vec4a v0x17a2920, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x179ee60, v0x17a24e0 {0 0 0}; %end; .thread T_9; - .scope S_0xa25f20; + .scope S_0x179ec30; T_10 ; - %wait E_0x99f0f0; - %load/vec4 v0xa29a70_0; + %wait E_0x1717d10; + %load/vec4 v0x17a2840_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4031,7 +4036,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0xa29c90_0; + %load/vec4 v0x17a2a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4046,185 +4051,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0xa26760_0; + %load/vec4 v0x179f530_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0xa29d70_0; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x17a2b40_0; + %load/vec4 v0x179f8b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2a220_0, 4, 5; - %load/vec4 v0xa26ae0_0; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %load/vec4 v0x179f8b0_0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa29a70_0, 0; - %load/vec4 v0xa26ae0_0; - %assign/vec4 v0xa2a2c0_0, 0; + %assign/vec4 v0x17a2840_0, 0; + %load/vec4 v0x179f8b0_0; + %assign/vec4 v0x17a3090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; - %load/vec4 v0xa26ae0_0; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4/off/d v0x17a3820_0, 4, 5; + %load/vec4 v0x179f8b0_0; + %assign/vec4 v0x17a25a0_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0xa29d70_0; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a2b40_0; + %load/vec4 v0x17a25a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa29a70_0, 0; - %load/vec4 v0xa297d0_0; - %assign/vec4 v0xa2a2c0_0, 0; + %assign/vec4 v0x17a2840_0, 0; + %load/vec4 v0x17a25a0_0; + %assign/vec4 v0x17a3090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %assign/vec4/off/d v0x17a3820_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0xa26ae0_0; + %load/vec4 v0x179f8b0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0xa290f0_0; + %load/vec4 v0x17a1ec0_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4232,29 +4237,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa29a70_0, 0; - %load/vec4 v0xa26ae0_0; - %assign/vec4 v0xa2a2c0_0, 0; + %assign/vec4 v0x17a2840_0, 0; + %load/vec4 v0x179f8b0_0; + %assign/vec4 v0x17a3090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %assign/vec4/off/d v0x17a3820_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %assign/vec4/off/d v0x17a3820_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %assign/vec4/off/d v0x17a3820_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; + %assign/vec4/off/d v0x17a3820_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4262,10 +4267,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0xa26760_0; + %load/vec4 v0x179f530_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4332,180 +4337,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0xa263e0_0; - %load/vec4 v0xa2a360_0; + %load/vec4 v0x179f1b0_0; + %load/vec4 v0x17a3130_0; %add; - %assign/vec4 v0xa263e0_0, 0; - %load/vec4 v0xa26920_0; + %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0xa263e0_0; - %load/vec4 v0xa2a360_0; + %load/vec4 v0x179f1b0_0; + %load/vec4 v0x17a3130_0; %sub; - %assign/vec4 v0xa263e0_0, 0; - %load/vec4 v0xa26920_0; + %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f6f0_0; %pad/u 11; - %load/vec4 v0xa2a360_0; + %load/vec4 v0x17a3130_0; %add; %pad/u 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0xa2a360_0; - %assign/vec4 v0xa2add0_0, 0; - %load/vec4 v0xa26920_0; + %load/vec4 v0x17a3130_0; + %assign/vec4 v0x17a3ba0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0xa26680_0; - %assign/vec4 v0xa2add0_0, 0; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f450_0; + %assign/vec4 v0x17a3ba0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0xa263e0_0; - %load/vec4 v0xa26680_0; + %load/vec4 v0x179f1b0_0; + %load/vec4 v0x179f450_0; %add; - %assign/vec4 v0xa263e0_0, 0; - %load/vec4 v0xa26920_0; + %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0xa263e0_0; - %load/vec4 v0xa26680_0; + %load/vec4 v0x179f1b0_0; + %load/vec4 v0x179f450_0; %sub; - %assign/vec4 v0xa263e0_0, 0; - %load/vec4 v0xa26920_0; + %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f6f0_0; %pad/u 11; - %load/vec4 v0xa26680_0; + %load/vec4 v0x179f450_0; %add; %pad/u 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0xa264e0_0; - %assign/vec4 v0xa263e0_0, 0; - %load/vec4 v0xa263e0_0; - %assign/vec4 v0xa264e0_0, 0; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f2b0_0; + %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0x179f1b0_0; + %assign/vec4 v0x179f2b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0xa263e0_0; - %assign/vec4 v0xa264e0_0, 0; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f1b0_0; + %assign/vec4 v0x179f2b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0xa263e0_0; + %load/vec4 v0x179f1b0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0xa263e0_0, 0; - %load/vec4 v0xa26920_0; + %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0xa26840_0; - %assign/vec4 v0xa26a00_0, 0; + %load/vec4 v0x179f610_0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0xa263e0_0; + %load/vec4 v0x179f1b0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0xa26840_0; - %assign/vec4 v0xa26a00_0, 0; + %load/vec4 v0x179f610_0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0xa263e0_0; + %load/vec4 v0x179f1b0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0xa26840_0; - %assign/vec4 v0xa26a00_0, 0; + %load/vec4 v0x179f610_0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0xa263e0_0; + %load/vec4 v0x179f1b0_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0xa26840_0; - %assign/vec4 v0xa26a00_0, 0; + %load/vec4 v0x179f610_0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0xa263e0_0; + %load/vec4 v0x179f1b0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0xa26840_0; - %assign/vec4 v0xa26a00_0, 0; + %load/vec4 v0x179f610_0; + %assign/vec4 v0x179f7d0_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0xa26920_0; + %load/vec4 v0x179f6f0_0; %addi 1, 0, 4; - %assign/vec4 v0xa26a00_0, 0; + %assign/vec4 v0x179f7d0_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0xa26760_0; + %load/vec4 v0x179f530_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0xa26760_0; + %load/vec4 v0x179f530_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0xa265c0_0; + %load/vec4 v0x179f390_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0xa265c0_0; + %load/vec4 v0x179f390_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4513,162 +4518,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0xa265c0_0; + %load/vec4 v0x179f390_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0xa2add0_0; - %assign/vec4 v0xa263e0_0, 0; + %load/vec4 v0x17a3ba0_0; + %assign/vec4 v0x179f1b0_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa29a70_0, 0; - %load/vec4 v0xa265c0_0; + %assign/vec4 v0x17a2840_0, 0; + %load/vec4 v0x179f390_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0xa297d0_0; - %assign/vec4 v0xa2acf0_0, 0; - %load/vec4 v0xa2add0_0; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; + %assign/vec4 v0x17a3ac0_0, 0; + %load/vec4 v0x17a3ba0_0; + %load/vec4 v0x17a25a0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa297d0_0; + %load/vec4 v0x17a25a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2a990_0, 4, 5; + %assign/vec4/off/d v0x17a3760_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0xa265c0_0; + %load/vec4 v0x179f390_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0xa265c0_0; - %assign/vec4 v0xa2acf0_0, 0; - %load/vec4 v0xa2add0_0; - %load/vec4 v0xa265c0_0; + %load/vec4 v0x179f390_0; + %assign/vec4 v0x17a3ac0_0, 0; + %load/vec4 v0x17a3ba0_0; + %load/vec4 v0x179f390_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa265c0_0; + %load/vec4 v0x179f390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa265c0_0; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x179f390_0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0xa29270_0; + %load/vec4 v0x17a2040_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0xa265c0_0; - %assign/vec4 v0xa2acf0_0, 0; + %load/vec4 v0x179f390_0; + %assign/vec4 v0x17a3ac0_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0xa29c90_0; + %load/vec4 v0x17a2a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4683,82 +4688,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0xa2a2c0_0; + %load/vec4 v0x17a3090_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0xa290f0_0; + %load/vec4 v0x17a1ec0_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa29a70_0, 0; + %assign/vec4 v0x17a2840_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2aa50_0, 0, 4; - %load/vec4 v0xa29d70_0; + %store/vec4 v0x17a3820_0, 0, 4; + %load/vec4 v0x17a2b40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0xa29d70_0; + %load/vec4 v0x17a2b40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4766,54 +4771,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0xa29d70_0; - %load/vec4 v0xa2a2c0_0; + %load/vec4 v0x17a2b40_0; + %load/vec4 v0x17a3090_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa29a70_0, 0; - %load/vec4 v0xa2a2c0_0; + %assign/vec4 v0x17a2840_0, 0; + %load/vec4 v0x17a3090_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa2a400, 4; - %assign/vec4 v0xa2a360_0, 0; + %load/vec4a v0x17a31d0, 4; + %assign/vec4 v0x17a3130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2a2c0_0; + %load/vec4 v0x17a3090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2a220_0, 4, 5; + %assign/vec4/off/d v0x17a2ff0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa2a2c0_0; + %load/vec4 v0x17a3090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa2aa50_0, 4, 5; - %load/vec4 v0xa2a2c0_0; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4/off/d v0x17a3820_0, 4, 5; + %load/vec4 v0x17a3090_0; + %assign/vec4 v0x17a25a0_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0xa29c90_0; + %load/vec4 v0x17a2a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4829,93 +4834,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0xa2acf0_0; + %load/vec4 v0x17a3ac0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0xa29270_0; + %load/vec4 v0x17a2040_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0xa281a0_0; + %load/vec4 v0x17a0f70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa2acf0_0, 0; + %assign/vec4 v0x17a3ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa2a990_0, 4, 5; - %load/vec4 v0xa2add0_0; + %assign/vec4/off/d v0x17a3760_0, 4, 5; + %load/vec4 v0x17a3ba0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa29b50, 0, 4; + %assign/vec4/a/d v0x17a2920, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a25a0_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4923,33 +4928,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0xa2acf0_0; + %load/vec4 v0x17a3ac0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0xa2ab30_0; - %load/vec4 v0xa2acf0_0; + %load/vec4 v0x17a3900_0; + %load/vec4 v0x17a3ac0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0xa2acf0_0; + %load/vec4 v0x17a3ac0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0xa2a990_0, 4, 1; + %store/vec4 v0x17a3760_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa29a70_0, 0; - %load/vec4 v0xa2acf0_0; - %assign/vec4 v0xa297d0_0, 0; + %assign/vec4 v0x17a2840_0, 0; + %load/vec4 v0x17a3ac0_0; + %assign/vec4 v0x17a25a0_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa29c90_0, 0; + %assign/vec4 v0x17a2a60_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4958,19 +4963,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0xa25f20; + .scope S_0x179ec30; T_11 ; - %wait E_0x97c930; - %load/vec4 v0xa29c90_0; + %wait E_0x16f55d0; + %load/vec4 v0x17a2a60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa29a70_0; + %load/vec4 v0x17a2840_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0xa26a00_0; + %load/vec4 v0x179f7d0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4979,62 +4984,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0xa26a00_0; - %assign/vec4 v0xa26920_0, 0; + %load/vec4 v0x179f7d0_0; + %assign/vec4 v0x179f6f0_0, 0; T_11.0 ; - %load/vec4 v0xa29c90_0; + %load/vec4 v0x17a2a60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa2a220_0, 0, 4; + %store/vec4 v0x17a2ff0_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x9bb360; + .scope S_0x17447f0; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa248a0_0, 0, 3; + %store/vec4 v0x179d5b0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa24ac0_0, 0, 3; + %store/vec4 v0x179d7d0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0xa24600_0, 0, 3; + %store/vec4 v0x179d310_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x9e1720_0, 0, 11; + %store/vec4 v0x175a400_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0xa21250_0, 0, 11; + %store/vec4 v0x1799f60_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa21710_0, 0, 4; + %store/vec4 v0x179a420_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa25050_0, 0, 4; + %store/vec4 v0x179dd60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa25920_0, 0, 4; + %store/vec4 v0x179e630_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa25ae0_0, 0, 4; + %store/vec4 v0x179e7f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa25840_0, 0, 4; + %store/vec4 v0x179e550_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa24980, 4, 0; + %store/vec4a v0x179d690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa24980, 4, 0; + %store/vec4a v0x179d690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa24980, 4, 0; + %store/vec4a v0x179d690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0xa24980, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x9a4250, v0xa24540 {0 0 0}; + %store/vec4a v0x179d690, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1701600, v0x179d250 {0 0 0}; %end; .thread T_12; - .scope S_0x9bb360; + .scope S_0x17447f0; T_13 ; - %wait E_0x99f0f0; - %load/vec4 v0xa248a0_0; + %wait E_0x1717d10; + %load/vec4 v0x179d5b0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5049,7 +5054,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0xa24ac0_0; + %load/vec4 v0x179d7d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5064,185 +5069,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0xa21500_0; + %load/vec4 v0x179a210_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0xa24ba0_0; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179d8b0_0; + %load/vec4 v0x179a5e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25050_0, 4, 5; - %load/vec4 v0xa218d0_0; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4/off/d v0x179dd60_0, 4, 5; + %load/vec4 v0x179a5e0_0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa248a0_0, 0; - %load/vec4 v0xa218d0_0; - %assign/vec4 v0xa250f0_0, 0; + %assign/vec4 v0x179d5b0_0, 0; + %load/vec4 v0x179a5e0_0; + %assign/vec4 v0x179de00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25920_0, 4, 5; - %load/vec4 v0xa218d0_0; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4/off/d v0x179e630_0, 4, 5; + %load/vec4 v0x179a5e0_0; + %assign/vec4 v0x179d310_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0xa24ba0_0; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d8b0_0; + %load/vec4 v0x179d310_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa248a0_0, 0; - %load/vec4 v0xa24600_0; - %assign/vec4 v0xa250f0_0, 0; + %assign/vec4 v0x179d5b0_0, 0; + %load/vec4 v0x179d310_0; + %assign/vec4 v0x179de00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25920_0, 4, 5; + %assign/vec4/off/d v0x179e630_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0xa218d0_0; + %load/vec4 v0x179a5e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0xa23ee0_0; + %load/vec4 v0x179cbf0_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5250,29 +5255,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa248a0_0, 0; - %load/vec4 v0xa218d0_0; - %assign/vec4 v0xa250f0_0, 0; + %assign/vec4 v0x179d5b0_0, 0; + %load/vec4 v0x179a5e0_0; + %assign/vec4 v0x179de00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25920_0, 4, 5; + %assign/vec4/off/d v0x179e630_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25920_0, 4, 5; + %assign/vec4/off/d v0x179e630_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25920_0, 4, 5; + %assign/vec4/off/d v0x179e630_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25920_0, 4, 5; + %assign/vec4/off/d v0x179e630_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5280,10 +5285,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0xa21500_0; + %load/vec4 v0x179a210_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5350,180 +5355,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x9e1720_0; - %load/vec4 v0xa251d0_0; + %load/vec4 v0x175a400_0; + %load/vec4 v0x179dee0_0; %add; - %assign/vec4 v0x9e1720_0, 0; - %load/vec4 v0xa21710_0; + %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x9e1720_0; - %load/vec4 v0xa251d0_0; + %load/vec4 v0x175a400_0; + %load/vec4 v0x179dee0_0; %sub; - %assign/vec4 v0x9e1720_0, 0; - %load/vec4 v0xa21710_0; + %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a420_0; %pad/u 11; - %load/vec4 v0xa251d0_0; + %load/vec4 v0x179dee0_0; %add; %pad/u 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0xa251d0_0; - %assign/vec4 v0xa25ca0_0, 0; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179dee0_0; + %assign/vec4 v0x179e9b0_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0xa21420_0; - %assign/vec4 v0xa25ca0_0, 0; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a130_0; + %assign/vec4 v0x179e9b0_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x9e1720_0; - %load/vec4 v0xa21420_0; + %load/vec4 v0x175a400_0; + %load/vec4 v0x179a130_0; %add; - %assign/vec4 v0x9e1720_0, 0; - %load/vec4 v0xa21710_0; + %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x9e1720_0; - %load/vec4 v0xa21420_0; + %load/vec4 v0x175a400_0; + %load/vec4 v0x179a130_0; %sub; - %assign/vec4 v0x9e1720_0, 0; - %load/vec4 v0xa21710_0; + %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a420_0; %pad/u 11; - %load/vec4 v0xa21420_0; + %load/vec4 v0x179a130_0; %add; %pad/u 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0xa21250_0; - %assign/vec4 v0x9e1720_0, 0; - %load/vec4 v0x9e1720_0; - %assign/vec4 v0xa21250_0, 0; - %load/vec4 v0xa21710_0; + %load/vec4 v0x1799f60_0; + %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0x175a400_0; + %assign/vec4 v0x1799f60_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x9e1720_0; - %assign/vec4 v0xa21250_0, 0; - %load/vec4 v0xa21710_0; + %load/vec4 v0x175a400_0; + %assign/vec4 v0x1799f60_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x9e1720_0; + %load/vec4 v0x175a400_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x9e1720_0, 0; - %load/vec4 v0xa21710_0; + %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0xa21630_0; - %assign/vec4 v0xa217f0_0, 0; + %load/vec4 v0x179a340_0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x9e1720_0; + %load/vec4 v0x175a400_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0xa21630_0; - %assign/vec4 v0xa217f0_0, 0; + %load/vec4 v0x179a340_0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x9e1720_0; + %load/vec4 v0x175a400_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0xa21630_0; - %assign/vec4 v0xa217f0_0, 0; + %load/vec4 v0x179a340_0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x9e1720_0; + %load/vec4 v0x175a400_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0xa21630_0; - %assign/vec4 v0xa217f0_0, 0; + %load/vec4 v0x179a340_0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x9e1720_0; + %load/vec4 v0x175a400_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0xa21630_0; - %assign/vec4 v0xa217f0_0, 0; + %load/vec4 v0x179a340_0; + %assign/vec4 v0x179a500_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0xa21710_0; + %load/vec4 v0x179a420_0; %addi 1, 0, 4; - %assign/vec4 v0xa217f0_0, 0; + %assign/vec4 v0x179a500_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0xa21500_0; + %load/vec4 v0x179a210_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0xa21500_0; + %load/vec4 v0x179a210_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0xa21330_0; + %load/vec4 v0x179a040_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0xa21330_0; + %load/vec4 v0x179a040_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5531,162 +5536,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0xa21330_0; + %load/vec4 v0x179a040_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0xa25ca0_0; - %assign/vec4 v0x9e1720_0, 0; + %load/vec4 v0x179e9b0_0; + %assign/vec4 v0x175a400_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa248a0_0, 0; - %load/vec4 v0xa21330_0; + %assign/vec4 v0x179d5b0_0, 0; + %load/vec4 v0x179a040_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0xa24600_0; - %assign/vec4 v0xa25bc0_0, 0; - %load/vec4 v0xa25ca0_0; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; + %assign/vec4 v0x179e8d0_0, 0; + %load/vec4 v0x179e9b0_0; + %load/vec4 v0x179d310_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa24600_0; + %load/vec4 v0x179d310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25840_0, 4, 5; + %assign/vec4/off/d v0x179e550_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0xa21330_0; + %load/vec4 v0x179a040_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0xa21330_0; - %assign/vec4 v0xa25bc0_0, 0; - %load/vec4 v0xa25ca0_0; - %load/vec4 v0xa21330_0; + %load/vec4 v0x179a040_0; + %assign/vec4 v0x179e8d0_0, 0; + %load/vec4 v0x179e9b0_0; + %load/vec4 v0x179a040_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa21330_0; + %load/vec4 v0x179a040_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa21330_0; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179a040_0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0xa24060_0; + %load/vec4 v0x179cd70_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0xa21330_0; - %assign/vec4 v0xa25bc0_0, 0; + %load/vec4 v0x179a040_0; + %assign/vec4 v0x179e8d0_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0xa24ac0_0; + %load/vec4 v0x179d7d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5701,82 +5706,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0xa250f0_0; + %load/vec4 v0x179de00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0xa23ee0_0; + %load/vec4 v0x179cbf0_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa248a0_0, 0; + %assign/vec4 v0x179d5b0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa25920_0, 0, 4; - %load/vec4 v0xa24ba0_0; + %store/vec4 v0x179e630_0, 0, 4; + %load/vec4 v0x179d8b0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0xa24ba0_0; + %load/vec4 v0x179d8b0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5784,54 +5789,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0xa24ba0_0; - %load/vec4 v0xa250f0_0; + %load/vec4 v0x179d8b0_0; + %load/vec4 v0x179de00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa248a0_0, 0; - %load/vec4 v0xa250f0_0; + %assign/vec4 v0x179d5b0_0, 0; + %load/vec4 v0x179de00_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0xa252b0, 4; - %assign/vec4 v0xa251d0_0, 0; + %load/vec4a v0x179dfc0, 4; + %assign/vec4 v0x179dee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa250f0_0; + %load/vec4 v0x179de00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25050_0, 4, 5; + %assign/vec4/off/d v0x179dd60_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0xa250f0_0; + %load/vec4 v0x179de00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0xa25920_0, 4, 5; - %load/vec4 v0xa250f0_0; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4/off/d v0x179e630_0, 4, 5; + %load/vec4 v0x179de00_0; + %assign/vec4 v0x179d310_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0xa24ac0_0; + %load/vec4 v0x179d7d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5847,93 +5852,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0xa25bc0_0; + %load/vec4 v0x179e8d0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0xa24060_0; + %load/vec4 v0x179cd70_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0xa22f90_0; + %load/vec4 v0x179bca0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa25bc0_0, 0; + %assign/vec4 v0x179e8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0xa25840_0, 4, 5; - %load/vec4 v0xa25ca0_0; + %assign/vec4/off/d v0x179e550_0, 4, 5; + %load/vec4 v0x179e9b0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0xa24980, 0, 4; + %assign/vec4/a/d v0x179d690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d310_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5941,33 +5946,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0xa25bc0_0; + %load/vec4 v0x179e8d0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0xa25a00_0; - %load/vec4 v0xa25bc0_0; + %load/vec4 v0x179e710_0; + %load/vec4 v0x179e8d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0xa25bc0_0; + %load/vec4 v0x179e8d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0xa25840_0, 4, 1; + %store/vec4 v0x179e550_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa248a0_0, 0; - %load/vec4 v0xa25bc0_0; - %assign/vec4 v0xa24600_0, 0; + %assign/vec4 v0x179d5b0_0, 0; + %load/vec4 v0x179e8d0_0; + %assign/vec4 v0x179d310_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0xa24ac0_0, 0; + %assign/vec4 v0x179d7d0_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5976,19 +5981,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x9bb360; + .scope S_0x17447f0; T_14 ; - %wait E_0x97c930; - %load/vec4 v0xa24ac0_0; + %wait E_0x16f55d0; + %load/vec4 v0x179d7d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0xa248a0_0; + %load/vec4 v0x179d5b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0xa217f0_0; + %load/vec4 v0x179a500_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -5997,93 +6002,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0xa217f0_0; - %assign/vec4 v0xa21710_0, 0; + %load/vec4 v0x179a500_0; + %assign/vec4 v0x179a420_0, 0; T_14.0 ; - %load/vec4 v0xa24ac0_0; + %load/vec4 v0x179d7d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0xa25050_0, 0, 4; + %store/vec4 v0x179dd60_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x96baa0; + .scope S_0x16e4740; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0xa3b230_0, 0, 33; + %store/vec4 v0x17b4240_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0xa3b190_0, 0, 1; + %store/vec4 v0x17b41a0_0, 0, 1; %pushi/vec4 0, 0, 33; - %store/vec4 v0xa3b230_0, 0, 33; + %store/vec4 v0x17b4240_0, 0, 33; T_15.0 ; - %load/vec4 v0xa3b230_0; + %load/vec4 v0x17b4240_0; %cmpi/u 10, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b0f0_0, 0, 1; + %store/vec4 v0x17b4100_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0xa3b0f0_0, 0, 1; + %store/vec4 v0x17b4100_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b0f0_0, 0, 1; + %store/vec4 v0x17b4100_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0xa3b0f0_0, 0, 1; + %store/vec4 v0x17b4100_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b0f0_0, 0, 1; + %store/vec4 v0x17b4100_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0xa3b0f0_0, 0, 1; + %store/vec4 v0x17b4100_0, 0, 1; %delay 1, 0; - %load/vec4 v0xa3b230_0; + %load/vec4 v0x17b4240_0; %addi 1, 0, 33; - %store/vec4 v0xa3b230_0, 0, 33; + %store/vec4 v0x17b4240_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0xa3b050_0; + %load/vec4 v0x17b4060_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.2, 4; - %vpi_call 2 51 "$display", "Failed on up test of jumpTest, %d", v0xa3b050_0 {0 0 0}; + %vpi_call 2 51 "$display", "Failed on up test of jumpTest, %d", v0x17b4060_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b190_0, 0, 1; + %store/vec4 v0x17b41a0_0, 0, 1; T_15.2 ; - %load/vec4 v0xa3af10_0; + %load/vec4 v0x17b3f20_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.4, 4; - %vpi_call 2 55 "$display", "Failed on left test of jumpTest, %d", v0xa3af10_0 {0 0 0}; + %vpi_call 2 55 "$display", "Failed on left test of jumpTest, %d", v0x17b3f20_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b190_0, 0, 1; + %store/vec4 v0x17b41a0_0, 0, 1; T_15.4 ; - %load/vec4 v0xa3afb0_0; + %load/vec4 v0x17b3fc0_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.6, 4; - %vpi_call 2 59 "$display", "Failed on right test of jumpTest, %d", v0xa3afb0_0 {0 0 0}; + %vpi_call 2 59 "$display", "Failed on right test of jumpTest, %d", v0x17b3fc0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b190_0, 0, 1; + %store/vec4 v0x17b41a0_0, 0, 1; T_15.6 ; - %load/vec4 v0xa3ae70_0; + %load/vec4 v0x17b3e80_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.8, 4; - %vpi_call 2 63 "$display", "Failed on down test of jumpTest, %d", v0xa3ae70_0 {0 0 0}; + %vpi_call 2 63 "$display", "Failed on down test of jumpTest, %d", v0x17b3e80_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b190_0, 0, 1; + %store/vec4 v0x17b41a0_0, 0, 1; T_15.8 ; - %load/vec4 v0xa3ad20_0; + %load/vec4 v0x17b3d30_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.10, 4; - %vpi_call 2 67 "$display", "Failed on center test of jumpTest, %d", v0xa3ad20_0 {0 0 0}; + %vpi_call 2 67 "$display", "Failed on center test of jumpTest, %d", v0x17b3d30_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0xa3b190_0, 0, 1; + %store/vec4 v0x17b41a0_0, 0, 1; T_15.10 ; - %load/vec4 v0xa3b190_0; + %load/vec4 v0x17b41a0_0; %flag_set/vec4 8; %jmp/0xz T_15.12, 8; %vpi_call 2 71 "$display", "DUT passed jumpTest" {0 0 0}; diff --git a/jumpTest/up.dat b/jumpTest/up.dat index 2917aa5..d302a47 100644 --- a/jumpTest/up.dat +++ b/jumpTest/up.dat @@ -3,14 +3,14 @@ 010000100000101000 010100000000000001 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/regTest/center.dat b/regTest/center.dat index 405c9d0..cbe5732 100644 --- a/regTest/center.dat +++ b/regTest/center.dat @@ -6,11 +6,11 @@ 000000000100000000 011000000000000111 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/regTest/left.dat b/regTest/left.dat index f9cc897..95f6689 100644 --- a/regTest/left.dat +++ b/regTest/left.dat @@ -1,16 +1,16 @@ 010000111111111111 101000000000000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/regTest/right.dat b/regTest/right.dat index 892db6c..ceab32c 100644 --- a/regTest/right.dat +++ b/regTest/right.dat @@ -4,13 +4,13 @@ 100100000000000000 100000000000000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/regTest/test b/regTest/test index 252abf1..139cfaf 100755 --- a/regTest/test +++ b/regTest/test @@ -6,25 +6,25 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x10ca9f0 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x1a0c690 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x1199280_0 .net "C2D", 14 0, L_0x11bdaa0; 1 drivers -v0x11993b0_0 .net "C2L", 14 0, L_0x11bd7c0; 1 drivers -v0x11994c0_0 .net "C2R", 14 0, L_0x11be190; 1 drivers -v0x11995b0_0 .net "C2U", 14 0, L_0x11bd4f0; 1 drivers -v0x11996c0_0 .net "D2C", 14 0, L_0x11b9300; 1 drivers -v0x1199820_0 .net "L2C", 14 0, L_0x11adb00; 1 drivers -v0x1199930_0 .net "R2C", 14 0, L_0x11b1420; 1 drivers -v0x1199a40_0 .net "U2C", 14 0, L_0x11b5790; 1 drivers -v0x1199b50_0 .net/s "accOutCenter", 10 0, L_0x11ba0c0; 1 drivers -v0x1199ca0_0 .net/s "accOutDown", 10 0, L_0x11b6090; 1 drivers -v0x1199d40_0 .net/s "accOutLeft", 10 0, L_0x119a140; 1 drivers -v0x1199de0_0 .net/s "accOutRight", 10 0, L_0x11ade50; 1 drivers -v0x1199e80_0 .net/s "accOutUp", 10 0, L_0x11b1fe0; 1 drivers -v0x1199f20_0 .var "clk", 0 0; -v0x1199fc0_0 .var "dutPassed", 0 0; -v0x119a060_0 .var "i", 32 0; -S_0x111a270 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x10ca9f0; +v0x1adb2a0_0 .net "C2D", 14 0, L_0x1affb80; 1 drivers +v0x1adb3d0_0 .net "C2L", 14 0, L_0x1aff8a0; 1 drivers +v0x1adb4e0_0 .net "C2R", 14 0, L_0x1b00270; 1 drivers +v0x1adb5d0_0 .net "C2U", 14 0, L_0x1aff5d0; 1 drivers +v0x1adb6e0_0 .net "D2C", 14 0, L_0x1afb3a0; 1 drivers +v0x1adb840_0 .net "L2C", 14 0, L_0x1aefbe0; 1 drivers +v0x1adb950_0 .net "R2C", 14 0, L_0x1af34b0; 1 drivers +v0x1adba60_0 .net "U2C", 14 0, L_0x1af77e0; 1 drivers +v0x1adbb70_0 .net/s "accOutCenter", 10 0, L_0x1afc1d0; 1 drivers +v0x1adbcc0_0 .net/s "accOutDown", 10 0, L_0x1af80e0; 1 drivers +v0x1adbd60_0 .net/s "accOutLeft", 10 0, L_0x1adc160; 1 drivers +v0x1adbe00_0 .net/s "accOutRight", 10 0, L_0x1aeff30; 1 drivers +v0x1adbea0_0 .net/s "accOutUp", 10 0, L_0x1af4030; 1 drivers +v0x1adbf40_0 .var "clk", 0 0; +v0x1adbfe0_0 .var "dutPassed", 0 0; +v0x1adc080_0 .var "i", 32 0; +S_0x1a35820 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x1a0c690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -36,173 +36,174 @@ S_0x111a270 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x10ca9f0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x10ca120 .param/str "memFile" 0 3 60, "regTest/center.dat"; -L_0x11ba0c0 .functor BUFZ 11, v0x1140640_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11ba350 .functor BUFZ 11, v0x1140640_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11bb180 .functor BUFZ 18, L_0x11bd300, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1140640_0 .var/s "ACC", 10 0; -v0x1180080_0 .var/s "BAK", 10 0; -v0x1180160_0 .net "DST", 2 0, L_0x11be620; 1 drivers -v0x1180250_0 .net/s "IMM", 10 0, L_0x11be6c0; 1 drivers -v0x1180330_0 .net "INST", 3 0, L_0x11bde00; 1 drivers -v0x1180460_0 .net "LABEL", 3 0, L_0x11be870; 1 drivers -v0x1180540_0 .var "PC", 3 0; -v0x1180620_0 .var "PCNEXT", 3 0; -v0x1180700_0 .net "SRC", 2 0, L_0x11be430; 1 drivers -v0x1180870_0 .net *"_s103", 0 0, L_0x11bc640; 1 drivers -v0x1180950_0 .net *"_s107", 0 0, L_0x11bc550; 1 drivers -v0x1180a30_0 .net *"_s111", 0 0, L_0x11bc830; 1 drivers -v0x1180b10_0 .net *"_s115", 0 0, L_0x11bc730; 1 drivers -v0x1180bf0_0 .net *"_s119", 0 0, L_0x11bca70; 1 drivers -v0x1180cd0_0 .net *"_s123", 0 0, L_0x11bc960; 1 drivers -v0x1180db0_0 .net *"_s127", 0 0, L_0x11bcc30; 1 drivers -v0x1180e90_0 .net *"_s131", 0 0, L_0x11bcb10; 1 drivers -v0x1181040_0 .net *"_s135", 0 0, L_0x11bce90; 1 drivers -v0x11810e0_0 .net *"_s139", 0 0, L_0x11bcd60; 1 drivers -v0x11811c0_0 .net *"_s143", 0 0, L_0x11bd070; 1 drivers -v0x11812a0_0 .net *"_s147", 0 0, L_0x11bcf30; 1 drivers -v0x1181380_0 .net *"_s151", 0 0, L_0x11bd260; 1 drivers -v0x1181460_0 .net *"_s155", 0 0, L_0x11bd110; 1 drivers -v0x1181540_0 .net *"_s159", 0 0, L_0x11bd1b0; 1 drivers -v0x1181620_0 .net *"_s160", 17 0, L_0x11bd300; 1 drivers -v0x1181700_0 .net *"_s162", 5 0, L_0x11bd660; 1 drivers -L_0x2ab1a62482a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x11817e0_0 .net *"_s165", 1 0, L_0x2ab1a62482a0; 1 drivers -v0x11837b0_2 .array/port v0x11837b0, 2; -v0x11818c0_0 .net *"_s173", 10 0, v0x11837b0_2; 1 drivers -v0x11837b0_3 .array/port v0x11837b0, 3; -v0x11819a0_0 .net *"_s179", 10 0, v0x11837b0_3; 1 drivers -v0x11837b0_0 .array/port v0x11837b0, 0; -v0x1181a80_0 .net *"_s185", 10 0, v0x11837b0_0; 1 drivers -v0x11837b0_1 .array/port v0x11837b0, 1; -v0x1181b60_0 .net *"_s191", 10 0, v0x11837b0_1; 1 drivers -v0x1181c40_0 .net *"_s23", 0 0, L_0x11bab20; 1 drivers -v0x1181d20_0 .net *"_s27", 0 0, L_0x11babf0; 1 drivers -v0x1180f70_0 .net *"_s31", 0 0, L_0x11bacc0; 1 drivers -v0x1181ff0_0 .net *"_s36", 0 0, L_0x11bae60; 1 drivers -v0x11820d0_0 .net *"_s42", 0 0, L_0x11bb040; 1 drivers -v0x11821b0_0 .net *"_s46", 0 0, L_0x11bb0e0; 1 drivers -v0x1182290_0 .net *"_s50", 0 0, L_0x11bb1f0; 1 drivers -v0x1182370_0 .net *"_s55", 0 0, L_0x11bb400; 1 drivers -v0x1182450_0 .net *"_s61", 0 0, L_0x11bb670; 1 drivers -v0x1182530_0 .net *"_s65", 0 0, L_0x11bb710; 1 drivers -v0x1182610_0 .net *"_s69", 0 0, L_0x11bb850; 1 drivers -v0x11826f0_0 .net *"_s74", 0 0, L_0x11bb7b0; 1 drivers -v0x11827d0_0 .net *"_s80", 0 0, L_0x11bba80; 1 drivers -v0x11828b0_0 .net *"_s84", 0 0, L_0x11bbe40; 1 drivers -v0x1182990_0 .net *"_s88", 0 0, L_0x11bbc70; 1 drivers -v0x1182a70_0 .net *"_s93", 0 0, L_0x11bbff0; 1 drivers -v0x1182b50_0 .net *"_s99", 0 0, L_0x11bc270; 1 drivers -v0x1182c30_0 .net/s "accOut", 10 0, L_0x11ba0c0; alias, 1 drivers -v0x1182d10_0 .net "anyHasData", 0 0, L_0x11baf50; 1 drivers -v0x1182dd0_0 .net "anyReadAck", 0 0, L_0x11bbb80; 1 drivers -v0x1182e90_0 .net "anyWantData", 0 0, L_0x11bb4f0; 1 drivers -v0x1182f50_0 .net "anyWriteAck", 0 0, L_0x11bc4b0; 1 drivers -v0x1183010_0 .net "clk", 0 0, v0x1199f20_0; 1 drivers -v0x11830d0_0 .net "down", 14 0, L_0x11b9300; alias, 1 drivers -v0x11831b0_0 .net "downOut", 14 0, L_0x11bdaa0; alias, 1 drivers -v0x1183290_0 .net "instruction", 17 0, L_0x11bb180; 1 drivers -v0x1183370 .array "instructions", 15 0, 17 0; -v0x1183430_0 .var "last", 2 0; -v0x1183510_0 .net "left", 14 0, L_0x11adb00; alias, 1 drivers -v0x11835f0_0 .net "leftOut", 14 0, L_0x11bd7c0; alias, 1 drivers -v0x11836d0_0 .var "mode", 2 0; -v0x11837b0 .array/s "outVals", 2 5, 10 0; -v0x11838f0_0 .var "phase", 2 0; -v0x11839d0_0 .net "portsHaveData", 5 2, L_0x11bad60; 1 drivers -v0x1181dc0_0 .net "portsWantData", 5 2, L_0x11bb290; 1 drivers -v0x1181ea0_0 .net "readAckIn", 5 2, L_0x11bb8f0; 1 drivers -v0x1183e80_0 .var "readAckOut", 5 2; -v0x1183f20_0 .var "readTarget", 2 0; -v0x1184000_0 .var/s "readValue", 10 0; -L_0x2ab1a6248258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x11840e0 .array "regVals", 0 7; -v0x11840e0_0 .net/s v0x11840e0 0, 10 0, L_0x2ab1a6248258; 1 drivers -v0x11840e0_1 .net/s v0x11840e0 1, 10 0, L_0x11ba350; 1 drivers -v0x11840e0_2 .net/s v0x11840e0 2, 10 0, L_0x11ba630; 1 drivers -v0x11840e0_3 .net/s v0x11840e0 3, 10 0, L_0x11ba760; 1 drivers -v0x11840e0_4 .net/s v0x11840e0 4, 10 0, L_0x11ba890; 1 drivers -v0x11840e0_5 .net/s v0x11840e0 5, 10 0, L_0x11ba9c0; 1 drivers -o0x2ab1a6217eb8 .functor BUFZ 11, C4; HiZ drive -v0x11840e0_6 .net/s v0x11840e0 6, 10 0, o0x2ab1a6217eb8; 0 drivers -o0x2ab1a6217ee8 .functor BUFZ 11, C4; HiZ drive -v0x11840e0_7 .net/s v0x11840e0 7, 10 0, o0x2ab1a6217ee8; 0 drivers -v0x11842f0_0 .net "right", 14 0, L_0x11b1420; alias, 1 drivers -v0x11843d0_0 .net "rightOut", 14 0, L_0x11be190; alias, 1 drivers -v0x11844b0_0 .net "up", 14 0, L_0x11b5790; alias, 1 drivers -v0x1184590_0 .net "upOut", 14 0, L_0x11bd4f0; alias, 1 drivers -v0x1184670_0 .var "weHaveData", 5 2; -v0x1184750_0 .var "weWantData", 5 2; -v0x1184830_0 .net "writeAckIn", 5 2, L_0x11bc1d0; 1 drivers -v0x1184910_0 .var "writeAckOut", 5 2; -v0x11849f0_0 .var "writeTarget", 2 0; -v0x1184ad0_0 .var/s "writeValue", 10 0; -E_0x10db880 .event negedge, v0x1183010_0; -E_0x10fe030 .event posedge, v0x1183010_0; -L_0x11ba630 .part L_0x11adb00, 0, 11; -L_0x11ba760 .part L_0x11b1420, 0, 11; -L_0x11ba890 .part L_0x11b5790, 0, 11; -L_0x11ba9c0 .part L_0x11b9300, 0, 11; -L_0x11bab20 .part L_0x11adb00, 11, 1; -L_0x11babf0 .part L_0x11b1420, 11, 1; -L_0x11bacc0 .part L_0x11b5790, 11, 1; -L_0x11bad60 .concat8 [ 1 1 1 1], L_0x11bab20, L_0x11babf0, L_0x11bacc0, L_0x11bae60; -L_0x11bae60 .part L_0x11b9300, 11, 1; -L_0x11baf50 .reduce/or L_0x11bad60; -L_0x11bb040 .part L_0x11adb00, 12, 1; -L_0x11bb0e0 .part L_0x11b1420, 12, 1; -L_0x11bb1f0 .part L_0x11b5790, 12, 1; -L_0x11bb290 .concat8 [ 1 1 1 1], L_0x11bb040, L_0x11bb0e0, L_0x11bb1f0, L_0x11bb400; -L_0x11bb400 .part L_0x11b9300, 12, 1; -L_0x11bb4f0 .reduce/or L_0x11bb290; -L_0x11bb670 .part L_0x11adb00, 13, 1; -L_0x11bb710 .part L_0x11b1420, 13, 1; -L_0x11bb850 .part L_0x11b5790, 13, 1; -L_0x11bb8f0 .concat8 [ 1 1 1 1], L_0x11bb670, L_0x11bb710, L_0x11bb850, L_0x11bb7b0; -L_0x11bb7b0 .part L_0x11b9300, 13, 1; -L_0x11bbb80 .reduce/or L_0x11bb8f0; -L_0x11bba80 .part L_0x11adb00, 14, 1; -L_0x11bbe40 .part L_0x11b1420, 14, 1; -L_0x11bbc70 .part L_0x11b5790, 14, 1; -L_0x11bc1d0 .concat8 [ 1 1 1 1], L_0x11bba80, L_0x11bbe40, L_0x11bbc70, L_0x11bbff0; -L_0x11bbff0 .part L_0x11b9300, 14, 1; -L_0x11bc4b0 .reduce/or L_0x11bc1d0; -L_0x11bc270 .part v0x1183e80_0, 0, 1; -L_0x11bc640 .part v0x1183e80_0, 1, 1; -L_0x11bc550 .part v0x1183e80_0, 2, 1; -L_0x11bc830 .part v0x1183e80_0, 3, 1; -L_0x11bc730 .part v0x1184910_0, 0, 1; -L_0x11bca70 .part v0x1184910_0, 1, 1; -L_0x11bc960 .part v0x1184910_0, 2, 1; -L_0x11bcc30 .part v0x1184910_0, 3, 1; -L_0x11bcb10 .part v0x1184750_0, 0, 1; -L_0x11bce90 .part v0x1184750_0, 1, 1; -L_0x11bcd60 .part v0x1184750_0, 2, 1; -L_0x11bd070 .part v0x1184750_0, 3, 1; -L_0x11bcf30 .part v0x1184670_0, 0, 1; -L_0x11bd260 .part v0x1184670_0, 1, 1; -L_0x11bd110 .part v0x1184670_0, 2, 1; -L_0x11bd1b0 .part v0x1184670_0, 3, 1; -L_0x11bd300 .array/port v0x1183370, L_0x11bd660; -L_0x11bd660 .concat [ 4 2 0 0], v0x1180540_0, L_0x2ab1a62482a0; -LS_0x11bd4f0_0_0 .concat8 [ 11 1 1 1], v0x11837b0_2, L_0x11bd110, L_0x11bcd60, L_0x11bc960; -LS_0x11bd4f0_0_4 .concat8 [ 1 0 0 0], L_0x11bc550; -L_0x11bd4f0 .concat8 [ 14 1 0 0], LS_0x11bd4f0_0_0, LS_0x11bd4f0_0_4; -LS_0x11bdaa0_0_0 .concat8 [ 11 1 1 1], v0x11837b0_3, L_0x11bd1b0, L_0x11bd070, L_0x11bcc30; -LS_0x11bdaa0_0_4 .concat8 [ 1 0 0 0], L_0x11bc830; -L_0x11bdaa0 .concat8 [ 14 1 0 0], LS_0x11bdaa0_0_0, LS_0x11bdaa0_0_4; -LS_0x11bd7c0_0_0 .concat8 [ 11 1 1 1], v0x11837b0_0, L_0x11bcf30, L_0x11bcb10, L_0x11bc730; -LS_0x11bd7c0_0_4 .concat8 [ 1 0 0 0], L_0x11bc270; -L_0x11bd7c0 .concat8 [ 14 1 0 0], LS_0x11bd7c0_0_0, LS_0x11bd7c0_0_4; -LS_0x11be190_0_0 .concat8 [ 11 1 1 1], v0x11837b0_1, L_0x11bd260, L_0x11bce90, L_0x11bca70; -LS_0x11be190_0_4 .concat8 [ 1 0 0 0], L_0x11bc640; -L_0x11be190 .concat8 [ 14 1 0 0], LS_0x11be190_0_0, LS_0x11be190_0_4; -L_0x11bde00 .part L_0x11bb180, 14, 4; -L_0x11be620 .part L_0x11bb180, 11, 3; -L_0x11be430 .part L_0x11bb180, 8, 3; -L_0x11be870 .part L_0x11bb180, 10, 4; -L_0x11be6c0 .part L_0x11bb180, 0, 11; -S_0x1184d50 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x10ca9f0; +P_0x1a29510 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1a29550 .param/str "memFile" 0 3 60, "regTest/center.dat"; +L_0x1afc1d0 .functor BUFZ 11, v0x1a82310_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1afc460 .functor BUFZ 11, v0x1a82310_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1afd260 .functor BUFZ 18, L_0x1aff3e0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1a82310_0 .var/s "ACC", 10 0; +v0x1ac1d90_0 .var/s "BAK", 10 0; +v0x1ac1e70_0 .net "DST", 2 0, L_0x1b00700; 1 drivers +v0x1ac1f60_0 .net/s "IMM", 10 0, L_0x1b007a0; 1 drivers +v0x1ac2040_0 .net "INST", 3 0, L_0x1affee0; 1 drivers +v0x1ac2170_0 .net "LABEL", 3 0, L_0x1b00950; 1 drivers +v0x1ac2250_0 .var "PC", 3 0; +v0x1ac2330_0 .var "PCNEXT", 3 0; +v0x1ac2410_0 .net "SRC", 2 0, L_0x1b00510; 1 drivers +v0x1ac2580_0 .net *"_s103", 0 0, L_0x1afe720; 1 drivers +v0x1ac2660_0 .net *"_s107", 0 0, L_0x1afe630; 1 drivers +v0x1ac2740_0 .net *"_s111", 0 0, L_0x1afe910; 1 drivers +v0x1ac2820_0 .net *"_s115", 0 0, L_0x1afe810; 1 drivers +v0x1ac2900_0 .net *"_s119", 0 0, L_0x1afeb50; 1 drivers +v0x1ac29e0_0 .net *"_s123", 0 0, L_0x1afea40; 1 drivers +v0x1ac2ac0_0 .net *"_s127", 0 0, L_0x1afed10; 1 drivers +v0x1ac2ba0_0 .net *"_s131", 0 0, L_0x1afebf0; 1 drivers +v0x1ac2d50_0 .net *"_s135", 0 0, L_0x1afef70; 1 drivers +v0x1ac2df0_0 .net *"_s139", 0 0, L_0x1afee40; 1 drivers +v0x1ac2ed0_0 .net *"_s143", 0 0, L_0x1aff150; 1 drivers +v0x1ac2fb0_0 .net *"_s147", 0 0, L_0x1aff010; 1 drivers +v0x1ac3090_0 .net *"_s151", 0 0, L_0x1aff340; 1 drivers +v0x1ac3170_0 .net *"_s155", 0 0, L_0x1aff1f0; 1 drivers +v0x1ac3250_0 .net *"_s159", 0 0, L_0x1aff290; 1 drivers +v0x1ac3330_0 .net *"_s160", 17 0, L_0x1aff3e0; 1 drivers +v0x1ac3410_0 .net *"_s162", 5 0, L_0x1aff740; 1 drivers +L_0x2acae8b882a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1ac34f0_0 .net *"_s165", 1 0, L_0x2acae8b882a0; 1 drivers +v0x1ac54c0_2 .array/port v0x1ac54c0, 2; +v0x1ac35d0_0 .net *"_s173", 10 0, v0x1ac54c0_2; 1 drivers +v0x1ac54c0_3 .array/port v0x1ac54c0, 3; +v0x1ac36b0_0 .net *"_s179", 10 0, v0x1ac54c0_3; 1 drivers +v0x1ac54c0_0 .array/port v0x1ac54c0, 0; +v0x1ac3790_0 .net *"_s185", 10 0, v0x1ac54c0_0; 1 drivers +v0x1ac54c0_1 .array/port v0x1ac54c0, 1; +v0x1ac3870_0 .net *"_s191", 10 0, v0x1ac54c0_1; 1 drivers +v0x1ac3950_0 .net *"_s23", 0 0, L_0x1afcc00; 1 drivers +v0x1ac3a30_0 .net *"_s27", 0 0, L_0x1afccd0; 1 drivers +v0x1ac2c80_0 .net *"_s31", 0 0, L_0x1afcda0; 1 drivers +v0x1ac3d00_0 .net *"_s36", 0 0, L_0x1afcf40; 1 drivers +v0x1ac3de0_0 .net *"_s42", 0 0, L_0x1afd120; 1 drivers +v0x1ac3ec0_0 .net *"_s46", 0 0, L_0x1afd1c0; 1 drivers +v0x1ac3fa0_0 .net *"_s50", 0 0, L_0x1afd2d0; 1 drivers +v0x1ac4080_0 .net *"_s55", 0 0, L_0x1afd4e0; 1 drivers +v0x1ac4160_0 .net *"_s61", 0 0, L_0x1afd750; 1 drivers +v0x1ac4240_0 .net *"_s65", 0 0, L_0x1afd7f0; 1 drivers +v0x1ac4320_0 .net *"_s69", 0 0, L_0x1afd930; 1 drivers +v0x1ac4400_0 .net *"_s74", 0 0, L_0x1afd890; 1 drivers +v0x1ac44e0_0 .net *"_s80", 0 0, L_0x1afdb60; 1 drivers +v0x1ac45c0_0 .net *"_s84", 0 0, L_0x1afdf20; 1 drivers +v0x1ac46a0_0 .net *"_s88", 0 0, L_0x1afdd50; 1 drivers +v0x1ac4780_0 .net *"_s93", 0 0, L_0x1afe0d0; 1 drivers +v0x1ac4860_0 .net *"_s99", 0 0, L_0x1afe350; 1 drivers +v0x1ac4940_0 .net/s "accOut", 10 0, L_0x1afc1d0; alias, 1 drivers +v0x1ac4a20_0 .net "anyHasData", 0 0, L_0x1afd030; 1 drivers +v0x1ac4ae0_0 .net "anyReadAck", 0 0, L_0x1afdc60; 1 drivers +v0x1ac4ba0_0 .net "anyWantData", 0 0, L_0x1afd5d0; 1 drivers +v0x1ac4c60_0 .net "anyWriteAck", 0 0, L_0x1afe590; 1 drivers +v0x1ac4d20_0 .net "clk", 0 0, v0x1adbf40_0; 1 drivers +v0x1ac4de0_0 .net "down", 14 0, L_0x1afb3a0; alias, 1 drivers +v0x1ac4ec0_0 .net "downOut", 14 0, L_0x1affb80; alias, 1 drivers +v0x1ac4fa0_0 .net "instruction", 17 0, L_0x1afd260; 1 drivers +v0x1ac5080 .array "instructions", 15 0, 17 0; +v0x1ac5140_0 .var "last", 2 0; +v0x1ac5220_0 .net "left", 14 0, L_0x1aefbe0; alias, 1 drivers +v0x1ac5300_0 .net "leftOut", 14 0, L_0x1aff8a0; alias, 1 drivers +v0x1ac53e0_0 .var "mode", 2 0; +v0x1ac54c0 .array/s "outVals", 2 5, 10 0; +v0x1ac5600_0 .var "phase", 2 0; +v0x1ac56e0_0 .net "portsHaveData", 5 2, L_0x1afce40; 1 drivers +v0x1ac3ad0_0 .net "portsWantData", 5 2, L_0x1afd370; 1 drivers +v0x1ac3bb0_0 .net "readAckIn", 5 2, L_0x1afd9d0; 1 drivers +v0x1ac5b90_0 .var "readAckOut", 5 2; +v0x1ac5c30_0 .var "readTarget", 2 0; +v0x1ac5d10_0 .var/s "readValue", 10 0; +L_0x2acae8b88258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1ac5df0 .array "regVals", 0 7; +v0x1ac5df0_0 .net/s v0x1ac5df0 0, 10 0, L_0x2acae8b88258; 1 drivers +v0x1ac5df0_1 .net/s v0x1ac5df0 1, 10 0, L_0x1afc460; 1 drivers +v0x1ac5df0_2 .net/s v0x1ac5df0 2, 10 0, L_0x1afc740; 1 drivers +v0x1ac5df0_3 .net/s v0x1ac5df0 3, 10 0, L_0x1afc870; 1 drivers +v0x1ac5df0_4 .net/s v0x1ac5df0 4, 10 0, L_0x1afc9a0; 1 drivers +v0x1ac5df0_5 .net/s v0x1ac5df0 5, 10 0, L_0x1afcad0; 1 drivers +o0x2acae8b57eb8 .functor BUFZ 11, C4; HiZ drive +v0x1ac5df0_6 .net/s v0x1ac5df0 6, 10 0, o0x2acae8b57eb8; 0 drivers +o0x2acae8b57ee8 .functor BUFZ 11, C4; HiZ drive +v0x1ac5df0_7 .net/s v0x1ac5df0 7, 10 0, o0x2acae8b57ee8; 0 drivers +v0x1ac6000_0 .net "right", 14 0, L_0x1af34b0; alias, 1 drivers +v0x1ac60e0_0 .net "rightOut", 14 0, L_0x1b00270; alias, 1 drivers +v0x1ac61c0_0 .net "up", 14 0, L_0x1af77e0; alias, 1 drivers +v0x1ac62a0_0 .net "upOut", 14 0, L_0x1aff5d0; alias, 1 drivers +v0x1ac6380_0 .var "weHaveData", 5 2; +v0x1ac6460_0 .var "weWantData", 5 2; +v0x1ac6540_0 .net "writeAckIn", 5 2, L_0x1afe2b0; 1 drivers +v0x1ac6620_0 .var "writeAckOut", 5 2; +v0x1ac6700_0 .var "writeTarget", 2 0; +v0x1ac67e0_0 .var/s "writeValue", 10 0; +E_0x1a1d520 .event negedge, v0x1ac4d20_0; +E_0x1a3fcc0 .event posedge, v0x1ac4d20_0; +L_0x1afc740 .part L_0x1aefbe0, 0, 11; +L_0x1afc870 .part L_0x1af34b0, 0, 11; +L_0x1afc9a0 .part L_0x1af77e0, 0, 11; +L_0x1afcad0 .part L_0x1afb3a0, 0, 11; +L_0x1afcc00 .part L_0x1aefbe0, 11, 1; +L_0x1afccd0 .part L_0x1af34b0, 11, 1; +L_0x1afcda0 .part L_0x1af77e0, 11, 1; +L_0x1afce40 .concat8 [ 1 1 1 1], L_0x1afcc00, L_0x1afccd0, L_0x1afcda0, L_0x1afcf40; +L_0x1afcf40 .part L_0x1afb3a0, 11, 1; +L_0x1afd030 .reduce/or L_0x1afce40; +L_0x1afd120 .part L_0x1aefbe0, 12, 1; +L_0x1afd1c0 .part L_0x1af34b0, 12, 1; +L_0x1afd2d0 .part L_0x1af77e0, 12, 1; +L_0x1afd370 .concat8 [ 1 1 1 1], L_0x1afd120, L_0x1afd1c0, L_0x1afd2d0, L_0x1afd4e0; +L_0x1afd4e0 .part L_0x1afb3a0, 12, 1; +L_0x1afd5d0 .reduce/or L_0x1afd370; +L_0x1afd750 .part L_0x1aefbe0, 13, 1; +L_0x1afd7f0 .part L_0x1af34b0, 13, 1; +L_0x1afd930 .part L_0x1af77e0, 13, 1; +L_0x1afd9d0 .concat8 [ 1 1 1 1], L_0x1afd750, L_0x1afd7f0, L_0x1afd930, L_0x1afd890; +L_0x1afd890 .part L_0x1afb3a0, 13, 1; +L_0x1afdc60 .reduce/or L_0x1afd9d0; +L_0x1afdb60 .part L_0x1aefbe0, 14, 1; +L_0x1afdf20 .part L_0x1af34b0, 14, 1; +L_0x1afdd50 .part L_0x1af77e0, 14, 1; +L_0x1afe2b0 .concat8 [ 1 1 1 1], L_0x1afdb60, L_0x1afdf20, L_0x1afdd50, L_0x1afe0d0; +L_0x1afe0d0 .part L_0x1afb3a0, 14, 1; +L_0x1afe590 .reduce/or L_0x1afe2b0; +L_0x1afe350 .part v0x1ac5b90_0, 0, 1; +L_0x1afe720 .part v0x1ac5b90_0, 1, 1; +L_0x1afe630 .part v0x1ac5b90_0, 2, 1; +L_0x1afe910 .part v0x1ac5b90_0, 3, 1; +L_0x1afe810 .part v0x1ac6620_0, 0, 1; +L_0x1afeb50 .part v0x1ac6620_0, 1, 1; +L_0x1afea40 .part v0x1ac6620_0, 2, 1; +L_0x1afed10 .part v0x1ac6620_0, 3, 1; +L_0x1afebf0 .part v0x1ac6460_0, 0, 1; +L_0x1afef70 .part v0x1ac6460_0, 1, 1; +L_0x1afee40 .part v0x1ac6460_0, 2, 1; +L_0x1aff150 .part v0x1ac6460_0, 3, 1; +L_0x1aff010 .part v0x1ac6380_0, 0, 1; +L_0x1aff340 .part v0x1ac6380_0, 1, 1; +L_0x1aff1f0 .part v0x1ac6380_0, 2, 1; +L_0x1aff290 .part v0x1ac6380_0, 3, 1; +L_0x1aff3e0 .array/port v0x1ac5080, L_0x1aff740; +L_0x1aff740 .concat [ 4 2 0 0], v0x1ac2250_0, L_0x2acae8b882a0; +LS_0x1aff5d0_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_2, L_0x1aff1f0, L_0x1afee40, L_0x1afea40; +LS_0x1aff5d0_0_4 .concat8 [ 1 0 0 0], L_0x1afe630; +L_0x1aff5d0 .concat8 [ 14 1 0 0], LS_0x1aff5d0_0_0, LS_0x1aff5d0_0_4; +LS_0x1affb80_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_3, L_0x1aff290, L_0x1aff150, L_0x1afed10; +LS_0x1affb80_0_4 .concat8 [ 1 0 0 0], L_0x1afe910; +L_0x1affb80 .concat8 [ 14 1 0 0], LS_0x1affb80_0_0, LS_0x1affb80_0_4; +LS_0x1aff8a0_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_0, L_0x1aff010, L_0x1afebf0, L_0x1afe810; +LS_0x1aff8a0_0_4 .concat8 [ 1 0 0 0], L_0x1afe350; +L_0x1aff8a0 .concat8 [ 14 1 0 0], LS_0x1aff8a0_0_0, LS_0x1aff8a0_0_4; +LS_0x1b00270_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_1, L_0x1aff340, L_0x1afef70, L_0x1afeb50; +LS_0x1b00270_0_4 .concat8 [ 1 0 0 0], L_0x1afe720; +L_0x1b00270 .concat8 [ 14 1 0 0], LS_0x1b00270_0_0, LS_0x1b00270_0_4; +L_0x1affee0 .part L_0x1afd260, 14, 4; +L_0x1b00700 .part L_0x1afd260, 11, 3; +L_0x1b00510 .part L_0x1afd260, 8, 3; +L_0x1b00950 .part L_0x1afd260, 10, 4; +L_0x1b007a0 .part L_0x1afd260, 0, 11; +S_0x1ac6a60 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x1a0c690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -214,174 +215,175 @@ S_0x1184d50 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x10ca9f0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1184f40 .param/str "memFile" 0 3 60, "regTest/down.dat"; -L_0x11b6090 .functor BUFZ 11, v0x11851c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11b6290 .functor BUFZ 11, v0x11851c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11b7150 .functor BUFZ 18, L_0x11b9090, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x11851c0_0 .var/s "ACC", 10 0; -v0x11852c0_0 .var/s "BAK", 10 0; -v0x11853a0_0 .net "DST", 2 0, L_0x11ba180; 1 drivers -v0x1185460_0 .net/s "IMM", 10 0, L_0x11ba220; 1 drivers -v0x1185540_0 .net "INST", 3 0, L_0x11b9a60; 1 drivers -v0x1185670_0 .net "LABEL", 3 0, L_0x11ba3d0; 1 drivers -v0x1185750_0 .var "PC", 3 0; -v0x1185830_0 .var "PCNEXT", 3 0; -v0x1185910_0 .net "SRC", 2 0, L_0x11b9f90; 1 drivers -v0x1185a80_0 .net *"_s103", 0 0, L_0x11b83d0; 1 drivers -v0x1185b60_0 .net *"_s107", 0 0, L_0x11b82e0; 1 drivers -v0x1185c40_0 .net *"_s111", 0 0, L_0x11b85c0; 1 drivers -v0x1185d20_0 .net *"_s115", 0 0, L_0x11b84c0; 1 drivers -v0x1185e00_0 .net *"_s119", 0 0, L_0x11b8800; 1 drivers -v0x1185ee0_0 .net *"_s123", 0 0, L_0x11b86f0; 1 drivers -v0x1185fc0_0 .net *"_s127", 0 0, L_0x11b89c0; 1 drivers -v0x11860a0_0 .net *"_s131", 0 0, L_0x11b88a0; 1 drivers -v0x1186250_0 .net *"_s135", 0 0, L_0x11b8c20; 1 drivers -v0x11862f0_0 .net *"_s139", 0 0, L_0x11b8af0; 1 drivers -v0x11863d0_0 .net *"_s143", 0 0, L_0x11b8e00; 1 drivers -v0x11864b0_0 .net *"_s147", 0 0, L_0x11b8cc0; 1 drivers -v0x1186590_0 .net *"_s151", 0 0, L_0x11b8ff0; 1 drivers -v0x1186670_0 .net *"_s155", 0 0, L_0x11b8ea0; 1 drivers -v0x1186750_0 .net *"_s159", 0 0, L_0x11b8f40; 1 drivers -v0x1186830_0 .net *"_s160", 17 0, L_0x11b9090; 1 drivers -v0x1186910_0 .net *"_s162", 5 0, L_0x11b93f0; 1 drivers -L_0x2ab1a6248210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x11869f0_0 .net *"_s165", 1 0, L_0x2ab1a6248210; 1 drivers -v0x1188980_2 .array/port v0x1188980, 2; -v0x1186ad0_0 .net *"_s173", 10 0, v0x1188980_2; 1 drivers -v0x1188980_3 .array/port v0x1188980, 3; -v0x1186bb0_0 .net *"_s179", 10 0, v0x1188980_3; 1 drivers -v0x1188980_0 .array/port v0x1188980, 0; -v0x1186c90_0 .net *"_s185", 10 0, v0x1188980_0; 1 drivers -v0x1188980_1 .array/port v0x1188980, 1; -v0x1186d70_0 .net *"_s191", 10 0, v0x1188980_1; 1 drivers -v0x1186e50_0 .net *"_s23", 0 0, L_0x11b68e0; 1 drivers -v0x1186f30_0 .net *"_s27", 0 0, L_0x11b6a00; 1 drivers -v0x1186180_0 .net *"_s31", 0 0, L_0x11b6af0; 1 drivers -v0x1187200_0 .net *"_s36", 0 0, L_0x11b6de0; 1 drivers -v0x11872e0_0 .net *"_s42", 0 0, L_0x11b7010; 1 drivers -v0x11873c0_0 .net *"_s46", 0 0, L_0x11b70b0; 1 drivers -v0x11874a0_0 .net *"_s50", 0 0, L_0x11b71c0; 1 drivers -v0x1187580_0 .net *"_s55", 0 0, L_0x11b73a0; 1 drivers -v0x1187660_0 .net *"_s61", 0 0, L_0x11b7610; 1 drivers -v0x1187740_0 .net *"_s65", 0 0, L_0x11b7740; 1 drivers -v0x1187820_0 .net *"_s69", 0 0, L_0x11b7910; 1 drivers -v0x1187900_0 .net *"_s74", 0 0, L_0x11b7870; 1 drivers -v0x11879e0_0 .net *"_s80", 0 0, L_0x11b7aa0; 1 drivers -v0x1187ac0_0 .net *"_s84", 0 0, L_0x11b7d90; 1 drivers -v0x1187ba0_0 .net *"_s88", 0 0, L_0x11b7cd0; 1 drivers -v0x1187c80_0 .net *"_s93", 0 0, L_0x11b7e30; 1 drivers -v0x1187d60_0 .net *"_s99", 0 0, L_0x11b80c0; 1 drivers -v0x1187e40_0 .net/s "accOut", 10 0, L_0x11b6090; alias, 1 drivers -v0x1187f20_0 .net "anyHasData", 0 0, L_0x11b6f20; 1 drivers -v0x1187fe0_0 .net "anyReadAck", 0 0, L_0x11b7c30; 1 drivers -v0x11880a0_0 .net "anyWantData", 0 0, L_0x11b7490; 1 drivers -v0x1188160_0 .net "anyWriteAck", 0 0, L_0x11b81f0; 1 drivers -v0x1188220_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers -o0x2ab1a6218cc8 .functor BUFZ 15, C4; HiZ drive -v0x11882c0_0 .net "down", 14 0, o0x2ab1a6218cc8; 0 drivers -v0x1188380_0 .net "downOut", 14 0, L_0x11b97c0; 1 drivers -v0x1188460_0 .net "instruction", 17 0, L_0x11b7150; 1 drivers -v0x1188540 .array "instructions", 15 0, 17 0; -v0x1188600_0 .var "last", 2 0; -o0x2ab1a6218d88 .functor BUFZ 15, C4; HiZ drive -v0x11886e0_0 .net "left", 14 0, o0x2ab1a6218d88; 0 drivers -v0x11887c0_0 .net "leftOut", 14 0, L_0x11b9550; 1 drivers -v0x11888a0_0 .var "mode", 2 0; -v0x1188980 .array/s "outVals", 2 5, 10 0; -v0x1188ac0_0 .var "phase", 2 0; -v0x1188ba0_0 .net "portsHaveData", 5 2, L_0x11b6c20; 1 drivers -v0x1186fd0_0 .net "portsWantData", 5 2, L_0x11b7260; 1 drivers -v0x11870b0_0 .net "readAckIn", 5 2, L_0x11b79b0; 1 drivers -v0x1189050_0 .var "readAckOut", 5 2; -v0x11890f0_0 .var "readTarget", 2 0; -v0x1189190_0 .var/s "readValue", 10 0; -L_0x2ab1a62481c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1189230 .array "regVals", 0 7; -v0x1189230_0 .net/s v0x1189230 0, 10 0, L_0x2ab1a62481c8; 1 drivers -v0x1189230_1 .net/s v0x1189230 1, 10 0, L_0x11b6290; 1 drivers -v0x1189230_2 .net/s v0x1189230 2, 10 0, L_0x11b6600; 1 drivers -v0x1189230_3 .net/s v0x1189230 3, 10 0, L_0x11b66a0; 1 drivers -v0x1189230_4 .net/s v0x1189230 4, 10 0, L_0x11b6740; 1 drivers -v0x1189230_5 .net/s v0x1189230 5, 10 0, L_0x11b67e0; 1 drivers -o0x2ab1a6219148 .functor BUFZ 11, C4; HiZ drive -v0x1189230_6 .net/s v0x1189230 6, 10 0, o0x2ab1a6219148; 0 drivers -o0x2ab1a6219178 .functor BUFZ 11, C4; HiZ drive -v0x1189230_7 .net/s v0x1189230 7, 10 0, o0x2ab1a6219178; 0 drivers -o0x2ab1a62191a8 .functor BUFZ 15, C4; HiZ drive -v0x1189440_0 .net "right", 14 0, o0x2ab1a62191a8; 0 drivers -v0x1189520_0 .net "rightOut", 14 0, L_0x11b9d70; 1 drivers -v0x1189600_0 .net "up", 14 0, L_0x11bdaa0; alias, 1 drivers -v0x11896f0_0 .net "upOut", 14 0, L_0x11b9300; alias, 1 drivers -v0x11897c0_0 .var "weHaveData", 5 2; -v0x1189880_0 .var "weWantData", 5 2; -v0x1189960_0 .net "writeAckIn", 5 2, L_0x11b7f00; 1 drivers -v0x1189a40_0 .var "writeAckOut", 5 2; -v0x1189b20_0 .var "writeTarget", 2 0; -v0x1189c00_0 .var/s "writeValue", 10 0; -L_0x11b6600 .part o0x2ab1a6218d88, 0, 11; -L_0x11b66a0 .part o0x2ab1a62191a8, 0, 11; -L_0x11b6740 .part L_0x11bdaa0, 0, 11; -L_0x11b67e0 .part o0x2ab1a6218cc8, 0, 11; -L_0x11b68e0 .part o0x2ab1a6218d88, 11, 1; -L_0x11b6a00 .part o0x2ab1a62191a8, 11, 1; -L_0x11b6af0 .part L_0x11bdaa0, 11, 1; -L_0x11b6c20 .concat8 [ 1 1 1 1], L_0x11b68e0, L_0x11b6a00, L_0x11b6af0, L_0x11b6de0; -L_0x11b6de0 .part o0x2ab1a6218cc8, 11, 1; -L_0x11b6f20 .reduce/or L_0x11b6c20; -L_0x11b7010 .part o0x2ab1a6218d88, 12, 1; -L_0x11b70b0 .part o0x2ab1a62191a8, 12, 1; -L_0x11b71c0 .part L_0x11bdaa0, 12, 1; -L_0x11b7260 .concat8 [ 1 1 1 1], L_0x11b7010, L_0x11b70b0, L_0x11b71c0, L_0x11b73a0; -L_0x11b73a0 .part o0x2ab1a6218cc8, 12, 1; -L_0x11b7490 .reduce/or L_0x11b7260; -L_0x11b7610 .part o0x2ab1a6218d88, 13, 1; -L_0x11b7740 .part o0x2ab1a62191a8, 13, 1; -L_0x11b7910 .part L_0x11bdaa0, 13, 1; -L_0x11b79b0 .concat8 [ 1 1 1 1], L_0x11b7610, L_0x11b7740, L_0x11b7910, L_0x11b7870; -L_0x11b7870 .part o0x2ab1a6218cc8, 13, 1; -L_0x11b7c30 .reduce/or L_0x11b79b0; -L_0x11b7aa0 .part o0x2ab1a6218d88, 14, 1; -L_0x11b7d90 .part o0x2ab1a62191a8, 14, 1; -L_0x11b7cd0 .part L_0x11bdaa0, 14, 1; -L_0x11b7f00 .concat8 [ 1 1 1 1], L_0x11b7aa0, L_0x11b7d90, L_0x11b7cd0, L_0x11b7e30; -L_0x11b7e30 .part o0x2ab1a6218cc8, 14, 1; -L_0x11b81f0 .reduce/or L_0x11b7f00; -L_0x11b80c0 .part v0x1189050_0, 0, 1; -L_0x11b83d0 .part v0x1189050_0, 1, 1; -L_0x11b82e0 .part v0x1189050_0, 2, 1; -L_0x11b85c0 .part v0x1189050_0, 3, 1; -L_0x11b84c0 .part v0x1189a40_0, 0, 1; -L_0x11b8800 .part v0x1189a40_0, 1, 1; -L_0x11b86f0 .part v0x1189a40_0, 2, 1; -L_0x11b89c0 .part v0x1189a40_0, 3, 1; -L_0x11b88a0 .part v0x1189880_0, 0, 1; -L_0x11b8c20 .part v0x1189880_0, 1, 1; -L_0x11b8af0 .part v0x1189880_0, 2, 1; -L_0x11b8e00 .part v0x1189880_0, 3, 1; -L_0x11b8cc0 .part v0x11897c0_0, 0, 1; -L_0x11b8ff0 .part v0x11897c0_0, 1, 1; -L_0x11b8ea0 .part v0x11897c0_0, 2, 1; -L_0x11b8f40 .part v0x11897c0_0, 3, 1; -L_0x11b9090 .array/port v0x1188540, L_0x11b93f0; -L_0x11b93f0 .concat [ 4 2 0 0], v0x1185750_0, L_0x2ab1a6248210; -LS_0x11b9300_0_0 .concat8 [ 11 1 1 1], v0x1188980_2, L_0x11b8ea0, L_0x11b8af0, L_0x11b86f0; -LS_0x11b9300_0_4 .concat8 [ 1 0 0 0], L_0x11b82e0; -L_0x11b9300 .concat8 [ 14 1 0 0], LS_0x11b9300_0_0, LS_0x11b9300_0_4; -LS_0x11b97c0_0_0 .concat8 [ 11 1 1 1], v0x1188980_3, L_0x11b8f40, L_0x11b8e00, L_0x11b89c0; -LS_0x11b97c0_0_4 .concat8 [ 1 0 0 0], L_0x11b85c0; -L_0x11b97c0 .concat8 [ 14 1 0 0], LS_0x11b97c0_0_0, LS_0x11b97c0_0_4; -LS_0x11b9550_0_0 .concat8 [ 11 1 1 1], v0x1188980_0, L_0x11b8cc0, L_0x11b88a0, L_0x11b84c0; -LS_0x11b9550_0_4 .concat8 [ 1 0 0 0], L_0x11b80c0; -L_0x11b9550 .concat8 [ 14 1 0 0], LS_0x11b9550_0_0, LS_0x11b9550_0_4; -LS_0x11b9d70_0_0 .concat8 [ 11 1 1 1], v0x1188980_1, L_0x11b8ff0, L_0x11b8c20, L_0x11b8800; -LS_0x11b9d70_0_4 .concat8 [ 1 0 0 0], L_0x11b83d0; -L_0x11b9d70 .concat8 [ 14 1 0 0], LS_0x11b9d70_0_0, LS_0x11b9d70_0_4; -L_0x11b9a60 .part L_0x11b7150, 14, 4; -L_0x11ba180 .part L_0x11b7150, 11, 3; -L_0x11b9f90 .part L_0x11b7150, 8, 3; -L_0x11ba3d0 .part L_0x11b7150, 10, 4; -L_0x11ba220 .part L_0x11b7150, 0, 11; -S_0x1189e80 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x10ca9f0; +P_0x1ac6c50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1ac6c90 .param/str "memFile" 0 3 60, "regTest/down.dat"; +L_0x1af80e0 .functor BUFZ 11, v0x1ac6f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1af82e0 .functor BUFZ 11, v0x1ac6f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1af91a0 .functor BUFZ 18, L_0x1afb110, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1ac6f90_0 .var/s "ACC", 10 0; +v0x1ac7090_0 .var/s "BAK", 10 0; +v0x1ac7170_0 .net "DST", 2 0, L_0x1afc290; 1 drivers +v0x1ac7230_0 .net/s "IMM", 10 0, L_0x1afc330; 1 drivers +v0x1ac7310_0 .net "INST", 3 0, L_0x1afbb70; 1 drivers +v0x1ac7440_0 .net "LABEL", 3 0, L_0x1afc4e0; 1 drivers +v0x1ac7520_0 .var "PC", 3 0; +v0x1ac7600_0 .var "PCNEXT", 3 0; +v0x1ac76e0_0 .net "SRC", 2 0, L_0x1afc0a0; 1 drivers +v0x1ac7850_0 .net *"_s103", 0 0, L_0x1afa450; 1 drivers +v0x1ac7930_0 .net *"_s107", 0 0, L_0x1afa360; 1 drivers +v0x1ac7a10_0 .net *"_s111", 0 0, L_0x1afa640; 1 drivers +v0x1ac7af0_0 .net *"_s115", 0 0, L_0x1afa540; 1 drivers +v0x1ac7bd0_0 .net *"_s119", 0 0, L_0x1afa880; 1 drivers +v0x1ac7cb0_0 .net *"_s123", 0 0, L_0x1afa770; 1 drivers +v0x1ac7d90_0 .net *"_s127", 0 0, L_0x1afaa40; 1 drivers +v0x1ac7e70_0 .net *"_s131", 0 0, L_0x1afa920; 1 drivers +v0x1ac8020_0 .net *"_s135", 0 0, L_0x1afaca0; 1 drivers +v0x1ac80c0_0 .net *"_s139", 0 0, L_0x1afab70; 1 drivers +v0x1ac81a0_0 .net *"_s143", 0 0, L_0x1afae80; 1 drivers +v0x1ac8280_0 .net *"_s147", 0 0, L_0x1afad40; 1 drivers +v0x1ac8360_0 .net *"_s151", 0 0, L_0x1afb070; 1 drivers +v0x1ac8440_0 .net *"_s155", 0 0, L_0x1afaf20; 1 drivers +v0x1ac8520_0 .net *"_s159", 0 0, L_0x1afafc0; 1 drivers +v0x1ac8600_0 .net *"_s160", 17 0, L_0x1afb110; 1 drivers +v0x1ac86e0_0 .net *"_s162", 5 0, L_0x1afb470; 1 drivers +L_0x2acae8b88210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1ac87c0_0 .net *"_s165", 1 0, L_0x2acae8b88210; 1 drivers +v0x1aca750_2 .array/port v0x1aca750, 2; +v0x1ac88a0_0 .net *"_s173", 10 0, v0x1aca750_2; 1 drivers +v0x1aca750_3 .array/port v0x1aca750, 3; +v0x1ac8980_0 .net *"_s179", 10 0, v0x1aca750_3; 1 drivers +v0x1aca750_0 .array/port v0x1aca750, 0; +v0x1ac8a60_0 .net *"_s185", 10 0, v0x1aca750_0; 1 drivers +v0x1aca750_1 .array/port v0x1aca750, 1; +v0x1ac8b40_0 .net *"_s191", 10 0, v0x1aca750_1; 1 drivers +v0x1ac8c20_0 .net *"_s23", 0 0, L_0x1af8930; 1 drivers +v0x1ac8d00_0 .net *"_s27", 0 0, L_0x1af8a50; 1 drivers +v0x1ac7f50_0 .net *"_s31", 0 0, L_0x1af8b40; 1 drivers +v0x1ac8fd0_0 .net *"_s36", 0 0, L_0x1af8e30; 1 drivers +v0x1ac90b0_0 .net *"_s42", 0 0, L_0x1af9060; 1 drivers +v0x1ac9190_0 .net *"_s46", 0 0, L_0x1af9100; 1 drivers +v0x1ac9270_0 .net *"_s50", 0 0, L_0x1af9210; 1 drivers +v0x1ac9350_0 .net *"_s55", 0 0, L_0x1af9420; 1 drivers +v0x1ac9430_0 .net *"_s61", 0 0, L_0x1af9690; 1 drivers +v0x1ac9510_0 .net *"_s65", 0 0, L_0x1af97c0; 1 drivers +v0x1ac95f0_0 .net *"_s69", 0 0, L_0x1af9990; 1 drivers +v0x1ac96d0_0 .net *"_s74", 0 0, L_0x1af98f0; 1 drivers +v0x1ac97b0_0 .net *"_s80", 0 0, L_0x1af9b20; 1 drivers +v0x1ac9890_0 .net *"_s84", 0 0, L_0x1af9e10; 1 drivers +v0x1ac9970_0 .net *"_s88", 0 0, L_0x1af9d50; 1 drivers +v0x1ac9a50_0 .net *"_s93", 0 0, L_0x1af9eb0; 1 drivers +v0x1ac9b30_0 .net *"_s99", 0 0, L_0x1afa140; 1 drivers +v0x1ac9c10_0 .net/s "accOut", 10 0, L_0x1af80e0; alias, 1 drivers +v0x1ac9cf0_0 .net "anyHasData", 0 0, L_0x1af8f70; 1 drivers +v0x1ac9db0_0 .net "anyReadAck", 0 0, L_0x1af9cb0; 1 drivers +v0x1ac9e70_0 .net "anyWantData", 0 0, L_0x1af9510; 1 drivers +v0x1ac9f30_0 .net "anyWriteAck", 0 0, L_0x1afa270; 1 drivers +v0x1ac9ff0_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers +o0x2acae8b58cc8 .functor BUFZ 15, C4; HiZ drive +v0x1aca090_0 .net "down", 14 0, o0x2acae8b58cc8; 0 drivers +v0x1aca150_0 .net "downOut", 14 0, L_0x1afb890; 1 drivers +v0x1aca230_0 .net "instruction", 17 0, L_0x1af91a0; 1 drivers +v0x1aca310 .array "instructions", 15 0, 17 0; +v0x1aca3d0_0 .var "last", 2 0; +o0x2acae8b58d88 .functor BUFZ 15, C4; HiZ drive +v0x1aca4b0_0 .net "left", 14 0, o0x2acae8b58d88; 0 drivers +v0x1aca590_0 .net "leftOut", 14 0, L_0x1afb5d0; 1 drivers +v0x1aca670_0 .var "mode", 2 0; +v0x1aca750 .array/s "outVals", 2 5, 10 0; +v0x1aca890_0 .var "phase", 2 0; +v0x1aca970_0 .net "portsHaveData", 5 2, L_0x1af8c70; 1 drivers +v0x1ac8da0_0 .net "portsWantData", 5 2, L_0x1af92b0; 1 drivers +v0x1ac8e80_0 .net "readAckIn", 5 2, L_0x1af9a30; 1 drivers +v0x1acae20_0 .var "readAckOut", 5 2; +v0x1acaec0_0 .var "readTarget", 2 0; +v0x1acaf60_0 .var/s "readValue", 10 0; +L_0x2acae8b881c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1acb000 .array "regVals", 0 7; +v0x1acb000_0 .net/s v0x1acb000 0, 10 0, L_0x2acae8b881c8; 1 drivers +v0x1acb000_1 .net/s v0x1acb000 1, 10 0, L_0x1af82e0; 1 drivers +v0x1acb000_2 .net/s v0x1acb000 2, 10 0, L_0x1af8650; 1 drivers +v0x1acb000_3 .net/s v0x1acb000 3, 10 0, L_0x1af86f0; 1 drivers +v0x1acb000_4 .net/s v0x1acb000 4, 10 0, L_0x1af8790; 1 drivers +v0x1acb000_5 .net/s v0x1acb000 5, 10 0, L_0x1af8830; 1 drivers +o0x2acae8b59148 .functor BUFZ 11, C4; HiZ drive +v0x1acb000_6 .net/s v0x1acb000 6, 10 0, o0x2acae8b59148; 0 drivers +o0x2acae8b59178 .functor BUFZ 11, C4; HiZ drive +v0x1acb000_7 .net/s v0x1acb000 7, 10 0, o0x2acae8b59178; 0 drivers +o0x2acae8b591a8 .functor BUFZ 15, C4; HiZ drive +v0x1acb210_0 .net "right", 14 0, o0x2acae8b591a8; 0 drivers +v0x1acb2f0_0 .net "rightOut", 14 0, L_0x1afbe80; 1 drivers +v0x1acb3d0_0 .net "up", 14 0, L_0x1affb80; alias, 1 drivers +v0x1acb4c0_0 .net "upOut", 14 0, L_0x1afb3a0; alias, 1 drivers +v0x1acb590_0 .var "weHaveData", 5 2; +v0x1acb650_0 .var "weWantData", 5 2; +v0x1acb730_0 .net "writeAckIn", 5 2, L_0x1af9f80; 1 drivers +v0x1acb810_0 .var "writeAckOut", 5 2; +v0x1acb8f0_0 .var "writeTarget", 2 0; +v0x1acb9d0_0 .var/s "writeValue", 10 0; +L_0x1af8650 .part o0x2acae8b58d88, 0, 11; +L_0x1af86f0 .part o0x2acae8b591a8, 0, 11; +L_0x1af8790 .part L_0x1affb80, 0, 11; +L_0x1af8830 .part o0x2acae8b58cc8, 0, 11; +L_0x1af8930 .part o0x2acae8b58d88, 11, 1; +L_0x1af8a50 .part o0x2acae8b591a8, 11, 1; +L_0x1af8b40 .part L_0x1affb80, 11, 1; +L_0x1af8c70 .concat8 [ 1 1 1 1], L_0x1af8930, L_0x1af8a50, L_0x1af8b40, L_0x1af8e30; +L_0x1af8e30 .part o0x2acae8b58cc8, 11, 1; +L_0x1af8f70 .reduce/or L_0x1af8c70; +L_0x1af9060 .part o0x2acae8b58d88, 12, 1; +L_0x1af9100 .part o0x2acae8b591a8, 12, 1; +L_0x1af9210 .part L_0x1affb80, 12, 1; +L_0x1af92b0 .concat8 [ 1 1 1 1], L_0x1af9060, L_0x1af9100, L_0x1af9210, L_0x1af9420; +L_0x1af9420 .part o0x2acae8b58cc8, 12, 1; +L_0x1af9510 .reduce/or L_0x1af92b0; +L_0x1af9690 .part o0x2acae8b58d88, 13, 1; +L_0x1af97c0 .part o0x2acae8b591a8, 13, 1; +L_0x1af9990 .part L_0x1affb80, 13, 1; +L_0x1af9a30 .concat8 [ 1 1 1 1], L_0x1af9690, L_0x1af97c0, L_0x1af9990, L_0x1af98f0; +L_0x1af98f0 .part o0x2acae8b58cc8, 13, 1; +L_0x1af9cb0 .reduce/or L_0x1af9a30; +L_0x1af9b20 .part o0x2acae8b58d88, 14, 1; +L_0x1af9e10 .part o0x2acae8b591a8, 14, 1; +L_0x1af9d50 .part L_0x1affb80, 14, 1; +L_0x1af9f80 .concat8 [ 1 1 1 1], L_0x1af9b20, L_0x1af9e10, L_0x1af9d50, L_0x1af9eb0; +L_0x1af9eb0 .part o0x2acae8b58cc8, 14, 1; +L_0x1afa270 .reduce/or L_0x1af9f80; +L_0x1afa140 .part v0x1acae20_0, 0, 1; +L_0x1afa450 .part v0x1acae20_0, 1, 1; +L_0x1afa360 .part v0x1acae20_0, 2, 1; +L_0x1afa640 .part v0x1acae20_0, 3, 1; +L_0x1afa540 .part v0x1acb810_0, 0, 1; +L_0x1afa880 .part v0x1acb810_0, 1, 1; +L_0x1afa770 .part v0x1acb810_0, 2, 1; +L_0x1afaa40 .part v0x1acb810_0, 3, 1; +L_0x1afa920 .part v0x1acb650_0, 0, 1; +L_0x1afaca0 .part v0x1acb650_0, 1, 1; +L_0x1afab70 .part v0x1acb650_0, 2, 1; +L_0x1afae80 .part v0x1acb650_0, 3, 1; +L_0x1afad40 .part v0x1acb590_0, 0, 1; +L_0x1afb070 .part v0x1acb590_0, 1, 1; +L_0x1afaf20 .part v0x1acb590_0, 2, 1; +L_0x1afafc0 .part v0x1acb590_0, 3, 1; +L_0x1afb110 .array/port v0x1aca310, L_0x1afb470; +L_0x1afb470 .concat [ 4 2 0 0], v0x1ac7520_0, L_0x2acae8b88210; +LS_0x1afb3a0_0_0 .concat8 [ 11 1 1 1], v0x1aca750_2, L_0x1afaf20, L_0x1afab70, L_0x1afa770; +LS_0x1afb3a0_0_4 .concat8 [ 1 0 0 0], L_0x1afa360; +L_0x1afb3a0 .concat8 [ 14 1 0 0], LS_0x1afb3a0_0_0, LS_0x1afb3a0_0_4; +LS_0x1afb890_0_0 .concat8 [ 11 1 1 1], v0x1aca750_3, L_0x1afafc0, L_0x1afae80, L_0x1afaa40; +LS_0x1afb890_0_4 .concat8 [ 1 0 0 0], L_0x1afa640; +L_0x1afb890 .concat8 [ 14 1 0 0], LS_0x1afb890_0_0, LS_0x1afb890_0_4; +LS_0x1afb5d0_0_0 .concat8 [ 11 1 1 1], v0x1aca750_0, L_0x1afad40, L_0x1afa920, L_0x1afa540; +LS_0x1afb5d0_0_4 .concat8 [ 1 0 0 0], L_0x1afa140; +L_0x1afb5d0 .concat8 [ 14 1 0 0], LS_0x1afb5d0_0_0, LS_0x1afb5d0_0_4; +LS_0x1afbe80_0_0 .concat8 [ 11 1 1 1], v0x1aca750_1, L_0x1afb070, L_0x1afaca0, L_0x1afa880; +LS_0x1afbe80_0_4 .concat8 [ 1 0 0 0], L_0x1afa450; +L_0x1afbe80 .concat8 [ 14 1 0 0], LS_0x1afbe80_0_0, LS_0x1afbe80_0_4; +L_0x1afbb70 .part L_0x1af91a0, 14, 4; +L_0x1afc290 .part L_0x1af91a0, 11, 3; +L_0x1afc0a0 .part L_0x1af91a0, 8, 3; +L_0x1afc4e0 .part L_0x1af91a0, 10, 4; +L_0x1afc330 .part L_0x1af91a0, 0, 11; +S_0x1acbc50 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x1a0c690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -393,174 +395,175 @@ S_0x1189e80 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x10ca9f0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x118a080 .param/str "memFile" 0 3 60, "regTest/left.dat"; -L_0x119a140 .functor BUFZ 11, v0x118a300_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11aa1e0 .functor BUFZ 11, v0x118a300_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11acf30 .functor BUFZ 18, L_0x11acd40, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x118a300_0 .var/s "ACC", 10 0; -v0x118a400_0 .var/s "BAK", 10 0; -v0x118a4e0_0 .net "DST", 2 0, L_0x11adf10; 1 drivers -v0x118a5a0_0 .net/s "IMM", 10 0, L_0x11adfb0; 1 drivers -v0x118a680_0 .net "INST", 3 0, L_0x11ad7b0; 1 drivers -v0x118a7b0_0 .net "LABEL", 3 0, L_0x11ae160; 1 drivers -v0x118a890_0 .var "PC", 3 0; -v0x118a970_0 .var "PCNEXT", 3 0; -v0x118aa50_0 .net "SRC", 2 0, L_0x11add20; 1 drivers -v0x118abc0_0 .net *"_s103", 0 0, L_0x11ac0d0; 1 drivers -v0x118aca0_0 .net *"_s107", 0 0, L_0x11abf40; 1 drivers -v0x118ad80_0 .net *"_s111", 0 0, L_0x11ac270; 1 drivers -v0x118ae60_0 .net *"_s115", 0 0, L_0x11ac170; 1 drivers -v0x118af40_0 .net *"_s119", 0 0, L_0x11ac4b0; 1 drivers -v0x118a120_0 .net *"_s123", 0 0, L_0x11ac3a0; 1 drivers -v0x118afe0_0 .net *"_s127", 0 0, L_0x11ac670; 1 drivers -v0x118b0c0_0 .net *"_s131", 0 0, L_0x11ac550; 1 drivers -v0x118b270_0 .net *"_s135", 0 0, L_0x11ac8d0; 1 drivers -v0x118b310_0 .net *"_s139", 0 0, L_0x11ac7a0; 1 drivers -v0x118b3f0_0 .net *"_s143", 0 0, L_0x11acab0; 1 drivers -v0x118b4d0_0 .net *"_s147", 0 0, L_0x11ac970; 1 drivers -v0x118b5b0_0 .net *"_s151", 0 0, L_0x11acca0; 1 drivers -v0x118b690_0 .net *"_s155", 0 0, L_0x11acb50; 1 drivers -v0x118b770_0 .net *"_s159", 0 0, L_0x11acbf0; 1 drivers -v0x118b850_0 .net *"_s160", 17 0, L_0x11acd40; 1 drivers -v0x118b930_0 .net *"_s162", 5 0, L_0x11ad0a0; 1 drivers -L_0x2ab1a6248060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x118ba10_0 .net *"_s165", 1 0, L_0x2ab1a6248060; 1 drivers -v0x118da10_2 .array/port v0x118da10, 2; -v0x118baf0_0 .net *"_s173", 10 0, v0x118da10_2; 1 drivers -v0x118da10_3 .array/port v0x118da10, 3; -v0x118bbd0_0 .net *"_s179", 10 0, v0x118da10_3; 1 drivers -v0x118da10_0 .array/port v0x118da10, 0; -v0x118bcb0_0 .net *"_s185", 10 0, v0x118da10_0; 1 drivers -v0x118da10_1 .array/port v0x118da10, 1; -v0x118bd90_0 .net *"_s191", 10 0, v0x118da10_1; 1 drivers -v0x118be70_0 .net *"_s23", 0 0, L_0x11aa640; 1 drivers -v0x118bf50_0 .net *"_s27", 0 0, L_0x11aa760; 1 drivers -v0x118b1a0_0 .net *"_s31", 0 0, L_0x11aa8d0; 1 drivers -v0x118c220_0 .net *"_s36", 0 0, L_0x11aab80; 1 drivers -v0x118c300_0 .net *"_s42", 0 0, L_0x11aae10; 1 drivers -v0x118c3e0_0 .net *"_s46", 0 0, L_0x11aaeb0; 1 drivers -v0x118c4c0_0 .net *"_s50", 0 0, L_0x11aafc0; 1 drivers -v0x118c5a0_0 .net *"_s55", 0 0, L_0x11ab250; 1 drivers -v0x118c680_0 .net *"_s61", 0 0, L_0x11ab4c0; 1 drivers -v0x118c760_0 .net *"_s65", 0 0, L_0x11ab5f0; 1 drivers -v0x118c840_0 .net *"_s69", 0 0, L_0x11ab730; 1 drivers -v0x118c920_0 .net *"_s74", 0 0, L_0x11ab690; 1 drivers -v0x118ca00_0 .net *"_s80", 0 0, L_0x11ab920; 1 drivers -v0x118cae0_0 .net *"_s84", 0 0, L_0x11abc10; 1 drivers -v0x118cbc0_0 .net *"_s88", 0 0, L_0x11abb50; 1 drivers -v0x118cca0_0 .net *"_s93", 0 0, L_0x118e4b0; 1 drivers -v0x118cd80_0 .net *"_s99", 0 0, L_0x11ac030; 1 drivers -v0x118ce60_0 .net/s "accOut", 10 0, L_0x119a140; alias, 1 drivers -v0x118cf40_0 .net "anyHasData", 0 0, L_0x11aacc0; 1 drivers -v0x118d000_0 .net "anyReadAck", 0 0, L_0x11abab0; 1 drivers -v0x118d0c0_0 .net "anyWantData", 0 0, L_0x11ab340; 1 drivers -v0x118d180_0 .net "anyWriteAck", 0 0, L_0x11abcb0; 1 drivers -v0x118d240_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers -o0x2ab1a6219ef8 .functor BUFZ 15, C4; HiZ drive -v0x118d330_0 .net "down", 14 0, o0x2ab1a6219ef8; 0 drivers -v0x118d410_0 .net "downOut", 14 0, L_0x11ad510; 1 drivers -v0x118d4f0_0 .net "instruction", 17 0, L_0x11acf30; 1 drivers -v0x118d5d0 .array "instructions", 15 0, 17 0; -v0x118d690_0 .var "last", 2 0; -o0x2ab1a6219fb8 .functor BUFZ 15, C4; HiZ drive -v0x118d770_0 .net "left", 14 0, o0x2ab1a6219fb8; 0 drivers -v0x118d850_0 .net "leftOut", 14 0, L_0x11ad200; 1 drivers -v0x118d930_0 .var "mode", 2 0; -v0x118da10 .array/s "outVals", 2 5, 10 0; -v0x118db50_0 .var "phase", 2 0; -v0x118dc30_0 .net "portsHaveData", 5 2, L_0x11aa970; 1 drivers -v0x118c030_0 .net "portsWantData", 5 2, L_0x11ab060; 1 drivers -v0x118c110_0 .net "readAckIn", 5 2, L_0x11ab7d0; 1 drivers -v0x118e0e0_0 .var "readAckOut", 5 2; -v0x118e1c0_0 .var "readTarget", 2 0; -v0x118e2a0_0 .var/s "readValue", 10 0; -L_0x2ab1a6248018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x118e380 .array "regVals", 0 7; -v0x118e380_0 .net/s v0x118e380 0, 10 0, L_0x2ab1a6248018; 1 drivers -v0x118e380_1 .net/s v0x118e380 1, 10 0, L_0x11aa1e0; 1 drivers -v0x118e380_2 .net/s v0x118e380 2, 10 0, L_0x11aa2a0; 1 drivers -v0x118e380_3 .net/s v0x118e380 3, 10 0, L_0x11aa340; 1 drivers -v0x118e380_4 .net/s v0x118e380 4, 10 0, L_0x11aa410; 1 drivers -v0x118e380_5 .net/s v0x118e380 5, 10 0, L_0x11aa510; 1 drivers -o0x2ab1a621a378 .functor BUFZ 11, C4; HiZ drive -v0x118e380_6 .net/s v0x118e380 6, 10 0, o0x2ab1a621a378; 0 drivers -o0x2ab1a621a3a8 .functor BUFZ 11, C4; HiZ drive -v0x118e380_7 .net/s v0x118e380 7, 10 0, o0x2ab1a621a3a8; 0 drivers -v0x118e590_0 .net "right", 14 0, L_0x11bd7c0; alias, 1 drivers -v0x118e680_0 .net "rightOut", 14 0, L_0x11adb00; alias, 1 drivers -o0x2ab1a621a3d8 .functor BUFZ 15, C4; HiZ drive -v0x118e750_0 .net "up", 14 0, o0x2ab1a621a3d8; 0 drivers -v0x118e810_0 .net "upOut", 14 0, L_0x11ad2c0; 1 drivers -v0x118e8f0_0 .var "weHaveData", 5 2; -v0x118e9d0_0 .var "weWantData", 5 2; -v0x118eab0_0 .net "writeAckIn", 5 2, L_0x11abd80; 1 drivers -v0x118eb90_0 .var "writeAckOut", 5 2; -v0x118ec70_0 .var "writeTarget", 2 0; -v0x118ed50_0 .var/s "writeValue", 10 0; -L_0x11aa2a0 .part o0x2ab1a6219fb8, 0, 11; -L_0x11aa340 .part L_0x11bd7c0, 0, 11; -L_0x11aa410 .part o0x2ab1a621a3d8, 0, 11; -L_0x11aa510 .part o0x2ab1a6219ef8, 0, 11; -L_0x11aa640 .part o0x2ab1a6219fb8, 11, 1; -L_0x11aa760 .part L_0x11bd7c0, 11, 1; -L_0x11aa8d0 .part o0x2ab1a621a3d8, 11, 1; -L_0x11aa970 .concat8 [ 1 1 1 1], L_0x11aa640, L_0x11aa760, L_0x11aa8d0, L_0x11aab80; -L_0x11aab80 .part o0x2ab1a6219ef8, 11, 1; -L_0x11aacc0 .reduce/or L_0x11aa970; -L_0x11aae10 .part o0x2ab1a6219fb8, 12, 1; -L_0x11aaeb0 .part L_0x11bd7c0, 12, 1; -L_0x11aafc0 .part o0x2ab1a621a3d8, 12, 1; -L_0x11ab060 .concat8 [ 1 1 1 1], L_0x11aae10, L_0x11aaeb0, L_0x11aafc0, L_0x11ab250; -L_0x11ab250 .part o0x2ab1a6219ef8, 12, 1; -L_0x11ab340 .reduce/or L_0x11ab060; -L_0x11ab4c0 .part o0x2ab1a6219fb8, 13, 1; -L_0x11ab5f0 .part L_0x11bd7c0, 13, 1; -L_0x11ab730 .part o0x2ab1a621a3d8, 13, 1; -L_0x11ab7d0 .concat8 [ 1 1 1 1], L_0x11ab4c0, L_0x11ab5f0, L_0x11ab730, L_0x11ab690; -L_0x11ab690 .part o0x2ab1a6219ef8, 13, 1; -L_0x11abab0 .reduce/or L_0x11ab7d0; -L_0x11ab920 .part o0x2ab1a6219fb8, 14, 1; -L_0x11abc10 .part L_0x11bd7c0, 14, 1; -L_0x11abb50 .part o0x2ab1a621a3d8, 14, 1; -L_0x11abd80 .concat8 [ 1 1 1 1], L_0x11ab920, L_0x11abc10, L_0x11abb50, L_0x118e4b0; -L_0x118e4b0 .part o0x2ab1a6219ef8, 14, 1; -L_0x11abcb0 .reduce/or L_0x11abd80; -L_0x11ac030 .part v0x118e0e0_0, 0, 1; -L_0x11ac0d0 .part v0x118e0e0_0, 1, 1; -L_0x11abf40 .part v0x118e0e0_0, 2, 1; -L_0x11ac270 .part v0x118e0e0_0, 3, 1; -L_0x11ac170 .part v0x118eb90_0, 0, 1; -L_0x11ac4b0 .part v0x118eb90_0, 1, 1; -L_0x11ac3a0 .part v0x118eb90_0, 2, 1; -L_0x11ac670 .part v0x118eb90_0, 3, 1; -L_0x11ac550 .part v0x118e9d0_0, 0, 1; -L_0x11ac8d0 .part v0x118e9d0_0, 1, 1; -L_0x11ac7a0 .part v0x118e9d0_0, 2, 1; -L_0x11acab0 .part v0x118e9d0_0, 3, 1; -L_0x11ac970 .part v0x118e8f0_0, 0, 1; -L_0x11acca0 .part v0x118e8f0_0, 1, 1; -L_0x11acb50 .part v0x118e8f0_0, 2, 1; -L_0x11acbf0 .part v0x118e8f0_0, 3, 1; -L_0x11acd40 .array/port v0x118d5d0, L_0x11ad0a0; -L_0x11ad0a0 .concat [ 4 2 0 0], v0x118a890_0, L_0x2ab1a6248060; -LS_0x11ad2c0_0_0 .concat8 [ 11 1 1 1], v0x118da10_2, L_0x11acb50, L_0x11ac7a0, L_0x11ac3a0; -LS_0x11ad2c0_0_4 .concat8 [ 1 0 0 0], L_0x11abf40; -L_0x11ad2c0 .concat8 [ 14 1 0 0], LS_0x11ad2c0_0_0, LS_0x11ad2c0_0_4; -LS_0x11ad510_0_0 .concat8 [ 11 1 1 1], v0x118da10_3, L_0x11acbf0, L_0x11acab0, L_0x11ac670; -LS_0x11ad510_0_4 .concat8 [ 1 0 0 0], L_0x11ac270; -L_0x11ad510 .concat8 [ 14 1 0 0], LS_0x11ad510_0_0, LS_0x11ad510_0_4; -LS_0x11ad200_0_0 .concat8 [ 11 1 1 1], v0x118da10_0, L_0x11ac970, L_0x11ac550, L_0x11ac170; -LS_0x11ad200_0_4 .concat8 [ 1 0 0 0], L_0x11ac030; -L_0x11ad200 .concat8 [ 14 1 0 0], LS_0x11ad200_0_0, LS_0x11ad200_0_4; -LS_0x11adb00_0_0 .concat8 [ 11 1 1 1], v0x118da10_1, L_0x11acca0, L_0x11ac8d0, L_0x11ac4b0; -LS_0x11adb00_0_4 .concat8 [ 1 0 0 0], L_0x11ac0d0; -L_0x11adb00 .concat8 [ 14 1 0 0], LS_0x11adb00_0_0, LS_0x11adb00_0_4; -L_0x11ad7b0 .part L_0x11acf30, 14, 4; -L_0x11adf10 .part L_0x11acf30, 11, 3; -L_0x11add20 .part L_0x11acf30, 8, 3; -L_0x11ae160 .part L_0x11acf30, 10, 4; -L_0x11adfb0 .part L_0x11acf30, 0, 11; -S_0x118efd0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x10ca9f0; +P_0x1acbe50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1acbe90 .param/str "memFile" 0 3 60, "regTest/left.dat"; +L_0x1adc160 .functor BUFZ 11, v0x1acc0f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1aec200 .functor BUFZ 11, v0x1acc0f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1aecf70 .functor BUFZ 18, L_0x1aeee70, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1acc0f0_0 .var/s "ACC", 10 0; +v0x1acc1b0_0 .var/s "BAK", 10 0; +v0x1acc290_0 .net "DST", 2 0, L_0x1aefff0; 1 drivers +v0x1acc380_0 .net/s "IMM", 10 0, L_0x1af0090; 1 drivers +v0x1acc460_0 .net "INST", 3 0, L_0x1aef8d0; 1 drivers +v0x1acc590_0 .net "LABEL", 3 0, L_0x1af0240; 1 drivers +v0x1acc670_0 .var "PC", 3 0; +v0x1acc750_0 .var "PCNEXT", 3 0; +v0x1acc830_0 .net "SRC", 2 0, L_0x1aefe00; 1 drivers +v0x1acc9a0_0 .net *"_s103", 0 0, L_0x1aee1b0; 1 drivers +v0x1acca80_0 .net *"_s107", 0 0, L_0x1aee0c0; 1 drivers +v0x1accb60_0 .net *"_s111", 0 0, L_0x1aee3a0; 1 drivers +v0x1accc40_0 .net *"_s115", 0 0, L_0x1aee2a0; 1 drivers +v0x1accd20_0 .net *"_s119", 0 0, L_0x1aee5e0; 1 drivers +v0x1acce00_0 .net *"_s123", 0 0, L_0x1aee4d0; 1 drivers +v0x1accee0_0 .net *"_s127", 0 0, L_0x1aee7a0; 1 drivers +v0x1accfc0_0 .net *"_s131", 0 0, L_0x1aee680; 1 drivers +v0x1acd170_0 .net *"_s135", 0 0, L_0x1aeea00; 1 drivers +v0x1acd210_0 .net *"_s139", 0 0, L_0x1aee8d0; 1 drivers +v0x1acd2f0_0 .net *"_s143", 0 0, L_0x1aeebe0; 1 drivers +v0x1acd3d0_0 .net *"_s147", 0 0, L_0x1aeeaa0; 1 drivers +v0x1acd4b0_0 .net *"_s151", 0 0, L_0x1aeedd0; 1 drivers +v0x1acd590_0 .net *"_s155", 0 0, L_0x1aeec80; 1 drivers +v0x1acd670_0 .net *"_s159", 0 0, L_0x1aeed20; 1 drivers +v0x1acd750_0 .net *"_s160", 17 0, L_0x1aeee70; 1 drivers +v0x1acd830_0 .net *"_s162", 5 0, L_0x1aef1d0; 1 drivers +L_0x2acae8b88060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1acd910_0 .net *"_s165", 1 0, L_0x2acae8b88060; 1 drivers +v0x1acf8c0_2 .array/port v0x1acf8c0, 2; +v0x1acd9f0_0 .net *"_s173", 10 0, v0x1acf8c0_2; 1 drivers +v0x1acf8c0_3 .array/port v0x1acf8c0, 3; +v0x1acdad0_0 .net *"_s179", 10 0, v0x1acf8c0_3; 1 drivers +v0x1acf8c0_0 .array/port v0x1acf8c0, 0; +v0x1acdbb0_0 .net *"_s185", 10 0, v0x1acf8c0_0; 1 drivers +v0x1acf8c0_1 .array/port v0x1acf8c0, 1; +v0x1acdc90_0 .net *"_s191", 10 0, v0x1acf8c0_1; 1 drivers +v0x1acdd70_0 .net *"_s23", 0 0, L_0x1aec660; 1 drivers +v0x1acde50_0 .net *"_s27", 0 0, L_0x1aec780; 1 drivers +v0x1acd0a0_0 .net *"_s31", 0 0, L_0x1aec8f0; 1 drivers +v0x1ace120_0 .net *"_s36", 0 0, L_0x1aecba0; 1 drivers +v0x1ace200_0 .net *"_s42", 0 0, L_0x1aece30; 1 drivers +v0x1ace2e0_0 .net *"_s46", 0 0, L_0x1aeced0; 1 drivers +v0x1ace3c0_0 .net *"_s50", 0 0, L_0x1ad0340; 1 drivers +v0x1ace4a0_0 .net *"_s55", 0 0, L_0x1aed150; 1 drivers +v0x1ace580_0 .net *"_s61", 0 0, L_0x1aed3c0; 1 drivers +v0x1ace660_0 .net *"_s65", 0 0, L_0x1aed4f0; 1 drivers +v0x1ace740_0 .net *"_s69", 0 0, L_0x1aed630; 1 drivers +v0x1ace820_0 .net *"_s74", 0 0, L_0x1aed590; 1 drivers +v0x1ace900_0 .net *"_s80", 0 0, L_0x1aed850; 1 drivers +v0x1ace9e0_0 .net *"_s84", 0 0, L_0x1aedb40; 1 drivers +v0x1aceac0_0 .net *"_s88", 0 0, L_0x1aeda80; 1 drivers +v0x1aceba0_0 .net *"_s93", 0 0, L_0x1aedbe0; 1 drivers +v0x1acec80_0 .net *"_s99", 0 0, L_0x1aedea0; 1 drivers +v0x1aced60_0 .net/s "accOut", 10 0, L_0x1adc160; alias, 1 drivers +v0x1acee40_0 .net "anyHasData", 0 0, L_0x1aecce0; 1 drivers +v0x1acef00_0 .net "anyReadAck", 0 0, L_0x1aed9e0; 1 drivers +v0x1acefc0_0 .net "anyWantData", 0 0, L_0x1aed240; 1 drivers +v0x1acf080_0 .net "anyWriteAck", 0 0, L_0x1aedfd0; 1 drivers +v0x1acf140_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers +o0x2acae8b59ef8 .functor BUFZ 15, C4; HiZ drive +v0x1acf1e0_0 .net "down", 14 0, o0x2acae8b59ef8; 0 drivers +v0x1acf2c0_0 .net "downOut", 14 0, L_0x1aef5f0; 1 drivers +v0x1acf3a0_0 .net "instruction", 17 0, L_0x1aecf70; 1 drivers +v0x1acf480 .array "instructions", 15 0, 17 0; +v0x1acf540_0 .var "last", 2 0; +o0x2acae8b59fb8 .functor BUFZ 15, C4; HiZ drive +v0x1acf620_0 .net "left", 14 0, o0x2acae8b59fb8; 0 drivers +v0x1acf700_0 .net "leftOut", 14 0, L_0x1aef330; 1 drivers +v0x1acf7e0_0 .var "mode", 2 0; +v0x1acf8c0 .array/s "outVals", 2 5, 10 0; +v0x1acfa00_0 .var "phase", 2 0; +v0x1acfae0_0 .net "portsHaveData", 5 2, L_0x1aec990; 1 drivers +v0x1acdf10_0 .net "portsWantData", 5 2, L_0x1aecfe0; 1 drivers +v0x1acdff0_0 .net "readAckIn", 5 2, L_0x1aed760; 1 drivers +v0x1acff90_0 .var "readAckOut", 5 2; +v0x1ad0050_0 .var "readTarget", 2 0; +v0x1ad0130_0 .var/s "readValue", 10 0; +L_0x2acae8b88018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1ad0210 .array "regVals", 0 7; +v0x1ad0210_0 .net/s v0x1ad0210 0, 10 0, L_0x2acae8b88018; 1 drivers +v0x1ad0210_1 .net/s v0x1ad0210 1, 10 0, L_0x1aec200; 1 drivers +v0x1ad0210_2 .net/s v0x1ad0210 2, 10 0, L_0x1aec2c0; 1 drivers +v0x1ad0210_3 .net/s v0x1ad0210 3, 10 0, L_0x1aec360; 1 drivers +v0x1ad0210_4 .net/s v0x1ad0210 4, 10 0, L_0x1aec430; 1 drivers +v0x1ad0210_5 .net/s v0x1ad0210 5, 10 0, L_0x1aec530; 1 drivers +o0x2acae8b5a378 .functor BUFZ 11, C4; HiZ drive +v0x1ad0210_6 .net/s v0x1ad0210 6, 10 0, o0x2acae8b5a378; 0 drivers +o0x2acae8b5a3a8 .functor BUFZ 11, C4; HiZ drive +v0x1ad0210_7 .net/s v0x1ad0210 7, 10 0, o0x2acae8b5a3a8; 0 drivers +v0x1ad0420_0 .net "right", 14 0, L_0x1aff8a0; alias, 1 drivers +v0x1ad0510_0 .net "rightOut", 14 0, L_0x1aefbe0; alias, 1 drivers +o0x2acae8b5a3d8 .functor BUFZ 15, C4; HiZ drive +v0x1ad05e0_0 .net "up", 14 0, o0x2acae8b5a3d8; 0 drivers +v0x1ad06a0_0 .net "upOut", 14 0, L_0x1aef100; 1 drivers +v0x1ad0780_0 .var "weHaveData", 5 2; +v0x1ad0860_0 .var "weWantData", 5 2; +v0x1ad0940_0 .net "writeAckIn", 5 2, L_0x1aedcb0; 1 drivers +v0x1ad0a20_0 .var "writeAckOut", 5 2; +v0x1ad0b00_0 .var "writeTarget", 2 0; +v0x1ad0be0_0 .var/s "writeValue", 10 0; +L_0x1aec2c0 .part o0x2acae8b59fb8, 0, 11; +L_0x1aec360 .part L_0x1aff8a0, 0, 11; +L_0x1aec430 .part o0x2acae8b5a3d8, 0, 11; +L_0x1aec530 .part o0x2acae8b59ef8, 0, 11; +L_0x1aec660 .part o0x2acae8b59fb8, 11, 1; +L_0x1aec780 .part L_0x1aff8a0, 11, 1; +L_0x1aec8f0 .part o0x2acae8b5a3d8, 11, 1; +L_0x1aec990 .concat8 [ 1 1 1 1], L_0x1aec660, L_0x1aec780, L_0x1aec8f0, L_0x1aecba0; +L_0x1aecba0 .part o0x2acae8b59ef8, 11, 1; +L_0x1aecce0 .reduce/or L_0x1aec990; +L_0x1aece30 .part o0x2acae8b59fb8, 12, 1; +L_0x1aeced0 .part L_0x1aff8a0, 12, 1; +L_0x1ad0340 .part o0x2acae8b5a3d8, 12, 1; +L_0x1aecfe0 .concat8 [ 1 1 1 1], L_0x1aece30, L_0x1aeced0, L_0x1ad0340, L_0x1aed150; +L_0x1aed150 .part o0x2acae8b59ef8, 12, 1; +L_0x1aed240 .reduce/or L_0x1aecfe0; +L_0x1aed3c0 .part o0x2acae8b59fb8, 13, 1; +L_0x1aed4f0 .part L_0x1aff8a0, 13, 1; +L_0x1aed630 .part o0x2acae8b5a3d8, 13, 1; +L_0x1aed760 .concat8 [ 1 1 1 1], L_0x1aed3c0, L_0x1aed4f0, L_0x1aed630, L_0x1aed590; +L_0x1aed590 .part o0x2acae8b59ef8, 13, 1; +L_0x1aed9e0 .reduce/or L_0x1aed760; +L_0x1aed850 .part o0x2acae8b59fb8, 14, 1; +L_0x1aedb40 .part L_0x1aff8a0, 14, 1; +L_0x1aeda80 .part o0x2acae8b5a3d8, 14, 1; +L_0x1aedcb0 .concat8 [ 1 1 1 1], L_0x1aed850, L_0x1aedb40, L_0x1aeda80, L_0x1aedbe0; +L_0x1aedbe0 .part o0x2acae8b59ef8, 14, 1; +L_0x1aedfd0 .reduce/or L_0x1aedcb0; +L_0x1aedea0 .part v0x1acff90_0, 0, 1; +L_0x1aee1b0 .part v0x1acff90_0, 1, 1; +L_0x1aee0c0 .part v0x1acff90_0, 2, 1; +L_0x1aee3a0 .part v0x1acff90_0, 3, 1; +L_0x1aee2a0 .part v0x1ad0a20_0, 0, 1; +L_0x1aee5e0 .part v0x1ad0a20_0, 1, 1; +L_0x1aee4d0 .part v0x1ad0a20_0, 2, 1; +L_0x1aee7a0 .part v0x1ad0a20_0, 3, 1; +L_0x1aee680 .part v0x1ad0860_0, 0, 1; +L_0x1aeea00 .part v0x1ad0860_0, 1, 1; +L_0x1aee8d0 .part v0x1ad0860_0, 2, 1; +L_0x1aeebe0 .part v0x1ad0860_0, 3, 1; +L_0x1aeeaa0 .part v0x1ad0780_0, 0, 1; +L_0x1aeedd0 .part v0x1ad0780_0, 1, 1; +L_0x1aeec80 .part v0x1ad0780_0, 2, 1; +L_0x1aeed20 .part v0x1ad0780_0, 3, 1; +L_0x1aeee70 .array/port v0x1acf480, L_0x1aef1d0; +L_0x1aef1d0 .concat [ 4 2 0 0], v0x1acc670_0, L_0x2acae8b88060; +LS_0x1aef100_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_2, L_0x1aeec80, L_0x1aee8d0, L_0x1aee4d0; +LS_0x1aef100_0_4 .concat8 [ 1 0 0 0], L_0x1aee0c0; +L_0x1aef100 .concat8 [ 14 1 0 0], LS_0x1aef100_0_0, LS_0x1aef100_0_4; +LS_0x1aef5f0_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_3, L_0x1aeed20, L_0x1aeebe0, L_0x1aee7a0; +LS_0x1aef5f0_0_4 .concat8 [ 1 0 0 0], L_0x1aee3a0; +L_0x1aef5f0 .concat8 [ 14 1 0 0], LS_0x1aef5f0_0_0, LS_0x1aef5f0_0_4; +LS_0x1aef330_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_0, L_0x1aeeaa0, L_0x1aee680, L_0x1aee2a0; +LS_0x1aef330_0_4 .concat8 [ 1 0 0 0], L_0x1aedea0; +L_0x1aef330 .concat8 [ 14 1 0 0], LS_0x1aef330_0_0, LS_0x1aef330_0_4; +LS_0x1aefbe0_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_1, L_0x1aeedd0, L_0x1aeea00, L_0x1aee5e0; +LS_0x1aefbe0_0_4 .concat8 [ 1 0 0 0], L_0x1aee1b0; +L_0x1aefbe0 .concat8 [ 14 1 0 0], LS_0x1aefbe0_0_0, LS_0x1aefbe0_0_4; +L_0x1aef8d0 .part L_0x1aecf70, 14, 4; +L_0x1aefff0 .part L_0x1aecf70, 11, 3; +L_0x1aefe00 .part L_0x1aecf70, 8, 3; +L_0x1af0240 .part L_0x1aecf70, 10, 4; +L_0x1af0090 .part L_0x1aecf70, 0, 11; +S_0x1ad0e60 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x1a0c690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -572,174 +575,175 @@ S_0x118efd0 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x10ca9f0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x118f1a0 .param/str "memFile" 0 3 60, "regTest/right.dat"; -L_0x11ade50 .functor BUFZ 11, v0x118f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11ae050 .functor BUFZ 11, v0x118f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11aef70 .functor BUFZ 18, L_0x11b0f60, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x118f490_0 .var/s "ACC", 10 0; -v0x118f590_0 .var/s "BAK", 10 0; -v0x118f670_0 .net "DST", 2 0, L_0x11b20a0; 1 drivers -v0x118f730_0 .net/s "IMM", 10 0, L_0x11b2140; 1 drivers -v0x118f810_0 .net "INST", 3 0, L_0x11b1980; 1 drivers -v0x118f8f0_0 .net "LABEL", 3 0, L_0x11b22f0; 1 drivers -v0x118f9d0_0 .var "PC", 3 0; -v0x118fab0_0 .var "PCNEXT", 3 0; -v0x118fb90_0 .net "SRC", 2 0, L_0x11b1eb0; 1 drivers -v0x118fd00_0 .net *"_s103", 0 0, L_0x11b02a0; 1 drivers -v0x118fde0_0 .net *"_s107", 0 0, L_0x11b01b0; 1 drivers -v0x118fec0_0 .net *"_s111", 0 0, L_0x11b0490; 1 drivers -v0x118ffa0_0 .net *"_s115", 0 0, L_0x11b0390; 1 drivers -v0x1190080_0 .net *"_s119", 0 0, L_0x11b06d0; 1 drivers -v0x1190160_0 .net *"_s123", 0 0, L_0x11b05c0; 1 drivers -v0x1190240_0 .net *"_s127", 0 0, L_0x11b0890; 1 drivers -v0x1190320_0 .net *"_s131", 0 0, L_0x11b0770; 1 drivers -v0x11904d0_0 .net *"_s135", 0 0, L_0x11b0af0; 1 drivers -v0x1190570_0 .net *"_s139", 0 0, L_0x11b09c0; 1 drivers -v0x1190650_0 .net *"_s143", 0 0, L_0x11b0cd0; 1 drivers -v0x1190730_0 .net *"_s147", 0 0, L_0x11b0b90; 1 drivers -v0x1190810_0 .net *"_s151", 0 0, L_0x11b0ec0; 1 drivers -v0x11908f0_0 .net *"_s155", 0 0, L_0x11b0d70; 1 drivers -v0x11909d0_0 .net *"_s159", 0 0, L_0x11b0e10; 1 drivers -v0x1190ab0_0 .net *"_s160", 17 0, L_0x11b0f60; 1 drivers -v0x1190b90_0 .net *"_s162", 5 0, L_0x11b12c0; 1 drivers -L_0x2ab1a62480f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1190c70_0 .net *"_s165", 1 0, L_0x2ab1a62480f0; 1 drivers -v0x1192ba0_2 .array/port v0x1192ba0, 2; -v0x1190d50_0 .net *"_s173", 10 0, v0x1192ba0_2; 1 drivers -v0x1192ba0_3 .array/port v0x1192ba0, 3; -v0x1190e30_0 .net *"_s179", 10 0, v0x1192ba0_3; 1 drivers -v0x1192ba0_0 .array/port v0x1192ba0, 0; -v0x1190f10_0 .net *"_s185", 10 0, v0x1192ba0_0; 1 drivers -v0x1192ba0_1 .array/port v0x1192ba0, 1; -v0x1190ff0_0 .net *"_s191", 10 0, v0x1192ba0_1; 1 drivers -v0x11910d0_0 .net *"_s23", 0 0, L_0x11ae6a0; 1 drivers -v0x11911b0_0 .net *"_s27", 0 0, L_0x11ae800; 1 drivers -v0x1190400_0 .net *"_s31", 0 0, L_0x11ae8d0; 1 drivers -v0x1191480_0 .net *"_s36", 0 0, L_0x11aeba0; 1 drivers -v0x1191560_0 .net *"_s42", 0 0, L_0x11aee30; 1 drivers -v0x1191640_0 .net *"_s46", 0 0, L_0x11aeed0; 1 drivers -v0x1191720_0 .net *"_s50", 0 0, L_0x11aefe0; 1 drivers -v0x1191800_0 .net *"_s55", 0 0, L_0x11af270; 1 drivers -v0x11918e0_0 .net *"_s61", 0 0, L_0x11af4e0; 1 drivers -v0x11919c0_0 .net *"_s65", 0 0, L_0x11af580; 1 drivers -v0x1191aa0_0 .net *"_s69", 0 0, L_0x11af750; 1 drivers -v0x1191b80_0 .net *"_s74", 0 0, L_0x11af6b0; 1 drivers -v0x1191c60_0 .net *"_s80", 0 0, L_0x11af940; 1 drivers -v0x1191d40_0 .net *"_s84", 0 0, L_0x11afc30; 1 drivers -v0x1191e20_0 .net *"_s88", 0 0, L_0x11afb70; 1 drivers -v0x1191f00_0 .net *"_s93", 0 0, L_0x11afcd0; 1 drivers -v0x1191fe0_0 .net *"_s99", 0 0, L_0x11aff90; 1 drivers -v0x11920c0_0 .net/s "accOut", 10 0, L_0x11ade50; alias, 1 drivers -v0x11921a0_0 .net "anyHasData", 0 0, L_0x11aece0; 1 drivers -v0x1192260_0 .net "anyReadAck", 0 0, L_0x11afad0; 1 drivers -v0x1192320_0 .net "anyWantData", 0 0, L_0x11af360; 1 drivers -v0x11923e0_0 .net "anyWriteAck", 0 0, L_0x11b00c0; 1 drivers -v0x11924a0_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers -o0x2ab1a621b128 .functor BUFZ 15, C4; HiZ drive -v0x1192540_0 .net "down", 14 0, o0x2ab1a621b128; 0 drivers -v0x1192620_0 .net "downOut", 14 0, L_0x11b16e0; 1 drivers -v0x1192700_0 .net "instruction", 17 0, L_0x11aef70; 1 drivers -v0x11927e0 .array "instructions", 15 0, 17 0; -v0x11928a0_0 .var "last", 2 0; -v0x1192980_0 .net "left", 14 0, L_0x11be190; alias, 1 drivers -v0x1192a40_0 .net "leftOut", 14 0, L_0x11b1420; alias, 1 drivers -v0x1192ae0_0 .var "mode", 2 0; -v0x1192ba0 .array/s "outVals", 2 5, 10 0; -v0x1192d10_0 .var "phase", 2 0; -v0x1192df0_0 .net "portsHaveData", 5 2, L_0x11ae9c0; 1 drivers -v0x1191250_0 .net "portsWantData", 5 2, L_0x11af080; 1 drivers -v0x1191330_0 .net "readAckIn", 5 2, L_0x11af7f0; 1 drivers -v0x11932a0_0 .var "readAckOut", 5 2; -v0x1193340_0 .var "readTarget", 2 0; -v0x11933e0_0 .var/s "readValue", 10 0; -L_0x2ab1a62480a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1193480 .array "regVals", 0 7; -v0x1193480_0 .net/s v0x1193480 0, 10 0, L_0x2ab1a62480a8; 1 drivers -v0x1193480_1 .net/s v0x1193480 1, 10 0, L_0x11ae050; 1 drivers -v0x1193480_2 .net/s v0x1193480 2, 10 0, L_0x11ae3c0; 1 drivers -v0x1193480_3 .net/s v0x1193480 3, 10 0, L_0x11ae460; 1 drivers -v0x1193480_4 .net/s v0x1193480 4, 10 0, L_0x11ae500; 1 drivers -v0x1193480_5 .net/s v0x1193480 5, 10 0, L_0x11ae5a0; 1 drivers -o0x2ab1a621b548 .functor BUFZ 11, C4; HiZ drive -v0x1193480_6 .net/s v0x1193480 6, 10 0, o0x2ab1a621b548; 0 drivers -o0x2ab1a621b578 .functor BUFZ 11, C4; HiZ drive -v0x1193480_7 .net/s v0x1193480 7, 10 0, o0x2ab1a621b578; 0 drivers -o0x2ab1a621b5a8 .functor BUFZ 15, C4; HiZ drive -v0x1193690_0 .net "right", 14 0, o0x2ab1a621b5a8; 0 drivers -v0x1193770_0 .net "rightOut", 14 0, L_0x11b1c90; 1 drivers -o0x2ab1a621b608 .functor BUFZ 15, C4; HiZ drive -v0x1193850_0 .net "up", 14 0, o0x2ab1a621b608; 0 drivers -v0x1193930_0 .net "upOut", 14 0, L_0x11b11d0; 1 drivers -v0x1193a10_0 .var "weHaveData", 5 2; -v0x1193af0_0 .var "weWantData", 5 2; -v0x1193bd0_0 .net "writeAckIn", 5 2, L_0x11afda0; 1 drivers -v0x1193cb0_0 .var "writeAckOut", 5 2; -v0x1193d90_0 .var "writeTarget", 2 0; -v0x1193e70_0 .var/s "writeValue", 10 0; -L_0x11ae3c0 .part L_0x11be190, 0, 11; -L_0x11ae460 .part o0x2ab1a621b5a8, 0, 11; -L_0x11ae500 .part o0x2ab1a621b608, 0, 11; -L_0x11ae5a0 .part o0x2ab1a621b128, 0, 11; -L_0x11ae6a0 .part L_0x11be190, 11, 1; -L_0x11ae800 .part o0x2ab1a621b5a8, 11, 1; -L_0x11ae8d0 .part o0x2ab1a621b608, 11, 1; -L_0x11ae9c0 .concat8 [ 1 1 1 1], L_0x11ae6a0, L_0x11ae800, L_0x11ae8d0, L_0x11aeba0; -L_0x11aeba0 .part o0x2ab1a621b128, 11, 1; -L_0x11aece0 .reduce/or L_0x11ae9c0; -L_0x11aee30 .part L_0x11be190, 12, 1; -L_0x11aeed0 .part o0x2ab1a621b5a8, 12, 1; -L_0x11aefe0 .part o0x2ab1a621b608, 12, 1; -L_0x11af080 .concat8 [ 1 1 1 1], L_0x11aee30, L_0x11aeed0, L_0x11aefe0, L_0x11af270; -L_0x11af270 .part o0x2ab1a621b128, 12, 1; -L_0x11af360 .reduce/or L_0x11af080; -L_0x11af4e0 .part L_0x11be190, 13, 1; -L_0x11af580 .part o0x2ab1a621b5a8, 13, 1; -L_0x11af750 .part o0x2ab1a621b608, 13, 1; -L_0x11af7f0 .concat8 [ 1 1 1 1], L_0x11af4e0, L_0x11af580, L_0x11af750, L_0x11af6b0; -L_0x11af6b0 .part o0x2ab1a621b128, 13, 1; -L_0x11afad0 .reduce/or L_0x11af7f0; -L_0x11af940 .part L_0x11be190, 14, 1; -L_0x11afc30 .part o0x2ab1a621b5a8, 14, 1; -L_0x11afb70 .part o0x2ab1a621b608, 14, 1; -L_0x11afda0 .concat8 [ 1 1 1 1], L_0x11af940, L_0x11afc30, L_0x11afb70, L_0x11afcd0; -L_0x11afcd0 .part o0x2ab1a621b128, 14, 1; -L_0x11b00c0 .reduce/or L_0x11afda0; -L_0x11aff90 .part v0x11932a0_0, 0, 1; -L_0x11b02a0 .part v0x11932a0_0, 1, 1; -L_0x11b01b0 .part v0x11932a0_0, 2, 1; -L_0x11b0490 .part v0x11932a0_0, 3, 1; -L_0x11b0390 .part v0x1193cb0_0, 0, 1; -L_0x11b06d0 .part v0x1193cb0_0, 1, 1; -L_0x11b05c0 .part v0x1193cb0_0, 2, 1; -L_0x11b0890 .part v0x1193cb0_0, 3, 1; -L_0x11b0770 .part v0x1193af0_0, 0, 1; -L_0x11b0af0 .part v0x1193af0_0, 1, 1; -L_0x11b09c0 .part v0x1193af0_0, 2, 1; -L_0x11b0cd0 .part v0x1193af0_0, 3, 1; -L_0x11b0b90 .part v0x1193a10_0, 0, 1; -L_0x11b0ec0 .part v0x1193a10_0, 1, 1; -L_0x11b0d70 .part v0x1193a10_0, 2, 1; -L_0x11b0e10 .part v0x1193a10_0, 3, 1; -L_0x11b0f60 .array/port v0x11927e0, L_0x11b12c0; -L_0x11b12c0 .concat [ 4 2 0 0], v0x118f9d0_0, L_0x2ab1a62480f0; -LS_0x11b11d0_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_2, L_0x11b0d70, L_0x11b09c0, L_0x11b05c0; -LS_0x11b11d0_0_4 .concat8 [ 1 0 0 0], L_0x11b01b0; -L_0x11b11d0 .concat8 [ 14 1 0 0], LS_0x11b11d0_0_0, LS_0x11b11d0_0_4; -LS_0x11b16e0_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_3, L_0x11b0e10, L_0x11b0cd0, L_0x11b0890; -LS_0x11b16e0_0_4 .concat8 [ 1 0 0 0], L_0x11b0490; -L_0x11b16e0 .concat8 [ 14 1 0 0], LS_0x11b16e0_0_0, LS_0x11b16e0_0_4; -LS_0x11b1420_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_0, L_0x11b0b90, L_0x11b0770, L_0x11b0390; -LS_0x11b1420_0_4 .concat8 [ 1 0 0 0], L_0x11aff90; -L_0x11b1420 .concat8 [ 14 1 0 0], LS_0x11b1420_0_0, LS_0x11b1420_0_4; -LS_0x11b1c90_0_0 .concat8 [ 11 1 1 1], v0x1192ba0_1, L_0x11b0ec0, L_0x11b0af0, L_0x11b06d0; -LS_0x11b1c90_0_4 .concat8 [ 1 0 0 0], L_0x11b02a0; -L_0x11b1c90 .concat8 [ 14 1 0 0], LS_0x11b1c90_0_0, LS_0x11b1c90_0_4; -L_0x11b1980 .part L_0x11aef70, 14, 4; -L_0x11b20a0 .part L_0x11aef70, 11, 3; -L_0x11b1eb0 .part L_0x11aef70, 8, 3; -L_0x11b22f0 .part L_0x11aef70, 10, 4; -L_0x11b2140 .part L_0x11aef70, 0, 11; -S_0x11940f0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x10ca9f0; +P_0x1ad1030 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1ad1070 .param/str "memFile" 0 3 60, "regTest/right.dat"; +L_0x1aeff30 .functor BUFZ 11, v0x1ad13e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1af0130 .functor BUFZ 11, v0x1ad13e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1af1080 .functor BUFZ 18, L_0x1af2ff0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1ad13e0_0 .var/s "ACC", 10 0; +v0x1ad14e0_0 .var/s "BAK", 10 0; +v0x1ad15c0_0 .net "DST", 2 0, L_0x1af40f0; 1 drivers +v0x1ad1680_0 .net/s "IMM", 10 0, L_0x1af4190; 1 drivers +v0x1ad1760_0 .net "INST", 3 0, L_0x1af3a10; 1 drivers +v0x1ad1840_0 .net "LABEL", 3 0, L_0x1af4340; 1 drivers +v0x1ad1920_0 .var "PC", 3 0; +v0x1ad1a00_0 .var "PCNEXT", 3 0; +v0x1ad1ae0_0 .net "SRC", 2 0, L_0x1af3f00; 1 drivers +v0x1ad1c50_0 .net *"_s103", 0 0, L_0x1af2330; 1 drivers +v0x1ad1d30_0 .net *"_s107", 0 0, L_0x1af2240; 1 drivers +v0x1ad1e10_0 .net *"_s111", 0 0, L_0x1af2520; 1 drivers +v0x1ad1ef0_0 .net *"_s115", 0 0, L_0x1af2420; 1 drivers +v0x1ad1fd0_0 .net *"_s119", 0 0, L_0x1af2760; 1 drivers +v0x1ad20b0_0 .net *"_s123", 0 0, L_0x1af2650; 1 drivers +v0x1ad2190_0 .net *"_s127", 0 0, L_0x1af2920; 1 drivers +v0x1ad2270_0 .net *"_s131", 0 0, L_0x1af2800; 1 drivers +v0x1ad2420_0 .net *"_s135", 0 0, L_0x1af2b80; 1 drivers +v0x1ad24c0_0 .net *"_s139", 0 0, L_0x1af2a50; 1 drivers +v0x1ad25a0_0 .net *"_s143", 0 0, L_0x1af2d60; 1 drivers +v0x1ad2680_0 .net *"_s147", 0 0, L_0x1af2c20; 1 drivers +v0x1ad2760_0 .net *"_s151", 0 0, L_0x1af2f50; 1 drivers +v0x1ad2840_0 .net *"_s155", 0 0, L_0x1af2e00; 1 drivers +v0x1ad2920_0 .net *"_s159", 0 0, L_0x1af2ea0; 1 drivers +v0x1ad2a00_0 .net *"_s160", 17 0, L_0x1af2ff0; 1 drivers +v0x1ad2ae0_0 .net *"_s162", 5 0, L_0x1af3350; 1 drivers +L_0x2acae8b880f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1ad2bc0_0 .net *"_s165", 1 0, L_0x2acae8b880f0; 1 drivers +v0x1ad4af0_2 .array/port v0x1ad4af0, 2; +v0x1ad2ca0_0 .net *"_s173", 10 0, v0x1ad4af0_2; 1 drivers +v0x1ad4af0_3 .array/port v0x1ad4af0, 3; +v0x1ad2d80_0 .net *"_s179", 10 0, v0x1ad4af0_3; 1 drivers +v0x1ad4af0_0 .array/port v0x1ad4af0, 0; +v0x1ad2e60_0 .net *"_s185", 10 0, v0x1ad4af0_0; 1 drivers +v0x1ad4af0_1 .array/port v0x1ad4af0, 1; +v0x1ad2f40_0 .net *"_s191", 10 0, v0x1ad4af0_1; 1 drivers +v0x1ad3020_0 .net *"_s23", 0 0, L_0x1af07b0; 1 drivers +v0x1ad3100_0 .net *"_s27", 0 0, L_0x1af0910; 1 drivers +v0x1ad2350_0 .net *"_s31", 0 0, L_0x1af09e0; 1 drivers +v0x1ad33d0_0 .net *"_s36", 0 0, L_0x1af0cb0; 1 drivers +v0x1ad34b0_0 .net *"_s42", 0 0, L_0x1af0f40; 1 drivers +v0x1ad3590_0 .net *"_s46", 0 0, L_0x1af0fe0; 1 drivers +v0x1ad3670_0 .net *"_s50", 0 0, L_0x1af10f0; 1 drivers +v0x1ad3750_0 .net *"_s55", 0 0, L_0x1af1300; 1 drivers +v0x1ad3830_0 .net *"_s61", 0 0, L_0x1af1570; 1 drivers +v0x1ad3910_0 .net *"_s65", 0 0, L_0x1af1610; 1 drivers +v0x1ad39f0_0 .net *"_s69", 0 0, L_0x1af17e0; 1 drivers +v0x1ad3ad0_0 .net *"_s74", 0 0, L_0x1af1740; 1 drivers +v0x1ad3bb0_0 .net *"_s80", 0 0, L_0x1af19d0; 1 drivers +v0x1ad3c90_0 .net *"_s84", 0 0, L_0x1af1cc0; 1 drivers +v0x1ad3d70_0 .net *"_s88", 0 0, L_0x1af1c00; 1 drivers +v0x1ad3e50_0 .net *"_s93", 0 0, L_0x1af1d60; 1 drivers +v0x1ad3f30_0 .net *"_s99", 0 0, L_0x1af2020; 1 drivers +v0x1ad4010_0 .net/s "accOut", 10 0, L_0x1aeff30; alias, 1 drivers +v0x1ad40f0_0 .net "anyHasData", 0 0, L_0x1af0df0; 1 drivers +v0x1ad41b0_0 .net "anyReadAck", 0 0, L_0x1af1b60; 1 drivers +v0x1ad4270_0 .net "anyWantData", 0 0, L_0x1af13f0; 1 drivers +v0x1ad4330_0 .net "anyWriteAck", 0 0, L_0x1af2150; 1 drivers +v0x1ad43f0_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers +o0x2acae8b5b128 .functor BUFZ 15, C4; HiZ drive +v0x1ad4490_0 .net "down", 14 0, o0x2acae8b5b128; 0 drivers +v0x1ad4570_0 .net "downOut", 14 0, L_0x1af3770; 1 drivers +v0x1ad4650_0 .net "instruction", 17 0, L_0x1af1080; 1 drivers +v0x1ad4730 .array "instructions", 15 0, 17 0; +v0x1ad47f0_0 .var "last", 2 0; +v0x1ad48d0_0 .net "left", 14 0, L_0x1b00270; alias, 1 drivers +v0x1ad4990_0 .net "leftOut", 14 0, L_0x1af34b0; alias, 1 drivers +v0x1ad4a30_0 .var "mode", 2 0; +v0x1ad4af0 .array/s "outVals", 2 5, 10 0; +v0x1ad4c60_0 .var "phase", 2 0; +v0x1ad4d40_0 .net "portsHaveData", 5 2, L_0x1af0ad0; 1 drivers +v0x1ad31a0_0 .net "portsWantData", 5 2, L_0x1af1190; 1 drivers +v0x1ad3280_0 .net "readAckIn", 5 2, L_0x1af1880; 1 drivers +v0x1ad51f0_0 .var "readAckOut", 5 2; +v0x1ad5290_0 .var "readTarget", 2 0; +v0x1ad5330_0 .var/s "readValue", 10 0; +L_0x2acae8b880a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1ad53d0 .array "regVals", 0 7; +v0x1ad53d0_0 .net/s v0x1ad53d0 0, 10 0, L_0x2acae8b880a8; 1 drivers +v0x1ad53d0_1 .net/s v0x1ad53d0 1, 10 0, L_0x1af0130; 1 drivers +v0x1ad53d0_2 .net/s v0x1ad53d0 2, 10 0, L_0x1af04a0; 1 drivers +v0x1ad53d0_3 .net/s v0x1ad53d0 3, 10 0, L_0x1af0540; 1 drivers +v0x1ad53d0_4 .net/s v0x1ad53d0 4, 10 0, L_0x1af05e0; 1 drivers +v0x1ad53d0_5 .net/s v0x1ad53d0 5, 10 0, L_0x1af0680; 1 drivers +o0x2acae8b5b548 .functor BUFZ 11, C4; HiZ drive +v0x1ad53d0_6 .net/s v0x1ad53d0 6, 10 0, o0x2acae8b5b548; 0 drivers +o0x2acae8b5b578 .functor BUFZ 11, C4; HiZ drive +v0x1ad53d0_7 .net/s v0x1ad53d0 7, 10 0, o0x2acae8b5b578; 0 drivers +o0x2acae8b5b5a8 .functor BUFZ 15, C4; HiZ drive +v0x1ad55e0_0 .net "right", 14 0, o0x2acae8b5b5a8; 0 drivers +v0x1ad56c0_0 .net "rightOut", 14 0, L_0x1af3ce0; 1 drivers +o0x2acae8b5b608 .functor BUFZ 15, C4; HiZ drive +v0x1ad57a0_0 .net "up", 14 0, o0x2acae8b5b608; 0 drivers +v0x1ad5880_0 .net "upOut", 14 0, L_0x1af3260; 1 drivers +v0x1ad5960_0 .var "weHaveData", 5 2; +v0x1ad5a40_0 .var "weWantData", 5 2; +v0x1ad5b20_0 .net "writeAckIn", 5 2, L_0x1af1e30; 1 drivers +v0x1ad5c00_0 .var "writeAckOut", 5 2; +v0x1ad5ce0_0 .var "writeTarget", 2 0; +v0x1ad5dc0_0 .var/s "writeValue", 10 0; +L_0x1af04a0 .part L_0x1b00270, 0, 11; +L_0x1af0540 .part o0x2acae8b5b5a8, 0, 11; +L_0x1af05e0 .part o0x2acae8b5b608, 0, 11; +L_0x1af0680 .part o0x2acae8b5b128, 0, 11; +L_0x1af07b0 .part L_0x1b00270, 11, 1; +L_0x1af0910 .part o0x2acae8b5b5a8, 11, 1; +L_0x1af09e0 .part o0x2acae8b5b608, 11, 1; +L_0x1af0ad0 .concat8 [ 1 1 1 1], L_0x1af07b0, L_0x1af0910, L_0x1af09e0, L_0x1af0cb0; +L_0x1af0cb0 .part o0x2acae8b5b128, 11, 1; +L_0x1af0df0 .reduce/or L_0x1af0ad0; +L_0x1af0f40 .part L_0x1b00270, 12, 1; +L_0x1af0fe0 .part o0x2acae8b5b5a8, 12, 1; +L_0x1af10f0 .part o0x2acae8b5b608, 12, 1; +L_0x1af1190 .concat8 [ 1 1 1 1], L_0x1af0f40, L_0x1af0fe0, L_0x1af10f0, L_0x1af1300; +L_0x1af1300 .part o0x2acae8b5b128, 12, 1; +L_0x1af13f0 .reduce/or L_0x1af1190; +L_0x1af1570 .part L_0x1b00270, 13, 1; +L_0x1af1610 .part o0x2acae8b5b5a8, 13, 1; +L_0x1af17e0 .part o0x2acae8b5b608, 13, 1; +L_0x1af1880 .concat8 [ 1 1 1 1], L_0x1af1570, L_0x1af1610, L_0x1af17e0, L_0x1af1740; +L_0x1af1740 .part o0x2acae8b5b128, 13, 1; +L_0x1af1b60 .reduce/or L_0x1af1880; +L_0x1af19d0 .part L_0x1b00270, 14, 1; +L_0x1af1cc0 .part o0x2acae8b5b5a8, 14, 1; +L_0x1af1c00 .part o0x2acae8b5b608, 14, 1; +L_0x1af1e30 .concat8 [ 1 1 1 1], L_0x1af19d0, L_0x1af1cc0, L_0x1af1c00, L_0x1af1d60; +L_0x1af1d60 .part o0x2acae8b5b128, 14, 1; +L_0x1af2150 .reduce/or L_0x1af1e30; +L_0x1af2020 .part v0x1ad51f0_0, 0, 1; +L_0x1af2330 .part v0x1ad51f0_0, 1, 1; +L_0x1af2240 .part v0x1ad51f0_0, 2, 1; +L_0x1af2520 .part v0x1ad51f0_0, 3, 1; +L_0x1af2420 .part v0x1ad5c00_0, 0, 1; +L_0x1af2760 .part v0x1ad5c00_0, 1, 1; +L_0x1af2650 .part v0x1ad5c00_0, 2, 1; +L_0x1af2920 .part v0x1ad5c00_0, 3, 1; +L_0x1af2800 .part v0x1ad5a40_0, 0, 1; +L_0x1af2b80 .part v0x1ad5a40_0, 1, 1; +L_0x1af2a50 .part v0x1ad5a40_0, 2, 1; +L_0x1af2d60 .part v0x1ad5a40_0, 3, 1; +L_0x1af2c20 .part v0x1ad5960_0, 0, 1; +L_0x1af2f50 .part v0x1ad5960_0, 1, 1; +L_0x1af2e00 .part v0x1ad5960_0, 2, 1; +L_0x1af2ea0 .part v0x1ad5960_0, 3, 1; +L_0x1af2ff0 .array/port v0x1ad4730, L_0x1af3350; +L_0x1af3350 .concat [ 4 2 0 0], v0x1ad1920_0, L_0x2acae8b880f0; +LS_0x1af3260_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_2, L_0x1af2e00, L_0x1af2a50, L_0x1af2650; +LS_0x1af3260_0_4 .concat8 [ 1 0 0 0], L_0x1af2240; +L_0x1af3260 .concat8 [ 14 1 0 0], LS_0x1af3260_0_0, LS_0x1af3260_0_4; +LS_0x1af3770_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_3, L_0x1af2ea0, L_0x1af2d60, L_0x1af2920; +LS_0x1af3770_0_4 .concat8 [ 1 0 0 0], L_0x1af2520; +L_0x1af3770 .concat8 [ 14 1 0 0], LS_0x1af3770_0_0, LS_0x1af3770_0_4; +LS_0x1af34b0_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_0, L_0x1af2c20, L_0x1af2800, L_0x1af2420; +LS_0x1af34b0_0_4 .concat8 [ 1 0 0 0], L_0x1af2020; +L_0x1af34b0 .concat8 [ 14 1 0 0], LS_0x1af34b0_0_0, LS_0x1af34b0_0_4; +LS_0x1af3ce0_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_1, L_0x1af2f50, L_0x1af2b80, L_0x1af2760; +LS_0x1af3ce0_0_4 .concat8 [ 1 0 0 0], L_0x1af2330; +L_0x1af3ce0 .concat8 [ 14 1 0 0], LS_0x1af3ce0_0_0, LS_0x1af3ce0_0_4; +L_0x1af3a10 .part L_0x1af1080, 14, 4; +L_0x1af40f0 .part L_0x1af1080, 11, 3; +L_0x1af3f00 .part L_0x1af1080, 8, 3; +L_0x1af4340 .part L_0x1af1080, 10, 4; +L_0x1af4190 .part L_0x1af1080, 0, 11; +S_0x1ad6040 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x1a0c690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -751,218 +755,219 @@ S_0x11940f0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x10ca9f0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1194310 .param/str "memFile" 0 3 60, "regTest/up.dat"; -L_0x11b1fe0 .functor BUFZ 11, v0x1194540_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11b2230 .functor BUFZ 11, v0x1194540_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x11b3070 .functor BUFZ 18, L_0x11b5010, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1194540_0 .var/s "ACC", 10 0; -v0x1194640_0 .var/s "BAK", 10 0; -v0x1194720_0 .net "DST", 2 0, L_0x11b6150; 1 drivers -v0x11947e0_0 .net/s "IMM", 10 0, L_0x11b61f0; 1 drivers -v0x11948c0_0 .net "INST", 3 0, L_0x11b5a30; 1 drivers -v0x11949f0_0 .net "LABEL", 3 0, L_0x11b63a0; 1 drivers -v0x1194ad0_0 .var "PC", 3 0; -v0x1194bb0_0 .var "PCNEXT", 3 0; -v0x1194c90_0 .net "SRC", 2 0, L_0x11b5f60; 1 drivers -v0x1194e00_0 .net *"_s103", 0 0, L_0x11b4350; 1 drivers -v0x1194ee0_0 .net *"_s107", 0 0, L_0x11b4260; 1 drivers -v0x1194fc0_0 .net *"_s111", 0 0, L_0x11b4540; 1 drivers -v0x11950a0_0 .net *"_s115", 0 0, L_0x11b4440; 1 drivers -v0x1195180_0 .net *"_s119", 0 0, L_0x11b4780; 1 drivers -v0x1195260_0 .net *"_s123", 0 0, L_0x11b4670; 1 drivers -v0x1195340_0 .net *"_s127", 0 0, L_0x11b4940; 1 drivers -v0x1195420_0 .net *"_s131", 0 0, L_0x11b4820; 1 drivers -v0x11955d0_0 .net *"_s135", 0 0, L_0x11b4ba0; 1 drivers -v0x1195670_0 .net *"_s139", 0 0, L_0x11b4a70; 1 drivers -v0x1195750_0 .net *"_s143", 0 0, L_0x11b4d80; 1 drivers -v0x1195830_0 .net *"_s147", 0 0, L_0x11b4c40; 1 drivers -v0x1195910_0 .net *"_s151", 0 0, L_0x11b4f70; 1 drivers -v0x11959f0_0 .net *"_s155", 0 0, L_0x11b4e20; 1 drivers -v0x1195ad0_0 .net *"_s159", 0 0, L_0x11b4ec0; 1 drivers -v0x1195bb0_0 .net *"_s160", 17 0, L_0x11b5010; 1 drivers -v0x1195c90_0 .net *"_s162", 5 0, L_0x11b5370; 1 drivers -L_0x2ab1a6248180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1195d70_0 .net *"_s165", 1 0, L_0x2ab1a6248180; 1 drivers -v0x1197d30_2 .array/port v0x1197d30, 2; -v0x1195e50_0 .net *"_s173", 10 0, v0x1197d30_2; 1 drivers -v0x1197d30_3 .array/port v0x1197d30, 3; -v0x1195f30_0 .net *"_s179", 10 0, v0x1197d30_3; 1 drivers -v0x1197d30_0 .array/port v0x1197d30, 0; -v0x1196010_0 .net *"_s185", 10 0, v0x1197d30_0; 1 drivers -v0x1197d30_1 .array/port v0x1197d30, 1; -v0x11960f0_0 .net *"_s191", 10 0, v0x1197d30_1; 1 drivers -v0x11961d0_0 .net *"_s23", 0 0, L_0x11b2830; 1 drivers -v0x11962b0_0 .net *"_s27", 0 0, L_0x11b2950; 1 drivers -v0x1195500_0 .net *"_s31", 0 0, L_0x11b2a40; 1 drivers -v0x1196580_0 .net *"_s36", 0 0, L_0x11b2d10; 1 drivers -v0x1196660_0 .net *"_s42", 0 0, L_0x11b2f30; 1 drivers -v0x1196740_0 .net *"_s46", 0 0, L_0x11b2fd0; 1 drivers -v0x1196820_0 .net *"_s50", 0 0, L_0x11b30e0; 1 drivers -v0x1196900_0 .net *"_s55", 0 0, L_0x11b3320; 1 drivers -v0x11969e0_0 .net *"_s61", 0 0, L_0x11b3590; 1 drivers -v0x1196ac0_0 .net *"_s65", 0 0, L_0x11b36c0; 1 drivers -v0x1196ba0_0 .net *"_s69", 0 0, L_0x11b3890; 1 drivers -v0x1196c80_0 .net *"_s74", 0 0, L_0x11b37f0; 1 drivers -v0x1196d60_0 .net *"_s80", 0 0, L_0x11b3a30; 1 drivers -v0x1196e40_0 .net *"_s84", 0 0, L_0x11b3ce0; 1 drivers -v0x1196f20_0 .net *"_s88", 0 0, L_0x11b3c20; 1 drivers -v0x1197000_0 .net *"_s93", 0 0, L_0x11b3d80; 1 drivers -v0x11970e0_0 .net *"_s99", 0 0, L_0x11b4040; 1 drivers -v0x11971c0_0 .net/s "accOut", 10 0, L_0x11b1fe0; alias, 1 drivers -v0x11972a0_0 .net "anyHasData", 0 0, L_0x11b2e90; 1 drivers -v0x1197360_0 .net "anyReadAck", 0 0, L_0x11b3b30; 1 drivers -v0x1197420_0 .net "anyWantData", 0 0, L_0x11b3410; 1 drivers -v0x11974e0_0 .net "anyWriteAck", 0 0, L_0x11b4170; 1 drivers -v0x11975a0_0 .net "clk", 0 0, v0x1199f20_0; alias, 1 drivers -v0x11976d0_0 .net "down", 14 0, L_0x11bd4f0; alias, 1 drivers -v0x1197790_0 .net "downOut", 14 0, L_0x11b5790; alias, 1 drivers -v0x1197830_0 .net "instruction", 17 0, L_0x11b3070; 1 drivers -v0x11978f0 .array "instructions", 15 0, 17 0; -v0x11979b0_0 .var "last", 2 0; -o0x2ab1a621c3b8 .functor BUFZ 15, C4; HiZ drive -v0x1197a90_0 .net "left", 14 0, o0x2ab1a621c3b8; 0 drivers -v0x1197b70_0 .net "leftOut", 14 0, L_0x11b54d0; 1 drivers -v0x1197c50_0 .var "mode", 2 0; -v0x1197d30 .array/s "outVals", 2 5, 10 0; -v0x1197ea0_0 .var "phase", 2 0; -v0x1197f80_0 .net "portsHaveData", 5 2, L_0x11b2b30; 1 drivers -v0x1196350_0 .net "portsWantData", 5 2, L_0x11b3180; 1 drivers -v0x1196430_0 .net "readAckIn", 5 2, L_0x11b3930; 1 drivers -v0x1198430_0 .var "readAckOut", 5 2; -v0x11984d0_0 .var "readTarget", 2 0; -v0x1198570_0 .var/s "readValue", 10 0; -L_0x2ab1a6248138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1198610 .array "regVals", 0 7; -v0x1198610_0 .net/s v0x1198610 0, 10 0, L_0x2ab1a6248138; 1 drivers -v0x1198610_1 .net/s v0x1198610 1, 10 0, L_0x11b2230; 1 drivers -v0x1198610_2 .net/s v0x1198610 2, 10 0, L_0x11b2550; 1 drivers -v0x1198610_3 .net/s v0x1198610 3, 10 0, L_0x11b25f0; 1 drivers -v0x1198610_4 .net/s v0x1198610 4, 10 0, L_0x11b2690; 1 drivers -v0x1198610_5 .net/s v0x1198610 5, 10 0, L_0x11b2730; 1 drivers -o0x2ab1a621c778 .functor BUFZ 11, C4; HiZ drive -v0x1198610_6 .net/s v0x1198610 6, 10 0, o0x2ab1a621c778; 0 drivers -o0x2ab1a621c7a8 .functor BUFZ 11, C4; HiZ drive -v0x1198610_7 .net/s v0x1198610 7, 10 0, o0x2ab1a621c7a8; 0 drivers -o0x2ab1a621c7d8 .functor BUFZ 15, C4; HiZ drive -v0x1198820_0 .net "right", 14 0, o0x2ab1a621c7d8; 0 drivers -v0x1198900_0 .net "rightOut", 14 0, L_0x11b5d40; 1 drivers -o0x2ab1a621c838 .functor BUFZ 15, C4; HiZ drive -v0x11989e0_0 .net "up", 14 0, o0x2ab1a621c838; 0 drivers -v0x1198ac0_0 .net "upOut", 14 0, L_0x11b5280; 1 drivers -v0x1198ba0_0 .var "weHaveData", 5 2; -v0x1198c80_0 .var "weWantData", 5 2; -v0x1198d60_0 .net "writeAckIn", 5 2, L_0x11b3e50; 1 drivers -v0x1198e40_0 .var "writeAckOut", 5 2; -v0x1198f20_0 .var "writeTarget", 2 0; -v0x1199000_0 .var/s "writeValue", 10 0; -L_0x11b2550 .part o0x2ab1a621c3b8, 0, 11; -L_0x11b25f0 .part o0x2ab1a621c7d8, 0, 11; -L_0x11b2690 .part o0x2ab1a621c838, 0, 11; -L_0x11b2730 .part L_0x11bd4f0, 0, 11; -L_0x11b2830 .part o0x2ab1a621c3b8, 11, 1; -L_0x11b2950 .part o0x2ab1a621c7d8, 11, 1; -L_0x11b2a40 .part o0x2ab1a621c838, 11, 1; -L_0x11b2b30 .concat8 [ 1 1 1 1], L_0x11b2830, L_0x11b2950, L_0x11b2a40, L_0x11b2d10; -L_0x11b2d10 .part L_0x11bd4f0, 11, 1; -L_0x11b2e90 .reduce/or L_0x11b2b30; -L_0x11b2f30 .part o0x2ab1a621c3b8, 12, 1; -L_0x11b2fd0 .part o0x2ab1a621c7d8, 12, 1; -L_0x11b30e0 .part o0x2ab1a621c838, 12, 1; -L_0x11b3180 .concat8 [ 1 1 1 1], L_0x11b2f30, L_0x11b2fd0, L_0x11b30e0, L_0x11b3320; -L_0x11b3320 .part L_0x11bd4f0, 12, 1; -L_0x11b3410 .reduce/or L_0x11b3180; -L_0x11b3590 .part o0x2ab1a621c3b8, 13, 1; -L_0x11b36c0 .part o0x2ab1a621c7d8, 13, 1; -L_0x11b3890 .part o0x2ab1a621c838, 13, 1; -L_0x11b3930 .concat8 [ 1 1 1 1], L_0x11b3590, L_0x11b36c0, L_0x11b3890, L_0x11b37f0; -L_0x11b37f0 .part L_0x11bd4f0, 13, 1; -L_0x11b3b30 .reduce/or L_0x11b3930; -L_0x11b3a30 .part o0x2ab1a621c3b8, 14, 1; -L_0x11b3ce0 .part o0x2ab1a621c7d8, 14, 1; -L_0x11b3c20 .part o0x2ab1a621c838, 14, 1; -L_0x11b3e50 .concat8 [ 1 1 1 1], L_0x11b3a30, L_0x11b3ce0, L_0x11b3c20, L_0x11b3d80; -L_0x11b3d80 .part L_0x11bd4f0, 14, 1; -L_0x11b4170 .reduce/or L_0x11b3e50; -L_0x11b4040 .part v0x1198430_0, 0, 1; -L_0x11b4350 .part v0x1198430_0, 1, 1; -L_0x11b4260 .part v0x1198430_0, 2, 1; -L_0x11b4540 .part v0x1198430_0, 3, 1; -L_0x11b4440 .part v0x1198e40_0, 0, 1; -L_0x11b4780 .part v0x1198e40_0, 1, 1; -L_0x11b4670 .part v0x1198e40_0, 2, 1; -L_0x11b4940 .part v0x1198e40_0, 3, 1; -L_0x11b4820 .part v0x1198c80_0, 0, 1; -L_0x11b4ba0 .part v0x1198c80_0, 1, 1; -L_0x11b4a70 .part v0x1198c80_0, 2, 1; -L_0x11b4d80 .part v0x1198c80_0, 3, 1; -L_0x11b4c40 .part v0x1198ba0_0, 0, 1; -L_0x11b4f70 .part v0x1198ba0_0, 1, 1; -L_0x11b4e20 .part v0x1198ba0_0, 2, 1; -L_0x11b4ec0 .part v0x1198ba0_0, 3, 1; -L_0x11b5010 .array/port v0x11978f0, L_0x11b5370; -L_0x11b5370 .concat [ 4 2 0 0], v0x1194ad0_0, L_0x2ab1a6248180; -LS_0x11b5280_0_0 .concat8 [ 11 1 1 1], v0x1197d30_2, L_0x11b4e20, L_0x11b4a70, L_0x11b4670; -LS_0x11b5280_0_4 .concat8 [ 1 0 0 0], L_0x11b4260; -L_0x11b5280 .concat8 [ 14 1 0 0], LS_0x11b5280_0_0, LS_0x11b5280_0_4; -LS_0x11b5790_0_0 .concat8 [ 11 1 1 1], v0x1197d30_3, L_0x11b4ec0, L_0x11b4d80, L_0x11b4940; -LS_0x11b5790_0_4 .concat8 [ 1 0 0 0], L_0x11b4540; -L_0x11b5790 .concat8 [ 14 1 0 0], LS_0x11b5790_0_0, LS_0x11b5790_0_4; -LS_0x11b54d0_0_0 .concat8 [ 11 1 1 1], v0x1197d30_0, L_0x11b4c40, L_0x11b4820, L_0x11b4440; -LS_0x11b54d0_0_4 .concat8 [ 1 0 0 0], L_0x11b4040; -L_0x11b54d0 .concat8 [ 14 1 0 0], LS_0x11b54d0_0_0, LS_0x11b54d0_0_4; -LS_0x11b5d40_0_0 .concat8 [ 11 1 1 1], v0x1197d30_1, L_0x11b4f70, L_0x11b4ba0, L_0x11b4780; -LS_0x11b5d40_0_4 .concat8 [ 1 0 0 0], L_0x11b4350; -L_0x11b5d40 .concat8 [ 14 1 0 0], LS_0x11b5d40_0_0, LS_0x11b5d40_0_4; -L_0x11b5a30 .part L_0x11b3070, 14, 4; -L_0x11b6150 .part L_0x11b3070, 11, 3; -L_0x11b5f60 .part L_0x11b3070, 8, 3; -L_0x11b63a0 .part L_0x11b3070, 10, 4; -L_0x11b61f0 .part L_0x11b3070, 0, 11; - .scope S_0x1189e80; +P_0x1ad6260 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x1ad62a0 .param/str "memFile" 0 3 60, "regTest/up.dat"; +L_0x1af4030 .functor BUFZ 11, v0x1ad6560_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1af4280 .functor BUFZ 11, v0x1ad6560_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1af50c0 .functor BUFZ 18, L_0x1af7060, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1ad6560_0 .var/s "ACC", 10 0; +v0x1ad6660_0 .var/s "BAK", 10 0; +v0x1ad6740_0 .net "DST", 2 0, L_0x1af81a0; 1 drivers +v0x1ad6800_0 .net/s "IMM", 10 0, L_0x1af8240; 1 drivers +v0x1ad68e0_0 .net "INST", 3 0, L_0x1af7a80; 1 drivers +v0x1ad6a10_0 .net "LABEL", 3 0, L_0x1af83f0; 1 drivers +v0x1ad6af0_0 .var "PC", 3 0; +v0x1ad6bd0_0 .var "PCNEXT", 3 0; +v0x1ad6cb0_0 .net "SRC", 2 0, L_0x1af7fb0; 1 drivers +v0x1ad6e20_0 .net *"_s103", 0 0, L_0x1af63a0; 1 drivers +v0x1ad6f00_0 .net *"_s107", 0 0, L_0x1af62b0; 1 drivers +v0x1ad6fe0_0 .net *"_s111", 0 0, L_0x1af6590; 1 drivers +v0x1ad70c0_0 .net *"_s115", 0 0, L_0x1af6490; 1 drivers +v0x1ad71a0_0 .net *"_s119", 0 0, L_0x1af67d0; 1 drivers +v0x1ad7280_0 .net *"_s123", 0 0, L_0x1af66c0; 1 drivers +v0x1ad7360_0 .net *"_s127", 0 0, L_0x1af6990; 1 drivers +v0x1ad7440_0 .net *"_s131", 0 0, L_0x1af6870; 1 drivers +v0x1ad75f0_0 .net *"_s135", 0 0, L_0x1af6bf0; 1 drivers +v0x1ad7690_0 .net *"_s139", 0 0, L_0x1af6ac0; 1 drivers +v0x1ad7770_0 .net *"_s143", 0 0, L_0x1af6dd0; 1 drivers +v0x1ad7850_0 .net *"_s147", 0 0, L_0x1af6c90; 1 drivers +v0x1ad7930_0 .net *"_s151", 0 0, L_0x1af6fc0; 1 drivers +v0x1ad7a10_0 .net *"_s155", 0 0, L_0x1af6e70; 1 drivers +v0x1ad7af0_0 .net *"_s159", 0 0, L_0x1af6f10; 1 drivers +v0x1ad7bd0_0 .net *"_s160", 17 0, L_0x1af7060; 1 drivers +v0x1ad7cb0_0 .net *"_s162", 5 0, L_0x1af73c0; 1 drivers +L_0x2acae8b88180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x1ad7d90_0 .net *"_s165", 1 0, L_0x2acae8b88180; 1 drivers +v0x1ad9d50_2 .array/port v0x1ad9d50, 2; +v0x1ad7e70_0 .net *"_s173", 10 0, v0x1ad9d50_2; 1 drivers +v0x1ad9d50_3 .array/port v0x1ad9d50, 3; +v0x1ad7f50_0 .net *"_s179", 10 0, v0x1ad9d50_3; 1 drivers +v0x1ad9d50_0 .array/port v0x1ad9d50, 0; +v0x1ad8030_0 .net *"_s185", 10 0, v0x1ad9d50_0; 1 drivers +v0x1ad9d50_1 .array/port v0x1ad9d50, 1; +v0x1ad8110_0 .net *"_s191", 10 0, v0x1ad9d50_1; 1 drivers +v0x1ad81f0_0 .net *"_s23", 0 0, L_0x1af4880; 1 drivers +v0x1ad82d0_0 .net *"_s27", 0 0, L_0x1af49a0; 1 drivers +v0x1ad7520_0 .net *"_s31", 0 0, L_0x1af4a90; 1 drivers +v0x1ad85a0_0 .net *"_s36", 0 0, L_0x1af4d60; 1 drivers +v0x1ad8680_0 .net *"_s42", 0 0, L_0x1af4f80; 1 drivers +v0x1ad8760_0 .net *"_s46", 0 0, L_0x1af5020; 1 drivers +v0x1ad8840_0 .net *"_s50", 0 0, L_0x1af5130; 1 drivers +v0x1ad8920_0 .net *"_s55", 0 0, L_0x1af5370; 1 drivers +v0x1ad8a00_0 .net *"_s61", 0 0, L_0x1af55e0; 1 drivers +v0x1ad8ae0_0 .net *"_s65", 0 0, L_0x1af5710; 1 drivers +v0x1ad8bc0_0 .net *"_s69", 0 0, L_0x1af58e0; 1 drivers +v0x1ad8ca0_0 .net *"_s74", 0 0, L_0x1af5840; 1 drivers +v0x1ad8d80_0 .net *"_s80", 0 0, L_0x1af5a80; 1 drivers +v0x1ad8e60_0 .net *"_s84", 0 0, L_0x1af5d30; 1 drivers +v0x1ad8f40_0 .net *"_s88", 0 0, L_0x1af5c70; 1 drivers +v0x1ad9020_0 .net *"_s93", 0 0, L_0x1af5dd0; 1 drivers +v0x1ad9100_0 .net *"_s99", 0 0, L_0x1af6090; 1 drivers +v0x1ad91e0_0 .net/s "accOut", 10 0, L_0x1af4030; alias, 1 drivers +v0x1ad92c0_0 .net "anyHasData", 0 0, L_0x1af4ee0; 1 drivers +v0x1ad9380_0 .net "anyReadAck", 0 0, L_0x1af5b80; 1 drivers +v0x1ad9440_0 .net "anyWantData", 0 0, L_0x1af5460; 1 drivers +v0x1ad9500_0 .net "anyWriteAck", 0 0, L_0x1af61c0; 1 drivers +v0x1ad95c0_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers +v0x1ad96f0_0 .net "down", 14 0, L_0x1aff5d0; alias, 1 drivers +v0x1ad97b0_0 .net "downOut", 14 0, L_0x1af77e0; alias, 1 drivers +v0x1ad9850_0 .net "instruction", 17 0, L_0x1af50c0; 1 drivers +v0x1ad9910 .array "instructions", 15 0, 17 0; +v0x1ad99d0_0 .var "last", 2 0; +o0x2acae8b5c3b8 .functor BUFZ 15, C4; HiZ drive +v0x1ad9ab0_0 .net "left", 14 0, o0x2acae8b5c3b8; 0 drivers +v0x1ad9b90_0 .net "leftOut", 14 0, L_0x1af7520; 1 drivers +v0x1ad9c70_0 .var "mode", 2 0; +v0x1ad9d50 .array/s "outVals", 2 5, 10 0; +v0x1ad9ec0_0 .var "phase", 2 0; +v0x1ad9fa0_0 .net "portsHaveData", 5 2, L_0x1af4b80; 1 drivers +v0x1ad8370_0 .net "portsWantData", 5 2, L_0x1af51d0; 1 drivers +v0x1ad8450_0 .net "readAckIn", 5 2, L_0x1af5980; 1 drivers +v0x1ada450_0 .var "readAckOut", 5 2; +v0x1ada4f0_0 .var "readTarget", 2 0; +v0x1ada590_0 .var/s "readValue", 10 0; +L_0x2acae8b88138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x1ada630 .array "regVals", 0 7; +v0x1ada630_0 .net/s v0x1ada630 0, 10 0, L_0x2acae8b88138; 1 drivers +v0x1ada630_1 .net/s v0x1ada630 1, 10 0, L_0x1af4280; 1 drivers +v0x1ada630_2 .net/s v0x1ada630 2, 10 0, L_0x1af45a0; 1 drivers +v0x1ada630_3 .net/s v0x1ada630 3, 10 0, L_0x1af4640; 1 drivers +v0x1ada630_4 .net/s v0x1ada630 4, 10 0, L_0x1af46e0; 1 drivers +v0x1ada630_5 .net/s v0x1ada630 5, 10 0, L_0x1af4780; 1 drivers +o0x2acae8b5c778 .functor BUFZ 11, C4; HiZ drive +v0x1ada630_6 .net/s v0x1ada630 6, 10 0, o0x2acae8b5c778; 0 drivers +o0x2acae8b5c7a8 .functor BUFZ 11, C4; HiZ drive +v0x1ada630_7 .net/s v0x1ada630 7, 10 0, o0x2acae8b5c7a8; 0 drivers +o0x2acae8b5c7d8 .functor BUFZ 15, C4; HiZ drive +v0x1ada840_0 .net "right", 14 0, o0x2acae8b5c7d8; 0 drivers +v0x1ada920_0 .net "rightOut", 14 0, L_0x1af7d90; 1 drivers +o0x2acae8b5c838 .functor BUFZ 15, C4; HiZ drive +v0x1adaa00_0 .net "up", 14 0, o0x2acae8b5c838; 0 drivers +v0x1adaae0_0 .net "upOut", 14 0, L_0x1af72d0; 1 drivers +v0x1adabc0_0 .var "weHaveData", 5 2; +v0x1adaca0_0 .var "weWantData", 5 2; +v0x1adad80_0 .net "writeAckIn", 5 2, L_0x1af5ea0; 1 drivers +v0x1adae60_0 .var "writeAckOut", 5 2; +v0x1adaf40_0 .var "writeTarget", 2 0; +v0x1adb020_0 .var/s "writeValue", 10 0; +L_0x1af45a0 .part o0x2acae8b5c3b8, 0, 11; +L_0x1af4640 .part o0x2acae8b5c7d8, 0, 11; +L_0x1af46e0 .part o0x2acae8b5c838, 0, 11; +L_0x1af4780 .part L_0x1aff5d0, 0, 11; +L_0x1af4880 .part o0x2acae8b5c3b8, 11, 1; +L_0x1af49a0 .part o0x2acae8b5c7d8, 11, 1; +L_0x1af4a90 .part o0x2acae8b5c838, 11, 1; +L_0x1af4b80 .concat8 [ 1 1 1 1], L_0x1af4880, L_0x1af49a0, L_0x1af4a90, L_0x1af4d60; +L_0x1af4d60 .part L_0x1aff5d0, 11, 1; +L_0x1af4ee0 .reduce/or L_0x1af4b80; +L_0x1af4f80 .part o0x2acae8b5c3b8, 12, 1; +L_0x1af5020 .part o0x2acae8b5c7d8, 12, 1; +L_0x1af5130 .part o0x2acae8b5c838, 12, 1; +L_0x1af51d0 .concat8 [ 1 1 1 1], L_0x1af4f80, L_0x1af5020, L_0x1af5130, L_0x1af5370; +L_0x1af5370 .part L_0x1aff5d0, 12, 1; +L_0x1af5460 .reduce/or L_0x1af51d0; +L_0x1af55e0 .part o0x2acae8b5c3b8, 13, 1; +L_0x1af5710 .part o0x2acae8b5c7d8, 13, 1; +L_0x1af58e0 .part o0x2acae8b5c838, 13, 1; +L_0x1af5980 .concat8 [ 1 1 1 1], L_0x1af55e0, L_0x1af5710, L_0x1af58e0, L_0x1af5840; +L_0x1af5840 .part L_0x1aff5d0, 13, 1; +L_0x1af5b80 .reduce/or L_0x1af5980; +L_0x1af5a80 .part o0x2acae8b5c3b8, 14, 1; +L_0x1af5d30 .part o0x2acae8b5c7d8, 14, 1; +L_0x1af5c70 .part o0x2acae8b5c838, 14, 1; +L_0x1af5ea0 .concat8 [ 1 1 1 1], L_0x1af5a80, L_0x1af5d30, L_0x1af5c70, L_0x1af5dd0; +L_0x1af5dd0 .part L_0x1aff5d0, 14, 1; +L_0x1af61c0 .reduce/or L_0x1af5ea0; +L_0x1af6090 .part v0x1ada450_0, 0, 1; +L_0x1af63a0 .part v0x1ada450_0, 1, 1; +L_0x1af62b0 .part v0x1ada450_0, 2, 1; +L_0x1af6590 .part v0x1ada450_0, 3, 1; +L_0x1af6490 .part v0x1adae60_0, 0, 1; +L_0x1af67d0 .part v0x1adae60_0, 1, 1; +L_0x1af66c0 .part v0x1adae60_0, 2, 1; +L_0x1af6990 .part v0x1adae60_0, 3, 1; +L_0x1af6870 .part v0x1adaca0_0, 0, 1; +L_0x1af6bf0 .part v0x1adaca0_0, 1, 1; +L_0x1af6ac0 .part v0x1adaca0_0, 2, 1; +L_0x1af6dd0 .part v0x1adaca0_0, 3, 1; +L_0x1af6c90 .part v0x1adabc0_0, 0, 1; +L_0x1af6fc0 .part v0x1adabc0_0, 1, 1; +L_0x1af6e70 .part v0x1adabc0_0, 2, 1; +L_0x1af6f10 .part v0x1adabc0_0, 3, 1; +L_0x1af7060 .array/port v0x1ad9910, L_0x1af73c0; +L_0x1af73c0 .concat [ 4 2 0 0], v0x1ad6af0_0, L_0x2acae8b88180; +LS_0x1af72d0_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_2, L_0x1af6e70, L_0x1af6ac0, L_0x1af66c0; +LS_0x1af72d0_0_4 .concat8 [ 1 0 0 0], L_0x1af62b0; +L_0x1af72d0 .concat8 [ 14 1 0 0], LS_0x1af72d0_0_0, LS_0x1af72d0_0_4; +LS_0x1af77e0_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_3, L_0x1af6f10, L_0x1af6dd0, L_0x1af6990; +LS_0x1af77e0_0_4 .concat8 [ 1 0 0 0], L_0x1af6590; +L_0x1af77e0 .concat8 [ 14 1 0 0], LS_0x1af77e0_0_0, LS_0x1af77e0_0_4; +LS_0x1af7520_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_0, L_0x1af6c90, L_0x1af6870, L_0x1af6490; +LS_0x1af7520_0_4 .concat8 [ 1 0 0 0], L_0x1af6090; +L_0x1af7520 .concat8 [ 14 1 0 0], LS_0x1af7520_0_0, LS_0x1af7520_0_4; +LS_0x1af7d90_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_1, L_0x1af6fc0, L_0x1af6bf0, L_0x1af67d0; +LS_0x1af7d90_0_4 .concat8 [ 1 0 0 0], L_0x1af63a0; +L_0x1af7d90 .concat8 [ 14 1 0 0], LS_0x1af7d90_0_0, LS_0x1af7d90_0_4; +L_0x1af7a80 .part L_0x1af50c0, 14, 4; +L_0x1af81a0 .part L_0x1af50c0, 11, 3; +L_0x1af7fb0 .part L_0x1af50c0, 8, 3; +L_0x1af83f0 .part L_0x1af50c0, 10, 4; +L_0x1af8240 .part L_0x1af50c0, 0, 11; + .scope S_0x1acbc50; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x118d930_0, 0, 3; + %store/vec4 v0x1acf7e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x118db50_0, 0, 3; + %store/vec4 v0x1acfa00_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x118d690_0, 0, 3; + %store/vec4 v0x1acf540_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x118a300_0, 0, 11; + %store/vec4 v0x1acc0f0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x118a400_0, 0, 11; + %store/vec4 v0x1acc1b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118a890_0, 0, 4; + %store/vec4 v0x1acc670_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118e0e0_0, 0, 4; + %store/vec4 v0x1acff90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118e9d0_0, 0, 4; + %store/vec4 v0x1ad0860_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118eb90_0, 0, 4; + %store/vec4 v0x1ad0a20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118e8f0_0, 0, 4; + %store/vec4 v0x1ad0780_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x118da10, 4, 0; + %store/vec4a v0x1acf8c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x118da10, 4, 0; + %store/vec4a v0x1acf8c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x118da10, 4, 0; + %store/vec4a v0x1acf8c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x118da10, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x118a080, v0x118d5d0 {0 0 0}; + %store/vec4a v0x1acf8c0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1acbe90, v0x1acf480 {0 0 0}; %end; .thread T_0; - .scope S_0x1189e80; + .scope S_0x1acbc50; T_1 ; - %wait E_0x10fe030; - %load/vec4 v0x118d930_0; + %wait E_0x1a3fcc0; + %load/vec4 v0x1acf7e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -977,7 +982,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x118db50_0; + %load/vec4 v0x1acfa00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -992,185 +997,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x118a680_0; + %load/vec4 v0x1acc460_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x118dc30_0; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acfae0_0; + %load/vec4 v0x1acc830_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; - %load/vec4 v0x118aa50_0; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4/off/d v0x1acff90_0, 4, 5; + %load/vec4 v0x1acc830_0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x118d930_0, 0; - %load/vec4 v0x118aa50_0; - %assign/vec4 v0x118e1c0_0, 0; + %assign/vec4 v0x1acf7e0_0, 0; + %load/vec4 v0x1acc830_0; + %assign/vec4 v0x1ad0050_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; - %load/vec4 v0x118aa50_0; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %load/vec4 v0x1acc830_0; + %assign/vec4 v0x1acf540_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x118dc30_0; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acfae0_0; + %load/vec4 v0x1acf540_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x118d930_0, 0; - %load/vec4 v0x118d690_0; - %assign/vec4 v0x118e1c0_0, 0; + %assign/vec4 v0x1acf7e0_0, 0; + %load/vec4 v0x1acf540_0; + %assign/vec4 v0x1ad0050_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x118aa50_0; + %load/vec4 v0x1acc830_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x118cf40_0; + %load/vec4 v0x1acee40_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1178,29 +1183,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x118d930_0, 0; - %load/vec4 v0x118aa50_0; - %assign/vec4 v0x118e1c0_0, 0; + %assign/vec4 v0x1acf7e0_0, 0; + %load/vec4 v0x1acc830_0; + %assign/vec4 v0x1ad0050_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1208,10 +1213,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x118a680_0; + %load/vec4 v0x1acc460_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1278,180 +1283,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x118a300_0; - %load/vec4 v0x118e2a0_0; + %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x1ad0130_0; %add; - %assign/vec4 v0x118a300_0, 0; - %load/vec4 v0x118a890_0; + %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x118a300_0; - %load/vec4 v0x118e2a0_0; + %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x1ad0130_0; %sub; - %assign/vec4 v0x118a300_0, 0; - %load/vec4 v0x118a890_0; + %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc670_0; %pad/u 11; - %load/vec4 v0x118e2a0_0; + %load/vec4 v0x1ad0130_0; %add; %pad/u 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x118e2a0_0; - %assign/vec4 v0x118ed50_0, 0; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1ad0130_0; + %assign/vec4 v0x1ad0be0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x118a5a0_0; - %assign/vec4 v0x118ed50_0, 0; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc380_0; + %assign/vec4 v0x1ad0be0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x118a300_0; - %load/vec4 v0x118a5a0_0; + %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x1acc380_0; %add; - %assign/vec4 v0x118a300_0, 0; - %load/vec4 v0x118a890_0; + %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x118a300_0; - %load/vec4 v0x118a5a0_0; + %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x1acc380_0; %sub; - %assign/vec4 v0x118a300_0, 0; - %load/vec4 v0x118a890_0; + %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc670_0; %pad/u 11; - %load/vec4 v0x118a5a0_0; + %load/vec4 v0x1acc380_0; %add; %pad/u 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x118a400_0; - %assign/vec4 v0x118a300_0, 0; - %load/vec4 v0x118a300_0; - %assign/vec4 v0x118a400_0, 0; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc1b0_0; + %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x1acc0f0_0; + %assign/vec4 v0x1acc1b0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x118a300_0; - %assign/vec4 v0x118a400_0, 0; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc0f0_0; + %assign/vec4 v0x1acc1b0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x118a300_0; + %load/vec4 v0x1acc0f0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x118a300_0, 0; - %load/vec4 v0x118a890_0; + %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x118a7b0_0; - %assign/vec4 v0x118a970_0, 0; + %load/vec4 v0x1acc590_0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x118a300_0; + %load/vec4 v0x1acc0f0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x118a7b0_0; - %assign/vec4 v0x118a970_0, 0; + %load/vec4 v0x1acc590_0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x118a300_0; + %load/vec4 v0x1acc0f0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x118a7b0_0; - %assign/vec4 v0x118a970_0, 0; + %load/vec4 v0x1acc590_0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x118a300_0; + %load/vec4 v0x1acc0f0_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x118a7b0_0; - %assign/vec4 v0x118a970_0, 0; + %load/vec4 v0x1acc590_0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x118a300_0; + %load/vec4 v0x1acc0f0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x118a7b0_0; - %assign/vec4 v0x118a970_0, 0; + %load/vec4 v0x1acc590_0; + %assign/vec4 v0x1acc750_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x118a890_0; + %load/vec4 v0x1acc670_0; %addi 1, 0, 4; - %assign/vec4 v0x118a970_0, 0; + %assign/vec4 v0x1acc750_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x118a680_0; + %load/vec4 v0x1acc460_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x118a680_0; + %load/vec4 v0x1acc460_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x118a4e0_0; + %load/vec4 v0x1acc290_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x118a4e0_0; + %load/vec4 v0x1acc290_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1459,162 +1464,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x118a4e0_0; + %load/vec4 v0x1acc290_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x118ed50_0; - %assign/vec4 v0x118a300_0, 0; + %load/vec4 v0x1ad0be0_0; + %assign/vec4 v0x1acc0f0_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118d930_0, 0; - %load/vec4 v0x118a4e0_0; + %assign/vec4 v0x1acf7e0_0, 0; + %load/vec4 v0x1acc290_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x118d690_0; - %assign/vec4 v0x118ec70_0, 0; - %load/vec4 v0x118ed50_0; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; + %assign/vec4 v0x1ad0b00_0, 0; + %load/vec4 v0x1ad0be0_0; + %load/vec4 v0x1acf540_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118d690_0; + %load/vec4 v0x1acf540_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x118a4e0_0; + %load/vec4 v0x1acc290_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x118a4e0_0; - %assign/vec4 v0x118ec70_0, 0; - %load/vec4 v0x118ed50_0; - %load/vec4 v0x118a4e0_0; + %load/vec4 v0x1acc290_0; + %assign/vec4 v0x1ad0b00_0, 0; + %load/vec4 v0x1ad0be0_0; + %load/vec4 v0x1acc290_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118a4e0_0; + %load/vec4 v0x1acc290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118a4e0_0; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1acc290_0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x118d0c0_0; + %load/vec4 v0x1acefc0_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x118a4e0_0; - %assign/vec4 v0x118ec70_0, 0; + %load/vec4 v0x1acc290_0; + %assign/vec4 v0x1ad0b00_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x118db50_0; + %load/vec4 v0x1acfa00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1629,82 +1634,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x118e1c0_0; + %load/vec4 v0x1ad0050_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x118cf40_0; + %load/vec4 v0x1acee40_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x118d930_0, 0; + %assign/vec4 v0x1acf7e0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118e9d0_0, 0, 4; - %load/vec4 v0x118dc30_0; + %store/vec4 v0x1ad0860_0, 0, 4; + %load/vec4 v0x1acfae0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x118dc30_0; + %load/vec4 v0x1acfae0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1712,54 +1717,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x118dc30_0; - %load/vec4 v0x118e1c0_0; + %load/vec4 v0x1acfae0_0; + %load/vec4 v0x1ad0050_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x118d930_0, 0; - %load/vec4 v0x118e1c0_0; + %assign/vec4 v0x1acf7e0_0, 0; + %load/vec4 v0x1ad0050_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x118e380, 4; - %assign/vec4 v0x118e2a0_0, 0; + %load/vec4a v0x1ad0210, 4; + %assign/vec4 v0x1ad0130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118e1c0_0; + %load/vec4 v0x1ad0050_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e0e0_0, 4, 5; + %assign/vec4/off/d v0x1acff90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118e1c0_0; + %load/vec4 v0x1ad0050_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x118e9d0_0, 4, 5; - %load/vec4 v0x118e1c0_0; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %load/vec4 v0x1ad0050_0; + %assign/vec4 v0x1acf540_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x118db50_0; + %load/vec4 v0x1acfa00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1775,93 +1780,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x118ec70_0; + %load/vec4 v0x1ad0b00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x118d0c0_0; + %load/vec4 v0x1acefc0_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x118c030_0; + %load/vec4 v0x1acdf10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x118ec70_0, 0; + %assign/vec4 v0x1ad0b00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x118e8f0_0, 4, 5; - %load/vec4 v0x118ed50_0; + %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %load/vec4 v0x1ad0be0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x118da10, 0, 4; + %assign/vec4/a/d v0x1acf8c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf540_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1869,33 +1874,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x118ec70_0; + %load/vec4 v0x1ad0b00_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x118eab0_0; - %load/vec4 v0x118ec70_0; + %load/vec4 v0x1ad0940_0; + %load/vec4 v0x1ad0b00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x118ec70_0; + %load/vec4 v0x1ad0b00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x118e8f0_0, 4, 1; + %store/vec4 v0x1ad0780_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x118d930_0, 0; - %load/vec4 v0x118ec70_0; - %assign/vec4 v0x118d690_0, 0; + %assign/vec4 v0x1acf7e0_0, 0; + %load/vec4 v0x1ad0b00_0; + %assign/vec4 v0x1acf540_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x118db50_0, 0; + %assign/vec4 v0x1acfa00_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1904,19 +1909,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x1189e80; + .scope S_0x1acbc50; T_2 ; - %wait E_0x10db880; - %load/vec4 v0x118db50_0; + %wait E_0x1a1d520; + %load/vec4 v0x1acfa00_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x118d930_0; + %load/vec4 v0x1acf7e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x118a970_0; + %load/vec4 v0x1acc750_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1925,62 +1930,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x118a970_0; - %assign/vec4 v0x118a890_0, 0; + %load/vec4 v0x1acc750_0; + %assign/vec4 v0x1acc670_0, 0; T_2.0 ; - %load/vec4 v0x118db50_0; + %load/vec4 v0x1acfa00_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118e0e0_0, 0, 4; + %store/vec4 v0x1acff90_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x118efd0; + .scope S_0x1ad0e60; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1192ae0_0, 0, 3; + %store/vec4 v0x1ad4a30_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1192d10_0, 0, 3; + %store/vec4 v0x1ad4c60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x11928a0_0, 0, 3; + %store/vec4 v0x1ad47f0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x118f490_0, 0, 11; + %store/vec4 v0x1ad13e0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x118f590_0, 0, 11; + %store/vec4 v0x1ad14e0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x118f9d0_0, 0, 4; + %store/vec4 v0x1ad1920_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x11932a0_0, 0, 4; + %store/vec4 v0x1ad51f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1193af0_0, 0, 4; + %store/vec4 v0x1ad5a40_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1193cb0_0, 0, 4; + %store/vec4 v0x1ad5c00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1193a10_0, 0, 4; + %store/vec4 v0x1ad5960_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1192ba0, 4, 0; + %store/vec4a v0x1ad4af0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1192ba0, 4, 0; + %store/vec4a v0x1ad4af0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1192ba0, 4, 0; + %store/vec4a v0x1ad4af0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1192ba0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x118f1a0, v0x11927e0 {0 0 0}; + %store/vec4a v0x1ad4af0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1ad1070, v0x1ad4730 {0 0 0}; %end; .thread T_3; - .scope S_0x118efd0; + .scope S_0x1ad0e60; T_4 ; - %wait E_0x10fe030; - %load/vec4 v0x1192ae0_0; + %wait E_0x1a3fcc0; + %load/vec4 v0x1ad4a30_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1995,7 +2000,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x1192d10_0; + %load/vec4 v0x1ad4c60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2010,185 +2015,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x118f810_0; + %load/vec4 v0x1ad1760_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x1192df0_0; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x11932a0_0, 4, 5; - %load/vec4 v0x118fb90_0; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %load/vec4 v0x1ad1ae0_0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; - %load/vec4 v0x118fb90_0; - %assign/vec4 v0x1193340_0, 0; + %assign/vec4 v0x1ad4a30_0, 0; + %load/vec4 v0x1ad1ae0_0; + %assign/vec4 v0x1ad5290_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1193af0_0, 4, 5; - %load/vec4 v0x118fb90_0; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %load/vec4 v0x1ad1ae0_0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x1192df0_0; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x1ad47f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; - %load/vec4 v0x11928a0_0; - %assign/vec4 v0x1193340_0, 0; + %assign/vec4 v0x1ad4a30_0, 0; + %load/vec4 v0x1ad47f0_0; + %assign/vec4 v0x1ad5290_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1193af0_0, 4, 5; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x118fb90_0; + %load/vec4 v0x1ad1ae0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x11921a0_0; + %load/vec4 v0x1ad40f0_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2196,29 +2201,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; - %load/vec4 v0x118fb90_0; - %assign/vec4 v0x1193340_0, 0; + %assign/vec4 v0x1ad4a30_0, 0; + %load/vec4 v0x1ad1ae0_0; + %assign/vec4 v0x1ad5290_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193af0_0, 4, 5; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193af0_0, 4, 5; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193af0_0, 4, 5; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193af0_0, 4, 5; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2226,10 +2231,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x118f810_0; + %load/vec4 v0x1ad1760_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2296,180 +2301,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x118f490_0; - %load/vec4 v0x11933e0_0; + %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x1ad5330_0; %add; - %assign/vec4 v0x118f490_0, 0; - %load/vec4 v0x118f9d0_0; + %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x118f490_0; - %load/vec4 v0x11933e0_0; + %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x1ad5330_0; %sub; - %assign/vec4 v0x118f490_0, 0; - %load/vec4 v0x118f9d0_0; + %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1920_0; %pad/u 11; - %load/vec4 v0x11933e0_0; + %load/vec4 v0x1ad5330_0; %add; %pad/u 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x11933e0_0; - %assign/vec4 v0x1193e70_0, 0; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad5330_0; + %assign/vec4 v0x1ad5dc0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x118f730_0; - %assign/vec4 v0x1193e70_0, 0; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1680_0; + %assign/vec4 v0x1ad5dc0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x118f490_0; - %load/vec4 v0x118f730_0; + %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x1ad1680_0; %add; - %assign/vec4 v0x118f490_0, 0; - %load/vec4 v0x118f9d0_0; + %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x118f490_0; - %load/vec4 v0x118f730_0; + %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x1ad1680_0; %sub; - %assign/vec4 v0x118f490_0, 0; - %load/vec4 v0x118f9d0_0; + %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1920_0; %pad/u 11; - %load/vec4 v0x118f730_0; + %load/vec4 v0x1ad1680_0; %add; %pad/u 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x118f590_0; - %assign/vec4 v0x118f490_0, 0; - %load/vec4 v0x118f490_0; - %assign/vec4 v0x118f590_0, 0; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad14e0_0; + %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x1ad13e0_0; + %assign/vec4 v0x1ad14e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x118f490_0; - %assign/vec4 v0x118f590_0, 0; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad13e0_0; + %assign/vec4 v0x1ad14e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x118f490_0; + %load/vec4 v0x1ad13e0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x118f490_0, 0; - %load/vec4 v0x118f9d0_0; + %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x118f8f0_0; - %assign/vec4 v0x118fab0_0, 0; + %load/vec4 v0x1ad1840_0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x118f490_0; + %load/vec4 v0x1ad13e0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x118f8f0_0; - %assign/vec4 v0x118fab0_0, 0; + %load/vec4 v0x1ad1840_0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x118f490_0; + %load/vec4 v0x1ad13e0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x118f8f0_0; - %assign/vec4 v0x118fab0_0, 0; + %load/vec4 v0x1ad1840_0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x118f490_0; + %load/vec4 v0x1ad13e0_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x118f8f0_0; - %assign/vec4 v0x118fab0_0, 0; + %load/vec4 v0x1ad1840_0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x118f490_0; + %load/vec4 v0x1ad13e0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x118f8f0_0; - %assign/vec4 v0x118fab0_0, 0; + %load/vec4 v0x1ad1840_0; + %assign/vec4 v0x1ad1a00_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x118f9d0_0; + %load/vec4 v0x1ad1920_0; %addi 1, 0, 4; - %assign/vec4 v0x118fab0_0, 0; + %assign/vec4 v0x1ad1a00_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x118f810_0; + %load/vec4 v0x1ad1760_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x118f810_0; + %load/vec4 v0x1ad1760_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x118f670_0; + %load/vec4 v0x1ad15c0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x118f670_0; + %load/vec4 v0x1ad15c0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2477,162 +2482,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x118f670_0; + %load/vec4 v0x1ad15c0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x1193e70_0; - %assign/vec4 v0x118f490_0, 0; + %load/vec4 v0x1ad5dc0_0; + %assign/vec4 v0x1ad13e0_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; - %load/vec4 v0x118f670_0; + %assign/vec4 v0x1ad4a30_0, 0; + %load/vec4 v0x1ad15c0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x11928a0_0; - %assign/vec4 v0x1193d90_0, 0; - %load/vec4 v0x1193e70_0; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; + %assign/vec4 v0x1ad5ce0_0, 0; + %load/vec4 v0x1ad5dc0_0; + %load/vec4 v0x1ad47f0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11928a0_0; + %load/vec4 v0x1ad47f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1193a10_0, 4, 5; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x118f670_0; + %load/vec4 v0x1ad15c0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x118f670_0; - %assign/vec4 v0x1193d90_0, 0; - %load/vec4 v0x1193e70_0; - %load/vec4 v0x118f670_0; + %load/vec4 v0x1ad15c0_0; + %assign/vec4 v0x1ad5ce0_0, 0; + %load/vec4 v0x1ad5dc0_0; + %load/vec4 v0x1ad15c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x118f670_0; + %load/vec4 v0x1ad15c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x118f670_0; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad15c0_0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x1192320_0; + %load/vec4 v0x1ad4270_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x118f670_0; - %assign/vec4 v0x1193d90_0, 0; + %load/vec4 v0x1ad15c0_0; + %assign/vec4 v0x1ad5ce0_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x1192d10_0; + %load/vec4 v0x1ad4c60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2647,82 +2652,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x1193340_0; + %load/vec4 v0x1ad5290_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x11921a0_0; + %load/vec4 v0x1ad40f0_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; + %assign/vec4 v0x1ad4a30_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1193af0_0, 0, 4; - %load/vec4 v0x1192df0_0; + %store/vec4 v0x1ad5a40_0, 0, 4; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x1192df0_0; + %load/vec4 v0x1ad4d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2730,54 +2735,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x1192df0_0; - %load/vec4 v0x1193340_0; + %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x1ad5290_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; - %load/vec4 v0x1193340_0; + %assign/vec4 v0x1ad4a30_0, 0; + %load/vec4 v0x1ad5290_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1193480, 4; - %assign/vec4 v0x11933e0_0, 0; + %load/vec4a v0x1ad53d0, 4; + %assign/vec4 v0x1ad5330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1193340_0; + %load/vec4 v0x1ad5290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x11932a0_0, 4, 5; + %assign/vec4/off/d v0x1ad51f0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1193340_0; + %load/vec4 v0x1ad5290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1193af0_0, 4, 5; - %load/vec4 v0x1193340_0; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %load/vec4 v0x1ad5290_0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x1192d10_0; + %load/vec4 v0x1ad4c60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2793,93 +2798,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x1193d90_0; + %load/vec4 v0x1ad5ce0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x1192320_0; + %load/vec4 v0x1ad4270_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x1191250_0; + %load/vec4 v0x1ad31a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1193d90_0, 0; + %assign/vec4 v0x1ad5ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1193a10_0, 4, 5; - %load/vec4 v0x1193e70_0; + %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %load/vec4 v0x1ad5dc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1192ba0, 0, 4; + %assign/vec4/a/d v0x1ad4af0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2887,33 +2892,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x1193d90_0; + %load/vec4 v0x1ad5ce0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x1193bd0_0; - %load/vec4 v0x1193d90_0; + %load/vec4 v0x1ad5b20_0; + %load/vec4 v0x1ad5ce0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1193d90_0; + %load/vec4 v0x1ad5ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1193a10_0, 4, 1; + %store/vec4 v0x1ad5960_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1192ae0_0, 0; - %load/vec4 v0x1193d90_0; - %assign/vec4 v0x11928a0_0, 0; + %assign/vec4 v0x1ad4a30_0, 0; + %load/vec4 v0x1ad5ce0_0; + %assign/vec4 v0x1ad47f0_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1192d10_0, 0; + %assign/vec4 v0x1ad4c60_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2922,19 +2927,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x118efd0; + .scope S_0x1ad0e60; T_5 ; - %wait E_0x10db880; - %load/vec4 v0x1192d10_0; + %wait E_0x1a1d520; + %load/vec4 v0x1ad4c60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1192ae0_0; + %load/vec4 v0x1ad4a30_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x118fab0_0; + %load/vec4 v0x1ad1a00_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2943,62 +2948,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x118fab0_0; - %assign/vec4 v0x118f9d0_0, 0; + %load/vec4 v0x1ad1a00_0; + %assign/vec4 v0x1ad1920_0, 0; T_5.0 ; - %load/vec4 v0x1192d10_0; + %load/vec4 v0x1ad4c60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x11932a0_0, 0, 4; + %store/vec4 v0x1ad51f0_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x11940f0; + .scope S_0x1ad6040; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1197c50_0, 0, 3; + %store/vec4 v0x1ad9c70_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1197ea0_0, 0, 3; + %store/vec4 v0x1ad9ec0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x11979b0_0, 0, 3; + %store/vec4 v0x1ad99d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1194540_0, 0, 11; + %store/vec4 v0x1ad6560_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1194640_0, 0, 11; + %store/vec4 v0x1ad6660_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1194ad0_0, 0, 4; + %store/vec4 v0x1ad6af0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1198430_0, 0, 4; + %store/vec4 v0x1ada450_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1198c80_0, 0, 4; + %store/vec4 v0x1adaca0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1198e40_0, 0, 4; + %store/vec4 v0x1adae60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1198ba0_0, 0, 4; + %store/vec4 v0x1adabc0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1197d30, 4, 0; + %store/vec4a v0x1ad9d50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1197d30, 4, 0; + %store/vec4a v0x1ad9d50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1197d30, 4, 0; + %store/vec4a v0x1ad9d50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1197d30, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x1194310, v0x11978f0 {0 0 0}; + %store/vec4a v0x1ad9d50, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1ad62a0, v0x1ad9910 {0 0 0}; %end; .thread T_6; - .scope S_0x11940f0; + .scope S_0x1ad6040; T_7 ; - %wait E_0x10fe030; - %load/vec4 v0x1197c50_0; + %wait E_0x1a3fcc0; + %load/vec4 v0x1ad9c70_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3013,7 +3018,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x1197ea0_0; + %load/vec4 v0x1ad9ec0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3028,185 +3033,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x11948c0_0; + %load/vec4 v0x1ad68e0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x1197f80_0; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198430_0, 4, 5; - %load/vec4 v0x1194c90_0; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4/off/d v0x1ada450_0, 4, 5; + %load/vec4 v0x1ad6cb0_0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1197c50_0, 0; - %load/vec4 v0x1194c90_0; - %assign/vec4 v0x11984d0_0, 0; + %assign/vec4 v0x1ad9c70_0, 0; + %load/vec4 v0x1ad6cb0_0; + %assign/vec4 v0x1ada4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198c80_0, 4, 5; - %load/vec4 v0x1194c90_0; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %load/vec4 v0x1ad6cb0_0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x1197f80_0; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x1ad99d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1197c50_0, 0; - %load/vec4 v0x11979b0_0; - %assign/vec4 v0x11984d0_0, 0; + %assign/vec4 v0x1ad9c70_0, 0; + %load/vec4 v0x1ad99d0_0; + %assign/vec4 v0x1ada4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198c80_0, 4, 5; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x1194c90_0; + %load/vec4 v0x1ad6cb0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x11972a0_0; + %load/vec4 v0x1ad92c0_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3214,29 +3219,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1197c50_0, 0; - %load/vec4 v0x1194c90_0; - %assign/vec4 v0x11984d0_0, 0; + %assign/vec4 v0x1ad9c70_0, 0; + %load/vec4 v0x1ad6cb0_0; + %assign/vec4 v0x1ada4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198c80_0, 4, 5; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198c80_0, 4, 5; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198c80_0, 4, 5; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198c80_0, 4, 5; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3244,10 +3249,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x11948c0_0; + %load/vec4 v0x1ad68e0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3314,180 +3319,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x1194540_0; - %load/vec4 v0x1198570_0; + %load/vec4 v0x1ad6560_0; + %load/vec4 v0x1ada590_0; %add; - %assign/vec4 v0x1194540_0, 0; - %load/vec4 v0x1194ad0_0; + %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x1194540_0; - %load/vec4 v0x1198570_0; + %load/vec4 v0x1ad6560_0; + %load/vec4 v0x1ada590_0; %sub; - %assign/vec4 v0x1194540_0, 0; - %load/vec4 v0x1194ad0_0; + %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6af0_0; %pad/u 11; - %load/vec4 v0x1198570_0; + %load/vec4 v0x1ada590_0; %add; %pad/u 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x1198570_0; - %assign/vec4 v0x1199000_0, 0; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ada590_0; + %assign/vec4 v0x1adb020_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x11947e0_0; - %assign/vec4 v0x1199000_0, 0; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6800_0; + %assign/vec4 v0x1adb020_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x1194540_0; - %load/vec4 v0x11947e0_0; + %load/vec4 v0x1ad6560_0; + %load/vec4 v0x1ad6800_0; %add; - %assign/vec4 v0x1194540_0, 0; - %load/vec4 v0x1194ad0_0; + %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x1194540_0; - %load/vec4 v0x11947e0_0; + %load/vec4 v0x1ad6560_0; + %load/vec4 v0x1ad6800_0; %sub; - %assign/vec4 v0x1194540_0, 0; - %load/vec4 v0x1194ad0_0; + %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6af0_0; %pad/u 11; - %load/vec4 v0x11947e0_0; + %load/vec4 v0x1ad6800_0; %add; %pad/u 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x1194640_0; - %assign/vec4 v0x1194540_0, 0; - %load/vec4 v0x1194540_0; - %assign/vec4 v0x1194640_0, 0; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6660_0; + %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x1ad6560_0; + %assign/vec4 v0x1ad6660_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x1194540_0; - %assign/vec4 v0x1194640_0, 0; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6560_0; + %assign/vec4 v0x1ad6660_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x1194540_0; + %load/vec4 v0x1ad6560_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1194540_0, 0; - %load/vec4 v0x1194ad0_0; + %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x11949f0_0; - %assign/vec4 v0x1194bb0_0, 0; + %load/vec4 v0x1ad6a10_0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x1194540_0; + %load/vec4 v0x1ad6560_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x11949f0_0; - %assign/vec4 v0x1194bb0_0, 0; + %load/vec4 v0x1ad6a10_0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x1194540_0; + %load/vec4 v0x1ad6560_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x11949f0_0; - %assign/vec4 v0x1194bb0_0, 0; + %load/vec4 v0x1ad6a10_0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1194540_0; + %load/vec4 v0x1ad6560_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x11949f0_0; - %assign/vec4 v0x1194bb0_0, 0; + %load/vec4 v0x1ad6a10_0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x1194540_0; + %load/vec4 v0x1ad6560_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x11949f0_0; - %assign/vec4 v0x1194bb0_0, 0; + %load/vec4 v0x1ad6a10_0; + %assign/vec4 v0x1ad6bd0_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x1194ad0_0; + %load/vec4 v0x1ad6af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1194bb0_0, 0; + %assign/vec4 v0x1ad6bd0_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x11948c0_0; + %load/vec4 v0x1ad68e0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x11948c0_0; + %load/vec4 v0x1ad68e0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x1194720_0; + %load/vec4 v0x1ad6740_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1194720_0; + %load/vec4 v0x1ad6740_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3495,162 +3500,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x1194720_0; + %load/vec4 v0x1ad6740_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x1199000_0; - %assign/vec4 v0x1194540_0, 0; + %load/vec4 v0x1adb020_0; + %assign/vec4 v0x1ad6560_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1197c50_0, 0; - %load/vec4 v0x1194720_0; + %assign/vec4 v0x1ad9c70_0, 0; + %load/vec4 v0x1ad6740_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x11979b0_0; - %assign/vec4 v0x1198f20_0, 0; - %load/vec4 v0x1199000_0; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; + %assign/vec4 v0x1adaf40_0, 0; + %load/vec4 v0x1adb020_0; + %load/vec4 v0x1ad99d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11979b0_0; + %load/vec4 v0x1ad99d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x1194720_0; + %load/vec4 v0x1ad6740_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x1194720_0; - %assign/vec4 v0x1198f20_0, 0; - %load/vec4 v0x1199000_0; - %load/vec4 v0x1194720_0; + %load/vec4 v0x1ad6740_0; + %assign/vec4 v0x1adaf40_0, 0; + %load/vec4 v0x1adb020_0; + %load/vec4 v0x1ad6740_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1194720_0; + %load/vec4 v0x1ad6740_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1194720_0; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1ad6740_0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x1197420_0; + %load/vec4 v0x1ad9440_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x1194720_0; - %assign/vec4 v0x1198f20_0, 0; + %load/vec4 v0x1ad6740_0; + %assign/vec4 v0x1adaf40_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x1197ea0_0; + %load/vec4 v0x1ad9ec0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3665,82 +3670,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x11984d0_0; + %load/vec4 v0x1ada4f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x11972a0_0; + %load/vec4 v0x1ad92c0_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1197c50_0, 0; + %assign/vec4 v0x1ad9c70_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1198c80_0, 0, 4; - %load/vec4 v0x1197f80_0; + %store/vec4 v0x1adaca0_0, 0, 4; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x1197f80_0; + %load/vec4 v0x1ad9fa0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3748,54 +3753,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x1197f80_0; - %load/vec4 v0x11984d0_0; + %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x1ada4f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1197c50_0, 0; - %load/vec4 v0x11984d0_0; + %assign/vec4 v0x1ad9c70_0, 0; + %load/vec4 v0x1ada4f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1198610, 4; - %assign/vec4 v0x1198570_0, 0; + %load/vec4a v0x1ada630, 4; + %assign/vec4 v0x1ada590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11984d0_0; + %load/vec4 v0x1ada4f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198430_0, 4, 5; + %assign/vec4/off/d v0x1ada450_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11984d0_0; + %load/vec4 v0x1ada4f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1198c80_0, 4, 5; - %load/vec4 v0x11984d0_0; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %load/vec4 v0x1ada4f0_0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x1197ea0_0; + %load/vec4 v0x1ad9ec0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3811,93 +3816,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x1198f20_0; + %load/vec4 v0x1adaf40_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x1197420_0; + %load/vec4 v0x1ad9440_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x1196350_0; + %load/vec4 v0x1ad8370_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1198f20_0, 0; + %assign/vec4 v0x1adaf40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1198ba0_0, 4, 5; - %load/vec4 v0x1199000_0; + %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %load/vec4 v0x1adb020_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1197d30, 0, 4; + %assign/vec4/a/d v0x1ad9d50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3905,33 +3910,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x1198f20_0; + %load/vec4 v0x1adaf40_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x1198d60_0; - %load/vec4 v0x1198f20_0; + %load/vec4 v0x1adad80_0; + %load/vec4 v0x1adaf40_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1198f20_0; + %load/vec4 v0x1adaf40_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1198ba0_0, 4, 1; + %store/vec4 v0x1adabc0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1197c50_0, 0; - %load/vec4 v0x1198f20_0; - %assign/vec4 v0x11979b0_0, 0; + %assign/vec4 v0x1ad9c70_0, 0; + %load/vec4 v0x1adaf40_0; + %assign/vec4 v0x1ad99d0_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1197ea0_0, 0; + %assign/vec4 v0x1ad9ec0_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3940,19 +3945,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x11940f0; + .scope S_0x1ad6040; T_8 ; - %wait E_0x10db880; - %load/vec4 v0x1197ea0_0; + %wait E_0x1a1d520; + %load/vec4 v0x1ad9ec0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1197c50_0; + %load/vec4 v0x1ad9c70_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1194bb0_0; + %load/vec4 v0x1ad6bd0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3961,62 +3966,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x1194bb0_0; - %assign/vec4 v0x1194ad0_0, 0; + %load/vec4 v0x1ad6bd0_0; + %assign/vec4 v0x1ad6af0_0, 0; T_8.0 ; - %load/vec4 v0x1197ea0_0; + %load/vec4 v0x1ad9ec0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1198430_0, 0, 4; + %store/vec4 v0x1ada450_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x1184d50; + .scope S_0x1ac6a60; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x11888a0_0, 0, 3; + %store/vec4 v0x1aca670_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1188ac0_0, 0, 3; + %store/vec4 v0x1aca890_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1188600_0, 0, 3; + %store/vec4 v0x1aca3d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x11851c0_0, 0, 11; + %store/vec4 v0x1ac6f90_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x11852c0_0, 0, 11; + %store/vec4 v0x1ac7090_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1185750_0, 0, 4; + %store/vec4 v0x1ac7520_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1189050_0, 0, 4; + %store/vec4 v0x1acae20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1189880_0, 0, 4; + %store/vec4 v0x1acb650_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1189a40_0, 0, 4; + %store/vec4 v0x1acb810_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x11897c0_0, 0, 4; + %store/vec4 v0x1acb590_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1188980, 4, 0; + %store/vec4a v0x1aca750, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1188980, 4, 0; + %store/vec4a v0x1aca750, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1188980, 4, 0; + %store/vec4a v0x1aca750, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1188980, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x1184f40, v0x1188540 {0 0 0}; + %store/vec4a v0x1aca750, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1ac6c90, v0x1aca310 {0 0 0}; %end; .thread T_9; - .scope S_0x1184d50; + .scope S_0x1ac6a60; T_10 ; - %wait E_0x10fe030; - %load/vec4 v0x11888a0_0; + %wait E_0x1a3fcc0; + %load/vec4 v0x1aca670_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4031,7 +4036,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x1188ac0_0; + %load/vec4 v0x1aca890_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4046,185 +4051,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x1185540_0; + %load/vec4 v0x1ac7310_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x1188ba0_0; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1aca970_0; + %load/vec4 v0x1ac76e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1189050_0, 4, 5; - %load/vec4 v0x1185910_0; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4/off/d v0x1acae20_0, 4, 5; + %load/vec4 v0x1ac76e0_0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11888a0_0, 0; - %load/vec4 v0x1185910_0; - %assign/vec4 v0x11890f0_0, 0; + %assign/vec4 v0x1aca670_0, 0; + %load/vec4 v0x1ac76e0_0; + %assign/vec4 v0x1acaec0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1189880_0, 4, 5; - %load/vec4 v0x1185910_0; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4/off/d v0x1acb650_0, 4, 5; + %load/vec4 v0x1ac76e0_0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x1188ba0_0; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca970_0; + %load/vec4 v0x1aca3d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11888a0_0, 0; - %load/vec4 v0x1188600_0; - %assign/vec4 v0x11890f0_0, 0; + %assign/vec4 v0x1aca670_0, 0; + %load/vec4 v0x1aca3d0_0; + %assign/vec4 v0x1acaec0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1189880_0, 4, 5; + %assign/vec4/off/d v0x1acb650_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x1185910_0; + %load/vec4 v0x1ac76e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x1187f20_0; + %load/vec4 v0x1ac9cf0_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4232,29 +4237,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11888a0_0, 0; - %load/vec4 v0x1185910_0; - %assign/vec4 v0x11890f0_0, 0; + %assign/vec4 v0x1aca670_0, 0; + %load/vec4 v0x1ac76e0_0; + %assign/vec4 v0x1acaec0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189880_0, 4, 5; + %assign/vec4/off/d v0x1acb650_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189880_0, 4, 5; + %assign/vec4/off/d v0x1acb650_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189880_0, 4, 5; + %assign/vec4/off/d v0x1acb650_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189880_0, 4, 5; + %assign/vec4/off/d v0x1acb650_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4262,10 +4267,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x1185540_0; + %load/vec4 v0x1ac7310_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4332,180 +4337,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x11851c0_0; - %load/vec4 v0x1189190_0; + %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x1acaf60_0; %add; - %assign/vec4 v0x11851c0_0, 0; - %load/vec4 v0x1185750_0; + %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x11851c0_0; - %load/vec4 v0x1189190_0; + %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x1acaf60_0; %sub; - %assign/vec4 v0x11851c0_0, 0; - %load/vec4 v0x1185750_0; + %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7520_0; %pad/u 11; - %load/vec4 v0x1189190_0; + %load/vec4 v0x1acaf60_0; %add; %pad/u 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x1189190_0; - %assign/vec4 v0x1189c00_0, 0; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1acaf60_0; + %assign/vec4 v0x1acb9d0_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x1185460_0; - %assign/vec4 v0x1189c00_0, 0; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7230_0; + %assign/vec4 v0x1acb9d0_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x11851c0_0; - %load/vec4 v0x1185460_0; + %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x1ac7230_0; %add; - %assign/vec4 v0x11851c0_0, 0; - %load/vec4 v0x1185750_0; + %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x11851c0_0; - %load/vec4 v0x1185460_0; + %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x1ac7230_0; %sub; - %assign/vec4 v0x11851c0_0, 0; - %load/vec4 v0x1185750_0; + %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7520_0; %pad/u 11; - %load/vec4 v0x1185460_0; + %load/vec4 v0x1ac7230_0; %add; %pad/u 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x11852c0_0; - %assign/vec4 v0x11851c0_0, 0; - %load/vec4 v0x11851c0_0; - %assign/vec4 v0x11852c0_0, 0; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7090_0; + %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x1ac6f90_0; + %assign/vec4 v0x1ac7090_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x11851c0_0; - %assign/vec4 v0x11852c0_0, 0; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac6f90_0; + %assign/vec4 v0x1ac7090_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x11851c0_0; + %load/vec4 v0x1ac6f90_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x11851c0_0, 0; - %load/vec4 v0x1185750_0; + %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x1185670_0; - %assign/vec4 v0x1185830_0, 0; + %load/vec4 v0x1ac7440_0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x11851c0_0; + %load/vec4 v0x1ac6f90_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x1185670_0; - %assign/vec4 v0x1185830_0, 0; + %load/vec4 v0x1ac7440_0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x11851c0_0; + %load/vec4 v0x1ac6f90_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x1185670_0; - %assign/vec4 v0x1185830_0, 0; + %load/vec4 v0x1ac7440_0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x11851c0_0; + %load/vec4 v0x1ac6f90_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x1185670_0; - %assign/vec4 v0x1185830_0, 0; + %load/vec4 v0x1ac7440_0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x11851c0_0; + %load/vec4 v0x1ac6f90_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x1185670_0; - %assign/vec4 v0x1185830_0, 0; + %load/vec4 v0x1ac7440_0; + %assign/vec4 v0x1ac7600_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x1185750_0; + %load/vec4 v0x1ac7520_0; %addi 1, 0, 4; - %assign/vec4 v0x1185830_0, 0; + %assign/vec4 v0x1ac7600_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x1185540_0; + %load/vec4 v0x1ac7310_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1185540_0; + %load/vec4 v0x1ac7310_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x11853a0_0; + %load/vec4 v0x1ac7170_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x11853a0_0; + %load/vec4 v0x1ac7170_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4513,162 +4518,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x11853a0_0; + %load/vec4 v0x1ac7170_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x1189c00_0; - %assign/vec4 v0x11851c0_0, 0; + %load/vec4 v0x1acb9d0_0; + %assign/vec4 v0x1ac6f90_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11888a0_0, 0; - %load/vec4 v0x11853a0_0; + %assign/vec4 v0x1aca670_0, 0; + %load/vec4 v0x1ac7170_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x1188600_0; - %assign/vec4 v0x1189b20_0, 0; - %load/vec4 v0x1189c00_0; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; + %assign/vec4 v0x1acb8f0_0, 0; + %load/vec4 v0x1acb9d0_0; + %load/vec4 v0x1aca3d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1188600_0; + %load/vec4 v0x1aca3d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x11897c0_0, 4, 5; + %assign/vec4/off/d v0x1acb590_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x11853a0_0; + %load/vec4 v0x1ac7170_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x11853a0_0; - %assign/vec4 v0x1189b20_0, 0; - %load/vec4 v0x1189c00_0; - %load/vec4 v0x11853a0_0; + %load/vec4 v0x1ac7170_0; + %assign/vec4 v0x1acb8f0_0, 0; + %load/vec4 v0x1acb9d0_0; + %load/vec4 v0x1ac7170_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11853a0_0; + %load/vec4 v0x1ac7170_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x11853a0_0; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1ac7170_0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x11880a0_0; + %load/vec4 v0x1ac9e70_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x11853a0_0; - %assign/vec4 v0x1189b20_0, 0; + %load/vec4 v0x1ac7170_0; + %assign/vec4 v0x1acb8f0_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x1188ac0_0; + %load/vec4 v0x1aca890_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4683,82 +4688,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x11890f0_0; + %load/vec4 v0x1acaec0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x1187f20_0; + %load/vec4 v0x1ac9cf0_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11888a0_0, 0; + %assign/vec4 v0x1aca670_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1189880_0, 0, 4; - %load/vec4 v0x1188ba0_0; + %store/vec4 v0x1acb650_0, 0, 4; + %load/vec4 v0x1aca970_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x1188ba0_0; + %load/vec4 v0x1aca970_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4766,54 +4771,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x1188ba0_0; - %load/vec4 v0x11890f0_0; + %load/vec4 v0x1aca970_0; + %load/vec4 v0x1acaec0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11888a0_0, 0; - %load/vec4 v0x11890f0_0; + %assign/vec4 v0x1aca670_0, 0; + %load/vec4 v0x1acaec0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1189230, 4; - %assign/vec4 v0x1189190_0, 0; + %load/vec4a v0x1acb000, 4; + %assign/vec4 v0x1acaf60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11890f0_0; + %load/vec4 v0x1acaec0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1189050_0, 4, 5; + %assign/vec4/off/d v0x1acae20_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x11890f0_0; + %load/vec4 v0x1acaec0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1189880_0, 4, 5; - %load/vec4 v0x11890f0_0; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4/off/d v0x1acb650_0, 4, 5; + %load/vec4 v0x1acaec0_0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x1188ac0_0; + %load/vec4 v0x1aca890_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4829,93 +4834,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x1189b20_0; + %load/vec4 v0x1acb8f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x11880a0_0; + %load/vec4 v0x1ac9e70_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x1186fd0_0; + %load/vec4 v0x1ac8da0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1189b20_0, 0; + %assign/vec4 v0x1acb8f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11897c0_0, 4, 5; - %load/vec4 v0x1189c00_0; + %assign/vec4/off/d v0x1acb590_0, 4, 5; + %load/vec4 v0x1acb9d0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1188980, 0, 4; + %assign/vec4/a/d v0x1aca750, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4923,33 +4928,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x1189b20_0; + %load/vec4 v0x1acb8f0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x1189960_0; - %load/vec4 v0x1189b20_0; + %load/vec4 v0x1acb730_0; + %load/vec4 v0x1acb8f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1189b20_0; + %load/vec4 v0x1acb8f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x11897c0_0, 4, 1; + %store/vec4 v0x1acb590_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11888a0_0, 0; - %load/vec4 v0x1189b20_0; - %assign/vec4 v0x1188600_0, 0; + %assign/vec4 v0x1aca670_0, 0; + %load/vec4 v0x1acb8f0_0; + %assign/vec4 v0x1aca3d0_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1188ac0_0, 0; + %assign/vec4 v0x1aca890_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4958,19 +4963,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x1184d50; + .scope S_0x1ac6a60; T_11 ; - %wait E_0x10db880; - %load/vec4 v0x1188ac0_0; + %wait E_0x1a1d520; + %load/vec4 v0x1aca890_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x11888a0_0; + %load/vec4 v0x1aca670_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1185830_0; + %load/vec4 v0x1ac7600_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4979,62 +4984,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x1185830_0; - %assign/vec4 v0x1185750_0, 0; + %load/vec4 v0x1ac7600_0; + %assign/vec4 v0x1ac7520_0, 0; T_11.0 ; - %load/vec4 v0x1188ac0_0; + %load/vec4 v0x1aca890_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1189050_0, 0, 4; + %store/vec4 v0x1acae20_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x111a270; + .scope S_0x1a35820; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x11836d0_0, 0, 3; + %store/vec4 v0x1ac53e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x11838f0_0, 0, 3; + %store/vec4 v0x1ac5600_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1183430_0, 0, 3; + %store/vec4 v0x1ac5140_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1140640_0, 0, 11; + %store/vec4 v0x1a82310_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1180080_0, 0, 11; + %store/vec4 v0x1ac1d90_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1180540_0, 0, 4; + %store/vec4 v0x1ac2250_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1183e80_0, 0, 4; + %store/vec4 v0x1ac5b90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1184750_0, 0, 4; + %store/vec4 v0x1ac6460_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1184910_0, 0, 4; + %store/vec4 v0x1ac6620_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1184670_0, 0, 4; + %store/vec4 v0x1ac6380_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x11837b0, 4, 0; + %store/vec4a v0x1ac54c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x11837b0, 4, 0; + %store/vec4a v0x1ac54c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x11837b0, 4, 0; + %store/vec4a v0x1ac54c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x11837b0, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x10ca120, v0x1183370 {0 0 0}; + %store/vec4a v0x1ac54c0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x1a29550, v0x1ac5080 {0 0 0}; %end; .thread T_12; - .scope S_0x111a270; + .scope S_0x1a35820; T_13 ; - %wait E_0x10fe030; - %load/vec4 v0x11836d0_0; + %wait E_0x1a3fcc0; + %load/vec4 v0x1ac53e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5049,7 +5054,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x11838f0_0; + %load/vec4 v0x1ac5600_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5064,185 +5069,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x1180330_0; + %load/vec4 v0x1ac2040_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x11839d0_0; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x1ac2410_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1183e80_0, 4, 5; - %load/vec4 v0x1180700_0; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %load/vec4 v0x1ac2410_0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11836d0_0, 0; - %load/vec4 v0x1180700_0; - %assign/vec4 v0x1183f20_0, 0; + %assign/vec4 v0x1ac53e0_0, 0; + %load/vec4 v0x1ac2410_0; + %assign/vec4 v0x1ac5c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1184750_0, 4, 5; - %load/vec4 v0x1180700_0; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %load/vec4 v0x1ac2410_0; + %assign/vec4 v0x1ac5140_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x11839d0_0; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x1ac5140_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11836d0_0, 0; - %load/vec4 v0x1183430_0; - %assign/vec4 v0x1183f20_0, 0; + %assign/vec4 v0x1ac53e0_0, 0; + %load/vec4 v0x1ac5140_0; + %assign/vec4 v0x1ac5c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1184750_0, 4, 5; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x1180700_0; + %load/vec4 v0x1ac2410_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x1182d10_0; + %load/vec4 v0x1ac4a20_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5250,29 +5255,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11836d0_0, 0; - %load/vec4 v0x1180700_0; - %assign/vec4 v0x1183f20_0, 0; + %assign/vec4 v0x1ac53e0_0, 0; + %load/vec4 v0x1ac2410_0; + %assign/vec4 v0x1ac5c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184750_0, 4, 5; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184750_0, 4, 5; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184750_0, 4, 5; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184750_0, 4, 5; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5280,10 +5285,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x1180330_0; + %load/vec4 v0x1ac2040_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5350,180 +5355,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x1140640_0; - %load/vec4 v0x1184000_0; + %load/vec4 v0x1a82310_0; + %load/vec4 v0x1ac5d10_0; %add; - %assign/vec4 v0x1140640_0, 0; - %load/vec4 v0x1180540_0; + %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x1140640_0; - %load/vec4 v0x1184000_0; + %load/vec4 v0x1a82310_0; + %load/vec4 v0x1ac5d10_0; %sub; - %assign/vec4 v0x1140640_0, 0; - %load/vec4 v0x1180540_0; + %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac2250_0; %pad/u 11; - %load/vec4 v0x1184000_0; + %load/vec4 v0x1ac5d10_0; %add; %pad/u 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x1184000_0; - %assign/vec4 v0x1184ad0_0, 0; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac5d10_0; + %assign/vec4 v0x1ac67e0_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x1180250_0; - %assign/vec4 v0x1184ad0_0, 0; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac1f60_0; + %assign/vec4 v0x1ac67e0_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x1140640_0; - %load/vec4 v0x1180250_0; + %load/vec4 v0x1a82310_0; + %load/vec4 v0x1ac1f60_0; %add; - %assign/vec4 v0x1140640_0, 0; - %load/vec4 v0x1180540_0; + %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x1140640_0; - %load/vec4 v0x1180250_0; + %load/vec4 v0x1a82310_0; + %load/vec4 v0x1ac1f60_0; %sub; - %assign/vec4 v0x1140640_0, 0; - %load/vec4 v0x1180540_0; + %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac2250_0; %pad/u 11; - %load/vec4 v0x1180250_0; + %load/vec4 v0x1ac1f60_0; %add; %pad/u 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x1180080_0; - %assign/vec4 v0x1140640_0, 0; - %load/vec4 v0x1140640_0; - %assign/vec4 v0x1180080_0, 0; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac1d90_0; + %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x1a82310_0; + %assign/vec4 v0x1ac1d90_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x1140640_0; - %assign/vec4 v0x1180080_0, 0; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1a82310_0; + %assign/vec4 v0x1ac1d90_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x1140640_0; + %load/vec4 v0x1a82310_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1140640_0, 0; - %load/vec4 v0x1180540_0; + %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x1180460_0; - %assign/vec4 v0x1180620_0, 0; + %load/vec4 v0x1ac2170_0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x1140640_0; + %load/vec4 v0x1a82310_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x1180460_0; - %assign/vec4 v0x1180620_0, 0; + %load/vec4 v0x1ac2170_0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x1140640_0; + %load/vec4 v0x1a82310_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x1180460_0; - %assign/vec4 v0x1180620_0, 0; + %load/vec4 v0x1ac2170_0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1140640_0; + %load/vec4 v0x1a82310_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x1180460_0; - %assign/vec4 v0x1180620_0, 0; + %load/vec4 v0x1ac2170_0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x1140640_0; + %load/vec4 v0x1a82310_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x1180460_0; - %assign/vec4 v0x1180620_0, 0; + %load/vec4 v0x1ac2170_0; + %assign/vec4 v0x1ac2330_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x1180540_0; + %load/vec4 v0x1ac2250_0; %addi 1, 0, 4; - %assign/vec4 v0x1180620_0, 0; + %assign/vec4 v0x1ac2330_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x1180330_0; + %load/vec4 v0x1ac2040_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1180330_0; + %load/vec4 v0x1ac2040_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x1180160_0; + %load/vec4 v0x1ac1e70_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1180160_0; + %load/vec4 v0x1ac1e70_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5531,162 +5536,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x1180160_0; + %load/vec4 v0x1ac1e70_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x1184ad0_0; - %assign/vec4 v0x1140640_0, 0; + %load/vec4 v0x1ac67e0_0; + %assign/vec4 v0x1a82310_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11836d0_0, 0; - %load/vec4 v0x1180160_0; + %assign/vec4 v0x1ac53e0_0, 0; + %load/vec4 v0x1ac1e70_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x1183430_0; - %assign/vec4 v0x11849f0_0, 0; - %load/vec4 v0x1184ad0_0; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; + %assign/vec4 v0x1ac6700_0, 0; + %load/vec4 v0x1ac67e0_0; + %load/vec4 v0x1ac5140_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1183430_0; + %load/vec4 v0x1ac5140_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1184670_0, 4, 5; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x1180160_0; + %load/vec4 v0x1ac1e70_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x1180160_0; - %assign/vec4 v0x11849f0_0, 0; - %load/vec4 v0x1184ad0_0; - %load/vec4 v0x1180160_0; + %load/vec4 v0x1ac1e70_0; + %assign/vec4 v0x1ac6700_0, 0; + %load/vec4 v0x1ac67e0_0; + %load/vec4 v0x1ac1e70_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1180160_0; + %load/vec4 v0x1ac1e70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1180160_0; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac1e70_0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x1182e90_0; + %load/vec4 v0x1ac4ba0_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x1180160_0; - %assign/vec4 v0x11849f0_0, 0; + %load/vec4 v0x1ac1e70_0; + %assign/vec4 v0x1ac6700_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x11838f0_0; + %load/vec4 v0x1ac5600_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5701,82 +5706,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x1183f20_0; + %load/vec4 v0x1ac5c30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x1182d10_0; + %load/vec4 v0x1ac4a20_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11836d0_0, 0; + %assign/vec4 v0x1ac53e0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1184750_0, 0, 4; - %load/vec4 v0x11839d0_0; + %store/vec4 v0x1ac6460_0, 0, 4; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x11839d0_0; + %load/vec4 v0x1ac56e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5784,54 +5789,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x11839d0_0; - %load/vec4 v0x1183f20_0; + %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x1ac5c30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11836d0_0, 0; - %load/vec4 v0x1183f20_0; + %assign/vec4 v0x1ac53e0_0, 0; + %load/vec4 v0x1ac5c30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x11840e0, 4; - %assign/vec4 v0x1184000_0, 0; + %load/vec4a v0x1ac5df0, 4; + %assign/vec4 v0x1ac5d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1183f20_0; + %load/vec4 v0x1ac5c30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1183e80_0, 4, 5; + %assign/vec4/off/d v0x1ac5b90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1183f20_0; + %load/vec4 v0x1ac5c30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1184750_0, 4, 5; - %load/vec4 v0x1183f20_0; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %load/vec4 v0x1ac5c30_0; + %assign/vec4 v0x1ac5140_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x11838f0_0; + %load/vec4 v0x1ac5600_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5847,93 +5852,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x11849f0_0; + %load/vec4 v0x1ac6700_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x1182e90_0; + %load/vec4 v0x1ac4ba0_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x1181dc0_0; + %load/vec4 v0x1ac3ad0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11849f0_0, 0; + %assign/vec4 v0x1ac6700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1184670_0, 4, 5; - %load/vec4 v0x1184ad0_0; + %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %load/vec4 v0x1ac67e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11837b0, 0, 4; + %assign/vec4/a/d v0x1ac54c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac5140_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5941,33 +5946,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x11849f0_0; + %load/vec4 v0x1ac6700_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x1184830_0; - %load/vec4 v0x11849f0_0; + %load/vec4 v0x1ac6540_0; + %load/vec4 v0x1ac6700_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x11849f0_0; + %load/vec4 v0x1ac6700_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1184670_0, 4, 1; + %store/vec4 v0x1ac6380_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11836d0_0, 0; - %load/vec4 v0x11849f0_0; - %assign/vec4 v0x1183430_0, 0; + %assign/vec4 v0x1ac53e0_0, 0; + %load/vec4 v0x1ac6700_0; + %assign/vec4 v0x1ac5140_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11838f0_0, 0; + %assign/vec4 v0x1ac5600_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5976,19 +5981,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x111a270; + .scope S_0x1a35820; T_14 ; - %wait E_0x10db880; - %load/vec4 v0x11838f0_0; + %wait E_0x1a1d520; + %load/vec4 v0x1ac5600_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x11836d0_0; + %load/vec4 v0x1ac53e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1180620_0; + %load/vec4 v0x1ac2330_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -5997,93 +6002,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x1180620_0; - %assign/vec4 v0x1180540_0, 0; + %load/vec4 v0x1ac2330_0; + %assign/vec4 v0x1ac2250_0, 0; T_14.0 ; - %load/vec4 v0x11838f0_0; + %load/vec4 v0x1ac5600_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1183e80_0, 0, 4; + %store/vec4 v0x1ac5b90_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x10ca9f0; + .scope S_0x1a0c690; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x119a060_0, 0, 33; + %store/vec4 v0x1adc080_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1199fc0_0, 0, 1; + %store/vec4 v0x1adbfe0_0, 0, 1; %pushi/vec4 0, 0, 33; - %store/vec4 v0x119a060_0, 0, 33; + %store/vec4 v0x1adc080_0, 0, 33; T_15.0 ; - %load/vec4 v0x119a060_0; + %load/vec4 v0x1adc080_0; %cmpi/u 10, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199f20_0, 0, 1; + %store/vec4 v0x1adbf40_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1199f20_0, 0, 1; + %store/vec4 v0x1adbf40_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199f20_0, 0, 1; + %store/vec4 v0x1adbf40_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1199f20_0, 0, 1; + %store/vec4 v0x1adbf40_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199f20_0, 0, 1; + %store/vec4 v0x1adbf40_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1199f20_0, 0, 1; + %store/vec4 v0x1adbf40_0, 0, 1; %delay 1, 0; - %load/vec4 v0x119a060_0; + %load/vec4 v0x1adc080_0; %addi 1, 0, 33; - %store/vec4 v0x119a060_0, 0, 33; + %store/vec4 v0x1adc080_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x1199e80_0; + %load/vec4 v0x1adbea0_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.2, 4; - %vpi_call 2 51 "$display", "Failed on up test of regTest, %d", v0x1199e80_0 {0 0 0}; + %vpi_call 2 51 "$display", "Failed on up test of regTest, %d", v0x1adbea0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199fc0_0, 0, 1; + %store/vec4 v0x1adbfe0_0, 0, 1; T_15.2 ; - %load/vec4 v0x1199d40_0; + %load/vec4 v0x1adbd60_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.4, 4; - %vpi_call 2 55 "$display", "Failed on left test of regTest, %d", v0x1199d40_0 {0 0 0}; + %vpi_call 2 55 "$display", "Failed on left test of regTest, %d", v0x1adbd60_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199fc0_0, 0, 1; + %store/vec4 v0x1adbfe0_0, 0, 1; T_15.4 ; - %load/vec4 v0x1199de0_0; + %load/vec4 v0x1adbe00_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.6, 4; - %vpi_call 2 59 "$display", "Failed on right test of regTest, %d", v0x1199de0_0 {0 0 0}; + %vpi_call 2 59 "$display", "Failed on right test of regTest, %d", v0x1adbe00_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199fc0_0, 0, 1; + %store/vec4 v0x1adbfe0_0, 0, 1; T_15.6 ; - %load/vec4 v0x1199ca0_0; + %load/vec4 v0x1adbcc0_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.8, 4; - %vpi_call 2 63 "$display", "Failed on down test of regTest, %d", v0x1199ca0_0 {0 0 0}; + %vpi_call 2 63 "$display", "Failed on down test of regTest, %d", v0x1adbcc0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199fc0_0, 0, 1; + %store/vec4 v0x1adbfe0_0, 0, 1; T_15.8 ; - %load/vec4 v0x1199b50_0; + %load/vec4 v0x1adbb70_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.10, 4; - %vpi_call 2 67 "$display", "Failed on center test of regTest, %d", v0x1199b50_0 {0 0 0}; + %vpi_call 2 67 "$display", "Failed on center test of regTest, %d", v0x1adbb70_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1199fc0_0, 0, 1; + %store/vec4 v0x1adbfe0_0, 0, 1; T_15.10 ; - %load/vec4 v0x1199fc0_0; + %load/vec4 v0x1adbfe0_0; %flag_set/vec4 8; %jmp/0xz T_15.12, 8; %vpi_call 2 71 "$display", "DUT passed regTest" {0 0 0}; diff --git a/regTest/up.dat b/regTest/up.dat index 95cb810..d1eebf1 100644 --- a/regTest/up.dat +++ b/regTest/up.dat @@ -4,13 +4,13 @@ 010000100000000101 100000000000000000 011100000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 -000000000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 +101100000000000000 diff --git a/stackmemory b/stackmemory index f5234cf..a2a3ad1 100755 --- a/stackmemory +++ b/stackmemory @@ -6,110 +6,110 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x194d6b0 .scope module, "stackMemoryTestBench" "stackMemoryTestBench" 2 2; +S_0x11b76b0 .scope module, "stackMemoryTestBench" "stackMemoryTestBench" 2 2; .timescale 0 0; -v0x19838a0_0 .net *"_s12", 0 0, L_0x19846b0; 1 drivers -v0x1983980_0 .net *"_s16", 0 0, L_0x1984750; 1 drivers -v0x1983a60_0 .net *"_s20", 0 0, L_0x19848b0; 1 drivers -v0x1983b20_0 .net *"_s24", 0 0, L_0x19849b0; 1 drivers -v0x1983c00_0 .net *"_s6", 0 0, L_0x1984590; 1 drivers -v0x1983d30_0 .var "clk", 0 0; -v0x1983dd0_0 .var "counter", 5 0; -v0x1983e90_0 .var "dutpassed", 0 0; -v0x1983f50_0 .var "in", 14 0; -v0x19840d0_0 .net "out", 14 0, v0x1983580_0; 1 drivers -v0x19841a0_0 .var "phase", 2 0; -v0x1984260_0 .var "testcase", 3 0; -v0x1984340_0 .var "val", 10 0; -E_0x1958530 .event negedge, v0x1983e90_0; -E_0x1957490 .event negedge, L_0x19849b0; -E_0x1957c90 .event posedge, L_0x19848b0; -E_0x19576d0 .event negedge, L_0x1984750; -E_0x1958250 .event posedge, L_0x19846b0; -E_0x1957f70 .event posedge, L_0x1984590; -L_0x1984590 .part v0x1983580_0, 13, 1; -L_0x19846b0 .part v0x1983580_0, 14, 1; -L_0x1984750 .part v0x1983580_0, 11, 1; -L_0x19848b0 .part v0x1983580_0, 13, 1; -L_0x19849b0 .part v0x1983580_0, 12, 1; -S_0x194d830 .scope module, "dut" "stackMemory" 2 17, 3 11 0, S_0x194d6b0; +v0x11edbb0_0 .net *"_s12", 0 0, L_0x11ee9c0; 1 drivers +v0x11edc90_0 .net *"_s16", 0 0, L_0x11eea60; 1 drivers +v0x11edd70_0 .net *"_s20", 0 0, L_0x11eebc0; 1 drivers +v0x11ede30_0 .net *"_s24", 0 0, L_0x11eecc0; 1 drivers +v0x11edf10_0 .net *"_s6", 0 0, L_0x11ee8a0; 1 drivers +v0x11ee040_0 .var "clk", 0 0; +v0x11ee0e0_0 .var "counter", 5 0; +v0x11ee1a0_0 .var "dutpassed", 0 0; +v0x11ee260_0 .var "in", 14 0; +v0x11ee3e0_0 .net "out", 14 0, v0x11ed890_0; 1 drivers +v0x11ee4b0_0 .var "phase", 2 0; +v0x11ee570_0 .var "testcase", 3 0; +v0x11ee650_0 .var "val", 10 0; +E_0x11c26f0 .event negedge, v0x11ee1a0_0; +E_0x11c1650 .event negedge, L_0x11eecc0; +E_0x11c1e50 .event posedge, L_0x11eebc0; +E_0x11c1890 .event negedge, L_0x11eea60; +E_0x11c2410 .event posedge, L_0x11ee9c0; +E_0x11c2130 .event posedge, L_0x11ee8a0; +L_0x11ee8a0 .part v0x11ed890_0, 13, 1; +L_0x11ee9c0 .part v0x11ed890_0, 14, 1; +L_0x11eea60 .part v0x11ed890_0, 11, 1; +L_0x11eebc0 .part v0x11ed890_0, 13, 1; +L_0x11eecc0 .part v0x11ed890_0, 12, 1; +S_0x11b7830 .scope module, "dut" "stackMemory" 2 17, 3 11 0, S_0x11b76b0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "in" .port_info 2 /OUTPUT 15 "out" -P_0x194b8c0 .param/l "initialpointer" 0 3 15, +C4<00000000000000000000000000000100>; -P_0x194b900 .param/l "loadmemory" 0 3 13, +C4<00000000000000000000000000000001>; -P_0x194b940 .param/str "memoryfile" 0 3 14, "mem.dat"; -v0x1944a40_0 .net *"_s2", 0 0, L_0x1984420; 1 drivers -v0x19831e0_0 .net *"_s6", 0 0, L_0x19844f0; 1 drivers -v0x19832c0_0 .net "clk", 0 0, v0x1983d30_0; 1 drivers -v0x1983390_0 .net "in", 14 0, v0x1983f50_0; 1 drivers -v0x1983470 .array "mem", 1 15, 10 0; -v0x1983580_0 .var "out", 14 0; -v0x1983660_0 .var "phase", 2 0; -v0x1983740_0 .var "pointer", 3 0; -E_0x194df50 .event negedge, v0x19832c0_0; -E_0x194e340 .event posedge, v0x19832c0_0; -E_0x194eb00 .event edge, v0x1983740_0; -E_0x194e720 .event posedge, L_0x19844f0; -E_0x194f0f0 .event posedge, L_0x1984420; -L_0x1984420 .part v0x1983f50_0, 14, 1; -L_0x19844f0 .part v0x1983f50_0, 13, 1; - .scope S_0x194d830; +P_0x11b5a10 .param/l "initialpointer" 0 3 15, +C4<00000000000000000000000000000100>; +P_0x11b5a50 .param/l "loadmemory" 0 3 13, +C4<00000000000000000000000000000001>; +P_0x11b5a90 .param/str "memoryfile" 0 3 14, "mem.dat"; +v0x11aeb90_0 .net *"_s2", 0 0, L_0x11ee730; 1 drivers +v0x11ed4f0_0 .net *"_s6", 0 0, L_0x11ee800; 1 drivers +v0x11ed5d0_0 .net "clk", 0 0, v0x11ee040_0; 1 drivers +v0x11ed6a0_0 .net "in", 14 0, v0x11ee260_0; 1 drivers +v0x11ed780 .array "mem", 1 15, 10 0; +v0x11ed890_0 .var "out", 14 0; +v0x11ed970_0 .var "phase", 2 0; +v0x11eda50_0 .var "pointer", 3 0; +E_0x11b7f50 .event negedge, v0x11ed5d0_0; +E_0x11b8340 .event posedge, v0x11ed5d0_0; +E_0x11b8b00 .event edge, v0x11eda50_0; +E_0x11b8720 .event posedge, L_0x11ee800; +E_0x11b90f0 .event posedge, L_0x11ee730; +L_0x11ee730 .part v0x11ee260_0, 14, 1; +L_0x11ee800 .part v0x11ee260_0, 13, 1; + .scope S_0x11b7830; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1983660_0, 0, 3; + %store/vec4 v0x11ed970_0, 0, 3; %pushi/vec4 4, 0, 4; - %store/vec4 v0x1983740_0, 0, 4; + %store/vec4 v0x11eda50_0, 0, 4; %pushi/vec4 0, 0, 15; - %store/vec4 v0x1983580_0, 0, 15; - %vpi_call 3 30 "$readmemb", P_0x194b940, v0x1983470 {0 0 0}; + %store/vec4 v0x11ed890_0, 0, 15; + %vpi_call 3 30 "$readmemb", P_0x11b5a90, v0x11ed780 {0 0 0}; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmp/u; %jmp/0xz T_0.0, 5; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1983470, 4; + %load/vec4a v0x11ed780, 4; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983580_0, 4, 11; + %store/vec4 v0x11ed890_0, 4, 11; T_0.0 ; %end; .thread T_0; - .scope S_0x194d830; + .scope S_0x11b7830; T_1 ; - %wait E_0x194f0f0; - %load/vec4 v0x1983740_0; + %wait E_0x11b90f0; + %load/vec4 v0x11eda50_0; %subi 1, 0, 4; - %store/vec4 v0x1983740_0, 0, 4; + %store/vec4 v0x11eda50_0, 0, 4; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmp/u; %jmp/0xz T_1.0, 5; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1983470, 4; + %load/vec4a v0x11ed780, 4; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983580_0, 4, 11; + %store/vec4 v0x11ed890_0, 4, 11; T_1.0 ; %jmp T_1; .thread T_1; - .scope S_0x194d830; + .scope S_0x11b7830; T_2 ; - %wait E_0x194e720; - %load/vec4 v0x1983740_0; + %wait E_0x11b8720; + %load/vec4 v0x11eda50_0; %subi 1, 0, 4; - %store/vec4 v0x1983740_0, 0, 4; + %store/vec4 v0x11eda50_0, 0, 4; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmp/u; %jmp/0xz T_2.0, 5; @@ -117,30 +117,30 @@ T_2 ; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; - %load/vec4 v0x1983740_0; + %assign/vec4/off/d v0x11ed890_0, 4, 5; + %load/vec4 v0x11eda50_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1983470, 4; + %load/vec4a v0x11ed780, 4; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; %jmp T_2.1; T_2.0 ; %pushi/vec4 0, 0, 1; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; T_2.1 ; %jmp T_2; .thread T_2; - .scope S_0x194d830; + .scope S_0x11b7830; T_3 ; - %wait E_0x194eb00; - %load/vec4 v0x1983740_0; + %wait E_0x11b8b00; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmpi/u 15, 0, 32; %jmp/0xz T_3.0, 5; @@ -148,17 +148,17 @@ T_3 ; %ix/load 4, 12, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; %jmp T_3.1; T_3.0 ; %pushi/vec4 0, 0, 1; %ix/load 4, 12, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; T_3.1 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmp/u; %jmp/0xz T_3.2, 5; @@ -166,21 +166,21 @@ T_3.1 ; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; %jmp T_3.3; T_3.2 ; %pushi/vec4 0, 0, 1; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; T_3.3 ; %jmp T_3; .thread T_3, $push; - .scope S_0x194d830; + .scope S_0x11b7830; T_4 ; - %wait E_0x194e340; - %load/vec4 v0x1983660_0; + %wait E_0x11b8340; + %load/vec4 v0x11ed970_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -195,29 +195,30 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x1983390_0; + %load/vec4 v0x11ed6a0_0; %parti/s 1, 11, 5; %flag_set/vec4 8; %jmp/0xz T_4.4, 8; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmpi/u 15, 0, 32; %jmp/0xz T_4.6, 5; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %addi 1, 0, 4; - %store/vec4 v0x1983740_0, 0, 4; - %load/vec4 v0x1983390_0; + %store/vec4 v0x11eda50_0, 0, 4; + %load/vec4 v0x11ed6a0_0; %parti/s 11, 0, 2; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %store/vec4a v0x1983470, 4, 0; + %store/vec4a v0x11ed780, 4, 0; + %vpi_call 3 72 "$display", "%b", v0x11ed6a0_0 {0 0 0}; %pushi/vec4 1, 0, 1; %ix/load 4, 13, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; T_4.6 ; T_4.4 ; %jmp T_4.3; @@ -225,31 +226,31 @@ T_4.1 ; %jmp T_4.3; T_4.2 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 32; %cmp/u; %jmp/0xz T_4.8, 5; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1983470, 4; + %load/vec4a v0x11ed780, 4; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; - %load/vec4 v0x1983390_0; + %assign/vec4/off/d v0x11ed890_0, 4, 5; + %load/vec4 v0x11ed6a0_0; %parti/s 1, 12, 5; %flag_set/vec4 8; %jmp/0xz T_4.10, 8; - %load/vec4 v0x1983740_0; + %load/vec4 v0x11eda50_0; %subi 1, 0, 4; - %store/vec4 v0x1983740_0, 0, 4; + %store/vec4 v0x11eda50_0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 4, 14, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983580_0, 4, 5; + %assign/vec4/off/d v0x11ed890_0, 4, 5; T_4.10 ; T_4.8 ; %jmp T_4.3; @@ -257,132 +258,132 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x194d830; + .scope S_0x11b7830; T_5 ; - %wait E_0x194df50; - %load/vec4 v0x1983660_0; + %wait E_0x11b7f50; + %load/vec4 v0x11ed970_0; %cmpi/e 2, 0, 3; %jmp/0xz T_5.0, 4; %pushi/vec4 0, 0, 1; %ix/load 4, 13, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983580_0, 4, 1; + %store/vec4 v0x11ed890_0, 4, 1; %pushi/vec4 0, 0, 1; %ix/load 4, 14, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983580_0, 4, 1; + %store/vec4 v0x11ed890_0, 4, 1; T_5.0 ; - %load/vec4 v0x1983660_0; + %load/vec4 v0x11ed970_0; %pad/u 32; %addi 1, 0, 32; %pushi/vec4 3, 0, 32; %mod; %pad/u 3; - %store/vec4 v0x1983660_0, 0, 3; + %store/vec4 v0x11ed970_0, 0, 3; %jmp T_5; .thread T_5; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_6 ; %delay 10, 0; - %load/vec4 v0x1983d30_0; + %load/vec4 v0x11ee040_0; %nor/r; - %store/vec4 v0x1983d30_0, 0, 1; + %store/vec4 v0x11ee040_0, 0, 1; %jmp T_6; .thread T_6; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_7 ; %vpi_call 2 26 "$dumpfile", "test.vcd" {0 0 0}; %vpi_call 2 27 "$dumpvars", 32'sb00000000000000000000000000000000 {0 0 0}; %pushi/vec4 0, 0, 1; - %assign/vec4 v0x1983d30_0, 0; + %assign/vec4 v0x11ee040_0, 0; %pushi/vec4 1, 0, 1; - %assign/vec4 v0x1983e90_0, 0; + %assign/vec4 v0x11ee1a0_0, 0; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x19841a0_0, 0; + %assign/vec4 v0x11ee4b0_0, 0; %pushi/vec4 0, 0, 15; - %assign/vec4 v0x1983f50_0, 0; + %assign/vec4 v0x11ee260_0, 0; %pushi/vec4 0, 0, 4; - %assign/vec4 v0x1984260_0, 0; + %assign/vec4 v0x11ee570_0, 0; %pushi/vec4 1, 0, 6; - %assign/vec4 v0x1983dd0_0, 0; + %assign/vec4 v0x11ee0e0_0, 0; %delay 30, 0; - %load/vec4 v0x19840d0_0; + %load/vec4 v0x11ee3e0_0; %parti/s 1, 11, 5; %nor/r; %flag_set/vec4 8; - %load/vec4 v0x19840d0_0; + %load/vec4 v0x11ee3e0_0; %parti/s 1, 12, 5; %nor/r; %flag_set/vec4 9; %flag_or 9, 8; - %load/vec4 v0x19840d0_0; + %load/vec4 v0x11ee3e0_0; %parti/s 1, 13, 5; %flag_set/vec4 8; %flag_or 8, 9; - %load/vec4 v0x19840d0_0; + %load/vec4 v0x11ee3e0_0; %parti/s 1, 14, 5; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.0, 9; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1983e90_0, 0, 1; + %store/vec4 v0x11ee1a0_0, 0, 1; T_7.0 ; %pushi/vec4 1, 0, 1; %ix/load 4, 12, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; %pushi/vec4 1, 0, 4; - %store/vec4 v0x1984260_0, 0, 4; + %store/vec4 v0x11ee570_0, 0, 4; %end; .thread T_7; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_8 ; - %wait E_0x194e340; - %load/vec4 v0x1984260_0; + %wait E_0x11b8340; + %load/vec4 v0x11ee570_0; %pad/u 32; %pushi/vec4 1, 0, 32; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x19841a0_0; + %load/vec4 v0x11ee4b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x19840d0_0; + %load/vec4 v0x11ee3e0_0; %parti/s 11, 0, 2; - %assign/vec4 v0x1984340_0, 0; - %load/vec4 v0x1984340_0; + %assign/vec4 v0x11ee650_0, 0; + %load/vec4 v0x11ee650_0; %cmpi/ne 1394, 0, 11; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1983e90_0, 0, 1; + %store/vec4 v0x11ee1a0_0, 0, 1; T_8.2 ; %pushi/vec4 1, 0, 1; %ix/load 4, 14, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983f50_0, 4, 5; + %assign/vec4/off/d v0x11ee260_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 4, 12, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983f50_0, 4, 5; + %assign/vec4/off/d v0x11ee260_0, 4, 5; %pushi/vec4 2, 0, 4; - %store/vec4 v0x1984260_0, 0, 4; + %store/vec4 v0x11ee570_0, 0, 4; T_8.0 ; %jmp T_8; .thread T_8; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_9 ; - %wait E_0x194e340; - %load/vec4 v0x1984260_0; + %wait E_0x11b8340; + %load/vec4 v0x11ee570_0; %pad/u 32; %pushi/vec4 2, 0, 32; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x19841a0_0; + %load/vec4 v0x11ee4b0_0; %pushi/vec4 2, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -390,24 +391,24 @@ T_9 ; %flag_set/vec4 8; %jmp/0xz T_9.0, 8; %pushi/vec4 186, 0, 11; - %store/vec4 v0x1984340_0, 0, 11; - %load/vec4 v0x1984340_0; + %store/vec4 v0x11ee650_0, 0, 11; + %load/vec4 v0x11ee650_0; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983f50_0, 4, 5; + %assign/vec4/off/d v0x11ee260_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983f50_0, 4, 5; + %assign/vec4/off/d v0x11ee260_0, 4, 5; T_9.0 ; %jmp T_9; .thread T_9; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_10 ; - %wait E_0x1957f70; - %load/vec4 v0x1984260_0; + %wait E_0x11c2130; + %load/vec4 v0x11ee570_0; %pad/u 32; %cmpi/e 2, 0, 32; %jmp/0xz T_10.0, 4; @@ -415,131 +416,131 @@ T_10 ; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1983f50_0, 4, 5; + %assign/vec4/off/d v0x11ee260_0, 4, 5; %pushi/vec4 3, 0, 4; - %store/vec4 v0x1984260_0, 0, 4; + %store/vec4 v0x11ee570_0, 0, 4; T_10.0 ; %jmp T_10; .thread T_10; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_11 ; - %wait E_0x194e340; - %load/vec4 v0x1984260_0; + %wait E_0x11b8340; + %load/vec4 v0x11ee570_0; %pad/u 32; %pushi/vec4 3, 0, 32; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x19841a0_0; + %load/vec4 v0x11ee4b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x19840d0_0; + %load/vec4 v0x11ee3e0_0; %parti/s 11, 0, 2; - %store/vec4 v0x1984340_0, 0, 11; - %load/vec4 v0x1984340_0; + %store/vec4 v0x11ee650_0, 0, 11; + %load/vec4 v0x11ee650_0; %cmpi/ne 186, 0, 11; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1983e90_0, 0, 1; + %store/vec4 v0x11ee1a0_0, 0, 1; %jmp T_11.3; T_11.2 ; %pushi/vec4 1, 0, 1; %ix/load 4, 14, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; %pushi/vec4 4, 0, 4; - %store/vec4 v0x1984260_0, 0, 4; + %store/vec4 v0x11ee570_0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 4, 12, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; T_11.3 ; T_11.0 ; %jmp T_11; .thread T_11; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_12 ; - %wait E_0x1958250; - %load/vec4 v0x1984260_0; + %wait E_0x11c2410; + %load/vec4 v0x11ee570_0; %pad/u 32; %cmpi/e 4, 0, 32; %jmp/0xz T_12.0, 4; - %load/vec4 v0x1983dd0_0; + %load/vec4 v0x11ee0e0_0; %addi 1, 0, 6; - %store/vec4 v0x1983dd0_0, 0, 6; + %store/vec4 v0x11ee0e0_0, 0, 6; T_12.0 ; %jmp T_12; .thread T_12; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_13 ; - %wait E_0x19576d0; - %load/vec4 v0x1984260_0; + %wait E_0x11c1890; + %load/vec4 v0x11ee570_0; %pad/u 32; %cmpi/e 4, 0, 32; %jmp/0xz T_13.0, 4; - %load/vec4 v0x1983dd0_0; + %load/vec4 v0x11ee0e0_0; %pad/u 32; %cmpi/e 3, 0, 32; %jmp/0xz T_13.2, 4; %pushi/vec4 0, 0, 1; %ix/load 4, 12, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; %pushi/vec4 0, 0, 6; - %store/vec4 v0x1983dd0_0, 0, 6; - %load/vec4 v0x1983dd0_0; + %store/vec4 v0x11ee0e0_0, 0, 6; + %load/vec4 v0x11ee0e0_0; %pad/u 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 11; + %store/vec4 v0x11ee260_0, 4, 11; %pushi/vec4 1, 0, 1; %ix/load 4, 11, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; %pushi/vec4 5, 0, 4; - %store/vec4 v0x1984260_0, 0, 4; + %store/vec4 v0x11ee570_0, 0, 4; %jmp T_13.3; T_13.2 ; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1983e90_0, 0, 1; + %store/vec4 v0x11ee1a0_0, 0, 1; T_13.3 ; T_13.0 ; %jmp T_13; .thread T_13; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_14 ; - %wait E_0x1957c90; - %load/vec4 v0x1984260_0; + %wait E_0x11c1e50; + %load/vec4 v0x11ee570_0; %pad/u 32; %cmpi/e 5, 0, 32; %jmp/0xz T_14.0, 4; - %load/vec4 v0x1983dd0_0; + %load/vec4 v0x11ee0e0_0; %addi 1, 0, 6; - %store/vec4 v0x1983dd0_0, 0, 6; - %load/vec4 v0x1983dd0_0; + %store/vec4 v0x11ee0e0_0, 0, 6; + %load/vec4 v0x11ee0e0_0; %pad/u 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 11; + %store/vec4 v0x11ee260_0, 4, 11; T_14.0 ; %jmp T_14; .thread T_14; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_15 ; - %wait E_0x1957490; - %load/vec4 v0x1984260_0; + %wait E_0x11c1650; + %load/vec4 v0x11ee570_0; %pad/u 32; %cmpi/e 5, 0, 32; %jmp/0xz T_15.0, 4; - %load/vec4 v0x1983dd0_0; + %load/vec4 v0x11ee0e0_0; %pad/u 32; %cmpi/ne 15, 0, 32; %jmp/0xz T_15.2, 4; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1983e90_0, 0, 1; + %store/vec4 v0x11ee1a0_0, 0, 1; %jmp T_15.3; T_15.2 ; %vpi_call 2 123 "$display", "DUT Passed" {0 0 0}; @@ -548,34 +549,34 @@ T_15.3 ; T_15.0 ; %jmp T_15; .thread T_15; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_16 ; - %wait E_0x194df50; - %load/vec4 v0x19841a0_0; + %wait E_0x11b7f50; + %load/vec4 v0x11ee4b0_0; %cmpi/e 2, 0, 3; %jmp/0xz T_16.0, 4; %pushi/vec4 0, 0, 1; %ix/load 4, 13, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; %pushi/vec4 0, 0, 1; %ix/load 4, 14, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1983f50_0, 4, 1; + %store/vec4 v0x11ee260_0, 4, 1; T_16.0 ; - %load/vec4 v0x19841a0_0; + %load/vec4 v0x11ee4b0_0; %pad/u 32; %addi 1, 0, 32; %pushi/vec4 3, 0, 32; %mod; %pad/u 3; - %store/vec4 v0x19841a0_0, 0, 3; + %store/vec4 v0x11ee4b0_0, 0, 3; %jmp T_16; .thread T_16; - .scope S_0x194d6b0; + .scope S_0x11b76b0; T_17 ; - %wait E_0x1958530; - %vpi_call 2 138 "$display", "DUT Failed Test: %d", v0x1984260_0 {0 0 0}; + %wait E_0x11c26f0; + %vpi_call 2 138 "$display", "DUT Failed Test: %d", v0x11ee570_0 {0 0 0}; %vpi_call 2 139 "$finish" {0 0 0}; %jmp T_17; .thread T_17; diff --git a/stackmemory.v b/stackmemory.v index 17f1331..b283954 100644 --- a/stackmemory.v +++ b/stackmemory.v @@ -25,7 +25,7 @@ module stackMemory phase = `READ_PHASE; pointer = initialpointer; out = 0; - + if(loadmemory) $readmemb(memoryfile, mem); if (pointer > 0) begin @@ -55,18 +55,17 @@ module stackMemory out[`WRITE_REQ_BIT] <= 1; else out[`WRITE_REQ_BIT] <= 0; - + if (pointer > 0) out[`READ_REQ_BIT] <= 1; else out[`READ_REQ_BIT] <= 0; end // always @ (pointer) - + always @(posedge clk) begin case(phase) `READ_PHASE: if(in[`READ_REQ_BIT]) begin - if(pointer < 15) begin pointer = pointer + 1; mem[pointer] = in[10:0]; @@ -84,7 +83,7 @@ module stackMemory out[`WRITE_ACK_BIT] <= 1; end end - + endcase end // always @ (posedge clk) @@ -95,6 +94,6 @@ module stackMemory end phase = (phase + 1) % 3; end - - + + endmodule diff --git a/test b/test deleted file mode 100755 index 5711a70..0000000 --- a/test +++ /dev/null @@ -1,2448 +0,0 @@ -#! /usr/local/bin/vvp -:ivl_version "0.10.0 (devel)" "(s20150513)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "system"; -:vpi_module "vhdl_sys"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0x11b8110 .scope module, "tis100Test" "tis100Test" 2 2; - .timescale 0 0; -v0x1204a10_0 .net "L2R", 14 0, L_0x1218b40; 1 drivers -v0x1204b40_0 .net "R2L", 14 0, L_0x121c460; 1 drivers -v0x1204c50_0 .net/s "accOutLeft", 10 0, L_0x1204fc0; 1 drivers -v0x1204cf0_0 .net/s "accOutRight", 10 0, L_0x1218e90; 1 drivers -v0x1204dc0_0 .var "clk", 0 0; -v0x1204f00_0 .var "i", 32 0; -S_0x1154c70 .scope module, "left" "tis100" 2 12, 3 49 0, S_0x11b8110; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk" - .port_info 1 /INPUT 15 "up" - .port_info 2 /INPUT 15 "down" - .port_info 3 /INPUT 15 "left" - .port_info 4 /INPUT 15 "right" - .port_info 5 /OUTPUT 15 "upOut" - .port_info 6 /OUTPUT 15 "downOut" - .port_info 7 /OUTPUT 15 "leftOut" - .port_info 8 /OUTPUT 15 "rightOut" - .port_info 9 /OUTPUT 11 "accOut" -P_0x11b7840 .param/str "memFile" 0 3 60, "left.dat"; -L_0x1204fc0 .functor BUFZ 11, v0x11de280_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x12150b0 .functor BUFZ 11, v0x11de280_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1215e50 .functor BUFZ 18, L_0x1217e10, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x11de280_0 .var/s "ACC", 10 0; -v0x11fac10_0 .var/s "BAK", 10 0; -v0x11facf0_0 .net "DST", 2 0, L_0x1218f50; 1 drivers -v0x11fade0_0 .net/s "IMM", 10 0, L_0x1218ff0; 1 drivers -v0x11faec0_0 .net "INST", 3 0, L_0x1218830; 1 drivers -v0x11faff0_0 .net "LABEL", 3 0, L_0x12191a0; 1 drivers -v0x11fb0d0_0 .var "PC", 3 0; -v0x11fb1b0_0 .var "PCNEXT", 3 0; -v0x11fb290_0 .net "SRC", 2 0, L_0x1218d60; 1 drivers -v0x11fb400_0 .net *"_s103", 0 0, L_0x1217150; 1 drivers -v0x11fb4e0_0 .net *"_s107", 0 0, L_0x1217060; 1 drivers -v0x11fb5c0_0 .net *"_s111", 0 0, L_0x1217340; 1 drivers -v0x11fb6a0_0 .net *"_s115", 0 0, L_0x1217240; 1 drivers -v0x11fb780_0 .net *"_s119", 0 0, L_0x1217580; 1 drivers -v0x11fb860_0 .net *"_s123", 0 0, L_0x1217470; 1 drivers -v0x11fb940_0 .net *"_s127", 0 0, L_0x1217740; 1 drivers -v0x11fba20_0 .net *"_s131", 0 0, L_0x1217620; 1 drivers -v0x11fbbd0_0 .net *"_s135", 0 0, L_0x12179a0; 1 drivers -v0x11fbc70_0 .net *"_s139", 0 0, L_0x1217870; 1 drivers -v0x11fbd50_0 .net *"_s143", 0 0, L_0x1217b80; 1 drivers -v0x11fbe30_0 .net *"_s147", 0 0, L_0x1217a40; 1 drivers -v0x11fbf10_0 .net *"_s151", 0 0, L_0x1217d70; 1 drivers -v0x11fbff0_0 .net *"_s155", 0 0, L_0x1217c20; 1 drivers -v0x11fc0d0_0 .net *"_s159", 0 0, L_0x1217cc0; 1 drivers -v0x11fc1b0_0 .net *"_s160", 17 0, L_0x1217e10; 1 drivers -v0x11fc290_0 .net *"_s162", 5 0, L_0x1218170; 1 drivers -L_0x7fcb83eda060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x11fc370_0 .net *"_s165", 1 0, L_0x7fcb83eda060; 1 drivers -v0x11fe340_2 .array/port v0x11fe340, 2; -v0x11fc450_0 .net *"_s173", 10 0, v0x11fe340_2; 1 drivers -v0x11fe340_3 .array/port v0x11fe340, 3; -v0x11fc530_0 .net *"_s179", 10 0, v0x11fe340_3; 1 drivers -v0x11fe340_0 .array/port v0x11fe340, 0; -v0x11fc610_0 .net *"_s185", 10 0, v0x11fe340_0; 1 drivers -v0x11fe340_1 .array/port v0x11fe340, 1; -v0x11fc6f0_0 .net *"_s191", 10 0, v0x11fe340_1; 1 drivers -v0x11fc7d0_0 .net *"_s23", 0 0, L_0x1215540; 1 drivers -v0x11fc8b0_0 .net *"_s27", 0 0, L_0x1215660; 1 drivers -v0x11fbb00_0 .net *"_s31", 0 0, L_0x12157d0; 1 drivers -v0x11fcb80_0 .net *"_s36", 0 0, L_0x1215a80; 1 drivers -v0x11fcc60_0 .net *"_s42", 0 0, L_0x1215d10; 1 drivers -v0x11fcd40_0 .net *"_s46", 0 0, L_0x1215db0; 1 drivers -v0x11fce20_0 .net *"_s50", 0 0, L_0x1215ec0; 1 drivers -v0x11fcf00_0 .net *"_s55", 0 0, L_0x1216120; 1 drivers -v0x11fcfe0_0 .net *"_s61", 0 0, L_0x1216390; 1 drivers -v0x11fd0c0_0 .net *"_s65", 0 0, L_0x12164c0; 1 drivers -v0x11fd1a0_0 .net *"_s69", 0 0, L_0x1216600; 1 drivers -v0x11fd280_0 .net *"_s74", 0 0, L_0x1216560; 1 drivers -v0x11fd360_0 .net *"_s80", 0 0, L_0x12167f0; 1 drivers -v0x11fd440_0 .net *"_s84", 0 0, L_0x1216ae0; 1 drivers -v0x11fd520_0 .net *"_s88", 0 0, L_0x1216a20; 1 drivers -v0x11fd600_0 .net *"_s93", 0 0, L_0x1216b80; 1 drivers -v0x11fd6e0_0 .net *"_s99", 0 0, L_0x1216e40; 1 drivers -v0x11fd7c0_0 .net/s "accOut", 10 0, L_0x1204fc0; alias, 1 drivers -v0x11fd8a0_0 .net "anyHasData", 0 0, L_0x1215bc0; 1 drivers -v0x11fd960_0 .net "anyReadAck", 0 0, L_0x1216980; 1 drivers -v0x11fda20_0 .net "anyWantData", 0 0, L_0x1216210; 1 drivers -v0x11fdae0_0 .net "anyWriteAck", 0 0, L_0x1216f70; 1 drivers -v0x11fdba0_0 .net "clk", 0 0, v0x1204dc0_0; 1 drivers -o0x7fcb83f23a38 .functor BUFZ 15, C4; HiZ drive -v0x11fdc60_0 .net "down", 14 0, o0x7fcb83f23a38; 0 drivers -v0x11fdd40_0 .net "downOut", 14 0, L_0x1218590; 1 drivers -v0x11fde20_0 .net "instruction", 17 0, L_0x1215e50; 1 drivers -v0x11fdf00 .array "instructions", 0 15, 17 0; -v0x11fdfc0_0 .var "last", 2 0; -o0x7fcb83f23af8 .functor BUFZ 15, C4; HiZ drive -v0x11fe0a0_0 .net "left", 14 0, o0x7fcb83f23af8; 0 drivers -v0x11fe180_0 .net "leftOut", 14 0, L_0x12182d0; 1 drivers -v0x11fe260_0 .var "mode", 2 0; -v0x11fe340 .array/s "outVals", 2 5, 10 0; -v0x11fe480_0 .var "phase", 2 0; -v0x11fe560_0 .net "portsHaveData", 5 2, L_0x1215870; 1 drivers -v0x11fc950_0 .net "portsWantData", 5 2, L_0x1215f60; 1 drivers -v0x11fca30_0 .net "readAckIn", 5 2, L_0x12166a0; 1 drivers -v0x11fea10_0 .var "readAckOut", 5 2; -v0x11feab0_0 .var "readTarget", 2 0; -v0x11feb90_0 .var/s "readValue", 10 0; -L_0x7fcb83eda018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x11fec70 .array "regVals", 0 7; -v0x11fec70_0 .net/s v0x11fec70 0, 10 0, L_0x7fcb83eda018; 1 drivers -v0x11fec70_1 .net/s v0x11fec70 1, 10 0, L_0x12150b0; 1 drivers -v0x11fec70_2 .net/s v0x11fec70 2, 10 0, L_0x1215170; 1 drivers -v0x11fec70_3 .net/s v0x11fec70 3, 10 0, L_0x1215240; 1 drivers -v0x11fec70_4 .net/s v0x11fec70 4, 10 0, L_0x1215310; 1 drivers -v0x11fec70_5 .net/s v0x11fec70 5, 10 0, L_0x1215410; 1 drivers -o0x7fcb83f23eb8 .functor BUFZ 11, C4; HiZ drive -v0x11fec70_6 .net/s v0x11fec70 6, 10 0, o0x7fcb83f23eb8; 0 drivers -o0x7fcb83f23ee8 .functor BUFZ 11, C4; HiZ drive -v0x11fec70_7 .net/s v0x11fec70 7, 10 0, o0x7fcb83f23ee8; 0 drivers -v0x11fee80_0 .net "right", 14 0, L_0x121c460; alias, 1 drivers -v0x11fef60_0 .net "rightOut", 14 0, L_0x1218b40; alias, 1 drivers -o0x7fcb83f23f78 .functor BUFZ 15, C4; HiZ drive -v0x11ff040_0 .net "up", 14 0, o0x7fcb83f23f78; 0 drivers -v0x11ff120_0 .net "upOut", 14 0, L_0x1218080; 1 drivers -v0x11ff200_0 .var "weHaveData", 5 2; -v0x11ff2e0_0 .var "weWantData", 5 2; -v0x11ff3c0_0 .net "writeAckIn", 5 2, L_0x1216c50; 1 drivers -v0x11ff4a0_0 .var "writeAckOut", 5 2; -v0x11ff580_0 .var "writeTarget", 2 0; -v0x11ff660_0 .var/s "writeValue", 10 0; -E_0x11c3a70 .event negedge, v0x11fdba0_0; -E_0x11a1470 .event posedge, v0x11fdba0_0; -L_0x1215170 .part o0x7fcb83f23af8, 0, 11; -L_0x1215240 .part L_0x121c460, 0, 11; -L_0x1215310 .part o0x7fcb83f23f78, 0, 11; -L_0x1215410 .part o0x7fcb83f23a38, 0, 11; -L_0x1215540 .part o0x7fcb83f23af8, 11, 1; -L_0x1215660 .part L_0x121c460, 11, 1; -L_0x12157d0 .part o0x7fcb83f23f78, 11, 1; -L_0x1215870 .concat8 [ 1 1 1 1], L_0x1215540, L_0x1215660, L_0x12157d0, L_0x1215a80; -L_0x1215a80 .part o0x7fcb83f23a38, 11, 1; -L_0x1215bc0 .reduce/or L_0x1215870; -L_0x1215d10 .part o0x7fcb83f23af8, 12, 1; -L_0x1215db0 .part L_0x121c460, 12, 1; -L_0x1215ec0 .part o0x7fcb83f23f78, 12, 1; -L_0x1215f60 .concat8 [ 1 1 1 1], L_0x1215d10, L_0x1215db0, L_0x1215ec0, L_0x1216120; -L_0x1216120 .part o0x7fcb83f23a38, 12, 1; -L_0x1216210 .reduce/or L_0x1215f60; -L_0x1216390 .part o0x7fcb83f23af8, 13, 1; -L_0x12164c0 .part L_0x121c460, 13, 1; -L_0x1216600 .part o0x7fcb83f23f78, 13, 1; -L_0x12166a0 .concat8 [ 1 1 1 1], L_0x1216390, L_0x12164c0, L_0x1216600, L_0x1216560; -L_0x1216560 .part o0x7fcb83f23a38, 13, 1; -L_0x1216980 .reduce/or L_0x12166a0; -L_0x12167f0 .part o0x7fcb83f23af8, 14, 1; -L_0x1216ae0 .part L_0x121c460, 14, 1; -L_0x1216a20 .part o0x7fcb83f23f78, 14, 1; -L_0x1216c50 .concat8 [ 1 1 1 1], L_0x12167f0, L_0x1216ae0, L_0x1216a20, L_0x1216b80; -L_0x1216b80 .part o0x7fcb83f23a38, 14, 1; -L_0x1216f70 .reduce/or L_0x1216c50; -L_0x1216e40 .part v0x11fea10_0, 0, 1; -L_0x1217150 .part v0x11fea10_0, 1, 1; -L_0x1217060 .part v0x11fea10_0, 2, 1; -L_0x1217340 .part v0x11fea10_0, 3, 1; -L_0x1217240 .part v0x11ff4a0_0, 0, 1; -L_0x1217580 .part v0x11ff4a0_0, 1, 1; -L_0x1217470 .part v0x11ff4a0_0, 2, 1; -L_0x1217740 .part v0x11ff4a0_0, 3, 1; -L_0x1217620 .part v0x11ff2e0_0, 0, 1; -L_0x12179a0 .part v0x11ff2e0_0, 1, 1; -L_0x1217870 .part v0x11ff2e0_0, 2, 1; -L_0x1217b80 .part v0x11ff2e0_0, 3, 1; -L_0x1217a40 .part v0x11ff200_0, 0, 1; -L_0x1217d70 .part v0x11ff200_0, 1, 1; -L_0x1217c20 .part v0x11ff200_0, 2, 1; -L_0x1217cc0 .part v0x11ff200_0, 3, 1; -L_0x1217e10 .array/port v0x11fdf00, L_0x1218170; -L_0x1218170 .concat [ 4 2 0 0], v0x11fb0d0_0, L_0x7fcb83eda060; -LS_0x1218080_0_0 .concat8 [ 11 1 1 1], v0x11fe340_2, L_0x1217c20, L_0x1217870, L_0x1217470; -LS_0x1218080_0_4 .concat8 [ 1 0 0 0], L_0x1217060; -L_0x1218080 .concat8 [ 14 1 0 0], LS_0x1218080_0_0, LS_0x1218080_0_4; -LS_0x1218590_0_0 .concat8 [ 11 1 1 1], v0x11fe340_3, L_0x1217cc0, L_0x1217b80, L_0x1217740; -LS_0x1218590_0_4 .concat8 [ 1 0 0 0], L_0x1217340; -L_0x1218590 .concat8 [ 14 1 0 0], LS_0x1218590_0_0, LS_0x1218590_0_4; -LS_0x12182d0_0_0 .concat8 [ 11 1 1 1], v0x11fe340_0, L_0x1217a40, L_0x1217620, L_0x1217240; -LS_0x12182d0_0_4 .concat8 [ 1 0 0 0], L_0x1216e40; -L_0x12182d0 .concat8 [ 14 1 0 0], LS_0x12182d0_0_0, LS_0x12182d0_0_4; -LS_0x1218b40_0_0 .concat8 [ 11 1 1 1], v0x11fe340_1, L_0x1217d70, L_0x12179a0, L_0x1217580; -LS_0x1218b40_0_4 .concat8 [ 1 0 0 0], L_0x1217150; -L_0x1218b40 .concat8 [ 14 1 0 0], LS_0x1218b40_0_0, LS_0x1218b40_0_4; -L_0x1218830 .part L_0x1215e50, 14, 4; -L_0x1218f50 .part L_0x1215e50, 11, 3; -L_0x1218d60 .part L_0x1215e50, 8, 3; -L_0x12191a0 .part L_0x1215e50, 10, 4; -L_0x1218ff0 .part L_0x1215e50, 0, 11; -S_0x11ff8e0 .scope module, "right" "tis100" 2 13, 3 49 0, S_0x11b8110; - .timescale 0 0; - .port_info 0 /INPUT 1 "clk" - .port_info 1 /INPUT 15 "up" - .port_info 2 /INPUT 15 "down" - .port_info 3 /INPUT 15 "left" - .port_info 4 /INPUT 15 "right" - .port_info 5 /OUTPUT 15 "upOut" - .port_info 6 /OUTPUT 15 "downOut" - .port_info 7 /OUTPUT 15 "leftOut" - .port_info 8 /OUTPUT 15 "rightOut" - .port_info 9 /OUTPUT 11 "accOut" -P_0x11ffad0 .param/str "memFile" 0 3 60, "right.dat"; -L_0x1218e90 .functor BUFZ 11, v0x11ffd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1219090 .functor BUFZ 11, v0x11ffd10_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1219f80 .functor BUFZ 18, L_0x121bfa0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x11ffd10_0 .var/s "ACC", 10 0; -v0x11ffe10_0 .var/s "BAK", 10 0; -v0x11ffef0_0 .net "DST", 2 0, L_0x121d150; 1 drivers -v0x11fffb0_0 .net/s "IMM", 10 0, L_0x121d1f0; 1 drivers -v0x1200090_0 .net "INST", 3 0, L_0x121c9b0; 1 drivers -v0x12001c0_0 .net "LABEL", 3 0, L_0x121d3a0; 1 drivers -v0x12002a0_0 .var "PC", 3 0; -v0x1200380_0 .var "PCNEXT", 3 0; -v0x1200460_0 .net "SRC", 2 0, L_0x121cf60; 1 drivers -v0x12005d0_0 .net *"_s103", 0 0, L_0x121b2e0; 1 drivers -v0x12006b0_0 .net *"_s107", 0 0, L_0x121b1f0; 1 drivers -v0x1200790_0 .net *"_s111", 0 0, L_0x121b4d0; 1 drivers -v0x1200870_0 .net *"_s115", 0 0, L_0x121b3d0; 1 drivers -v0x1200950_0 .net *"_s119", 0 0, L_0x121b710; 1 drivers -v0x1200a30_0 .net *"_s123", 0 0, L_0x121b600; 1 drivers -v0x1200b10_0 .net *"_s127", 0 0, L_0x121b8d0; 1 drivers -v0x1200bf0_0 .net *"_s131", 0 0, L_0x121b7b0; 1 drivers -v0x1200da0_0 .net *"_s135", 0 0, L_0x121bb30; 1 drivers -v0x1200e40_0 .net *"_s139", 0 0, L_0x121ba00; 1 drivers -v0x1200f20_0 .net *"_s143", 0 0, L_0x121bd10; 1 drivers -v0x1201000_0 .net *"_s147", 0 0, L_0x121bbd0; 1 drivers -v0x12010e0_0 .net *"_s151", 0 0, L_0x121bf00; 1 drivers -v0x12011c0_0 .net *"_s155", 0 0, L_0x121bdb0; 1 drivers -v0x12012a0_0 .net *"_s159", 0 0, L_0x121be50; 1 drivers -v0x1201380_0 .net *"_s160", 17 0, L_0x121bfa0; 1 drivers -v0x1201460_0 .net *"_s162", 5 0, L_0x121c300; 1 drivers -L_0x7fcb83eda0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1201540_0 .net *"_s165", 1 0, L_0x7fcb83eda0f0; 1 drivers -v0x1203480_2 .array/port v0x1203480, 2; -v0x1201620_0 .net *"_s173", 10 0, v0x1203480_2; 1 drivers -v0x1203480_3 .array/port v0x1203480, 3; -v0x1201700_0 .net *"_s179", 10 0, v0x1203480_3; 1 drivers -v0x1203480_0 .array/port v0x1203480, 0; -v0x12017e0_0 .net *"_s185", 10 0, v0x1203480_0; 1 drivers -v0x1203480_1 .array/port v0x1203480, 1; -v0x12018c0_0 .net *"_s191", 10 0, v0x1203480_1; 1 drivers -v0x12019a0_0 .net *"_s23", 0 0, L_0x12197a0; 1 drivers -v0x1201a80_0 .net *"_s27", 0 0, L_0x1219870; 1 drivers -v0x1200cd0_0 .net *"_s31", 0 0, L_0x1219940; 1 drivers -v0x1201d50_0 .net *"_s36", 0 0, L_0x1219c10; 1 drivers -v0x1201e30_0 .net *"_s42", 0 0, L_0x1219e40; 1 drivers -v0x1201f10_0 .net *"_s46", 0 0, L_0x1219ee0; 1 drivers -v0x1201ff0_0 .net *"_s50", 0 0, L_0x1219ff0; 1 drivers -v0x12020d0_0 .net *"_s55", 0 0, L_0x121a200; 1 drivers -v0x12021b0_0 .net *"_s61", 0 0, L_0x121a470; 1 drivers -v0x1202290_0 .net *"_s65", 0 0, L_0x121a510; 1 drivers -v0x1202370_0 .net *"_s69", 0 0, L_0x121a6e0; 1 drivers -v0x1202450_0 .net *"_s74", 0 0, L_0x121a640; 1 drivers -v0x1202530_0 .net *"_s80", 0 0, L_0x121a8d0; 1 drivers -v0x1202610_0 .net *"_s84", 0 0, L_0x121acd0; 1 drivers -v0x12026f0_0 .net *"_s88", 0 0, L_0x121ab00; 1 drivers -v0x12027d0_0 .net *"_s93", 0 0, L_0x121ad70; 1 drivers -v0x12028b0_0 .net *"_s99", 0 0, L_0x121afd0; 1 drivers -v0x1202990_0 .net/s "accOut", 10 0, L_0x1218e90; alias, 1 drivers -v0x1202a70_0 .net "anyHasData", 0 0, L_0x1219d50; 1 drivers -v0x1202b30_0 .net "anyReadAck", 0 0, L_0x121aa60; 1 drivers -v0x1202bf0_0 .net "anyWantData", 0 0, L_0x121a2f0; 1 drivers -v0x1202cb0_0 .net "anyWriteAck", 0 0, L_0x121b100; 1 drivers -v0x1202d70_0 .net "clk", 0 0, v0x1204dc0_0; alias, 1 drivers -o0x7fcb83f24cc8 .functor BUFZ 15, C4; HiZ drive -v0x1202e10_0 .net "down", 14 0, o0x7fcb83f24cc8; 0 drivers -v0x1202ed0_0 .net "downOut", 14 0, L_0x121c6d0; 1 drivers -v0x1202fb0_0 .net "instruction", 17 0, L_0x1219f80; 1 drivers -v0x1203090 .array "instructions", 0 15, 17 0; -v0x1203150_0 .var "last", 2 0; -v0x1203230_0 .net "left", 14 0, L_0x1218b40; alias, 1 drivers -v0x12032f0_0 .net "leftOut", 14 0, L_0x121c460; alias, 1 drivers -v0x12033c0_0 .var "mode", 2 0; -v0x1203480 .array/s "outVals", 2 5, 10 0; -v0x12035f0_0 .var "phase", 2 0; -v0x12036d0_0 .net "portsHaveData", 5 2, L_0x1219a30; 1 drivers -v0x1201b20_0 .net "portsWantData", 5 2, L_0x121a090; 1 drivers -v0x1201c00_0 .net "readAckIn", 5 2, L_0x121a780; 1 drivers -v0x1203b80_0 .var "readAckOut", 5 2; -v0x1203c20_0 .var "readTarget", 2 0; -v0x1203cc0_0 .var/s "readValue", 10 0; -L_0x7fcb83eda0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1203da0 .array "regVals", 0 7; -v0x1203da0_0 .net/s v0x1203da0 0, 10 0, L_0x7fcb83eda0a8; 1 drivers -v0x1203da0_1 .net/s v0x1203da0 1, 10 0, L_0x1219090; 1 drivers -v0x1203da0_2 .net/s v0x1203da0 2, 10 0, L_0x1219400; 1 drivers -v0x1203da0_3 .net/s v0x1203da0 3, 10 0, L_0x1219530; 1 drivers -v0x1203da0_4 .net/s v0x1203da0 4, 10 0, L_0x12195d0; 1 drivers -v0x1203da0_5 .net/s v0x1203da0 5, 10 0, L_0x1219670; 1 drivers -o0x7fcb83f250e8 .functor BUFZ 11, C4; HiZ drive -v0x1203da0_6 .net/s v0x1203da0 6, 10 0, o0x7fcb83f250e8; 0 drivers -o0x7fcb83f25118 .functor BUFZ 11, C4; HiZ drive -v0x1203da0_7 .net/s v0x1203da0 7, 10 0, o0x7fcb83f25118; 0 drivers -o0x7fcb83f25148 .functor BUFZ 15, C4; HiZ drive -v0x1203fb0_0 .net "right", 14 0, o0x7fcb83f25148; 0 drivers -v0x1204090_0 .net "rightOut", 14 0, L_0x121cd40; 1 drivers -o0x7fcb83f251a8 .functor BUFZ 15, C4; HiZ drive -v0x1204170_0 .net "up", 14 0, o0x7fcb83f251a8; 0 drivers -v0x1204250_0 .net "upOut", 14 0, L_0x121c1e0; 1 drivers -v0x1204330_0 .var "weHaveData", 5 2; -v0x1204410_0 .var "weWantData", 5 2; -v0x12044f0_0 .net "writeAckIn", 5 2, L_0x121ae40; 1 drivers -v0x12045d0_0 .var "writeAckOut", 5 2; -v0x12046b0_0 .var "writeTarget", 2 0; -v0x1204790_0 .var/s "writeValue", 10 0; -L_0x1219400 .part L_0x1218b40, 0, 11; -L_0x1219530 .part o0x7fcb83f25148, 0, 11; -L_0x12195d0 .part o0x7fcb83f251a8, 0, 11; -L_0x1219670 .part o0x7fcb83f24cc8, 0, 11; -L_0x12197a0 .part L_0x1218b40, 11, 1; -L_0x1219870 .part o0x7fcb83f25148, 11, 1; -L_0x1219940 .part o0x7fcb83f251a8, 11, 1; -L_0x1219a30 .concat8 [ 1 1 1 1], L_0x12197a0, L_0x1219870, L_0x1219940, L_0x1219c10; -L_0x1219c10 .part o0x7fcb83f24cc8, 11, 1; -L_0x1219d50 .reduce/or L_0x1219a30; -L_0x1219e40 .part L_0x1218b40, 12, 1; -L_0x1219ee0 .part o0x7fcb83f25148, 12, 1; -L_0x1219ff0 .part o0x7fcb83f251a8, 12, 1; -L_0x121a090 .concat8 [ 1 1 1 1], L_0x1219e40, L_0x1219ee0, L_0x1219ff0, L_0x121a200; -L_0x121a200 .part o0x7fcb83f24cc8, 12, 1; -L_0x121a2f0 .reduce/or L_0x121a090; -L_0x121a470 .part L_0x1218b40, 13, 1; -L_0x121a510 .part o0x7fcb83f25148, 13, 1; -L_0x121a6e0 .part o0x7fcb83f251a8, 13, 1; -L_0x121a780 .concat8 [ 1 1 1 1], L_0x121a470, L_0x121a510, L_0x121a6e0, L_0x121a640; -L_0x121a640 .part o0x7fcb83f24cc8, 13, 1; -L_0x121aa60 .reduce/or L_0x121a780; -L_0x121a8d0 .part L_0x1218b40, 14, 1; -L_0x121acd0 .part o0x7fcb83f25148, 14, 1; -L_0x121ab00 .part o0x7fcb83f251a8, 14, 1; -L_0x121ae40 .concat8 [ 1 1 1 1], L_0x121a8d0, L_0x121acd0, L_0x121ab00, L_0x121ad70; -L_0x121ad70 .part o0x7fcb83f24cc8, 14, 1; -L_0x121b100 .reduce/or L_0x121ae40; -L_0x121afd0 .part v0x1203b80_0, 0, 1; -L_0x121b2e0 .part v0x1203b80_0, 1, 1; -L_0x121b1f0 .part v0x1203b80_0, 2, 1; -L_0x121b4d0 .part v0x1203b80_0, 3, 1; -L_0x121b3d0 .part v0x12045d0_0, 0, 1; -L_0x121b710 .part v0x12045d0_0, 1, 1; -L_0x121b600 .part v0x12045d0_0, 2, 1; -L_0x121b8d0 .part v0x12045d0_0, 3, 1; -L_0x121b7b0 .part v0x1204410_0, 0, 1; -L_0x121bb30 .part v0x1204410_0, 1, 1; -L_0x121ba00 .part v0x1204410_0, 2, 1; -L_0x121bd10 .part v0x1204410_0, 3, 1; -L_0x121bbd0 .part v0x1204330_0, 0, 1; -L_0x121bf00 .part v0x1204330_0, 1, 1; -L_0x121bdb0 .part v0x1204330_0, 2, 1; -L_0x121be50 .part v0x1204330_0, 3, 1; -L_0x121bfa0 .array/port v0x1203090, L_0x121c300; -L_0x121c300 .concat [ 4 2 0 0], v0x12002a0_0, L_0x7fcb83eda0f0; -LS_0x121c1e0_0_0 .concat8 [ 11 1 1 1], v0x1203480_2, L_0x121bdb0, L_0x121ba00, L_0x121b600; -LS_0x121c1e0_0_4 .concat8 [ 1 0 0 0], L_0x121b1f0; -L_0x121c1e0 .concat8 [ 14 1 0 0], LS_0x121c1e0_0_0, LS_0x121c1e0_0_4; -LS_0x121c6d0_0_0 .concat8 [ 11 1 1 1], v0x1203480_3, L_0x121be50, L_0x121bd10, L_0x121b8d0; -LS_0x121c6d0_0_4 .concat8 [ 1 0 0 0], L_0x121b4d0; -L_0x121c6d0 .concat8 [ 14 1 0 0], LS_0x121c6d0_0_0, LS_0x121c6d0_0_4; -LS_0x121c460_0_0 .concat8 [ 11 1 1 1], v0x1203480_0, L_0x121bbd0, L_0x121b7b0, L_0x121b3d0; -LS_0x121c460_0_4 .concat8 [ 1 0 0 0], L_0x121afd0; -L_0x121c460 .concat8 [ 14 1 0 0], LS_0x121c460_0_0, LS_0x121c460_0_4; -LS_0x121cd40_0_0 .concat8 [ 11 1 1 1], v0x1203480_1, L_0x121bf00, L_0x121bb30, L_0x121b710; -LS_0x121cd40_0_4 .concat8 [ 1 0 0 0], L_0x121b2e0; -L_0x121cd40 .concat8 [ 14 1 0 0], LS_0x121cd40_0_0, LS_0x121cd40_0_4; -L_0x121c9b0 .part L_0x1219f80, 14, 4; -L_0x121d150 .part L_0x1219f80, 11, 3; -L_0x121cf60 .part L_0x1219f80, 8, 3; -L_0x121d3a0 .part L_0x1219f80, 10, 4; -L_0x121d1f0 .part L_0x1219f80, 0, 11; - .scope S_0x1154c70; -T_0 ; - %pushi/vec4 0, 0, 3; - %store/vec4 v0x11fe260_0, 0, 3; - %pushi/vec4 0, 0, 3; - %store/vec4 v0x11fe480_0, 0, 3; - %pushi/vec4 0, 0, 3; - %store/vec4 v0x11fdfc0_0, 0, 3; - %pushi/vec4 0, 0, 11; - %store/vec4 v0x11de280_0, 0, 11; - %pushi/vec4 0, 0, 11; - %store/vec4 v0x11fac10_0, 0, 11; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11fb0d0_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11fea10_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11ff2e0_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11ff4a0_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11ff200_0, 0, 4; - %pushi/vec4 0, 0, 11; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x11fe340, 4, 0; - %pushi/vec4 0, 0, 11; - %ix/load 4, 3, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x11fe340, 4, 0; - %pushi/vec4 0, 0, 11; - %ix/load 4, 0, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x11fe340, 4, 0; - %pushi/vec4 0, 0, 11; - %ix/load 4, 1, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x11fe340, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x11b7840, v0x11fdf00 {0 0 0}; - %end; - .thread T_0; - .scope S_0x1154c70; -T_1 ; - %wait E_0x11a1470; - %load/vec4 v0x11fe260_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_1.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_1.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_1.2, 6; - %jmp T_1.3; -T_1.0 ; - %load/vec4 v0x11fe480_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_1.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_1.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_1.6, 6; - %jmp T_1.7; -T_1.4 ; - %load/vec4 v0x11faec0_0; - %pad/u 32; - %cmpi/u 4, 0, 32; - %jmp/0xz T_1.8, 5; - %load/vec4 v0x11fb290_0; - %pad/u 32; - %cmpi/u 2, 0, 32; - %jmp/0xz T_1.10, 5; - %load/vec4 v0x11fb290_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %jmp T_1.11; -T_1.10 ; - %load/vec4 v0x11fb290_0; - %pad/u 32; - %cmpi/u 6, 0, 32; - %jmp/0xz T_1.12, 5; - %load/vec4 v0x11fe560_0; - %load/vec4 v0x11fb290_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_1.14, 8; - %load/vec4 v0x11fb290_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11fb290_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %load/vec4 v0x11fb290_0; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.15; -T_1.14 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11fe260_0, 0; - %load/vec4 v0x11fb290_0; - %assign/vec4 v0x11feab0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11fb290_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; -T_1.15 ; - %jmp T_1.13; -T_1.12 ; - %load/vec4 v0x11fb290_0; - %cmpi/e 6, 0, 3; - %jmp/0xz T_1.16, 4; - %load/vec4 v0x11fdfc0_0; - %cmpi/e 0, 0, 3; - %jmp/0xz T_1.18, 4; - %load/vec4 v0x11fdfc0_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %jmp T_1.19; -T_1.18 ; - %load/vec4 v0x11fe560_0; - %load/vec4 v0x11fdfc0_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_1.20, 8; - %load/vec4 v0x11fdfc0_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11fdfc0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %jmp T_1.21; -T_1.20 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11fe260_0, 0; - %load/vec4 v0x11fdfc0_0; - %assign/vec4 v0x11feab0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11fdfc0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; -T_1.21 ; -T_1.19 ; - %jmp T_1.17; -T_1.16 ; - %load/vec4 v0x11fb290_0; - %cmpi/e 7, 0, 3; - %jmp/0xz T_1.22, 4; - %load/vec4 v0x11fd8a0_0; - %flag_set/vec4 8; - %jmp/0xz T_1.24, 8; - %load/vec4 v0x11fe560_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.26, 8; - %ix/load 4, 4, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.27; -T_1.26 ; - %load/vec4 v0x11fe560_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.28, 8; - %ix/load 4, 5, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.29; -T_1.28 ; - %load/vec4 v0x11fe560_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.30, 8; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.31; -T_1.30 ; - %load/vec4 v0x11fe560_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.32, 8; - %ix/load 4, 3, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; -T_1.32 ; -T_1.31 ; -T_1.29 ; -T_1.27 ; - %jmp T_1.25; -T_1.24 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11fe260_0, 0; - %load/vec4 v0x11fb290_0; - %assign/vec4 v0x11feab0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; -T_1.25 ; -T_1.22 ; -T_1.17 ; -T_1.13 ; -T_1.11 ; -T_1.8 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.7; -T_1.5 ; - %load/vec4 v0x11faec0_0; - %dup/vec4; - %pushi/vec4 0, 0, 4; - %cmp/u; - %jmp/1 T_1.34, 6; - %dup/vec4; - %pushi/vec4 1, 0, 4; - %cmp/u; - %jmp/1 T_1.35, 6; - %dup/vec4; - %pushi/vec4 2, 0, 4; - %cmp/u; - %jmp/1 T_1.36, 6; - %dup/vec4; - %pushi/vec4 3, 0, 4; - %cmp/u; - %jmp/1 T_1.37, 6; - %dup/vec4; - %pushi/vec4 4, 0, 4; - %cmp/u; - %jmp/1 T_1.38, 6; - %dup/vec4; - %pushi/vec4 5, 0, 4; - %cmp/u; - %jmp/1 T_1.39, 6; - %dup/vec4; - %pushi/vec4 6, 0, 4; - %cmp/u; - %jmp/1 T_1.40, 6; - %dup/vec4; - %pushi/vec4 7, 0, 4; - %cmp/u; - %jmp/1 T_1.41, 6; - %dup/vec4; - %pushi/vec4 8, 0, 4; - %cmp/u; - %jmp/1 T_1.42, 6; - %dup/vec4; - %pushi/vec4 9, 0, 4; - %cmp/u; - %jmp/1 T_1.43, 6; - %dup/vec4; - %pushi/vec4 10, 0, 4; - %cmp/u; - %jmp/1 T_1.44, 6; - %dup/vec4; - %pushi/vec4 11, 0, 4; - %cmp/u; - %jmp/1 T_1.45, 6; - %dup/vec4; - %pushi/vec4 12, 0, 4; - %cmp/u; - %jmp/1 T_1.46, 6; - %dup/vec4; - %pushi/vec4 13, 0, 4; - %cmp/u; - %jmp/1 T_1.47, 6; - %dup/vec4; - %pushi/vec4 14, 0, 4; - %cmp/u; - %jmp/1 T_1.48, 6; - %dup/vec4; - %pushi/vec4 15, 0, 4; - %cmp/u; - %jmp/1 T_1.49, 6; - %jmp T_1.50; -T_1.34 ; - %load/vec4 v0x11de280_0; - %load/vec4 v0x11feb90_0; - %add; - %assign/vec4 v0x11de280_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.35 ; - %load/vec4 v0x11de280_0; - %load/vec4 v0x11feb90_0; - %sub; - %assign/vec4 v0x11de280_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.36 ; - %load/vec4 v0x11fb0d0_0; - %pad/u 11; - %load/vec4 v0x11feb90_0; - %add; - %pad/u 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.37 ; - %load/vec4 v0x11feb90_0; - %assign/vec4 v0x11ff660_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.38 ; - %vpi_call 3 278 "$display", "here" {0 0 0}; - %load/vec4 v0x11fade0_0; - %assign/vec4 v0x11ff660_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.39 ; - %load/vec4 v0x11de280_0; - %load/vec4 v0x11fade0_0; - %add; - %assign/vec4 v0x11de280_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.40 ; - %load/vec4 v0x11de280_0; - %load/vec4 v0x11fade0_0; - %sub; - %assign/vec4 v0x11de280_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.41 ; - %load/vec4 v0x11fb0d0_0; - %pad/u 11; - %load/vec4 v0x11fade0_0; - %add; - %pad/u 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.42 ; - %load/vec4 v0x11fac10_0; - %assign/vec4 v0x11de280_0, 0; - %load/vec4 v0x11de280_0; - %assign/vec4 v0x11fac10_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.43 ; - %load/vec4 v0x11de280_0; - %assign/vec4 v0x11fac10_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.44 ; - %load/vec4 v0x11de280_0; - %inv; - %pushi/vec4 1, 0, 11; - %add; - %assign/vec4 v0x11de280_0, 0; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.45 ; - %load/vec4 v0x11faff0_0; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.50; -T_1.46 ; - %load/vec4 v0x11de280_0; - %pad/s 32; - %cmpi/e 0, 0, 32; - %jmp/0xz T_1.51, 4; - %load/vec4 v0x11faff0_0; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.52; -T_1.51 ; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; -T_1.52 ; - %jmp T_1.50; -T_1.47 ; - %load/vec4 v0x11de280_0; - %pad/s 32; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_1.53, 4; - %load/vec4 v0x11faff0_0; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.54; -T_1.53 ; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; -T_1.54 ; - %jmp T_1.50; -T_1.48 ; - %pushi/vec4 0, 0, 32; - %load/vec4 v0x11de280_0; - %pad/s 32; - %cmp/s; - %jmp/0xz T_1.55, 5; - %load/vec4 v0x11faff0_0; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.56; -T_1.55 ; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; -T_1.56 ; - %jmp T_1.50; -T_1.49 ; - %load/vec4 v0x11de280_0; - %pad/s 32; - %cmpi/s 0, 0, 32; - %jmp/0xz T_1.57, 5; - %load/vec4 v0x11faff0_0; - %assign/vec4 v0x11fb1b0_0, 0; - %jmp T_1.58; -T_1.57 ; - %load/vec4 v0x11fb0d0_0; - %addi 1, 0, 4; - %assign/vec4 v0x11fb1b0_0, 0; -T_1.58 ; - %jmp T_1.50; -T_1.50 ; - %pop/vec4 1; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.7; -T_1.6 ; - %load/vec4 v0x11faec0_0; - %cmpi/e 3, 0, 4; - %flag_mov 8, 4; - %load/vec4 v0x11faec0_0; - %cmpi/e 4, 0, 4; - %flag_or 4, 8; - %jmp/0xz T_1.59, 4; - %load/vec4 v0x11facf0_0; - %pad/u 32; - %cmpi/u 2, 0, 32; - %flag_mov 8, 5; - %load/vec4 v0x11facf0_0; - %pushi/vec4 6, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0x11fdfc0_0; - %pushi/vec4 0, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_1.61, 9; - %load/vec4 v0x11facf0_0; - %cmpi/e 1, 0, 3; - %jmp/0xz T_1.63, 4; - %load/vec4 v0x11ff660_0; - %assign/vec4 v0x11de280_0, 0; -T_1.63 ; - %jmp T_1.62; -T_1.61 ; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fe260_0, 0; - %load/vec4 v0x11facf0_0; - %cmpi/e 6, 0, 3; - %jmp/0xz T_1.65, 4; - %load/vec4 v0x11fdfc0_0; - %assign/vec4 v0x11ff580_0, 0; - %load/vec4 v0x11ff660_0; - %load/vec4 v0x11fdfc0_0; - %pad/u 4; - %subi 2, 0, 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11fdfc0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %jmp T_1.66; -T_1.65 ; - %load/vec4 v0x11facf0_0; - %cmpi/ne 7, 0, 3; - %jmp/0xz T_1.67, 4; - %load/vec4 v0x11facf0_0; - %assign/vec4 v0x11ff580_0, 0; - %load/vec4 v0x11ff660_0; - %load/vec4 v0x11facf0_0; - %pad/u 4; - %subi 2, 0, 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11facf0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11facf0_0; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.68; -T_1.67 ; - %load/vec4 v0x11fda20_0; - %flag_set/vec4 8; - %jmp/0xz T_1.69, 8; - %load/vec4 v0x11fc950_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.71, 8; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 2, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.72; -T_1.71 ; - %load/vec4 v0x11fc950_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.73, 8; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 3, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.74; -T_1.73 ; - %load/vec4 v0x11fc950_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.75, 8; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 0, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.76; -T_1.75 ; - %load/vec4 v0x11fc950_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.77, 8; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 1, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; -T_1.77 ; -T_1.76 ; -T_1.74 ; -T_1.72 ; - %jmp T_1.70; -T_1.69 ; - %load/vec4 v0x11facf0_0; - %assign/vec4 v0x11ff580_0, 0; -T_1.70 ; -T_1.68 ; -T_1.66 ; -T_1.62 ; -T_1.59 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.7; -T_1.7 ; - %pop/vec4 1; - %jmp T_1.3; -T_1.1 ; - %load/vec4 v0x11fe480_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_1.79, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_1.80, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_1.81, 6; - %jmp T_1.82; -T_1.79 ; - %load/vec4 v0x11feab0_0; - %cmpi/e 7, 0, 3; - %jmp/0xz T_1.83, 4; - %load/vec4 v0x11fd8a0_0; - %flag_set/vec4 8; - %jmp/0xz T_1.85, 8; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11fe260_0, 0; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11ff2e0_0, 0, 4; - %load/vec4 v0x11fe560_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.87, 8; - %ix/load 4, 4, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.88; -T_1.87 ; - %load/vec4 v0x11fe560_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.89, 8; - %ix/load 4, 5, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.90; -T_1.89 ; - %load/vec4 v0x11fe560_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.91, 8; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.92; -T_1.91 ; - %load/vec4 v0x11fe560_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.93, 8; - %ix/load 4, 3, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; -T_1.93 ; -T_1.92 ; -T_1.90 ; -T_1.88 ; -T_1.85 ; - %jmp T_1.84; -T_1.83 ; - %load/vec4 v0x11fe560_0; - %load/vec4 v0x11feab0_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_1.95, 8; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11fe260_0, 0; - %load/vec4 v0x11feab0_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x11fec70, 4; - %assign/vec4 v0x11feb90_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11feab0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11fea10_0, 4, 5; - %pushi/vec4 0, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11feab0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x11ff2e0_0, 4, 5; - %load/vec4 v0x11feab0_0; - %assign/vec4 v0x11fdfc0_0, 0; -T_1.95 ; -T_1.84 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.82; -T_1.80 ; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.82; -T_1.81 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.82; -T_1.82 ; - %pop/vec4 1; - %jmp T_1.3; -T_1.2 ; - %load/vec4 v0x11fe480_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_1.97, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_1.98, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_1.99, 6; - %jmp T_1.100; -T_1.97 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.100; -T_1.98 ; - %load/vec4 v0x11ff580_0; - %cmpi/e 7, 0, 3; - %jmp/0xz T_1.101, 4; - %load/vec4 v0x11fda20_0; - %flag_set/vec4 8; - %jmp/0xz T_1.103, 8; - %load/vec4 v0x11fc950_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.105, 8; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 2, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.106; -T_1.105 ; - %load/vec4 v0x11fc950_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_1.107, 8; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 3, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.108; -T_1.107 ; - %load/vec4 v0x11fc950_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.109, 8; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 0, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; - %jmp T_1.110; -T_1.109 ; - %load/vec4 v0x11fc950_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_1.111, 8; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11ff580_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x11ff200_0, 4, 5; - %load/vec4 v0x11ff660_0; - %ix/load 3, 1, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x11fe340, 0, 4; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x11fdfc0_0, 0; -T_1.111 ; -T_1.110 ; -T_1.108 ; -T_1.106 ; -T_1.103 ; -T_1.101 ; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.100; -T_1.99 ; - %load/vec4 v0x11ff580_0; - %cmpi/ne 7, 0, 3; - %jmp/0xz T_1.113, 4; - %load/vec4 v0x11ff3c0_0; - %load/vec4 v0x11ff580_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_1.115, 8; - %pushi/vec4 0, 0, 1; - %load/vec4 v0x11ff580_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %store/vec4 v0x11ff200_0, 4, 1; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11fe260_0, 0; -T_1.115 ; -T_1.113 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x11fe480_0, 0; - %jmp T_1.100; -T_1.100 ; - %pop/vec4 1; - %jmp T_1.3; -T_1.3 ; - %pop/vec4 1; - %jmp T_1; - .thread T_1; - .scope S_0x1154c70; -T_2 ; - %wait E_0x11c3a70; - %load/vec4 v0x11fe480_0; - %pushi/vec4 0, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0x11fe260_0; - %pushi/vec4 0, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %and; - %load/vec4 v0x11fb1b0_0; - %xor/r; - %pushi/vec4 1, 1, 1; - %cmp/e; - %flag_get/vec4 6; - %inv; - %and; - %flag_set/vec4 8; - %jmp/0xz T_2.0, 8; - %load/vec4 v0x11fb1b0_0; - %assign/vec4 v0x11fb0d0_0, 0; -T_2.0 ; - %load/vec4 v0x11fe480_0; - %cmpi/e 0, 0, 3; - %jmp/0xz T_2.2, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x11fea10_0, 0, 4; -T_2.2 ; - %jmp T_2; - .thread T_2; - .scope S_0x11ff8e0; -T_3 ; - %pushi/vec4 0, 0, 3; - %store/vec4 v0x12033c0_0, 0, 3; - %pushi/vec4 0, 0, 3; - %store/vec4 v0x12035f0_0, 0, 3; - %pushi/vec4 0, 0, 3; - %store/vec4 v0x1203150_0, 0, 3; - %pushi/vec4 0, 0, 11; - %store/vec4 v0x11ffd10_0, 0, 11; - %pushi/vec4 0, 0, 11; - %store/vec4 v0x11ffe10_0, 0, 11; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x12002a0_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x1203b80_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x1204410_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x12045d0_0, 0, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x1204330_0, 0, 4; - %pushi/vec4 0, 0, 11; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1203480, 4, 0; - %pushi/vec4 0, 0, 11; - %ix/load 4, 3, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1203480, 4, 0; - %pushi/vec4 0, 0, 11; - %ix/load 4, 0, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1203480, 4, 0; - %pushi/vec4 0, 0, 11; - %ix/load 4, 1, 0; - %flag_set/imm 4, 0; - %store/vec4a v0x1203480, 4, 0; - %vpi_call 3 185 "$readmemb", P_0x11ffad0, v0x1203090 {0 0 0}; - %end; - .thread T_3; - .scope S_0x11ff8e0; -T_4 ; - %wait E_0x11a1470; - %load/vec4 v0x12033c0_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_4.0, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_4.1, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_4.2, 6; - %jmp T_4.3; -T_4.0 ; - %load/vec4 v0x12035f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_4.4, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_4.5, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_4.6, 6; - %jmp T_4.7; -T_4.4 ; - %load/vec4 v0x1200090_0; - %pad/u 32; - %cmpi/u 4, 0, 32; - %jmp/0xz T_4.8, 5; - %load/vec4 v0x1200460_0; - %pad/u 32; - %cmpi/u 2, 0, 32; - %jmp/0xz T_4.10, 5; - %load/vec4 v0x1200460_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %jmp T_4.11; -T_4.10 ; - %load/vec4 v0x1200460_0; - %pad/u 32; - %cmpi/u 6, 0, 32; - %jmp/0xz T_4.12, 5; - %load/vec4 v0x12036d0_0; - %load/vec4 v0x1200460_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_4.14, 8; - %load/vec4 v0x1200460_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1200460_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %load/vec4 v0x1200460_0; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.15; -T_4.14 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12033c0_0, 0; - %load/vec4 v0x1200460_0; - %assign/vec4 v0x1203c20_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1200460_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1204410_0, 4, 5; -T_4.15 ; - %jmp T_4.13; -T_4.12 ; - %load/vec4 v0x1200460_0; - %cmpi/e 6, 0, 3; - %jmp/0xz T_4.16, 4; - %load/vec4 v0x1203150_0; - %cmpi/e 0, 0, 3; - %jmp/0xz T_4.18, 4; - %load/vec4 v0x1203150_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %jmp T_4.19; -T_4.18 ; - %load/vec4 v0x12036d0_0; - %load/vec4 v0x1203150_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_4.20, 8; - %load/vec4 v0x1203150_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1203150_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %jmp T_4.21; -T_4.20 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12033c0_0, 0; - %load/vec4 v0x1203150_0; - %assign/vec4 v0x1203c20_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1203150_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1204410_0, 4, 5; -T_4.21 ; -T_4.19 ; - %jmp T_4.17; -T_4.16 ; - %load/vec4 v0x1200460_0; - %cmpi/e 7, 0, 3; - %jmp/0xz T_4.22, 4; - %load/vec4 v0x1202a70_0; - %flag_set/vec4 8; - %jmp/0xz T_4.24, 8; - %load/vec4 v0x12036d0_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.26, 8; - %ix/load 4, 4, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.27; -T_4.26 ; - %load/vec4 v0x12036d0_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.28, 8; - %ix/load 4, 5, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.29; -T_4.28 ; - %load/vec4 v0x12036d0_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.30, 8; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.31; -T_4.30 ; - %load/vec4 v0x12036d0_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.32, 8; - %ix/load 4, 3, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1203150_0, 0; -T_4.32 ; -T_4.31 ; -T_4.29 ; -T_4.27 ; - %jmp T_4.25; -T_4.24 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12033c0_0, 0; - %load/vec4 v0x1200460_0; - %assign/vec4 v0x1203c20_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204410_0, 4, 5; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204410_0, 4, 5; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204410_0, 4, 5; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204410_0, 4, 5; -T_4.25 ; -T_4.22 ; -T_4.17 ; -T_4.13 ; -T_4.11 ; -T_4.8 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.7; -T_4.5 ; - %load/vec4 v0x1200090_0; - %dup/vec4; - %pushi/vec4 0, 0, 4; - %cmp/u; - %jmp/1 T_4.34, 6; - %dup/vec4; - %pushi/vec4 1, 0, 4; - %cmp/u; - %jmp/1 T_4.35, 6; - %dup/vec4; - %pushi/vec4 2, 0, 4; - %cmp/u; - %jmp/1 T_4.36, 6; - %dup/vec4; - %pushi/vec4 3, 0, 4; - %cmp/u; - %jmp/1 T_4.37, 6; - %dup/vec4; - %pushi/vec4 4, 0, 4; - %cmp/u; - %jmp/1 T_4.38, 6; - %dup/vec4; - %pushi/vec4 5, 0, 4; - %cmp/u; - %jmp/1 T_4.39, 6; - %dup/vec4; - %pushi/vec4 6, 0, 4; - %cmp/u; - %jmp/1 T_4.40, 6; - %dup/vec4; - %pushi/vec4 7, 0, 4; - %cmp/u; - %jmp/1 T_4.41, 6; - %dup/vec4; - %pushi/vec4 8, 0, 4; - %cmp/u; - %jmp/1 T_4.42, 6; - %dup/vec4; - %pushi/vec4 9, 0, 4; - %cmp/u; - %jmp/1 T_4.43, 6; - %dup/vec4; - %pushi/vec4 10, 0, 4; - %cmp/u; - %jmp/1 T_4.44, 6; - %dup/vec4; - %pushi/vec4 11, 0, 4; - %cmp/u; - %jmp/1 T_4.45, 6; - %dup/vec4; - %pushi/vec4 12, 0, 4; - %cmp/u; - %jmp/1 T_4.46, 6; - %dup/vec4; - %pushi/vec4 13, 0, 4; - %cmp/u; - %jmp/1 T_4.47, 6; - %dup/vec4; - %pushi/vec4 14, 0, 4; - %cmp/u; - %jmp/1 T_4.48, 6; - %dup/vec4; - %pushi/vec4 15, 0, 4; - %cmp/u; - %jmp/1 T_4.49, 6; - %jmp T_4.50; -T_4.34 ; - %load/vec4 v0x11ffd10_0; - %load/vec4 v0x1203cc0_0; - %add; - %assign/vec4 v0x11ffd10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.35 ; - %load/vec4 v0x11ffd10_0; - %load/vec4 v0x1203cc0_0; - %sub; - %assign/vec4 v0x11ffd10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.36 ; - %load/vec4 v0x12002a0_0; - %pad/u 11; - %load/vec4 v0x1203cc0_0; - %add; - %pad/u 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.37 ; - %load/vec4 v0x1203cc0_0; - %assign/vec4 v0x1204790_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.38 ; - %vpi_call 3 278 "$display", "here" {0 0 0}; - %load/vec4 v0x11fffb0_0; - %assign/vec4 v0x1204790_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.39 ; - %load/vec4 v0x11ffd10_0; - %load/vec4 v0x11fffb0_0; - %add; - %assign/vec4 v0x11ffd10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.40 ; - %load/vec4 v0x11ffd10_0; - %load/vec4 v0x11fffb0_0; - %sub; - %assign/vec4 v0x11ffd10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.41 ; - %load/vec4 v0x12002a0_0; - %pad/u 11; - %load/vec4 v0x11fffb0_0; - %add; - %pad/u 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.42 ; - %load/vec4 v0x11ffe10_0; - %assign/vec4 v0x11ffd10_0, 0; - %load/vec4 v0x11ffd10_0; - %assign/vec4 v0x11ffe10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.43 ; - %load/vec4 v0x11ffd10_0; - %assign/vec4 v0x11ffe10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.44 ; - %load/vec4 v0x11ffd10_0; - %inv; - %pushi/vec4 1, 0, 11; - %add; - %assign/vec4 v0x11ffd10_0, 0; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.45 ; - %load/vec4 v0x12001c0_0; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.50; -T_4.46 ; - %load/vec4 v0x11ffd10_0; - %pad/s 32; - %cmpi/e 0, 0, 32; - %jmp/0xz T_4.51, 4; - %load/vec4 v0x12001c0_0; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.52; -T_4.51 ; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; -T_4.52 ; - %jmp T_4.50; -T_4.47 ; - %load/vec4 v0x11ffd10_0; - %pad/s 32; - %cmpi/ne 0, 0, 32; - %jmp/0xz T_4.53, 4; - %load/vec4 v0x12001c0_0; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.54; -T_4.53 ; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; -T_4.54 ; - %jmp T_4.50; -T_4.48 ; - %pushi/vec4 0, 0, 32; - %load/vec4 v0x11ffd10_0; - %pad/s 32; - %cmp/s; - %jmp/0xz T_4.55, 5; - %load/vec4 v0x12001c0_0; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.56; -T_4.55 ; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; -T_4.56 ; - %jmp T_4.50; -T_4.49 ; - %load/vec4 v0x11ffd10_0; - %pad/s 32; - %cmpi/s 0, 0, 32; - %jmp/0xz T_4.57, 5; - %load/vec4 v0x12001c0_0; - %assign/vec4 v0x1200380_0, 0; - %jmp T_4.58; -T_4.57 ; - %load/vec4 v0x12002a0_0; - %addi 1, 0, 4; - %assign/vec4 v0x1200380_0, 0; -T_4.58 ; - %jmp T_4.50; -T_4.50 ; - %pop/vec4 1; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.7; -T_4.6 ; - %load/vec4 v0x1200090_0; - %cmpi/e 3, 0, 4; - %flag_mov 8, 4; - %load/vec4 v0x1200090_0; - %cmpi/e 4, 0, 4; - %flag_or 4, 8; - %jmp/0xz T_4.59, 4; - %load/vec4 v0x11ffef0_0; - %pad/u 32; - %cmpi/u 2, 0, 32; - %flag_mov 8, 5; - %load/vec4 v0x11ffef0_0; - %pushi/vec4 6, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0x1203150_0; - %pushi/vec4 0, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %and; - %flag_set/vec4 9; - %flag_or 9, 8; - %jmp/0xz T_4.61, 9; - %load/vec4 v0x11ffef0_0; - %cmpi/e 1, 0, 3; - %jmp/0xz T_4.63, 4; - %load/vec4 v0x1204790_0; - %assign/vec4 v0x11ffd10_0, 0; -T_4.63 ; - %jmp T_4.62; -T_4.61 ; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12033c0_0, 0; - %load/vec4 v0x11ffef0_0; - %cmpi/e 6, 0, 3; - %jmp/0xz T_4.65, 4; - %load/vec4 v0x1203150_0; - %assign/vec4 v0x12046b0_0, 0; - %load/vec4 v0x1204790_0; - %load/vec4 v0x1203150_0; - %pad/u 4; - %subi 2, 0, 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1203150_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %jmp T_4.66; -T_4.65 ; - %load/vec4 v0x11ffef0_0; - %cmpi/ne 7, 0, 3; - %jmp/0xz T_4.67, 4; - %load/vec4 v0x11ffef0_0; - %assign/vec4 v0x12046b0_0, 0; - %load/vec4 v0x1204790_0; - %load/vec4 v0x11ffef0_0; - %pad/u 4; - %subi 2, 0, 4; - %ix/vec4 3; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x11ffef0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x11ffef0_0; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.68; -T_4.67 ; - %load/vec4 v0x1202bf0_0; - %flag_set/vec4 8; - %jmp/0xz T_4.69, 8; - %load/vec4 v0x1201b20_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.71, 8; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 2, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.72; -T_4.71 ; - %load/vec4 v0x1201b20_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.73, 8; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 3, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.74; -T_4.73 ; - %load/vec4 v0x1201b20_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.75, 8; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 0, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.76; -T_4.75 ; - %load/vec4 v0x1201b20_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.77, 8; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 1, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1203150_0, 0; -T_4.77 ; -T_4.76 ; -T_4.74 ; -T_4.72 ; - %jmp T_4.70; -T_4.69 ; - %load/vec4 v0x11ffef0_0; - %assign/vec4 v0x12046b0_0, 0; -T_4.70 ; -T_4.68 ; -T_4.66 ; -T_4.62 ; -T_4.59 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.7; -T_4.7 ; - %pop/vec4 1; - %jmp T_4.3; -T_4.1 ; - %load/vec4 v0x12035f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_4.79, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_4.80, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_4.81, 6; - %jmp T_4.82; -T_4.79 ; - %load/vec4 v0x1203c20_0; - %cmpi/e 7, 0, 3; - %jmp/0xz T_4.83, 4; - %load/vec4 v0x1202a70_0; - %flag_set/vec4 8; - %jmp/0xz T_4.85, 8; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12033c0_0, 0; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x1204410_0, 0, 4; - %load/vec4 v0x12036d0_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.87, 8; - %ix/load 4, 4, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.88; -T_4.87 ; - %load/vec4 v0x12036d0_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.89, 8; - %ix/load 4, 5, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.90; -T_4.89 ; - %load/vec4 v0x12036d0_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.91, 8; - %ix/load 4, 2, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.92; -T_4.91 ; - %load/vec4 v0x12036d0_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.93, 8; - %ix/load 4, 3, 0; - %flag_set/imm 4, 0; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1203150_0, 0; -T_4.93 ; -T_4.92 ; -T_4.90 ; -T_4.88 ; -T_4.85 ; - %jmp T_4.84; -T_4.83 ; - %load/vec4 v0x12036d0_0; - %load/vec4 v0x1203c20_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_4.95, 8; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12033c0_0, 0; - %load/vec4 v0x1203c20_0; - %pad/u 5; - %ix/vec4 4; - %load/vec4a v0x1203da0, 4; - %assign/vec4 v0x1203cc0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1203c20_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1203b80_0, 4, 5; - %pushi/vec4 0, 0, 1; - %ix/load 5, 0, 0; - %load/vec4 v0x1203c20_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %assign/vec4/off/d v0x1204410_0, 4, 5; - %load/vec4 v0x1203c20_0; - %assign/vec4 v0x1203150_0, 0; -T_4.95 ; -T_4.84 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.82; -T_4.80 ; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.82; -T_4.81 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.82; -T_4.82 ; - %pop/vec4 1; - %jmp T_4.3; -T_4.2 ; - %load/vec4 v0x12035f0_0; - %dup/vec4; - %pushi/vec4 0, 0, 3; - %cmp/u; - %jmp/1 T_4.97, 6; - %dup/vec4; - %pushi/vec4 1, 0, 3; - %cmp/u; - %jmp/1 T_4.98, 6; - %dup/vec4; - %pushi/vec4 2, 0, 3; - %cmp/u; - %jmp/1 T_4.99, 6; - %jmp T_4.100; -T_4.97 ; - %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.100; -T_4.98 ; - %load/vec4 v0x12046b0_0; - %cmpi/e 7, 0, 3; - %jmp/0xz T_4.101, 4; - %load/vec4 v0x1202bf0_0; - %flag_set/vec4 8; - %jmp/0xz T_4.103, 8; - %load/vec4 v0x1201b20_0; - %parti/s 1, 2, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.105, 8; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 2, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 2, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.106; -T_4.105 ; - %load/vec4 v0x1201b20_0; - %parti/s 1, 3, 3; - %flag_set/vec4 8; - %jmp/0xz T_4.107, 8; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 3, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 3, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.108; -T_4.107 ; - %load/vec4 v0x1201b20_0; - %parti/s 1, 0, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.109, 8; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 0, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 0, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1203150_0, 0; - %jmp T_4.110; -T_4.109 ; - %load/vec4 v0x1201b20_0; - %parti/s 1, 1, 2; - %flag_set/vec4 8; - %jmp/0xz T_4.111, 8; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x12046b0_0, 0; - %pushi/vec4 1, 0, 1; - %ix/load 4, 1, 0; - %ix/load 5, 0, 0; - %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1204330_0, 4, 5; - %load/vec4 v0x1204790_0; - %ix/load 3, 1, 0; - %flag_set/imm 4, 0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1203480, 0, 4; - %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1203150_0, 0; -T_4.111 ; -T_4.110 ; -T_4.108 ; -T_4.106 ; -T_4.103 ; -T_4.101 ; - %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.100; -T_4.99 ; - %load/vec4 v0x12046b0_0; - %cmpi/ne 7, 0, 3; - %jmp/0xz T_4.113, 4; - %load/vec4 v0x12044f0_0; - %load/vec4 v0x12046b0_0; - %pad/u 5; - %subi 2, 0, 5; - %part/s 1; - %flag_set/vec4 8; - %jmp/0xz T_4.115, 8; - %pushi/vec4 0, 0, 1; - %load/vec4 v0x12046b0_0; - %pad/u 5; - %subi 2, 0, 5; - %ix/vec4/s 4; - %store/vec4 v0x1204330_0, 4, 1; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12033c0_0, 0; -T_4.115 ; -T_4.113 ; - %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12035f0_0, 0; - %jmp T_4.100; -T_4.100 ; - %pop/vec4 1; - %jmp T_4.3; -T_4.3 ; - %pop/vec4 1; - %jmp T_4; - .thread T_4; - .scope S_0x11ff8e0; -T_5 ; - %wait E_0x11c3a70; - %load/vec4 v0x12035f0_0; - %pushi/vec4 0, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %load/vec4 v0x12033c0_0; - %pushi/vec4 0, 0, 3; - %cmp/e; - %flag_get/vec4 4; - %and; - %load/vec4 v0x1200380_0; - %xor/r; - %pushi/vec4 1, 1, 1; - %cmp/e; - %flag_get/vec4 6; - %inv; - %and; - %flag_set/vec4 8; - %jmp/0xz T_5.0, 8; - %load/vec4 v0x1200380_0; - %assign/vec4 v0x12002a0_0, 0; -T_5.0 ; - %load/vec4 v0x12035f0_0; - %cmpi/e 0, 0, 3; - %jmp/0xz T_5.2, 4; - %pushi/vec4 0, 0, 4; - %store/vec4 v0x1203b80_0, 0, 4; -T_5.2 ; - %jmp T_5; - .thread T_5; - .scope S_0x11b8110; -T_6 ; - %pushi/vec4 0, 0, 33; - %store/vec4 v0x1204f00_0, 0, 33; - %pushi/vec4 0, 0, 33; - %store/vec4 v0x1204f00_0, 0, 33; -T_6.0 ; - %load/vec4 v0x1204f00_0; - %cmpi/u 100, 0, 33; - %jmp/0xz T_6.1, 5; - %pushi/vec4 0, 0, 1; - %store/vec4 v0x1204dc0_0, 0, 1; - %delay 1, 0; - %pushi/vec4 1, 0, 1; - %store/vec4 v0x1204dc0_0, 0, 1; - %delay 1, 0; - %pushi/vec4 0, 0, 1; - %store/vec4 v0x1204dc0_0, 0, 1; - %delay 1, 0; - %pushi/vec4 1, 0, 1; - %store/vec4 v0x1204dc0_0, 0, 1; - %delay 1, 0; - %pushi/vec4 0, 0, 1; - %store/vec4 v0x1204dc0_0, 0, 1; - %delay 1, 0; - %pushi/vec4 1, 0, 1; - %store/vec4 v0x1204dc0_0, 0, 1; - %delay 1, 0; - %vpi_call 2 24 "$display", "accLeft = %d \012accRight= %d\012", v0x1204c50_0, v0x1204cf0_0 {0 0 0}; - %load/vec4 v0x1204f00_0; - %addi 1, 0, 33; - %store/vec4 v0x1204f00_0, 0, 33; - %jmp T_6.0; -T_6.1 ; - %end; - .thread T_6; -# The file index is used to find the file name in the following table. -:file_names 4; - "N/A"; - ""; - "tis100.t.v"; - "./tis100.v"; diff --git a/test.vcd b/test.vcd index 362cc40..0a06cdb 100644 --- a/test.vcd +++ b/test.vcd @@ -1,5 +1,5 @@ $date - Mon Dec 11 21:06:40 2017 + Mon Dec 11 22:36:46 2017 $end $version Icarus Verilog diff --git a/tis100.v b/tis100.v index 02e539f..b91635f 100644 --- a/tis100.v +++ b/tis100.v @@ -58,6 +58,8 @@ module tis100(input clk, output signed[10:0] accOut); parameter memFile = "memory.dat"; +parameter debug = 0; + //internal registers reg[2:0] mode; @@ -330,6 +332,9 @@ always @(posedge clk) begin if(DST < 2 || (DST == `LAST_ADDR && last == `NIL_ADDR)) begin//DST is a register if(DST == `ACC_ADDR) begin ACC <= writeValue; + if(debug) begin + $display("ACC = %d", writeValue); + end end end//dst is a register else begin//dst is a port or pseudo port From 5b309774daadb3629a446a09cad894733c8786b4 Mon Sep 17 00:00:00 2001 From: Henry Rachootin Date: Mon, 11 Dec 2017 22:53:26 -0500 Subject: [PATCH 10/14] cleaned up test --- anyRead/test | 4801 +++++++++++++------------- anyRead/test.v | 1 - anyWrite/test | 4800 +++++++++++++------------- demo/demo | 8733 ++++++++++++++++++++++++------------------------ jumpTest/test | 4810 +++++++++++++------------- regTest/test | 4810 +++++++++++++------------- 6 files changed, 13976 insertions(+), 13979 deletions(-) diff --git a/anyRead/test b/anyRead/test index 4cafcea..4324403 100755 --- a/anyRead/test +++ b/anyRead/test @@ -6,22 +6,22 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x11b0b30 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x2901970 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x127e5a0_0 .net "C2D", 14 0, L_0x12a2b90; 1 drivers -v0x127e6d0_0 .net "C2L", 14 0, L_0x12a28b0; 1 drivers -v0x127e7e0_0 .net "C2R", 14 0, L_0x12a3280; 1 drivers -v0x127e8d0_0 .net "C2U", 14 0, L_0x12a25e0; 1 drivers -v0x127e9e0_0 .net "D2C", 14 0, L_0x129e3b0; 1 drivers -v0x127eb40_0 .net "L2C", 14 0, L_0x1292cc0; 1 drivers -v0x127ec50_0 .net "R2C", 14 0, L_0x1296460; 1 drivers -v0x127ed60_0 .net "U2C", 14 0, L_0x129a800; 1 drivers -v0x127ee70_0 .net/s "accOutCenter", 10 0, L_0x129f1e0; 1 drivers -v0x127efc0_0 .var "clk", 0 0; -v0x127f060_0 .var "dutPassed", 0 0; -v0x127f100 .array/s "expected", 6 0, 10 0; -v0x127f1c0_0 .var "i", 32 0; -S_0x12003b0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x11b0b30; +v0x29cf1f0_0 .net "C2D", 14 0, L_0x29f37e0; 1 drivers +v0x29cf320_0 .net "C2L", 14 0, L_0x29f3500; 1 drivers +v0x29cf430_0 .net "C2R", 14 0, L_0x29f3ed0; 1 drivers +v0x29cf520_0 .net "C2U", 14 0, L_0x29f3230; 1 drivers +v0x29cf630_0 .net "D2C", 14 0, L_0x29ef000; 1 drivers +v0x29cf790_0 .net "L2C", 14 0, L_0x29e37e0; 1 drivers +v0x29cf8a0_0 .net "R2C", 14 0, L_0x29e70f0; 1 drivers +v0x29cf9b0_0 .net "U2C", 14 0, L_0x29eb450; 1 drivers +v0x29cfac0_0 .net/s "accOutCenter", 10 0, L_0x29efe30; 1 drivers +v0x29cfc10_0 .var "clk", 0 0; +v0x29cfcb0_0 .var "dutPassed", 0 0; +v0x29cfd50 .array/s "expected", 6 0, 10 0; +v0x29cfe10_0 .var "i", 32 0; +S_0x29511f0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x2901970; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -33,174 +33,174 @@ S_0x12003b0 .scope module, "center" "tis100" 2 26, 3 49 0, S_0x11b0b30; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x11cf1b0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x11cf1f0 .param/str "memFile" 0 3 60, "anyRead/center.dat"; -L_0x129f1e0 .functor BUFZ 11, v0x1226750_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x129f470 .functor BUFZ 11, v0x1226750_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x12a0270 .functor BUFZ 18, L_0x12a23f0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1226750_0 .var/s "ACC", 10 0; -v0x1265090_0 .var/s "BAK", 10 0; -v0x1265170_0 .net "DST", 2 0, L_0x12a3710; 1 drivers -v0x1265260_0 .net/s "IMM", 10 0, L_0x12a37b0; 1 drivers -v0x1265340_0 .net "INST", 3 0, L_0x12a2ef0; 1 drivers -v0x1265470_0 .net "LABEL", 3 0, L_0x12a3960; 1 drivers -v0x1265550_0 .var "PC", 3 0; -v0x1265630_0 .var "PCNEXT", 3 0; -v0x1265710_0 .net "SRC", 2 0, L_0x12a3520; 1 drivers -v0x1265880_0 .net *"_s103", 0 0, L_0x12a1730; 1 drivers -v0x1265960_0 .net *"_s107", 0 0, L_0x12a1640; 1 drivers -v0x1265a40_0 .net *"_s111", 0 0, L_0x12a1920; 1 drivers -v0x1265b20_0 .net *"_s115", 0 0, L_0x12a1820; 1 drivers -v0x1265c00_0 .net *"_s119", 0 0, L_0x12a1b60; 1 drivers -v0x1265ce0_0 .net *"_s123", 0 0, L_0x12a1a50; 1 drivers -v0x1265dc0_0 .net *"_s127", 0 0, L_0x12a1d20; 1 drivers -v0x1265ea0_0 .net *"_s131", 0 0, L_0x12a1c00; 1 drivers -v0x1266050_0 .net *"_s135", 0 0, L_0x12a1f80; 1 drivers -v0x12660f0_0 .net *"_s139", 0 0, L_0x12a1e50; 1 drivers -v0x12661d0_0 .net *"_s143", 0 0, L_0x12a2160; 1 drivers -v0x12662b0_0 .net *"_s147", 0 0, L_0x12a2020; 1 drivers -v0x1266390_0 .net *"_s151", 0 0, L_0x12a2350; 1 drivers -v0x1266470_0 .net *"_s155", 0 0, L_0x12a2200; 1 drivers -v0x1266550_0 .net *"_s159", 0 0, L_0x12a22a0; 1 drivers -v0x1266630_0 .net *"_s160", 17 0, L_0x12a23f0; 1 drivers -v0x1266710_0 .net *"_s162", 5 0, L_0x12a2750; 1 drivers -L_0x2b8e31c882a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x12667f0_0 .net *"_s165", 1 0, L_0x2b8e31c882a0; 1 drivers -v0x12687c0_2 .array/port v0x12687c0, 2; -v0x12668d0_0 .net *"_s173", 10 0, v0x12687c0_2; 1 drivers -v0x12687c0_3 .array/port v0x12687c0, 3; -v0x12669b0_0 .net *"_s179", 10 0, v0x12687c0_3; 1 drivers -v0x12687c0_0 .array/port v0x12687c0, 0; -v0x1266a90_0 .net *"_s185", 10 0, v0x12687c0_0; 1 drivers -v0x12687c0_1 .array/port v0x12687c0, 1; -v0x1266b70_0 .net *"_s191", 10 0, v0x12687c0_1; 1 drivers -v0x1266c50_0 .net *"_s23", 0 0, L_0x129fc10; 1 drivers -v0x1266d30_0 .net *"_s27", 0 0, L_0x129fce0; 1 drivers -v0x1265f80_0 .net *"_s31", 0 0, L_0x129fdb0; 1 drivers -v0x1267000_0 .net *"_s36", 0 0, L_0x129ff50; 1 drivers -v0x12670e0_0 .net *"_s42", 0 0, L_0x12a0130; 1 drivers -v0x12671c0_0 .net *"_s46", 0 0, L_0x12a01d0; 1 drivers -v0x12672a0_0 .net *"_s50", 0 0, L_0x12a02e0; 1 drivers -v0x1267380_0 .net *"_s55", 0 0, L_0x12a04f0; 1 drivers -v0x1267460_0 .net *"_s61", 0 0, L_0x12a0760; 1 drivers -v0x1267540_0 .net *"_s65", 0 0, L_0x12a0800; 1 drivers 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drivers -v0x12690f0_5 .net/s v0x12690f0 5, 10 0, L_0x129fae0; 1 drivers -o0x2b8e31c57eb8 .functor BUFZ 11, C4; HiZ drive -v0x12690f0_6 .net/s v0x12690f0 6, 10 0, o0x2b8e31c57eb8; 0 drivers -o0x2b8e31c57ee8 .functor BUFZ 11, C4; HiZ drive -v0x12690f0_7 .net/s v0x12690f0 7, 10 0, o0x2b8e31c57ee8; 0 drivers -v0x1269300_0 .net "right", 14 0, L_0x1296460; alias, 1 drivers -v0x12693e0_0 .net "rightOut", 14 0, L_0x12a3280; alias, 1 drivers -v0x12694c0_0 .net "up", 14 0, L_0x129a800; alias, 1 drivers -v0x12695a0_0 .net "upOut", 14 0, L_0x12a25e0; alias, 1 drivers -v0x1269680_0 .var "weHaveData", 5 2; -v0x1269760_0 .var "weWantData", 5 2; -v0x1269840_0 .net "writeAckIn", 5 2, L_0x12a12c0; 1 drivers -v0x1269920_0 .var "writeAckOut", 5 2; -v0x1269a00_0 .var "writeTarget", 2 0; -v0x1269ae0_0 .var/s "writeValue", 10 0; -E_0x11c19c0 .event negedge, v0x1268020_0; -E_0x11e4150 .event posedge, v0x1268020_0; -L_0x129f750 .part L_0x1292cc0, 0, 11; -L_0x129f880 .part L_0x1296460, 0, 11; -L_0x129f9b0 .part L_0x129a800, 0, 11; -L_0x129fae0 .part L_0x129e3b0, 0, 11; -L_0x129fc10 .part L_0x1292cc0, 11, 1; -L_0x129fce0 .part L_0x1296460, 11, 1; -L_0x129fdb0 .part L_0x129a800, 11, 1; -L_0x129fe50 .concat8 [ 1 1 1 1], L_0x129fc10, L_0x129fce0, L_0x129fdb0, L_0x129ff50; -L_0x129ff50 .part L_0x129e3b0, 11, 1; -L_0x12a0040 .reduce/or L_0x129fe50; -L_0x12a0130 .part L_0x1292cc0, 12, 1; -L_0x12a01d0 .part L_0x1296460, 12, 1; -L_0x12a02e0 .part L_0x129a800, 12, 1; -L_0x12a0380 .concat8 [ 1 1 1 1], L_0x12a0130, L_0x12a01d0, L_0x12a02e0, L_0x12a04f0; -L_0x12a04f0 .part L_0x129e3b0, 12, 1; -L_0x12a05e0 .reduce/or L_0x12a0380; -L_0x12a0760 .part L_0x1292cc0, 13, 1; -L_0x12a0800 .part L_0x1296460, 13, 1; -L_0x12a0940 .part L_0x129a800, 13, 1; -L_0x12a09e0 .concat8 [ 1 1 1 1], L_0x12a0760, L_0x12a0800, L_0x12a0940, L_0x12a08a0; -L_0x12a08a0 .part L_0x129e3b0, 13, 1; -L_0x12a0c70 .reduce/or L_0x12a09e0; -L_0x12a0b70 .part L_0x1292cc0, 14, 1; -L_0x12a0f30 .part L_0x1296460, 14, 1; -L_0x12a0d60 .part L_0x129a800, 14, 1; -L_0x12a12c0 .concat8 [ 1 1 1 1], L_0x12a0b70, L_0x12a0f30, L_0x12a0d60, L_0x12a10e0; -L_0x12a10e0 .part L_0x129e3b0, 14, 1; -L_0x12a15a0 .reduce/or L_0x12a12c0; -L_0x12a1360 .part v0x1268e90_0, 0, 1; -L_0x12a1730 .part v0x1268e90_0, 1, 1; -L_0x12a1640 .part v0x1268e90_0, 2, 1; -L_0x12a1920 .part v0x1268e90_0, 3, 1; -L_0x12a1820 .part v0x1269920_0, 0, 1; -L_0x12a1b60 .part v0x1269920_0, 1, 1; -L_0x12a1a50 .part v0x1269920_0, 2, 1; -L_0x12a1d20 .part v0x1269920_0, 3, 1; -L_0x12a1c00 .part v0x1269760_0, 0, 1; -L_0x12a1f80 .part v0x1269760_0, 1, 1; -L_0x12a1e50 .part v0x1269760_0, 2, 1; -L_0x12a2160 .part v0x1269760_0, 3, 1; -L_0x12a2020 .part v0x1269680_0, 0, 1; -L_0x12a2350 .part v0x1269680_0, 1, 1; -L_0x12a2200 .part v0x1269680_0, 2, 1; -L_0x12a22a0 .part v0x1269680_0, 3, 1; -L_0x12a23f0 .array/port v0x1268380, L_0x12a2750; -L_0x12a2750 .concat [ 4 2 0 0], v0x1265550_0, L_0x2b8e31c882a0; -LS_0x12a25e0_0_0 .concat8 [ 11 1 1 1], v0x12687c0_2, L_0x12a2200, L_0x12a1e50, L_0x12a1a50; -LS_0x12a25e0_0_4 .concat8 [ 1 0 0 0], L_0x12a1640; -L_0x12a25e0 .concat8 [ 14 1 0 0], LS_0x12a25e0_0_0, LS_0x12a25e0_0_4; -LS_0x12a2b90_0_0 .concat8 [ 11 1 1 1], v0x12687c0_3, L_0x12a22a0, L_0x12a2160, L_0x12a1d20; -LS_0x12a2b90_0_4 .concat8 [ 1 0 0 0], L_0x12a1920; -L_0x12a2b90 .concat8 [ 14 1 0 0], LS_0x12a2b90_0_0, LS_0x12a2b90_0_4; -LS_0x12a28b0_0_0 .concat8 [ 11 1 1 1], v0x12687c0_0, L_0x12a2020, L_0x12a1c00, L_0x12a1820; -LS_0x12a28b0_0_4 .concat8 [ 1 0 0 0], L_0x12a1360; -L_0x12a28b0 .concat8 [ 14 1 0 0], LS_0x12a28b0_0_0, LS_0x12a28b0_0_4; -LS_0x12a3280_0_0 .concat8 [ 11 1 1 1], v0x12687c0_1, L_0x12a2350, L_0x12a1f80, L_0x12a1b60; -LS_0x12a3280_0_4 .concat8 [ 1 0 0 0], L_0x12a1730; -L_0x12a3280 .concat8 [ 14 1 0 0], LS_0x12a3280_0_0, LS_0x12a3280_0_4; -L_0x12a2ef0 .part L_0x12a0270, 14, 4; -L_0x12a3710 .part L_0x12a0270, 11, 3; -L_0x12a3520 .part L_0x12a0270, 8, 3; -L_0x12a3960 .part L_0x12a0270, 10, 4; -L_0x12a37b0 .part L_0x12a0270, 0, 11; -S_0x1269d60 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x11b0b30; +P_0x28ff5d0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x28ff610 .param/str "memFile" 0 3 60, "anyRead/center.dat"; +L_0x29efe30 .functor BUFZ 11, v0x29775b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29f00c0 .functor BUFZ 11, v0x29775b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29f0ec0 .functor BUFZ 18, L_0x29f3040, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x29775b0_0 .var/s "ACC", 10 0; +v0x29b5ce0_0 .var/s "BAK", 10 0; +v0x29b5dc0_0 .net "DST", 2 0, L_0x29f4360; 1 drivers +v0x29b5eb0_0 .net/s "IMM", 10 0, L_0x29f4400; 1 drivers +v0x29b5f90_0 .net "INST", 3 0, L_0x29f3b40; 1 drivers +v0x29b60c0_0 .net "LABEL", 3 0, L_0x29f45b0; 1 drivers +v0x29b61a0_0 .var "PC", 3 0; +v0x29b6280_0 .var "PCNEXT", 3 0; +v0x29b6360_0 .net "SRC", 2 0, L_0x29f4170; 1 drivers +v0x29b64d0_0 .net *"_s103", 0 0, L_0x29f2380; 1 drivers +v0x29b65b0_0 .net *"_s107", 0 0, L_0x29f2290; 1 drivers +v0x29b6690_0 .net *"_s111", 0 0, L_0x29f2570; 1 drivers +v0x29b6770_0 .net *"_s115", 0 0, L_0x29f2470; 1 drivers +v0x29b6850_0 .net *"_s119", 0 0, L_0x29f27b0; 1 drivers +v0x29b6930_0 .net *"_s123", 0 0, L_0x29f26a0; 1 drivers +v0x29b6a10_0 .net *"_s127", 0 0, L_0x29f2970; 1 drivers +v0x29b6af0_0 .net *"_s131", 0 0, L_0x29f2850; 1 drivers +v0x29b6ca0_0 .net *"_s135", 0 0, L_0x29f2bd0; 1 drivers +v0x29b6d40_0 .net *"_s139", 0 0, L_0x29f2aa0; 1 drivers +v0x29b6e20_0 .net *"_s143", 0 0, L_0x29f2db0; 1 drivers +v0x29b6f00_0 .net *"_s147", 0 0, L_0x29f2c70; 1 drivers +v0x29b6fe0_0 .net *"_s151", 0 0, L_0x29f2fa0; 1 drivers +v0x29b70c0_0 .net *"_s155", 0 0, L_0x29f2e50; 1 drivers +v0x29b71a0_0 .net *"_s159", 0 0, L_0x29f2ef0; 1 drivers +v0x29b7280_0 .net *"_s160", 17 0, L_0x29f3040; 1 drivers +v0x29b7360_0 .net *"_s162", 5 0, L_0x29f33a0; 1 drivers +L_0x2acb326b42a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x29b7440_0 .net *"_s165", 1 0, L_0x2acb326b42a0; 1 drivers +v0x29b9410_2 .array/port v0x29b9410, 2; +v0x29b7520_0 .net *"_s173", 10 0, v0x29b9410_2; 1 drivers +v0x29b9410_3 .array/port v0x29b9410, 3; +v0x29b7600_0 .net *"_s179", 10 0, v0x29b9410_3; 1 drivers +v0x29b9410_0 .array/port v0x29b9410, 0; +v0x29b76e0_0 .net *"_s185", 10 0, v0x29b9410_0; 1 drivers +v0x29b9410_1 .array/port v0x29b9410, 1; +v0x29b77c0_0 .net *"_s191", 10 0, v0x29b9410_1; 1 drivers +v0x29b78a0_0 .net *"_s23", 0 0, L_0x29f0860; 1 drivers +v0x29b7980_0 .net *"_s27", 0 0, L_0x29f0930; 1 drivers +v0x29b6bd0_0 .net *"_s31", 0 0, L_0x29f0a00; 1 drivers +v0x29b7c50_0 .net *"_s36", 0 0, L_0x29f0ba0; 1 drivers +v0x29b7d30_0 .net *"_s42", 0 0, L_0x29f0d80; 1 drivers +v0x29b7e10_0 .net *"_s46", 0 0, L_0x29f0e20; 1 drivers +v0x29b7ef0_0 .net *"_s50", 0 0, L_0x29f0f30; 1 drivers +v0x29b7fd0_0 .net *"_s55", 0 0, L_0x29f1140; 1 drivers +v0x29b80b0_0 .net *"_s61", 0 0, L_0x29f13b0; 1 drivers +v0x29b8190_0 .net *"_s65", 0 0, L_0x29f1450; 1 drivers +v0x29b8270_0 .net *"_s69", 0 0, L_0x29f1590; 1 drivers +v0x29b8350_0 .net *"_s74", 0 0, L_0x29f14f0; 1 drivers +v0x29b8430_0 .net *"_s80", 0 0, L_0x29f17c0; 1 drivers +v0x29b8510_0 .net *"_s84", 0 0, L_0x29f1b80; 1 drivers +v0x29b85f0_0 .net *"_s88", 0 0, L_0x29f19b0; 1 drivers +v0x29b86d0_0 .net *"_s93", 0 0, L_0x29f1d30; 1 drivers +v0x29b87b0_0 .net *"_s99", 0 0, L_0x29f1fb0; 1 drivers +v0x29b8890_0 .net/s "accOut", 10 0, L_0x29efe30; alias, 1 drivers +v0x29b8970_0 .net "anyHasData", 0 0, L_0x29f0c90; 1 drivers +v0x29b8a30_0 .net "anyReadAck", 0 0, L_0x29f18c0; 1 drivers +v0x29b8af0_0 .net "anyWantData", 0 0, L_0x29f1230; 1 drivers +v0x29b8bb0_0 .net "anyWriteAck", 0 0, L_0x29f21f0; 1 drivers +v0x29b8c70_0 .net "clk", 0 0, v0x29cfc10_0; 1 drivers +v0x29b8d30_0 .net "down", 14 0, L_0x29ef000; alias, 1 drivers +v0x29b8e10_0 .net "downOut", 14 0, L_0x29f37e0; alias, 1 drivers +v0x29b8ef0_0 .net "instruction", 17 0, L_0x29f0ec0; 1 drivers +v0x29b8fd0 .array "instructions", 15 0, 17 0; +v0x29b9090_0 .var "last", 2 0; +v0x29b9170_0 .net "left", 14 0, L_0x29e37e0; alias, 1 drivers +v0x29b9250_0 .net "leftOut", 14 0, L_0x29f3500; alias, 1 drivers +v0x29b9330_0 .var "mode", 2 0; +v0x29b9410 .array/s "outVals", 2 5, 10 0; +v0x29b9550_0 .var "phase", 2 0; +v0x29b9630_0 .net "portsHaveData", 5 2, L_0x29f0aa0; 1 drivers +v0x29b7a20_0 .net "portsWantData", 5 2, L_0x29f0fd0; 1 drivers +v0x29b7b00_0 .net "readAckIn", 5 2, L_0x29f1630; 1 drivers +v0x29b9ae0_0 .var "readAckOut", 5 2; +v0x29b9b80_0 .var "readTarget", 2 0; +v0x29b9c60_0 .var/s "readValue", 10 0; +L_0x2acb326b4258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x29b9d40 .array "regVals", 0 7; +v0x29b9d40_0 .net/s v0x29b9d40 0, 10 0, L_0x2acb326b4258; 1 drivers +v0x29b9d40_1 .net/s v0x29b9d40 1, 10 0, L_0x29f00c0; 1 drivers +v0x29b9d40_2 .net/s v0x29b9d40 2, 10 0, L_0x29f03a0; 1 drivers +v0x29b9d40_3 .net/s v0x29b9d40 3, 10 0, L_0x29f04d0; 1 drivers +v0x29b9d40_4 .net/s v0x29b9d40 4, 10 0, L_0x29f0600; 1 drivers +v0x29b9d40_5 .net/s v0x29b9d40 5, 10 0, L_0x29f0730; 1 drivers +o0x2acb32683eb8 .functor BUFZ 11, C4; HiZ drive +v0x29b9d40_6 .net/s v0x29b9d40 6, 10 0, o0x2acb32683eb8; 0 drivers +o0x2acb32683ee8 .functor BUFZ 11, C4; HiZ drive +v0x29b9d40_7 .net/s v0x29b9d40 7, 10 0, o0x2acb32683ee8; 0 drivers +v0x29b9f50_0 .net "right", 14 0, L_0x29e70f0; alias, 1 drivers +v0x29ba030_0 .net "rightOut", 14 0, L_0x29f3ed0; alias, 1 drivers +v0x29ba110_0 .net "up", 14 0, L_0x29eb450; alias, 1 drivers +v0x29ba1f0_0 .net "upOut", 14 0, L_0x29f3230; alias, 1 drivers +v0x29ba2d0_0 .var "weHaveData", 5 2; +v0x29ba3b0_0 .var "weWantData", 5 2; +v0x29ba490_0 .net "writeAckIn", 5 2, L_0x29f1f10; 1 drivers +v0x29ba570_0 .var "writeAckOut", 5 2; +v0x29ba650_0 .var "writeTarget", 2 0; +v0x29ba730_0 .var/s "writeValue", 10 0; +E_0x2912800 .event negedge, v0x29b8c70_0; +E_0x2934f90 .event posedge, v0x29b8c70_0; +L_0x29f03a0 .part L_0x29e37e0, 0, 11; +L_0x29f04d0 .part L_0x29e70f0, 0, 11; +L_0x29f0600 .part L_0x29eb450, 0, 11; +L_0x29f0730 .part L_0x29ef000, 0, 11; +L_0x29f0860 .part L_0x29e37e0, 11, 1; +L_0x29f0930 .part L_0x29e70f0, 11, 1; +L_0x29f0a00 .part L_0x29eb450, 11, 1; +L_0x29f0aa0 .concat8 [ 1 1 1 1], L_0x29f0860, L_0x29f0930, L_0x29f0a00, L_0x29f0ba0; +L_0x29f0ba0 .part L_0x29ef000, 11, 1; +L_0x29f0c90 .reduce/or L_0x29f0aa0; +L_0x29f0d80 .part L_0x29e37e0, 12, 1; +L_0x29f0e20 .part L_0x29e70f0, 12, 1; +L_0x29f0f30 .part L_0x29eb450, 12, 1; +L_0x29f0fd0 .concat8 [ 1 1 1 1], L_0x29f0d80, L_0x29f0e20, L_0x29f0f30, L_0x29f1140; +L_0x29f1140 .part L_0x29ef000, 12, 1; +L_0x29f1230 .reduce/or L_0x29f0fd0; +L_0x29f13b0 .part L_0x29e37e0, 13, 1; +L_0x29f1450 .part L_0x29e70f0, 13, 1; +L_0x29f1590 .part L_0x29eb450, 13, 1; +L_0x29f1630 .concat8 [ 1 1 1 1], L_0x29f13b0, L_0x29f1450, L_0x29f1590, L_0x29f14f0; +L_0x29f14f0 .part L_0x29ef000, 13, 1; +L_0x29f18c0 .reduce/or L_0x29f1630; +L_0x29f17c0 .part L_0x29e37e0, 14, 1; +L_0x29f1b80 .part L_0x29e70f0, 14, 1; +L_0x29f19b0 .part L_0x29eb450, 14, 1; +L_0x29f1f10 .concat8 [ 1 1 1 1], L_0x29f17c0, L_0x29f1b80, L_0x29f19b0, L_0x29f1d30; +L_0x29f1d30 .part L_0x29ef000, 14, 1; +L_0x29f21f0 .reduce/or L_0x29f1f10; +L_0x29f1fb0 .part v0x29b9ae0_0, 0, 1; +L_0x29f2380 .part v0x29b9ae0_0, 1, 1; +L_0x29f2290 .part v0x29b9ae0_0, 2, 1; +L_0x29f2570 .part v0x29b9ae0_0, 3, 1; +L_0x29f2470 .part v0x29ba570_0, 0, 1; +L_0x29f27b0 .part v0x29ba570_0, 1, 1; +L_0x29f26a0 .part v0x29ba570_0, 2, 1; +L_0x29f2970 .part v0x29ba570_0, 3, 1; +L_0x29f2850 .part v0x29ba3b0_0, 0, 1; +L_0x29f2bd0 .part v0x29ba3b0_0, 1, 1; +L_0x29f2aa0 .part v0x29ba3b0_0, 2, 1; +L_0x29f2db0 .part v0x29ba3b0_0, 3, 1; +L_0x29f2c70 .part v0x29ba2d0_0, 0, 1; +L_0x29f2fa0 .part v0x29ba2d0_0, 1, 1; +L_0x29f2e50 .part v0x29ba2d0_0, 2, 1; +L_0x29f2ef0 .part v0x29ba2d0_0, 3, 1; +L_0x29f3040 .array/port v0x29b8fd0, L_0x29f33a0; +L_0x29f33a0 .concat [ 4 2 0 0], v0x29b61a0_0, L_0x2acb326b42a0; +LS_0x29f3230_0_0 .concat8 [ 11 1 1 1], v0x29b9410_2, L_0x29f2e50, L_0x29f2aa0, L_0x29f26a0; +LS_0x29f3230_0_4 .concat8 [ 1 0 0 0], L_0x29f2290; +L_0x29f3230 .concat8 [ 14 1 0 0], LS_0x29f3230_0_0, LS_0x29f3230_0_4; +LS_0x29f37e0_0_0 .concat8 [ 11 1 1 1], v0x29b9410_3, L_0x29f2ef0, L_0x29f2db0, L_0x29f2970; +LS_0x29f37e0_0_4 .concat8 [ 1 0 0 0], L_0x29f2570; +L_0x29f37e0 .concat8 [ 14 1 0 0], LS_0x29f37e0_0_0, LS_0x29f37e0_0_4; +LS_0x29f3500_0_0 .concat8 [ 11 1 1 1], v0x29b9410_0, L_0x29f2c70, L_0x29f2850, L_0x29f2470; +LS_0x29f3500_0_4 .concat8 [ 1 0 0 0], L_0x29f1fb0; +L_0x29f3500 .concat8 [ 14 1 0 0], LS_0x29f3500_0_0, LS_0x29f3500_0_4; +LS_0x29f3ed0_0_0 .concat8 [ 11 1 1 1], v0x29b9410_1, L_0x29f2fa0, L_0x29f2bd0, L_0x29f27b0; +LS_0x29f3ed0_0_4 .concat8 [ 1 0 0 0], L_0x29f2380; +L_0x29f3ed0 .concat8 [ 14 1 0 0], LS_0x29f3ed0_0_0, LS_0x29f3ed0_0_4; +L_0x29f3b40 .part L_0x29f0ec0, 14, 4; +L_0x29f4360 .part L_0x29f0ec0, 11, 3; +L_0x29f4170 .part L_0x29f0ec0, 8, 3; +L_0x29f45b0 .part L_0x29f0ec0, 10, 4; +L_0x29f4400 .part L_0x29f0ec0, 0, 11; +S_0x29ba9b0 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x2901970; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -212,175 +212,175 @@ S_0x1269d60 .scope module, "down" "tis100" 2 25, 3 49 0, S_0x11b0b30; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1269f50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1269f90 .param/str "memFile" 0 3 60, "anyRead/down.dat"; -L_0x129b100 .functor BUFZ 11, v0x126a290_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x129b300 .functor BUFZ 11, v0x126a290_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x129c1b0 .functor BUFZ 18, L_0x129e120, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x126a290_0 .var/s "ACC", 10 0; -v0x126a390_0 .var/s "BAK", 10 0; -v0x126a470_0 .net "DST", 2 0, L_0x129f2a0; 1 drivers -v0x126a530_0 .net/s "IMM", 10 0, L_0x129f340; 1 drivers -v0x126a610_0 .net "INST", 3 0, L_0x129eb80; 1 drivers -v0x126a740_0 .net "LABEL", 3 0, L_0x129f4f0; 1 drivers -v0x126a820_0 .var "PC", 3 0; -v0x126a900_0 .var "PCNEXT", 3 0; -v0x126a9e0_0 .net "SRC", 2 0, L_0x129f0b0; 1 drivers -v0x126ab50_0 .net *"_s103", 0 0, L_0x129d460; 1 drivers -v0x126ac30_0 .net *"_s107", 0 0, L_0x129d370; 1 drivers -v0x126ad10_0 .net *"_s111", 0 0, L_0x129d650; 1 drivers -v0x126adf0_0 .net *"_s115", 0 0, L_0x129d550; 1 drivers -v0x126aed0_0 .net *"_s119", 0 0, L_0x129d890; 1 drivers -v0x126afb0_0 .net *"_s123", 0 0, L_0x129d780; 1 drivers -v0x126b090_0 .net *"_s127", 0 0, L_0x129da50; 1 drivers -v0x126b170_0 .net *"_s131", 0 0, L_0x129d930; 1 drivers -v0x126b320_0 .net *"_s135", 0 0, L_0x129dcb0; 1 drivers -v0x126b3c0_0 .net *"_s139", 0 0, L_0x129db80; 1 drivers -v0x126b4a0_0 .net *"_s143", 0 0, L_0x129de90; 1 drivers -v0x126b580_0 .net *"_s147", 0 0, L_0x129dd50; 1 drivers -v0x126b660_0 .net *"_s151", 0 0, L_0x129e080; 1 drivers -v0x126b740_0 .net *"_s155", 0 0, L_0x129df30; 1 drivers -v0x126b820_0 .net *"_s159", 0 0, L_0x129dfd0; 1 drivers -v0x126b900_0 .net *"_s160", 17 0, L_0x129e120; 1 drivers -v0x126b9e0_0 .net *"_s162", 5 0, L_0x129e480; 1 drivers -L_0x2b8e31c88210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x126bac0_0 .net *"_s165", 1 0, L_0x2b8e31c88210; 1 drivers -v0x126da50_2 .array/port v0x126da50, 2; -v0x126bba0_0 .net *"_s173", 10 0, v0x126da50_2; 1 drivers -v0x126da50_3 .array/port v0x126da50, 3; -v0x126bc80_0 .net *"_s179", 10 0, v0x126da50_3; 1 drivers -v0x126da50_0 .array/port v0x126da50, 0; -v0x126bd60_0 .net *"_s185", 10 0, v0x126da50_0; 1 drivers -v0x126da50_1 .array/port v0x126da50, 1; -v0x126be40_0 .net *"_s191", 10 0, v0x126da50_1; 1 drivers -v0x126bf20_0 .net *"_s23", 0 0, L_0x129b940; 1 drivers -v0x126c000_0 .net *"_s27", 0 0, L_0x129ba60; 1 drivers -v0x126b250_0 .net *"_s31", 0 0, L_0x129bb50; 1 drivers -v0x126c2d0_0 .net *"_s36", 0 0, L_0x129be40; 1 drivers -v0x126c3b0_0 .net *"_s42", 0 0, L_0x129c070; 1 drivers -v0x126c490_0 .net *"_s46", 0 0, L_0x129c110; 1 drivers -v0x126c570_0 .net *"_s50", 0 0, L_0x129c220; 1 drivers -v0x126c650_0 .net *"_s55", 0 0, L_0x129c430; 1 drivers -v0x126c730_0 .net *"_s61", 0 0, L_0x129c6a0; 1 drivers -v0x126c810_0 .net *"_s65", 0 0, L_0x129c7d0; 1 drivers -v0x126c8f0_0 .net *"_s69", 0 0, L_0x129c9a0; 1 drivers -v0x126c9d0_0 .net *"_s74", 0 0, L_0x129c900; 1 drivers -v0x126cab0_0 .net *"_s80", 0 0, L_0x129cb30; 1 drivers -v0x126cb90_0 .net *"_s84", 0 0, L_0x129ce20; 1 drivers -v0x126cc70_0 .net *"_s88", 0 0, L_0x129cd60; 1 drivers -v0x126cd50_0 .net *"_s93", 0 0, L_0x129cec0; 1 drivers -v0x126ce30_0 .net *"_s99", 0 0, L_0x129d150; 1 drivers -v0x126cf10_0 .net/s "accOut", 10 0, L_0x129b100; 1 drivers -v0x126cff0_0 .net "anyHasData", 0 0, L_0x129bf80; 1 drivers -v0x126d0b0_0 .net "anyReadAck", 0 0, L_0x129ccc0; 1 drivers -v0x126d170_0 .net "anyWantData", 0 0, L_0x129c520; 1 drivers -v0x126d230_0 .net "anyWriteAck", 0 0, L_0x129d280; 1 drivers -v0x126d2f0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers -o0x2b8e31c58cc8 .functor BUFZ 15, C4; HiZ drive -v0x126d390_0 .net "down", 14 0, o0x2b8e31c58cc8; 0 drivers -v0x126d450_0 .net "downOut", 14 0, L_0x129e8a0; 1 drivers -v0x126d530_0 .net "instruction", 17 0, L_0x129c1b0; 1 drivers -v0x126d610 .array "instructions", 15 0, 17 0; -v0x126d6d0_0 .var "last", 2 0; -o0x2b8e31c58d88 .functor BUFZ 15, C4; HiZ drive -v0x126d7b0_0 .net "left", 14 0, o0x2b8e31c58d88; 0 drivers -v0x126d890_0 .net "leftOut", 14 0, L_0x129e5e0; 1 drivers -v0x126d970_0 .var "mode", 2 0; -v0x126da50 .array/s "outVals", 2 5, 10 0; -v0x126db90_0 .var "phase", 2 0; -v0x126dc70_0 .net "portsHaveData", 5 2, L_0x129bc80; 1 drivers -v0x126c0a0_0 .net "portsWantData", 5 2, L_0x129c2c0; 1 drivers -v0x126c180_0 .net "readAckIn", 5 2, L_0x129ca40; 1 drivers -v0x126e120_0 .var "readAckOut", 5 2; -v0x126e1c0_0 .var "readTarget", 2 0; -v0x126e260_0 .var/s "readValue", 10 0; -L_0x2b8e31c881c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x126e300 .array "regVals", 0 7; -v0x126e300_0 .net/s v0x126e300 0, 10 0, L_0x2b8e31c881c8; 1 drivers -v0x126e300_1 .net/s v0x126e300 1, 10 0, L_0x129b300; 1 drivers -v0x126e300_2 .net/s v0x126e300 2, 10 0, L_0x129b370; 1 drivers -v0x126e300_3 .net/s v0x126e300 3, 10 0, L_0x129b670; 1 drivers -v0x126e300_4 .net/s v0x126e300 4, 10 0, L_0x129b740; 1 drivers -v0x126e300_5 .net/s v0x126e300 5, 10 0, L_0x129b810; 1 drivers -o0x2b8e31c59148 .functor BUFZ 11, C4; HiZ drive -v0x126e300_6 .net/s v0x126e300 6, 10 0, o0x2b8e31c59148; 0 drivers -o0x2b8e31c59178 .functor BUFZ 11, C4; HiZ drive -v0x126e300_7 .net/s v0x126e300 7, 10 0, o0x2b8e31c59178; 0 drivers -o0x2b8e31c591a8 .functor BUFZ 15, C4; HiZ drive -v0x126e510_0 .net "right", 14 0, o0x2b8e31c591a8; 0 drivers -v0x126e5f0_0 .net "rightOut", 14 0, L_0x129ee90; 1 drivers -v0x126e6d0_0 .net "up", 14 0, L_0x12a2b90; alias, 1 drivers -v0x126e7c0_0 .net "upOut", 14 0, L_0x129e3b0; alias, 1 drivers -v0x126e890_0 .var "weHaveData", 5 2; -v0x126e950_0 .var "weWantData", 5 2; -v0x126ea30_0 .net "writeAckIn", 5 2, L_0x129cf90; 1 drivers -v0x126eb10_0 .var "writeAckOut", 5 2; -v0x126ebf0_0 .var "writeTarget", 2 0; -v0x126ecd0_0 .var/s "writeValue", 10 0; -L_0x129b370 .part o0x2b8e31c58d88, 0, 11; -L_0x129b670 .part o0x2b8e31c591a8, 0, 11; -L_0x129b740 .part L_0x12a2b90, 0, 11; -L_0x129b810 .part o0x2b8e31c58cc8, 0, 11; -L_0x129b940 .part o0x2b8e31c58d88, 11, 1; -L_0x129ba60 .part o0x2b8e31c591a8, 11, 1; -L_0x129bb50 .part L_0x12a2b90, 11, 1; -L_0x129bc80 .concat8 [ 1 1 1 1], L_0x129b940, L_0x129ba60, L_0x129bb50, L_0x129be40; -L_0x129be40 .part o0x2b8e31c58cc8, 11, 1; -L_0x129bf80 .reduce/or L_0x129bc80; -L_0x129c070 .part o0x2b8e31c58d88, 12, 1; -L_0x129c110 .part o0x2b8e31c591a8, 12, 1; -L_0x129c220 .part L_0x12a2b90, 12, 1; -L_0x129c2c0 .concat8 [ 1 1 1 1], L_0x129c070, L_0x129c110, L_0x129c220, L_0x129c430; -L_0x129c430 .part o0x2b8e31c58cc8, 12, 1; -L_0x129c520 .reduce/or L_0x129c2c0; -L_0x129c6a0 .part o0x2b8e31c58d88, 13, 1; -L_0x129c7d0 .part o0x2b8e31c591a8, 13, 1; -L_0x129c9a0 .part L_0x12a2b90, 13, 1; -L_0x129ca40 .concat8 [ 1 1 1 1], L_0x129c6a0, L_0x129c7d0, L_0x129c9a0, L_0x129c900; -L_0x129c900 .part o0x2b8e31c58cc8, 13, 1; -L_0x129ccc0 .reduce/or L_0x129ca40; -L_0x129cb30 .part o0x2b8e31c58d88, 14, 1; -L_0x129ce20 .part o0x2b8e31c591a8, 14, 1; -L_0x129cd60 .part L_0x12a2b90, 14, 1; -L_0x129cf90 .concat8 [ 1 1 1 1], L_0x129cb30, L_0x129ce20, L_0x129cd60, L_0x129cec0; -L_0x129cec0 .part o0x2b8e31c58cc8, 14, 1; -L_0x129d280 .reduce/or L_0x129cf90; -L_0x129d150 .part v0x126e120_0, 0, 1; -L_0x129d460 .part v0x126e120_0, 1, 1; -L_0x129d370 .part v0x126e120_0, 2, 1; -L_0x129d650 .part v0x126e120_0, 3, 1; -L_0x129d550 .part v0x126eb10_0, 0, 1; -L_0x129d890 .part v0x126eb10_0, 1, 1; -L_0x129d780 .part v0x126eb10_0, 2, 1; -L_0x129da50 .part v0x126eb10_0, 3, 1; -L_0x129d930 .part v0x126e950_0, 0, 1; -L_0x129dcb0 .part v0x126e950_0, 1, 1; -L_0x129db80 .part v0x126e950_0, 2, 1; -L_0x129de90 .part v0x126e950_0, 3, 1; -L_0x129dd50 .part v0x126e890_0, 0, 1; -L_0x129e080 .part v0x126e890_0, 1, 1; -L_0x129df30 .part v0x126e890_0, 2, 1; -L_0x129dfd0 .part v0x126e890_0, 3, 1; -L_0x129e120 .array/port v0x126d610, L_0x129e480; -L_0x129e480 .concat [ 4 2 0 0], v0x126a820_0, L_0x2b8e31c88210; -LS_0x129e3b0_0_0 .concat8 [ 11 1 1 1], v0x126da50_2, L_0x129df30, L_0x129db80, L_0x129d780; -LS_0x129e3b0_0_4 .concat8 [ 1 0 0 0], L_0x129d370; -L_0x129e3b0 .concat8 [ 14 1 0 0], LS_0x129e3b0_0_0, LS_0x129e3b0_0_4; -LS_0x129e8a0_0_0 .concat8 [ 11 1 1 1], v0x126da50_3, L_0x129dfd0, L_0x129de90, L_0x129da50; -LS_0x129e8a0_0_4 .concat8 [ 1 0 0 0], L_0x129d650; -L_0x129e8a0 .concat8 [ 14 1 0 0], LS_0x129e8a0_0_0, LS_0x129e8a0_0_4; -LS_0x129e5e0_0_0 .concat8 [ 11 1 1 1], v0x126da50_0, L_0x129dd50, L_0x129d930, L_0x129d550; -LS_0x129e5e0_0_4 .concat8 [ 1 0 0 0], L_0x129d150; -L_0x129e5e0 .concat8 [ 14 1 0 0], LS_0x129e5e0_0_0, LS_0x129e5e0_0_4; -LS_0x129ee90_0_0 .concat8 [ 11 1 1 1], v0x126da50_1, L_0x129e080, L_0x129dcb0, L_0x129d890; -LS_0x129ee90_0_4 .concat8 [ 1 0 0 0], L_0x129d460; -L_0x129ee90 .concat8 [ 14 1 0 0], LS_0x129ee90_0_0, LS_0x129ee90_0_4; -L_0x129eb80 .part L_0x129c1b0, 14, 4; -L_0x129f2a0 .part L_0x129c1b0, 11, 3; -L_0x129f0b0 .part L_0x129c1b0, 8, 3; -L_0x129f4f0 .part L_0x129c1b0, 10, 4; -L_0x129f340 .part L_0x129c1b0, 0, 11; -S_0x126ef50 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x11b0b30; +P_0x29baba0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x29babe0 .param/str "memFile" 0 3 60, "anyRead/down.dat"; +L_0x29ebd50 .functor BUFZ 11, v0x29baee0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29ebf50 .functor BUFZ 11, v0x29baee0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29ece00 .functor BUFZ 18, L_0x29eed70, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x29baee0_0 .var/s "ACC", 10 0; +v0x29bafe0_0 .var/s "BAK", 10 0; +v0x29bb0c0_0 .net "DST", 2 0, L_0x29efef0; 1 drivers +v0x29bb180_0 .net/s "IMM", 10 0, L_0x29eff90; 1 drivers +v0x29bb260_0 .net "INST", 3 0, L_0x29ef7d0; 1 drivers +v0x29bb390_0 .net "LABEL", 3 0, L_0x29f0140; 1 drivers +v0x29bb470_0 .var "PC", 3 0; +v0x29bb550_0 .var "PCNEXT", 3 0; +v0x29bb630_0 .net "SRC", 2 0, L_0x29efd00; 1 drivers +v0x29bb7a0_0 .net *"_s103", 0 0, L_0x29ee0b0; 1 drivers +v0x29bb880_0 .net *"_s107", 0 0, L_0x29edfc0; 1 drivers +v0x29bb960_0 .net *"_s111", 0 0, L_0x29ee2a0; 1 drivers +v0x29bba40_0 .net *"_s115", 0 0, L_0x29ee1a0; 1 drivers +v0x29bbb20_0 .net *"_s119", 0 0, L_0x29ee4e0; 1 drivers +v0x29bbc00_0 .net *"_s123", 0 0, L_0x29ee3d0; 1 drivers +v0x29bbce0_0 .net *"_s127", 0 0, L_0x29ee6a0; 1 drivers +v0x29bbdc0_0 .net *"_s131", 0 0, L_0x29ee580; 1 drivers +v0x29bbf70_0 .net *"_s135", 0 0, L_0x29ee900; 1 drivers +v0x29bc010_0 .net *"_s139", 0 0, L_0x29ee7d0; 1 drivers +v0x29bc0f0_0 .net *"_s143", 0 0, L_0x29eeae0; 1 drivers +v0x29bc1d0_0 .net *"_s147", 0 0, L_0x29ee9a0; 1 drivers +v0x29bc2b0_0 .net *"_s151", 0 0, L_0x29eecd0; 1 drivers +v0x29bc390_0 .net *"_s155", 0 0, L_0x29eeb80; 1 drivers +v0x29bc470_0 .net *"_s159", 0 0, L_0x29eec20; 1 drivers +v0x29bc550_0 .net *"_s160", 17 0, L_0x29eed70; 1 drivers +v0x29bc630_0 .net *"_s162", 5 0, L_0x29ef0d0; 1 drivers +L_0x2acb326b4210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x29bc710_0 .net *"_s165", 1 0, L_0x2acb326b4210; 1 drivers +v0x29be6a0_2 .array/port v0x29be6a0, 2; +v0x29bc7f0_0 .net *"_s173", 10 0, v0x29be6a0_2; 1 drivers +v0x29be6a0_3 .array/port v0x29be6a0, 3; +v0x29bc8d0_0 .net *"_s179", 10 0, v0x29be6a0_3; 1 drivers +v0x29be6a0_0 .array/port v0x29be6a0, 0; +v0x29bc9b0_0 .net *"_s185", 10 0, v0x29be6a0_0; 1 drivers +v0x29be6a0_1 .array/port v0x29be6a0, 1; +v0x29bca90_0 .net *"_s191", 10 0, v0x29be6a0_1; 1 drivers +v0x29bcb70_0 .net *"_s23", 0 0, L_0x29ec590; 1 drivers +v0x29bcc50_0 .net *"_s27", 0 0, L_0x29ec6b0; 1 drivers +v0x29bbea0_0 .net *"_s31", 0 0, L_0x29ec7a0; 1 drivers +v0x29bcf20_0 .net *"_s36", 0 0, L_0x29eca90; 1 drivers +v0x29bd000_0 .net *"_s42", 0 0, L_0x29eccc0; 1 drivers +v0x29bd0e0_0 .net *"_s46", 0 0, L_0x29ecd60; 1 drivers +v0x29bd1c0_0 .net *"_s50", 0 0, L_0x29ece70; 1 drivers +v0x29bd2a0_0 .net *"_s55", 0 0, L_0x29ed080; 1 drivers +v0x29bd380_0 .net *"_s61", 0 0, L_0x29ed2f0; 1 drivers +v0x29bd460_0 .net *"_s65", 0 0, L_0x29ed420; 1 drivers +v0x29bd540_0 .net *"_s69", 0 0, L_0x29ed5f0; 1 drivers +v0x29bd620_0 .net *"_s74", 0 0, L_0x29ed550; 1 drivers +v0x29bd700_0 .net *"_s80", 0 0, L_0x29ed780; 1 drivers +v0x29bd7e0_0 .net *"_s84", 0 0, L_0x29eda70; 1 drivers +v0x29bd8c0_0 .net *"_s88", 0 0, L_0x29ed9b0; 1 drivers +v0x29bd9a0_0 .net *"_s93", 0 0, L_0x29edb10; 1 drivers +v0x29bda80_0 .net *"_s99", 0 0, L_0x29edda0; 1 drivers +v0x29bdb60_0 .net/s "accOut", 10 0, L_0x29ebd50; 1 drivers +v0x29bdc40_0 .net "anyHasData", 0 0, L_0x29ecbd0; 1 drivers +v0x29bdd00_0 .net "anyReadAck", 0 0, L_0x29ed910; 1 drivers +v0x29bddc0_0 .net "anyWantData", 0 0, L_0x29ed170; 1 drivers +v0x29bde80_0 .net "anyWriteAck", 0 0, L_0x29eded0; 1 drivers +v0x29bdf40_0 .net "clk", 0 0, v0x29cfc10_0; alias, 1 drivers +o0x2acb32684cc8 .functor BUFZ 15, C4; HiZ drive +v0x29bdfe0_0 .net "down", 14 0, o0x2acb32684cc8; 0 drivers +v0x29be0a0_0 .net "downOut", 14 0, L_0x29ef4f0; 1 drivers +v0x29be180_0 .net "instruction", 17 0, L_0x29ece00; 1 drivers +v0x29be260 .array "instructions", 15 0, 17 0; +v0x29be320_0 .var "last", 2 0; +o0x2acb32684d88 .functor BUFZ 15, C4; HiZ drive +v0x29be400_0 .net "left", 14 0, o0x2acb32684d88; 0 drivers +v0x29be4e0_0 .net "leftOut", 14 0, L_0x29ef230; 1 drivers +v0x29be5c0_0 .var "mode", 2 0; +v0x29be6a0 .array/s "outVals", 2 5, 10 0; +v0x29be7e0_0 .var "phase", 2 0; +v0x29be8c0_0 .net "portsHaveData", 5 2, L_0x29ec8d0; 1 drivers +v0x29bccf0_0 .net "portsWantData", 5 2, L_0x29ecf10; 1 drivers +v0x29bcdd0_0 .net "readAckIn", 5 2, L_0x29ed690; 1 drivers +v0x29bed70_0 .var "readAckOut", 5 2; +v0x29bee10_0 .var "readTarget", 2 0; +v0x29beeb0_0 .var/s "readValue", 10 0; +L_0x2acb326b41c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x29bef50 .array "regVals", 0 7; +v0x29bef50_0 .net/s v0x29bef50 0, 10 0, L_0x2acb326b41c8; 1 drivers +v0x29bef50_1 .net/s v0x29bef50 1, 10 0, L_0x29ebf50; 1 drivers +v0x29bef50_2 .net/s v0x29bef50 2, 10 0, L_0x29ebfc0; 1 drivers +v0x29bef50_3 .net/s v0x29bef50 3, 10 0, L_0x29ec2c0; 1 drivers +v0x29bef50_4 .net/s v0x29bef50 4, 10 0, L_0x29ec390; 1 drivers +v0x29bef50_5 .net/s v0x29bef50 5, 10 0, L_0x29ec460; 1 drivers +o0x2acb32685148 .functor BUFZ 11, C4; HiZ drive +v0x29bef50_6 .net/s v0x29bef50 6, 10 0, o0x2acb32685148; 0 drivers +o0x2acb32685178 .functor BUFZ 11, C4; HiZ drive +v0x29bef50_7 .net/s v0x29bef50 7, 10 0, o0x2acb32685178; 0 drivers +o0x2acb326851a8 .functor BUFZ 15, C4; HiZ drive +v0x29bf160_0 .net "right", 14 0, o0x2acb326851a8; 0 drivers +v0x29bf240_0 .net "rightOut", 14 0, L_0x29efae0; 1 drivers +v0x29bf320_0 .net "up", 14 0, L_0x29f37e0; alias, 1 drivers +v0x29bf410_0 .net "upOut", 14 0, L_0x29ef000; alias, 1 drivers +v0x29bf4e0_0 .var "weHaveData", 5 2; +v0x29bf5a0_0 .var "weWantData", 5 2; +v0x29bf680_0 .net "writeAckIn", 5 2, L_0x29edbe0; 1 drivers +v0x29bf760_0 .var "writeAckOut", 5 2; +v0x29bf840_0 .var "writeTarget", 2 0; +v0x29bf920_0 .var/s "writeValue", 10 0; +L_0x29ebfc0 .part o0x2acb32684d88, 0, 11; +L_0x29ec2c0 .part o0x2acb326851a8, 0, 11; +L_0x29ec390 .part L_0x29f37e0, 0, 11; +L_0x29ec460 .part o0x2acb32684cc8, 0, 11; +L_0x29ec590 .part o0x2acb32684d88, 11, 1; +L_0x29ec6b0 .part o0x2acb326851a8, 11, 1; +L_0x29ec7a0 .part L_0x29f37e0, 11, 1; +L_0x29ec8d0 .concat8 [ 1 1 1 1], L_0x29ec590, L_0x29ec6b0, L_0x29ec7a0, L_0x29eca90; +L_0x29eca90 .part o0x2acb32684cc8, 11, 1; +L_0x29ecbd0 .reduce/or L_0x29ec8d0; +L_0x29eccc0 .part o0x2acb32684d88, 12, 1; +L_0x29ecd60 .part o0x2acb326851a8, 12, 1; +L_0x29ece70 .part L_0x29f37e0, 12, 1; +L_0x29ecf10 .concat8 [ 1 1 1 1], L_0x29eccc0, L_0x29ecd60, L_0x29ece70, L_0x29ed080; +L_0x29ed080 .part o0x2acb32684cc8, 12, 1; +L_0x29ed170 .reduce/or L_0x29ecf10; +L_0x29ed2f0 .part o0x2acb32684d88, 13, 1; +L_0x29ed420 .part o0x2acb326851a8, 13, 1; +L_0x29ed5f0 .part L_0x29f37e0, 13, 1; +L_0x29ed690 .concat8 [ 1 1 1 1], L_0x29ed2f0, L_0x29ed420, L_0x29ed5f0, L_0x29ed550; +L_0x29ed550 .part o0x2acb32684cc8, 13, 1; +L_0x29ed910 .reduce/or L_0x29ed690; +L_0x29ed780 .part o0x2acb32684d88, 14, 1; +L_0x29eda70 .part o0x2acb326851a8, 14, 1; +L_0x29ed9b0 .part L_0x29f37e0, 14, 1; +L_0x29edbe0 .concat8 [ 1 1 1 1], L_0x29ed780, L_0x29eda70, L_0x29ed9b0, L_0x29edb10; +L_0x29edb10 .part o0x2acb32684cc8, 14, 1; +L_0x29eded0 .reduce/or L_0x29edbe0; +L_0x29edda0 .part v0x29bed70_0, 0, 1; +L_0x29ee0b0 .part v0x29bed70_0, 1, 1; +L_0x29edfc0 .part v0x29bed70_0, 2, 1; +L_0x29ee2a0 .part v0x29bed70_0, 3, 1; +L_0x29ee1a0 .part v0x29bf760_0, 0, 1; +L_0x29ee4e0 .part v0x29bf760_0, 1, 1; +L_0x29ee3d0 .part v0x29bf760_0, 2, 1; +L_0x29ee6a0 .part v0x29bf760_0, 3, 1; +L_0x29ee580 .part v0x29bf5a0_0, 0, 1; +L_0x29ee900 .part v0x29bf5a0_0, 1, 1; +L_0x29ee7d0 .part v0x29bf5a0_0, 2, 1; +L_0x29eeae0 .part v0x29bf5a0_0, 3, 1; +L_0x29ee9a0 .part v0x29bf4e0_0, 0, 1; +L_0x29eecd0 .part v0x29bf4e0_0, 1, 1; +L_0x29eeb80 .part v0x29bf4e0_0, 2, 1; +L_0x29eec20 .part v0x29bf4e0_0, 3, 1; +L_0x29eed70 .array/port v0x29be260, L_0x29ef0d0; +L_0x29ef0d0 .concat [ 4 2 0 0], v0x29bb470_0, L_0x2acb326b4210; +LS_0x29ef000_0_0 .concat8 [ 11 1 1 1], v0x29be6a0_2, L_0x29eeb80, L_0x29ee7d0, L_0x29ee3d0; +LS_0x29ef000_0_4 .concat8 [ 1 0 0 0], L_0x29edfc0; +L_0x29ef000 .concat8 [ 14 1 0 0], LS_0x29ef000_0_0, LS_0x29ef000_0_4; +LS_0x29ef4f0_0_0 .concat8 [ 11 1 1 1], v0x29be6a0_3, L_0x29eec20, L_0x29eeae0, L_0x29ee6a0; +LS_0x29ef4f0_0_4 .concat8 [ 1 0 0 0], L_0x29ee2a0; +L_0x29ef4f0 .concat8 [ 14 1 0 0], LS_0x29ef4f0_0_0, LS_0x29ef4f0_0_4; +LS_0x29ef230_0_0 .concat8 [ 11 1 1 1], v0x29be6a0_0, L_0x29ee9a0, L_0x29ee580, L_0x29ee1a0; +LS_0x29ef230_0_4 .concat8 [ 1 0 0 0], L_0x29edda0; +L_0x29ef230 .concat8 [ 14 1 0 0], LS_0x29ef230_0_0, LS_0x29ef230_0_4; +LS_0x29efae0_0_0 .concat8 [ 11 1 1 1], v0x29be6a0_1, L_0x29eecd0, L_0x29ee900, L_0x29ee4e0; +LS_0x29efae0_0_4 .concat8 [ 1 0 0 0], L_0x29ee0b0; +L_0x29efae0 .concat8 [ 14 1 0 0], LS_0x29efae0_0_0, LS_0x29efae0_0_4; +L_0x29ef7d0 .part L_0x29ece00, 14, 4; +L_0x29efef0 .part L_0x29ece00, 11, 3; +L_0x29efd00 .part L_0x29ece00, 8, 3; +L_0x29f0140 .part L_0x29ece00, 10, 4; +L_0x29eff90 .part L_0x29ece00, 0, 11; +S_0x29bfba0 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x2901970; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -392,175 +392,175 @@ S_0x126ef50 .scope module, "left" "tis100" 2 22, 3 49 0, S_0x11b0b30; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x126f150 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x126f190 .param/str "memFile" 0 3 60, "anyRead/left.dat"; -L_0x127f2a0 .functor BUFZ 11, v0x126f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x128f340 .functor BUFZ 11, v0x126f490_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x128ffd0 .functor BUFZ 18, L_0x1291f90, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x126f490_0 .var/s "ACC", 10 0; -v0x126f590_0 .var/s "BAK", 10 0; -v0x126f670_0 .net "DST", 2 0, L_0x1291c60; 1 drivers -v0x126f730_0 .net/s "IMM", 10 0, L_0x1292ee0; 1 drivers -v0x126f810_0 .net "INST", 3 0, L_0x1273640; 1 drivers -v0x126f940_0 .net "LABEL", 3 0, L_0x1293090; 1 drivers -v0x126fa20_0 .var "PC", 3 0; -v0x126fb00_0 .var "PCNEXT", 3 0; -v0x126fbe0_0 .net "SRC", 2 0, L_0x12928f0; 1 drivers -v0x126fd50_0 .net *"_s103", 0 0, L_0x12912d0; 1 drivers -v0x126fe30_0 .net *"_s107", 0 0, L_0x12911e0; 1 drivers -v0x126ff10_0 .net *"_s111", 0 0, L_0x12914c0; 1 drivers -v0x126fff0_0 .net *"_s115", 0 0, L_0x12913c0; 1 drivers -v0x12700d0_0 .net *"_s119", 0 0, L_0x1291700; 1 drivers -v0x12701b0_0 .net *"_s123", 0 0, L_0x12915f0; 1 drivers -v0x1270290_0 .net *"_s127", 0 0, L_0x12918c0; 1 drivers -v0x1270370_0 .net *"_s131", 0 0, L_0x12917a0; 1 drivers -v0x1270520_0 .net *"_s135", 0 0, L_0x1291b20; 1 drivers -v0x12705c0_0 .net *"_s139", 0 0, L_0x12919f0; 1 drivers -v0x12706a0_0 .net *"_s143", 0 0, L_0x1291d00; 1 drivers -v0x1270780_0 .net *"_s147", 0 0, L_0x1291bc0; 1 drivers -v0x1270860_0 .net *"_s151", 0 0, L_0x1291ef0; 1 drivers -v0x1270940_0 .net *"_s155", 0 0, L_0x1291da0; 1 drivers -v0x1270a20_0 .net *"_s159", 0 0, L_0x1291e40; 1 drivers -v0x1270b00_0 .net *"_s160", 17 0, L_0x1291f90; 1 drivers -v0x1270be0_0 .net *"_s162", 5 0, L_0x12922f0; 1 drivers -L_0x2b8e31c88060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1270cc0_0 .net *"_s165", 1 0, L_0x2b8e31c88060; 1 drivers -v0x1272ba0_2 .array/port v0x1272ba0, 2; -v0x1270da0_0 .net *"_s173", 10 0, v0x1272ba0_2; 1 drivers -v0x1272ba0_3 .array/port v0x1272ba0, 3; -v0x1270e80_0 .net *"_s179", 10 0, v0x1272ba0_3; 1 drivers -v0x1272ba0_0 .array/port v0x1272ba0, 0; -v0x1270f60_0 .net *"_s185", 10 0, v0x1272ba0_0; 1 drivers -v0x1272ba0_1 .array/port v0x1272ba0, 1; -v0x1271040_0 .net *"_s191", 10 0, v0x1272ba0_1; 1 drivers -v0x1271120_0 .net *"_s23", 0 0, L_0x128f6c0; 1 drivers -v0x1271200_0 .net *"_s27", 0 0, L_0x128f7e0; 1 drivers -v0x1270450_0 .net *"_s31", 0 0, L_0x128f950; 1 drivers -v0x12714d0_0 .net *"_s36", 0 0, L_0x128fc00; 1 drivers -v0x12715b0_0 .net *"_s42", 0 0, L_0x128fe90; 1 drivers -v0x1271690_0 .net *"_s46", 0 0, L_0x128ff30; 1 drivers -v0x1271770_0 .net *"_s50", 0 0, L_0x1290040; 1 drivers -v0x1271850_0 .net *"_s55", 0 0, L_0x12902d0; 1 drivers -v0x1271930_0 .net *"_s61", 0 0, L_0x1290540; 1 drivers -v0x1271a10_0 .net *"_s65", 0 0, L_0x1290670; 1 drivers -v0x1271af0_0 .net *"_s69", 0 0, L_0x12907b0; 1 drivers -v0x1271bd0_0 .net *"_s74", 0 0, L_0x1290710; 1 drivers -v0x1271cb0_0 .net *"_s80", 0 0, L_0x12909a0; 1 drivers -v0x1271d90_0 .net *"_s84", 0 0, L_0x1290c90; 1 drivers -v0x1271e70_0 .net *"_s88", 0 0, L_0x1290bd0; 1 drivers -v0x1271f50_0 .net *"_s93", 0 0, L_0x1290d30; 1 drivers -v0x126f2f0_0 .net *"_s99", 0 0, L_0x1290fc0; 1 drivers -v0x1271ff0_0 .net/s "accOut", 10 0, L_0x127f2a0; 1 drivers -v0x12720d0_0 .net "anyHasData", 0 0, L_0x128fd40; 1 drivers -v0x1272190_0 .net "anyReadAck", 0 0, L_0x1290b30; 1 drivers -v0x1272250_0 .net "anyWantData", 0 0, L_0x12903c0; 1 drivers -v0x1272310_0 .net "anyWriteAck", 0 0, L_0x12910f0; 1 drivers -v0x12723d0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers -o0x2b8e31c59ef8 .functor BUFZ 15, C4; HiZ drive -v0x12724c0_0 .net "down", 14 0, o0x2b8e31c59ef8; 0 drivers -v0x12725a0_0 .net "downOut", 14 0, L_0x1292710; 1 drivers -v0x1272680_0 .net "instruction", 17 0, L_0x128ffd0; 1 drivers -v0x1272760 .array "instructions", 15 0, 17 0; -v0x1272820_0 .var "last", 2 0; -o0x2b8e31c59fb8 .functor BUFZ 15, C4; HiZ drive -v0x1272900_0 .net "left", 14 0, o0x2b8e31c59fb8; 0 drivers -v0x12729e0_0 .net "leftOut", 14 0, L_0x1292450; 1 drivers -v0x1272ac0_0 .var "mode", 2 0; -v0x1272ba0 .array/s "outVals", 2 5, 10 0; -v0x1272ce0_0 .var "phase", 2 0; -v0x1272dc0_0 .net "portsHaveData", 5 2, L_0x128f9f0; 1 drivers -v0x12712e0_0 .net "portsWantData", 5 2, L_0x12900e0; 1 drivers -v0x12713c0_0 .net "readAckIn", 5 2, L_0x1290850; 1 drivers -v0x1273270_0 .var "readAckOut", 5 2; -v0x1273350_0 .var "readTarget", 2 0; -v0x1273430_0 .var/s "readValue", 10 0; -L_0x2b8e31c88018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1273510 .array "regVals", 0 7; -v0x1273510_0 .net/s v0x1273510 0, 10 0, L_0x2b8e31c88018; 1 drivers -v0x1273510_1 .net/s v0x1273510 1, 10 0, L_0x128f340; 1 drivers -v0x1273510_2 .net/s v0x1273510 2, 10 0, L_0x128f3b0; 1 drivers -v0x1273510_3 .net/s v0x1273510 3, 10 0, L_0x128f450; 1 drivers -v0x1273510_4 .net/s v0x1273510 4, 10 0, L_0x128f4f0; 1 drivers -v0x1273510_5 .net/s v0x1273510 5, 10 0, L_0x128f590; 1 drivers -o0x2b8e31c5a378 .functor BUFZ 11, C4; HiZ drive -v0x1273510_6 .net/s v0x1273510 6, 10 0, o0x2b8e31c5a378; 0 drivers -o0x2b8e31c5a3a8 .functor BUFZ 11, C4; HiZ drive -v0x1273510_7 .net/s v0x1273510 7, 10 0, o0x2b8e31c5a3a8; 0 drivers -v0x1273720_0 .net "right", 14 0, L_0x12a28b0; alias, 1 drivers -v0x1273810_0 .net "rightOut", 14 0, L_0x1292cc0; alias, 1 drivers -o0x2b8e31c5a3d8 .functor BUFZ 15, C4; HiZ drive -v0x12738e0_0 .net "up", 14 0, o0x2b8e31c5a3d8; 0 drivers -v0x12739a0_0 .net "upOut", 14 0, L_0x1292200; 1 drivers -v0x1273a80_0 .var "weHaveData", 5 2; -v0x1273b60_0 .var "weWantData", 5 2; -v0x1273c40_0 .net "writeAckIn", 5 2, L_0x1290e00; 1 drivers -v0x1273d20_0 .var "writeAckOut", 5 2; -v0x1273e00_0 .var "writeTarget", 2 0; -v0x1273ee0_0 .var/s "writeValue", 10 0; -L_0x128f3b0 .part o0x2b8e31c59fb8, 0, 11; -L_0x128f450 .part L_0x12a28b0, 0, 11; -L_0x128f4f0 .part o0x2b8e31c5a3d8, 0, 11; -L_0x128f590 .part o0x2b8e31c59ef8, 0, 11; -L_0x128f6c0 .part o0x2b8e31c59fb8, 11, 1; -L_0x128f7e0 .part L_0x12a28b0, 11, 1; -L_0x128f950 .part o0x2b8e31c5a3d8, 11, 1; -L_0x128f9f0 .concat8 [ 1 1 1 1], L_0x128f6c0, L_0x128f7e0, L_0x128f950, L_0x128fc00; -L_0x128fc00 .part o0x2b8e31c59ef8, 11, 1; -L_0x128fd40 .reduce/or L_0x128f9f0; -L_0x128fe90 .part o0x2b8e31c59fb8, 12, 1; -L_0x128ff30 .part L_0x12a28b0, 12, 1; -L_0x1290040 .part o0x2b8e31c5a3d8, 12, 1; -L_0x12900e0 .concat8 [ 1 1 1 1], L_0x128fe90, L_0x128ff30, L_0x1290040, L_0x12902d0; -L_0x12902d0 .part o0x2b8e31c59ef8, 12, 1; -L_0x12903c0 .reduce/or L_0x12900e0; -L_0x1290540 .part o0x2b8e31c59fb8, 13, 1; -L_0x1290670 .part L_0x12a28b0, 13, 1; -L_0x12907b0 .part o0x2b8e31c5a3d8, 13, 1; -L_0x1290850 .concat8 [ 1 1 1 1], L_0x1290540, L_0x1290670, L_0x12907b0, L_0x1290710; -L_0x1290710 .part o0x2b8e31c59ef8, 13, 1; -L_0x1290b30 .reduce/or L_0x1290850; -L_0x12909a0 .part o0x2b8e31c59fb8, 14, 1; -L_0x1290c90 .part L_0x12a28b0, 14, 1; -L_0x1290bd0 .part o0x2b8e31c5a3d8, 14, 1; -L_0x1290e00 .concat8 [ 1 1 1 1], L_0x12909a0, L_0x1290c90, L_0x1290bd0, L_0x1290d30; -L_0x1290d30 .part o0x2b8e31c59ef8, 14, 1; -L_0x12910f0 .reduce/or L_0x1290e00; -L_0x1290fc0 .part v0x1273270_0, 0, 1; -L_0x12912d0 .part v0x1273270_0, 1, 1; -L_0x12911e0 .part v0x1273270_0, 2, 1; -L_0x12914c0 .part v0x1273270_0, 3, 1; -L_0x12913c0 .part v0x1273d20_0, 0, 1; -L_0x1291700 .part v0x1273d20_0, 1, 1; -L_0x12915f0 .part v0x1273d20_0, 2, 1; -L_0x12918c0 .part v0x1273d20_0, 3, 1; -L_0x12917a0 .part v0x1273b60_0, 0, 1; -L_0x1291b20 .part v0x1273b60_0, 1, 1; -L_0x12919f0 .part v0x1273b60_0, 2, 1; -L_0x1291d00 .part v0x1273b60_0, 3, 1; -L_0x1291bc0 .part v0x1273a80_0, 0, 1; -L_0x1291ef0 .part v0x1273a80_0, 1, 1; -L_0x1291da0 .part v0x1273a80_0, 2, 1; -L_0x1291e40 .part v0x1273a80_0, 3, 1; -L_0x1291f90 .array/port v0x1272760, L_0x12922f0; -L_0x12922f0 .concat [ 4 2 0 0], v0x126fa20_0, L_0x2b8e31c88060; -LS_0x1292200_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_2, L_0x1291da0, L_0x12919f0, L_0x12915f0; -LS_0x1292200_0_4 .concat8 [ 1 0 0 0], L_0x12911e0; -L_0x1292200 .concat8 [ 14 1 0 0], LS_0x1292200_0_0, LS_0x1292200_0_4; -LS_0x1292710_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_3, L_0x1291e40, L_0x1291d00, L_0x12918c0; -LS_0x1292710_0_4 .concat8 [ 1 0 0 0], L_0x12914c0; -L_0x1292710 .concat8 [ 14 1 0 0], LS_0x1292710_0_0, LS_0x1292710_0_4; -LS_0x1292450_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_0, L_0x1291bc0, L_0x12917a0, L_0x12913c0; -LS_0x1292450_0_4 .concat8 [ 1 0 0 0], L_0x1290fc0; -L_0x1292450 .concat8 [ 14 1 0 0], LS_0x1292450_0_0, LS_0x1292450_0_4; -LS_0x1292cc0_0_0 .concat8 [ 11 1 1 1], v0x1272ba0_1, L_0x1291ef0, L_0x1291b20, L_0x1291700; -LS_0x1292cc0_0_4 .concat8 [ 1 0 0 0], L_0x12912d0; -L_0x1292cc0 .concat8 [ 14 1 0 0], LS_0x1292cc0_0_0, LS_0x1292cc0_0_4; -L_0x1273640 .part L_0x128ffd0, 14, 4; -L_0x1291c60 .part L_0x128ffd0, 11, 3; -L_0x12928f0 .part L_0x128ffd0, 8, 3; -L_0x1293090 .part L_0x128ffd0, 10, 4; -L_0x1292ee0 .part L_0x128ffd0, 0, 11; -S_0x1274160 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x11b0b30; +P_0x29bfda0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x29bfde0 .param/str "memFile" 0 3 60, "anyRead/left.dat"; +L_0x29cfef0 .functor BUFZ 11, v0x29c00e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29dff90 .functor BUFZ 11, v0x29c00e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29e0bf0 .functor BUFZ 18, L_0x29e2bb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x29c00e0_0 .var/s "ACC", 10 0; +v0x29c01e0_0 .var/s "BAK", 10 0; +v0x29c02c0_0 .net "DST", 2 0, L_0x29e3bf0; 1 drivers +v0x29c0380_0 .net/s "IMM", 10 0, L_0x29e3c90; 1 drivers +v0x29c0460_0 .net "INST", 3 0, L_0x29e34d0; 1 drivers +v0x29c0590_0 .net "LABEL", 3 0, L_0x29e3e40; 1 drivers +v0x29c0670_0 .var "PC", 3 0; +v0x29c0750_0 .var "PCNEXT", 3 0; +v0x29c0830_0 .net "SRC", 2 0, L_0x29e3a00; 1 drivers +v0x29c09a0_0 .net *"_s103", 0 0, L_0x29e1ef0; 1 drivers +v0x29c0a80_0 .net *"_s107", 0 0, L_0x29e1e00; 1 drivers +v0x29c0b60_0 .net *"_s111", 0 0, L_0x29e20e0; 1 drivers +v0x29c0c40_0 .net *"_s115", 0 0, L_0x29e1fe0; 1 drivers +v0x29c0d20_0 .net *"_s119", 0 0, L_0x29e2320; 1 drivers +v0x29c0e00_0 .net *"_s123", 0 0, L_0x29e2210; 1 drivers +v0x29c0ee0_0 .net *"_s127", 0 0, L_0x29e24e0; 1 drivers +v0x29c0fc0_0 .net *"_s131", 0 0, L_0x29e23c0; 1 drivers +v0x29c1170_0 .net *"_s135", 0 0, L_0x29e2740; 1 drivers +v0x29c1210_0 .net *"_s139", 0 0, L_0x29e2610; 1 drivers +v0x29c12f0_0 .net *"_s143", 0 0, L_0x29e2920; 1 drivers +v0x29c13d0_0 .net *"_s147", 0 0, L_0x29e27e0; 1 drivers +v0x29c14b0_0 .net *"_s151", 0 0, L_0x29e2b10; 1 drivers +v0x29c1590_0 .net *"_s155", 0 0, L_0x29e29c0; 1 drivers +v0x29c1670_0 .net *"_s159", 0 0, L_0x29e2a60; 1 drivers +v0x29c1750_0 .net *"_s160", 17 0, L_0x29e2bb0; 1 drivers +v0x29c1830_0 .net *"_s162", 5 0, L_0x29e2f10; 1 drivers +L_0x2acb326b4060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x29c1910_0 .net *"_s165", 1 0, L_0x2acb326b4060; 1 drivers +v0x29c37f0_2 .array/port v0x29c37f0, 2; +v0x29c19f0_0 .net *"_s173", 10 0, v0x29c37f0_2; 1 drivers +v0x29c37f0_3 .array/port v0x29c37f0, 3; +v0x29c1ad0_0 .net *"_s179", 10 0, v0x29c37f0_3; 1 drivers +v0x29c37f0_0 .array/port v0x29c37f0, 0; +v0x29c1bb0_0 .net *"_s185", 10 0, v0x29c37f0_0; 1 drivers +v0x29c37f0_1 .array/port v0x29c37f0, 1; +v0x29c1c90_0 .net *"_s191", 10 0, v0x29c37f0_1; 1 drivers +v0x29c1d70_0 .net *"_s23", 0 0, L_0x29e0310; 1 drivers +v0x29c1e50_0 .net *"_s27", 0 0, L_0x29e0430; 1 drivers +v0x29bff40_0 .net *"_s31", 0 0, L_0x29e05a0; 1 drivers +v0x29c1060_0 .net *"_s36", 0 0, L_0x29e0820; 1 drivers +v0x29c2100_0 .net *"_s42", 0 0, L_0x29e0ab0; 1 drivers +v0x29c21c0_0 .net *"_s46", 0 0, L_0x29e0b50; 1 drivers +v0x29c22a0_0 .net *"_s50", 0 0, L_0x29e0c60; 1 drivers +v0x29c2380_0 .net *"_s55", 0 0, L_0x29e0ef0; 1 drivers +v0x29c2460_0 .net *"_s61", 0 0, L_0x29e1160; 1 drivers +v0x29c2540_0 .net *"_s65", 0 0, L_0x29e1290; 1 drivers +v0x29c2620_0 .net *"_s69", 0 0, L_0x29e13d0; 1 drivers +v0x29c2700_0 .net *"_s74", 0 0, L_0x29e1330; 1 drivers +v0x29c27e0_0 .net *"_s80", 0 0, L_0x29e15c0; 1 drivers +v0x29c28c0_0 .net *"_s84", 0 0, L_0x29e18b0; 1 drivers +v0x29c29a0_0 .net *"_s88", 0 0, L_0x29e17f0; 1 drivers +v0x29c2a80_0 .net *"_s93", 0 0, L_0x29e1950; 1 drivers +v0x29c2b60_0 .net *"_s99", 0 0, L_0x29e1be0; 1 drivers +v0x29c2c40_0 .net/s "accOut", 10 0, L_0x29cfef0; 1 drivers +v0x29c2d20_0 .net "anyHasData", 0 0, L_0x29e0960; 1 drivers +v0x29c2de0_0 .net "anyReadAck", 0 0, L_0x29e1750; 1 drivers +v0x29c2ea0_0 .net "anyWantData", 0 0, L_0x29e0fe0; 1 drivers +v0x29c2f60_0 .net "anyWriteAck", 0 0, L_0x29e1d10; 1 drivers +v0x29c3020_0 .net "clk", 0 0, v0x29cfc10_0; alias, 1 drivers +o0x2acb32685ef8 .functor BUFZ 15, C4; HiZ drive +v0x29c3110_0 .net "down", 14 0, o0x2acb32685ef8; 0 drivers +v0x29c31f0_0 .net "downOut", 14 0, L_0x29e31f0; 1 drivers +v0x29c32d0_0 .net "instruction", 17 0, L_0x29e0bf0; 1 drivers +v0x29c33b0 .array "instructions", 15 0, 17 0; +v0x29c3470_0 .var "last", 2 0; +o0x2acb32685fb8 .functor BUFZ 15, C4; HiZ drive +v0x29c3550_0 .net "left", 14 0, o0x2acb32685fb8; 0 drivers +v0x29c3630_0 .net "leftOut", 14 0, L_0x29e3070; 1 drivers +v0x29c3710_0 .var "mode", 2 0; +v0x29c37f0 .array/s "outVals", 2 5, 10 0; +v0x29c3930_0 .var "phase", 2 0; +v0x29c3a10_0 .net "portsHaveData", 5 2, L_0x29e0640; 1 drivers +v0x29c1f30_0 .net "portsWantData", 5 2, L_0x29e0d00; 1 drivers +v0x29c2010_0 .net "readAckIn", 5 2, L_0x29e1470; 1 drivers +v0x29c3ec0_0 .var "readAckOut", 5 2; +v0x29c3fa0_0 .var "readTarget", 2 0; +v0x29c4080_0 .var/s "readValue", 10 0; +L_0x2acb326b4018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x29c4160 .array "regVals", 0 7; +v0x29c4160_0 .net/s v0x29c4160 0, 10 0, L_0x2acb326b4018; 1 drivers +v0x29c4160_1 .net/s v0x29c4160 1, 10 0, L_0x29dff90; 1 drivers +v0x29c4160_2 .net/s v0x29c4160 2, 10 0, L_0x29e0000; 1 drivers +v0x29c4160_3 .net/s v0x29c4160 3, 10 0, L_0x29e00a0; 1 drivers +v0x29c4160_4 .net/s v0x29c4160 4, 10 0, L_0x29e0140; 1 drivers +v0x29c4160_5 .net/s v0x29c4160 5, 10 0, L_0x29e01e0; 1 drivers +o0x2acb32686378 .functor BUFZ 11, C4; HiZ drive +v0x29c4160_6 .net/s v0x29c4160 6, 10 0, o0x2acb32686378; 0 drivers +o0x2acb326863a8 .functor BUFZ 11, C4; HiZ drive +v0x29c4160_7 .net/s v0x29c4160 7, 10 0, o0x2acb326863a8; 0 drivers +v0x29c4370_0 .net "right", 14 0, L_0x29f3500; alias, 1 drivers +v0x29c4460_0 .net "rightOut", 14 0, L_0x29e37e0; alias, 1 drivers +o0x2acb326863d8 .functor BUFZ 15, C4; HiZ drive +v0x29c4530_0 .net "up", 14 0, o0x2acb326863d8; 0 drivers +v0x29c45f0_0 .net "upOut", 14 0, L_0x29c4290; 1 drivers +v0x29c46d0_0 .var "weHaveData", 5 2; +v0x29c47b0_0 .var "weWantData", 5 2; +v0x29c4890_0 .net "writeAckIn", 5 2, L_0x29e1a20; 1 drivers +v0x29c4970_0 .var "writeAckOut", 5 2; +v0x29c4a50_0 .var "writeTarget", 2 0; +v0x29c4b30_0 .var/s "writeValue", 10 0; +L_0x29e0000 .part o0x2acb32685fb8, 0, 11; +L_0x29e00a0 .part L_0x29f3500, 0, 11; +L_0x29e0140 .part o0x2acb326863d8, 0, 11; +L_0x29e01e0 .part o0x2acb32685ef8, 0, 11; +L_0x29e0310 .part o0x2acb32685fb8, 11, 1; +L_0x29e0430 .part L_0x29f3500, 11, 1; +L_0x29e05a0 .part o0x2acb326863d8, 11, 1; +L_0x29e0640 .concat8 [ 1 1 1 1], L_0x29e0310, L_0x29e0430, L_0x29e05a0, L_0x29e0820; +L_0x29e0820 .part o0x2acb32685ef8, 11, 1; +L_0x29e0960 .reduce/or L_0x29e0640; +L_0x29e0ab0 .part o0x2acb32685fb8, 12, 1; +L_0x29e0b50 .part L_0x29f3500, 12, 1; +L_0x29e0c60 .part o0x2acb326863d8, 12, 1; +L_0x29e0d00 .concat8 [ 1 1 1 1], L_0x29e0ab0, L_0x29e0b50, L_0x29e0c60, L_0x29e0ef0; +L_0x29e0ef0 .part o0x2acb32685ef8, 12, 1; +L_0x29e0fe0 .reduce/or L_0x29e0d00; +L_0x29e1160 .part o0x2acb32685fb8, 13, 1; +L_0x29e1290 .part L_0x29f3500, 13, 1; +L_0x29e13d0 .part o0x2acb326863d8, 13, 1; +L_0x29e1470 .concat8 [ 1 1 1 1], L_0x29e1160, L_0x29e1290, L_0x29e13d0, L_0x29e1330; +L_0x29e1330 .part o0x2acb32685ef8, 13, 1; +L_0x29e1750 .reduce/or L_0x29e1470; +L_0x29e15c0 .part o0x2acb32685fb8, 14, 1; +L_0x29e18b0 .part L_0x29f3500, 14, 1; +L_0x29e17f0 .part o0x2acb326863d8, 14, 1; +L_0x29e1a20 .concat8 [ 1 1 1 1], L_0x29e15c0, L_0x29e18b0, L_0x29e17f0, L_0x29e1950; +L_0x29e1950 .part o0x2acb32685ef8, 14, 1; +L_0x29e1d10 .reduce/or L_0x29e1a20; +L_0x29e1be0 .part v0x29c3ec0_0, 0, 1; +L_0x29e1ef0 .part v0x29c3ec0_0, 1, 1; +L_0x29e1e00 .part v0x29c3ec0_0, 2, 1; +L_0x29e20e0 .part v0x29c3ec0_0, 3, 1; +L_0x29e1fe0 .part v0x29c4970_0, 0, 1; +L_0x29e2320 .part v0x29c4970_0, 1, 1; +L_0x29e2210 .part v0x29c4970_0, 2, 1; +L_0x29e24e0 .part v0x29c4970_0, 3, 1; +L_0x29e23c0 .part v0x29c47b0_0, 0, 1; +L_0x29e2740 .part v0x29c47b0_0, 1, 1; +L_0x29e2610 .part v0x29c47b0_0, 2, 1; +L_0x29e2920 .part v0x29c47b0_0, 3, 1; +L_0x29e27e0 .part v0x29c46d0_0, 0, 1; +L_0x29e2b10 .part v0x29c46d0_0, 1, 1; +L_0x29e29c0 .part v0x29c46d0_0, 2, 1; +L_0x29e2a60 .part v0x29c46d0_0, 3, 1; +L_0x29e2bb0 .array/port v0x29c33b0, L_0x29e2f10; +L_0x29e2f10 .concat [ 4 2 0 0], v0x29c0670_0, L_0x2acb326b4060; +LS_0x29c4290_0_0 .concat8 [ 11 1 1 1], v0x29c37f0_2, L_0x29e29c0, L_0x29e2610, L_0x29e2210; +LS_0x29c4290_0_4 .concat8 [ 1 0 0 0], L_0x29e1e00; +L_0x29c4290 .concat8 [ 14 1 0 0], LS_0x29c4290_0_0, LS_0x29c4290_0_4; +LS_0x29e31f0_0_0 .concat8 [ 11 1 1 1], v0x29c37f0_3, L_0x29e2a60, L_0x29e2920, L_0x29e24e0; +LS_0x29e31f0_0_4 .concat8 [ 1 0 0 0], L_0x29e20e0; +L_0x29e31f0 .concat8 [ 14 1 0 0], LS_0x29e31f0_0_0, LS_0x29e31f0_0_4; +LS_0x29e3070_0_0 .concat8 [ 11 1 1 1], v0x29c37f0_0, L_0x29e27e0, L_0x29e23c0, L_0x29e1fe0; +LS_0x29e3070_0_4 .concat8 [ 1 0 0 0], L_0x29e1be0; +L_0x29e3070 .concat8 [ 14 1 0 0], LS_0x29e3070_0_0, LS_0x29e3070_0_4; +LS_0x29e37e0_0_0 .concat8 [ 11 1 1 1], v0x29c37f0_1, L_0x29e2b10, L_0x29e2740, L_0x29e2320; +LS_0x29e37e0_0_4 .concat8 [ 1 0 0 0], L_0x29e1ef0; +L_0x29e37e0 .concat8 [ 14 1 0 0], LS_0x29e37e0_0_0, LS_0x29e37e0_0_4; +L_0x29e34d0 .part L_0x29e0bf0, 14, 4; +L_0x29e3bf0 .part L_0x29e0bf0, 11, 3; +L_0x29e3a00 .part L_0x29e0bf0, 8, 3; +L_0x29e3e40 .part L_0x29e0bf0, 10, 4; +L_0x29e3c90 .part L_0x29e0bf0, 0, 11; +S_0x29c4db0 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x2901970; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -572,175 +572,175 @@ S_0x1274160 .scope module, "right" "tis100" 2 23, 3 49 0, S_0x11b0b30; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1274330 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1274370 .param/str "memFile" 0 3 60, "anyRead/right.dat"; -L_0x1292f80 .functor BUFZ 11, v0x12746e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x12932f0 .functor BUFZ 11, v0x12746e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1293fb0 .functor BUFZ 18, L_0x1295fa0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x12746e0_0 .var/s "ACC", 10 0; -v0x12747e0_0 .var/s "BAK", 10 0; -v0x12748c0_0 .net "DST", 2 0, L_0x12970e0; 1 drivers -v0x1274980_0 .net/s "IMM", 10 0, L_0x1297180; 1 drivers -v0x1274a60_0 .net "INST", 3 0, L_0x12969c0; 1 drivers -v0x1274b40_0 .net "LABEL", 3 0, L_0x1297330; 1 drivers -v0x1274c20_0 .var "PC", 3 0; -v0x1274d00_0 .var "PCNEXT", 3 0; -v0x1274de0_0 .net "SRC", 2 0, L_0x1296ef0; 1 drivers -v0x1274f50_0 .net *"_s103", 0 0, L_0x12952e0; 1 drivers -v0x1275030_0 .net *"_s107", 0 0, L_0x12951f0; 1 drivers -v0x1275110_0 .net *"_s111", 0 0, L_0x12954d0; 1 drivers -v0x12751f0_0 .net *"_s115", 0 0, L_0x12953d0; 1 drivers -v0x12752d0_0 .net *"_s119", 0 0, L_0x1295710; 1 drivers -v0x12753b0_0 .net *"_s123", 0 0, L_0x1295600; 1 drivers -v0x1275490_0 .net *"_s127", 0 0, L_0x12958d0; 1 drivers -v0x1275570_0 .net *"_s131", 0 0, L_0x12957b0; 1 drivers -v0x1275720_0 .net *"_s135", 0 0, L_0x1295b30; 1 drivers -v0x12757c0_0 .net *"_s139", 0 0, L_0x1295a00; 1 drivers -v0x12758a0_0 .net *"_s143", 0 0, L_0x1295d10; 1 drivers -v0x1275980_0 .net *"_s147", 0 0, L_0x1295bd0; 1 drivers -v0x1275a60_0 .net *"_s151", 0 0, L_0x1295f00; 1 drivers -v0x1275b40_0 .net *"_s155", 0 0, L_0x1295db0; 1 drivers -v0x1275c20_0 .net *"_s159", 0 0, L_0x1295e50; 1 drivers -v0x1275d00_0 .net *"_s160", 17 0, L_0x1295fa0; 1 drivers -v0x1275de0_0 .net *"_s162", 5 0, L_0x1296300; 1 drivers -L_0x2b8e31c880f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1275ec0_0 .net *"_s165", 1 0, L_0x2b8e31c880f0; 1 drivers -v0x1277df0_2 .array/port v0x1277df0, 2; -v0x1275fa0_0 .net *"_s173", 10 0, v0x1277df0_2; 1 drivers -v0x1277df0_3 .array/port v0x1277df0, 3; -v0x1276080_0 .net *"_s179", 10 0, v0x1277df0_3; 1 drivers -v0x1277df0_0 .array/port v0x1277df0, 0; -v0x1276160_0 .net *"_s185", 10 0, v0x1277df0_0; 1 drivers -v0x1277df0_1 .array/port v0x1277df0, 1; -v0x1276240_0 .net *"_s191", 10 0, v0x1277df0_1; 1 drivers -v0x1276320_0 .net *"_s23", 0 0, L_0x12936a0; 1 drivers -v0x1276400_0 .net *"_s27", 0 0, L_0x1293800; 1 drivers -v0x1275650_0 .net *"_s31", 0 0, L_0x1293910; 1 drivers -v0x12766d0_0 .net *"_s36", 0 0, L_0x1293be0; 1 drivers -v0x12767b0_0 .net *"_s42", 0 0, L_0x1293e70; 1 drivers -v0x1276890_0 .net *"_s46", 0 0, L_0x1293f10; 1 drivers -v0x1276970_0 .net *"_s50", 0 0, L_0x1294020; 1 drivers -v0x1276a50_0 .net *"_s55", 0 0, L_0x12942b0; 1 drivers -v0x1276b30_0 .net *"_s61", 0 0, L_0x1294520; 1 drivers -v0x1276c10_0 .net *"_s65", 0 0, L_0x12945c0; 1 drivers -v0x1276cf0_0 .net *"_s69", 0 0, L_0x1294790; 1 drivers -v0x1276dd0_0 .net *"_s74", 0 0, L_0x12946f0; 1 drivers -v0x1276eb0_0 .net *"_s80", 0 0, L_0x1294980; 1 drivers -v0x1276f90_0 .net *"_s84", 0 0, L_0x1294c70; 1 drivers -v0x1277070_0 .net *"_s88", 0 0, L_0x1294bb0; 1 drivers -v0x1277150_0 .net *"_s93", 0 0, L_0x1294d10; 1 drivers -v0x1277230_0 .net *"_s99", 0 0, L_0x1294fd0; 1 drivers -v0x1277310_0 .net/s "accOut", 10 0, L_0x1292f80; 1 drivers -v0x12773f0_0 .net "anyHasData", 0 0, L_0x1293d20; 1 drivers -v0x12774b0_0 .net "anyReadAck", 0 0, L_0x1294b10; 1 drivers -v0x1277570_0 .net "anyWantData", 0 0, L_0x12943a0; 1 drivers -v0x1277630_0 .net "anyWriteAck", 0 0, L_0x1295100; 1 drivers -v0x12776f0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers -o0x2b8e31c5b128 .functor BUFZ 15, C4; HiZ drive -v0x1277790_0 .net "down", 14 0, o0x2b8e31c5b128; 0 drivers -v0x1277870_0 .net "downOut", 14 0, L_0x1296720; 1 drivers -v0x1277950_0 .net "instruction", 17 0, L_0x1293fb0; 1 drivers -v0x1277a30 .array "instructions", 15 0, 17 0; -v0x1277af0_0 .var "last", 2 0; -v0x1277bd0_0 .net "left", 14 0, L_0x12a3280; alias, 1 drivers -v0x1277c90_0 .net "leftOut", 14 0, L_0x1296460; alias, 1 drivers -v0x1277d30_0 .var "mode", 2 0; -v0x1277df0 .array/s "outVals", 2 5, 10 0; -v0x1277f60_0 .var "phase", 2 0; -v0x1278040_0 .net "portsHaveData", 5 2, L_0x1293a00; 1 drivers -v0x12764a0_0 .net "portsWantData", 5 2, L_0x12940c0; 1 drivers -v0x1276580_0 .net "readAckIn", 5 2, L_0x1294830; 1 drivers -v0x12784f0_0 .var "readAckOut", 5 2; -v0x1278590_0 .var "readTarget", 2 0; -v0x1278630_0 .var/s "readValue", 10 0; -L_0x2b8e31c880a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x12786d0 .array "regVals", 0 7; -v0x12786d0_0 .net/s v0x12786d0 0, 10 0, L_0x2b8e31c880a8; 1 drivers -v0x12786d0_1 .net/s v0x12786d0 1, 10 0, L_0x12932f0; 1 drivers -v0x12786d0_2 .net/s v0x12786d0 2, 10 0, L_0x1293360; 1 drivers -v0x12786d0_3 .net/s v0x12786d0 3, 10 0, L_0x1293400; 1 drivers -v0x12786d0_4 .net/s v0x12786d0 4, 10 0, L_0x12934a0; 1 drivers -v0x12786d0_5 .net/s v0x12786d0 5, 10 0, L_0x1293570; 1 drivers -o0x2b8e31c5b548 .functor BUFZ 11, C4; HiZ drive -v0x12786d0_6 .net/s v0x12786d0 6, 10 0, o0x2b8e31c5b548; 0 drivers -o0x2b8e31c5b578 .functor BUFZ 11, C4; HiZ drive -v0x12786d0_7 .net/s v0x12786d0 7, 10 0, o0x2b8e31c5b578; 0 drivers -o0x2b8e31c5b5a8 .functor BUFZ 15, C4; HiZ drive -v0x12788e0_0 .net "right", 14 0, o0x2b8e31c5b5a8; 0 drivers -v0x12789c0_0 .net "rightOut", 14 0, L_0x1296cd0; 1 drivers -o0x2b8e31c5b608 .functor BUFZ 15, C4; HiZ drive -v0x1278aa0_0 .net "up", 14 0, o0x2b8e31c5b608; 0 drivers -v0x1278b80_0 .net "upOut", 14 0, L_0x1296210; 1 drivers -v0x1278c60_0 .var "weHaveData", 5 2; -v0x1278d40_0 .var "weWantData", 5 2; -v0x1278e20_0 .net "writeAckIn", 5 2, L_0x1294de0; 1 drivers -v0x1278f00_0 .var "writeAckOut", 5 2; -v0x1278fe0_0 .var "writeTarget", 2 0; -v0x12790c0_0 .var/s "writeValue", 10 0; -L_0x1293360 .part L_0x12a3280, 0, 11; -L_0x1293400 .part o0x2b8e31c5b5a8, 0, 11; -L_0x12934a0 .part o0x2b8e31c5b608, 0, 11; -L_0x1293570 .part o0x2b8e31c5b128, 0, 11; -L_0x12936a0 .part L_0x12a3280, 11, 1; -L_0x1293800 .part o0x2b8e31c5b5a8, 11, 1; -L_0x1293910 .part o0x2b8e31c5b608, 11, 1; -L_0x1293a00 .concat8 [ 1 1 1 1], L_0x12936a0, L_0x1293800, L_0x1293910, L_0x1293be0; -L_0x1293be0 .part o0x2b8e31c5b128, 11, 1; -L_0x1293d20 .reduce/or L_0x1293a00; -L_0x1293e70 .part L_0x12a3280, 12, 1; -L_0x1293f10 .part o0x2b8e31c5b5a8, 12, 1; -L_0x1294020 .part o0x2b8e31c5b608, 12, 1; -L_0x12940c0 .concat8 [ 1 1 1 1], L_0x1293e70, L_0x1293f10, L_0x1294020, L_0x12942b0; -L_0x12942b0 .part o0x2b8e31c5b128, 12, 1; -L_0x12943a0 .reduce/or L_0x12940c0; -L_0x1294520 .part L_0x12a3280, 13, 1; -L_0x12945c0 .part o0x2b8e31c5b5a8, 13, 1; -L_0x1294790 .part o0x2b8e31c5b608, 13, 1; -L_0x1294830 .concat8 [ 1 1 1 1], L_0x1294520, L_0x12945c0, L_0x1294790, L_0x12946f0; -L_0x12946f0 .part o0x2b8e31c5b128, 13, 1; -L_0x1294b10 .reduce/or L_0x1294830; -L_0x1294980 .part L_0x12a3280, 14, 1; -L_0x1294c70 .part o0x2b8e31c5b5a8, 14, 1; -L_0x1294bb0 .part o0x2b8e31c5b608, 14, 1; -L_0x1294de0 .concat8 [ 1 1 1 1], L_0x1294980, L_0x1294c70, L_0x1294bb0, L_0x1294d10; -L_0x1294d10 .part o0x2b8e31c5b128, 14, 1; -L_0x1295100 .reduce/or L_0x1294de0; -L_0x1294fd0 .part v0x12784f0_0, 0, 1; -L_0x12952e0 .part v0x12784f0_0, 1, 1; -L_0x12951f0 .part v0x12784f0_0, 2, 1; -L_0x12954d0 .part v0x12784f0_0, 3, 1; -L_0x12953d0 .part v0x1278f00_0, 0, 1; -L_0x1295710 .part v0x1278f00_0, 1, 1; -L_0x1295600 .part v0x1278f00_0, 2, 1; -L_0x12958d0 .part v0x1278f00_0, 3, 1; -L_0x12957b0 .part v0x1278d40_0, 0, 1; -L_0x1295b30 .part v0x1278d40_0, 1, 1; -L_0x1295a00 .part v0x1278d40_0, 2, 1; -L_0x1295d10 .part v0x1278d40_0, 3, 1; -L_0x1295bd0 .part v0x1278c60_0, 0, 1; -L_0x1295f00 .part v0x1278c60_0, 1, 1; -L_0x1295db0 .part v0x1278c60_0, 2, 1; -L_0x1295e50 .part v0x1278c60_0, 3, 1; -L_0x1295fa0 .array/port v0x1277a30, L_0x1296300; -L_0x1296300 .concat [ 4 2 0 0], v0x1274c20_0, L_0x2b8e31c880f0; -LS_0x1296210_0_0 .concat8 [ 11 1 1 1], v0x1277df0_2, L_0x1295db0, L_0x1295a00, L_0x1295600; -LS_0x1296210_0_4 .concat8 [ 1 0 0 0], L_0x12951f0; -L_0x1296210 .concat8 [ 14 1 0 0], LS_0x1296210_0_0, LS_0x1296210_0_4; -LS_0x1296720_0_0 .concat8 [ 11 1 1 1], v0x1277df0_3, L_0x1295e50, L_0x1295d10, L_0x12958d0; -LS_0x1296720_0_4 .concat8 [ 1 0 0 0], L_0x12954d0; -L_0x1296720 .concat8 [ 14 1 0 0], LS_0x1296720_0_0, LS_0x1296720_0_4; -LS_0x1296460_0_0 .concat8 [ 11 1 1 1], v0x1277df0_0, L_0x1295bd0, L_0x12957b0, L_0x12953d0; -LS_0x1296460_0_4 .concat8 [ 1 0 0 0], L_0x1294fd0; -L_0x1296460 .concat8 [ 14 1 0 0], LS_0x1296460_0_0, LS_0x1296460_0_4; -LS_0x1296cd0_0_0 .concat8 [ 11 1 1 1], v0x1277df0_1, L_0x1295f00, L_0x1295b30, L_0x1295710; -LS_0x1296cd0_0_4 .concat8 [ 1 0 0 0], L_0x12952e0; -L_0x1296cd0 .concat8 [ 14 1 0 0], LS_0x1296cd0_0_0, LS_0x1296cd0_0_4; -L_0x12969c0 .part L_0x1293fb0, 14, 4; -L_0x12970e0 .part L_0x1293fb0, 11, 3; -L_0x1296ef0 .part L_0x1293fb0, 8, 3; -L_0x1297330 .part L_0x1293fb0, 10, 4; -L_0x1297180 .part L_0x1293fb0, 0, 11; -S_0x1279340 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x11b0b30; +P_0x29c4f80 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x29c4fc0 .param/str "memFile" 0 3 60, "anyRead/right.dat"; +L_0x29e3b30 .functor BUFZ 11, v0x29c5330_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29e3d30 .functor BUFZ 11, v0x29c5330_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29e4c40 .functor BUFZ 18, L_0x29e6c30, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x29c5330_0 .var/s "ACC", 10 0; +v0x29c5430_0 .var/s "BAK", 10 0; +v0x29c5510_0 .net "DST", 2 0, L_0x29e7d30; 1 drivers +v0x29c55d0_0 .net/s "IMM", 10 0, L_0x29e7dd0; 1 drivers +v0x29c56b0_0 .net "INST", 3 0, L_0x29e7650; 1 drivers +v0x29c5790_0 .net "LABEL", 3 0, L_0x29e7f80; 1 drivers +v0x29c5870_0 .var "PC", 3 0; +v0x29c5950_0 .var "PCNEXT", 3 0; +v0x29c5a30_0 .net "SRC", 2 0, L_0x29e7b40; 1 drivers +v0x29c5ba0_0 .net *"_s103", 0 0, L_0x29e5f70; 1 drivers +v0x29c5c80_0 .net *"_s107", 0 0, L_0x29e5e80; 1 drivers +v0x29c5d60_0 .net *"_s111", 0 0, L_0x29e6160; 1 drivers +v0x29c5e40_0 .net *"_s115", 0 0, L_0x29e6060; 1 drivers +v0x29c5f20_0 .net *"_s119", 0 0, L_0x29e63a0; 1 drivers +v0x29c6000_0 .net *"_s123", 0 0, L_0x29e6290; 1 drivers +v0x29c60e0_0 .net *"_s127", 0 0, L_0x29e6560; 1 drivers +v0x29c61c0_0 .net *"_s131", 0 0, L_0x29e6440; 1 drivers +v0x29c6370_0 .net *"_s135", 0 0, L_0x29e67c0; 1 drivers +v0x29c6410_0 .net *"_s139", 0 0, L_0x29e6690; 1 drivers +v0x29c64f0_0 .net *"_s143", 0 0, L_0x29e69a0; 1 drivers +v0x29c65d0_0 .net *"_s147", 0 0, L_0x29e6860; 1 drivers +v0x29c66b0_0 .net *"_s151", 0 0, L_0x29e6b90; 1 drivers +v0x29c6790_0 .net *"_s155", 0 0, L_0x29e6a40; 1 drivers +v0x29c6870_0 .net *"_s159", 0 0, L_0x29e6ae0; 1 drivers +v0x29c6950_0 .net *"_s160", 17 0, L_0x29e6c30; 1 drivers +v0x29c6a30_0 .net *"_s162", 5 0, L_0x29e6f90; 1 drivers +L_0x2acb326b40f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x29c6b10_0 .net *"_s165", 1 0, L_0x2acb326b40f0; 1 drivers +v0x29c8a40_2 .array/port v0x29c8a40, 2; +v0x29c6bf0_0 .net *"_s173", 10 0, v0x29c8a40_2; 1 drivers +v0x29c8a40_3 .array/port v0x29c8a40, 3; +v0x29c6cd0_0 .net *"_s179", 10 0, v0x29c8a40_3; 1 drivers +v0x29c8a40_0 .array/port v0x29c8a40, 0; +v0x29c6db0_0 .net *"_s185", 10 0, v0x29c8a40_0; 1 drivers +v0x29c8a40_1 .array/port v0x29c8a40, 1; +v0x29c6e90_0 .net *"_s191", 10 0, v0x29c8a40_1; 1 drivers +v0x29c6f70_0 .net *"_s23", 0 0, L_0x29e4370; 1 drivers +v0x29c7050_0 .net *"_s27", 0 0, L_0x29e44d0; 1 drivers +v0x29c62a0_0 .net *"_s31", 0 0, L_0x29e45a0; 1 drivers +v0x29c7320_0 .net *"_s36", 0 0, L_0x29e4870; 1 drivers +v0x29c7400_0 .net *"_s42", 0 0, L_0x29e4b00; 1 drivers +v0x29c74e0_0 .net *"_s46", 0 0, L_0x29e4ba0; 1 drivers +v0x29c75c0_0 .net *"_s50", 0 0, L_0x29e4cb0; 1 drivers +v0x29c76a0_0 .net *"_s55", 0 0, L_0x29e4f40; 1 drivers +v0x29c7780_0 .net *"_s61", 0 0, L_0x29e51b0; 1 drivers +v0x29c7860_0 .net *"_s65", 0 0, L_0x29e5250; 1 drivers +v0x29c7940_0 .net *"_s69", 0 0, L_0x29e5420; 1 drivers +v0x29c7a20_0 .net *"_s74", 0 0, L_0x29e5380; 1 drivers +v0x29c7b00_0 .net *"_s80", 0 0, L_0x29e5610; 1 drivers +v0x29c7be0_0 .net *"_s84", 0 0, L_0x29e5900; 1 drivers +v0x29c7cc0_0 .net *"_s88", 0 0, L_0x29e5840; 1 drivers +v0x29c7da0_0 .net *"_s93", 0 0, L_0x29e59a0; 1 drivers +v0x29c7e80_0 .net *"_s99", 0 0, L_0x29e5c60; 1 drivers +v0x29c7f60_0 .net/s "accOut", 10 0, L_0x29e3b30; 1 drivers +v0x29c8040_0 .net "anyHasData", 0 0, L_0x29e49b0; 1 drivers +v0x29c8100_0 .net "anyReadAck", 0 0, L_0x29e57a0; 1 drivers +v0x29c81c0_0 .net "anyWantData", 0 0, L_0x29e5030; 1 drivers +v0x29c8280_0 .net "anyWriteAck", 0 0, L_0x29e5d90; 1 drivers +v0x29c8340_0 .net "clk", 0 0, v0x29cfc10_0; alias, 1 drivers +o0x2acb32687128 .functor BUFZ 15, C4; HiZ drive +v0x29c83e0_0 .net "down", 14 0, o0x2acb32687128; 0 drivers +v0x29c84c0_0 .net "downOut", 14 0, L_0x29e73b0; 1 drivers +v0x29c85a0_0 .net "instruction", 17 0, L_0x29e4c40; 1 drivers +v0x29c8680 .array "instructions", 15 0, 17 0; +v0x29c8740_0 .var "last", 2 0; +v0x29c8820_0 .net "left", 14 0, L_0x29f3ed0; alias, 1 drivers +v0x29c88e0_0 .net "leftOut", 14 0, L_0x29e70f0; alias, 1 drivers +v0x29c8980_0 .var "mode", 2 0; +v0x29c8a40 .array/s "outVals", 2 5, 10 0; +v0x29c8bb0_0 .var "phase", 2 0; +v0x29c8c90_0 .net "portsHaveData", 5 2, L_0x29e4690; 1 drivers +v0x29c70f0_0 .net "portsWantData", 5 2, L_0x29e4d50; 1 drivers +v0x29c71d0_0 .net "readAckIn", 5 2, L_0x29e54c0; 1 drivers +v0x29c9140_0 .var "readAckOut", 5 2; +v0x29c91e0_0 .var "readTarget", 2 0; +v0x29c9280_0 .var/s "readValue", 10 0; +L_0x2acb326b40a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x29c9320 .array "regVals", 0 7; +v0x29c9320_0 .net/s v0x29c9320 0, 10 0, L_0x2acb326b40a8; 1 drivers +v0x29c9320_1 .net/s v0x29c9320 1, 10 0, L_0x29e3d30; 1 drivers +v0x29c9320_2 .net/s v0x29c9320 2, 10 0, L_0x29e3da0; 1 drivers +v0x29c9320_3 .net/s v0x29c9320 3, 10 0, L_0x29e40a0; 1 drivers +v0x29c9320_4 .net/s v0x29c9320 4, 10 0, L_0x29e4140; 1 drivers +v0x29c9320_5 .net/s v0x29c9320 5, 10 0, L_0x29e4240; 1 drivers +o0x2acb32687548 .functor BUFZ 11, C4; HiZ drive +v0x29c9320_6 .net/s v0x29c9320 6, 10 0, o0x2acb32687548; 0 drivers +o0x2acb32687578 .functor BUFZ 11, C4; HiZ drive +v0x29c9320_7 .net/s v0x29c9320 7, 10 0, o0x2acb32687578; 0 drivers +o0x2acb326875a8 .functor BUFZ 15, C4; HiZ drive +v0x29c9530_0 .net "right", 14 0, o0x2acb326875a8; 0 drivers +v0x29c9610_0 .net "rightOut", 14 0, L_0x29e7920; 1 drivers +o0x2acb32687608 .functor BUFZ 15, C4; HiZ drive +v0x29c96f0_0 .net "up", 14 0, o0x2acb32687608; 0 drivers +v0x29c97d0_0 .net "upOut", 14 0, L_0x29e6ea0; 1 drivers +v0x29c98b0_0 .var "weHaveData", 5 2; +v0x29c9990_0 .var "weWantData", 5 2; +v0x29c9a70_0 .net "writeAckIn", 5 2, L_0x29e5a70; 1 drivers +v0x29c9b50_0 .var "writeAckOut", 5 2; +v0x29c9c30_0 .var "writeTarget", 2 0; +v0x29c9d10_0 .var/s "writeValue", 10 0; +L_0x29e3da0 .part L_0x29f3ed0, 0, 11; +L_0x29e40a0 .part o0x2acb326875a8, 0, 11; +L_0x29e4140 .part o0x2acb32687608, 0, 11; +L_0x29e4240 .part o0x2acb32687128, 0, 11; +L_0x29e4370 .part L_0x29f3ed0, 11, 1; +L_0x29e44d0 .part o0x2acb326875a8, 11, 1; +L_0x29e45a0 .part o0x2acb32687608, 11, 1; +L_0x29e4690 .concat8 [ 1 1 1 1], L_0x29e4370, L_0x29e44d0, L_0x29e45a0, L_0x29e4870; +L_0x29e4870 .part o0x2acb32687128, 11, 1; +L_0x29e49b0 .reduce/or L_0x29e4690; +L_0x29e4b00 .part L_0x29f3ed0, 12, 1; +L_0x29e4ba0 .part o0x2acb326875a8, 12, 1; +L_0x29e4cb0 .part o0x2acb32687608, 12, 1; +L_0x29e4d50 .concat8 [ 1 1 1 1], L_0x29e4b00, L_0x29e4ba0, L_0x29e4cb0, L_0x29e4f40; +L_0x29e4f40 .part o0x2acb32687128, 12, 1; +L_0x29e5030 .reduce/or L_0x29e4d50; +L_0x29e51b0 .part L_0x29f3ed0, 13, 1; +L_0x29e5250 .part o0x2acb326875a8, 13, 1; +L_0x29e5420 .part o0x2acb32687608, 13, 1; +L_0x29e54c0 .concat8 [ 1 1 1 1], L_0x29e51b0, L_0x29e5250, L_0x29e5420, L_0x29e5380; +L_0x29e5380 .part o0x2acb32687128, 13, 1; +L_0x29e57a0 .reduce/or L_0x29e54c0; +L_0x29e5610 .part L_0x29f3ed0, 14, 1; +L_0x29e5900 .part o0x2acb326875a8, 14, 1; +L_0x29e5840 .part o0x2acb32687608, 14, 1; +L_0x29e5a70 .concat8 [ 1 1 1 1], L_0x29e5610, L_0x29e5900, L_0x29e5840, L_0x29e59a0; +L_0x29e59a0 .part o0x2acb32687128, 14, 1; +L_0x29e5d90 .reduce/or L_0x29e5a70; +L_0x29e5c60 .part v0x29c9140_0, 0, 1; +L_0x29e5f70 .part v0x29c9140_0, 1, 1; +L_0x29e5e80 .part v0x29c9140_0, 2, 1; +L_0x29e6160 .part v0x29c9140_0, 3, 1; +L_0x29e6060 .part v0x29c9b50_0, 0, 1; +L_0x29e63a0 .part v0x29c9b50_0, 1, 1; +L_0x29e6290 .part v0x29c9b50_0, 2, 1; +L_0x29e6560 .part v0x29c9b50_0, 3, 1; +L_0x29e6440 .part v0x29c9990_0, 0, 1; +L_0x29e67c0 .part v0x29c9990_0, 1, 1; +L_0x29e6690 .part v0x29c9990_0, 2, 1; +L_0x29e69a0 .part v0x29c9990_0, 3, 1; +L_0x29e6860 .part v0x29c98b0_0, 0, 1; +L_0x29e6b90 .part v0x29c98b0_0, 1, 1; +L_0x29e6a40 .part v0x29c98b0_0, 2, 1; +L_0x29e6ae0 .part v0x29c98b0_0, 3, 1; +L_0x29e6c30 .array/port v0x29c8680, L_0x29e6f90; +L_0x29e6f90 .concat [ 4 2 0 0], v0x29c5870_0, L_0x2acb326b40f0; +LS_0x29e6ea0_0_0 .concat8 [ 11 1 1 1], v0x29c8a40_2, L_0x29e6a40, L_0x29e6690, L_0x29e6290; +LS_0x29e6ea0_0_4 .concat8 [ 1 0 0 0], L_0x29e5e80; +L_0x29e6ea0 .concat8 [ 14 1 0 0], LS_0x29e6ea0_0_0, LS_0x29e6ea0_0_4; +LS_0x29e73b0_0_0 .concat8 [ 11 1 1 1], v0x29c8a40_3, L_0x29e6ae0, L_0x29e69a0, L_0x29e6560; +LS_0x29e73b0_0_4 .concat8 [ 1 0 0 0], L_0x29e6160; +L_0x29e73b0 .concat8 [ 14 1 0 0], LS_0x29e73b0_0_0, LS_0x29e73b0_0_4; +LS_0x29e70f0_0_0 .concat8 [ 11 1 1 1], v0x29c8a40_0, L_0x29e6860, L_0x29e6440, L_0x29e6060; +LS_0x29e70f0_0_4 .concat8 [ 1 0 0 0], L_0x29e5c60; +L_0x29e70f0 .concat8 [ 14 1 0 0], LS_0x29e70f0_0_0, LS_0x29e70f0_0_4; +LS_0x29e7920_0_0 .concat8 [ 11 1 1 1], v0x29c8a40_1, L_0x29e6b90, L_0x29e67c0, L_0x29e63a0; +LS_0x29e7920_0_4 .concat8 [ 1 0 0 0], L_0x29e5f70; +L_0x29e7920 .concat8 [ 14 1 0 0], LS_0x29e7920_0_0, LS_0x29e7920_0_4; +L_0x29e7650 .part L_0x29e4c40, 14, 4; +L_0x29e7d30 .part L_0x29e4c40, 11, 3; +L_0x29e7b40 .part L_0x29e4c40, 8, 3; +L_0x29e7f80 .part L_0x29e4c40, 10, 4; +L_0x29e7dd0 .part L_0x29e4c40, 0, 11; +S_0x29c9f90 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x2901970; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -752,219 +752,219 @@ S_0x1279340 .scope module, "up" "tis100" 2 24, 3 49 0, S_0x11b0b30; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1279560 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x12795a0 .param/str "memFile" 0 3 60, "anyRead/up.dat"; -L_0x1297020 .functor BUFZ 11, v0x1279860_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1297220 .functor BUFZ 11, v0x1279860_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x12980e0 .functor BUFZ 18, L_0x129a080, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1279860_0 .var/s "ACC", 10 0; -v0x1279960_0 .var/s "BAK", 10 0; -v0x1279a40_0 .net "DST", 2 0, L_0x129b1c0; 1 drivers -v0x1279b00_0 .net/s "IMM", 10 0, L_0x129b260; 1 drivers -v0x1279be0_0 .net "INST", 3 0, L_0x129aaa0; 1 drivers -v0x1279d10_0 .net "LABEL", 3 0, L_0x129b410; 1 drivers -v0x1279df0_0 .var "PC", 3 0; -v0x1279ed0_0 .var "PCNEXT", 3 0; -v0x1279fb0_0 .net "SRC", 2 0, L_0x129afd0; 1 drivers -v0x127a120_0 .net *"_s103", 0 0, L_0x12993c0; 1 drivers -v0x127a200_0 .net *"_s107", 0 0, L_0x12992d0; 1 drivers -v0x127a2e0_0 .net *"_s111", 0 0, L_0x12995b0; 1 drivers -v0x127a3c0_0 .net *"_s115", 0 0, L_0x12994b0; 1 drivers -v0x127a4a0_0 .net *"_s119", 0 0, L_0x12997f0; 1 drivers -v0x127a580_0 .net *"_s123", 0 0, L_0x12996e0; 1 drivers -v0x127a660_0 .net *"_s127", 0 0, L_0x12999b0; 1 drivers -v0x127a740_0 .net *"_s131", 0 0, L_0x1299890; 1 drivers -v0x127a8f0_0 .net *"_s135", 0 0, L_0x1299c10; 1 drivers -v0x127a990_0 .net *"_s139", 0 0, L_0x1299ae0; 1 drivers -v0x127aa70_0 .net *"_s143", 0 0, L_0x1299df0; 1 drivers -v0x127ab50_0 .net *"_s147", 0 0, L_0x1299cb0; 1 drivers -v0x127ac30_0 .net *"_s151", 0 0, L_0x1299fe0; 1 drivers -v0x127ad10_0 .net *"_s155", 0 0, L_0x1299e90; 1 drivers -v0x127adf0_0 .net *"_s159", 0 0, L_0x1299f30; 1 drivers -v0x127aed0_0 .net *"_s160", 17 0, L_0x129a080; 1 drivers -v0x127afb0_0 .net *"_s162", 5 0, L_0x129a3e0; 1 drivers -L_0x2b8e31c88180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x127b090_0 .net *"_s165", 1 0, L_0x2b8e31c88180; 1 drivers -v0x127d050_2 .array/port v0x127d050, 2; -v0x127b170_0 .net *"_s173", 10 0, v0x127d050_2; 1 drivers -v0x127d050_3 .array/port v0x127d050, 3; -v0x127b250_0 .net *"_s179", 10 0, v0x127d050_3; 1 drivers -v0x127d050_0 .array/port v0x127d050, 0; -v0x127b330_0 .net *"_s185", 10 0, v0x127d050_0; 1 drivers -v0x127d050_1 .array/port v0x127d050, 1; -v0x127b410_0 .net *"_s191", 10 0, v0x127d050_1; 1 drivers -v0x127b4f0_0 .net *"_s23", 0 0, L_0x12978a0; 1 drivers -v0x127b5d0_0 .net *"_s27", 0 0, L_0x12979c0; 1 drivers -v0x127a820_0 .net *"_s31", 0 0, L_0x1297ab0; 1 drivers -v0x127b8a0_0 .net *"_s36", 0 0, L_0x1297d80; 1 drivers -v0x127b980_0 .net *"_s42", 0 0, L_0x1297fa0; 1 drivers -v0x127ba60_0 .net *"_s46", 0 0, L_0x1298040; 1 drivers -v0x127bb40_0 .net *"_s50", 0 0, L_0x1298150; 1 drivers -v0x127bc20_0 .net *"_s55", 0 0, L_0x1298390; 1 drivers -v0x127bd00_0 .net *"_s61", 0 0, L_0x1298600; 1 drivers -v0x127bde0_0 .net *"_s65", 0 0, L_0x1298730; 1 drivers -v0x127bec0_0 .net *"_s69", 0 0, L_0x1298900; 1 drivers -v0x127bfa0_0 .net *"_s74", 0 0, L_0x1298860; 1 drivers -v0x127c080_0 .net *"_s80", 0 0, L_0x1298aa0; 1 drivers -v0x127c160_0 .net *"_s84", 0 0, L_0x1298d50; 1 drivers -v0x127c240_0 .net *"_s88", 0 0, L_0x1298c90; 1 drivers -v0x127c320_0 .net *"_s93", 0 0, L_0x1298df0; 1 drivers -v0x127c400_0 .net *"_s99", 0 0, L_0x12990b0; 1 drivers -v0x127c4e0_0 .net/s "accOut", 10 0, L_0x1297020; 1 drivers -v0x127c5c0_0 .net "anyHasData", 0 0, L_0x1297f00; 1 drivers -v0x127c680_0 .net "anyReadAck", 0 0, L_0x1298ba0; 1 drivers -v0x127c740_0 .net "anyWantData", 0 0, L_0x1298480; 1 drivers -v0x127c800_0 .net "anyWriteAck", 0 0, L_0x12991e0; 1 drivers -v0x127c8c0_0 .net "clk", 0 0, v0x127efc0_0; alias, 1 drivers -v0x127c9f0_0 .net "down", 14 0, L_0x12a25e0; alias, 1 drivers -v0x127cab0_0 .net "downOut", 14 0, L_0x129a800; alias, 1 drivers -v0x127cb50_0 .net "instruction", 17 0, L_0x12980e0; 1 drivers -v0x127cc10 .array "instructions", 15 0, 17 0; -v0x127ccd0_0 .var "last", 2 0; -o0x2b8e31c5c3b8 .functor BUFZ 15, C4; HiZ drive -v0x127cdb0_0 .net "left", 14 0, o0x2b8e31c5c3b8; 0 drivers -v0x127ce90_0 .net "leftOut", 14 0, L_0x129a540; 1 drivers -v0x127cf70_0 .var "mode", 2 0; -v0x127d050 .array/s "outVals", 2 5, 10 0; -v0x127d1c0_0 .var "phase", 2 0; -v0x127d2a0_0 .net "portsHaveData", 5 2, L_0x1297ba0; 1 drivers -v0x127b670_0 .net "portsWantData", 5 2, L_0x12981f0; 1 drivers -v0x127b750_0 .net "readAckIn", 5 2, L_0x12989a0; 1 drivers -v0x127d750_0 .var "readAckOut", 5 2; -v0x127d7f0_0 .var "readTarget", 2 0; -v0x127d890_0 .var/s "readValue", 10 0; -L_0x2b8e31c88138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x127d930 .array "regVals", 0 7; -v0x127d930_0 .net/s v0x127d930 0, 10 0, L_0x2b8e31c88138; 1 drivers -v0x127d930_1 .net/s v0x127d930 1, 10 0, L_0x1297220; 1 drivers -v0x127d930_2 .net/s v0x127d930 2, 10 0, L_0x1297590; 1 drivers -v0x127d930_3 .net/s v0x127d930 3, 10 0, L_0x1297630; 1 drivers -v0x127d930_4 .net/s v0x127d930 4, 10 0, L_0x12976d0; 1 drivers -v0x127d930_5 .net/s v0x127d930 5, 10 0, L_0x12977a0; 1 drivers -o0x2b8e31c5c778 .functor BUFZ 11, C4; HiZ drive -v0x127d930_6 .net/s v0x127d930 6, 10 0, o0x2b8e31c5c778; 0 drivers -o0x2b8e31c5c7a8 .functor BUFZ 11, C4; HiZ drive -v0x127d930_7 .net/s v0x127d930 7, 10 0, o0x2b8e31c5c7a8; 0 drivers -o0x2b8e31c5c7d8 .functor BUFZ 15, C4; HiZ drive -v0x127db40_0 .net "right", 14 0, o0x2b8e31c5c7d8; 0 drivers -v0x127dc20_0 .net "rightOut", 14 0, L_0x129adb0; 1 drivers -o0x2b8e31c5c838 .functor BUFZ 15, C4; HiZ drive -v0x127dd00_0 .net "up", 14 0, o0x2b8e31c5c838; 0 drivers -v0x127dde0_0 .net "upOut", 14 0, L_0x129a2f0; 1 drivers -v0x127dec0_0 .var "weHaveData", 5 2; -v0x127dfa0_0 .var "weWantData", 5 2; -v0x127e080_0 .net "writeAckIn", 5 2, L_0x1298ec0; 1 drivers -v0x127e160_0 .var "writeAckOut", 5 2; -v0x127e240_0 .var "writeTarget", 2 0; -v0x127e320_0 .var/s "writeValue", 10 0; -L_0x1297590 .part o0x2b8e31c5c3b8, 0, 11; -L_0x1297630 .part o0x2b8e31c5c7d8, 0, 11; -L_0x12976d0 .part o0x2b8e31c5c838, 0, 11; -L_0x12977a0 .part L_0x12a25e0, 0, 11; -L_0x12978a0 .part o0x2b8e31c5c3b8, 11, 1; -L_0x12979c0 .part o0x2b8e31c5c7d8, 11, 1; -L_0x1297ab0 .part o0x2b8e31c5c838, 11, 1; -L_0x1297ba0 .concat8 [ 1 1 1 1], L_0x12978a0, L_0x12979c0, L_0x1297ab0, L_0x1297d80; -L_0x1297d80 .part L_0x12a25e0, 11, 1; -L_0x1297f00 .reduce/or L_0x1297ba0; -L_0x1297fa0 .part o0x2b8e31c5c3b8, 12, 1; -L_0x1298040 .part o0x2b8e31c5c7d8, 12, 1; -L_0x1298150 .part o0x2b8e31c5c838, 12, 1; -L_0x12981f0 .concat8 [ 1 1 1 1], L_0x1297fa0, L_0x1298040, L_0x1298150, L_0x1298390; -L_0x1298390 .part L_0x12a25e0, 12, 1; -L_0x1298480 .reduce/or L_0x12981f0; -L_0x1298600 .part o0x2b8e31c5c3b8, 13, 1; -L_0x1298730 .part o0x2b8e31c5c7d8, 13, 1; -L_0x1298900 .part o0x2b8e31c5c838, 13, 1; -L_0x12989a0 .concat8 [ 1 1 1 1], L_0x1298600, L_0x1298730, L_0x1298900, L_0x1298860; -L_0x1298860 .part L_0x12a25e0, 13, 1; -L_0x1298ba0 .reduce/or L_0x12989a0; -L_0x1298aa0 .part o0x2b8e31c5c3b8, 14, 1; -L_0x1298d50 .part o0x2b8e31c5c7d8, 14, 1; -L_0x1298c90 .part o0x2b8e31c5c838, 14, 1; -L_0x1298ec0 .concat8 [ 1 1 1 1], L_0x1298aa0, L_0x1298d50, L_0x1298c90, L_0x1298df0; -L_0x1298df0 .part L_0x12a25e0, 14, 1; -L_0x12991e0 .reduce/or L_0x1298ec0; -L_0x12990b0 .part v0x127d750_0, 0, 1; -L_0x12993c0 .part v0x127d750_0, 1, 1; -L_0x12992d0 .part v0x127d750_0, 2, 1; -L_0x12995b0 .part v0x127d750_0, 3, 1; -L_0x12994b0 .part v0x127e160_0, 0, 1; -L_0x12997f0 .part v0x127e160_0, 1, 1; -L_0x12996e0 .part v0x127e160_0, 2, 1; -L_0x12999b0 .part v0x127e160_0, 3, 1; -L_0x1299890 .part v0x127dfa0_0, 0, 1; -L_0x1299c10 .part v0x127dfa0_0, 1, 1; -L_0x1299ae0 .part v0x127dfa0_0, 2, 1; -L_0x1299df0 .part v0x127dfa0_0, 3, 1; -L_0x1299cb0 .part v0x127dec0_0, 0, 1; -L_0x1299fe0 .part v0x127dec0_0, 1, 1; -L_0x1299e90 .part v0x127dec0_0, 2, 1; -L_0x1299f30 .part v0x127dec0_0, 3, 1; -L_0x129a080 .array/port v0x127cc10, L_0x129a3e0; -L_0x129a3e0 .concat [ 4 2 0 0], v0x1279df0_0, L_0x2b8e31c88180; -LS_0x129a2f0_0_0 .concat8 [ 11 1 1 1], v0x127d050_2, L_0x1299e90, L_0x1299ae0, L_0x12996e0; -LS_0x129a2f0_0_4 .concat8 [ 1 0 0 0], L_0x12992d0; -L_0x129a2f0 .concat8 [ 14 1 0 0], LS_0x129a2f0_0_0, LS_0x129a2f0_0_4; -LS_0x129a800_0_0 .concat8 [ 11 1 1 1], v0x127d050_3, L_0x1299f30, L_0x1299df0, L_0x12999b0; -LS_0x129a800_0_4 .concat8 [ 1 0 0 0], L_0x12995b0; -L_0x129a800 .concat8 [ 14 1 0 0], LS_0x129a800_0_0, LS_0x129a800_0_4; -LS_0x129a540_0_0 .concat8 [ 11 1 1 1], v0x127d050_0, L_0x1299cb0, L_0x1299890, L_0x12994b0; -LS_0x129a540_0_4 .concat8 [ 1 0 0 0], L_0x12990b0; -L_0x129a540 .concat8 [ 14 1 0 0], LS_0x129a540_0_0, LS_0x129a540_0_4; -LS_0x129adb0_0_0 .concat8 [ 11 1 1 1], v0x127d050_1, L_0x1299fe0, L_0x1299c10, L_0x12997f0; -LS_0x129adb0_0_4 .concat8 [ 1 0 0 0], L_0x12993c0; -L_0x129adb0 .concat8 [ 14 1 0 0], LS_0x129adb0_0_0, LS_0x129adb0_0_4; -L_0x129aaa0 .part L_0x12980e0, 14, 4; -L_0x129b1c0 .part L_0x12980e0, 11, 3; -L_0x129afd0 .part L_0x12980e0, 8, 3; -L_0x129b410 .part L_0x12980e0, 10, 4; -L_0x129b260 .part L_0x12980e0, 0, 11; - .scope S_0x126ef50; +P_0x29ca1b0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x29ca1f0 .param/str "memFile" 0 3 60, "anyRead/up.dat"; +L_0x29e7c70 .functor BUFZ 11, v0x29ca4b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29e7e70 .functor BUFZ 11, v0x29ca4b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x29e8d30 .functor BUFZ 18, L_0x29eacd0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x29ca4b0_0 .var/s "ACC", 10 0; +v0x29ca5b0_0 .var/s "BAK", 10 0; +v0x29ca690_0 .net "DST", 2 0, L_0x29ebe10; 1 drivers +v0x29ca750_0 .net/s "IMM", 10 0, L_0x29ebeb0; 1 drivers +v0x29ca830_0 .net "INST", 3 0, L_0x29eb6f0; 1 drivers +v0x29ca960_0 .net "LABEL", 3 0, L_0x29ec060; 1 drivers +v0x29caa40_0 .var "PC", 3 0; +v0x29cab20_0 .var "PCNEXT", 3 0; +v0x29cac00_0 .net "SRC", 2 0, L_0x29ebc20; 1 drivers +v0x29cad70_0 .net *"_s103", 0 0, L_0x29ea010; 1 drivers +v0x29cae50_0 .net *"_s107", 0 0, L_0x29e9f20; 1 drivers +v0x29caf30_0 .net *"_s111", 0 0, L_0x29ea200; 1 drivers +v0x29cb010_0 .net *"_s115", 0 0, L_0x29ea100; 1 drivers +v0x29cb0f0_0 .net *"_s119", 0 0, L_0x29ea440; 1 drivers +v0x29cb1d0_0 .net *"_s123", 0 0, L_0x29ea330; 1 drivers +v0x29cb2b0_0 .net *"_s127", 0 0, L_0x29ea600; 1 drivers +v0x29cb390_0 .net *"_s131", 0 0, L_0x29ea4e0; 1 drivers +v0x29cb540_0 .net *"_s135", 0 0, L_0x29ea860; 1 drivers +v0x29cb5e0_0 .net *"_s139", 0 0, L_0x29ea730; 1 drivers +v0x29cb6c0_0 .net *"_s143", 0 0, L_0x29eaa40; 1 drivers +v0x29cb7a0_0 .net *"_s147", 0 0, L_0x29ea900; 1 drivers +v0x29cb880_0 .net *"_s151", 0 0, L_0x29eac30; 1 drivers +v0x29cb960_0 .net *"_s155", 0 0, L_0x29eaae0; 1 drivers +v0x29cba40_0 .net *"_s159", 0 0, L_0x29eab80; 1 drivers +v0x29cbb20_0 .net *"_s160", 17 0, L_0x29eacd0; 1 drivers +v0x29cbc00_0 .net *"_s162", 5 0, L_0x29eb030; 1 drivers +L_0x2acb326b4180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x29cbce0_0 .net *"_s165", 1 0, L_0x2acb326b4180; 1 drivers +v0x29cdca0_2 .array/port v0x29cdca0, 2; +v0x29cbdc0_0 .net *"_s173", 10 0, v0x29cdca0_2; 1 drivers +v0x29cdca0_3 .array/port v0x29cdca0, 3; +v0x29cbea0_0 .net *"_s179", 10 0, v0x29cdca0_3; 1 drivers +v0x29cdca0_0 .array/port v0x29cdca0, 0; +v0x29cbf80_0 .net *"_s185", 10 0, v0x29cdca0_0; 1 drivers +v0x29cdca0_1 .array/port v0x29cdca0, 1; +v0x29cc060_0 .net *"_s191", 10 0, v0x29cdca0_1; 1 drivers +v0x29cc140_0 .net *"_s23", 0 0, L_0x29e84f0; 1 drivers +v0x29cc220_0 .net *"_s27", 0 0, L_0x29e8610; 1 drivers +v0x29cb470_0 .net *"_s31", 0 0, L_0x29e8700; 1 drivers +v0x29cc4f0_0 .net *"_s36", 0 0, L_0x29e89d0; 1 drivers +v0x29cc5d0_0 .net *"_s42", 0 0, L_0x29e8bf0; 1 drivers +v0x29cc6b0_0 .net *"_s46", 0 0, L_0x29e8c90; 1 drivers +v0x29cc790_0 .net *"_s50", 0 0, L_0x29e8da0; 1 drivers +v0x29cc870_0 .net *"_s55", 0 0, L_0x29e8fe0; 1 drivers +v0x29cc950_0 .net *"_s61", 0 0, L_0x29e9250; 1 drivers +v0x29cca30_0 .net *"_s65", 0 0, L_0x29e9380; 1 drivers +v0x29ccb10_0 .net *"_s69", 0 0, L_0x29e9550; 1 drivers +v0x29ccbf0_0 .net *"_s74", 0 0, L_0x29e94b0; 1 drivers +v0x29cccd0_0 .net *"_s80", 0 0, L_0x29e96f0; 1 drivers +v0x29ccdb0_0 .net *"_s84", 0 0, L_0x29e99a0; 1 drivers +v0x29cce90_0 .net *"_s88", 0 0, L_0x29e98e0; 1 drivers +v0x29ccf70_0 .net *"_s93", 0 0, L_0x29e9a40; 1 drivers +v0x29cd050_0 .net *"_s99", 0 0, L_0x29e9d00; 1 drivers +v0x29cd130_0 .net/s "accOut", 10 0, L_0x29e7c70; 1 drivers +v0x29cd210_0 .net "anyHasData", 0 0, L_0x29e8b50; 1 drivers +v0x29cd2d0_0 .net "anyReadAck", 0 0, L_0x29e97f0; 1 drivers +v0x29cd390_0 .net "anyWantData", 0 0, L_0x29e90d0; 1 drivers +v0x29cd450_0 .net "anyWriteAck", 0 0, L_0x29e9e30; 1 drivers +v0x29cd510_0 .net "clk", 0 0, v0x29cfc10_0; alias, 1 drivers +v0x29cd640_0 .net "down", 14 0, L_0x29f3230; alias, 1 drivers +v0x29cd700_0 .net "downOut", 14 0, L_0x29eb450; alias, 1 drivers +v0x29cd7a0_0 .net "instruction", 17 0, L_0x29e8d30; 1 drivers +v0x29cd860 .array "instructions", 15 0, 17 0; +v0x29cd920_0 .var "last", 2 0; +o0x2acb326883b8 .functor BUFZ 15, C4; HiZ drive +v0x29cda00_0 .net "left", 14 0, o0x2acb326883b8; 0 drivers +v0x29cdae0_0 .net "leftOut", 14 0, L_0x29eb190; 1 drivers +v0x29cdbc0_0 .var "mode", 2 0; +v0x29cdca0 .array/s "outVals", 2 5, 10 0; +v0x29cde10_0 .var "phase", 2 0; +v0x29cdef0_0 .net "portsHaveData", 5 2, L_0x29e87f0; 1 drivers +v0x29cc2c0_0 .net "portsWantData", 5 2, L_0x29e8e40; 1 drivers +v0x29cc3a0_0 .net "readAckIn", 5 2, L_0x29e95f0; 1 drivers +v0x29ce3a0_0 .var "readAckOut", 5 2; +v0x29ce440_0 .var "readTarget", 2 0; +v0x29ce4e0_0 .var/s "readValue", 10 0; +L_0x2acb326b4138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x29ce580 .array "regVals", 0 7; +v0x29ce580_0 .net/s v0x29ce580 0, 10 0, L_0x2acb326b4138; 1 drivers +v0x29ce580_1 .net/s v0x29ce580 1, 10 0, L_0x29e7e70; 1 drivers +v0x29ce580_2 .net/s v0x29ce580 2, 10 0, L_0x29e81e0; 1 drivers +v0x29ce580_3 .net/s v0x29ce580 3, 10 0, L_0x29e8280; 1 drivers +v0x29ce580_4 .net/s v0x29ce580 4, 10 0, L_0x29e8320; 1 drivers +v0x29ce580_5 .net/s v0x29ce580 5, 10 0, L_0x29e83f0; 1 drivers +o0x2acb32688778 .functor BUFZ 11, C4; HiZ drive +v0x29ce580_6 .net/s v0x29ce580 6, 10 0, o0x2acb32688778; 0 drivers +o0x2acb326887a8 .functor BUFZ 11, C4; HiZ drive +v0x29ce580_7 .net/s v0x29ce580 7, 10 0, o0x2acb326887a8; 0 drivers +o0x2acb326887d8 .functor BUFZ 15, C4; HiZ drive +v0x29ce790_0 .net "right", 14 0, o0x2acb326887d8; 0 drivers +v0x29ce870_0 .net "rightOut", 14 0, L_0x29eba00; 1 drivers +o0x2acb32688838 .functor BUFZ 15, C4; HiZ drive +v0x29ce950_0 .net "up", 14 0, o0x2acb32688838; 0 drivers +v0x29cea30_0 .net "upOut", 14 0, L_0x29eaf40; 1 drivers +v0x29ceb10_0 .var "weHaveData", 5 2; +v0x29cebf0_0 .var "weWantData", 5 2; +v0x29cecd0_0 .net "writeAckIn", 5 2, L_0x29e9b10; 1 drivers +v0x29cedb0_0 .var "writeAckOut", 5 2; +v0x29cee90_0 .var "writeTarget", 2 0; +v0x29cef70_0 .var/s "writeValue", 10 0; +L_0x29e81e0 .part o0x2acb326883b8, 0, 11; +L_0x29e8280 .part o0x2acb326887d8, 0, 11; +L_0x29e8320 .part o0x2acb32688838, 0, 11; +L_0x29e83f0 .part L_0x29f3230, 0, 11; +L_0x29e84f0 .part o0x2acb326883b8, 11, 1; +L_0x29e8610 .part o0x2acb326887d8, 11, 1; +L_0x29e8700 .part o0x2acb32688838, 11, 1; +L_0x29e87f0 .concat8 [ 1 1 1 1], L_0x29e84f0, L_0x29e8610, L_0x29e8700, L_0x29e89d0; +L_0x29e89d0 .part L_0x29f3230, 11, 1; +L_0x29e8b50 .reduce/or L_0x29e87f0; +L_0x29e8bf0 .part o0x2acb326883b8, 12, 1; +L_0x29e8c90 .part o0x2acb326887d8, 12, 1; +L_0x29e8da0 .part o0x2acb32688838, 12, 1; +L_0x29e8e40 .concat8 [ 1 1 1 1], L_0x29e8bf0, L_0x29e8c90, L_0x29e8da0, L_0x29e8fe0; +L_0x29e8fe0 .part L_0x29f3230, 12, 1; +L_0x29e90d0 .reduce/or L_0x29e8e40; +L_0x29e9250 .part o0x2acb326883b8, 13, 1; +L_0x29e9380 .part o0x2acb326887d8, 13, 1; +L_0x29e9550 .part o0x2acb32688838, 13, 1; +L_0x29e95f0 .concat8 [ 1 1 1 1], L_0x29e9250, L_0x29e9380, L_0x29e9550, L_0x29e94b0; +L_0x29e94b0 .part L_0x29f3230, 13, 1; +L_0x29e97f0 .reduce/or L_0x29e95f0; +L_0x29e96f0 .part o0x2acb326883b8, 14, 1; +L_0x29e99a0 .part o0x2acb326887d8, 14, 1; +L_0x29e98e0 .part o0x2acb32688838, 14, 1; +L_0x29e9b10 .concat8 [ 1 1 1 1], L_0x29e96f0, L_0x29e99a0, L_0x29e98e0, L_0x29e9a40; +L_0x29e9a40 .part L_0x29f3230, 14, 1; +L_0x29e9e30 .reduce/or L_0x29e9b10; +L_0x29e9d00 .part v0x29ce3a0_0, 0, 1; +L_0x29ea010 .part v0x29ce3a0_0, 1, 1; +L_0x29e9f20 .part v0x29ce3a0_0, 2, 1; +L_0x29ea200 .part v0x29ce3a0_0, 3, 1; +L_0x29ea100 .part v0x29cedb0_0, 0, 1; +L_0x29ea440 .part v0x29cedb0_0, 1, 1; +L_0x29ea330 .part v0x29cedb0_0, 2, 1; +L_0x29ea600 .part v0x29cedb0_0, 3, 1; +L_0x29ea4e0 .part v0x29cebf0_0, 0, 1; +L_0x29ea860 .part v0x29cebf0_0, 1, 1; +L_0x29ea730 .part v0x29cebf0_0, 2, 1; +L_0x29eaa40 .part v0x29cebf0_0, 3, 1; +L_0x29ea900 .part v0x29ceb10_0, 0, 1; +L_0x29eac30 .part v0x29ceb10_0, 1, 1; +L_0x29eaae0 .part v0x29ceb10_0, 2, 1; +L_0x29eab80 .part v0x29ceb10_0, 3, 1; +L_0x29eacd0 .array/port v0x29cd860, L_0x29eb030; +L_0x29eb030 .concat [ 4 2 0 0], v0x29caa40_0, L_0x2acb326b4180; +LS_0x29eaf40_0_0 .concat8 [ 11 1 1 1], v0x29cdca0_2, L_0x29eaae0, L_0x29ea730, L_0x29ea330; +LS_0x29eaf40_0_4 .concat8 [ 1 0 0 0], L_0x29e9f20; +L_0x29eaf40 .concat8 [ 14 1 0 0], LS_0x29eaf40_0_0, LS_0x29eaf40_0_4; +LS_0x29eb450_0_0 .concat8 [ 11 1 1 1], v0x29cdca0_3, L_0x29eab80, L_0x29eaa40, L_0x29ea600; +LS_0x29eb450_0_4 .concat8 [ 1 0 0 0], L_0x29ea200; +L_0x29eb450 .concat8 [ 14 1 0 0], LS_0x29eb450_0_0, LS_0x29eb450_0_4; +LS_0x29eb190_0_0 .concat8 [ 11 1 1 1], v0x29cdca0_0, L_0x29ea900, L_0x29ea4e0, L_0x29ea100; +LS_0x29eb190_0_4 .concat8 [ 1 0 0 0], L_0x29e9d00; +L_0x29eb190 .concat8 [ 14 1 0 0], LS_0x29eb190_0_0, LS_0x29eb190_0_4; +LS_0x29eba00_0_0 .concat8 [ 11 1 1 1], v0x29cdca0_1, L_0x29eac30, L_0x29ea860, L_0x29ea440; +LS_0x29eba00_0_4 .concat8 [ 1 0 0 0], L_0x29ea010; +L_0x29eba00 .concat8 [ 14 1 0 0], LS_0x29eba00_0_0, LS_0x29eba00_0_4; +L_0x29eb6f0 .part L_0x29e8d30, 14, 4; +L_0x29ebe10 .part L_0x29e8d30, 11, 3; +L_0x29ebc20 .part L_0x29e8d30, 8, 3; +L_0x29ec060 .part L_0x29e8d30, 10, 4; +L_0x29ebeb0 .part L_0x29e8d30, 0, 11; + .scope S_0x29bfba0; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1272ac0_0, 0, 3; + %store/vec4 v0x29c3710_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1272ce0_0, 0, 3; + %store/vec4 v0x29c3930_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1272820_0, 0, 3; + %store/vec4 v0x29c3470_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x126f490_0, 0, 11; + %store/vec4 v0x29c00e0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x126f590_0, 0, 11; + %store/vec4 v0x29c01e0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126fa20_0, 0, 4; + %store/vec4 v0x29c0670_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1273270_0, 0, 4; + %store/vec4 v0x29c3ec0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1273b60_0, 0, 4; + %store/vec4 v0x29c47b0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1273d20_0, 0, 4; + %store/vec4 v0x29c4970_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1273a80_0, 0, 4; + %store/vec4 v0x29c46d0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1272ba0, 4, 0; + %store/vec4a v0x29c37f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1272ba0, 4, 0; + %store/vec4a v0x29c37f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1272ba0, 4, 0; + %store/vec4a v0x29c37f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1272ba0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x126f190, v0x1272760 {0 0 0}; + %store/vec4a v0x29c37f0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x29bfde0, v0x29c33b0 {0 0 0}; %end; .thread T_0; - .scope S_0x126ef50; + .scope S_0x29bfba0; T_1 ; - %wait E_0x11e4150; - %load/vec4 v0x1272ac0_0; + %wait E_0x2934f90; + %load/vec4 v0x29c3710_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -979,7 +979,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x1272ce0_0; + %load/vec4 v0x29c3930_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -994,185 +994,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x126f810_0; + %load/vec4 v0x29c0460_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x1272dc0_0; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c3a10_0; + %load/vec4 v0x29c0830_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273270_0, 4, 5; - %load/vec4 v0x126fbe0_0; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; + %load/vec4 v0x29c0830_0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; - %load/vec4 v0x126fbe0_0; - %assign/vec4 v0x1273350_0, 0; + %assign/vec4 v0x29c3710_0, 0; + %load/vec4 v0x29c0830_0; + %assign/vec4 v0x29c3fa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273b60_0, 4, 5; - %load/vec4 v0x126fbe0_0; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; + %load/vec4 v0x29c0830_0; + %assign/vec4 v0x29c3470_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x1272dc0_0; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3a10_0; + %load/vec4 v0x29c3470_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; - %load/vec4 v0x1272820_0; - %assign/vec4 v0x1273350_0, 0; + %assign/vec4 v0x29c3710_0, 0; + %load/vec4 v0x29c3470_0; + %assign/vec4 v0x29c3fa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273b60_0, 4, 5; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x126fbe0_0; + %load/vec4 v0x29c0830_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x12720d0_0; + %load/vec4 v0x29c2d20_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1180,29 +1180,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; - %load/vec4 v0x126fbe0_0; - %assign/vec4 v0x1273350_0, 0; + %assign/vec4 v0x29c3710_0, 0; + %load/vec4 v0x29c0830_0; + %assign/vec4 v0x29c3fa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273b60_0, 4, 5; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273b60_0, 4, 5; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273b60_0, 4, 5; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273b60_0, 4, 5; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1210,10 +1210,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x126f810_0; + %load/vec4 v0x29c0460_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1280,180 +1280,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x126f490_0; - %load/vec4 v0x1273430_0; + %load/vec4 v0x29c00e0_0; + %load/vec4 v0x29c4080_0; %add; - %assign/vec4 v0x126f490_0, 0; - %load/vec4 v0x126fa20_0; + %assign/vec4 v0x29c00e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x126f490_0; - %load/vec4 v0x1273430_0; + %load/vec4 v0x29c00e0_0; + %load/vec4 v0x29c4080_0; %sub; - %assign/vec4 v0x126f490_0, 0; - %load/vec4 v0x126fa20_0; + %assign/vec4 v0x29c00e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0670_0; %pad/u 11; - %load/vec4 v0x1273430_0; + %load/vec4 v0x29c4080_0; %add; %pad/u 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x1273430_0; - %assign/vec4 v0x1273ee0_0, 0; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c4080_0; + %assign/vec4 v0x29c4b30_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x126f730_0; - %assign/vec4 v0x1273ee0_0, 0; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0380_0; + %assign/vec4 v0x29c4b30_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x126f490_0; - %load/vec4 v0x126f730_0; + %load/vec4 v0x29c00e0_0; + %load/vec4 v0x29c0380_0; %add; - %assign/vec4 v0x126f490_0, 0; - %load/vec4 v0x126fa20_0; + %assign/vec4 v0x29c00e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x126f490_0; - %load/vec4 v0x126f730_0; + %load/vec4 v0x29c00e0_0; + %load/vec4 v0x29c0380_0; %sub; - %assign/vec4 v0x126f490_0, 0; - %load/vec4 v0x126fa20_0; + %assign/vec4 v0x29c00e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0670_0; %pad/u 11; - %load/vec4 v0x126f730_0; + %load/vec4 v0x29c0380_0; %add; %pad/u 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x126f590_0; - %assign/vec4 v0x126f490_0, 0; - %load/vec4 v0x126f490_0; - %assign/vec4 v0x126f590_0, 0; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c01e0_0; + %assign/vec4 v0x29c00e0_0, 0; + %load/vec4 v0x29c00e0_0; + %assign/vec4 v0x29c01e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x126f490_0; - %assign/vec4 v0x126f590_0, 0; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c00e0_0; + %assign/vec4 v0x29c01e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x126f490_0; + %load/vec4 v0x29c00e0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x126f490_0, 0; - %load/vec4 v0x126fa20_0; + %assign/vec4 v0x29c00e0_0, 0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x126f940_0; - %assign/vec4 v0x126fb00_0, 0; + %load/vec4 v0x29c0590_0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x126f490_0; + %load/vec4 v0x29c00e0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x126f940_0; - %assign/vec4 v0x126fb00_0, 0; + %load/vec4 v0x29c0590_0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x126f490_0; + %load/vec4 v0x29c00e0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x126f940_0; - %assign/vec4 v0x126fb00_0, 0; + %load/vec4 v0x29c0590_0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x126f490_0; + %load/vec4 v0x29c00e0_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x126f940_0; - %assign/vec4 v0x126fb00_0, 0; + %load/vec4 v0x29c0590_0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x126f490_0; + %load/vec4 v0x29c00e0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x126f940_0; - %assign/vec4 v0x126fb00_0, 0; + %load/vec4 v0x29c0590_0; + %assign/vec4 v0x29c0750_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x126fa20_0; + %load/vec4 v0x29c0670_0; %addi 1, 0, 4; - %assign/vec4 v0x126fb00_0, 0; + %assign/vec4 v0x29c0750_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x126f810_0; + %load/vec4 v0x29c0460_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x126f810_0; + %load/vec4 v0x29c0460_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x126f670_0; + %load/vec4 v0x29c02c0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x126f670_0; + %load/vec4 v0x29c02c0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1461,162 +1461,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x126f670_0; + %load/vec4 v0x29c02c0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x1273ee0_0; - %assign/vec4 v0x126f490_0, 0; + %load/vec4 v0x29c4b30_0; + %assign/vec4 v0x29c00e0_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; - %load/vec4 v0x126f670_0; + %assign/vec4 v0x29c3710_0, 0; + %load/vec4 v0x29c02c0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x1272820_0; - %assign/vec4 v0x1273e00_0, 0; - %load/vec4 v0x1273ee0_0; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; + %assign/vec4 v0x29c4a50_0, 0; + %load/vec4 v0x29c4b30_0; + %load/vec4 v0x29c3470_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1272820_0; + %load/vec4 v0x29c3470_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273a80_0, 4, 5; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x126f670_0; + %load/vec4 v0x29c02c0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x126f670_0; - %assign/vec4 v0x1273e00_0, 0; - %load/vec4 v0x1273ee0_0; - %load/vec4 v0x126f670_0; + %load/vec4 v0x29c02c0_0; + %assign/vec4 v0x29c4a50_0, 0; + %load/vec4 v0x29c4b30_0; + %load/vec4 v0x29c02c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126f670_0; + %load/vec4 v0x29c02c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x126f670_0; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c02c0_0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x1272250_0; + %load/vec4 v0x29c2ea0_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x126f670_0; - %assign/vec4 v0x1273e00_0, 0; + %load/vec4 v0x29c02c0_0; + %assign/vec4 v0x29c4a50_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x1272ce0_0; + %load/vec4 v0x29c3930_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1631,82 +1631,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x1273350_0; + %load/vec4 v0x29c3fa0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x12720d0_0; + %load/vec4 v0x29c2d20_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; + %assign/vec4 v0x29c3710_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1273b60_0, 0, 4; - %load/vec4 v0x1272dc0_0; + %store/vec4 v0x29c47b0_0, 0, 4; + %load/vec4 v0x29c3a10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x1272dc0_0; + %load/vec4 v0x29c3a10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1714,54 +1714,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x1272dc0_0; - %load/vec4 v0x1273350_0; + %load/vec4 v0x29c3a10_0; + %load/vec4 v0x29c3fa0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; - %load/vec4 v0x1273350_0; + %assign/vec4 v0x29c3710_0, 0; + %load/vec4 v0x29c3fa0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1273510, 4; - %assign/vec4 v0x1273430_0, 0; + %load/vec4a v0x29c4160, 4; + %assign/vec4 v0x29c4080_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1273350_0; + %load/vec4 v0x29c3fa0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273270_0, 4, 5; + %assign/vec4/off/d v0x29c3ec0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1273350_0; + %load/vec4 v0x29c3fa0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1273b60_0, 4, 5; - %load/vec4 v0x1273350_0; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4/off/d v0x29c47b0_0, 4, 5; + %load/vec4 v0x29c3fa0_0; + %assign/vec4 v0x29c3470_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x1272ce0_0; + %load/vec4 v0x29c3930_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1777,93 +1777,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x1273e00_0; + %load/vec4 v0x29c4a50_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x1272250_0; + %load/vec4 v0x29c2ea0_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x12712e0_0; + %load/vec4 v0x29c1f30_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1273e00_0, 0; + %assign/vec4 v0x29c4a50_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1273a80_0, 4, 5; - %load/vec4 v0x1273ee0_0; + %assign/vec4/off/d v0x29c46d0_0, 4, 5; + %load/vec4 v0x29c4b30_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1272ba0, 0, 4; + %assign/vec4/a/d v0x29c37f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3470_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1871,33 +1871,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x1273e00_0; + %load/vec4 v0x29c4a50_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x1273c40_0; - %load/vec4 v0x1273e00_0; + %load/vec4 v0x29c4890_0; + %load/vec4 v0x29c4a50_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1273e00_0; + %load/vec4 v0x29c4a50_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1273a80_0, 4, 1; + %store/vec4 v0x29c46d0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1272ac0_0, 0; - %load/vec4 v0x1273e00_0; - %assign/vec4 v0x1272820_0, 0; + %assign/vec4 v0x29c3710_0, 0; + %load/vec4 v0x29c4a50_0; + %assign/vec4 v0x29c3470_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1272ce0_0, 0; + %assign/vec4 v0x29c3930_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1906,19 +1906,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x126ef50; + .scope S_0x29bfba0; T_2 ; - %wait E_0x11c19c0; - %load/vec4 v0x1272ce0_0; + %wait E_0x2912800; + %load/vec4 v0x29c3930_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1272ac0_0; + %load/vec4 v0x29c3710_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x126fb00_0; + %load/vec4 v0x29c0750_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1927,62 +1927,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x126fb00_0; - %assign/vec4 v0x126fa20_0, 0; + %load/vec4 v0x29c0750_0; + %assign/vec4 v0x29c0670_0, 0; T_2.0 ; - %load/vec4 v0x1272ce0_0; + %load/vec4 v0x29c3930_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1273270_0, 0, 4; + %store/vec4 v0x29c3ec0_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x1274160; + .scope S_0x29c4db0; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1277d30_0, 0, 3; + %store/vec4 v0x29c8980_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1277f60_0, 0, 3; + %store/vec4 v0x29c8bb0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1277af0_0, 0, 3; + %store/vec4 v0x29c8740_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x12746e0_0, 0, 11; + %store/vec4 v0x29c5330_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x12747e0_0, 0, 11; + %store/vec4 v0x29c5430_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1274c20_0, 0, 4; + %store/vec4 v0x29c5870_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x12784f0_0, 0, 4; + %store/vec4 v0x29c9140_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1278d40_0, 0, 4; + %store/vec4 v0x29c9990_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1278f00_0, 0, 4; + %store/vec4 v0x29c9b50_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1278c60_0, 0, 4; + %store/vec4 v0x29c98b0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1277df0, 4, 0; + %store/vec4a v0x29c8a40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1277df0, 4, 0; + %store/vec4a v0x29c8a40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1277df0, 4, 0; + %store/vec4a v0x29c8a40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1277df0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1274370, v0x1277a30 {0 0 0}; + %store/vec4a v0x29c8a40, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x29c4fc0, v0x29c8680 {0 0 0}; %end; .thread T_3; - .scope S_0x1274160; + .scope S_0x29c4db0; T_4 ; - %wait E_0x11e4150; - %load/vec4 v0x1277d30_0; + %wait E_0x2934f90; + %load/vec4 v0x29c8980_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1997,7 +1997,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x1277f60_0; + %load/vec4 v0x29c8bb0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2012,185 +2012,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x1274a60_0; + %load/vec4 v0x29c56b0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x1278040_0; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c8c90_0; + %load/vec4 v0x29c5a30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x12784f0_0, 4, 5; - %load/vec4 v0x1274de0_0; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4/off/d v0x29c9140_0, 4, 5; + %load/vec4 v0x29c5a30_0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1277d30_0, 0; - %load/vec4 v0x1274de0_0; - %assign/vec4 v0x1278590_0, 0; + %assign/vec4 v0x29c8980_0, 0; + %load/vec4 v0x29c5a30_0; + %assign/vec4 v0x29c91e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1278d40_0, 4, 5; - %load/vec4 v0x1274de0_0; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4/off/d v0x29c9990_0, 4, 5; + %load/vec4 v0x29c5a30_0; + %assign/vec4 v0x29c8740_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x1278040_0; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8c90_0; + %load/vec4 v0x29c8740_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1277d30_0, 0; - %load/vec4 v0x1277af0_0; - %assign/vec4 v0x1278590_0, 0; + %assign/vec4 v0x29c8980_0, 0; + %load/vec4 v0x29c8740_0; + %assign/vec4 v0x29c91e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1278d40_0, 4, 5; + %assign/vec4/off/d v0x29c9990_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x1274de0_0; + %load/vec4 v0x29c5a30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x12773f0_0; + %load/vec4 v0x29c8040_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2198,29 +2198,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1277d30_0, 0; - %load/vec4 v0x1274de0_0; - %assign/vec4 v0x1278590_0, 0; + %assign/vec4 v0x29c8980_0, 0; + %load/vec4 v0x29c5a30_0; + %assign/vec4 v0x29c91e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278d40_0, 4, 5; + %assign/vec4/off/d v0x29c9990_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278d40_0, 4, 5; + %assign/vec4/off/d v0x29c9990_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278d40_0, 4, 5; + %assign/vec4/off/d v0x29c9990_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278d40_0, 4, 5; + %assign/vec4/off/d v0x29c9990_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2228,10 +2228,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x1274a60_0; + %load/vec4 v0x29c56b0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2298,180 +2298,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x12746e0_0; - %load/vec4 v0x1278630_0; + %load/vec4 v0x29c5330_0; + %load/vec4 v0x29c9280_0; %add; - %assign/vec4 v0x12746e0_0, 0; - %load/vec4 v0x1274c20_0; + %assign/vec4 v0x29c5330_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x12746e0_0; - %load/vec4 v0x1278630_0; + %load/vec4 v0x29c5330_0; + %load/vec4 v0x29c9280_0; %sub; - %assign/vec4 v0x12746e0_0, 0; - %load/vec4 v0x1274c20_0; + %assign/vec4 v0x29c5330_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5870_0; %pad/u 11; - %load/vec4 v0x1278630_0; + %load/vec4 v0x29c9280_0; %add; %pad/u 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x1278630_0; - %assign/vec4 v0x12790c0_0, 0; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c9280_0; + %assign/vec4 v0x29c9d10_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x1274980_0; - %assign/vec4 v0x12790c0_0, 0; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c55d0_0; + %assign/vec4 v0x29c9d10_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x12746e0_0; - %load/vec4 v0x1274980_0; + %load/vec4 v0x29c5330_0; + %load/vec4 v0x29c55d0_0; %add; - %assign/vec4 v0x12746e0_0, 0; - %load/vec4 v0x1274c20_0; + %assign/vec4 v0x29c5330_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x12746e0_0; - %load/vec4 v0x1274980_0; + %load/vec4 v0x29c5330_0; + %load/vec4 v0x29c55d0_0; %sub; - %assign/vec4 v0x12746e0_0, 0; - %load/vec4 v0x1274c20_0; + %assign/vec4 v0x29c5330_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5870_0; %pad/u 11; - %load/vec4 v0x1274980_0; + %load/vec4 v0x29c55d0_0; %add; %pad/u 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x12747e0_0; - %assign/vec4 v0x12746e0_0, 0; - %load/vec4 v0x12746e0_0; - %assign/vec4 v0x12747e0_0, 0; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5430_0; + %assign/vec4 v0x29c5330_0, 0; + %load/vec4 v0x29c5330_0; + %assign/vec4 v0x29c5430_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x12746e0_0; - %assign/vec4 v0x12747e0_0, 0; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5330_0; + %assign/vec4 v0x29c5430_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x12746e0_0; + %load/vec4 v0x29c5330_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x12746e0_0, 0; - %load/vec4 v0x1274c20_0; + %assign/vec4 v0x29c5330_0, 0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x1274b40_0; - %assign/vec4 v0x1274d00_0, 0; + %load/vec4 v0x29c5790_0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x12746e0_0; + %load/vec4 v0x29c5330_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x1274b40_0; - %assign/vec4 v0x1274d00_0, 0; + %load/vec4 v0x29c5790_0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x12746e0_0; + %load/vec4 v0x29c5330_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x1274b40_0; - %assign/vec4 v0x1274d00_0, 0; + %load/vec4 v0x29c5790_0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x12746e0_0; + %load/vec4 v0x29c5330_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x1274b40_0; - %assign/vec4 v0x1274d00_0, 0; + %load/vec4 v0x29c5790_0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x12746e0_0; + %load/vec4 v0x29c5330_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x1274b40_0; - %assign/vec4 v0x1274d00_0, 0; + %load/vec4 v0x29c5790_0; + %assign/vec4 v0x29c5950_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x1274c20_0; + %load/vec4 v0x29c5870_0; %addi 1, 0, 4; - %assign/vec4 v0x1274d00_0, 0; + %assign/vec4 v0x29c5950_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x1274a60_0; + %load/vec4 v0x29c56b0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1274a60_0; + %load/vec4 v0x29c56b0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x12748c0_0; + %load/vec4 v0x29c5510_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x12748c0_0; + %load/vec4 v0x29c5510_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2479,162 +2479,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x12748c0_0; + %load/vec4 v0x29c5510_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x12790c0_0; - %assign/vec4 v0x12746e0_0, 0; + %load/vec4 v0x29c9d10_0; + %assign/vec4 v0x29c5330_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277d30_0, 0; - %load/vec4 v0x12748c0_0; + %assign/vec4 v0x29c8980_0, 0; + %load/vec4 v0x29c5510_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x1277af0_0; - %assign/vec4 v0x1278fe0_0, 0; - %load/vec4 v0x12790c0_0; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; + %assign/vec4 v0x29c9c30_0, 0; + %load/vec4 v0x29c9d10_0; + %load/vec4 v0x29c8740_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1277af0_0; + %load/vec4 v0x29c8740_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1278c60_0, 4, 5; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x12748c0_0; + %load/vec4 v0x29c5510_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x12748c0_0; - %assign/vec4 v0x1278fe0_0, 0; - %load/vec4 v0x12790c0_0; - %load/vec4 v0x12748c0_0; + %load/vec4 v0x29c5510_0; + %assign/vec4 v0x29c9c30_0, 0; + %load/vec4 v0x29c9d10_0; + %load/vec4 v0x29c5510_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x12748c0_0; + %load/vec4 v0x29c5510_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12748c0_0; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c5510_0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x1277570_0; + %load/vec4 v0x29c81c0_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x12748c0_0; - %assign/vec4 v0x1278fe0_0, 0; + %load/vec4 v0x29c5510_0; + %assign/vec4 v0x29c9c30_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x1277f60_0; + %load/vec4 v0x29c8bb0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2649,82 +2649,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x1278590_0; + %load/vec4 v0x29c91e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x12773f0_0; + %load/vec4 v0x29c8040_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1277d30_0, 0; + %assign/vec4 v0x29c8980_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1278d40_0, 0, 4; - %load/vec4 v0x1278040_0; + %store/vec4 v0x29c9990_0, 0, 4; + %load/vec4 v0x29c8c90_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x1278040_0; + %load/vec4 v0x29c8c90_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2732,54 +2732,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x1278040_0; - %load/vec4 v0x1278590_0; + %load/vec4 v0x29c8c90_0; + %load/vec4 v0x29c91e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1277d30_0, 0; - %load/vec4 v0x1278590_0; + %assign/vec4 v0x29c8980_0, 0; + %load/vec4 v0x29c91e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12786d0, 4; - %assign/vec4 v0x1278630_0, 0; + %load/vec4a v0x29c9320, 4; + %assign/vec4 v0x29c9280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1278590_0; + %load/vec4 v0x29c91e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x12784f0_0, 4, 5; + %assign/vec4/off/d v0x29c9140_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1278590_0; + %load/vec4 v0x29c91e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1278d40_0, 4, 5; - %load/vec4 v0x1278590_0; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4/off/d v0x29c9990_0, 4, 5; + %load/vec4 v0x29c91e0_0; + %assign/vec4 v0x29c8740_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x1277f60_0; + %load/vec4 v0x29c8bb0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2795,93 +2795,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x1278fe0_0; + %load/vec4 v0x29c9c30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x1277570_0; + %load/vec4 v0x29c81c0_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x12764a0_0; + %load/vec4 v0x29c70f0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1278fe0_0, 0; + %assign/vec4 v0x29c9c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1278c60_0, 4, 5; - %load/vec4 v0x12790c0_0; + %assign/vec4/off/d v0x29c98b0_0, 4, 5; + %load/vec4 v0x29c9d10_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1277df0, 0, 4; + %assign/vec4/a/d v0x29c8a40, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8740_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2889,33 +2889,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x1278fe0_0; + %load/vec4 v0x29c9c30_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x1278e20_0; - %load/vec4 v0x1278fe0_0; + %load/vec4 v0x29c9a70_0; + %load/vec4 v0x29c9c30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1278fe0_0; + %load/vec4 v0x29c9c30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1278c60_0, 4, 1; + %store/vec4 v0x29c98b0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1277d30_0, 0; - %load/vec4 v0x1278fe0_0; - %assign/vec4 v0x1277af0_0, 0; + %assign/vec4 v0x29c8980_0, 0; + %load/vec4 v0x29c9c30_0; + %assign/vec4 v0x29c8740_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1277f60_0, 0; + %assign/vec4 v0x29c8bb0_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2924,19 +2924,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x1274160; + .scope S_0x29c4db0; T_5 ; - %wait E_0x11c19c0; - %load/vec4 v0x1277f60_0; + %wait E_0x2912800; + %load/vec4 v0x29c8bb0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1277d30_0; + %load/vec4 v0x29c8980_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1274d00_0; + %load/vec4 v0x29c5950_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2945,62 +2945,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x1274d00_0; - %assign/vec4 v0x1274c20_0, 0; + %load/vec4 v0x29c5950_0; + %assign/vec4 v0x29c5870_0, 0; T_5.0 ; - %load/vec4 v0x1277f60_0; + %load/vec4 v0x29c8bb0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x12784f0_0, 0, 4; + %store/vec4 v0x29c9140_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x1279340; + .scope S_0x29c9f90; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x127cf70_0, 0, 3; + %store/vec4 v0x29cdbc0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x127d1c0_0, 0, 3; + %store/vec4 v0x29cde10_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x127ccd0_0, 0, 3; + %store/vec4 v0x29cd920_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1279860_0, 0, 11; + %store/vec4 v0x29ca4b0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1279960_0, 0, 11; + %store/vec4 v0x29ca5b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1279df0_0, 0, 4; + %store/vec4 v0x29caa40_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x127d750_0, 0, 4; + %store/vec4 v0x29ce3a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x127dfa0_0, 0, 4; + %store/vec4 v0x29cebf0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x127e160_0, 0, 4; + %store/vec4 v0x29cedb0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x127dec0_0, 0, 4; + %store/vec4 v0x29ceb10_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127d050, 4, 0; + %store/vec4a v0x29cdca0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127d050, 4, 0; + %store/vec4a v0x29cdca0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127d050, 4, 0; + %store/vec4a v0x29cdca0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127d050, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x12795a0, v0x127cc10 {0 0 0}; + %store/vec4a v0x29cdca0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x29ca1f0, v0x29cd860 {0 0 0}; %end; .thread T_6; - .scope S_0x1279340; + .scope S_0x29c9f90; T_7 ; - %wait E_0x11e4150; - %load/vec4 v0x127cf70_0; + %wait E_0x2934f90; + %load/vec4 v0x29cdbc0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3015,7 +3015,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x127d1c0_0; + %load/vec4 v0x29cde10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3030,185 +3030,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x1279be0_0; + %load/vec4 v0x29ca830_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x127d2a0_0; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cdef0_0; + %load/vec4 v0x29cac00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127d750_0, 4, 5; - %load/vec4 v0x1279fb0_0; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; + %load/vec4 v0x29cac00_0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x127cf70_0, 0; - %load/vec4 v0x1279fb0_0; - %assign/vec4 v0x127d7f0_0, 0; + %assign/vec4 v0x29cdbc0_0, 0; + %load/vec4 v0x29cac00_0; + %assign/vec4 v0x29ce440_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; - %load/vec4 v0x1279fb0_0; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; + %load/vec4 v0x29cac00_0; + %assign/vec4 v0x29cd920_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x127d2a0_0; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cdef0_0; + %load/vec4 v0x29cd920_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x127cf70_0, 0; - %load/vec4 v0x127ccd0_0; - %assign/vec4 v0x127d7f0_0, 0; + %assign/vec4 v0x29cdbc0_0, 0; + %load/vec4 v0x29cd920_0; + %assign/vec4 v0x29ce440_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x1279fb0_0; + %load/vec4 v0x29cac00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x127c5c0_0; + %load/vec4 v0x29cd210_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3216,29 +3216,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x127cf70_0, 0; - %load/vec4 v0x1279fb0_0; - %assign/vec4 v0x127d7f0_0, 0; + %assign/vec4 v0x29cdbc0_0, 0; + %load/vec4 v0x29cac00_0; + %assign/vec4 v0x29ce440_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3246,10 +3246,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x1279be0_0; + %load/vec4 v0x29ca830_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3316,180 +3316,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x1279860_0; - %load/vec4 v0x127d890_0; + %load/vec4 v0x29ca4b0_0; + %load/vec4 v0x29ce4e0_0; %add; - %assign/vec4 v0x1279860_0, 0; - %load/vec4 v0x1279df0_0; + %assign/vec4 v0x29ca4b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x1279860_0; - %load/vec4 v0x127d890_0; + %load/vec4 v0x29ca4b0_0; + %load/vec4 v0x29ce4e0_0; %sub; - %assign/vec4 v0x1279860_0, 0; - %load/vec4 v0x1279df0_0; + %assign/vec4 v0x29ca4b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29caa40_0; %pad/u 11; - %load/vec4 v0x127d890_0; + %load/vec4 v0x29ce4e0_0; %add; %pad/u 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x127d890_0; - %assign/vec4 v0x127e320_0, 0; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29ce4e0_0; + %assign/vec4 v0x29cef70_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x1279b00_0; - %assign/vec4 v0x127e320_0, 0; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29ca750_0; + %assign/vec4 v0x29cef70_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x1279860_0; - %load/vec4 v0x1279b00_0; + %load/vec4 v0x29ca4b0_0; + %load/vec4 v0x29ca750_0; %add; - %assign/vec4 v0x1279860_0, 0; - %load/vec4 v0x1279df0_0; + %assign/vec4 v0x29ca4b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x1279860_0; - %load/vec4 v0x1279b00_0; + %load/vec4 v0x29ca4b0_0; + %load/vec4 v0x29ca750_0; %sub; - %assign/vec4 v0x1279860_0, 0; - %load/vec4 v0x1279df0_0; + %assign/vec4 v0x29ca4b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29caa40_0; %pad/u 11; - %load/vec4 v0x1279b00_0; + %load/vec4 v0x29ca750_0; %add; %pad/u 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x1279960_0; - %assign/vec4 v0x1279860_0, 0; - %load/vec4 v0x1279860_0; - %assign/vec4 v0x1279960_0, 0; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29ca5b0_0; + %assign/vec4 v0x29ca4b0_0, 0; + %load/vec4 v0x29ca4b0_0; + %assign/vec4 v0x29ca5b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x1279860_0; - %assign/vec4 v0x1279960_0, 0; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29ca4b0_0; + %assign/vec4 v0x29ca5b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x1279860_0; + %load/vec4 v0x29ca4b0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1279860_0, 0; - %load/vec4 v0x1279df0_0; + %assign/vec4 v0x29ca4b0_0, 0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x1279d10_0; - %assign/vec4 v0x1279ed0_0, 0; + %load/vec4 v0x29ca960_0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x1279860_0; + %load/vec4 v0x29ca4b0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x1279d10_0; - %assign/vec4 v0x1279ed0_0, 0; + %load/vec4 v0x29ca960_0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x1279860_0; + %load/vec4 v0x29ca4b0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x1279d10_0; - %assign/vec4 v0x1279ed0_0, 0; + %load/vec4 v0x29ca960_0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1279860_0; + %load/vec4 v0x29ca4b0_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x1279d10_0; - %assign/vec4 v0x1279ed0_0, 0; + %load/vec4 v0x29ca960_0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x1279860_0; + %load/vec4 v0x29ca4b0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x1279d10_0; - %assign/vec4 v0x1279ed0_0, 0; + %load/vec4 v0x29ca960_0; + %assign/vec4 v0x29cab20_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x1279df0_0; + %load/vec4 v0x29caa40_0; %addi 1, 0, 4; - %assign/vec4 v0x1279ed0_0, 0; + %assign/vec4 v0x29cab20_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x1279be0_0; + %load/vec4 v0x29ca830_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1279be0_0; + %load/vec4 v0x29ca830_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x1279a40_0; + %load/vec4 v0x29ca690_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1279a40_0; + %load/vec4 v0x29ca690_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3497,162 +3497,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x1279a40_0; + %load/vec4 v0x29ca690_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x127e320_0; - %assign/vec4 v0x1279860_0, 0; + %load/vec4 v0x29cef70_0; + %assign/vec4 v0x29ca4b0_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127cf70_0, 0; - %load/vec4 v0x1279a40_0; + %assign/vec4 v0x29cdbc0_0, 0; + %load/vec4 v0x29ca690_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x127ccd0_0; - %assign/vec4 v0x127e240_0, 0; - %load/vec4 v0x127e320_0; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; + %assign/vec4 v0x29cee90_0, 0; + %load/vec4 v0x29cef70_0; + %load/vec4 v0x29cd920_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x127ccd0_0; + %load/vec4 v0x29cd920_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127dec0_0, 4, 5; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x1279a40_0; + %load/vec4 v0x29ca690_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x1279a40_0; - %assign/vec4 v0x127e240_0, 0; - %load/vec4 v0x127e320_0; - %load/vec4 v0x1279a40_0; + %load/vec4 v0x29ca690_0; + %assign/vec4 v0x29cee90_0, 0; + %load/vec4 v0x29cef70_0; + %load/vec4 v0x29ca690_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1279a40_0; + %load/vec4 v0x29ca690_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x1279a40_0; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29ca690_0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x127c740_0; + %load/vec4 v0x29cd390_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x1279a40_0; - %assign/vec4 v0x127e240_0, 0; + %load/vec4 v0x29ca690_0; + %assign/vec4 v0x29cee90_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x127d1c0_0; + %load/vec4 v0x29cde10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3667,82 +3667,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x127d7f0_0; + %load/vec4 v0x29ce440_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x127c5c0_0; + %load/vec4 v0x29cd210_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x127cf70_0, 0; + %assign/vec4 v0x29cdbc0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x127dfa0_0, 0, 4; - %load/vec4 v0x127d2a0_0; + %store/vec4 v0x29cebf0_0, 0, 4; + %load/vec4 v0x29cdef0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x127d2a0_0; + %load/vec4 v0x29cdef0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3750,54 +3750,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x127d2a0_0; - %load/vec4 v0x127d7f0_0; + %load/vec4 v0x29cdef0_0; + %load/vec4 v0x29ce440_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x127cf70_0, 0; - %load/vec4 v0x127d7f0_0; + %assign/vec4 v0x29cdbc0_0, 0; + %load/vec4 v0x29ce440_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x127d930, 4; - %assign/vec4 v0x127d890_0, 0; + %load/vec4a v0x29ce580, 4; + %assign/vec4 v0x29ce4e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x127d7f0_0; + %load/vec4 v0x29ce440_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127d750_0, 4, 5; + %assign/vec4/off/d v0x29ce3a0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x127d7f0_0; + %load/vec4 v0x29ce440_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x127dfa0_0, 4, 5; - %load/vec4 v0x127d7f0_0; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4/off/d v0x29cebf0_0, 4, 5; + %load/vec4 v0x29ce440_0; + %assign/vec4 v0x29cd920_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x127d1c0_0; + %load/vec4 v0x29cde10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3813,93 +3813,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x127e240_0; + %load/vec4 v0x29cee90_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x127c740_0; + %load/vec4 v0x29cd390_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x127b670_0; + %load/vec4 v0x29cc2c0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x127e240_0, 0; + %assign/vec4 v0x29cee90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x127dec0_0, 4, 5; - %load/vec4 v0x127e320_0; + %assign/vec4/off/d v0x29ceb10_0, 4, 5; + %load/vec4 v0x29cef70_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x127d050, 0, 4; + %assign/vec4/a/d v0x29cdca0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cd920_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3907,33 +3907,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x127e240_0; + %load/vec4 v0x29cee90_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x127e080_0; - %load/vec4 v0x127e240_0; + %load/vec4 v0x29cecd0_0; + %load/vec4 v0x29cee90_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x127e240_0; + %load/vec4 v0x29cee90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x127dec0_0, 4, 1; + %store/vec4 v0x29ceb10_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x127cf70_0, 0; - %load/vec4 v0x127e240_0; - %assign/vec4 v0x127ccd0_0, 0; + %assign/vec4 v0x29cdbc0_0, 0; + %load/vec4 v0x29cee90_0; + %assign/vec4 v0x29cd920_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x127d1c0_0, 0; + %assign/vec4 v0x29cde10_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3942,19 +3942,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x1279340; + .scope S_0x29c9f90; T_8 ; - %wait E_0x11c19c0; - %load/vec4 v0x127d1c0_0; + %wait E_0x2912800; + %load/vec4 v0x29cde10_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x127cf70_0; + %load/vec4 v0x29cdbc0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1279ed0_0; + %load/vec4 v0x29cab20_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3963,62 +3963,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x1279ed0_0; - %assign/vec4 v0x1279df0_0, 0; + %load/vec4 v0x29cab20_0; + %assign/vec4 v0x29caa40_0, 0; T_8.0 ; - %load/vec4 v0x127d1c0_0; + %load/vec4 v0x29cde10_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x127d750_0, 0, 4; + %store/vec4 v0x29ce3a0_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x1269d60; + .scope S_0x29ba9b0; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x126d970_0, 0, 3; + %store/vec4 v0x29be5c0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x126db90_0, 0, 3; + %store/vec4 v0x29be7e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x126d6d0_0, 0, 3; + %store/vec4 v0x29be320_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x126a290_0, 0, 11; + %store/vec4 v0x29baee0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x126a390_0, 0, 11; + %store/vec4 v0x29bafe0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126a820_0, 0, 4; + %store/vec4 v0x29bb470_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126e120_0, 0, 4; + %store/vec4 v0x29bed70_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126e950_0, 0, 4; + %store/vec4 v0x29bf5a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126eb10_0, 0, 4; + %store/vec4 v0x29bf760_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126e890_0, 0, 4; + %store/vec4 v0x29bf4e0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x126da50, 4, 0; + %store/vec4a v0x29be6a0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x126da50, 4, 0; + %store/vec4a v0x29be6a0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x126da50, 4, 0; + %store/vec4a v0x29be6a0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x126da50, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1269f90, v0x126d610 {0 0 0}; + %store/vec4a v0x29be6a0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x29babe0, v0x29be260 {0 0 0}; %end; .thread T_9; - .scope S_0x1269d60; + .scope S_0x29ba9b0; T_10 ; - %wait E_0x11e4150; - %load/vec4 v0x126d970_0; + %wait E_0x2934f90; + %load/vec4 v0x29be5c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4033,7 +4033,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x126db90_0; + %load/vec4 v0x29be7e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4048,185 +4048,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x126a610_0; + %load/vec4 v0x29bb260_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x126dc70_0; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29be8c0_0; + %load/vec4 v0x29bb630_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e120_0, 4, 5; - %load/vec4 v0x126a9e0_0; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4/off/d v0x29bed70_0, 4, 5; + %load/vec4 v0x29bb630_0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x126d970_0, 0; - %load/vec4 v0x126a9e0_0; - %assign/vec4 v0x126e1c0_0, 0; + %assign/vec4 v0x29be5c0_0, 0; + %load/vec4 v0x29bb630_0; + %assign/vec4 v0x29bee10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e950_0, 4, 5; - %load/vec4 v0x126a9e0_0; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; + %load/vec4 v0x29bb630_0; + %assign/vec4 v0x29be320_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x126dc70_0; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be8c0_0; + %load/vec4 v0x29be320_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x126d970_0, 0; - %load/vec4 v0x126d6d0_0; - %assign/vec4 v0x126e1c0_0, 0; + %assign/vec4 v0x29be5c0_0, 0; + %load/vec4 v0x29be320_0; + %assign/vec4 v0x29bee10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e950_0, 4, 5; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x126a9e0_0; + %load/vec4 v0x29bb630_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x126cff0_0; + %load/vec4 v0x29bdc40_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4234,29 +4234,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x126d970_0, 0; - %load/vec4 v0x126a9e0_0; - %assign/vec4 v0x126e1c0_0, 0; + %assign/vec4 v0x29be5c0_0, 0; + %load/vec4 v0x29bb630_0; + %assign/vec4 v0x29bee10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e950_0, 4, 5; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e950_0, 4, 5; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e950_0, 4, 5; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e950_0, 4, 5; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4264,10 +4264,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x126a610_0; + %load/vec4 v0x29bb260_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4334,180 +4334,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x126a290_0; - %load/vec4 v0x126e260_0; + %load/vec4 v0x29baee0_0; + %load/vec4 v0x29beeb0_0; %add; - %assign/vec4 v0x126a290_0, 0; - %load/vec4 v0x126a820_0; + %assign/vec4 v0x29baee0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x126a290_0; - %load/vec4 v0x126e260_0; + %load/vec4 v0x29baee0_0; + %load/vec4 v0x29beeb0_0; %sub; - %assign/vec4 v0x126a290_0, 0; - %load/vec4 v0x126a820_0; + %assign/vec4 v0x29baee0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb470_0; %pad/u 11; - %load/vec4 v0x126e260_0; + %load/vec4 v0x29beeb0_0; %add; %pad/u 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x126e260_0; - %assign/vec4 v0x126ecd0_0, 0; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29beeb0_0; + %assign/vec4 v0x29bf920_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x126a530_0; - %assign/vec4 v0x126ecd0_0, 0; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb180_0; + %assign/vec4 v0x29bf920_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x126a290_0; - %load/vec4 v0x126a530_0; + %load/vec4 v0x29baee0_0; + %load/vec4 v0x29bb180_0; %add; - %assign/vec4 v0x126a290_0, 0; - %load/vec4 v0x126a820_0; + %assign/vec4 v0x29baee0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x126a290_0; - %load/vec4 v0x126a530_0; + %load/vec4 v0x29baee0_0; + %load/vec4 v0x29bb180_0; %sub; - %assign/vec4 v0x126a290_0, 0; - %load/vec4 v0x126a820_0; + %assign/vec4 v0x29baee0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb470_0; %pad/u 11; - %load/vec4 v0x126a530_0; + %load/vec4 v0x29bb180_0; %add; %pad/u 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x126a390_0; - %assign/vec4 v0x126a290_0, 0; - %load/vec4 v0x126a290_0; - %assign/vec4 v0x126a390_0, 0; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bafe0_0; + %assign/vec4 v0x29baee0_0, 0; + %load/vec4 v0x29baee0_0; + %assign/vec4 v0x29bafe0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x126a290_0; - %assign/vec4 v0x126a390_0, 0; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29baee0_0; + %assign/vec4 v0x29bafe0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x126a290_0; + %load/vec4 v0x29baee0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x126a290_0, 0; - %load/vec4 v0x126a820_0; + %assign/vec4 v0x29baee0_0, 0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x126a740_0; - %assign/vec4 v0x126a900_0, 0; + %load/vec4 v0x29bb390_0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x126a290_0; + %load/vec4 v0x29baee0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x126a740_0; - %assign/vec4 v0x126a900_0, 0; + %load/vec4 v0x29bb390_0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x126a290_0; + %load/vec4 v0x29baee0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x126a740_0; - %assign/vec4 v0x126a900_0, 0; + %load/vec4 v0x29bb390_0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x126a290_0; + %load/vec4 v0x29baee0_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x126a740_0; - %assign/vec4 v0x126a900_0, 0; + %load/vec4 v0x29bb390_0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x126a290_0; + %load/vec4 v0x29baee0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x126a740_0; - %assign/vec4 v0x126a900_0, 0; + %load/vec4 v0x29bb390_0; + %assign/vec4 v0x29bb550_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x126a820_0; + %load/vec4 v0x29bb470_0; %addi 1, 0, 4; - %assign/vec4 v0x126a900_0, 0; + %assign/vec4 v0x29bb550_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x126a610_0; + %load/vec4 v0x29bb260_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x126a610_0; + %load/vec4 v0x29bb260_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x126a470_0; + %load/vec4 v0x29bb0c0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x126a470_0; + %load/vec4 v0x29bb0c0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4515,162 +4515,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x126a470_0; + %load/vec4 v0x29bb0c0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x126ecd0_0; - %assign/vec4 v0x126a290_0, 0; + %load/vec4 v0x29bf920_0; + %assign/vec4 v0x29baee0_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126d970_0, 0; - %load/vec4 v0x126a470_0; + %assign/vec4 v0x29be5c0_0, 0; + %load/vec4 v0x29bb0c0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x126d6d0_0; - %assign/vec4 v0x126ebf0_0, 0; - %load/vec4 v0x126ecd0_0; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; + %assign/vec4 v0x29bf840_0, 0; + %load/vec4 v0x29bf920_0; + %load/vec4 v0x29be320_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126d6d0_0; + %load/vec4 v0x29be320_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e890_0, 4, 5; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x126a470_0; + %load/vec4 v0x29bb0c0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x126a470_0; - %assign/vec4 v0x126ebf0_0, 0; - %load/vec4 v0x126ecd0_0; - %load/vec4 v0x126a470_0; + %load/vec4 v0x29bb0c0_0; + %assign/vec4 v0x29bf840_0, 0; + %load/vec4 v0x29bf920_0; + %load/vec4 v0x29bb0c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126a470_0; + %load/vec4 v0x29bb0c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126a470_0; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bb0c0_0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x126d170_0; + %load/vec4 v0x29bddc0_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x126a470_0; - %assign/vec4 v0x126ebf0_0, 0; + %load/vec4 v0x29bb0c0_0; + %assign/vec4 v0x29bf840_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x126db90_0; + %load/vec4 v0x29be7e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4685,82 +4685,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x126e1c0_0; + %load/vec4 v0x29bee10_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x126cff0_0; + %load/vec4 v0x29bdc40_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x126d970_0, 0; + %assign/vec4 v0x29be5c0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126e950_0, 0, 4; - %load/vec4 v0x126dc70_0; + %store/vec4 v0x29bf5a0_0, 0, 4; + %load/vec4 v0x29be8c0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x126dc70_0; + %load/vec4 v0x29be8c0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4768,54 +4768,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x126dc70_0; - %load/vec4 v0x126e1c0_0; + %load/vec4 v0x29be8c0_0; + %load/vec4 v0x29bee10_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x126d970_0, 0; - %load/vec4 v0x126e1c0_0; + %assign/vec4 v0x29be5c0_0, 0; + %load/vec4 v0x29bee10_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x126e300, 4; - %assign/vec4 v0x126e260_0, 0; + %load/vec4a v0x29bef50, 4; + %assign/vec4 v0x29beeb0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126e1c0_0; + %load/vec4 v0x29bee10_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e120_0, 4, 5; + %assign/vec4/off/d v0x29bed70_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x126e1c0_0; + %load/vec4 v0x29bee10_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x126e950_0, 4, 5; - %load/vec4 v0x126e1c0_0; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4/off/d v0x29bf5a0_0, 4, 5; + %load/vec4 v0x29bee10_0; + %assign/vec4 v0x29be320_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x126db90_0; + %load/vec4 v0x29be7e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4831,93 +4831,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x126ebf0_0; + %load/vec4 v0x29bf840_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x126d170_0; + %load/vec4 v0x29bddc0_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x126c0a0_0; + %load/vec4 v0x29bccf0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x126ebf0_0, 0; + %assign/vec4 v0x29bf840_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x126e890_0, 4, 5; - %load/vec4 v0x126ecd0_0; + %assign/vec4/off/d v0x29bf4e0_0, 4, 5; + %load/vec4 v0x29bf920_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x126da50, 0, 4; + %assign/vec4/a/d v0x29be6a0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be320_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4925,33 +4925,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x126ebf0_0; + %load/vec4 v0x29bf840_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x126ea30_0; - %load/vec4 v0x126ebf0_0; + %load/vec4 v0x29bf680_0; + %load/vec4 v0x29bf840_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x126ebf0_0; + %load/vec4 v0x29bf840_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x126e890_0, 4, 1; + %store/vec4 v0x29bf4e0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x126d970_0, 0; - %load/vec4 v0x126ebf0_0; - %assign/vec4 v0x126d6d0_0, 0; + %assign/vec4 v0x29be5c0_0, 0; + %load/vec4 v0x29bf840_0; + %assign/vec4 v0x29be320_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x126db90_0, 0; + %assign/vec4 v0x29be7e0_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4960,19 +4960,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x1269d60; + .scope S_0x29ba9b0; T_11 ; - %wait E_0x11c19c0; - %load/vec4 v0x126db90_0; + %wait E_0x2912800; + %load/vec4 v0x29be7e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x126d970_0; + %load/vec4 v0x29be5c0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x126a900_0; + %load/vec4 v0x29bb550_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4981,62 +4981,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x126a900_0; - %assign/vec4 v0x126a820_0, 0; + %load/vec4 v0x29bb550_0; + %assign/vec4 v0x29bb470_0, 0; T_11.0 ; - %load/vec4 v0x126db90_0; + %load/vec4 v0x29be7e0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x126e120_0, 0, 4; + %store/vec4 v0x29bed70_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x12003b0; + .scope S_0x29511f0; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x12686e0_0, 0, 3; + %store/vec4 v0x29b9330_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1268900_0, 0, 3; + %store/vec4 v0x29b9550_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1268440_0, 0, 3; + %store/vec4 v0x29b9090_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1226750_0, 0, 11; + %store/vec4 v0x29775b0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1265090_0, 0, 11; + %store/vec4 v0x29b5ce0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1265550_0, 0, 4; + %store/vec4 v0x29b61a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1268e90_0, 0, 4; + %store/vec4 v0x29b9ae0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1269760_0, 0, 4; + %store/vec4 v0x29ba3b0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1269920_0, 0, 4; + %store/vec4 v0x29ba570_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1269680_0, 0, 4; + %store/vec4 v0x29ba2d0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x12687c0, 4, 0; + %store/vec4a v0x29b9410, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x12687c0, 4, 0; + %store/vec4a v0x29b9410, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x12687c0, 4, 0; + %store/vec4a v0x29b9410, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x12687c0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x11cf1f0, v0x1268380 {0 0 0}; + %store/vec4a v0x29b9410, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x28ff610, v0x29b8fd0 {0 0 0}; %end; .thread T_12; - .scope S_0x12003b0; + .scope S_0x29511f0; T_13 ; - %wait E_0x11e4150; - %load/vec4 v0x12686e0_0; + %wait E_0x2934f90; + %load/vec4 v0x29b9330_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5051,7 +5051,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x1268900_0; + %load/vec4 v0x29b9550_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5066,185 +5066,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x1265340_0; + %load/vec4 v0x29b5f90_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x12689e0_0; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b9630_0; + %load/vec4 v0x29b6360_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1268e90_0, 4, 5; - %load/vec4 v0x1265710_0; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; + %load/vec4 v0x29b6360_0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12686e0_0, 0; - %load/vec4 v0x1265710_0; - %assign/vec4 v0x1268f30_0, 0; + %assign/vec4 v0x29b9330_0, 0; + %load/vec4 v0x29b6360_0; + %assign/vec4 v0x29b9b80_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1269760_0, 4, 5; - %load/vec4 v0x1265710_0; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; + %load/vec4 v0x29b6360_0; + %assign/vec4 v0x29b9090_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x12689e0_0; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9630_0; + %load/vec4 v0x29b9090_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12686e0_0, 0; - %load/vec4 v0x1268440_0; - %assign/vec4 v0x1268f30_0, 0; + %assign/vec4 v0x29b9330_0, 0; + %load/vec4 v0x29b9090_0; + %assign/vec4 v0x29b9b80_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1269760_0, 4, 5; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x1265710_0; + %load/vec4 v0x29b6360_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x1267d20_0; + %load/vec4 v0x29b8970_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5252,29 +5252,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x12686e0_0, 0; - %load/vec4 v0x1265710_0; - %assign/vec4 v0x1268f30_0, 0; + %assign/vec4 v0x29b9330_0, 0; + %load/vec4 v0x29b6360_0; + %assign/vec4 v0x29b9b80_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269760_0, 4, 5; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269760_0, 4, 5; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269760_0, 4, 5; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269760_0, 4, 5; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5282,10 +5282,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x1265340_0; + %load/vec4 v0x29b5f90_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5352,180 +5352,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x1226750_0; - %load/vec4 v0x1269010_0; + %load/vec4 v0x29775b0_0; + %load/vec4 v0x29b9c60_0; %add; - %assign/vec4 v0x1226750_0, 0; - %load/vec4 v0x1265550_0; + %assign/vec4 v0x29775b0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x1226750_0; - %load/vec4 v0x1269010_0; + %load/vec4 v0x29775b0_0; + %load/vec4 v0x29b9c60_0; %sub; - %assign/vec4 v0x1226750_0, 0; - %load/vec4 v0x1265550_0; + %assign/vec4 v0x29775b0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b61a0_0; %pad/u 11; - %load/vec4 v0x1269010_0; + %load/vec4 v0x29b9c60_0; %add; %pad/u 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x1269010_0; - %assign/vec4 v0x1269ae0_0, 0; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b9c60_0; + %assign/vec4 v0x29ba730_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x1265260_0; - %assign/vec4 v0x1269ae0_0, 0; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b5eb0_0; + %assign/vec4 v0x29ba730_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x1226750_0; - %load/vec4 v0x1265260_0; + %load/vec4 v0x29775b0_0; + %load/vec4 v0x29b5eb0_0; %add; - %assign/vec4 v0x1226750_0, 0; - %load/vec4 v0x1265550_0; + %assign/vec4 v0x29775b0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x1226750_0; - %load/vec4 v0x1265260_0; + %load/vec4 v0x29775b0_0; + %load/vec4 v0x29b5eb0_0; %sub; - %assign/vec4 v0x1226750_0, 0; - %load/vec4 v0x1265550_0; + %assign/vec4 v0x29775b0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b61a0_0; %pad/u 11; - %load/vec4 v0x1265260_0; + %load/vec4 v0x29b5eb0_0; %add; %pad/u 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x1265090_0; - %assign/vec4 v0x1226750_0, 0; - %load/vec4 v0x1226750_0; - %assign/vec4 v0x1265090_0, 0; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b5ce0_0; + %assign/vec4 v0x29775b0_0, 0; + %load/vec4 v0x29775b0_0; + %assign/vec4 v0x29b5ce0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x1226750_0; - %assign/vec4 v0x1265090_0, 0; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29775b0_0; + %assign/vec4 v0x29b5ce0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x1226750_0; + %load/vec4 v0x29775b0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1226750_0, 0; - %load/vec4 v0x1265550_0; + %assign/vec4 v0x29775b0_0, 0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x1265470_0; - %assign/vec4 v0x1265630_0, 0; + %load/vec4 v0x29b60c0_0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x1226750_0; + %load/vec4 v0x29775b0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x1265470_0; - %assign/vec4 v0x1265630_0, 0; + %load/vec4 v0x29b60c0_0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x1226750_0; + %load/vec4 v0x29775b0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x1265470_0; - %assign/vec4 v0x1265630_0, 0; + %load/vec4 v0x29b60c0_0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1226750_0; + %load/vec4 v0x29775b0_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x1265470_0; - %assign/vec4 v0x1265630_0, 0; + %load/vec4 v0x29b60c0_0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x1226750_0; + %load/vec4 v0x29775b0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x1265470_0; - %assign/vec4 v0x1265630_0, 0; + %load/vec4 v0x29b60c0_0; + %assign/vec4 v0x29b6280_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x1265550_0; + %load/vec4 v0x29b61a0_0; %addi 1, 0, 4; - %assign/vec4 v0x1265630_0, 0; + %assign/vec4 v0x29b6280_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x1265340_0; + %load/vec4 v0x29b5f90_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1265340_0; + %load/vec4 v0x29b5f90_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x1265170_0; + %load/vec4 v0x29b5dc0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1265170_0; + %load/vec4 v0x29b5dc0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5533,162 +5533,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x1265170_0; + %load/vec4 v0x29b5dc0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x1269ae0_0; - %assign/vec4 v0x1226750_0, 0; + %load/vec4 v0x29ba730_0; + %assign/vec4 v0x29775b0_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x12686e0_0, 0; - %load/vec4 v0x1265170_0; + %assign/vec4 v0x29b9330_0, 0; + %load/vec4 v0x29b5dc0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x1268440_0; - %assign/vec4 v0x1269a00_0, 0; - %load/vec4 v0x1269ae0_0; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; + %assign/vec4 v0x29ba650_0, 0; + %load/vec4 v0x29ba730_0; + %load/vec4 v0x29b9090_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1268440_0; + %load/vec4 v0x29b9090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1269680_0, 4, 5; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x1265170_0; + %load/vec4 v0x29b5dc0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x1265170_0; - %assign/vec4 v0x1269a00_0, 0; - %load/vec4 v0x1269ae0_0; - %load/vec4 v0x1265170_0; + %load/vec4 v0x29b5dc0_0; + %assign/vec4 v0x29ba650_0, 0; + %load/vec4 v0x29ba730_0; + %load/vec4 v0x29b5dc0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1265170_0; + %load/vec4 v0x29b5dc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1265170_0; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29b5dc0_0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x1267ea0_0; + %load/vec4 v0x29b8af0_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x1265170_0; - %assign/vec4 v0x1269a00_0, 0; + %load/vec4 v0x29b5dc0_0; + %assign/vec4 v0x29ba650_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x1268900_0; + %load/vec4 v0x29b9550_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5703,82 +5703,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x1268f30_0; + %load/vec4 v0x29b9b80_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x1267d20_0; + %load/vec4 v0x29b8970_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12686e0_0, 0; + %assign/vec4 v0x29b9330_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1269760_0, 0, 4; - %load/vec4 v0x12689e0_0; + %store/vec4 v0x29ba3b0_0, 0, 4; + %load/vec4 v0x29b9630_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x12689e0_0; + %load/vec4 v0x29b9630_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5786,54 +5786,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x12689e0_0; - %load/vec4 v0x1268f30_0; + %load/vec4 v0x29b9630_0; + %load/vec4 v0x29b9b80_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12686e0_0, 0; - %load/vec4 v0x1268f30_0; + %assign/vec4 v0x29b9330_0, 0; + %load/vec4 v0x29b9b80_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x12690f0, 4; - %assign/vec4 v0x1269010_0, 0; + %load/vec4a v0x29b9d40, 4; + %assign/vec4 v0x29b9c60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1268f30_0; + %load/vec4 v0x29b9b80_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1268e90_0, 4, 5; + %assign/vec4/off/d v0x29b9ae0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1268f30_0; + %load/vec4 v0x29b9b80_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1269760_0, 4, 5; - %load/vec4 v0x1268f30_0; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4/off/d v0x29ba3b0_0, 4, 5; + %load/vec4 v0x29b9b80_0; + %assign/vec4 v0x29b9090_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x1268900_0; + %load/vec4 v0x29b9550_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5849,93 +5849,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x1269a00_0; + %load/vec4 v0x29ba650_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x1267ea0_0; + %load/vec4 v0x29b8af0_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x1266dd0_0; + %load/vec4 v0x29b7a20_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1269a00_0, 0; + %assign/vec4 v0x29ba650_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1269680_0, 4, 5; - %load/vec4 v0x1269ae0_0; + %assign/vec4/off/d v0x29ba2d0_0, 4, 5; + %load/vec4 v0x29ba730_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x12687c0, 0, 4; + %assign/vec4/a/d v0x29b9410, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9090_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5943,33 +5943,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x1269a00_0; + %load/vec4 v0x29ba650_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x1269840_0; - %load/vec4 v0x1269a00_0; + %load/vec4 v0x29ba490_0; + %load/vec4 v0x29ba650_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1269a00_0; + %load/vec4 v0x29ba650_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1269680_0, 4, 1; + %store/vec4 v0x29ba2d0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x12686e0_0, 0; - %load/vec4 v0x1269a00_0; - %assign/vec4 v0x1268440_0, 0; + %assign/vec4 v0x29b9330_0, 0; + %load/vec4 v0x29ba650_0; + %assign/vec4 v0x29b9090_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1268900_0, 0; + %assign/vec4 v0x29b9550_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5978,19 +5978,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x12003b0; + .scope S_0x29511f0; T_14 ; - %wait E_0x11c19c0; - %load/vec4 v0x1268900_0; + %wait E_0x2912800; + %load/vec4 v0x29b9550_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x12686e0_0; + %load/vec4 v0x29b9330_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1265630_0; + %load/vec4 v0x29b6280_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -5999,94 +5999,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x1265630_0; - %assign/vec4 v0x1265550_0, 0; + %load/vec4 v0x29b6280_0; + %assign/vec4 v0x29b61a0_0, 0; T_14.0 ; - %load/vec4 v0x1268900_0; + %load/vec4 v0x29b9550_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1268e90_0, 0, 4; + %store/vec4 v0x29b9ae0_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x11b0b30; + .scope S_0x2901970; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x127f1c0_0, 0, 33; + %store/vec4 v0x29cfe10_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x127f060_0, 0, 1; + %store/vec4 v0x29cfcb0_0, 0, 1; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 1, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 2, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 3, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 4, 0, 11; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 4, 0, 11; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 5, 0, 11; %ix/load 4, 6, 0; %flag_set/imm 4, 0; - %store/vec4a v0x127f100, 4, 0; + %store/vec4a v0x29cfd50, 4, 0; %pushi/vec4 0, 0, 33; - %store/vec4 v0x127f1c0_0, 0, 33; + %store/vec4 v0x29cfe10_0, 0, 33; T_15.0 ; - %load/vec4 v0x127f1c0_0; + %load/vec4 v0x29cfe10_0; %cmpi/u 7, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x127efc0_0, 0, 1; + %store/vec4 v0x29cfc10_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x127efc0_0, 0, 1; + %store/vec4 v0x29cfc10_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x127efc0_0, 0, 1; + %store/vec4 v0x29cfc10_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x127efc0_0, 0, 1; + %store/vec4 v0x29cfc10_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x127efc0_0, 0, 1; + %store/vec4 v0x29cfc10_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x127efc0_0, 0, 1; + %store/vec4 v0x29cfc10_0, 0, 1; %delay 1, 0; - %vpi_call 2 53 "$display", "acc = %d", v0x127ee70_0 {0 0 0}; - %load/vec4 v0x127ee70_0; - %ix/getv 4, v0x127f1c0_0; - %load/vec4a v0x127f100, 4; + %load/vec4 v0x29cfac0_0; + %ix/getv 4, v0x29cfe10_0; + %load/vec4a v0x29cfd50, 4; %cmp/ne; %jmp/0xz T_15.2, 4; - %vpi_call 2 55 "$display", "anyRead failed on test %d", v0x127f1c0_0 {0 0 0}; + %vpi_call 2 54 "$display", "anyRead failed on test %d", v0x29cfe10_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x127f060_0, 0, 1; + %store/vec4 v0x29cfcb0_0, 0, 1; T_15.2 ; - %load/vec4 v0x127f1c0_0; + %load/vec4 v0x29cfe10_0; %addi 1, 0, 33; - %store/vec4 v0x127f1c0_0, 0, 33; + %store/vec4 v0x29cfe10_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x127f060_0; + %load/vec4 v0x29cfcb0_0; %flag_set/vec4 8; %jmp/0xz T_15.4, 8; - %vpi_call 2 60 "$display", "DUT passed anyRead" {0 0 0}; + %vpi_call 2 59 "$display", "DUT passed anyRead" {0 0 0}; T_15.4 ; %end; .thread T_15; diff --git a/anyRead/test.v b/anyRead/test.v index 8925931..eee8046 100644 --- a/anyRead/test.v +++ b/anyRead/test.v @@ -50,7 +50,6 @@ initial begin clk = 1; #1; clk = 0; #1; clk = 1; #1; - $display("acc = %d",accOutCenter); if(accOutCenter != expected[i]) begin $display("anyRead failed on test %d",i); dutPassed = 0; diff --git a/anyWrite/test b/anyWrite/test index eee6050..f33073c 100755 --- a/anyWrite/test +++ b/anyWrite/test @@ -6,25 +6,25 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x27b21e0 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x10151e0 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x2858e40_0 .net "C2D", 14 0, L_0x287d6c0; 1 drivers -v0x2858f70_0 .net "C2L", 14 0, L_0x287d3e0; 1 drivers -v0x2859080_0 .net "C2R", 14 0, L_0x287ddb0; 1 drivers -v0x2859170_0 .net "C2U", 14 0, L_0x287d110; 1 drivers -v0x2859280_0 .net "D2C", 14 0, L_0x2878f20; 1 drivers -v0x28593e0_0 .net "L2C", 14 0, L_0x286d6c0; 1 drivers -v0x28594f0_0 .net "R2C", 14 0, L_0x2871010; 1 drivers -v0x2859600_0 .net "U2C", 14 0, L_0x2875380; 1 drivers -v0x2859710_0 .net/s "accOutCenter", 10 0, L_0x2879ce0; 1 drivers -v0x2859860_0 .net/s "accOutDown", 10 0, L_0x2875c80; 1 drivers -v0x2859900_0 .net/s "accOutLeft", 10 0, L_0x2859d00; 1 drivers -v0x28599a0_0 .net/s "accOutRight", 10 0, L_0x286da10; 1 drivers -v0x2859a40_0 .net/s "accOutUp", 10 0, L_0x2871bd0; 1 drivers -v0x2859ae0_0 .var "clk", 0 0; -v0x2859b80_0 .var "dutPassed", 0 0; -v0x2859c20_0 .var "i", 32 0; -S_0x278a540 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x27b21e0; +v0x10bbe40_0 .net "C2D", 14 0, L_0x10e06c0; 1 drivers +v0x10bbf70_0 .net "C2L", 14 0, L_0x10e03e0; 1 drivers +v0x10bc080_0 .net "C2R", 14 0, L_0x10e0db0; 1 drivers +v0x10bc170_0 .net "C2U", 14 0, L_0x10e0110; 1 drivers +v0x10bc280_0 .net "D2C", 14 0, L_0x10dbf20; 1 drivers +v0x10bc3e0_0 .net "L2C", 14 0, L_0x10d06c0; 1 drivers +v0x10bc4f0_0 .net "R2C", 14 0, L_0x10d4010; 1 drivers +v0x10bc600_0 .net "U2C", 14 0, L_0x10d8380; 1 drivers +v0x10bc710_0 .net/s "accOutCenter", 10 0, L_0x10dcce0; 1 drivers +v0x10bc860_0 .net/s "accOutDown", 10 0, L_0x10d8c80; 1 drivers +v0x10bc900_0 .net/s "accOutLeft", 10 0, L_0x10bcd00; 1 drivers +v0x10bc9a0_0 .net/s "accOutRight", 10 0, L_0x10d0a10; 1 drivers +v0x10bca40_0 .net/s "accOutUp", 10 0, L_0x10d4bd0; 1 drivers +v0x10bcae0_0 .var "clk", 0 0; +v0x10bcb80_0 .var "dutPassed", 0 0; +v0x10bcc20_0 .var "i", 32 0; +S_0xfed540 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x10151e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -36,174 +36,174 @@ S_0x278a540 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x27b21e0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x27da600 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x27da640 .param/str "memFile" 0 3 60, "anyWrite/center.dat"; -L_0x2879ce0 .functor BUFZ 11, v0x2800240_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2879f70 .functor BUFZ 11, v0x2800240_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x287ada0 .functor BUFZ 18, L_0x287cf20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2800240_0 .var/s "ACC", 10 0; -v0x283f930_0 .var/s "BAK", 10 0; -v0x283fa10_0 .net "DST", 2 0, L_0x287e240; 1 drivers -v0x283fb00_0 .net/s "IMM", 10 0, L_0x287e2e0; 1 drivers -v0x283fbe0_0 .net "INST", 3 0, L_0x287da20; 1 drivers -v0x283fd10_0 .net "LABEL", 3 0, L_0x287e490; 1 drivers -v0x283fdf0_0 .var "PC", 3 0; -v0x283fed0_0 .var "PCNEXT", 3 0; -v0x283ffb0_0 .net "SRC", 2 0, L_0x287e050; 1 drivers -v0x2840120_0 .net *"_s103", 0 0, L_0x287c260; 1 drivers -v0x2840200_0 .net *"_s107", 0 0, L_0x287c170; 1 drivers -v0x28402e0_0 .net *"_s111", 0 0, L_0x287c450; 1 drivers -v0x28403c0_0 .net *"_s115", 0 0, L_0x287c350; 1 drivers -v0x28404a0_0 .net *"_s119", 0 0, L_0x287c690; 1 drivers -v0x2840580_0 .net *"_s123", 0 0, L_0x287c580; 1 drivers -v0x2840660_0 .net *"_s127", 0 0, L_0x287c850; 1 drivers -v0x2840740_0 .net *"_s131", 0 0, L_0x287c730; 1 drivers -v0x28408f0_0 .net *"_s135", 0 0, L_0x287cab0; 1 drivers -v0x2840990_0 .net *"_s139", 0 0, L_0x287c980; 1 drivers -v0x2840a70_0 .net *"_s143", 0 0, L_0x287cc90; 1 drivers -v0x2840b50_0 .net *"_s147", 0 0, L_0x287cb50; 1 drivers -v0x2840c30_0 .net *"_s151", 0 0, L_0x287ce80; 1 drivers -v0x2840d10_0 .net *"_s155", 0 0, L_0x287cd30; 1 drivers -v0x2840df0_0 .net *"_s159", 0 0, L_0x287cdd0; 1 drivers -v0x2840ed0_0 .net *"_s160", 17 0, L_0x287cf20; 1 drivers -v0x2840fb0_0 .net *"_s162", 5 0, L_0x287d280; 1 drivers -L_0x2b28706ce2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x2841090_0 .net *"_s165", 1 0, L_0x2b28706ce2a0; 1 drivers -v0x2843060_2 .array/port v0x2843060, 2; -v0x2841170_0 .net *"_s173", 10 0, v0x2843060_2; 1 drivers -v0x2843060_3 .array/port v0x2843060, 3; -v0x2841250_0 .net *"_s179", 10 0, v0x2843060_3; 1 drivers -v0x2843060_0 .array/port v0x2843060, 0; -v0x2841330_0 .net *"_s185", 10 0, v0x2843060_0; 1 drivers -v0x2843060_1 .array/port v0x2843060, 1; -v0x2841410_0 .net *"_s191", 10 0, v0x2843060_1; 1 drivers -v0x28414f0_0 .net *"_s23", 0 0, L_0x287a740; 1 drivers -v0x28415d0_0 .net *"_s27", 0 0, L_0x287a810; 1 drivers -v0x2840820_0 .net *"_s31", 0 0, L_0x287a8e0; 1 drivers -v0x28418a0_0 .net *"_s36", 0 0, L_0x287aa80; 1 drivers -v0x2841980_0 .net *"_s42", 0 0, L_0x287ac60; 1 drivers -v0x2841a60_0 .net *"_s46", 0 0, L_0x287ad00; 1 drivers -v0x2841b40_0 .net *"_s50", 0 0, L_0x287ae10; 1 drivers -v0x2841c20_0 .net *"_s55", 0 0, L_0x287b020; 1 drivers -v0x2841d00_0 .net *"_s61", 0 0, L_0x287b290; 1 drivers -v0x2841de0_0 .net *"_s65", 0 0, L_0x287b330; 1 drivers -v0x2841ec0_0 .net *"_s69", 0 0, L_0x287b470; 1 drivers -v0x2841fa0_0 .net *"_s74", 0 0, L_0x287b3d0; 1 drivers -v0x2842080_0 .net *"_s80", 0 0, L_0x287b6a0; 1 drivers -v0x2842160_0 .net *"_s84", 0 0, L_0x287ba60; 1 drivers -v0x2842240_0 .net *"_s88", 0 0, L_0x287b890; 1 drivers -v0x2842320_0 .net *"_s93", 0 0, L_0x287bc10; 1 drivers -v0x2842400_0 .net *"_s99", 0 0, L_0x287be90; 1 drivers -v0x28424e0_0 .net/s "accOut", 10 0, L_0x2879ce0; alias, 1 drivers -v0x28425c0_0 .net "anyHasData", 0 0, L_0x287ab70; 1 drivers -v0x2842680_0 .net "anyReadAck", 0 0, L_0x287b7a0; 1 drivers -v0x2842740_0 .net "anyWantData", 0 0, L_0x287b110; 1 drivers -v0x2842800_0 .net "anyWriteAck", 0 0, L_0x287c0d0; 1 drivers -v0x28428c0_0 .net "clk", 0 0, v0x2859ae0_0; 1 drivers -v0x2842980_0 .net "down", 14 0, L_0x2878f20; alias, 1 drivers -v0x2842a60_0 .net "downOut", 14 0, L_0x287d6c0; alias, 1 drivers -v0x2842b40_0 .net "instruction", 17 0, L_0x287ada0; 1 drivers -v0x2842c20 .array "instructions", 15 0, 17 0; -v0x2842ce0_0 .var "last", 2 0; -v0x2842dc0_0 .net "left", 14 0, L_0x286d6c0; alias, 1 drivers -v0x2842ea0_0 .net "leftOut", 14 0, L_0x287d3e0; alias, 1 drivers -v0x2842f80_0 .var "mode", 2 0; -v0x2843060 .array/s "outVals", 2 5, 10 0; -v0x28431a0_0 .var "phase", 2 0; -v0x2843280_0 .net "portsHaveData", 5 2, L_0x287a980; 1 drivers -v0x2841670_0 .net "portsWantData", 5 2, L_0x287aeb0; 1 drivers -v0x2841750_0 .net "readAckIn", 5 2, L_0x287b510; 1 drivers -v0x2843730_0 .var "readAckOut", 5 2; -v0x28437d0_0 .var "readTarget", 2 0; -v0x28438b0_0 .var/s "readValue", 10 0; -L_0x2b28706ce258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x2843990 .array "regVals", 0 7; -v0x2843990_0 .net/s v0x2843990 0, 10 0, L_0x2b28706ce258; 1 drivers -v0x2843990_1 .net/s v0x2843990 1, 10 0, L_0x2879f70; 1 drivers -v0x2843990_2 .net/s v0x2843990 2, 10 0, L_0x287a250; 1 drivers -v0x2843990_3 .net/s v0x2843990 3, 10 0, L_0x287a380; 1 drivers -v0x2843990_4 .net/s v0x2843990 4, 10 0, L_0x287a4b0; 1 drivers -v0x2843990_5 .net/s v0x2843990 5, 10 0, L_0x287a5e0; 1 drivers -o0x2b287069deb8 .functor BUFZ 11, C4; HiZ drive -v0x2843990_6 .net/s v0x2843990 6, 10 0, o0x2b287069deb8; 0 drivers -o0x2b287069dee8 .functor BUFZ 11, C4; HiZ drive -v0x2843990_7 .net/s v0x2843990 7, 10 0, o0x2b287069dee8; 0 drivers -v0x2843ba0_0 .net "right", 14 0, L_0x2871010; alias, 1 drivers -v0x2843c80_0 .net "rightOut", 14 0, L_0x287ddb0; alias, 1 drivers -v0x2843d60_0 .net "up", 14 0, L_0x2875380; alias, 1 drivers -v0x2843e40_0 .net "upOut", 14 0, L_0x287d110; alias, 1 drivers -v0x2843f20_0 .var "weHaveData", 5 2; -v0x2844000_0 .var "weWantData", 5 2; -v0x28440e0_0 .net "writeAckIn", 5 2, L_0x287bdf0; 1 drivers -v0x28441c0_0 .var "writeAckOut", 5 2; -v0x28442a0_0 .var "writeTarget", 2 0; -v0x2844380_0 .var/s "writeValue", 10 0; -E_0x279b3d0 .event negedge, v0x28428c0_0; -E_0x27bdb80 .event posedge, v0x28428c0_0; -L_0x287a250 .part L_0x286d6c0, 0, 11; -L_0x287a380 .part L_0x2871010, 0, 11; -L_0x287a4b0 .part L_0x2875380, 0, 11; -L_0x287a5e0 .part L_0x2878f20, 0, 11; -L_0x287a740 .part L_0x286d6c0, 11, 1; -L_0x287a810 .part L_0x2871010, 11, 1; -L_0x287a8e0 .part L_0x2875380, 11, 1; -L_0x287a980 .concat8 [ 1 1 1 1], L_0x287a740, L_0x287a810, L_0x287a8e0, L_0x287aa80; -L_0x287aa80 .part L_0x2878f20, 11, 1; -L_0x287ab70 .reduce/or L_0x287a980; -L_0x287ac60 .part L_0x286d6c0, 12, 1; -L_0x287ad00 .part L_0x2871010, 12, 1; -L_0x287ae10 .part L_0x2875380, 12, 1; -L_0x287aeb0 .concat8 [ 1 1 1 1], L_0x287ac60, L_0x287ad00, L_0x287ae10, L_0x287b020; -L_0x287b020 .part L_0x2878f20, 12, 1; -L_0x287b110 .reduce/or L_0x287aeb0; -L_0x287b290 .part L_0x286d6c0, 13, 1; -L_0x287b330 .part L_0x2871010, 13, 1; -L_0x287b470 .part L_0x2875380, 13, 1; -L_0x287b510 .concat8 [ 1 1 1 1], L_0x287b290, L_0x287b330, L_0x287b470, L_0x287b3d0; -L_0x287b3d0 .part L_0x2878f20, 13, 1; -L_0x287b7a0 .reduce/or L_0x287b510; -L_0x287b6a0 .part L_0x286d6c0, 14, 1; -L_0x287ba60 .part L_0x2871010, 14, 1; -L_0x287b890 .part L_0x2875380, 14, 1; -L_0x287bdf0 .concat8 [ 1 1 1 1], L_0x287b6a0, L_0x287ba60, L_0x287b890, L_0x287bc10; -L_0x287bc10 .part L_0x2878f20, 14, 1; -L_0x287c0d0 .reduce/or L_0x287bdf0; -L_0x287be90 .part v0x2843730_0, 0, 1; -L_0x287c260 .part v0x2843730_0, 1, 1; -L_0x287c170 .part v0x2843730_0, 2, 1; -L_0x287c450 .part v0x2843730_0, 3, 1; -L_0x287c350 .part v0x28441c0_0, 0, 1; -L_0x287c690 .part v0x28441c0_0, 1, 1; -L_0x287c580 .part v0x28441c0_0, 2, 1; -L_0x287c850 .part v0x28441c0_0, 3, 1; -L_0x287c730 .part v0x2844000_0, 0, 1; -L_0x287cab0 .part v0x2844000_0, 1, 1; -L_0x287c980 .part v0x2844000_0, 2, 1; -L_0x287cc90 .part v0x2844000_0, 3, 1; -L_0x287cb50 .part v0x2843f20_0, 0, 1; -L_0x287ce80 .part v0x2843f20_0, 1, 1; -L_0x287cd30 .part v0x2843f20_0, 2, 1; -L_0x287cdd0 .part v0x2843f20_0, 3, 1; -L_0x287cf20 .array/port v0x2842c20, L_0x287d280; -L_0x287d280 .concat [ 4 2 0 0], v0x283fdf0_0, L_0x2b28706ce2a0; -LS_0x287d110_0_0 .concat8 [ 11 1 1 1], v0x2843060_2, L_0x287cd30, L_0x287c980, L_0x287c580; -LS_0x287d110_0_4 .concat8 [ 1 0 0 0], L_0x287c170; -L_0x287d110 .concat8 [ 14 1 0 0], LS_0x287d110_0_0, LS_0x287d110_0_4; -LS_0x287d6c0_0_0 .concat8 [ 11 1 1 1], v0x2843060_3, L_0x287cdd0, L_0x287cc90, L_0x287c850; -LS_0x287d6c0_0_4 .concat8 [ 1 0 0 0], L_0x287c450; -L_0x287d6c0 .concat8 [ 14 1 0 0], LS_0x287d6c0_0_0, LS_0x287d6c0_0_4; -LS_0x287d3e0_0_0 .concat8 [ 11 1 1 1], v0x2843060_0, L_0x287cb50, L_0x287c730, L_0x287c350; -LS_0x287d3e0_0_4 .concat8 [ 1 0 0 0], L_0x287be90; -L_0x287d3e0 .concat8 [ 14 1 0 0], LS_0x287d3e0_0_0, LS_0x287d3e0_0_4; -LS_0x287ddb0_0_0 .concat8 [ 11 1 1 1], v0x2843060_1, L_0x287ce80, L_0x287cab0, L_0x287c690; -LS_0x287ddb0_0_4 .concat8 [ 1 0 0 0], L_0x287c260; -L_0x287ddb0 .concat8 [ 14 1 0 0], LS_0x287ddb0_0_0, LS_0x287ddb0_0_4; -L_0x287da20 .part L_0x287ada0, 14, 4; -L_0x287e240 .part L_0x287ada0, 11, 3; -L_0x287e050 .part L_0x287ada0, 8, 3; -L_0x287e490 .part L_0x287ada0, 10, 4; -L_0x287e2e0 .part L_0x287ada0, 0, 11; -S_0x2844600 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x27b21e0; +P_0x103d600 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x103d640 .param/str "memFile" 0 3 60, "anyWrite/center.dat"; +L_0x10dcce0 .functor BUFZ 11, v0x1063240_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10dcf70 .functor BUFZ 11, v0x1063240_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10ddda0 .functor BUFZ 18, L_0x10dff20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x1063240_0 .var/s "ACC", 10 0; +v0x10a2930_0 .var/s "BAK", 10 0; +v0x10a2a10_0 .net "DST", 2 0, L_0x10e1240; 1 drivers +v0x10a2b00_0 .net/s "IMM", 10 0, L_0x10e12e0; 1 drivers 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0, L_0x10dfd30; 1 drivers +v0x10a3df0_0 .net *"_s159", 0 0, L_0x10dfdd0; 1 drivers +v0x10a3ed0_0 .net *"_s160", 17 0, L_0x10dff20; 1 drivers +v0x10a3fb0_0 .net *"_s162", 5 0, L_0x10e0280; 1 drivers +L_0x2b8038e7d2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x10a4090_0 .net *"_s165", 1 0, L_0x2b8038e7d2a0; 1 drivers +v0x10a6060_2 .array/port v0x10a6060, 2; +v0x10a4170_0 .net *"_s173", 10 0, v0x10a6060_2; 1 drivers +v0x10a6060_3 .array/port v0x10a6060, 3; +v0x10a4250_0 .net *"_s179", 10 0, v0x10a6060_3; 1 drivers +v0x10a6060_0 .array/port v0x10a6060, 0; +v0x10a4330_0 .net *"_s185", 10 0, v0x10a6060_0; 1 drivers +v0x10a6060_1 .array/port v0x10a6060, 1; +v0x10a4410_0 .net *"_s191", 10 0, v0x10a6060_1; 1 drivers +v0x10a44f0_0 .net *"_s23", 0 0, L_0x10dd740; 1 drivers +v0x10a45d0_0 .net *"_s27", 0 0, L_0x10dd810; 1 drivers +v0x10a3820_0 .net *"_s31", 0 0, L_0x10dd8e0; 1 drivers +v0x10a48a0_0 .net *"_s36", 0 0, L_0x10dda80; 1 drivers +v0x10a4980_0 .net *"_s42", 0 0, L_0x10ddc60; 1 drivers +v0x10a4a60_0 .net *"_s46", 0 0, L_0x10ddd00; 1 drivers +v0x10a4b40_0 .net *"_s50", 0 0, L_0x10dde10; 1 drivers +v0x10a4c20_0 .net *"_s55", 0 0, L_0x10de020; 1 drivers +v0x10a4d00_0 .net *"_s61", 0 0, L_0x10de290; 1 drivers +v0x10a4de0_0 .net *"_s65", 0 0, L_0x10de330; 1 drivers +v0x10a4ec0_0 .net *"_s69", 0 0, L_0x10de470; 1 drivers +v0x10a4fa0_0 .net *"_s74", 0 0, L_0x10de3d0; 1 drivers +v0x10a5080_0 .net *"_s80", 0 0, L_0x10de6a0; 1 drivers +v0x10a5160_0 .net *"_s84", 0 0, L_0x10dea60; 1 drivers +v0x10a5240_0 .net *"_s88", 0 0, L_0x10de890; 1 drivers +v0x10a5320_0 .net *"_s93", 0 0, L_0x10dec10; 1 drivers +v0x10a5400_0 .net *"_s99", 0 0, L_0x10dee90; 1 drivers +v0x10a54e0_0 .net/s "accOut", 10 0, L_0x10dcce0; alias, 1 drivers +v0x10a55c0_0 .net "anyHasData", 0 0, L_0x10ddb70; 1 drivers +v0x10a5680_0 .net "anyReadAck", 0 0, L_0x10de7a0; 1 drivers +v0x10a5740_0 .net "anyWantData", 0 0, L_0x10de110; 1 drivers +v0x10a5800_0 .net "anyWriteAck", 0 0, L_0x10df0d0; 1 drivers +v0x10a58c0_0 .net "clk", 0 0, v0x10bcae0_0; 1 drivers +v0x10a5980_0 .net "down", 14 0, L_0x10dbf20; alias, 1 drivers +v0x10a5a60_0 .net "downOut", 14 0, L_0x10e06c0; alias, 1 drivers +v0x10a5b40_0 .net "instruction", 17 0, L_0x10ddda0; 1 drivers +v0x10a5c20 .array "instructions", 15 0, 17 0; +v0x10a5ce0_0 .var "last", 2 0; +v0x10a5dc0_0 .net "left", 14 0, L_0x10d06c0; alias, 1 drivers +v0x10a5ea0_0 .net "leftOut", 14 0, L_0x10e03e0; alias, 1 drivers +v0x10a5f80_0 .var "mode", 2 0; +v0x10a6060 .array/s "outVals", 2 5, 10 0; +v0x10a61a0_0 .var "phase", 2 0; +v0x10a6280_0 .net "portsHaveData", 5 2, L_0x10dd980; 1 drivers +v0x10a4670_0 .net "portsWantData", 5 2, L_0x10ddeb0; 1 drivers +v0x10a4750_0 .net "readAckIn", 5 2, L_0x10de510; 1 drivers +v0x10a6730_0 .var "readAckOut", 5 2; +v0x10a67d0_0 .var "readTarget", 2 0; +v0x10a68b0_0 .var/s "readValue", 10 0; +L_0x2b8038e7d258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x10a6990 .array "regVals", 0 7; +v0x10a6990_0 .net/s v0x10a6990 0, 10 0, L_0x2b8038e7d258; 1 drivers +v0x10a6990_1 .net/s v0x10a6990 1, 10 0, L_0x10dcf70; 1 drivers +v0x10a6990_2 .net/s v0x10a6990 2, 10 0, L_0x10dd250; 1 drivers +v0x10a6990_3 .net/s v0x10a6990 3, 10 0, L_0x10dd380; 1 drivers +v0x10a6990_4 .net/s v0x10a6990 4, 10 0, L_0x10dd4b0; 1 drivers +v0x10a6990_5 .net/s v0x10a6990 5, 10 0, L_0x10dd5e0; 1 drivers +o0x2b8038e4ceb8 .functor BUFZ 11, C4; HiZ drive +v0x10a6990_6 .net/s v0x10a6990 6, 10 0, o0x2b8038e4ceb8; 0 drivers +o0x2b8038e4cee8 .functor BUFZ 11, C4; HiZ drive +v0x10a6990_7 .net/s v0x10a6990 7, 10 0, o0x2b8038e4cee8; 0 drivers +v0x10a6ba0_0 .net "right", 14 0, L_0x10d4010; alias, 1 drivers +v0x10a6c80_0 .net "rightOut", 14 0, L_0x10e0db0; alias, 1 drivers +v0x10a6d60_0 .net "up", 14 0, L_0x10d8380; alias, 1 drivers +v0x10a6e40_0 .net "upOut", 14 0, L_0x10e0110; alias, 1 drivers +v0x10a6f20_0 .var "weHaveData", 5 2; +v0x10a7000_0 .var "weWantData", 5 2; +v0x10a70e0_0 .net "writeAckIn", 5 2, L_0x10dedf0; 1 drivers +v0x10a71c0_0 .var "writeAckOut", 5 2; +v0x10a72a0_0 .var "writeTarget", 2 0; +v0x10a7380_0 .var/s "writeValue", 10 0; +E_0xffe3d0 .event negedge, v0x10a58c0_0; +E_0x1020b80 .event posedge, v0x10a58c0_0; +L_0x10dd250 .part L_0x10d06c0, 0, 11; +L_0x10dd380 .part L_0x10d4010, 0, 11; +L_0x10dd4b0 .part L_0x10d8380, 0, 11; +L_0x10dd5e0 .part L_0x10dbf20, 0, 11; +L_0x10dd740 .part L_0x10d06c0, 11, 1; +L_0x10dd810 .part L_0x10d4010, 11, 1; +L_0x10dd8e0 .part L_0x10d8380, 11, 1; +L_0x10dd980 .concat8 [ 1 1 1 1], L_0x10dd740, L_0x10dd810, L_0x10dd8e0, L_0x10dda80; +L_0x10dda80 .part L_0x10dbf20, 11, 1; +L_0x10ddb70 .reduce/or L_0x10dd980; +L_0x10ddc60 .part L_0x10d06c0, 12, 1; +L_0x10ddd00 .part L_0x10d4010, 12, 1; +L_0x10dde10 .part L_0x10d8380, 12, 1; +L_0x10ddeb0 .concat8 [ 1 1 1 1], L_0x10ddc60, L_0x10ddd00, L_0x10dde10, L_0x10de020; +L_0x10de020 .part L_0x10dbf20, 12, 1; +L_0x10de110 .reduce/or L_0x10ddeb0; +L_0x10de290 .part L_0x10d06c0, 13, 1; +L_0x10de330 .part L_0x10d4010, 13, 1; +L_0x10de470 .part L_0x10d8380, 13, 1; +L_0x10de510 .concat8 [ 1 1 1 1], L_0x10de290, L_0x10de330, L_0x10de470, L_0x10de3d0; +L_0x10de3d0 .part L_0x10dbf20, 13, 1; +L_0x10de7a0 .reduce/or L_0x10de510; +L_0x10de6a0 .part L_0x10d06c0, 14, 1; +L_0x10dea60 .part L_0x10d4010, 14, 1; +L_0x10de890 .part L_0x10d8380, 14, 1; +L_0x10dedf0 .concat8 [ 1 1 1 1], L_0x10de6a0, L_0x10dea60, L_0x10de890, L_0x10dec10; +L_0x10dec10 .part L_0x10dbf20, 14, 1; +L_0x10df0d0 .reduce/or L_0x10dedf0; +L_0x10dee90 .part v0x10a6730_0, 0, 1; +L_0x10df260 .part v0x10a6730_0, 1, 1; +L_0x10df170 .part v0x10a6730_0, 2, 1; +L_0x10df450 .part v0x10a6730_0, 3, 1; +L_0x10df350 .part v0x10a71c0_0, 0, 1; +L_0x10df690 .part v0x10a71c0_0, 1, 1; +L_0x10df580 .part v0x10a71c0_0, 2, 1; +L_0x10df850 .part v0x10a71c0_0, 3, 1; +L_0x10df730 .part v0x10a7000_0, 0, 1; +L_0x10dfab0 .part v0x10a7000_0, 1, 1; +L_0x10df980 .part v0x10a7000_0, 2, 1; +L_0x10dfc90 .part v0x10a7000_0, 3, 1; +L_0x10dfb50 .part v0x10a6f20_0, 0, 1; +L_0x10dfe80 .part v0x10a6f20_0, 1, 1; +L_0x10dfd30 .part v0x10a6f20_0, 2, 1; +L_0x10dfdd0 .part v0x10a6f20_0, 3, 1; +L_0x10dff20 .array/port v0x10a5c20, L_0x10e0280; +L_0x10e0280 .concat [ 4 2 0 0], v0x10a2df0_0, L_0x2b8038e7d2a0; +LS_0x10e0110_0_0 .concat8 [ 11 1 1 1], v0x10a6060_2, L_0x10dfd30, L_0x10df980, L_0x10df580; +LS_0x10e0110_0_4 .concat8 [ 1 0 0 0], L_0x10df170; +L_0x10e0110 .concat8 [ 14 1 0 0], LS_0x10e0110_0_0, LS_0x10e0110_0_4; +LS_0x10e06c0_0_0 .concat8 [ 11 1 1 1], v0x10a6060_3, L_0x10dfdd0, L_0x10dfc90, L_0x10df850; +LS_0x10e06c0_0_4 .concat8 [ 1 0 0 0], L_0x10df450; +L_0x10e06c0 .concat8 [ 14 1 0 0], LS_0x10e06c0_0_0, LS_0x10e06c0_0_4; +LS_0x10e03e0_0_0 .concat8 [ 11 1 1 1], v0x10a6060_0, L_0x10dfb50, L_0x10df730, L_0x10df350; +LS_0x10e03e0_0_4 .concat8 [ 1 0 0 0], L_0x10dee90; +L_0x10e03e0 .concat8 [ 14 1 0 0], LS_0x10e03e0_0_0, LS_0x10e03e0_0_4; +LS_0x10e0db0_0_0 .concat8 [ 11 1 1 1], v0x10a6060_1, L_0x10dfe80, L_0x10dfab0, L_0x10df690; +LS_0x10e0db0_0_4 .concat8 [ 1 0 0 0], L_0x10df260; +L_0x10e0db0 .concat8 [ 14 1 0 0], LS_0x10e0db0_0_0, LS_0x10e0db0_0_4; +L_0x10e0a20 .part L_0x10ddda0, 14, 4; +L_0x10e1240 .part L_0x10ddda0, 11, 3; +L_0x10e1050 .part L_0x10ddda0, 8, 3; +L_0x10e1490 .part L_0x10ddda0, 10, 4; +L_0x10e12e0 .part L_0x10ddda0, 0, 11; +S_0x10a7600 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x10151e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -215,175 +215,175 @@ S_0x2844600 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x27b21e0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x28447f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x2844830 .param/str "memFile" 0 3 60, "anyWrite/down.dat"; -L_0x2875c80 .functor BUFZ 11, v0x2844b80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2875e80 .functor BUFZ 11, v0x2844b80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2876d40 .functor BUFZ 18, L_0x2878cb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2844b80_0 .var/s "ACC", 10 0; -v0x2844c80_0 .var/s "BAK", 10 0; -v0x2844d60_0 .net "DST", 2 0, L_0x2879da0; 1 drivers -v0x2844e20_0 .net/s "IMM", 10 0, L_0x2879e40; 1 drivers -v0x2844f00_0 .net "INST", 3 0, L_0x2879680; 1 drivers -v0x2844fe0_0 .net "LABEL", 3 0, L_0x2879ff0; 1 drivers -v0x28450c0_0 .var "PC", 3 0; -v0x28451a0_0 .var "PCNEXT", 3 0; -v0x2845280_0 .net "SRC", 2 0, L_0x2879bb0; 1 drivers -v0x28453f0_0 .net *"_s103", 0 0, L_0x2877ff0; 1 drivers -v0x28454d0_0 .net *"_s107", 0 0, L_0x2877f00; 1 drivers -v0x28455b0_0 .net *"_s111", 0 0, L_0x28781e0; 1 drivers -v0x2845690_0 .net *"_s115", 0 0, L_0x28780e0; 1 drivers -v0x2845770_0 .net *"_s119", 0 0, L_0x2878420; 1 drivers -v0x2845850_0 .net *"_s123", 0 0, L_0x2878310; 1 drivers -v0x2845930_0 .net *"_s127", 0 0, L_0x28785e0; 1 drivers -v0x2845a10_0 .net *"_s131", 0 0, L_0x28784c0; 1 drivers -v0x2845bc0_0 .net *"_s135", 0 0, L_0x2878840; 1 drivers -v0x2845c60_0 .net *"_s139", 0 0, L_0x2878710; 1 drivers -v0x2845d40_0 .net *"_s143", 0 0, L_0x2878a20; 1 drivers -v0x2845e20_0 .net *"_s147", 0 0, L_0x28788e0; 1 drivers -v0x2845f00_0 .net *"_s151", 0 0, L_0x2878c10; 1 drivers -v0x2845fe0_0 .net *"_s155", 0 0, L_0x2878ac0; 1 drivers -v0x28460c0_0 .net *"_s159", 0 0, L_0x2878b60; 1 drivers -v0x28461a0_0 .net *"_s160", 17 0, L_0x2878cb0; 1 drivers -v0x2846280_0 .net *"_s162", 5 0, L_0x2879010; 1 drivers -L_0x2b28706ce210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x2846360_0 .net *"_s165", 1 0, L_0x2b28706ce210; 1 drivers -v0x28482f0_2 .array/port v0x28482f0, 2; -v0x2846440_0 .net *"_s173", 10 0, v0x28482f0_2; 1 drivers -v0x28482f0_3 .array/port v0x28482f0, 3; -v0x2846520_0 .net *"_s179", 10 0, v0x28482f0_3; 1 drivers -v0x28482f0_0 .array/port v0x28482f0, 0; -v0x2846600_0 .net *"_s185", 10 0, v0x28482f0_0; 1 drivers -v0x28482f0_1 .array/port v0x28482f0, 1; -v0x28466e0_0 .net *"_s191", 10 0, v0x28482f0_1; 1 drivers -v0x28467c0_0 .net *"_s23", 0 0, L_0x28764d0; 1 drivers -v0x28468a0_0 .net *"_s27", 0 0, L_0x28765f0; 1 drivers -v0x2845af0_0 .net *"_s31", 0 0, L_0x28766e0; 1 drivers -v0x2846b70_0 .net *"_s36", 0 0, L_0x28769d0; 1 drivers -v0x2846c50_0 .net *"_s42", 0 0, L_0x2876c00; 1 drivers -v0x2846d30_0 .net *"_s46", 0 0, L_0x2876ca0; 1 drivers -v0x2846e10_0 .net *"_s50", 0 0, L_0x2876db0; 1 drivers -v0x2846ef0_0 .net *"_s55", 0 0, L_0x2876fc0; 1 drivers -v0x2846fd0_0 .net *"_s61", 0 0, L_0x2877230; 1 drivers -v0x28470b0_0 .net *"_s65", 0 0, L_0x2877360; 1 drivers -v0x2847190_0 .net *"_s69", 0 0, L_0x2877530; 1 drivers -v0x2847270_0 .net *"_s74", 0 0, L_0x2877490; 1 drivers -v0x2847350_0 .net *"_s80", 0 0, L_0x28776c0; 1 drivers -v0x2847430_0 .net *"_s84", 0 0, L_0x28779b0; 1 drivers -v0x2847510_0 .net *"_s88", 0 0, L_0x28778f0; 1 drivers -v0x28475f0_0 .net *"_s93", 0 0, L_0x2877a50; 1 drivers -v0x28476d0_0 .net *"_s99", 0 0, L_0x2877ce0; 1 drivers -v0x28477b0_0 .net/s "accOut", 10 0, L_0x2875c80; alias, 1 drivers -v0x2847890_0 .net "anyHasData", 0 0, L_0x2876b10; 1 drivers -v0x2847950_0 .net "anyReadAck", 0 0, L_0x2877850; 1 drivers -v0x2847a10_0 .net "anyWantData", 0 0, L_0x28770b0; 1 drivers -v0x2847ad0_0 .net "anyWriteAck", 0 0, L_0x2877e10; 1 drivers -v0x2847b90_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers -o0x2b287069ecc8 .functor BUFZ 15, C4; HiZ drive -v0x2847c30_0 .net "down", 14 0, o0x2b287069ecc8; 0 drivers -v0x2847cf0_0 .net "downOut", 14 0, L_0x28793e0; 1 drivers -v0x2847dd0_0 .net "instruction", 17 0, L_0x2876d40; 1 drivers -v0x2847eb0 .array "instructions", 15 0, 17 0; -v0x2847f70_0 .var "last", 2 0; -o0x2b287069ed88 .functor BUFZ 15, C4; HiZ drive -v0x2848050_0 .net "left", 14 0, o0x2b287069ed88; 0 drivers -v0x2848130_0 .net "leftOut", 14 0, L_0x2879170; 1 drivers -v0x2848210_0 .var "mode", 2 0; -v0x28482f0 .array/s "outVals", 2 5, 10 0; -v0x2848430_0 .var "phase", 2 0; -v0x2848510_0 .net "portsHaveData", 5 2, L_0x2876810; 1 drivers -v0x2846940_0 .net "portsWantData", 5 2, L_0x2876e50; 1 drivers -v0x2846a20_0 .net "readAckIn", 5 2, L_0x28775d0; 1 drivers -v0x28489c0_0 .var "readAckOut", 5 2; -v0x2848a60_0 .var "readTarget", 2 0; -v0x2848b00_0 .var/s "readValue", 10 0; -L_0x2b28706ce1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x2848ba0 .array "regVals", 0 7; -v0x2848ba0_0 .net/s v0x2848ba0 0, 10 0, L_0x2b28706ce1c8; 1 drivers -v0x2848ba0_1 .net/s v0x2848ba0 1, 10 0, L_0x2875e80; 1 drivers -v0x2848ba0_2 .net/s v0x2848ba0 2, 10 0, L_0x28761f0; 1 drivers -v0x2848ba0_3 .net/s v0x2848ba0 3, 10 0, L_0x2876290; 1 drivers -v0x2848ba0_4 .net/s v0x2848ba0 4, 10 0, L_0x2876330; 1 drivers -v0x2848ba0_5 .net/s v0x2848ba0 5, 10 0, L_0x28763d0; 1 drivers -o0x2b287069f148 .functor BUFZ 11, C4; HiZ drive -v0x2848ba0_6 .net/s v0x2848ba0 6, 10 0, o0x2b287069f148; 0 drivers -o0x2b287069f178 .functor BUFZ 11, C4; HiZ drive -v0x2848ba0_7 .net/s v0x2848ba0 7, 10 0, o0x2b287069f178; 0 drivers -o0x2b287069f1a8 .functor BUFZ 15, C4; HiZ drive -v0x2848db0_0 .net "right", 14 0, o0x2b287069f1a8; 0 drivers -v0x2848e90_0 .net "rightOut", 14 0, L_0x2879990; 1 drivers -v0x2848f70_0 .net "up", 14 0, L_0x287d6c0; alias, 1 drivers -v0x2849060_0 .net "upOut", 14 0, L_0x2878f20; alias, 1 drivers -v0x2849130_0 .var "weHaveData", 5 2; -v0x28491f0_0 .var "weWantData", 5 2; -v0x28492d0_0 .net "writeAckIn", 5 2, L_0x2877b20; 1 drivers -v0x28493b0_0 .var "writeAckOut", 5 2; -v0x2849490_0 .var "writeTarget", 2 0; -v0x2849570_0 .var/s "writeValue", 10 0; -L_0x28761f0 .part o0x2b287069ed88, 0, 11; -L_0x2876290 .part o0x2b287069f1a8, 0, 11; -L_0x2876330 .part L_0x287d6c0, 0, 11; -L_0x28763d0 .part o0x2b287069ecc8, 0, 11; -L_0x28764d0 .part o0x2b287069ed88, 11, 1; -L_0x28765f0 .part o0x2b287069f1a8, 11, 1; -L_0x28766e0 .part L_0x287d6c0, 11, 1; -L_0x2876810 .concat8 [ 1 1 1 1], L_0x28764d0, L_0x28765f0, L_0x28766e0, L_0x28769d0; -L_0x28769d0 .part o0x2b287069ecc8, 11, 1; -L_0x2876b10 .reduce/or L_0x2876810; -L_0x2876c00 .part o0x2b287069ed88, 12, 1; -L_0x2876ca0 .part o0x2b287069f1a8, 12, 1; -L_0x2876db0 .part L_0x287d6c0, 12, 1; -L_0x2876e50 .concat8 [ 1 1 1 1], L_0x2876c00, L_0x2876ca0, L_0x2876db0, L_0x2876fc0; -L_0x2876fc0 .part o0x2b287069ecc8, 12, 1; -L_0x28770b0 .reduce/or L_0x2876e50; -L_0x2877230 .part o0x2b287069ed88, 13, 1; -L_0x2877360 .part o0x2b287069f1a8, 13, 1; -L_0x2877530 .part L_0x287d6c0, 13, 1; -L_0x28775d0 .concat8 [ 1 1 1 1], L_0x2877230, L_0x2877360, L_0x2877530, L_0x2877490; -L_0x2877490 .part o0x2b287069ecc8, 13, 1; -L_0x2877850 .reduce/or L_0x28775d0; -L_0x28776c0 .part o0x2b287069ed88, 14, 1; -L_0x28779b0 .part o0x2b287069f1a8, 14, 1; -L_0x28778f0 .part L_0x287d6c0, 14, 1; -L_0x2877b20 .concat8 [ 1 1 1 1], L_0x28776c0, L_0x28779b0, L_0x28778f0, L_0x2877a50; -L_0x2877a50 .part o0x2b287069ecc8, 14, 1; -L_0x2877e10 .reduce/or L_0x2877b20; -L_0x2877ce0 .part v0x28489c0_0, 0, 1; -L_0x2877ff0 .part v0x28489c0_0, 1, 1; -L_0x2877f00 .part v0x28489c0_0, 2, 1; -L_0x28781e0 .part v0x28489c0_0, 3, 1; -L_0x28780e0 .part v0x28493b0_0, 0, 1; -L_0x2878420 .part v0x28493b0_0, 1, 1; -L_0x2878310 .part v0x28493b0_0, 2, 1; -L_0x28785e0 .part v0x28493b0_0, 3, 1; -L_0x28784c0 .part v0x28491f0_0, 0, 1; -L_0x2878840 .part v0x28491f0_0, 1, 1; -L_0x2878710 .part v0x28491f0_0, 2, 1; -L_0x2878a20 .part v0x28491f0_0, 3, 1; -L_0x28788e0 .part v0x2849130_0, 0, 1; -L_0x2878c10 .part v0x2849130_0, 1, 1; -L_0x2878ac0 .part v0x2849130_0, 2, 1; -L_0x2878b60 .part v0x2849130_0, 3, 1; -L_0x2878cb0 .array/port v0x2847eb0, L_0x2879010; -L_0x2879010 .concat [ 4 2 0 0], v0x28450c0_0, L_0x2b28706ce210; -LS_0x2878f20_0_0 .concat8 [ 11 1 1 1], v0x28482f0_2, L_0x2878ac0, L_0x2878710, L_0x2878310; -LS_0x2878f20_0_4 .concat8 [ 1 0 0 0], L_0x2877f00; -L_0x2878f20 .concat8 [ 14 1 0 0], LS_0x2878f20_0_0, LS_0x2878f20_0_4; -LS_0x28793e0_0_0 .concat8 [ 11 1 1 1], v0x28482f0_3, L_0x2878b60, L_0x2878a20, L_0x28785e0; -LS_0x28793e0_0_4 .concat8 [ 1 0 0 0], L_0x28781e0; -L_0x28793e0 .concat8 [ 14 1 0 0], LS_0x28793e0_0_0, LS_0x28793e0_0_4; -LS_0x2879170_0_0 .concat8 [ 11 1 1 1], v0x28482f0_0, L_0x28788e0, L_0x28784c0, L_0x28780e0; -LS_0x2879170_0_4 .concat8 [ 1 0 0 0], L_0x2877ce0; -L_0x2879170 .concat8 [ 14 1 0 0], LS_0x2879170_0_0, LS_0x2879170_0_4; -LS_0x2879990_0_0 .concat8 [ 11 1 1 1], v0x28482f0_1, L_0x2878c10, L_0x2878840, L_0x2878420; -LS_0x2879990_0_4 .concat8 [ 1 0 0 0], L_0x2877ff0; -L_0x2879990 .concat8 [ 14 1 0 0], LS_0x2879990_0_0, LS_0x2879990_0_4; -L_0x2879680 .part L_0x2876d40, 14, 4; -L_0x2879da0 .part L_0x2876d40, 11, 3; -L_0x2879bb0 .part L_0x2876d40, 8, 3; -L_0x2879ff0 .part L_0x2876d40, 10, 4; -L_0x2879e40 .part L_0x2876d40, 0, 11; -S_0x28497f0 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x27b21e0; +P_0x10a77f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x10a7830 .param/str "memFile" 0 3 60, "anyWrite/down.dat"; +L_0x10d8c80 .functor BUFZ 11, v0x10a7b80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10d8e80 .functor BUFZ 11, v0x10a7b80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10d9d40 .functor BUFZ 18, L_0x10dbcb0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x10a7b80_0 .var/s "ACC", 10 0; +v0x10a7c80_0 .var/s "BAK", 10 0; +v0x10a7d60_0 .net "DST", 2 0, L_0x10dcda0; 1 drivers +v0x10a7e20_0 .net/s "IMM", 10 0, L_0x10dce40; 1 drivers +v0x10a7f00_0 .net "INST", 3 0, L_0x10dc680; 1 drivers +v0x10a7fe0_0 .net "LABEL", 3 0, L_0x10dcff0; 1 drivers +v0x10a80c0_0 .var "PC", 3 0; +v0x10a81a0_0 .var "PCNEXT", 3 0; +v0x10a8280_0 .net "SRC", 2 0, L_0x10dcbb0; 1 drivers +v0x10a83f0_0 .net *"_s103", 0 0, L_0x10daff0; 1 drivers +v0x10a84d0_0 .net *"_s107", 0 0, L_0x10daf00; 1 drivers +v0x10a85b0_0 .net *"_s111", 0 0, L_0x10db1e0; 1 drivers +v0x10a8690_0 .net *"_s115", 0 0, L_0x10db0e0; 1 drivers +v0x10a8770_0 .net *"_s119", 0 0, L_0x10db420; 1 drivers +v0x10a8850_0 .net *"_s123", 0 0, L_0x10db310; 1 drivers +v0x10a8930_0 .net *"_s127", 0 0, L_0x10db5e0; 1 drivers +v0x10a8a10_0 .net *"_s131", 0 0, L_0x10db4c0; 1 drivers +v0x10a8bc0_0 .net *"_s135", 0 0, L_0x10db840; 1 drivers +v0x10a8c60_0 .net *"_s139", 0 0, L_0x10db710; 1 drivers +v0x10a8d40_0 .net *"_s143", 0 0, L_0x10dba20; 1 drivers +v0x10a8e20_0 .net *"_s147", 0 0, L_0x10db8e0; 1 drivers +v0x10a8f00_0 .net *"_s151", 0 0, L_0x10dbc10; 1 drivers +v0x10a8fe0_0 .net *"_s155", 0 0, L_0x10dbac0; 1 drivers +v0x10a90c0_0 .net *"_s159", 0 0, L_0x10dbb60; 1 drivers +v0x10a91a0_0 .net *"_s160", 17 0, L_0x10dbcb0; 1 drivers +v0x10a9280_0 .net *"_s162", 5 0, L_0x10dc010; 1 drivers +L_0x2b8038e7d210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x10a9360_0 .net *"_s165", 1 0, L_0x2b8038e7d210; 1 drivers +v0x10ab2f0_2 .array/port v0x10ab2f0, 2; +v0x10a9440_0 .net *"_s173", 10 0, v0x10ab2f0_2; 1 drivers +v0x10ab2f0_3 .array/port v0x10ab2f0, 3; +v0x10a9520_0 .net *"_s179", 10 0, v0x10ab2f0_3; 1 drivers +v0x10ab2f0_0 .array/port v0x10ab2f0, 0; +v0x10a9600_0 .net *"_s185", 10 0, v0x10ab2f0_0; 1 drivers +v0x10ab2f0_1 .array/port v0x10ab2f0, 1; +v0x10a96e0_0 .net *"_s191", 10 0, v0x10ab2f0_1; 1 drivers +v0x10a97c0_0 .net *"_s23", 0 0, L_0x10d94d0; 1 drivers +v0x10a98a0_0 .net *"_s27", 0 0, L_0x10d95f0; 1 drivers +v0x10a8af0_0 .net *"_s31", 0 0, L_0x10d96e0; 1 drivers +v0x10a9b70_0 .net *"_s36", 0 0, L_0x10d99d0; 1 drivers +v0x10a9c50_0 .net *"_s42", 0 0, L_0x10d9c00; 1 drivers +v0x10a9d30_0 .net *"_s46", 0 0, L_0x10d9ca0; 1 drivers +v0x10a9e10_0 .net *"_s50", 0 0, L_0x10d9db0; 1 drivers +v0x10a9ef0_0 .net *"_s55", 0 0, L_0x10d9fc0; 1 drivers +v0x10a9fd0_0 .net *"_s61", 0 0, L_0x10da230; 1 drivers +v0x10aa0b0_0 .net *"_s65", 0 0, L_0x10da360; 1 drivers +v0x10aa190_0 .net *"_s69", 0 0, L_0x10da530; 1 drivers +v0x10aa270_0 .net *"_s74", 0 0, L_0x10da490; 1 drivers +v0x10aa350_0 .net *"_s80", 0 0, L_0x10da6c0; 1 drivers +v0x10aa430_0 .net *"_s84", 0 0, L_0x10da9b0; 1 drivers +v0x10aa510_0 .net *"_s88", 0 0, L_0x10da8f0; 1 drivers +v0x10aa5f0_0 .net *"_s93", 0 0, L_0x10daa50; 1 drivers +v0x10aa6d0_0 .net *"_s99", 0 0, L_0x10dace0; 1 drivers +v0x10aa7b0_0 .net/s "accOut", 10 0, L_0x10d8c80; alias, 1 drivers +v0x10aa890_0 .net "anyHasData", 0 0, L_0x10d9b10; 1 drivers +v0x10aa950_0 .net "anyReadAck", 0 0, L_0x10da850; 1 drivers +v0x10aaa10_0 .net "anyWantData", 0 0, L_0x10da0b0; 1 drivers +v0x10aaad0_0 .net "anyWriteAck", 0 0, L_0x10dae10; 1 drivers +v0x10aab90_0 .net "clk", 0 0, v0x10bcae0_0; alias, 1 drivers +o0x2b8038e4dcc8 .functor BUFZ 15, C4; HiZ drive +v0x10aac30_0 .net "down", 14 0, o0x2b8038e4dcc8; 0 drivers +v0x10aacf0_0 .net "downOut", 14 0, L_0x10dc3e0; 1 drivers +v0x10aadd0_0 .net "instruction", 17 0, L_0x10d9d40; 1 drivers +v0x10aaeb0 .array "instructions", 15 0, 17 0; +v0x10aaf70_0 .var "last", 2 0; +o0x2b8038e4dd88 .functor BUFZ 15, C4; HiZ drive +v0x10ab050_0 .net "left", 14 0, o0x2b8038e4dd88; 0 drivers +v0x10ab130_0 .net "leftOut", 14 0, L_0x10dc170; 1 drivers +v0x10ab210_0 .var "mode", 2 0; +v0x10ab2f0 .array/s "outVals", 2 5, 10 0; +v0x10ab430_0 .var "phase", 2 0; +v0x10ab510_0 .net "portsHaveData", 5 2, L_0x10d9810; 1 drivers +v0x10a9940_0 .net "portsWantData", 5 2, L_0x10d9e50; 1 drivers +v0x10a9a20_0 .net "readAckIn", 5 2, L_0x10da5d0; 1 drivers +v0x10ab9c0_0 .var "readAckOut", 5 2; +v0x10aba60_0 .var "readTarget", 2 0; +v0x10abb00_0 .var/s "readValue", 10 0; +L_0x2b8038e7d1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x10abba0 .array "regVals", 0 7; +v0x10abba0_0 .net/s v0x10abba0 0, 10 0, L_0x2b8038e7d1c8; 1 drivers +v0x10abba0_1 .net/s v0x10abba0 1, 10 0, L_0x10d8e80; 1 drivers +v0x10abba0_2 .net/s v0x10abba0 2, 10 0, L_0x10d91f0; 1 drivers +v0x10abba0_3 .net/s v0x10abba0 3, 10 0, L_0x10d9290; 1 drivers +v0x10abba0_4 .net/s v0x10abba0 4, 10 0, L_0x10d9330; 1 drivers +v0x10abba0_5 .net/s v0x10abba0 5, 10 0, L_0x10d93d0; 1 drivers +o0x2b8038e4e148 .functor BUFZ 11, C4; HiZ drive +v0x10abba0_6 .net/s v0x10abba0 6, 10 0, o0x2b8038e4e148; 0 drivers +o0x2b8038e4e178 .functor BUFZ 11, C4; HiZ drive +v0x10abba0_7 .net/s v0x10abba0 7, 10 0, o0x2b8038e4e178; 0 drivers +o0x2b8038e4e1a8 .functor BUFZ 15, C4; HiZ drive +v0x10abdb0_0 .net "right", 14 0, o0x2b8038e4e1a8; 0 drivers +v0x10abe90_0 .net "rightOut", 14 0, L_0x10dc990; 1 drivers +v0x10abf70_0 .net "up", 14 0, L_0x10e06c0; alias, 1 drivers +v0x10ac060_0 .net "upOut", 14 0, L_0x10dbf20; alias, 1 drivers +v0x10ac130_0 .var "weHaveData", 5 2; +v0x10ac1f0_0 .var "weWantData", 5 2; +v0x10ac2d0_0 .net "writeAckIn", 5 2, L_0x10dab20; 1 drivers +v0x10ac3b0_0 .var "writeAckOut", 5 2; +v0x10ac490_0 .var "writeTarget", 2 0; +v0x10ac570_0 .var/s "writeValue", 10 0; +L_0x10d91f0 .part o0x2b8038e4dd88, 0, 11; +L_0x10d9290 .part o0x2b8038e4e1a8, 0, 11; +L_0x10d9330 .part L_0x10e06c0, 0, 11; +L_0x10d93d0 .part o0x2b8038e4dcc8, 0, 11; +L_0x10d94d0 .part o0x2b8038e4dd88, 11, 1; +L_0x10d95f0 .part o0x2b8038e4e1a8, 11, 1; +L_0x10d96e0 .part L_0x10e06c0, 11, 1; +L_0x10d9810 .concat8 [ 1 1 1 1], L_0x10d94d0, L_0x10d95f0, L_0x10d96e0, L_0x10d99d0; +L_0x10d99d0 .part o0x2b8038e4dcc8, 11, 1; +L_0x10d9b10 .reduce/or L_0x10d9810; +L_0x10d9c00 .part o0x2b8038e4dd88, 12, 1; +L_0x10d9ca0 .part o0x2b8038e4e1a8, 12, 1; +L_0x10d9db0 .part L_0x10e06c0, 12, 1; +L_0x10d9e50 .concat8 [ 1 1 1 1], L_0x10d9c00, L_0x10d9ca0, L_0x10d9db0, L_0x10d9fc0; +L_0x10d9fc0 .part o0x2b8038e4dcc8, 12, 1; +L_0x10da0b0 .reduce/or L_0x10d9e50; +L_0x10da230 .part o0x2b8038e4dd88, 13, 1; +L_0x10da360 .part o0x2b8038e4e1a8, 13, 1; +L_0x10da530 .part L_0x10e06c0, 13, 1; +L_0x10da5d0 .concat8 [ 1 1 1 1], L_0x10da230, L_0x10da360, L_0x10da530, L_0x10da490; +L_0x10da490 .part o0x2b8038e4dcc8, 13, 1; +L_0x10da850 .reduce/or L_0x10da5d0; +L_0x10da6c0 .part o0x2b8038e4dd88, 14, 1; +L_0x10da9b0 .part o0x2b8038e4e1a8, 14, 1; +L_0x10da8f0 .part L_0x10e06c0, 14, 1; +L_0x10dab20 .concat8 [ 1 1 1 1], L_0x10da6c0, L_0x10da9b0, L_0x10da8f0, L_0x10daa50; +L_0x10daa50 .part o0x2b8038e4dcc8, 14, 1; +L_0x10dae10 .reduce/or L_0x10dab20; +L_0x10dace0 .part v0x10ab9c0_0, 0, 1; +L_0x10daff0 .part v0x10ab9c0_0, 1, 1; +L_0x10daf00 .part v0x10ab9c0_0, 2, 1; +L_0x10db1e0 .part v0x10ab9c0_0, 3, 1; +L_0x10db0e0 .part v0x10ac3b0_0, 0, 1; +L_0x10db420 .part v0x10ac3b0_0, 1, 1; +L_0x10db310 .part v0x10ac3b0_0, 2, 1; +L_0x10db5e0 .part v0x10ac3b0_0, 3, 1; +L_0x10db4c0 .part v0x10ac1f0_0, 0, 1; +L_0x10db840 .part v0x10ac1f0_0, 1, 1; +L_0x10db710 .part v0x10ac1f0_0, 2, 1; +L_0x10dba20 .part v0x10ac1f0_0, 3, 1; +L_0x10db8e0 .part v0x10ac130_0, 0, 1; +L_0x10dbc10 .part v0x10ac130_0, 1, 1; +L_0x10dbac0 .part v0x10ac130_0, 2, 1; +L_0x10dbb60 .part v0x10ac130_0, 3, 1; +L_0x10dbcb0 .array/port v0x10aaeb0, L_0x10dc010; +L_0x10dc010 .concat [ 4 2 0 0], v0x10a80c0_0, L_0x2b8038e7d210; +LS_0x10dbf20_0_0 .concat8 [ 11 1 1 1], v0x10ab2f0_2, L_0x10dbac0, L_0x10db710, L_0x10db310; +LS_0x10dbf20_0_4 .concat8 [ 1 0 0 0], L_0x10daf00; +L_0x10dbf20 .concat8 [ 14 1 0 0], LS_0x10dbf20_0_0, LS_0x10dbf20_0_4; +LS_0x10dc3e0_0_0 .concat8 [ 11 1 1 1], v0x10ab2f0_3, L_0x10dbb60, L_0x10dba20, L_0x10db5e0; +LS_0x10dc3e0_0_4 .concat8 [ 1 0 0 0], L_0x10db1e0; +L_0x10dc3e0 .concat8 [ 14 1 0 0], LS_0x10dc3e0_0_0, LS_0x10dc3e0_0_4; +LS_0x10dc170_0_0 .concat8 [ 11 1 1 1], v0x10ab2f0_0, L_0x10db8e0, L_0x10db4c0, L_0x10db0e0; +LS_0x10dc170_0_4 .concat8 [ 1 0 0 0], L_0x10dace0; +L_0x10dc170 .concat8 [ 14 1 0 0], LS_0x10dc170_0_0, LS_0x10dc170_0_4; +LS_0x10dc990_0_0 .concat8 [ 11 1 1 1], v0x10ab2f0_1, L_0x10dbc10, L_0x10db840, L_0x10db420; +LS_0x10dc990_0_4 .concat8 [ 1 0 0 0], L_0x10daff0; +L_0x10dc990 .concat8 [ 14 1 0 0], LS_0x10dc990_0_0, LS_0x10dc990_0_4; +L_0x10dc680 .part L_0x10d9d40, 14, 4; +L_0x10dcda0 .part L_0x10d9d40, 11, 3; +L_0x10dcbb0 .part L_0x10d9d40, 8, 3; +L_0x10dcff0 .part L_0x10d9d40, 10, 4; +L_0x10dce40 .part L_0x10d9d40, 0, 11; +S_0x10ac7f0 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x10151e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -395,175 +395,175 @@ S_0x28497f0 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x27b21e0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x28499f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x2849a30 .param/str "memFile" 0 3 60, "anyWrite/left.dat"; -L_0x2859d00 .functor BUFZ 11, v0x2849d80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2869da0 .functor BUFZ 11, v0x2849d80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x286caf0 .functor BUFZ 18, L_0x286c900, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2849d80_0 .var/s "ACC", 10 0; -v0x2849e80_0 .var/s "BAK", 10 0; -v0x2849b90_0 .net "DST", 2 0, L_0x286dad0; 1 drivers -v0x2849f60_0 .net/s "IMM", 10 0, L_0x286db70; 1 drivers -v0x284a020_0 .net "INST", 3 0, L_0x286d3b0; 1 drivers -v0x284a150_0 .net "LABEL", 3 0, L_0x286dd20; 1 drivers -v0x284a230_0 .var "PC", 3 0; -v0x284a310_0 .var "PCNEXT", 3 0; -v0x284a3f0_0 .net "SRC", 2 0, L_0x286d8e0; 1 drivers -v0x284a560_0 .net *"_s103", 0 0, L_0x286bc40; 1 drivers -v0x284a640_0 .net *"_s107", 0 0, L_0x286bb50; 1 drivers -v0x284a720_0 .net *"_s111", 0 0, L_0x286be30; 1 drivers -v0x284a800_0 .net *"_s115", 0 0, L_0x286bd30; 1 drivers -v0x284a8e0_0 .net *"_s119", 0 0, L_0x286c070; 1 drivers -v0x284a9c0_0 .net *"_s123", 0 0, L_0x286bf60; 1 drivers -v0x284aaa0_0 .net *"_s127", 0 0, L_0x286c230; 1 drivers -v0x284ab80_0 .net *"_s131", 0 0, L_0x286c110; 1 drivers -v0x284ad30_0 .net *"_s135", 0 0, L_0x286c490; 1 drivers -v0x284add0_0 .net *"_s139", 0 0, L_0x286c360; 1 drivers -v0x284aeb0_0 .net *"_s143", 0 0, L_0x286c670; 1 drivers -v0x284af90_0 .net *"_s147", 0 0, L_0x286c530; 1 drivers -v0x284b070_0 .net *"_s151", 0 0, L_0x286c860; 1 drivers -v0x284b150_0 .net *"_s155", 0 0, L_0x286c710; 1 drivers -v0x284b230_0 .net *"_s159", 0 0, L_0x286c7b0; 1 drivers -v0x284b310_0 .net *"_s160", 17 0, L_0x286c900; 1 drivers -v0x284b3f0_0 .net *"_s162", 5 0, L_0x286cc60; 1 drivers -L_0x2b28706ce060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x284b4d0_0 .net *"_s165", 1 0, L_0x2b28706ce060; 1 drivers -v0x284d480_2 .array/port v0x284d480, 2; -v0x284b5b0_0 .net *"_s173", 10 0, v0x284d480_2; 1 drivers -v0x284d480_3 .array/port v0x284d480, 3; -v0x284b690_0 .net *"_s179", 10 0, v0x284d480_3; 1 drivers -v0x284d480_0 .array/port v0x284d480, 0; -v0x284b770_0 .net *"_s185", 10 0, v0x284d480_0; 1 drivers -v0x284d480_1 .array/port v0x284d480, 1; -v0x284b850_0 .net *"_s191", 10 0, v0x284d480_1; 1 drivers -v0x284b930_0 .net *"_s23", 0 0, L_0x286a200; 1 drivers -v0x284ba10_0 .net *"_s27", 0 0, L_0x286a320; 1 drivers -v0x284ac60_0 .net *"_s31", 0 0, L_0x286a490; 1 drivers -v0x284bce0_0 .net *"_s36", 0 0, L_0x286a740; 1 drivers -v0x284bdc0_0 .net *"_s42", 0 0, L_0x286a9d0; 1 drivers -v0x284bea0_0 .net *"_s46", 0 0, L_0x286aa70; 1 drivers -v0x284bf80_0 .net *"_s50", 0 0, L_0x286ab80; 1 drivers -v0x284c060_0 .net *"_s55", 0 0, L_0x286ae10; 1 drivers -v0x284c140_0 .net *"_s61", 0 0, L_0x286aff0; 1 drivers -v0x284c220_0 .net *"_s65", 0 0, L_0x286b120; 1 drivers -v0x284c300_0 .net *"_s69", 0 0, L_0x286b1c0; 1 drivers -v0x284c3e0_0 .net *"_s74", 0 0, L_0x284dee0; 1 drivers -v0x284c4c0_0 .net *"_s80", 0 0, L_0x286b390; 1 drivers -v0x284c5a0_0 .net *"_s84", 0 0, L_0x286b630; 1 drivers -v0x284c680_0 .net *"_s88", 0 0, L_0x286b570; 1 drivers -v0x284c760_0 .net *"_s93", 0 0, L_0x286b6d0; 1 drivers -v0x284c840_0 .net *"_s99", 0 0, L_0x286b930; 1 drivers -v0x284c920_0 .net/s "accOut", 10 0, L_0x2859d00; alias, 1 drivers -v0x284ca00_0 .net "anyHasData", 0 0, L_0x286a880; 1 drivers -v0x284cac0_0 .net "anyReadAck", 0 0, L_0x286b4d0; 1 drivers -v0x284cb80_0 .net "anyWantData", 0 0, L_0x286af00; 1 drivers -v0x284cc40_0 .net "anyWriteAck", 0 0, L_0x286ba60; 1 drivers -v0x284cd00_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers -o0x2b287069fef8 .functor BUFZ 15, C4; HiZ drive -v0x284cda0_0 .net "down", 14 0, o0x2b287069fef8; 0 drivers -v0x284ce80_0 .net "downOut", 14 0, L_0x286d0d0; 1 drivers -v0x284cf60_0 .net "instruction", 17 0, L_0x286caf0; 1 drivers -v0x284d040 .array "instructions", 15 0, 17 0; -v0x284d100_0 .var "last", 2 0; -o0x2b287069ffb8 .functor BUFZ 15, C4; HiZ drive -v0x284d1e0_0 .net "left", 14 0, o0x2b287069ffb8; 0 drivers -v0x284d2c0_0 .net "leftOut", 14 0, L_0x286cdc0; 1 drivers -v0x284d3a0_0 .var "mode", 2 0; -v0x284d480 .array/s "outVals", 2 5, 10 0; -v0x284d5c0_0 .var "phase", 2 0; -v0x284d6a0_0 .net "portsHaveData", 5 2, L_0x286a530; 1 drivers -v0x284bab0_0 .net "portsWantData", 5 2, L_0x286ac20; 1 drivers -v0x284bb90_0 .net "readAckIn", 5 2, L_0x286b2f0; 1 drivers -v0x284db50_0 .var "readAckOut", 5 2; -v0x284dbf0_0 .var "readTarget", 2 0; -v0x284dcd0_0 .var/s "readValue", 10 0; -L_0x2b28706ce018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x284ddb0 .array "regVals", 0 7; -v0x284ddb0_0 .net/s v0x284ddb0 0, 10 0, L_0x2b28706ce018; 1 drivers -v0x284ddb0_1 .net/s v0x284ddb0 1, 10 0, L_0x2869da0; 1 drivers -v0x284ddb0_2 .net/s v0x284ddb0 2, 10 0, L_0x2869e60; 1 drivers -v0x284ddb0_3 .net/s v0x284ddb0 3, 10 0, L_0x2869f00; 1 drivers -v0x284ddb0_4 .net/s v0x284ddb0 4, 10 0, L_0x2869fd0; 1 drivers -v0x284ddb0_5 .net/s v0x284ddb0 5, 10 0, L_0x286a0d0; 1 drivers -o0x2b28706a0378 .functor BUFZ 11, C4; HiZ drive -v0x284ddb0_6 .net/s v0x284ddb0 6, 10 0, o0x2b28706a0378; 0 drivers -o0x2b28706a03a8 .functor BUFZ 11, C4; HiZ drive -v0x284ddb0_7 .net/s v0x284ddb0 7, 10 0, o0x2b28706a03a8; 0 drivers -v0x284dfc0_0 .net "right", 14 0, L_0x287d3e0; alias, 1 drivers -v0x284e0b0_0 .net "rightOut", 14 0, L_0x286d6c0; alias, 1 drivers -o0x2b28706a03d8 .functor BUFZ 15, C4; HiZ drive -v0x284e180_0 .net "up", 14 0, o0x2b28706a03d8; 0 drivers -v0x284e240_0 .net "upOut", 14 0, L_0x286ce80; 1 drivers -v0x284e320_0 .var "weHaveData", 5 2; -v0x284e400_0 .var "weWantData", 5 2; -v0x284e4e0_0 .net "writeAckIn", 5 2, L_0x286b7a0; 1 drivers -v0x284e5c0_0 .var "writeAckOut", 5 2; -v0x284e6a0_0 .var "writeTarget", 2 0; -v0x284e780_0 .var/s "writeValue", 10 0; -L_0x2869e60 .part o0x2b287069ffb8, 0, 11; -L_0x2869f00 .part L_0x287d3e0, 0, 11; -L_0x2869fd0 .part o0x2b28706a03d8, 0, 11; -L_0x286a0d0 .part o0x2b287069fef8, 0, 11; -L_0x286a200 .part o0x2b287069ffb8, 11, 1; -L_0x286a320 .part L_0x287d3e0, 11, 1; -L_0x286a490 .part o0x2b28706a03d8, 11, 1; -L_0x286a530 .concat8 [ 1 1 1 1], L_0x286a200, L_0x286a320, L_0x286a490, L_0x286a740; -L_0x286a740 .part o0x2b287069fef8, 11, 1; -L_0x286a880 .reduce/or L_0x286a530; -L_0x286a9d0 .part o0x2b287069ffb8, 12, 1; -L_0x286aa70 .part L_0x287d3e0, 12, 1; -L_0x286ab80 .part o0x2b28706a03d8, 12, 1; -L_0x286ac20 .concat8 [ 1 1 1 1], L_0x286a9d0, L_0x286aa70, L_0x286ab80, L_0x286ae10; -L_0x286ae10 .part o0x2b287069fef8, 12, 1; -L_0x286af00 .reduce/or L_0x286ac20; -L_0x286aff0 .part o0x2b287069ffb8, 13, 1; -L_0x286b120 .part L_0x287d3e0, 13, 1; -L_0x286b1c0 .part o0x2b28706a03d8, 13, 1; -L_0x286b2f0 .concat8 [ 1 1 1 1], L_0x286aff0, L_0x286b120, L_0x286b1c0, L_0x284dee0; -L_0x284dee0 .part o0x2b287069fef8, 13, 1; -L_0x286b4d0 .reduce/or L_0x286b2f0; -L_0x286b390 .part o0x2b287069ffb8, 14, 1; -L_0x286b630 .part L_0x287d3e0, 14, 1; -L_0x286b570 .part o0x2b28706a03d8, 14, 1; -L_0x286b7a0 .concat8 [ 1 1 1 1], L_0x286b390, L_0x286b630, L_0x286b570, L_0x286b6d0; -L_0x286b6d0 .part o0x2b287069fef8, 14, 1; -L_0x286ba60 .reduce/or L_0x286b7a0; -L_0x286b930 .part v0x284db50_0, 0, 1; -L_0x286bc40 .part v0x284db50_0, 1, 1; -L_0x286bb50 .part v0x284db50_0, 2, 1; -L_0x286be30 .part v0x284db50_0, 3, 1; -L_0x286bd30 .part v0x284e5c0_0, 0, 1; -L_0x286c070 .part v0x284e5c0_0, 1, 1; -L_0x286bf60 .part v0x284e5c0_0, 2, 1; -L_0x286c230 .part v0x284e5c0_0, 3, 1; -L_0x286c110 .part v0x284e400_0, 0, 1; -L_0x286c490 .part v0x284e400_0, 1, 1; -L_0x286c360 .part v0x284e400_0, 2, 1; -L_0x286c670 .part v0x284e400_0, 3, 1; -L_0x286c530 .part v0x284e320_0, 0, 1; -L_0x286c860 .part v0x284e320_0, 1, 1; -L_0x286c710 .part v0x284e320_0, 2, 1; -L_0x286c7b0 .part v0x284e320_0, 3, 1; -L_0x286c900 .array/port v0x284d040, L_0x286cc60; -L_0x286cc60 .concat [ 4 2 0 0], v0x284a230_0, L_0x2b28706ce060; -LS_0x286ce80_0_0 .concat8 [ 11 1 1 1], v0x284d480_2, L_0x286c710, L_0x286c360, L_0x286bf60; -LS_0x286ce80_0_4 .concat8 [ 1 0 0 0], L_0x286bb50; -L_0x286ce80 .concat8 [ 14 1 0 0], LS_0x286ce80_0_0, LS_0x286ce80_0_4; -LS_0x286d0d0_0_0 .concat8 [ 11 1 1 1], v0x284d480_3, L_0x286c7b0, L_0x286c670, L_0x286c230; -LS_0x286d0d0_0_4 .concat8 [ 1 0 0 0], L_0x286be30; -L_0x286d0d0 .concat8 [ 14 1 0 0], LS_0x286d0d0_0_0, LS_0x286d0d0_0_4; -LS_0x286cdc0_0_0 .concat8 [ 11 1 1 1], v0x284d480_0, L_0x286c530, L_0x286c110, L_0x286bd30; -LS_0x286cdc0_0_4 .concat8 [ 1 0 0 0], L_0x286b930; -L_0x286cdc0 .concat8 [ 14 1 0 0], LS_0x286cdc0_0_0, LS_0x286cdc0_0_4; -LS_0x286d6c0_0_0 .concat8 [ 11 1 1 1], v0x284d480_1, L_0x286c860, L_0x286c490, L_0x286c070; -LS_0x286d6c0_0_4 .concat8 [ 1 0 0 0], L_0x286bc40; -L_0x286d6c0 .concat8 [ 14 1 0 0], LS_0x286d6c0_0_0, LS_0x286d6c0_0_4; -L_0x286d3b0 .part L_0x286caf0, 14, 4; -L_0x286dad0 .part L_0x286caf0, 11, 3; -L_0x286d8e0 .part L_0x286caf0, 8, 3; -L_0x286dd20 .part L_0x286caf0, 10, 4; -L_0x286db70 .part L_0x286caf0, 0, 11; -S_0x284ea00 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x27b21e0; +P_0x10ac9f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x10aca30 .param/str "memFile" 0 3 60, "anyWrite/left.dat"; +L_0x10bcd00 .functor BUFZ 11, v0x10acd80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10ccda0 .functor BUFZ 11, v0x10acd80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10cfaf0 .functor BUFZ 18, L_0x10cf900, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x10acd80_0 .var/s "ACC", 10 0; +v0x10ace80_0 .var/s "BAK", 10 0; +v0x10acb90_0 .net "DST", 2 0, L_0x10d0ad0; 1 drivers +v0x10acf60_0 .net/s "IMM", 10 0, L_0x10d0b70; 1 drivers +v0x10ad020_0 .net "INST", 3 0, L_0x10d03b0; 1 drivers +v0x10ad150_0 .net "LABEL", 3 0, L_0x10d0d20; 1 drivers +v0x10ad230_0 .var "PC", 3 0; +v0x10ad310_0 .var "PCNEXT", 3 0; +v0x10ad3f0_0 .net "SRC", 2 0, L_0x10d08e0; 1 drivers +v0x10ad560_0 .net *"_s103", 0 0, L_0x10cec40; 1 drivers +v0x10ad640_0 .net *"_s107", 0 0, L_0x10ceb50; 1 drivers +v0x10ad720_0 .net *"_s111", 0 0, L_0x10cee30; 1 drivers +v0x10ad800_0 .net *"_s115", 0 0, L_0x10ced30; 1 drivers +v0x10ad8e0_0 .net *"_s119", 0 0, L_0x10cf070; 1 drivers +v0x10ad9c0_0 .net *"_s123", 0 0, L_0x10cef60; 1 drivers +v0x10adaa0_0 .net *"_s127", 0 0, L_0x10cf230; 1 drivers +v0x10adb80_0 .net *"_s131", 0 0, L_0x10cf110; 1 drivers +v0x10add30_0 .net *"_s135", 0 0, L_0x10cf490; 1 drivers +v0x10addd0_0 .net *"_s139", 0 0, L_0x10cf360; 1 drivers +v0x10adeb0_0 .net *"_s143", 0 0, L_0x10cf670; 1 drivers +v0x10adf90_0 .net *"_s147", 0 0, L_0x10cf530; 1 drivers +v0x10ae070_0 .net *"_s151", 0 0, L_0x10cf860; 1 drivers +v0x10ae150_0 .net *"_s155", 0 0, L_0x10cf710; 1 drivers +v0x10ae230_0 .net *"_s159", 0 0, L_0x10cf7b0; 1 drivers +v0x10ae310_0 .net *"_s160", 17 0, L_0x10cf900; 1 drivers +v0x10ae3f0_0 .net *"_s162", 5 0, L_0x10cfc60; 1 drivers +L_0x2b8038e7d060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x10ae4d0_0 .net *"_s165", 1 0, L_0x2b8038e7d060; 1 drivers +v0x10b0480_2 .array/port v0x10b0480, 2; +v0x10ae5b0_0 .net *"_s173", 10 0, v0x10b0480_2; 1 drivers +v0x10b0480_3 .array/port v0x10b0480, 3; +v0x10ae690_0 .net *"_s179", 10 0, v0x10b0480_3; 1 drivers +v0x10b0480_0 .array/port v0x10b0480, 0; +v0x10ae770_0 .net *"_s185", 10 0, v0x10b0480_0; 1 drivers +v0x10b0480_1 .array/port v0x10b0480, 1; +v0x10ae850_0 .net *"_s191", 10 0, v0x10b0480_1; 1 drivers +v0x10ae930_0 .net *"_s23", 0 0, L_0x10cd200; 1 drivers +v0x10aea10_0 .net *"_s27", 0 0, L_0x10cd320; 1 drivers +v0x10adc60_0 .net *"_s31", 0 0, L_0x10cd490; 1 drivers +v0x10aece0_0 .net *"_s36", 0 0, L_0x10cd740; 1 drivers +v0x10aedc0_0 .net *"_s42", 0 0, L_0x10cd9d0; 1 drivers +v0x10aeea0_0 .net *"_s46", 0 0, L_0x10cda70; 1 drivers +v0x10aef80_0 .net *"_s50", 0 0, L_0x10cdb80; 1 drivers +v0x10af060_0 .net *"_s55", 0 0, L_0x10cde10; 1 drivers +v0x10af140_0 .net *"_s61", 0 0, L_0x10cdff0; 1 drivers +v0x10af220_0 .net *"_s65", 0 0, L_0x10ce120; 1 drivers +v0x10af300_0 .net *"_s69", 0 0, L_0x10ce1c0; 1 drivers +v0x10af3e0_0 .net *"_s74", 0 0, L_0x10b0ee0; 1 drivers +v0x10af4c0_0 .net *"_s80", 0 0, L_0x10ce390; 1 drivers +v0x10af5a0_0 .net *"_s84", 0 0, L_0x10ce630; 1 drivers +v0x10af680_0 .net *"_s88", 0 0, L_0x10ce570; 1 drivers +v0x10af760_0 .net *"_s93", 0 0, L_0x10ce6d0; 1 drivers +v0x10af840_0 .net *"_s99", 0 0, L_0x10ce930; 1 drivers +v0x10af920_0 .net/s "accOut", 10 0, L_0x10bcd00; alias, 1 drivers +v0x10afa00_0 .net "anyHasData", 0 0, L_0x10cd880; 1 drivers +v0x10afac0_0 .net "anyReadAck", 0 0, L_0x10ce4d0; 1 drivers +v0x10afb80_0 .net "anyWantData", 0 0, L_0x10cdf00; 1 drivers +v0x10afc40_0 .net "anyWriteAck", 0 0, L_0x10cea60; 1 drivers +v0x10afd00_0 .net "clk", 0 0, v0x10bcae0_0; alias, 1 drivers +o0x2b8038e4eef8 .functor BUFZ 15, C4; HiZ drive +v0x10afda0_0 .net "down", 14 0, o0x2b8038e4eef8; 0 drivers +v0x10afe80_0 .net "downOut", 14 0, L_0x10d00d0; 1 drivers +v0x10aff60_0 .net "instruction", 17 0, L_0x10cfaf0; 1 drivers +v0x10b0040 .array "instructions", 15 0, 17 0; +v0x10b0100_0 .var "last", 2 0; +o0x2b8038e4efb8 .functor BUFZ 15, C4; HiZ drive +v0x10b01e0_0 .net "left", 14 0, o0x2b8038e4efb8; 0 drivers +v0x10b02c0_0 .net "leftOut", 14 0, L_0x10cfdc0; 1 drivers +v0x10b03a0_0 .var "mode", 2 0; +v0x10b0480 .array/s "outVals", 2 5, 10 0; +v0x10b05c0_0 .var "phase", 2 0; +v0x10b06a0_0 .net "portsHaveData", 5 2, L_0x10cd530; 1 drivers +v0x10aeab0_0 .net "portsWantData", 5 2, L_0x10cdc20; 1 drivers +v0x10aeb90_0 .net "readAckIn", 5 2, L_0x10ce2f0; 1 drivers +v0x10b0b50_0 .var "readAckOut", 5 2; +v0x10b0bf0_0 .var "readTarget", 2 0; +v0x10b0cd0_0 .var/s "readValue", 10 0; +L_0x2b8038e7d018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x10b0db0 .array "regVals", 0 7; +v0x10b0db0_0 .net/s v0x10b0db0 0, 10 0, L_0x2b8038e7d018; 1 drivers +v0x10b0db0_1 .net/s v0x10b0db0 1, 10 0, L_0x10ccda0; 1 drivers +v0x10b0db0_2 .net/s v0x10b0db0 2, 10 0, L_0x10cce60; 1 drivers +v0x10b0db0_3 .net/s v0x10b0db0 3, 10 0, L_0x10ccf00; 1 drivers +v0x10b0db0_4 .net/s v0x10b0db0 4, 10 0, L_0x10ccfd0; 1 drivers +v0x10b0db0_5 .net/s v0x10b0db0 5, 10 0, L_0x10cd0d0; 1 drivers +o0x2b8038e4f378 .functor BUFZ 11, C4; HiZ drive +v0x10b0db0_6 .net/s v0x10b0db0 6, 10 0, o0x2b8038e4f378; 0 drivers +o0x2b8038e4f3a8 .functor BUFZ 11, C4; HiZ drive +v0x10b0db0_7 .net/s v0x10b0db0 7, 10 0, o0x2b8038e4f3a8; 0 drivers +v0x10b0fc0_0 .net "right", 14 0, L_0x10e03e0; alias, 1 drivers +v0x10b10b0_0 .net "rightOut", 14 0, L_0x10d06c0; alias, 1 drivers +o0x2b8038e4f3d8 .functor BUFZ 15, C4; HiZ drive +v0x10b1180_0 .net "up", 14 0, o0x2b8038e4f3d8; 0 drivers +v0x10b1240_0 .net "upOut", 14 0, L_0x10cfe80; 1 drivers +v0x10b1320_0 .var "weHaveData", 5 2; +v0x10b1400_0 .var "weWantData", 5 2; +v0x10b14e0_0 .net "writeAckIn", 5 2, L_0x10ce7a0; 1 drivers +v0x10b15c0_0 .var "writeAckOut", 5 2; +v0x10b16a0_0 .var "writeTarget", 2 0; +v0x10b1780_0 .var/s "writeValue", 10 0; +L_0x10cce60 .part o0x2b8038e4efb8, 0, 11; +L_0x10ccf00 .part L_0x10e03e0, 0, 11; +L_0x10ccfd0 .part o0x2b8038e4f3d8, 0, 11; +L_0x10cd0d0 .part o0x2b8038e4eef8, 0, 11; +L_0x10cd200 .part o0x2b8038e4efb8, 11, 1; +L_0x10cd320 .part L_0x10e03e0, 11, 1; +L_0x10cd490 .part o0x2b8038e4f3d8, 11, 1; +L_0x10cd530 .concat8 [ 1 1 1 1], L_0x10cd200, L_0x10cd320, L_0x10cd490, L_0x10cd740; +L_0x10cd740 .part o0x2b8038e4eef8, 11, 1; +L_0x10cd880 .reduce/or L_0x10cd530; +L_0x10cd9d0 .part o0x2b8038e4efb8, 12, 1; +L_0x10cda70 .part L_0x10e03e0, 12, 1; +L_0x10cdb80 .part o0x2b8038e4f3d8, 12, 1; +L_0x10cdc20 .concat8 [ 1 1 1 1], L_0x10cd9d0, L_0x10cda70, L_0x10cdb80, L_0x10cde10; +L_0x10cde10 .part o0x2b8038e4eef8, 12, 1; +L_0x10cdf00 .reduce/or L_0x10cdc20; +L_0x10cdff0 .part o0x2b8038e4efb8, 13, 1; +L_0x10ce120 .part L_0x10e03e0, 13, 1; +L_0x10ce1c0 .part o0x2b8038e4f3d8, 13, 1; +L_0x10ce2f0 .concat8 [ 1 1 1 1], L_0x10cdff0, L_0x10ce120, L_0x10ce1c0, L_0x10b0ee0; +L_0x10b0ee0 .part o0x2b8038e4eef8, 13, 1; +L_0x10ce4d0 .reduce/or L_0x10ce2f0; +L_0x10ce390 .part o0x2b8038e4efb8, 14, 1; +L_0x10ce630 .part L_0x10e03e0, 14, 1; +L_0x10ce570 .part o0x2b8038e4f3d8, 14, 1; +L_0x10ce7a0 .concat8 [ 1 1 1 1], L_0x10ce390, L_0x10ce630, L_0x10ce570, L_0x10ce6d0; +L_0x10ce6d0 .part o0x2b8038e4eef8, 14, 1; +L_0x10cea60 .reduce/or L_0x10ce7a0; +L_0x10ce930 .part v0x10b0b50_0, 0, 1; +L_0x10cec40 .part v0x10b0b50_0, 1, 1; +L_0x10ceb50 .part v0x10b0b50_0, 2, 1; +L_0x10cee30 .part v0x10b0b50_0, 3, 1; +L_0x10ced30 .part v0x10b15c0_0, 0, 1; +L_0x10cf070 .part v0x10b15c0_0, 1, 1; +L_0x10cef60 .part v0x10b15c0_0, 2, 1; +L_0x10cf230 .part v0x10b15c0_0, 3, 1; +L_0x10cf110 .part v0x10b1400_0, 0, 1; +L_0x10cf490 .part v0x10b1400_0, 1, 1; +L_0x10cf360 .part v0x10b1400_0, 2, 1; +L_0x10cf670 .part v0x10b1400_0, 3, 1; +L_0x10cf530 .part v0x10b1320_0, 0, 1; +L_0x10cf860 .part v0x10b1320_0, 1, 1; +L_0x10cf710 .part v0x10b1320_0, 2, 1; +L_0x10cf7b0 .part v0x10b1320_0, 3, 1; +L_0x10cf900 .array/port v0x10b0040, L_0x10cfc60; +L_0x10cfc60 .concat [ 4 2 0 0], v0x10ad230_0, L_0x2b8038e7d060; +LS_0x10cfe80_0_0 .concat8 [ 11 1 1 1], v0x10b0480_2, L_0x10cf710, L_0x10cf360, L_0x10cef60; +LS_0x10cfe80_0_4 .concat8 [ 1 0 0 0], L_0x10ceb50; +L_0x10cfe80 .concat8 [ 14 1 0 0], LS_0x10cfe80_0_0, LS_0x10cfe80_0_4; +LS_0x10d00d0_0_0 .concat8 [ 11 1 1 1], v0x10b0480_3, L_0x10cf7b0, L_0x10cf670, L_0x10cf230; +LS_0x10d00d0_0_4 .concat8 [ 1 0 0 0], L_0x10cee30; +L_0x10d00d0 .concat8 [ 14 1 0 0], LS_0x10d00d0_0_0, LS_0x10d00d0_0_4; +LS_0x10cfdc0_0_0 .concat8 [ 11 1 1 1], v0x10b0480_0, L_0x10cf530, L_0x10cf110, L_0x10ced30; +LS_0x10cfdc0_0_4 .concat8 [ 1 0 0 0], L_0x10ce930; +L_0x10cfdc0 .concat8 [ 14 1 0 0], LS_0x10cfdc0_0_0, LS_0x10cfdc0_0_4; +LS_0x10d06c0_0_0 .concat8 [ 11 1 1 1], v0x10b0480_1, L_0x10cf860, L_0x10cf490, L_0x10cf070; +LS_0x10d06c0_0_4 .concat8 [ 1 0 0 0], L_0x10cec40; +L_0x10d06c0 .concat8 [ 14 1 0 0], LS_0x10d06c0_0_0, LS_0x10d06c0_0_4; +L_0x10d03b0 .part L_0x10cfaf0, 14, 4; +L_0x10d0ad0 .part L_0x10cfaf0, 11, 3; +L_0x10d08e0 .part L_0x10cfaf0, 8, 3; +L_0x10d0d20 .part L_0x10cfaf0, 10, 4; +L_0x10d0b70 .part L_0x10cfaf0, 0, 11; +S_0x10b1a00 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x10151e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -575,175 +575,175 @@ S_0x284ea00 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x27b21e0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x284ebd0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x284ec10 .param/str "memFile" 0 3 60, "anyWrite/right.dat"; -L_0x286da10 .functor BUFZ 11, v0x284ef80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x286dc10 .functor BUFZ 11, v0x284ef80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x286eb60 .functor BUFZ 18, L_0x2870b50, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x284ef80_0 .var/s "ACC", 10 0; -v0x284f080_0 .var/s "BAK", 10 0; -v0x284f160_0 .net "DST", 2 0, L_0x2871c90; 1 drivers -v0x284f220_0 .net/s "IMM", 10 0, L_0x2871d30; 1 drivers -v0x284f300_0 .net "INST", 3 0, L_0x2871570; 1 drivers -v0x284f3e0_0 .net "LABEL", 3 0, L_0x2871ee0; 1 drivers -v0x284f4c0_0 .var "PC", 3 0; -v0x284f5a0_0 .var "PCNEXT", 3 0; -v0x284f680_0 .net "SRC", 2 0, L_0x2871aa0; 1 drivers -v0x284f7f0_0 .net *"_s103", 0 0, L_0x286fe90; 1 drivers -v0x284f8d0_0 .net *"_s107", 0 0, L_0x286fda0; 1 drivers -v0x284f9b0_0 .net *"_s111", 0 0, L_0x2870080; 1 drivers -v0x284fa90_0 .net *"_s115", 0 0, L_0x286ff80; 1 drivers -v0x284fb70_0 .net *"_s119", 0 0, L_0x28702c0; 1 drivers -v0x284fc50_0 .net *"_s123", 0 0, L_0x28701b0; 1 drivers -v0x284fd30_0 .net *"_s127", 0 0, L_0x2870480; 1 drivers -v0x284fe10_0 .net *"_s131", 0 0, L_0x2870360; 1 drivers -v0x284ffc0_0 .net *"_s135", 0 0, L_0x28706e0; 1 drivers -v0x2850060_0 .net *"_s139", 0 0, L_0x28705b0; 1 drivers -v0x2850140_0 .net *"_s143", 0 0, L_0x28708c0; 1 drivers -v0x2850220_0 .net *"_s147", 0 0, L_0x2870780; 1 drivers -v0x2850300_0 .net *"_s151", 0 0, L_0x2870ab0; 1 drivers -v0x28503e0_0 .net *"_s155", 0 0, L_0x2870960; 1 drivers -v0x28504c0_0 .net *"_s159", 0 0, L_0x2870a00; 1 drivers -v0x28505a0_0 .net *"_s160", 17 0, L_0x2870b50; 1 drivers -v0x2850680_0 .net *"_s162", 5 0, L_0x2870eb0; 1 drivers -L_0x2b28706ce0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x2850760_0 .net *"_s165", 1 0, L_0x2b28706ce0f0; 1 drivers -v0x2852690_2 .array/port v0x2852690, 2; -v0x2850840_0 .net *"_s173", 10 0, v0x2852690_2; 1 drivers -v0x2852690_3 .array/port v0x2852690, 3; -v0x2850920_0 .net *"_s179", 10 0, v0x2852690_3; 1 drivers -v0x2852690_0 .array/port v0x2852690, 0; -v0x2850a00_0 .net *"_s185", 10 0, v0x2852690_0; 1 drivers -v0x2852690_1 .array/port v0x2852690, 1; -v0x2850ae0_0 .net *"_s191", 10 0, v0x2852690_1; 1 drivers -v0x2850bc0_0 .net *"_s23", 0 0, L_0x286e290; 1 drivers -v0x2850ca0_0 .net *"_s27", 0 0, L_0x286e3f0; 1 drivers -v0x284fef0_0 .net *"_s31", 0 0, L_0x286e4c0; 1 drivers -v0x2850f70_0 .net *"_s36", 0 0, L_0x286e790; 1 drivers -v0x2851050_0 .net *"_s42", 0 0, L_0x286ea20; 1 drivers -v0x2851130_0 .net *"_s46", 0 0, L_0x286eac0; 1 drivers -v0x2851210_0 .net *"_s50", 0 0, L_0x286ebd0; 1 drivers -v0x28512f0_0 .net *"_s55", 0 0, L_0x286ee60; 1 drivers -v0x28513d0_0 .net *"_s61", 0 0, L_0x286f0d0; 1 drivers -v0x28514b0_0 .net *"_s65", 0 0, L_0x286f170; 1 drivers -v0x2851590_0 .net *"_s69", 0 0, L_0x286f340; 1 drivers -v0x2851670_0 .net *"_s74", 0 0, L_0x286f2a0; 1 drivers -v0x2851750_0 .net *"_s80", 0 0, L_0x286f530; 1 drivers -v0x2851830_0 .net *"_s84", 0 0, L_0x286f820; 1 drivers -v0x2851910_0 .net *"_s88", 0 0, L_0x286f760; 1 drivers -v0x28519f0_0 .net *"_s93", 0 0, L_0x286f8c0; 1 drivers -v0x2851ad0_0 .net *"_s99", 0 0, L_0x286fb80; 1 drivers -v0x2851bb0_0 .net/s "accOut", 10 0, L_0x286da10; alias, 1 drivers -v0x2851c90_0 .net "anyHasData", 0 0, L_0x286e8d0; 1 drivers -v0x2851d50_0 .net "anyReadAck", 0 0, L_0x286f6c0; 1 drivers -v0x2851e10_0 .net "anyWantData", 0 0, L_0x286ef50; 1 drivers -v0x2851ed0_0 .net "anyWriteAck", 0 0, L_0x286fcb0; 1 drivers -v0x2851f90_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers -o0x2b28706a1128 .functor BUFZ 15, C4; HiZ drive -v0x2852030_0 .net "down", 14 0, o0x2b28706a1128; 0 drivers -v0x2852110_0 .net "downOut", 14 0, L_0x28712d0; 1 drivers -v0x28521f0_0 .net "instruction", 17 0, L_0x286eb60; 1 drivers -v0x28522d0 .array "instructions", 15 0, 17 0; -v0x2852390_0 .var "last", 2 0; -v0x2852470_0 .net "left", 14 0, L_0x287ddb0; alias, 1 drivers -v0x2852530_0 .net "leftOut", 14 0, L_0x2871010; alias, 1 drivers -v0x28525d0_0 .var "mode", 2 0; -v0x2852690 .array/s "outVals", 2 5, 10 0; -v0x2852800_0 .var "phase", 2 0; -v0x28528e0_0 .net "portsHaveData", 5 2, L_0x286e5b0; 1 drivers -v0x2850d40_0 .net "portsWantData", 5 2, L_0x286ec70; 1 drivers -v0x2850e20_0 .net "readAckIn", 5 2, L_0x286f3e0; 1 drivers -v0x2852d90_0 .var "readAckOut", 5 2; -v0x2852e30_0 .var "readTarget", 2 0; -v0x2852ed0_0 .var/s "readValue", 10 0; -L_0x2b28706ce0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x2852f70 .array "regVals", 0 7; -v0x2852f70_0 .net/s v0x2852f70 0, 10 0, L_0x2b28706ce0a8; 1 drivers -v0x2852f70_1 .net/s v0x2852f70 1, 10 0, L_0x286dc10; 1 drivers -v0x2852f70_2 .net/s v0x2852f70 2, 10 0, L_0x286df80; 1 drivers -v0x2852f70_3 .net/s v0x2852f70 3, 10 0, L_0x286e020; 1 drivers -v0x2852f70_4 .net/s v0x2852f70 4, 10 0, L_0x286e0c0; 1 drivers -v0x2852f70_5 .net/s v0x2852f70 5, 10 0, L_0x286e160; 1 drivers -o0x2b28706a1548 .functor BUFZ 11, C4; HiZ drive -v0x2852f70_6 .net/s v0x2852f70 6, 10 0, o0x2b28706a1548; 0 drivers -o0x2b28706a1578 .functor BUFZ 11, C4; HiZ drive -v0x2852f70_7 .net/s v0x2852f70 7, 10 0, o0x2b28706a1578; 0 drivers -o0x2b28706a15a8 .functor BUFZ 15, C4; HiZ drive -v0x2853180_0 .net "right", 14 0, o0x2b28706a15a8; 0 drivers -v0x2853260_0 .net "rightOut", 14 0, L_0x2871880; 1 drivers -o0x2b28706a1608 .functor BUFZ 15, C4; HiZ drive -v0x2853340_0 .net "up", 14 0, o0x2b28706a1608; 0 drivers -v0x2853420_0 .net "upOut", 14 0, L_0x2870dc0; 1 drivers -v0x2853500_0 .var "weHaveData", 5 2; -v0x28535e0_0 .var "weWantData", 5 2; -v0x28536c0_0 .net "writeAckIn", 5 2, L_0x286f990; 1 drivers -v0x28537a0_0 .var "writeAckOut", 5 2; -v0x2853880_0 .var "writeTarget", 2 0; -v0x2853960_0 .var/s "writeValue", 10 0; -L_0x286df80 .part L_0x287ddb0, 0, 11; -L_0x286e020 .part o0x2b28706a15a8, 0, 11; -L_0x286e0c0 .part o0x2b28706a1608, 0, 11; -L_0x286e160 .part o0x2b28706a1128, 0, 11; -L_0x286e290 .part L_0x287ddb0, 11, 1; -L_0x286e3f0 .part o0x2b28706a15a8, 11, 1; -L_0x286e4c0 .part o0x2b28706a1608, 11, 1; -L_0x286e5b0 .concat8 [ 1 1 1 1], L_0x286e290, L_0x286e3f0, L_0x286e4c0, L_0x286e790; -L_0x286e790 .part o0x2b28706a1128, 11, 1; -L_0x286e8d0 .reduce/or L_0x286e5b0; -L_0x286ea20 .part L_0x287ddb0, 12, 1; -L_0x286eac0 .part o0x2b28706a15a8, 12, 1; -L_0x286ebd0 .part o0x2b28706a1608, 12, 1; -L_0x286ec70 .concat8 [ 1 1 1 1], L_0x286ea20, L_0x286eac0, L_0x286ebd0, L_0x286ee60; -L_0x286ee60 .part o0x2b28706a1128, 12, 1; -L_0x286ef50 .reduce/or L_0x286ec70; -L_0x286f0d0 .part L_0x287ddb0, 13, 1; -L_0x286f170 .part o0x2b28706a15a8, 13, 1; -L_0x286f340 .part o0x2b28706a1608, 13, 1; -L_0x286f3e0 .concat8 [ 1 1 1 1], L_0x286f0d0, L_0x286f170, L_0x286f340, L_0x286f2a0; -L_0x286f2a0 .part o0x2b28706a1128, 13, 1; -L_0x286f6c0 .reduce/or L_0x286f3e0; -L_0x286f530 .part L_0x287ddb0, 14, 1; -L_0x286f820 .part o0x2b28706a15a8, 14, 1; -L_0x286f760 .part o0x2b28706a1608, 14, 1; -L_0x286f990 .concat8 [ 1 1 1 1], L_0x286f530, L_0x286f820, L_0x286f760, L_0x286f8c0; -L_0x286f8c0 .part o0x2b28706a1128, 14, 1; -L_0x286fcb0 .reduce/or L_0x286f990; -L_0x286fb80 .part v0x2852d90_0, 0, 1; -L_0x286fe90 .part v0x2852d90_0, 1, 1; -L_0x286fda0 .part v0x2852d90_0, 2, 1; -L_0x2870080 .part v0x2852d90_0, 3, 1; -L_0x286ff80 .part v0x28537a0_0, 0, 1; -L_0x28702c0 .part v0x28537a0_0, 1, 1; -L_0x28701b0 .part v0x28537a0_0, 2, 1; -L_0x2870480 .part v0x28537a0_0, 3, 1; -L_0x2870360 .part v0x28535e0_0, 0, 1; -L_0x28706e0 .part v0x28535e0_0, 1, 1; -L_0x28705b0 .part v0x28535e0_0, 2, 1; -L_0x28708c0 .part v0x28535e0_0, 3, 1; -L_0x2870780 .part v0x2853500_0, 0, 1; -L_0x2870ab0 .part v0x2853500_0, 1, 1; -L_0x2870960 .part v0x2853500_0, 2, 1; -L_0x2870a00 .part v0x2853500_0, 3, 1; -L_0x2870b50 .array/port v0x28522d0, L_0x2870eb0; -L_0x2870eb0 .concat [ 4 2 0 0], v0x284f4c0_0, L_0x2b28706ce0f0; -LS_0x2870dc0_0_0 .concat8 [ 11 1 1 1], v0x2852690_2, L_0x2870960, L_0x28705b0, L_0x28701b0; -LS_0x2870dc0_0_4 .concat8 [ 1 0 0 0], L_0x286fda0; -L_0x2870dc0 .concat8 [ 14 1 0 0], LS_0x2870dc0_0_0, LS_0x2870dc0_0_4; -LS_0x28712d0_0_0 .concat8 [ 11 1 1 1], v0x2852690_3, L_0x2870a00, L_0x28708c0, L_0x2870480; -LS_0x28712d0_0_4 .concat8 [ 1 0 0 0], L_0x2870080; -L_0x28712d0 .concat8 [ 14 1 0 0], LS_0x28712d0_0_0, LS_0x28712d0_0_4; -LS_0x2871010_0_0 .concat8 [ 11 1 1 1], v0x2852690_0, L_0x2870780, L_0x2870360, L_0x286ff80; -LS_0x2871010_0_4 .concat8 [ 1 0 0 0], L_0x286fb80; -L_0x2871010 .concat8 [ 14 1 0 0], LS_0x2871010_0_0, LS_0x2871010_0_4; -LS_0x2871880_0_0 .concat8 [ 11 1 1 1], v0x2852690_1, L_0x2870ab0, L_0x28706e0, L_0x28702c0; -LS_0x2871880_0_4 .concat8 [ 1 0 0 0], L_0x286fe90; -L_0x2871880 .concat8 [ 14 1 0 0], LS_0x2871880_0_0, LS_0x2871880_0_4; -L_0x2871570 .part L_0x286eb60, 14, 4; -L_0x2871c90 .part L_0x286eb60, 11, 3; -L_0x2871aa0 .part L_0x286eb60, 8, 3; -L_0x2871ee0 .part L_0x286eb60, 10, 4; -L_0x2871d30 .part L_0x286eb60, 0, 11; -S_0x2853be0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x27b21e0; +P_0x10b1bd0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x10b1c10 .param/str "memFile" 0 3 60, "anyWrite/right.dat"; +L_0x10d0a10 .functor BUFZ 11, v0x10b1f80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10d0c10 .functor BUFZ 11, v0x10b1f80_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10d1b60 .functor BUFZ 18, L_0x10d3b50, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x10b1f80_0 .var/s "ACC", 10 0; +v0x10b2080_0 .var/s "BAK", 10 0; +v0x10b2160_0 .net "DST", 2 0, L_0x10d4c90; 1 drivers +v0x10b2220_0 .net/s "IMM", 10 0, L_0x10d4d30; 1 drivers +v0x10b2300_0 .net "INST", 3 0, L_0x10d4570; 1 drivers +v0x10b23e0_0 .net "LABEL", 3 0, L_0x10d4ee0; 1 drivers +v0x10b24c0_0 .var "PC", 3 0; +v0x10b25a0_0 .var "PCNEXT", 3 0; +v0x10b2680_0 .net "SRC", 2 0, L_0x10d4aa0; 1 drivers +v0x10b27f0_0 .net *"_s103", 0 0, L_0x10d2e90; 1 drivers +v0x10b28d0_0 .net *"_s107", 0 0, L_0x10d2da0; 1 drivers +v0x10b29b0_0 .net *"_s111", 0 0, L_0x10d3080; 1 drivers +v0x10b2a90_0 .net *"_s115", 0 0, L_0x10d2f80; 1 drivers +v0x10b2b70_0 .net *"_s119", 0 0, L_0x10d32c0; 1 drivers +v0x10b2c50_0 .net *"_s123", 0 0, L_0x10d31b0; 1 drivers +v0x10b2d30_0 .net *"_s127", 0 0, L_0x10d3480; 1 drivers +v0x10b2e10_0 .net *"_s131", 0 0, L_0x10d3360; 1 drivers +v0x10b2fc0_0 .net *"_s135", 0 0, L_0x10d36e0; 1 drivers +v0x10b3060_0 .net *"_s139", 0 0, L_0x10d35b0; 1 drivers +v0x10b3140_0 .net *"_s143", 0 0, L_0x10d38c0; 1 drivers +v0x10b3220_0 .net *"_s147", 0 0, L_0x10d3780; 1 drivers +v0x10b3300_0 .net *"_s151", 0 0, L_0x10d3ab0; 1 drivers +v0x10b33e0_0 .net *"_s155", 0 0, L_0x10d3960; 1 drivers +v0x10b34c0_0 .net *"_s159", 0 0, L_0x10d3a00; 1 drivers +v0x10b35a0_0 .net *"_s160", 17 0, L_0x10d3b50; 1 drivers +v0x10b3680_0 .net *"_s162", 5 0, L_0x10d3eb0; 1 drivers +L_0x2b8038e7d0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x10b3760_0 .net *"_s165", 1 0, L_0x2b8038e7d0f0; 1 drivers +v0x10b5690_2 .array/port v0x10b5690, 2; +v0x10b3840_0 .net *"_s173", 10 0, v0x10b5690_2; 1 drivers +v0x10b5690_3 .array/port v0x10b5690, 3; +v0x10b3920_0 .net *"_s179", 10 0, v0x10b5690_3; 1 drivers +v0x10b5690_0 .array/port v0x10b5690, 0; +v0x10b3a00_0 .net *"_s185", 10 0, v0x10b5690_0; 1 drivers +v0x10b5690_1 .array/port v0x10b5690, 1; +v0x10b3ae0_0 .net *"_s191", 10 0, v0x10b5690_1; 1 drivers +v0x10b3bc0_0 .net *"_s23", 0 0, L_0x10d1290; 1 drivers +v0x10b3ca0_0 .net *"_s27", 0 0, L_0x10d13f0; 1 drivers +v0x10b2ef0_0 .net *"_s31", 0 0, L_0x10d14c0; 1 drivers +v0x10b3f70_0 .net *"_s36", 0 0, L_0x10d1790; 1 drivers +v0x10b4050_0 .net *"_s42", 0 0, L_0x10d1a20; 1 drivers +v0x10b4130_0 .net *"_s46", 0 0, L_0x10d1ac0; 1 drivers +v0x10b4210_0 .net *"_s50", 0 0, L_0x10d1bd0; 1 drivers +v0x10b42f0_0 .net *"_s55", 0 0, L_0x10d1e60; 1 drivers +v0x10b43d0_0 .net *"_s61", 0 0, L_0x10d20d0; 1 drivers +v0x10b44b0_0 .net *"_s65", 0 0, L_0x10d2170; 1 drivers +v0x10b4590_0 .net *"_s69", 0 0, L_0x10d2340; 1 drivers +v0x10b4670_0 .net *"_s74", 0 0, L_0x10d22a0; 1 drivers +v0x10b4750_0 .net *"_s80", 0 0, L_0x10d2530; 1 drivers +v0x10b4830_0 .net *"_s84", 0 0, L_0x10d2820; 1 drivers +v0x10b4910_0 .net *"_s88", 0 0, L_0x10d2760; 1 drivers +v0x10b49f0_0 .net *"_s93", 0 0, L_0x10d28c0; 1 drivers +v0x10b4ad0_0 .net *"_s99", 0 0, L_0x10d2b80; 1 drivers +v0x10b4bb0_0 .net/s "accOut", 10 0, L_0x10d0a10; alias, 1 drivers +v0x10b4c90_0 .net "anyHasData", 0 0, L_0x10d18d0; 1 drivers +v0x10b4d50_0 .net "anyReadAck", 0 0, L_0x10d26c0; 1 drivers +v0x10b4e10_0 .net "anyWantData", 0 0, L_0x10d1f50; 1 drivers +v0x10b4ed0_0 .net "anyWriteAck", 0 0, L_0x10d2cb0; 1 drivers +v0x10b4f90_0 .net "clk", 0 0, v0x10bcae0_0; alias, 1 drivers +o0x2b8038e50128 .functor BUFZ 15, C4; HiZ drive +v0x10b5030_0 .net "down", 14 0, o0x2b8038e50128; 0 drivers +v0x10b5110_0 .net "downOut", 14 0, L_0x10d42d0; 1 drivers +v0x10b51f0_0 .net "instruction", 17 0, L_0x10d1b60; 1 drivers +v0x10b52d0 .array "instructions", 15 0, 17 0; +v0x10b5390_0 .var "last", 2 0; +v0x10b5470_0 .net "left", 14 0, L_0x10e0db0; alias, 1 drivers +v0x10b5530_0 .net "leftOut", 14 0, L_0x10d4010; alias, 1 drivers +v0x10b55d0_0 .var "mode", 2 0; +v0x10b5690 .array/s "outVals", 2 5, 10 0; +v0x10b5800_0 .var "phase", 2 0; +v0x10b58e0_0 .net "portsHaveData", 5 2, L_0x10d15b0; 1 drivers +v0x10b3d40_0 .net "portsWantData", 5 2, L_0x10d1c70; 1 drivers +v0x10b3e20_0 .net "readAckIn", 5 2, L_0x10d23e0; 1 drivers +v0x10b5d90_0 .var "readAckOut", 5 2; +v0x10b5e30_0 .var "readTarget", 2 0; +v0x10b5ed0_0 .var/s "readValue", 10 0; +L_0x2b8038e7d0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x10b5f70 .array "regVals", 0 7; +v0x10b5f70_0 .net/s v0x10b5f70 0, 10 0, L_0x2b8038e7d0a8; 1 drivers +v0x10b5f70_1 .net/s v0x10b5f70 1, 10 0, L_0x10d0c10; 1 drivers +v0x10b5f70_2 .net/s v0x10b5f70 2, 10 0, L_0x10d0f80; 1 drivers +v0x10b5f70_3 .net/s v0x10b5f70 3, 10 0, L_0x10d1020; 1 drivers +v0x10b5f70_4 .net/s v0x10b5f70 4, 10 0, L_0x10d10c0; 1 drivers +v0x10b5f70_5 .net/s v0x10b5f70 5, 10 0, L_0x10d1160; 1 drivers +o0x2b8038e50548 .functor BUFZ 11, C4; HiZ drive +v0x10b5f70_6 .net/s v0x10b5f70 6, 10 0, o0x2b8038e50548; 0 drivers +o0x2b8038e50578 .functor BUFZ 11, C4; HiZ drive +v0x10b5f70_7 .net/s v0x10b5f70 7, 10 0, o0x2b8038e50578; 0 drivers +o0x2b8038e505a8 .functor BUFZ 15, C4; HiZ drive +v0x10b6180_0 .net "right", 14 0, o0x2b8038e505a8; 0 drivers +v0x10b6260_0 .net "rightOut", 14 0, L_0x10d4880; 1 drivers +o0x2b8038e50608 .functor BUFZ 15, C4; HiZ drive +v0x10b6340_0 .net "up", 14 0, o0x2b8038e50608; 0 drivers +v0x10b6420_0 .net "upOut", 14 0, L_0x10d3dc0; 1 drivers +v0x10b6500_0 .var "weHaveData", 5 2; +v0x10b65e0_0 .var "weWantData", 5 2; +v0x10b66c0_0 .net "writeAckIn", 5 2, L_0x10d2990; 1 drivers +v0x10b67a0_0 .var "writeAckOut", 5 2; +v0x10b6880_0 .var "writeTarget", 2 0; +v0x10b6960_0 .var/s "writeValue", 10 0; +L_0x10d0f80 .part L_0x10e0db0, 0, 11; +L_0x10d1020 .part o0x2b8038e505a8, 0, 11; +L_0x10d10c0 .part o0x2b8038e50608, 0, 11; +L_0x10d1160 .part o0x2b8038e50128, 0, 11; +L_0x10d1290 .part L_0x10e0db0, 11, 1; +L_0x10d13f0 .part o0x2b8038e505a8, 11, 1; +L_0x10d14c0 .part o0x2b8038e50608, 11, 1; +L_0x10d15b0 .concat8 [ 1 1 1 1], L_0x10d1290, L_0x10d13f0, L_0x10d14c0, L_0x10d1790; +L_0x10d1790 .part o0x2b8038e50128, 11, 1; +L_0x10d18d0 .reduce/or L_0x10d15b0; +L_0x10d1a20 .part L_0x10e0db0, 12, 1; +L_0x10d1ac0 .part o0x2b8038e505a8, 12, 1; +L_0x10d1bd0 .part o0x2b8038e50608, 12, 1; +L_0x10d1c70 .concat8 [ 1 1 1 1], L_0x10d1a20, L_0x10d1ac0, L_0x10d1bd0, L_0x10d1e60; +L_0x10d1e60 .part o0x2b8038e50128, 12, 1; +L_0x10d1f50 .reduce/or L_0x10d1c70; +L_0x10d20d0 .part L_0x10e0db0, 13, 1; +L_0x10d2170 .part o0x2b8038e505a8, 13, 1; +L_0x10d2340 .part o0x2b8038e50608, 13, 1; +L_0x10d23e0 .concat8 [ 1 1 1 1], L_0x10d20d0, L_0x10d2170, L_0x10d2340, L_0x10d22a0; +L_0x10d22a0 .part o0x2b8038e50128, 13, 1; +L_0x10d26c0 .reduce/or L_0x10d23e0; +L_0x10d2530 .part L_0x10e0db0, 14, 1; +L_0x10d2820 .part o0x2b8038e505a8, 14, 1; +L_0x10d2760 .part o0x2b8038e50608, 14, 1; +L_0x10d2990 .concat8 [ 1 1 1 1], L_0x10d2530, L_0x10d2820, L_0x10d2760, L_0x10d28c0; +L_0x10d28c0 .part o0x2b8038e50128, 14, 1; +L_0x10d2cb0 .reduce/or L_0x10d2990; +L_0x10d2b80 .part v0x10b5d90_0, 0, 1; +L_0x10d2e90 .part v0x10b5d90_0, 1, 1; +L_0x10d2da0 .part v0x10b5d90_0, 2, 1; +L_0x10d3080 .part v0x10b5d90_0, 3, 1; +L_0x10d2f80 .part v0x10b67a0_0, 0, 1; +L_0x10d32c0 .part v0x10b67a0_0, 1, 1; +L_0x10d31b0 .part v0x10b67a0_0, 2, 1; +L_0x10d3480 .part v0x10b67a0_0, 3, 1; +L_0x10d3360 .part v0x10b65e0_0, 0, 1; +L_0x10d36e0 .part v0x10b65e0_0, 1, 1; +L_0x10d35b0 .part v0x10b65e0_0, 2, 1; +L_0x10d38c0 .part v0x10b65e0_0, 3, 1; +L_0x10d3780 .part v0x10b6500_0, 0, 1; +L_0x10d3ab0 .part v0x10b6500_0, 1, 1; +L_0x10d3960 .part v0x10b6500_0, 2, 1; +L_0x10d3a00 .part v0x10b6500_0, 3, 1; +L_0x10d3b50 .array/port v0x10b52d0, L_0x10d3eb0; +L_0x10d3eb0 .concat [ 4 2 0 0], v0x10b24c0_0, L_0x2b8038e7d0f0; +LS_0x10d3dc0_0_0 .concat8 [ 11 1 1 1], v0x10b5690_2, L_0x10d3960, L_0x10d35b0, L_0x10d31b0; +LS_0x10d3dc0_0_4 .concat8 [ 1 0 0 0], L_0x10d2da0; +L_0x10d3dc0 .concat8 [ 14 1 0 0], LS_0x10d3dc0_0_0, LS_0x10d3dc0_0_4; +LS_0x10d42d0_0_0 .concat8 [ 11 1 1 1], v0x10b5690_3, L_0x10d3a00, L_0x10d38c0, L_0x10d3480; +LS_0x10d42d0_0_4 .concat8 [ 1 0 0 0], L_0x10d3080; +L_0x10d42d0 .concat8 [ 14 1 0 0], LS_0x10d42d0_0_0, LS_0x10d42d0_0_4; +LS_0x10d4010_0_0 .concat8 [ 11 1 1 1], v0x10b5690_0, L_0x10d3780, L_0x10d3360, L_0x10d2f80; +LS_0x10d4010_0_4 .concat8 [ 1 0 0 0], L_0x10d2b80; +L_0x10d4010 .concat8 [ 14 1 0 0], LS_0x10d4010_0_0, LS_0x10d4010_0_4; +LS_0x10d4880_0_0 .concat8 [ 11 1 1 1], v0x10b5690_1, L_0x10d3ab0, L_0x10d36e0, L_0x10d32c0; +LS_0x10d4880_0_4 .concat8 [ 1 0 0 0], L_0x10d2e90; +L_0x10d4880 .concat8 [ 14 1 0 0], LS_0x10d4880_0_0, LS_0x10d4880_0_4; +L_0x10d4570 .part L_0x10d1b60, 14, 4; +L_0x10d4c90 .part L_0x10d1b60, 11, 3; +L_0x10d4aa0 .part L_0x10d1b60, 8, 3; +L_0x10d4ee0 .part L_0x10d1b60, 10, 4; +L_0x10d4d30 .part L_0x10d1b60, 0, 11; +S_0x10b6be0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x10151e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -755,219 +755,219 @@ S_0x2853be0 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x27b21e0; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x2853e00 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x2853e40 .param/str "memFile" 0 3 60, "anyWrite/up.dat"; -L_0x2871bd0 .functor BUFZ 11, v0x2854100_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2871e20 .functor BUFZ 11, v0x2854100_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x2872c60 .functor BUFZ 18, L_0x2874c00, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x2854100_0 .var/s "ACC", 10 0; -v0x2854200_0 .var/s "BAK", 10 0; -v0x28542e0_0 .net "DST", 2 0, L_0x2875d40; 1 drivers -v0x28543a0_0 .net/s "IMM", 10 0, L_0x2875de0; 1 drivers -v0x2854480_0 .net "INST", 3 0, L_0x2875620; 1 drivers -v0x28545b0_0 .net "LABEL", 3 0, L_0x2875f90; 1 drivers -v0x2854690_0 .var "PC", 3 0; -v0x2854770_0 .var "PCNEXT", 3 0; -v0x2854850_0 .net "SRC", 2 0, L_0x2875b50; 1 drivers -v0x28549c0_0 .net *"_s103", 0 0, L_0x2873f40; 1 drivers -v0x2854aa0_0 .net *"_s107", 0 0, L_0x2873e50; 1 drivers -v0x2854b80_0 .net *"_s111", 0 0, L_0x2874130; 1 drivers -v0x2854c60_0 .net *"_s115", 0 0, L_0x2874030; 1 drivers -v0x2854d40_0 .net *"_s119", 0 0, L_0x2874370; 1 drivers -v0x2854e20_0 .net *"_s123", 0 0, L_0x2874260; 1 drivers -v0x2854f00_0 .net *"_s127", 0 0, L_0x2874530; 1 drivers -v0x2854fe0_0 .net *"_s131", 0 0, L_0x2874410; 1 drivers -v0x2855190_0 .net *"_s135", 0 0, L_0x2874790; 1 drivers -v0x2855230_0 .net *"_s139", 0 0, L_0x2874660; 1 drivers -v0x2855310_0 .net *"_s143", 0 0, L_0x2874970; 1 drivers -v0x28553f0_0 .net *"_s147", 0 0, L_0x2874830; 1 drivers -v0x28554d0_0 .net *"_s151", 0 0, L_0x2874b60; 1 drivers -v0x28555b0_0 .net *"_s155", 0 0, L_0x2874a10; 1 drivers -v0x2855690_0 .net *"_s159", 0 0, L_0x2874ab0; 1 drivers -v0x2855770_0 .net *"_s160", 17 0, L_0x2874c00; 1 drivers -v0x2855850_0 .net *"_s162", 5 0, L_0x2874f60; 1 drivers -L_0x2b28706ce180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x2855930_0 .net *"_s165", 1 0, L_0x2b28706ce180; 1 drivers -v0x28578f0_2 .array/port v0x28578f0, 2; -v0x2855a10_0 .net *"_s173", 10 0, v0x28578f0_2; 1 drivers -v0x28578f0_3 .array/port v0x28578f0, 3; -v0x2855af0_0 .net *"_s179", 10 0, v0x28578f0_3; 1 drivers -v0x28578f0_0 .array/port v0x28578f0, 0; -v0x2855bd0_0 .net *"_s185", 10 0, v0x28578f0_0; 1 drivers -v0x28578f0_1 .array/port v0x28578f0, 1; -v0x2855cb0_0 .net *"_s191", 10 0, v0x28578f0_1; 1 drivers -v0x2855d90_0 .net *"_s23", 0 0, L_0x2872420; 1 drivers -v0x2855e70_0 .net *"_s27", 0 0, L_0x2872540; 1 drivers -v0x28550c0_0 .net *"_s31", 0 0, L_0x2872630; 1 drivers -v0x2856140_0 .net *"_s36", 0 0, L_0x2872900; 1 drivers -v0x2856220_0 .net *"_s42", 0 0, L_0x2872b20; 1 drivers -v0x2856300_0 .net *"_s46", 0 0, L_0x2872bc0; 1 drivers -v0x28563e0_0 .net *"_s50", 0 0, L_0x2872cd0; 1 drivers -v0x28564c0_0 .net *"_s55", 0 0, L_0x2872f10; 1 drivers -v0x28565a0_0 .net *"_s61", 0 0, L_0x2873180; 1 drivers -v0x2856680_0 .net *"_s65", 0 0, L_0x28732b0; 1 drivers -v0x2856760_0 .net *"_s69", 0 0, L_0x2873480; 1 drivers -v0x2856840_0 .net *"_s74", 0 0, L_0x28733e0; 1 drivers -v0x2856920_0 .net *"_s80", 0 0, L_0x2873620; 1 drivers -v0x2856a00_0 .net *"_s84", 0 0, L_0x28738d0; 1 drivers -v0x2856ae0_0 .net *"_s88", 0 0, L_0x2873810; 1 drivers -v0x2856bc0_0 .net *"_s93", 0 0, L_0x2873970; 1 drivers -v0x2856ca0_0 .net *"_s99", 0 0, L_0x2873c30; 1 drivers -v0x2856d80_0 .net/s "accOut", 10 0, L_0x2871bd0; alias, 1 drivers -v0x2856e60_0 .net "anyHasData", 0 0, L_0x2872a80; 1 drivers -v0x2856f20_0 .net "anyReadAck", 0 0, L_0x2873720; 1 drivers -v0x2856fe0_0 .net "anyWantData", 0 0, L_0x2873000; 1 drivers -v0x28570a0_0 .net "anyWriteAck", 0 0, L_0x2873d60; 1 drivers -v0x2857160_0 .net "clk", 0 0, v0x2859ae0_0; alias, 1 drivers -v0x2857290_0 .net "down", 14 0, L_0x287d110; alias, 1 drivers -v0x2857350_0 .net "downOut", 14 0, L_0x2875380; alias, 1 drivers -v0x28573f0_0 .net "instruction", 17 0, L_0x2872c60; 1 drivers -v0x28574b0 .array "instructions", 15 0, 17 0; -v0x2857570_0 .var "last", 2 0; -o0x2b28706a23b8 .functor BUFZ 15, C4; HiZ drive -v0x2857650_0 .net "left", 14 0, o0x2b28706a23b8; 0 drivers -v0x2857730_0 .net "leftOut", 14 0, L_0x28750c0; 1 drivers -v0x2857810_0 .var "mode", 2 0; -v0x28578f0 .array/s "outVals", 2 5, 10 0; -v0x2857a60_0 .var "phase", 2 0; -v0x2857b40_0 .net "portsHaveData", 5 2, L_0x2872720; 1 drivers -v0x2855f10_0 .net "portsWantData", 5 2, L_0x2872d70; 1 drivers -v0x2855ff0_0 .net "readAckIn", 5 2, L_0x2873520; 1 drivers -v0x2857ff0_0 .var "readAckOut", 5 2; -v0x2858090_0 .var "readTarget", 2 0; -v0x2858130_0 .var/s "readValue", 10 0; -L_0x2b28706ce138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x28581d0 .array "regVals", 0 7; -v0x28581d0_0 .net/s v0x28581d0 0, 10 0, L_0x2b28706ce138; 1 drivers -v0x28581d0_1 .net/s v0x28581d0 1, 10 0, L_0x2871e20; 1 drivers -v0x28581d0_2 .net/s v0x28581d0 2, 10 0, L_0x2872140; 1 drivers -v0x28581d0_3 .net/s v0x28581d0 3, 10 0, L_0x28721e0; 1 drivers -v0x28581d0_4 .net/s v0x28581d0 4, 10 0, L_0x2872280; 1 drivers -v0x28581d0_5 .net/s v0x28581d0 5, 10 0, L_0x2872320; 1 drivers -o0x2b28706a2778 .functor BUFZ 11, C4; HiZ drive -v0x28581d0_6 .net/s v0x28581d0 6, 10 0, o0x2b28706a2778; 0 drivers -o0x2b28706a27a8 .functor BUFZ 11, C4; HiZ drive -v0x28581d0_7 .net/s v0x28581d0 7, 10 0, o0x2b28706a27a8; 0 drivers -o0x2b28706a27d8 .functor BUFZ 15, C4; HiZ drive -v0x28583e0_0 .net "right", 14 0, o0x2b28706a27d8; 0 drivers -v0x28584c0_0 .net "rightOut", 14 0, L_0x2875930; 1 drivers -o0x2b28706a2838 .functor BUFZ 15, C4; HiZ drive -v0x28585a0_0 .net "up", 14 0, o0x2b28706a2838; 0 drivers -v0x2858680_0 .net "upOut", 14 0, L_0x2874e70; 1 drivers -v0x2858760_0 .var "weHaveData", 5 2; -v0x2858840_0 .var "weWantData", 5 2; -v0x2858920_0 .net "writeAckIn", 5 2, L_0x2873a40; 1 drivers -v0x2858a00_0 .var "writeAckOut", 5 2; -v0x2858ae0_0 .var "writeTarget", 2 0; -v0x2858bc0_0 .var/s "writeValue", 10 0; -L_0x2872140 .part o0x2b28706a23b8, 0, 11; -L_0x28721e0 .part o0x2b28706a27d8, 0, 11; -L_0x2872280 .part o0x2b28706a2838, 0, 11; -L_0x2872320 .part L_0x287d110, 0, 11; -L_0x2872420 .part o0x2b28706a23b8, 11, 1; -L_0x2872540 .part o0x2b28706a27d8, 11, 1; -L_0x2872630 .part o0x2b28706a2838, 11, 1; -L_0x2872720 .concat8 [ 1 1 1 1], L_0x2872420, L_0x2872540, L_0x2872630, L_0x2872900; -L_0x2872900 .part L_0x287d110, 11, 1; -L_0x2872a80 .reduce/or L_0x2872720; -L_0x2872b20 .part o0x2b28706a23b8, 12, 1; -L_0x2872bc0 .part o0x2b28706a27d8, 12, 1; -L_0x2872cd0 .part o0x2b28706a2838, 12, 1; -L_0x2872d70 .concat8 [ 1 1 1 1], L_0x2872b20, L_0x2872bc0, L_0x2872cd0, L_0x2872f10; -L_0x2872f10 .part L_0x287d110, 12, 1; -L_0x2873000 .reduce/or L_0x2872d70; -L_0x2873180 .part o0x2b28706a23b8, 13, 1; -L_0x28732b0 .part o0x2b28706a27d8, 13, 1; -L_0x2873480 .part o0x2b28706a2838, 13, 1; -L_0x2873520 .concat8 [ 1 1 1 1], L_0x2873180, L_0x28732b0, L_0x2873480, L_0x28733e0; -L_0x28733e0 .part L_0x287d110, 13, 1; -L_0x2873720 .reduce/or L_0x2873520; -L_0x2873620 .part o0x2b28706a23b8, 14, 1; -L_0x28738d0 .part o0x2b28706a27d8, 14, 1; -L_0x2873810 .part o0x2b28706a2838, 14, 1; -L_0x2873a40 .concat8 [ 1 1 1 1], L_0x2873620, L_0x28738d0, L_0x2873810, L_0x2873970; -L_0x2873970 .part L_0x287d110, 14, 1; -L_0x2873d60 .reduce/or L_0x2873a40; -L_0x2873c30 .part v0x2857ff0_0, 0, 1; -L_0x2873f40 .part v0x2857ff0_0, 1, 1; -L_0x2873e50 .part v0x2857ff0_0, 2, 1; -L_0x2874130 .part v0x2857ff0_0, 3, 1; -L_0x2874030 .part v0x2858a00_0, 0, 1; -L_0x2874370 .part v0x2858a00_0, 1, 1; -L_0x2874260 .part v0x2858a00_0, 2, 1; -L_0x2874530 .part v0x2858a00_0, 3, 1; -L_0x2874410 .part v0x2858840_0, 0, 1; -L_0x2874790 .part v0x2858840_0, 1, 1; -L_0x2874660 .part v0x2858840_0, 2, 1; -L_0x2874970 .part v0x2858840_0, 3, 1; -L_0x2874830 .part v0x2858760_0, 0, 1; -L_0x2874b60 .part v0x2858760_0, 1, 1; -L_0x2874a10 .part v0x2858760_0, 2, 1; -L_0x2874ab0 .part v0x2858760_0, 3, 1; -L_0x2874c00 .array/port v0x28574b0, L_0x2874f60; -L_0x2874f60 .concat [ 4 2 0 0], v0x2854690_0, L_0x2b28706ce180; -LS_0x2874e70_0_0 .concat8 [ 11 1 1 1], v0x28578f0_2, L_0x2874a10, L_0x2874660, L_0x2874260; -LS_0x2874e70_0_4 .concat8 [ 1 0 0 0], L_0x2873e50; -L_0x2874e70 .concat8 [ 14 1 0 0], LS_0x2874e70_0_0, LS_0x2874e70_0_4; -LS_0x2875380_0_0 .concat8 [ 11 1 1 1], v0x28578f0_3, L_0x2874ab0, L_0x2874970, L_0x2874530; -LS_0x2875380_0_4 .concat8 [ 1 0 0 0], L_0x2874130; -L_0x2875380 .concat8 [ 14 1 0 0], LS_0x2875380_0_0, LS_0x2875380_0_4; -LS_0x28750c0_0_0 .concat8 [ 11 1 1 1], v0x28578f0_0, L_0x2874830, L_0x2874410, L_0x2874030; -LS_0x28750c0_0_4 .concat8 [ 1 0 0 0], L_0x2873c30; -L_0x28750c0 .concat8 [ 14 1 0 0], LS_0x28750c0_0_0, LS_0x28750c0_0_4; -LS_0x2875930_0_0 .concat8 [ 11 1 1 1], v0x28578f0_1, L_0x2874b60, L_0x2874790, L_0x2874370; -LS_0x2875930_0_4 .concat8 [ 1 0 0 0], L_0x2873f40; -L_0x2875930 .concat8 [ 14 1 0 0], LS_0x2875930_0_0, LS_0x2875930_0_4; -L_0x2875620 .part L_0x2872c60, 14, 4; -L_0x2875d40 .part L_0x2872c60, 11, 3; -L_0x2875b50 .part L_0x2872c60, 8, 3; -L_0x2875f90 .part L_0x2872c60, 10, 4; -L_0x2875de0 .part L_0x2872c60, 0, 11; - .scope S_0x28497f0; +P_0x10b6e00 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x10b6e40 .param/str "memFile" 0 3 60, "anyWrite/up.dat"; +L_0x10d4bd0 .functor BUFZ 11, v0x10b7100_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10d4e20 .functor BUFZ 11, v0x10b7100_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10d5c60 .functor BUFZ 18, L_0x10d7c00, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x10b7100_0 .var/s "ACC", 10 0; +v0x10b7200_0 .var/s "BAK", 10 0; +v0x10b72e0_0 .net "DST", 2 0, L_0x10d8d40; 1 drivers +v0x10b73a0_0 .net/s "IMM", 10 0, L_0x10d8de0; 1 drivers +v0x10b7480_0 .net "INST", 3 0, L_0x10d8620; 1 drivers +v0x10b75b0_0 .net "LABEL", 3 0, L_0x10d8f90; 1 drivers +v0x10b7690_0 .var "PC", 3 0; +v0x10b7770_0 .var "PCNEXT", 3 0; +v0x10b7850_0 .net "SRC", 2 0, L_0x10d8b50; 1 drivers +v0x10b79c0_0 .net *"_s103", 0 0, L_0x10d6f40; 1 drivers +v0x10b7aa0_0 .net *"_s107", 0 0, L_0x10d6e50; 1 drivers +v0x10b7b80_0 .net *"_s111", 0 0, L_0x10d7130; 1 drivers +v0x10b7c60_0 .net *"_s115", 0 0, L_0x10d7030; 1 drivers +v0x10b7d40_0 .net *"_s119", 0 0, L_0x10d7370; 1 drivers +v0x10b7e20_0 .net *"_s123", 0 0, L_0x10d7260; 1 drivers +v0x10b7f00_0 .net *"_s127", 0 0, L_0x10d7530; 1 drivers +v0x10b7fe0_0 .net *"_s131", 0 0, L_0x10d7410; 1 drivers +v0x10b8190_0 .net *"_s135", 0 0, L_0x10d7790; 1 drivers +v0x10b8230_0 .net *"_s139", 0 0, L_0x10d7660; 1 drivers +v0x10b8310_0 .net *"_s143", 0 0, L_0x10d7970; 1 drivers +v0x10b83f0_0 .net *"_s147", 0 0, L_0x10d7830; 1 drivers +v0x10b84d0_0 .net *"_s151", 0 0, L_0x10d7b60; 1 drivers +v0x10b85b0_0 .net *"_s155", 0 0, L_0x10d7a10; 1 drivers +v0x10b8690_0 .net *"_s159", 0 0, L_0x10d7ab0; 1 drivers +v0x10b8770_0 .net *"_s160", 17 0, L_0x10d7c00; 1 drivers +v0x10b8850_0 .net *"_s162", 5 0, L_0x10d7f60; 1 drivers +L_0x2b8038e7d180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x10b8930_0 .net *"_s165", 1 0, L_0x2b8038e7d180; 1 drivers +v0x10ba8f0_2 .array/port v0x10ba8f0, 2; +v0x10b8a10_0 .net *"_s173", 10 0, v0x10ba8f0_2; 1 drivers +v0x10ba8f0_3 .array/port v0x10ba8f0, 3; +v0x10b8af0_0 .net *"_s179", 10 0, v0x10ba8f0_3; 1 drivers +v0x10ba8f0_0 .array/port v0x10ba8f0, 0; +v0x10b8bd0_0 .net *"_s185", 10 0, v0x10ba8f0_0; 1 drivers +v0x10ba8f0_1 .array/port v0x10ba8f0, 1; +v0x10b8cb0_0 .net *"_s191", 10 0, v0x10ba8f0_1; 1 drivers +v0x10b8d90_0 .net *"_s23", 0 0, L_0x10d5420; 1 drivers +v0x10b8e70_0 .net *"_s27", 0 0, L_0x10d5540; 1 drivers +v0x10b80c0_0 .net *"_s31", 0 0, L_0x10d5630; 1 drivers +v0x10b9140_0 .net *"_s36", 0 0, L_0x10d5900; 1 drivers +v0x10b9220_0 .net *"_s42", 0 0, L_0x10d5b20; 1 drivers +v0x10b9300_0 .net *"_s46", 0 0, L_0x10d5bc0; 1 drivers +v0x10b93e0_0 .net *"_s50", 0 0, L_0x10d5cd0; 1 drivers +v0x10b94c0_0 .net *"_s55", 0 0, L_0x10d5f10; 1 drivers +v0x10b95a0_0 .net *"_s61", 0 0, L_0x10d6180; 1 drivers +v0x10b9680_0 .net *"_s65", 0 0, L_0x10d62b0; 1 drivers +v0x10b9760_0 .net *"_s69", 0 0, L_0x10d6480; 1 drivers +v0x10b9840_0 .net *"_s74", 0 0, L_0x10d63e0; 1 drivers +v0x10b9920_0 .net *"_s80", 0 0, L_0x10d6620; 1 drivers +v0x10b9a00_0 .net *"_s84", 0 0, L_0x10d68d0; 1 drivers +v0x10b9ae0_0 .net *"_s88", 0 0, L_0x10d6810; 1 drivers +v0x10b9bc0_0 .net *"_s93", 0 0, L_0x10d6970; 1 drivers +v0x10b9ca0_0 .net *"_s99", 0 0, L_0x10d6c30; 1 drivers +v0x10b9d80_0 .net/s "accOut", 10 0, L_0x10d4bd0; alias, 1 drivers +v0x10b9e60_0 .net "anyHasData", 0 0, L_0x10d5a80; 1 drivers +v0x10b9f20_0 .net "anyReadAck", 0 0, L_0x10d6720; 1 drivers +v0x10b9fe0_0 .net "anyWantData", 0 0, L_0x10d6000; 1 drivers +v0x10ba0a0_0 .net "anyWriteAck", 0 0, L_0x10d6d60; 1 drivers +v0x10ba160_0 .net "clk", 0 0, v0x10bcae0_0; alias, 1 drivers +v0x10ba290_0 .net "down", 14 0, L_0x10e0110; alias, 1 drivers +v0x10ba350_0 .net "downOut", 14 0, L_0x10d8380; alias, 1 drivers +v0x10ba3f0_0 .net "instruction", 17 0, L_0x10d5c60; 1 drivers +v0x10ba4b0 .array "instructions", 15 0, 17 0; +v0x10ba570_0 .var "last", 2 0; +o0x2b8038e513b8 .functor BUFZ 15, C4; HiZ drive +v0x10ba650_0 .net "left", 14 0, o0x2b8038e513b8; 0 drivers +v0x10ba730_0 .net "leftOut", 14 0, L_0x10d80c0; 1 drivers +v0x10ba810_0 .var "mode", 2 0; +v0x10ba8f0 .array/s "outVals", 2 5, 10 0; +v0x10baa60_0 .var "phase", 2 0; +v0x10bab40_0 .net "portsHaveData", 5 2, L_0x10d5720; 1 drivers +v0x10b8f10_0 .net "portsWantData", 5 2, L_0x10d5d70; 1 drivers +v0x10b8ff0_0 .net "readAckIn", 5 2, L_0x10d6520; 1 drivers +v0x10baff0_0 .var "readAckOut", 5 2; +v0x10bb090_0 .var "readTarget", 2 0; +v0x10bb130_0 .var/s "readValue", 10 0; +L_0x2b8038e7d138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x10bb1d0 .array "regVals", 0 7; +v0x10bb1d0_0 .net/s v0x10bb1d0 0, 10 0, L_0x2b8038e7d138; 1 drivers +v0x10bb1d0_1 .net/s v0x10bb1d0 1, 10 0, L_0x10d4e20; 1 drivers +v0x10bb1d0_2 .net/s v0x10bb1d0 2, 10 0, L_0x10d5140; 1 drivers +v0x10bb1d0_3 .net/s v0x10bb1d0 3, 10 0, L_0x10d51e0; 1 drivers +v0x10bb1d0_4 .net/s v0x10bb1d0 4, 10 0, L_0x10d5280; 1 drivers +v0x10bb1d0_5 .net/s v0x10bb1d0 5, 10 0, L_0x10d5320; 1 drivers +o0x2b8038e51778 .functor BUFZ 11, C4; HiZ drive +v0x10bb1d0_6 .net/s v0x10bb1d0 6, 10 0, o0x2b8038e51778; 0 drivers +o0x2b8038e517a8 .functor BUFZ 11, C4; HiZ drive +v0x10bb1d0_7 .net/s v0x10bb1d0 7, 10 0, o0x2b8038e517a8; 0 drivers +o0x2b8038e517d8 .functor BUFZ 15, C4; HiZ drive +v0x10bb3e0_0 .net "right", 14 0, o0x2b8038e517d8; 0 drivers +v0x10bb4c0_0 .net "rightOut", 14 0, L_0x10d8930; 1 drivers +o0x2b8038e51838 .functor BUFZ 15, C4; HiZ drive +v0x10bb5a0_0 .net "up", 14 0, o0x2b8038e51838; 0 drivers +v0x10bb680_0 .net "upOut", 14 0, L_0x10d7e70; 1 drivers +v0x10bb760_0 .var "weHaveData", 5 2; +v0x10bb840_0 .var "weWantData", 5 2; +v0x10bb920_0 .net "writeAckIn", 5 2, L_0x10d6a40; 1 drivers +v0x10bba00_0 .var "writeAckOut", 5 2; +v0x10bbae0_0 .var "writeTarget", 2 0; +v0x10bbbc0_0 .var/s "writeValue", 10 0; +L_0x10d5140 .part o0x2b8038e513b8, 0, 11; +L_0x10d51e0 .part o0x2b8038e517d8, 0, 11; +L_0x10d5280 .part o0x2b8038e51838, 0, 11; +L_0x10d5320 .part L_0x10e0110, 0, 11; +L_0x10d5420 .part o0x2b8038e513b8, 11, 1; +L_0x10d5540 .part o0x2b8038e517d8, 11, 1; +L_0x10d5630 .part o0x2b8038e51838, 11, 1; +L_0x10d5720 .concat8 [ 1 1 1 1], L_0x10d5420, L_0x10d5540, L_0x10d5630, L_0x10d5900; +L_0x10d5900 .part L_0x10e0110, 11, 1; +L_0x10d5a80 .reduce/or L_0x10d5720; +L_0x10d5b20 .part o0x2b8038e513b8, 12, 1; +L_0x10d5bc0 .part o0x2b8038e517d8, 12, 1; +L_0x10d5cd0 .part o0x2b8038e51838, 12, 1; +L_0x10d5d70 .concat8 [ 1 1 1 1], L_0x10d5b20, L_0x10d5bc0, L_0x10d5cd0, L_0x10d5f10; +L_0x10d5f10 .part L_0x10e0110, 12, 1; +L_0x10d6000 .reduce/or L_0x10d5d70; +L_0x10d6180 .part o0x2b8038e513b8, 13, 1; +L_0x10d62b0 .part o0x2b8038e517d8, 13, 1; +L_0x10d6480 .part o0x2b8038e51838, 13, 1; +L_0x10d6520 .concat8 [ 1 1 1 1], L_0x10d6180, L_0x10d62b0, L_0x10d6480, L_0x10d63e0; +L_0x10d63e0 .part L_0x10e0110, 13, 1; +L_0x10d6720 .reduce/or L_0x10d6520; +L_0x10d6620 .part o0x2b8038e513b8, 14, 1; +L_0x10d68d0 .part o0x2b8038e517d8, 14, 1; +L_0x10d6810 .part o0x2b8038e51838, 14, 1; +L_0x10d6a40 .concat8 [ 1 1 1 1], L_0x10d6620, L_0x10d68d0, L_0x10d6810, L_0x10d6970; +L_0x10d6970 .part L_0x10e0110, 14, 1; +L_0x10d6d60 .reduce/or L_0x10d6a40; +L_0x10d6c30 .part v0x10baff0_0, 0, 1; +L_0x10d6f40 .part v0x10baff0_0, 1, 1; +L_0x10d6e50 .part v0x10baff0_0, 2, 1; +L_0x10d7130 .part v0x10baff0_0, 3, 1; +L_0x10d7030 .part v0x10bba00_0, 0, 1; +L_0x10d7370 .part v0x10bba00_0, 1, 1; +L_0x10d7260 .part v0x10bba00_0, 2, 1; +L_0x10d7530 .part v0x10bba00_0, 3, 1; +L_0x10d7410 .part v0x10bb840_0, 0, 1; +L_0x10d7790 .part v0x10bb840_0, 1, 1; +L_0x10d7660 .part v0x10bb840_0, 2, 1; +L_0x10d7970 .part v0x10bb840_0, 3, 1; +L_0x10d7830 .part v0x10bb760_0, 0, 1; +L_0x10d7b60 .part v0x10bb760_0, 1, 1; +L_0x10d7a10 .part v0x10bb760_0, 2, 1; +L_0x10d7ab0 .part v0x10bb760_0, 3, 1; +L_0x10d7c00 .array/port v0x10ba4b0, L_0x10d7f60; +L_0x10d7f60 .concat [ 4 2 0 0], v0x10b7690_0, L_0x2b8038e7d180; +LS_0x10d7e70_0_0 .concat8 [ 11 1 1 1], v0x10ba8f0_2, L_0x10d7a10, L_0x10d7660, L_0x10d7260; +LS_0x10d7e70_0_4 .concat8 [ 1 0 0 0], L_0x10d6e50; +L_0x10d7e70 .concat8 [ 14 1 0 0], LS_0x10d7e70_0_0, LS_0x10d7e70_0_4; +LS_0x10d8380_0_0 .concat8 [ 11 1 1 1], v0x10ba8f0_3, L_0x10d7ab0, L_0x10d7970, L_0x10d7530; +LS_0x10d8380_0_4 .concat8 [ 1 0 0 0], L_0x10d7130; +L_0x10d8380 .concat8 [ 14 1 0 0], LS_0x10d8380_0_0, LS_0x10d8380_0_4; +LS_0x10d80c0_0_0 .concat8 [ 11 1 1 1], v0x10ba8f0_0, L_0x10d7830, L_0x10d7410, L_0x10d7030; +LS_0x10d80c0_0_4 .concat8 [ 1 0 0 0], L_0x10d6c30; +L_0x10d80c0 .concat8 [ 14 1 0 0], LS_0x10d80c0_0_0, LS_0x10d80c0_0_4; +LS_0x10d8930_0_0 .concat8 [ 11 1 1 1], v0x10ba8f0_1, L_0x10d7b60, L_0x10d7790, L_0x10d7370; +LS_0x10d8930_0_4 .concat8 [ 1 0 0 0], L_0x10d6f40; +L_0x10d8930 .concat8 [ 14 1 0 0], LS_0x10d8930_0_0, LS_0x10d8930_0_4; +L_0x10d8620 .part L_0x10d5c60, 14, 4; +L_0x10d8d40 .part L_0x10d5c60, 11, 3; +L_0x10d8b50 .part L_0x10d5c60, 8, 3; +L_0x10d8f90 .part L_0x10d5c60, 10, 4; +L_0x10d8de0 .part L_0x10d5c60, 0, 11; + .scope S_0x10ac7f0; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x284d3a0_0, 0, 3; + %store/vec4 v0x10b03a0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x284d5c0_0, 0, 3; + %store/vec4 v0x10b05c0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x284d100_0, 0, 3; + %store/vec4 v0x10b0100_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2849d80_0, 0, 11; + %store/vec4 v0x10acd80_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2849e80_0, 0, 11; + %store/vec4 v0x10ace80_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284a230_0, 0, 4; + %store/vec4 v0x10ad230_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284db50_0, 0, 4; + %store/vec4 v0x10b0b50_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284e400_0, 0, 4; + %store/vec4 v0x10b1400_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284e5c0_0, 0, 4; + %store/vec4 v0x10b15c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284e320_0, 0, 4; + %store/vec4 v0x10b1320_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x284d480, 4, 0; + %store/vec4a v0x10b0480, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x284d480, 4, 0; + %store/vec4a v0x10b0480, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x284d480, 4, 0; + %store/vec4a v0x10b0480, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x284d480, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x2849a30, v0x284d040 {0 0 0}; + %store/vec4a v0x10b0480, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x10aca30, v0x10b0040 {0 0 0}; %end; .thread T_0; - .scope S_0x28497f0; + .scope S_0x10ac7f0; T_1 ; - %wait E_0x27bdb80; - %load/vec4 v0x284d3a0_0; + %wait E_0x1020b80; + %load/vec4 v0x10b03a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -982,7 +982,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x284d5c0_0; + %load/vec4 v0x10b05c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -997,185 +997,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x284a020_0; + %load/vec4 v0x10ad020_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x284d6a0_0; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10b06a0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284db50_0, 4, 5; - %load/vec4 v0x284a3f0_0; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; + %load/vec4 v0x10ad3f0_0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; - %load/vec4 v0x284a3f0_0; - %assign/vec4 v0x284dbf0_0, 0; + %assign/vec4 v0x10b03a0_0, 0; + %load/vec4 v0x10ad3f0_0; + %assign/vec4 v0x10b0bf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284e400_0, 4, 5; - %load/vec4 v0x284a3f0_0; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4/off/d v0x10b1400_0, 4, 5; + %load/vec4 v0x10ad3f0_0; + %assign/vec4 v0x10b0100_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x284d6a0_0; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b06a0_0; + %load/vec4 v0x10b0100_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; - %load/vec4 v0x284d100_0; - %assign/vec4 v0x284dbf0_0, 0; + %assign/vec4 v0x10b03a0_0, 0; + %load/vec4 v0x10b0100_0; + %assign/vec4 v0x10b0bf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284e400_0, 4, 5; + %assign/vec4/off/d v0x10b1400_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x284a3f0_0; + %load/vec4 v0x10ad3f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x284ca00_0; + %load/vec4 v0x10afa00_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1183,29 +1183,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; - %load/vec4 v0x284a3f0_0; - %assign/vec4 v0x284dbf0_0, 0; + %assign/vec4 v0x10b03a0_0, 0; + %load/vec4 v0x10ad3f0_0; + %assign/vec4 v0x10b0bf0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e400_0, 4, 5; + %assign/vec4/off/d v0x10b1400_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e400_0, 4, 5; + %assign/vec4/off/d v0x10b1400_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e400_0, 4, 5; + %assign/vec4/off/d v0x10b1400_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e400_0, 4, 5; + %assign/vec4/off/d v0x10b1400_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1213,10 +1213,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x284a020_0; + %load/vec4 v0x10ad020_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1283,180 +1283,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x2849d80_0; - %load/vec4 v0x284dcd0_0; + %load/vec4 v0x10acd80_0; + %load/vec4 v0x10b0cd0_0; %add; - %assign/vec4 v0x2849d80_0, 0; - %load/vec4 v0x284a230_0; + %assign/vec4 v0x10acd80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x2849d80_0; - %load/vec4 v0x284dcd0_0; + %load/vec4 v0x10acd80_0; + %load/vec4 v0x10b0cd0_0; %sub; - %assign/vec4 v0x2849d80_0, 0; - %load/vec4 v0x284a230_0; + %assign/vec4 v0x10acd80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ad230_0; %pad/u 11; - %load/vec4 v0x284dcd0_0; + %load/vec4 v0x10b0cd0_0; %add; %pad/u 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x284dcd0_0; - %assign/vec4 v0x284e780_0, 0; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10b0cd0_0; + %assign/vec4 v0x10b1780_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x2849f60_0; - %assign/vec4 v0x284e780_0, 0; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10acf60_0; + %assign/vec4 v0x10b1780_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x2849d80_0; - %load/vec4 v0x2849f60_0; + %load/vec4 v0x10acd80_0; + %load/vec4 v0x10acf60_0; %add; - %assign/vec4 v0x2849d80_0, 0; - %load/vec4 v0x284a230_0; + %assign/vec4 v0x10acd80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x2849d80_0; - %load/vec4 v0x2849f60_0; + %load/vec4 v0x10acd80_0; + %load/vec4 v0x10acf60_0; %sub; - %assign/vec4 v0x2849d80_0, 0; - %load/vec4 v0x284a230_0; + %assign/vec4 v0x10acd80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ad230_0; %pad/u 11; - %load/vec4 v0x2849f60_0; + %load/vec4 v0x10acf60_0; %add; %pad/u 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x2849e80_0; - %assign/vec4 v0x2849d80_0, 0; - %load/vec4 v0x2849d80_0; - %assign/vec4 v0x2849e80_0, 0; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ace80_0; + %assign/vec4 v0x10acd80_0, 0; + %load/vec4 v0x10acd80_0; + %assign/vec4 v0x10ace80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x2849d80_0; - %assign/vec4 v0x2849e80_0, 0; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10acd80_0; + %assign/vec4 v0x10ace80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x2849d80_0; + %load/vec4 v0x10acd80_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2849d80_0, 0; - %load/vec4 v0x284a230_0; + %assign/vec4 v0x10acd80_0, 0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x284a150_0; - %assign/vec4 v0x284a310_0, 0; + %load/vec4 v0x10ad150_0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x2849d80_0; + %load/vec4 v0x10acd80_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x284a150_0; - %assign/vec4 v0x284a310_0, 0; + %load/vec4 v0x10ad150_0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x2849d80_0; + %load/vec4 v0x10acd80_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x284a150_0; - %assign/vec4 v0x284a310_0, 0; + %load/vec4 v0x10ad150_0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2849d80_0; + %load/vec4 v0x10acd80_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x284a150_0; - %assign/vec4 v0x284a310_0, 0; + %load/vec4 v0x10ad150_0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x2849d80_0; + %load/vec4 v0x10acd80_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x284a150_0; - %assign/vec4 v0x284a310_0, 0; + %load/vec4 v0x10ad150_0; + %assign/vec4 v0x10ad310_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x284a230_0; + %load/vec4 v0x10ad230_0; %addi 1, 0, 4; - %assign/vec4 v0x284a310_0, 0; + %assign/vec4 v0x10ad310_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x284a020_0; + %load/vec4 v0x10ad020_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x284a020_0; + %load/vec4 v0x10ad020_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x2849b90_0; + %load/vec4 v0x10acb90_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x2849b90_0; + %load/vec4 v0x10acb90_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1464,162 +1464,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x2849b90_0; + %load/vec4 v0x10acb90_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x284e780_0; - %assign/vec4 v0x2849d80_0, 0; + %load/vec4 v0x10b1780_0; + %assign/vec4 v0x10acd80_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; - %load/vec4 v0x2849b90_0; + %assign/vec4 v0x10b03a0_0, 0; + %load/vec4 v0x10acb90_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x284d100_0; - %assign/vec4 v0x284e6a0_0, 0; - %load/vec4 v0x284e780_0; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; + %assign/vec4 v0x10b16a0_0, 0; + %load/vec4 v0x10b1780_0; + %load/vec4 v0x10b0100_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284d100_0; + %load/vec4 v0x10b0100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284e320_0, 4, 5; + %assign/vec4/off/d v0x10b1320_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x2849b90_0; + %load/vec4 v0x10acb90_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x2849b90_0; - %assign/vec4 v0x284e6a0_0, 0; - %load/vec4 v0x284e780_0; - %load/vec4 v0x2849b90_0; + %load/vec4 v0x10acb90_0; + %assign/vec4 v0x10b16a0_0, 0; + %load/vec4 v0x10b1780_0; + %load/vec4 v0x10acb90_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2849b90_0; + %load/vec4 v0x10acb90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x2849b90_0; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10acb90_0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x284cb80_0; + %load/vec4 v0x10afb80_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x2849b90_0; - %assign/vec4 v0x284e6a0_0, 0; + %load/vec4 v0x10acb90_0; + %assign/vec4 v0x10b16a0_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x284d5c0_0; + %load/vec4 v0x10b05c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1634,82 +1634,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x284dbf0_0; + %load/vec4 v0x10b0bf0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x284ca00_0; + %load/vec4 v0x10afa00_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; + %assign/vec4 v0x10b03a0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284e400_0, 0, 4; - %load/vec4 v0x284d6a0_0; + %store/vec4 v0x10b1400_0, 0, 4; + %load/vec4 v0x10b06a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x284d6a0_0; + %load/vec4 v0x10b06a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1717,54 +1717,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x284d6a0_0; - %load/vec4 v0x284dbf0_0; + %load/vec4 v0x10b06a0_0; + %load/vec4 v0x10b0bf0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; - %load/vec4 v0x284dbf0_0; + %assign/vec4 v0x10b03a0_0, 0; + %load/vec4 v0x10b0bf0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x284ddb0, 4; - %assign/vec4 v0x284dcd0_0, 0; + %load/vec4a v0x10b0db0, 4; + %assign/vec4 v0x10b0cd0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284dbf0_0; + %load/vec4 v0x10b0bf0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284db50_0, 4, 5; + %assign/vec4/off/d v0x10b0b50_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284dbf0_0; + %load/vec4 v0x10b0bf0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x284e400_0, 4, 5; - %load/vec4 v0x284dbf0_0; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4/off/d v0x10b1400_0, 4, 5; + %load/vec4 v0x10b0bf0_0; + %assign/vec4 v0x10b0100_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x284d5c0_0; + %load/vec4 v0x10b05c0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1780,93 +1780,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x284e6a0_0; + %load/vec4 v0x10b16a0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x284cb80_0; + %load/vec4 v0x10afb80_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x284bab0_0; + %load/vec4 v0x10aeab0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x284e6a0_0, 0; + %assign/vec4 v0x10b16a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x284e320_0, 4, 5; - %load/vec4 v0x284e780_0; + %assign/vec4/off/d v0x10b1320_0, 4, 5; + %load/vec4 v0x10b1780_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x284d480, 0, 4; + %assign/vec4/a/d v0x10b0480, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b0100_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1874,33 +1874,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x284e6a0_0; + %load/vec4 v0x10b16a0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x284e4e0_0; - %load/vec4 v0x284e6a0_0; + %load/vec4 v0x10b14e0_0; + %load/vec4 v0x10b16a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x284e6a0_0; + %load/vec4 v0x10b16a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x284e320_0, 4, 1; + %store/vec4 v0x10b1320_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x284d3a0_0, 0; - %load/vec4 v0x284e6a0_0; - %assign/vec4 v0x284d100_0, 0; + %assign/vec4 v0x10b03a0_0, 0; + %load/vec4 v0x10b16a0_0; + %assign/vec4 v0x10b0100_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x284d5c0_0, 0; + %assign/vec4 v0x10b05c0_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1909,19 +1909,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x28497f0; + .scope S_0x10ac7f0; T_2 ; - %wait E_0x279b3d0; - %load/vec4 v0x284d5c0_0; + %wait E_0xffe3d0; + %load/vec4 v0x10b05c0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x284d3a0_0; + %load/vec4 v0x10b03a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x284a310_0; + %load/vec4 v0x10ad310_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1930,62 +1930,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x284a310_0; - %assign/vec4 v0x284a230_0, 0; + %load/vec4 v0x10ad310_0; + %assign/vec4 v0x10ad230_0, 0; T_2.0 ; - %load/vec4 v0x284d5c0_0; + %load/vec4 v0x10b05c0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284db50_0, 0, 4; + %store/vec4 v0x10b0b50_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x284ea00; + .scope S_0x10b1a00; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28525d0_0, 0, 3; + %store/vec4 v0x10b55d0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2852800_0, 0, 3; + %store/vec4 v0x10b5800_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2852390_0, 0, 3; + %store/vec4 v0x10b5390_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x284ef80_0, 0, 11; + %store/vec4 v0x10b1f80_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x284f080_0, 0, 11; + %store/vec4 v0x10b2080_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x284f4c0_0, 0, 4; + %store/vec4 v0x10b24c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2852d90_0, 0, 4; + %store/vec4 v0x10b5d90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28535e0_0, 0, 4; + %store/vec4 v0x10b65e0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28537a0_0, 0, 4; + %store/vec4 v0x10b67a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2853500_0, 0, 4; + %store/vec4 v0x10b6500_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2852690, 4, 0; + %store/vec4a v0x10b5690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2852690, 4, 0; + %store/vec4a v0x10b5690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2852690, 4, 0; + %store/vec4a v0x10b5690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2852690, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x284ec10, v0x28522d0 {0 0 0}; + %store/vec4a v0x10b5690, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x10b1c10, v0x10b52d0 {0 0 0}; %end; .thread T_3; - .scope S_0x284ea00; + .scope S_0x10b1a00; T_4 ; - %wait E_0x27bdb80; - %load/vec4 v0x28525d0_0; + %wait E_0x1020b80; + %load/vec4 v0x10b55d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2000,7 +2000,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x2852800_0; + %load/vec4 v0x10b5800_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2015,185 +2015,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x284f300_0; + %load/vec4 v0x10b2300_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x28528e0_0; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b58e0_0; + %load/vec4 v0x10b2680_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2852d90_0, 4, 5; - %load/vec4 v0x284f680_0; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; + %load/vec4 v0x10b2680_0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28525d0_0, 0; - %load/vec4 v0x284f680_0; - %assign/vec4 v0x2852e30_0, 0; + %assign/vec4 v0x10b55d0_0, 0; + %load/vec4 v0x10b2680_0; + %assign/vec4 v0x10b5e30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28535e0_0, 4, 5; - %load/vec4 v0x284f680_0; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; + %load/vec4 v0x10b2680_0; + %assign/vec4 v0x10b5390_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x28528e0_0; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b58e0_0; + %load/vec4 v0x10b5390_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28525d0_0, 0; - %load/vec4 v0x2852390_0; - %assign/vec4 v0x2852e30_0, 0; + %assign/vec4 v0x10b55d0_0, 0; + %load/vec4 v0x10b5390_0; + %assign/vec4 v0x10b5e30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28535e0_0, 4, 5; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x284f680_0; + %load/vec4 v0x10b2680_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x2851c90_0; + %load/vec4 v0x10b4c90_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2201,29 +2201,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28525d0_0, 0; - %load/vec4 v0x284f680_0; - %assign/vec4 v0x2852e30_0, 0; + %assign/vec4 v0x10b55d0_0, 0; + %load/vec4 v0x10b2680_0; + %assign/vec4 v0x10b5e30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28535e0_0, 4, 5; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28535e0_0, 4, 5; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28535e0_0, 4, 5; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28535e0_0, 4, 5; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2231,10 +2231,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x284f300_0; + %load/vec4 v0x10b2300_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2301,180 +2301,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x284ef80_0; - %load/vec4 v0x2852ed0_0; + %load/vec4 v0x10b1f80_0; + %load/vec4 v0x10b5ed0_0; %add; - %assign/vec4 v0x284ef80_0, 0; - %load/vec4 v0x284f4c0_0; + %assign/vec4 v0x10b1f80_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x284ef80_0; - %load/vec4 v0x2852ed0_0; + %load/vec4 v0x10b1f80_0; + %load/vec4 v0x10b5ed0_0; %sub; - %assign/vec4 v0x284ef80_0, 0; - %load/vec4 v0x284f4c0_0; + %assign/vec4 v0x10b1f80_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b24c0_0; %pad/u 11; - %load/vec4 v0x2852ed0_0; + %load/vec4 v0x10b5ed0_0; %add; %pad/u 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x2852ed0_0; - %assign/vec4 v0x2853960_0, 0; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b5ed0_0; + %assign/vec4 v0x10b6960_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x284f220_0; - %assign/vec4 v0x2853960_0, 0; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b2220_0; + %assign/vec4 v0x10b6960_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x284ef80_0; - %load/vec4 v0x284f220_0; + %load/vec4 v0x10b1f80_0; + %load/vec4 v0x10b2220_0; %add; - %assign/vec4 v0x284ef80_0, 0; - %load/vec4 v0x284f4c0_0; + %assign/vec4 v0x10b1f80_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x284ef80_0; - %load/vec4 v0x284f220_0; + %load/vec4 v0x10b1f80_0; + %load/vec4 v0x10b2220_0; %sub; - %assign/vec4 v0x284ef80_0, 0; - %load/vec4 v0x284f4c0_0; + %assign/vec4 v0x10b1f80_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b24c0_0; %pad/u 11; - %load/vec4 v0x284f220_0; + %load/vec4 v0x10b2220_0; %add; %pad/u 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x284f080_0; - %assign/vec4 v0x284ef80_0, 0; - %load/vec4 v0x284ef80_0; - %assign/vec4 v0x284f080_0, 0; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b2080_0; + %assign/vec4 v0x10b1f80_0, 0; + %load/vec4 v0x10b1f80_0; + %assign/vec4 v0x10b2080_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x284ef80_0; - %assign/vec4 v0x284f080_0, 0; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b1f80_0; + %assign/vec4 v0x10b2080_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x284ef80_0; + %load/vec4 v0x10b1f80_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x284ef80_0, 0; - %load/vec4 v0x284f4c0_0; + %assign/vec4 v0x10b1f80_0, 0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x284f3e0_0; - %assign/vec4 v0x284f5a0_0, 0; + %load/vec4 v0x10b23e0_0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x284ef80_0; + %load/vec4 v0x10b1f80_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x284f3e0_0; - %assign/vec4 v0x284f5a0_0, 0; + %load/vec4 v0x10b23e0_0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x284ef80_0; + %load/vec4 v0x10b1f80_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x284f3e0_0; - %assign/vec4 v0x284f5a0_0, 0; + %load/vec4 v0x10b23e0_0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x284ef80_0; + %load/vec4 v0x10b1f80_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x284f3e0_0; - %assign/vec4 v0x284f5a0_0, 0; + %load/vec4 v0x10b23e0_0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x284ef80_0; + %load/vec4 v0x10b1f80_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x284f3e0_0; - %assign/vec4 v0x284f5a0_0, 0; + %load/vec4 v0x10b23e0_0; + %assign/vec4 v0x10b25a0_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x284f4c0_0; + %load/vec4 v0x10b24c0_0; %addi 1, 0, 4; - %assign/vec4 v0x284f5a0_0, 0; + %assign/vec4 v0x10b25a0_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x284f300_0; + %load/vec4 v0x10b2300_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x284f300_0; + %load/vec4 v0x10b2300_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x284f160_0; + %load/vec4 v0x10b2160_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x284f160_0; + %load/vec4 v0x10b2160_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2482,162 +2482,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x284f160_0; + %load/vec4 v0x10b2160_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x2853960_0; - %assign/vec4 v0x284ef80_0, 0; + %load/vec4 v0x10b6960_0; + %assign/vec4 v0x10b1f80_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28525d0_0, 0; - %load/vec4 v0x284f160_0; + %assign/vec4 v0x10b55d0_0, 0; + %load/vec4 v0x10b2160_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x2852390_0; - %assign/vec4 v0x2853880_0, 0; - %load/vec4 v0x2853960_0; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; + %assign/vec4 v0x10b6880_0, 0; + %load/vec4 v0x10b6960_0; + %load/vec4 v0x10b5390_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2852390_0; + %load/vec4 v0x10b5390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2853500_0, 4, 5; + %assign/vec4/off/d v0x10b6500_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x284f160_0; + %load/vec4 v0x10b2160_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x284f160_0; - %assign/vec4 v0x2853880_0, 0; - %load/vec4 v0x2853960_0; - %load/vec4 v0x284f160_0; + %load/vec4 v0x10b2160_0; + %assign/vec4 v0x10b6880_0, 0; + %load/vec4 v0x10b6960_0; + %load/vec4 v0x10b2160_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x284f160_0; + %load/vec4 v0x10b2160_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x284f160_0; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b2160_0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x2851e10_0; + %load/vec4 v0x10b4e10_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x284f160_0; - %assign/vec4 v0x2853880_0, 0; + %load/vec4 v0x10b2160_0; + %assign/vec4 v0x10b6880_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x2852800_0; + %load/vec4 v0x10b5800_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2652,82 +2652,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x2852e30_0; + %load/vec4 v0x10b5e30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x2851c90_0; + %load/vec4 v0x10b4c90_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28525d0_0, 0; + %assign/vec4 v0x10b55d0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28535e0_0, 0, 4; - %load/vec4 v0x28528e0_0; + %store/vec4 v0x10b65e0_0, 0, 4; + %load/vec4 v0x10b58e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x28528e0_0; + %load/vec4 v0x10b58e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2735,54 +2735,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x28528e0_0; - %load/vec4 v0x2852e30_0; + %load/vec4 v0x10b58e0_0; + %load/vec4 v0x10b5e30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28525d0_0, 0; - %load/vec4 v0x2852e30_0; + %assign/vec4 v0x10b55d0_0, 0; + %load/vec4 v0x10b5e30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2852f70, 4; - %assign/vec4 v0x2852ed0_0, 0; + %load/vec4a v0x10b5f70, 4; + %assign/vec4 v0x10b5ed0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2852e30_0; + %load/vec4 v0x10b5e30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2852d90_0, 4, 5; + %assign/vec4/off/d v0x10b5d90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2852e30_0; + %load/vec4 v0x10b5e30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28535e0_0, 4, 5; - %load/vec4 v0x2852e30_0; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4/off/d v0x10b65e0_0, 4, 5; + %load/vec4 v0x10b5e30_0; + %assign/vec4 v0x10b5390_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x2852800_0; + %load/vec4 v0x10b5800_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2798,93 +2798,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x2853880_0; + %load/vec4 v0x10b6880_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x2851e10_0; + %load/vec4 v0x10b4e10_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x2850d40_0; + %load/vec4 v0x10b3d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2853880_0, 0; + %assign/vec4 v0x10b6880_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2853500_0, 4, 5; - %load/vec4 v0x2853960_0; + %assign/vec4/off/d v0x10b6500_0, 4, 5; + %load/vec4 v0x10b6960_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2852690, 0, 4; + %assign/vec4/a/d v0x10b5690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b5390_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2892,33 +2892,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x2853880_0; + %load/vec4 v0x10b6880_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x28536c0_0; - %load/vec4 v0x2853880_0; + %load/vec4 v0x10b66c0_0; + %load/vec4 v0x10b6880_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x2853880_0; + %load/vec4 v0x10b6880_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x2853500_0, 4, 1; + %store/vec4 v0x10b6500_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28525d0_0, 0; - %load/vec4 v0x2853880_0; - %assign/vec4 v0x2852390_0, 0; + %assign/vec4 v0x10b55d0_0, 0; + %load/vec4 v0x10b6880_0; + %assign/vec4 v0x10b5390_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2852800_0, 0; + %assign/vec4 v0x10b5800_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2927,19 +2927,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x284ea00; + .scope S_0x10b1a00; T_5 ; - %wait E_0x279b3d0; - %load/vec4 v0x2852800_0; + %wait E_0xffe3d0; + %load/vec4 v0x10b5800_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x28525d0_0; + %load/vec4 v0x10b55d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x284f5a0_0; + %load/vec4 v0x10b25a0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2948,62 +2948,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x284f5a0_0; - %assign/vec4 v0x284f4c0_0, 0; + %load/vec4 v0x10b25a0_0; + %assign/vec4 v0x10b24c0_0, 0; T_5.0 ; - %load/vec4 v0x2852800_0; + %load/vec4 v0x10b5800_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2852d90_0, 0, 4; + %store/vec4 v0x10b5d90_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x2853be0; + .scope S_0x10b6be0; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2857810_0, 0, 3; + %store/vec4 v0x10ba810_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2857a60_0, 0, 3; + %store/vec4 v0x10baa60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2857570_0, 0, 3; + %store/vec4 v0x10ba570_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2854100_0, 0, 11; + %store/vec4 v0x10b7100_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2854200_0, 0, 11; + %store/vec4 v0x10b7200_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2854690_0, 0, 4; + %store/vec4 v0x10b7690_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2857ff0_0, 0, 4; + %store/vec4 v0x10baff0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2858840_0, 0, 4; + %store/vec4 v0x10bb840_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2858a00_0, 0, 4; + %store/vec4 v0x10bba00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2858760_0, 0, 4; + %store/vec4 v0x10bb760_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28578f0, 4, 0; + %store/vec4a v0x10ba8f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28578f0, 4, 0; + %store/vec4a v0x10ba8f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28578f0, 4, 0; + %store/vec4a v0x10ba8f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28578f0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x2853e40, v0x28574b0 {0 0 0}; + %store/vec4a v0x10ba8f0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x10b6e40, v0x10ba4b0 {0 0 0}; %end; .thread T_6; - .scope S_0x2853be0; + .scope S_0x10b6be0; T_7 ; - %wait E_0x27bdb80; - %load/vec4 v0x2857810_0; + %wait E_0x1020b80; + %load/vec4 v0x10ba810_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3018,7 +3018,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x2857a60_0; + %load/vec4 v0x10baa60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3033,185 +3033,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x2854480_0; + %load/vec4 v0x10b7480_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x2857b40_0; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10bab40_0; + %load/vec4 v0x10b7850_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; - %load/vec4 v0x2854850_0; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4/off/d v0x10baff0_0, 4, 5; + %load/vec4 v0x10b7850_0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2857810_0, 0; - %load/vec4 v0x2854850_0; - %assign/vec4 v0x2858090_0, 0; + %assign/vec4 v0x10ba810_0, 0; + %load/vec4 v0x10b7850_0; + %assign/vec4 v0x10bb090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2858840_0, 4, 5; - %load/vec4 v0x2854850_0; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4/off/d v0x10bb840_0, 4, 5; + %load/vec4 v0x10b7850_0; + %assign/vec4 v0x10ba570_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x2857b40_0; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10bab40_0; + %load/vec4 v0x10ba570_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2857810_0, 0; - %load/vec4 v0x2857570_0; - %assign/vec4 v0x2858090_0, 0; + %assign/vec4 v0x10ba810_0, 0; + %load/vec4 v0x10ba570_0; + %assign/vec4 v0x10bb090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2858840_0, 4, 5; + %assign/vec4/off/d v0x10bb840_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x2854850_0; + %load/vec4 v0x10b7850_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x2856e60_0; + %load/vec4 v0x10b9e60_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3219,29 +3219,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2857810_0, 0; - %load/vec4 v0x2854850_0; - %assign/vec4 v0x2858090_0, 0; + %assign/vec4 v0x10ba810_0, 0; + %load/vec4 v0x10b7850_0; + %assign/vec4 v0x10bb090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858840_0, 4, 5; + %assign/vec4/off/d v0x10bb840_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858840_0, 4, 5; + %assign/vec4/off/d v0x10bb840_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858840_0, 4, 5; + %assign/vec4/off/d v0x10bb840_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858840_0, 4, 5; + %assign/vec4/off/d v0x10bb840_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3249,10 +3249,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x2854480_0; + %load/vec4 v0x10b7480_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3319,180 +3319,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x2854100_0; - %load/vec4 v0x2858130_0; + %load/vec4 v0x10b7100_0; + %load/vec4 v0x10bb130_0; %add; - %assign/vec4 v0x2854100_0, 0; - %load/vec4 v0x2854690_0; + %assign/vec4 v0x10b7100_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x2854100_0; - %load/vec4 v0x2858130_0; + %load/vec4 v0x10b7100_0; + %load/vec4 v0x10bb130_0; %sub; - %assign/vec4 v0x2854100_0, 0; - %load/vec4 v0x2854690_0; + %assign/vec4 v0x10b7100_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7690_0; %pad/u 11; - %load/vec4 v0x2858130_0; + %load/vec4 v0x10bb130_0; %add; %pad/u 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x2858130_0; - %assign/vec4 v0x2858bc0_0, 0; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10bb130_0; + %assign/vec4 v0x10bbbc0_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x28543a0_0; - %assign/vec4 v0x2858bc0_0, 0; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b73a0_0; + %assign/vec4 v0x10bbbc0_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x2854100_0; - %load/vec4 v0x28543a0_0; + %load/vec4 v0x10b7100_0; + %load/vec4 v0x10b73a0_0; %add; - %assign/vec4 v0x2854100_0, 0; - %load/vec4 v0x2854690_0; + %assign/vec4 v0x10b7100_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x2854100_0; - %load/vec4 v0x28543a0_0; + %load/vec4 v0x10b7100_0; + %load/vec4 v0x10b73a0_0; %sub; - %assign/vec4 v0x2854100_0, 0; - %load/vec4 v0x2854690_0; + %assign/vec4 v0x10b7100_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7690_0; %pad/u 11; - %load/vec4 v0x28543a0_0; + %load/vec4 v0x10b73a0_0; %add; %pad/u 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x2854200_0; - %assign/vec4 v0x2854100_0, 0; - %load/vec4 v0x2854100_0; - %assign/vec4 v0x2854200_0, 0; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7200_0; + %assign/vec4 v0x10b7100_0, 0; + %load/vec4 v0x10b7100_0; + %assign/vec4 v0x10b7200_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x2854100_0; - %assign/vec4 v0x2854200_0, 0; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7100_0; + %assign/vec4 v0x10b7200_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x2854100_0; + %load/vec4 v0x10b7100_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2854100_0, 0; - %load/vec4 v0x2854690_0; + %assign/vec4 v0x10b7100_0, 0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x28545b0_0; - %assign/vec4 v0x2854770_0, 0; + %load/vec4 v0x10b75b0_0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x2854100_0; + %load/vec4 v0x10b7100_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x28545b0_0; - %assign/vec4 v0x2854770_0, 0; + %load/vec4 v0x10b75b0_0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x2854100_0; + %load/vec4 v0x10b7100_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x28545b0_0; - %assign/vec4 v0x2854770_0, 0; + %load/vec4 v0x10b75b0_0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2854100_0; + %load/vec4 v0x10b7100_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x28545b0_0; - %assign/vec4 v0x2854770_0, 0; + %load/vec4 v0x10b75b0_0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x2854100_0; + %load/vec4 v0x10b7100_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x28545b0_0; - %assign/vec4 v0x2854770_0, 0; + %load/vec4 v0x10b75b0_0; + %assign/vec4 v0x10b7770_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x2854690_0; + %load/vec4 v0x10b7690_0; %addi 1, 0, 4; - %assign/vec4 v0x2854770_0, 0; + %assign/vec4 v0x10b7770_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x2854480_0; + %load/vec4 v0x10b7480_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x2854480_0; + %load/vec4 v0x10b7480_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x28542e0_0; + %load/vec4 v0x10b72e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x28542e0_0; + %load/vec4 v0x10b72e0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3500,162 +3500,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x28542e0_0; + %load/vec4 v0x10b72e0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x2858bc0_0; - %assign/vec4 v0x2854100_0, 0; + %load/vec4 v0x10bbbc0_0; + %assign/vec4 v0x10b7100_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857810_0, 0; - %load/vec4 v0x28542e0_0; + %assign/vec4 v0x10ba810_0, 0; + %load/vec4 v0x10b72e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x2857570_0; - %assign/vec4 v0x2858ae0_0, 0; - %load/vec4 v0x2858bc0_0; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; + %assign/vec4 v0x10bbae0_0, 0; + %load/vec4 v0x10bbbc0_0; + %load/vec4 v0x10ba570_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2857570_0; + %load/vec4 v0x10ba570_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2858760_0, 4, 5; + %assign/vec4/off/d v0x10bb760_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x28542e0_0; + %load/vec4 v0x10b72e0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x28542e0_0; - %assign/vec4 v0x2858ae0_0, 0; - %load/vec4 v0x2858bc0_0; - %load/vec4 v0x28542e0_0; + %load/vec4 v0x10b72e0_0; + %assign/vec4 v0x10bbae0_0, 0; + %load/vec4 v0x10bbbc0_0; + %load/vec4 v0x10b72e0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28542e0_0; + %load/vec4 v0x10b72e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x28542e0_0; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10b72e0_0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x2856fe0_0; + %load/vec4 v0x10b9fe0_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x28542e0_0; - %assign/vec4 v0x2858ae0_0, 0; + %load/vec4 v0x10b72e0_0; + %assign/vec4 v0x10bbae0_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x2857a60_0; + %load/vec4 v0x10baa60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3670,82 +3670,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x2858090_0; + %load/vec4 v0x10bb090_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x2856e60_0; + %load/vec4 v0x10b9e60_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2857810_0, 0; + %assign/vec4 v0x10ba810_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2858840_0, 0, 4; - %load/vec4 v0x2857b40_0; + %store/vec4 v0x10bb840_0, 0, 4; + %load/vec4 v0x10bab40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x2857b40_0; + %load/vec4 v0x10bab40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3753,54 +3753,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x2857b40_0; - %load/vec4 v0x2858090_0; + %load/vec4 v0x10bab40_0; + %load/vec4 v0x10bb090_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2857810_0, 0; - %load/vec4 v0x2858090_0; + %assign/vec4 v0x10ba810_0, 0; + %load/vec4 v0x10bb090_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x28581d0, 4; - %assign/vec4 v0x2858130_0, 0; + %load/vec4a v0x10bb1d0, 4; + %assign/vec4 v0x10bb130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2858090_0; + %load/vec4 v0x10bb090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2857ff0_0, 4, 5; + %assign/vec4/off/d v0x10baff0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2858090_0; + %load/vec4 v0x10bb090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2858840_0, 4, 5; - %load/vec4 v0x2858090_0; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4/off/d v0x10bb840_0, 4, 5; + %load/vec4 v0x10bb090_0; + %assign/vec4 v0x10ba570_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x2857a60_0; + %load/vec4 v0x10baa60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3816,93 +3816,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x2858ae0_0; + %load/vec4 v0x10bbae0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x2856fe0_0; + %load/vec4 v0x10b9fe0_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x2855f10_0; + %load/vec4 v0x10b8f10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2858ae0_0, 0; + %assign/vec4 v0x10bbae0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2858760_0, 4, 5; - %load/vec4 v0x2858bc0_0; + %assign/vec4/off/d v0x10bb760_0, 4, 5; + %load/vec4 v0x10bbbc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28578f0, 0, 4; + %assign/vec4/a/d v0x10ba8f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba570_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3910,33 +3910,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x2858ae0_0; + %load/vec4 v0x10bbae0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x2858920_0; - %load/vec4 v0x2858ae0_0; + %load/vec4 v0x10bb920_0; + %load/vec4 v0x10bbae0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x2858ae0_0; + %load/vec4 v0x10bbae0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x2858760_0, 4, 1; + %store/vec4 v0x10bb760_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2857810_0, 0; - %load/vec4 v0x2858ae0_0; - %assign/vec4 v0x2857570_0, 0; + %assign/vec4 v0x10ba810_0, 0; + %load/vec4 v0x10bbae0_0; + %assign/vec4 v0x10ba570_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2857a60_0, 0; + %assign/vec4 v0x10baa60_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3945,19 +3945,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x2853be0; + .scope S_0x10b6be0; T_8 ; - %wait E_0x279b3d0; - %load/vec4 v0x2857a60_0; + %wait E_0xffe3d0; + %load/vec4 v0x10baa60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2857810_0; + %load/vec4 v0x10ba810_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x2854770_0; + %load/vec4 v0x10b7770_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3966,62 +3966,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x2854770_0; - %assign/vec4 v0x2854690_0, 0; + %load/vec4 v0x10b7770_0; + %assign/vec4 v0x10b7690_0, 0; T_8.0 ; - %load/vec4 v0x2857a60_0; + %load/vec4 v0x10baa60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2857ff0_0, 0, 4; + %store/vec4 v0x10baff0_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x2844600; + .scope S_0x10a7600; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2848210_0, 0, 3; + %store/vec4 v0x10ab210_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2848430_0, 0, 3; + %store/vec4 v0x10ab430_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2847f70_0, 0, 3; + %store/vec4 v0x10aaf70_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2844b80_0, 0, 11; + %store/vec4 v0x10a7b80_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2844c80_0, 0, 11; + %store/vec4 v0x10a7c80_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28450c0_0, 0, 4; + %store/vec4 v0x10a80c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28489c0_0, 0, 4; + %store/vec4 v0x10ab9c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28491f0_0, 0, 4; + %store/vec4 v0x10ac1f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28493b0_0, 0, 4; + %store/vec4 v0x10ac3b0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2849130_0, 0, 4; + %store/vec4 v0x10ac130_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28482f0, 4, 0; + %store/vec4a v0x10ab2f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28482f0, 4, 0; + %store/vec4a v0x10ab2f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28482f0, 4, 0; + %store/vec4a v0x10ab2f0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x28482f0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x2844830, v0x2847eb0 {0 0 0}; + %store/vec4a v0x10ab2f0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x10a7830, v0x10aaeb0 {0 0 0}; %end; .thread T_9; - .scope S_0x2844600; + .scope S_0x10a7600; T_10 ; - %wait E_0x27bdb80; - %load/vec4 v0x2848210_0; + %wait E_0x1020b80; + %load/vec4 v0x10ab210_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4036,7 +4036,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x2848430_0; + %load/vec4 v0x10ab430_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4051,185 +4051,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x2844f00_0; + %load/vec4 v0x10a7f00_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x2848510_0; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10ab510_0; + %load/vec4 v0x10a8280_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28489c0_0, 4, 5; - %load/vec4 v0x2845280_0; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; + %load/vec4 v0x10a8280_0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2848210_0, 0; - %load/vec4 v0x2845280_0; - %assign/vec4 v0x2848a60_0, 0; + %assign/vec4 v0x10ab210_0, 0; + %load/vec4 v0x10a8280_0; + %assign/vec4 v0x10aba60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28491f0_0, 4, 5; - %load/vec4 v0x2845280_0; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; + %load/vec4 v0x10a8280_0; + %assign/vec4 v0x10aaf70_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x2848510_0; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10ab510_0; + %load/vec4 v0x10aaf70_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2848210_0, 0; - %load/vec4 v0x2847f70_0; - %assign/vec4 v0x2848a60_0, 0; + %assign/vec4 v0x10ab210_0, 0; + %load/vec4 v0x10aaf70_0; + %assign/vec4 v0x10aba60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28491f0_0, 4, 5; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x2845280_0; + %load/vec4 v0x10a8280_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x2847890_0; + %load/vec4 v0x10aa890_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4237,29 +4237,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2848210_0, 0; - %load/vec4 v0x2845280_0; - %assign/vec4 v0x2848a60_0, 0; + %assign/vec4 v0x10ab210_0, 0; + %load/vec4 v0x10a8280_0; + %assign/vec4 v0x10aba60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28491f0_0, 4, 5; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28491f0_0, 4, 5; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28491f0_0, 4, 5; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28491f0_0, 4, 5; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4267,10 +4267,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x2844f00_0; + %load/vec4 v0x10a7f00_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4337,180 +4337,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x2844b80_0; - %load/vec4 v0x2848b00_0; + %load/vec4 v0x10a7b80_0; + %load/vec4 v0x10abb00_0; %add; - %assign/vec4 v0x2844b80_0, 0; - %load/vec4 v0x28450c0_0; + %assign/vec4 v0x10a7b80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x2844b80_0; - %load/vec4 v0x2848b00_0; + %load/vec4 v0x10a7b80_0; + %load/vec4 v0x10abb00_0; %sub; - %assign/vec4 v0x2844b80_0, 0; - %load/vec4 v0x28450c0_0; + %assign/vec4 v0x10a7b80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a80c0_0; %pad/u 11; - %load/vec4 v0x2848b00_0; + %load/vec4 v0x10abb00_0; %add; %pad/u 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x2848b00_0; - %assign/vec4 v0x2849570_0, 0; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10abb00_0; + %assign/vec4 v0x10ac570_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x2844e20_0; - %assign/vec4 v0x2849570_0, 0; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a7e20_0; + %assign/vec4 v0x10ac570_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x2844b80_0; - %load/vec4 v0x2844e20_0; + %load/vec4 v0x10a7b80_0; + %load/vec4 v0x10a7e20_0; %add; - %assign/vec4 v0x2844b80_0, 0; - %load/vec4 v0x28450c0_0; + %assign/vec4 v0x10a7b80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x2844b80_0; - %load/vec4 v0x2844e20_0; + %load/vec4 v0x10a7b80_0; + %load/vec4 v0x10a7e20_0; %sub; - %assign/vec4 v0x2844b80_0, 0; - %load/vec4 v0x28450c0_0; + %assign/vec4 v0x10a7b80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a80c0_0; %pad/u 11; - %load/vec4 v0x2844e20_0; + %load/vec4 v0x10a7e20_0; %add; %pad/u 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x2844c80_0; - %assign/vec4 v0x2844b80_0, 0; - %load/vec4 v0x2844b80_0; - %assign/vec4 v0x2844c80_0, 0; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a7c80_0; + %assign/vec4 v0x10a7b80_0, 0; + %load/vec4 v0x10a7b80_0; + %assign/vec4 v0x10a7c80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x2844b80_0; - %assign/vec4 v0x2844c80_0, 0; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a7b80_0; + %assign/vec4 v0x10a7c80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x2844b80_0; + %load/vec4 v0x10a7b80_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2844b80_0, 0; - %load/vec4 v0x28450c0_0; + %assign/vec4 v0x10a7b80_0, 0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x2844fe0_0; - %assign/vec4 v0x28451a0_0, 0; + %load/vec4 v0x10a7fe0_0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x2844b80_0; + %load/vec4 v0x10a7b80_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x2844fe0_0; - %assign/vec4 v0x28451a0_0, 0; + %load/vec4 v0x10a7fe0_0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x2844b80_0; + %load/vec4 v0x10a7b80_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x2844fe0_0; - %assign/vec4 v0x28451a0_0, 0; + %load/vec4 v0x10a7fe0_0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2844b80_0; + %load/vec4 v0x10a7b80_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x2844fe0_0; - %assign/vec4 v0x28451a0_0, 0; + %load/vec4 v0x10a7fe0_0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x2844b80_0; + %load/vec4 v0x10a7b80_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x2844fe0_0; - %assign/vec4 v0x28451a0_0, 0; + %load/vec4 v0x10a7fe0_0; + %assign/vec4 v0x10a81a0_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x28450c0_0; + %load/vec4 v0x10a80c0_0; %addi 1, 0, 4; - %assign/vec4 v0x28451a0_0, 0; + %assign/vec4 v0x10a81a0_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x2844f00_0; + %load/vec4 v0x10a7f00_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x2844f00_0; + %load/vec4 v0x10a7f00_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x2844d60_0; + %load/vec4 v0x10a7d60_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x2844d60_0; + %load/vec4 v0x10a7d60_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4518,162 +4518,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x2844d60_0; + %load/vec4 v0x10a7d60_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x2849570_0; - %assign/vec4 v0x2844b80_0, 0; + %load/vec4 v0x10ac570_0; + %assign/vec4 v0x10a7b80_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2848210_0, 0; - %load/vec4 v0x2844d60_0; + %assign/vec4 v0x10ab210_0, 0; + %load/vec4 v0x10a7d60_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x2847f70_0; - %assign/vec4 v0x2849490_0, 0; - %load/vec4 v0x2849570_0; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; + %assign/vec4 v0x10ac490_0, 0; + %load/vec4 v0x10ac570_0; + %load/vec4 v0x10aaf70_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2847f70_0; + %load/vec4 v0x10aaf70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2849130_0, 4, 5; + %assign/vec4/off/d v0x10ac130_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x2844d60_0; + %load/vec4 v0x10a7d60_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x2844d60_0; - %assign/vec4 v0x2849490_0, 0; - %load/vec4 v0x2849570_0; - %load/vec4 v0x2844d60_0; + %load/vec4 v0x10a7d60_0; + %assign/vec4 v0x10ac490_0, 0; + %load/vec4 v0x10ac570_0; + %load/vec4 v0x10a7d60_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2844d60_0; + %load/vec4 v0x10a7d60_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2844d60_0; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10a7d60_0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x2847a10_0; + %load/vec4 v0x10aaa10_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x2844d60_0; - %assign/vec4 v0x2849490_0, 0; + %load/vec4 v0x10a7d60_0; + %assign/vec4 v0x10ac490_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x2848430_0; + %load/vec4 v0x10ab430_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4688,82 +4688,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x2848a60_0; + %load/vec4 v0x10aba60_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x2847890_0; + %load/vec4 v0x10aa890_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2848210_0, 0; + %assign/vec4 v0x10ab210_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28491f0_0, 0, 4; - %load/vec4 v0x2848510_0; + %store/vec4 v0x10ac1f0_0, 0, 4; + %load/vec4 v0x10ab510_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x2848510_0; + %load/vec4 v0x10ab510_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4771,54 +4771,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x2848510_0; - %load/vec4 v0x2848a60_0; + %load/vec4 v0x10ab510_0; + %load/vec4 v0x10aba60_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2848210_0, 0; - %load/vec4 v0x2848a60_0; + %assign/vec4 v0x10ab210_0, 0; + %load/vec4 v0x10aba60_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2848ba0, 4; - %assign/vec4 v0x2848b00_0, 0; + %load/vec4a v0x10abba0, 4; + %assign/vec4 v0x10abb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2848a60_0; + %load/vec4 v0x10aba60_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28489c0_0, 4, 5; + %assign/vec4/off/d v0x10ab9c0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2848a60_0; + %load/vec4 v0x10aba60_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x28491f0_0, 4, 5; - %load/vec4 v0x2848a60_0; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4/off/d v0x10ac1f0_0, 4, 5; + %load/vec4 v0x10aba60_0; + %assign/vec4 v0x10aaf70_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x2848430_0; + %load/vec4 v0x10ab430_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4834,93 +4834,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x2849490_0; + %load/vec4 v0x10ac490_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x2847a10_0; + %load/vec4 v0x10aaa10_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x2846940_0; + %load/vec4 v0x10a9940_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2849490_0, 0; + %assign/vec4 v0x10ac490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2849130_0, 4, 5; - %load/vec4 v0x2849570_0; + %assign/vec4/off/d v0x10ac130_0, 4, 5; + %load/vec4 v0x10ac570_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x28482f0, 0, 4; + %assign/vec4/a/d v0x10ab2f0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10aaf70_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4928,33 +4928,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x2849490_0; + %load/vec4 v0x10ac490_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x28492d0_0; - %load/vec4 v0x2849490_0; + %load/vec4 v0x10ac2d0_0; + %load/vec4 v0x10ac490_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x2849490_0; + %load/vec4 v0x10ac490_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x2849130_0, 4, 1; + %store/vec4 v0x10ac130_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2848210_0, 0; - %load/vec4 v0x2849490_0; - %assign/vec4 v0x2847f70_0, 0; + %assign/vec4 v0x10ab210_0, 0; + %load/vec4 v0x10ac490_0; + %assign/vec4 v0x10aaf70_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2848430_0, 0; + %assign/vec4 v0x10ab430_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4963,19 +4963,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x2844600; + .scope S_0x10a7600; T_11 ; - %wait E_0x279b3d0; - %load/vec4 v0x2848430_0; + %wait E_0xffe3d0; + %load/vec4 v0x10ab430_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2848210_0; + %load/vec4 v0x10ab210_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x28451a0_0; + %load/vec4 v0x10a81a0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4984,62 +4984,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x28451a0_0; - %assign/vec4 v0x28450c0_0, 0; + %load/vec4 v0x10a81a0_0; + %assign/vec4 v0x10a80c0_0, 0; T_11.0 ; - %load/vec4 v0x2848430_0; + %load/vec4 v0x10ab430_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28489c0_0, 0, 4; + %store/vec4 v0x10ab9c0_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x278a540; + .scope S_0xfed540; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2842f80_0, 0, 3; + %store/vec4 v0x10a5f80_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x28431a0_0, 0, 3; + %store/vec4 v0x10a61a0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x2842ce0_0, 0, 3; + %store/vec4 v0x10a5ce0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x2800240_0, 0, 11; + %store/vec4 v0x1063240_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x283f930_0, 0, 11; + %store/vec4 v0x10a2930_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x283fdf0_0, 0, 4; + %store/vec4 v0x10a2df0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2843730_0, 0, 4; + %store/vec4 v0x10a6730_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2844000_0, 0, 4; + %store/vec4 v0x10a7000_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x28441c0_0, 0, 4; + %store/vec4 v0x10a71c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2843f20_0, 0, 4; + %store/vec4 v0x10a6f20_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2843060, 4, 0; + %store/vec4a v0x10a6060, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2843060, 4, 0; + %store/vec4a v0x10a6060, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2843060, 4, 0; + %store/vec4a v0x10a6060, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x2843060, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x27da640, v0x2842c20 {0 0 0}; + %store/vec4a v0x10a6060, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x103d640, v0x10a5c20 {0 0 0}; %end; .thread T_12; - .scope S_0x278a540; + .scope S_0xfed540; T_13 ; - %wait E_0x27bdb80; - %load/vec4 v0x2842f80_0; + %wait E_0x1020b80; + %load/vec4 v0x10a5f80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5054,7 +5054,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x28431a0_0; + %load/vec4 v0x10a61a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5069,185 +5069,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x283fbe0_0; + %load/vec4 v0x10a2be0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x2843280_0; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a6280_0; + %load/vec4 v0x10a2fb0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2843730_0, 4, 5; - %load/vec4 v0x283ffb0_0; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4/off/d v0x10a6730_0, 4, 5; + %load/vec4 v0x10a2fb0_0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2842f80_0, 0; - %load/vec4 v0x283ffb0_0; - %assign/vec4 v0x28437d0_0, 0; + %assign/vec4 v0x10a5f80_0, 0; + %load/vec4 v0x10a2fb0_0; + %assign/vec4 v0x10a67d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2844000_0, 4, 5; - %load/vec4 v0x283ffb0_0; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4/off/d v0x10a7000_0, 4, 5; + %load/vec4 v0x10a2fb0_0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x2843280_0; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a6280_0; + %load/vec4 v0x10a5ce0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2842f80_0, 0; - %load/vec4 v0x2842ce0_0; - %assign/vec4 v0x28437d0_0, 0; + %assign/vec4 v0x10a5f80_0, 0; + %load/vec4 v0x10a5ce0_0; + %assign/vec4 v0x10a67d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2844000_0, 4, 5; + %assign/vec4/off/d v0x10a7000_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x283ffb0_0; + %load/vec4 v0x10a2fb0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x28425c0_0; + %load/vec4 v0x10a55c0_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5255,29 +5255,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x2842f80_0, 0; - %load/vec4 v0x283ffb0_0; - %assign/vec4 v0x28437d0_0, 0; + %assign/vec4 v0x10a5f80_0, 0; + %load/vec4 v0x10a2fb0_0; + %assign/vec4 v0x10a67d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2844000_0, 4, 5; + %assign/vec4/off/d v0x10a7000_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2844000_0, 4, 5; + %assign/vec4/off/d v0x10a7000_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2844000_0, 4, 5; + %assign/vec4/off/d v0x10a7000_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2844000_0, 4, 5; + %assign/vec4/off/d v0x10a7000_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5285,10 +5285,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x283fbe0_0; + %load/vec4 v0x10a2be0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5355,180 +5355,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x2800240_0; - %load/vec4 v0x28438b0_0; + %load/vec4 v0x1063240_0; + %load/vec4 v0x10a68b0_0; %add; - %assign/vec4 v0x2800240_0, 0; - %load/vec4 v0x283fdf0_0; + %assign/vec4 v0x1063240_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x2800240_0; - %load/vec4 v0x28438b0_0; + %load/vec4 v0x1063240_0; + %load/vec4 v0x10a68b0_0; %sub; - %assign/vec4 v0x2800240_0, 0; - %load/vec4 v0x283fdf0_0; + %assign/vec4 v0x1063240_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2df0_0; %pad/u 11; - %load/vec4 v0x28438b0_0; + %load/vec4 v0x10a68b0_0; %add; %pad/u 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x28438b0_0; - %assign/vec4 v0x2844380_0, 0; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a68b0_0; + %assign/vec4 v0x10a7380_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x283fb00_0; - %assign/vec4 v0x2844380_0, 0; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2b00_0; + %assign/vec4 v0x10a7380_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x2800240_0; - %load/vec4 v0x283fb00_0; + %load/vec4 v0x1063240_0; + %load/vec4 v0x10a2b00_0; %add; - %assign/vec4 v0x2800240_0, 0; - %load/vec4 v0x283fdf0_0; + %assign/vec4 v0x1063240_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x2800240_0; - %load/vec4 v0x283fb00_0; + %load/vec4 v0x1063240_0; + %load/vec4 v0x10a2b00_0; %sub; - %assign/vec4 v0x2800240_0, 0; - %load/vec4 v0x283fdf0_0; + %assign/vec4 v0x1063240_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2df0_0; %pad/u 11; - %load/vec4 v0x283fb00_0; + %load/vec4 v0x10a2b00_0; %add; %pad/u 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x283f930_0; - %assign/vec4 v0x2800240_0, 0; - %load/vec4 v0x2800240_0; - %assign/vec4 v0x283f930_0, 0; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2930_0; + %assign/vec4 v0x1063240_0, 0; + %load/vec4 v0x1063240_0; + %assign/vec4 v0x10a2930_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x2800240_0; - %assign/vec4 v0x283f930_0, 0; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x1063240_0; + %assign/vec4 v0x10a2930_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x2800240_0; + %load/vec4 v0x1063240_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x2800240_0, 0; - %load/vec4 v0x283fdf0_0; + %assign/vec4 v0x1063240_0, 0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x283fd10_0; - %assign/vec4 v0x283fed0_0, 0; + %load/vec4 v0x10a2d10_0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x2800240_0; + %load/vec4 v0x1063240_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x283fd10_0; - %assign/vec4 v0x283fed0_0, 0; + %load/vec4 v0x10a2d10_0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x2800240_0; + %load/vec4 v0x1063240_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x283fd10_0; - %assign/vec4 v0x283fed0_0, 0; + %load/vec4 v0x10a2d10_0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x2800240_0; + %load/vec4 v0x1063240_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x283fd10_0; - %assign/vec4 v0x283fed0_0, 0; + %load/vec4 v0x10a2d10_0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x2800240_0; + %load/vec4 v0x1063240_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x283fd10_0; - %assign/vec4 v0x283fed0_0, 0; + %load/vec4 v0x10a2d10_0; + %assign/vec4 v0x10a2ed0_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x283fdf0_0; + %load/vec4 v0x10a2df0_0; %addi 1, 0, 4; - %assign/vec4 v0x283fed0_0, 0; + %assign/vec4 v0x10a2ed0_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x283fbe0_0; + %load/vec4 v0x10a2be0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x283fbe0_0; + %load/vec4 v0x10a2be0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x283fa10_0; + %load/vec4 v0x10a2a10_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x283fa10_0; + %load/vec4 v0x10a2a10_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5536,162 +5536,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x283fa10_0; + %load/vec4 v0x10a2a10_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x2844380_0; - %assign/vec4 v0x2800240_0, 0; + %load/vec4 v0x10a7380_0; + %assign/vec4 v0x1063240_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2842f80_0, 0; - %load/vec4 v0x283fa10_0; + %assign/vec4 v0x10a5f80_0, 0; + %load/vec4 v0x10a2a10_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x2842ce0_0; - %assign/vec4 v0x28442a0_0, 0; - %load/vec4 v0x2844380_0; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; + %assign/vec4 v0x10a72a0_0, 0; + %load/vec4 v0x10a7380_0; + %load/vec4 v0x10a5ce0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x2842ce0_0; + %load/vec4 v0x10a5ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2843f20_0, 4, 5; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x283fa10_0; + %load/vec4 v0x10a2a10_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x283fa10_0; - %assign/vec4 v0x28442a0_0, 0; - %load/vec4 v0x2844380_0; - %load/vec4 v0x283fa10_0; + %load/vec4 v0x10a2a10_0; + %assign/vec4 v0x10a72a0_0, 0; + %load/vec4 v0x10a7380_0; + %load/vec4 v0x10a2a10_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x283fa10_0; + %load/vec4 v0x10a2a10_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x283fa10_0; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a2a10_0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x2842740_0; + %load/vec4 v0x10a5740_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x283fa10_0; - %assign/vec4 v0x28442a0_0, 0; + %load/vec4 v0x10a2a10_0; + %assign/vec4 v0x10a72a0_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x28431a0_0; + %load/vec4 v0x10a61a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5706,82 +5706,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x28437d0_0; + %load/vec4 v0x10a67d0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x28425c0_0; + %load/vec4 v0x10a55c0_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2842f80_0, 0; + %assign/vec4 v0x10a5f80_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2844000_0, 0, 4; - %load/vec4 v0x2843280_0; + %store/vec4 v0x10a7000_0, 0, 4; + %load/vec4 v0x10a6280_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x2843280_0; + %load/vec4 v0x10a6280_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5789,54 +5789,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x2843280_0; - %load/vec4 v0x28437d0_0; + %load/vec4 v0x10a6280_0; + %load/vec4 v0x10a67d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2842f80_0, 0; - %load/vec4 v0x28437d0_0; + %assign/vec4 v0x10a5f80_0, 0; + %load/vec4 v0x10a67d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x2843990, 4; - %assign/vec4 v0x28438b0_0, 0; + %load/vec4a v0x10a6990, 4; + %assign/vec4 v0x10a68b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28437d0_0; + %load/vec4 v0x10a67d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2843730_0, 4, 5; + %assign/vec4/off/d v0x10a6730_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x28437d0_0; + %load/vec4 v0x10a67d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x2844000_0, 4, 5; - %load/vec4 v0x28437d0_0; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4/off/d v0x10a7000_0, 4, 5; + %load/vec4 v0x10a67d0_0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x28431a0_0; + %load/vec4 v0x10a61a0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5852,93 +5852,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x28442a0_0; + %load/vec4 v0x10a72a0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x2842740_0; + %load/vec4 v0x10a5740_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x2841670_0; + %load/vec4 v0x10a4670_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x28442a0_0, 0; + %assign/vec4 v0x10a72a0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x2843f20_0, 4, 5; - %load/vec4 v0x2844380_0; + %assign/vec4/off/d v0x10a6f20_0, 4, 5; + %load/vec4 v0x10a7380_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x2843060, 0, 4; + %assign/vec4/a/d v0x10a6060, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5946,33 +5946,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x28442a0_0; + %load/vec4 v0x10a72a0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x28440e0_0; - %load/vec4 v0x28442a0_0; + %load/vec4 v0x10a70e0_0; + %load/vec4 v0x10a72a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x28442a0_0; + %load/vec4 v0x10a72a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x2843f20_0, 4, 1; + %store/vec4 v0x10a6f20_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x2842f80_0, 0; - %load/vec4 v0x28442a0_0; - %assign/vec4 v0x2842ce0_0, 0; + %assign/vec4 v0x10a5f80_0, 0; + %load/vec4 v0x10a72a0_0; + %assign/vec4 v0x10a5ce0_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x28431a0_0, 0; + %assign/vec4 v0x10a61a0_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5981,19 +5981,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x278a540; + .scope S_0xfed540; T_14 ; - %wait E_0x279b3d0; - %load/vec4 v0x28431a0_0; + %wait E_0xffe3d0; + %load/vec4 v0x10a61a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x2842f80_0; + %load/vec4 v0x10a5f80_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x283fed0_0; + %load/vec4 v0x10a2ed0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -6002,93 +6002,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x283fed0_0; - %assign/vec4 v0x283fdf0_0, 0; + %load/vec4 v0x10a2ed0_0; + %assign/vec4 v0x10a2df0_0, 0; T_14.0 ; - %load/vec4 v0x28431a0_0; + %load/vec4 v0x10a61a0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x2843730_0, 0, 4; + %store/vec4 v0x10a6730_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x27b21e0; + .scope S_0x10151e0; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x2859c20_0, 0, 33; + %store/vec4 v0x10bcc20_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2859b80_0, 0, 1; + %store/vec4 v0x10bcb80_0, 0, 1; %pushi/vec4 0, 0, 33; - %store/vec4 v0x2859c20_0, 0, 33; + %store/vec4 v0x10bcc20_0, 0, 33; T_15.0 ; - %load/vec4 v0x2859c20_0; + %load/vec4 v0x10bcc20_0; %cmpi/u 10, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859ae0_0, 0, 1; + %store/vec4 v0x10bcae0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2859ae0_0, 0, 1; + %store/vec4 v0x10bcae0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859ae0_0, 0, 1; + %store/vec4 v0x10bcae0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2859ae0_0, 0, 1; + %store/vec4 v0x10bcae0_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859ae0_0, 0, 1; + %store/vec4 v0x10bcae0_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x2859ae0_0, 0, 1; + %store/vec4 v0x10bcae0_0, 0, 1; %delay 1, 0; - %load/vec4 v0x2859c20_0; + %load/vec4 v0x10bcc20_0; %addi 1, 0, 33; - %store/vec4 v0x2859c20_0, 0, 33; + %store/vec4 v0x10bcc20_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x2859a40_0; + %load/vec4 v0x10bca40_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.2, 4; %vpi_call 2 51 "$display", "Failed on up test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859b80_0, 0, 1; + %store/vec4 v0x10bcb80_0, 0, 1; T_15.2 ; - %load/vec4 v0x2859900_0; + %load/vec4 v0x10bc900_0; %pad/s 32; %cmpi/ne 2, 0, 32; %jmp/0xz T_15.4, 4; %vpi_call 2 55 "$display", "Failed on left test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859b80_0, 0, 1; + %store/vec4 v0x10bcb80_0, 0, 1; T_15.4 ; - %load/vec4 v0x28599a0_0; + %load/vec4 v0x10bc9a0_0; %pad/s 32; %cmpi/ne 3, 0, 32; %jmp/0xz T_15.6, 4; %vpi_call 2 59 "$display", "Failed on right test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859b80_0, 0, 1; + %store/vec4 v0x10bcb80_0, 0, 1; T_15.6 ; - %load/vec4 v0x2859860_0; + %load/vec4 v0x10bc860_0; %pad/s 32; %cmpi/ne 4, 0, 32; %jmp/0xz T_15.8, 4; %vpi_call 2 63 "$display", "Failed on down test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859b80_0, 0, 1; + %store/vec4 v0x10bcb80_0, 0, 1; T_15.8 ; - %load/vec4 v0x2859710_0; + %load/vec4 v0x10bc710_0; %pad/s 32; %cmpi/ne 5, 0, 32; %jmp/0xz T_15.10, 4; %vpi_call 2 67 "$display", "Failed on center test of anyWrite" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x2859b80_0, 0, 1; + %store/vec4 v0x10bcb80_0, 0, 1; T_15.10 ; - %load/vec4 v0x2859b80_0; + %load/vec4 v0x10bcb80_0; %flag_set/vec4 8; %jmp/0xz T_15.12, 8; %vpi_call 2 71 "$display", "DUT passed anyWrite" {0 0 0}; diff --git a/demo/demo b/demo/demo index a4cabe3..be2f732 100755 --- a/demo/demo +++ b/demo/demo @@ -6,54 +6,54 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x1c89a30 .scope module, "stackMemory" "stackMemory" 2 11; +S_0x21d2520 .scope module, "stackMemory" "stackMemory" 2 11; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "in" .port_info 2 /OUTPUT 15 "out" -P_0x1da0d60 .param/l "initialpointer" 0 2 15, +C4<00000000000000000000000000000000>; -P_0x1da0da0 .param/l "loadmemory" 0 2 13, +C4<00000000000000000000000000000000>; -P_0x1da0de0 .param/str "memoryfile" 0 2 14, "mem.dat"; -v0x1cff4c0_0 .net *"_s2", 0 0, L_0x1e01d00; 1 drivers -v0x1dd1d10_0 .net *"_s6", 0 0, L_0x1e01da0; 1 drivers -o0x2b89f58f6078 .functor BUFZ 1, C4; HiZ drive -v0x1dd1df0_0 .net "clk", 0 0, o0x2b89f58f6078; 0 drivers -o0x2b89f58f60a8 .functor BUFZ 15, C4; HiZ drive -v0x1dd1ec0_0 .net "in", 14 0, o0x2b89f58f60a8; 0 drivers -v0x1dd1fa0 .array "mem", 1 15, 10 0; -v0x1dd20b0_0 .var "out", 14 0; -v0x1dd2190_0 .var "phase", 2 0; -v0x1dd2270_0 .var "pointer", 3 0; -E_0x1c95390 .event negedge, v0x1dd1df0_0; -E_0x1cc17e0 .event posedge, v0x1dd1df0_0; -E_0x1cbd520 .event edge, v0x1dd2270_0; -E_0x1cb1f20 .event posedge, L_0x1e01da0; -E_0x1d39760 .event posedge, L_0x1e01d00; -L_0x1e01d00 .part o0x2b89f58f60a8, 14, 1; -L_0x1e01da0 .part o0x2b89f58f60a8, 13, 1; -S_0x1cc1e10 .scope module, "tis100Test" "tis100Test" 3 3; +P_0x230f510 .param/l "initialpointer" 0 2 15, +C4<00000000000000000000000000000000>; +P_0x230f550 .param/l "loadmemory" 0 2 13, +C4<00000000000000000000000000000000>; +P_0x230f590 .param/str "memoryfile" 0 2 14, "mem.dat"; +v0x2247fc0_0 .net *"_s2", 0 0, L_0x234a7c0; 1 drivers +v0x231a7d0_0 .net *"_s6", 0 0, L_0x234a860; 1 drivers +o0x2b7d4c4a4078 .functor BUFZ 1, C4; HiZ drive +v0x231a8b0_0 .net "clk", 0 0, o0x2b7d4c4a4078; 0 drivers +o0x2b7d4c4a40a8 .functor BUFZ 15, C4; HiZ drive +v0x231a980_0 .net "in", 14 0, o0x2b7d4c4a40a8; 0 drivers +v0x231aa60 .array "mem", 1 15, 10 0; +v0x231ab70_0 .var "out", 14 0; +v0x231ac50_0 .var "phase", 2 0; +v0x231ad30_0 .var "pointer", 3 0; +E_0x21dde80 .event negedge, v0x231a8b0_0; +E_0x220a2b0 .event posedge, v0x231a8b0_0; +E_0x2206010 .event edge, v0x231ad30_0; +E_0x21faa10 .event posedge, L_0x234a860; +E_0x2282200 .event posedge, L_0x234a7c0; +L_0x234a7c0 .part o0x2b7d4c4a40a8, 14, 1; +L_0x234a860 .part o0x2b7d4c4a40a8, 13, 1; +S_0x220a8e0 .scope module, "tis100Test" "tis100Test" 3 3; .timescale 0 0; -v0x1e007c0_0 .var "clk", 0 0; -v0x1e00880_0 .var "dutPassed", 0 0; -v0x1e00940 .array/s "expected", 6 0, 10 0; -v0x1e00a10_0 .net "fiveToFour", 14 0, L_0x1e25380; 1 drivers -v0x1e00b20_0 .net "fiveToSeven", 14 0, L_0x1e256b0; 1 drivers -v0x1e00c80_0 .net "fiveToTwo", 14 0, L_0x1e25130; 1 drivers -v0x1e00d90_0 .net "fourToFive", 14 0, L_0x1e21ab0; 1 drivers -v0x1e00ea0_0 .net "fourToThree", 14 0, L_0x1e211d0; 1 drivers -v0x1e00fb0_0 .var "i", 32 0; -v0x1e01120_0 .net "inToOne", 14 0, L_0x1e31a80; 1 drivers -v0x1e011e0_0 .net "oneToIn", 14 0, L_0x1e14cb0; 1 drivers -v0x1e012f0_0 .net "oneToThree", 14 0, L_0x1e151a0; 1 drivers -v0x1e01400_0 .net "outToSix", 14 0, L_0x1e34ea0; 1 drivers -v0x1e01510_0 .net "sevenToFive", 14 0, L_0x1e2d360; 1 drivers -v0x1e01620_0 .net "sevenToSix", 14 0, L_0x1e2d5b0; 1 drivers -v0x1e01730_0 .net "sixToOut", 14 0, L_0x1e29740; 1 drivers -v0x1e01840_0 .net "sixToSeven", 14 0, L_0x1e29cb0; 1 drivers -v0x1e019f0_0 .net "threeToFour", 14 0, L_0x1e1d940; 1 drivers -v0x1e01ae0_0 .net "threeToOne", 14 0, L_0x1e1ce50; 1 drivers -v0x1e01bf0_0 .net "twoToFive", 14 0, L_0x1e19280; 1 drivers -S_0x1dd23d0 .scope module, "five" "tis100" 3 49, 4 49 0, S_0x1cc1e10; +v0x2349280_0 .var "clk", 0 0; +v0x2349340_0 .var "dutPassed", 0 0; +v0x2349400 .array/s "expected", 6 0, 10 0; +v0x23494d0_0 .net "fiveToFour", 14 0, L_0x236de20; 1 drivers +v0x23495e0_0 .net "fiveToSeven", 14 0, L_0x236e150; 1 drivers +v0x2349740_0 .net "fiveToTwo", 14 0, L_0x236dbd0; 1 drivers +v0x2349850_0 .net "fourToFive", 14 0, L_0x236a550; 1 drivers +v0x2349960_0 .net "fourToThree", 14 0, L_0x2369c70; 1 drivers +v0x2349a70_0 .var "i", 32 0; +v0x2349be0_0 .net "inToOne", 14 0, L_0x237a520; 1 drivers +v0x2349ca0_0 .net "oneToIn", 14 0, L_0x235d750; 1 drivers +v0x2349db0_0 .net "oneToThree", 14 0, L_0x235dc10; 1 drivers +v0x2349ec0_0 .net "outToSix", 14 0, L_0x237d8f0; 1 drivers +v0x2349fd0_0 .net "sevenToFive", 14 0, L_0x2375e00; 1 drivers +v0x234a0e0_0 .net "sevenToSix", 14 0, L_0x2376050; 1 drivers +v0x234a1f0_0 .net "sixToOut", 14 0, L_0x23721e0; 1 drivers +v0x234a300_0 .net "sixToSeven", 14 0, L_0x2372750; 1 drivers +v0x234a4b0_0 .net "threeToFour", 14 0, L_0x23663e0; 1 drivers +v0x234a5a0_0 .net "threeToOne", 14 0, L_0x23658f0; 1 drivers +v0x234a6b0_0 .net "twoToFive", 14 0, L_0x2361ce0; 1 drivers +S_0x231ae90 .scope module, "five" "tis100" 3 49, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -65,175 +65,175 @@ S_0x1dd23d0 .scope module, "five" "tis100" 3 49, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1dd25a0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1dd25e0 .param/str "memFile" 0 4 60, "demo/five.dat"; -L_0x1e21e00 .functor BUFZ 11, v0x1dd2990_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e22090 .functor BUFZ 11, v0x1dd2990_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e22e50 .functor BUFZ 18, L_0x1e24ec0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1dd2990_0 .var/s "ACC", 10 0; -v0x1dd2a90_0 .var/s "BAK", 10 0; -v0x1dd2b70_0 .net "DST", 2 0, L_0x1e260b0; 1 drivers -v0x1dd2c30_0 .net/s "IMM", 10 0, L_0x1e26150; 1 drivers -v0x1dd2d10_0 .net "INST", 3 0, L_0x1e25950; 1 drivers -v0x1dd2e40_0 .net "LABEL", 3 0, L_0x1e26300; 1 drivers -v0x1dd2f20_0 .var "PC", 3 0; -v0x1dd3000_0 .var "PCNEXT", 3 0; -v0x1dd30e0_0 .net "SRC", 2 0, L_0x1e25ec0; 1 drivers -v0x1dd3250_0 .net *"_s103", 0 0, L_0x1e24200; 1 drivers -v0x1dd3330_0 .net *"_s107", 0 0, L_0x1e24110; 1 drivers -v0x1dd3410_0 .net *"_s111", 0 0, L_0x1e243f0; 1 drivers -v0x1dd34f0_0 .net *"_s115", 0 0, L_0x1e242f0; 1 drivers -v0x1dd35d0_0 .net *"_s119", 0 0, L_0x1e24630; 1 drivers -v0x1dd36b0_0 .net *"_s123", 0 0, L_0x1e24520; 1 drivers -v0x1dd3790_0 .net *"_s127", 0 0, L_0x1e247f0; 1 drivers -v0x1dd3870_0 .net *"_s131", 0 0, L_0x1e246d0; 1 drivers -v0x1dd3a20_0 .net *"_s135", 0 0, L_0x1e24a50; 1 drivers -v0x1dd3ac0_0 .net *"_s139", 0 0, L_0x1e24920; 1 drivers -v0x1dd3ba0_0 .net *"_s143", 0 0, L_0x1e24c30; 1 drivers -v0x1dd3c80_0 .net *"_s147", 0 0, L_0x1e24af0; 1 drivers -v0x1dd3d60_0 .net *"_s151", 0 0, L_0x1e24e20; 1 drivers -v0x1dd3e40_0 .net *"_s155", 0 0, L_0x1e24cd0; 1 drivers -v0x1dd3f20_0 .net *"_s159", 0 0, L_0x1e24d70; 1 drivers -v0x1dd4000_0 .net *"_s160", 17 0, L_0x1e24ec0; 1 drivers -v0x1dd40e0_0 .net *"_s162", 5 0, L_0x1e25220; 1 drivers -L_0x2b89f59272a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1dd41c0_0 .net *"_s165", 1 0, L_0x2b89f59272a0; 1 drivers -v0x1dd6190_2 .array/port v0x1dd6190, 2; -v0x1dd42a0_0 .net *"_s173", 10 0, v0x1dd6190_2; 1 drivers -v0x1dd6190_3 .array/port v0x1dd6190, 3; -v0x1dd4380_0 .net *"_s179", 10 0, v0x1dd6190_3; 1 drivers -v0x1dd6190_0 .array/port v0x1dd6190, 0; -v0x1dd4460_0 .net *"_s185", 10 0, v0x1dd6190_0; 1 drivers -v0x1dd6190_1 .array/port v0x1dd6190, 1; -v0x1dd4540_0 .net *"_s191", 10 0, v0x1dd6190_1; 1 drivers -v0x1dd4620_0 .net *"_s23", 0 0, L_0x1e22740; 1 drivers -v0x1dd4700_0 .net *"_s27", 0 0, L_0x1e22810; 1 drivers -v0x1dd3950_0 .net *"_s31", 0 0, L_0x1e228e0; 1 drivers -v0x1dd49d0_0 .net *"_s36", 0 0, L_0x1e22af0; 1 drivers -v0x1dd4ab0_0 .net *"_s42", 0 0, L_0x1e22d10; 1 drivers -v0x1dd4b90_0 .net *"_s46", 0 0, L_0x1e22db0; 1 drivers -v0x1dd4c70_0 .net *"_s50", 0 0, L_0x1e22ec0; 1 drivers -v0x1dd4d50_0 .net *"_s55", 0 0, L_0x1e23100; 1 drivers -v0x1dd4e30_0 .net *"_s61", 0 0, L_0x1e23370; 1 drivers -v0x1dd4f10_0 .net *"_s65", 0 0, L_0x1e23410; 1 drivers -v0x1dd4ff0_0 .net *"_s69", 0 0, L_0x1e235e0; 1 drivers -v0x1dd50d0_0 .net *"_s74", 0 0, L_0x1e23540; 1 drivers -v0x1dd51b0_0 .net *"_s80", 0 0, L_0x1e237c0; 1 drivers -v0x1dd5290_0 .net *"_s84", 0 0, L_0x1e23b80; 1 drivers -v0x1dd5370_0 .net *"_s88", 0 0, L_0x1e239b0; 1 drivers -v0x1dd5450_0 .net *"_s93", 0 0, L_0x1e23c20; 1 drivers -v0x1dd5530_0 .net *"_s99", 0 0, L_0x1e23ef0; 1 drivers -v0x1dd5610_0 .net/s "accOut", 10 0, L_0x1e21e00; 1 drivers -v0x1dd56f0_0 .net "anyHasData", 0 0, L_0x1e22c70; 1 drivers -v0x1dd57b0_0 .net "anyReadAck", 0 0, L_0x1e238c0; 1 drivers -v0x1dd5870_0 .net "anyWantData", 0 0, L_0x1e231f0; 1 drivers -v0x1dd5930_0 .net "anyWriteAck", 0 0, L_0x1e24020; 1 drivers -v0x1dd59f0_0 .net "clk", 0 0, v0x1e007c0_0; 1 drivers -v0x1dd5ab0_0 .net "down", 14 0, L_0x1e2d360; alias, 1 drivers -v0x1dd5b90_0 .net "downOut", 14 0, L_0x1e256b0; alias, 1 drivers -v0x1dd5c70_0 .net "instruction", 17 0, L_0x1e22e50; 1 drivers -v0x1dd5d50 .array "instructions", 15 0, 17 0; -v0x1dd5e10_0 .var "last", 2 0; -v0x1dd5ef0_0 .net "left", 14 0, L_0x1e21ab0; alias, 1 drivers -v0x1dd5fd0_0 .net "leftOut", 14 0, L_0x1e25380; alias, 1 drivers -v0x1dd60b0_0 .var "mode", 2 0; -v0x1dd6190 .array/s "outVals", 2 5, 10 0; -v0x1dd62d0_0 .var "phase", 2 0; -v0x1dd63b0_0 .net "portsHaveData", 5 2, L_0x1e22980; 1 drivers -v0x1dd47a0_0 .net "portsWantData", 5 2, L_0x1e22f60; 1 drivers -v0x1dd4880_0 .net "readAckIn", 5 2, L_0x1e23680; 1 drivers -v0x1dd6860_0 .var "readAckOut", 5 2; -v0x1dd6900_0 .var "readTarget", 2 0; -v0x1dd69c0_0 .var/s "readValue", 10 0; -L_0x2b89f5927258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1dd6aa0 .array "regVals", 0 7; -v0x1dd6aa0_0 .net/s v0x1dd6aa0 0, 10 0, L_0x2b89f5927258; 1 drivers -v0x1dd6aa0_1 .net/s v0x1dd6aa0 1, 10 0, L_0x1e22090; 1 drivers -v0x1dd6aa0_2 .net/s v0x1dd6aa0 2, 10 0, L_0x1e22370; 1 drivers -v0x1dd6aa0_3 .net/s v0x1dd6aa0 3, 10 0, L_0x1e224a0; 1 drivers -v0x1dd6aa0_4 .net/s v0x1dd6aa0 4, 10 0, L_0x1e22540; 1 drivers -v0x1dd6aa0_5 .net/s v0x1dd6aa0 5, 10 0, L_0x1e22670; 1 drivers -o0x2b89f58f7098 .functor BUFZ 11, C4; HiZ drive -v0x1dd6aa0_6 .net/s v0x1dd6aa0 6, 10 0, o0x2b89f58f7098; 0 drivers -o0x2b89f58f70c8 .functor BUFZ 11, C4; HiZ drive -v0x1dd6aa0_7 .net/s v0x1dd6aa0 7, 10 0, o0x2b89f58f70c8; 0 drivers -o0x2b89f58f70f8 .functor BUFZ 15, C4; HiZ drive -v0x1dd6cb0_0 .net "right", 14 0, o0x2b89f58f70f8; 0 drivers -v0x1dd6d90_0 .net "rightOut", 14 0, L_0x1e25ce0; 1 drivers -v0x1dd6e70_0 .net "up", 14 0, L_0x1e19280; alias, 1 drivers -v0x1dd6f50_0 .net "upOut", 14 0, L_0x1e25130; alias, 1 drivers -v0x1dd7030_0 .var "weHaveData", 5 2; -v0x1dd7110_0 .var "weWantData", 5 2; -v0x1dd71f0_0 .net "writeAckIn", 5 2, L_0x1e23e00; 1 drivers -v0x1dd72d0_0 .var "writeAckOut", 5 2; -v0x1dd73b0_0 .var "writeTarget", 2 0; -v0x1dd7490_0 .var/s "writeValue", 10 0; -E_0x1dd2730 .event negedge, v0x1dd59f0_0; -E_0x1dd2930 .event posedge, v0x1dd59f0_0; -L_0x1e22370 .part L_0x1e21ab0, 0, 11; -L_0x1e224a0 .part o0x2b89f58f70f8, 0, 11; -L_0x1e22540 .part L_0x1e19280, 0, 11; -L_0x1e22670 .part L_0x1e2d360, 0, 11; -L_0x1e22740 .part L_0x1e21ab0, 11, 1; -L_0x1e22810 .part o0x2b89f58f70f8, 11, 1; -L_0x1e228e0 .part L_0x1e19280, 11, 1; -L_0x1e22980 .concat8 [ 1 1 1 1], L_0x1e22740, L_0x1e22810, L_0x1e228e0, L_0x1e22af0; -L_0x1e22af0 .part L_0x1e2d360, 11, 1; -L_0x1e22c70 .reduce/or L_0x1e22980; -L_0x1e22d10 .part L_0x1e21ab0, 12, 1; -L_0x1e22db0 .part o0x2b89f58f70f8, 12, 1; -L_0x1e22ec0 .part L_0x1e19280, 12, 1; -L_0x1e22f60 .concat8 [ 1 1 1 1], L_0x1e22d10, L_0x1e22db0, L_0x1e22ec0, L_0x1e23100; -L_0x1e23100 .part L_0x1e2d360, 12, 1; -L_0x1e231f0 .reduce/or L_0x1e22f60; -L_0x1e23370 .part L_0x1e21ab0, 13, 1; -L_0x1e23410 .part o0x2b89f58f70f8, 13, 1; -L_0x1e235e0 .part L_0x1e19280, 13, 1; -L_0x1e23680 .concat8 [ 1 1 1 1], L_0x1e23370, L_0x1e23410, L_0x1e235e0, L_0x1e23540; -L_0x1e23540 .part L_0x1e2d360, 13, 1; -L_0x1e238c0 .reduce/or L_0x1e23680; -L_0x1e237c0 .part L_0x1e21ab0, 14, 1; -L_0x1e23b80 .part o0x2b89f58f70f8, 14, 1; -L_0x1e239b0 .part L_0x1e19280, 14, 1; -L_0x1e23e00 .concat8 [ 1 1 1 1], L_0x1e237c0, L_0x1e23b80, L_0x1e239b0, L_0x1e23c20; -L_0x1e23c20 .part L_0x1e2d360, 14, 1; -L_0x1e24020 .reduce/or L_0x1e23e00; -L_0x1e23ef0 .part v0x1dd6860_0, 0, 1; -L_0x1e24200 .part v0x1dd6860_0, 1, 1; -L_0x1e24110 .part v0x1dd6860_0, 2, 1; -L_0x1e243f0 .part v0x1dd6860_0, 3, 1; -L_0x1e242f0 .part v0x1dd72d0_0, 0, 1; -L_0x1e24630 .part v0x1dd72d0_0, 1, 1; -L_0x1e24520 .part v0x1dd72d0_0, 2, 1; -L_0x1e247f0 .part v0x1dd72d0_0, 3, 1; -L_0x1e246d0 .part v0x1dd7110_0, 0, 1; -L_0x1e24a50 .part v0x1dd7110_0, 1, 1; -L_0x1e24920 .part v0x1dd7110_0, 2, 1; -L_0x1e24c30 .part v0x1dd7110_0, 3, 1; -L_0x1e24af0 .part v0x1dd7030_0, 0, 1; -L_0x1e24e20 .part v0x1dd7030_0, 1, 1; -L_0x1e24cd0 .part v0x1dd7030_0, 2, 1; -L_0x1e24d70 .part v0x1dd7030_0, 3, 1; -L_0x1e24ec0 .array/port v0x1dd5d50, L_0x1e25220; -L_0x1e25220 .concat [ 4 2 0 0], v0x1dd2f20_0, L_0x2b89f59272a0; -LS_0x1e25130_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_2, L_0x1e24cd0, L_0x1e24920, L_0x1e24520; -LS_0x1e25130_0_4 .concat8 [ 1 0 0 0], L_0x1e24110; -L_0x1e25130 .concat8 [ 14 1 0 0], LS_0x1e25130_0_0, LS_0x1e25130_0_4; -LS_0x1e256b0_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_3, L_0x1e24d70, L_0x1e24c30, L_0x1e247f0; -LS_0x1e256b0_0_4 .concat8 [ 1 0 0 0], L_0x1e243f0; -L_0x1e256b0 .concat8 [ 14 1 0 0], LS_0x1e256b0_0_0, LS_0x1e256b0_0_4; -LS_0x1e25380_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_0, L_0x1e24af0, L_0x1e246d0, L_0x1e242f0; -LS_0x1e25380_0_4 .concat8 [ 1 0 0 0], L_0x1e23ef0; -L_0x1e25380 .concat8 [ 14 1 0 0], LS_0x1e25380_0_0, LS_0x1e25380_0_4; -LS_0x1e25ce0_0_0 .concat8 [ 11 1 1 1], v0x1dd6190_1, L_0x1e24e20, L_0x1e24a50, L_0x1e24630; -LS_0x1e25ce0_0_4 .concat8 [ 1 0 0 0], L_0x1e24200; -L_0x1e25ce0 .concat8 [ 14 1 0 0], LS_0x1e25ce0_0_0, LS_0x1e25ce0_0_4; -L_0x1e25950 .part L_0x1e22e50, 14, 4; -L_0x1e260b0 .part L_0x1e22e50, 11, 3; -L_0x1e25ec0 .part L_0x1e22e50, 8, 3; -L_0x1e26300 .part L_0x1e22e50, 10, 4; -L_0x1e26150 .part L_0x1e22e50, 0, 11; -S_0x1dd7710 .scope module, "four" "tis100" 3 45, 4 49 0, S_0x1cc1e10; +P_0x231b060 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x231b0a0 .param/str "memFile" 0 4 60, "demo/five.dat"; +L_0x236a8a0 .functor BUFZ 11, v0x231b450_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x236ab30 .functor BUFZ 11, v0x231b450_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x236b8f0 .functor BUFZ 18, L_0x236d960, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x231b450_0 .var/s "ACC", 10 0; +v0x231b550_0 .var/s "BAK", 10 0; +v0x231b630_0 .net "DST", 2 0, L_0x236eb50; 1 drivers +v0x231b6f0_0 .net/s "IMM", 10 0, L_0x236ebf0; 1 drivers +v0x231b7d0_0 .net "INST", 3 0, L_0x236e3f0; 1 drivers +v0x231b900_0 .net "LABEL", 3 0, L_0x236eda0; 1 drivers +v0x231b9e0_0 .var "PC", 3 0; +v0x231bac0_0 .var "PCNEXT", 3 0; +v0x231bba0_0 .net "SRC", 2 0, L_0x236e960; 1 drivers +v0x231bd10_0 .net *"_s103", 0 0, L_0x236cca0; 1 drivers +v0x231bdf0_0 .net *"_s107", 0 0, L_0x236cbb0; 1 drivers +v0x231bed0_0 .net *"_s111", 0 0, L_0x236ce90; 1 drivers +v0x231bfb0_0 .net *"_s115", 0 0, L_0x236cd90; 1 drivers +v0x231c090_0 .net *"_s119", 0 0, L_0x236d0d0; 1 drivers +v0x231c170_0 .net *"_s123", 0 0, L_0x236cfc0; 1 drivers +v0x231c250_0 .net *"_s127", 0 0, L_0x236d290; 1 drivers +v0x231c330_0 .net *"_s131", 0 0, L_0x236d170; 1 drivers +v0x231c4e0_0 .net *"_s135", 0 0, L_0x236d4f0; 1 drivers +v0x231c580_0 .net *"_s139", 0 0, L_0x236d3c0; 1 drivers +v0x231c660_0 .net *"_s143", 0 0, L_0x236d6d0; 1 drivers +v0x231c740_0 .net *"_s147", 0 0, L_0x236d590; 1 drivers +v0x231c820_0 .net *"_s151", 0 0, L_0x236d8c0; 1 drivers +v0x231c900_0 .net *"_s155", 0 0, L_0x236d770; 1 drivers +v0x231c9e0_0 .net *"_s159", 0 0, L_0x236d810; 1 drivers +v0x231cac0_0 .net *"_s160", 17 0, L_0x236d960; 1 drivers +v0x231cba0_0 .net *"_s162", 5 0, L_0x236dcc0; 1 drivers +L_0x2b7d4c4d52a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x231cc80_0 .net *"_s165", 1 0, L_0x2b7d4c4d52a0; 1 drivers +v0x231ec50_2 .array/port v0x231ec50, 2; +v0x231cd60_0 .net *"_s173", 10 0, v0x231ec50_2; 1 drivers +v0x231ec50_3 .array/port v0x231ec50, 3; +v0x231ce40_0 .net *"_s179", 10 0, v0x231ec50_3; 1 drivers +v0x231ec50_0 .array/port v0x231ec50, 0; +v0x231cf20_0 .net *"_s185", 10 0, v0x231ec50_0; 1 drivers +v0x231ec50_1 .array/port v0x231ec50, 1; +v0x231d000_0 .net *"_s191", 10 0, v0x231ec50_1; 1 drivers +v0x231d0e0_0 .net *"_s23", 0 0, L_0x236b1e0; 1 drivers +v0x231d1c0_0 .net *"_s27", 0 0, L_0x236b2b0; 1 drivers +v0x231c410_0 .net *"_s31", 0 0, L_0x236b380; 1 drivers +v0x231d490_0 .net *"_s36", 0 0, L_0x236b590; 1 drivers +v0x231d570_0 .net *"_s42", 0 0, L_0x236b7b0; 1 drivers +v0x231d650_0 .net *"_s46", 0 0, L_0x236b850; 1 drivers +v0x231d730_0 .net *"_s50", 0 0, L_0x236b960; 1 drivers +v0x231d810_0 .net *"_s55", 0 0, L_0x236bba0; 1 drivers +v0x231d8f0_0 .net *"_s61", 0 0, L_0x236be10; 1 drivers +v0x231d9d0_0 .net *"_s65", 0 0, L_0x236beb0; 1 drivers +v0x231dab0_0 .net *"_s69", 0 0, L_0x236c080; 1 drivers +v0x231db90_0 .net *"_s74", 0 0, L_0x236bfe0; 1 drivers +v0x231dc70_0 .net *"_s80", 0 0, L_0x236c260; 1 drivers +v0x231dd50_0 .net *"_s84", 0 0, L_0x236c620; 1 drivers +v0x231de30_0 .net *"_s88", 0 0, L_0x236c450; 1 drivers +v0x231df10_0 .net *"_s93", 0 0, L_0x236c6c0; 1 drivers +v0x231dff0_0 .net *"_s99", 0 0, L_0x236c990; 1 drivers +v0x231e0d0_0 .net/s "accOut", 10 0, L_0x236a8a0; 1 drivers +v0x231e1b0_0 .net "anyHasData", 0 0, L_0x236b710; 1 drivers +v0x231e270_0 .net "anyReadAck", 0 0, L_0x236c360; 1 drivers +v0x231e330_0 .net "anyWantData", 0 0, L_0x236bc90; 1 drivers +v0x231e3f0_0 .net "anyWriteAck", 0 0, L_0x236cac0; 1 drivers +v0x231e4b0_0 .net "clk", 0 0, v0x2349280_0; 1 drivers +v0x231e570_0 .net "down", 14 0, L_0x2375e00; alias, 1 drivers +v0x231e650_0 .net "downOut", 14 0, L_0x236e150; alias, 1 drivers +v0x231e730_0 .net "instruction", 17 0, L_0x236b8f0; 1 drivers +v0x231e810 .array "instructions", 15 0, 17 0; +v0x231e8d0_0 .var "last", 2 0; +v0x231e9b0_0 .net "left", 14 0, L_0x236a550; alias, 1 drivers +v0x231ea90_0 .net "leftOut", 14 0, L_0x236de20; alias, 1 drivers +v0x231eb70_0 .var "mode", 2 0; +v0x231ec50 .array/s "outVals", 2 5, 10 0; +v0x231ed90_0 .var "phase", 2 0; +v0x231ee70_0 .net "portsHaveData", 5 2, L_0x236b420; 1 drivers +v0x231d260_0 .net "portsWantData", 5 2, L_0x236ba00; 1 drivers +v0x231d340_0 .net "readAckIn", 5 2, L_0x236c120; 1 drivers +v0x231f320_0 .var "readAckOut", 5 2; +v0x231f3c0_0 .var "readTarget", 2 0; +v0x231f480_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d5258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x231f560 .array "regVals", 0 7; +v0x231f560_0 .net/s v0x231f560 0, 10 0, L_0x2b7d4c4d5258; 1 drivers +v0x231f560_1 .net/s v0x231f560 1, 10 0, L_0x236ab30; 1 drivers +v0x231f560_2 .net/s v0x231f560 2, 10 0, L_0x236ae10; 1 drivers +v0x231f560_3 .net/s v0x231f560 3, 10 0, L_0x236af40; 1 drivers +v0x231f560_4 .net/s v0x231f560 4, 10 0, L_0x236afe0; 1 drivers +v0x231f560_5 .net/s v0x231f560 5, 10 0, L_0x236b110; 1 drivers +o0x2b7d4c4a5098 .functor BUFZ 11, C4; HiZ drive +v0x231f560_6 .net/s v0x231f560 6, 10 0, o0x2b7d4c4a5098; 0 drivers +o0x2b7d4c4a50c8 .functor BUFZ 11, C4; HiZ drive +v0x231f560_7 .net/s v0x231f560 7, 10 0, o0x2b7d4c4a50c8; 0 drivers +o0x2b7d4c4a50f8 .functor BUFZ 15, C4; HiZ drive +v0x231f770_0 .net "right", 14 0, o0x2b7d4c4a50f8; 0 drivers +v0x231f850_0 .net "rightOut", 14 0, L_0x236e780; 1 drivers +v0x231f930_0 .net "up", 14 0, L_0x2361ce0; alias, 1 drivers +v0x231fa10_0 .net "upOut", 14 0, L_0x236dbd0; alias, 1 drivers +v0x231faf0_0 .var "weHaveData", 5 2; +v0x231fbd0_0 .var "weWantData", 5 2; +v0x231fcb0_0 .net "writeAckIn", 5 2, L_0x236c8a0; 1 drivers +v0x231fd90_0 .var "writeAckOut", 5 2; +v0x231fe70_0 .var "writeTarget", 2 0; +v0x231ff50_0 .var/s "writeValue", 10 0; +E_0x231b1f0 .event negedge, v0x231e4b0_0; +E_0x231b3f0 .event posedge, v0x231e4b0_0; +L_0x236ae10 .part L_0x236a550, 0, 11; +L_0x236af40 .part o0x2b7d4c4a50f8, 0, 11; +L_0x236afe0 .part L_0x2361ce0, 0, 11; +L_0x236b110 .part L_0x2375e00, 0, 11; +L_0x236b1e0 .part L_0x236a550, 11, 1; +L_0x236b2b0 .part o0x2b7d4c4a50f8, 11, 1; +L_0x236b380 .part L_0x2361ce0, 11, 1; +L_0x236b420 .concat8 [ 1 1 1 1], L_0x236b1e0, L_0x236b2b0, L_0x236b380, L_0x236b590; +L_0x236b590 .part L_0x2375e00, 11, 1; +L_0x236b710 .reduce/or L_0x236b420; +L_0x236b7b0 .part L_0x236a550, 12, 1; +L_0x236b850 .part o0x2b7d4c4a50f8, 12, 1; +L_0x236b960 .part L_0x2361ce0, 12, 1; +L_0x236ba00 .concat8 [ 1 1 1 1], L_0x236b7b0, L_0x236b850, L_0x236b960, L_0x236bba0; +L_0x236bba0 .part L_0x2375e00, 12, 1; +L_0x236bc90 .reduce/or L_0x236ba00; +L_0x236be10 .part L_0x236a550, 13, 1; +L_0x236beb0 .part o0x2b7d4c4a50f8, 13, 1; +L_0x236c080 .part L_0x2361ce0, 13, 1; +L_0x236c120 .concat8 [ 1 1 1 1], L_0x236be10, L_0x236beb0, L_0x236c080, L_0x236bfe0; +L_0x236bfe0 .part L_0x2375e00, 13, 1; +L_0x236c360 .reduce/or L_0x236c120; +L_0x236c260 .part L_0x236a550, 14, 1; +L_0x236c620 .part o0x2b7d4c4a50f8, 14, 1; +L_0x236c450 .part L_0x2361ce0, 14, 1; +L_0x236c8a0 .concat8 [ 1 1 1 1], L_0x236c260, L_0x236c620, L_0x236c450, L_0x236c6c0; +L_0x236c6c0 .part L_0x2375e00, 14, 1; +L_0x236cac0 .reduce/or L_0x236c8a0; +L_0x236c990 .part v0x231f320_0, 0, 1; +L_0x236cca0 .part v0x231f320_0, 1, 1; +L_0x236cbb0 .part v0x231f320_0, 2, 1; +L_0x236ce90 .part v0x231f320_0, 3, 1; +L_0x236cd90 .part v0x231fd90_0, 0, 1; +L_0x236d0d0 .part v0x231fd90_0, 1, 1; +L_0x236cfc0 .part v0x231fd90_0, 2, 1; +L_0x236d290 .part v0x231fd90_0, 3, 1; +L_0x236d170 .part v0x231fbd0_0, 0, 1; +L_0x236d4f0 .part v0x231fbd0_0, 1, 1; +L_0x236d3c0 .part v0x231fbd0_0, 2, 1; +L_0x236d6d0 .part v0x231fbd0_0, 3, 1; +L_0x236d590 .part v0x231faf0_0, 0, 1; +L_0x236d8c0 .part v0x231faf0_0, 1, 1; +L_0x236d770 .part v0x231faf0_0, 2, 1; +L_0x236d810 .part v0x231faf0_0, 3, 1; +L_0x236d960 .array/port v0x231e810, L_0x236dcc0; +L_0x236dcc0 .concat [ 4 2 0 0], v0x231b9e0_0, L_0x2b7d4c4d52a0; +LS_0x236dbd0_0_0 .concat8 [ 11 1 1 1], v0x231ec50_2, L_0x236d770, L_0x236d3c0, L_0x236cfc0; +LS_0x236dbd0_0_4 .concat8 [ 1 0 0 0], L_0x236cbb0; +L_0x236dbd0 .concat8 [ 14 1 0 0], LS_0x236dbd0_0_0, LS_0x236dbd0_0_4; +LS_0x236e150_0_0 .concat8 [ 11 1 1 1], v0x231ec50_3, L_0x236d810, L_0x236d6d0, L_0x236d290; +LS_0x236e150_0_4 .concat8 [ 1 0 0 0], L_0x236ce90; +L_0x236e150 .concat8 [ 14 1 0 0], LS_0x236e150_0_0, LS_0x236e150_0_4; +LS_0x236de20_0_0 .concat8 [ 11 1 1 1], v0x231ec50_0, L_0x236d590, L_0x236d170, L_0x236cd90; +LS_0x236de20_0_4 .concat8 [ 1 0 0 0], L_0x236c990; +L_0x236de20 .concat8 [ 14 1 0 0], LS_0x236de20_0_0, LS_0x236de20_0_4; +LS_0x236e780_0_0 .concat8 [ 11 1 1 1], v0x231ec50_1, L_0x236d8c0, L_0x236d4f0, L_0x236d0d0; +LS_0x236e780_0_4 .concat8 [ 1 0 0 0], L_0x236cca0; +L_0x236e780 .concat8 [ 14 1 0 0], LS_0x236e780_0_0, LS_0x236e780_0_4; +L_0x236e3f0 .part L_0x236b8f0, 14, 4; +L_0x236eb50 .part L_0x236b8f0, 11, 3; +L_0x236e960 .part L_0x236b8f0, 8, 3; +L_0x236eda0 .part L_0x236b8f0, 10, 4; +L_0x236ebf0 .part L_0x236b8f0, 0, 11; +S_0x23201d0 .scope module, "four" "tis100" 3 45, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -245,174 +245,174 @@ S_0x1dd7710 .scope module, "four" "tis100" 3 45, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1dd7900 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1dd7940 .param/str "memFile" 0 4 60, "demo/four.dat"; -L_0x1e1dc90 .functor BUFZ 11, v0x1dd7c00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e1de90 .functor BUFZ 11, v0x1dd7c00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e1ed30 .functor BUFZ 18, L_0x1e20d10, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1dd7c00_0 .var/s "ACC", 10 0; -v0x1dd7d00_0 .var/s "BAK", 10 0; -v0x1dd7de0_0 .net "DST", 2 0, L_0x1e21ec0; 1 drivers -v0x1dd7ea0_0 .net/s "IMM", 10 0, L_0x1e21f60; 1 drivers -v0x1dd7f80_0 .net "INST", 3 0, L_0x1e21720; 1 drivers -v0x1dd80b0_0 .net "LABEL", 3 0, L_0x1e22110; 1 drivers -v0x1dd8190_0 .var "PC", 3 0; -v0x1dd8270_0 .var "PCNEXT", 3 0; -v0x1dd8350_0 .net "SRC", 2 0, L_0x1e21cd0; 1 drivers -v0x1dd84c0_0 .net *"_s103", 0 0, L_0x1e20050; 1 drivers -v0x1dd85a0_0 .net *"_s107", 0 0, L_0x1e1ff60; 1 drivers -v0x1dd8680_0 .net *"_s111", 0 0, L_0x1e20240; 1 drivers -v0x1dd8760_0 .net *"_s115", 0 0, L_0x1e20140; 1 drivers -v0x1dd8840_0 .net *"_s119", 0 0, L_0x1e20480; 1 drivers -v0x1dd8920_0 .net *"_s123", 0 0, L_0x1e20370; 1 drivers -v0x1dd8a00_0 .net *"_s127", 0 0, L_0x1e20640; 1 drivers -v0x1dd8ae0_0 .net *"_s131", 0 0, L_0x1e20520; 1 drivers -v0x1dd8c90_0 .net *"_s135", 0 0, L_0x1e208a0; 1 drivers -v0x1dd8d30_0 .net *"_s139", 0 0, L_0x1e20770; 1 drivers -v0x1dd8e10_0 .net *"_s143", 0 0, L_0x1e20a80; 1 drivers -v0x1dd8ef0_0 .net *"_s147", 0 0, L_0x1e20940; 1 drivers -v0x1dd8fd0_0 .net *"_s151", 0 0, L_0x1e20c70; 1 drivers -v0x1dd90b0_0 .net *"_s155", 0 0, L_0x1e20b20; 1 drivers -v0x1dd9190_0 .net *"_s159", 0 0, L_0x1e20bc0; 1 drivers -v0x1dd9270_0 .net *"_s160", 17 0, L_0x1e20d10; 1 drivers -v0x1dd9350_0 .net *"_s162", 5 0, L_0x1e21070; 1 drivers -L_0x2b89f5927210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1dd9430_0 .net *"_s165", 1 0, L_0x2b89f5927210; 1 drivers -v0x1ddb3c0_2 .array/port v0x1ddb3c0, 2; -v0x1dd9510_0 .net *"_s173", 10 0, v0x1ddb3c0_2; 1 drivers -v0x1ddb3c0_3 .array/port v0x1ddb3c0, 3; -v0x1dd95f0_0 .net *"_s179", 10 0, v0x1ddb3c0_3; 1 drivers -v0x1ddb3c0_0 .array/port v0x1ddb3c0, 0; -v0x1dd96d0_0 .net *"_s185", 10 0, v0x1ddb3c0_0; 1 drivers -v0x1ddb3c0_1 .array/port v0x1ddb3c0, 1; -v0x1dd97b0_0 .net *"_s191", 10 0, v0x1ddb3c0_1; 1 drivers -v0x1dd9890_0 .net *"_s23", 0 0, L_0x1e1e530; 1 drivers -v0x1dd9970_0 .net *"_s27", 0 0, L_0x1e1e600; 1 drivers -v0x1dd8bc0_0 .net *"_s31", 0 0, L_0x1e1e760; 1 drivers -v0x1dd9c40_0 .net *"_s36", 0 0, L_0x1e1e9c0; 1 drivers -v0x1dd9d20_0 .net *"_s42", 0 0, L_0x1e1ebf0; 1 drivers -v0x1dd9e00_0 .net *"_s46", 0 0, L_0x1e1ec90; 1 drivers -v0x1dd9ee0_0 .net *"_s50", 0 0, L_0x1e1eda0; 1 drivers -v0x1dd9fc0_0 .net *"_s55", 0 0, L_0x1e1efb0; 1 drivers -v0x1dda0a0_0 .net *"_s61", 0 0, L_0x1e1f220; 1 drivers -v0x1dda180_0 .net *"_s65", 0 0, L_0x1e1f2c0; 1 drivers -v0x1dda260_0 .net *"_s69", 0 0, L_0x1e1f400; 1 drivers -v0x1dda340_0 .net *"_s74", 0 0, L_0x1e1f360; 1 drivers -v0x1dda420_0 .net *"_s80", 0 0, L_0x1e1f640; 1 drivers -v0x1dda500_0 .net *"_s84", 0 0, L_0x1e1fa40; 1 drivers -v0x1dda5e0_0 .net *"_s88", 0 0, L_0x1e1f870; 1 drivers -v0x1dda6c0_0 .net *"_s93", 0 0, L_0x1e1fae0; 1 drivers -v0x1dda7a0_0 .net *"_s99", 0 0, L_0x1e1fd40; 1 drivers -v0x1dda880_0 .net/s "accOut", 10 0, L_0x1e1dc90; 1 drivers -v0x1dda960_0 .net "anyHasData", 0 0, L_0x1e1eb00; 1 drivers -v0x1ddaa20_0 .net "anyReadAck", 0 0, L_0x1e1f7d0; 1 drivers -v0x1ddaae0_0 .net "anyWantData", 0 0, L_0x1e1f0a0; 1 drivers -v0x1ddaba0_0 .net "anyWriteAck", 0 0, L_0x1e1fe70; 1 drivers -v0x1ddac60_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -o0x2b89f58f7ea8 .functor BUFZ 15, C4; HiZ drive -v0x1ddad00_0 .net "down", 14 0, o0x2b89f58f7ea8; 0 drivers -v0x1ddadc0_0 .net "downOut", 14 0, L_0x1e21440; 1 drivers -v0x1ddaea0_0 .net "instruction", 17 0, L_0x1e1ed30; 1 drivers -v0x1ddaf80 .array "instructions", 15 0, 17 0; -v0x1ddb040_0 .var "last", 2 0; -v0x1ddb120_0 .net "left", 14 0, L_0x1e1d940; alias, 1 drivers -v0x1ddb200_0 .net "leftOut", 14 0, L_0x1e211d0; alias, 1 drivers -v0x1ddb2e0_0 .var "mode", 2 0; -v0x1ddb3c0 .array/s "outVals", 2 5, 10 0; -v0x1ddb500_0 .var "phase", 2 0; -v0x1ddb5e0_0 .net "portsHaveData", 5 2, L_0x1e1e800; 1 drivers -v0x1dd9a10_0 .net "portsWantData", 5 2, L_0x1e1ee40; 1 drivers -v0x1dd9af0_0 .net "readAckIn", 5 2, L_0x1e1f4a0; 1 drivers -v0x1ddba90_0 .var "readAckOut", 5 2; -v0x1ddbb30_0 .var "readTarget", 2 0; -v0x1ddbbd0_0 .var/s "readValue", 10 0; -L_0x2b89f59271c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1ddbcb0 .array "regVals", 0 7; -v0x1ddbcb0_0 .net/s v0x1ddbcb0 0, 10 0, L_0x2b89f59271c8; 1 drivers -v0x1ddbcb0_1 .net/s v0x1ddbcb0 1, 10 0, L_0x1e1de90; 1 drivers -v0x1ddbcb0_2 .net/s v0x1ddbcb0 2, 10 0, L_0x1e1df00; 1 drivers -v0x1ddbcb0_3 .net/s v0x1ddbcb0 3, 10 0, L_0x1e1e290; 1 drivers -v0x1ddbcb0_4 .net/s v0x1ddbcb0 4, 10 0, L_0x1e1e330; 1 drivers -v0x1ddbcb0_5 .net/s v0x1ddbcb0 5, 10 0, L_0x1e1e400; 1 drivers -o0x2b89f58f8328 .functor BUFZ 11, C4; HiZ drive -v0x1ddbcb0_6 .net/s v0x1ddbcb0 6, 10 0, o0x2b89f58f8328; 0 drivers -o0x2b89f58f8358 .functor BUFZ 11, C4; HiZ drive -v0x1ddbcb0_7 .net/s v0x1ddbcb0 7, 10 0, o0x2b89f58f8358; 0 drivers -v0x1ddbec0_0 .net "right", 14 0, L_0x1e25380; alias, 1 drivers -v0x1ddbfb0_0 .net "rightOut", 14 0, L_0x1e21ab0; alias, 1 drivers -o0x2b89f58f8388 .functor BUFZ 15, C4; HiZ drive -v0x1ddc080_0 .net "up", 14 0, o0x2b89f58f8388; 0 drivers -v0x1ddc140_0 .net "upOut", 14 0, L_0x1e20f50; 1 drivers -v0x1ddc220_0 .var "weHaveData", 5 2; -v0x1ddc300_0 .var "weWantData", 5 2; -v0x1ddc3e0_0 .net "writeAckIn", 5 2, L_0x1e1fbb0; 1 drivers -v0x1ddc4c0_0 .var "writeAckOut", 5 2; -v0x1ddc5a0_0 .var "writeTarget", 2 0; -v0x1ddc680_0 .var/s "writeValue", 10 0; -L_0x1e1df00 .part L_0x1e1d940, 0, 11; -L_0x1e1e290 .part L_0x1e25380, 0, 11; -L_0x1e1e330 .part o0x2b89f58f8388, 0, 11; -L_0x1e1e400 .part o0x2b89f58f7ea8, 0, 11; -L_0x1e1e530 .part L_0x1e1d940, 11, 1; -L_0x1e1e600 .part L_0x1e25380, 11, 1; -L_0x1e1e760 .part o0x2b89f58f8388, 11, 1; -L_0x1e1e800 .concat8 [ 1 1 1 1], L_0x1e1e530, L_0x1e1e600, L_0x1e1e760, L_0x1e1e9c0; -L_0x1e1e9c0 .part o0x2b89f58f7ea8, 11, 1; -L_0x1e1eb00 .reduce/or L_0x1e1e800; -L_0x1e1ebf0 .part L_0x1e1d940, 12, 1; -L_0x1e1ec90 .part L_0x1e25380, 12, 1; -L_0x1e1eda0 .part o0x2b89f58f8388, 12, 1; -L_0x1e1ee40 .concat8 [ 1 1 1 1], L_0x1e1ebf0, L_0x1e1ec90, L_0x1e1eda0, L_0x1e1efb0; -L_0x1e1efb0 .part o0x2b89f58f7ea8, 12, 1; -L_0x1e1f0a0 .reduce/or L_0x1e1ee40; -L_0x1e1f220 .part L_0x1e1d940, 13, 1; -L_0x1e1f2c0 .part L_0x1e25380, 13, 1; -L_0x1e1f400 .part o0x2b89f58f8388, 13, 1; -L_0x1e1f4a0 .concat8 [ 1 1 1 1], L_0x1e1f220, L_0x1e1f2c0, L_0x1e1f400, L_0x1e1f360; -L_0x1e1f360 .part o0x2b89f58f7ea8, 13, 1; -L_0x1e1f7d0 .reduce/or L_0x1e1f4a0; -L_0x1e1f640 .part L_0x1e1d940, 14, 1; -L_0x1e1fa40 .part L_0x1e25380, 14, 1; -L_0x1e1f870 .part o0x2b89f58f8388, 14, 1; -L_0x1e1fbb0 .concat8 [ 1 1 1 1], L_0x1e1f640, L_0x1e1fa40, L_0x1e1f870, L_0x1e1fae0; -L_0x1e1fae0 .part o0x2b89f58f7ea8, 14, 1; -L_0x1e1fe70 .reduce/or L_0x1e1fbb0; -L_0x1e1fd40 .part v0x1ddba90_0, 0, 1; -L_0x1e20050 .part v0x1ddba90_0, 1, 1; -L_0x1e1ff60 .part v0x1ddba90_0, 2, 1; -L_0x1e20240 .part v0x1ddba90_0, 3, 1; -L_0x1e20140 .part v0x1ddc4c0_0, 0, 1; -L_0x1e20480 .part v0x1ddc4c0_0, 1, 1; -L_0x1e20370 .part v0x1ddc4c0_0, 2, 1; -L_0x1e20640 .part v0x1ddc4c0_0, 3, 1; -L_0x1e20520 .part v0x1ddc300_0, 0, 1; -L_0x1e208a0 .part v0x1ddc300_0, 1, 1; -L_0x1e20770 .part v0x1ddc300_0, 2, 1; -L_0x1e20a80 .part v0x1ddc300_0, 3, 1; -L_0x1e20940 .part v0x1ddc220_0, 0, 1; -L_0x1e20c70 .part v0x1ddc220_0, 1, 1; -L_0x1e20b20 .part v0x1ddc220_0, 2, 1; -L_0x1e20bc0 .part v0x1ddc220_0, 3, 1; -L_0x1e20d10 .array/port v0x1ddaf80, L_0x1e21070; -L_0x1e21070 .concat [ 4 2 0 0], v0x1dd8190_0, L_0x2b89f5927210; -LS_0x1e20f50_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_2, L_0x1e20b20, L_0x1e20770, L_0x1e20370; -LS_0x1e20f50_0_4 .concat8 [ 1 0 0 0], L_0x1e1ff60; -L_0x1e20f50 .concat8 [ 14 1 0 0], LS_0x1e20f50_0_0, LS_0x1e20f50_0_4; -LS_0x1e21440_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_3, L_0x1e20bc0, L_0x1e20a80, L_0x1e20640; -LS_0x1e21440_0_4 .concat8 [ 1 0 0 0], L_0x1e20240; -L_0x1e21440 .concat8 [ 14 1 0 0], LS_0x1e21440_0_0, LS_0x1e21440_0_4; -LS_0x1e211d0_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_0, L_0x1e20940, L_0x1e20520, L_0x1e20140; -LS_0x1e211d0_0_4 .concat8 [ 1 0 0 0], L_0x1e1fd40; -L_0x1e211d0 .concat8 [ 14 1 0 0], LS_0x1e211d0_0_0, LS_0x1e211d0_0_4; -LS_0x1e21ab0_0_0 .concat8 [ 11 1 1 1], v0x1ddb3c0_1, L_0x1e20c70, L_0x1e208a0, L_0x1e20480; -LS_0x1e21ab0_0_4 .concat8 [ 1 0 0 0], L_0x1e20050; -L_0x1e21ab0 .concat8 [ 14 1 0 0], LS_0x1e21ab0_0_0, LS_0x1e21ab0_0_4; -L_0x1e21720 .part L_0x1e1ed30, 14, 4; -L_0x1e21ec0 .part L_0x1e1ed30, 11, 3; -L_0x1e21cd0 .part L_0x1e1ed30, 8, 3; -L_0x1e22110 .part L_0x1e1ed30, 10, 4; -L_0x1e21f60 .part L_0x1e1ed30, 0, 11; -S_0x1ddc900 .scope module, "in" "tis100" 3 62, 4 49 0, S_0x1cc1e10; +P_0x23203c0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x2320400 .param/str "memFile" 0 4 60, "demo/four.dat"; +L_0x2366730 .functor BUFZ 11, v0x23206c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2366930 .functor BUFZ 11, v0x23206c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x23677d0 .functor BUFZ 18, L_0x23697b0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x23206c0_0 .var/s "ACC", 10 0; +v0x23207c0_0 .var/s "BAK", 10 0; +v0x23208a0_0 .net "DST", 2 0, L_0x236a960; 1 drivers +v0x2320960_0 .net/s "IMM", 10 0, L_0x236aa00; 1 drivers +v0x2320a40_0 .net "INST", 3 0, L_0x236a1c0; 1 drivers +v0x2320b70_0 .net "LABEL", 3 0, L_0x236abb0; 1 drivers +v0x2320c50_0 .var "PC", 3 0; +v0x2320d30_0 .var "PCNEXT", 3 0; +v0x2320e10_0 .net "SRC", 2 0, L_0x236a770; 1 drivers +v0x2320f80_0 .net *"_s103", 0 0, L_0x2368af0; 1 drivers +v0x2321060_0 .net *"_s107", 0 0, L_0x2368a00; 1 drivers +v0x2321140_0 .net *"_s111", 0 0, L_0x2368ce0; 1 drivers +v0x2321220_0 .net *"_s115", 0 0, L_0x2368be0; 1 drivers +v0x2321300_0 .net *"_s119", 0 0, L_0x2368f20; 1 drivers +v0x23213e0_0 .net *"_s123", 0 0, L_0x2368e10; 1 drivers +v0x23214c0_0 .net *"_s127", 0 0, L_0x23690e0; 1 drivers +v0x23215a0_0 .net *"_s131", 0 0, L_0x2368fc0; 1 drivers +v0x2321750_0 .net *"_s135", 0 0, L_0x2369340; 1 drivers +v0x23217f0_0 .net *"_s139", 0 0, L_0x2369210; 1 drivers +v0x23218d0_0 .net *"_s143", 0 0, L_0x2369520; 1 drivers +v0x23219b0_0 .net *"_s147", 0 0, L_0x23693e0; 1 drivers +v0x2321a90_0 .net *"_s151", 0 0, L_0x2369710; 1 drivers +v0x2321b70_0 .net *"_s155", 0 0, L_0x23695c0; 1 drivers +v0x2321c50_0 .net *"_s159", 0 0, L_0x2369660; 1 drivers +v0x2321d30_0 .net *"_s160", 17 0, L_0x23697b0; 1 drivers +v0x2321e10_0 .net *"_s162", 5 0, L_0x2369b10; 1 drivers +L_0x2b7d4c4d5210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2321ef0_0 .net *"_s165", 1 0, L_0x2b7d4c4d5210; 1 drivers +v0x2323e80_2 .array/port v0x2323e80, 2; +v0x2321fd0_0 .net *"_s173", 10 0, v0x2323e80_2; 1 drivers +v0x2323e80_3 .array/port v0x2323e80, 3; +v0x23220b0_0 .net *"_s179", 10 0, v0x2323e80_3; 1 drivers +v0x2323e80_0 .array/port v0x2323e80, 0; +v0x2322190_0 .net *"_s185", 10 0, v0x2323e80_0; 1 drivers +v0x2323e80_1 .array/port v0x2323e80, 1; +v0x2322270_0 .net *"_s191", 10 0, v0x2323e80_1; 1 drivers +v0x2322350_0 .net *"_s23", 0 0, L_0x2366fd0; 1 drivers +v0x2322430_0 .net *"_s27", 0 0, L_0x23670a0; 1 drivers +v0x2321680_0 .net *"_s31", 0 0, L_0x2367200; 1 drivers +v0x2322700_0 .net *"_s36", 0 0, L_0x2367460; 1 drivers +v0x23227e0_0 .net *"_s42", 0 0, L_0x2367690; 1 drivers +v0x23228c0_0 .net *"_s46", 0 0, L_0x2367730; 1 drivers +v0x23229a0_0 .net *"_s50", 0 0, L_0x2367840; 1 drivers +v0x2322a80_0 .net *"_s55", 0 0, L_0x2367a50; 1 drivers +v0x2322b60_0 .net *"_s61", 0 0, L_0x2367cc0; 1 drivers +v0x2322c40_0 .net *"_s65", 0 0, L_0x2367d60; 1 drivers +v0x2322d20_0 .net *"_s69", 0 0, L_0x2367ea0; 1 drivers +v0x2322e00_0 .net *"_s74", 0 0, L_0x2367e00; 1 drivers +v0x2322ee0_0 .net *"_s80", 0 0, L_0x23680e0; 1 drivers +v0x2322fc0_0 .net *"_s84", 0 0, L_0x23684e0; 1 drivers +v0x23230a0_0 .net *"_s88", 0 0, L_0x2368310; 1 drivers +v0x2323180_0 .net *"_s93", 0 0, L_0x2368580; 1 drivers +v0x2323260_0 .net *"_s99", 0 0, L_0x23687e0; 1 drivers +v0x2323340_0 .net/s "accOut", 10 0, L_0x2366730; 1 drivers +v0x2323420_0 .net "anyHasData", 0 0, L_0x23675a0; 1 drivers +v0x23234e0_0 .net "anyReadAck", 0 0, L_0x2368270; 1 drivers +v0x23235a0_0 .net "anyWantData", 0 0, L_0x2367b40; 1 drivers +v0x2323660_0 .net "anyWriteAck", 0 0, L_0x2368910; 1 drivers +v0x2323720_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +o0x2b7d4c4a5ea8 .functor BUFZ 15, C4; HiZ drive +v0x23237c0_0 .net "down", 14 0, o0x2b7d4c4a5ea8; 0 drivers +v0x2323880_0 .net "downOut", 14 0, L_0x2369ee0; 1 drivers +v0x2323960_0 .net "instruction", 17 0, L_0x23677d0; 1 drivers +v0x2323a40 .array "instructions", 15 0, 17 0; +v0x2323b00_0 .var "last", 2 0; +v0x2323be0_0 .net "left", 14 0, L_0x23663e0; alias, 1 drivers +v0x2323cc0_0 .net "leftOut", 14 0, L_0x2369c70; alias, 1 drivers +v0x2323da0_0 .var "mode", 2 0; +v0x2323e80 .array/s "outVals", 2 5, 10 0; +v0x2323fc0_0 .var "phase", 2 0; +v0x23240a0_0 .net "portsHaveData", 5 2, L_0x23672a0; 1 drivers +v0x23224d0_0 .net "portsWantData", 5 2, L_0x23678e0; 1 drivers +v0x23225b0_0 .net "readAckIn", 5 2, L_0x2367f40; 1 drivers +v0x2324550_0 .var "readAckOut", 5 2; +v0x23245f0_0 .var "readTarget", 2 0; +v0x2324690_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d51c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2324770 .array "regVals", 0 7; +v0x2324770_0 .net/s v0x2324770 0, 10 0, L_0x2b7d4c4d51c8; 1 drivers +v0x2324770_1 .net/s v0x2324770 1, 10 0, L_0x2366930; 1 drivers +v0x2324770_2 .net/s v0x2324770 2, 10 0, L_0x23669a0; 1 drivers +v0x2324770_3 .net/s v0x2324770 3, 10 0, L_0x2366d30; 1 drivers +v0x2324770_4 .net/s v0x2324770 4, 10 0, L_0x2366dd0; 1 drivers +v0x2324770_5 .net/s v0x2324770 5, 10 0, L_0x2366ea0; 1 drivers +o0x2b7d4c4a6328 .functor BUFZ 11, C4; HiZ drive +v0x2324770_6 .net/s v0x2324770 6, 10 0, o0x2b7d4c4a6328; 0 drivers +o0x2b7d4c4a6358 .functor BUFZ 11, C4; HiZ drive +v0x2324770_7 .net/s v0x2324770 7, 10 0, o0x2b7d4c4a6358; 0 drivers +v0x2324980_0 .net "right", 14 0, L_0x236de20; alias, 1 drivers +v0x2324a70_0 .net "rightOut", 14 0, L_0x236a550; alias, 1 drivers +o0x2b7d4c4a6388 .functor BUFZ 15, C4; HiZ drive +v0x2324b40_0 .net "up", 14 0, o0x2b7d4c4a6388; 0 drivers +v0x2324c00_0 .net "upOut", 14 0, L_0x23699f0; 1 drivers +v0x2324ce0_0 .var "weHaveData", 5 2; +v0x2324dc0_0 .var "weWantData", 5 2; +v0x2324ea0_0 .net "writeAckIn", 5 2, L_0x2368650; 1 drivers +v0x2324f80_0 .var "writeAckOut", 5 2; +v0x2325060_0 .var "writeTarget", 2 0; +v0x2325140_0 .var/s "writeValue", 10 0; +L_0x23669a0 .part L_0x23663e0, 0, 11; +L_0x2366d30 .part L_0x236de20, 0, 11; +L_0x2366dd0 .part o0x2b7d4c4a6388, 0, 11; +L_0x2366ea0 .part o0x2b7d4c4a5ea8, 0, 11; +L_0x2366fd0 .part L_0x23663e0, 11, 1; +L_0x23670a0 .part L_0x236de20, 11, 1; +L_0x2367200 .part o0x2b7d4c4a6388, 11, 1; +L_0x23672a0 .concat8 [ 1 1 1 1], L_0x2366fd0, L_0x23670a0, L_0x2367200, L_0x2367460; +L_0x2367460 .part o0x2b7d4c4a5ea8, 11, 1; +L_0x23675a0 .reduce/or L_0x23672a0; +L_0x2367690 .part L_0x23663e0, 12, 1; +L_0x2367730 .part L_0x236de20, 12, 1; +L_0x2367840 .part o0x2b7d4c4a6388, 12, 1; +L_0x23678e0 .concat8 [ 1 1 1 1], L_0x2367690, L_0x2367730, L_0x2367840, L_0x2367a50; +L_0x2367a50 .part o0x2b7d4c4a5ea8, 12, 1; +L_0x2367b40 .reduce/or L_0x23678e0; +L_0x2367cc0 .part L_0x23663e0, 13, 1; +L_0x2367d60 .part L_0x236de20, 13, 1; +L_0x2367ea0 .part o0x2b7d4c4a6388, 13, 1; +L_0x2367f40 .concat8 [ 1 1 1 1], L_0x2367cc0, L_0x2367d60, L_0x2367ea0, L_0x2367e00; +L_0x2367e00 .part o0x2b7d4c4a5ea8, 13, 1; +L_0x2368270 .reduce/or L_0x2367f40; +L_0x23680e0 .part L_0x23663e0, 14, 1; +L_0x23684e0 .part L_0x236de20, 14, 1; +L_0x2368310 .part o0x2b7d4c4a6388, 14, 1; +L_0x2368650 .concat8 [ 1 1 1 1], L_0x23680e0, L_0x23684e0, L_0x2368310, L_0x2368580; +L_0x2368580 .part o0x2b7d4c4a5ea8, 14, 1; +L_0x2368910 .reduce/or L_0x2368650; +L_0x23687e0 .part v0x2324550_0, 0, 1; +L_0x2368af0 .part v0x2324550_0, 1, 1; +L_0x2368a00 .part v0x2324550_0, 2, 1; +L_0x2368ce0 .part v0x2324550_0, 3, 1; +L_0x2368be0 .part v0x2324f80_0, 0, 1; +L_0x2368f20 .part v0x2324f80_0, 1, 1; +L_0x2368e10 .part v0x2324f80_0, 2, 1; +L_0x23690e0 .part v0x2324f80_0, 3, 1; +L_0x2368fc0 .part v0x2324dc0_0, 0, 1; +L_0x2369340 .part v0x2324dc0_0, 1, 1; +L_0x2369210 .part v0x2324dc0_0, 2, 1; +L_0x2369520 .part v0x2324dc0_0, 3, 1; +L_0x23693e0 .part v0x2324ce0_0, 0, 1; +L_0x2369710 .part v0x2324ce0_0, 1, 1; +L_0x23695c0 .part v0x2324ce0_0, 2, 1; +L_0x2369660 .part v0x2324ce0_0, 3, 1; +L_0x23697b0 .array/port v0x2323a40, L_0x2369b10; +L_0x2369b10 .concat [ 4 2 0 0], v0x2320c50_0, L_0x2b7d4c4d5210; +LS_0x23699f0_0_0 .concat8 [ 11 1 1 1], v0x2323e80_2, L_0x23695c0, L_0x2369210, L_0x2368e10; +LS_0x23699f0_0_4 .concat8 [ 1 0 0 0], L_0x2368a00; +L_0x23699f0 .concat8 [ 14 1 0 0], LS_0x23699f0_0_0, LS_0x23699f0_0_4; +LS_0x2369ee0_0_0 .concat8 [ 11 1 1 1], v0x2323e80_3, L_0x2369660, L_0x2369520, L_0x23690e0; +LS_0x2369ee0_0_4 .concat8 [ 1 0 0 0], L_0x2368ce0; +L_0x2369ee0 .concat8 [ 14 1 0 0], LS_0x2369ee0_0_0, LS_0x2369ee0_0_4; +LS_0x2369c70_0_0 .concat8 [ 11 1 1 1], v0x2323e80_0, L_0x23693e0, L_0x2368fc0, L_0x2368be0; +LS_0x2369c70_0_4 .concat8 [ 1 0 0 0], L_0x23687e0; +L_0x2369c70 .concat8 [ 14 1 0 0], LS_0x2369c70_0_0, LS_0x2369c70_0_4; +LS_0x236a550_0_0 .concat8 [ 11 1 1 1], v0x2323e80_1, L_0x2369710, L_0x2369340, L_0x2368f20; +LS_0x236a550_0_4 .concat8 [ 1 0 0 0], L_0x2368af0; +L_0x236a550 .concat8 [ 14 1 0 0], LS_0x236a550_0_0, LS_0x236a550_0_4; +L_0x236a1c0 .part L_0x23677d0, 14, 4; +L_0x236a960 .part L_0x23677d0, 11, 3; +L_0x236a770 .part L_0x23677d0, 8, 3; +L_0x236abb0 .part L_0x23677d0, 10, 4; +L_0x236aa00 .part L_0x23677d0, 0, 11; +S_0x23253c0 .scope module, "in" "tis100" 3 62, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -424,175 +424,175 @@ S_0x1ddc900 .scope module, "in" "tis100" 3 62, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1ddcb00 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1ddcb40 .param/str "memFile" 0 4 60, "demo/in.dat"; -L_0x1e2e220 .functor BUFZ 11, v0x1ddce00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e2e420 .functor BUFZ 11, v0x1ddce00_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e2f2a0 .functor BUFZ 18, L_0x1e31300, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1ddce00_0 .var/s "ACC", 10 0; -v0x1ddcf00_0 .var/s "BAK", 10 0; -v0x1ddcfe0_0 .net "DST", 2 0, L_0x1df5820; 1 drivers -v0x1ddd0a0_0 .net/s "IMM", 10 0, L_0x1de61e0; 1 drivers -v0x1ddd180_0 .net "INST", 3 0, L_0x1df0660; 1 drivers -v0x1ddd2b0_0 .net "LABEL", 3 0, L_0x1dfaa10; 1 drivers -v0x1ddd390_0 .var "PC", 3 0; -v0x1ddd470_0 .var "PCNEXT", 3 0; -v0x1ddd550_0 .net "SRC", 2 0, L_0x1dd6bd0; 1 drivers -v0x1ddd6c0_0 .net *"_s103", 0 0, L_0x1e30640; 1 drivers -v0x1ddd7a0_0 .net *"_s107", 0 0, L_0x1e30550; 1 drivers -v0x1ddd880_0 .net *"_s111", 0 0, L_0x1e30830; 1 drivers -v0x1ddd960_0 .net *"_s115", 0 0, L_0x1e30730; 1 drivers -v0x1ddda40_0 .net *"_s119", 0 0, L_0x1e30a70; 1 drivers -v0x1dddb20_0 .net *"_s123", 0 0, L_0x1e30960; 1 drivers -v0x1dddc00_0 .net *"_s127", 0 0, L_0x1e30c30; 1 drivers -v0x1dddce0_0 .net *"_s131", 0 0, L_0x1e30b10; 1 drivers -v0x1ddde90_0 .net *"_s135", 0 0, L_0x1e30e90; 1 drivers -v0x1dddf30_0 .net *"_s139", 0 0, L_0x1e30d60; 1 drivers -v0x1dde010_0 .net *"_s143", 0 0, L_0x1e31070; 1 drivers -v0x1dde0f0_0 .net *"_s147", 0 0, L_0x1e30f30; 1 drivers -v0x1dde1d0_0 .net *"_s151", 0 0, L_0x1e31260; 1 drivers -v0x1dde2b0_0 .net *"_s155", 0 0, L_0x1e31110; 1 drivers -v0x1dde390_0 .net *"_s159", 0 0, L_0x1e311b0; 1 drivers -v0x1dde470_0 .net *"_s160", 17 0, L_0x1e31300; 1 drivers -v0x1dde550_0 .net *"_s162", 5 0, L_0x1e31660; 1 drivers -L_0x2b89f5927450 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1dde630_0 .net *"_s165", 1 0, L_0x2b89f5927450; 1 drivers -v0x1de05e0_2 .array/port v0x1de05e0, 2; -v0x1dde710_0 .net *"_s173", 10 0, v0x1de05e0_2; 1 drivers -v0x1de05e0_3 .array/port v0x1de05e0, 3; -v0x1dde7f0_0 .net *"_s179", 10 0, v0x1de05e0_3; 1 drivers -v0x1de05e0_0 .array/port v0x1de05e0, 0; -v0x1dde8d0_0 .net *"_s185", 10 0, v0x1de05e0_0; 1 drivers -v0x1de05e0_1 .array/port v0x1de05e0, 1; -v0x1dde9b0_0 .net *"_s191", 10 0, v0x1de05e0_1; 1 drivers -v0x1ddea90_0 .net *"_s23", 0 0, L_0x1e2eac0; 1 drivers -v0x1ddeb70_0 .net *"_s27", 0 0, L_0x1e2eb90; 1 drivers -v0x1ddddc0_0 .net *"_s31", 0 0, L_0x1e2ec80; 1 drivers -v0x1ddee40_0 .net *"_s36", 0 0, L_0x1e2ef80; 1 drivers -v0x1ddef20_0 .net *"_s42", 0 0, L_0x1e2f160; 1 drivers -v0x1ddf000_0 .net *"_s46", 0 0, L_0x1e2f200; 1 drivers -v0x1ddf0e0_0 .net *"_s50", 0 0, L_0x1e2f310; 1 drivers -v0x1ddf1c0_0 .net *"_s55", 0 0, L_0x1e2f550; 1 drivers -v0x1ddf2a0_0 .net *"_s61", 0 0, L_0x1e2f7c0; 1 drivers -v0x1ddf380_0 .net *"_s65", 0 0, L_0x1e2f8f0; 1 drivers -v0x1ddf460_0 .net *"_s69", 0 0, L_0x1e2fac0; 1 drivers -v0x1ddf540_0 .net *"_s74", 0 0, L_0x1e2fa20; 1 drivers -v0x1ddf620_0 .net *"_s80", 0 0, L_0x1e2fc60; 1 drivers -v0x1ddf700_0 .net *"_s84", 0 0, L_0x1e2ff10; 1 drivers -v0x1ddf7e0_0 .net *"_s88", 0 0, L_0x1e2fe50; 1 drivers -v0x1ddf8c0_0 .net *"_s93", 0 0, L_0x1e2ffb0; 1 drivers -v0x1ddf9a0_0 .net *"_s99", 0 0, L_0x1e30270; 1 drivers -v0x1ddfa80_0 .net/s "accOut", 10 0, L_0x1e2e220; 1 drivers -v0x1ddfb60_0 .net "anyHasData", 0 0, L_0x1e2f070; 1 drivers -v0x1ddfc20_0 .net "anyReadAck", 0 0, L_0x1e2fd60; 1 drivers -v0x1ddfce0_0 .net "anyWantData", 0 0, L_0x1e2f640; 1 drivers -v0x1ddfda0_0 .net "anyWriteAck", 0 0, L_0x1e304b0; 1 drivers -v0x1ddfe60_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -v0x1ddff00_0 .net "down", 14 0, L_0x1e14cb0; alias, 1 drivers -v0x1ddffe0_0 .net "downOut", 14 0, L_0x1e31a80; alias, 1 drivers -v0x1de00c0_0 .net "instruction", 17 0, L_0x1e2f2a0; 1 drivers -v0x1de01a0 .array "instructions", 15 0, 17 0; -v0x1de0260_0 .var "last", 2 0; -o0x2b89f58f9198 .functor BUFZ 15, C4; HiZ drive -v0x1de0340_0 .net "left", 14 0, o0x2b89f58f9198; 0 drivers -v0x1de0420_0 .net "leftOut", 14 0, L_0x1e317c0; 1 drivers -v0x1de0500_0 .var "mode", 2 0; -v0x1de05e0 .array/s "outVals", 2 5, 10 0; -v0x1de0720_0 .var "phase", 2 0; -v0x1de0800_0 .net "portsHaveData", 5 2, L_0x1e2ed70; 1 drivers -v0x1ddec10_0 .net "portsWantData", 5 2, L_0x1e2f3b0; 1 drivers -v0x1ddecf0_0 .net "readAckIn", 5 2, L_0x1e2fb60; 1 drivers -v0x1de0cb0_0 .var "readAckOut", 5 2; -v0x1de0d50_0 .var "readTarget", 2 0; -v0x1de0df0_0 .var/s "readValue", 10 0; -L_0x2b89f5927408 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1de0eb0 .array "regVals", 0 7; -v0x1de0eb0_0 .net/s v0x1de0eb0 0, 10 0, L_0x2b89f5927408; 1 drivers -v0x1de0eb0_1 .net/s v0x1de0eb0 1, 10 0, L_0x1e2e420; 1 drivers -v0x1de0eb0_2 .net/s v0x1de0eb0 2, 10 0, L_0x1e2e490; 1 drivers -v0x1de0eb0_3 .net/s v0x1de0eb0 3, 10 0, L_0x1e2e790; 1 drivers -v0x1de0eb0_4 .net/s v0x1de0eb0 4, 10 0, L_0x1e2e830; 1 drivers -v0x1de0eb0_5 .net/s v0x1de0eb0 5, 10 0, L_0x1e2e930; 1 drivers -o0x2b89f58f9558 .functor BUFZ 11, C4; HiZ drive -v0x1de0eb0_6 .net/s v0x1de0eb0 6, 10 0, o0x2b89f58f9558; 0 drivers -o0x2b89f58f9588 .functor BUFZ 11, C4; HiZ drive -v0x1de0eb0_7 .net/s v0x1de0eb0 7, 10 0, o0x2b89f58f9588; 0 drivers -o0x2b89f58f95b8 .functor BUFZ 15, C4; HiZ drive -v0x1de10c0_0 .net "right", 14 0, o0x2b89f58f95b8; 0 drivers -v0x1de11a0_0 .net "rightOut", 14 0, L_0x1de0fe0; 1 drivers -o0x2b89f58f9618 .functor BUFZ 15, C4; HiZ drive -v0x1de1280_0 .net "up", 14 0, o0x2b89f58f9618; 0 drivers -v0x1de1360_0 .net "upOut", 14 0, L_0x1e31570; 1 drivers -v0x1de1440_0 .var "weHaveData", 5 2; -v0x1de1520_0 .var "weWantData", 5 2; -v0x1de1600_0 .net "writeAckIn", 5 2, L_0x1e30080; 1 drivers -v0x1de16e0_0 .var "writeAckOut", 5 2; -v0x1de17c0_0 .var "writeTarget", 2 0; -v0x1de18a0_0 .var/s "writeValue", 10 0; -L_0x1e2e490 .part o0x2b89f58f9198, 0, 11; -L_0x1e2e790 .part o0x2b89f58f95b8, 0, 11; -L_0x1e2e830 .part o0x2b89f58f9618, 0, 11; -L_0x1e2e930 .part L_0x1e14cb0, 0, 11; -L_0x1e2eac0 .part o0x2b89f58f9198, 11, 1; -L_0x1e2eb90 .part o0x2b89f58f95b8, 11, 1; -L_0x1e2ec80 .part o0x2b89f58f9618, 11, 1; -L_0x1e2ed70 .concat8 [ 1 1 1 1], L_0x1e2eac0, L_0x1e2eb90, L_0x1e2ec80, L_0x1e2ef80; -L_0x1e2ef80 .part L_0x1e14cb0, 11, 1; -L_0x1e2f070 .reduce/or L_0x1e2ed70; -L_0x1e2f160 .part o0x2b89f58f9198, 12, 1; -L_0x1e2f200 .part o0x2b89f58f95b8, 12, 1; -L_0x1e2f310 .part o0x2b89f58f9618, 12, 1; -L_0x1e2f3b0 .concat8 [ 1 1 1 1], L_0x1e2f160, L_0x1e2f200, L_0x1e2f310, L_0x1e2f550; -L_0x1e2f550 .part L_0x1e14cb0, 12, 1; -L_0x1e2f640 .reduce/or L_0x1e2f3b0; -L_0x1e2f7c0 .part o0x2b89f58f9198, 13, 1; -L_0x1e2f8f0 .part o0x2b89f58f95b8, 13, 1; -L_0x1e2fac0 .part o0x2b89f58f9618, 13, 1; -L_0x1e2fb60 .concat8 [ 1 1 1 1], L_0x1e2f7c0, L_0x1e2f8f0, L_0x1e2fac0, L_0x1e2fa20; -L_0x1e2fa20 .part L_0x1e14cb0, 13, 1; -L_0x1e2fd60 .reduce/or L_0x1e2fb60; -L_0x1e2fc60 .part o0x2b89f58f9198, 14, 1; -L_0x1e2ff10 .part o0x2b89f58f95b8, 14, 1; -L_0x1e2fe50 .part o0x2b89f58f9618, 14, 1; -L_0x1e30080 .concat8 [ 1 1 1 1], L_0x1e2fc60, L_0x1e2ff10, L_0x1e2fe50, L_0x1e2ffb0; -L_0x1e2ffb0 .part L_0x1e14cb0, 14, 1; -L_0x1e304b0 .reduce/or L_0x1e30080; -L_0x1e30270 .part v0x1de0cb0_0, 0, 1; -L_0x1e30640 .part v0x1de0cb0_0, 1, 1; -L_0x1e30550 .part v0x1de0cb0_0, 2, 1; -L_0x1e30830 .part v0x1de0cb0_0, 3, 1; -L_0x1e30730 .part v0x1de16e0_0, 0, 1; -L_0x1e30a70 .part v0x1de16e0_0, 1, 1; -L_0x1e30960 .part v0x1de16e0_0, 2, 1; -L_0x1e30c30 .part v0x1de16e0_0, 3, 1; -L_0x1e30b10 .part v0x1de1520_0, 0, 1; -L_0x1e30e90 .part v0x1de1520_0, 1, 1; -L_0x1e30d60 .part v0x1de1520_0, 2, 1; -L_0x1e31070 .part v0x1de1520_0, 3, 1; -L_0x1e30f30 .part v0x1de1440_0, 0, 1; -L_0x1e31260 .part v0x1de1440_0, 1, 1; -L_0x1e31110 .part v0x1de1440_0, 2, 1; -L_0x1e311b0 .part v0x1de1440_0, 3, 1; -L_0x1e31300 .array/port v0x1de01a0, L_0x1e31660; -L_0x1e31660 .concat [ 4 2 0 0], v0x1ddd390_0, L_0x2b89f5927450; -LS_0x1e31570_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_2, L_0x1e31110, L_0x1e30d60, L_0x1e30960; -LS_0x1e31570_0_4 .concat8 [ 1 0 0 0], L_0x1e30550; -L_0x1e31570 .concat8 [ 14 1 0 0], LS_0x1e31570_0_0, LS_0x1e31570_0_4; -LS_0x1e31a80_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_3, L_0x1e311b0, L_0x1e31070, L_0x1e30c30; -LS_0x1e31a80_0_4 .concat8 [ 1 0 0 0], L_0x1e30830; -L_0x1e31a80 .concat8 [ 14 1 0 0], LS_0x1e31a80_0_0, LS_0x1e31a80_0_4; -LS_0x1e317c0_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_0, L_0x1e30f30, L_0x1e30b10, L_0x1e30730; -LS_0x1e317c0_0_4 .concat8 [ 1 0 0 0], L_0x1e30270; -L_0x1e317c0 .concat8 [ 14 1 0 0], LS_0x1e317c0_0_0, LS_0x1e317c0_0_4; -LS_0x1de0fe0_0_0 .concat8 [ 11 1 1 1], v0x1de05e0_1, L_0x1e31260, L_0x1e30e90, L_0x1e30a70; -LS_0x1de0fe0_0_4 .concat8 [ 1 0 0 0], L_0x1e30640; -L_0x1de0fe0 .concat8 [ 14 1 0 0], LS_0x1de0fe0_0_0, LS_0x1de0fe0_0_4; -L_0x1df0660 .part L_0x1e2f2a0, 14, 4; -L_0x1df5820 .part L_0x1e2f2a0, 11, 3; -L_0x1dd6bd0 .part L_0x1e2f2a0, 8, 3; -L_0x1dfaa10 .part L_0x1e2f2a0, 10, 4; -L_0x1de61e0 .part L_0x1e2f2a0, 0, 11; -S_0x1de1b20 .scope module, "one" "tis100" 3 34, 4 49 0, S_0x1cc1e10; +P_0x23255c0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x2325600 .param/str "memFile" 0 4 60, "demo/in.dat"; +L_0x2376cc0 .functor BUFZ 11, v0x23258c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2376ec0 .functor BUFZ 11, v0x23258c0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2377d40 .functor BUFZ 18, L_0x2379da0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x23258c0_0 .var/s "ACC", 10 0; +v0x23259c0_0 .var/s "BAK", 10 0; +v0x2325aa0_0 .net "DST", 2 0, L_0x237af20; 1 drivers +v0x2325b60_0 .net/s "IMM", 10 0, L_0x231f690; 1 drivers +v0x2325c40_0 .net "INST", 3 0, L_0x237a880; 1 drivers +v0x2325d70_0 .net "LABEL", 3 0, L_0x233e2e0; 1 drivers +v0x2325e50_0 .var "PC", 3 0; +v0x2325f30_0 .var "PCNEXT", 3 0; +v0x2326010_0 .net "SRC", 2 0, L_0x2329aa0; 1 drivers +v0x2326180_0 .net *"_s103", 0 0, L_0x23790e0; 1 drivers +v0x2326260_0 .net *"_s107", 0 0, L_0x2378ff0; 1 drivers +v0x2326340_0 .net *"_s111", 0 0, L_0x23792d0; 1 drivers +v0x2326420_0 .net *"_s115", 0 0, L_0x23791d0; 1 drivers +v0x2326500_0 .net *"_s119", 0 0, L_0x2379510; 1 drivers +v0x23265e0_0 .net *"_s123", 0 0, L_0x2379400; 1 drivers +v0x23266c0_0 .net *"_s127", 0 0, L_0x23796d0; 1 drivers +v0x23267a0_0 .net *"_s131", 0 0, L_0x23795b0; 1 drivers +v0x2326950_0 .net *"_s135", 0 0, L_0x2379930; 1 drivers +v0x23269f0_0 .net *"_s139", 0 0, L_0x2379800; 1 drivers +v0x2326ad0_0 .net *"_s143", 0 0, L_0x2379b10; 1 drivers +v0x2326bb0_0 .net *"_s147", 0 0, L_0x23799d0; 1 drivers +v0x2326c90_0 .net *"_s151", 0 0, L_0x2379d00; 1 drivers +v0x2326d70_0 .net *"_s155", 0 0, L_0x2379bb0; 1 drivers +v0x2326e50_0 .net *"_s159", 0 0, L_0x2379c50; 1 drivers +v0x2326f30_0 .net *"_s160", 17 0, L_0x2379da0; 1 drivers +v0x2327010_0 .net *"_s162", 5 0, L_0x237a100; 1 drivers +L_0x2b7d4c4d5450 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x23270f0_0 .net *"_s165", 1 0, L_0x2b7d4c4d5450; 1 drivers +v0x23290a0_2 .array/port v0x23290a0, 2; +v0x23271d0_0 .net *"_s173", 10 0, v0x23290a0_2; 1 drivers +v0x23290a0_3 .array/port v0x23290a0, 3; +v0x23272b0_0 .net *"_s179", 10 0, v0x23290a0_3; 1 drivers +v0x23290a0_0 .array/port v0x23290a0, 0; +v0x2327390_0 .net *"_s185", 10 0, v0x23290a0_0; 1 drivers +v0x23290a0_1 .array/port v0x23290a0, 1; +v0x2327470_0 .net *"_s191", 10 0, v0x23290a0_1; 1 drivers +v0x2327550_0 .net *"_s23", 0 0, L_0x2377560; 1 drivers +v0x2327630_0 .net *"_s27", 0 0, L_0x2377630; 1 drivers +v0x2326880_0 .net *"_s31", 0 0, L_0x2377720; 1 drivers +v0x2327900_0 .net *"_s36", 0 0, L_0x2377a20; 1 drivers +v0x23279e0_0 .net *"_s42", 0 0, L_0x2377c00; 1 drivers +v0x2327ac0_0 .net *"_s46", 0 0, L_0x2377ca0; 1 drivers +v0x2327ba0_0 .net *"_s50", 0 0, L_0x2377db0; 1 drivers +v0x2327c80_0 .net *"_s55", 0 0, L_0x2377ff0; 1 drivers +v0x2327d60_0 .net *"_s61", 0 0, L_0x2378260; 1 drivers +v0x2327e40_0 .net *"_s65", 0 0, L_0x2378390; 1 drivers +v0x2327f20_0 .net *"_s69", 0 0, L_0x2378560; 1 drivers +v0x2328000_0 .net *"_s74", 0 0, L_0x23784c0; 1 drivers +v0x23280e0_0 .net *"_s80", 0 0, L_0x2378700; 1 drivers +v0x23281c0_0 .net *"_s84", 0 0, L_0x23789b0; 1 drivers +v0x23282a0_0 .net *"_s88", 0 0, L_0x23788f0; 1 drivers +v0x2328380_0 .net *"_s93", 0 0, L_0x2378a50; 1 drivers +v0x2328460_0 .net *"_s99", 0 0, L_0x2378d10; 1 drivers +v0x2328540_0 .net/s "accOut", 10 0, L_0x2376cc0; 1 drivers +v0x2328620_0 .net "anyHasData", 0 0, L_0x2377b10; 1 drivers +v0x23286e0_0 .net "anyReadAck", 0 0, L_0x2378800; 1 drivers +v0x23287a0_0 .net "anyWantData", 0 0, L_0x23780e0; 1 drivers +v0x2328860_0 .net "anyWriteAck", 0 0, L_0x2378f50; 1 drivers +v0x2328920_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +v0x23289c0_0 .net "down", 14 0, L_0x235d750; alias, 1 drivers +v0x2328aa0_0 .net "downOut", 14 0, L_0x237a520; alias, 1 drivers +v0x2328b80_0 .net "instruction", 17 0, L_0x2377d40; 1 drivers +v0x2328c60 .array "instructions", 15 0, 17 0; +v0x2328d20_0 .var "last", 2 0; +o0x2b7d4c4a7198 .functor BUFZ 15, C4; HiZ drive +v0x2328e00_0 .net "left", 14 0, o0x2b7d4c4a7198; 0 drivers +v0x2328ee0_0 .net "leftOut", 14 0, L_0x237a260; 1 drivers +v0x2328fc0_0 .var "mode", 2 0; +v0x23290a0 .array/s "outVals", 2 5, 10 0; +v0x23291e0_0 .var "phase", 2 0; +v0x23292c0_0 .net "portsHaveData", 5 2, L_0x2377810; 1 drivers +v0x23276d0_0 .net "portsWantData", 5 2, L_0x2377e50; 1 drivers +v0x23277b0_0 .net "readAckIn", 5 2, L_0x2378600; 1 drivers +v0x2329770_0 .var "readAckOut", 5 2; +v0x2329810_0 .var "readTarget", 2 0; +v0x23298b0_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d5408 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2329970 .array "regVals", 0 7; +v0x2329970_0 .net/s v0x2329970 0, 10 0, L_0x2b7d4c4d5408; 1 drivers +v0x2329970_1 .net/s v0x2329970 1, 10 0, L_0x2376ec0; 1 drivers +v0x2329970_2 .net/s v0x2329970 2, 10 0, L_0x2376f30; 1 drivers +v0x2329970_3 .net/s v0x2329970 3, 10 0, L_0x2377230; 1 drivers +v0x2329970_4 .net/s v0x2329970 4, 10 0, L_0x23772d0; 1 drivers +v0x2329970_5 .net/s v0x2329970 5, 10 0, L_0x23773d0; 1 drivers +o0x2b7d4c4a7558 .functor BUFZ 11, C4; HiZ drive +v0x2329970_6 .net/s v0x2329970 6, 10 0, o0x2b7d4c4a7558; 0 drivers +o0x2b7d4c4a7588 .functor BUFZ 11, C4; HiZ drive +v0x2329970_7 .net/s v0x2329970 7, 10 0, o0x2b7d4c4a7588; 0 drivers +o0x2b7d4c4a75b8 .functor BUFZ 15, C4; HiZ drive +v0x2329b80_0 .net "right", 14 0, o0x2b7d4c4a75b8; 0 drivers +v0x2329c60_0 .net "rightOut", 14 0, L_0x237ab50; 1 drivers +o0x2b7d4c4a7618 .functor BUFZ 15, C4; HiZ drive +v0x2329d40_0 .net "up", 14 0, o0x2b7d4c4a7618; 0 drivers +v0x2329e20_0 .net "upOut", 14 0, L_0x237a010; 1 drivers +v0x2329f00_0 .var "weHaveData", 5 2; +v0x2329fe0_0 .var "weWantData", 5 2; +v0x232a0c0_0 .net "writeAckIn", 5 2, L_0x2378b20; 1 drivers +v0x232a1a0_0 .var "writeAckOut", 5 2; +v0x232a280_0 .var "writeTarget", 2 0; +v0x232a360_0 .var/s "writeValue", 10 0; +L_0x2376f30 .part o0x2b7d4c4a7198, 0, 11; +L_0x2377230 .part o0x2b7d4c4a75b8, 0, 11; +L_0x23772d0 .part o0x2b7d4c4a7618, 0, 11; +L_0x23773d0 .part L_0x235d750, 0, 11; +L_0x2377560 .part o0x2b7d4c4a7198, 11, 1; +L_0x2377630 .part o0x2b7d4c4a75b8, 11, 1; +L_0x2377720 .part o0x2b7d4c4a7618, 11, 1; +L_0x2377810 .concat8 [ 1 1 1 1], L_0x2377560, L_0x2377630, L_0x2377720, L_0x2377a20; +L_0x2377a20 .part L_0x235d750, 11, 1; +L_0x2377b10 .reduce/or L_0x2377810; +L_0x2377c00 .part o0x2b7d4c4a7198, 12, 1; +L_0x2377ca0 .part o0x2b7d4c4a75b8, 12, 1; +L_0x2377db0 .part o0x2b7d4c4a7618, 12, 1; +L_0x2377e50 .concat8 [ 1 1 1 1], L_0x2377c00, L_0x2377ca0, L_0x2377db0, L_0x2377ff0; +L_0x2377ff0 .part L_0x235d750, 12, 1; +L_0x23780e0 .reduce/or L_0x2377e50; +L_0x2378260 .part o0x2b7d4c4a7198, 13, 1; +L_0x2378390 .part o0x2b7d4c4a75b8, 13, 1; +L_0x2378560 .part o0x2b7d4c4a7618, 13, 1; +L_0x2378600 .concat8 [ 1 1 1 1], L_0x2378260, L_0x2378390, L_0x2378560, L_0x23784c0; +L_0x23784c0 .part L_0x235d750, 13, 1; +L_0x2378800 .reduce/or L_0x2378600; +L_0x2378700 .part o0x2b7d4c4a7198, 14, 1; +L_0x23789b0 .part o0x2b7d4c4a75b8, 14, 1; +L_0x23788f0 .part o0x2b7d4c4a7618, 14, 1; +L_0x2378b20 .concat8 [ 1 1 1 1], L_0x2378700, L_0x23789b0, L_0x23788f0, L_0x2378a50; +L_0x2378a50 .part L_0x235d750, 14, 1; +L_0x2378f50 .reduce/or L_0x2378b20; +L_0x2378d10 .part v0x2329770_0, 0, 1; +L_0x23790e0 .part v0x2329770_0, 1, 1; +L_0x2378ff0 .part v0x2329770_0, 2, 1; +L_0x23792d0 .part v0x2329770_0, 3, 1; +L_0x23791d0 .part v0x232a1a0_0, 0, 1; +L_0x2379510 .part v0x232a1a0_0, 1, 1; +L_0x2379400 .part v0x232a1a0_0, 2, 1; +L_0x23796d0 .part v0x232a1a0_0, 3, 1; +L_0x23795b0 .part v0x2329fe0_0, 0, 1; +L_0x2379930 .part v0x2329fe0_0, 1, 1; +L_0x2379800 .part v0x2329fe0_0, 2, 1; +L_0x2379b10 .part v0x2329fe0_0, 3, 1; +L_0x23799d0 .part v0x2329f00_0, 0, 1; +L_0x2379d00 .part v0x2329f00_0, 1, 1; +L_0x2379bb0 .part v0x2329f00_0, 2, 1; +L_0x2379c50 .part v0x2329f00_0, 3, 1; +L_0x2379da0 .array/port v0x2328c60, L_0x237a100; +L_0x237a100 .concat [ 4 2 0 0], v0x2325e50_0, L_0x2b7d4c4d5450; +LS_0x237a010_0_0 .concat8 [ 11 1 1 1], v0x23290a0_2, L_0x2379bb0, L_0x2379800, L_0x2379400; +LS_0x237a010_0_4 .concat8 [ 1 0 0 0], L_0x2378ff0; +L_0x237a010 .concat8 [ 14 1 0 0], LS_0x237a010_0_0, LS_0x237a010_0_4; +LS_0x237a520_0_0 .concat8 [ 11 1 1 1], v0x23290a0_3, L_0x2379c50, L_0x2379b10, L_0x23796d0; +LS_0x237a520_0_4 .concat8 [ 1 0 0 0], L_0x23792d0; +L_0x237a520 .concat8 [ 14 1 0 0], LS_0x237a520_0_0, LS_0x237a520_0_4; +LS_0x237a260_0_0 .concat8 [ 11 1 1 1], v0x23290a0_0, L_0x23799d0, L_0x23795b0, L_0x23791d0; +LS_0x237a260_0_4 .concat8 [ 1 0 0 0], L_0x2378d10; +L_0x237a260 .concat8 [ 14 1 0 0], LS_0x237a260_0_0, LS_0x237a260_0_4; +LS_0x237ab50_0_0 .concat8 [ 11 1 1 1], v0x23290a0_1, L_0x2379d00, L_0x2379930, L_0x2379510; +LS_0x237ab50_0_4 .concat8 [ 1 0 0 0], L_0x23790e0; +L_0x237ab50 .concat8 [ 14 1 0 0], LS_0x237ab50_0_0, LS_0x237ab50_0_4; +L_0x237a880 .part L_0x2377d40, 14, 4; +L_0x237af20 .part L_0x2377d40, 11, 3; +L_0x2329aa0 .part L_0x2377d40, 8, 3; +L_0x233e2e0 .part L_0x2377d40, 10, 4; +L_0x231f690 .part L_0x2377d40, 0, 11; +S_0x232a5e0 .scope module, "one" "tis100" 3 34, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -604,174 +604,174 @@ S_0x1de1b20 .scope module, "one" "tis100" 3 34, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1de1cf0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1de1d30 .param/str "memFile" 0 4 60, "demo/one.dat"; -L_0x1e01e90 .functor BUFZ 11, v0x1de2010_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e11f10 .functor BUFZ 11, v0x1de2010_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e12a50 .functor BUFZ 18, L_0x1e14a20, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1de2010_0 .var/s "ACC", 10 0; -v0x1de2110_0 .var/s "BAK", 10 0; -v0x1de21f0_0 .net "DST", 2 0, L_0x1e15ba0; 1 drivers -v0x1de22b0_0 .net/s "IMM", 10 0, L_0x1e15c40; 1 drivers -v0x1de2390_0 .net "INST", 3 0, L_0x1e15480; 1 drivers -v0x1de24c0_0 .net "LABEL", 3 0, L_0x1e15df0; 1 drivers -v0x1de25a0_0 .var "PC", 3 0; -v0x1de2680_0 .var "PCNEXT", 3 0; -v0x1de2760_0 .net "SRC", 2 0, L_0x1e159b0; 1 drivers -v0x1de28d0_0 .net *"_s103", 0 0, L_0x1e13d60; 1 drivers -v0x1de29b0_0 .net *"_s107", 0 0, L_0x1e13c70; 1 drivers -v0x1de2a90_0 .net *"_s111", 0 0, L_0x1e13f50; 1 drivers -v0x1de2b70_0 .net *"_s115", 0 0, L_0x1e13e50; 1 drivers -v0x1de2c50_0 .net *"_s119", 0 0, L_0x1e14190; 1 drivers -v0x1de2d30_0 .net *"_s123", 0 0, L_0x1e14080; 1 drivers -v0x1de2e10_0 .net *"_s127", 0 0, L_0x1e14350; 1 drivers -v0x1de2ef0_0 .net *"_s131", 0 0, L_0x1e14230; 1 drivers -v0x1de30a0_0 .net *"_s135", 0 0, L_0x1e145b0; 1 drivers -v0x1de3140_0 .net *"_s139", 0 0, L_0x1e14480; 1 drivers -v0x1de31e0_0 .net *"_s143", 0 0, L_0x1e14790; 1 drivers -v0x1de3280_0 .net *"_s147", 0 0, L_0x1e14650; 1 drivers -v0x1de3320_0 .net *"_s151", 0 0, L_0x1e14980; 1 drivers -v0x1de33e0_0 .net *"_s155", 0 0, L_0x1e14830; 1 drivers -v0x1de34c0_0 .net *"_s159", 0 0, L_0x1e148d0; 1 drivers -v0x1de35a0_0 .net *"_s160", 17 0, L_0x1e14a20; 1 drivers -v0x1de3680_0 .net *"_s162", 5 0, L_0x1e14d80; 1 drivers -L_0x2b89f5927060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1de3760_0 .net *"_s165", 1 0, L_0x2b89f5927060; 1 drivers -v0x1de5710_2 .array/port v0x1de5710, 2; -v0x1de3840_0 .net *"_s173", 10 0, v0x1de5710_2; 1 drivers -v0x1de5710_3 .array/port v0x1de5710, 3; -v0x1de3920_0 .net *"_s179", 10 0, v0x1de5710_3; 1 drivers -v0x1de5710_0 .array/port v0x1de5710, 0; -v0x1de3a00_0 .net *"_s185", 10 0, v0x1de5710_0; 1 drivers -v0x1de5710_1 .array/port v0x1de5710, 1; -v0x1de3ae0_0 .net *"_s191", 10 0, v0x1de5710_1; 1 drivers -v0x1de3bc0_0 .net *"_s23", 0 0, L_0x1e12200; 1 drivers -v0x1de3ca0_0 .net *"_s27", 0 0, L_0x1e122a0; 1 drivers -v0x1de2fd0_0 .net *"_s31", 0 0, L_0x1e123d0; 1 drivers -v0x1de3f70_0 .net *"_s36", 0 0, L_0x1e12690; 1 drivers -v0x1de4050_0 .net *"_s42", 0 0, L_0x1e12910; 1 drivers -v0x1de4130_0 .net *"_s46", 0 0, L_0x1e129b0; 1 drivers -v0x1de4210_0 .net *"_s50", 0 0, L_0x1e12ac0; 1 drivers -v0x1de42f0_0 .net *"_s55", 0 0, L_0x1e12d50; 1 drivers -v0x1de43d0_0 .net *"_s61", 0 0, L_0x1e12fc0; 1 drivers -v0x1de44b0_0 .net *"_s65", 0 0, L_0x1e130f0; 1 drivers -v0x1de4590_0 .net *"_s69", 0 0, L_0x1e132c0; 1 drivers -v0x1de4670_0 .net *"_s74", 0 0, L_0x1e13220; 1 drivers -v0x1de4750_0 .net *"_s80", 0 0, L_0x1e134a0; 1 drivers -v0x1de4830_0 .net *"_s84", 0 0, L_0x1e13750; 1 drivers -v0x1de4910_0 .net *"_s88", 0 0, L_0x1e13690; 1 drivers -v0x1de49f0_0 .net *"_s93", 0 0, L_0x1e137f0; 1 drivers -v0x1de4ad0_0 .net *"_s99", 0 0, L_0x1e13a50; 1 drivers -v0x1de4bb0_0 .net/s "accOut", 10 0, L_0x1e01e90; 1 drivers -v0x1de4c90_0 .net "anyHasData", 0 0, L_0x1e12810; 1 drivers -v0x1de4d50_0 .net "anyReadAck", 0 0, L_0x1e135a0; 1 drivers -v0x1de4e10_0 .net "anyWantData", 0 0, L_0x1e12e40; 1 drivers -v0x1de4ed0_0 .net "anyWriteAck", 0 0, L_0x1e13b80; 1 drivers -v0x1de4f90_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -v0x1de5030_0 .net "down", 14 0, L_0x1e1ce50; alias, 1 drivers -v0x1de5110_0 .net "downOut", 14 0, L_0x1e151a0; alias, 1 drivers -v0x1de51f0_0 .net "instruction", 17 0, L_0x1e12a50; 1 drivers -v0x1de52d0 .array "instructions", 15 0, 17 0; -v0x1de5390_0 .var "last", 2 0; -o0x2b89f58fa428 .functor BUFZ 15, C4; HiZ drive -v0x1de5470_0 .net "left", 14 0, o0x2b89f58fa428; 0 drivers -v0x1de5550_0 .net "leftOut", 14 0, L_0x1e14ee0; 1 drivers -v0x1de5630_0 .var "mode", 2 0; -v0x1de5710 .array/s "outVals", 2 5, 10 0; -v0x1de5880_0 .var "phase", 2 0; -v0x1de5960_0 .net "portsHaveData", 5 2, L_0x1e12500; 1 drivers -v0x1de3d80_0 .net "portsWantData", 5 2, L_0x1e12b60; 1 drivers -v0x1de3e60_0 .net "readAckIn", 5 2, L_0x1e13360; 1 drivers -v0x1de5e10_0 .var "readAckOut", 5 2; -v0x1de5ef0_0 .var "readTarget", 2 0; -v0x1de5fd0_0 .var/s "readValue", 10 0; -L_0x2b89f5927018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1de60b0 .array "regVals", 0 7; -v0x1de60b0_0 .net/s v0x1de60b0 0, 10 0, L_0x2b89f5927018; 1 drivers -v0x1de60b0_1 .net/s v0x1de60b0 1, 10 0, L_0x1e11f10; 1 drivers -v0x1de60b0_2 .net/s v0x1de60b0 2, 10 0, L_0x1e11f80; 1 drivers -v0x1de60b0_3 .net/s v0x1de60b0 3, 10 0, L_0x1e12020; 1 drivers -v0x1de60b0_4 .net/s v0x1de60b0 4, 10 0, L_0x1e120c0; 1 drivers -v0x1de60b0_5 .net/s v0x1de60b0 5, 10 0, L_0x1e12160; 1 drivers -o0x2b89f58fa7e8 .functor BUFZ 11, C4; HiZ drive -v0x1de60b0_6 .net/s v0x1de60b0 6, 10 0, o0x2b89f58fa7e8; 0 drivers -o0x2b89f58fa818 .functor BUFZ 11, C4; HiZ drive -v0x1de60b0_7 .net/s v0x1de60b0 7, 10 0, o0x2b89f58fa818; 0 drivers -o0x2b89f58fa848 .functor BUFZ 15, C4; HiZ drive -v0x1de62c0_0 .net "right", 14 0, o0x2b89f58fa848; 0 drivers -v0x1de63a0_0 .net "rightOut", 14 0, L_0x1e15790; 1 drivers -v0x1de6480_0 .net "up", 14 0, L_0x1e31a80; alias, 1 drivers -v0x1de6570_0 .net "upOut", 14 0, L_0x1e14cb0; alias, 1 drivers -v0x1de6640_0 .var "weHaveData", 5 2; -v0x1de6700_0 .var "weWantData", 5 2; -v0x1de67e0_0 .net "writeAckIn", 5 2, L_0x1e138c0; 1 drivers -v0x1de68c0_0 .var "writeAckOut", 5 2; -v0x1de69a0_0 .var "writeTarget", 2 0; -v0x1de6a80_0 .var/s "writeValue", 10 0; -L_0x1e11f80 .part o0x2b89f58fa428, 0, 11; -L_0x1e12020 .part o0x2b89f58fa848, 0, 11; -L_0x1e120c0 .part L_0x1e31a80, 0, 11; -L_0x1e12160 .part L_0x1e1ce50, 0, 11; -L_0x1e12200 .part o0x2b89f58fa428, 11, 1; -L_0x1e122a0 .part o0x2b89f58fa848, 11, 1; -L_0x1e123d0 .part L_0x1e31a80, 11, 1; -L_0x1e12500 .concat8 [ 1 1 1 1], L_0x1e12200, L_0x1e122a0, L_0x1e123d0, L_0x1e12690; -L_0x1e12690 .part L_0x1e1ce50, 11, 1; -L_0x1e12810 .reduce/or L_0x1e12500; -L_0x1e12910 .part o0x2b89f58fa428, 12, 1; -L_0x1e129b0 .part o0x2b89f58fa848, 12, 1; -L_0x1e12ac0 .part L_0x1e31a80, 12, 1; -L_0x1e12b60 .concat8 [ 1 1 1 1], L_0x1e12910, L_0x1e129b0, L_0x1e12ac0, L_0x1e12d50; -L_0x1e12d50 .part L_0x1e1ce50, 12, 1; -L_0x1e12e40 .reduce/or L_0x1e12b60; -L_0x1e12fc0 .part o0x2b89f58fa428, 13, 1; -L_0x1e130f0 .part o0x2b89f58fa848, 13, 1; -L_0x1e132c0 .part L_0x1e31a80, 13, 1; -L_0x1e13360 .concat8 [ 1 1 1 1], L_0x1e12fc0, L_0x1e130f0, L_0x1e132c0, L_0x1e13220; -L_0x1e13220 .part L_0x1e1ce50, 13, 1; -L_0x1e135a0 .reduce/or L_0x1e13360; -L_0x1e134a0 .part o0x2b89f58fa428, 14, 1; -L_0x1e13750 .part o0x2b89f58fa848, 14, 1; -L_0x1e13690 .part L_0x1e31a80, 14, 1; -L_0x1e138c0 .concat8 [ 1 1 1 1], L_0x1e134a0, L_0x1e13750, L_0x1e13690, L_0x1e137f0; -L_0x1e137f0 .part L_0x1e1ce50, 14, 1; -L_0x1e13b80 .reduce/or L_0x1e138c0; -L_0x1e13a50 .part v0x1de5e10_0, 0, 1; -L_0x1e13d60 .part v0x1de5e10_0, 1, 1; -L_0x1e13c70 .part v0x1de5e10_0, 2, 1; -L_0x1e13f50 .part v0x1de5e10_0, 3, 1; -L_0x1e13e50 .part v0x1de68c0_0, 0, 1; -L_0x1e14190 .part v0x1de68c0_0, 1, 1; -L_0x1e14080 .part v0x1de68c0_0, 2, 1; -L_0x1e14350 .part v0x1de68c0_0, 3, 1; -L_0x1e14230 .part v0x1de6700_0, 0, 1; -L_0x1e145b0 .part v0x1de6700_0, 1, 1; -L_0x1e14480 .part v0x1de6700_0, 2, 1; -L_0x1e14790 .part v0x1de6700_0, 3, 1; -L_0x1e14650 .part v0x1de6640_0, 0, 1; -L_0x1e14980 .part v0x1de6640_0, 1, 1; -L_0x1e14830 .part v0x1de6640_0, 2, 1; -L_0x1e148d0 .part v0x1de6640_0, 3, 1; -L_0x1e14a20 .array/port v0x1de52d0, L_0x1e14d80; -L_0x1e14d80 .concat [ 4 2 0 0], v0x1de25a0_0, L_0x2b89f5927060; -LS_0x1e14cb0_0_0 .concat8 [ 11 1 1 1], v0x1de5710_2, L_0x1e14830, L_0x1e14480, L_0x1e14080; -LS_0x1e14cb0_0_4 .concat8 [ 1 0 0 0], L_0x1e13c70; -L_0x1e14cb0 .concat8 [ 14 1 0 0], LS_0x1e14cb0_0_0, LS_0x1e14cb0_0_4; -LS_0x1e151a0_0_0 .concat8 [ 11 1 1 1], v0x1de5710_3, L_0x1e148d0, L_0x1e14790, L_0x1e14350; -LS_0x1e151a0_0_4 .concat8 [ 1 0 0 0], L_0x1e13f50; -L_0x1e151a0 .concat8 [ 14 1 0 0], LS_0x1e151a0_0_0, LS_0x1e151a0_0_4; -LS_0x1e14ee0_0_0 .concat8 [ 11 1 1 1], v0x1de5710_0, L_0x1e14650, L_0x1e14230, L_0x1e13e50; -LS_0x1e14ee0_0_4 .concat8 [ 1 0 0 0], L_0x1e13a50; -L_0x1e14ee0 .concat8 [ 14 1 0 0], LS_0x1e14ee0_0_0, LS_0x1e14ee0_0_4; -LS_0x1e15790_0_0 .concat8 [ 11 1 1 1], v0x1de5710_1, L_0x1e14980, L_0x1e145b0, L_0x1e14190; -LS_0x1e15790_0_4 .concat8 [ 1 0 0 0], L_0x1e13d60; -L_0x1e15790 .concat8 [ 14 1 0 0], LS_0x1e15790_0_0, LS_0x1e15790_0_4; -L_0x1e15480 .part L_0x1e12a50, 14, 4; -L_0x1e15ba0 .part L_0x1e12a50, 11, 3; -L_0x1e159b0 .part L_0x1e12a50, 8, 3; -L_0x1e15df0 .part L_0x1e12a50, 10, 4; -L_0x1e15c40 .part L_0x1e12a50, 0, 11; -S_0x1de6d00 .scope module, "out" "tis100" 3 63, 4 49 0, S_0x1cc1e10; +P_0x232a7b0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x232a7f0 .param/str "memFile" 0 4 60, "demo/one.dat"; +L_0x234a950 .functor BUFZ 11, v0x232aad0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x235a9d0 .functor BUFZ 11, v0x232aad0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x235b510 .functor BUFZ 18, L_0x235d4e0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x232aad0_0 .var/s "ACC", 10 0; +v0x232abd0_0 .var/s "BAK", 10 0; +v0x232acb0_0 .net "DST", 2 0, L_0x235e5d0; 1 drivers +v0x232ad70_0 .net/s "IMM", 10 0, L_0x235e670; 1 drivers +v0x232ae50_0 .net "INST", 3 0, L_0x235deb0; 1 drivers +v0x232af80_0 .net "LABEL", 3 0, L_0x235e820; 1 drivers +v0x232b020_0 .var "PC", 3 0; +v0x232b0c0_0 .var "PCNEXT", 3 0; +v0x232b180_0 .net "SRC", 2 0, L_0x235e3e0; 1 drivers +v0x232b2f0_0 .net *"_s103", 0 0, L_0x235c820; 1 drivers +v0x232b3d0_0 .net *"_s107", 0 0, L_0x235c730; 1 drivers +v0x232b4b0_0 .net *"_s111", 0 0, L_0x235ca10; 1 drivers +v0x232b590_0 .net *"_s115", 0 0, L_0x235c910; 1 drivers +v0x232b670_0 .net *"_s119", 0 0, L_0x235cc50; 1 drivers +v0x232b750_0 .net *"_s123", 0 0, L_0x235cb40; 1 drivers +v0x232b830_0 .net *"_s127", 0 0, L_0x235ce10; 1 drivers +v0x232b910_0 .net *"_s131", 0 0, L_0x235ccf0; 1 drivers +v0x232bac0_0 .net *"_s135", 0 0, L_0x235d070; 1 drivers +v0x232bb60_0 .net *"_s139", 0 0, L_0x235cf40; 1 drivers +v0x232bc40_0 .net *"_s143", 0 0, L_0x235d250; 1 drivers +v0x232bd20_0 .net *"_s147", 0 0, L_0x235d110; 1 drivers +v0x232be00_0 .net *"_s151", 0 0, L_0x235d440; 1 drivers +v0x232bee0_0 .net *"_s155", 0 0, L_0x235d2f0; 1 drivers +v0x232bfc0_0 .net *"_s159", 0 0, L_0x235d390; 1 drivers +v0x232c0a0_0 .net *"_s160", 17 0, L_0x235d4e0; 1 drivers +v0x232c180_0 .net *"_s162", 5 0, L_0x235d840; 1 drivers +L_0x2b7d4c4d5060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x232c260_0 .net *"_s165", 1 0, L_0x2b7d4c4d5060; 1 drivers +v0x232e210_2 .array/port v0x232e210, 2; +v0x232c340_0 .net *"_s173", 10 0, v0x232e210_2; 1 drivers +v0x232e210_3 .array/port v0x232e210, 3; +v0x232c420_0 .net *"_s179", 10 0, v0x232e210_3; 1 drivers +v0x232e210_0 .array/port v0x232e210, 0; +v0x232c500_0 .net *"_s185", 10 0, v0x232e210_0; 1 drivers +v0x232e210_1 .array/port v0x232e210, 1; +v0x232c5e0_0 .net *"_s191", 10 0, v0x232e210_1; 1 drivers +v0x232c6c0_0 .net *"_s23", 0 0, L_0x235acc0; 1 drivers +v0x232c7a0_0 .net *"_s27", 0 0, L_0x235ad60; 1 drivers +v0x232b9f0_0 .net *"_s31", 0 0, L_0x235ae90; 1 drivers +v0x232ca70_0 .net *"_s36", 0 0, L_0x235b150; 1 drivers +v0x232cb50_0 .net *"_s42", 0 0, L_0x235b3d0; 1 drivers +v0x232cc30_0 .net *"_s46", 0 0, L_0x235b470; 1 drivers +v0x232cd10_0 .net *"_s50", 0 0, L_0x235b580; 1 drivers +v0x232cdf0_0 .net *"_s55", 0 0, L_0x235b7e0; 1 drivers +v0x232ced0_0 .net *"_s61", 0 0, L_0x235ba50; 1 drivers +v0x232cfb0_0 .net *"_s65", 0 0, L_0x235bb80; 1 drivers +v0x232d090_0 .net *"_s69", 0 0, L_0x235bd50; 1 drivers +v0x232d170_0 .net *"_s74", 0 0, L_0x235bcb0; 1 drivers +v0x232d250_0 .net *"_s80", 0 0, L_0x235bf30; 1 drivers +v0x232d330_0 .net *"_s84", 0 0, L_0x235c1e0; 1 drivers +v0x232d410_0 .net *"_s88", 0 0, L_0x235c120; 1 drivers +v0x232d4f0_0 .net *"_s93", 0 0, L_0x235c280; 1 drivers +v0x232d5d0_0 .net *"_s99", 0 0, L_0x235c510; 1 drivers +v0x232d6b0_0 .net/s "accOut", 10 0, L_0x234a950; 1 drivers +v0x232d790_0 .net "anyHasData", 0 0, L_0x235b2d0; 1 drivers +v0x232d850_0 .net "anyReadAck", 0 0, L_0x235c030; 1 drivers +v0x232d910_0 .net "anyWantData", 0 0, L_0x235b8d0; 1 drivers +v0x232d9d0_0 .net "anyWriteAck", 0 0, L_0x235c640; 1 drivers +v0x232da90_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +v0x232db30_0 .net "down", 14 0, L_0x23658f0; alias, 1 drivers +v0x232dc10_0 .net "downOut", 14 0, L_0x235dc10; alias, 1 drivers +v0x232dcf0_0 .net "instruction", 17 0, L_0x235b510; 1 drivers +v0x232ddd0 .array "instructions", 15 0, 17 0; +v0x232de90_0 .var "last", 2 0; +o0x2b7d4c4a8428 .functor BUFZ 15, C4; HiZ drive +v0x232df70_0 .net "left", 14 0, o0x2b7d4c4a8428; 0 drivers +v0x232e050_0 .net "leftOut", 14 0, L_0x235d9a0; 1 drivers +v0x232e130_0 .var "mode", 2 0; +v0x232e210 .array/s "outVals", 2 5, 10 0; +v0x232e380_0 .var "phase", 2 0; +v0x232e460_0 .net "portsHaveData", 5 2, L_0x235afc0; 1 drivers +v0x232c840_0 .net "portsWantData", 5 2, L_0x235b620; 1 drivers +v0x232c920_0 .net "readAckIn", 5 2, L_0x235bdf0; 1 drivers +v0x232e910_0 .var "readAckOut", 5 2; +v0x232e9b0_0 .var "readTarget", 2 0; +v0x232ea90_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d5018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x232eb70 .array "regVals", 0 7; +v0x232eb70_0 .net/s v0x232eb70 0, 10 0, L_0x2b7d4c4d5018; 1 drivers +v0x232eb70_1 .net/s v0x232eb70 1, 10 0, L_0x235a9d0; 1 drivers +v0x232eb70_2 .net/s v0x232eb70 2, 10 0, L_0x235aa40; 1 drivers +v0x232eb70_3 .net/s v0x232eb70 3, 10 0, L_0x235aae0; 1 drivers +v0x232eb70_4 .net/s v0x232eb70 4, 10 0, L_0x235ab80; 1 drivers +v0x232eb70_5 .net/s v0x232eb70 5, 10 0, L_0x235ac20; 1 drivers +o0x2b7d4c4a87e8 .functor BUFZ 11, C4; HiZ drive +v0x232eb70_6 .net/s v0x232eb70 6, 10 0, o0x2b7d4c4a87e8; 0 drivers +o0x2b7d4c4a8818 .functor BUFZ 11, C4; HiZ drive +v0x232eb70_7 .net/s v0x232eb70 7, 10 0, o0x2b7d4c4a8818; 0 drivers +o0x2b7d4c4a8848 .functor BUFZ 15, C4; HiZ drive +v0x232ed80_0 .net "right", 14 0, o0x2b7d4c4a8848; 0 drivers +v0x232ee60_0 .net "rightOut", 14 0, L_0x235e1c0; 1 drivers +v0x232ef40_0 .net "up", 14 0, L_0x237a520; alias, 1 drivers +v0x232f030_0 .net "upOut", 14 0, L_0x235d750; alias, 1 drivers +v0x232f100_0 .var "weHaveData", 5 2; +v0x232f1c0_0 .var "weWantData", 5 2; +v0x232f2a0_0 .net "writeAckIn", 5 2, L_0x235c350; 1 drivers +v0x232f380_0 .var "writeAckOut", 5 2; +v0x232f460_0 .var "writeTarget", 2 0; +v0x232f540_0 .var/s "writeValue", 10 0; +L_0x235aa40 .part o0x2b7d4c4a8428, 0, 11; +L_0x235aae0 .part o0x2b7d4c4a8848, 0, 11; +L_0x235ab80 .part L_0x237a520, 0, 11; +L_0x235ac20 .part L_0x23658f0, 0, 11; +L_0x235acc0 .part o0x2b7d4c4a8428, 11, 1; +L_0x235ad60 .part o0x2b7d4c4a8848, 11, 1; +L_0x235ae90 .part L_0x237a520, 11, 1; +L_0x235afc0 .concat8 [ 1 1 1 1], L_0x235acc0, L_0x235ad60, L_0x235ae90, L_0x235b150; +L_0x235b150 .part L_0x23658f0, 11, 1; +L_0x235b2d0 .reduce/or L_0x235afc0; +L_0x235b3d0 .part o0x2b7d4c4a8428, 12, 1; +L_0x235b470 .part o0x2b7d4c4a8848, 12, 1; +L_0x235b580 .part L_0x237a520, 12, 1; +L_0x235b620 .concat8 [ 1 1 1 1], L_0x235b3d0, L_0x235b470, L_0x235b580, L_0x235b7e0; +L_0x235b7e0 .part L_0x23658f0, 12, 1; +L_0x235b8d0 .reduce/or L_0x235b620; +L_0x235ba50 .part o0x2b7d4c4a8428, 13, 1; +L_0x235bb80 .part o0x2b7d4c4a8848, 13, 1; +L_0x235bd50 .part L_0x237a520, 13, 1; +L_0x235bdf0 .concat8 [ 1 1 1 1], L_0x235ba50, L_0x235bb80, L_0x235bd50, L_0x235bcb0; +L_0x235bcb0 .part L_0x23658f0, 13, 1; +L_0x235c030 .reduce/or L_0x235bdf0; +L_0x235bf30 .part o0x2b7d4c4a8428, 14, 1; +L_0x235c1e0 .part o0x2b7d4c4a8848, 14, 1; +L_0x235c120 .part L_0x237a520, 14, 1; +L_0x235c350 .concat8 [ 1 1 1 1], L_0x235bf30, L_0x235c1e0, L_0x235c120, L_0x235c280; +L_0x235c280 .part L_0x23658f0, 14, 1; +L_0x235c640 .reduce/or L_0x235c350; +L_0x235c510 .part v0x232e910_0, 0, 1; +L_0x235c820 .part v0x232e910_0, 1, 1; +L_0x235c730 .part v0x232e910_0, 2, 1; +L_0x235ca10 .part v0x232e910_0, 3, 1; +L_0x235c910 .part v0x232f380_0, 0, 1; +L_0x235cc50 .part v0x232f380_0, 1, 1; +L_0x235cb40 .part v0x232f380_0, 2, 1; +L_0x235ce10 .part v0x232f380_0, 3, 1; +L_0x235ccf0 .part v0x232f1c0_0, 0, 1; +L_0x235d070 .part v0x232f1c0_0, 1, 1; +L_0x235cf40 .part v0x232f1c0_0, 2, 1; +L_0x235d250 .part v0x232f1c0_0, 3, 1; +L_0x235d110 .part v0x232f100_0, 0, 1; +L_0x235d440 .part v0x232f100_0, 1, 1; +L_0x235d2f0 .part v0x232f100_0, 2, 1; +L_0x235d390 .part v0x232f100_0, 3, 1; +L_0x235d4e0 .array/port v0x232ddd0, L_0x235d840; +L_0x235d840 .concat [ 4 2 0 0], v0x232b020_0, L_0x2b7d4c4d5060; +LS_0x235d750_0_0 .concat8 [ 11 1 1 1], v0x232e210_2, L_0x235d2f0, L_0x235cf40, L_0x235cb40; +LS_0x235d750_0_4 .concat8 [ 1 0 0 0], L_0x235c730; +L_0x235d750 .concat8 [ 14 1 0 0], LS_0x235d750_0_0, LS_0x235d750_0_4; +LS_0x235dc10_0_0 .concat8 [ 11 1 1 1], v0x232e210_3, L_0x235d390, L_0x235d250, L_0x235ce10; +LS_0x235dc10_0_4 .concat8 [ 1 0 0 0], L_0x235ca10; +L_0x235dc10 .concat8 [ 14 1 0 0], LS_0x235dc10_0_0, LS_0x235dc10_0_4; +LS_0x235d9a0_0_0 .concat8 [ 11 1 1 1], v0x232e210_0, L_0x235d110, L_0x235ccf0, L_0x235c910; +LS_0x235d9a0_0_4 .concat8 [ 1 0 0 0], L_0x235c510; +L_0x235d9a0 .concat8 [ 14 1 0 0], LS_0x235d9a0_0_0, LS_0x235d9a0_0_4; +LS_0x235e1c0_0_0 .concat8 [ 11 1 1 1], v0x232e210_1, L_0x235d440, L_0x235d070, L_0x235cc50; +LS_0x235e1c0_0_4 .concat8 [ 1 0 0 0], L_0x235c820; +L_0x235e1c0 .concat8 [ 14 1 0 0], LS_0x235e1c0_0_0, LS_0x235e1c0_0_4; +L_0x235deb0 .part L_0x235b510, 14, 4; +L_0x235e5d0 .part L_0x235b510, 11, 3; +L_0x235e3e0 .part L_0x235b510, 8, 3; +L_0x235e820 .part L_0x235b510, 10, 4; +L_0x235e670 .part L_0x235b510, 0, 11; +S_0x232f7c0 .scope module, "out" "tis100" 3 63, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -783,175 +783,175 @@ S_0x1de6d00 .scope module, "out" "tis100" 3 63, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1de6f20 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000001>; -P_0x1de6f60 .param/str "memFile" 0 4 60, "demo/out.dat"; -L_0x1dfa0d0 .functor BUFZ 11, v0x1de7220_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1dff320 .functor BUFZ 11, v0x1de7220_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e32bb0 .functor BUFZ 18, L_0x1e34c30, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1de7220_0 .var/s "ACC", 10 0; -v0x1de7320_0 .var/s "BAK", 10 0; -v0x1de7400_0 .net "DST", 2 0, L_0x1e35d60; 1 drivers -v0x1de74c0_0 .net/s "IMM", 10 0, L_0x1e35e00; 1 drivers -v0x1de75a0_0 .net "INST", 3 0, L_0x1e356c0; 1 drivers -v0x1de76d0_0 .net "LABEL", 3 0, L_0x1e35fb0; 1 drivers -v0x1de77b0_0 .var "PC", 3 0; -v0x1de7890_0 .var "PCNEXT", 3 0; -v0x1de7970_0 .net "SRC", 2 0, L_0x1e35b70; 1 drivers -v0x1de7ae0_0 .net *"_s103", 0 0, L_0x1e33f70; 1 drivers -v0x1de7bc0_0 .net *"_s107", 0 0, L_0x1e33e80; 1 drivers -v0x1de7ca0_0 .net *"_s111", 0 0, L_0x1e34160; 1 drivers -v0x1de7d80_0 .net *"_s115", 0 0, L_0x1e34060; 1 drivers -v0x1de7e60_0 .net *"_s119", 0 0, L_0x1e343a0; 1 drivers -v0x1de7f40_0 .net *"_s123", 0 0, L_0x1e34290; 1 drivers -v0x1de8020_0 .net *"_s127", 0 0, L_0x1e34560; 1 drivers -v0x1de8100_0 .net *"_s131", 0 0, L_0x1e34440; 1 drivers -v0x1de82b0_0 .net *"_s135", 0 0, L_0x1e347c0; 1 drivers -v0x1de8350_0 .net *"_s139", 0 0, L_0x1e34690; 1 drivers -v0x1de8430_0 .net *"_s143", 0 0, L_0x1e349a0; 1 drivers -v0x1de8510_0 .net *"_s147", 0 0, L_0x1e34860; 1 drivers -v0x1de85f0_0 .net *"_s151", 0 0, L_0x1e34b90; 1 drivers -v0x1de86d0_0 .net *"_s155", 0 0, L_0x1e34a40; 1 drivers -v0x1de87b0_0 .net *"_s159", 0 0, L_0x1e34ae0; 1 drivers -v0x1de8890_0 .net *"_s160", 17 0, L_0x1e34c30; 1 drivers -v0x1de8970_0 .net *"_s162", 5 0, L_0x1e34f90; 1 drivers -L_0x2b89f59274e0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1de8a50_0 .net *"_s165", 1 0, L_0x2b89f59274e0; 1 drivers -v0x1deaa90_2 .array/port v0x1deaa90, 2; -v0x1de8b30_0 .net *"_s173", 10 0, v0x1deaa90_2; 1 drivers -v0x1deaa90_3 .array/port v0x1deaa90, 3; -v0x1de8c10_0 .net *"_s179", 10 0, v0x1deaa90_3; 1 drivers -v0x1deaa90_0 .array/port v0x1deaa90, 0; -v0x1de8cf0_0 .net *"_s185", 10 0, v0x1deaa90_0; 1 drivers -v0x1deaa90_1 .array/port v0x1deaa90, 1; -v0x1de8dd0_0 .net *"_s191", 10 0, v0x1deaa90_1; 1 drivers -v0x1de8eb0_0 .net *"_s23", 0 0, L_0x1e32390; 1 drivers -v0x1de8f90_0 .net *"_s27", 0 0, L_0x1e32430; 1 drivers -v0x1de81e0_0 .net *"_s31", 0 0, L_0x1e32520; 1 drivers -v0x1de9260_0 .net *"_s36", 0 0, L_0x1e327e0; 1 drivers -v0x1de9340_0 .net *"_s42", 0 0, L_0x1e32a70; 1 drivers -v0x1de9420_0 .net *"_s46", 0 0, L_0x1e32b10; 1 drivers -v0x1de9500_0 .net *"_s50", 0 0, L_0x1e32c20; 1 drivers -v0x1de95e0_0 .net *"_s55", 0 0, L_0x1e32eb0; 1 drivers -v0x1de96c0_0 .net *"_s61", 0 0, L_0x1e33120; 1 drivers -v0x1de97a0_0 .net *"_s65", 0 0, L_0x1e33250; 1 drivers -v0x1de9880_0 .net *"_s69", 0 0, L_0x1e33420; 1 drivers -v0x1de9960_0 .net *"_s74", 0 0, L_0x1e33380; 1 drivers -v0x1de9a40_0 .net *"_s80", 0 0, L_0x1e335b0; 1 drivers -v0x1de9b20_0 .net *"_s84", 0 0, L_0x1e338a0; 1 drivers -v0x1de9c00_0 .net *"_s88", 0 0, L_0x1e337e0; 1 drivers -v0x1de9ce0_0 .net *"_s93", 0 0, L_0x1e33940; 1 drivers -v0x1de9dc0_0 .net *"_s99", 0 0, L_0x1e33c60; 1 drivers -v0x1de9ea0_0 .net/s "accOut", 10 0, L_0x1dfa0d0; 1 drivers -v0x1de9f80_0 .net "anyHasData", 0 0, L_0x1e32920; 1 drivers -v0x1dea040_0 .net "anyReadAck", 0 0, L_0x1e33740; 1 drivers -v0x1dea100_0 .net "anyWantData", 0 0, L_0x1e32fa0; 1 drivers -v0x1dea1c0_0 .net "anyWriteAck", 0 0, L_0x1e33d90; 1 drivers -v0x1dea280_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -o0x2b89f58fb598 .functor BUFZ 15, C4; HiZ drive -v0x1dea3b0_0 .net "down", 14 0, o0x2b89f58fb598; 0 drivers -v0x1dea490_0 .net "downOut", 14 0, L_0x1e35420; 1 drivers -v0x1dea570_0 .net "instruction", 17 0, L_0x1e32bb0; 1 drivers -v0x1dea650 .array "instructions", 15 0, 17 0; -v0x1dea710_0 .var "last", 2 0; -o0x2b89f58fb658 .functor BUFZ 15, C4; HiZ drive -v0x1dea7f0_0 .net "left", 14 0, o0x2b89f58fb658; 0 drivers -v0x1dea8d0_0 .net "leftOut", 14 0, L_0x1e350f0; 1 drivers -v0x1dea9b0_0 .var "mode", 2 0; -v0x1deaa90 .array/s "outVals", 2 5, 10 0; -v0x1deabd0_0 .var "phase", 2 0; -v0x1deacb0_0 .net "portsHaveData", 5 2, L_0x1e325f0; 1 drivers -v0x1de9030_0 .net "portsWantData", 5 2, L_0x1e32cc0; 1 drivers -v0x1de90f0_0 .net "readAckIn", 5 2, L_0x1e334c0; 1 drivers -v0x1deb160_0 .var "readAckOut", 5 2; -v0x1deb200_0 .var "readTarget", 2 0; -v0x1deb2a0_0 .var/s "readValue", 10 0; -L_0x2b89f5927498 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1deb340 .array "regVals", 0 7; -v0x1deb340_0 .net/s v0x1deb340 0, 10 0, L_0x2b89f5927498; 1 drivers -v0x1deb340_1 .net/s v0x1deb340 1, 10 0, L_0x1dff320; 1 drivers -v0x1deb340_2 .net/s v0x1deb340 2, 10 0, L_0x1dffc60; 1 drivers -v0x1deb340_3 .net/s v0x1deb340 3, 10 0, L_0x1e321b0; 1 drivers -v0x1deb340_4 .net/s v0x1deb340 4, 10 0, L_0x1e32250; 1 drivers -v0x1deb340_5 .net/s v0x1deb340 5, 10 0, L_0x1e322f0; 1 drivers -o0x2b89f58fba18 .functor BUFZ 11, C4; HiZ drive -v0x1deb340_6 .net/s v0x1deb340 6, 10 0, o0x2b89f58fba18; 0 drivers -o0x2b89f58fba48 .functor BUFZ 11, C4; HiZ drive -v0x1deb340_7 .net/s v0x1deb340 7, 10 0, o0x2b89f58fba48; 0 drivers -o0x2b89f58fba78 .functor BUFZ 15, C4; HiZ drive -v0x1deb530_0 .net "right", 14 0, o0x2b89f58fba78; 0 drivers -v0x1deb610_0 .net "rightOut", 14 0, L_0x1e35990; 1 drivers -v0x1deb6f0_0 .net "up", 14 0, L_0x1e29740; alias, 1 drivers -v0x1deb7d0_0 .net "upOut", 14 0, L_0x1e34ea0; alias, 1 drivers -v0x1deb8b0_0 .var "weHaveData", 5 2; -v0x1deb990_0 .var "weWantData", 5 2; -v0x1deba70_0 .net "writeAckIn", 5 2, L_0x1e33b20; 1 drivers -v0x1debb50_0 .var "writeAckOut", 5 2; -v0x1debc30_0 .var "writeTarget", 2 0; -v0x1debd10_0 .var/s "writeValue", 10 0; -L_0x1dffc60 .part o0x2b89f58fb658, 0, 11; -L_0x1e321b0 .part o0x2b89f58fba78, 0, 11; -L_0x1e32250 .part L_0x1e29740, 0, 11; -L_0x1e322f0 .part o0x2b89f58fb598, 0, 11; -L_0x1e32390 .part o0x2b89f58fb658, 11, 1; -L_0x1e32430 .part o0x2b89f58fba78, 11, 1; -L_0x1e32520 .part L_0x1e29740, 11, 1; -L_0x1e325f0 .concat8 [ 1 1 1 1], L_0x1e32390, L_0x1e32430, L_0x1e32520, L_0x1e327e0; -L_0x1e327e0 .part o0x2b89f58fb598, 11, 1; -L_0x1e32920 .reduce/or L_0x1e325f0; -L_0x1e32a70 .part o0x2b89f58fb658, 12, 1; -L_0x1e32b10 .part o0x2b89f58fba78, 12, 1; -L_0x1e32c20 .part L_0x1e29740, 12, 1; -L_0x1e32cc0 .concat8 [ 1 1 1 1], L_0x1e32a70, L_0x1e32b10, L_0x1e32c20, L_0x1e32eb0; -L_0x1e32eb0 .part o0x2b89f58fb598, 12, 1; -L_0x1e32fa0 .reduce/or L_0x1e32cc0; -L_0x1e33120 .part o0x2b89f58fb658, 13, 1; -L_0x1e33250 .part o0x2b89f58fba78, 13, 1; -L_0x1e33420 .part L_0x1e29740, 13, 1; -L_0x1e334c0 .concat8 [ 1 1 1 1], L_0x1e33120, L_0x1e33250, L_0x1e33420, L_0x1e33380; -L_0x1e33380 .part o0x2b89f58fb598, 13, 1; -L_0x1e33740 .reduce/or L_0x1e334c0; -L_0x1e335b0 .part o0x2b89f58fb658, 14, 1; -L_0x1e338a0 .part o0x2b89f58fba78, 14, 1; -L_0x1e337e0 .part L_0x1e29740, 14, 1; -L_0x1e33b20 .concat8 [ 1 1 1 1], L_0x1e335b0, L_0x1e338a0, L_0x1e337e0, L_0x1e33940; -L_0x1e33940 .part o0x2b89f58fb598, 14, 1; -L_0x1e33d90 .reduce/or L_0x1e33b20; -L_0x1e33c60 .part v0x1deb160_0, 0, 1; -L_0x1e33f70 .part v0x1deb160_0, 1, 1; -L_0x1e33e80 .part v0x1deb160_0, 2, 1; -L_0x1e34160 .part v0x1deb160_0, 3, 1; -L_0x1e34060 .part v0x1debb50_0, 0, 1; -L_0x1e343a0 .part v0x1debb50_0, 1, 1; -L_0x1e34290 .part v0x1debb50_0, 2, 1; -L_0x1e34560 .part v0x1debb50_0, 3, 1; -L_0x1e34440 .part v0x1deb990_0, 0, 1; -L_0x1e347c0 .part v0x1deb990_0, 1, 1; -L_0x1e34690 .part v0x1deb990_0, 2, 1; -L_0x1e349a0 .part v0x1deb990_0, 3, 1; -L_0x1e34860 .part v0x1deb8b0_0, 0, 1; -L_0x1e34b90 .part v0x1deb8b0_0, 1, 1; -L_0x1e34a40 .part v0x1deb8b0_0, 2, 1; -L_0x1e34ae0 .part v0x1deb8b0_0, 3, 1; -L_0x1e34c30 .array/port v0x1dea650, L_0x1e34f90; -L_0x1e34f90 .concat [ 4 2 0 0], v0x1de77b0_0, L_0x2b89f59274e0; -LS_0x1e34ea0_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_2, L_0x1e34a40, L_0x1e34690, L_0x1e34290; -LS_0x1e34ea0_0_4 .concat8 [ 1 0 0 0], L_0x1e33e80; -L_0x1e34ea0 .concat8 [ 14 1 0 0], LS_0x1e34ea0_0_0, LS_0x1e34ea0_0_4; -LS_0x1e35420_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_3, L_0x1e34ae0, L_0x1e349a0, L_0x1e34560; -LS_0x1e35420_0_4 .concat8 [ 1 0 0 0], L_0x1e34160; -L_0x1e35420 .concat8 [ 14 1 0 0], LS_0x1e35420_0_0, LS_0x1e35420_0_4; -LS_0x1e350f0_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_0, L_0x1e34860, L_0x1e34440, L_0x1e34060; -LS_0x1e350f0_0_4 .concat8 [ 1 0 0 0], L_0x1e33c60; -L_0x1e350f0 .concat8 [ 14 1 0 0], LS_0x1e350f0_0_0, LS_0x1e350f0_0_4; -LS_0x1e35990_0_0 .concat8 [ 11 1 1 1], v0x1deaa90_1, L_0x1e34b90, L_0x1e347c0, L_0x1e343a0; -LS_0x1e35990_0_4 .concat8 [ 1 0 0 0], L_0x1e33f70; -L_0x1e35990 .concat8 [ 14 1 0 0], LS_0x1e35990_0_0, LS_0x1e35990_0_4; -L_0x1e356c0 .part L_0x1e32bb0, 14, 4; -L_0x1e35d60 .part L_0x1e32bb0, 11, 3; -L_0x1e35b70 .part L_0x1e32bb0, 8, 3; -L_0x1e35fb0 .part L_0x1e32bb0, 10, 4; -L_0x1e35e00 .part L_0x1e32bb0, 0, 11; -S_0x1debf90 .scope module, "seven" "tis100" 3 58, 4 49 0, S_0x1cc1e10; +P_0x232f9e0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000001>; +P_0x232fa20 .param/str "memFile" 0 4 60, "demo/out.dat"; +L_0x2329160 .functor BUFZ 11, v0x232fce0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x23387e0 .functor BUFZ 11, v0x232fce0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x237b630 .functor BUFZ 18, L_0x237d680, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x232fce0_0 .var/s "ACC", 10 0; +v0x232fde0_0 .var/s "BAK", 10 0; +v0x232fec0_0 .net "DST", 2 0, L_0x237e7b0; 1 drivers +v0x232ff80_0 .net/s "IMM", 10 0, L_0x237e850; 1 drivers +v0x2330060_0 .net "INST", 3 0, L_0x237e110; 1 drivers +v0x2330190_0 .net "LABEL", 3 0, L_0x237ea00; 1 drivers +v0x2330270_0 .var "PC", 3 0; +v0x2330350_0 .var "PCNEXT", 3 0; +v0x2330430_0 .net "SRC", 2 0, L_0x237e5c0; 1 drivers +v0x23305a0_0 .net *"_s103", 0 0, L_0x237c9c0; 1 drivers +v0x2330680_0 .net *"_s107", 0 0, L_0x237c8d0; 1 drivers +v0x2330760_0 .net *"_s111", 0 0, L_0x237cbb0; 1 drivers +v0x2330840_0 .net *"_s115", 0 0, L_0x237cab0; 1 drivers +v0x2330920_0 .net *"_s119", 0 0, L_0x237cdf0; 1 drivers +v0x2330a00_0 .net *"_s123", 0 0, L_0x237cce0; 1 drivers +v0x2330ae0_0 .net *"_s127", 0 0, L_0x237cfb0; 1 drivers +v0x2330bc0_0 .net *"_s131", 0 0, L_0x237ce90; 1 drivers +v0x2330d70_0 .net *"_s135", 0 0, L_0x237d210; 1 drivers +v0x2330e10_0 .net *"_s139", 0 0, L_0x237d0e0; 1 drivers +v0x2330ef0_0 .net *"_s143", 0 0, L_0x237d3f0; 1 drivers +v0x2330fd0_0 .net *"_s147", 0 0, L_0x237d2b0; 1 drivers +v0x23310b0_0 .net *"_s151", 0 0, L_0x237d5e0; 1 drivers +v0x2331190_0 .net *"_s155", 0 0, L_0x237d490; 1 drivers +v0x2331270_0 .net *"_s159", 0 0, L_0x237d530; 1 drivers +v0x2331350_0 .net *"_s160", 17 0, L_0x237d680; 1 drivers +v0x2331430_0 .net *"_s162", 5 0, L_0x237d9e0; 1 drivers +L_0x2b7d4c4d54e0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2331510_0 .net *"_s165", 1 0, L_0x2b7d4c4d54e0; 1 drivers +v0x2333550_2 .array/port v0x2333550, 2; +v0x23315f0_0 .net *"_s173", 10 0, v0x2333550_2; 1 drivers +v0x2333550_3 .array/port v0x2333550, 3; +v0x23316d0_0 .net *"_s179", 10 0, v0x2333550_3; 1 drivers +v0x2333550_0 .array/port v0x2333550, 0; +v0x23317b0_0 .net *"_s185", 10 0, v0x2333550_0; 1 drivers +v0x2333550_1 .array/port v0x2333550, 1; +v0x2331890_0 .net *"_s191", 10 0, v0x2333550_1; 1 drivers +v0x2331970_0 .net *"_s23", 0 0, L_0x2348720; 1 drivers +v0x2331a50_0 .net *"_s27", 0 0, L_0x237b180; 1 drivers +v0x2330ca0_0 .net *"_s31", 0 0, L_0x237b220; 1 drivers +v0x2331d20_0 .net *"_s36", 0 0, L_0x237b360; 1 drivers +v0x2331e00_0 .net *"_s42", 0 0, L_0x237b4f0; 1 drivers +v0x2331ee0_0 .net *"_s46", 0 0, L_0x237b590; 1 drivers +v0x2331fc0_0 .net *"_s50", 0 0, L_0x237b6a0; 1 drivers +v0x23320a0_0 .net *"_s55", 0 0, L_0x237b950; 1 drivers +v0x2332180_0 .net *"_s61", 0 0, L_0x237bbc0; 1 drivers +v0x2332260_0 .net *"_s65", 0 0, L_0x237bcf0; 1 drivers +v0x2332340_0 .net *"_s69", 0 0, L_0x237bec0; 1 drivers +v0x2332420_0 .net *"_s74", 0 0, L_0x237be20; 1 drivers +v0x2332500_0 .net *"_s80", 0 0, L_0x237c000; 1 drivers +v0x23325e0_0 .net *"_s84", 0 0, L_0x237c2f0; 1 drivers +v0x23326c0_0 .net *"_s88", 0 0, L_0x237c230; 1 drivers +v0x23327a0_0 .net *"_s93", 0 0, L_0x237c390; 1 drivers +v0x2332880_0 .net *"_s99", 0 0, L_0x237c6b0; 1 drivers +v0x2332960_0 .net/s "accOut", 10 0, L_0x2329160; 1 drivers +v0x2332a40_0 .net "anyHasData", 0 0, L_0x237b400; 1 drivers +v0x2332b00_0 .net "anyReadAck", 0 0, L_0x237c190; 1 drivers +v0x2332bc0_0 .net "anyWantData", 0 0, L_0x237ba40; 1 drivers +v0x2332c80_0 .net "anyWriteAck", 0 0, L_0x237c7e0; 1 drivers +v0x2332d40_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +o0x2b7d4c4a9598 .functor BUFZ 15, C4; HiZ drive +v0x2332e70_0 .net "down", 14 0, o0x2b7d4c4a9598; 0 drivers +v0x2332f50_0 .net "downOut", 14 0, L_0x237de70; 1 drivers +v0x2333030_0 .net "instruction", 17 0, L_0x237b630; 1 drivers +v0x2333110 .array "instructions", 15 0, 17 0; +v0x23331d0_0 .var "last", 2 0; +o0x2b7d4c4a9658 .functor BUFZ 15, C4; HiZ drive +v0x23332b0_0 .net "left", 14 0, o0x2b7d4c4a9658; 0 drivers +v0x2333390_0 .net "leftOut", 14 0, L_0x237db40; 1 drivers +v0x2333470_0 .var "mode", 2 0; +v0x2333550 .array/s "outVals", 2 5, 10 0; +v0x2333690_0 .var "phase", 2 0; +v0x2333770_0 .net "portsHaveData", 5 2, L_0x237b2c0; 1 drivers +v0x2331af0_0 .net "portsWantData", 5 2, L_0x237b740; 1 drivers +v0x2331bb0_0 .net "readAckIn", 5 2, L_0x237bf60; 1 drivers +v0x2333c20_0 .var "readAckOut", 5 2; +v0x2333cc0_0 .var "readTarget", 2 0; +v0x2333d60_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d5498 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2333e00 .array "regVals", 0 7; +v0x2333e00_0 .net/s v0x2333e00 0, 10 0, L_0x2b7d4c4d5498; 1 drivers +v0x2333e00_1 .net/s v0x2333e00 1, 10 0, L_0x23387e0; 1 drivers +v0x2333e00_2 .net/s v0x2333e00 2, 10 0, L_0x23248a0; 1 drivers +v0x2333e00_3 .net/s v0x2333e00 3, 10 0, L_0x23434d0; 1 drivers +v0x2333e00_4 .net/s v0x2333e00 4, 10 0, L_0x232eca0; 1 drivers +v0x2333e00_5 .net/s v0x2333e00 5, 10 0, L_0x2379a70; 1 drivers +o0x2b7d4c4a9a18 .functor BUFZ 11, C4; HiZ drive +v0x2333e00_6 .net/s v0x2333e00 6, 10 0, o0x2b7d4c4a9a18; 0 drivers +o0x2b7d4c4a9a48 .functor BUFZ 11, C4; HiZ drive +v0x2333e00_7 .net/s v0x2333e00 7, 10 0, o0x2b7d4c4a9a48; 0 drivers +o0x2b7d4c4a9a78 .functor BUFZ 15, C4; HiZ drive +v0x2333ff0_0 .net "right", 14 0, o0x2b7d4c4a9a78; 0 drivers +v0x23340d0_0 .net "rightOut", 14 0, L_0x237e3e0; 1 drivers +v0x23341b0_0 .net "up", 14 0, L_0x23721e0; alias, 1 drivers +v0x2334290_0 .net "upOut", 14 0, L_0x237d8f0; alias, 1 drivers +v0x2334370_0 .var "weHaveData", 5 2; +v0x2334450_0 .var "weWantData", 5 2; +v0x2334530_0 .net "writeAckIn", 5 2, L_0x237c570; 1 drivers +v0x2334610_0 .var "writeAckOut", 5 2; +v0x23346f0_0 .var "writeTarget", 2 0; +v0x23347d0_0 .var/s "writeValue", 10 0; +L_0x23248a0 .part o0x2b7d4c4a9658, 0, 11; +L_0x23434d0 .part o0x2b7d4c4a9a78, 0, 11; +L_0x232eca0 .part L_0x23721e0, 0, 11; +L_0x2379a70 .part o0x2b7d4c4a9598, 0, 11; +L_0x2348720 .part o0x2b7d4c4a9658, 11, 1; +L_0x237b180 .part o0x2b7d4c4a9a78, 11, 1; +L_0x237b220 .part L_0x23721e0, 11, 1; +L_0x237b2c0 .concat8 [ 1 1 1 1], L_0x2348720, L_0x237b180, L_0x237b220, L_0x237b360; +L_0x237b360 .part o0x2b7d4c4a9598, 11, 1; +L_0x237b400 .reduce/or L_0x237b2c0; +L_0x237b4f0 .part o0x2b7d4c4a9658, 12, 1; +L_0x237b590 .part o0x2b7d4c4a9a78, 12, 1; +L_0x237b6a0 .part L_0x23721e0, 12, 1; +L_0x237b740 .concat8 [ 1 1 1 1], L_0x237b4f0, L_0x237b590, L_0x237b6a0, L_0x237b950; +L_0x237b950 .part o0x2b7d4c4a9598, 12, 1; +L_0x237ba40 .reduce/or L_0x237b740; +L_0x237bbc0 .part o0x2b7d4c4a9658, 13, 1; +L_0x237bcf0 .part o0x2b7d4c4a9a78, 13, 1; +L_0x237bec0 .part L_0x23721e0, 13, 1; +L_0x237bf60 .concat8 [ 1 1 1 1], L_0x237bbc0, L_0x237bcf0, L_0x237bec0, L_0x237be20; +L_0x237be20 .part o0x2b7d4c4a9598, 13, 1; +L_0x237c190 .reduce/or L_0x237bf60; +L_0x237c000 .part o0x2b7d4c4a9658, 14, 1; +L_0x237c2f0 .part o0x2b7d4c4a9a78, 14, 1; +L_0x237c230 .part L_0x23721e0, 14, 1; +L_0x237c570 .concat8 [ 1 1 1 1], L_0x237c000, L_0x237c2f0, L_0x237c230, L_0x237c390; +L_0x237c390 .part o0x2b7d4c4a9598, 14, 1; +L_0x237c7e0 .reduce/or L_0x237c570; +L_0x237c6b0 .part v0x2333c20_0, 0, 1; +L_0x237c9c0 .part v0x2333c20_0, 1, 1; +L_0x237c8d0 .part v0x2333c20_0, 2, 1; +L_0x237cbb0 .part v0x2333c20_0, 3, 1; +L_0x237cab0 .part v0x2334610_0, 0, 1; +L_0x237cdf0 .part v0x2334610_0, 1, 1; +L_0x237cce0 .part v0x2334610_0, 2, 1; +L_0x237cfb0 .part v0x2334610_0, 3, 1; +L_0x237ce90 .part v0x2334450_0, 0, 1; +L_0x237d210 .part v0x2334450_0, 1, 1; +L_0x237d0e0 .part v0x2334450_0, 2, 1; +L_0x237d3f0 .part v0x2334450_0, 3, 1; +L_0x237d2b0 .part v0x2334370_0, 0, 1; +L_0x237d5e0 .part v0x2334370_0, 1, 1; +L_0x237d490 .part v0x2334370_0, 2, 1; +L_0x237d530 .part v0x2334370_0, 3, 1; +L_0x237d680 .array/port v0x2333110, L_0x237d9e0; +L_0x237d9e0 .concat [ 4 2 0 0], v0x2330270_0, L_0x2b7d4c4d54e0; +LS_0x237d8f0_0_0 .concat8 [ 11 1 1 1], v0x2333550_2, L_0x237d490, L_0x237d0e0, L_0x237cce0; +LS_0x237d8f0_0_4 .concat8 [ 1 0 0 0], L_0x237c8d0; +L_0x237d8f0 .concat8 [ 14 1 0 0], LS_0x237d8f0_0_0, LS_0x237d8f0_0_4; +LS_0x237de70_0_0 .concat8 [ 11 1 1 1], v0x2333550_3, L_0x237d530, L_0x237d3f0, L_0x237cfb0; +LS_0x237de70_0_4 .concat8 [ 1 0 0 0], L_0x237cbb0; +L_0x237de70 .concat8 [ 14 1 0 0], LS_0x237de70_0_0, LS_0x237de70_0_4; +LS_0x237db40_0_0 .concat8 [ 11 1 1 1], v0x2333550_0, L_0x237d2b0, L_0x237ce90, L_0x237cab0; +LS_0x237db40_0_4 .concat8 [ 1 0 0 0], L_0x237c6b0; +L_0x237db40 .concat8 [ 14 1 0 0], LS_0x237db40_0_0, LS_0x237db40_0_4; +LS_0x237e3e0_0_0 .concat8 [ 11 1 1 1], v0x2333550_1, L_0x237d5e0, L_0x237d210, L_0x237cdf0; +LS_0x237e3e0_0_4 .concat8 [ 1 0 0 0], L_0x237c9c0; +L_0x237e3e0 .concat8 [ 14 1 0 0], LS_0x237e3e0_0_0, LS_0x237e3e0_0_4; +L_0x237e110 .part L_0x237b630, 14, 4; +L_0x237e7b0 .part L_0x237b630, 11, 3; +L_0x237e5c0 .part L_0x237b630, 8, 3; +L_0x237ea00 .part L_0x237b630, 10, 4; +L_0x237e850 .part L_0x237b630, 0, 11; +S_0x2334a50 .scope module, "seven" "tis100" 3 58, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -963,174 +963,174 @@ S_0x1debf90 .scope module, "seven" "tis100" 3 58, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1dec160 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1dec1a0 .param/str "memFile" 0 4 60, "demo/seven.dat"; -L_0x1e2a000 .functor BUFZ 11, v0x1dec480_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e2a200 .functor BUFZ 11, v0x1dec480_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e2b070 .functor BUFZ 18, L_0x1e2d0f0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1dec480_0 .var/s "ACC", 10 0; -v0x1dec580_0 .var/s "BAK", 10 0; -v0x1dec660_0 .net "DST", 2 0, L_0x1e2e2e0; 1 drivers -v0x1dec720_0 .net/s "IMM", 10 0, L_0x1e2e380; 1 drivers -v0x1dec800_0 .net "INST", 3 0, L_0x1e2db80; 1 drivers -v0x1dec930_0 .net "LABEL", 3 0, L_0x1e2e530; 1 drivers -v0x1deca10_0 .var "PC", 3 0; -v0x1decaf0_0 .var "PCNEXT", 3 0; -v0x1decbd0_0 .net "SRC", 2 0, L_0x1e2e0f0; 1 drivers -v0x1decd40_0 .net *"_s103", 0 0, L_0x1e2c430; 1 drivers -v0x1dece20_0 .net *"_s107", 0 0, L_0x1e2c340; 1 drivers -v0x1decf00_0 .net *"_s111", 0 0, L_0x1e2c620; 1 drivers -v0x1decfe0_0 .net *"_s115", 0 0, L_0x1e2c520; 1 drivers -v0x1ded0c0_0 .net *"_s119", 0 0, L_0x1e2c860; 1 drivers -v0x1ded1a0_0 .net *"_s123", 0 0, L_0x1e2c750; 1 drivers -v0x1ded280_0 .net *"_s127", 0 0, L_0x1e2ca20; 1 drivers -v0x1ded360_0 .net *"_s131", 0 0, L_0x1e2c900; 1 drivers -v0x1ded510_0 .net *"_s135", 0 0, L_0x1e2cc80; 1 drivers -v0x1ded5b0_0 .net *"_s139", 0 0, L_0x1e2cb50; 1 drivers -v0x1ded690_0 .net *"_s143", 0 0, L_0x1e2ce60; 1 drivers -v0x1ded770_0 .net *"_s147", 0 0, L_0x1e2cd20; 1 drivers -v0x1ded850_0 .net *"_s151", 0 0, L_0x1e2d050; 1 drivers -v0x1ded930_0 .net *"_s155", 0 0, L_0x1e2cf00; 1 drivers -v0x1deda10_0 .net *"_s159", 0 0, L_0x1e2cfa0; 1 drivers -v0x1dedaf0_0 .net *"_s160", 17 0, L_0x1e2d0f0; 1 drivers -v0x1dedbd0_0 .net *"_s162", 5 0, L_0x1e2d450; 1 drivers -L_0x2b89f59273c0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1dedcb0_0 .net *"_s165", 1 0, L_0x2b89f59273c0; 1 drivers -v0x1defc60_2 .array/port v0x1defc60, 2; -v0x1dedd90_0 .net *"_s173", 10 0, v0x1defc60_2; 1 drivers -v0x1defc60_3 .array/port v0x1defc60, 3; -v0x1dede70_0 .net *"_s179", 10 0, v0x1defc60_3; 1 drivers -v0x1defc60_0 .array/port v0x1defc60, 0; -v0x1dedf50_0 .net *"_s185", 10 0, v0x1defc60_0; 1 drivers -v0x1defc60_1 .array/port v0x1defc60, 1; -v0x1dee030_0 .net *"_s191", 10 0, v0x1defc60_1; 1 drivers -v0x1dee110_0 .net *"_s23", 0 0, L_0x1e2a900; 1 drivers -v0x1dee1f0_0 .net *"_s27", 0 0, L_0x1e2a9d0; 1 drivers -v0x1ded440_0 .net *"_s31", 0 0, L_0x1e2aaa0; 1 drivers -v0x1dee4c0_0 .net *"_s36", 0 0, L_0x1e2ad00; 1 drivers -v0x1dee5a0_0 .net *"_s42", 0 0, L_0x1e2af30; 1 drivers -v0x1dee680_0 .net *"_s46", 0 0, L_0x1e2afd0; 1 drivers -v0x1dee760_0 .net *"_s50", 0 0, L_0x1e2b0e0; 1 drivers -v0x1dee840_0 .net *"_s55", 0 0, L_0x1e2b2f0; 1 drivers -v0x1dee920_0 .net *"_s61", 0 0, L_0x1e2b560; 1 drivers -v0x1deea00_0 .net *"_s65", 0 0, L_0x1e2b600; 1 drivers -v0x1deeae0_0 .net *"_s69", 0 0, L_0x1e2b7d0; 1 drivers -v0x1deebc0_0 .net *"_s74", 0 0, L_0x1e2b730; 1 drivers -v0x1deeca0_0 .net *"_s80", 0 0, L_0x1e2b9b0; 1 drivers -v0x1deed80_0 .net *"_s84", 0 0, L_0x1e2bdb0; 1 drivers -v0x1deee60_0 .net *"_s88", 0 0, L_0x1e2bbe0; 1 drivers -v0x1deef40_0 .net *"_s93", 0 0, L_0x1e2be50; 1 drivers -v0x1def020_0 .net *"_s99", 0 0, L_0x1e2c120; 1 drivers -v0x1def100_0 .net/s "accOut", 10 0, L_0x1e2a000; 1 drivers -v0x1def1e0_0 .net "anyHasData", 0 0, L_0x1e2ae40; 1 drivers -v0x1def2a0_0 .net "anyReadAck", 0 0, L_0x1e2bb40; 1 drivers -v0x1def360_0 .net "anyWantData", 0 0, L_0x1e2b3e0; 1 drivers -v0x1def420_0 .net "anyWriteAck", 0 0, L_0x1e2c250; 1 drivers -v0x1def4e0_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -o0x2b89f58fc828 .functor BUFZ 15, C4; HiZ drive -v0x1def580_0 .net "down", 14 0, o0x2b89f58fc828; 0 drivers -v0x1def660_0 .net "downOut", 14 0, L_0x1e2d8e0; 1 drivers -v0x1def740_0 .net "instruction", 17 0, L_0x1e2b070; 1 drivers -v0x1def820 .array "instructions", 15 0, 17 0; -v0x1def8e0_0 .var "last", 2 0; -v0x1def9c0_0 .net "left", 14 0, L_0x1e29cb0; alias, 1 drivers -v0x1defaa0_0 .net "leftOut", 14 0, L_0x1e2d5b0; alias, 1 drivers -v0x1defb80_0 .var "mode", 2 0; -v0x1defc60 .array/s "outVals", 2 5, 10 0; -v0x1defda0_0 .var "phase", 2 0; -v0x1defe80_0 .net "portsHaveData", 5 2, L_0x1e2ab40; 1 drivers -v0x1dee290_0 .net "portsWantData", 5 2, L_0x1e2b180; 1 drivers -v0x1dee350_0 .net "readAckIn", 5 2, L_0x1e2b870; 1 drivers -v0x1df0330_0 .var "readAckOut", 5 2; -v0x1df03d0_0 .var "readTarget", 2 0; -v0x1df0470_0 .var/s "readValue", 10 0; -L_0x2b89f5927378 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1df0530 .array "regVals", 0 7; -v0x1df0530_0 .net/s v0x1df0530 0, 10 0, L_0x2b89f5927378; 1 drivers -v0x1df0530_1 .net/s v0x1df0530 1, 10 0, L_0x1e2a200; 1 drivers -v0x1df0530_2 .net/s v0x1df0530 2, 10 0, L_0x1e2a270; 1 drivers -v0x1df0530_3 .net/s v0x1df0530 3, 10 0, L_0x1e2a600; 1 drivers -v0x1df0530_4 .net/s v0x1df0530 4, 10 0, L_0x1e2a6a0; 1 drivers -v0x1df0530_5 .net/s v0x1df0530 5, 10 0, L_0x1e2a7d0; 1 drivers -o0x2b89f58fcca8 .functor BUFZ 11, C4; HiZ drive -v0x1df0530_6 .net/s v0x1df0530 6, 10 0, o0x2b89f58fcca8; 0 drivers -o0x2b89f58fccd8 .functor BUFZ 11, C4; HiZ drive -v0x1df0530_7 .net/s v0x1df0530 7, 10 0, o0x2b89f58fccd8; 0 drivers -o0x2b89f58fcd08 .functor BUFZ 15, C4; HiZ drive -v0x1df0740_0 .net "right", 14 0, o0x2b89f58fcd08; 0 drivers -v0x1df0820_0 .net "rightOut", 14 0, L_0x1e2df10; 1 drivers -v0x1df0900_0 .net "up", 14 0, L_0x1e256b0; alias, 1 drivers -v0x1df09f0_0 .net "upOut", 14 0, L_0x1e2d360; alias, 1 drivers -v0x1df0ac0_0 .var "weHaveData", 5 2; -v0x1df0b80_0 .var "weWantData", 5 2; -v0x1df0c60_0 .net "writeAckIn", 5 2, L_0x1e2c030; 1 drivers -v0x1df0d40_0 .var "writeAckOut", 5 2; -v0x1df0e20_0 .var "writeTarget", 2 0; -v0x1df0f00_0 .var/s "writeValue", 10 0; -L_0x1e2a270 .part L_0x1e29cb0, 0, 11; -L_0x1e2a600 .part o0x2b89f58fcd08, 0, 11; -L_0x1e2a6a0 .part L_0x1e256b0, 0, 11; -L_0x1e2a7d0 .part o0x2b89f58fc828, 0, 11; -L_0x1e2a900 .part L_0x1e29cb0, 11, 1; -L_0x1e2a9d0 .part o0x2b89f58fcd08, 11, 1; -L_0x1e2aaa0 .part L_0x1e256b0, 11, 1; -L_0x1e2ab40 .concat8 [ 1 1 1 1], L_0x1e2a900, L_0x1e2a9d0, L_0x1e2aaa0, L_0x1e2ad00; -L_0x1e2ad00 .part o0x2b89f58fc828, 11, 1; -L_0x1e2ae40 .reduce/or L_0x1e2ab40; -L_0x1e2af30 .part L_0x1e29cb0, 12, 1; -L_0x1e2afd0 .part o0x2b89f58fcd08, 12, 1; -L_0x1e2b0e0 .part L_0x1e256b0, 12, 1; -L_0x1e2b180 .concat8 [ 1 1 1 1], L_0x1e2af30, L_0x1e2afd0, L_0x1e2b0e0, L_0x1e2b2f0; -L_0x1e2b2f0 .part o0x2b89f58fc828, 12, 1; -L_0x1e2b3e0 .reduce/or L_0x1e2b180; -L_0x1e2b560 .part L_0x1e29cb0, 13, 1; -L_0x1e2b600 .part o0x2b89f58fcd08, 13, 1; -L_0x1e2b7d0 .part L_0x1e256b0, 13, 1; -L_0x1e2b870 .concat8 [ 1 1 1 1], L_0x1e2b560, L_0x1e2b600, L_0x1e2b7d0, L_0x1e2b730; -L_0x1e2b730 .part o0x2b89f58fc828, 13, 1; -L_0x1e2bb40 .reduce/or L_0x1e2b870; -L_0x1e2b9b0 .part L_0x1e29cb0, 14, 1; -L_0x1e2bdb0 .part o0x2b89f58fcd08, 14, 1; -L_0x1e2bbe0 .part L_0x1e256b0, 14, 1; -L_0x1e2c030 .concat8 [ 1 1 1 1], L_0x1e2b9b0, L_0x1e2bdb0, L_0x1e2bbe0, L_0x1e2be50; -L_0x1e2be50 .part o0x2b89f58fc828, 14, 1; -L_0x1e2c250 .reduce/or L_0x1e2c030; -L_0x1e2c120 .part v0x1df0330_0, 0, 1; -L_0x1e2c430 .part v0x1df0330_0, 1, 1; -L_0x1e2c340 .part v0x1df0330_0, 2, 1; -L_0x1e2c620 .part v0x1df0330_0, 3, 1; -L_0x1e2c520 .part v0x1df0d40_0, 0, 1; -L_0x1e2c860 .part v0x1df0d40_0, 1, 1; -L_0x1e2c750 .part v0x1df0d40_0, 2, 1; -L_0x1e2ca20 .part v0x1df0d40_0, 3, 1; -L_0x1e2c900 .part v0x1df0b80_0, 0, 1; -L_0x1e2cc80 .part v0x1df0b80_0, 1, 1; -L_0x1e2cb50 .part v0x1df0b80_0, 2, 1; -L_0x1e2ce60 .part v0x1df0b80_0, 3, 1; -L_0x1e2cd20 .part v0x1df0ac0_0, 0, 1; -L_0x1e2d050 .part v0x1df0ac0_0, 1, 1; -L_0x1e2cf00 .part v0x1df0ac0_0, 2, 1; -L_0x1e2cfa0 .part v0x1df0ac0_0, 3, 1; -L_0x1e2d0f0 .array/port v0x1def820, L_0x1e2d450; -L_0x1e2d450 .concat [ 4 2 0 0], v0x1deca10_0, L_0x2b89f59273c0; -LS_0x1e2d360_0_0 .concat8 [ 11 1 1 1], v0x1defc60_2, L_0x1e2cf00, L_0x1e2cb50, L_0x1e2c750; -LS_0x1e2d360_0_4 .concat8 [ 1 0 0 0], L_0x1e2c340; -L_0x1e2d360 .concat8 [ 14 1 0 0], LS_0x1e2d360_0_0, LS_0x1e2d360_0_4; -LS_0x1e2d8e0_0_0 .concat8 [ 11 1 1 1], v0x1defc60_3, L_0x1e2cfa0, L_0x1e2ce60, L_0x1e2ca20; -LS_0x1e2d8e0_0_4 .concat8 [ 1 0 0 0], L_0x1e2c620; -L_0x1e2d8e0 .concat8 [ 14 1 0 0], LS_0x1e2d8e0_0_0, LS_0x1e2d8e0_0_4; -LS_0x1e2d5b0_0_0 .concat8 [ 11 1 1 1], v0x1defc60_0, L_0x1e2cd20, L_0x1e2c900, L_0x1e2c520; -LS_0x1e2d5b0_0_4 .concat8 [ 1 0 0 0], L_0x1e2c120; -L_0x1e2d5b0 .concat8 [ 14 1 0 0], LS_0x1e2d5b0_0_0, LS_0x1e2d5b0_0_4; -LS_0x1e2df10_0_0 .concat8 [ 11 1 1 1], v0x1defc60_1, L_0x1e2d050, L_0x1e2cc80, L_0x1e2c860; -LS_0x1e2df10_0_4 .concat8 [ 1 0 0 0], L_0x1e2c430; -L_0x1e2df10 .concat8 [ 14 1 0 0], LS_0x1e2df10_0_0, LS_0x1e2df10_0_4; -L_0x1e2db80 .part L_0x1e2b070, 14, 4; -L_0x1e2e2e0 .part L_0x1e2b070, 11, 3; -L_0x1e2e0f0 .part L_0x1e2b070, 8, 3; -L_0x1e2e530 .part L_0x1e2b070, 10, 4; -L_0x1e2e380 .part L_0x1e2b070, 0, 11; -S_0x1df1180 .scope module, "six" "tis100" 3 54, 4 49 0, S_0x1cc1e10; +P_0x2334c20 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x2334c60 .param/str "memFile" 0 4 60, "demo/seven.dat"; +L_0x2372aa0 .functor BUFZ 11, v0x2334f40_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2372ca0 .functor BUFZ 11, v0x2334f40_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x2373b10 .functor BUFZ 18, L_0x2375b90, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2334f40_0 .var/s "ACC", 10 0; +v0x2335040_0 .var/s "BAK", 10 0; +v0x2335120_0 .net "DST", 2 0, L_0x2376d80; 1 drivers +v0x23351e0_0 .net/s "IMM", 10 0, L_0x2376e20; 1 drivers +v0x23352c0_0 .net "INST", 3 0, L_0x2376620; 1 drivers +v0x23353f0_0 .net "LABEL", 3 0, L_0x2376fd0; 1 drivers +v0x23354d0_0 .var "PC", 3 0; +v0x23355b0_0 .var "PCNEXT", 3 0; +v0x2335690_0 .net "SRC", 2 0, L_0x2376b90; 1 drivers +v0x2335800_0 .net *"_s103", 0 0, L_0x2374ed0; 1 drivers +v0x23358e0_0 .net *"_s107", 0 0, L_0x2374de0; 1 drivers +v0x23359c0_0 .net *"_s111", 0 0, L_0x23750c0; 1 drivers +v0x2335aa0_0 .net *"_s115", 0 0, L_0x2374fc0; 1 drivers +v0x2335b80_0 .net *"_s119", 0 0, L_0x2375300; 1 drivers +v0x2335c60_0 .net *"_s123", 0 0, L_0x23751f0; 1 drivers +v0x2335d40_0 .net *"_s127", 0 0, L_0x23754c0; 1 drivers +v0x2335e20_0 .net *"_s131", 0 0, L_0x23753a0; 1 drivers +v0x2335fd0_0 .net *"_s135", 0 0, L_0x2375720; 1 drivers +v0x2336070_0 .net *"_s139", 0 0, L_0x23755f0; 1 drivers +v0x2336150_0 .net *"_s143", 0 0, L_0x2375900; 1 drivers +v0x2336230_0 .net *"_s147", 0 0, L_0x23757c0; 1 drivers +v0x2336310_0 .net *"_s151", 0 0, L_0x2375af0; 1 drivers +v0x23363f0_0 .net *"_s155", 0 0, L_0x23759a0; 1 drivers +v0x23364d0_0 .net *"_s159", 0 0, L_0x2375a40; 1 drivers +v0x23365b0_0 .net *"_s160", 17 0, L_0x2375b90; 1 drivers +v0x2336690_0 .net *"_s162", 5 0, L_0x2375ef0; 1 drivers +L_0x2b7d4c4d53c0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2336770_0 .net *"_s165", 1 0, L_0x2b7d4c4d53c0; 1 drivers +v0x2338720_2 .array/port v0x2338720, 2; +v0x2336850_0 .net *"_s173", 10 0, v0x2338720_2; 1 drivers +v0x2338720_3 .array/port v0x2338720, 3; +v0x2336930_0 .net *"_s179", 10 0, v0x2338720_3; 1 drivers +v0x2338720_0 .array/port v0x2338720, 0; +v0x2336a10_0 .net *"_s185", 10 0, v0x2338720_0; 1 drivers +v0x2338720_1 .array/port v0x2338720, 1; +v0x2336af0_0 .net *"_s191", 10 0, v0x2338720_1; 1 drivers +v0x2336bd0_0 .net *"_s23", 0 0, L_0x23733a0; 1 drivers +v0x2336cb0_0 .net *"_s27", 0 0, L_0x2373470; 1 drivers +v0x2335f00_0 .net *"_s31", 0 0, L_0x2373540; 1 drivers +v0x2336f80_0 .net *"_s36", 0 0, L_0x23737a0; 1 drivers +v0x2337060_0 .net *"_s42", 0 0, L_0x23739d0; 1 drivers +v0x2337140_0 .net *"_s46", 0 0, L_0x2373a70; 1 drivers +v0x2337220_0 .net *"_s50", 0 0, L_0x2373b80; 1 drivers +v0x2337300_0 .net *"_s55", 0 0, L_0x2373d90; 1 drivers +v0x23373e0_0 .net *"_s61", 0 0, L_0x2374000; 1 drivers +v0x23374c0_0 .net *"_s65", 0 0, L_0x23740a0; 1 drivers +v0x23375a0_0 .net *"_s69", 0 0, L_0x2374270; 1 drivers +v0x2337680_0 .net *"_s74", 0 0, L_0x23741d0; 1 drivers +v0x2337760_0 .net *"_s80", 0 0, L_0x2374450; 1 drivers +v0x2337840_0 .net *"_s84", 0 0, L_0x2374850; 1 drivers +v0x2337920_0 .net *"_s88", 0 0, L_0x2374680; 1 drivers +v0x2337a00_0 .net *"_s93", 0 0, L_0x23748f0; 1 drivers +v0x2337ae0_0 .net *"_s99", 0 0, L_0x2374bc0; 1 drivers +v0x2337bc0_0 .net/s "accOut", 10 0, L_0x2372aa0; 1 drivers +v0x2337ca0_0 .net "anyHasData", 0 0, L_0x23738e0; 1 drivers +v0x2337d60_0 .net "anyReadAck", 0 0, L_0x23745e0; 1 drivers +v0x2337e20_0 .net "anyWantData", 0 0, L_0x2373e80; 1 drivers +v0x2337ee0_0 .net "anyWriteAck", 0 0, L_0x2374cf0; 1 drivers +v0x2337fa0_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +o0x2b7d4c4aa828 .functor BUFZ 15, C4; HiZ drive +v0x2338040_0 .net "down", 14 0, o0x2b7d4c4aa828; 0 drivers +v0x2338120_0 .net "downOut", 14 0, L_0x2376380; 1 drivers +v0x2338200_0 .net "instruction", 17 0, L_0x2373b10; 1 drivers +v0x23382e0 .array "instructions", 15 0, 17 0; +v0x23383a0_0 .var "last", 2 0; +v0x2338480_0 .net "left", 14 0, L_0x2372750; alias, 1 drivers +v0x2338560_0 .net "leftOut", 14 0, L_0x2376050; alias, 1 drivers +v0x2338640_0 .var "mode", 2 0; +v0x2338720 .array/s "outVals", 2 5, 10 0; +v0x2338860_0 .var "phase", 2 0; +v0x2338940_0 .net "portsHaveData", 5 2, L_0x23735e0; 1 drivers +v0x2336d50_0 .net "portsWantData", 5 2, L_0x2373c20; 1 drivers +v0x2336e10_0 .net "readAckIn", 5 2, L_0x2374310; 1 drivers +v0x2338df0_0 .var "readAckOut", 5 2; +v0x2338e90_0 .var "readTarget", 2 0; +v0x2338f30_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d5378 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2338ff0 .array "regVals", 0 7; +v0x2338ff0_0 .net/s v0x2338ff0 0, 10 0, L_0x2b7d4c4d5378; 1 drivers +v0x2338ff0_1 .net/s v0x2338ff0 1, 10 0, L_0x2372ca0; 1 drivers +v0x2338ff0_2 .net/s v0x2338ff0 2, 10 0, L_0x2372d10; 1 drivers +v0x2338ff0_3 .net/s v0x2338ff0 3, 10 0, L_0x23730a0; 1 drivers +v0x2338ff0_4 .net/s v0x2338ff0 4, 10 0, L_0x2373140; 1 drivers +v0x2338ff0_5 .net/s v0x2338ff0 5, 10 0, L_0x2373270; 1 drivers +o0x2b7d4c4aaca8 .functor BUFZ 11, C4; HiZ drive +v0x2338ff0_6 .net/s v0x2338ff0 6, 10 0, o0x2b7d4c4aaca8; 0 drivers +o0x2b7d4c4aacd8 .functor BUFZ 11, C4; HiZ drive +v0x2338ff0_7 .net/s v0x2338ff0 7, 10 0, o0x2b7d4c4aacd8; 0 drivers +o0x2b7d4c4aad08 .functor BUFZ 15, C4; HiZ drive +v0x2339200_0 .net "right", 14 0, o0x2b7d4c4aad08; 0 drivers +v0x23392e0_0 .net "rightOut", 14 0, L_0x23769b0; 1 drivers +v0x23393c0_0 .net "up", 14 0, L_0x236e150; alias, 1 drivers +v0x23394b0_0 .net "upOut", 14 0, L_0x2375e00; alias, 1 drivers +v0x2339580_0 .var "weHaveData", 5 2; +v0x2339640_0 .var "weWantData", 5 2; +v0x2339720_0 .net "writeAckIn", 5 2, L_0x2374ad0; 1 drivers +v0x2339800_0 .var "writeAckOut", 5 2; +v0x23398e0_0 .var "writeTarget", 2 0; +v0x23399c0_0 .var/s "writeValue", 10 0; +L_0x2372d10 .part L_0x2372750, 0, 11; +L_0x23730a0 .part o0x2b7d4c4aad08, 0, 11; +L_0x2373140 .part L_0x236e150, 0, 11; +L_0x2373270 .part o0x2b7d4c4aa828, 0, 11; +L_0x23733a0 .part L_0x2372750, 11, 1; +L_0x2373470 .part o0x2b7d4c4aad08, 11, 1; +L_0x2373540 .part L_0x236e150, 11, 1; +L_0x23735e0 .concat8 [ 1 1 1 1], L_0x23733a0, L_0x2373470, L_0x2373540, L_0x23737a0; +L_0x23737a0 .part o0x2b7d4c4aa828, 11, 1; +L_0x23738e0 .reduce/or L_0x23735e0; +L_0x23739d0 .part L_0x2372750, 12, 1; +L_0x2373a70 .part o0x2b7d4c4aad08, 12, 1; +L_0x2373b80 .part L_0x236e150, 12, 1; +L_0x2373c20 .concat8 [ 1 1 1 1], L_0x23739d0, L_0x2373a70, L_0x2373b80, L_0x2373d90; +L_0x2373d90 .part o0x2b7d4c4aa828, 12, 1; +L_0x2373e80 .reduce/or L_0x2373c20; +L_0x2374000 .part L_0x2372750, 13, 1; +L_0x23740a0 .part o0x2b7d4c4aad08, 13, 1; +L_0x2374270 .part L_0x236e150, 13, 1; +L_0x2374310 .concat8 [ 1 1 1 1], L_0x2374000, L_0x23740a0, L_0x2374270, L_0x23741d0; +L_0x23741d0 .part o0x2b7d4c4aa828, 13, 1; +L_0x23745e0 .reduce/or L_0x2374310; +L_0x2374450 .part L_0x2372750, 14, 1; +L_0x2374850 .part o0x2b7d4c4aad08, 14, 1; +L_0x2374680 .part L_0x236e150, 14, 1; +L_0x2374ad0 .concat8 [ 1 1 1 1], L_0x2374450, L_0x2374850, L_0x2374680, L_0x23748f0; +L_0x23748f0 .part o0x2b7d4c4aa828, 14, 1; +L_0x2374cf0 .reduce/or L_0x2374ad0; +L_0x2374bc0 .part v0x2338df0_0, 0, 1; +L_0x2374ed0 .part v0x2338df0_0, 1, 1; +L_0x2374de0 .part v0x2338df0_0, 2, 1; +L_0x23750c0 .part v0x2338df0_0, 3, 1; +L_0x2374fc0 .part v0x2339800_0, 0, 1; +L_0x2375300 .part v0x2339800_0, 1, 1; +L_0x23751f0 .part v0x2339800_0, 2, 1; +L_0x23754c0 .part v0x2339800_0, 3, 1; +L_0x23753a0 .part v0x2339640_0, 0, 1; +L_0x2375720 .part v0x2339640_0, 1, 1; +L_0x23755f0 .part v0x2339640_0, 2, 1; +L_0x2375900 .part v0x2339640_0, 3, 1; +L_0x23757c0 .part v0x2339580_0, 0, 1; +L_0x2375af0 .part v0x2339580_0, 1, 1; +L_0x23759a0 .part v0x2339580_0, 2, 1; +L_0x2375a40 .part v0x2339580_0, 3, 1; +L_0x2375b90 .array/port v0x23382e0, L_0x2375ef0; +L_0x2375ef0 .concat [ 4 2 0 0], v0x23354d0_0, L_0x2b7d4c4d53c0; +LS_0x2375e00_0_0 .concat8 [ 11 1 1 1], v0x2338720_2, L_0x23759a0, L_0x23755f0, L_0x23751f0; +LS_0x2375e00_0_4 .concat8 [ 1 0 0 0], L_0x2374de0; +L_0x2375e00 .concat8 [ 14 1 0 0], LS_0x2375e00_0_0, LS_0x2375e00_0_4; +LS_0x2376380_0_0 .concat8 [ 11 1 1 1], v0x2338720_3, L_0x2375a40, L_0x2375900, L_0x23754c0; +LS_0x2376380_0_4 .concat8 [ 1 0 0 0], L_0x23750c0; +L_0x2376380 .concat8 [ 14 1 0 0], LS_0x2376380_0_0, LS_0x2376380_0_4; +LS_0x2376050_0_0 .concat8 [ 11 1 1 1], v0x2338720_0, L_0x23757c0, L_0x23753a0, L_0x2374fc0; +LS_0x2376050_0_4 .concat8 [ 1 0 0 0], L_0x2374bc0; +L_0x2376050 .concat8 [ 14 1 0 0], LS_0x2376050_0_0, LS_0x2376050_0_4; +LS_0x23769b0_0_0 .concat8 [ 11 1 1 1], v0x2338720_1, L_0x2375af0, L_0x2375720, L_0x2375300; +LS_0x23769b0_0_4 .concat8 [ 1 0 0 0], L_0x2374ed0; +L_0x23769b0 .concat8 [ 14 1 0 0], LS_0x23769b0_0_0, LS_0x23769b0_0_4; +L_0x2376620 .part L_0x2373b10, 14, 4; +L_0x2376d80 .part L_0x2373b10, 11, 3; +L_0x2376b90 .part L_0x2373b10, 8, 3; +L_0x2376fd0 .part L_0x2373b10, 10, 4; +L_0x2376e20 .part L_0x2373b10, 0, 11; +S_0x2339c40 .scope module, "six" "tis100" 3 54, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -1142,174 +1142,174 @@ S_0x1df1180 .scope module, "six" "tis100" 3 54, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1df1350 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1df1390 .param/str "memFile" 0 4 60, "demo/six.dat"; -L_0x1e25ff0 .functor BUFZ 11, v0x1df1670_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e261f0 .functor BUFZ 11, v0x1df1670_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e27060 .functor BUFZ 18, L_0x1e28fc0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1df1670_0 .var/s "ACC", 10 0; -v0x1df1770_0 .var/s "BAK", 10 0; -v0x1df1850_0 .net "DST", 2 0, L_0x1e2a0c0; 1 drivers -v0x1df1910_0 .net/s "IMM", 10 0, L_0x1e2a160; 1 drivers -v0x1df19f0_0 .net "INST", 3 0, L_0x1e299e0; 1 drivers -v0x1df1b20_0 .net "LABEL", 3 0, L_0x1e2a310; 1 drivers -v0x1df1c00_0 .var "PC", 3 0; -v0x1df1ce0_0 .var "PCNEXT", 3 0; -v0x1df1dc0_0 .net "SRC", 2 0, L_0x1e29ed0; 1 drivers -v0x1df1f30_0 .net *"_s103", 0 0, L_0x1e28300; 1 drivers -v0x1df2010_0 .net *"_s107", 0 0, L_0x1e28210; 1 drivers -v0x1df20f0_0 .net *"_s111", 0 0, L_0x1e284f0; 1 drivers -v0x1df21d0_0 .net *"_s115", 0 0, L_0x1e283f0; 1 drivers -v0x1df22b0_0 .net *"_s119", 0 0, L_0x1e28730; 1 drivers -v0x1df2390_0 .net *"_s123", 0 0, L_0x1e28620; 1 drivers -v0x1df2470_0 .net *"_s127", 0 0, L_0x1e288f0; 1 drivers -v0x1df2550_0 .net *"_s131", 0 0, L_0x1e287d0; 1 drivers -v0x1df2700_0 .net *"_s135", 0 0, L_0x1e28b50; 1 drivers -v0x1df27a0_0 .net *"_s139", 0 0, L_0x1e28a20; 1 drivers -v0x1df2880_0 .net *"_s143", 0 0, L_0x1e28d30; 1 drivers -v0x1df2960_0 .net *"_s147", 0 0, L_0x1e28bf0; 1 drivers -v0x1df2a40_0 .net *"_s151", 0 0, L_0x1e28f20; 1 drivers -v0x1df2b20_0 .net *"_s155", 0 0, L_0x1e28dd0; 1 drivers -v0x1df2c00_0 .net *"_s159", 0 0, L_0x1e28e70; 1 drivers -v0x1df2ce0_0 .net *"_s160", 17 0, L_0x1e28fc0; 1 drivers -v0x1df2dc0_0 .net *"_s162", 5 0, L_0x1e29320; 1 drivers -L_0x2b89f5927330 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1df2ea0_0 .net *"_s165", 1 0, L_0x2b89f5927330; 1 drivers -v0x1df4dd0_2 .array/port v0x1df4dd0, 2; -v0x1df2f80_0 .net *"_s173", 10 0, v0x1df4dd0_2; 1 drivers -v0x1df4dd0_3 .array/port v0x1df4dd0, 3; -v0x1df3060_0 .net *"_s179", 10 0, v0x1df4dd0_3; 1 drivers -v0x1df4dd0_0 .array/port v0x1df4dd0, 0; -v0x1df3140_0 .net *"_s185", 10 0, v0x1df4dd0_0; 1 drivers -v0x1df4dd0_1 .array/port v0x1df4dd0, 1; -v0x1df3220_0 .net *"_s191", 10 0, v0x1df4dd0_1; 1 drivers -v0x1df3300_0 .net *"_s23", 0 0, L_0x1e26800; 1 drivers -v0x1df33e0_0 .net *"_s27", 0 0, L_0x1e26920; 1 drivers -v0x1df2630_0 .net *"_s31", 0 0, L_0x1e26a50; 1 drivers -v0x1df36b0_0 .net *"_s36", 0 0, L_0x1e26d00; 1 drivers -v0x1df3790_0 .net *"_s42", 0 0, L_0x1e26f20; 1 drivers -v0x1df3870_0 .net *"_s46", 0 0, L_0x1e26fc0; 1 drivers -v0x1df3950_0 .net *"_s50", 0 0, L_0x1e270d0; 1 drivers -v0x1df3a30_0 .net *"_s55", 0 0, L_0x1e27310; 1 drivers -v0x1df3b10_0 .net *"_s61", 0 0, L_0x1e27580; 1 drivers -v0x1df3bf0_0 .net *"_s65", 0 0, L_0x1e276b0; 1 drivers -v0x1df3cd0_0 .net *"_s69", 0 0, L_0x1e277f0; 1 drivers -v0x1df3db0_0 .net *"_s74", 0 0, L_0x1e27750; 1 drivers -v0x1df3e90_0 .net *"_s80", 0 0, L_0x1e279e0; 1 drivers -v0x1df3f70_0 .net *"_s84", 0 0, L_0x1e27c90; 1 drivers -v0x1df4050_0 .net *"_s88", 0 0, L_0x1e27bd0; 1 drivers -v0x1df4130_0 .net *"_s93", 0 0, L_0x1e27d30; 1 drivers -v0x1df4210_0 .net *"_s99", 0 0, L_0x1e27ff0; 1 drivers -v0x1df42f0_0 .net/s "accOut", 10 0, L_0x1e25ff0; 1 drivers -v0x1df43d0_0 .net "anyHasData", 0 0, L_0x1e26e80; 1 drivers -v0x1df4490_0 .net "anyReadAck", 0 0, L_0x1e27ae0; 1 drivers -v0x1df4550_0 .net "anyWantData", 0 0, L_0x1e27400; 1 drivers -v0x1df4610_0 .net "anyWriteAck", 0 0, L_0x1e28120; 1 drivers -v0x1df46d0_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -v0x1df4770_0 .net "down", 14 0, L_0x1e34ea0; alias, 1 drivers -v0x1df4830_0 .net "downOut", 14 0, L_0x1e29740; alias, 1 drivers -v0x1df48d0_0 .net "instruction", 17 0, L_0x1e27060; 1 drivers -v0x1df4990 .array "instructions", 15 0, 17 0; -v0x1df4a50_0 .var "last", 2 0; -o0x2b89f58fdab8 .functor BUFZ 15, C4; HiZ drive -v0x1df4b30_0 .net "left", 14 0, o0x2b89f58fdab8; 0 drivers -v0x1df4c10_0 .net "leftOut", 14 0, L_0x1e29480; 1 drivers -v0x1df4cf0_0 .var "mode", 2 0; -v0x1df4dd0 .array/s "outVals", 2 5, 10 0; -v0x1df4f40_0 .var "phase", 2 0; -v0x1df5020_0 .net "portsHaveData", 5 2, L_0x1e26af0; 1 drivers -v0x1df3480_0 .net "portsWantData", 5 2, L_0x1e27170; 1 drivers -v0x1df3560_0 .net "readAckIn", 5 2, L_0x1e27890; 1 drivers -v0x1df54d0_0 .var "readAckOut", 5 2; -v0x1df5570_0 .var "readTarget", 2 0; -v0x1df5610_0 .var/s "readValue", 10 0; -L_0x2b89f59272e8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1df56f0 .array "regVals", 0 7; -v0x1df56f0_0 .net/s v0x1df56f0 0, 10 0, L_0x2b89f59272e8; 1 drivers -v0x1df56f0_1 .net/s v0x1df56f0 1, 10 0, L_0x1e261f0; 1 drivers -v0x1df56f0_2 .net/s v0x1df56f0 2, 10 0, L_0x1e26260; 1 drivers -v0x1df56f0_3 .net/s v0x1df56f0 3, 10 0, L_0x1e26560; 1 drivers -v0x1df56f0_4 .net/s v0x1df56f0 4, 10 0, L_0x1e26600; 1 drivers -v0x1df56f0_5 .net/s v0x1df56f0 5, 10 0, L_0x1e26700; 1 drivers -o0x2b89f58fde78 .functor BUFZ 11, C4; HiZ drive -v0x1df56f0_6 .net/s v0x1df56f0 6, 10 0, o0x2b89f58fde78; 0 drivers -o0x2b89f58fdea8 .functor BUFZ 11, C4; HiZ drive -v0x1df56f0_7 .net/s v0x1df56f0 7, 10 0, o0x2b89f58fdea8; 0 drivers -v0x1df5900_0 .net "right", 14 0, L_0x1e2d5b0; alias, 1 drivers -v0x1df59f0_0 .net "rightOut", 14 0, L_0x1e29cb0; alias, 1 drivers -o0x2b89f58fded8 .functor BUFZ 15, C4; HiZ drive -v0x1df5ac0_0 .net "up", 14 0, o0x2b89f58fded8; 0 drivers -v0x1df5b80_0 .net "upOut", 14 0, L_0x1e29230; 1 drivers -v0x1df5c60_0 .var "weHaveData", 5 2; -v0x1df5d40_0 .var "weWantData", 5 2; -v0x1df5e20_0 .net "writeAckIn", 5 2, L_0x1e27e00; 1 drivers -v0x1df5f00_0 .var "writeAckOut", 5 2; -v0x1df5fe0_0 .var "writeTarget", 2 0; -v0x1df60c0_0 .var/s "writeValue", 10 0; -L_0x1e26260 .part o0x2b89f58fdab8, 0, 11; -L_0x1e26560 .part L_0x1e2d5b0, 0, 11; -L_0x1e26600 .part o0x2b89f58fded8, 0, 11; -L_0x1e26700 .part L_0x1e34ea0, 0, 11; -L_0x1e26800 .part o0x2b89f58fdab8, 11, 1; -L_0x1e26920 .part L_0x1e2d5b0, 11, 1; -L_0x1e26a50 .part o0x2b89f58fded8, 11, 1; -L_0x1e26af0 .concat8 [ 1 1 1 1], L_0x1e26800, L_0x1e26920, L_0x1e26a50, L_0x1e26d00; -L_0x1e26d00 .part L_0x1e34ea0, 11, 1; -L_0x1e26e80 .reduce/or L_0x1e26af0; -L_0x1e26f20 .part o0x2b89f58fdab8, 12, 1; -L_0x1e26fc0 .part L_0x1e2d5b0, 12, 1; -L_0x1e270d0 .part o0x2b89f58fded8, 12, 1; -L_0x1e27170 .concat8 [ 1 1 1 1], L_0x1e26f20, L_0x1e26fc0, L_0x1e270d0, L_0x1e27310; -L_0x1e27310 .part L_0x1e34ea0, 12, 1; -L_0x1e27400 .reduce/or L_0x1e27170; -L_0x1e27580 .part o0x2b89f58fdab8, 13, 1; -L_0x1e276b0 .part L_0x1e2d5b0, 13, 1; -L_0x1e277f0 .part o0x2b89f58fded8, 13, 1; -L_0x1e27890 .concat8 [ 1 1 1 1], L_0x1e27580, L_0x1e276b0, L_0x1e277f0, L_0x1e27750; -L_0x1e27750 .part L_0x1e34ea0, 13, 1; -L_0x1e27ae0 .reduce/or L_0x1e27890; -L_0x1e279e0 .part o0x2b89f58fdab8, 14, 1; -L_0x1e27c90 .part L_0x1e2d5b0, 14, 1; -L_0x1e27bd0 .part o0x2b89f58fded8, 14, 1; -L_0x1e27e00 .concat8 [ 1 1 1 1], L_0x1e279e0, L_0x1e27c90, L_0x1e27bd0, L_0x1e27d30; -L_0x1e27d30 .part L_0x1e34ea0, 14, 1; -L_0x1e28120 .reduce/or L_0x1e27e00; -L_0x1e27ff0 .part v0x1df54d0_0, 0, 1; -L_0x1e28300 .part v0x1df54d0_0, 1, 1; -L_0x1e28210 .part v0x1df54d0_0, 2, 1; -L_0x1e284f0 .part v0x1df54d0_0, 3, 1; -L_0x1e283f0 .part v0x1df5f00_0, 0, 1; -L_0x1e28730 .part v0x1df5f00_0, 1, 1; -L_0x1e28620 .part v0x1df5f00_0, 2, 1; -L_0x1e288f0 .part v0x1df5f00_0, 3, 1; -L_0x1e287d0 .part v0x1df5d40_0, 0, 1; -L_0x1e28b50 .part v0x1df5d40_0, 1, 1; -L_0x1e28a20 .part v0x1df5d40_0, 2, 1; -L_0x1e28d30 .part v0x1df5d40_0, 3, 1; -L_0x1e28bf0 .part v0x1df5c60_0, 0, 1; -L_0x1e28f20 .part v0x1df5c60_0, 1, 1; -L_0x1e28dd0 .part v0x1df5c60_0, 2, 1; -L_0x1e28e70 .part v0x1df5c60_0, 3, 1; -L_0x1e28fc0 .array/port v0x1df4990, L_0x1e29320; -L_0x1e29320 .concat [ 4 2 0 0], v0x1df1c00_0, L_0x2b89f5927330; -LS_0x1e29230_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_2, L_0x1e28dd0, L_0x1e28a20, L_0x1e28620; -LS_0x1e29230_0_4 .concat8 [ 1 0 0 0], L_0x1e28210; -L_0x1e29230 .concat8 [ 14 1 0 0], LS_0x1e29230_0_0, LS_0x1e29230_0_4; -LS_0x1e29740_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_3, L_0x1e28e70, L_0x1e28d30, L_0x1e288f0; -LS_0x1e29740_0_4 .concat8 [ 1 0 0 0], L_0x1e284f0; -L_0x1e29740 .concat8 [ 14 1 0 0], LS_0x1e29740_0_0, LS_0x1e29740_0_4; -LS_0x1e29480_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_0, L_0x1e28bf0, L_0x1e287d0, L_0x1e283f0; -LS_0x1e29480_0_4 .concat8 [ 1 0 0 0], L_0x1e27ff0; -L_0x1e29480 .concat8 [ 14 1 0 0], LS_0x1e29480_0_0, LS_0x1e29480_0_4; -LS_0x1e29cb0_0_0 .concat8 [ 11 1 1 1], v0x1df4dd0_1, L_0x1e28f20, L_0x1e28b50, L_0x1e28730; -LS_0x1e29cb0_0_4 .concat8 [ 1 0 0 0], L_0x1e28300; -L_0x1e29cb0 .concat8 [ 14 1 0 0], LS_0x1e29cb0_0_0, LS_0x1e29cb0_0_4; -L_0x1e299e0 .part L_0x1e27060, 14, 4; -L_0x1e2a0c0 .part L_0x1e27060, 11, 3; -L_0x1e29ed0 .part L_0x1e27060, 8, 3; -L_0x1e2a310 .part L_0x1e27060, 10, 4; -L_0x1e2a160 .part L_0x1e27060, 0, 11; -S_0x1df6340 .scope module, "three" "tis100" 3 41, 4 49 0, S_0x1cc1e10; +P_0x2339e10 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x2339e50 .param/str "memFile" 0 4 60, "demo/six.dat"; +L_0x236ea90 .functor BUFZ 11, v0x233a130_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x236ec90 .functor BUFZ 11, v0x233a130_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x236fb00 .functor BUFZ 18, L_0x2371a60, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x233a130_0 .var/s "ACC", 10 0; +v0x233a230_0 .var/s "BAK", 10 0; +v0x233a310_0 .net "DST", 2 0, L_0x2372b60; 1 drivers +v0x233a3d0_0 .net/s "IMM", 10 0, L_0x2372c00; 1 drivers +v0x233a4b0_0 .net "INST", 3 0, L_0x2372480; 1 drivers +v0x233a5e0_0 .net "LABEL", 3 0, L_0x2372db0; 1 drivers +v0x233a6c0_0 .var "PC", 3 0; +v0x233a7a0_0 .var "PCNEXT", 3 0; +v0x233a880_0 .net "SRC", 2 0, L_0x2372970; 1 drivers +v0x233a9f0_0 .net *"_s103", 0 0, L_0x2370da0; 1 drivers +v0x233aad0_0 .net *"_s107", 0 0, L_0x2370cb0; 1 drivers +v0x233abb0_0 .net *"_s111", 0 0, L_0x2370f90; 1 drivers +v0x233ac90_0 .net *"_s115", 0 0, L_0x2370e90; 1 drivers +v0x233ad70_0 .net *"_s119", 0 0, L_0x23711d0; 1 drivers +v0x233ae50_0 .net *"_s123", 0 0, L_0x23710c0; 1 drivers +v0x233af30_0 .net *"_s127", 0 0, L_0x2371390; 1 drivers +v0x233b010_0 .net *"_s131", 0 0, L_0x2371270; 1 drivers +v0x233b1c0_0 .net *"_s135", 0 0, L_0x23715f0; 1 drivers +v0x233b260_0 .net *"_s139", 0 0, L_0x23714c0; 1 drivers +v0x233b340_0 .net *"_s143", 0 0, L_0x23717d0; 1 drivers +v0x233b420_0 .net *"_s147", 0 0, L_0x2371690; 1 drivers +v0x233b500_0 .net *"_s151", 0 0, L_0x23719c0; 1 drivers +v0x233b5e0_0 .net *"_s155", 0 0, L_0x2371870; 1 drivers +v0x233b6c0_0 .net *"_s159", 0 0, L_0x2371910; 1 drivers +v0x233b7a0_0 .net *"_s160", 17 0, L_0x2371a60; 1 drivers +v0x233b880_0 .net *"_s162", 5 0, L_0x2371dc0; 1 drivers +L_0x2b7d4c4d5330 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x233b960_0 .net *"_s165", 1 0, L_0x2b7d4c4d5330; 1 drivers +v0x233d890_2 .array/port v0x233d890, 2; +v0x233ba40_0 .net *"_s173", 10 0, v0x233d890_2; 1 drivers +v0x233d890_3 .array/port v0x233d890, 3; +v0x233bb20_0 .net *"_s179", 10 0, v0x233d890_3; 1 drivers +v0x233d890_0 .array/port v0x233d890, 0; +v0x233bc00_0 .net *"_s185", 10 0, v0x233d890_0; 1 drivers +v0x233d890_1 .array/port v0x233d890, 1; +v0x233bce0_0 .net *"_s191", 10 0, v0x233d890_1; 1 drivers +v0x233bdc0_0 .net *"_s23", 0 0, L_0x236f2a0; 1 drivers +v0x233bea0_0 .net *"_s27", 0 0, L_0x236f3c0; 1 drivers +v0x233b0f0_0 .net *"_s31", 0 0, L_0x236f4f0; 1 drivers +v0x233c170_0 .net *"_s36", 0 0, L_0x236f7a0; 1 drivers +v0x233c250_0 .net *"_s42", 0 0, L_0x236f9c0; 1 drivers +v0x233c330_0 .net *"_s46", 0 0, L_0x236fa60; 1 drivers +v0x233c410_0 .net *"_s50", 0 0, L_0x236fb70; 1 drivers +v0x233c4f0_0 .net *"_s55", 0 0, L_0x236fdb0; 1 drivers +v0x233c5d0_0 .net *"_s61", 0 0, L_0x2370020; 1 drivers +v0x233c6b0_0 .net *"_s65", 0 0, L_0x2370150; 1 drivers +v0x233c790_0 .net *"_s69", 0 0, L_0x2370290; 1 drivers +v0x233c870_0 .net *"_s74", 0 0, L_0x23701f0; 1 drivers +v0x233c950_0 .net *"_s80", 0 0, L_0x2370480; 1 drivers +v0x233ca30_0 .net *"_s84", 0 0, L_0x2370730; 1 drivers +v0x233cb10_0 .net *"_s88", 0 0, L_0x2370670; 1 drivers +v0x233cbf0_0 .net *"_s93", 0 0, L_0x23707d0; 1 drivers +v0x233ccd0_0 .net *"_s99", 0 0, L_0x2370a90; 1 drivers +v0x233cdb0_0 .net/s "accOut", 10 0, L_0x236ea90; 1 drivers +v0x233ce90_0 .net "anyHasData", 0 0, L_0x236f920; 1 drivers +v0x233cf50_0 .net "anyReadAck", 0 0, L_0x2370580; 1 drivers +v0x233d010_0 .net "anyWantData", 0 0, L_0x236fea0; 1 drivers +v0x233d0d0_0 .net "anyWriteAck", 0 0, L_0x2370bc0; 1 drivers +v0x233d190_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +v0x233d230_0 .net "down", 14 0, L_0x237d8f0; alias, 1 drivers +v0x233d2f0_0 .net "downOut", 14 0, L_0x23721e0; alias, 1 drivers +v0x233d390_0 .net "instruction", 17 0, L_0x236fb00; 1 drivers +v0x233d450 .array "instructions", 15 0, 17 0; +v0x233d510_0 .var "last", 2 0; +o0x2b7d4c4abab8 .functor BUFZ 15, C4; HiZ drive +v0x233d5f0_0 .net "left", 14 0, o0x2b7d4c4abab8; 0 drivers +v0x233d6d0_0 .net "leftOut", 14 0, L_0x2371f20; 1 drivers +v0x233d7b0_0 .var "mode", 2 0; +v0x233d890 .array/s "outVals", 2 5, 10 0; +v0x233da00_0 .var "phase", 2 0; +v0x233dae0_0 .net "portsHaveData", 5 2, L_0x236f590; 1 drivers +v0x233bf40_0 .net "portsWantData", 5 2, L_0x236fc10; 1 drivers +v0x233c020_0 .net "readAckIn", 5 2, L_0x2370330; 1 drivers +v0x233df90_0 .var "readAckOut", 5 2; +v0x233e030_0 .var "readTarget", 2 0; +v0x233e0d0_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d52e8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x233e1b0 .array "regVals", 0 7; +v0x233e1b0_0 .net/s v0x233e1b0 0, 10 0, L_0x2b7d4c4d52e8; 1 drivers +v0x233e1b0_1 .net/s v0x233e1b0 1, 10 0, L_0x236ec90; 1 drivers +v0x233e1b0_2 .net/s v0x233e1b0 2, 10 0, L_0x236ed00; 1 drivers +v0x233e1b0_3 .net/s v0x233e1b0 3, 10 0, L_0x236f000; 1 drivers +v0x233e1b0_4 .net/s v0x233e1b0 4, 10 0, L_0x236f0a0; 1 drivers +v0x233e1b0_5 .net/s v0x233e1b0 5, 10 0, L_0x236f1a0; 1 drivers +o0x2b7d4c4abe78 .functor BUFZ 11, C4; HiZ drive +v0x233e1b0_6 .net/s v0x233e1b0 6, 10 0, o0x2b7d4c4abe78; 0 drivers +o0x2b7d4c4abea8 .functor BUFZ 11, C4; HiZ drive +v0x233e1b0_7 .net/s v0x233e1b0 7, 10 0, o0x2b7d4c4abea8; 0 drivers +v0x233e3c0_0 .net "right", 14 0, L_0x2376050; alias, 1 drivers +v0x233e4b0_0 .net "rightOut", 14 0, L_0x2372750; alias, 1 drivers +o0x2b7d4c4abed8 .functor BUFZ 15, C4; HiZ drive +v0x233e580_0 .net "up", 14 0, o0x2b7d4c4abed8; 0 drivers +v0x233e640_0 .net "upOut", 14 0, L_0x2371cd0; 1 drivers +v0x233e720_0 .var "weHaveData", 5 2; +v0x233e800_0 .var "weWantData", 5 2; +v0x233e8e0_0 .net "writeAckIn", 5 2, L_0x23708a0; 1 drivers +v0x233e9c0_0 .var "writeAckOut", 5 2; +v0x233eaa0_0 .var "writeTarget", 2 0; +v0x233eb80_0 .var/s "writeValue", 10 0; +L_0x236ed00 .part o0x2b7d4c4abab8, 0, 11; +L_0x236f000 .part L_0x2376050, 0, 11; +L_0x236f0a0 .part o0x2b7d4c4abed8, 0, 11; +L_0x236f1a0 .part L_0x237d8f0, 0, 11; +L_0x236f2a0 .part o0x2b7d4c4abab8, 11, 1; +L_0x236f3c0 .part L_0x2376050, 11, 1; +L_0x236f4f0 .part o0x2b7d4c4abed8, 11, 1; +L_0x236f590 .concat8 [ 1 1 1 1], L_0x236f2a0, L_0x236f3c0, L_0x236f4f0, L_0x236f7a0; +L_0x236f7a0 .part L_0x237d8f0, 11, 1; +L_0x236f920 .reduce/or L_0x236f590; +L_0x236f9c0 .part o0x2b7d4c4abab8, 12, 1; +L_0x236fa60 .part L_0x2376050, 12, 1; +L_0x236fb70 .part o0x2b7d4c4abed8, 12, 1; +L_0x236fc10 .concat8 [ 1 1 1 1], L_0x236f9c0, L_0x236fa60, L_0x236fb70, L_0x236fdb0; +L_0x236fdb0 .part L_0x237d8f0, 12, 1; +L_0x236fea0 .reduce/or L_0x236fc10; +L_0x2370020 .part o0x2b7d4c4abab8, 13, 1; +L_0x2370150 .part L_0x2376050, 13, 1; +L_0x2370290 .part o0x2b7d4c4abed8, 13, 1; +L_0x2370330 .concat8 [ 1 1 1 1], L_0x2370020, L_0x2370150, L_0x2370290, L_0x23701f0; +L_0x23701f0 .part L_0x237d8f0, 13, 1; +L_0x2370580 .reduce/or L_0x2370330; +L_0x2370480 .part o0x2b7d4c4abab8, 14, 1; +L_0x2370730 .part L_0x2376050, 14, 1; +L_0x2370670 .part o0x2b7d4c4abed8, 14, 1; +L_0x23708a0 .concat8 [ 1 1 1 1], L_0x2370480, L_0x2370730, L_0x2370670, L_0x23707d0; +L_0x23707d0 .part L_0x237d8f0, 14, 1; +L_0x2370bc0 .reduce/or L_0x23708a0; +L_0x2370a90 .part v0x233df90_0, 0, 1; +L_0x2370da0 .part v0x233df90_0, 1, 1; +L_0x2370cb0 .part v0x233df90_0, 2, 1; +L_0x2370f90 .part v0x233df90_0, 3, 1; +L_0x2370e90 .part v0x233e9c0_0, 0, 1; +L_0x23711d0 .part v0x233e9c0_0, 1, 1; +L_0x23710c0 .part v0x233e9c0_0, 2, 1; +L_0x2371390 .part v0x233e9c0_0, 3, 1; +L_0x2371270 .part v0x233e800_0, 0, 1; +L_0x23715f0 .part v0x233e800_0, 1, 1; +L_0x23714c0 .part v0x233e800_0, 2, 1; +L_0x23717d0 .part v0x233e800_0, 3, 1; +L_0x2371690 .part v0x233e720_0, 0, 1; +L_0x23719c0 .part v0x233e720_0, 1, 1; +L_0x2371870 .part v0x233e720_0, 2, 1; +L_0x2371910 .part v0x233e720_0, 3, 1; +L_0x2371a60 .array/port v0x233d450, L_0x2371dc0; +L_0x2371dc0 .concat [ 4 2 0 0], v0x233a6c0_0, L_0x2b7d4c4d5330; +LS_0x2371cd0_0_0 .concat8 [ 11 1 1 1], v0x233d890_2, L_0x2371870, L_0x23714c0, L_0x23710c0; +LS_0x2371cd0_0_4 .concat8 [ 1 0 0 0], L_0x2370cb0; +L_0x2371cd0 .concat8 [ 14 1 0 0], LS_0x2371cd0_0_0, LS_0x2371cd0_0_4; +LS_0x23721e0_0_0 .concat8 [ 11 1 1 1], v0x233d890_3, L_0x2371910, L_0x23717d0, L_0x2371390; +LS_0x23721e0_0_4 .concat8 [ 1 0 0 0], L_0x2370f90; +L_0x23721e0 .concat8 [ 14 1 0 0], LS_0x23721e0_0_0, LS_0x23721e0_0_4; +LS_0x2371f20_0_0 .concat8 [ 11 1 1 1], v0x233d890_0, L_0x2371690, L_0x2371270, L_0x2370e90; +LS_0x2371f20_0_4 .concat8 [ 1 0 0 0], L_0x2370a90; +L_0x2371f20 .concat8 [ 14 1 0 0], LS_0x2371f20_0_0, LS_0x2371f20_0_4; +LS_0x2372750_0_0 .concat8 [ 11 1 1 1], v0x233d890_1, L_0x23719c0, L_0x23715f0, L_0x23711d0; +LS_0x2372750_0_4 .concat8 [ 1 0 0 0], L_0x2370da0; +L_0x2372750 .concat8 [ 14 1 0 0], LS_0x2372750_0_0, LS_0x2372750_0_4; +L_0x2372480 .part L_0x236fb00, 14, 4; +L_0x2372b60 .part L_0x236fb00, 11, 3; +L_0x2372970 .part L_0x236fb00, 8, 3; +L_0x2372db0 .part L_0x236fb00, 10, 4; +L_0x2372c00 .part L_0x236fb00, 0, 11; +S_0x233ee00 .scope module, "three" "tis100" 3 41, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -1321,174 +1321,174 @@ S_0x1df6340 .scope module, "three" "tis100" 3 41, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1df6510 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1df6550 .param/str "memFile" 0 4 60, "demo/three.dat"; -L_0x1e19b40 .functor BUFZ 11, v0x1df6830_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e19d40 .functor BUFZ 11, v0x1df6830_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e1ac20 .functor BUFZ 18, L_0x1e1cbe0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1df6830_0 .var/s "ACC", 10 0; -v0x1df6930_0 .var/s "BAK", 10 0; -v0x1df6a10_0 .net "DST", 2 0, L_0x1e1dd50; 1 drivers -v0x1df6ad0_0 .net/s "IMM", 10 0, L_0x1e1ddf0; 1 drivers -v0x1df6bb0_0 .net "INST", 3 0, L_0x1e1d670; 1 drivers -v0x1df6ce0_0 .net "LABEL", 3 0, L_0x1e1dfa0; 1 drivers -v0x1df6dc0_0 .var "PC", 3 0; -v0x1df6ea0_0 .var "PCNEXT", 3 0; -v0x1df6f80_0 .net "SRC", 2 0, L_0x1e1db60; 1 drivers -v0x1df70f0_0 .net *"_s103", 0 0, L_0x1e1bf20; 1 drivers -v0x1df71d0_0 .net *"_s107", 0 0, L_0x1e1be30; 1 drivers -v0x1df72b0_0 .net *"_s111", 0 0, L_0x1e1c110; 1 drivers -v0x1df7390_0 .net *"_s115", 0 0, L_0x1e1c010; 1 drivers -v0x1df7470_0 .net *"_s119", 0 0, L_0x1e1c350; 1 drivers -v0x1df7550_0 .net *"_s123", 0 0, L_0x1e1c240; 1 drivers -v0x1df7630_0 .net *"_s127", 0 0, L_0x1e1c510; 1 drivers -v0x1df7710_0 .net *"_s131", 0 0, L_0x1e1c3f0; 1 drivers -v0x1df78c0_0 .net *"_s135", 0 0, L_0x1e1c770; 1 drivers -v0x1df7960_0 .net *"_s139", 0 0, L_0x1e1c640; 1 drivers -v0x1df7a40_0 .net *"_s143", 0 0, L_0x1e1c950; 1 drivers -v0x1df7b20_0 .net *"_s147", 0 0, L_0x1e1c810; 1 drivers -v0x1df7c00_0 .net *"_s151", 0 0, L_0x1e1cb40; 1 drivers -v0x1df7ce0_0 .net *"_s155", 0 0, L_0x1e1c9f0; 1 drivers -v0x1df7dc0_0 .net *"_s159", 0 0, L_0x1e1ca90; 1 drivers -v0x1df7ea0_0 .net *"_s160", 17 0, L_0x1e1cbe0; 1 drivers -v0x1df7f80_0 .net *"_s162", 5 0, L_0x1e1cf40; 1 drivers -L_0x2b89f5927180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1df8060_0 .net *"_s165", 1 0, L_0x2b89f5927180; 1 drivers -v0x1dfa010_2 .array/port v0x1dfa010, 2; -v0x1df8140_0 .net *"_s173", 10 0, v0x1dfa010_2; 1 drivers -v0x1dfa010_3 .array/port v0x1dfa010, 3; -v0x1df8220_0 .net *"_s179", 10 0, v0x1dfa010_3; 1 drivers -v0x1dfa010_0 .array/port v0x1dfa010, 0; -v0x1df8300_0 .net *"_s185", 10 0, v0x1dfa010_0; 1 drivers -v0x1dfa010_1 .array/port v0x1dfa010, 1; -v0x1df83e0_0 .net *"_s191", 10 0, v0x1dfa010_1; 1 drivers -v0x1df84c0_0 .net *"_s23", 0 0, L_0x1e1a420; 1 drivers -v0x1df85a0_0 .net *"_s27", 0 0, L_0x1e1a4f0; 1 drivers -v0x1df77f0_0 .net *"_s31", 0 0, L_0x1e1a620; 1 drivers -v0x1df8870_0 .net *"_s36", 0 0, L_0x1e1a8b0; 1 drivers -v0x1df8950_0 .net *"_s42", 0 0, L_0x1e1aae0; 1 drivers -v0x1df8a30_0 .net *"_s46", 0 0, L_0x1e1ab80; 1 drivers -v0x1df8b10_0 .net *"_s50", 0 0, L_0x1e1ac90; 1 drivers -v0x1df8bf0_0 .net *"_s55", 0 0, L_0x1e1aea0; 1 drivers -v0x1df8cd0_0 .net *"_s61", 0 0, L_0x1e1b110; 1 drivers -v0x1df8db0_0 .net *"_s65", 0 0, L_0x1e1b240; 1 drivers -v0x1df8e90_0 .net *"_s69", 0 0, L_0x1e1b380; 1 drivers -v0x1df8f70_0 .net *"_s74", 0 0, L_0x1e1b2e0; 1 drivers -v0x1df9050_0 .net *"_s80", 0 0, L_0x1e1b560; 1 drivers -v0x1df9130_0 .net *"_s84", 0 0, L_0x1e1b850; 1 drivers -v0x1df9210_0 .net *"_s88", 0 0, L_0x1e1b790; 1 drivers -v0x1df92f0_0 .net *"_s93", 0 0, L_0x1e1b8f0; 1 drivers -v0x1df93d0_0 .net *"_s99", 0 0, L_0x1e1bc10; 1 drivers -v0x1df94b0_0 .net/s "accOut", 10 0, L_0x1e19b40; 1 drivers -v0x1df9590_0 .net "anyHasData", 0 0, L_0x1e1a9f0; 1 drivers -v0x1df9650_0 .net "anyReadAck", 0 0, L_0x1e1b6f0; 1 drivers -v0x1df9710_0 .net "anyWantData", 0 0, L_0x1e1af90; 1 drivers -v0x1df97d0_0 .net "anyWriteAck", 0 0, L_0x1e1bd40; 1 drivers -v0x1df9890_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -o0x2b89f58fec28 .functor BUFZ 15, C4; HiZ drive -v0x1df9930_0 .net "down", 14 0, o0x2b89f58fec28; 0 drivers -v0x1df9a10_0 .net "downOut", 14 0, L_0x1e1d3d0; 1 drivers -v0x1df9af0_0 .net "instruction", 17 0, L_0x1e1ac20; 1 drivers -v0x1df9bd0 .array "instructions", 15 0, 17 0; -v0x1df9c90_0 .var "last", 2 0; -o0x2b89f58fece8 .functor BUFZ 15, C4; HiZ drive -v0x1df9d70_0 .net "left", 14 0, o0x2b89f58fece8; 0 drivers -v0x1df9e50_0 .net "leftOut", 14 0, L_0x1e1d0a0; 1 drivers -v0x1df9f30_0 .var "mode", 2 0; -v0x1dfa010 .array/s "outVals", 2 5, 10 0; -v0x1dfa150_0 .var "phase", 2 0; -v0x1dfa230_0 .net "portsHaveData", 5 2, L_0x1e1a6c0; 1 drivers -v0x1df8640_0 .net "portsWantData", 5 2, L_0x1e1ad30; 1 drivers -v0x1df8700_0 .net "readAckIn", 5 2, L_0x1e1b420; 1 drivers -v0x1dfa6e0_0 .var "readAckOut", 5 2; -v0x1dfa780_0 .var "readTarget", 2 0; -v0x1dfa820_0 .var/s "readValue", 10 0; -L_0x2b89f5927138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1dfa8e0 .array "regVals", 0 7; -v0x1dfa8e0_0 .net/s v0x1dfa8e0 0, 10 0, L_0x2b89f5927138; 1 drivers -v0x1dfa8e0_1 .net/s v0x1dfa8e0 1, 10 0, L_0x1e19d40; 1 drivers -v0x1dfa8e0_2 .net/s v0x1dfa8e0 2, 10 0, L_0x1e1a0b0; 1 drivers -v0x1dfa8e0_3 .net/s v0x1dfa8e0 3, 10 0, L_0x1e1a150; 1 drivers -v0x1dfa8e0_4 .net/s v0x1dfa8e0 4, 10 0, L_0x1e1a1f0; 1 drivers -v0x1dfa8e0_5 .net/s v0x1dfa8e0 5, 10 0, L_0x1e1a320; 1 drivers -o0x2b89f58ff0a8 .functor BUFZ 11, C4; HiZ drive -v0x1dfa8e0_6 .net/s v0x1dfa8e0 6, 10 0, o0x2b89f58ff0a8; 0 drivers -o0x2b89f58ff0d8 .functor BUFZ 11, C4; HiZ drive -v0x1dfa8e0_7 .net/s v0x1dfa8e0 7, 10 0, o0x2b89f58ff0d8; 0 drivers -v0x1dfaaf0_0 .net "right", 14 0, L_0x1e211d0; alias, 1 drivers -v0x1dfabe0_0 .net "rightOut", 14 0, L_0x1e1d940; alias, 1 drivers -v0x1dfacb0_0 .net "up", 14 0, L_0x1e151a0; alias, 1 drivers -v0x1dfad80_0 .net "upOut", 14 0, L_0x1e1ce50; alias, 1 drivers -v0x1dfae50_0 .var "weHaveData", 5 2; -v0x1dfaf10_0 .var "weWantData", 5 2; -v0x1dfaff0_0 .net "writeAckIn", 5 2, L_0x1e1bad0; 1 drivers -v0x1dfb0d0_0 .var "writeAckOut", 5 2; -v0x1dfb1b0_0 .var "writeTarget", 2 0; -v0x1dfb290_0 .var/s "writeValue", 10 0; -L_0x1e1a0b0 .part o0x2b89f58fece8, 0, 11; -L_0x1e1a150 .part L_0x1e211d0, 0, 11; -L_0x1e1a1f0 .part L_0x1e151a0, 0, 11; -L_0x1e1a320 .part o0x2b89f58fec28, 0, 11; -L_0x1e1a420 .part o0x2b89f58fece8, 11, 1; -L_0x1e1a4f0 .part L_0x1e211d0, 11, 1; -L_0x1e1a620 .part L_0x1e151a0, 11, 1; -L_0x1e1a6c0 .concat8 [ 1 1 1 1], L_0x1e1a420, L_0x1e1a4f0, L_0x1e1a620, L_0x1e1a8b0; -L_0x1e1a8b0 .part o0x2b89f58fec28, 11, 1; -L_0x1e1a9f0 .reduce/or L_0x1e1a6c0; -L_0x1e1aae0 .part o0x2b89f58fece8, 12, 1; -L_0x1e1ab80 .part L_0x1e211d0, 12, 1; -L_0x1e1ac90 .part L_0x1e151a0, 12, 1; -L_0x1e1ad30 .concat8 [ 1 1 1 1], L_0x1e1aae0, L_0x1e1ab80, L_0x1e1ac90, L_0x1e1aea0; -L_0x1e1aea0 .part o0x2b89f58fec28, 12, 1; -L_0x1e1af90 .reduce/or L_0x1e1ad30; -L_0x1e1b110 .part o0x2b89f58fece8, 13, 1; -L_0x1e1b240 .part L_0x1e211d0, 13, 1; -L_0x1e1b380 .part L_0x1e151a0, 13, 1; -L_0x1e1b420 .concat8 [ 1 1 1 1], L_0x1e1b110, L_0x1e1b240, L_0x1e1b380, L_0x1e1b2e0; -L_0x1e1b2e0 .part o0x2b89f58fec28, 13, 1; -L_0x1e1b6f0 .reduce/or L_0x1e1b420; -L_0x1e1b560 .part o0x2b89f58fece8, 14, 1; -L_0x1e1b850 .part L_0x1e211d0, 14, 1; -L_0x1e1b790 .part L_0x1e151a0, 14, 1; -L_0x1e1bad0 .concat8 [ 1 1 1 1], L_0x1e1b560, L_0x1e1b850, L_0x1e1b790, L_0x1e1b8f0; -L_0x1e1b8f0 .part o0x2b89f58fec28, 14, 1; -L_0x1e1bd40 .reduce/or L_0x1e1bad0; -L_0x1e1bc10 .part v0x1dfa6e0_0, 0, 1; -L_0x1e1bf20 .part v0x1dfa6e0_0, 1, 1; -L_0x1e1be30 .part v0x1dfa6e0_0, 2, 1; -L_0x1e1c110 .part v0x1dfa6e0_0, 3, 1; -L_0x1e1c010 .part v0x1dfb0d0_0, 0, 1; -L_0x1e1c350 .part v0x1dfb0d0_0, 1, 1; -L_0x1e1c240 .part v0x1dfb0d0_0, 2, 1; -L_0x1e1c510 .part v0x1dfb0d0_0, 3, 1; -L_0x1e1c3f0 .part v0x1dfaf10_0, 0, 1; -L_0x1e1c770 .part v0x1dfaf10_0, 1, 1; -L_0x1e1c640 .part v0x1dfaf10_0, 2, 1; -L_0x1e1c950 .part v0x1dfaf10_0, 3, 1; -L_0x1e1c810 .part v0x1dfae50_0, 0, 1; -L_0x1e1cb40 .part v0x1dfae50_0, 1, 1; -L_0x1e1c9f0 .part v0x1dfae50_0, 2, 1; -L_0x1e1ca90 .part v0x1dfae50_0, 3, 1; -L_0x1e1cbe0 .array/port v0x1df9bd0, L_0x1e1cf40; -L_0x1e1cf40 .concat [ 4 2 0 0], v0x1df6dc0_0, L_0x2b89f5927180; -LS_0x1e1ce50_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_2, L_0x1e1c9f0, L_0x1e1c640, L_0x1e1c240; -LS_0x1e1ce50_0_4 .concat8 [ 1 0 0 0], L_0x1e1be30; -L_0x1e1ce50 .concat8 [ 14 1 0 0], LS_0x1e1ce50_0_0, LS_0x1e1ce50_0_4; -LS_0x1e1d3d0_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_3, L_0x1e1ca90, L_0x1e1c950, L_0x1e1c510; -LS_0x1e1d3d0_0_4 .concat8 [ 1 0 0 0], L_0x1e1c110; -L_0x1e1d3d0 .concat8 [ 14 1 0 0], LS_0x1e1d3d0_0_0, LS_0x1e1d3d0_0_4; -LS_0x1e1d0a0_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_0, L_0x1e1c810, L_0x1e1c3f0, L_0x1e1c010; -LS_0x1e1d0a0_0_4 .concat8 [ 1 0 0 0], L_0x1e1bc10; -L_0x1e1d0a0 .concat8 [ 14 1 0 0], LS_0x1e1d0a0_0_0, LS_0x1e1d0a0_0_4; -LS_0x1e1d940_0_0 .concat8 [ 11 1 1 1], v0x1dfa010_1, L_0x1e1cb40, L_0x1e1c770, L_0x1e1c350; -LS_0x1e1d940_0_4 .concat8 [ 1 0 0 0], L_0x1e1bf20; -L_0x1e1d940 .concat8 [ 14 1 0 0], LS_0x1e1d940_0_0, LS_0x1e1d940_0_4; -L_0x1e1d670 .part L_0x1e1ac20, 14, 4; -L_0x1e1dd50 .part L_0x1e1ac20, 11, 3; -L_0x1e1db60 .part L_0x1e1ac20, 8, 3; -L_0x1e1dfa0 .part L_0x1e1ac20, 10, 4; -L_0x1e1ddf0 .part L_0x1e1ac20, 0, 11; -S_0x1dfb510 .scope module, "two" "tis100" 3 38, 4 49 0, S_0x1cc1e10; +P_0x233efd0 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x233f010 .param/str "memFile" 0 4 60, "demo/three.dat"; +L_0x23625e0 .functor BUFZ 11, v0x233f2f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x23627e0 .functor BUFZ 11, v0x233f2f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x23636c0 .functor BUFZ 18, L_0x2365680, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x233f2f0_0 .var/s "ACC", 10 0; +v0x233f3f0_0 .var/s "BAK", 10 0; +v0x233f4d0_0 .net "DST", 2 0, L_0x23667f0; 1 drivers +v0x233f590_0 .net/s "IMM", 10 0, L_0x2366890; 1 drivers +v0x233f670_0 .net "INST", 3 0, L_0x2366110; 1 drivers +v0x233f7a0_0 .net "LABEL", 3 0, L_0x2366a40; 1 drivers +v0x233f880_0 .var "PC", 3 0; +v0x233f960_0 .var "PCNEXT", 3 0; +v0x233fa40_0 .net "SRC", 2 0, L_0x2366600; 1 drivers +v0x233fbb0_0 .net *"_s103", 0 0, L_0x23649c0; 1 drivers +v0x233fc90_0 .net *"_s107", 0 0, L_0x23648d0; 1 drivers +v0x233fd70_0 .net *"_s111", 0 0, L_0x2364bb0; 1 drivers +v0x233fe50_0 .net *"_s115", 0 0, L_0x2364ab0; 1 drivers +v0x233ff30_0 .net *"_s119", 0 0, L_0x2364df0; 1 drivers +v0x2340010_0 .net *"_s123", 0 0, L_0x2364ce0; 1 drivers +v0x23400f0_0 .net *"_s127", 0 0, L_0x2364fb0; 1 drivers +v0x23401d0_0 .net *"_s131", 0 0, L_0x2364e90; 1 drivers +v0x2340380_0 .net *"_s135", 0 0, L_0x2365210; 1 drivers +v0x2340420_0 .net *"_s139", 0 0, L_0x23650e0; 1 drivers +v0x2340500_0 .net *"_s143", 0 0, L_0x23653f0; 1 drivers +v0x23405e0_0 .net *"_s147", 0 0, L_0x23652b0; 1 drivers +v0x23406c0_0 .net *"_s151", 0 0, L_0x23655e0; 1 drivers +v0x23407a0_0 .net *"_s155", 0 0, L_0x2365490; 1 drivers +v0x2340880_0 .net *"_s159", 0 0, L_0x2365530; 1 drivers +v0x2340960_0 .net *"_s160", 17 0, L_0x2365680; 1 drivers +v0x2340a40_0 .net *"_s162", 5 0, L_0x23659e0; 1 drivers +L_0x2b7d4c4d5180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2340b20_0 .net *"_s165", 1 0, L_0x2b7d4c4d5180; 1 drivers +v0x2342ad0_2 .array/port v0x2342ad0, 2; +v0x2340c00_0 .net *"_s173", 10 0, v0x2342ad0_2; 1 drivers +v0x2342ad0_3 .array/port v0x2342ad0, 3; +v0x2340ce0_0 .net *"_s179", 10 0, v0x2342ad0_3; 1 drivers +v0x2342ad0_0 .array/port v0x2342ad0, 0; +v0x2340dc0_0 .net *"_s185", 10 0, v0x2342ad0_0; 1 drivers +v0x2342ad0_1 .array/port v0x2342ad0, 1; +v0x2340ea0_0 .net *"_s191", 10 0, v0x2342ad0_1; 1 drivers +v0x2340f80_0 .net *"_s23", 0 0, L_0x2362ec0; 1 drivers +v0x2341060_0 .net *"_s27", 0 0, L_0x2362f90; 1 drivers +v0x23402b0_0 .net *"_s31", 0 0, L_0x23630c0; 1 drivers +v0x2341330_0 .net *"_s36", 0 0, L_0x2363350; 1 drivers +v0x2341410_0 .net *"_s42", 0 0, L_0x2363580; 1 drivers +v0x23414f0_0 .net *"_s46", 0 0, L_0x2363620; 1 drivers +v0x23415d0_0 .net *"_s50", 0 0, L_0x2363730; 1 drivers +v0x23416b0_0 .net *"_s55", 0 0, L_0x2363940; 1 drivers +v0x2341790_0 .net *"_s61", 0 0, L_0x2363bb0; 1 drivers +v0x2341870_0 .net *"_s65", 0 0, L_0x2363ce0; 1 drivers +v0x2341950_0 .net *"_s69", 0 0, L_0x2363e20; 1 drivers +v0x2341a30_0 .net *"_s74", 0 0, L_0x2363d80; 1 drivers +v0x2341b10_0 .net *"_s80", 0 0, L_0x2364000; 1 drivers +v0x2341bf0_0 .net *"_s84", 0 0, L_0x23642f0; 1 drivers +v0x2341cd0_0 .net *"_s88", 0 0, L_0x2364230; 1 drivers +v0x2341db0_0 .net *"_s93", 0 0, L_0x2364390; 1 drivers +v0x2341e90_0 .net *"_s99", 0 0, L_0x23646b0; 1 drivers +v0x2341f70_0 .net/s "accOut", 10 0, L_0x23625e0; 1 drivers +v0x2342050_0 .net "anyHasData", 0 0, L_0x2363490; 1 drivers +v0x2342110_0 .net "anyReadAck", 0 0, L_0x2364190; 1 drivers +v0x23421d0_0 .net "anyWantData", 0 0, L_0x2363a30; 1 drivers +v0x2342290_0 .net "anyWriteAck", 0 0, L_0x23647e0; 1 drivers +v0x2342350_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +o0x2b7d4c4acc28 .functor BUFZ 15, C4; HiZ drive +v0x23423f0_0 .net "down", 14 0, o0x2b7d4c4acc28; 0 drivers +v0x23424d0_0 .net "downOut", 14 0, L_0x2365e70; 1 drivers +v0x23425b0_0 .net "instruction", 17 0, L_0x23636c0; 1 drivers +v0x2342690 .array "instructions", 15 0, 17 0; +v0x2342750_0 .var "last", 2 0; +o0x2b7d4c4acce8 .functor BUFZ 15, C4; HiZ drive +v0x2342830_0 .net "left", 14 0, o0x2b7d4c4acce8; 0 drivers +v0x2342910_0 .net "leftOut", 14 0, L_0x2365b40; 1 drivers +v0x23429f0_0 .var "mode", 2 0; +v0x2342ad0 .array/s "outVals", 2 5, 10 0; +v0x2342c10_0 .var "phase", 2 0; +v0x2342cf0_0 .net "portsHaveData", 5 2, L_0x2363160; 1 drivers +v0x2341100_0 .net "portsWantData", 5 2, L_0x23637d0; 1 drivers +v0x23411c0_0 .net "readAckIn", 5 2, L_0x2363ec0; 1 drivers +v0x23431a0_0 .var "readAckOut", 5 2; +v0x2343240_0 .var "readTarget", 2 0; +v0x23432e0_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d5138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x23433a0 .array "regVals", 0 7; +v0x23433a0_0 .net/s v0x23433a0 0, 10 0, L_0x2b7d4c4d5138; 1 drivers +v0x23433a0_1 .net/s v0x23433a0 1, 10 0, L_0x23627e0; 1 drivers +v0x23433a0_2 .net/s v0x23433a0 2, 10 0, L_0x2362b50; 1 drivers +v0x23433a0_3 .net/s v0x23433a0 3, 10 0, L_0x2362bf0; 1 drivers +v0x23433a0_4 .net/s v0x23433a0 4, 10 0, L_0x2362c90; 1 drivers +v0x23433a0_5 .net/s v0x23433a0 5, 10 0, L_0x2362dc0; 1 drivers +o0x2b7d4c4ad0a8 .functor BUFZ 11, C4; HiZ drive +v0x23433a0_6 .net/s v0x23433a0 6, 10 0, o0x2b7d4c4ad0a8; 0 drivers +o0x2b7d4c4ad0d8 .functor BUFZ 11, C4; HiZ drive +v0x23433a0_7 .net/s v0x23433a0 7, 10 0, o0x2b7d4c4ad0d8; 0 drivers +v0x23435b0_0 .net "right", 14 0, L_0x2369c70; alias, 1 drivers +v0x23436a0_0 .net "rightOut", 14 0, L_0x23663e0; alias, 1 drivers +v0x2343770_0 .net "up", 14 0, L_0x235dc10; alias, 1 drivers +v0x2343840_0 .net "upOut", 14 0, L_0x23658f0; alias, 1 drivers +v0x2343910_0 .var "weHaveData", 5 2; +v0x23439d0_0 .var "weWantData", 5 2; +v0x2343ab0_0 .net "writeAckIn", 5 2, L_0x2364570; 1 drivers +v0x2343b90_0 .var "writeAckOut", 5 2; +v0x2343c70_0 .var "writeTarget", 2 0; +v0x2343d50_0 .var/s "writeValue", 10 0; +L_0x2362b50 .part o0x2b7d4c4acce8, 0, 11; +L_0x2362bf0 .part L_0x2369c70, 0, 11; +L_0x2362c90 .part L_0x235dc10, 0, 11; +L_0x2362dc0 .part o0x2b7d4c4acc28, 0, 11; +L_0x2362ec0 .part o0x2b7d4c4acce8, 11, 1; +L_0x2362f90 .part L_0x2369c70, 11, 1; +L_0x23630c0 .part L_0x235dc10, 11, 1; +L_0x2363160 .concat8 [ 1 1 1 1], L_0x2362ec0, L_0x2362f90, L_0x23630c0, L_0x2363350; +L_0x2363350 .part o0x2b7d4c4acc28, 11, 1; +L_0x2363490 .reduce/or L_0x2363160; +L_0x2363580 .part o0x2b7d4c4acce8, 12, 1; +L_0x2363620 .part L_0x2369c70, 12, 1; +L_0x2363730 .part L_0x235dc10, 12, 1; +L_0x23637d0 .concat8 [ 1 1 1 1], L_0x2363580, L_0x2363620, L_0x2363730, L_0x2363940; +L_0x2363940 .part o0x2b7d4c4acc28, 12, 1; +L_0x2363a30 .reduce/or L_0x23637d0; +L_0x2363bb0 .part o0x2b7d4c4acce8, 13, 1; +L_0x2363ce0 .part L_0x2369c70, 13, 1; +L_0x2363e20 .part L_0x235dc10, 13, 1; +L_0x2363ec0 .concat8 [ 1 1 1 1], L_0x2363bb0, L_0x2363ce0, L_0x2363e20, L_0x2363d80; +L_0x2363d80 .part o0x2b7d4c4acc28, 13, 1; +L_0x2364190 .reduce/or L_0x2363ec0; +L_0x2364000 .part o0x2b7d4c4acce8, 14, 1; +L_0x23642f0 .part L_0x2369c70, 14, 1; +L_0x2364230 .part L_0x235dc10, 14, 1; +L_0x2364570 .concat8 [ 1 1 1 1], L_0x2364000, L_0x23642f0, L_0x2364230, L_0x2364390; +L_0x2364390 .part o0x2b7d4c4acc28, 14, 1; +L_0x23647e0 .reduce/or L_0x2364570; +L_0x23646b0 .part v0x23431a0_0, 0, 1; +L_0x23649c0 .part v0x23431a0_0, 1, 1; +L_0x23648d0 .part v0x23431a0_0, 2, 1; +L_0x2364bb0 .part v0x23431a0_0, 3, 1; +L_0x2364ab0 .part v0x2343b90_0, 0, 1; +L_0x2364df0 .part v0x2343b90_0, 1, 1; +L_0x2364ce0 .part v0x2343b90_0, 2, 1; +L_0x2364fb0 .part v0x2343b90_0, 3, 1; +L_0x2364e90 .part v0x23439d0_0, 0, 1; +L_0x2365210 .part v0x23439d0_0, 1, 1; +L_0x23650e0 .part v0x23439d0_0, 2, 1; +L_0x23653f0 .part v0x23439d0_0, 3, 1; +L_0x23652b0 .part v0x2343910_0, 0, 1; +L_0x23655e0 .part v0x2343910_0, 1, 1; +L_0x2365490 .part v0x2343910_0, 2, 1; +L_0x2365530 .part v0x2343910_0, 3, 1; +L_0x2365680 .array/port v0x2342690, L_0x23659e0; +L_0x23659e0 .concat [ 4 2 0 0], v0x233f880_0, L_0x2b7d4c4d5180; +LS_0x23658f0_0_0 .concat8 [ 11 1 1 1], v0x2342ad0_2, L_0x2365490, L_0x23650e0, L_0x2364ce0; +LS_0x23658f0_0_4 .concat8 [ 1 0 0 0], L_0x23648d0; +L_0x23658f0 .concat8 [ 14 1 0 0], LS_0x23658f0_0_0, LS_0x23658f0_0_4; +LS_0x2365e70_0_0 .concat8 [ 11 1 1 1], v0x2342ad0_3, L_0x2365530, L_0x23653f0, L_0x2364fb0; +LS_0x2365e70_0_4 .concat8 [ 1 0 0 0], L_0x2364bb0; +L_0x2365e70 .concat8 [ 14 1 0 0], LS_0x2365e70_0_0, LS_0x2365e70_0_4; +LS_0x2365b40_0_0 .concat8 [ 11 1 1 1], v0x2342ad0_0, L_0x23652b0, L_0x2364e90, L_0x2364ab0; +LS_0x2365b40_0_4 .concat8 [ 1 0 0 0], L_0x23646b0; +L_0x2365b40 .concat8 [ 14 1 0 0], LS_0x2365b40_0_0, LS_0x2365b40_0_4; +LS_0x23663e0_0_0 .concat8 [ 11 1 1 1], v0x2342ad0_1, L_0x23655e0, L_0x2365210, L_0x2364df0; +LS_0x23663e0_0_4 .concat8 [ 1 0 0 0], L_0x23649c0; +L_0x23663e0 .concat8 [ 14 1 0 0], LS_0x23663e0_0_0, LS_0x23663e0_0_4; +L_0x2366110 .part L_0x23636c0, 14, 4; +L_0x23667f0 .part L_0x23636c0, 11, 3; +L_0x2366600 .part L_0x23636c0, 8, 3; +L_0x2366a40 .part L_0x23636c0, 10, 4; +L_0x2366890 .part L_0x23636c0, 0, 11; +S_0x2343fd0 .scope module, "two" "tis100" 3 38, 4 49 0, S_0x220a8e0; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -1500,228 +1500,228 @@ S_0x1dfb510 .scope module, "two" "tis100" 3 38, 4 49 0, S_0x1cc1e10; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1dfb770 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; -P_0x1dfb7b0 .param/str "memFile" 0 4 60, "demo/two.dat"; -L_0x1e15ae0 .functor BUFZ 11, v0x1dfba40_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e15ce0 .functor BUFZ 11, v0x1dfba40_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1e16b60 .functor BUFZ 18, L_0x1e18b00, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1dfba40_0 .var/s "ACC", 10 0; -v0x1dfbb40_0 .var/s "BAK", 10 0; -v0x1dfbc20_0 .net "DST", 2 0, L_0x1e19c00; 1 drivers -v0x1dfbce0_0 .net/s "IMM", 10 0, L_0x1e19ca0; 1 drivers -v0x1dfbdc0_0 .net "INST", 3 0, L_0x1e19520; 1 drivers -v0x1dfbef0_0 .net "LABEL", 3 0, L_0x1e19e50; 1 drivers -v0x1dfbfd0_0 .var "PC", 3 0; -v0x1dfc0b0_0 .var "PCNEXT", 3 0; -v0x1dfc190_0 .net "SRC", 2 0, L_0x1e19a10; 1 drivers -v0x1dfc300_0 .net *"_s103", 0 0, L_0x1e17e40; 1 drivers -v0x1dfc3e0_0 .net *"_s107", 0 0, L_0x1e17d50; 1 drivers -v0x1dfc4c0_0 .net *"_s111", 0 0, L_0x1e18030; 1 drivers -v0x1dfc5a0_0 .net *"_s115", 0 0, L_0x1e17f30; 1 drivers -v0x1dfc680_0 .net *"_s119", 0 0, L_0x1e18270; 1 drivers -v0x1dfc760_0 .net *"_s123", 0 0, L_0x1e18160; 1 drivers -v0x1dfc840_0 .net *"_s127", 0 0, L_0x1e18430; 1 drivers -v0x1dfc920_0 .net *"_s131", 0 0, L_0x1e18310; 1 drivers -v0x1dfcad0_0 .net *"_s135", 0 0, L_0x1e18690; 1 drivers -v0x1dfcb70_0 .net *"_s139", 0 0, L_0x1e18560; 1 drivers -v0x1dfcc50_0 .net *"_s143", 0 0, L_0x1e18870; 1 drivers -v0x1dfcd30_0 .net *"_s147", 0 0, L_0x1e18730; 1 drivers -v0x1dfce10_0 .net *"_s151", 0 0, L_0x1e18a60; 1 drivers -v0x1dfcef0_0 .net *"_s155", 0 0, L_0x1e18910; 1 drivers -v0x1dfcfd0_0 .net *"_s159", 0 0, L_0x1e189b0; 1 drivers -v0x1dfd0b0_0 .net *"_s160", 17 0, L_0x1e18b00; 1 drivers -v0x1dfd190_0 .net *"_s162", 5 0, L_0x1e18e60; 1 drivers -L_0x2b89f59270f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1dfd270_0 .net *"_s165", 1 0, L_0x2b89f59270f0; 1 drivers -v0x1dff230_2 .array/port v0x1dff230, 2; -v0x1dfd350_0 .net *"_s173", 10 0, v0x1dff230_2; 1 drivers -v0x1dff230_3 .array/port v0x1dff230, 3; -v0x1dfd430_0 .net *"_s179", 10 0, v0x1dff230_3; 1 drivers -v0x1dff230_0 .array/port v0x1dff230, 0; -v0x1dfd510_0 .net *"_s185", 10 0, v0x1dff230_0; 1 drivers -v0x1dff230_1 .array/port v0x1dff230, 1; -v0x1dfd5f0_0 .net *"_s191", 10 0, v0x1dff230_1; 1 drivers -v0x1dfd6d0_0 .net *"_s23", 0 0, L_0x1e16320; 1 drivers -v0x1dfd7b0_0 .net *"_s27", 0 0, L_0x1e16440; 1 drivers -v0x1dfca00_0 .net *"_s31", 0 0, L_0x1e16530; 1 drivers -v0x1dfda80_0 .net *"_s36", 0 0, L_0x1e16800; 1 drivers -v0x1dfdb60_0 .net *"_s42", 0 0, L_0x1e16a20; 1 drivers -v0x1dfdc40_0 .net *"_s46", 0 0, L_0x1e16ac0; 1 drivers -v0x1dfdd20_0 .net *"_s50", 0 0, L_0x1e16bd0; 1 drivers -v0x1dfde00_0 .net *"_s55", 0 0, L_0x1e16e10; 1 drivers -v0x1dfdee0_0 .net *"_s61", 0 0, L_0x1e17080; 1 drivers -v0x1dfdfc0_0 .net *"_s65", 0 0, L_0x1e171b0; 1 drivers -v0x1dfe0a0_0 .net *"_s69", 0 0, L_0x1e17380; 1 drivers -v0x1dfe180_0 .net *"_s74", 0 0, L_0x1e172e0; 1 drivers -v0x1dfe260_0 .net *"_s80", 0 0, L_0x1e17520; 1 drivers -v0x1dfe340_0 .net *"_s84", 0 0, L_0x1e177d0; 1 drivers -v0x1dfe420_0 .net *"_s88", 0 0, L_0x1e17710; 1 drivers -v0x1dfe500_0 .net *"_s93", 0 0, L_0x1e17870; 1 drivers -v0x1dfe5e0_0 .net *"_s99", 0 0, L_0x1e17b30; 1 drivers -v0x1dfe6c0_0 .net/s "accOut", 10 0, L_0x1e15ae0; 1 drivers -v0x1dfe7a0_0 .net "anyHasData", 0 0, L_0x1e16980; 1 drivers -v0x1dfe860_0 .net "anyReadAck", 0 0, L_0x1e17620; 1 drivers -v0x1dfe920_0 .net "anyWantData", 0 0, L_0x1e16f00; 1 drivers -v0x1dfe9e0_0 .net "anyWriteAck", 0 0, L_0x1e17c60; 1 drivers -v0x1dfeaa0_0 .net "clk", 0 0, v0x1e007c0_0; alias, 1 drivers -v0x1dfec50_0 .net "down", 14 0, L_0x1e25130; alias, 1 drivers -v0x1dfecf0_0 .net "downOut", 14 0, L_0x1e19280; alias, 1 drivers -v0x1dfed90_0 .net "instruction", 17 0, L_0x1e16b60; 1 drivers -v0x1dfee30 .array "instructions", 15 0, 17 0; -v0x1dfeed0_0 .var "last", 2 0; -o0x2b89f58ffe58 .functor BUFZ 15, C4; HiZ drive -v0x1dfef90_0 .net "left", 14 0, o0x2b89f58ffe58; 0 drivers -v0x1dff070_0 .net "leftOut", 14 0, L_0x1e18fc0; 1 drivers -v0x1dff150_0 .var "mode", 2 0; -v0x1dff230 .array/s "outVals", 2 5, 10 0; -v0x1dff3a0_0 .var "phase", 2 0; -v0x1dff480_0 .net "portsHaveData", 5 2, L_0x1e16620; 1 drivers -v0x1dfd850_0 .net "portsWantData", 5 2, L_0x1e16c70; 1 drivers -v0x1dfd930_0 .net "readAckIn", 5 2, L_0x1e17420; 1 drivers -v0x1dff930_0 .var "readAckOut", 5 2; -v0x1dff9d0_0 .var "readTarget", 2 0; -v0x1dffa70_0 .var/s "readValue", 10 0; -L_0x2b89f59270a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1dffb50 .array "regVals", 0 7; -v0x1dffb50_0 .net/s v0x1dffb50 0, 10 0, L_0x2b89f59270a8; 1 drivers -v0x1dffb50_1 .net/s v0x1dffb50 1, 10 0, L_0x1e15ce0; 1 drivers -v0x1dffb50_2 .net/s v0x1dffb50 2, 10 0, L_0x1e15d50; 1 drivers -v0x1dffb50_3 .net/s v0x1dffb50 3, 10 0, L_0x1e16050; 1 drivers -v0x1dffb50_4 .net/s v0x1dffb50 4, 10 0, L_0x1e16120; 1 drivers -v0x1dffb50_5 .net/s v0x1dffb50 5, 10 0, L_0x1e16220; 1 drivers -o0x2b89f5900218 .functor BUFZ 11, C4; HiZ drive -v0x1dffb50_6 .net/s v0x1dffb50 6, 10 0, o0x2b89f5900218; 0 drivers -o0x2b89f5900248 .functor BUFZ 11, C4; HiZ drive -v0x1dffb50_7 .net/s v0x1dffb50 7, 10 0, o0x2b89f5900248; 0 drivers -o0x2b89f5900278 .functor BUFZ 15, C4; HiZ drive -v0x1dffd60_0 .net "right", 14 0, o0x2b89f5900278; 0 drivers -v0x1dffe40_0 .net "rightOut", 14 0, L_0x1e197f0; 1 drivers -o0x2b89f59002d8 .functor BUFZ 15, C4; HiZ drive -v0x1dfff20_0 .net "up", 14 0, o0x2b89f59002d8; 0 drivers -v0x1e00000_0 .net "upOut", 14 0, L_0x1e18d70; 1 drivers -v0x1e000e0_0 .var "weHaveData", 5 2; -v0x1e001c0_0 .var "weWantData", 5 2; -v0x1e002a0_0 .net "writeAckIn", 5 2, L_0x1e17940; 1 drivers -v0x1e00380_0 .var "writeAckOut", 5 2; -v0x1e00460_0 .var "writeTarget", 2 0; -v0x1e00540_0 .var/s "writeValue", 10 0; -L_0x1e15d50 .part o0x2b89f58ffe58, 0, 11; -L_0x1e16050 .part o0x2b89f5900278, 0, 11; -L_0x1e16120 .part o0x2b89f59002d8, 0, 11; -L_0x1e16220 .part L_0x1e25130, 0, 11; -L_0x1e16320 .part o0x2b89f58ffe58, 11, 1; -L_0x1e16440 .part o0x2b89f5900278, 11, 1; -L_0x1e16530 .part o0x2b89f59002d8, 11, 1; -L_0x1e16620 .concat8 [ 1 1 1 1], L_0x1e16320, L_0x1e16440, L_0x1e16530, L_0x1e16800; -L_0x1e16800 .part L_0x1e25130, 11, 1; -L_0x1e16980 .reduce/or L_0x1e16620; -L_0x1e16a20 .part o0x2b89f58ffe58, 12, 1; -L_0x1e16ac0 .part o0x2b89f5900278, 12, 1; -L_0x1e16bd0 .part o0x2b89f59002d8, 12, 1; -L_0x1e16c70 .concat8 [ 1 1 1 1], L_0x1e16a20, L_0x1e16ac0, L_0x1e16bd0, L_0x1e16e10; -L_0x1e16e10 .part L_0x1e25130, 12, 1; -L_0x1e16f00 .reduce/or L_0x1e16c70; -L_0x1e17080 .part o0x2b89f58ffe58, 13, 1; -L_0x1e171b0 .part o0x2b89f5900278, 13, 1; -L_0x1e17380 .part o0x2b89f59002d8, 13, 1; -L_0x1e17420 .concat8 [ 1 1 1 1], L_0x1e17080, L_0x1e171b0, L_0x1e17380, L_0x1e172e0; -L_0x1e172e0 .part L_0x1e25130, 13, 1; -L_0x1e17620 .reduce/or L_0x1e17420; -L_0x1e17520 .part o0x2b89f58ffe58, 14, 1; -L_0x1e177d0 .part o0x2b89f5900278, 14, 1; -L_0x1e17710 .part o0x2b89f59002d8, 14, 1; -L_0x1e17940 .concat8 [ 1 1 1 1], L_0x1e17520, L_0x1e177d0, L_0x1e17710, L_0x1e17870; -L_0x1e17870 .part L_0x1e25130, 14, 1; -L_0x1e17c60 .reduce/or L_0x1e17940; -L_0x1e17b30 .part v0x1dff930_0, 0, 1; -L_0x1e17e40 .part v0x1dff930_0, 1, 1; -L_0x1e17d50 .part v0x1dff930_0, 2, 1; -L_0x1e18030 .part v0x1dff930_0, 3, 1; -L_0x1e17f30 .part v0x1e00380_0, 0, 1; -L_0x1e18270 .part v0x1e00380_0, 1, 1; -L_0x1e18160 .part v0x1e00380_0, 2, 1; -L_0x1e18430 .part v0x1e00380_0, 3, 1; -L_0x1e18310 .part v0x1e001c0_0, 0, 1; -L_0x1e18690 .part v0x1e001c0_0, 1, 1; -L_0x1e18560 .part v0x1e001c0_0, 2, 1; -L_0x1e18870 .part v0x1e001c0_0, 3, 1; -L_0x1e18730 .part v0x1e000e0_0, 0, 1; -L_0x1e18a60 .part v0x1e000e0_0, 1, 1; -L_0x1e18910 .part v0x1e000e0_0, 2, 1; -L_0x1e189b0 .part v0x1e000e0_0, 3, 1; -L_0x1e18b00 .array/port v0x1dfee30, L_0x1e18e60; -L_0x1e18e60 .concat [ 4 2 0 0], v0x1dfbfd0_0, L_0x2b89f59270f0; -LS_0x1e18d70_0_0 .concat8 [ 11 1 1 1], v0x1dff230_2, L_0x1e18910, L_0x1e18560, L_0x1e18160; -LS_0x1e18d70_0_4 .concat8 [ 1 0 0 0], L_0x1e17d50; -L_0x1e18d70 .concat8 [ 14 1 0 0], LS_0x1e18d70_0_0, LS_0x1e18d70_0_4; -LS_0x1e19280_0_0 .concat8 [ 11 1 1 1], v0x1dff230_3, L_0x1e189b0, L_0x1e18870, L_0x1e18430; -LS_0x1e19280_0_4 .concat8 [ 1 0 0 0], L_0x1e18030; -L_0x1e19280 .concat8 [ 14 1 0 0], LS_0x1e19280_0_0, LS_0x1e19280_0_4; -LS_0x1e18fc0_0_0 .concat8 [ 11 1 1 1], v0x1dff230_0, L_0x1e18730, L_0x1e18310, L_0x1e17f30; -LS_0x1e18fc0_0_4 .concat8 [ 1 0 0 0], L_0x1e17b30; -L_0x1e18fc0 .concat8 [ 14 1 0 0], LS_0x1e18fc0_0_0, LS_0x1e18fc0_0_4; -LS_0x1e197f0_0_0 .concat8 [ 11 1 1 1], v0x1dff230_1, L_0x1e18a60, L_0x1e18690, L_0x1e18270; -LS_0x1e197f0_0_4 .concat8 [ 1 0 0 0], L_0x1e17e40; -L_0x1e197f0 .concat8 [ 14 1 0 0], LS_0x1e197f0_0_0, LS_0x1e197f0_0_4; -L_0x1e19520 .part L_0x1e16b60, 14, 4; -L_0x1e19c00 .part L_0x1e16b60, 11, 3; -L_0x1e19a10 .part L_0x1e16b60, 8, 3; -L_0x1e19e50 .part L_0x1e16b60, 10, 4; -L_0x1e19ca0 .part L_0x1e16b60, 0, 11; - .scope S_0x1c89a30; +P_0x2344230 .param/l "debug" 0 4 61, +C4<00000000000000000000000000000000>; +P_0x2344270 .param/str "memFile" 0 4 60, "demo/two.dat"; +L_0x235e510 .functor BUFZ 11, v0x2344500_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x235e710 .functor BUFZ 11, v0x2344500_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x235f5c0 .functor BUFZ 18, L_0x2361560, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2344500_0 .var/s "ACC", 10 0; +v0x2344600_0 .var/s "BAK", 10 0; +v0x23446e0_0 .net "DST", 2 0, L_0x23626a0; 1 drivers +v0x23447a0_0 .net/s "IMM", 10 0, L_0x2362740; 1 drivers +v0x2344880_0 .net "INST", 3 0, L_0x2361f80; 1 drivers +v0x23449b0_0 .net "LABEL", 3 0, L_0x23628f0; 1 drivers +v0x2344a90_0 .var "PC", 3 0; +v0x2344b70_0 .var "PCNEXT", 3 0; +v0x2344c50_0 .net "SRC", 2 0, L_0x23624b0; 1 drivers +v0x2344dc0_0 .net *"_s103", 0 0, L_0x23608a0; 1 drivers +v0x2344ea0_0 .net *"_s107", 0 0, L_0x23607b0; 1 drivers +v0x2344f80_0 .net *"_s111", 0 0, L_0x2360a90; 1 drivers +v0x2345060_0 .net *"_s115", 0 0, L_0x2360990; 1 drivers +v0x2345140_0 .net *"_s119", 0 0, L_0x2360cd0; 1 drivers +v0x2345220_0 .net *"_s123", 0 0, L_0x2360bc0; 1 drivers +v0x2345300_0 .net *"_s127", 0 0, L_0x2360e90; 1 drivers +v0x23453e0_0 .net *"_s131", 0 0, L_0x2360d70; 1 drivers +v0x2345590_0 .net *"_s135", 0 0, L_0x23610f0; 1 drivers +v0x2345630_0 .net *"_s139", 0 0, L_0x2360fc0; 1 drivers +v0x2345710_0 .net *"_s143", 0 0, L_0x23612d0; 1 drivers +v0x23457f0_0 .net *"_s147", 0 0, L_0x2361190; 1 drivers +v0x23458d0_0 .net *"_s151", 0 0, L_0x23614c0; 1 drivers +v0x23459b0_0 .net *"_s155", 0 0, L_0x2361370; 1 drivers +v0x2345a90_0 .net *"_s159", 0 0, L_0x2361410; 1 drivers +v0x2345b70_0 .net *"_s160", 17 0, L_0x2361560; 1 drivers +v0x2345c50_0 .net *"_s162", 5 0, L_0x23618c0; 1 drivers +L_0x2b7d4c4d50f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2345d30_0 .net *"_s165", 1 0, L_0x2b7d4c4d50f0; 1 drivers +v0x2347cf0_2 .array/port v0x2347cf0, 2; +v0x2345e10_0 .net *"_s173", 10 0, v0x2347cf0_2; 1 drivers +v0x2347cf0_3 .array/port v0x2347cf0, 3; +v0x2345ef0_0 .net *"_s179", 10 0, v0x2347cf0_3; 1 drivers +v0x2347cf0_0 .array/port v0x2347cf0, 0; +v0x2345fd0_0 .net *"_s185", 10 0, v0x2347cf0_0; 1 drivers +v0x2347cf0_1 .array/port v0x2347cf0, 1; +v0x23460b0_0 .net *"_s191", 10 0, v0x2347cf0_1; 1 drivers +v0x2346190_0 .net *"_s23", 0 0, L_0x235ed80; 1 drivers +v0x2346270_0 .net *"_s27", 0 0, L_0x235eea0; 1 drivers +v0x23454c0_0 .net *"_s31", 0 0, L_0x235ef90; 1 drivers +v0x2346540_0 .net *"_s36", 0 0, L_0x235f260; 1 drivers +v0x2346620_0 .net *"_s42", 0 0, L_0x235f480; 1 drivers +v0x2346700_0 .net *"_s46", 0 0, L_0x235f520; 1 drivers +v0x23467e0_0 .net *"_s50", 0 0, L_0x235f630; 1 drivers +v0x23468c0_0 .net *"_s55", 0 0, L_0x235f870; 1 drivers +v0x23469a0_0 .net *"_s61", 0 0, L_0x235fae0; 1 drivers +v0x2346a80_0 .net *"_s65", 0 0, L_0x235fc10; 1 drivers +v0x2346b60_0 .net *"_s69", 0 0, L_0x235fde0; 1 drivers +v0x2346c40_0 .net *"_s74", 0 0, L_0x235fd40; 1 drivers +v0x2346d20_0 .net *"_s80", 0 0, L_0x235ff80; 1 drivers +v0x2346e00_0 .net *"_s84", 0 0, L_0x2360230; 1 drivers +v0x2346ee0_0 .net *"_s88", 0 0, L_0x2360170; 1 drivers +v0x2346fc0_0 .net *"_s93", 0 0, L_0x23602d0; 1 drivers +v0x23470a0_0 .net *"_s99", 0 0, L_0x2360590; 1 drivers +v0x2347180_0 .net/s "accOut", 10 0, L_0x235e510; 1 drivers +v0x2347260_0 .net "anyHasData", 0 0, L_0x235f3e0; 1 drivers +v0x2347320_0 .net "anyReadAck", 0 0, L_0x2360080; 1 drivers +v0x23473e0_0 .net "anyWantData", 0 0, L_0x235f960; 1 drivers +v0x23474a0_0 .net "anyWriteAck", 0 0, L_0x23606c0; 1 drivers +v0x2347560_0 .net "clk", 0 0, v0x2349280_0; alias, 1 drivers +v0x2347710_0 .net "down", 14 0, L_0x236dbd0; alias, 1 drivers +v0x23477b0_0 .net "downOut", 14 0, L_0x2361ce0; alias, 1 drivers +v0x2347850_0 .net "instruction", 17 0, L_0x235f5c0; 1 drivers +v0x23478f0 .array "instructions", 15 0, 17 0; +v0x2347990_0 .var "last", 2 0; +o0x2b7d4c4ade58 .functor BUFZ 15, C4; HiZ drive +v0x2347a50_0 .net "left", 14 0, o0x2b7d4c4ade58; 0 drivers +v0x2347b30_0 .net "leftOut", 14 0, L_0x2361a20; 1 drivers +v0x2347c10_0 .var "mode", 2 0; +v0x2347cf0 .array/s "outVals", 2 5, 10 0; +v0x2347e60_0 .var "phase", 2 0; +v0x2347f40_0 .net "portsHaveData", 5 2, L_0x235f080; 1 drivers +v0x2346310_0 .net "portsWantData", 5 2, L_0x235f6d0; 1 drivers +v0x23463f0_0 .net "readAckIn", 5 2, L_0x235fe80; 1 drivers +v0x23483f0_0 .var "readAckOut", 5 2; +v0x2348490_0 .var "readTarget", 2 0; +v0x2348530_0 .var/s "readValue", 10 0; +L_0x2b7d4c4d50a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2348610 .array "regVals", 0 7; +v0x2348610_0 .net/s v0x2348610 0, 10 0, L_0x2b7d4c4d50a8; 1 drivers +v0x2348610_1 .net/s v0x2348610 1, 10 0, L_0x235e710; 1 drivers +v0x2348610_2 .net/s v0x2348610 2, 10 0, L_0x235e780; 1 drivers +v0x2348610_3 .net/s v0x2348610 3, 10 0, L_0x235ea80; 1 drivers +v0x2348610_4 .net/s v0x2348610 4, 10 0, L_0x235eb80; 1 drivers +v0x2348610_5 .net/s v0x2348610 5, 10 0, L_0x235ec80; 1 drivers +o0x2b7d4c4ae218 .functor BUFZ 11, C4; HiZ drive +v0x2348610_6 .net/s v0x2348610 6, 10 0, o0x2b7d4c4ae218; 0 drivers +o0x2b7d4c4ae248 .functor BUFZ 11, C4; HiZ drive +v0x2348610_7 .net/s v0x2348610 7, 10 0, o0x2b7d4c4ae248; 0 drivers +o0x2b7d4c4ae278 .functor BUFZ 15, C4; HiZ drive +v0x2348820_0 .net "right", 14 0, o0x2b7d4c4ae278; 0 drivers +v0x2348900_0 .net "rightOut", 14 0, L_0x2362290; 1 drivers +o0x2b7d4c4ae2d8 .functor BUFZ 15, C4; HiZ drive +v0x23489e0_0 .net "up", 14 0, o0x2b7d4c4ae2d8; 0 drivers +v0x2348ac0_0 .net "upOut", 14 0, L_0x23617d0; 1 drivers +v0x2348ba0_0 .var "weHaveData", 5 2; +v0x2348c80_0 .var "weWantData", 5 2; +v0x2348d60_0 .net "writeAckIn", 5 2, L_0x23603a0; 1 drivers +v0x2348e40_0 .var "writeAckOut", 5 2; +v0x2348f20_0 .var "writeTarget", 2 0; +v0x2349000_0 .var/s "writeValue", 10 0; +L_0x235e780 .part o0x2b7d4c4ade58, 0, 11; +L_0x235ea80 .part o0x2b7d4c4ae278, 0, 11; +L_0x235eb80 .part o0x2b7d4c4ae2d8, 0, 11; +L_0x235ec80 .part L_0x236dbd0, 0, 11; +L_0x235ed80 .part o0x2b7d4c4ade58, 11, 1; +L_0x235eea0 .part o0x2b7d4c4ae278, 11, 1; +L_0x235ef90 .part o0x2b7d4c4ae2d8, 11, 1; +L_0x235f080 .concat8 [ 1 1 1 1], L_0x235ed80, L_0x235eea0, L_0x235ef90, L_0x235f260; +L_0x235f260 .part L_0x236dbd0, 11, 1; +L_0x235f3e0 .reduce/or L_0x235f080; +L_0x235f480 .part o0x2b7d4c4ade58, 12, 1; +L_0x235f520 .part o0x2b7d4c4ae278, 12, 1; +L_0x235f630 .part o0x2b7d4c4ae2d8, 12, 1; +L_0x235f6d0 .concat8 [ 1 1 1 1], L_0x235f480, L_0x235f520, L_0x235f630, L_0x235f870; +L_0x235f870 .part L_0x236dbd0, 12, 1; +L_0x235f960 .reduce/or L_0x235f6d0; +L_0x235fae0 .part o0x2b7d4c4ade58, 13, 1; +L_0x235fc10 .part o0x2b7d4c4ae278, 13, 1; +L_0x235fde0 .part o0x2b7d4c4ae2d8, 13, 1; +L_0x235fe80 .concat8 [ 1 1 1 1], L_0x235fae0, L_0x235fc10, L_0x235fde0, L_0x235fd40; +L_0x235fd40 .part L_0x236dbd0, 13, 1; +L_0x2360080 .reduce/or L_0x235fe80; +L_0x235ff80 .part o0x2b7d4c4ade58, 14, 1; +L_0x2360230 .part o0x2b7d4c4ae278, 14, 1; +L_0x2360170 .part o0x2b7d4c4ae2d8, 14, 1; +L_0x23603a0 .concat8 [ 1 1 1 1], L_0x235ff80, L_0x2360230, L_0x2360170, L_0x23602d0; +L_0x23602d0 .part L_0x236dbd0, 14, 1; +L_0x23606c0 .reduce/or L_0x23603a0; +L_0x2360590 .part v0x23483f0_0, 0, 1; +L_0x23608a0 .part v0x23483f0_0, 1, 1; +L_0x23607b0 .part v0x23483f0_0, 2, 1; +L_0x2360a90 .part v0x23483f0_0, 3, 1; +L_0x2360990 .part v0x2348e40_0, 0, 1; +L_0x2360cd0 .part v0x2348e40_0, 1, 1; +L_0x2360bc0 .part v0x2348e40_0, 2, 1; +L_0x2360e90 .part v0x2348e40_0, 3, 1; +L_0x2360d70 .part v0x2348c80_0, 0, 1; +L_0x23610f0 .part v0x2348c80_0, 1, 1; +L_0x2360fc0 .part v0x2348c80_0, 2, 1; +L_0x23612d0 .part v0x2348c80_0, 3, 1; +L_0x2361190 .part v0x2348ba0_0, 0, 1; +L_0x23614c0 .part v0x2348ba0_0, 1, 1; +L_0x2361370 .part v0x2348ba0_0, 2, 1; +L_0x2361410 .part v0x2348ba0_0, 3, 1; +L_0x2361560 .array/port v0x23478f0, L_0x23618c0; +L_0x23618c0 .concat [ 4 2 0 0], v0x2344a90_0, L_0x2b7d4c4d50f0; +LS_0x23617d0_0_0 .concat8 [ 11 1 1 1], v0x2347cf0_2, L_0x2361370, L_0x2360fc0, L_0x2360bc0; +LS_0x23617d0_0_4 .concat8 [ 1 0 0 0], L_0x23607b0; +L_0x23617d0 .concat8 [ 14 1 0 0], LS_0x23617d0_0_0, LS_0x23617d0_0_4; +LS_0x2361ce0_0_0 .concat8 [ 11 1 1 1], v0x2347cf0_3, L_0x2361410, L_0x23612d0, L_0x2360e90; +LS_0x2361ce0_0_4 .concat8 [ 1 0 0 0], L_0x2360a90; +L_0x2361ce0 .concat8 [ 14 1 0 0], LS_0x2361ce0_0_0, LS_0x2361ce0_0_4; +LS_0x2361a20_0_0 .concat8 [ 11 1 1 1], v0x2347cf0_0, L_0x2361190, L_0x2360d70, L_0x2360990; +LS_0x2361a20_0_4 .concat8 [ 1 0 0 0], L_0x2360590; +L_0x2361a20 .concat8 [ 14 1 0 0], LS_0x2361a20_0_0, LS_0x2361a20_0_4; +LS_0x2362290_0_0 .concat8 [ 11 1 1 1], v0x2347cf0_1, L_0x23614c0, L_0x23610f0, L_0x2360cd0; +LS_0x2362290_0_4 .concat8 [ 1 0 0 0], L_0x23608a0; +L_0x2362290 .concat8 [ 14 1 0 0], LS_0x2362290_0_0, LS_0x2362290_0_4; +L_0x2361f80 .part L_0x235f5c0, 14, 4; +L_0x23626a0 .part L_0x235f5c0, 11, 3; +L_0x23624b0 .part L_0x235f5c0, 8, 3; +L_0x23628f0 .part L_0x235f5c0, 10, 4; +L_0x2362740 .part L_0x235f5c0, 0, 11; + .scope S_0x21d2520; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dd2190_0, 0, 3; + %store/vec4 v0x231ac50_0, 0, 3; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd2270_0, 0, 4; + %store/vec4 v0x231ad30_0, 0, 4; %pushi/vec4 0, 0, 15; - %store/vec4 v0x1dd20b0_0, 0, 15; + %store/vec4 v0x231ab70_0, 0, 15; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmp/u; %jmp/0xz T_0.0, 5; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1dd1fa0, 4; + %load/vec4a v0x231aa60, 4; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1dd20b0_0, 4, 11; + %store/vec4 v0x231ab70_0, 4, 11; T_0.0 ; %end; .thread T_0; - .scope S_0x1c89a30; + .scope S_0x21d2520; T_1 ; - %wait E_0x1d39760; - %load/vec4 v0x1dd2270_0; + %wait E_0x2282200; + %load/vec4 v0x231ad30_0; %subi 1, 0, 4; - %store/vec4 v0x1dd2270_0, 0, 4; + %store/vec4 v0x231ad30_0, 0, 4; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmp/u; %jmp/0xz T_1.0, 5; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1dd1fa0, 4; + %load/vec4a v0x231aa60, 4; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1dd20b0_0, 4, 11; + %store/vec4 v0x231ab70_0, 4, 11; T_1.0 ; %jmp T_1; .thread T_1; - .scope S_0x1c89a30; + .scope S_0x21d2520; T_2 ; - %wait E_0x1cb1f20; - %load/vec4 v0x1dd2270_0; + %wait E_0x21faa10; + %load/vec4 v0x231ad30_0; %subi 1, 0, 4; - %store/vec4 v0x1dd2270_0, 0, 4; + %store/vec4 v0x231ad30_0, 0, 4; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmp/u; %jmp/0xz T_2.0, 5; @@ -1729,30 +1729,30 @@ T_2 ; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; - %load/vec4 v0x1dd2270_0; + %assign/vec4/off/d v0x231ab70_0, 4, 5; + %load/vec4 v0x231ad30_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1dd1fa0, 4; + %load/vec4a v0x231aa60, 4; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; %jmp T_2.1; T_2.0 ; %pushi/vec4 0, 0, 1; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; T_2.1 ; %jmp T_2; .thread T_2; - .scope S_0x1c89a30; + .scope S_0x21d2520; T_3 ; - %wait E_0x1cbd520; - %load/vec4 v0x1dd2270_0; + %wait E_0x2206010; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmpi/u 15, 0, 32; %jmp/0xz T_3.0, 5; @@ -1760,17 +1760,17 @@ T_3 ; %ix/load 4, 12, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; %jmp T_3.1; T_3.0 ; %pushi/vec4 0, 0, 1; %ix/load 4, 12, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; T_3.1 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmp/u; %jmp/0xz T_3.2, 5; @@ -1778,21 +1778,21 @@ T_3.1 ; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; %jmp T_3.3; T_3.2 ; %pushi/vec4 0, 0, 1; %ix/load 4, 11, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; T_3.3 ; %jmp T_3; .thread T_3, $push; - .scope S_0x1c89a30; + .scope S_0x21d2520; T_4 ; - %wait E_0x1cc17e0; - %load/vec4 v0x1dd2190_0; + %wait E_0x220a2b0; + %load/vec4 v0x231ac50_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1807,30 +1807,29 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x1dd1ec0_0; + %load/vec4 v0x231a980_0; %parti/s 1, 11, 5; %flag_set/vec4 8; %jmp/0xz T_4.4, 8; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmpi/u 15, 0, 32; %jmp/0xz T_4.6, 5; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %addi 1, 0, 4; - %store/vec4 v0x1dd2270_0, 0, 4; - %load/vec4 v0x1dd1ec0_0; + %store/vec4 v0x231ad30_0, 0, 4; + %load/vec4 v0x231a980_0; %parti/s 11, 0, 2; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %store/vec4a v0x1dd1fa0, 4, 0; - %vpi_call 2 72 "$display", "%b", &PV {0 0 0}; + %store/vec4a v0x231aa60, 4, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 13, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; T_4.6 ; T_4.4 ; %jmp T_4.3; @@ -1838,31 +1837,31 @@ T_4.1 ; %jmp T_4.3; T_4.2 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 32; %cmp/u; %jmp/0xz T_4.8, 5; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %pad/u 6; %subi 1, 0, 6; %ix/vec4 4; - %load/vec4a v0x1dd1fa0, 4; + %load/vec4a v0x231aa60, 4; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; - %load/vec4 v0x1dd1ec0_0; + %assign/vec4/off/d v0x231ab70_0, 4, 5; + %load/vec4 v0x231a980_0; %parti/s 1, 12, 5; %flag_set/vec4 8; %jmp/0xz T_4.10, 8; - %load/vec4 v0x1dd2270_0; + %load/vec4 v0x231ad30_0; %subi 1, 0, 4; - %store/vec4 v0x1dd2270_0, 0, 4; + %store/vec4 v0x231ad30_0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 4, 14, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd20b0_0, 4, 5; + %assign/vec4/off/d v0x231ab70_0, 4, 5; T_4.10 ; T_4.8 ; %jmp T_4.3; @@ -1870,75 +1869,75 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x1c89a30; + .scope S_0x21d2520; T_5 ; - %wait E_0x1c95390; - %load/vec4 v0x1dd2190_0; + %wait E_0x21dde80; + %load/vec4 v0x231ac50_0; %cmpi/e 2, 0, 3; %jmp/0xz T_5.0, 4; %pushi/vec4 0, 0, 1; %ix/load 4, 13, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1dd20b0_0, 4, 1; + %store/vec4 v0x231ab70_0, 4, 1; %pushi/vec4 0, 0, 1; %ix/load 4, 14, 0; %flag_set/imm 4, 0; - %store/vec4 v0x1dd20b0_0, 4, 1; + %store/vec4 v0x231ab70_0, 4, 1; T_5.0 ; - %load/vec4 v0x1dd2190_0; + %load/vec4 v0x231ac50_0; %pad/u 32; %addi 1, 0, 32; %pushi/vec4 3, 0, 32; %mod; %pad/u 3; - %store/vec4 v0x1dd2190_0, 0, 3; + %store/vec4 v0x231ac50_0, 0, 3; %jmp T_5; .thread T_5; - .scope S_0x1de1b20; + .scope S_0x232a5e0; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1de5630_0, 0, 3; + %store/vec4 v0x232e130_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1de5880_0, 0, 3; + %store/vec4 v0x232e380_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1de5390_0, 0, 3; + %store/vec4 v0x232de90_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1de2010_0, 0, 11; + %store/vec4 v0x232aad0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1de2110_0, 0, 11; + %store/vec4 v0x232abd0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de25a0_0, 0, 4; + %store/vec4 v0x232b020_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de5e10_0, 0, 4; + %store/vec4 v0x232e910_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de6700_0, 0, 4; + %store/vec4 v0x232f1c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de68c0_0, 0, 4; + %store/vec4 v0x232f380_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de6640_0, 0, 4; + %store/vec4 v0x232f100_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de5710, 4, 0; + %store/vec4a v0x232e210, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de5710, 4, 0; + %store/vec4a v0x232e210, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de5710, 4, 0; + %store/vec4a v0x232e210, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de5710, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1de1d30, v0x1de52d0 {0 0 0}; + %store/vec4a v0x232e210, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x232a7f0, v0x232ddd0 {0 0 0}; %end; .thread T_6; - .scope S_0x1de1b20; + .scope S_0x232a5e0; T_7 ; - %wait E_0x1dd2930; - %load/vec4 v0x1de5630_0; + %wait E_0x231b3f0; + %load/vec4 v0x232e130_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1953,7 +1952,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x1de5880_0; + %load/vec4 v0x232e380_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1968,185 +1967,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x1de2390_0; + %load/vec4 v0x232ae50_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x1de5960_0; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232e460_0; + %load/vec4 v0x232b180_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; - %load/vec4 v0x1de2760_0; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4/off/d v0x232e910_0, 4, 5; + %load/vec4 v0x232b180_0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de5630_0, 0; - %load/vec4 v0x1de2760_0; - %assign/vec4 v0x1de5ef0_0, 0; + %assign/vec4 v0x232e130_0, 0; + %load/vec4 v0x232b180_0; + %assign/vec4 v0x232e9b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de6700_0, 4, 5; - %load/vec4 v0x1de2760_0; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; + %load/vec4 v0x232b180_0; + %assign/vec4 v0x232de90_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x1de5960_0; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232e460_0; + %load/vec4 v0x232de90_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de5630_0, 0; - %load/vec4 v0x1de5390_0; - %assign/vec4 v0x1de5ef0_0, 0; + %assign/vec4 v0x232e130_0, 0; + %load/vec4 v0x232de90_0; + %assign/vec4 v0x232e9b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de6700_0, 4, 5; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x1de2760_0; + %load/vec4 v0x232b180_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x1de4c90_0; + %load/vec4 v0x232d790_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -2154,29 +2153,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de5630_0, 0; - %load/vec4 v0x1de2760_0; - %assign/vec4 v0x1de5ef0_0, 0; + %assign/vec4 v0x232e130_0, 0; + %load/vec4 v0x232b180_0; + %assign/vec4 v0x232e9b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6700_0, 4, 5; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6700_0, 4, 5; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6700_0, 4, 5; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6700_0, 4, 5; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -2184,10 +2183,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x1de2390_0; + %load/vec4 v0x232ae50_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2254,180 +2253,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x1de2010_0; - %load/vec4 v0x1de5fd0_0; + %load/vec4 v0x232aad0_0; + %load/vec4 v0x232ea90_0; %add; - %assign/vec4 v0x1de2010_0, 0; - %load/vec4 v0x1de25a0_0; + %assign/vec4 v0x232aad0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x1de2010_0; - %load/vec4 v0x1de5fd0_0; + %load/vec4 v0x232aad0_0; + %load/vec4 v0x232ea90_0; %sub; - %assign/vec4 v0x1de2010_0, 0; - %load/vec4 v0x1de25a0_0; + %assign/vec4 v0x232aad0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232b020_0; %pad/u 11; - %load/vec4 v0x1de5fd0_0; + %load/vec4 v0x232ea90_0; %add; %pad/u 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x1de5fd0_0; - %assign/vec4 v0x1de6a80_0, 0; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232ea90_0; + %assign/vec4 v0x232f540_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x1de22b0_0; - %assign/vec4 v0x1de6a80_0, 0; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232ad70_0; + %assign/vec4 v0x232f540_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x1de2010_0; - %load/vec4 v0x1de22b0_0; + %load/vec4 v0x232aad0_0; + %load/vec4 v0x232ad70_0; %add; - %assign/vec4 v0x1de2010_0, 0; - %load/vec4 v0x1de25a0_0; + %assign/vec4 v0x232aad0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x1de2010_0; - %load/vec4 v0x1de22b0_0; + %load/vec4 v0x232aad0_0; + %load/vec4 v0x232ad70_0; %sub; - %assign/vec4 v0x1de2010_0, 0; - %load/vec4 v0x1de25a0_0; + %assign/vec4 v0x232aad0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232b020_0; %pad/u 11; - %load/vec4 v0x1de22b0_0; + %load/vec4 v0x232ad70_0; %add; %pad/u 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x1de2110_0; - %assign/vec4 v0x1de2010_0, 0; - %load/vec4 v0x1de2010_0; - %assign/vec4 v0x1de2110_0, 0; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232abd0_0; + %assign/vec4 v0x232aad0_0, 0; + %load/vec4 v0x232aad0_0; + %assign/vec4 v0x232abd0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x1de2010_0; - %assign/vec4 v0x1de2110_0, 0; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232aad0_0; + %assign/vec4 v0x232abd0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x1de2010_0; + %load/vec4 v0x232aad0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1de2010_0, 0; - %load/vec4 v0x1de25a0_0; + %assign/vec4 v0x232aad0_0, 0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x1de24c0_0; - %assign/vec4 v0x1de2680_0, 0; + %load/vec4 v0x232af80_0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x1de2010_0; + %load/vec4 v0x232aad0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x1de24c0_0; - %assign/vec4 v0x1de2680_0, 0; + %load/vec4 v0x232af80_0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x1de2010_0; + %load/vec4 v0x232aad0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x1de24c0_0; - %assign/vec4 v0x1de2680_0, 0; + %load/vec4 v0x232af80_0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1de2010_0; + %load/vec4 v0x232aad0_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x1de24c0_0; - %assign/vec4 v0x1de2680_0, 0; + %load/vec4 v0x232af80_0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x1de2010_0; + %load/vec4 v0x232aad0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x1de24c0_0; - %assign/vec4 v0x1de2680_0, 0; + %load/vec4 v0x232af80_0; + %assign/vec4 v0x232b0c0_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x1de25a0_0; + %load/vec4 v0x232b020_0; %addi 1, 0, 4; - %assign/vec4 v0x1de2680_0, 0; + %assign/vec4 v0x232b0c0_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x1de2390_0; + %load/vec4 v0x232ae50_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1de2390_0; + %load/vec4 v0x232ae50_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x1de21f0_0; + %load/vec4 v0x232acb0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1de21f0_0; + %load/vec4 v0x232acb0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2435,162 +2434,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x1de21f0_0; + %load/vec4 v0x232acb0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x1de6a80_0; - %assign/vec4 v0x1de2010_0, 0; + %load/vec4 v0x232f540_0; + %assign/vec4 v0x232aad0_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5630_0, 0; - %load/vec4 v0x1de21f0_0; + %assign/vec4 v0x232e130_0, 0; + %load/vec4 v0x232acb0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x1de5390_0; - %assign/vec4 v0x1de69a0_0, 0; - %load/vec4 v0x1de6a80_0; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; + %assign/vec4 v0x232f460_0, 0; + %load/vec4 v0x232f540_0; + %load/vec4 v0x232de90_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de5390_0; + %load/vec4 v0x232de90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de6640_0, 4, 5; + %assign/vec4/off/d v0x232f100_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x1de21f0_0; + %load/vec4 v0x232acb0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x1de21f0_0; - %assign/vec4 v0x1de69a0_0, 0; - %load/vec4 v0x1de6a80_0; - %load/vec4 v0x1de21f0_0; + %load/vec4 v0x232acb0_0; + %assign/vec4 v0x232f460_0, 0; + %load/vec4 v0x232f540_0; + %load/vec4 v0x232acb0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de21f0_0; + %load/vec4 v0x232acb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de21f0_0; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232acb0_0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x1de4e10_0; + %load/vec4 v0x232d910_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x1de21f0_0; - %assign/vec4 v0x1de69a0_0, 0; + %load/vec4 v0x232acb0_0; + %assign/vec4 v0x232f460_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x1de5880_0; + %load/vec4 v0x232e380_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2605,82 +2604,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x1de5ef0_0; + %load/vec4 v0x232e9b0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x1de4c90_0; + %load/vec4 v0x232d790_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de5630_0, 0; + %assign/vec4 v0x232e130_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de6700_0, 0, 4; - %load/vec4 v0x1de5960_0; + %store/vec4 v0x232f1c0_0, 0, 4; + %load/vec4 v0x232e460_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x1de5960_0; + %load/vec4 v0x232e460_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -2688,54 +2687,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x1de5960_0; - %load/vec4 v0x1de5ef0_0; + %load/vec4 v0x232e460_0; + %load/vec4 v0x232e9b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de5630_0, 0; - %load/vec4 v0x1de5ef0_0; + %assign/vec4 v0x232e130_0, 0; + %load/vec4 v0x232e9b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de60b0, 4; - %assign/vec4 v0x1de5fd0_0, 0; + %load/vec4a v0x232eb70, 4; + %assign/vec4 v0x232ea90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de5ef0_0; + %load/vec4 v0x232e9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de5e10_0, 4, 5; + %assign/vec4/off/d v0x232e910_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de5ef0_0; + %load/vec4 v0x232e9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de6700_0, 4, 5; - %load/vec4 v0x1de5ef0_0; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4/off/d v0x232f1c0_0, 4, 5; + %load/vec4 v0x232e9b0_0; + %assign/vec4 v0x232de90_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x1de5880_0; + %load/vec4 v0x232e380_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2751,93 +2750,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x1de69a0_0; + %load/vec4 v0x232f460_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x1de4e10_0; + %load/vec4 v0x232d910_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x1de3d80_0; + %load/vec4 v0x232c840_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de69a0_0, 0; + %assign/vec4 v0x232f460_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de6640_0, 4, 5; - %load/vec4 v0x1de6a80_0; + %assign/vec4/off/d v0x232f100_0, 4, 5; + %load/vec4 v0x232f540_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de5710, 0, 4; + %assign/vec4/a/d v0x232e210, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232de90_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -2845,33 +2844,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x1de69a0_0; + %load/vec4 v0x232f460_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x1de67e0_0; - %load/vec4 v0x1de69a0_0; + %load/vec4 v0x232f2a0_0; + %load/vec4 v0x232f460_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1de69a0_0; + %load/vec4 v0x232f460_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1de6640_0, 4, 1; + %store/vec4 v0x232f100_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de5630_0, 0; - %load/vec4 v0x1de69a0_0; - %assign/vec4 v0x1de5390_0, 0; + %assign/vec4 v0x232e130_0, 0; + %load/vec4 v0x232f460_0; + %assign/vec4 v0x232de90_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de5880_0, 0; + %assign/vec4 v0x232e380_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -2880,19 +2879,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x1de1b20; + .scope S_0x232a5e0; T_8 ; - %wait E_0x1dd2730; - %load/vec4 v0x1de5880_0; + %wait E_0x231b1f0; + %load/vec4 v0x232e380_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1de5630_0; + %load/vec4 v0x232e130_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1de2680_0; + %load/vec4 v0x232b0c0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2901,62 +2900,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x1de2680_0; - %assign/vec4 v0x1de25a0_0, 0; + %load/vec4 v0x232b0c0_0; + %assign/vec4 v0x232b020_0, 0; T_8.0 ; - %load/vec4 v0x1de5880_0; + %load/vec4 v0x232e380_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de5e10_0, 0, 4; + %store/vec4 v0x232e910_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x1dfb510; + .scope S_0x2343fd0; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dff150_0, 0, 3; + %store/vec4 v0x2347c10_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dff3a0_0, 0, 3; + %store/vec4 v0x2347e60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dfeed0_0, 0, 3; + %store/vec4 v0x2347990_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dfba40_0, 0, 11; + %store/vec4 v0x2344500_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dfbb40_0, 0, 11; + %store/vec4 v0x2344600_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfbfd0_0, 0, 4; + %store/vec4 v0x2344a90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dff930_0, 0, 4; + %store/vec4 v0x23483f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e001c0_0, 0, 4; + %store/vec4 v0x2348c80_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e00380_0, 0, 4; + %store/vec4 v0x2348e40_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e000e0_0, 0, 4; + %store/vec4 v0x2348ba0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dff230, 4, 0; + %store/vec4a v0x2347cf0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dff230, 4, 0; + %store/vec4a v0x2347cf0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dff230, 4, 0; + %store/vec4a v0x2347cf0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dff230, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1dfb7b0, v0x1dfee30 {0 0 0}; + %store/vec4a v0x2347cf0, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x2344270, v0x23478f0 {0 0 0}; %end; .thread T_9; - .scope S_0x1dfb510; + .scope S_0x2343fd0; T_10 ; - %wait E_0x1dd2930; - %load/vec4 v0x1dff150_0; + %wait E_0x231b3f0; + %load/vec4 v0x2347c10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2971,7 +2970,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x1dff3a0_0; + %load/vec4 v0x2347e60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2986,185 +2985,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x1dfbdc0_0; + %load/vec4 v0x2344880_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x1dff480_0; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2347f40_0; + %load/vec4 v0x2344c50_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dff930_0, 4, 5; - %load/vec4 v0x1dfc190_0; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4/off/d v0x23483f0_0, 4, 5; + %load/vec4 v0x2344c50_0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dff150_0, 0; - %load/vec4 v0x1dfc190_0; - %assign/vec4 v0x1dff9d0_0, 0; + %assign/vec4 v0x2347c10_0, 0; + %load/vec4 v0x2344c50_0; + %assign/vec4 v0x2348490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; - %load/vec4 v0x1dfc190_0; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4/off/d v0x2348c80_0, 4, 5; + %load/vec4 v0x2344c50_0; + %assign/vec4 v0x2347990_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x1dff480_0; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347f40_0; + %load/vec4 v0x2347990_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dff150_0, 0; - %load/vec4 v0x1dfeed0_0; - %assign/vec4 v0x1dff9d0_0, 0; + %assign/vec4 v0x2347c10_0, 0; + %load/vec4 v0x2347990_0; + %assign/vec4 v0x2348490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %assign/vec4/off/d v0x2348c80_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x1dfc190_0; + %load/vec4 v0x2344c50_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x1dfe7a0_0; + %load/vec4 v0x2347260_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -3172,29 +3171,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dff150_0, 0; - %load/vec4 v0x1dfc190_0; - %assign/vec4 v0x1dff9d0_0, 0; + %assign/vec4 v0x2347c10_0, 0; + %load/vec4 v0x2344c50_0; + %assign/vec4 v0x2348490_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %assign/vec4/off/d v0x2348c80_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %assign/vec4/off/d v0x2348c80_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %assign/vec4/off/d v0x2348c80_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; + %assign/vec4/off/d v0x2348c80_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -3202,10 +3201,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x1dfbdc0_0; + %load/vec4 v0x2344880_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3272,180 +3271,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x1dfba40_0; - %load/vec4 v0x1dffa70_0; + %load/vec4 v0x2344500_0; + %load/vec4 v0x2348530_0; %add; - %assign/vec4 v0x1dfba40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %assign/vec4 v0x2344500_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x1dfba40_0; - %load/vec4 v0x1dffa70_0; + %load/vec4 v0x2344500_0; + %load/vec4 v0x2348530_0; %sub; - %assign/vec4 v0x1dfba40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %assign/vec4 v0x2344500_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344a90_0; %pad/u 11; - %load/vec4 v0x1dffa70_0; + %load/vec4 v0x2348530_0; %add; %pad/u 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x1dffa70_0; - %assign/vec4 v0x1e00540_0, 0; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2348530_0; + %assign/vec4 v0x2349000_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x1dfbce0_0; - %assign/vec4 v0x1e00540_0, 0; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x23447a0_0; + %assign/vec4 v0x2349000_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x1dfba40_0; - %load/vec4 v0x1dfbce0_0; + %load/vec4 v0x2344500_0; + %load/vec4 v0x23447a0_0; %add; - %assign/vec4 v0x1dfba40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %assign/vec4 v0x2344500_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x1dfba40_0; - %load/vec4 v0x1dfbce0_0; + %load/vec4 v0x2344500_0; + %load/vec4 v0x23447a0_0; %sub; - %assign/vec4 v0x1dfba40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %assign/vec4 v0x2344500_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344a90_0; %pad/u 11; - %load/vec4 v0x1dfbce0_0; + %load/vec4 v0x23447a0_0; %add; %pad/u 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x1dfbb40_0; - %assign/vec4 v0x1dfba40_0, 0; - %load/vec4 v0x1dfba40_0; - %assign/vec4 v0x1dfbb40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344600_0; + %assign/vec4 v0x2344500_0, 0; + %load/vec4 v0x2344500_0; + %assign/vec4 v0x2344600_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x1dfba40_0; - %assign/vec4 v0x1dfbb40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344500_0; + %assign/vec4 v0x2344600_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x1dfba40_0; + %load/vec4 v0x2344500_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1dfba40_0, 0; - %load/vec4 v0x1dfbfd0_0; + %assign/vec4 v0x2344500_0, 0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x1dfbef0_0; - %assign/vec4 v0x1dfc0b0_0, 0; + %load/vec4 v0x23449b0_0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x1dfba40_0; + %load/vec4 v0x2344500_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x1dfbef0_0; - %assign/vec4 v0x1dfc0b0_0, 0; + %load/vec4 v0x23449b0_0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x1dfba40_0; + %load/vec4 v0x2344500_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x1dfbef0_0; - %assign/vec4 v0x1dfc0b0_0, 0; + %load/vec4 v0x23449b0_0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dfba40_0; + %load/vec4 v0x2344500_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x1dfbef0_0; - %assign/vec4 v0x1dfc0b0_0, 0; + %load/vec4 v0x23449b0_0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x1dfba40_0; + %load/vec4 v0x2344500_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x1dfbef0_0; - %assign/vec4 v0x1dfc0b0_0, 0; + %load/vec4 v0x23449b0_0; + %assign/vec4 v0x2344b70_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x1dfbfd0_0; + %load/vec4 v0x2344a90_0; %addi 1, 0, 4; - %assign/vec4 v0x1dfc0b0_0, 0; + %assign/vec4 v0x2344b70_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x1dfbdc0_0; + %load/vec4 v0x2344880_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1dfbdc0_0; + %load/vec4 v0x2344880_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x1dfbc20_0; + %load/vec4 v0x23446e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1dfbc20_0; + %load/vec4 v0x23446e0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3453,162 +3452,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x1dfbc20_0; + %load/vec4 v0x23446e0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x1e00540_0; - %assign/vec4 v0x1dfba40_0, 0; + %load/vec4 v0x2349000_0; + %assign/vec4 v0x2344500_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dff150_0, 0; - %load/vec4 v0x1dfbc20_0; + %assign/vec4 v0x2347c10_0, 0; + %load/vec4 v0x23446e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x1dfeed0_0; - %assign/vec4 v0x1e00460_0, 0; - %load/vec4 v0x1e00540_0; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; + %assign/vec4 v0x2348f20_0, 0; + %load/vec4 v0x2349000_0; + %load/vec4 v0x2347990_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfeed0_0; + %load/vec4 v0x2347990_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x1dfbc20_0; + %load/vec4 v0x23446e0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x1dfbc20_0; - %assign/vec4 v0x1e00460_0, 0; - %load/vec4 v0x1e00540_0; - %load/vec4 v0x1dfbc20_0; + %load/vec4 v0x23446e0_0; + %assign/vec4 v0x2348f20_0, 0; + %load/vec4 v0x2349000_0; + %load/vec4 v0x23446e0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfbc20_0; + %load/vec4 v0x23446e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1dfbc20_0; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x23446e0_0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x1dfe920_0; + %load/vec4 v0x23473e0_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x1dfbc20_0; - %assign/vec4 v0x1e00460_0, 0; + %load/vec4 v0x23446e0_0; + %assign/vec4 v0x2348f20_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x1dff3a0_0; + %load/vec4 v0x2347e60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3623,82 +3622,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x1dff9d0_0; + %load/vec4 v0x2348490_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x1dfe7a0_0; + %load/vec4 v0x2347260_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dff150_0, 0; + %assign/vec4 v0x2347c10_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1e001c0_0, 0, 4; - %load/vec4 v0x1dff480_0; + %store/vec4 v0x2348c80_0, 0, 4; + %load/vec4 v0x2347f40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x1dff480_0; + %load/vec4 v0x2347f40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -3706,54 +3705,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x1dff480_0; - %load/vec4 v0x1dff9d0_0; + %load/vec4 v0x2347f40_0; + %load/vec4 v0x2348490_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dff150_0, 0; - %load/vec4 v0x1dff9d0_0; + %assign/vec4 v0x2347c10_0, 0; + %load/vec4 v0x2348490_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dffb50, 4; - %assign/vec4 v0x1dffa70_0, 0; + %load/vec4a v0x2348610, 4; + %assign/vec4 v0x2348530_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dff9d0_0; + %load/vec4 v0x2348490_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dff930_0, 4, 5; + %assign/vec4/off/d v0x23483f0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dff9d0_0; + %load/vec4 v0x2348490_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1e001c0_0, 4, 5; - %load/vec4 v0x1dff9d0_0; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4/off/d v0x2348c80_0, 4, 5; + %load/vec4 v0x2348490_0; + %assign/vec4 v0x2347990_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x1dff3a0_0; + %load/vec4 v0x2347e60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3769,93 +3768,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x1e00460_0; + %load/vec4 v0x2348f20_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x1dfe920_0; + %load/vec4 v0x23473e0_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x1dfd850_0; + %load/vec4 v0x2346310_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1e00460_0, 0; + %assign/vec4 v0x2348f20_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1e000e0_0, 4, 5; - %load/vec4 v0x1e00540_0; + %assign/vec4/off/d v0x2348ba0_0, 4, 5; + %load/vec4 v0x2349000_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dff230, 0, 4; + %assign/vec4/a/d v0x2347cf0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347990_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -3863,33 +3862,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x1e00460_0; + %load/vec4 v0x2348f20_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x1e002a0_0; - %load/vec4 v0x1e00460_0; + %load/vec4 v0x2348d60_0; + %load/vec4 v0x2348f20_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1e00460_0; + %load/vec4 v0x2348f20_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1e000e0_0, 4, 1; + %store/vec4 v0x2348ba0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dff150_0, 0; - %load/vec4 v0x1e00460_0; - %assign/vec4 v0x1dfeed0_0, 0; + %assign/vec4 v0x2347c10_0, 0; + %load/vec4 v0x2348f20_0; + %assign/vec4 v0x2347990_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dff3a0_0, 0; + %assign/vec4 v0x2347e60_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -3898,19 +3897,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x1dfb510; + .scope S_0x2343fd0; T_11 ; - %wait E_0x1dd2730; - %load/vec4 v0x1dff3a0_0; + %wait E_0x231b1f0; + %load/vec4 v0x2347e60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1dff150_0; + %load/vec4 v0x2347c10_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1dfc0b0_0; + %load/vec4 v0x2344b70_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3919,62 +3918,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x1dfc0b0_0; - %assign/vec4 v0x1dfbfd0_0, 0; + %load/vec4 v0x2344b70_0; + %assign/vec4 v0x2344a90_0, 0; T_11.0 ; - %load/vec4 v0x1dff3a0_0; + %load/vec4 v0x2347e60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dff930_0, 0, 4; + %store/vec4 v0x23483f0_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x1df6340; + .scope S_0x233ee00; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1df9f30_0, 0, 3; + %store/vec4 v0x23429f0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dfa150_0, 0, 3; + %store/vec4 v0x2342c10_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1df9c90_0, 0, 3; + %store/vec4 v0x2342750_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1df6830_0, 0, 11; + %store/vec4 v0x233f2f0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1df6930_0, 0, 11; + %store/vec4 v0x233f3f0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df6dc0_0, 0, 4; + %store/vec4 v0x233f880_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfa6e0_0, 0, 4; + %store/vec4 v0x23431a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfaf10_0, 0, 4; + %store/vec4 v0x23439d0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfb0d0_0, 0, 4; + %store/vec4 v0x2343b90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfae50_0, 0, 4; + %store/vec4 v0x2343910_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dfa010, 4, 0; + %store/vec4a v0x2342ad0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dfa010, 4, 0; + %store/vec4a v0x2342ad0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dfa010, 4, 0; + %store/vec4a v0x2342ad0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dfa010, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1df6550, v0x1df9bd0 {0 0 0}; + %store/vec4a v0x2342ad0, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x233f010, v0x2342690 {0 0 0}; %end; .thread T_12; - .scope S_0x1df6340; + .scope S_0x233ee00; T_13 ; - %wait E_0x1dd2930; - %load/vec4 v0x1df9f30_0; + %wait E_0x231b3f0; + %load/vec4 v0x23429f0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3989,7 +3988,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x1dfa150_0; + %load/vec4 v0x2342c10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4004,185 +4003,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x1df6bb0_0; + %load/vec4 v0x233f670_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x1dfa230_0; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x2342cf0_0; + %load/vec4 v0x233fa40_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; - %load/vec4 v0x1df6f80_0; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4/off/d v0x23431a0_0, 4, 5; + %load/vec4 v0x233fa40_0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; - %load/vec4 v0x1df6f80_0; - %assign/vec4 v0x1dfa780_0, 0; + %assign/vec4 v0x23429f0_0, 0; + %load/vec4 v0x233fa40_0; + %assign/vec4 v0x2343240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; - %load/vec4 v0x1df6f80_0; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4/off/d v0x23439d0_0, 4, 5; + %load/vec4 v0x233fa40_0; + %assign/vec4 v0x2342750_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x1dfa230_0; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342cf0_0; + %load/vec4 v0x2342750_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; - %load/vec4 v0x1df9c90_0; - %assign/vec4 v0x1dfa780_0, 0; + %assign/vec4 v0x23429f0_0, 0; + %load/vec4 v0x2342750_0; + %assign/vec4 v0x2343240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %assign/vec4/off/d v0x23439d0_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x1df6f80_0; + %load/vec4 v0x233fa40_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x1df9590_0; + %load/vec4 v0x2342050_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -4190,29 +4189,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; - %load/vec4 v0x1df6f80_0; - %assign/vec4 v0x1dfa780_0, 0; + %assign/vec4 v0x23429f0_0, 0; + %load/vec4 v0x233fa40_0; + %assign/vec4 v0x2343240_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %assign/vec4/off/d v0x23439d0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %assign/vec4/off/d v0x23439d0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %assign/vec4/off/d v0x23439d0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; + %assign/vec4/off/d v0x23439d0_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -4220,10 +4219,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x1df6bb0_0; + %load/vec4 v0x233f670_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4290,180 +4289,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x1df6830_0; - %load/vec4 v0x1dfa820_0; + %load/vec4 v0x233f2f0_0; + %load/vec4 v0x23432e0_0; %add; - %assign/vec4 v0x1df6830_0, 0; - %load/vec4 v0x1df6dc0_0; + %assign/vec4 v0x233f2f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x1df6830_0; - %load/vec4 v0x1dfa820_0; + %load/vec4 v0x233f2f0_0; + %load/vec4 v0x23432e0_0; %sub; - %assign/vec4 v0x1df6830_0, 0; - %load/vec4 v0x1df6dc0_0; + %assign/vec4 v0x233f2f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f880_0; %pad/u 11; - %load/vec4 v0x1dfa820_0; + %load/vec4 v0x23432e0_0; %add; %pad/u 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x1dfa820_0; - %assign/vec4 v0x1dfb290_0, 0; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x23432e0_0; + %assign/vec4 v0x2343d50_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x1df6ad0_0; - %assign/vec4 v0x1dfb290_0, 0; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f590_0; + %assign/vec4 v0x2343d50_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x1df6830_0; - %load/vec4 v0x1df6ad0_0; + %load/vec4 v0x233f2f0_0; + %load/vec4 v0x233f590_0; %add; - %assign/vec4 v0x1df6830_0, 0; - %load/vec4 v0x1df6dc0_0; + %assign/vec4 v0x233f2f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x1df6830_0; - %load/vec4 v0x1df6ad0_0; + %load/vec4 v0x233f2f0_0; + %load/vec4 v0x233f590_0; %sub; - %assign/vec4 v0x1df6830_0, 0; - %load/vec4 v0x1df6dc0_0; + %assign/vec4 v0x233f2f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f880_0; %pad/u 11; - %load/vec4 v0x1df6ad0_0; + %load/vec4 v0x233f590_0; %add; %pad/u 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x1df6930_0; - %assign/vec4 v0x1df6830_0, 0; - %load/vec4 v0x1df6830_0; - %assign/vec4 v0x1df6930_0, 0; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f3f0_0; + %assign/vec4 v0x233f2f0_0, 0; + %load/vec4 v0x233f2f0_0; + %assign/vec4 v0x233f3f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x1df6830_0; - %assign/vec4 v0x1df6930_0, 0; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f2f0_0; + %assign/vec4 v0x233f3f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x1df6830_0; + %load/vec4 v0x233f2f0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1df6830_0, 0; - %load/vec4 v0x1df6dc0_0; + %assign/vec4 v0x233f2f0_0, 0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x1df6ce0_0; - %assign/vec4 v0x1df6ea0_0, 0; + %load/vec4 v0x233f7a0_0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x1df6830_0; + %load/vec4 v0x233f2f0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x1df6ce0_0; - %assign/vec4 v0x1df6ea0_0, 0; + %load/vec4 v0x233f7a0_0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x1df6830_0; + %load/vec4 v0x233f2f0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x1df6ce0_0; - %assign/vec4 v0x1df6ea0_0, 0; + %load/vec4 v0x233f7a0_0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1df6830_0; + %load/vec4 v0x233f2f0_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x1df6ce0_0; - %assign/vec4 v0x1df6ea0_0, 0; + %load/vec4 v0x233f7a0_0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x1df6830_0; + %load/vec4 v0x233f2f0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x1df6ce0_0; - %assign/vec4 v0x1df6ea0_0, 0; + %load/vec4 v0x233f7a0_0; + %assign/vec4 v0x233f960_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x1df6dc0_0; + %load/vec4 v0x233f880_0; %addi 1, 0, 4; - %assign/vec4 v0x1df6ea0_0, 0; + %assign/vec4 v0x233f960_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x1df6bb0_0; + %load/vec4 v0x233f670_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1df6bb0_0; + %load/vec4 v0x233f670_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x1df6a10_0; + %load/vec4 v0x233f4d0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1df6a10_0; + %load/vec4 v0x233f4d0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4471,162 +4470,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x1df6a10_0; + %load/vec4 v0x233f4d0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x1dfb290_0; - %assign/vec4 v0x1df6830_0, 0; + %load/vec4 v0x2343d50_0; + %assign/vec4 v0x233f2f0_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; - %load/vec4 v0x1df6a10_0; + %assign/vec4 v0x23429f0_0, 0; + %load/vec4 v0x233f4d0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x1df9c90_0; - %assign/vec4 v0x1dfb1b0_0, 0; - %load/vec4 v0x1dfb290_0; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; + %assign/vec4 v0x2343c70_0, 0; + %load/vec4 v0x2343d50_0; + %load/vec4 v0x2342750_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df9c90_0; + %load/vec4 v0x2342750_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; + %assign/vec4/off/d v0x2343910_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x1df6a10_0; + %load/vec4 v0x233f4d0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x1df6a10_0; - %assign/vec4 v0x1dfb1b0_0, 0; - %load/vec4 v0x1dfb290_0; - %load/vec4 v0x1df6a10_0; + %load/vec4 v0x233f4d0_0; + %assign/vec4 v0x2343c70_0, 0; + %load/vec4 v0x2343d50_0; + %load/vec4 v0x233f4d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df6a10_0; + %load/vec4 v0x233f4d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1df6a10_0; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x233f4d0_0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x1df9710_0; + %load/vec4 v0x23421d0_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x1df6a10_0; - %assign/vec4 v0x1dfb1b0_0, 0; + %load/vec4 v0x233f4d0_0; + %assign/vec4 v0x2343c70_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x1dfa150_0; + %load/vec4 v0x2342c10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4641,82 +4640,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x1dfa780_0; + %load/vec4 v0x2343240_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x1df9590_0; + %load/vec4 v0x2342050_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; + %assign/vec4 v0x23429f0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfaf10_0, 0, 4; - %load/vec4 v0x1dfa230_0; + %store/vec4 v0x23439d0_0, 0, 4; + %load/vec4 v0x2342cf0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x1dfa230_0; + %load/vec4 v0x2342cf0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -4724,54 +4723,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x1dfa230_0; - %load/vec4 v0x1dfa780_0; + %load/vec4 v0x2342cf0_0; + %load/vec4 v0x2343240_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; - %load/vec4 v0x1dfa780_0; + %assign/vec4 v0x23429f0_0, 0; + %load/vec4 v0x2343240_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dfa8e0, 4; - %assign/vec4 v0x1dfa820_0, 0; + %load/vec4a v0x23433a0, 4; + %assign/vec4 v0x23432e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfa780_0; + %load/vec4 v0x2343240_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfa6e0_0, 4, 5; + %assign/vec4/off/d v0x23431a0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dfa780_0; + %load/vec4 v0x2343240_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dfaf10_0, 4, 5; - %load/vec4 v0x1dfa780_0; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4/off/d v0x23439d0_0, 4, 5; + %load/vec4 v0x2343240_0; + %assign/vec4 v0x2342750_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x1dfa150_0; + %load/vec4 v0x2342c10_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4787,93 +4786,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x1dfb1b0_0; + %load/vec4 v0x2343c70_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x1df9710_0; + %load/vec4 v0x23421d0_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x1df8640_0; + %load/vec4 v0x2341100_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dfb1b0_0, 0; + %assign/vec4 v0x2343c70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dfae50_0, 4, 5; - %load/vec4 v0x1dfb290_0; + %assign/vec4/off/d v0x2343910_0, 4, 5; + %load/vec4 v0x2343d50_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dfa010, 0, 4; + %assign/vec4/a/d v0x2342ad0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x2342750_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -4881,33 +4880,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x1dfb1b0_0; + %load/vec4 v0x2343c70_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x1dfaff0_0; - %load/vec4 v0x1dfb1b0_0; + %load/vec4 v0x2343ab0_0; + %load/vec4 v0x2343c70_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1dfb1b0_0; + %load/vec4 v0x2343c70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1dfae50_0, 4, 1; + %store/vec4 v0x2343910_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df9f30_0, 0; - %load/vec4 v0x1dfb1b0_0; - %assign/vec4 v0x1df9c90_0, 0; + %assign/vec4 v0x23429f0_0, 0; + %load/vec4 v0x2343c70_0; + %assign/vec4 v0x2342750_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dfa150_0, 0; + %assign/vec4 v0x2342c10_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -4916,19 +4915,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x1df6340; + .scope S_0x233ee00; T_14 ; - %wait E_0x1dd2730; - %load/vec4 v0x1dfa150_0; + %wait E_0x231b1f0; + %load/vec4 v0x2342c10_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1df9f30_0; + %load/vec4 v0x23429f0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1df6ea0_0; + %load/vec4 v0x233f960_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4937,62 +4936,62 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x1df6ea0_0; - %assign/vec4 v0x1df6dc0_0, 0; + %load/vec4 v0x233f960_0; + %assign/vec4 v0x233f880_0, 0; T_14.0 ; - %load/vec4 v0x1dfa150_0; + %load/vec4 v0x2342c10_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dfa6e0_0, 0, 4; + %store/vec4 v0x23431a0_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x1dd7710; + .scope S_0x23201d0; T_15 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ddb2e0_0, 0, 3; + %store/vec4 v0x2323da0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ddb500_0, 0, 3; + %store/vec4 v0x2323fc0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ddb040_0, 0, 3; + %store/vec4 v0x2323b00_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dd7c00_0, 0, 11; + %store/vec4 v0x23206c0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dd7d00_0, 0, 11; + %store/vec4 v0x23207c0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd8190_0, 0, 4; + %store/vec4 v0x2320c50_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddba90_0, 0, 4; + %store/vec4 v0x2324550_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddc300_0, 0, 4; + %store/vec4 v0x2324dc0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddc4c0_0, 0, 4; + %store/vec4 v0x2324f80_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddc220_0, 0, 4; + %store/vec4 v0x2324ce0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ddb3c0, 4, 0; + %store/vec4a v0x2323e80, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ddb3c0, 4, 0; + %store/vec4a v0x2323e80, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ddb3c0, 4, 0; + %store/vec4a v0x2323e80, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ddb3c0, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1dd7940, v0x1ddaf80 {0 0 0}; + %store/vec4a v0x2323e80, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x2320400, v0x2323a40 {0 0 0}; %end; .thread T_15; - .scope S_0x1dd7710; + .scope S_0x23201d0; T_16 ; - %wait E_0x1dd2930; - %load/vec4 v0x1ddb2e0_0; + %wait E_0x231b3f0; + %load/vec4 v0x2323da0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5007,7 +5006,7 @@ T_16 ; %jmp/1 T_16.2, 6; %jmp T_16.3; T_16.0 ; - %load/vec4 v0x1ddb500_0; + %load/vec4 v0x2323fc0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5022,185 +5021,185 @@ T_16.0 ; %jmp/1 T_16.6, 6; %jmp T_16.7; T_16.4 ; - %load/vec4 v0x1dd7f80_0; + %load/vec4 v0x2320a40_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_16.8, 5; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_16.10, 5; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %jmp T_16.11; T_16.10 ; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_16.12, 5; - %load/vec4 v0x1ddb5e0_0; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x23240a0_0; + %load/vec4 v0x2320e10_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_16.14, 8; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; - %load/vec4 v0x1dd8350_0; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4/off/d v0x2324550_0, 4, 5; + %load/vec4 v0x2320e10_0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.15; T_16.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; - %load/vec4 v0x1dd8350_0; - %assign/vec4 v0x1ddbb30_0, 0; + %assign/vec4 v0x2323da0_0, 0; + %load/vec4 v0x2320e10_0; + %assign/vec4 v0x23245f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; - %load/vec4 v0x1dd8350_0; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; + %load/vec4 v0x2320e10_0; + %assign/vec4 v0x2323b00_0, 0; T_16.15 ; %jmp T_16.13; T_16.12 ; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %cmpi/e 6, 0, 3; %jmp/0xz T_16.16, 4; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %cmpi/e 0, 0, 3; %jmp/0xz T_16.18, 4; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %jmp T_16.19; T_16.18 ; - %load/vec4 v0x1ddb5e0_0; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x23240a0_0; + %load/vec4 v0x2323b00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_16.20, 8; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %jmp T_16.21; T_16.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; - %load/vec4 v0x1ddb040_0; - %assign/vec4 v0x1ddbb30_0, 0; + %assign/vec4 v0x2323da0_0, 0; + %load/vec4 v0x2323b00_0; + %assign/vec4 v0x23245f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; T_16.21 ; T_16.19 ; %jmp T_16.17; T_16.16 ; - %load/vec4 v0x1dd8350_0; + %load/vec4 v0x2320e10_0; %cmpi/e 7, 0, 3; %jmp/0xz T_16.22, 4; - %load/vec4 v0x1dda960_0; + %load/vec4 v0x2323420_0; %flag_set/vec4 8; %jmp/0xz T_16.24, 8; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_16.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.27; T_16.26 ; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_16.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.29; T_16.28 ; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_16.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.31; T_16.30 ; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_16.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; T_16.32 ; T_16.31 ; T_16.29 ; @@ -5208,29 +5207,29 @@ T_16.27 ; %jmp T_16.25; T_16.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; - %load/vec4 v0x1dd8350_0; - %assign/vec4 v0x1ddbb30_0, 0; + %assign/vec4 v0x2323da0_0, 0; + %load/vec4 v0x2320e10_0; + %assign/vec4 v0x23245f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; T_16.25 ; T_16.22 ; T_16.17 ; @@ -5238,10 +5237,10 @@ T_16.13 ; T_16.11 ; T_16.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.7; T_16.5 ; - %load/vec4 v0x1dd7f80_0; + %load/vec4 v0x2320a40_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5308,180 +5307,180 @@ T_16.5 ; %jmp/1 T_16.49, 6; %jmp T_16.50; T_16.34 ; - %load/vec4 v0x1dd7c00_0; - %load/vec4 v0x1ddbbd0_0; + %load/vec4 v0x23206c0_0; + %load/vec4 v0x2324690_0; %add; - %assign/vec4 v0x1dd7c00_0, 0; - %load/vec4 v0x1dd8190_0; + %assign/vec4 v0x23206c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.35 ; - %load/vec4 v0x1dd7c00_0; - %load/vec4 v0x1ddbbd0_0; + %load/vec4 v0x23206c0_0; + %load/vec4 v0x2324690_0; %sub; - %assign/vec4 v0x1dd7c00_0, 0; - %load/vec4 v0x1dd8190_0; + %assign/vec4 v0x23206c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.36 ; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320c50_0; %pad/u 11; - %load/vec4 v0x1ddbbd0_0; + %load/vec4 v0x2324690_0; %add; %pad/u 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.37 ; - %load/vec4 v0x1ddbbd0_0; - %assign/vec4 v0x1ddc680_0, 0; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2324690_0; + %assign/vec4 v0x2325140_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.38 ; - %load/vec4 v0x1dd7ea0_0; - %assign/vec4 v0x1ddc680_0, 0; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320960_0; + %assign/vec4 v0x2325140_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.39 ; - %load/vec4 v0x1dd7c00_0; - %load/vec4 v0x1dd7ea0_0; + %load/vec4 v0x23206c0_0; + %load/vec4 v0x2320960_0; %add; - %assign/vec4 v0x1dd7c00_0, 0; - %load/vec4 v0x1dd8190_0; + %assign/vec4 v0x23206c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.40 ; - %load/vec4 v0x1dd7c00_0; - %load/vec4 v0x1dd7ea0_0; + %load/vec4 v0x23206c0_0; + %load/vec4 v0x2320960_0; %sub; - %assign/vec4 v0x1dd7c00_0, 0; - %load/vec4 v0x1dd8190_0; + %assign/vec4 v0x23206c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.41 ; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320c50_0; %pad/u 11; - %load/vec4 v0x1dd7ea0_0; + %load/vec4 v0x2320960_0; %add; %pad/u 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.42 ; - %load/vec4 v0x1dd7d00_0; - %assign/vec4 v0x1dd7c00_0, 0; - %load/vec4 v0x1dd7c00_0; - %assign/vec4 v0x1dd7d00_0, 0; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x23207c0_0; + %assign/vec4 v0x23206c0_0, 0; + %load/vec4 v0x23206c0_0; + %assign/vec4 v0x23207c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.43 ; - %load/vec4 v0x1dd7c00_0; - %assign/vec4 v0x1dd7d00_0, 0; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x23206c0_0; + %assign/vec4 v0x23207c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.44 ; - %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x23206c0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1dd7c00_0, 0; - %load/vec4 v0x1dd8190_0; + %assign/vec4 v0x23206c0_0, 0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.45 ; - %load/vec4 v0x1dd80b0_0; - %assign/vec4 v0x1dd8270_0, 0; + %load/vec4 v0x2320b70_0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.50; T_16.46 ; - %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x23206c0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_16.51, 4; - %load/vec4 v0x1dd80b0_0; - %assign/vec4 v0x1dd8270_0, 0; + %load/vec4 v0x2320b70_0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.52; T_16.51 ; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; T_16.52 ; %jmp T_16.50; T_16.47 ; - %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x23206c0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_16.53, 4; - %load/vec4 v0x1dd80b0_0; - %assign/vec4 v0x1dd8270_0, 0; + %load/vec4 v0x2320b70_0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.54; T_16.53 ; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; T_16.54 ; %jmp T_16.50; T_16.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x23206c0_0; %pad/s 32; %cmp/s; %jmp/0xz T_16.55, 5; - %load/vec4 v0x1dd80b0_0; - %assign/vec4 v0x1dd8270_0, 0; + %load/vec4 v0x2320b70_0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.56; T_16.55 ; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; T_16.56 ; %jmp T_16.50; T_16.49 ; - %load/vec4 v0x1dd7c00_0; + %load/vec4 v0x23206c0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_16.57, 5; - %load/vec4 v0x1dd80b0_0; - %assign/vec4 v0x1dd8270_0, 0; + %load/vec4 v0x2320b70_0; + %assign/vec4 v0x2320d30_0, 0; %jmp T_16.58; T_16.57 ; - %load/vec4 v0x1dd8190_0; + %load/vec4 v0x2320c50_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd8270_0, 0; + %assign/vec4 v0x2320d30_0, 0; T_16.58 ; %jmp T_16.50; T_16.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.7; T_16.6 ; - %load/vec4 v0x1dd7f80_0; + %load/vec4 v0x2320a40_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1dd7f80_0; + %load/vec4 v0x2320a40_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_16.59, 4; - %load/vec4 v0x1dd7de0_0; + %load/vec4 v0x23208a0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1dd7de0_0; + %load/vec4 v0x23208a0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5489,162 +5488,162 @@ T_16.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_16.61, 9; - %load/vec4 v0x1dd7de0_0; + %load/vec4 v0x23208a0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_16.63, 4; - %load/vec4 v0x1ddc680_0; - %assign/vec4 v0x1dd7c00_0, 0; + %load/vec4 v0x2325140_0; + %assign/vec4 v0x23206c0_0, 0; T_16.63 ; %jmp T_16.62; T_16.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; - %load/vec4 v0x1dd7de0_0; + %assign/vec4 v0x2323da0_0, 0; + %load/vec4 v0x23208a0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_16.65, 4; - %load/vec4 v0x1ddb040_0; - %assign/vec4 v0x1ddc5a0_0, 0; - %load/vec4 v0x1ddc680_0; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; + %assign/vec4 v0x2325060_0, 0; + %load/vec4 v0x2325140_0; + %load/vec4 v0x2323b00_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddb040_0; + %load/vec4 v0x2323b00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; %jmp T_16.66; T_16.65 ; - %load/vec4 v0x1dd7de0_0; + %load/vec4 v0x23208a0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_16.67, 4; - %load/vec4 v0x1dd7de0_0; - %assign/vec4 v0x1ddc5a0_0, 0; - %load/vec4 v0x1ddc680_0; - %load/vec4 v0x1dd7de0_0; + %load/vec4 v0x23208a0_0; + %assign/vec4 v0x2325060_0, 0; + %load/vec4 v0x2325140_0; + %load/vec4 v0x23208a0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd7de0_0; + %load/vec4 v0x23208a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1dd7de0_0; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x23208a0_0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.68; T_16.67 ; - %load/vec4 v0x1ddaae0_0; + %load/vec4 v0x23235a0_0; %flag_set/vec4 8; %jmp/0xz T_16.69, 8; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_16.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.72; T_16.71 ; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_16.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.74; T_16.73 ; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_16.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.76; T_16.75 ; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_16.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; T_16.77 ; T_16.76 ; T_16.74 ; T_16.72 ; %jmp T_16.70; T_16.69 ; - %load/vec4 v0x1dd7de0_0; - %assign/vec4 v0x1ddc5a0_0, 0; + %load/vec4 v0x23208a0_0; + %assign/vec4 v0x2325060_0, 0; T_16.70 ; T_16.68 ; T_16.66 ; T_16.62 ; T_16.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.7; T_16.7 ; %pop/vec4 1; %jmp T_16.3; T_16.1 ; - %load/vec4 v0x1ddb500_0; + %load/vec4 v0x2323fc0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5659,82 +5658,82 @@ T_16.1 ; %jmp/1 T_16.81, 6; %jmp T_16.82; T_16.79 ; - %load/vec4 v0x1ddbb30_0; + %load/vec4 v0x23245f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_16.83, 4; - %load/vec4 v0x1dda960_0; + %load/vec4 v0x2323420_0; %flag_set/vec4 8; %jmp/0xz T_16.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; + %assign/vec4 v0x2323da0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddc300_0, 0, 4; - %load/vec4 v0x1ddb5e0_0; + %store/vec4 v0x2324dc0_0, 0, 4; + %load/vec4 v0x23240a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_16.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.88; T_16.87 ; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_16.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.90; T_16.89 ; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_16.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.92; T_16.91 ; - %load/vec4 v0x1ddb5e0_0; + %load/vec4 v0x23240a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_16.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; T_16.93 ; T_16.92 ; T_16.90 ; @@ -5742,54 +5741,54 @@ T_16.88 ; T_16.85 ; %jmp T_16.84; T_16.83 ; - %load/vec4 v0x1ddb5e0_0; - %load/vec4 v0x1ddbb30_0; + %load/vec4 v0x23240a0_0; + %load/vec4 v0x23245f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_16.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; - %load/vec4 v0x1ddbb30_0; + %assign/vec4 v0x2323da0_0, 0; + %load/vec4 v0x23245f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ddbcb0, 4; - %assign/vec4 v0x1ddbbd0_0, 0; + %load/vec4a v0x2324770, 4; + %assign/vec4 v0x2324690_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddbb30_0; + %load/vec4 v0x23245f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddba90_0, 4, 5; + %assign/vec4/off/d v0x2324550_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddbb30_0; + %load/vec4 v0x23245f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ddc300_0, 4, 5; - %load/vec4 v0x1ddbb30_0; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4/off/d v0x2324dc0_0, 4, 5; + %load/vec4 v0x23245f0_0; + %assign/vec4 v0x2323b00_0, 0; T_16.95 ; T_16.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.82; T_16.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.82; T_16.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.82; T_16.82 ; %pop/vec4 1; %jmp T_16.3; T_16.2 ; - %load/vec4 v0x1ddb500_0; + %load/vec4 v0x2323fc0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5805,93 +5804,93 @@ T_16.2 ; %jmp T_16.100; T_16.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.100; T_16.98 ; - %load/vec4 v0x1ddc5a0_0; + %load/vec4 v0x2325060_0; %cmpi/e 7, 0, 3; %jmp/0xz T_16.101, 4; - %load/vec4 v0x1ddaae0_0; + %load/vec4 v0x23235a0_0; %flag_set/vec4 8; %jmp/0xz T_16.103, 8; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_16.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.106; T_16.105 ; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_16.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.108; T_16.107 ; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_16.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; %jmp T_16.110; T_16.109 ; - %load/vec4 v0x1dd9a10_0; + %load/vec4 v0x23224d0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_16.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ddc5a0_0, 0; + %assign/vec4 v0x2325060_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ddc220_0, 4, 5; - %load/vec4 v0x1ddc680_0; + %assign/vec4/off/d v0x2324ce0_0, 4, 5; + %load/vec4 v0x2325140_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ddb3c0, 0, 4; + %assign/vec4/a/d v0x2323e80, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323b00_0, 0; T_16.111 ; T_16.110 ; T_16.108 ; @@ -5899,33 +5898,33 @@ T_16.106 ; T_16.103 ; T_16.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.100; T_16.99 ; - %load/vec4 v0x1ddc5a0_0; + %load/vec4 v0x2325060_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_16.113, 4; - %load/vec4 v0x1ddc3e0_0; - %load/vec4 v0x1ddc5a0_0; + %load/vec4 v0x2324ea0_0; + %load/vec4 v0x2325060_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_16.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1ddc5a0_0; + %load/vec4 v0x2325060_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1ddc220_0, 4, 1; + %store/vec4 v0x2324ce0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ddb2e0_0, 0; - %load/vec4 v0x1ddc5a0_0; - %assign/vec4 v0x1ddb040_0, 0; + %assign/vec4 v0x2323da0_0, 0; + %load/vec4 v0x2325060_0; + %assign/vec4 v0x2323b00_0, 0; T_16.115 ; T_16.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ddb500_0, 0; + %assign/vec4 v0x2323fc0_0, 0; %jmp T_16.100; T_16.100 ; %pop/vec4 1; @@ -5934,19 +5933,19 @@ T_16.3 ; %pop/vec4 1; %jmp T_16; .thread T_16; - .scope S_0x1dd7710; + .scope S_0x23201d0; T_17 ; - %wait E_0x1dd2730; - %load/vec4 v0x1ddb500_0; + %wait E_0x231b1f0; + %load/vec4 v0x2323fc0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ddb2e0_0; + %load/vec4 v0x2323da0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1dd8270_0; + %load/vec4 v0x2320d30_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -5955,62 +5954,62 @@ T_17 ; %and; %flag_set/vec4 8; %jmp/0xz T_17.0, 8; - %load/vec4 v0x1dd8270_0; - %assign/vec4 v0x1dd8190_0, 0; + %load/vec4 v0x2320d30_0; + %assign/vec4 v0x2320c50_0, 0; T_17.0 ; - %load/vec4 v0x1ddb500_0; + %load/vec4 v0x2323fc0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_17.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddba90_0, 0, 4; + %store/vec4 v0x2324550_0, 0, 4; T_17.2 ; %jmp T_17; .thread T_17; - .scope S_0x1dd23d0; + .scope S_0x231ae90; T_18 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dd60b0_0, 0, 3; + %store/vec4 v0x231eb70_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dd62d0_0, 0, 3; + %store/vec4 v0x231ed90_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dd5e10_0, 0, 3; + %store/vec4 v0x231e8d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dd2990_0, 0, 11; + %store/vec4 v0x231b450_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dd2a90_0, 0, 11; + %store/vec4 v0x231b550_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd2f20_0, 0, 4; + %store/vec4 v0x231b9e0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd6860_0, 0, 4; + %store/vec4 v0x231f320_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd7110_0, 0, 4; + %store/vec4 v0x231fbd0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd72d0_0, 0, 4; + %store/vec4 v0x231fd90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd7030_0, 0, 4; + %store/vec4 v0x231faf0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dd6190, 4, 0; + %store/vec4a v0x231ec50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dd6190, 4, 0; + %store/vec4a v0x231ec50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dd6190, 4, 0; + %store/vec4a v0x231ec50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1dd6190, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1dd25e0, v0x1dd5d50 {0 0 0}; + %store/vec4a v0x231ec50, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x231b0a0, v0x231e810 {0 0 0}; %end; .thread T_18; - .scope S_0x1dd23d0; + .scope S_0x231ae90; T_19 ; - %wait E_0x1dd2930; - %load/vec4 v0x1dd60b0_0; + %wait E_0x231b3f0; + %load/vec4 v0x231eb70_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -6025,7 +6024,7 @@ T_19 ; %jmp/1 T_19.2, 6; %jmp T_19.3; T_19.0 ; - %load/vec4 v0x1dd62d0_0; + %load/vec4 v0x231ed90_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -6040,185 +6039,185 @@ T_19.0 ; %jmp/1 T_19.6, 6; %jmp T_19.7; T_19.4 ; - %load/vec4 v0x1dd2d10_0; + %load/vec4 v0x231b7d0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_19.8, 5; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_19.10, 5; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %jmp T_19.11; T_19.10 ; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_19.12, 5; - %load/vec4 v0x1dd63b0_0; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231ee70_0; + %load/vec4 v0x231bba0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_19.14, 8; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; - %load/vec4 v0x1dd30e0_0; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4/off/d v0x231f320_0, 4, 5; + %load/vec4 v0x231bba0_0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.15; T_19.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; - %load/vec4 v0x1dd30e0_0; - %assign/vec4 v0x1dd6900_0, 0; + %assign/vec4 v0x231eb70_0, 0; + %load/vec4 v0x231bba0_0; + %assign/vec4 v0x231f3c0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; - %load/vec4 v0x1dd30e0_0; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; + %load/vec4 v0x231bba0_0; + %assign/vec4 v0x231e8d0_0, 0; T_19.15 ; %jmp T_19.13; T_19.12 ; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_19.16, 4; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_19.18, 4; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %jmp T_19.19; T_19.18 ; - %load/vec4 v0x1dd63b0_0; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231ee70_0; + %load/vec4 v0x231e8d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_19.20, 8; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %jmp T_19.21; T_19.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; - %load/vec4 v0x1dd5e10_0; - %assign/vec4 v0x1dd6900_0, 0; + %assign/vec4 v0x231eb70_0, 0; + %load/vec4 v0x231e8d0_0; + %assign/vec4 v0x231f3c0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; T_19.21 ; T_19.19 ; %jmp T_19.17; T_19.16 ; - %load/vec4 v0x1dd30e0_0; + %load/vec4 v0x231bba0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_19.22, 4; - %load/vec4 v0x1dd56f0_0; + %load/vec4 v0x231e1b0_0; %flag_set/vec4 8; %jmp/0xz T_19.24, 8; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_19.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.27; T_19.26 ; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_19.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.29; T_19.28 ; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_19.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.31; T_19.30 ; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_19.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; T_19.32 ; T_19.31 ; T_19.29 ; @@ -6226,29 +6225,29 @@ T_19.27 ; %jmp T_19.25; T_19.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; - %load/vec4 v0x1dd30e0_0; - %assign/vec4 v0x1dd6900_0, 0; + %assign/vec4 v0x231eb70_0, 0; + %load/vec4 v0x231bba0_0; + %assign/vec4 v0x231f3c0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; T_19.25 ; T_19.22 ; T_19.17 ; @@ -6256,10 +6255,10 @@ T_19.13 ; T_19.11 ; T_19.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.7; T_19.5 ; - %load/vec4 v0x1dd2d10_0; + %load/vec4 v0x231b7d0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -6326,180 +6325,180 @@ T_19.5 ; %jmp/1 T_19.49, 6; %jmp T_19.50; T_19.34 ; - %load/vec4 v0x1dd2990_0; - %load/vec4 v0x1dd69c0_0; + %load/vec4 v0x231b450_0; + %load/vec4 v0x231f480_0; %add; - %assign/vec4 v0x1dd2990_0, 0; - %load/vec4 v0x1dd2f20_0; + %assign/vec4 v0x231b450_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.35 ; - %load/vec4 v0x1dd2990_0; - %load/vec4 v0x1dd69c0_0; + %load/vec4 v0x231b450_0; + %load/vec4 v0x231f480_0; %sub; - %assign/vec4 v0x1dd2990_0, 0; - %load/vec4 v0x1dd2f20_0; + %assign/vec4 v0x231b450_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.36 ; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b9e0_0; %pad/u 11; - %load/vec4 v0x1dd69c0_0; + %load/vec4 v0x231f480_0; %add; %pad/u 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.37 ; - %load/vec4 v0x1dd69c0_0; - %assign/vec4 v0x1dd7490_0, 0; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231f480_0; + %assign/vec4 v0x231ff50_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.38 ; - %load/vec4 v0x1dd2c30_0; - %assign/vec4 v0x1dd7490_0, 0; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b6f0_0; + %assign/vec4 v0x231ff50_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.39 ; - %load/vec4 v0x1dd2990_0; - %load/vec4 v0x1dd2c30_0; + %load/vec4 v0x231b450_0; + %load/vec4 v0x231b6f0_0; %add; - %assign/vec4 v0x1dd2990_0, 0; - %load/vec4 v0x1dd2f20_0; + %assign/vec4 v0x231b450_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.40 ; - %load/vec4 v0x1dd2990_0; - %load/vec4 v0x1dd2c30_0; + %load/vec4 v0x231b450_0; + %load/vec4 v0x231b6f0_0; %sub; - %assign/vec4 v0x1dd2990_0, 0; - %load/vec4 v0x1dd2f20_0; + %assign/vec4 v0x231b450_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.41 ; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b9e0_0; %pad/u 11; - %load/vec4 v0x1dd2c30_0; + %load/vec4 v0x231b6f0_0; %add; %pad/u 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.42 ; - %load/vec4 v0x1dd2a90_0; - %assign/vec4 v0x1dd2990_0, 0; - %load/vec4 v0x1dd2990_0; - %assign/vec4 v0x1dd2a90_0, 0; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b550_0; + %assign/vec4 v0x231b450_0, 0; + %load/vec4 v0x231b450_0; + %assign/vec4 v0x231b550_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.43 ; - %load/vec4 v0x1dd2990_0; - %assign/vec4 v0x1dd2a90_0, 0; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b450_0; + %assign/vec4 v0x231b550_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.44 ; - %load/vec4 v0x1dd2990_0; + %load/vec4 v0x231b450_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1dd2990_0, 0; - %load/vec4 v0x1dd2f20_0; + %assign/vec4 v0x231b450_0, 0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.45 ; - %load/vec4 v0x1dd2e40_0; - %assign/vec4 v0x1dd3000_0, 0; + %load/vec4 v0x231b900_0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.50; T_19.46 ; - %load/vec4 v0x1dd2990_0; + %load/vec4 v0x231b450_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_19.51, 4; - %load/vec4 v0x1dd2e40_0; - %assign/vec4 v0x1dd3000_0, 0; + %load/vec4 v0x231b900_0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.52; T_19.51 ; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; T_19.52 ; %jmp T_19.50; T_19.47 ; - %load/vec4 v0x1dd2990_0; + %load/vec4 v0x231b450_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_19.53, 4; - %load/vec4 v0x1dd2e40_0; - %assign/vec4 v0x1dd3000_0, 0; + %load/vec4 v0x231b900_0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.54; T_19.53 ; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; T_19.54 ; %jmp T_19.50; T_19.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dd2990_0; + %load/vec4 v0x231b450_0; %pad/s 32; %cmp/s; %jmp/0xz T_19.55, 5; - %load/vec4 v0x1dd2e40_0; - %assign/vec4 v0x1dd3000_0, 0; + %load/vec4 v0x231b900_0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.56; T_19.55 ; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; T_19.56 ; %jmp T_19.50; T_19.49 ; - %load/vec4 v0x1dd2990_0; + %load/vec4 v0x231b450_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_19.57, 5; - %load/vec4 v0x1dd2e40_0; - %assign/vec4 v0x1dd3000_0, 0; + %load/vec4 v0x231b900_0; + %assign/vec4 v0x231bac0_0, 0; %jmp T_19.58; T_19.57 ; - %load/vec4 v0x1dd2f20_0; + %load/vec4 v0x231b9e0_0; %addi 1, 0, 4; - %assign/vec4 v0x1dd3000_0, 0; + %assign/vec4 v0x231bac0_0, 0; T_19.58 ; %jmp T_19.50; T_19.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.7; T_19.6 ; - %load/vec4 v0x1dd2d10_0; + %load/vec4 v0x231b7d0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1dd2d10_0; + %load/vec4 v0x231b7d0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_19.59, 4; - %load/vec4 v0x1dd2b70_0; + %load/vec4 v0x231b630_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1dd2b70_0; + %load/vec4 v0x231b630_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -6507,162 +6506,162 @@ T_19.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_19.61, 9; - %load/vec4 v0x1dd2b70_0; + %load/vec4 v0x231b630_0; %cmpi/e 1, 0, 3; %jmp/0xz T_19.63, 4; - %load/vec4 v0x1dd7490_0; - %assign/vec4 v0x1dd2990_0, 0; + %load/vec4 v0x231ff50_0; + %assign/vec4 v0x231b450_0, 0; T_19.63 ; %jmp T_19.62; T_19.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; - %load/vec4 v0x1dd2b70_0; + %assign/vec4 v0x231eb70_0, 0; + %load/vec4 v0x231b630_0; %cmpi/e 6, 0, 3; %jmp/0xz T_19.65, 4; - %load/vec4 v0x1dd5e10_0; - %assign/vec4 v0x1dd73b0_0, 0; - %load/vec4 v0x1dd7490_0; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; + %assign/vec4 v0x231fe70_0, 0; + %load/vec4 v0x231ff50_0; + %load/vec4 v0x231e8d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd5e10_0; + %load/vec4 v0x231e8d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; + %assign/vec4/off/d v0x231faf0_0, 4, 5; %jmp T_19.66; T_19.65 ; - %load/vec4 v0x1dd2b70_0; + %load/vec4 v0x231b630_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_19.67, 4; - %load/vec4 v0x1dd2b70_0; - %assign/vec4 v0x1dd73b0_0, 0; - %load/vec4 v0x1dd7490_0; - %load/vec4 v0x1dd2b70_0; + %load/vec4 v0x231b630_0; + %assign/vec4 v0x231fe70_0, 0; + %load/vec4 v0x231ff50_0; + %load/vec4 v0x231b630_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd2b70_0; + %load/vec4 v0x231b630_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd2b70_0; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231b630_0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.68; T_19.67 ; - %load/vec4 v0x1dd5870_0; + %load/vec4 v0x231e330_0; %flag_set/vec4 8; %jmp/0xz T_19.69, 8; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_19.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.72; T_19.71 ; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_19.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.74; T_19.73 ; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_19.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.76; T_19.75 ; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_19.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; T_19.77 ; T_19.76 ; T_19.74 ; T_19.72 ; %jmp T_19.70; T_19.69 ; - %load/vec4 v0x1dd2b70_0; - %assign/vec4 v0x1dd73b0_0, 0; + %load/vec4 v0x231b630_0; + %assign/vec4 v0x231fe70_0, 0; T_19.70 ; T_19.68 ; T_19.66 ; T_19.62 ; T_19.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.7; T_19.7 ; %pop/vec4 1; %jmp T_19.3; T_19.1 ; - %load/vec4 v0x1dd62d0_0; + %load/vec4 v0x231ed90_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -6677,82 +6676,82 @@ T_19.1 ; %jmp/1 T_19.81, 6; %jmp T_19.82; T_19.79 ; - %load/vec4 v0x1dd6900_0; + %load/vec4 v0x231f3c0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_19.83, 4; - %load/vec4 v0x1dd56f0_0; + %load/vec4 v0x231e1b0_0; %flag_set/vec4 8; %jmp/0xz T_19.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; + %assign/vec4 v0x231eb70_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd7110_0, 0, 4; - %load/vec4 v0x1dd63b0_0; + %store/vec4 v0x231fbd0_0, 0, 4; + %load/vec4 v0x231ee70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_19.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.88; T_19.87 ; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_19.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.90; T_19.89 ; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_19.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.92; T_19.91 ; - %load/vec4 v0x1dd63b0_0; + %load/vec4 v0x231ee70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_19.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; T_19.93 ; T_19.92 ; T_19.90 ; @@ -6760,54 +6759,54 @@ T_19.88 ; T_19.85 ; %jmp T_19.84; T_19.83 ; - %load/vec4 v0x1dd63b0_0; - %load/vec4 v0x1dd6900_0; + %load/vec4 v0x231ee70_0; + %load/vec4 v0x231f3c0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_19.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; - %load/vec4 v0x1dd6900_0; + %assign/vec4 v0x231eb70_0, 0; + %load/vec4 v0x231f3c0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1dd6aa0, 4; - %assign/vec4 v0x1dd69c0_0, 0; + %load/vec4a v0x231f560, 4; + %assign/vec4 v0x231f480_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd6900_0; + %load/vec4 v0x231f3c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd6860_0, 4, 5; + %assign/vec4/off/d v0x231f320_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dd6900_0; + %load/vec4 v0x231f3c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1dd7110_0, 4, 5; - %load/vec4 v0x1dd6900_0; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4/off/d v0x231fbd0_0, 4, 5; + %load/vec4 v0x231f3c0_0; + %assign/vec4 v0x231e8d0_0, 0; T_19.95 ; T_19.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.82; T_19.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.82; T_19.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.82; T_19.82 ; %pop/vec4 1; %jmp T_19.3; T_19.2 ; - %load/vec4 v0x1dd62d0_0; + %load/vec4 v0x231ed90_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -6823,93 +6822,93 @@ T_19.2 ; %jmp T_19.100; T_19.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.100; T_19.98 ; - %load/vec4 v0x1dd73b0_0; + %load/vec4 v0x231fe70_0; %cmpi/e 7, 0, 3; %jmp/0xz T_19.101, 4; - %load/vec4 v0x1dd5870_0; + %load/vec4 v0x231e330_0; %flag_set/vec4 8; %jmp/0xz T_19.103, 8; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_19.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.106; T_19.105 ; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_19.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.108; T_19.107 ; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_19.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; %jmp T_19.110; T_19.109 ; - %load/vec4 v0x1dd47a0_0; + %load/vec4 v0x231d260_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_19.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dd73b0_0, 0; + %assign/vec4 v0x231fe70_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1dd7030_0, 4, 5; - %load/vec4 v0x1dd7490_0; + %assign/vec4/off/d v0x231faf0_0, 4, 5; + %load/vec4 v0x231ff50_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1dd6190, 0, 4; + %assign/vec4/a/d v0x231ec50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231e8d0_0, 0; T_19.111 ; T_19.110 ; T_19.108 ; @@ -6917,33 +6916,33 @@ T_19.106 ; T_19.103 ; T_19.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.100; T_19.99 ; - %load/vec4 v0x1dd73b0_0; + %load/vec4 v0x231fe70_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_19.113, 4; - %load/vec4 v0x1dd71f0_0; - %load/vec4 v0x1dd73b0_0; + %load/vec4 v0x231fcb0_0; + %load/vec4 v0x231fe70_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_19.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1dd73b0_0; + %load/vec4 v0x231fe70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1dd7030_0, 4, 1; + %store/vec4 v0x231faf0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dd60b0_0, 0; - %load/vec4 v0x1dd73b0_0; - %assign/vec4 v0x1dd5e10_0, 0; + %assign/vec4 v0x231eb70_0, 0; + %load/vec4 v0x231fe70_0; + %assign/vec4 v0x231e8d0_0, 0; T_19.115 ; T_19.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dd62d0_0, 0; + %assign/vec4 v0x231ed90_0, 0; %jmp T_19.100; T_19.100 ; %pop/vec4 1; @@ -6952,19 +6951,19 @@ T_19.3 ; %pop/vec4 1; %jmp T_19; .thread T_19; - .scope S_0x1dd23d0; + .scope S_0x231ae90; T_20 ; - %wait E_0x1dd2730; - %load/vec4 v0x1dd62d0_0; + %wait E_0x231b1f0; + %load/vec4 v0x231ed90_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1dd60b0_0; + %load/vec4 v0x231eb70_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1dd3000_0; + %load/vec4 v0x231bac0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -6973,62 +6972,62 @@ T_20 ; %and; %flag_set/vec4 8; %jmp/0xz T_20.0, 8; - %load/vec4 v0x1dd3000_0; - %assign/vec4 v0x1dd2f20_0, 0; + %load/vec4 v0x231bac0_0; + %assign/vec4 v0x231b9e0_0, 0; T_20.0 ; - %load/vec4 v0x1dd62d0_0; + %load/vec4 v0x231ed90_0; %cmpi/e 0, 0, 3; %jmp/0xz T_20.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1dd6860_0, 0, 4; + %store/vec4 v0x231f320_0, 0, 4; T_20.2 ; %jmp T_20; .thread T_20; - .scope S_0x1df1180; + .scope S_0x2339c40; T_21 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1df4cf0_0, 0, 3; + %store/vec4 v0x233d7b0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1df4f40_0, 0, 3; + %store/vec4 v0x233da00_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1df4a50_0, 0, 3; + %store/vec4 v0x233d510_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1df1670_0, 0, 11; + %store/vec4 v0x233a130_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1df1770_0, 0, 11; + %store/vec4 v0x233a230_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df1c00_0, 0, 4; + %store/vec4 v0x233a6c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df54d0_0, 0, 4; + %store/vec4 v0x233df90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df5d40_0, 0, 4; + %store/vec4 v0x233e800_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df5f00_0, 0, 4; + %store/vec4 v0x233e9c0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df5c60_0, 0, 4; + %store/vec4 v0x233e720_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1df4dd0, 4, 0; + %store/vec4a v0x233d890, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1df4dd0, 4, 0; + %store/vec4a v0x233d890, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1df4dd0, 4, 0; + %store/vec4a v0x233d890, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1df4dd0, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1df1390, v0x1df4990 {0 0 0}; + %store/vec4a v0x233d890, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x2339e50, v0x233d450 {0 0 0}; %end; .thread T_21; - .scope S_0x1df1180; + .scope S_0x2339c40; T_22 ; - %wait E_0x1dd2930; - %load/vec4 v0x1df4cf0_0; + %wait E_0x231b3f0; + %load/vec4 v0x233d7b0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -7043,7 +7042,7 @@ T_22 ; %jmp/1 T_22.2, 6; %jmp T_22.3; T_22.0 ; - %load/vec4 v0x1df4f40_0; + %load/vec4 v0x233da00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -7058,185 +7057,185 @@ T_22.0 ; %jmp/1 T_22.6, 6; %jmp T_22.7; T_22.4 ; - %load/vec4 v0x1df19f0_0; + %load/vec4 v0x233a4b0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_22.8, 5; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_22.10, 5; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %jmp T_22.11; T_22.10 ; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_22.12, 5; - %load/vec4 v0x1df5020_0; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233dae0_0; + %load/vec4 v0x233a880_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_22.14, 8; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; - %load/vec4 v0x1df1dc0_0; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4/off/d v0x233df90_0, 4, 5; + %load/vec4 v0x233a880_0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.15; T_22.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; - %load/vec4 v0x1df1dc0_0; - %assign/vec4 v0x1df5570_0, 0; + %assign/vec4 v0x233d7b0_0, 0; + %load/vec4 v0x233a880_0; + %assign/vec4 v0x233e030_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; - %load/vec4 v0x1df1dc0_0; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4/off/d v0x233e800_0, 4, 5; + %load/vec4 v0x233a880_0; + %assign/vec4 v0x233d510_0, 0; T_22.15 ; %jmp T_22.13; T_22.12 ; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %cmpi/e 6, 0, 3; %jmp/0xz T_22.16, 4; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %cmpi/e 0, 0, 3; %jmp/0xz T_22.18, 4; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %jmp T_22.19; T_22.18 ; - %load/vec4 v0x1df5020_0; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233dae0_0; + %load/vec4 v0x233d510_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_22.20, 8; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %jmp T_22.21; T_22.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; - %load/vec4 v0x1df4a50_0; - %assign/vec4 v0x1df5570_0, 0; + %assign/vec4 v0x233d7b0_0, 0; + %load/vec4 v0x233d510_0; + %assign/vec4 v0x233e030_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %assign/vec4/off/d v0x233e800_0, 4, 5; T_22.21 ; T_22.19 ; %jmp T_22.17; T_22.16 ; - %load/vec4 v0x1df1dc0_0; + %load/vec4 v0x233a880_0; %cmpi/e 7, 0, 3; %jmp/0xz T_22.22, 4; - %load/vec4 v0x1df43d0_0; + %load/vec4 v0x233ce90_0; %flag_set/vec4 8; %jmp/0xz T_22.24, 8; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_22.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.27; T_22.26 ; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_22.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.29; T_22.28 ; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_22.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.31; T_22.30 ; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_22.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; T_22.32 ; T_22.31 ; T_22.29 ; @@ -7244,29 +7243,29 @@ T_22.27 ; %jmp T_22.25; T_22.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; - %load/vec4 v0x1df1dc0_0; - %assign/vec4 v0x1df5570_0, 0; + %assign/vec4 v0x233d7b0_0, 0; + %load/vec4 v0x233a880_0; + %assign/vec4 v0x233e030_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %assign/vec4/off/d v0x233e800_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %assign/vec4/off/d v0x233e800_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %assign/vec4/off/d v0x233e800_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; + %assign/vec4/off/d v0x233e800_0, 4, 5; T_22.25 ; T_22.22 ; T_22.17 ; @@ -7274,10 +7273,10 @@ T_22.13 ; T_22.11 ; T_22.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.7; T_22.5 ; - %load/vec4 v0x1df19f0_0; + %load/vec4 v0x233a4b0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -7344,180 +7343,180 @@ T_22.5 ; %jmp/1 T_22.49, 6; %jmp T_22.50; T_22.34 ; - %load/vec4 v0x1df1670_0; - %load/vec4 v0x1df5610_0; + %load/vec4 v0x233a130_0; + %load/vec4 v0x233e0d0_0; %add; - %assign/vec4 v0x1df1670_0, 0; - %load/vec4 v0x1df1c00_0; + %assign/vec4 v0x233a130_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.35 ; - %load/vec4 v0x1df1670_0; - %load/vec4 v0x1df5610_0; + %load/vec4 v0x233a130_0; + %load/vec4 v0x233e0d0_0; %sub; - %assign/vec4 v0x1df1670_0, 0; - %load/vec4 v0x1df1c00_0; + %assign/vec4 v0x233a130_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.36 ; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a6c0_0; %pad/u 11; - %load/vec4 v0x1df5610_0; + %load/vec4 v0x233e0d0_0; %add; %pad/u 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.37 ; - %load/vec4 v0x1df5610_0; - %assign/vec4 v0x1df60c0_0, 0; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233e0d0_0; + %assign/vec4 v0x233eb80_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.38 ; - %load/vec4 v0x1df1910_0; - %assign/vec4 v0x1df60c0_0, 0; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a3d0_0; + %assign/vec4 v0x233eb80_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.39 ; - %load/vec4 v0x1df1670_0; - %load/vec4 v0x1df1910_0; + %load/vec4 v0x233a130_0; + %load/vec4 v0x233a3d0_0; %add; - %assign/vec4 v0x1df1670_0, 0; - %load/vec4 v0x1df1c00_0; + %assign/vec4 v0x233a130_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.40 ; - %load/vec4 v0x1df1670_0; - %load/vec4 v0x1df1910_0; + %load/vec4 v0x233a130_0; + %load/vec4 v0x233a3d0_0; %sub; - %assign/vec4 v0x1df1670_0, 0; - %load/vec4 v0x1df1c00_0; + %assign/vec4 v0x233a130_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.41 ; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a6c0_0; %pad/u 11; - %load/vec4 v0x1df1910_0; + %load/vec4 v0x233a3d0_0; %add; %pad/u 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.42 ; - %load/vec4 v0x1df1770_0; - %assign/vec4 v0x1df1670_0, 0; - %load/vec4 v0x1df1670_0; - %assign/vec4 v0x1df1770_0, 0; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a230_0; + %assign/vec4 v0x233a130_0, 0; + %load/vec4 v0x233a130_0; + %assign/vec4 v0x233a230_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.43 ; - %load/vec4 v0x1df1670_0; - %assign/vec4 v0x1df1770_0, 0; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a130_0; + %assign/vec4 v0x233a230_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.44 ; - %load/vec4 v0x1df1670_0; + %load/vec4 v0x233a130_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1df1670_0, 0; - %load/vec4 v0x1df1c00_0; + %assign/vec4 v0x233a130_0, 0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.45 ; - %load/vec4 v0x1df1b20_0; - %assign/vec4 v0x1df1ce0_0, 0; + %load/vec4 v0x233a5e0_0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.50; T_22.46 ; - %load/vec4 v0x1df1670_0; + %load/vec4 v0x233a130_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_22.51, 4; - %load/vec4 v0x1df1b20_0; - %assign/vec4 v0x1df1ce0_0, 0; + %load/vec4 v0x233a5e0_0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.52; T_22.51 ; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; T_22.52 ; %jmp T_22.50; T_22.47 ; - %load/vec4 v0x1df1670_0; + %load/vec4 v0x233a130_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_22.53, 4; - %load/vec4 v0x1df1b20_0; - %assign/vec4 v0x1df1ce0_0, 0; + %load/vec4 v0x233a5e0_0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.54; T_22.53 ; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; T_22.54 ; %jmp T_22.50; T_22.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1df1670_0; + %load/vec4 v0x233a130_0; %pad/s 32; %cmp/s; %jmp/0xz T_22.55, 5; - %load/vec4 v0x1df1b20_0; - %assign/vec4 v0x1df1ce0_0, 0; + %load/vec4 v0x233a5e0_0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.56; T_22.55 ; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; T_22.56 ; %jmp T_22.50; T_22.49 ; - %load/vec4 v0x1df1670_0; + %load/vec4 v0x233a130_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_22.57, 5; - %load/vec4 v0x1df1b20_0; - %assign/vec4 v0x1df1ce0_0, 0; + %load/vec4 v0x233a5e0_0; + %assign/vec4 v0x233a7a0_0, 0; %jmp T_22.58; T_22.57 ; - %load/vec4 v0x1df1c00_0; + %load/vec4 v0x233a6c0_0; %addi 1, 0, 4; - %assign/vec4 v0x1df1ce0_0, 0; + %assign/vec4 v0x233a7a0_0, 0; T_22.58 ; %jmp T_22.50; T_22.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.7; T_22.6 ; - %load/vec4 v0x1df19f0_0; + %load/vec4 v0x233a4b0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1df19f0_0; + %load/vec4 v0x233a4b0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_22.59, 4; - %load/vec4 v0x1df1850_0; + %load/vec4 v0x233a310_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1df1850_0; + %load/vec4 v0x233a310_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -7525,162 +7524,162 @@ T_22.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_22.61, 9; - %load/vec4 v0x1df1850_0; + %load/vec4 v0x233a310_0; %cmpi/e 1, 0, 3; %jmp/0xz T_22.63, 4; - %load/vec4 v0x1df60c0_0; - %assign/vec4 v0x1df1670_0, 0; + %load/vec4 v0x233eb80_0; + %assign/vec4 v0x233a130_0, 0; T_22.63 ; %jmp T_22.62; T_22.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; - %load/vec4 v0x1df1850_0; + %assign/vec4 v0x233d7b0_0, 0; + %load/vec4 v0x233a310_0; %cmpi/e 6, 0, 3; %jmp/0xz T_22.65, 4; - %load/vec4 v0x1df4a50_0; - %assign/vec4 v0x1df5fe0_0, 0; - %load/vec4 v0x1df60c0_0; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; + %assign/vec4 v0x233eaa0_0, 0; + %load/vec4 v0x233eb80_0; + %load/vec4 v0x233d510_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df4a50_0; + %load/vec4 v0x233d510_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; + %assign/vec4/off/d v0x233e720_0, 4, 5; %jmp T_22.66; T_22.65 ; - %load/vec4 v0x1df1850_0; + %load/vec4 v0x233a310_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_22.67, 4; - %load/vec4 v0x1df1850_0; - %assign/vec4 v0x1df5fe0_0, 0; - %load/vec4 v0x1df60c0_0; - %load/vec4 v0x1df1850_0; + %load/vec4 v0x233a310_0; + %assign/vec4 v0x233eaa0_0, 0; + %load/vec4 v0x233eb80_0; + %load/vec4 v0x233a310_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df1850_0; + %load/vec4 v0x233a310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df1850_0; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233a310_0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.68; T_22.67 ; - %load/vec4 v0x1df4550_0; + %load/vec4 v0x233d010_0; %flag_set/vec4 8; %jmp/0xz T_22.69, 8; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_22.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.72; T_22.71 ; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_22.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.74; T_22.73 ; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_22.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.76; T_22.75 ; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_22.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; T_22.77 ; T_22.76 ; T_22.74 ; T_22.72 ; %jmp T_22.70; T_22.69 ; - %load/vec4 v0x1df1850_0; - %assign/vec4 v0x1df5fe0_0, 0; + %load/vec4 v0x233a310_0; + %assign/vec4 v0x233eaa0_0, 0; T_22.70 ; T_22.68 ; T_22.66 ; T_22.62 ; T_22.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.7; T_22.7 ; %pop/vec4 1; %jmp T_22.3; T_22.1 ; - %load/vec4 v0x1df4f40_0; + %load/vec4 v0x233da00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -7695,82 +7694,82 @@ T_22.1 ; %jmp/1 T_22.81, 6; %jmp T_22.82; T_22.79 ; - %load/vec4 v0x1df5570_0; + %load/vec4 v0x233e030_0; %cmpi/e 7, 0, 3; %jmp/0xz T_22.83, 4; - %load/vec4 v0x1df43d0_0; + %load/vec4 v0x233ce90_0; %flag_set/vec4 8; %jmp/0xz T_22.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; + %assign/vec4 v0x233d7b0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df5d40_0, 0, 4; - %load/vec4 v0x1df5020_0; + %store/vec4 v0x233e800_0, 0, 4; + %load/vec4 v0x233dae0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_22.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.88; T_22.87 ; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_22.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.90; T_22.89 ; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_22.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.92; T_22.91 ; - %load/vec4 v0x1df5020_0; + %load/vec4 v0x233dae0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_22.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; T_22.93 ; T_22.92 ; T_22.90 ; @@ -7778,54 +7777,54 @@ T_22.88 ; T_22.85 ; %jmp T_22.84; T_22.83 ; - %load/vec4 v0x1df5020_0; - %load/vec4 v0x1df5570_0; + %load/vec4 v0x233dae0_0; + %load/vec4 v0x233e030_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_22.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; - %load/vec4 v0x1df5570_0; + %assign/vec4 v0x233d7b0_0, 0; + %load/vec4 v0x233e030_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df56f0, 4; - %assign/vec4 v0x1df5610_0, 0; + %load/vec4a v0x233e1b0, 4; + %assign/vec4 v0x233e0d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df5570_0; + %load/vec4 v0x233e030_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df54d0_0, 4, 5; + %assign/vec4/off/d v0x233df90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df5570_0; + %load/vec4 v0x233e030_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df5d40_0, 4, 5; - %load/vec4 v0x1df5570_0; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4/off/d v0x233e800_0, 4, 5; + %load/vec4 v0x233e030_0; + %assign/vec4 v0x233d510_0, 0; T_22.95 ; T_22.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.82; T_22.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.82; T_22.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.82; T_22.82 ; %pop/vec4 1; %jmp T_22.3; T_22.2 ; - %load/vec4 v0x1df4f40_0; + %load/vec4 v0x233da00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -7841,93 +7840,93 @@ T_22.2 ; %jmp T_22.100; T_22.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.100; T_22.98 ; - %load/vec4 v0x1df5fe0_0; + %load/vec4 v0x233eaa0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_22.101, 4; - %load/vec4 v0x1df4550_0; + %load/vec4 v0x233d010_0; %flag_set/vec4 8; %jmp/0xz T_22.103, 8; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_22.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.106; T_22.105 ; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_22.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.108; T_22.107 ; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_22.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; %jmp T_22.110; T_22.109 ; - %load/vec4 v0x1df3480_0; + %load/vec4 v0x233bf40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_22.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df5fe0_0, 0; + %assign/vec4 v0x233eaa0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df5c60_0, 4, 5; - %load/vec4 v0x1df60c0_0; + %assign/vec4/off/d v0x233e720_0, 4, 5; + %load/vec4 v0x233eb80_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1df4dd0, 0, 4; + %assign/vec4/a/d v0x233d890, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d510_0, 0; T_22.111 ; T_22.110 ; T_22.108 ; @@ -7935,33 +7934,33 @@ T_22.106 ; T_22.103 ; T_22.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.100; T_22.99 ; - %load/vec4 v0x1df5fe0_0; + %load/vec4 v0x233eaa0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_22.113, 4; - %load/vec4 v0x1df5e20_0; - %load/vec4 v0x1df5fe0_0; + %load/vec4 v0x233e8e0_0; + %load/vec4 v0x233eaa0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_22.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1df5fe0_0; + %load/vec4 v0x233eaa0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1df5c60_0, 4, 1; + %store/vec4 v0x233e720_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df4cf0_0, 0; - %load/vec4 v0x1df5fe0_0; - %assign/vec4 v0x1df4a50_0, 0; + %assign/vec4 v0x233d7b0_0, 0; + %load/vec4 v0x233eaa0_0; + %assign/vec4 v0x233d510_0, 0; T_22.115 ; T_22.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1df4f40_0, 0; + %assign/vec4 v0x233da00_0, 0; %jmp T_22.100; T_22.100 ; %pop/vec4 1; @@ -7970,19 +7969,19 @@ T_22.3 ; %pop/vec4 1; %jmp T_22; .thread T_22; - .scope S_0x1df1180; + .scope S_0x2339c40; T_23 ; - %wait E_0x1dd2730; - %load/vec4 v0x1df4f40_0; + %wait E_0x231b1f0; + %load/vec4 v0x233da00_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1df4cf0_0; + %load/vec4 v0x233d7b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1df1ce0_0; + %load/vec4 v0x233a7a0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -7991,62 +7990,62 @@ T_23 ; %and; %flag_set/vec4 8; %jmp/0xz T_23.0, 8; - %load/vec4 v0x1df1ce0_0; - %assign/vec4 v0x1df1c00_0, 0; + %load/vec4 v0x233a7a0_0; + %assign/vec4 v0x233a6c0_0, 0; T_23.0 ; - %load/vec4 v0x1df4f40_0; + %load/vec4 v0x233da00_0; %cmpi/e 0, 0, 3; %jmp/0xz T_23.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df54d0_0, 0, 4; + %store/vec4 v0x233df90_0, 0, 4; T_23.2 ; %jmp T_23; .thread T_23; - .scope S_0x1debf90; + .scope S_0x2334a50; T_24 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1defb80_0, 0, 3; + %store/vec4 v0x2338640_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1defda0_0, 0, 3; + %store/vec4 v0x2338860_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1def8e0_0, 0, 3; + %store/vec4 v0x23383a0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dec480_0, 0, 11; + %store/vec4 v0x2334f40_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1dec580_0, 0, 11; + %store/vec4 v0x2335040_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1deca10_0, 0, 4; + %store/vec4 v0x23354d0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df0330_0, 0, 4; + %store/vec4 v0x2338df0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df0b80_0, 0, 4; + %store/vec4 v0x2339640_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df0d40_0, 0, 4; + %store/vec4 v0x2339800_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df0ac0_0, 0, 4; + %store/vec4 v0x2339580_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1defc60, 4, 0; + %store/vec4a v0x2338720, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1defc60, 4, 0; + %store/vec4a v0x2338720, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1defc60, 4, 0; + %store/vec4a v0x2338720, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1defc60, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1dec1a0, v0x1def820 {0 0 0}; + %store/vec4a v0x2338720, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x2334c60, v0x23382e0 {0 0 0}; %end; .thread T_24; - .scope S_0x1debf90; + .scope S_0x2334a50; T_25 ; - %wait E_0x1dd2930; - %load/vec4 v0x1defb80_0; + %wait E_0x231b3f0; + %load/vec4 v0x2338640_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -8061,7 +8060,7 @@ T_25 ; %jmp/1 T_25.2, 6; %jmp T_25.3; T_25.0 ; - %load/vec4 v0x1defda0_0; + %load/vec4 v0x2338860_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -8076,185 +8075,185 @@ T_25.0 ; %jmp/1 T_25.6, 6; %jmp T_25.7; T_25.4 ; - %load/vec4 v0x1dec800_0; + %load/vec4 v0x23352c0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_25.8, 5; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_25.10, 5; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %jmp T_25.11; T_25.10 ; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_25.12, 5; - %load/vec4 v0x1defe80_0; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2338940_0; + %load/vec4 v0x2335690_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_25.14, 8; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0330_0, 4, 5; - %load/vec4 v0x1decbd0_0; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4/off/d v0x2338df0_0, 4, 5; + %load/vec4 v0x2335690_0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.15; T_25.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1defb80_0, 0; - %load/vec4 v0x1decbd0_0; - %assign/vec4 v0x1df03d0_0, 0; + %assign/vec4 v0x2338640_0, 0; + %load/vec4 v0x2335690_0; + %assign/vec4 v0x2338e90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; - %load/vec4 v0x1decbd0_0; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4/off/d v0x2339640_0, 4, 5; + %load/vec4 v0x2335690_0; + %assign/vec4 v0x23383a0_0, 0; T_25.15 ; %jmp T_25.13; T_25.12 ; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %cmpi/e 6, 0, 3; %jmp/0xz T_25.16, 4; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_25.18, 4; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %jmp T_25.19; T_25.18 ; - %load/vec4 v0x1defe80_0; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x2338940_0; + %load/vec4 v0x23383a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_25.20, 8; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %jmp T_25.21; T_25.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1defb80_0, 0; - %load/vec4 v0x1def8e0_0; - %assign/vec4 v0x1df03d0_0, 0; + %assign/vec4 v0x2338640_0, 0; + %load/vec4 v0x23383a0_0; + %assign/vec4 v0x2338e90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %assign/vec4/off/d v0x2339640_0, 4, 5; T_25.21 ; T_25.19 ; %jmp T_25.17; T_25.16 ; - %load/vec4 v0x1decbd0_0; + %load/vec4 v0x2335690_0; %cmpi/e 7, 0, 3; %jmp/0xz T_25.22, 4; - %load/vec4 v0x1def1e0_0; + %load/vec4 v0x2337ca0_0; %flag_set/vec4 8; %jmp/0xz T_25.24, 8; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_25.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.27; T_25.26 ; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_25.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.29; T_25.28 ; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_25.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.31; T_25.30 ; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_25.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; T_25.32 ; T_25.31 ; T_25.29 ; @@ -8262,29 +8261,29 @@ T_25.27 ; %jmp T_25.25; T_25.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1defb80_0, 0; - %load/vec4 v0x1decbd0_0; - %assign/vec4 v0x1df03d0_0, 0; + %assign/vec4 v0x2338640_0, 0; + %load/vec4 v0x2335690_0; + %assign/vec4 v0x2338e90_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %assign/vec4/off/d v0x2339640_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %assign/vec4/off/d v0x2339640_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %assign/vec4/off/d v0x2339640_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; + %assign/vec4/off/d v0x2339640_0, 4, 5; T_25.25 ; T_25.22 ; T_25.17 ; @@ -8292,10 +8291,10 @@ T_25.13 ; T_25.11 ; T_25.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.7; T_25.5 ; - %load/vec4 v0x1dec800_0; + %load/vec4 v0x23352c0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -8362,180 +8361,180 @@ T_25.5 ; %jmp/1 T_25.49, 6; %jmp T_25.50; T_25.34 ; - %load/vec4 v0x1dec480_0; - %load/vec4 v0x1df0470_0; + %load/vec4 v0x2334f40_0; + %load/vec4 v0x2338f30_0; %add; - %assign/vec4 v0x1dec480_0, 0; - %load/vec4 v0x1deca10_0; + %assign/vec4 v0x2334f40_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.35 ; - %load/vec4 v0x1dec480_0; - %load/vec4 v0x1df0470_0; + %load/vec4 v0x2334f40_0; + %load/vec4 v0x2338f30_0; %sub; - %assign/vec4 v0x1dec480_0, 0; - %load/vec4 v0x1deca10_0; + %assign/vec4 v0x2334f40_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.36 ; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23354d0_0; %pad/u 11; - %load/vec4 v0x1df0470_0; + %load/vec4 v0x2338f30_0; %add; %pad/u 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.37 ; - %load/vec4 v0x1df0470_0; - %assign/vec4 v0x1df0f00_0, 0; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x2338f30_0; + %assign/vec4 v0x23399c0_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.38 ; - %load/vec4 v0x1dec720_0; - %assign/vec4 v0x1df0f00_0, 0; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23351e0_0; + %assign/vec4 v0x23399c0_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.39 ; - %load/vec4 v0x1dec480_0; - %load/vec4 v0x1dec720_0; + %load/vec4 v0x2334f40_0; + %load/vec4 v0x23351e0_0; %add; - %assign/vec4 v0x1dec480_0, 0; - %load/vec4 v0x1deca10_0; + %assign/vec4 v0x2334f40_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.40 ; - %load/vec4 v0x1dec480_0; - %load/vec4 v0x1dec720_0; + %load/vec4 v0x2334f40_0; + %load/vec4 v0x23351e0_0; %sub; - %assign/vec4 v0x1dec480_0, 0; - %load/vec4 v0x1deca10_0; + %assign/vec4 v0x2334f40_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.41 ; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23354d0_0; %pad/u 11; - %load/vec4 v0x1dec720_0; + %load/vec4 v0x23351e0_0; %add; %pad/u 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.42 ; - %load/vec4 v0x1dec580_0; - %assign/vec4 v0x1dec480_0, 0; - %load/vec4 v0x1dec480_0; - %assign/vec4 v0x1dec580_0, 0; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x2335040_0; + %assign/vec4 v0x2334f40_0, 0; + %load/vec4 v0x2334f40_0; + %assign/vec4 v0x2335040_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.43 ; - %load/vec4 v0x1dec480_0; - %assign/vec4 v0x1dec580_0, 0; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x2334f40_0; + %assign/vec4 v0x2335040_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.44 ; - %load/vec4 v0x1dec480_0; + %load/vec4 v0x2334f40_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1dec480_0, 0; - %load/vec4 v0x1deca10_0; + %assign/vec4 v0x2334f40_0, 0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.45 ; - %load/vec4 v0x1dec930_0; - %assign/vec4 v0x1decaf0_0, 0; + %load/vec4 v0x23353f0_0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.50; T_25.46 ; - %load/vec4 v0x1dec480_0; + %load/vec4 v0x2334f40_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_25.51, 4; - %load/vec4 v0x1dec930_0; - %assign/vec4 v0x1decaf0_0, 0; + %load/vec4 v0x23353f0_0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.52; T_25.51 ; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; T_25.52 ; %jmp T_25.50; T_25.47 ; - %load/vec4 v0x1dec480_0; + %load/vec4 v0x2334f40_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_25.53, 4; - %load/vec4 v0x1dec930_0; - %assign/vec4 v0x1decaf0_0, 0; + %load/vec4 v0x23353f0_0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.54; T_25.53 ; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; T_25.54 ; %jmp T_25.50; T_25.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1dec480_0; + %load/vec4 v0x2334f40_0; %pad/s 32; %cmp/s; %jmp/0xz T_25.55, 5; - %load/vec4 v0x1dec930_0; - %assign/vec4 v0x1decaf0_0, 0; + %load/vec4 v0x23353f0_0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.56; T_25.55 ; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; T_25.56 ; %jmp T_25.50; T_25.49 ; - %load/vec4 v0x1dec480_0; + %load/vec4 v0x2334f40_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_25.57, 5; - %load/vec4 v0x1dec930_0; - %assign/vec4 v0x1decaf0_0, 0; + %load/vec4 v0x23353f0_0; + %assign/vec4 v0x23355b0_0, 0; %jmp T_25.58; T_25.57 ; - %load/vec4 v0x1deca10_0; + %load/vec4 v0x23354d0_0; %addi 1, 0, 4; - %assign/vec4 v0x1decaf0_0, 0; + %assign/vec4 v0x23355b0_0, 0; T_25.58 ; %jmp T_25.50; T_25.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.7; T_25.6 ; - %load/vec4 v0x1dec800_0; + %load/vec4 v0x23352c0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1dec800_0; + %load/vec4 v0x23352c0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_25.59, 4; - %load/vec4 v0x1dec660_0; + %load/vec4 v0x2335120_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1dec660_0; + %load/vec4 v0x2335120_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -8543,162 +8542,162 @@ T_25.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_25.61, 9; - %load/vec4 v0x1dec660_0; + %load/vec4 v0x2335120_0; %cmpi/e 1, 0, 3; %jmp/0xz T_25.63, 4; - %load/vec4 v0x1df0f00_0; - %assign/vec4 v0x1dec480_0, 0; + %load/vec4 v0x23399c0_0; + %assign/vec4 v0x2334f40_0, 0; T_25.63 ; %jmp T_25.62; T_25.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1defb80_0, 0; - %load/vec4 v0x1dec660_0; + %assign/vec4 v0x2338640_0, 0; + %load/vec4 v0x2335120_0; %cmpi/e 6, 0, 3; %jmp/0xz T_25.65, 4; - %load/vec4 v0x1def8e0_0; - %assign/vec4 v0x1df0e20_0, 0; - %load/vec4 v0x1df0f00_0; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; + %assign/vec4 v0x23398e0_0, 0; + %load/vec4 v0x23399c0_0; + %load/vec4 v0x23383a0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1def8e0_0; + %load/vec4 v0x23383a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; + %assign/vec4/off/d v0x2339580_0, 4, 5; %jmp T_25.66; T_25.65 ; - %load/vec4 v0x1dec660_0; + %load/vec4 v0x2335120_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_25.67, 4; - %load/vec4 v0x1dec660_0; - %assign/vec4 v0x1df0e20_0, 0; - %load/vec4 v0x1df0f00_0; - %load/vec4 v0x1dec660_0; + %load/vec4 v0x2335120_0; + %assign/vec4 v0x23398e0_0, 0; + %load/vec4 v0x23399c0_0; + %load/vec4 v0x2335120_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dec660_0; + %load/vec4 v0x2335120_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1dec660_0; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x2335120_0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.68; T_25.67 ; - %load/vec4 v0x1def360_0; + %load/vec4 v0x2337e20_0; %flag_set/vec4 8; %jmp/0xz T_25.69, 8; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_25.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.72; T_25.71 ; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_25.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.74; T_25.73 ; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_25.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.76; T_25.75 ; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_25.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; T_25.77 ; T_25.76 ; T_25.74 ; T_25.72 ; %jmp T_25.70; T_25.69 ; - %load/vec4 v0x1dec660_0; - %assign/vec4 v0x1df0e20_0, 0; + %load/vec4 v0x2335120_0; + %assign/vec4 v0x23398e0_0, 0; T_25.70 ; T_25.68 ; T_25.66 ; T_25.62 ; T_25.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.7; T_25.7 ; %pop/vec4 1; %jmp T_25.3; T_25.1 ; - %load/vec4 v0x1defda0_0; + %load/vec4 v0x2338860_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -8713,82 +8712,82 @@ T_25.1 ; %jmp/1 T_25.81, 6; %jmp T_25.82; T_25.79 ; - %load/vec4 v0x1df03d0_0; + %load/vec4 v0x2338e90_0; %cmpi/e 7, 0, 3; %jmp/0xz T_25.83, 4; - %load/vec4 v0x1def1e0_0; + %load/vec4 v0x2337ca0_0; %flag_set/vec4 8; %jmp/0xz T_25.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1defb80_0, 0; + %assign/vec4 v0x2338640_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df0b80_0, 0, 4; - %load/vec4 v0x1defe80_0; + %store/vec4 v0x2339640_0, 0, 4; + %load/vec4 v0x2338940_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_25.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.88; T_25.87 ; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_25.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.90; T_25.89 ; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_25.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.92; T_25.91 ; - %load/vec4 v0x1defe80_0; + %load/vec4 v0x2338940_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_25.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; T_25.93 ; T_25.92 ; T_25.90 ; @@ -8796,54 +8795,54 @@ T_25.88 ; T_25.85 ; %jmp T_25.84; T_25.83 ; - %load/vec4 v0x1defe80_0; - %load/vec4 v0x1df03d0_0; + %load/vec4 v0x2338940_0; + %load/vec4 v0x2338e90_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_25.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1defb80_0, 0; - %load/vec4 v0x1df03d0_0; + %assign/vec4 v0x2338640_0, 0; + %load/vec4 v0x2338e90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1df0530, 4; - %assign/vec4 v0x1df0470_0, 0; + %load/vec4a v0x2338ff0, 4; + %assign/vec4 v0x2338f30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df03d0_0; + %load/vec4 v0x2338e90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0330_0, 4, 5; + %assign/vec4/off/d v0x2338df0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1df03d0_0; + %load/vec4 v0x2338e90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1df0b80_0, 4, 5; - %load/vec4 v0x1df03d0_0; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4/off/d v0x2339640_0, 4, 5; + %load/vec4 v0x2338e90_0; + %assign/vec4 v0x23383a0_0, 0; T_25.95 ; T_25.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.82; T_25.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.82; T_25.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.82; T_25.82 ; %pop/vec4 1; %jmp T_25.3; T_25.2 ; - %load/vec4 v0x1defda0_0; + %load/vec4 v0x2338860_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -8859,93 +8858,93 @@ T_25.2 ; %jmp T_25.100; T_25.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.100; T_25.98 ; - %load/vec4 v0x1df0e20_0; + %load/vec4 v0x23398e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_25.101, 4; - %load/vec4 v0x1def360_0; + %load/vec4 v0x2337e20_0; %flag_set/vec4 8; %jmp/0xz T_25.103, 8; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_25.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.106; T_25.105 ; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_25.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.108; T_25.107 ; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_25.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; %jmp T_25.110; T_25.109 ; - %load/vec4 v0x1dee290_0; + %load/vec4 v0x2336d50_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_25.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1df0e20_0, 0; + %assign/vec4 v0x23398e0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1df0ac0_0, 4, 5; - %load/vec4 v0x1df0f00_0; + %assign/vec4/off/d v0x2339580_0, 4, 5; + %load/vec4 v0x23399c0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1defc60, 0, 4; + %assign/vec4/a/d v0x2338720, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x23383a0_0, 0; T_25.111 ; T_25.110 ; T_25.108 ; @@ -8953,33 +8952,33 @@ T_25.106 ; T_25.103 ; T_25.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.100; T_25.99 ; - %load/vec4 v0x1df0e20_0; + %load/vec4 v0x23398e0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_25.113, 4; - %load/vec4 v0x1df0c60_0; - %load/vec4 v0x1df0e20_0; + %load/vec4 v0x2339720_0; + %load/vec4 v0x23398e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_25.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1df0e20_0; + %load/vec4 v0x23398e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1df0ac0_0, 4, 1; + %store/vec4 v0x2339580_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1defb80_0, 0; - %load/vec4 v0x1df0e20_0; - %assign/vec4 v0x1def8e0_0, 0; + %assign/vec4 v0x2338640_0, 0; + %load/vec4 v0x23398e0_0; + %assign/vec4 v0x23383a0_0, 0; T_25.115 ; T_25.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1defda0_0, 0; + %assign/vec4 v0x2338860_0, 0; %jmp T_25.100; T_25.100 ; %pop/vec4 1; @@ -8988,19 +8987,19 @@ T_25.3 ; %pop/vec4 1; %jmp T_25; .thread T_25; - .scope S_0x1debf90; + .scope S_0x2334a50; T_26 ; - %wait E_0x1dd2730; - %load/vec4 v0x1defda0_0; + %wait E_0x231b1f0; + %load/vec4 v0x2338860_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1defb80_0; + %load/vec4 v0x2338640_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1decaf0_0; + %load/vec4 v0x23355b0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -9009,62 +9008,62 @@ T_26 ; %and; %flag_set/vec4 8; %jmp/0xz T_26.0, 8; - %load/vec4 v0x1decaf0_0; - %assign/vec4 v0x1deca10_0, 0; + %load/vec4 v0x23355b0_0; + %assign/vec4 v0x23354d0_0, 0; T_26.0 ; - %load/vec4 v0x1defda0_0; + %load/vec4 v0x2338860_0; %cmpi/e 0, 0, 3; %jmp/0xz T_26.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1df0330_0, 0, 4; + %store/vec4 v0x2338df0_0, 0, 4; T_26.2 ; %jmp T_26; .thread T_26; - .scope S_0x1ddc900; + .scope S_0x23253c0; T_27 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1de0500_0, 0, 3; + %store/vec4 v0x2328fc0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1de0720_0, 0, 3; + %store/vec4 v0x23291e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1de0260_0, 0, 3; + %store/vec4 v0x2328d20_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ddce00_0, 0, 11; + %store/vec4 v0x23258c0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ddcf00_0, 0, 11; + %store/vec4 v0x23259c0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ddd390_0, 0, 4; + %store/vec4 v0x2325e50_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de0cb0_0, 0, 4; + %store/vec4 v0x2329770_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de1520_0, 0, 4; + %store/vec4 v0x2329fe0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de16e0_0, 0, 4; + %store/vec4 v0x232a1a0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de1440_0, 0, 4; + %store/vec4 v0x2329f00_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de05e0, 4, 0; + %store/vec4a v0x23290a0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de05e0, 4, 0; + %store/vec4a v0x23290a0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de05e0, 4, 0; + %store/vec4a v0x23290a0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1de05e0, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1ddcb40, v0x1de01a0 {0 0 0}; + %store/vec4a v0x23290a0, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x2325600, v0x2328c60 {0 0 0}; %end; .thread T_27; - .scope S_0x1ddc900; + .scope S_0x23253c0; T_28 ; - %wait E_0x1dd2930; - %load/vec4 v0x1de0500_0; + %wait E_0x231b3f0; + %load/vec4 v0x2328fc0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -9079,7 +9078,7 @@ T_28 ; %jmp/1 T_28.2, 6; %jmp T_28.3; T_28.0 ; - %load/vec4 v0x1de0720_0; + %load/vec4 v0x23291e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -9094,185 +9093,185 @@ T_28.0 ; %jmp/1 T_28.6, 6; %jmp T_28.7; T_28.4 ; - %load/vec4 v0x1ddd180_0; + %load/vec4 v0x2325c40_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_28.8, 5; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_28.10, 5; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %jmp T_28.11; T_28.10 ; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_28.12, 5; - %load/vec4 v0x1de0800_0; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x23292c0_0; + %load/vec4 v0x2326010_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_28.14, 8; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; - %load/vec4 v0x1ddd550_0; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4/off/d v0x2329770_0, 4, 5; + %load/vec4 v0x2326010_0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.15; T_28.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de0500_0, 0; - %load/vec4 v0x1ddd550_0; - %assign/vec4 v0x1de0d50_0, 0; + %assign/vec4 v0x2328fc0_0, 0; + %load/vec4 v0x2326010_0; + %assign/vec4 v0x2329810_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de1520_0, 4, 5; - %load/vec4 v0x1ddd550_0; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; + %load/vec4 v0x2326010_0; + %assign/vec4 v0x2328d20_0, 0; T_28.15 ; %jmp T_28.13; T_28.12 ; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %cmpi/e 6, 0, 3; %jmp/0xz T_28.16, 4; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %cmpi/e 0, 0, 3; %jmp/0xz T_28.18, 4; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %jmp T_28.19; T_28.18 ; - %load/vec4 v0x1de0800_0; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x23292c0_0; + %load/vec4 v0x2328d20_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_28.20, 8; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %jmp T_28.21; T_28.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de0500_0, 0; - %load/vec4 v0x1de0260_0; - %assign/vec4 v0x1de0d50_0, 0; + %assign/vec4 v0x2328fc0_0, 0; + %load/vec4 v0x2328d20_0; + %assign/vec4 v0x2329810_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de1520_0, 4, 5; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; T_28.21 ; T_28.19 ; %jmp T_28.17; T_28.16 ; - %load/vec4 v0x1ddd550_0; + %load/vec4 v0x2326010_0; %cmpi/e 7, 0, 3; %jmp/0xz T_28.22, 4; - %load/vec4 v0x1ddfb60_0; + %load/vec4 v0x2328620_0; %flag_set/vec4 8; %jmp/0xz T_28.24, 8; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_28.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.27; T_28.26 ; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_28.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.29; T_28.28 ; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_28.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.31; T_28.30 ; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_28.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; T_28.32 ; T_28.31 ; T_28.29 ; @@ -9280,29 +9279,29 @@ T_28.27 ; %jmp T_28.25; T_28.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de0500_0, 0; - %load/vec4 v0x1ddd550_0; - %assign/vec4 v0x1de0d50_0, 0; + %assign/vec4 v0x2328fc0_0, 0; + %load/vec4 v0x2326010_0; + %assign/vec4 v0x2329810_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1520_0, 4, 5; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1520_0, 4, 5; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1520_0, 4, 5; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1520_0, 4, 5; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; T_28.25 ; T_28.22 ; T_28.17 ; @@ -9310,10 +9309,10 @@ T_28.13 ; T_28.11 ; T_28.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.7; T_28.5 ; - %load/vec4 v0x1ddd180_0; + %load/vec4 v0x2325c40_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -9380,180 +9379,180 @@ T_28.5 ; %jmp/1 T_28.49, 6; %jmp T_28.50; T_28.34 ; - %load/vec4 v0x1ddce00_0; - %load/vec4 v0x1de0df0_0; + %load/vec4 v0x23258c0_0; + %load/vec4 v0x23298b0_0; %add; - %assign/vec4 v0x1ddce00_0, 0; - %load/vec4 v0x1ddd390_0; + %assign/vec4 v0x23258c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.35 ; - %load/vec4 v0x1ddce00_0; - %load/vec4 v0x1de0df0_0; + %load/vec4 v0x23258c0_0; + %load/vec4 v0x23298b0_0; %sub; - %assign/vec4 v0x1ddce00_0, 0; - %load/vec4 v0x1ddd390_0; + %assign/vec4 v0x23258c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.36 ; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325e50_0; %pad/u 11; - %load/vec4 v0x1de0df0_0; + %load/vec4 v0x23298b0_0; %add; %pad/u 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.37 ; - %load/vec4 v0x1de0df0_0; - %assign/vec4 v0x1de18a0_0, 0; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x23298b0_0; + %assign/vec4 v0x232a360_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.38 ; - %load/vec4 v0x1ddd0a0_0; - %assign/vec4 v0x1de18a0_0, 0; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325b60_0; + %assign/vec4 v0x232a360_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.39 ; - %load/vec4 v0x1ddce00_0; - %load/vec4 v0x1ddd0a0_0; + %load/vec4 v0x23258c0_0; + %load/vec4 v0x2325b60_0; %add; - %assign/vec4 v0x1ddce00_0, 0; - %load/vec4 v0x1ddd390_0; + %assign/vec4 v0x23258c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.40 ; - %load/vec4 v0x1ddce00_0; - %load/vec4 v0x1ddd0a0_0; + %load/vec4 v0x23258c0_0; + %load/vec4 v0x2325b60_0; %sub; - %assign/vec4 v0x1ddce00_0, 0; - %load/vec4 v0x1ddd390_0; + %assign/vec4 v0x23258c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.41 ; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325e50_0; %pad/u 11; - %load/vec4 v0x1ddd0a0_0; + %load/vec4 v0x2325b60_0; %add; %pad/u 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.42 ; - %load/vec4 v0x1ddcf00_0; - %assign/vec4 v0x1ddce00_0, 0; - %load/vec4 v0x1ddce00_0; - %assign/vec4 v0x1ddcf00_0, 0; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x23259c0_0; + %assign/vec4 v0x23258c0_0, 0; + %load/vec4 v0x23258c0_0; + %assign/vec4 v0x23259c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.43 ; - %load/vec4 v0x1ddce00_0; - %assign/vec4 v0x1ddcf00_0, 0; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x23258c0_0; + %assign/vec4 v0x23259c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.44 ; - %load/vec4 v0x1ddce00_0; + %load/vec4 v0x23258c0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1ddce00_0, 0; - %load/vec4 v0x1ddd390_0; + %assign/vec4 v0x23258c0_0, 0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.45 ; - %load/vec4 v0x1ddd2b0_0; - %assign/vec4 v0x1ddd470_0, 0; + %load/vec4 v0x2325d70_0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.50; T_28.46 ; - %load/vec4 v0x1ddce00_0; + %load/vec4 v0x23258c0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_28.51, 4; - %load/vec4 v0x1ddd2b0_0; - %assign/vec4 v0x1ddd470_0, 0; + %load/vec4 v0x2325d70_0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.52; T_28.51 ; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; T_28.52 ; %jmp T_28.50; T_28.47 ; - %load/vec4 v0x1ddce00_0; + %load/vec4 v0x23258c0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_28.53, 4; - %load/vec4 v0x1ddd2b0_0; - %assign/vec4 v0x1ddd470_0, 0; + %load/vec4 v0x2325d70_0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.54; T_28.53 ; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; T_28.54 ; %jmp T_28.50; T_28.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1ddce00_0; + %load/vec4 v0x23258c0_0; %pad/s 32; %cmp/s; %jmp/0xz T_28.55, 5; - %load/vec4 v0x1ddd2b0_0; - %assign/vec4 v0x1ddd470_0, 0; + %load/vec4 v0x2325d70_0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.56; T_28.55 ; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; T_28.56 ; %jmp T_28.50; T_28.49 ; - %load/vec4 v0x1ddce00_0; + %load/vec4 v0x23258c0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_28.57, 5; - %load/vec4 v0x1ddd2b0_0; - %assign/vec4 v0x1ddd470_0, 0; + %load/vec4 v0x2325d70_0; + %assign/vec4 v0x2325f30_0, 0; %jmp T_28.58; T_28.57 ; - %load/vec4 v0x1ddd390_0; + %load/vec4 v0x2325e50_0; %addi 1, 0, 4; - %assign/vec4 v0x1ddd470_0, 0; + %assign/vec4 v0x2325f30_0, 0; T_28.58 ; %jmp T_28.50; T_28.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.7; T_28.6 ; - %load/vec4 v0x1ddd180_0; + %load/vec4 v0x2325c40_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1ddd180_0; + %load/vec4 v0x2325c40_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_28.59, 4; - %load/vec4 v0x1ddcfe0_0; + %load/vec4 v0x2325aa0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1ddcfe0_0; + %load/vec4 v0x2325aa0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -9561,162 +9560,162 @@ T_28.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_28.61, 9; - %load/vec4 v0x1ddcfe0_0; + %load/vec4 v0x2325aa0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_28.63, 4; - %load/vec4 v0x1de18a0_0; - %assign/vec4 v0x1ddce00_0, 0; + %load/vec4 v0x232a360_0; + %assign/vec4 v0x23258c0_0, 0; T_28.63 ; %jmp T_28.62; T_28.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0500_0, 0; - %load/vec4 v0x1ddcfe0_0; + %assign/vec4 v0x2328fc0_0, 0; + %load/vec4 v0x2325aa0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_28.65, 4; - %load/vec4 v0x1de0260_0; - %assign/vec4 v0x1de17c0_0, 0; - %load/vec4 v0x1de18a0_0; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; + %assign/vec4 v0x232a280_0, 0; + %load/vec4 v0x232a360_0; + %load/vec4 v0x2328d20_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de0260_0; + %load/vec4 v0x2328d20_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de1440_0, 4, 5; + %assign/vec4/off/d v0x2329f00_0, 4, 5; %jmp T_28.66; T_28.65 ; - %load/vec4 v0x1ddcfe0_0; + %load/vec4 v0x2325aa0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_28.67, 4; - %load/vec4 v0x1ddcfe0_0; - %assign/vec4 v0x1de17c0_0, 0; - %load/vec4 v0x1de18a0_0; - %load/vec4 v0x1ddcfe0_0; + %load/vec4 v0x2325aa0_0; + %assign/vec4 v0x232a280_0, 0; + %load/vec4 v0x232a360_0; + %load/vec4 v0x2325aa0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ddcfe0_0; + %load/vec4 v0x2325aa0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1ddcfe0_0; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x2325aa0_0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.68; T_28.67 ; - %load/vec4 v0x1ddfce0_0; + %load/vec4 v0x23287a0_0; %flag_set/vec4 8; %jmp/0xz T_28.69, 8; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_28.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.72; T_28.71 ; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_28.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.74; T_28.73 ; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_28.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.76; T_28.75 ; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_28.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; T_28.77 ; T_28.76 ; T_28.74 ; T_28.72 ; %jmp T_28.70; T_28.69 ; - %load/vec4 v0x1ddcfe0_0; - %assign/vec4 v0x1de17c0_0, 0; + %load/vec4 v0x2325aa0_0; + %assign/vec4 v0x232a280_0, 0; T_28.70 ; T_28.68 ; T_28.66 ; T_28.62 ; T_28.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.7; T_28.7 ; %pop/vec4 1; %jmp T_28.3; T_28.1 ; - %load/vec4 v0x1de0720_0; + %load/vec4 v0x23291e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -9731,82 +9730,82 @@ T_28.1 ; %jmp/1 T_28.81, 6; %jmp T_28.82; T_28.79 ; - %load/vec4 v0x1de0d50_0; + %load/vec4 v0x2329810_0; %cmpi/e 7, 0, 3; %jmp/0xz T_28.83, 4; - %load/vec4 v0x1ddfb60_0; + %load/vec4 v0x2328620_0; %flag_set/vec4 8; %jmp/0xz T_28.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de0500_0, 0; + %assign/vec4 v0x2328fc0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de1520_0, 0, 4; - %load/vec4 v0x1de0800_0; + %store/vec4 v0x2329fe0_0, 0, 4; + %load/vec4 v0x23292c0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_28.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.88; T_28.87 ; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_28.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.90; T_28.89 ; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_28.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.92; T_28.91 ; - %load/vec4 v0x1de0800_0; + %load/vec4 v0x23292c0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_28.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; T_28.93 ; T_28.92 ; T_28.90 ; @@ -9814,54 +9813,54 @@ T_28.88 ; T_28.85 ; %jmp T_28.84; T_28.83 ; - %load/vec4 v0x1de0800_0; - %load/vec4 v0x1de0d50_0; + %load/vec4 v0x23292c0_0; + %load/vec4 v0x2329810_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_28.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de0500_0, 0; - %load/vec4 v0x1de0d50_0; + %assign/vec4 v0x2328fc0_0, 0; + %load/vec4 v0x2329810_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1de0eb0, 4; - %assign/vec4 v0x1de0df0_0, 0; + %load/vec4a v0x2329970, 4; + %assign/vec4 v0x23298b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de0d50_0; + %load/vec4 v0x2329810_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de0cb0_0, 4, 5; + %assign/vec4/off/d v0x2329770_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de0d50_0; + %load/vec4 v0x2329810_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1de1520_0, 4, 5; - %load/vec4 v0x1de0d50_0; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4/off/d v0x2329fe0_0, 4, 5; + %load/vec4 v0x2329810_0; + %assign/vec4 v0x2328d20_0, 0; T_28.95 ; T_28.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.82; T_28.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.82; T_28.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.82; T_28.82 ; %pop/vec4 1; %jmp T_28.3; T_28.2 ; - %load/vec4 v0x1de0720_0; + %load/vec4 v0x23291e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -9877,93 +9876,93 @@ T_28.2 ; %jmp T_28.100; T_28.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.100; T_28.98 ; - %load/vec4 v0x1de17c0_0; + %load/vec4 v0x232a280_0; %cmpi/e 7, 0, 3; %jmp/0xz T_28.101, 4; - %load/vec4 v0x1ddfce0_0; + %load/vec4 v0x23287a0_0; %flag_set/vec4 8; %jmp/0xz T_28.103, 8; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_28.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.106; T_28.105 ; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_28.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.108; T_28.107 ; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_28.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; %jmp T_28.110; T_28.109 ; - %load/vec4 v0x1ddec10_0; + %load/vec4 v0x23276d0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_28.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de17c0_0, 0; + %assign/vec4 v0x232a280_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1de1440_0, 4, 5; - %load/vec4 v0x1de18a0_0; + %assign/vec4/off/d v0x2329f00_0, 4, 5; + %load/vec4 v0x232a360_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1de05e0, 0, 4; + %assign/vec4/a/d v0x23290a0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328d20_0, 0; T_28.111 ; T_28.110 ; T_28.108 ; @@ -9971,33 +9970,33 @@ T_28.106 ; T_28.103 ; T_28.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.100; T_28.99 ; - %load/vec4 v0x1de17c0_0; + %load/vec4 v0x232a280_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_28.113, 4; - %load/vec4 v0x1de1600_0; - %load/vec4 v0x1de17c0_0; + %load/vec4 v0x232a0c0_0; + %load/vec4 v0x232a280_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_28.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1de17c0_0; + %load/vec4 v0x232a280_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1de1440_0, 4, 1; + %store/vec4 v0x2329f00_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de0500_0, 0; - %load/vec4 v0x1de17c0_0; - %assign/vec4 v0x1de0260_0, 0; + %assign/vec4 v0x2328fc0_0, 0; + %load/vec4 v0x232a280_0; + %assign/vec4 v0x2328d20_0, 0; T_28.115 ; T_28.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1de0720_0, 0; + %assign/vec4 v0x23291e0_0, 0; %jmp T_28.100; T_28.100 ; %pop/vec4 1; @@ -10006,19 +10005,19 @@ T_28.3 ; %pop/vec4 1; %jmp T_28; .thread T_28; - .scope S_0x1ddc900; + .scope S_0x23253c0; T_29 ; - %wait E_0x1dd2730; - %load/vec4 v0x1de0720_0; + %wait E_0x231b1f0; + %load/vec4 v0x23291e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1de0500_0; + %load/vec4 v0x2328fc0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1ddd470_0; + %load/vec4 v0x2325f30_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -10027,62 +10026,62 @@ T_29 ; %and; %flag_set/vec4 8; %jmp/0xz T_29.0, 8; - %load/vec4 v0x1ddd470_0; - %assign/vec4 v0x1ddd390_0, 0; + %load/vec4 v0x2325f30_0; + %assign/vec4 v0x2325e50_0, 0; T_29.0 ; - %load/vec4 v0x1de0720_0; + %load/vec4 v0x23291e0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_29.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de0cb0_0, 0, 4; + %store/vec4 v0x2329770_0, 0, 4; T_29.2 ; %jmp T_29; .thread T_29; - .scope S_0x1de6d00; + .scope S_0x232f7c0; T_30 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dea9b0_0, 0, 3; + %store/vec4 v0x2333470_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1deabd0_0, 0, 3; + %store/vec4 v0x2333690_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1dea710_0, 0, 3; + %store/vec4 v0x23331d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1de7220_0, 0, 11; + %store/vec4 v0x232fce0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1de7320_0, 0, 11; + %store/vec4 v0x232fde0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1de77b0_0, 0, 4; + %store/vec4 v0x2330270_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1deb160_0, 0, 4; + %store/vec4 v0x2333c20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1deb990_0, 0, 4; + %store/vec4 v0x2334450_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1debb50_0, 0, 4; + %store/vec4 v0x2334610_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1deb8b0_0, 0, 4; + %store/vec4 v0x2334370_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1deaa90, 4, 0; + %store/vec4a v0x2333550, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1deaa90, 4, 0; + %store/vec4a v0x2333550, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1deaa90, 4, 0; + %store/vec4a v0x2333550, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1deaa90, 4, 0; - %vpi_call 4 187 "$readmemb", P_0x1de6f60, v0x1dea650 {0 0 0}; + %store/vec4a v0x2333550, 4, 0; + %vpi_call 4 187 "$readmemb", P_0x232fa20, v0x2333110 {0 0 0}; %end; .thread T_30; - .scope S_0x1de6d00; + .scope S_0x232f7c0; T_31 ; - %wait E_0x1dd2930; - %load/vec4 v0x1dea9b0_0; + %wait E_0x231b3f0; + %load/vec4 v0x2333470_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -10097,7 +10096,7 @@ T_31 ; %jmp/1 T_31.2, 6; %jmp T_31.3; T_31.0 ; - %load/vec4 v0x1deabd0_0; + %load/vec4 v0x2333690_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -10112,185 +10111,185 @@ T_31.0 ; %jmp/1 T_31.6, 6; %jmp T_31.7; T_31.4 ; - %load/vec4 v0x1de75a0_0; + %load/vec4 v0x2330060_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_31.8, 5; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_31.10, 5; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %jmp T_31.11; T_31.10 ; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_31.12, 5; - %load/vec4 v0x1deacb0_0; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2333770_0; + %load/vec4 v0x2330430_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_31.14, 8; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb160_0, 4, 5; - %load/vec4 v0x1de7970_0; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4/off/d v0x2333c20_0, 4, 5; + %load/vec4 v0x2330430_0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.15; T_31.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; - %load/vec4 v0x1de7970_0; - %assign/vec4 v0x1deb200_0, 0; + %assign/vec4 v0x2333470_0, 0; + %load/vec4 v0x2330430_0; + %assign/vec4 v0x2333cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb990_0, 4, 5; - %load/vec4 v0x1de7970_0; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4/off/d v0x2334450_0, 4, 5; + %load/vec4 v0x2330430_0; + %assign/vec4 v0x23331d0_0, 0; T_31.15 ; %jmp T_31.13; T_31.12 ; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %cmpi/e 6, 0, 3; %jmp/0xz T_31.16, 4; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_31.18, 4; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %jmp T_31.19; T_31.18 ; - %load/vec4 v0x1deacb0_0; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x2333770_0; + %load/vec4 v0x23331d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_31.20, 8; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %jmp T_31.21; T_31.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; - %load/vec4 v0x1dea710_0; - %assign/vec4 v0x1deb200_0, 0; + %assign/vec4 v0x2333470_0, 0; + %load/vec4 v0x23331d0_0; + %assign/vec4 v0x2333cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb990_0, 4, 5; + %assign/vec4/off/d v0x2334450_0, 4, 5; T_31.21 ; T_31.19 ; %jmp T_31.17; T_31.16 ; - %load/vec4 v0x1de7970_0; + %load/vec4 v0x2330430_0; %cmpi/e 7, 0, 3; %jmp/0xz T_31.22, 4; - %load/vec4 v0x1de9f80_0; + %load/vec4 v0x2332a40_0; %flag_set/vec4 8; %jmp/0xz T_31.24, 8; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_31.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.27; T_31.26 ; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_31.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.29; T_31.28 ; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_31.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.31; T_31.30 ; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_31.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; T_31.32 ; T_31.31 ; T_31.29 ; @@ -10298,29 +10297,29 @@ T_31.27 ; %jmp T_31.25; T_31.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; - %load/vec4 v0x1de7970_0; - %assign/vec4 v0x1deb200_0, 0; + %assign/vec4 v0x2333470_0, 0; + %load/vec4 v0x2330430_0; + %assign/vec4 v0x2333cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb990_0, 4, 5; + %assign/vec4/off/d v0x2334450_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb990_0, 4, 5; + %assign/vec4/off/d v0x2334450_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb990_0, 4, 5; + %assign/vec4/off/d v0x2334450_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb990_0, 4, 5; + %assign/vec4/off/d v0x2334450_0, 4, 5; T_31.25 ; T_31.22 ; T_31.17 ; @@ -10328,10 +10327,10 @@ T_31.13 ; T_31.11 ; T_31.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.7; T_31.5 ; - %load/vec4 v0x1de75a0_0; + %load/vec4 v0x2330060_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -10398,180 +10397,180 @@ T_31.5 ; %jmp/1 T_31.49, 6; %jmp T_31.50; T_31.34 ; - %load/vec4 v0x1de7220_0; - %load/vec4 v0x1deb2a0_0; + %load/vec4 v0x232fce0_0; + %load/vec4 v0x2333d60_0; %add; - %assign/vec4 v0x1de7220_0, 0; - %load/vec4 v0x1de77b0_0; + %assign/vec4 v0x232fce0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.35 ; - %load/vec4 v0x1de7220_0; - %load/vec4 v0x1deb2a0_0; + %load/vec4 v0x232fce0_0; + %load/vec4 v0x2333d60_0; %sub; - %assign/vec4 v0x1de7220_0, 0; - %load/vec4 v0x1de77b0_0; + %assign/vec4 v0x232fce0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.36 ; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2330270_0; %pad/u 11; - %load/vec4 v0x1deb2a0_0; + %load/vec4 v0x2333d60_0; %add; %pad/u 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.37 ; - %load/vec4 v0x1deb2a0_0; - %assign/vec4 v0x1debd10_0, 0; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2333d60_0; + %assign/vec4 v0x23347d0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.38 ; - %load/vec4 v0x1de74c0_0; - %assign/vec4 v0x1debd10_0, 0; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x232ff80_0; + %assign/vec4 v0x23347d0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.39 ; - %load/vec4 v0x1de7220_0; - %load/vec4 v0x1de74c0_0; + %load/vec4 v0x232fce0_0; + %load/vec4 v0x232ff80_0; %add; - %assign/vec4 v0x1de7220_0, 0; - %load/vec4 v0x1de77b0_0; + %assign/vec4 v0x232fce0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.40 ; - %load/vec4 v0x1de7220_0; - %load/vec4 v0x1de74c0_0; + %load/vec4 v0x232fce0_0; + %load/vec4 v0x232ff80_0; %sub; - %assign/vec4 v0x1de7220_0, 0; - %load/vec4 v0x1de77b0_0; + %assign/vec4 v0x232fce0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.41 ; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2330270_0; %pad/u 11; - %load/vec4 v0x1de74c0_0; + %load/vec4 v0x232ff80_0; %add; %pad/u 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.42 ; - %load/vec4 v0x1de7320_0; - %assign/vec4 v0x1de7220_0, 0; - %load/vec4 v0x1de7220_0; - %assign/vec4 v0x1de7320_0, 0; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x232fde0_0; + %assign/vec4 v0x232fce0_0, 0; + %load/vec4 v0x232fce0_0; + %assign/vec4 v0x232fde0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.43 ; - %load/vec4 v0x1de7220_0; - %assign/vec4 v0x1de7320_0, 0; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x232fce0_0; + %assign/vec4 v0x232fde0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.44 ; - %load/vec4 v0x1de7220_0; + %load/vec4 v0x232fce0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1de7220_0, 0; - %load/vec4 v0x1de77b0_0; + %assign/vec4 v0x232fce0_0, 0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.45 ; - %load/vec4 v0x1de76d0_0; - %assign/vec4 v0x1de7890_0, 0; + %load/vec4 v0x2330190_0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.50; T_31.46 ; - %load/vec4 v0x1de7220_0; + %load/vec4 v0x232fce0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_31.51, 4; - %load/vec4 v0x1de76d0_0; - %assign/vec4 v0x1de7890_0, 0; + %load/vec4 v0x2330190_0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.52; T_31.51 ; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; T_31.52 ; %jmp T_31.50; T_31.47 ; - %load/vec4 v0x1de7220_0; + %load/vec4 v0x232fce0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_31.53, 4; - %load/vec4 v0x1de76d0_0; - %assign/vec4 v0x1de7890_0, 0; + %load/vec4 v0x2330190_0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.54; T_31.53 ; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; T_31.54 ; %jmp T_31.50; T_31.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1de7220_0; + %load/vec4 v0x232fce0_0; %pad/s 32; %cmp/s; %jmp/0xz T_31.55, 5; - %load/vec4 v0x1de76d0_0; - %assign/vec4 v0x1de7890_0, 0; + %load/vec4 v0x2330190_0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.56; T_31.55 ; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; T_31.56 ; %jmp T_31.50; T_31.49 ; - %load/vec4 v0x1de7220_0; + %load/vec4 v0x232fce0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_31.57, 5; - %load/vec4 v0x1de76d0_0; - %assign/vec4 v0x1de7890_0, 0; + %load/vec4 v0x2330190_0; + %assign/vec4 v0x2330350_0, 0; %jmp T_31.58; T_31.57 ; - %load/vec4 v0x1de77b0_0; + %load/vec4 v0x2330270_0; %addi 1, 0, 4; - %assign/vec4 v0x1de7890_0, 0; + %assign/vec4 v0x2330350_0, 0; T_31.58 ; %jmp T_31.50; T_31.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.7; T_31.6 ; - %load/vec4 v0x1de75a0_0; + %load/vec4 v0x2330060_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1de75a0_0; + %load/vec4 v0x2330060_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_31.59, 4; - %load/vec4 v0x1de7400_0; + %load/vec4 v0x232fec0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1de7400_0; + %load/vec4 v0x232fec0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -10579,163 +10578,163 @@ T_31.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_31.61, 9; - %load/vec4 v0x1de7400_0; + %load/vec4 v0x232fec0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_31.63, 4; - %load/vec4 v0x1debd10_0; - %assign/vec4 v0x1de7220_0, 0; - %vpi_call 4 336 "$display", "ACC = %d", v0x1debd10_0 {0 0 0}; + %load/vec4 v0x23347d0_0; + %assign/vec4 v0x232fce0_0, 0; + %vpi_call 4 336 "$display", "ACC = %d", v0x23347d0_0 {0 0 0}; T_31.63 ; %jmp T_31.62; T_31.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; - %load/vec4 v0x1de7400_0; + %assign/vec4 v0x2333470_0, 0; + %load/vec4 v0x232fec0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_31.65, 4; - %load/vec4 v0x1dea710_0; - %assign/vec4 v0x1debc30_0, 0; - %load/vec4 v0x1debd10_0; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; + %assign/vec4 v0x23346f0_0, 0; + %load/vec4 v0x23347d0_0; + %load/vec4 v0x23331d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1dea710_0; + %load/vec4 v0x23331d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; + %assign/vec4/off/d v0x2334370_0, 4, 5; %jmp T_31.66; T_31.65 ; - %load/vec4 v0x1de7400_0; + %load/vec4 v0x232fec0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_31.67, 4; - %load/vec4 v0x1de7400_0; - %assign/vec4 v0x1debc30_0, 0; - %load/vec4 v0x1debd10_0; - %load/vec4 v0x1de7400_0; + %load/vec4 v0x232fec0_0; + %assign/vec4 v0x23346f0_0, 0; + %load/vec4 v0x23347d0_0; + %load/vec4 v0x232fec0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1de7400_0; + %load/vec4 v0x232fec0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1de7400_0; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x232fec0_0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.68; T_31.67 ; - %load/vec4 v0x1dea100_0; + %load/vec4 v0x2332bc0_0; %flag_set/vec4 8; %jmp/0xz T_31.69, 8; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_31.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.72; T_31.71 ; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_31.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.74; T_31.73 ; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_31.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.76; T_31.75 ; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_31.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; T_31.77 ; T_31.76 ; T_31.74 ; T_31.72 ; %jmp T_31.70; T_31.69 ; - %load/vec4 v0x1de7400_0; - %assign/vec4 v0x1debc30_0, 0; + %load/vec4 v0x232fec0_0; + %assign/vec4 v0x23346f0_0, 0; T_31.70 ; T_31.68 ; T_31.66 ; T_31.62 ; T_31.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.7; T_31.7 ; %pop/vec4 1; %jmp T_31.3; T_31.1 ; - %load/vec4 v0x1deabd0_0; + %load/vec4 v0x2333690_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -10750,82 +10749,82 @@ T_31.1 ; %jmp/1 T_31.81, 6; %jmp T_31.82; T_31.79 ; - %load/vec4 v0x1deb200_0; + %load/vec4 v0x2333cc0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_31.83, 4; - %load/vec4 v0x1de9f80_0; + %load/vec4 v0x2332a40_0; %flag_set/vec4 8; %jmp/0xz T_31.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; + %assign/vec4 v0x2333470_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1deb990_0, 0, 4; - %load/vec4 v0x1deacb0_0; + %store/vec4 v0x2334450_0, 0, 4; + %load/vec4 v0x2333770_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_31.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.88; T_31.87 ; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_31.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.90; T_31.89 ; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_31.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.92; T_31.91 ; - %load/vec4 v0x1deacb0_0; + %load/vec4 v0x2333770_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_31.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; T_31.93 ; T_31.92 ; T_31.90 ; @@ -10833,54 +10832,54 @@ T_31.88 ; T_31.85 ; %jmp T_31.84; T_31.83 ; - %load/vec4 v0x1deacb0_0; - %load/vec4 v0x1deb200_0; + %load/vec4 v0x2333770_0; + %load/vec4 v0x2333cc0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_31.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; - %load/vec4 v0x1deb200_0; + %assign/vec4 v0x2333470_0, 0; + %load/vec4 v0x2333cc0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1deb340, 4; - %assign/vec4 v0x1deb2a0_0, 0; + %load/vec4a v0x2333e00, 4; + %assign/vec4 v0x2333d60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1deb200_0; + %load/vec4 v0x2333cc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb160_0, 4, 5; + %assign/vec4/off/d v0x2333c20_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1deb200_0; + %load/vec4 v0x2333cc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1deb990_0, 4, 5; - %load/vec4 v0x1deb200_0; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4/off/d v0x2334450_0, 4, 5; + %load/vec4 v0x2333cc0_0; + %assign/vec4 v0x23331d0_0, 0; T_31.95 ; T_31.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.82; T_31.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.82; T_31.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.82; T_31.82 ; %pop/vec4 1; %jmp T_31.3; T_31.2 ; - %load/vec4 v0x1deabd0_0; + %load/vec4 v0x2333690_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -10896,93 +10895,93 @@ T_31.2 ; %jmp T_31.100; T_31.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.100; T_31.98 ; - %load/vec4 v0x1debc30_0; + %load/vec4 v0x23346f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_31.101, 4; - %load/vec4 v0x1dea100_0; + %load/vec4 v0x2332bc0_0; %flag_set/vec4 8; %jmp/0xz T_31.103, 8; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_31.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.106; T_31.105 ; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_31.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.108; T_31.107 ; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_31.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; %jmp T_31.110; T_31.109 ; - %load/vec4 v0x1de9030_0; + %load/vec4 v0x2331af0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_31.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1debc30_0, 0; + %assign/vec4 v0x23346f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1deb8b0_0, 4, 5; - %load/vec4 v0x1debd10_0; + %assign/vec4/off/d v0x2334370_0, 4, 5; + %load/vec4 v0x23347d0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1deaa90, 0, 4; + %assign/vec4/a/d v0x2333550, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x23331d0_0, 0; T_31.111 ; T_31.110 ; T_31.108 ; @@ -10990,33 +10989,33 @@ T_31.106 ; T_31.103 ; T_31.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.100; T_31.99 ; - %load/vec4 v0x1debc30_0; + %load/vec4 v0x23346f0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_31.113, 4; - %load/vec4 v0x1deba70_0; - %load/vec4 v0x1debc30_0; + %load/vec4 v0x2334530_0; + %load/vec4 v0x23346f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_31.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1debc30_0; + %load/vec4 v0x23346f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1deb8b0_0, 4, 1; + %store/vec4 v0x2334370_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1dea9b0_0, 0; - %load/vec4 v0x1debc30_0; - %assign/vec4 v0x1dea710_0, 0; + %assign/vec4 v0x2333470_0, 0; + %load/vec4 v0x23346f0_0; + %assign/vec4 v0x23331d0_0, 0; T_31.115 ; T_31.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1deabd0_0, 0; + %assign/vec4 v0x2333690_0, 0; %jmp T_31.100; T_31.100 ; %pop/vec4 1; @@ -11025,19 +11024,19 @@ T_31.3 ; %pop/vec4 1; %jmp T_31; .thread T_31; - .scope S_0x1de6d00; + .scope S_0x232f7c0; T_32 ; - %wait E_0x1dd2730; - %load/vec4 v0x1deabd0_0; + %wait E_0x231b1f0; + %load/vec4 v0x2333690_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1dea9b0_0; + %load/vec4 v0x2333470_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1de7890_0; + %load/vec4 v0x2330350_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -11046,78 +11045,78 @@ T_32 ; %and; %flag_set/vec4 8; %jmp/0xz T_32.0, 8; - %load/vec4 v0x1de7890_0; - %assign/vec4 v0x1de77b0_0, 0; + %load/vec4 v0x2330350_0; + %assign/vec4 v0x2330270_0, 0; T_32.0 ; - %load/vec4 v0x1deabd0_0; + %load/vec4 v0x2333690_0; %cmpi/e 0, 0, 3; %jmp/0xz T_32.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1deb160_0, 0, 4; + %store/vec4 v0x2333c20_0, 0, 4; T_32.2 ; %jmp T_32; .thread T_32; - .scope S_0x1cc1e10; + .scope S_0x220a8e0; T_33 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x1e00fb0_0, 0, 33; + %store/vec4 v0x2349a70_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e00880_0, 0, 1; + %store/vec4 v0x2349340_0, 0, 1; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 1, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 2, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 3, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 4, 0, 11; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 4, 0, 11; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 5, 0, 11; %ix/load 4, 6, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1e00940, 4, 0; + %store/vec4a v0x2349400, 4, 0; %pushi/vec4 0, 0, 33; - %store/vec4 v0x1e00fb0_0, 0, 33; + %store/vec4 v0x2349a70_0, 0, 33; T_33.0 ; - %load/vec4 v0x1e00fb0_0; + %load/vec4 v0x2349a70_0; %cmpi/u 50000, 0, 33; %jmp/0xz T_33.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1e007c0_0, 0, 1; + %store/vec4 v0x2349280_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e007c0_0, 0, 1; + %store/vec4 v0x2349280_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1e007c0_0, 0, 1; + %store/vec4 v0x2349280_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e007c0_0, 0, 1; + %store/vec4 v0x2349280_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1e007c0_0, 0, 1; + %store/vec4 v0x2349280_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1e007c0_0, 0, 1; + %store/vec4 v0x2349280_0, 0, 1; %delay 1, 0; - %load/vec4 v0x1e00fb0_0; + %load/vec4 v0x2349a70_0; %addi 1, 0, 33; - %store/vec4 v0x1e00fb0_0, 0, 33; + %store/vec4 v0x2349a70_0, 0, 33; %jmp T_33.0; T_33.1 ; %end; diff --git a/jumpTest/test b/jumpTest/test index 5597acd..d3311de 100755 --- a/jumpTest/test +++ b/jumpTest/test @@ -6,25 +6,25 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x16e4740 .scope module, "tis100Test" "tis100Test" 2 2; +S_0xf12740 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x17b3460_0 .net "C2D", 14 0, L_0x17d7cd0; 1 drivers -v0x17b3590_0 .net "C2L", 14 0, L_0x17d79f0; 1 drivers -v0x17b36a0_0 .net "C2R", 14 0, L_0x17d83c0; 1 drivers -v0x17b3790_0 .net "C2U", 14 0, L_0x17d7720; 1 drivers -v0x17b38a0_0 .net "D2C", 14 0, L_0x17d3530; 1 drivers -v0x17b3a00_0 .net "L2C", 14 0, L_0x17c7db0; 1 drivers -v0x17b3b10_0 .net "R2C", 14 0, L_0x17cb620; 1 drivers -v0x17b3c20_0 .net "U2C", 14 0, L_0x17cf990; 1 drivers -v0x17b3d30_0 .net/s "accOutCenter", 10 0, L_0x17d42f0; 1 drivers -v0x17b3e80_0 .net/s "accOutDown", 10 0, L_0x17d0290; 1 drivers -v0x17b3f20_0 .net/s "accOutLeft", 10 0, L_0x17b4320; 1 drivers -v0x17b3fc0_0 .net/s "accOutRight", 10 0, L_0x17c8100; 1 drivers -v0x17b4060_0 .net/s "accOutUp", 10 0, L_0x17cc1e0; 1 drivers -v0x17b4100_0 .var "clk", 0 0; -v0x17b41a0_0 .var "dutPassed", 0 0; -v0x17b4240_0 .var "i", 32 0; -S_0x17447f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x16e4740; +v0xfe1460_0 .net "C2D", 14 0, L_0x1005cd0; 1 drivers +v0xfe1590_0 .net "C2L", 14 0, L_0x10059f0; 1 drivers +v0xfe16a0_0 .net "C2R", 14 0, L_0x10063c0; 1 drivers +v0xfe1790_0 .net "C2U", 14 0, L_0x1005720; 1 drivers +v0xfe18a0_0 .net "D2C", 14 0, L_0x1001530; 1 drivers +v0xfe1a00_0 .net "L2C", 14 0, L_0xff5db0; 1 drivers +v0xfe1b10_0 .net "R2C", 14 0, L_0xff9620; 1 drivers +v0xfe1c20_0 .net "U2C", 14 0, L_0xffd990; 1 drivers +v0xfe1d30_0 .net/s "accOutCenter", 10 0, L_0x10022f0; 1 drivers +v0xfe1e80_0 .net/s "accOutDown", 10 0, L_0xffe290; 1 drivers +v0xfe1f20_0 .net/s "accOutLeft", 10 0, L_0xfe2320; 1 drivers +v0xfe1fc0_0 .net/s "accOutRight", 10 0, L_0xff6100; 1 drivers +v0xfe2060_0 .net/s "accOutUp", 10 0, L_0xffa1e0; 1 drivers +v0xfe2100_0 .var "clk", 0 0; +v0xfe21a0_0 .var "dutPassed", 0 0; +v0xfe2240_0 .var "i", 32 0; +S_0xf727f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0xf12740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -36,174 +36,174 @@ S_0x17447f0 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x16e4740; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x17015c0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1701600 .param/str "memFile" 0 3 60, "jumpTest/center.dat"; -L_0x17d42f0 .functor BUFZ 11, v0x175a400_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17d4580 .functor BUFZ 11, v0x175a400_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17d53b0 .functor BUFZ 18, L_0x17d7530, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x175a400_0 .var/s "ACC", 10 0; -v0x1799f60_0 .var/s "BAK", 10 0; -v0x179a040_0 .net "DST", 2 0, L_0x17d8850; 1 drivers -v0x179a130_0 .net/s "IMM", 10 0, L_0x17d88f0; 1 drivers -v0x179a210_0 .net "INST", 3 0, L_0x17d8030; 1 drivers -v0x179a340_0 .net "LABEL", 3 0, L_0x17d8aa0; 1 drivers -v0x179a420_0 .var "PC", 3 0; -v0x179a500_0 .var "PCNEXT", 3 0; -v0x179a5e0_0 .net "SRC", 2 0, L_0x17d8660; 1 drivers -v0x179a750_0 .net *"_s103", 0 0, L_0x17d6870; 1 drivers -v0x179a830_0 .net *"_s107", 0 0, L_0x17d6780; 1 drivers -v0x179a910_0 .net *"_s111", 0 0, L_0x17d6a60; 1 drivers -v0x179a9f0_0 .net *"_s115", 0 0, L_0x17d6960; 1 drivers -v0x179aad0_0 .net *"_s119", 0 0, L_0x17d6ca0; 1 drivers -v0x179abb0_0 .net *"_s123", 0 0, L_0x17d6b90; 1 drivers -v0x179ac90_0 .net *"_s127", 0 0, L_0x17d6e60; 1 drivers -v0x179ad70_0 .net *"_s131", 0 0, L_0x17d6d40; 1 drivers -v0x179af20_0 .net *"_s135", 0 0, L_0x17d70c0; 1 drivers -v0x179afc0_0 .net *"_s139", 0 0, L_0x17d6f90; 1 drivers -v0x179b0a0_0 .net *"_s143", 0 0, L_0x17d72a0; 1 drivers -v0x179b180_0 .net *"_s147", 0 0, L_0x17d7160; 1 drivers -v0x179b260_0 .net *"_s151", 0 0, L_0x17d7490; 1 drivers -v0x179b340_0 .net *"_s155", 0 0, L_0x17d7340; 1 drivers -v0x179b420_0 .net *"_s159", 0 0, L_0x17d73e0; 1 drivers -v0x179b500_0 .net *"_s160", 17 0, L_0x17d7530; 1 drivers -v0x179b5e0_0 .net *"_s162", 5 0, L_0x17d7890; 1 drivers -L_0x2aef774e32a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x179b6c0_0 .net *"_s165", 1 0, L_0x2aef774e32a0; 1 drivers -v0x179d690_2 .array/port v0x179d690, 2; -v0x179b7a0_0 .net *"_s173", 10 0, v0x179d690_2; 1 drivers -v0x179d690_3 .array/port v0x179d690, 3; -v0x179b880_0 .net *"_s179", 10 0, v0x179d690_3; 1 drivers -v0x179d690_0 .array/port v0x179d690, 0; -v0x179b960_0 .net *"_s185", 10 0, v0x179d690_0; 1 drivers -v0x179d690_1 .array/port v0x179d690, 1; -v0x179ba40_0 .net *"_s191", 10 0, v0x179d690_1; 1 drivers -v0x179bb20_0 .net *"_s23", 0 0, L_0x17d4d50; 1 drivers -v0x179bc00_0 .net *"_s27", 0 0, L_0x17d4e20; 1 drivers -v0x179ae50_0 .net *"_s31", 0 0, L_0x17d4ef0; 1 drivers -v0x179bed0_0 .net *"_s36", 0 0, L_0x17d5090; 1 drivers -v0x179bfb0_0 .net *"_s42", 0 0, L_0x17d5270; 1 drivers -v0x179c090_0 .net *"_s46", 0 0, L_0x17d5310; 1 drivers -v0x179c170_0 .net *"_s50", 0 0, L_0x17d5420; 1 drivers -v0x179c250_0 .net *"_s55", 0 0, L_0x17d5630; 1 drivers -v0x179c330_0 .net *"_s61", 0 0, L_0x17d58a0; 1 drivers -v0x179c410_0 .net *"_s65", 0 0, L_0x17d5940; 1 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17 0; -v0x179d310_0 .var "last", 2 0; -v0x179d3f0_0 .net "left", 14 0, L_0x17c7db0; alias, 1 drivers -v0x179d4d0_0 .net "leftOut", 14 0, L_0x17d79f0; alias, 1 drivers -v0x179d5b0_0 .var "mode", 2 0; -v0x179d690 .array/s "outVals", 2 5, 10 0; -v0x179d7d0_0 .var "phase", 2 0; -v0x179d8b0_0 .net "portsHaveData", 5 2, L_0x17d4f90; 1 drivers -v0x179bca0_0 .net "portsWantData", 5 2, L_0x17d54c0; 1 drivers -v0x179bd80_0 .net "readAckIn", 5 2, L_0x17d5b20; 1 drivers -v0x179dd60_0 .var "readAckOut", 5 2; -v0x179de00_0 .var "readTarget", 2 0; -v0x179dee0_0 .var/s "readValue", 10 0; -L_0x2aef774e3258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x179dfc0 .array "regVals", 0 7; -v0x179dfc0_0 .net/s v0x179dfc0 0, 10 0, L_0x2aef774e3258; 1 drivers -v0x179dfc0_1 .net/s v0x179dfc0 1, 10 0, L_0x17d4580; 1 drivers -v0x179dfc0_2 .net/s v0x179dfc0 2, 10 0, L_0x17d4860; 1 drivers -v0x179dfc0_3 .net/s v0x179dfc0 3, 10 0, L_0x17d4990; 1 drivers -v0x179dfc0_4 .net/s v0x179dfc0 4, 10 0, L_0x17d4ac0; 1 drivers -v0x179dfc0_5 .net/s v0x179dfc0 5, 10 0, L_0x17d4bf0; 1 drivers -o0x2aef774b2eb8 .functor BUFZ 11, C4; HiZ drive -v0x179dfc0_6 .net/s v0x179dfc0 6, 10 0, o0x2aef774b2eb8; 0 drivers -o0x2aef774b2ee8 .functor BUFZ 11, C4; HiZ drive -v0x179dfc0_7 .net/s v0x179dfc0 7, 10 0, o0x2aef774b2ee8; 0 drivers -v0x179e1d0_0 .net "right", 14 0, L_0x17cb620; alias, 1 drivers -v0x179e2b0_0 .net "rightOut", 14 0, L_0x17d83c0; alias, 1 drivers -v0x179e390_0 .net "up", 14 0, L_0x17cf990; alias, 1 drivers -v0x179e470_0 .net "upOut", 14 0, L_0x17d7720; alias, 1 drivers -v0x179e550_0 .var "weHaveData", 5 2; -v0x179e630_0 .var "weWantData", 5 2; -v0x179e710_0 .net "writeAckIn", 5 2, L_0x17d6400; 1 drivers -v0x179e7f0_0 .var "writeAckOut", 5 2; -v0x179e8d0_0 .var "writeTarget", 2 0; -v0x179e9b0_0 .var/s "writeValue", 10 0; -E_0x16f55d0 .event negedge, v0x179cef0_0; -E_0x1717d10 .event posedge, v0x179cef0_0; -L_0x17d4860 .part L_0x17c7db0, 0, 11; -L_0x17d4990 .part L_0x17cb620, 0, 11; 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11; -S_0x179ec30 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x16e4740; +P_0xf2f5c0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0xf2f600 .param/str "memFile" 0 3 60, "jumpTest/center.dat"; +L_0x10022f0 .functor BUFZ 11, v0xf88400_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x1002580 .functor BUFZ 11, v0xf88400_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x10033b0 .functor BUFZ 18, L_0x1005530, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xf88400_0 .var/s "ACC", 10 0; +v0xfc7f60_0 .var/s "BAK", 10 0; +v0xfc8040_0 .net "DST", 2 0, L_0x1006850; 1 drivers +v0xfc8130_0 .net/s "IMM", 10 0, L_0x10068f0; 1 drivers +v0xfc8210_0 .net "INST", 3 0, L_0x1006030; 1 drivers +v0xfc8340_0 .net "LABEL", 3 0, L_0x1006aa0; 1 drivers +v0xfc8420_0 .var "PC", 3 0; +v0xfc8500_0 .var "PCNEXT", 3 0; +v0xfc85e0_0 .net "SRC", 2 0, L_0x1006660; 1 drivers +v0xfc8750_0 .net *"_s103", 0 0, L_0x1004870; 1 drivers +v0xfc8830_0 .net *"_s107", 0 0, L_0x1004780; 1 drivers +v0xfc8910_0 .net *"_s111", 0 0, L_0x1004a60; 1 drivers +v0xfc89f0_0 .net *"_s115", 0 0, L_0x1004960; 1 drivers +v0xfc8ad0_0 .net *"_s119", 0 0, L_0x1004ca0; 1 drivers +v0xfc8bb0_0 .net *"_s123", 0 0, L_0x1004b90; 1 drivers +v0xfc8c90_0 .net *"_s127", 0 0, L_0x1004e60; 1 drivers +v0xfc8d70_0 .net *"_s131", 0 0, L_0x1004d40; 1 drivers +v0xfc8f20_0 .net *"_s135", 0 0, L_0x10050c0; 1 drivers +v0xfc8fc0_0 .net *"_s139", 0 0, L_0x1004f90; 1 drivers +v0xfc90a0_0 .net *"_s143", 0 0, L_0x10052a0; 1 drivers +v0xfc9180_0 .net *"_s147", 0 0, L_0x1005160; 1 drivers +v0xfc9260_0 .net *"_s151", 0 0, L_0x1005490; 1 drivers +v0xfc9340_0 .net *"_s155", 0 0, L_0x1005340; 1 drivers +v0xfc9420_0 .net *"_s159", 0 0, L_0x10053e0; 1 drivers +v0xfc9500_0 .net *"_s160", 17 0, L_0x1005530; 1 drivers +v0xfc95e0_0 .net *"_s162", 5 0, L_0x1005890; 1 drivers +L_0x2b99d7e1a2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xfc96c0_0 .net *"_s165", 1 0, L_0x2b99d7e1a2a0; 1 drivers +v0xfcb690_2 .array/port v0xfcb690, 2; +v0xfc97a0_0 .net *"_s173", 10 0, v0xfcb690_2; 1 drivers +v0xfcb690_3 .array/port v0xfcb690, 3; +v0xfc9880_0 .net *"_s179", 10 0, v0xfcb690_3; 1 drivers +v0xfcb690_0 .array/port v0xfcb690, 0; +v0xfc9960_0 .net *"_s185", 10 0, v0xfcb690_0; 1 drivers +v0xfcb690_1 .array/port v0xfcb690, 1; +v0xfc9a40_0 .net *"_s191", 10 0, v0xfcb690_1; 1 drivers +v0xfc9b20_0 .net *"_s23", 0 0, L_0x1002d50; 1 drivers +v0xfc9c00_0 .net *"_s27", 0 0, L_0x1002e20; 1 drivers +v0xfc8e50_0 .net *"_s31", 0 0, L_0x1002ef0; 1 drivers +v0xfc9ed0_0 .net *"_s36", 0 0, L_0x1003090; 1 drivers +v0xfc9fb0_0 .net *"_s42", 0 0, L_0x1003270; 1 drivers +v0xfca090_0 .net *"_s46", 0 0, L_0x1003310; 1 drivers +v0xfca170_0 .net *"_s50", 0 0, L_0x1003420; 1 drivers +v0xfca250_0 .net *"_s55", 0 0, L_0x1003630; 1 drivers +v0xfca330_0 .net *"_s61", 0 0, L_0x10038a0; 1 drivers +v0xfca410_0 .net *"_s65", 0 0, L_0x1003940; 1 drivers +v0xfca4f0_0 .net *"_s69", 0 0, L_0x1003a80; 1 drivers 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alias, 1 drivers +v0xfcb4d0_0 .net "leftOut", 14 0, L_0x10059f0; alias, 1 drivers +v0xfcb5b0_0 .var "mode", 2 0; +v0xfcb690 .array/s "outVals", 2 5, 10 0; +v0xfcb7d0_0 .var "phase", 2 0; +v0xfcb8b0_0 .net "portsHaveData", 5 2, L_0x1002f90; 1 drivers +v0xfc9ca0_0 .net "portsWantData", 5 2, L_0x10034c0; 1 drivers +v0xfc9d80_0 .net "readAckIn", 5 2, L_0x1003b20; 1 drivers +v0xfcbd60_0 .var "readAckOut", 5 2; +v0xfcbe00_0 .var "readTarget", 2 0; +v0xfcbee0_0 .var/s "readValue", 10 0; +L_0x2b99d7e1a258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xfcbfc0 .array "regVals", 0 7; +v0xfcbfc0_0 .net/s v0xfcbfc0 0, 10 0, L_0x2b99d7e1a258; 1 drivers +v0xfcbfc0_1 .net/s v0xfcbfc0 1, 10 0, L_0x1002580; 1 drivers +v0xfcbfc0_2 .net/s v0xfcbfc0 2, 10 0, L_0x1002860; 1 drivers +v0xfcbfc0_3 .net/s v0xfcbfc0 3, 10 0, L_0x1002990; 1 drivers +v0xfcbfc0_4 .net/s v0xfcbfc0 4, 10 0, L_0x1002ac0; 1 drivers +v0xfcbfc0_5 .net/s v0xfcbfc0 5, 10 0, L_0x1002bf0; 1 drivers +o0x2b99d7de9eb8 .functor BUFZ 11, C4; HiZ drive +v0xfcbfc0_6 .net/s v0xfcbfc0 6, 10 0, o0x2b99d7de9eb8; 0 drivers +o0x2b99d7de9ee8 .functor BUFZ 11, C4; HiZ drive +v0xfcbfc0_7 .net/s v0xfcbfc0 7, 10 0, o0x2b99d7de9ee8; 0 drivers +v0xfcc1d0_0 .net "right", 14 0, L_0xff9620; alias, 1 drivers +v0xfcc2b0_0 .net "rightOut", 14 0, L_0x10063c0; alias, 1 drivers +v0xfcc390_0 .net "up", 14 0, L_0xffd990; alias, 1 drivers +v0xfcc470_0 .net "upOut", 14 0, L_0x1005720; alias, 1 drivers +v0xfcc550_0 .var "weHaveData", 5 2; +v0xfcc630_0 .var "weWantData", 5 2; +v0xfcc710_0 .net "writeAckIn", 5 2, L_0x1004400; 1 drivers +v0xfcc7f0_0 .var "writeAckOut", 5 2; +v0xfcc8d0_0 .var "writeTarget", 2 0; +v0xfcc9b0_0 .var/s "writeValue", 10 0; +E_0xf235d0 .event negedge, v0xfcaef0_0; +E_0xf45d10 .event posedge, v0xfcaef0_0; +L_0x1002860 .part L_0xff5db0, 0, 11; +L_0x1002990 .part L_0xff9620, 0, 11; +L_0x1002ac0 .part L_0xffd990, 0, 11; +L_0x1002bf0 .part L_0x1001530, 0, 11; +L_0x1002d50 .part L_0xff5db0, 11, 1; +L_0x1002e20 .part L_0xff9620, 11, 1; +L_0x1002ef0 .part L_0xffd990, 11, 1; +L_0x1002f90 .concat8 [ 1 1 1 1], L_0x1002d50, L_0x1002e20, L_0x1002ef0, L_0x1003090; +L_0x1003090 .part L_0x1001530, 11, 1; +L_0x1003180 .reduce/or L_0x1002f90; +L_0x1003270 .part L_0xff5db0, 12, 1; +L_0x1003310 .part L_0xff9620, 12, 1; +L_0x1003420 .part L_0xffd990, 12, 1; +L_0x10034c0 .concat8 [ 1 1 1 1], L_0x1003270, L_0x1003310, L_0x1003420, L_0x1003630; +L_0x1003630 .part L_0x1001530, 12, 1; +L_0x1003720 .reduce/or L_0x10034c0; +L_0x10038a0 .part L_0xff5db0, 13, 1; +L_0x1003940 .part L_0xff9620, 13, 1; +L_0x1003a80 .part L_0xffd990, 13, 1; +L_0x1003b20 .concat8 [ 1 1 1 1], L_0x10038a0, L_0x1003940, L_0x1003a80, L_0x10039e0; +L_0x10039e0 .part L_0x1001530, 13, 1; +L_0x1003db0 .reduce/or L_0x1003b20; +L_0x1003cb0 .part L_0xff5db0, 14, 1; +L_0x1004070 .part L_0xff9620, 14, 1; +L_0x1003ea0 .part L_0xffd990, 14, 1; +L_0x1004400 .concat8 [ 1 1 1 1], L_0x1003cb0, L_0x1004070, L_0x1003ea0, L_0x1004220; +L_0x1004220 .part L_0x1001530, 14, 1; +L_0x10046e0 .reduce/or L_0x1004400; +L_0x10044a0 .part v0xfcbd60_0, 0, 1; +L_0x1004870 .part v0xfcbd60_0, 1, 1; +L_0x1004780 .part v0xfcbd60_0, 2, 1; +L_0x1004a60 .part v0xfcbd60_0, 3, 1; +L_0x1004960 .part v0xfcc7f0_0, 0, 1; +L_0x1004ca0 .part v0xfcc7f0_0, 1, 1; +L_0x1004b90 .part v0xfcc7f0_0, 2, 1; +L_0x1004e60 .part v0xfcc7f0_0, 3, 1; +L_0x1004d40 .part v0xfcc630_0, 0, 1; +L_0x10050c0 .part v0xfcc630_0, 1, 1; +L_0x1004f90 .part v0xfcc630_0, 2, 1; +L_0x10052a0 .part v0xfcc630_0, 3, 1; +L_0x1005160 .part v0xfcc550_0, 0, 1; +L_0x1005490 .part v0xfcc550_0, 1, 1; +L_0x1005340 .part v0xfcc550_0, 2, 1; +L_0x10053e0 .part v0xfcc550_0, 3, 1; +L_0x1005530 .array/port v0xfcb250, L_0x1005890; +L_0x1005890 .concat [ 4 2 0 0], v0xfc8420_0, L_0x2b99d7e1a2a0; +LS_0x1005720_0_0 .concat8 [ 11 1 1 1], v0xfcb690_2, L_0x1005340, L_0x1004f90, L_0x1004b90; +LS_0x1005720_0_4 .concat8 [ 1 0 0 0], L_0x1004780; +L_0x1005720 .concat8 [ 14 1 0 0], LS_0x1005720_0_0, LS_0x1005720_0_4; +LS_0x1005cd0_0_0 .concat8 [ 11 1 1 1], v0xfcb690_3, L_0x10053e0, L_0x10052a0, L_0x1004e60; +LS_0x1005cd0_0_4 .concat8 [ 1 0 0 0], L_0x1004a60; +L_0x1005cd0 .concat8 [ 14 1 0 0], LS_0x1005cd0_0_0, LS_0x1005cd0_0_4; +LS_0x10059f0_0_0 .concat8 [ 11 1 1 1], v0xfcb690_0, L_0x1005160, L_0x1004d40, L_0x1004960; +LS_0x10059f0_0_4 .concat8 [ 1 0 0 0], L_0x10044a0; +L_0x10059f0 .concat8 [ 14 1 0 0], LS_0x10059f0_0_0, LS_0x10059f0_0_4; +LS_0x10063c0_0_0 .concat8 [ 11 1 1 1], v0xfcb690_1, L_0x1005490, L_0x10050c0, L_0x1004ca0; +LS_0x10063c0_0_4 .concat8 [ 1 0 0 0], L_0x1004870; +L_0x10063c0 .concat8 [ 14 1 0 0], LS_0x10063c0_0_0, LS_0x10063c0_0_4; +L_0x1006030 .part L_0x10033b0, 14, 4; +L_0x1006850 .part L_0x10033b0, 11, 3; +L_0x1006660 .part L_0x10033b0, 8, 3; +L_0x1006aa0 .part L_0x10033b0, 10, 4; +L_0x10068f0 .part L_0x10033b0, 0, 11; +S_0xfccc30 .scope module, "down" "tis100" 2 30, 3 49 0, S_0xf12740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -215,175 +215,175 @@ S_0x179ec30 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x16e4740; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x179ee20 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x179ee60 .param/str "memFile" 0 3 60, "jumpTest/down.dat"; -L_0x17d0290 .functor BUFZ 11, v0x179f1b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17d0490 .functor BUFZ 11, v0x179f1b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17d1350 .functor BUFZ 18, L_0x17d32c0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x179f1b0_0 .var/s "ACC", 10 0; -v0x179f2b0_0 .var/s "BAK", 10 0; -v0x179f390_0 .net "DST", 2 0, L_0x17d43b0; 1 drivers -v0x179f450_0 .net/s "IMM", 10 0, L_0x17d4450; 1 drivers -v0x179f530_0 .net "INST", 3 0, L_0x17d3c90; 1 drivers -v0x179f610_0 .net "LABEL", 3 0, L_0x17d4600; 1 drivers -v0x179f6f0_0 .var "PC", 3 0; -v0x179f7d0_0 .var "PCNEXT", 3 0; -v0x179f8b0_0 .net "SRC", 2 0, L_0x17d41c0; 1 drivers -v0x179fa20_0 .net *"_s103", 0 0, L_0x17d2600; 1 drivers -v0x179fb00_0 .net *"_s107", 0 0, L_0x17d2510; 1 drivers -v0x179fbe0_0 .net *"_s111", 0 0, L_0x17d27f0; 1 drivers -v0x179fcc0_0 .net *"_s115", 0 0, L_0x17d26f0; 1 drivers -v0x179fda0_0 .net *"_s119", 0 0, L_0x17d2a30; 1 drivers -v0x179fe80_0 .net *"_s123", 0 0, L_0x17d2920; 1 drivers -v0x179ff60_0 .net *"_s127", 0 0, L_0x17d2bf0; 1 drivers -v0x17a0040_0 .net *"_s131", 0 0, L_0x17d2ad0; 1 drivers -v0x17a01f0_0 .net *"_s135", 0 0, L_0x17d2e50; 1 drivers -v0x17a0290_0 .net *"_s139", 0 0, L_0x17d2d20; 1 drivers -v0x17a0370_0 .net *"_s143", 0 0, L_0x17d3030; 1 drivers -v0x17a0450_0 .net *"_s147", 0 0, L_0x17d2ef0; 1 drivers -v0x17a0530_0 .net *"_s151", 0 0, L_0x17d3220; 1 drivers -v0x17a0610_0 .net *"_s155", 0 0, L_0x17d30d0; 1 drivers -v0x17a06f0_0 .net *"_s159", 0 0, L_0x17d3170; 1 drivers -v0x17a07d0_0 .net *"_s160", 17 0, L_0x17d32c0; 1 drivers -v0x17a08b0_0 .net *"_s162", 5 0, L_0x17d3620; 1 drivers -L_0x2aef774e3210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x17a0990_0 .net *"_s165", 1 0, L_0x2aef774e3210; 1 drivers -v0x17a2920_2 .array/port v0x17a2920, 2; -v0x17a0a70_0 .net *"_s173", 10 0, v0x17a2920_2; 1 drivers -v0x17a2920_3 .array/port v0x17a2920, 3; -v0x17a0b50_0 .net *"_s179", 10 0, v0x17a2920_3; 1 drivers -v0x17a2920_0 .array/port v0x17a2920, 0; -v0x17a0c30_0 .net *"_s185", 10 0, v0x17a2920_0; 1 drivers -v0x17a2920_1 .array/port v0x17a2920, 1; -v0x17a0d10_0 .net *"_s191", 10 0, v0x17a2920_1; 1 drivers -v0x17a0df0_0 .net *"_s23", 0 0, L_0x17d0ae0; 1 drivers -v0x17a0ed0_0 .net *"_s27", 0 0, L_0x17d0c00; 1 drivers -v0x17a0120_0 .net *"_s31", 0 0, L_0x17d0cf0; 1 drivers -v0x17a11a0_0 .net *"_s36", 0 0, L_0x17d0fe0; 1 drivers -v0x17a1280_0 .net *"_s42", 0 0, L_0x17d1210; 1 drivers -v0x17a1360_0 .net *"_s46", 0 0, L_0x17d12b0; 1 drivers -v0x17a1440_0 .net *"_s50", 0 0, L_0x17d13c0; 1 drivers -v0x17a1520_0 .net *"_s55", 0 0, L_0x17d15d0; 1 drivers -v0x17a1600_0 .net *"_s61", 0 0, L_0x17d1840; 1 drivers -v0x17a16e0_0 .net *"_s65", 0 0, L_0x17d1970; 1 drivers -v0x17a17c0_0 .net *"_s69", 0 0, L_0x17d1b40; 1 drivers -v0x17a18a0_0 .net *"_s74", 0 0, L_0x17d1aa0; 1 drivers -v0x17a1980_0 .net *"_s80", 0 0, L_0x17d1cd0; 1 drivers -v0x17a1a60_0 .net *"_s84", 0 0, L_0x17d1fc0; 1 drivers -v0x17a1b40_0 .net *"_s88", 0 0, L_0x17d1f00; 1 drivers -v0x17a1c20_0 .net *"_s93", 0 0, L_0x17d2060; 1 drivers -v0x17a1d00_0 .net *"_s99", 0 0, L_0x17d22f0; 1 drivers -v0x17a1de0_0 .net/s "accOut", 10 0, L_0x17d0290; alias, 1 drivers -v0x17a1ec0_0 .net "anyHasData", 0 0, L_0x17d1120; 1 drivers -v0x17a1f80_0 .net "anyReadAck", 0 0, L_0x17d1e60; 1 drivers -v0x17a2040_0 .net "anyWantData", 0 0, L_0x17d16c0; 1 drivers -v0x17a2100_0 .net "anyWriteAck", 0 0, L_0x17d2420; 1 drivers -v0x17a21c0_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers -o0x2aef774b3cc8 .functor BUFZ 15, C4; HiZ drive -v0x17a2260_0 .net "down", 14 0, o0x2aef774b3cc8; 0 drivers -v0x17a2320_0 .net "downOut", 14 0, L_0x17d39f0; 1 drivers -v0x17a2400_0 .net "instruction", 17 0, L_0x17d1350; 1 drivers -v0x17a24e0 .array "instructions", 15 0, 17 0; -v0x17a25a0_0 .var "last", 2 0; -o0x2aef774b3d88 .functor BUFZ 15, C4; HiZ drive -v0x17a2680_0 .net "left", 14 0, o0x2aef774b3d88; 0 drivers -v0x17a2760_0 .net "leftOut", 14 0, L_0x17d3780; 1 drivers -v0x17a2840_0 .var "mode", 2 0; -v0x17a2920 .array/s "outVals", 2 5, 10 0; -v0x17a2a60_0 .var "phase", 2 0; -v0x17a2b40_0 .net "portsHaveData", 5 2, L_0x17d0e20; 1 drivers -v0x17a0f70_0 .net "portsWantData", 5 2, L_0x17d1460; 1 drivers -v0x17a1050_0 .net "readAckIn", 5 2, L_0x17d1be0; 1 drivers -v0x17a2ff0_0 .var "readAckOut", 5 2; -v0x17a3090_0 .var "readTarget", 2 0; -v0x17a3130_0 .var/s "readValue", 10 0; -L_0x2aef774e31c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x17a31d0 .array "regVals", 0 7; -v0x17a31d0_0 .net/s v0x17a31d0 0, 10 0, L_0x2aef774e31c8; 1 drivers -v0x17a31d0_1 .net/s v0x17a31d0 1, 10 0, L_0x17d0490; 1 drivers -v0x17a31d0_2 .net/s v0x17a31d0 2, 10 0, L_0x17d0800; 1 drivers -v0x17a31d0_3 .net/s v0x17a31d0 3, 10 0, L_0x17d08a0; 1 drivers -v0x17a31d0_4 .net/s v0x17a31d0 4, 10 0, L_0x17d0940; 1 drivers -v0x17a31d0_5 .net/s v0x17a31d0 5, 10 0, L_0x17d09e0; 1 drivers -o0x2aef774b4148 .functor BUFZ 11, C4; HiZ drive -v0x17a31d0_6 .net/s v0x17a31d0 6, 10 0, o0x2aef774b4148; 0 drivers -o0x2aef774b4178 .functor BUFZ 11, C4; HiZ drive -v0x17a31d0_7 .net/s v0x17a31d0 7, 10 0, o0x2aef774b4178; 0 drivers -o0x2aef774b41a8 .functor BUFZ 15, C4; HiZ drive -v0x17a33e0_0 .net "right", 14 0, o0x2aef774b41a8; 0 drivers -v0x17a34c0_0 .net "rightOut", 14 0, L_0x17d3fa0; 1 drivers -v0x17a35a0_0 .net "up", 14 0, L_0x17d7cd0; alias, 1 drivers -v0x17a3690_0 .net "upOut", 14 0, L_0x17d3530; alias, 1 drivers -v0x17a3760_0 .var "weHaveData", 5 2; -v0x17a3820_0 .var "weWantData", 5 2; -v0x17a3900_0 .net "writeAckIn", 5 2, L_0x17d2130; 1 drivers -v0x17a39e0_0 .var "writeAckOut", 5 2; -v0x17a3ac0_0 .var "writeTarget", 2 0; -v0x17a3ba0_0 .var/s "writeValue", 10 0; -L_0x17d0800 .part o0x2aef774b3d88, 0, 11; -L_0x17d08a0 .part o0x2aef774b41a8, 0, 11; -L_0x17d0940 .part L_0x17d7cd0, 0, 11; -L_0x17d09e0 .part o0x2aef774b3cc8, 0, 11; -L_0x17d0ae0 .part o0x2aef774b3d88, 11, 1; -L_0x17d0c00 .part o0x2aef774b41a8, 11, 1; -L_0x17d0cf0 .part L_0x17d7cd0, 11, 1; -L_0x17d0e20 .concat8 [ 1 1 1 1], L_0x17d0ae0, L_0x17d0c00, L_0x17d0cf0, L_0x17d0fe0; -L_0x17d0fe0 .part o0x2aef774b3cc8, 11, 1; -L_0x17d1120 .reduce/or L_0x17d0e20; -L_0x17d1210 .part o0x2aef774b3d88, 12, 1; -L_0x17d12b0 .part o0x2aef774b41a8, 12, 1; -L_0x17d13c0 .part L_0x17d7cd0, 12, 1; -L_0x17d1460 .concat8 [ 1 1 1 1], L_0x17d1210, L_0x17d12b0, L_0x17d13c0, L_0x17d15d0; -L_0x17d15d0 .part o0x2aef774b3cc8, 12, 1; -L_0x17d16c0 .reduce/or L_0x17d1460; -L_0x17d1840 .part o0x2aef774b3d88, 13, 1; -L_0x17d1970 .part o0x2aef774b41a8, 13, 1; -L_0x17d1b40 .part L_0x17d7cd0, 13, 1; -L_0x17d1be0 .concat8 [ 1 1 1 1], L_0x17d1840, L_0x17d1970, L_0x17d1b40, L_0x17d1aa0; -L_0x17d1aa0 .part o0x2aef774b3cc8, 13, 1; -L_0x17d1e60 .reduce/or L_0x17d1be0; -L_0x17d1cd0 .part o0x2aef774b3d88, 14, 1; -L_0x17d1fc0 .part o0x2aef774b41a8, 14, 1; -L_0x17d1f00 .part L_0x17d7cd0, 14, 1; -L_0x17d2130 .concat8 [ 1 1 1 1], L_0x17d1cd0, L_0x17d1fc0, L_0x17d1f00, L_0x17d2060; -L_0x17d2060 .part o0x2aef774b3cc8, 14, 1; -L_0x17d2420 .reduce/or L_0x17d2130; -L_0x17d22f0 .part v0x17a2ff0_0, 0, 1; -L_0x17d2600 .part v0x17a2ff0_0, 1, 1; -L_0x17d2510 .part v0x17a2ff0_0, 2, 1; -L_0x17d27f0 .part v0x17a2ff0_0, 3, 1; -L_0x17d26f0 .part v0x17a39e0_0, 0, 1; -L_0x17d2a30 .part v0x17a39e0_0, 1, 1; -L_0x17d2920 .part v0x17a39e0_0, 2, 1; -L_0x17d2bf0 .part v0x17a39e0_0, 3, 1; -L_0x17d2ad0 .part v0x17a3820_0, 0, 1; -L_0x17d2e50 .part v0x17a3820_0, 1, 1; -L_0x17d2d20 .part v0x17a3820_0, 2, 1; -L_0x17d3030 .part v0x17a3820_0, 3, 1; -L_0x17d2ef0 .part v0x17a3760_0, 0, 1; -L_0x17d3220 .part v0x17a3760_0, 1, 1; -L_0x17d30d0 .part v0x17a3760_0, 2, 1; -L_0x17d3170 .part v0x17a3760_0, 3, 1; -L_0x17d32c0 .array/port v0x17a24e0, L_0x17d3620; -L_0x17d3620 .concat [ 4 2 0 0], v0x179f6f0_0, L_0x2aef774e3210; -LS_0x17d3530_0_0 .concat8 [ 11 1 1 1], v0x17a2920_2, L_0x17d30d0, L_0x17d2d20, L_0x17d2920; -LS_0x17d3530_0_4 .concat8 [ 1 0 0 0], L_0x17d2510; -L_0x17d3530 .concat8 [ 14 1 0 0], LS_0x17d3530_0_0, LS_0x17d3530_0_4; -LS_0x17d39f0_0_0 .concat8 [ 11 1 1 1], v0x17a2920_3, L_0x17d3170, L_0x17d3030, L_0x17d2bf0; -LS_0x17d39f0_0_4 .concat8 [ 1 0 0 0], L_0x17d27f0; -L_0x17d39f0 .concat8 [ 14 1 0 0], LS_0x17d39f0_0_0, LS_0x17d39f0_0_4; -LS_0x17d3780_0_0 .concat8 [ 11 1 1 1], v0x17a2920_0, L_0x17d2ef0, L_0x17d2ad0, L_0x17d26f0; -LS_0x17d3780_0_4 .concat8 [ 1 0 0 0], L_0x17d22f0; -L_0x17d3780 .concat8 [ 14 1 0 0], LS_0x17d3780_0_0, LS_0x17d3780_0_4; -LS_0x17d3fa0_0_0 .concat8 [ 11 1 1 1], v0x17a2920_1, L_0x17d3220, L_0x17d2e50, L_0x17d2a30; -LS_0x17d3fa0_0_4 .concat8 [ 1 0 0 0], L_0x17d2600; -L_0x17d3fa0 .concat8 [ 14 1 0 0], LS_0x17d3fa0_0_0, LS_0x17d3fa0_0_4; -L_0x17d3c90 .part L_0x17d1350, 14, 4; -L_0x17d43b0 .part L_0x17d1350, 11, 3; -L_0x17d41c0 .part L_0x17d1350, 8, 3; -L_0x17d4600 .part L_0x17d1350, 10, 4; -L_0x17d4450 .part L_0x17d1350, 0, 11; -S_0x17a3e20 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x16e4740; +P_0xfcce20 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0xfcce60 .param/str "memFile" 0 3 60, "jumpTest/down.dat"; +L_0xffe290 .functor BUFZ 11, v0xfcd1b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xffe490 .functor BUFZ 11, v0xfcd1b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xfff350 .functor BUFZ 18, L_0x10012c0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xfcd1b0_0 .var/s "ACC", 10 0; +v0xfcd2b0_0 .var/s "BAK", 10 0; +v0xfcd390_0 .net "DST", 2 0, L_0x10023b0; 1 drivers +v0xfcd450_0 .net/s "IMM", 10 0, L_0x1002450; 1 drivers +v0xfcd530_0 .net "INST", 3 0, L_0x1001c90; 1 drivers +v0xfcd610_0 .net "LABEL", 3 0, L_0x1002600; 1 drivers +v0xfcd6f0_0 .var "PC", 3 0; +v0xfcd7d0_0 .var "PCNEXT", 3 0; +v0xfcd8b0_0 .net "SRC", 2 0, L_0x10021c0; 1 drivers +v0xfcda20_0 .net *"_s103", 0 0, L_0x1000600; 1 drivers +v0xfcdb00_0 .net *"_s107", 0 0, L_0x1000510; 1 drivers +v0xfcdbe0_0 .net *"_s111", 0 0, L_0x10007f0; 1 drivers +v0xfcdcc0_0 .net *"_s115", 0 0, L_0x10006f0; 1 drivers +v0xfcdda0_0 .net *"_s119", 0 0, L_0x1000a30; 1 drivers +v0xfcde80_0 .net *"_s123", 0 0, L_0x1000920; 1 drivers +v0xfcdf60_0 .net *"_s127", 0 0, L_0x1000bf0; 1 drivers +v0xfce040_0 .net *"_s131", 0 0, L_0x1000ad0; 1 drivers +v0xfce1f0_0 .net *"_s135", 0 0, L_0x1000e50; 1 drivers +v0xfce290_0 .net *"_s139", 0 0, L_0x1000d20; 1 drivers +v0xfce370_0 .net *"_s143", 0 0, L_0x1001030; 1 drivers +v0xfce450_0 .net *"_s147", 0 0, L_0x1000ef0; 1 drivers +v0xfce530_0 .net *"_s151", 0 0, L_0x1001220; 1 drivers +v0xfce610_0 .net *"_s155", 0 0, L_0x10010d0; 1 drivers +v0xfce6f0_0 .net *"_s159", 0 0, L_0x1001170; 1 drivers +v0xfce7d0_0 .net *"_s160", 17 0, L_0x10012c0; 1 drivers +v0xfce8b0_0 .net *"_s162", 5 0, L_0x1001620; 1 drivers +L_0x2b99d7e1a210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xfce990_0 .net *"_s165", 1 0, L_0x2b99d7e1a210; 1 drivers +v0xfd0920_2 .array/port v0xfd0920, 2; +v0xfcea70_0 .net *"_s173", 10 0, v0xfd0920_2; 1 drivers +v0xfd0920_3 .array/port v0xfd0920, 3; +v0xfceb50_0 .net *"_s179", 10 0, v0xfd0920_3; 1 drivers +v0xfd0920_0 .array/port v0xfd0920, 0; +v0xfcec30_0 .net *"_s185", 10 0, v0xfd0920_0; 1 drivers +v0xfd0920_1 .array/port v0xfd0920, 1; +v0xfced10_0 .net *"_s191", 10 0, v0xfd0920_1; 1 drivers +v0xfcedf0_0 .net *"_s23", 0 0, L_0xffeae0; 1 drivers +v0xfceed0_0 .net *"_s27", 0 0, L_0xffec00; 1 drivers +v0xfce120_0 .net *"_s31", 0 0, L_0xffecf0; 1 drivers +v0xfcf1a0_0 .net *"_s36", 0 0, L_0xffefe0; 1 drivers +v0xfcf280_0 .net *"_s42", 0 0, L_0xfff210; 1 drivers +v0xfcf360_0 .net *"_s46", 0 0, L_0xfff2b0; 1 drivers +v0xfcf440_0 .net *"_s50", 0 0, L_0xfff3c0; 1 drivers +v0xfcf520_0 .net *"_s55", 0 0, L_0xfff5d0; 1 drivers +v0xfcf600_0 .net *"_s61", 0 0, L_0xfff840; 1 drivers +v0xfcf6e0_0 .net *"_s65", 0 0, L_0xfff970; 1 drivers +v0xfcf7c0_0 .net *"_s69", 0 0, L_0xfffb40; 1 drivers +v0xfcf8a0_0 .net *"_s74", 0 0, L_0xfffaa0; 1 drivers +v0xfcf980_0 .net *"_s80", 0 0, L_0xfffcd0; 1 drivers +v0xfcfa60_0 .net *"_s84", 0 0, L_0xffffc0; 1 drivers +v0xfcfb40_0 .net *"_s88", 0 0, L_0xffff00; 1 drivers +v0xfcfc20_0 .net *"_s93", 0 0, L_0x1000060; 1 drivers +v0xfcfd00_0 .net *"_s99", 0 0, L_0x10002f0; 1 drivers +v0xfcfde0_0 .net/s "accOut", 10 0, L_0xffe290; alias, 1 drivers +v0xfcfec0_0 .net "anyHasData", 0 0, L_0xfff120; 1 drivers +v0xfcff80_0 .net "anyReadAck", 0 0, L_0xfffe60; 1 drivers +v0xfd0040_0 .net "anyWantData", 0 0, L_0xfff6c0; 1 drivers +v0xfd0100_0 .net "anyWriteAck", 0 0, L_0x1000420; 1 drivers +v0xfd01c0_0 .net "clk", 0 0, v0xfe2100_0; alias, 1 drivers +o0x2b99d7deacc8 .functor BUFZ 15, C4; HiZ drive +v0xfd0260_0 .net "down", 14 0, o0x2b99d7deacc8; 0 drivers +v0xfd0320_0 .net "downOut", 14 0, L_0x10019f0; 1 drivers +v0xfd0400_0 .net "instruction", 17 0, L_0xfff350; 1 drivers +v0xfd04e0 .array "instructions", 15 0, 17 0; +v0xfd05a0_0 .var "last", 2 0; +o0x2b99d7dead88 .functor BUFZ 15, C4; HiZ drive +v0xfd0680_0 .net "left", 14 0, o0x2b99d7dead88; 0 drivers +v0xfd0760_0 .net "leftOut", 14 0, L_0x1001780; 1 drivers +v0xfd0840_0 .var "mode", 2 0; +v0xfd0920 .array/s "outVals", 2 5, 10 0; +v0xfd0a60_0 .var "phase", 2 0; +v0xfd0b40_0 .net "portsHaveData", 5 2, L_0xffee20; 1 drivers +v0xfcef70_0 .net "portsWantData", 5 2, L_0xfff460; 1 drivers +v0xfcf050_0 .net "readAckIn", 5 2, L_0xfffbe0; 1 drivers +v0xfd0ff0_0 .var "readAckOut", 5 2; +v0xfd1090_0 .var "readTarget", 2 0; +v0xfd1130_0 .var/s "readValue", 10 0; +L_0x2b99d7e1a1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xfd11d0 .array "regVals", 0 7; +v0xfd11d0_0 .net/s v0xfd11d0 0, 10 0, L_0x2b99d7e1a1c8; 1 drivers +v0xfd11d0_1 .net/s v0xfd11d0 1, 10 0, L_0xffe490; 1 drivers +v0xfd11d0_2 .net/s v0xfd11d0 2, 10 0, L_0xffe800; 1 drivers +v0xfd11d0_3 .net/s v0xfd11d0 3, 10 0, L_0xffe8a0; 1 drivers +v0xfd11d0_4 .net/s v0xfd11d0 4, 10 0, L_0xffe940; 1 drivers +v0xfd11d0_5 .net/s v0xfd11d0 5, 10 0, L_0xffe9e0; 1 drivers +o0x2b99d7deb148 .functor BUFZ 11, C4; HiZ drive +v0xfd11d0_6 .net/s v0xfd11d0 6, 10 0, o0x2b99d7deb148; 0 drivers +o0x2b99d7deb178 .functor BUFZ 11, C4; HiZ drive +v0xfd11d0_7 .net/s v0xfd11d0 7, 10 0, o0x2b99d7deb178; 0 drivers +o0x2b99d7deb1a8 .functor BUFZ 15, C4; HiZ drive +v0xfd13e0_0 .net "right", 14 0, o0x2b99d7deb1a8; 0 drivers +v0xfd14c0_0 .net "rightOut", 14 0, L_0x1001fa0; 1 drivers +v0xfd15a0_0 .net "up", 14 0, L_0x1005cd0; alias, 1 drivers +v0xfd1690_0 .net "upOut", 14 0, L_0x1001530; alias, 1 drivers +v0xfd1760_0 .var "weHaveData", 5 2; +v0xfd1820_0 .var "weWantData", 5 2; +v0xfd1900_0 .net "writeAckIn", 5 2, L_0x1000130; 1 drivers +v0xfd19e0_0 .var "writeAckOut", 5 2; +v0xfd1ac0_0 .var "writeTarget", 2 0; +v0xfd1ba0_0 .var/s "writeValue", 10 0; +L_0xffe800 .part o0x2b99d7dead88, 0, 11; +L_0xffe8a0 .part o0x2b99d7deb1a8, 0, 11; +L_0xffe940 .part L_0x1005cd0, 0, 11; +L_0xffe9e0 .part o0x2b99d7deacc8, 0, 11; +L_0xffeae0 .part o0x2b99d7dead88, 11, 1; +L_0xffec00 .part o0x2b99d7deb1a8, 11, 1; +L_0xffecf0 .part L_0x1005cd0, 11, 1; +L_0xffee20 .concat8 [ 1 1 1 1], L_0xffeae0, L_0xffec00, L_0xffecf0, L_0xffefe0; +L_0xffefe0 .part o0x2b99d7deacc8, 11, 1; +L_0xfff120 .reduce/or L_0xffee20; +L_0xfff210 .part o0x2b99d7dead88, 12, 1; +L_0xfff2b0 .part o0x2b99d7deb1a8, 12, 1; +L_0xfff3c0 .part L_0x1005cd0, 12, 1; +L_0xfff460 .concat8 [ 1 1 1 1], L_0xfff210, L_0xfff2b0, L_0xfff3c0, L_0xfff5d0; +L_0xfff5d0 .part o0x2b99d7deacc8, 12, 1; +L_0xfff6c0 .reduce/or L_0xfff460; +L_0xfff840 .part o0x2b99d7dead88, 13, 1; +L_0xfff970 .part o0x2b99d7deb1a8, 13, 1; +L_0xfffb40 .part L_0x1005cd0, 13, 1; +L_0xfffbe0 .concat8 [ 1 1 1 1], L_0xfff840, L_0xfff970, L_0xfffb40, L_0xfffaa0; +L_0xfffaa0 .part o0x2b99d7deacc8, 13, 1; +L_0xfffe60 .reduce/or L_0xfffbe0; +L_0xfffcd0 .part o0x2b99d7dead88, 14, 1; +L_0xffffc0 .part o0x2b99d7deb1a8, 14, 1; +L_0xffff00 .part L_0x1005cd0, 14, 1; +L_0x1000130 .concat8 [ 1 1 1 1], L_0xfffcd0, L_0xffffc0, L_0xffff00, L_0x1000060; +L_0x1000060 .part o0x2b99d7deacc8, 14, 1; +L_0x1000420 .reduce/or L_0x1000130; +L_0x10002f0 .part v0xfd0ff0_0, 0, 1; +L_0x1000600 .part v0xfd0ff0_0, 1, 1; +L_0x1000510 .part v0xfd0ff0_0, 2, 1; +L_0x10007f0 .part v0xfd0ff0_0, 3, 1; +L_0x10006f0 .part v0xfd19e0_0, 0, 1; +L_0x1000a30 .part v0xfd19e0_0, 1, 1; +L_0x1000920 .part v0xfd19e0_0, 2, 1; +L_0x1000bf0 .part v0xfd19e0_0, 3, 1; +L_0x1000ad0 .part v0xfd1820_0, 0, 1; +L_0x1000e50 .part v0xfd1820_0, 1, 1; +L_0x1000d20 .part v0xfd1820_0, 2, 1; +L_0x1001030 .part v0xfd1820_0, 3, 1; +L_0x1000ef0 .part v0xfd1760_0, 0, 1; +L_0x1001220 .part v0xfd1760_0, 1, 1; +L_0x10010d0 .part v0xfd1760_0, 2, 1; +L_0x1001170 .part v0xfd1760_0, 3, 1; +L_0x10012c0 .array/port v0xfd04e0, L_0x1001620; +L_0x1001620 .concat [ 4 2 0 0], v0xfcd6f0_0, L_0x2b99d7e1a210; +LS_0x1001530_0_0 .concat8 [ 11 1 1 1], v0xfd0920_2, L_0x10010d0, L_0x1000d20, L_0x1000920; +LS_0x1001530_0_4 .concat8 [ 1 0 0 0], L_0x1000510; +L_0x1001530 .concat8 [ 14 1 0 0], LS_0x1001530_0_0, LS_0x1001530_0_4; +LS_0x10019f0_0_0 .concat8 [ 11 1 1 1], v0xfd0920_3, L_0x1001170, L_0x1001030, L_0x1000bf0; +LS_0x10019f0_0_4 .concat8 [ 1 0 0 0], L_0x10007f0; +L_0x10019f0 .concat8 [ 14 1 0 0], LS_0x10019f0_0_0, LS_0x10019f0_0_4; +LS_0x1001780_0_0 .concat8 [ 11 1 1 1], v0xfd0920_0, L_0x1000ef0, L_0x1000ad0, L_0x10006f0; +LS_0x1001780_0_4 .concat8 [ 1 0 0 0], L_0x10002f0; +L_0x1001780 .concat8 [ 14 1 0 0], LS_0x1001780_0_0, LS_0x1001780_0_4; +LS_0x1001fa0_0_0 .concat8 [ 11 1 1 1], v0xfd0920_1, L_0x1001220, L_0x1000e50, L_0x1000a30; +LS_0x1001fa0_0_4 .concat8 [ 1 0 0 0], L_0x1000600; +L_0x1001fa0 .concat8 [ 14 1 0 0], LS_0x1001fa0_0_0, LS_0x1001fa0_0_4; +L_0x1001c90 .part L_0xfff350, 14, 4; +L_0x10023b0 .part L_0xfff350, 11, 3; +L_0x10021c0 .part L_0xfff350, 8, 3; +L_0x1002600 .part L_0xfff350, 10, 4; +L_0x1002450 .part L_0xfff350, 0, 11; +S_0xfd1e20 .scope module, "left" "tis100" 2 27, 3 49 0, S_0xf12740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -395,175 +395,175 @@ S_0x17a3e20 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x16e4740; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x17a3ff0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x17a4030 .param/str "memFile" 0 3 60, "jumpTest/left.dat"; -L_0x17b4320 .functor BUFZ 11, v0x17a43b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17c43c0 .functor BUFZ 11, v0x17a43b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17c5090 .functor BUFZ 18, L_0x17c7080, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x17a43b0_0 .var/s "ACC", 10 0; -v0x17a44b0_0 .var/s "BAK", 10 0; -v0x17a4590_0 .net "DST", 2 0, L_0x17c81c0; 1 drivers -v0x17a4650_0 .net/s "IMM", 10 0, L_0x17c8260; 1 drivers -v0x17a4730_0 .net "INST", 3 0, L_0x17c7aa0; 1 drivers -v0x17a4810_0 .net "LABEL", 3 0, L_0x17c8410; 1 drivers -v0x17a48f0_0 .var "PC", 3 0; -v0x17a49d0_0 .var "PCNEXT", 3 0; -v0x17a4ab0_0 .net "SRC", 2 0, L_0x17c7fd0; 1 drivers -v0x17a4c20_0 .net *"_s103", 0 0, L_0x17c63c0; 1 drivers -v0x17a4d00_0 .net *"_s107", 0 0, L_0x17c62d0; 1 drivers -v0x17a4de0_0 .net *"_s111", 0 0, L_0x17c65b0; 1 drivers -v0x17a4ec0_0 .net *"_s115", 0 0, L_0x17c64b0; 1 drivers -v0x17a4fa0_0 .net *"_s119", 0 0, L_0x17c67f0; 1 drivers -v0x17a5080_0 .net *"_s123", 0 0, L_0x17c66e0; 1 drivers -v0x17a5160_0 .net *"_s127", 0 0, L_0x17c69b0; 1 drivers -v0x17a5240_0 .net *"_s131", 0 0, L_0x17c6890; 1 drivers -v0x17a53f0_0 .net *"_s135", 0 0, L_0x17c6c10; 1 drivers -v0x17a5490_0 .net *"_s139", 0 0, L_0x17c6ae0; 1 drivers -v0x17a5570_0 .net *"_s143", 0 0, L_0x17c6df0; 1 drivers -v0x17a5650_0 .net *"_s147", 0 0, L_0x17c6cb0; 1 drivers -v0x17a5730_0 .net *"_s151", 0 0, L_0x17c6fe0; 1 drivers -v0x17a5810_0 .net *"_s155", 0 0, L_0x17c6e90; 1 drivers -v0x17a58f0_0 .net *"_s159", 0 0, L_0x17c6f30; 1 drivers -v0x17a59d0_0 .net *"_s160", 17 0, L_0x17c7080; 1 drivers -v0x17a5ab0_0 .net *"_s162", 5 0, L_0x17c73e0; 1 drivers -L_0x2aef774e3060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x17a5b90_0 .net *"_s165", 1 0, L_0x2aef774e3060; 1 drivers -v0x17a7b40_2 .array/port v0x17a7b40, 2; -v0x17a5c70_0 .net *"_s173", 10 0, v0x17a7b40_2; 1 drivers -v0x17a7b40_3 .array/port v0x17a7b40, 3; -v0x17a5d50_0 .net *"_s179", 10 0, v0x17a7b40_3; 1 drivers -v0x17a7b40_0 .array/port v0x17a7b40, 0; -v0x17a5e30_0 .net *"_s185", 10 0, v0x17a7b40_0; 1 drivers -v0x17a7b40_1 .array/port v0x17a7b40, 1; -v0x17a5f10_0 .net *"_s191", 10 0, v0x17a7b40_1; 1 drivers -v0x17a5ff0_0 .net *"_s23", 0 0, L_0x17c4820; 1 drivers -v0x17a60d0_0 .net *"_s27", 0 0, L_0x17c4940; 1 drivers -v0x17a5320_0 .net *"_s31", 0 0, L_0x17c4ab0; 1 drivers -v0x17a63a0_0 .net *"_s36", 0 0, L_0x17c4d60; 1 drivers -v0x17a6480_0 .net *"_s42", 0 0, L_0x17a8500; 1 drivers -v0x17a6560_0 .net *"_s46", 0 0, L_0x17c4ff0; 1 drivers -v0x17a6640_0 .net *"_s50", 0 0, L_0x17c5100; 1 drivers -v0x17a6720_0 .net *"_s55", 0 0, L_0x17c5360; 1 drivers -v0x17a6800_0 .net *"_s61", 0 0, L_0x17c55d0; 1 drivers -v0x17a68e0_0 .net *"_s65", 0 0, L_0x17c5700; 1 drivers -v0x17a69c0_0 .net *"_s69", 0 0, L_0x17c5840; 1 drivers -v0x17a6aa0_0 .net *"_s74", 0 0, L_0x17c57a0; 1 drivers -v0x17a6b80_0 .net *"_s80", 0 0, L_0x17c5a60; 1 drivers -v0x17a6c60_0 .net *"_s84", 0 0, L_0x17c5d50; 1 drivers -v0x17a6d40_0 .net *"_s88", 0 0, L_0x17c5c90; 1 drivers -v0x17a6e20_0 .net *"_s93", 0 0, L_0x17c5df0; 1 drivers -v0x17a6f00_0 .net *"_s99", 0 0, L_0x17c60b0; 1 drivers -v0x17a6fe0_0 .net/s "accOut", 10 0, L_0x17b4320; alias, 1 drivers -v0x17a70c0_0 .net "anyHasData", 0 0, L_0x17c4ea0; 1 drivers -v0x17a7180_0 .net "anyReadAck", 0 0, L_0x17c5bf0; 1 drivers -v0x17a7240_0 .net "anyWantData", 0 0, L_0x17c5450; 1 drivers -v0x17a7300_0 .net "anyWriteAck", 0 0, L_0x17c61e0; 1 drivers -v0x17a73c0_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers -o0x2aef774b4ef8 .functor BUFZ 15, C4; HiZ drive -v0x17a7460_0 .net "down", 14 0, o0x2aef774b4ef8; 0 drivers -v0x17a7540_0 .net "downOut", 14 0, L_0x17c7800; 1 drivers -v0x17a7620_0 .net "instruction", 17 0, L_0x17c5090; 1 drivers -v0x17a7700 .array "instructions", 15 0, 17 0; -v0x17a77c0_0 .var "last", 2 0; -o0x2aef774b4fb8 .functor BUFZ 15, C4; HiZ drive -v0x17a78a0_0 .net "left", 14 0, o0x2aef774b4fb8; 0 drivers -v0x17a7980_0 .net "leftOut", 14 0, L_0x17c7540; 1 drivers -v0x17a7a60_0 .var "mode", 2 0; -v0x17a7b40 .array/s "outVals", 2 5, 10 0; -v0x17a7c80_0 .var "phase", 2 0; -v0x17a7d60_0 .net "portsHaveData", 5 2, L_0x17c4b50; 1 drivers -v0x17a4160_0 .net "portsWantData", 5 2, L_0x17c51a0; 1 drivers -v0x17a61b0_0 .net "readAckIn", 5 2, L_0x17c5970; 1 drivers -v0x17a6290_0 .var "readAckOut", 5 2; -v0x17a8210_0 .var "readTarget", 2 0; -v0x17a82f0_0 .var/s "readValue", 10 0; -L_0x2aef774e3018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x17a83d0 .array "regVals", 0 7; -v0x17a83d0_0 .net/s v0x17a83d0 0, 10 0, L_0x2aef774e3018; 1 drivers -v0x17a83d0_1 .net/s v0x17a83d0 1, 10 0, L_0x17c43c0; 1 drivers -v0x17a83d0_2 .net/s v0x17a83d0 2, 10 0, L_0x17c4480; 1 drivers -v0x17a83d0_3 .net/s v0x17a83d0 3, 10 0, L_0x17c4520; 1 drivers -v0x17a83d0_4 .net/s v0x17a83d0 4, 10 0, L_0x17c45f0; 1 drivers -v0x17a83d0_5 .net/s v0x17a83d0 5, 10 0, L_0x17c46f0; 1 drivers -o0x2aef774b5378 .functor BUFZ 11, C4; HiZ drive -v0x17a83d0_6 .net/s v0x17a83d0 6, 10 0, o0x2aef774b5378; 0 drivers -o0x2aef774b53a8 .functor BUFZ 11, C4; HiZ drive -v0x17a83d0_7 .net/s v0x17a83d0 7, 10 0, o0x2aef774b53a8; 0 drivers -v0x17a85e0_0 .net "right", 14 0, L_0x17d79f0; alias, 1 drivers -v0x17a86d0_0 .net "rightOut", 14 0, L_0x17c7db0; alias, 1 drivers -o0x2aef774b53d8 .functor BUFZ 15, C4; HiZ drive -v0x17a87a0_0 .net "up", 14 0, o0x2aef774b53d8; 0 drivers -v0x17a8860_0 .net "upOut", 14 0, L_0x17c72f0; 1 drivers -v0x17a8940_0 .var "weHaveData", 5 2; -v0x17a8a20_0 .var "weWantData", 5 2; -v0x17a8b00_0 .net "writeAckIn", 5 2, L_0x17c5ec0; 1 drivers -v0x17a8be0_0 .var "writeAckOut", 5 2; -v0x17a8cc0_0 .var "writeTarget", 2 0; -v0x17a8da0_0 .var/s "writeValue", 10 0; -L_0x17c4480 .part o0x2aef774b4fb8, 0, 11; -L_0x17c4520 .part L_0x17d79f0, 0, 11; -L_0x17c45f0 .part o0x2aef774b53d8, 0, 11; -L_0x17c46f0 .part o0x2aef774b4ef8, 0, 11; -L_0x17c4820 .part o0x2aef774b4fb8, 11, 1; -L_0x17c4940 .part L_0x17d79f0, 11, 1; -L_0x17c4ab0 .part o0x2aef774b53d8, 11, 1; -L_0x17c4b50 .concat8 [ 1 1 1 1], L_0x17c4820, L_0x17c4940, L_0x17c4ab0, L_0x17c4d60; -L_0x17c4d60 .part o0x2aef774b4ef8, 11, 1; -L_0x17c4ea0 .reduce/or L_0x17c4b50; -L_0x17a8500 .part o0x2aef774b4fb8, 12, 1; -L_0x17c4ff0 .part L_0x17d79f0, 12, 1; -L_0x17c5100 .part o0x2aef774b53d8, 12, 1; -L_0x17c51a0 .concat8 [ 1 1 1 1], L_0x17a8500, L_0x17c4ff0, L_0x17c5100, L_0x17c5360; -L_0x17c5360 .part o0x2aef774b4ef8, 12, 1; -L_0x17c5450 .reduce/or L_0x17c51a0; -L_0x17c55d0 .part o0x2aef774b4fb8, 13, 1; -L_0x17c5700 .part L_0x17d79f0, 13, 1; -L_0x17c5840 .part o0x2aef774b53d8, 13, 1; -L_0x17c5970 .concat8 [ 1 1 1 1], L_0x17c55d0, L_0x17c5700, L_0x17c5840, L_0x17c57a0; -L_0x17c57a0 .part o0x2aef774b4ef8, 13, 1; -L_0x17c5bf0 .reduce/or L_0x17c5970; -L_0x17c5a60 .part o0x2aef774b4fb8, 14, 1; -L_0x17c5d50 .part L_0x17d79f0, 14, 1; -L_0x17c5c90 .part o0x2aef774b53d8, 14, 1; -L_0x17c5ec0 .concat8 [ 1 1 1 1], L_0x17c5a60, L_0x17c5d50, L_0x17c5c90, L_0x17c5df0; -L_0x17c5df0 .part o0x2aef774b4ef8, 14, 1; -L_0x17c61e0 .reduce/or L_0x17c5ec0; -L_0x17c60b0 .part v0x17a6290_0, 0, 1; -L_0x17c63c0 .part v0x17a6290_0, 1, 1; -L_0x17c62d0 .part v0x17a6290_0, 2, 1; -L_0x17c65b0 .part v0x17a6290_0, 3, 1; -L_0x17c64b0 .part v0x17a8be0_0, 0, 1; -L_0x17c67f0 .part v0x17a8be0_0, 1, 1; -L_0x17c66e0 .part v0x17a8be0_0, 2, 1; -L_0x17c69b0 .part v0x17a8be0_0, 3, 1; -L_0x17c6890 .part v0x17a8a20_0, 0, 1; -L_0x17c6c10 .part v0x17a8a20_0, 1, 1; -L_0x17c6ae0 .part v0x17a8a20_0, 2, 1; -L_0x17c6df0 .part v0x17a8a20_0, 3, 1; -L_0x17c6cb0 .part v0x17a8940_0, 0, 1; -L_0x17c6fe0 .part v0x17a8940_0, 1, 1; -L_0x17c6e90 .part v0x17a8940_0, 2, 1; -L_0x17c6f30 .part v0x17a8940_0, 3, 1; -L_0x17c7080 .array/port v0x17a7700, L_0x17c73e0; -L_0x17c73e0 .concat [ 4 2 0 0], v0x17a48f0_0, L_0x2aef774e3060; -LS_0x17c72f0_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_2, L_0x17c6e90, L_0x17c6ae0, L_0x17c66e0; -LS_0x17c72f0_0_4 .concat8 [ 1 0 0 0], L_0x17c62d0; -L_0x17c72f0 .concat8 [ 14 1 0 0], LS_0x17c72f0_0_0, LS_0x17c72f0_0_4; -LS_0x17c7800_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_3, L_0x17c6f30, L_0x17c6df0, L_0x17c69b0; -LS_0x17c7800_0_4 .concat8 [ 1 0 0 0], L_0x17c65b0; -L_0x17c7800 .concat8 [ 14 1 0 0], LS_0x17c7800_0_0, LS_0x17c7800_0_4; -LS_0x17c7540_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_0, L_0x17c6cb0, L_0x17c6890, L_0x17c64b0; -LS_0x17c7540_0_4 .concat8 [ 1 0 0 0], L_0x17c60b0; -L_0x17c7540 .concat8 [ 14 1 0 0], LS_0x17c7540_0_0, LS_0x17c7540_0_4; -LS_0x17c7db0_0_0 .concat8 [ 11 1 1 1], v0x17a7b40_1, L_0x17c6fe0, L_0x17c6c10, L_0x17c67f0; -LS_0x17c7db0_0_4 .concat8 [ 1 0 0 0], L_0x17c63c0; -L_0x17c7db0 .concat8 [ 14 1 0 0], LS_0x17c7db0_0_0, LS_0x17c7db0_0_4; -L_0x17c7aa0 .part L_0x17c5090, 14, 4; -L_0x17c81c0 .part L_0x17c5090, 11, 3; -L_0x17c7fd0 .part L_0x17c5090, 8, 3; -L_0x17c8410 .part L_0x17c5090, 10, 4; -L_0x17c8260 .part L_0x17c5090, 0, 11; -S_0x17a9020 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x16e4740; +P_0xfd1ff0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0xfd2030 .param/str "memFile" 0 3 60, "jumpTest/left.dat"; +L_0xfe2320 .functor BUFZ 11, v0xfd23b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xff23c0 .functor BUFZ 11, v0xfd23b0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xff3090 .functor BUFZ 18, L_0xff5080, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xfd23b0_0 .var/s "ACC", 10 0; +v0xfd24b0_0 .var/s "BAK", 10 0; +v0xfd2590_0 .net "DST", 2 0, L_0xff61c0; 1 drivers +v0xfd2650_0 .net/s "IMM", 10 0, L_0xff6260; 1 drivers +v0xfd2730_0 .net "INST", 3 0, L_0xff5aa0; 1 drivers +v0xfd2810_0 .net "LABEL", 3 0, L_0xff6410; 1 drivers +v0xfd28f0_0 .var "PC", 3 0; +v0xfd29d0_0 .var "PCNEXT", 3 0; +v0xfd2ab0_0 .net "SRC", 2 0, L_0xff5fd0; 1 drivers +v0xfd2c20_0 .net *"_s103", 0 0, L_0xff43c0; 1 drivers +v0xfd2d00_0 .net *"_s107", 0 0, L_0xff42d0; 1 drivers +v0xfd2de0_0 .net *"_s111", 0 0, L_0xff45b0; 1 drivers +v0xfd2ec0_0 .net *"_s115", 0 0, L_0xff44b0; 1 drivers +v0xfd2fa0_0 .net *"_s119", 0 0, L_0xff47f0; 1 drivers +v0xfd3080_0 .net *"_s123", 0 0, L_0xff46e0; 1 drivers +v0xfd3160_0 .net *"_s127", 0 0, L_0xff49b0; 1 drivers +v0xfd3240_0 .net *"_s131", 0 0, L_0xff4890; 1 drivers +v0xfd33f0_0 .net *"_s135", 0 0, L_0xff4c10; 1 drivers +v0xfd3490_0 .net *"_s139", 0 0, L_0xff4ae0; 1 drivers +v0xfd3570_0 .net *"_s143", 0 0, L_0xff4df0; 1 drivers +v0xfd3650_0 .net *"_s147", 0 0, L_0xff4cb0; 1 drivers +v0xfd3730_0 .net *"_s151", 0 0, L_0xff4fe0; 1 drivers +v0xfd3810_0 .net *"_s155", 0 0, L_0xff4e90; 1 drivers +v0xfd38f0_0 .net *"_s159", 0 0, L_0xff4f30; 1 drivers +v0xfd39d0_0 .net *"_s160", 17 0, L_0xff5080; 1 drivers +v0xfd3ab0_0 .net *"_s162", 5 0, L_0xff53e0; 1 drivers +L_0x2b99d7e1a060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xfd3b90_0 .net *"_s165", 1 0, L_0x2b99d7e1a060; 1 drivers +v0xfd5b40_2 .array/port v0xfd5b40, 2; +v0xfd3c70_0 .net *"_s173", 10 0, v0xfd5b40_2; 1 drivers +v0xfd5b40_3 .array/port v0xfd5b40, 3; +v0xfd3d50_0 .net *"_s179", 10 0, v0xfd5b40_3; 1 drivers +v0xfd5b40_0 .array/port v0xfd5b40, 0; +v0xfd3e30_0 .net *"_s185", 10 0, v0xfd5b40_0; 1 drivers +v0xfd5b40_1 .array/port v0xfd5b40, 1; +v0xfd3f10_0 .net *"_s191", 10 0, v0xfd5b40_1; 1 drivers +v0xfd3ff0_0 .net *"_s23", 0 0, L_0xff2820; 1 drivers +v0xfd40d0_0 .net *"_s27", 0 0, L_0xff2940; 1 drivers +v0xfd3320_0 .net *"_s31", 0 0, L_0xff2ab0; 1 drivers +v0xfd43a0_0 .net *"_s36", 0 0, L_0xff2d60; 1 drivers +v0xfd4480_0 .net *"_s42", 0 0, L_0xfd6500; 1 drivers +v0xfd4560_0 .net *"_s46", 0 0, L_0xff2ff0; 1 drivers +v0xfd4640_0 .net *"_s50", 0 0, L_0xff3100; 1 drivers +v0xfd4720_0 .net *"_s55", 0 0, L_0xff3360; 1 drivers +v0xfd4800_0 .net *"_s61", 0 0, L_0xff35d0; 1 drivers +v0xfd48e0_0 .net *"_s65", 0 0, L_0xff3700; 1 drivers +v0xfd49c0_0 .net *"_s69", 0 0, L_0xff3840; 1 drivers +v0xfd4aa0_0 .net *"_s74", 0 0, L_0xff37a0; 1 drivers +v0xfd4b80_0 .net *"_s80", 0 0, L_0xff3a60; 1 drivers +v0xfd4c60_0 .net *"_s84", 0 0, L_0xff3d50; 1 drivers +v0xfd4d40_0 .net *"_s88", 0 0, L_0xff3c90; 1 drivers +v0xfd4e20_0 .net *"_s93", 0 0, L_0xff3df0; 1 drivers +v0xfd4f00_0 .net *"_s99", 0 0, L_0xff40b0; 1 drivers +v0xfd4fe0_0 .net/s "accOut", 10 0, L_0xfe2320; alias, 1 drivers +v0xfd50c0_0 .net "anyHasData", 0 0, L_0xff2ea0; 1 drivers +v0xfd5180_0 .net "anyReadAck", 0 0, L_0xff3bf0; 1 drivers +v0xfd5240_0 .net "anyWantData", 0 0, L_0xff3450; 1 drivers +v0xfd5300_0 .net "anyWriteAck", 0 0, L_0xff41e0; 1 drivers +v0xfd53c0_0 .net "clk", 0 0, v0xfe2100_0; alias, 1 drivers +o0x2b99d7debef8 .functor BUFZ 15, C4; HiZ drive +v0xfd5460_0 .net "down", 14 0, o0x2b99d7debef8; 0 drivers +v0xfd5540_0 .net "downOut", 14 0, L_0xff5800; 1 drivers +v0xfd5620_0 .net "instruction", 17 0, L_0xff3090; 1 drivers +v0xfd5700 .array "instructions", 15 0, 17 0; +v0xfd57c0_0 .var "last", 2 0; +o0x2b99d7debfb8 .functor BUFZ 15, C4; HiZ drive +v0xfd58a0_0 .net "left", 14 0, o0x2b99d7debfb8; 0 drivers +v0xfd5980_0 .net "leftOut", 14 0, L_0xff5540; 1 drivers +v0xfd5a60_0 .var "mode", 2 0; +v0xfd5b40 .array/s "outVals", 2 5, 10 0; +v0xfd5c80_0 .var "phase", 2 0; +v0xfd5d60_0 .net "portsHaveData", 5 2, L_0xff2b50; 1 drivers +v0xfd2160_0 .net "portsWantData", 5 2, L_0xff31a0; 1 drivers +v0xfd41b0_0 .net "readAckIn", 5 2, L_0xff3970; 1 drivers +v0xfd4290_0 .var "readAckOut", 5 2; +v0xfd6210_0 .var "readTarget", 2 0; +v0xfd62f0_0 .var/s "readValue", 10 0; +L_0x2b99d7e1a018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xfd63d0 .array "regVals", 0 7; +v0xfd63d0_0 .net/s v0xfd63d0 0, 10 0, L_0x2b99d7e1a018; 1 drivers +v0xfd63d0_1 .net/s v0xfd63d0 1, 10 0, L_0xff23c0; 1 drivers +v0xfd63d0_2 .net/s v0xfd63d0 2, 10 0, L_0xff2480; 1 drivers +v0xfd63d0_3 .net/s v0xfd63d0 3, 10 0, L_0xff2520; 1 drivers +v0xfd63d0_4 .net/s v0xfd63d0 4, 10 0, L_0xff25f0; 1 drivers +v0xfd63d0_5 .net/s v0xfd63d0 5, 10 0, L_0xff26f0; 1 drivers +o0x2b99d7dec378 .functor BUFZ 11, C4; HiZ drive +v0xfd63d0_6 .net/s v0xfd63d0 6, 10 0, o0x2b99d7dec378; 0 drivers +o0x2b99d7dec3a8 .functor BUFZ 11, C4; HiZ drive +v0xfd63d0_7 .net/s v0xfd63d0 7, 10 0, o0x2b99d7dec3a8; 0 drivers +v0xfd65e0_0 .net "right", 14 0, L_0x10059f0; alias, 1 drivers +v0xfd66d0_0 .net "rightOut", 14 0, L_0xff5db0; alias, 1 drivers +o0x2b99d7dec3d8 .functor BUFZ 15, C4; HiZ drive +v0xfd67a0_0 .net "up", 14 0, o0x2b99d7dec3d8; 0 drivers +v0xfd6860_0 .net "upOut", 14 0, L_0xff52f0; 1 drivers +v0xfd6940_0 .var "weHaveData", 5 2; +v0xfd6a20_0 .var "weWantData", 5 2; +v0xfd6b00_0 .net "writeAckIn", 5 2, L_0xff3ec0; 1 drivers +v0xfd6be0_0 .var "writeAckOut", 5 2; +v0xfd6cc0_0 .var "writeTarget", 2 0; +v0xfd6da0_0 .var/s "writeValue", 10 0; +L_0xff2480 .part o0x2b99d7debfb8, 0, 11; +L_0xff2520 .part L_0x10059f0, 0, 11; +L_0xff25f0 .part o0x2b99d7dec3d8, 0, 11; +L_0xff26f0 .part o0x2b99d7debef8, 0, 11; +L_0xff2820 .part o0x2b99d7debfb8, 11, 1; +L_0xff2940 .part L_0x10059f0, 11, 1; +L_0xff2ab0 .part o0x2b99d7dec3d8, 11, 1; +L_0xff2b50 .concat8 [ 1 1 1 1], L_0xff2820, L_0xff2940, L_0xff2ab0, L_0xff2d60; +L_0xff2d60 .part o0x2b99d7debef8, 11, 1; +L_0xff2ea0 .reduce/or L_0xff2b50; +L_0xfd6500 .part o0x2b99d7debfb8, 12, 1; +L_0xff2ff0 .part L_0x10059f0, 12, 1; +L_0xff3100 .part o0x2b99d7dec3d8, 12, 1; +L_0xff31a0 .concat8 [ 1 1 1 1], L_0xfd6500, L_0xff2ff0, L_0xff3100, L_0xff3360; +L_0xff3360 .part o0x2b99d7debef8, 12, 1; +L_0xff3450 .reduce/or L_0xff31a0; +L_0xff35d0 .part o0x2b99d7debfb8, 13, 1; +L_0xff3700 .part L_0x10059f0, 13, 1; +L_0xff3840 .part o0x2b99d7dec3d8, 13, 1; +L_0xff3970 .concat8 [ 1 1 1 1], L_0xff35d0, L_0xff3700, L_0xff3840, L_0xff37a0; +L_0xff37a0 .part o0x2b99d7debef8, 13, 1; +L_0xff3bf0 .reduce/or L_0xff3970; +L_0xff3a60 .part o0x2b99d7debfb8, 14, 1; +L_0xff3d50 .part L_0x10059f0, 14, 1; +L_0xff3c90 .part o0x2b99d7dec3d8, 14, 1; +L_0xff3ec0 .concat8 [ 1 1 1 1], L_0xff3a60, L_0xff3d50, L_0xff3c90, L_0xff3df0; +L_0xff3df0 .part o0x2b99d7debef8, 14, 1; +L_0xff41e0 .reduce/or L_0xff3ec0; +L_0xff40b0 .part v0xfd4290_0, 0, 1; +L_0xff43c0 .part v0xfd4290_0, 1, 1; +L_0xff42d0 .part v0xfd4290_0, 2, 1; +L_0xff45b0 .part v0xfd4290_0, 3, 1; +L_0xff44b0 .part v0xfd6be0_0, 0, 1; +L_0xff47f0 .part v0xfd6be0_0, 1, 1; +L_0xff46e0 .part v0xfd6be0_0, 2, 1; +L_0xff49b0 .part v0xfd6be0_0, 3, 1; +L_0xff4890 .part v0xfd6a20_0, 0, 1; +L_0xff4c10 .part v0xfd6a20_0, 1, 1; +L_0xff4ae0 .part v0xfd6a20_0, 2, 1; +L_0xff4df0 .part v0xfd6a20_0, 3, 1; +L_0xff4cb0 .part v0xfd6940_0, 0, 1; +L_0xff4fe0 .part v0xfd6940_0, 1, 1; +L_0xff4e90 .part v0xfd6940_0, 2, 1; +L_0xff4f30 .part v0xfd6940_0, 3, 1; +L_0xff5080 .array/port v0xfd5700, L_0xff53e0; +L_0xff53e0 .concat [ 4 2 0 0], v0xfd28f0_0, L_0x2b99d7e1a060; +LS_0xff52f0_0_0 .concat8 [ 11 1 1 1], v0xfd5b40_2, L_0xff4e90, L_0xff4ae0, L_0xff46e0; +LS_0xff52f0_0_4 .concat8 [ 1 0 0 0], L_0xff42d0; +L_0xff52f0 .concat8 [ 14 1 0 0], LS_0xff52f0_0_0, LS_0xff52f0_0_4; +LS_0xff5800_0_0 .concat8 [ 11 1 1 1], v0xfd5b40_3, L_0xff4f30, L_0xff4df0, L_0xff49b0; +LS_0xff5800_0_4 .concat8 [ 1 0 0 0], L_0xff45b0; +L_0xff5800 .concat8 [ 14 1 0 0], LS_0xff5800_0_0, LS_0xff5800_0_4; +LS_0xff5540_0_0 .concat8 [ 11 1 1 1], v0xfd5b40_0, L_0xff4cb0, L_0xff4890, L_0xff44b0; +LS_0xff5540_0_4 .concat8 [ 1 0 0 0], L_0xff40b0; +L_0xff5540 .concat8 [ 14 1 0 0], LS_0xff5540_0_0, LS_0xff5540_0_4; +LS_0xff5db0_0_0 .concat8 [ 11 1 1 1], v0xfd5b40_1, L_0xff4fe0, L_0xff4c10, L_0xff47f0; +LS_0xff5db0_0_4 .concat8 [ 1 0 0 0], L_0xff43c0; +L_0xff5db0 .concat8 [ 14 1 0 0], LS_0xff5db0_0_0, LS_0xff5db0_0_4; +L_0xff5aa0 .part L_0xff3090, 14, 4; +L_0xff61c0 .part L_0xff3090, 11, 3; +L_0xff5fd0 .part L_0xff3090, 8, 3; +L_0xff6410 .part L_0xff3090, 10, 4; +L_0xff6260 .part L_0xff3090, 0, 11; +S_0xfd7020 .scope module, "right" "tis100" 2 28, 3 49 0, S_0xf12740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -575,175 +575,175 @@ S_0x17a9020 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x16e4740; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x17a91f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x17a9230 .param/str "memFile" 0 3 60, "jumpTest/right.dat"; -L_0x17c8100 .functor BUFZ 11, v0x17a95a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17c8300 .functor BUFZ 11, v0x17a95a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17c91f0 .functor BUFZ 18, L_0x17cb160, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x17a95a0_0 .var/s "ACC", 10 0; -v0x17a96a0_0 .var/s "BAK", 10 0; -v0x17a9780_0 .net "DST", 2 0, L_0x17cc2a0; 1 drivers -v0x17a9840_0 .net/s "IMM", 10 0, L_0x17cc340; 1 drivers -v0x17a9920_0 .net "INST", 3 0, L_0x17cbb80; 1 drivers -v0x17a9a00_0 .net "LABEL", 3 0, L_0x17cc4f0; 1 drivers -v0x17a9ae0_0 .var "PC", 3 0; -v0x17a9bc0_0 .var "PCNEXT", 3 0; -v0x17a9ca0_0 .net "SRC", 2 0, L_0x17cc0b0; 1 drivers -v0x17a9e10_0 .net *"_s103", 0 0, L_0x17ca4a0; 1 drivers -v0x17a9ef0_0 .net *"_s107", 0 0, L_0x17ca3b0; 1 drivers -v0x17a9fd0_0 .net *"_s111", 0 0, L_0x17ca690; 1 drivers -v0x17aa0b0_0 .net *"_s115", 0 0, L_0x17ca590; 1 drivers -v0x17aa190_0 .net *"_s119", 0 0, L_0x17ca8d0; 1 drivers -v0x17aa270_0 .net *"_s123", 0 0, L_0x17ca7c0; 1 drivers -v0x17aa350_0 .net *"_s127", 0 0, L_0x17caa90; 1 drivers -v0x17aa430_0 .net *"_s131", 0 0, L_0x17ca970; 1 drivers -v0x17aa5e0_0 .net *"_s135", 0 0, L_0x17cacf0; 1 drivers -v0x17aa680_0 .net *"_s139", 0 0, L_0x17cabc0; 1 drivers -v0x17aa760_0 .net *"_s143", 0 0, L_0x17caed0; 1 drivers -v0x17aa840_0 .net *"_s147", 0 0, L_0x17cad90; 1 drivers -v0x17aa920_0 .net *"_s151", 0 0, L_0x17cb0c0; 1 drivers -v0x17aaa00_0 .net *"_s155", 0 0, L_0x17caf70; 1 drivers -v0x17aaae0_0 .net *"_s159", 0 0, L_0x17cb010; 1 drivers -v0x17aabc0_0 .net *"_s160", 17 0, L_0x17cb160; 1 drivers -v0x17aaca0_0 .net *"_s162", 5 0, L_0x17cb4c0; 1 drivers -L_0x2aef774e30f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x17aad80_0 .net *"_s165", 1 0, L_0x2aef774e30f0; 1 drivers -v0x17accb0_2 .array/port v0x17accb0, 2; -v0x17aae60_0 .net *"_s173", 10 0, v0x17accb0_2; 1 drivers -v0x17accb0_3 .array/port v0x17accb0, 3; -v0x17aaf40_0 .net *"_s179", 10 0, v0x17accb0_3; 1 drivers -v0x17accb0_0 .array/port v0x17accb0, 0; -v0x17ab020_0 .net *"_s185", 10 0, v0x17accb0_0; 1 drivers -v0x17accb0_1 .array/port v0x17accb0, 1; -v0x17ab100_0 .net *"_s191", 10 0, v0x17accb0_1; 1 drivers -v0x17ab1e0_0 .net *"_s23", 0 0, L_0x17c8980; 1 drivers -v0x17ab2c0_0 .net *"_s27", 0 0, L_0x17c8ae0; 1 drivers -v0x17aa510_0 .net *"_s31", 0 0, L_0x17c8bb0; 1 drivers -v0x17ab590_0 .net *"_s36", 0 0, L_0x17c8e80; 1 drivers -v0x17ab670_0 .net *"_s42", 0 0, L_0x17c90b0; 1 drivers -v0x17ab750_0 .net *"_s46", 0 0, L_0x17c9150; 1 drivers -v0x17ab830_0 .net *"_s50", 0 0, L_0x17c9260; 1 drivers -v0x17ab910_0 .net *"_s55", 0 0, L_0x17c9470; 1 drivers -v0x17ab9f0_0 .net *"_s61", 0 0, L_0x17c96e0; 1 drivers -v0x17abad0_0 .net *"_s65", 0 0, L_0x17c9780; 1 drivers -v0x17abbb0_0 .net *"_s69", 0 0, L_0x17c9950; 1 drivers -v0x17abc90_0 .net *"_s74", 0 0, L_0x17c98b0; 1 drivers -v0x17abd70_0 .net *"_s80", 0 0, L_0x17c9b40; 1 drivers -v0x17abe50_0 .net *"_s84", 0 0, L_0x17c9e30; 1 drivers -v0x17abf30_0 .net *"_s88", 0 0, L_0x17c9d70; 1 drivers -v0x17ac010_0 .net *"_s93", 0 0, L_0x17c9ed0; 1 drivers -v0x17ac0f0_0 .net *"_s99", 0 0, L_0x17ca190; 1 drivers -v0x17ac1d0_0 .net/s "accOut", 10 0, L_0x17c8100; alias, 1 drivers -v0x17ac2b0_0 .net "anyHasData", 0 0, L_0x17c8fc0; 1 drivers -v0x17ac370_0 .net "anyReadAck", 0 0, L_0x17c9cd0; 1 drivers -v0x17ac430_0 .net "anyWantData", 0 0, L_0x17c9560; 1 drivers -v0x17ac4f0_0 .net "anyWriteAck", 0 0, L_0x17ca2c0; 1 drivers -v0x17ac5b0_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers -o0x2aef774b6128 .functor BUFZ 15, C4; HiZ drive -v0x17ac650_0 .net "down", 14 0, o0x2aef774b6128; 0 drivers -v0x17ac730_0 .net "downOut", 14 0, L_0x17cb8e0; 1 drivers -v0x17ac810_0 .net "instruction", 17 0, L_0x17c91f0; 1 drivers -v0x17ac8f0 .array "instructions", 15 0, 17 0; -v0x17ac9b0_0 .var "last", 2 0; -v0x17aca90_0 .net "left", 14 0, L_0x17d83c0; alias, 1 drivers -v0x17acb50_0 .net "leftOut", 14 0, L_0x17cb620; alias, 1 drivers -v0x17acbf0_0 .var "mode", 2 0; -v0x17accb0 .array/s "outVals", 2 5, 10 0; -v0x17ace20_0 .var "phase", 2 0; -v0x17acf00_0 .net "portsHaveData", 5 2, L_0x17c8ca0; 1 drivers -v0x17ab360_0 .net "portsWantData", 5 2, L_0x17c9300; 1 drivers -v0x17ab440_0 .net "readAckIn", 5 2, L_0x17c99f0; 1 drivers -v0x17ad3b0_0 .var "readAckOut", 5 2; -v0x17ad450_0 .var "readTarget", 2 0; -v0x17ad4f0_0 .var/s "readValue", 10 0; -L_0x2aef774e30a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x17ad590 .array "regVals", 0 7; -v0x17ad590_0 .net/s v0x17ad590 0, 10 0, L_0x2aef774e30a8; 1 drivers -v0x17ad590_1 .net/s v0x17ad590 1, 10 0, L_0x17c8300; 1 drivers -v0x17ad590_2 .net/s v0x17ad590 2, 10 0, L_0x17c8670; 1 drivers -v0x17ad590_3 .net/s v0x17ad590 3, 10 0, L_0x17c8710; 1 drivers -v0x17ad590_4 .net/s v0x17ad590 4, 10 0, L_0x17c87b0; 1 drivers -v0x17ad590_5 .net/s v0x17ad590 5, 10 0, L_0x17c8850; 1 drivers -o0x2aef774b6548 .functor BUFZ 11, C4; HiZ drive -v0x17ad590_6 .net/s v0x17ad590 6, 10 0, o0x2aef774b6548; 0 drivers -o0x2aef774b6578 .functor BUFZ 11, C4; HiZ drive -v0x17ad590_7 .net/s v0x17ad590 7, 10 0, o0x2aef774b6578; 0 drivers -o0x2aef774b65a8 .functor BUFZ 15, C4; HiZ drive -v0x17ad7a0_0 .net "right", 14 0, o0x2aef774b65a8; 0 drivers -v0x17ad880_0 .net "rightOut", 14 0, L_0x17cbe90; 1 drivers -o0x2aef774b6608 .functor BUFZ 15, C4; HiZ drive -v0x17ad960_0 .net "up", 14 0, o0x2aef774b6608; 0 drivers -v0x17ada40_0 .net "upOut", 14 0, L_0x17cb3d0; 1 drivers -v0x17adb20_0 .var "weHaveData", 5 2; -v0x17adc00_0 .var "weWantData", 5 2; -v0x17adce0_0 .net "writeAckIn", 5 2, L_0x17c9fa0; 1 drivers -v0x17addc0_0 .var "writeAckOut", 5 2; -v0x17adea0_0 .var "writeTarget", 2 0; -v0x17adf80_0 .var/s "writeValue", 10 0; -L_0x17c8670 .part L_0x17d83c0, 0, 11; -L_0x17c8710 .part o0x2aef774b65a8, 0, 11; -L_0x17c87b0 .part o0x2aef774b6608, 0, 11; -L_0x17c8850 .part o0x2aef774b6128, 0, 11; -L_0x17c8980 .part L_0x17d83c0, 11, 1; -L_0x17c8ae0 .part o0x2aef774b65a8, 11, 1; -L_0x17c8bb0 .part o0x2aef774b6608, 11, 1; -L_0x17c8ca0 .concat8 [ 1 1 1 1], L_0x17c8980, L_0x17c8ae0, L_0x17c8bb0, L_0x17c8e80; -L_0x17c8e80 .part o0x2aef774b6128, 11, 1; -L_0x17c8fc0 .reduce/or L_0x17c8ca0; -L_0x17c90b0 .part L_0x17d83c0, 12, 1; -L_0x17c9150 .part o0x2aef774b65a8, 12, 1; -L_0x17c9260 .part o0x2aef774b6608, 12, 1; -L_0x17c9300 .concat8 [ 1 1 1 1], L_0x17c90b0, L_0x17c9150, L_0x17c9260, L_0x17c9470; -L_0x17c9470 .part o0x2aef774b6128, 12, 1; -L_0x17c9560 .reduce/or L_0x17c9300; -L_0x17c96e0 .part L_0x17d83c0, 13, 1; -L_0x17c9780 .part o0x2aef774b65a8, 13, 1; -L_0x17c9950 .part o0x2aef774b6608, 13, 1; -L_0x17c99f0 .concat8 [ 1 1 1 1], L_0x17c96e0, L_0x17c9780, L_0x17c9950, L_0x17c98b0; -L_0x17c98b0 .part o0x2aef774b6128, 13, 1; -L_0x17c9cd0 .reduce/or L_0x17c99f0; -L_0x17c9b40 .part L_0x17d83c0, 14, 1; -L_0x17c9e30 .part o0x2aef774b65a8, 14, 1; -L_0x17c9d70 .part o0x2aef774b6608, 14, 1; -L_0x17c9fa0 .concat8 [ 1 1 1 1], L_0x17c9b40, L_0x17c9e30, L_0x17c9d70, L_0x17c9ed0; -L_0x17c9ed0 .part o0x2aef774b6128, 14, 1; -L_0x17ca2c0 .reduce/or L_0x17c9fa0; -L_0x17ca190 .part v0x17ad3b0_0, 0, 1; -L_0x17ca4a0 .part v0x17ad3b0_0, 1, 1; -L_0x17ca3b0 .part v0x17ad3b0_0, 2, 1; -L_0x17ca690 .part v0x17ad3b0_0, 3, 1; -L_0x17ca590 .part v0x17addc0_0, 0, 1; -L_0x17ca8d0 .part v0x17addc0_0, 1, 1; -L_0x17ca7c0 .part v0x17addc0_0, 2, 1; -L_0x17caa90 .part v0x17addc0_0, 3, 1; -L_0x17ca970 .part v0x17adc00_0, 0, 1; -L_0x17cacf0 .part v0x17adc00_0, 1, 1; -L_0x17cabc0 .part v0x17adc00_0, 2, 1; -L_0x17caed0 .part v0x17adc00_0, 3, 1; -L_0x17cad90 .part v0x17adb20_0, 0, 1; -L_0x17cb0c0 .part v0x17adb20_0, 1, 1; -L_0x17caf70 .part v0x17adb20_0, 2, 1; -L_0x17cb010 .part v0x17adb20_0, 3, 1; -L_0x17cb160 .array/port v0x17ac8f0, L_0x17cb4c0; -L_0x17cb4c0 .concat [ 4 2 0 0], v0x17a9ae0_0, L_0x2aef774e30f0; -LS_0x17cb3d0_0_0 .concat8 [ 11 1 1 1], v0x17accb0_2, L_0x17caf70, L_0x17cabc0, L_0x17ca7c0; -LS_0x17cb3d0_0_4 .concat8 [ 1 0 0 0], L_0x17ca3b0; -L_0x17cb3d0 .concat8 [ 14 1 0 0], LS_0x17cb3d0_0_0, LS_0x17cb3d0_0_4; -LS_0x17cb8e0_0_0 .concat8 [ 11 1 1 1], v0x17accb0_3, L_0x17cb010, L_0x17caed0, L_0x17caa90; -LS_0x17cb8e0_0_4 .concat8 [ 1 0 0 0], L_0x17ca690; -L_0x17cb8e0 .concat8 [ 14 1 0 0], LS_0x17cb8e0_0_0, LS_0x17cb8e0_0_4; -LS_0x17cb620_0_0 .concat8 [ 11 1 1 1], v0x17accb0_0, L_0x17cad90, L_0x17ca970, L_0x17ca590; -LS_0x17cb620_0_4 .concat8 [ 1 0 0 0], L_0x17ca190; -L_0x17cb620 .concat8 [ 14 1 0 0], LS_0x17cb620_0_0, LS_0x17cb620_0_4; -LS_0x17cbe90_0_0 .concat8 [ 11 1 1 1], v0x17accb0_1, L_0x17cb0c0, L_0x17cacf0, L_0x17ca8d0; -LS_0x17cbe90_0_4 .concat8 [ 1 0 0 0], L_0x17ca4a0; -L_0x17cbe90 .concat8 [ 14 1 0 0], LS_0x17cbe90_0_0, LS_0x17cbe90_0_4; -L_0x17cbb80 .part L_0x17c91f0, 14, 4; -L_0x17cc2a0 .part L_0x17c91f0, 11, 3; -L_0x17cc0b0 .part L_0x17c91f0, 8, 3; -L_0x17cc4f0 .part L_0x17c91f0, 10, 4; -L_0x17cc340 .part L_0x17c91f0, 0, 11; -S_0x17ae200 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x16e4740; +P_0xfd71f0 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0xfd7230 .param/str "memFile" 0 3 60, "jumpTest/right.dat"; +L_0xff6100 .functor BUFZ 11, v0xfd75a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xff6300 .functor BUFZ 11, v0xfd75a0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xff71f0 .functor BUFZ 18, L_0xff9160, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xfd75a0_0 .var/s "ACC", 10 0; +v0xfd76a0_0 .var/s "BAK", 10 0; +v0xfd7780_0 .net "DST", 2 0, L_0xffa2a0; 1 drivers +v0xfd7840_0 .net/s "IMM", 10 0, L_0xffa340; 1 drivers +v0xfd7920_0 .net "INST", 3 0, L_0xff9b80; 1 drivers +v0xfd7a00_0 .net "LABEL", 3 0, L_0xffa4f0; 1 drivers +v0xfd7ae0_0 .var "PC", 3 0; +v0xfd7bc0_0 .var "PCNEXT", 3 0; +v0xfd7ca0_0 .net "SRC", 2 0, L_0xffa0b0; 1 drivers +v0xfd7e10_0 .net *"_s103", 0 0, L_0xff84a0; 1 drivers +v0xfd7ef0_0 .net *"_s107", 0 0, L_0xff83b0; 1 drivers +v0xfd7fd0_0 .net *"_s111", 0 0, L_0xff8690; 1 drivers +v0xfd80b0_0 .net *"_s115", 0 0, L_0xff8590; 1 drivers +v0xfd8190_0 .net *"_s119", 0 0, L_0xff88d0; 1 drivers +v0xfd8270_0 .net *"_s123", 0 0, L_0xff87c0; 1 drivers +v0xfd8350_0 .net *"_s127", 0 0, L_0xff8a90; 1 drivers +v0xfd8430_0 .net *"_s131", 0 0, L_0xff8970; 1 drivers +v0xfd85e0_0 .net *"_s135", 0 0, L_0xff8cf0; 1 drivers +v0xfd8680_0 .net *"_s139", 0 0, L_0xff8bc0; 1 drivers +v0xfd8760_0 .net *"_s143", 0 0, L_0xff8ed0; 1 drivers +v0xfd8840_0 .net *"_s147", 0 0, L_0xff8d90; 1 drivers +v0xfd8920_0 .net *"_s151", 0 0, L_0xff90c0; 1 drivers +v0xfd8a00_0 .net *"_s155", 0 0, L_0xff8f70; 1 drivers +v0xfd8ae0_0 .net *"_s159", 0 0, L_0xff9010; 1 drivers +v0xfd8bc0_0 .net *"_s160", 17 0, L_0xff9160; 1 drivers +v0xfd8ca0_0 .net *"_s162", 5 0, L_0xff94c0; 1 drivers +L_0x2b99d7e1a0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xfd8d80_0 .net *"_s165", 1 0, L_0x2b99d7e1a0f0; 1 drivers +v0xfdacb0_2 .array/port v0xfdacb0, 2; +v0xfd8e60_0 .net *"_s173", 10 0, v0xfdacb0_2; 1 drivers +v0xfdacb0_3 .array/port v0xfdacb0, 3; +v0xfd8f40_0 .net *"_s179", 10 0, v0xfdacb0_3; 1 drivers +v0xfdacb0_0 .array/port v0xfdacb0, 0; +v0xfd9020_0 .net *"_s185", 10 0, v0xfdacb0_0; 1 drivers +v0xfdacb0_1 .array/port v0xfdacb0, 1; +v0xfd9100_0 .net *"_s191", 10 0, v0xfdacb0_1; 1 drivers +v0xfd91e0_0 .net *"_s23", 0 0, L_0xff6980; 1 drivers +v0xfd92c0_0 .net *"_s27", 0 0, L_0xff6ae0; 1 drivers +v0xfd8510_0 .net *"_s31", 0 0, L_0xff6bb0; 1 drivers +v0xfd9590_0 .net *"_s36", 0 0, L_0xff6e80; 1 drivers +v0xfd9670_0 .net *"_s42", 0 0, L_0xff70b0; 1 drivers +v0xfd9750_0 .net *"_s46", 0 0, L_0xff7150; 1 drivers +v0xfd9830_0 .net *"_s50", 0 0, L_0xff7260; 1 drivers +v0xfd9910_0 .net *"_s55", 0 0, L_0xff7470; 1 drivers +v0xfd99f0_0 .net *"_s61", 0 0, L_0xff76e0; 1 drivers +v0xfd9ad0_0 .net *"_s65", 0 0, L_0xff7780; 1 drivers +v0xfd9bb0_0 .net *"_s69", 0 0, L_0xff7950; 1 drivers +v0xfd9c90_0 .net *"_s74", 0 0, L_0xff78b0; 1 drivers +v0xfd9d70_0 .net *"_s80", 0 0, L_0xff7b40; 1 drivers +v0xfd9e50_0 .net *"_s84", 0 0, L_0xff7e30; 1 drivers +v0xfd9f30_0 .net *"_s88", 0 0, L_0xff7d70; 1 drivers +v0xfda010_0 .net *"_s93", 0 0, L_0xff7ed0; 1 drivers +v0xfda0f0_0 .net *"_s99", 0 0, L_0xff8190; 1 drivers +v0xfda1d0_0 .net/s "accOut", 10 0, L_0xff6100; alias, 1 drivers +v0xfda2b0_0 .net "anyHasData", 0 0, L_0xff6fc0; 1 drivers +v0xfda370_0 .net "anyReadAck", 0 0, L_0xff7cd0; 1 drivers +v0xfda430_0 .net "anyWantData", 0 0, L_0xff7560; 1 drivers +v0xfda4f0_0 .net "anyWriteAck", 0 0, L_0xff82c0; 1 drivers +v0xfda5b0_0 .net "clk", 0 0, v0xfe2100_0; alias, 1 drivers +o0x2b99d7ded128 .functor BUFZ 15, C4; HiZ drive +v0xfda650_0 .net "down", 14 0, o0x2b99d7ded128; 0 drivers +v0xfda730_0 .net "downOut", 14 0, L_0xff98e0; 1 drivers +v0xfda810_0 .net "instruction", 17 0, L_0xff71f0; 1 drivers +v0xfda8f0 .array "instructions", 15 0, 17 0; +v0xfda9b0_0 .var "last", 2 0; +v0xfdaa90_0 .net "left", 14 0, L_0x10063c0; alias, 1 drivers +v0xfdab50_0 .net "leftOut", 14 0, L_0xff9620; alias, 1 drivers +v0xfdabf0_0 .var "mode", 2 0; +v0xfdacb0 .array/s "outVals", 2 5, 10 0; +v0xfdae20_0 .var "phase", 2 0; +v0xfdaf00_0 .net "portsHaveData", 5 2, L_0xff6ca0; 1 drivers +v0xfd9360_0 .net "portsWantData", 5 2, L_0xff7300; 1 drivers +v0xfd9440_0 .net "readAckIn", 5 2, L_0xff79f0; 1 drivers +v0xfdb3b0_0 .var "readAckOut", 5 2; +v0xfdb450_0 .var "readTarget", 2 0; +v0xfdb4f0_0 .var/s "readValue", 10 0; +L_0x2b99d7e1a0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xfdb590 .array "regVals", 0 7; +v0xfdb590_0 .net/s v0xfdb590 0, 10 0, L_0x2b99d7e1a0a8; 1 drivers +v0xfdb590_1 .net/s v0xfdb590 1, 10 0, L_0xff6300; 1 drivers +v0xfdb590_2 .net/s v0xfdb590 2, 10 0, L_0xff6670; 1 drivers +v0xfdb590_3 .net/s v0xfdb590 3, 10 0, L_0xff6710; 1 drivers +v0xfdb590_4 .net/s v0xfdb590 4, 10 0, L_0xff67b0; 1 drivers +v0xfdb590_5 .net/s v0xfdb590 5, 10 0, L_0xff6850; 1 drivers +o0x2b99d7ded548 .functor BUFZ 11, C4; HiZ drive +v0xfdb590_6 .net/s v0xfdb590 6, 10 0, o0x2b99d7ded548; 0 drivers +o0x2b99d7ded578 .functor BUFZ 11, C4; HiZ drive +v0xfdb590_7 .net/s v0xfdb590 7, 10 0, o0x2b99d7ded578; 0 drivers +o0x2b99d7ded5a8 .functor BUFZ 15, C4; HiZ drive +v0xfdb7a0_0 .net "right", 14 0, o0x2b99d7ded5a8; 0 drivers +v0xfdb880_0 .net "rightOut", 14 0, L_0xff9e90; 1 drivers +o0x2b99d7ded608 .functor BUFZ 15, C4; HiZ drive +v0xfdb960_0 .net "up", 14 0, o0x2b99d7ded608; 0 drivers +v0xfdba40_0 .net "upOut", 14 0, L_0xff93d0; 1 drivers +v0xfdbb20_0 .var "weHaveData", 5 2; +v0xfdbc00_0 .var "weWantData", 5 2; +v0xfdbce0_0 .net "writeAckIn", 5 2, L_0xff7fa0; 1 drivers +v0xfdbdc0_0 .var "writeAckOut", 5 2; +v0xfdbea0_0 .var "writeTarget", 2 0; +v0xfdbf80_0 .var/s "writeValue", 10 0; +L_0xff6670 .part L_0x10063c0, 0, 11; +L_0xff6710 .part o0x2b99d7ded5a8, 0, 11; +L_0xff67b0 .part o0x2b99d7ded608, 0, 11; +L_0xff6850 .part o0x2b99d7ded128, 0, 11; +L_0xff6980 .part L_0x10063c0, 11, 1; +L_0xff6ae0 .part o0x2b99d7ded5a8, 11, 1; +L_0xff6bb0 .part o0x2b99d7ded608, 11, 1; +L_0xff6ca0 .concat8 [ 1 1 1 1], L_0xff6980, L_0xff6ae0, L_0xff6bb0, L_0xff6e80; +L_0xff6e80 .part o0x2b99d7ded128, 11, 1; +L_0xff6fc0 .reduce/or L_0xff6ca0; +L_0xff70b0 .part L_0x10063c0, 12, 1; +L_0xff7150 .part o0x2b99d7ded5a8, 12, 1; +L_0xff7260 .part o0x2b99d7ded608, 12, 1; +L_0xff7300 .concat8 [ 1 1 1 1], L_0xff70b0, L_0xff7150, L_0xff7260, L_0xff7470; +L_0xff7470 .part o0x2b99d7ded128, 12, 1; +L_0xff7560 .reduce/or L_0xff7300; +L_0xff76e0 .part L_0x10063c0, 13, 1; +L_0xff7780 .part o0x2b99d7ded5a8, 13, 1; +L_0xff7950 .part o0x2b99d7ded608, 13, 1; +L_0xff79f0 .concat8 [ 1 1 1 1], L_0xff76e0, L_0xff7780, L_0xff7950, L_0xff78b0; +L_0xff78b0 .part o0x2b99d7ded128, 13, 1; +L_0xff7cd0 .reduce/or L_0xff79f0; +L_0xff7b40 .part L_0x10063c0, 14, 1; +L_0xff7e30 .part o0x2b99d7ded5a8, 14, 1; +L_0xff7d70 .part o0x2b99d7ded608, 14, 1; +L_0xff7fa0 .concat8 [ 1 1 1 1], L_0xff7b40, L_0xff7e30, L_0xff7d70, L_0xff7ed0; +L_0xff7ed0 .part o0x2b99d7ded128, 14, 1; +L_0xff82c0 .reduce/or L_0xff7fa0; +L_0xff8190 .part v0xfdb3b0_0, 0, 1; +L_0xff84a0 .part v0xfdb3b0_0, 1, 1; +L_0xff83b0 .part v0xfdb3b0_0, 2, 1; +L_0xff8690 .part v0xfdb3b0_0, 3, 1; +L_0xff8590 .part v0xfdbdc0_0, 0, 1; +L_0xff88d0 .part v0xfdbdc0_0, 1, 1; +L_0xff87c0 .part v0xfdbdc0_0, 2, 1; +L_0xff8a90 .part v0xfdbdc0_0, 3, 1; +L_0xff8970 .part v0xfdbc00_0, 0, 1; +L_0xff8cf0 .part v0xfdbc00_0, 1, 1; +L_0xff8bc0 .part v0xfdbc00_0, 2, 1; +L_0xff8ed0 .part v0xfdbc00_0, 3, 1; +L_0xff8d90 .part v0xfdbb20_0, 0, 1; +L_0xff90c0 .part v0xfdbb20_0, 1, 1; +L_0xff8f70 .part v0xfdbb20_0, 2, 1; +L_0xff9010 .part v0xfdbb20_0, 3, 1; +L_0xff9160 .array/port v0xfda8f0, L_0xff94c0; +L_0xff94c0 .concat [ 4 2 0 0], v0xfd7ae0_0, L_0x2b99d7e1a0f0; +LS_0xff93d0_0_0 .concat8 [ 11 1 1 1], v0xfdacb0_2, L_0xff8f70, L_0xff8bc0, L_0xff87c0; +LS_0xff93d0_0_4 .concat8 [ 1 0 0 0], L_0xff83b0; +L_0xff93d0 .concat8 [ 14 1 0 0], LS_0xff93d0_0_0, LS_0xff93d0_0_4; +LS_0xff98e0_0_0 .concat8 [ 11 1 1 1], v0xfdacb0_3, L_0xff9010, L_0xff8ed0, L_0xff8a90; +LS_0xff98e0_0_4 .concat8 [ 1 0 0 0], L_0xff8690; +L_0xff98e0 .concat8 [ 14 1 0 0], LS_0xff98e0_0_0, LS_0xff98e0_0_4; +LS_0xff9620_0_0 .concat8 [ 11 1 1 1], v0xfdacb0_0, L_0xff8d90, L_0xff8970, L_0xff8590; +LS_0xff9620_0_4 .concat8 [ 1 0 0 0], L_0xff8190; +L_0xff9620 .concat8 [ 14 1 0 0], LS_0xff9620_0_0, LS_0xff9620_0_4; +LS_0xff9e90_0_0 .concat8 [ 11 1 1 1], v0xfdacb0_1, L_0xff90c0, L_0xff8cf0, L_0xff88d0; +LS_0xff9e90_0_4 .concat8 [ 1 0 0 0], L_0xff84a0; +L_0xff9e90 .concat8 [ 14 1 0 0], LS_0xff9e90_0_0, LS_0xff9e90_0_4; +L_0xff9b80 .part L_0xff71f0, 14, 4; +L_0xffa2a0 .part L_0xff71f0, 11, 3; +L_0xffa0b0 .part L_0xff71f0, 8, 3; +L_0xffa4f0 .part L_0xff71f0, 10, 4; +L_0xffa340 .part L_0xff71f0, 0, 11; +S_0xfdc200 .scope module, "up" "tis100" 2 29, 3 49 0, S_0xf12740; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -755,219 +755,219 @@ S_0x17ae200 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x16e4740; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x17ae420 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x17ae460 .param/str "memFile" 0 3 60, "jumpTest/up.dat"; -L_0x17cc1e0 .functor BUFZ 11, v0x17ae720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17cc430 .functor BUFZ 11, v0x17ae720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x17cd270 .functor BUFZ 18, L_0x17cf210, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x17ae720_0 .var/s "ACC", 10 0; -v0x17ae820_0 .var/s "BAK", 10 0; -v0x17ae900_0 .net "DST", 2 0, L_0x17d0350; 1 drivers -v0x17ae9c0_0 .net/s "IMM", 10 0, L_0x17d03f0; 1 drivers -v0x17aeaa0_0 .net "INST", 3 0, L_0x17cfc30; 1 drivers -v0x17aebd0_0 .net "LABEL", 3 0, L_0x17d05a0; 1 drivers -v0x17aecb0_0 .var "PC", 3 0; -v0x17aed90_0 .var "PCNEXT", 3 0; -v0x17aee70_0 .net "SRC", 2 0, L_0x17d0160; 1 drivers -v0x17aefe0_0 .net *"_s103", 0 0, L_0x17ce550; 1 drivers -v0x17af0c0_0 .net *"_s107", 0 0, L_0x17ce460; 1 drivers -v0x17af1a0_0 .net *"_s111", 0 0, L_0x17ce740; 1 drivers -v0x17af280_0 .net *"_s115", 0 0, L_0x17ce640; 1 drivers -v0x17af360_0 .net *"_s119", 0 0, L_0x17ce980; 1 drivers -v0x17af440_0 .net *"_s123", 0 0, L_0x17ce870; 1 drivers -v0x17af520_0 .net *"_s127", 0 0, L_0x17ceb40; 1 drivers -v0x17af600_0 .net *"_s131", 0 0, L_0x17cea20; 1 drivers -v0x17af7b0_0 .net *"_s135", 0 0, L_0x17ceda0; 1 drivers -v0x17af850_0 .net *"_s139", 0 0, L_0x17cec70; 1 drivers -v0x17af930_0 .net *"_s143", 0 0, L_0x17cef80; 1 drivers -v0x17afa10_0 .net *"_s147", 0 0, L_0x17cee40; 1 drivers -v0x17afaf0_0 .net *"_s151", 0 0, L_0x17cf170; 1 drivers -v0x17afbd0_0 .net *"_s155", 0 0, L_0x17cf020; 1 drivers -v0x17afcb0_0 .net *"_s159", 0 0, L_0x17cf0c0; 1 drivers -v0x17afd90_0 .net *"_s160", 17 0, L_0x17cf210; 1 drivers -v0x17afe70_0 .net *"_s162", 5 0, L_0x17cf570; 1 drivers -L_0x2aef774e3180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x17aff50_0 .net *"_s165", 1 0, L_0x2aef774e3180; 1 drivers -v0x17b1f10_2 .array/port v0x17b1f10, 2; -v0x17b0030_0 .net *"_s173", 10 0, v0x17b1f10_2; 1 drivers -v0x17b1f10_3 .array/port v0x17b1f10, 3; -v0x17b0110_0 .net *"_s179", 10 0, v0x17b1f10_3; 1 drivers -v0x17b1f10_0 .array/port v0x17b1f10, 0; -v0x17b01f0_0 .net *"_s185", 10 0, v0x17b1f10_0; 1 drivers -v0x17b1f10_1 .array/port v0x17b1f10, 1; -v0x17b02d0_0 .net *"_s191", 10 0, v0x17b1f10_1; 1 drivers -v0x17b03b0_0 .net *"_s23", 0 0, L_0x17cca30; 1 drivers -v0x17b0490_0 .net *"_s27", 0 0, L_0x17ccb50; 1 drivers -v0x17af6e0_0 .net *"_s31", 0 0, L_0x17ccc40; 1 drivers -v0x17b0760_0 .net *"_s36", 0 0, L_0x17ccf10; 1 drivers -v0x17b0840_0 .net *"_s42", 0 0, L_0x17cd130; 1 drivers -v0x17b0920_0 .net *"_s46", 0 0, L_0x17cd1d0; 1 drivers -v0x17b0a00_0 .net *"_s50", 0 0, L_0x17cd2e0; 1 drivers -v0x17b0ae0_0 .net *"_s55", 0 0, L_0x17cd520; 1 drivers -v0x17b0bc0_0 .net *"_s61", 0 0, L_0x17cd790; 1 drivers -v0x17b0ca0_0 .net *"_s65", 0 0, L_0x17cd8c0; 1 drivers -v0x17b0d80_0 .net *"_s69", 0 0, L_0x17cda90; 1 drivers -v0x17b0e60_0 .net *"_s74", 0 0, L_0x17cd9f0; 1 drivers -v0x17b0f40_0 .net *"_s80", 0 0, L_0x17cdc30; 1 drivers -v0x17b1020_0 .net *"_s84", 0 0, L_0x17cdee0; 1 drivers -v0x17b1100_0 .net *"_s88", 0 0, L_0x17cde20; 1 drivers -v0x17b11e0_0 .net *"_s93", 0 0, L_0x17cdf80; 1 drivers -v0x17b12c0_0 .net *"_s99", 0 0, L_0x17ce240; 1 drivers -v0x17b13a0_0 .net/s "accOut", 10 0, L_0x17cc1e0; alias, 1 drivers -v0x17b1480_0 .net "anyHasData", 0 0, L_0x17cd090; 1 drivers -v0x17b1540_0 .net "anyReadAck", 0 0, L_0x17cdd30; 1 drivers -v0x17b1600_0 .net "anyWantData", 0 0, L_0x17cd610; 1 drivers -v0x17b16c0_0 .net "anyWriteAck", 0 0, L_0x17ce370; 1 drivers -v0x17b1780_0 .net "clk", 0 0, v0x17b4100_0; alias, 1 drivers -v0x17b18b0_0 .net "down", 14 0, L_0x17d7720; alias, 1 drivers -v0x17b1970_0 .net "downOut", 14 0, L_0x17cf990; alias, 1 drivers -v0x17b1a10_0 .net "instruction", 17 0, L_0x17cd270; 1 drivers -v0x17b1ad0 .array "instructions", 15 0, 17 0; -v0x17b1b90_0 .var "last", 2 0; -o0x2aef774b73b8 .functor BUFZ 15, C4; HiZ drive -v0x17b1c70_0 .net "left", 14 0, o0x2aef774b73b8; 0 drivers -v0x17b1d50_0 .net "leftOut", 14 0, L_0x17cf6d0; 1 drivers -v0x17b1e30_0 .var "mode", 2 0; -v0x17b1f10 .array/s "outVals", 2 5, 10 0; -v0x17b2080_0 .var "phase", 2 0; -v0x17b2160_0 .net "portsHaveData", 5 2, L_0x17ccd30; 1 drivers -v0x17b0530_0 .net "portsWantData", 5 2, L_0x17cd380; 1 drivers -v0x17b0610_0 .net "readAckIn", 5 2, L_0x17cdb30; 1 drivers -v0x17b2610_0 .var "readAckOut", 5 2; -v0x17b26b0_0 .var "readTarget", 2 0; -v0x17b2750_0 .var/s "readValue", 10 0; -L_0x2aef774e3138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x17b27f0 .array "regVals", 0 7; -v0x17b27f0_0 .net/s v0x17b27f0 0, 10 0, L_0x2aef774e3138; 1 drivers -v0x17b27f0_1 .net/s v0x17b27f0 1, 10 0, L_0x17cc430; 1 drivers -v0x17b27f0_2 .net/s v0x17b27f0 2, 10 0, L_0x17cc750; 1 drivers -v0x17b27f0_3 .net/s v0x17b27f0 3, 10 0, L_0x17cc7f0; 1 drivers -v0x17b27f0_4 .net/s v0x17b27f0 4, 10 0, L_0x17cc890; 1 drivers -v0x17b27f0_5 .net/s v0x17b27f0 5, 10 0, L_0x17cc930; 1 drivers -o0x2aef774b7778 .functor BUFZ 11, C4; HiZ drive -v0x17b27f0_6 .net/s v0x17b27f0 6, 10 0, o0x2aef774b7778; 0 drivers -o0x2aef774b77a8 .functor BUFZ 11, C4; HiZ drive -v0x17b27f0_7 .net/s v0x17b27f0 7, 10 0, o0x2aef774b77a8; 0 drivers -o0x2aef774b77d8 .functor BUFZ 15, C4; HiZ drive -v0x17b2a00_0 .net "right", 14 0, o0x2aef774b77d8; 0 drivers -v0x17b2ae0_0 .net "rightOut", 14 0, L_0x17cff40; 1 drivers -o0x2aef774b7838 .functor BUFZ 15, C4; HiZ drive -v0x17b2bc0_0 .net "up", 14 0, o0x2aef774b7838; 0 drivers -v0x17b2ca0_0 .net "upOut", 14 0, L_0x17cf480; 1 drivers -v0x17b2d80_0 .var "weHaveData", 5 2; -v0x17b2e60_0 .var "weWantData", 5 2; -v0x17b2f40_0 .net "writeAckIn", 5 2, L_0x17ce050; 1 drivers -v0x17b3020_0 .var "writeAckOut", 5 2; -v0x17b3100_0 .var "writeTarget", 2 0; -v0x17b31e0_0 .var/s "writeValue", 10 0; -L_0x17cc750 .part o0x2aef774b73b8, 0, 11; -L_0x17cc7f0 .part o0x2aef774b77d8, 0, 11; -L_0x17cc890 .part o0x2aef774b7838, 0, 11; -L_0x17cc930 .part L_0x17d7720, 0, 11; -L_0x17cca30 .part o0x2aef774b73b8, 11, 1; -L_0x17ccb50 .part o0x2aef774b77d8, 11, 1; -L_0x17ccc40 .part o0x2aef774b7838, 11, 1; -L_0x17ccd30 .concat8 [ 1 1 1 1], L_0x17cca30, L_0x17ccb50, L_0x17ccc40, L_0x17ccf10; -L_0x17ccf10 .part L_0x17d7720, 11, 1; -L_0x17cd090 .reduce/or L_0x17ccd30; -L_0x17cd130 .part o0x2aef774b73b8, 12, 1; -L_0x17cd1d0 .part o0x2aef774b77d8, 12, 1; -L_0x17cd2e0 .part o0x2aef774b7838, 12, 1; -L_0x17cd380 .concat8 [ 1 1 1 1], L_0x17cd130, L_0x17cd1d0, L_0x17cd2e0, L_0x17cd520; -L_0x17cd520 .part L_0x17d7720, 12, 1; -L_0x17cd610 .reduce/or L_0x17cd380; -L_0x17cd790 .part o0x2aef774b73b8, 13, 1; -L_0x17cd8c0 .part o0x2aef774b77d8, 13, 1; -L_0x17cda90 .part o0x2aef774b7838, 13, 1; -L_0x17cdb30 .concat8 [ 1 1 1 1], L_0x17cd790, L_0x17cd8c0, L_0x17cda90, L_0x17cd9f0; -L_0x17cd9f0 .part L_0x17d7720, 13, 1; -L_0x17cdd30 .reduce/or L_0x17cdb30; -L_0x17cdc30 .part o0x2aef774b73b8, 14, 1; -L_0x17cdee0 .part o0x2aef774b77d8, 14, 1; -L_0x17cde20 .part o0x2aef774b7838, 14, 1; -L_0x17ce050 .concat8 [ 1 1 1 1], L_0x17cdc30, L_0x17cdee0, L_0x17cde20, L_0x17cdf80; -L_0x17cdf80 .part L_0x17d7720, 14, 1; -L_0x17ce370 .reduce/or L_0x17ce050; -L_0x17ce240 .part v0x17b2610_0, 0, 1; -L_0x17ce550 .part v0x17b2610_0, 1, 1; -L_0x17ce460 .part v0x17b2610_0, 2, 1; -L_0x17ce740 .part v0x17b2610_0, 3, 1; -L_0x17ce640 .part v0x17b3020_0, 0, 1; -L_0x17ce980 .part v0x17b3020_0, 1, 1; -L_0x17ce870 .part v0x17b3020_0, 2, 1; -L_0x17ceb40 .part v0x17b3020_0, 3, 1; -L_0x17cea20 .part v0x17b2e60_0, 0, 1; -L_0x17ceda0 .part v0x17b2e60_0, 1, 1; -L_0x17cec70 .part v0x17b2e60_0, 2, 1; -L_0x17cef80 .part v0x17b2e60_0, 3, 1; -L_0x17cee40 .part v0x17b2d80_0, 0, 1; -L_0x17cf170 .part v0x17b2d80_0, 1, 1; -L_0x17cf020 .part v0x17b2d80_0, 2, 1; -L_0x17cf0c0 .part v0x17b2d80_0, 3, 1; -L_0x17cf210 .array/port v0x17b1ad0, L_0x17cf570; -L_0x17cf570 .concat [ 4 2 0 0], v0x17aecb0_0, L_0x2aef774e3180; -LS_0x17cf480_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_2, L_0x17cf020, L_0x17cec70, L_0x17ce870; -LS_0x17cf480_0_4 .concat8 [ 1 0 0 0], L_0x17ce460; -L_0x17cf480 .concat8 [ 14 1 0 0], LS_0x17cf480_0_0, LS_0x17cf480_0_4; -LS_0x17cf990_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_3, L_0x17cf0c0, L_0x17cef80, L_0x17ceb40; -LS_0x17cf990_0_4 .concat8 [ 1 0 0 0], L_0x17ce740; -L_0x17cf990 .concat8 [ 14 1 0 0], LS_0x17cf990_0_0, LS_0x17cf990_0_4; -LS_0x17cf6d0_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_0, L_0x17cee40, L_0x17cea20, L_0x17ce640; -LS_0x17cf6d0_0_4 .concat8 [ 1 0 0 0], L_0x17ce240; -L_0x17cf6d0 .concat8 [ 14 1 0 0], LS_0x17cf6d0_0_0, LS_0x17cf6d0_0_4; -LS_0x17cff40_0_0 .concat8 [ 11 1 1 1], v0x17b1f10_1, L_0x17cf170, L_0x17ceda0, L_0x17ce980; -LS_0x17cff40_0_4 .concat8 [ 1 0 0 0], L_0x17ce550; -L_0x17cff40 .concat8 [ 14 1 0 0], LS_0x17cff40_0_0, LS_0x17cff40_0_4; -L_0x17cfc30 .part L_0x17cd270, 14, 4; -L_0x17d0350 .part L_0x17cd270, 11, 3; -L_0x17d0160 .part L_0x17cd270, 8, 3; -L_0x17d05a0 .part L_0x17cd270, 10, 4; -L_0x17d03f0 .part L_0x17cd270, 0, 11; - .scope S_0x17a3e20; +P_0xfdc420 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0xfdc460 .param/str "memFile" 0 3 60, "jumpTest/up.dat"; +L_0xffa1e0 .functor BUFZ 11, v0xfdc720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xffa430 .functor BUFZ 11, v0xfdc720_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0xffb270 .functor BUFZ 18, L_0xffd210, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0xfdc720_0 .var/s "ACC", 10 0; +v0xfdc820_0 .var/s "BAK", 10 0; +v0xfdc900_0 .net "DST", 2 0, L_0xffe350; 1 drivers +v0xfdc9c0_0 .net/s "IMM", 10 0, L_0xffe3f0; 1 drivers +v0xfdcaa0_0 .net "INST", 3 0, L_0xffdc30; 1 drivers +v0xfdcbd0_0 .net "LABEL", 3 0, L_0xffe5a0; 1 drivers +v0xfdccb0_0 .var "PC", 3 0; +v0xfdcd90_0 .var "PCNEXT", 3 0; +v0xfdce70_0 .net "SRC", 2 0, L_0xffe160; 1 drivers +v0xfdcfe0_0 .net *"_s103", 0 0, L_0xffc550; 1 drivers +v0xfdd0c0_0 .net *"_s107", 0 0, L_0xffc460; 1 drivers +v0xfdd1a0_0 .net *"_s111", 0 0, L_0xffc740; 1 drivers +v0xfdd280_0 .net *"_s115", 0 0, L_0xffc640; 1 drivers +v0xfdd360_0 .net *"_s119", 0 0, L_0xffc980; 1 drivers +v0xfdd440_0 .net *"_s123", 0 0, L_0xffc870; 1 drivers +v0xfdd520_0 .net *"_s127", 0 0, L_0xffcb40; 1 drivers +v0xfdd600_0 .net *"_s131", 0 0, L_0xffca20; 1 drivers +v0xfdd7b0_0 .net *"_s135", 0 0, L_0xffcda0; 1 drivers +v0xfdd850_0 .net *"_s139", 0 0, L_0xffcc70; 1 drivers +v0xfdd930_0 .net *"_s143", 0 0, L_0xffcf80; 1 drivers +v0xfdda10_0 .net *"_s147", 0 0, L_0xffce40; 1 drivers +v0xfddaf0_0 .net *"_s151", 0 0, L_0xffd170; 1 drivers +v0xfddbd0_0 .net *"_s155", 0 0, L_0xffd020; 1 drivers +v0xfddcb0_0 .net *"_s159", 0 0, L_0xffd0c0; 1 drivers +v0xfddd90_0 .net *"_s160", 17 0, L_0xffd210; 1 drivers +v0xfdde70_0 .net *"_s162", 5 0, L_0xffd570; 1 drivers +L_0x2b99d7e1a180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0xfddf50_0 .net *"_s165", 1 0, L_0x2b99d7e1a180; 1 drivers +v0xfdff10_2 .array/port v0xfdff10, 2; +v0xfde030_0 .net *"_s173", 10 0, v0xfdff10_2; 1 drivers +v0xfdff10_3 .array/port v0xfdff10, 3; +v0xfde110_0 .net *"_s179", 10 0, v0xfdff10_3; 1 drivers +v0xfdff10_0 .array/port v0xfdff10, 0; +v0xfde1f0_0 .net *"_s185", 10 0, v0xfdff10_0; 1 drivers +v0xfdff10_1 .array/port v0xfdff10, 1; +v0xfde2d0_0 .net *"_s191", 10 0, v0xfdff10_1; 1 drivers +v0xfde3b0_0 .net *"_s23", 0 0, L_0xffaa30; 1 drivers +v0xfde490_0 .net *"_s27", 0 0, L_0xffab50; 1 drivers +v0xfdd6e0_0 .net *"_s31", 0 0, L_0xffac40; 1 drivers +v0xfde760_0 .net *"_s36", 0 0, L_0xffaf10; 1 drivers +v0xfde840_0 .net *"_s42", 0 0, L_0xffb130; 1 drivers +v0xfde920_0 .net *"_s46", 0 0, L_0xffb1d0; 1 drivers +v0xfdea00_0 .net *"_s50", 0 0, L_0xffb2e0; 1 drivers +v0xfdeae0_0 .net *"_s55", 0 0, L_0xffb520; 1 drivers +v0xfdebc0_0 .net *"_s61", 0 0, L_0xffb790; 1 drivers +v0xfdeca0_0 .net *"_s65", 0 0, L_0xffb8c0; 1 drivers +v0xfded80_0 .net *"_s69", 0 0, L_0xffba90; 1 drivers +v0xfdee60_0 .net *"_s74", 0 0, L_0xffb9f0; 1 drivers +v0xfdef40_0 .net *"_s80", 0 0, L_0xffbc30; 1 drivers +v0xfdf020_0 .net *"_s84", 0 0, L_0xffbee0; 1 drivers +v0xfdf100_0 .net *"_s88", 0 0, L_0xffbe20; 1 drivers +v0xfdf1e0_0 .net *"_s93", 0 0, L_0xffbf80; 1 drivers +v0xfdf2c0_0 .net *"_s99", 0 0, L_0xffc240; 1 drivers +v0xfdf3a0_0 .net/s "accOut", 10 0, L_0xffa1e0; alias, 1 drivers +v0xfdf480_0 .net "anyHasData", 0 0, L_0xffb090; 1 drivers +v0xfdf540_0 .net "anyReadAck", 0 0, L_0xffbd30; 1 drivers +v0xfdf600_0 .net "anyWantData", 0 0, L_0xffb610; 1 drivers +v0xfdf6c0_0 .net "anyWriteAck", 0 0, L_0xffc370; 1 drivers +v0xfdf780_0 .net "clk", 0 0, v0xfe2100_0; alias, 1 drivers +v0xfdf8b0_0 .net "down", 14 0, L_0x1005720; alias, 1 drivers +v0xfdf970_0 .net "downOut", 14 0, L_0xffd990; alias, 1 drivers +v0xfdfa10_0 .net "instruction", 17 0, L_0xffb270; 1 drivers +v0xfdfad0 .array "instructions", 15 0, 17 0; +v0xfdfb90_0 .var "last", 2 0; +o0x2b99d7dee3b8 .functor BUFZ 15, C4; HiZ drive +v0xfdfc70_0 .net "left", 14 0, o0x2b99d7dee3b8; 0 drivers +v0xfdfd50_0 .net "leftOut", 14 0, L_0xffd6d0; 1 drivers +v0xfdfe30_0 .var "mode", 2 0; +v0xfdff10 .array/s "outVals", 2 5, 10 0; +v0xfe0080_0 .var "phase", 2 0; +v0xfe0160_0 .net "portsHaveData", 5 2, L_0xffad30; 1 drivers +v0xfde530_0 .net "portsWantData", 5 2, L_0xffb380; 1 drivers +v0xfde610_0 .net "readAckIn", 5 2, L_0xffbb30; 1 drivers +v0xfe0610_0 .var "readAckOut", 5 2; +v0xfe06b0_0 .var "readTarget", 2 0; +v0xfe0750_0 .var/s "readValue", 10 0; +L_0x2b99d7e1a138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0xfe07f0 .array "regVals", 0 7; +v0xfe07f0_0 .net/s v0xfe07f0 0, 10 0, L_0x2b99d7e1a138; 1 drivers +v0xfe07f0_1 .net/s v0xfe07f0 1, 10 0, L_0xffa430; 1 drivers +v0xfe07f0_2 .net/s v0xfe07f0 2, 10 0, L_0xffa750; 1 drivers +v0xfe07f0_3 .net/s v0xfe07f0 3, 10 0, L_0xffa7f0; 1 drivers +v0xfe07f0_4 .net/s v0xfe07f0 4, 10 0, L_0xffa890; 1 drivers +v0xfe07f0_5 .net/s v0xfe07f0 5, 10 0, L_0xffa930; 1 drivers +o0x2b99d7dee778 .functor BUFZ 11, C4; HiZ drive +v0xfe07f0_6 .net/s v0xfe07f0 6, 10 0, o0x2b99d7dee778; 0 drivers +o0x2b99d7dee7a8 .functor BUFZ 11, C4; HiZ drive +v0xfe07f0_7 .net/s v0xfe07f0 7, 10 0, o0x2b99d7dee7a8; 0 drivers +o0x2b99d7dee7d8 .functor BUFZ 15, C4; HiZ drive +v0xfe0a00_0 .net "right", 14 0, o0x2b99d7dee7d8; 0 drivers +v0xfe0ae0_0 .net "rightOut", 14 0, L_0xffdf40; 1 drivers +o0x2b99d7dee838 .functor BUFZ 15, C4; HiZ drive +v0xfe0bc0_0 .net "up", 14 0, o0x2b99d7dee838; 0 drivers +v0xfe0ca0_0 .net "upOut", 14 0, L_0xffd480; 1 drivers +v0xfe0d80_0 .var "weHaveData", 5 2; +v0xfe0e60_0 .var "weWantData", 5 2; +v0xfe0f40_0 .net "writeAckIn", 5 2, L_0xffc050; 1 drivers +v0xfe1020_0 .var "writeAckOut", 5 2; +v0xfe1100_0 .var "writeTarget", 2 0; +v0xfe11e0_0 .var/s "writeValue", 10 0; +L_0xffa750 .part o0x2b99d7dee3b8, 0, 11; +L_0xffa7f0 .part o0x2b99d7dee7d8, 0, 11; +L_0xffa890 .part o0x2b99d7dee838, 0, 11; +L_0xffa930 .part L_0x1005720, 0, 11; +L_0xffaa30 .part o0x2b99d7dee3b8, 11, 1; +L_0xffab50 .part o0x2b99d7dee7d8, 11, 1; +L_0xffac40 .part o0x2b99d7dee838, 11, 1; +L_0xffad30 .concat8 [ 1 1 1 1], L_0xffaa30, L_0xffab50, L_0xffac40, L_0xffaf10; +L_0xffaf10 .part L_0x1005720, 11, 1; +L_0xffb090 .reduce/or L_0xffad30; +L_0xffb130 .part o0x2b99d7dee3b8, 12, 1; +L_0xffb1d0 .part o0x2b99d7dee7d8, 12, 1; +L_0xffb2e0 .part o0x2b99d7dee838, 12, 1; +L_0xffb380 .concat8 [ 1 1 1 1], L_0xffb130, L_0xffb1d0, L_0xffb2e0, L_0xffb520; +L_0xffb520 .part L_0x1005720, 12, 1; +L_0xffb610 .reduce/or L_0xffb380; +L_0xffb790 .part o0x2b99d7dee3b8, 13, 1; +L_0xffb8c0 .part o0x2b99d7dee7d8, 13, 1; +L_0xffba90 .part o0x2b99d7dee838, 13, 1; +L_0xffbb30 .concat8 [ 1 1 1 1], L_0xffb790, L_0xffb8c0, L_0xffba90, L_0xffb9f0; +L_0xffb9f0 .part L_0x1005720, 13, 1; +L_0xffbd30 .reduce/or L_0xffbb30; +L_0xffbc30 .part o0x2b99d7dee3b8, 14, 1; +L_0xffbee0 .part o0x2b99d7dee7d8, 14, 1; +L_0xffbe20 .part o0x2b99d7dee838, 14, 1; +L_0xffc050 .concat8 [ 1 1 1 1], L_0xffbc30, L_0xffbee0, L_0xffbe20, L_0xffbf80; +L_0xffbf80 .part L_0x1005720, 14, 1; +L_0xffc370 .reduce/or L_0xffc050; +L_0xffc240 .part v0xfe0610_0, 0, 1; +L_0xffc550 .part v0xfe0610_0, 1, 1; +L_0xffc460 .part v0xfe0610_0, 2, 1; +L_0xffc740 .part v0xfe0610_0, 3, 1; +L_0xffc640 .part v0xfe1020_0, 0, 1; +L_0xffc980 .part v0xfe1020_0, 1, 1; +L_0xffc870 .part v0xfe1020_0, 2, 1; +L_0xffcb40 .part v0xfe1020_0, 3, 1; +L_0xffca20 .part v0xfe0e60_0, 0, 1; +L_0xffcda0 .part v0xfe0e60_0, 1, 1; +L_0xffcc70 .part v0xfe0e60_0, 2, 1; +L_0xffcf80 .part v0xfe0e60_0, 3, 1; +L_0xffce40 .part v0xfe0d80_0, 0, 1; +L_0xffd170 .part v0xfe0d80_0, 1, 1; +L_0xffd020 .part v0xfe0d80_0, 2, 1; +L_0xffd0c0 .part v0xfe0d80_0, 3, 1; +L_0xffd210 .array/port v0xfdfad0, L_0xffd570; +L_0xffd570 .concat [ 4 2 0 0], v0xfdccb0_0, L_0x2b99d7e1a180; +LS_0xffd480_0_0 .concat8 [ 11 1 1 1], v0xfdff10_2, L_0xffd020, L_0xffcc70, L_0xffc870; +LS_0xffd480_0_4 .concat8 [ 1 0 0 0], L_0xffc460; +L_0xffd480 .concat8 [ 14 1 0 0], LS_0xffd480_0_0, LS_0xffd480_0_4; +LS_0xffd990_0_0 .concat8 [ 11 1 1 1], v0xfdff10_3, L_0xffd0c0, L_0xffcf80, L_0xffcb40; +LS_0xffd990_0_4 .concat8 [ 1 0 0 0], L_0xffc740; +L_0xffd990 .concat8 [ 14 1 0 0], LS_0xffd990_0_0, LS_0xffd990_0_4; +LS_0xffd6d0_0_0 .concat8 [ 11 1 1 1], v0xfdff10_0, L_0xffce40, L_0xffca20, L_0xffc640; +LS_0xffd6d0_0_4 .concat8 [ 1 0 0 0], L_0xffc240; +L_0xffd6d0 .concat8 [ 14 1 0 0], LS_0xffd6d0_0_0, LS_0xffd6d0_0_4; +LS_0xffdf40_0_0 .concat8 [ 11 1 1 1], v0xfdff10_1, L_0xffd170, L_0xffcda0, L_0xffc980; +LS_0xffdf40_0_4 .concat8 [ 1 0 0 0], L_0xffc550; +L_0xffdf40 .concat8 [ 14 1 0 0], LS_0xffdf40_0_0, LS_0xffdf40_0_4; +L_0xffdc30 .part L_0xffb270, 14, 4; +L_0xffe350 .part L_0xffb270, 11, 3; +L_0xffe160 .part L_0xffb270, 8, 3; +L_0xffe5a0 .part L_0xffb270, 10, 4; +L_0xffe3f0 .part L_0xffb270, 0, 11; + .scope S_0xfd1e20; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17a7a60_0, 0, 3; + %store/vec4 v0xfd5a60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17a7c80_0, 0, 3; + %store/vec4 v0xfd5c80_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17a77c0_0, 0, 3; + %store/vec4 v0xfd57c0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x17a43b0_0, 0, 11; + %store/vec4 v0xfd23b0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x17a44b0_0, 0, 11; + %store/vec4 v0xfd24b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a48f0_0, 0, 4; + %store/vec4 v0xfd28f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a6290_0, 0, 4; + %store/vec4 v0xfd4290_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a8a20_0, 0, 4; + %store/vec4 v0xfd6a20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a8be0_0, 0, 4; + %store/vec4 v0xfd6be0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a8940_0, 0, 4; + %store/vec4 v0xfd6940_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a7b40, 4, 0; + %store/vec4a v0xfd5b40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a7b40, 4, 0; + %store/vec4a v0xfd5b40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a7b40, 4, 0; + %store/vec4a v0xfd5b40, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a7b40, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x17a4030, v0x17a7700 {0 0 0}; + %store/vec4a v0xfd5b40, 4, 0; + %vpi_call 3 187 "$readmemb", P_0xfd2030, v0xfd5700 {0 0 0}; %end; .thread T_0; - .scope S_0x17a3e20; + .scope S_0xfd1e20; T_1 ; - %wait E_0x1717d10; - %load/vec4 v0x17a7a60_0; + %wait E_0xf45d10; + %load/vec4 v0xfd5a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -982,7 +982,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x17a7c80_0; + %load/vec4 v0xfd5c80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -997,185 +997,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x17a4730_0; + %load/vec4 v0xfd2730_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x17a7d60_0; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd5d60_0; + %load/vec4 v0xfd2ab0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a6290_0, 4, 5; - %load/vec4 v0x17a4ab0_0; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4/off/d v0xfd4290_0, 4, 5; + %load/vec4 v0xfd2ab0_0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; - %load/vec4 v0x17a4ab0_0; - %assign/vec4 v0x17a8210_0, 0; + %assign/vec4 v0xfd5a60_0, 0; + %load/vec4 v0xfd2ab0_0; + %assign/vec4 v0xfd6210_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; - %load/vec4 v0x17a4ab0_0; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; + %load/vec4 v0xfd2ab0_0; + %assign/vec4 v0xfd57c0_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x17a7d60_0; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd5d60_0; + %load/vec4 v0xfd57c0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; - %load/vec4 v0x17a77c0_0; - %assign/vec4 v0x17a8210_0, 0; + %assign/vec4 v0xfd5a60_0, 0; + %load/vec4 v0xfd57c0_0; + %assign/vec4 v0xfd6210_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x17a4ab0_0; + %load/vec4 v0xfd2ab0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x17a70c0_0; + %load/vec4 v0xfd50c0_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1183,29 +1183,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; - %load/vec4 v0x17a4ab0_0; - %assign/vec4 v0x17a8210_0, 0; + %assign/vec4 v0xfd5a60_0, 0; + %load/vec4 v0xfd2ab0_0; + %assign/vec4 v0xfd6210_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1213,10 +1213,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x17a4730_0; + %load/vec4 v0xfd2730_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1283,180 +1283,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x17a43b0_0; - %load/vec4 v0x17a82f0_0; + %load/vec4 v0xfd23b0_0; + %load/vec4 v0xfd62f0_0; %add; - %assign/vec4 v0x17a43b0_0, 0; - %load/vec4 v0x17a48f0_0; + %assign/vec4 v0xfd23b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x17a43b0_0; - %load/vec4 v0x17a82f0_0; + %load/vec4 v0xfd23b0_0; + %load/vec4 v0xfd62f0_0; %sub; - %assign/vec4 v0x17a43b0_0, 0; - %load/vec4 v0x17a48f0_0; + %assign/vec4 v0xfd23b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd28f0_0; %pad/u 11; - %load/vec4 v0x17a82f0_0; + %load/vec4 v0xfd62f0_0; %add; %pad/u 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x17a82f0_0; - %assign/vec4 v0x17a8da0_0, 0; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd62f0_0; + %assign/vec4 v0xfd6da0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x17a4650_0; - %assign/vec4 v0x17a8da0_0, 0; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd2650_0; + %assign/vec4 v0xfd6da0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x17a43b0_0; - %load/vec4 v0x17a4650_0; + %load/vec4 v0xfd23b0_0; + %load/vec4 v0xfd2650_0; %add; - %assign/vec4 v0x17a43b0_0, 0; - %load/vec4 v0x17a48f0_0; + %assign/vec4 v0xfd23b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x17a43b0_0; - %load/vec4 v0x17a4650_0; + %load/vec4 v0xfd23b0_0; + %load/vec4 v0xfd2650_0; %sub; - %assign/vec4 v0x17a43b0_0, 0; - %load/vec4 v0x17a48f0_0; + %assign/vec4 v0xfd23b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd28f0_0; %pad/u 11; - %load/vec4 v0x17a4650_0; + %load/vec4 v0xfd2650_0; %add; %pad/u 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x17a44b0_0; - %assign/vec4 v0x17a43b0_0, 0; - %load/vec4 v0x17a43b0_0; - %assign/vec4 v0x17a44b0_0, 0; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd24b0_0; + %assign/vec4 v0xfd23b0_0, 0; + %load/vec4 v0xfd23b0_0; + %assign/vec4 v0xfd24b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x17a43b0_0; - %assign/vec4 v0x17a44b0_0, 0; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd23b0_0; + %assign/vec4 v0xfd24b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x17a43b0_0; + %load/vec4 v0xfd23b0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x17a43b0_0, 0; - %load/vec4 v0x17a48f0_0; + %assign/vec4 v0xfd23b0_0, 0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x17a4810_0; - %assign/vec4 v0x17a49d0_0, 0; + %load/vec4 v0xfd2810_0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x17a43b0_0; + %load/vec4 v0xfd23b0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x17a4810_0; - %assign/vec4 v0x17a49d0_0, 0; + %load/vec4 v0xfd2810_0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x17a43b0_0; + %load/vec4 v0xfd23b0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x17a4810_0; - %assign/vec4 v0x17a49d0_0, 0; + %load/vec4 v0xfd2810_0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x17a43b0_0; + %load/vec4 v0xfd23b0_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x17a4810_0; - %assign/vec4 v0x17a49d0_0, 0; + %load/vec4 v0xfd2810_0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x17a43b0_0; + %load/vec4 v0xfd23b0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x17a4810_0; - %assign/vec4 v0x17a49d0_0, 0; + %load/vec4 v0xfd2810_0; + %assign/vec4 v0xfd29d0_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x17a48f0_0; + %load/vec4 v0xfd28f0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a49d0_0, 0; + %assign/vec4 v0xfd29d0_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x17a4730_0; + %load/vec4 v0xfd2730_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x17a4730_0; + %load/vec4 v0xfd2730_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x17a4590_0; + %load/vec4 v0xfd2590_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x17a4590_0; + %load/vec4 v0xfd2590_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1464,162 +1464,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x17a4590_0; + %load/vec4 v0xfd2590_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x17a8da0_0; - %assign/vec4 v0x17a43b0_0, 0; + %load/vec4 v0xfd6da0_0; + %assign/vec4 v0xfd23b0_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; - %load/vec4 v0x17a4590_0; + %assign/vec4 v0xfd5a60_0, 0; + %load/vec4 v0xfd2590_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x17a77c0_0; - %assign/vec4 v0x17a8cc0_0, 0; - %load/vec4 v0x17a8da0_0; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; + %assign/vec4 v0xfd6cc0_0, 0; + %load/vec4 v0xfd6da0_0; + %load/vec4 v0xfd57c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a77c0_0; + %load/vec4 v0xfd57c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a8940_0, 4, 5; + %assign/vec4/off/d v0xfd6940_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x17a4590_0; + %load/vec4 v0xfd2590_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x17a4590_0; - %assign/vec4 v0x17a8cc0_0, 0; - %load/vec4 v0x17a8da0_0; - %load/vec4 v0x17a4590_0; + %load/vec4 v0xfd2590_0; + %assign/vec4 v0xfd6cc0_0, 0; + %load/vec4 v0xfd6da0_0; + %load/vec4 v0xfd2590_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a4590_0; + %load/vec4 v0xfd2590_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a4590_0; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd2590_0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x17a7240_0; + %load/vec4 v0xfd5240_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x17a4590_0; - %assign/vec4 v0x17a8cc0_0, 0; + %load/vec4 v0xfd2590_0; + %assign/vec4 v0xfd6cc0_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x17a7c80_0; + %load/vec4 v0xfd5c80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1634,82 +1634,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x17a8210_0; + %load/vec4 v0xfd6210_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x17a70c0_0; + %load/vec4 v0xfd50c0_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; + %assign/vec4 v0xfd5a60_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a8a20_0, 0, 4; - %load/vec4 v0x17a7d60_0; + %store/vec4 v0xfd6a20_0, 0, 4; + %load/vec4 v0xfd5d60_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x17a7d60_0; + %load/vec4 v0xfd5d60_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1717,54 +1717,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x17a7d60_0; - %load/vec4 v0x17a8210_0; + %load/vec4 v0xfd5d60_0; + %load/vec4 v0xfd6210_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; - %load/vec4 v0x17a8210_0; + %assign/vec4 v0xfd5a60_0, 0; + %load/vec4 v0xfd6210_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a83d0, 4; - %assign/vec4 v0x17a82f0_0, 0; + %load/vec4a v0xfd63d0, 4; + %assign/vec4 v0xfd62f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a8210_0; + %load/vec4 v0xfd6210_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a6290_0, 4, 5; + %assign/vec4/off/d v0xfd4290_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a8210_0; + %load/vec4 v0xfd6210_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a8a20_0, 4, 5; - %load/vec4 v0x17a8210_0; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4/off/d v0xfd6a20_0, 4, 5; + %load/vec4 v0xfd6210_0; + %assign/vec4 v0xfd57c0_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x17a7c80_0; + %load/vec4 v0xfd5c80_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1780,93 +1780,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x17a8cc0_0; + %load/vec4 v0xfd6cc0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x17a7240_0; + %load/vec4 v0xfd5240_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x17a4160_0; + %load/vec4 v0xfd2160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a8cc0_0, 0; + %assign/vec4 v0xfd6cc0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a8940_0, 4, 5; - %load/vec4 v0x17a8da0_0; + %assign/vec4/off/d v0xfd6940_0, 4, 5; + %load/vec4 v0xfd6da0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a7b40, 0, 4; + %assign/vec4/a/d v0xfd5b40, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd57c0_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1874,33 +1874,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x17a8cc0_0; + %load/vec4 v0xfd6cc0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x17a8b00_0; - %load/vec4 v0x17a8cc0_0; + %load/vec4 v0xfd6b00_0; + %load/vec4 v0xfd6cc0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x17a8cc0_0; + %load/vec4 v0xfd6cc0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x17a8940_0, 4, 1; + %store/vec4 v0xfd6940_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a7a60_0, 0; - %load/vec4 v0x17a8cc0_0; - %assign/vec4 v0x17a77c0_0, 0; + %assign/vec4 v0xfd5a60_0, 0; + %load/vec4 v0xfd6cc0_0; + %assign/vec4 v0xfd57c0_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a7c80_0, 0; + %assign/vec4 v0xfd5c80_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1909,19 +1909,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x17a3e20; + .scope S_0xfd1e20; T_2 ; - %wait E_0x16f55d0; - %load/vec4 v0x17a7c80_0; + %wait E_0xf235d0; + %load/vec4 v0xfd5c80_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17a7a60_0; + %load/vec4 v0xfd5a60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x17a49d0_0; + %load/vec4 v0xfd29d0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1930,62 +1930,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x17a49d0_0; - %assign/vec4 v0x17a48f0_0, 0; + %load/vec4 v0xfd29d0_0; + %assign/vec4 v0xfd28f0_0, 0; T_2.0 ; - %load/vec4 v0x17a7c80_0; + %load/vec4 v0xfd5c80_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a6290_0, 0, 4; + %store/vec4 v0xfd4290_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x17a9020; + .scope S_0xfd7020; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17acbf0_0, 0, 3; + %store/vec4 v0xfdabf0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17ace20_0, 0, 3; + %store/vec4 v0xfdae20_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17ac9b0_0, 0, 3; + %store/vec4 v0xfda9b0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x17a95a0_0, 0, 11; + %store/vec4 v0xfd75a0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x17a96a0_0, 0, 11; + %store/vec4 v0xfd76a0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a9ae0_0, 0, 4; + %store/vec4 v0xfd7ae0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17ad3b0_0, 0, 4; + %store/vec4 v0xfdb3b0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17adc00_0, 0, 4; + %store/vec4 v0xfdbc00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17addc0_0, 0, 4; + %store/vec4 v0xfdbdc0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17adb20_0, 0, 4; + %store/vec4 v0xfdbb20_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17accb0, 4, 0; + %store/vec4a v0xfdacb0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17accb0, 4, 0; + %store/vec4a v0xfdacb0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17accb0, 4, 0; + %store/vec4a v0xfdacb0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17accb0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x17a9230, v0x17ac8f0 {0 0 0}; + %store/vec4a v0xfdacb0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0xfd7230, v0xfda8f0 {0 0 0}; %end; .thread T_3; - .scope S_0x17a9020; + .scope S_0xfd7020; T_4 ; - %wait E_0x1717d10; - %load/vec4 v0x17acbf0_0; + %wait E_0xf45d10; + %load/vec4 v0xfdabf0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2000,7 +2000,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x17ace20_0; + %load/vec4 v0xfdae20_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2015,185 +2015,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x17a9920_0; + %load/vec4 v0xfd7920_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x17acf00_0; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfdaf00_0; + %load/vec4 v0xfd7ca0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; - %load/vec4 v0x17a9ca0_0; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; + %load/vec4 v0xfd7ca0_0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; - %load/vec4 v0x17a9ca0_0; - %assign/vec4 v0x17ad450_0, 0; + %assign/vec4 v0xfdabf0_0, 0; + %load/vec4 v0xfd7ca0_0; + %assign/vec4 v0xfdb450_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17adc00_0, 4, 5; - %load/vec4 v0x17a9ca0_0; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; + %load/vec4 v0xfd7ca0_0; + %assign/vec4 v0xfda9b0_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x17acf00_0; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfdaf00_0; + %load/vec4 v0xfda9b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; - %load/vec4 v0x17ac9b0_0; - %assign/vec4 v0x17ad450_0, 0; + %assign/vec4 v0xfdabf0_0, 0; + %load/vec4 v0xfda9b0_0; + %assign/vec4 v0xfdb450_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17adc00_0, 4, 5; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x17a9ca0_0; + %load/vec4 v0xfd7ca0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x17ac2b0_0; + %load/vec4 v0xfda2b0_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2201,29 +2201,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; - %load/vec4 v0x17a9ca0_0; - %assign/vec4 v0x17ad450_0, 0; + %assign/vec4 v0xfdabf0_0, 0; + %load/vec4 v0xfd7ca0_0; + %assign/vec4 v0xfdb450_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adc00_0, 4, 5; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adc00_0, 4, 5; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adc00_0, 4, 5; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adc00_0, 4, 5; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2231,10 +2231,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x17a9920_0; + %load/vec4 v0xfd7920_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2301,180 +2301,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x17a95a0_0; - %load/vec4 v0x17ad4f0_0; + %load/vec4 v0xfd75a0_0; + %load/vec4 v0xfdb4f0_0; %add; - %assign/vec4 v0x17a95a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %assign/vec4 v0xfd75a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x17a95a0_0; - %load/vec4 v0x17ad4f0_0; + %load/vec4 v0xfd75a0_0; + %load/vec4 v0xfdb4f0_0; %sub; - %assign/vec4 v0x17a95a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %assign/vec4 v0xfd75a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7ae0_0; %pad/u 11; - %load/vec4 v0x17ad4f0_0; + %load/vec4 v0xfdb4f0_0; %add; %pad/u 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x17ad4f0_0; - %assign/vec4 v0x17adf80_0, 0; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfdb4f0_0; + %assign/vec4 v0xfdbf80_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x17a9840_0; - %assign/vec4 v0x17adf80_0, 0; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7840_0; + %assign/vec4 v0xfdbf80_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x17a95a0_0; - %load/vec4 v0x17a9840_0; + %load/vec4 v0xfd75a0_0; + %load/vec4 v0xfd7840_0; %add; - %assign/vec4 v0x17a95a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %assign/vec4 v0xfd75a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x17a95a0_0; - %load/vec4 v0x17a9840_0; + %load/vec4 v0xfd75a0_0; + %load/vec4 v0xfd7840_0; %sub; - %assign/vec4 v0x17a95a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %assign/vec4 v0xfd75a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7ae0_0; %pad/u 11; - %load/vec4 v0x17a9840_0; + %load/vec4 v0xfd7840_0; %add; %pad/u 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x17a96a0_0; - %assign/vec4 v0x17a95a0_0, 0; - %load/vec4 v0x17a95a0_0; - %assign/vec4 v0x17a96a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd76a0_0; + %assign/vec4 v0xfd75a0_0, 0; + %load/vec4 v0xfd75a0_0; + %assign/vec4 v0xfd76a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x17a95a0_0; - %assign/vec4 v0x17a96a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd75a0_0; + %assign/vec4 v0xfd76a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x17a95a0_0; + %load/vec4 v0xfd75a0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x17a95a0_0, 0; - %load/vec4 v0x17a9ae0_0; + %assign/vec4 v0xfd75a0_0, 0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x17a9a00_0; - %assign/vec4 v0x17a9bc0_0, 0; + %load/vec4 v0xfd7a00_0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x17a95a0_0; + %load/vec4 v0xfd75a0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x17a9a00_0; - %assign/vec4 v0x17a9bc0_0, 0; + %load/vec4 v0xfd7a00_0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x17a95a0_0; + %load/vec4 v0xfd75a0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x17a9a00_0; - %assign/vec4 v0x17a9bc0_0, 0; + %load/vec4 v0xfd7a00_0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x17a95a0_0; + %load/vec4 v0xfd75a0_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x17a9a00_0; - %assign/vec4 v0x17a9bc0_0, 0; + %load/vec4 v0xfd7a00_0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x17a95a0_0; + %load/vec4 v0xfd75a0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x17a9a00_0; - %assign/vec4 v0x17a9bc0_0, 0; + %load/vec4 v0xfd7a00_0; + %assign/vec4 v0xfd7bc0_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x17a9ae0_0; + %load/vec4 v0xfd7ae0_0; %addi 1, 0, 4; - %assign/vec4 v0x17a9bc0_0, 0; + %assign/vec4 v0xfd7bc0_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x17a9920_0; + %load/vec4 v0xfd7920_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x17a9920_0; + %load/vec4 v0xfd7920_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x17a9780_0; + %load/vec4 v0xfd7780_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x17a9780_0; + %load/vec4 v0xfd7780_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2482,162 +2482,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x17a9780_0; + %load/vec4 v0xfd7780_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x17adf80_0; - %assign/vec4 v0x17a95a0_0, 0; + %load/vec4 v0xfdbf80_0; + %assign/vec4 v0xfd75a0_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; - %load/vec4 v0x17a9780_0; + %assign/vec4 v0xfdabf0_0, 0; + %load/vec4 v0xfd7780_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x17ac9b0_0; - %assign/vec4 v0x17adea0_0, 0; - %load/vec4 v0x17adf80_0; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; + %assign/vec4 v0xfdbea0_0, 0; + %load/vec4 v0xfdbf80_0; + %load/vec4 v0xfda9b0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17ac9b0_0; + %load/vec4 v0xfda9b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17adb20_0, 4, 5; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x17a9780_0; + %load/vec4 v0xfd7780_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x17a9780_0; - %assign/vec4 v0x17adea0_0, 0; - %load/vec4 v0x17adf80_0; - %load/vec4 v0x17a9780_0; + %load/vec4 v0xfd7780_0; + %assign/vec4 v0xfdbea0_0, 0; + %load/vec4 v0xfdbf80_0; + %load/vec4 v0xfd7780_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a9780_0; + %load/vec4 v0xfd7780_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17a9780_0; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfd7780_0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x17ac430_0; + %load/vec4 v0xfda430_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x17a9780_0; - %assign/vec4 v0x17adea0_0, 0; + %load/vec4 v0xfd7780_0; + %assign/vec4 v0xfdbea0_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x17ace20_0; + %load/vec4 v0xfdae20_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2652,82 +2652,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x17ad450_0; + %load/vec4 v0xfdb450_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x17ac2b0_0; + %load/vec4 v0xfda2b0_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; + %assign/vec4 v0xfdabf0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17adc00_0, 0, 4; - %load/vec4 v0x17acf00_0; + %store/vec4 v0xfdbc00_0, 0, 4; + %load/vec4 v0xfdaf00_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x17acf00_0; + %load/vec4 v0xfdaf00_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2735,54 +2735,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x17acf00_0; - %load/vec4 v0x17ad450_0; + %load/vec4 v0xfdaf00_0; + %load/vec4 v0xfdb450_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; - %load/vec4 v0x17ad450_0; + %assign/vec4 v0xfdabf0_0, 0; + %load/vec4 v0xfdb450_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17ad590, 4; - %assign/vec4 v0x17ad4f0_0, 0; + %load/vec4a v0xfdb590, 4; + %assign/vec4 v0xfdb4f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17ad450_0; + %load/vec4 v0xfdb450_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17ad3b0_0, 4, 5; + %assign/vec4/off/d v0xfdb3b0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17ad450_0; + %load/vec4 v0xfdb450_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17adc00_0, 4, 5; - %load/vec4 v0x17ad450_0; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4/off/d v0xfdbc00_0, 4, 5; + %load/vec4 v0xfdb450_0; + %assign/vec4 v0xfda9b0_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x17ace20_0; + %load/vec4 v0xfdae20_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2798,93 +2798,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x17adea0_0; + %load/vec4 v0xfdbea0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x17ac430_0; + %load/vec4 v0xfda430_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x17ab360_0; + %load/vec4 v0xfd9360_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17adea0_0, 0; + %assign/vec4 v0xfdbea0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17adb20_0, 4, 5; - %load/vec4 v0x17adf80_0; + %assign/vec4/off/d v0xfdbb20_0, 4, 5; + %load/vec4 v0xfdbf80_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17accb0, 0, 4; + %assign/vec4/a/d v0xfdacb0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfda9b0_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2892,33 +2892,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x17adea0_0; + %load/vec4 v0xfdbea0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x17adce0_0; - %load/vec4 v0x17adea0_0; + %load/vec4 v0xfdbce0_0; + %load/vec4 v0xfdbea0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x17adea0_0; + %load/vec4 v0xfdbea0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x17adb20_0, 4, 1; + %store/vec4 v0xfdbb20_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17acbf0_0, 0; - %load/vec4 v0x17adea0_0; - %assign/vec4 v0x17ac9b0_0, 0; + %assign/vec4 v0xfdabf0_0, 0; + %load/vec4 v0xfdbea0_0; + %assign/vec4 v0xfda9b0_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17ace20_0, 0; + %assign/vec4 v0xfdae20_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2927,19 +2927,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x17a9020; + .scope S_0xfd7020; T_5 ; - %wait E_0x16f55d0; - %load/vec4 v0x17ace20_0; + %wait E_0xf235d0; + %load/vec4 v0xfdae20_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17acbf0_0; + %load/vec4 v0xfdabf0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x17a9bc0_0; + %load/vec4 v0xfd7bc0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2948,62 +2948,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x17a9bc0_0; - %assign/vec4 v0x17a9ae0_0, 0; + %load/vec4 v0xfd7bc0_0; + %assign/vec4 v0xfd7ae0_0, 0; T_5.0 ; - %load/vec4 v0x17ace20_0; + %load/vec4 v0xfdae20_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17ad3b0_0, 0, 4; + %store/vec4 v0xfdb3b0_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x17ae200; + .scope S_0xfdc200; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17b1e30_0, 0, 3; + %store/vec4 v0xfdfe30_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17b2080_0, 0, 3; + %store/vec4 v0xfe0080_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17b1b90_0, 0, 3; + %store/vec4 v0xfdfb90_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x17ae720_0, 0, 11; + %store/vec4 v0xfdc720_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x17ae820_0, 0, 11; + %store/vec4 v0xfdc820_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17aecb0_0, 0, 4; + %store/vec4 v0xfdccb0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17b2610_0, 0, 4; + %store/vec4 v0xfe0610_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17b2e60_0, 0, 4; + %store/vec4 v0xfe0e60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17b3020_0, 0, 4; + %store/vec4 v0xfe1020_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17b2d80_0, 0, 4; + %store/vec4 v0xfe0d80_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17b1f10, 4, 0; + %store/vec4a v0xfdff10, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17b1f10, 4, 0; + %store/vec4a v0xfdff10, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17b1f10, 4, 0; + %store/vec4a v0xfdff10, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17b1f10, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x17ae460, v0x17b1ad0 {0 0 0}; + %store/vec4a v0xfdff10, 4, 0; + %vpi_call 3 187 "$readmemb", P_0xfdc460, v0xfdfad0 {0 0 0}; %end; .thread T_6; - .scope S_0x17ae200; + .scope S_0xfdc200; T_7 ; - %wait E_0x1717d10; - %load/vec4 v0x17b1e30_0; + %wait E_0xf45d10; + %load/vec4 v0xfdfe30_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3018,7 +3018,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x17b2080_0; + %load/vec4 v0xfe0080_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3033,185 +3033,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x17aeaa0_0; + %load/vec4 v0xfdcaa0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x17b2160_0; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfe0160_0; + %load/vec4 v0xfdce70_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2610_0, 4, 5; - %load/vec4 v0x17aee70_0; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4/off/d v0xfe0610_0, 4, 5; + %load/vec4 v0xfdce70_0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; - %load/vec4 v0x17aee70_0; - %assign/vec4 v0x17b26b0_0, 0; + %assign/vec4 v0xfdfe30_0, 0; + %load/vec4 v0xfdce70_0; + %assign/vec4 v0xfe06b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; - %load/vec4 v0x17aee70_0; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; + %load/vec4 v0xfdce70_0; + %assign/vec4 v0xfdfb90_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x17b2160_0; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfe0160_0; + %load/vec4 v0xfdfb90_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; - %load/vec4 v0x17b1b90_0; - %assign/vec4 v0x17b26b0_0, 0; + %assign/vec4 v0xfdfe30_0, 0; + %load/vec4 v0xfdfb90_0; + %assign/vec4 v0xfe06b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x17aee70_0; + %load/vec4 v0xfdce70_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x17b1480_0; + %load/vec4 v0xfdf480_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3219,29 +3219,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; - %load/vec4 v0x17aee70_0; - %assign/vec4 v0x17b26b0_0, 0; + %assign/vec4 v0xfdfe30_0, 0; + %load/vec4 v0xfdce70_0; + %assign/vec4 v0xfe06b0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3249,10 +3249,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x17aeaa0_0; + %load/vec4 v0xfdcaa0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3319,180 +3319,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x17ae720_0; - %load/vec4 v0x17b2750_0; + %load/vec4 v0xfdc720_0; + %load/vec4 v0xfe0750_0; %add; - %assign/vec4 v0x17ae720_0, 0; - %load/vec4 v0x17aecb0_0; + %assign/vec4 v0xfdc720_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x17ae720_0; - %load/vec4 v0x17b2750_0; + %load/vec4 v0xfdc720_0; + %load/vec4 v0xfe0750_0; %sub; - %assign/vec4 v0x17ae720_0, 0; - %load/vec4 v0x17aecb0_0; + %assign/vec4 v0xfdc720_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdccb0_0; %pad/u 11; - %load/vec4 v0x17b2750_0; + %load/vec4 v0xfe0750_0; %add; %pad/u 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x17b2750_0; - %assign/vec4 v0x17b31e0_0, 0; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfe0750_0; + %assign/vec4 v0xfe11e0_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x17ae9c0_0; - %assign/vec4 v0x17b31e0_0, 0; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdc9c0_0; + %assign/vec4 v0xfe11e0_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x17ae720_0; - %load/vec4 v0x17ae9c0_0; + %load/vec4 v0xfdc720_0; + %load/vec4 v0xfdc9c0_0; %add; - %assign/vec4 v0x17ae720_0, 0; - %load/vec4 v0x17aecb0_0; + %assign/vec4 v0xfdc720_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x17ae720_0; - %load/vec4 v0x17ae9c0_0; + %load/vec4 v0xfdc720_0; + %load/vec4 v0xfdc9c0_0; %sub; - %assign/vec4 v0x17ae720_0, 0; - %load/vec4 v0x17aecb0_0; + %assign/vec4 v0xfdc720_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdccb0_0; %pad/u 11; - %load/vec4 v0x17ae9c0_0; + %load/vec4 v0xfdc9c0_0; %add; %pad/u 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x17ae820_0; - %assign/vec4 v0x17ae720_0, 0; - %load/vec4 v0x17ae720_0; - %assign/vec4 v0x17ae820_0, 0; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdc820_0; + %assign/vec4 v0xfdc720_0, 0; + %load/vec4 v0xfdc720_0; + %assign/vec4 v0xfdc820_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x17ae720_0; - %assign/vec4 v0x17ae820_0, 0; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdc720_0; + %assign/vec4 v0xfdc820_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x17ae720_0; + %load/vec4 v0xfdc720_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x17ae720_0, 0; - %load/vec4 v0x17aecb0_0; + %assign/vec4 v0xfdc720_0, 0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x17aebd0_0; - %assign/vec4 v0x17aed90_0, 0; + %load/vec4 v0xfdcbd0_0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x17ae720_0; + %load/vec4 v0xfdc720_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x17aebd0_0; - %assign/vec4 v0x17aed90_0, 0; + %load/vec4 v0xfdcbd0_0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x17ae720_0; + %load/vec4 v0xfdc720_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x17aebd0_0; - %assign/vec4 v0x17aed90_0, 0; + %load/vec4 v0xfdcbd0_0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x17ae720_0; + %load/vec4 v0xfdc720_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x17aebd0_0; - %assign/vec4 v0x17aed90_0, 0; + %load/vec4 v0xfdcbd0_0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x17ae720_0; + %load/vec4 v0xfdc720_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x17aebd0_0; - %assign/vec4 v0x17aed90_0, 0; + %load/vec4 v0xfdcbd0_0; + %assign/vec4 v0xfdcd90_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x17aecb0_0; + %load/vec4 v0xfdccb0_0; %addi 1, 0, 4; - %assign/vec4 v0x17aed90_0, 0; + %assign/vec4 v0xfdcd90_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x17aeaa0_0; + %load/vec4 v0xfdcaa0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x17aeaa0_0; + %load/vec4 v0xfdcaa0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x17ae900_0; + %load/vec4 v0xfdc900_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x17ae900_0; + %load/vec4 v0xfdc900_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3500,162 +3500,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x17ae900_0; + %load/vec4 v0xfdc900_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x17b31e0_0; - %assign/vec4 v0x17ae720_0, 0; + %load/vec4 v0xfe11e0_0; + %assign/vec4 v0xfdc720_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; - %load/vec4 v0x17ae900_0; + %assign/vec4 v0xfdfe30_0, 0; + %load/vec4 v0xfdc900_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x17b1b90_0; - %assign/vec4 v0x17b3100_0, 0; - %load/vec4 v0x17b31e0_0; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; + %assign/vec4 v0xfe1100_0, 0; + %load/vec4 v0xfe11e0_0; + %load/vec4 v0xfdfb90_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17b1b90_0; + %load/vec4 v0xfdfb90_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x17ae900_0; + %load/vec4 v0xfdc900_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x17ae900_0; - %assign/vec4 v0x17b3100_0, 0; - %load/vec4 v0x17b31e0_0; - %load/vec4 v0x17ae900_0; + %load/vec4 v0xfdc900_0; + %assign/vec4 v0xfe1100_0, 0; + %load/vec4 v0xfe11e0_0; + %load/vec4 v0xfdc900_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17ae900_0; + %load/vec4 v0xfdc900_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17ae900_0; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfdc900_0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x17b1600_0; + %load/vec4 v0xfdf600_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x17ae900_0; - %assign/vec4 v0x17b3100_0, 0; + %load/vec4 v0xfdc900_0; + %assign/vec4 v0xfe1100_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x17b2080_0; + %load/vec4 v0xfe0080_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3670,82 +3670,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x17b26b0_0; + %load/vec4 v0xfe06b0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x17b1480_0; + %load/vec4 v0xfdf480_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; + %assign/vec4 v0xfdfe30_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17b2e60_0, 0, 4; - %load/vec4 v0x17b2160_0; + %store/vec4 v0xfe0e60_0, 0, 4; + %load/vec4 v0xfe0160_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x17b2160_0; + %load/vec4 v0xfe0160_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3753,54 +3753,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x17b2160_0; - %load/vec4 v0x17b26b0_0; + %load/vec4 v0xfe0160_0; + %load/vec4 v0xfe06b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; - %load/vec4 v0x17b26b0_0; + %assign/vec4 v0xfdfe30_0, 0; + %load/vec4 v0xfe06b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17b27f0, 4; - %assign/vec4 v0x17b2750_0, 0; + %load/vec4a v0xfe07f0, 4; + %assign/vec4 v0xfe0750_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17b26b0_0; + %load/vec4 v0xfe06b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2610_0, 4, 5; + %assign/vec4/off/d v0xfe0610_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17b26b0_0; + %load/vec4 v0xfe06b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17b2e60_0, 4, 5; - %load/vec4 v0x17b26b0_0; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4/off/d v0xfe0e60_0, 4, 5; + %load/vec4 v0xfe06b0_0; + %assign/vec4 v0xfdfb90_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x17b2080_0; + %load/vec4 v0xfe0080_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3816,93 +3816,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x17b3100_0; + %load/vec4 v0xfe1100_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x17b1600_0; + %load/vec4 v0xfdf600_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x17b0530_0; + %load/vec4 v0xfde530_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17b3100_0, 0; + %assign/vec4 v0xfe1100_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17b2d80_0, 4, 5; - %load/vec4 v0x17b31e0_0; + %assign/vec4/off/d v0xfe0d80_0, 4, 5; + %load/vec4 v0xfe11e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17b1f10, 0, 4; + %assign/vec4/a/d v0xfdff10, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfb90_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3910,33 +3910,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x17b3100_0; + %load/vec4 v0xfe1100_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x17b2f40_0; - %load/vec4 v0x17b3100_0; + %load/vec4 v0xfe0f40_0; + %load/vec4 v0xfe1100_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x17b3100_0; + %load/vec4 v0xfe1100_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x17b2d80_0, 4, 1; + %store/vec4 v0xfe0d80_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17b1e30_0, 0; - %load/vec4 v0x17b3100_0; - %assign/vec4 v0x17b1b90_0, 0; + %assign/vec4 v0xfdfe30_0, 0; + %load/vec4 v0xfe1100_0; + %assign/vec4 v0xfdfb90_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17b2080_0, 0; + %assign/vec4 v0xfe0080_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3945,19 +3945,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x17ae200; + .scope S_0xfdc200; T_8 ; - %wait E_0x16f55d0; - %load/vec4 v0x17b2080_0; + %wait E_0xf235d0; + %load/vec4 v0xfe0080_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17b1e30_0; + %load/vec4 v0xfdfe30_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x17aed90_0; + %load/vec4 v0xfdcd90_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3966,62 +3966,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x17aed90_0; - %assign/vec4 v0x17aecb0_0, 0; + %load/vec4 v0xfdcd90_0; + %assign/vec4 v0xfdccb0_0, 0; T_8.0 ; - %load/vec4 v0x17b2080_0; + %load/vec4 v0xfe0080_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17b2610_0, 0, 4; + %store/vec4 v0xfe0610_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x179ec30; + .scope S_0xfccc30; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17a2840_0, 0, 3; + %store/vec4 v0xfd0840_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17a2a60_0, 0, 3; + %store/vec4 v0xfd0a60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x17a25a0_0, 0, 3; + %store/vec4 v0xfd05a0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x179f1b0_0, 0, 11; + %store/vec4 v0xfcd1b0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x179f2b0_0, 0, 11; + %store/vec4 v0xfcd2b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179f6f0_0, 0, 4; + %store/vec4 v0xfcd6f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a2ff0_0, 0, 4; + %store/vec4 v0xfd0ff0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a3820_0, 0, 4; + %store/vec4 v0xfd1820_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a39e0_0, 0, 4; + %store/vec4 v0xfd19e0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a3760_0, 0, 4; + %store/vec4 v0xfd1760_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a2920, 4, 0; + %store/vec4a v0xfd0920, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a2920, 4, 0; + %store/vec4a v0xfd0920, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a2920, 4, 0; + %store/vec4a v0xfd0920, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x17a2920, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x179ee60, v0x17a24e0 {0 0 0}; + %store/vec4a v0xfd0920, 4, 0; + %vpi_call 3 187 "$readmemb", P_0xfcce60, v0xfd04e0 {0 0 0}; %end; .thread T_9; - .scope S_0x179ec30; + .scope S_0xfccc30; T_10 ; - %wait E_0x1717d10; - %load/vec4 v0x17a2840_0; + %wait E_0xf45d10; + %load/vec4 v0xfd0840_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4036,7 +4036,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x17a2a60_0; + %load/vec4 v0xfd0a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4051,185 +4051,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x179f530_0; + %load/vec4 v0xfcd530_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x17a2b40_0; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfd0b40_0; + %load/vec4 v0xfcd8b0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; - %load/vec4 v0x179f8b0_0; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; + %load/vec4 v0xfcd8b0_0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a2840_0, 0; - %load/vec4 v0x179f8b0_0; - %assign/vec4 v0x17a3090_0, 0; + %assign/vec4 v0xfd0840_0, 0; + %load/vec4 v0xfcd8b0_0; + %assign/vec4 v0xfd1090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a3820_0, 4, 5; - %load/vec4 v0x179f8b0_0; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4/off/d v0xfd1820_0, 4, 5; + %load/vec4 v0xfcd8b0_0; + %assign/vec4 v0xfd05a0_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x17a2b40_0; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd0b40_0; + %load/vec4 v0xfd05a0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a2840_0, 0; - %load/vec4 v0x17a25a0_0; - %assign/vec4 v0x17a3090_0, 0; + %assign/vec4 v0xfd0840_0, 0; + %load/vec4 v0xfd05a0_0; + %assign/vec4 v0xfd1090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a3820_0, 4, 5; + %assign/vec4/off/d v0xfd1820_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x179f8b0_0; + %load/vec4 v0xfcd8b0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x17a1ec0_0; + %load/vec4 v0xfcfec0_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4237,29 +4237,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a2840_0, 0; - %load/vec4 v0x179f8b0_0; - %assign/vec4 v0x17a3090_0, 0; + %assign/vec4 v0xfd0840_0, 0; + %load/vec4 v0xfcd8b0_0; + %assign/vec4 v0xfd1090_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3820_0, 4, 5; + %assign/vec4/off/d v0xfd1820_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3820_0, 4, 5; + %assign/vec4/off/d v0xfd1820_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3820_0, 4, 5; + %assign/vec4/off/d v0xfd1820_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3820_0, 4, 5; + %assign/vec4/off/d v0xfd1820_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4267,10 +4267,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x179f530_0; + %load/vec4 v0xfcd530_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4337,180 +4337,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x179f1b0_0; - %load/vec4 v0x17a3130_0; + %load/vec4 v0xfcd1b0_0; + %load/vec4 v0xfd1130_0; %add; - %assign/vec4 v0x179f1b0_0, 0; - %load/vec4 v0x179f6f0_0; + %assign/vec4 v0xfcd1b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x179f1b0_0; - %load/vec4 v0x17a3130_0; + %load/vec4 v0xfcd1b0_0; + %load/vec4 v0xfd1130_0; %sub; - %assign/vec4 v0x179f1b0_0, 0; - %load/vec4 v0x179f6f0_0; + %assign/vec4 v0xfcd1b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd6f0_0; %pad/u 11; - %load/vec4 v0x17a3130_0; + %load/vec4 v0xfd1130_0; %add; %pad/u 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x17a3130_0; - %assign/vec4 v0x17a3ba0_0, 0; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfd1130_0; + %assign/vec4 v0xfd1ba0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x179f450_0; - %assign/vec4 v0x17a3ba0_0, 0; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd450_0; + %assign/vec4 v0xfd1ba0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x179f1b0_0; - %load/vec4 v0x179f450_0; + %load/vec4 v0xfcd1b0_0; + %load/vec4 v0xfcd450_0; %add; - %assign/vec4 v0x179f1b0_0, 0; - %load/vec4 v0x179f6f0_0; + %assign/vec4 v0xfcd1b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x179f1b0_0; - %load/vec4 v0x179f450_0; + %load/vec4 v0xfcd1b0_0; + %load/vec4 v0xfcd450_0; %sub; - %assign/vec4 v0x179f1b0_0, 0; - %load/vec4 v0x179f6f0_0; + %assign/vec4 v0xfcd1b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd6f0_0; %pad/u 11; - %load/vec4 v0x179f450_0; + %load/vec4 v0xfcd450_0; %add; %pad/u 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x179f2b0_0; - %assign/vec4 v0x179f1b0_0, 0; - %load/vec4 v0x179f1b0_0; - %assign/vec4 v0x179f2b0_0, 0; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd2b0_0; + %assign/vec4 v0xfcd1b0_0, 0; + %load/vec4 v0xfcd1b0_0; + %assign/vec4 v0xfcd2b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x179f1b0_0; - %assign/vec4 v0x179f2b0_0, 0; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd1b0_0; + %assign/vec4 v0xfcd2b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x179f1b0_0; + %load/vec4 v0xfcd1b0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x179f1b0_0, 0; - %load/vec4 v0x179f6f0_0; + %assign/vec4 v0xfcd1b0_0, 0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x179f610_0; - %assign/vec4 v0x179f7d0_0, 0; + %load/vec4 v0xfcd610_0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x179f1b0_0; + %load/vec4 v0xfcd1b0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x179f610_0; - %assign/vec4 v0x179f7d0_0, 0; + %load/vec4 v0xfcd610_0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x179f1b0_0; + %load/vec4 v0xfcd1b0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x179f610_0; - %assign/vec4 v0x179f7d0_0, 0; + %load/vec4 v0xfcd610_0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x179f1b0_0; + %load/vec4 v0xfcd1b0_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x179f610_0; - %assign/vec4 v0x179f7d0_0, 0; + %load/vec4 v0xfcd610_0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x179f1b0_0; + %load/vec4 v0xfcd1b0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x179f610_0; - %assign/vec4 v0x179f7d0_0, 0; + %load/vec4 v0xfcd610_0; + %assign/vec4 v0xfcd7d0_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x179f6f0_0; + %load/vec4 v0xfcd6f0_0; %addi 1, 0, 4; - %assign/vec4 v0x179f7d0_0, 0; + %assign/vec4 v0xfcd7d0_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x179f530_0; + %load/vec4 v0xfcd530_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x179f530_0; + %load/vec4 v0xfcd530_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x179f390_0; + %load/vec4 v0xfcd390_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x179f390_0; + %load/vec4 v0xfcd390_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4518,162 +4518,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x179f390_0; + %load/vec4 v0xfcd390_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x17a3ba0_0; - %assign/vec4 v0x179f1b0_0, 0; + %load/vec4 v0xfd1ba0_0; + %assign/vec4 v0xfcd1b0_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a2840_0, 0; - %load/vec4 v0x179f390_0; + %assign/vec4 v0xfd0840_0, 0; + %load/vec4 v0xfcd390_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x17a25a0_0; - %assign/vec4 v0x17a3ac0_0, 0; - %load/vec4 v0x17a3ba0_0; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; + %assign/vec4 v0xfd1ac0_0, 0; + %load/vec4 v0xfd1ba0_0; + %load/vec4 v0xfd05a0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a25a0_0; + %load/vec4 v0xfd05a0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a3760_0, 4, 5; + %assign/vec4/off/d v0xfd1760_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x179f390_0; + %load/vec4 v0xfcd390_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x179f390_0; - %assign/vec4 v0x17a3ac0_0, 0; - %load/vec4 v0x17a3ba0_0; - %load/vec4 v0x179f390_0; + %load/vec4 v0xfcd390_0; + %assign/vec4 v0xfd1ac0_0, 0; + %load/vec4 v0xfd1ba0_0; + %load/vec4 v0xfcd390_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179f390_0; + %load/vec4 v0xfcd390_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x179f390_0; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfcd390_0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x17a2040_0; + %load/vec4 v0xfd0040_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x179f390_0; - %assign/vec4 v0x17a3ac0_0, 0; + %load/vec4 v0xfcd390_0; + %assign/vec4 v0xfd1ac0_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x17a2a60_0; + %load/vec4 v0xfd0a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4688,82 +4688,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x17a3090_0; + %load/vec4 v0xfd1090_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x17a1ec0_0; + %load/vec4 v0xfcfec0_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a2840_0, 0; + %assign/vec4 v0xfd0840_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a3820_0, 0, 4; - %load/vec4 v0x17a2b40_0; + %store/vec4 v0xfd1820_0, 0, 4; + %load/vec4 v0xfd0b40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x17a2b40_0; + %load/vec4 v0xfd0b40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4771,54 +4771,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x17a2b40_0; - %load/vec4 v0x17a3090_0; + %load/vec4 v0xfd0b40_0; + %load/vec4 v0xfd1090_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a2840_0, 0; - %load/vec4 v0x17a3090_0; + %assign/vec4 v0xfd0840_0, 0; + %load/vec4 v0xfd1090_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x17a31d0, 4; - %assign/vec4 v0x17a3130_0, 0; + %load/vec4a v0xfd11d0, 4; + %assign/vec4 v0xfd1130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a3090_0; + %load/vec4 v0xfd1090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a2ff0_0, 4, 5; + %assign/vec4/off/d v0xfd0ff0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x17a3090_0; + %load/vec4 v0xfd1090_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x17a3820_0, 4, 5; - %load/vec4 v0x17a3090_0; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4/off/d v0xfd1820_0, 4, 5; + %load/vec4 v0xfd1090_0; + %assign/vec4 v0xfd05a0_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x17a2a60_0; + %load/vec4 v0xfd0a60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4834,93 +4834,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x17a3ac0_0; + %load/vec4 v0xfd1ac0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x17a2040_0; + %load/vec4 v0xfd0040_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x17a0f70_0; + %load/vec4 v0xfcef70_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a3ac0_0, 0; + %assign/vec4 v0xfd1ac0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x17a3760_0, 4, 5; - %load/vec4 v0x17a3ba0_0; + %assign/vec4/off/d v0xfd1760_0, 4, 5; + %load/vec4 v0xfd1ba0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x17a2920, 0, 4; + %assign/vec4/a/d v0xfd0920, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd05a0_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4928,33 +4928,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x17a3ac0_0; + %load/vec4 v0xfd1ac0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x17a3900_0; - %load/vec4 v0x17a3ac0_0; + %load/vec4 v0xfd1900_0; + %load/vec4 v0xfd1ac0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x17a3ac0_0; + %load/vec4 v0xfd1ac0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x17a3760_0, 4, 1; + %store/vec4 v0xfd1760_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a2840_0, 0; - %load/vec4 v0x17a3ac0_0; - %assign/vec4 v0x17a25a0_0, 0; + %assign/vec4 v0xfd0840_0, 0; + %load/vec4 v0xfd1ac0_0; + %assign/vec4 v0xfd05a0_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x17a2a60_0, 0; + %assign/vec4 v0xfd0a60_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4963,19 +4963,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x179ec30; + .scope S_0xfccc30; T_11 ; - %wait E_0x16f55d0; - %load/vec4 v0x17a2a60_0; + %wait E_0xf235d0; + %load/vec4 v0xfd0a60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x17a2840_0; + %load/vec4 v0xfd0840_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x179f7d0_0; + %load/vec4 v0xfcd7d0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4984,62 +4984,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x179f7d0_0; - %assign/vec4 v0x179f6f0_0, 0; + %load/vec4 v0xfcd7d0_0; + %assign/vec4 v0xfcd6f0_0, 0; T_11.0 ; - %load/vec4 v0x17a2a60_0; + %load/vec4 v0xfd0a60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x17a2ff0_0, 0, 4; + %store/vec4 v0xfd0ff0_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x17447f0; + .scope S_0xf727f0; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x179d5b0_0, 0, 3; + %store/vec4 v0xfcb5b0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x179d7d0_0, 0, 3; + %store/vec4 v0xfcb7d0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x179d310_0, 0, 3; + %store/vec4 v0xfcb310_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x175a400_0, 0, 11; + %store/vec4 v0xf88400_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1799f60_0, 0, 11; + %store/vec4 v0xfc7f60_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179a420_0, 0, 4; + %store/vec4 v0xfc8420_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179dd60_0, 0, 4; + %store/vec4 v0xfcbd60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179e630_0, 0, 4; + %store/vec4 v0xfcc630_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179e7f0_0, 0, 4; + %store/vec4 v0xfcc7f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179e550_0, 0, 4; + %store/vec4 v0xfcc550_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x179d690, 4, 0; + %store/vec4a v0xfcb690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x179d690, 4, 0; + %store/vec4a v0xfcb690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x179d690, 4, 0; + %store/vec4a v0xfcb690, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x179d690, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1701600, v0x179d250 {0 0 0}; + %store/vec4a v0xfcb690, 4, 0; + %vpi_call 3 187 "$readmemb", P_0xf2f600, v0xfcb250 {0 0 0}; %end; .thread T_12; - .scope S_0x17447f0; + .scope S_0xf727f0; T_13 ; - %wait E_0x1717d10; - %load/vec4 v0x179d5b0_0; + %wait E_0xf45d10; + %load/vec4 v0xfcb5b0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5054,7 +5054,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x179d7d0_0; + %load/vec4 v0xfcb7d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5069,185 +5069,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x179a210_0; + %load/vec4 v0xfc8210_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x179d8b0_0; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfcb8b0_0; + %load/vec4 v0xfc85e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179dd60_0, 4, 5; - %load/vec4 v0x179a5e0_0; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; + %load/vec4 v0xfc85e0_0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; - %load/vec4 v0x179a5e0_0; - %assign/vec4 v0x179de00_0, 0; + %assign/vec4 v0xfcb5b0_0, 0; + %load/vec4 v0xfc85e0_0; + %assign/vec4 v0xfcbe00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179e630_0, 4, 5; - %load/vec4 v0x179a5e0_0; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4/off/d v0xfcc630_0, 4, 5; + %load/vec4 v0xfc85e0_0; + %assign/vec4 v0xfcb310_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x179d8b0_0; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb8b0_0; + %load/vec4 v0xfcb310_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; - %load/vec4 v0x179d310_0; - %assign/vec4 v0x179de00_0, 0; + %assign/vec4 v0xfcb5b0_0, 0; + %load/vec4 v0xfcb310_0; + %assign/vec4 v0xfcbe00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179e630_0, 4, 5; + %assign/vec4/off/d v0xfcc630_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x179a5e0_0; + %load/vec4 v0xfc85e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x179cbf0_0; + %load/vec4 v0xfcabf0_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5255,29 +5255,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; - %load/vec4 v0x179a5e0_0; - %assign/vec4 v0x179de00_0, 0; + %assign/vec4 v0xfcb5b0_0, 0; + %load/vec4 v0xfc85e0_0; + %assign/vec4 v0xfcbe00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e630_0, 4, 5; + %assign/vec4/off/d v0xfcc630_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e630_0, 4, 5; + %assign/vec4/off/d v0xfcc630_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e630_0, 4, 5; + %assign/vec4/off/d v0xfcc630_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e630_0, 4, 5; + %assign/vec4/off/d v0xfcc630_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5285,10 +5285,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x179a210_0; + %load/vec4 v0xfc8210_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5355,180 +5355,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x175a400_0; - %load/vec4 v0x179dee0_0; + %load/vec4 v0xf88400_0; + %load/vec4 v0xfcbee0_0; %add; - %assign/vec4 v0x175a400_0, 0; - %load/vec4 v0x179a420_0; + %assign/vec4 v0xf88400_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x175a400_0; - %load/vec4 v0x179dee0_0; + %load/vec4 v0xf88400_0; + %load/vec4 v0xfcbee0_0; %sub; - %assign/vec4 v0x175a400_0, 0; - %load/vec4 v0x179a420_0; + %assign/vec4 v0xf88400_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8420_0; %pad/u 11; - %load/vec4 v0x179dee0_0; + %load/vec4 v0xfcbee0_0; %add; %pad/u 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x179dee0_0; - %assign/vec4 v0x179e9b0_0, 0; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfcbee0_0; + %assign/vec4 v0xfcc9b0_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x179a130_0; - %assign/vec4 v0x179e9b0_0, 0; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8130_0; + %assign/vec4 v0xfcc9b0_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x175a400_0; - %load/vec4 v0x179a130_0; + %load/vec4 v0xf88400_0; + %load/vec4 v0xfc8130_0; %add; - %assign/vec4 v0x175a400_0, 0; - %load/vec4 v0x179a420_0; + %assign/vec4 v0xf88400_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x175a400_0; - %load/vec4 v0x179a130_0; + %load/vec4 v0xf88400_0; + %load/vec4 v0xfc8130_0; %sub; - %assign/vec4 v0x175a400_0, 0; - %load/vec4 v0x179a420_0; + %assign/vec4 v0xf88400_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8420_0; %pad/u 11; - %load/vec4 v0x179a130_0; + %load/vec4 v0xfc8130_0; %add; %pad/u 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x1799f60_0; - %assign/vec4 v0x175a400_0, 0; - %load/vec4 v0x175a400_0; - %assign/vec4 v0x1799f60_0, 0; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc7f60_0; + %assign/vec4 v0xf88400_0, 0; + %load/vec4 v0xf88400_0; + %assign/vec4 v0xfc7f60_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x175a400_0; - %assign/vec4 v0x1799f60_0, 0; - %load/vec4 v0x179a420_0; + %load/vec4 v0xf88400_0; + %assign/vec4 v0xfc7f60_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x175a400_0; + %load/vec4 v0xf88400_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x175a400_0, 0; - %load/vec4 v0x179a420_0; + %assign/vec4 v0xf88400_0, 0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x179a340_0; - %assign/vec4 v0x179a500_0, 0; + %load/vec4 v0xfc8340_0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x175a400_0; + %load/vec4 v0xf88400_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x179a340_0; - %assign/vec4 v0x179a500_0, 0; + %load/vec4 v0xfc8340_0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x175a400_0; + %load/vec4 v0xf88400_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x179a340_0; - %assign/vec4 v0x179a500_0, 0; + %load/vec4 v0xfc8340_0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x175a400_0; + %load/vec4 v0xf88400_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x179a340_0; - %assign/vec4 v0x179a500_0, 0; + %load/vec4 v0xfc8340_0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x175a400_0; + %load/vec4 v0xf88400_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x179a340_0; - %assign/vec4 v0x179a500_0, 0; + %load/vec4 v0xfc8340_0; + %assign/vec4 v0xfc8500_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x179a420_0; + %load/vec4 v0xfc8420_0; %addi 1, 0, 4; - %assign/vec4 v0x179a500_0, 0; + %assign/vec4 v0xfc8500_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x179a210_0; + %load/vec4 v0xfc8210_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x179a210_0; + %load/vec4 v0xfc8210_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x179a040_0; + %load/vec4 v0xfc8040_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x179a040_0; + %load/vec4 v0xfc8040_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5536,162 +5536,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x179a040_0; + %load/vec4 v0xfc8040_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x179e9b0_0; - %assign/vec4 v0x175a400_0, 0; + %load/vec4 v0xfcc9b0_0; + %assign/vec4 v0xf88400_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; - %load/vec4 v0x179a040_0; + %assign/vec4 v0xfcb5b0_0, 0; + %load/vec4 v0xfc8040_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x179d310_0; - %assign/vec4 v0x179e8d0_0, 0; - %load/vec4 v0x179e9b0_0; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; + %assign/vec4 v0xfcc8d0_0, 0; + %load/vec4 v0xfcc9b0_0; + %load/vec4 v0xfcb310_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179d310_0; + %load/vec4 v0xfcb310_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179e550_0, 4, 5; + %assign/vec4/off/d v0xfcc550_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x179a040_0; + %load/vec4 v0xfc8040_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x179a040_0; - %assign/vec4 v0x179e8d0_0, 0; - %load/vec4 v0x179e9b0_0; - %load/vec4 v0x179a040_0; + %load/vec4 v0xfc8040_0; + %assign/vec4 v0xfcc8d0_0, 0; + %load/vec4 v0xfcc9b0_0; + %load/vec4 v0xfc8040_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179a040_0; + %load/vec4 v0xfc8040_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179a040_0; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfc8040_0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x179cd70_0; + %load/vec4 v0xfcad70_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x179a040_0; - %assign/vec4 v0x179e8d0_0, 0; + %load/vec4 v0xfc8040_0; + %assign/vec4 v0xfcc8d0_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x179d7d0_0; + %load/vec4 v0xfcb7d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5706,82 +5706,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x179de00_0; + %load/vec4 v0xfcbe00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x179cbf0_0; + %load/vec4 v0xfcabf0_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; + %assign/vec4 v0xfcb5b0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179e630_0, 0, 4; - %load/vec4 v0x179d8b0_0; + %store/vec4 v0xfcc630_0, 0, 4; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x179d8b0_0; + %load/vec4 v0xfcb8b0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5789,54 +5789,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x179d8b0_0; - %load/vec4 v0x179de00_0; + %load/vec4 v0xfcb8b0_0; + %load/vec4 v0xfcbe00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; - %load/vec4 v0x179de00_0; + %assign/vec4 v0xfcb5b0_0, 0; + %load/vec4 v0xfcbe00_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x179dfc0, 4; - %assign/vec4 v0x179dee0_0, 0; + %load/vec4a v0xfcbfc0, 4; + %assign/vec4 v0xfcbee0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179de00_0; + %load/vec4 v0xfcbe00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179dd60_0, 4, 5; + %assign/vec4/off/d v0xfcbd60_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x179de00_0; + %load/vec4 v0xfcbe00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x179e630_0, 4, 5; - %load/vec4 v0x179de00_0; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4/off/d v0xfcc630_0, 4, 5; + %load/vec4 v0xfcbe00_0; + %assign/vec4 v0xfcb310_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x179d7d0_0; + %load/vec4 v0xfcb7d0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5852,93 +5852,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x179e8d0_0; + %load/vec4 v0xfcc8d0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x179cd70_0; + %load/vec4 v0xfcad70_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x179bca0_0; + %load/vec4 v0xfc9ca0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x179e8d0_0, 0; + %assign/vec4 v0xfcc8d0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x179e550_0, 4, 5; - %load/vec4 v0x179e9b0_0; + %assign/vec4/off/d v0xfcc550_0, 4, 5; + %load/vec4 v0xfcc9b0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x179d690, 0, 4; + %assign/vec4/a/d v0xfcb690, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb310_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5946,33 +5946,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x179e8d0_0; + %load/vec4 v0xfcc8d0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x179e710_0; - %load/vec4 v0x179e8d0_0; + %load/vec4 v0xfcc710_0; + %load/vec4 v0xfcc8d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x179e8d0_0; + %load/vec4 v0xfcc8d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x179e550_0, 4, 1; + %store/vec4 v0xfcc550_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x179d5b0_0, 0; - %load/vec4 v0x179e8d0_0; - %assign/vec4 v0x179d310_0, 0; + %assign/vec4 v0xfcb5b0_0, 0; + %load/vec4 v0xfcc8d0_0; + %assign/vec4 v0xfcb310_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x179d7d0_0, 0; + %assign/vec4 v0xfcb7d0_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5981,19 +5981,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x17447f0; + .scope S_0xf727f0; T_14 ; - %wait E_0x16f55d0; - %load/vec4 v0x179d7d0_0; + %wait E_0xf235d0; + %load/vec4 v0xfcb7d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x179d5b0_0; + %load/vec4 v0xfcb5b0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x179a500_0; + %load/vec4 v0xfc8500_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -6002,93 +6002,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x179a500_0; - %assign/vec4 v0x179a420_0, 0; + %load/vec4 v0xfc8500_0; + %assign/vec4 v0xfc8420_0, 0; T_14.0 ; - %load/vec4 v0x179d7d0_0; + %load/vec4 v0xfcb7d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x179dd60_0, 0, 4; + %store/vec4 v0xfcbd60_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x16e4740; + .scope S_0xf12740; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x17b4240_0, 0, 33; + %store/vec4 v0xfe2240_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x17b41a0_0, 0, 1; + %store/vec4 v0xfe21a0_0, 0, 1; %pushi/vec4 0, 0, 33; - %store/vec4 v0x17b4240_0, 0, 33; + %store/vec4 v0xfe2240_0, 0, 33; T_15.0 ; - %load/vec4 v0x17b4240_0; + %load/vec4 v0xfe2240_0; %cmpi/u 10, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b4100_0, 0, 1; + %store/vec4 v0xfe2100_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x17b4100_0, 0, 1; + %store/vec4 v0xfe2100_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b4100_0, 0, 1; + %store/vec4 v0xfe2100_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x17b4100_0, 0, 1; + %store/vec4 v0xfe2100_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b4100_0, 0, 1; + %store/vec4 v0xfe2100_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x17b4100_0, 0, 1; + %store/vec4 v0xfe2100_0, 0, 1; %delay 1, 0; - %load/vec4 v0x17b4240_0; + %load/vec4 v0xfe2240_0; %addi 1, 0, 33; - %store/vec4 v0x17b4240_0, 0, 33; + %store/vec4 v0xfe2240_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x17b4060_0; + %load/vec4 v0xfe2060_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.2, 4; - %vpi_call 2 51 "$display", "Failed on up test of jumpTest, %d", v0x17b4060_0 {0 0 0}; + %vpi_call 2 51 "$display", "Failed on up test of jumpTest, %d", v0xfe2060_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b41a0_0, 0, 1; + %store/vec4 v0xfe21a0_0, 0, 1; T_15.2 ; - %load/vec4 v0x17b3f20_0; + %load/vec4 v0xfe1f20_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.4, 4; - %vpi_call 2 55 "$display", "Failed on left test of jumpTest, %d", v0x17b3f20_0 {0 0 0}; + %vpi_call 2 55 "$display", "Failed on left test of jumpTest, %d", v0xfe1f20_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b41a0_0, 0, 1; + %store/vec4 v0xfe21a0_0, 0, 1; T_15.4 ; - %load/vec4 v0x17b3fc0_0; + %load/vec4 v0xfe1fc0_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.6, 4; - %vpi_call 2 59 "$display", "Failed on right test of jumpTest, %d", v0x17b3fc0_0 {0 0 0}; + %vpi_call 2 59 "$display", "Failed on right test of jumpTest, %d", v0xfe1fc0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b41a0_0, 0, 1; + %store/vec4 v0xfe21a0_0, 0, 1; T_15.6 ; - %load/vec4 v0x17b3e80_0; + %load/vec4 v0xfe1e80_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.8, 4; - %vpi_call 2 63 "$display", "Failed on down test of jumpTest, %d", v0x17b3e80_0 {0 0 0}; + %vpi_call 2 63 "$display", "Failed on down test of jumpTest, %d", v0xfe1e80_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b41a0_0, 0, 1; + %store/vec4 v0xfe21a0_0, 0, 1; T_15.8 ; - %load/vec4 v0x17b3d30_0; + %load/vec4 v0xfe1d30_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.10, 4; - %vpi_call 2 67 "$display", "Failed on center test of jumpTest, %d", v0x17b3d30_0 {0 0 0}; + %vpi_call 2 67 "$display", "Failed on center test of jumpTest, %d", v0xfe1d30_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x17b41a0_0, 0, 1; + %store/vec4 v0xfe21a0_0, 0, 1; T_15.10 ; - %load/vec4 v0x17b41a0_0; + %load/vec4 v0xfe21a0_0; %flag_set/vec4 8; %jmp/0xz T_15.12, 8; %vpi_call 2 71 "$display", "DUT passed jumpTest" {0 0 0}; diff --git a/regTest/test b/regTest/test index 139cfaf..a91c058 100755 --- a/regTest/test +++ b/regTest/test @@ -6,25 +6,25 @@ :vpi_module "vhdl_sys"; :vpi_module "v2005_math"; :vpi_module "va_math"; -S_0x1a0c690 .scope module, "tis100Test" "tis100Test" 2 2; +S_0x25d8690 .scope module, "tis100Test" "tis100Test" 2 2; .timescale 0 0; -v0x1adb2a0_0 .net "C2D", 14 0, L_0x1affb80; 1 drivers -v0x1adb3d0_0 .net "C2L", 14 0, L_0x1aff8a0; 1 drivers -v0x1adb4e0_0 .net "C2R", 14 0, L_0x1b00270; 1 drivers -v0x1adb5d0_0 .net "C2U", 14 0, L_0x1aff5d0; 1 drivers -v0x1adb6e0_0 .net "D2C", 14 0, L_0x1afb3a0; 1 drivers -v0x1adb840_0 .net "L2C", 14 0, L_0x1aefbe0; 1 drivers -v0x1adb950_0 .net "R2C", 14 0, L_0x1af34b0; 1 drivers -v0x1adba60_0 .net "U2C", 14 0, L_0x1af77e0; 1 drivers -v0x1adbb70_0 .net/s "accOutCenter", 10 0, L_0x1afc1d0; 1 drivers -v0x1adbcc0_0 .net/s "accOutDown", 10 0, L_0x1af80e0; 1 drivers -v0x1adbd60_0 .net/s "accOutLeft", 10 0, L_0x1adc160; 1 drivers -v0x1adbe00_0 .net/s "accOutRight", 10 0, L_0x1aeff30; 1 drivers -v0x1adbea0_0 .net/s "accOutUp", 10 0, L_0x1af4030; 1 drivers -v0x1adbf40_0 .var "clk", 0 0; -v0x1adbfe0_0 .var "dutPassed", 0 0; -v0x1adc080_0 .var "i", 32 0; -S_0x1a35820 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x1a0c690; +v0x26a72a0_0 .net "C2D", 14 0, L_0x26cbb80; 1 drivers +v0x26a73d0_0 .net "C2L", 14 0, L_0x26cb8a0; 1 drivers +v0x26a74e0_0 .net "C2R", 14 0, L_0x26cc270; 1 drivers +v0x26a75d0_0 .net "C2U", 14 0, L_0x26cb5d0; 1 drivers +v0x26a76e0_0 .net "D2C", 14 0, L_0x26c73a0; 1 drivers +v0x26a7840_0 .net "L2C", 14 0, L_0x26bbbe0; 1 drivers +v0x26a7950_0 .net "R2C", 14 0, L_0x26bf4b0; 1 drivers +v0x26a7a60_0 .net "U2C", 14 0, L_0x26c37e0; 1 drivers +v0x26a7b70_0 .net/s "accOutCenter", 10 0, L_0x26c81d0; 1 drivers +v0x26a7cc0_0 .net/s "accOutDown", 10 0, L_0x26c40e0; 1 drivers +v0x26a7d60_0 .net/s "accOutLeft", 10 0, L_0x26a8160; 1 drivers +v0x26a7e00_0 .net/s "accOutRight", 10 0, L_0x26bbf30; 1 drivers +v0x26a7ea0_0 .net/s "accOutUp", 10 0, L_0x26c0030; 1 drivers +v0x26a7f40_0 .var "clk", 0 0; +v0x26a7fe0_0 .var "dutPassed", 0 0; +v0x26a8080_0 .var "i", 32 0; +S_0x2601820 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x25d8690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -36,174 +36,174 @@ S_0x1a35820 .scope module, "center" "tis100" 2 31, 3 49 0, S_0x1a0c690; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1a29510 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1a29550 .param/str "memFile" 0 3 60, "regTest/center.dat"; -L_0x1afc1d0 .functor BUFZ 11, v0x1a82310_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1afc460 .functor BUFZ 11, v0x1a82310_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1afd260 .functor BUFZ 18, L_0x1aff3e0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1a82310_0 .var/s "ACC", 10 0; -v0x1ac1d90_0 .var/s "BAK", 10 0; -v0x1ac1e70_0 .net "DST", 2 0, L_0x1b00700; 1 drivers -v0x1ac1f60_0 .net/s "IMM", 10 0, L_0x1b007a0; 1 drivers -v0x1ac2040_0 .net "INST", 3 0, L_0x1affee0; 1 drivers -v0x1ac2170_0 .net "LABEL", 3 0, L_0x1b00950; 1 drivers -v0x1ac2250_0 .var "PC", 3 0; -v0x1ac2330_0 .var "PCNEXT", 3 0; -v0x1ac2410_0 .net "SRC", 2 0, L_0x1b00510; 1 drivers -v0x1ac2580_0 .net *"_s103", 0 0, L_0x1afe720; 1 drivers -v0x1ac2660_0 .net *"_s107", 0 0, L_0x1afe630; 1 drivers -v0x1ac2740_0 .net *"_s111", 0 0, L_0x1afe910; 1 drivers -v0x1ac2820_0 .net *"_s115", 0 0, L_0x1afe810; 1 drivers -v0x1ac2900_0 .net *"_s119", 0 0, L_0x1afeb50; 1 drivers -v0x1ac29e0_0 .net *"_s123", 0 0, L_0x1afea40; 1 drivers -v0x1ac2ac0_0 .net *"_s127", 0 0, L_0x1afed10; 1 drivers -v0x1ac2ba0_0 .net *"_s131", 0 0, L_0x1afebf0; 1 drivers -v0x1ac2d50_0 .net *"_s135", 0 0, L_0x1afef70; 1 drivers -v0x1ac2df0_0 .net *"_s139", 0 0, L_0x1afee40; 1 drivers -v0x1ac2ed0_0 .net *"_s143", 0 0, L_0x1aff150; 1 drivers -v0x1ac2fb0_0 .net *"_s147", 0 0, L_0x1aff010; 1 drivers -v0x1ac3090_0 .net *"_s151", 0 0, L_0x1aff340; 1 drivers -v0x1ac3170_0 .net *"_s155", 0 0, L_0x1aff1f0; 1 drivers -v0x1ac3250_0 .net *"_s159", 0 0, L_0x1aff290; 1 drivers -v0x1ac3330_0 .net *"_s160", 17 0, L_0x1aff3e0; 1 drivers -v0x1ac3410_0 .net *"_s162", 5 0, L_0x1aff740; 1 drivers -L_0x2acae8b882a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1ac34f0_0 .net *"_s165", 1 0, L_0x2acae8b882a0; 1 drivers -v0x1ac54c0_2 .array/port v0x1ac54c0, 2; -v0x1ac35d0_0 .net *"_s173", 10 0, v0x1ac54c0_2; 1 drivers -v0x1ac54c0_3 .array/port v0x1ac54c0, 3; -v0x1ac36b0_0 .net *"_s179", 10 0, v0x1ac54c0_3; 1 drivers -v0x1ac54c0_0 .array/port v0x1ac54c0, 0; -v0x1ac3790_0 .net *"_s185", 10 0, v0x1ac54c0_0; 1 drivers -v0x1ac54c0_1 .array/port v0x1ac54c0, 1; -v0x1ac3870_0 .net *"_s191", 10 0, v0x1ac54c0_1; 1 drivers -v0x1ac3950_0 .net *"_s23", 0 0, L_0x1afcc00; 1 drivers -v0x1ac3a30_0 .net *"_s27", 0 0, L_0x1afccd0; 1 drivers -v0x1ac2c80_0 .net *"_s31", 0 0, L_0x1afcda0; 1 drivers -v0x1ac3d00_0 .net *"_s36", 0 0, L_0x1afcf40; 1 drivers -v0x1ac3de0_0 .net *"_s42", 0 0, L_0x1afd120; 1 drivers -v0x1ac3ec0_0 .net *"_s46", 0 0, L_0x1afd1c0; 1 drivers -v0x1ac3fa0_0 .net *"_s50", 0 0, L_0x1afd2d0; 1 drivers -v0x1ac4080_0 .net *"_s55", 0 0, L_0x1afd4e0; 1 drivers -v0x1ac4160_0 .net *"_s61", 0 0, L_0x1afd750; 1 drivers -v0x1ac4240_0 .net *"_s65", 0 0, L_0x1afd7f0; 1 drivers -v0x1ac4320_0 .net *"_s69", 0 0, L_0x1afd930; 1 drivers -v0x1ac4400_0 .net *"_s74", 0 0, L_0x1afd890; 1 drivers -v0x1ac44e0_0 .net *"_s80", 0 0, L_0x1afdb60; 1 drivers -v0x1ac45c0_0 .net *"_s84", 0 0, L_0x1afdf20; 1 drivers -v0x1ac46a0_0 .net *"_s88", 0 0, L_0x1afdd50; 1 drivers -v0x1ac4780_0 .net *"_s93", 0 0, L_0x1afe0d0; 1 drivers -v0x1ac4860_0 .net *"_s99", 0 0, L_0x1afe350; 1 drivers -v0x1ac4940_0 .net/s "accOut", 10 0, L_0x1afc1d0; alias, 1 drivers -v0x1ac4a20_0 .net "anyHasData", 0 0, L_0x1afd030; 1 drivers -v0x1ac4ae0_0 .net "anyReadAck", 0 0, L_0x1afdc60; 1 drivers -v0x1ac4ba0_0 .net "anyWantData", 0 0, L_0x1afd5d0; 1 drivers -v0x1ac4c60_0 .net "anyWriteAck", 0 0, L_0x1afe590; 1 drivers -v0x1ac4d20_0 .net "clk", 0 0, v0x1adbf40_0; 1 drivers -v0x1ac4de0_0 .net "down", 14 0, L_0x1afb3a0; alias, 1 drivers -v0x1ac4ec0_0 .net "downOut", 14 0, L_0x1affb80; alias, 1 drivers -v0x1ac4fa0_0 .net "instruction", 17 0, L_0x1afd260; 1 drivers -v0x1ac5080 .array "instructions", 15 0, 17 0; -v0x1ac5140_0 .var "last", 2 0; -v0x1ac5220_0 .net "left", 14 0, L_0x1aefbe0; alias, 1 drivers -v0x1ac5300_0 .net "leftOut", 14 0, L_0x1aff8a0; alias, 1 drivers -v0x1ac53e0_0 .var "mode", 2 0; -v0x1ac54c0 .array/s "outVals", 2 5, 10 0; -v0x1ac5600_0 .var "phase", 2 0; -v0x1ac56e0_0 .net "portsHaveData", 5 2, L_0x1afce40; 1 drivers -v0x1ac3ad0_0 .net "portsWantData", 5 2, L_0x1afd370; 1 drivers -v0x1ac3bb0_0 .net "readAckIn", 5 2, L_0x1afd9d0; 1 drivers -v0x1ac5b90_0 .var "readAckOut", 5 2; -v0x1ac5c30_0 .var "readTarget", 2 0; -v0x1ac5d10_0 .var/s "readValue", 10 0; -L_0x2acae8b88258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1ac5df0 .array "regVals", 0 7; -v0x1ac5df0_0 .net/s v0x1ac5df0 0, 10 0, L_0x2acae8b88258; 1 drivers -v0x1ac5df0_1 .net/s v0x1ac5df0 1, 10 0, L_0x1afc460; 1 drivers -v0x1ac5df0_2 .net/s v0x1ac5df0 2, 10 0, L_0x1afc740; 1 drivers -v0x1ac5df0_3 .net/s v0x1ac5df0 3, 10 0, L_0x1afc870; 1 drivers -v0x1ac5df0_4 .net/s v0x1ac5df0 4, 10 0, L_0x1afc9a0; 1 drivers -v0x1ac5df0_5 .net/s v0x1ac5df0 5, 10 0, L_0x1afcad0; 1 drivers -o0x2acae8b57eb8 .functor BUFZ 11, C4; HiZ drive -v0x1ac5df0_6 .net/s v0x1ac5df0 6, 10 0, o0x2acae8b57eb8; 0 drivers -o0x2acae8b57ee8 .functor BUFZ 11, C4; HiZ drive -v0x1ac5df0_7 .net/s v0x1ac5df0 7, 10 0, o0x2acae8b57ee8; 0 drivers -v0x1ac6000_0 .net "right", 14 0, L_0x1af34b0; alias, 1 drivers -v0x1ac60e0_0 .net "rightOut", 14 0, L_0x1b00270; alias, 1 drivers -v0x1ac61c0_0 .net "up", 14 0, L_0x1af77e0; alias, 1 drivers -v0x1ac62a0_0 .net "upOut", 14 0, L_0x1aff5d0; alias, 1 drivers -v0x1ac6380_0 .var "weHaveData", 5 2; -v0x1ac6460_0 .var "weWantData", 5 2; -v0x1ac6540_0 .net "writeAckIn", 5 2, L_0x1afe2b0; 1 drivers -v0x1ac6620_0 .var "writeAckOut", 5 2; -v0x1ac6700_0 .var "writeTarget", 2 0; -v0x1ac67e0_0 .var/s "writeValue", 10 0; -E_0x1a1d520 .event negedge, v0x1ac4d20_0; -E_0x1a3fcc0 .event posedge, v0x1ac4d20_0; -L_0x1afc740 .part L_0x1aefbe0, 0, 11; -L_0x1afc870 .part L_0x1af34b0, 0, 11; -L_0x1afc9a0 .part L_0x1af77e0, 0, 11; -L_0x1afcad0 .part L_0x1afb3a0, 0, 11; -L_0x1afcc00 .part L_0x1aefbe0, 11, 1; -L_0x1afccd0 .part L_0x1af34b0, 11, 1; -L_0x1afcda0 .part L_0x1af77e0, 11, 1; -L_0x1afce40 .concat8 [ 1 1 1 1], L_0x1afcc00, L_0x1afccd0, L_0x1afcda0, L_0x1afcf40; -L_0x1afcf40 .part L_0x1afb3a0, 11, 1; -L_0x1afd030 .reduce/or L_0x1afce40; -L_0x1afd120 .part L_0x1aefbe0, 12, 1; -L_0x1afd1c0 .part L_0x1af34b0, 12, 1; -L_0x1afd2d0 .part L_0x1af77e0, 12, 1; -L_0x1afd370 .concat8 [ 1 1 1 1], L_0x1afd120, L_0x1afd1c0, L_0x1afd2d0, L_0x1afd4e0; -L_0x1afd4e0 .part L_0x1afb3a0, 12, 1; -L_0x1afd5d0 .reduce/or L_0x1afd370; -L_0x1afd750 .part L_0x1aefbe0, 13, 1; -L_0x1afd7f0 .part L_0x1af34b0, 13, 1; -L_0x1afd930 .part L_0x1af77e0, 13, 1; -L_0x1afd9d0 .concat8 [ 1 1 1 1], L_0x1afd750, L_0x1afd7f0, L_0x1afd930, L_0x1afd890; -L_0x1afd890 .part L_0x1afb3a0, 13, 1; -L_0x1afdc60 .reduce/or L_0x1afd9d0; -L_0x1afdb60 .part L_0x1aefbe0, 14, 1; -L_0x1afdf20 .part L_0x1af34b0, 14, 1; -L_0x1afdd50 .part L_0x1af77e0, 14, 1; -L_0x1afe2b0 .concat8 [ 1 1 1 1], L_0x1afdb60, L_0x1afdf20, L_0x1afdd50, L_0x1afe0d0; -L_0x1afe0d0 .part L_0x1afb3a0, 14, 1; -L_0x1afe590 .reduce/or L_0x1afe2b0; -L_0x1afe350 .part v0x1ac5b90_0, 0, 1; -L_0x1afe720 .part v0x1ac5b90_0, 1, 1; -L_0x1afe630 .part v0x1ac5b90_0, 2, 1; -L_0x1afe910 .part v0x1ac5b90_0, 3, 1; -L_0x1afe810 .part v0x1ac6620_0, 0, 1; -L_0x1afeb50 .part v0x1ac6620_0, 1, 1; -L_0x1afea40 .part v0x1ac6620_0, 2, 1; -L_0x1afed10 .part v0x1ac6620_0, 3, 1; -L_0x1afebf0 .part v0x1ac6460_0, 0, 1; -L_0x1afef70 .part v0x1ac6460_0, 1, 1; -L_0x1afee40 .part v0x1ac6460_0, 2, 1; -L_0x1aff150 .part v0x1ac6460_0, 3, 1; -L_0x1aff010 .part v0x1ac6380_0, 0, 1; -L_0x1aff340 .part v0x1ac6380_0, 1, 1; -L_0x1aff1f0 .part v0x1ac6380_0, 2, 1; -L_0x1aff290 .part v0x1ac6380_0, 3, 1; -L_0x1aff3e0 .array/port v0x1ac5080, L_0x1aff740; -L_0x1aff740 .concat [ 4 2 0 0], v0x1ac2250_0, L_0x2acae8b882a0; -LS_0x1aff5d0_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_2, L_0x1aff1f0, L_0x1afee40, L_0x1afea40; -LS_0x1aff5d0_0_4 .concat8 [ 1 0 0 0], L_0x1afe630; -L_0x1aff5d0 .concat8 [ 14 1 0 0], LS_0x1aff5d0_0_0, LS_0x1aff5d0_0_4; -LS_0x1affb80_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_3, L_0x1aff290, L_0x1aff150, L_0x1afed10; -LS_0x1affb80_0_4 .concat8 [ 1 0 0 0], L_0x1afe910; -L_0x1affb80 .concat8 [ 14 1 0 0], LS_0x1affb80_0_0, LS_0x1affb80_0_4; -LS_0x1aff8a0_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_0, L_0x1aff010, L_0x1afebf0, L_0x1afe810; -LS_0x1aff8a0_0_4 .concat8 [ 1 0 0 0], L_0x1afe350; -L_0x1aff8a0 .concat8 [ 14 1 0 0], LS_0x1aff8a0_0_0, LS_0x1aff8a0_0_4; -LS_0x1b00270_0_0 .concat8 [ 11 1 1 1], v0x1ac54c0_1, L_0x1aff340, L_0x1afef70, L_0x1afeb50; -LS_0x1b00270_0_4 .concat8 [ 1 0 0 0], L_0x1afe720; -L_0x1b00270 .concat8 [ 14 1 0 0], LS_0x1b00270_0_0, LS_0x1b00270_0_4; -L_0x1affee0 .part L_0x1afd260, 14, 4; -L_0x1b00700 .part L_0x1afd260, 11, 3; -L_0x1b00510 .part L_0x1afd260, 8, 3; -L_0x1b00950 .part L_0x1afd260, 10, 4; -L_0x1b007a0 .part L_0x1afd260, 0, 11; -S_0x1ac6a60 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x1a0c690; +P_0x25f5510 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x25f5550 .param/str "memFile" 0 3 60, "regTest/center.dat"; +L_0x26c81d0 .functor BUFZ 11, v0x264e310_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26c8460 .functor BUFZ 11, v0x264e310_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26c9260 .functor BUFZ 18, L_0x26cb3e0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x264e310_0 .var/s "ACC", 10 0; +v0x268dd90_0 .var/s "BAK", 10 0; +v0x268de70_0 .net "DST", 2 0, L_0x26cc700; 1 drivers +v0x268df60_0 .net/s "IMM", 10 0, L_0x26cc7a0; 1 drivers +v0x268e040_0 .net "INST", 3 0, L_0x26cbee0; 1 drivers +v0x268e170_0 .net "LABEL", 3 0, L_0x26cc950; 1 drivers +v0x268e250_0 .var "PC", 3 0; +v0x268e330_0 .var "PCNEXT", 3 0; +v0x268e410_0 .net "SRC", 2 0, L_0x26cc510; 1 drivers +v0x268e580_0 .net *"_s103", 0 0, L_0x26ca720; 1 drivers +v0x268e660_0 .net *"_s107", 0 0, L_0x26ca630; 1 drivers +v0x268e740_0 .net *"_s111", 0 0, L_0x26ca910; 1 drivers +v0x268e820_0 .net *"_s115", 0 0, L_0x26ca810; 1 drivers +v0x268e900_0 .net *"_s119", 0 0, L_0x26cab50; 1 drivers +v0x268e9e0_0 .net *"_s123", 0 0, L_0x26caa40; 1 drivers +v0x268eac0_0 .net *"_s127", 0 0, L_0x26cad10; 1 drivers +v0x268eba0_0 .net *"_s131", 0 0, L_0x26cabf0; 1 drivers +v0x268ed50_0 .net *"_s135", 0 0, L_0x26caf70; 1 drivers +v0x268edf0_0 .net *"_s139", 0 0, L_0x26cae40; 1 drivers +v0x268eed0_0 .net *"_s143", 0 0, L_0x26cb150; 1 drivers +v0x268efb0_0 .net *"_s147", 0 0, L_0x26cb010; 1 drivers +v0x268f090_0 .net *"_s151", 0 0, L_0x26cb340; 1 drivers +v0x268f170_0 .net *"_s155", 0 0, L_0x26cb1f0; 1 drivers +v0x268f250_0 .net *"_s159", 0 0, L_0x26cb290; 1 drivers +v0x268f330_0 .net *"_s160", 17 0, L_0x26cb3e0; 1 drivers +v0x268f410_0 .net *"_s162", 5 0, L_0x26cb740; 1 drivers +L_0x2ace9a32a2a0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x268f4f0_0 .net *"_s165", 1 0, L_0x2ace9a32a2a0; 1 drivers +v0x26914c0_2 .array/port v0x26914c0, 2; +v0x268f5d0_0 .net *"_s173", 10 0, v0x26914c0_2; 1 drivers +v0x26914c0_3 .array/port v0x26914c0, 3; +v0x268f6b0_0 .net *"_s179", 10 0, v0x26914c0_3; 1 drivers +v0x26914c0_0 .array/port v0x26914c0, 0; +v0x268f790_0 .net *"_s185", 10 0, v0x26914c0_0; 1 drivers +v0x26914c0_1 .array/port v0x26914c0, 1; +v0x268f870_0 .net *"_s191", 10 0, v0x26914c0_1; 1 drivers +v0x268f950_0 .net *"_s23", 0 0, L_0x26c8c00; 1 drivers +v0x268fa30_0 .net *"_s27", 0 0, L_0x26c8cd0; 1 drivers +v0x268ec80_0 .net *"_s31", 0 0, L_0x26c8da0; 1 drivers +v0x268fd00_0 .net *"_s36", 0 0, L_0x26c8f40; 1 drivers +v0x268fde0_0 .net *"_s42", 0 0, L_0x26c9120; 1 drivers +v0x268fec0_0 .net *"_s46", 0 0, L_0x26c91c0; 1 drivers +v0x268ffa0_0 .net *"_s50", 0 0, L_0x26c92d0; 1 drivers +v0x2690080_0 .net *"_s55", 0 0, L_0x26c94e0; 1 drivers +v0x2690160_0 .net *"_s61", 0 0, L_0x26c9750; 1 drivers +v0x2690240_0 .net *"_s65", 0 0, L_0x26c97f0; 1 drivers +v0x2690320_0 .net *"_s69", 0 0, L_0x26c9930; 1 drivers +v0x2690400_0 .net *"_s74", 0 0, L_0x26c9890; 1 drivers +v0x26904e0_0 .net *"_s80", 0 0, L_0x26c9b60; 1 drivers +v0x26905c0_0 .net *"_s84", 0 0, L_0x26c9f20; 1 drivers +v0x26906a0_0 .net *"_s88", 0 0, L_0x26c9d50; 1 drivers +v0x2690780_0 .net *"_s93", 0 0, L_0x26ca0d0; 1 drivers +v0x2690860_0 .net *"_s99", 0 0, L_0x26ca350; 1 drivers +v0x2690940_0 .net/s "accOut", 10 0, L_0x26c81d0; alias, 1 drivers +v0x2690a20_0 .net "anyHasData", 0 0, L_0x26c9030; 1 drivers +v0x2690ae0_0 .net "anyReadAck", 0 0, L_0x26c9c60; 1 drivers +v0x2690ba0_0 .net "anyWantData", 0 0, L_0x26c95d0; 1 drivers +v0x2690c60_0 .net "anyWriteAck", 0 0, L_0x26ca590; 1 drivers +v0x2690d20_0 .net "clk", 0 0, v0x26a7f40_0; 1 drivers +v0x2690de0_0 .net "down", 14 0, L_0x26c73a0; alias, 1 drivers +v0x2690ec0_0 .net "downOut", 14 0, L_0x26cbb80; alias, 1 drivers +v0x2690fa0_0 .net "instruction", 17 0, L_0x26c9260; 1 drivers +v0x2691080 .array "instructions", 15 0, 17 0; +v0x2691140_0 .var "last", 2 0; +v0x2691220_0 .net "left", 14 0, L_0x26bbbe0; alias, 1 drivers +v0x2691300_0 .net "leftOut", 14 0, L_0x26cb8a0; alias, 1 drivers +v0x26913e0_0 .var "mode", 2 0; +v0x26914c0 .array/s "outVals", 2 5, 10 0; +v0x2691600_0 .var "phase", 2 0; +v0x26916e0_0 .net "portsHaveData", 5 2, L_0x26c8e40; 1 drivers +v0x268fad0_0 .net "portsWantData", 5 2, L_0x26c9370; 1 drivers +v0x268fbb0_0 .net "readAckIn", 5 2, L_0x26c99d0; 1 drivers +v0x2691b90_0 .var "readAckOut", 5 2; +v0x2691c30_0 .var "readTarget", 2 0; +v0x2691d10_0 .var/s "readValue", 10 0; +L_0x2ace9a32a258 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2691df0 .array "regVals", 0 7; +v0x2691df0_0 .net/s v0x2691df0 0, 10 0, L_0x2ace9a32a258; 1 drivers +v0x2691df0_1 .net/s v0x2691df0 1, 10 0, L_0x26c8460; 1 drivers +v0x2691df0_2 .net/s v0x2691df0 2, 10 0, L_0x26c8740; 1 drivers +v0x2691df0_3 .net/s v0x2691df0 3, 10 0, L_0x26c8870; 1 drivers +v0x2691df0_4 .net/s v0x2691df0 4, 10 0, L_0x26c89a0; 1 drivers +v0x2691df0_5 .net/s v0x2691df0 5, 10 0, L_0x26c8ad0; 1 drivers +o0x2ace9a2f9eb8 .functor BUFZ 11, C4; HiZ drive +v0x2691df0_6 .net/s v0x2691df0 6, 10 0, o0x2ace9a2f9eb8; 0 drivers +o0x2ace9a2f9ee8 .functor BUFZ 11, C4; HiZ drive +v0x2691df0_7 .net/s v0x2691df0 7, 10 0, o0x2ace9a2f9ee8; 0 drivers +v0x2692000_0 .net "right", 14 0, L_0x26bf4b0; alias, 1 drivers +v0x26920e0_0 .net "rightOut", 14 0, L_0x26cc270; alias, 1 drivers +v0x26921c0_0 .net "up", 14 0, L_0x26c37e0; alias, 1 drivers +v0x26922a0_0 .net "upOut", 14 0, L_0x26cb5d0; alias, 1 drivers +v0x2692380_0 .var "weHaveData", 5 2; +v0x2692460_0 .var "weWantData", 5 2; +v0x2692540_0 .net "writeAckIn", 5 2, L_0x26ca2b0; 1 drivers +v0x2692620_0 .var "writeAckOut", 5 2; +v0x2692700_0 .var "writeTarget", 2 0; +v0x26927e0_0 .var/s "writeValue", 10 0; +E_0x25e9520 .event negedge, v0x2690d20_0; +E_0x260bcc0 .event posedge, v0x2690d20_0; +L_0x26c8740 .part L_0x26bbbe0, 0, 11; +L_0x26c8870 .part L_0x26bf4b0, 0, 11; +L_0x26c89a0 .part L_0x26c37e0, 0, 11; +L_0x26c8ad0 .part L_0x26c73a0, 0, 11; +L_0x26c8c00 .part L_0x26bbbe0, 11, 1; +L_0x26c8cd0 .part L_0x26bf4b0, 11, 1; +L_0x26c8da0 .part L_0x26c37e0, 11, 1; +L_0x26c8e40 .concat8 [ 1 1 1 1], L_0x26c8c00, L_0x26c8cd0, L_0x26c8da0, L_0x26c8f40; +L_0x26c8f40 .part L_0x26c73a0, 11, 1; +L_0x26c9030 .reduce/or L_0x26c8e40; +L_0x26c9120 .part L_0x26bbbe0, 12, 1; +L_0x26c91c0 .part L_0x26bf4b0, 12, 1; +L_0x26c92d0 .part L_0x26c37e0, 12, 1; +L_0x26c9370 .concat8 [ 1 1 1 1], L_0x26c9120, L_0x26c91c0, L_0x26c92d0, L_0x26c94e0; +L_0x26c94e0 .part L_0x26c73a0, 12, 1; +L_0x26c95d0 .reduce/or L_0x26c9370; +L_0x26c9750 .part L_0x26bbbe0, 13, 1; +L_0x26c97f0 .part L_0x26bf4b0, 13, 1; +L_0x26c9930 .part L_0x26c37e0, 13, 1; +L_0x26c99d0 .concat8 [ 1 1 1 1], L_0x26c9750, L_0x26c97f0, L_0x26c9930, L_0x26c9890; +L_0x26c9890 .part L_0x26c73a0, 13, 1; +L_0x26c9c60 .reduce/or L_0x26c99d0; +L_0x26c9b60 .part L_0x26bbbe0, 14, 1; +L_0x26c9f20 .part L_0x26bf4b0, 14, 1; +L_0x26c9d50 .part L_0x26c37e0, 14, 1; +L_0x26ca2b0 .concat8 [ 1 1 1 1], L_0x26c9b60, L_0x26c9f20, L_0x26c9d50, L_0x26ca0d0; +L_0x26ca0d0 .part L_0x26c73a0, 14, 1; +L_0x26ca590 .reduce/or L_0x26ca2b0; +L_0x26ca350 .part v0x2691b90_0, 0, 1; +L_0x26ca720 .part v0x2691b90_0, 1, 1; +L_0x26ca630 .part v0x2691b90_0, 2, 1; +L_0x26ca910 .part v0x2691b90_0, 3, 1; +L_0x26ca810 .part v0x2692620_0, 0, 1; +L_0x26cab50 .part v0x2692620_0, 1, 1; +L_0x26caa40 .part v0x2692620_0, 2, 1; +L_0x26cad10 .part v0x2692620_0, 3, 1; +L_0x26cabf0 .part v0x2692460_0, 0, 1; +L_0x26caf70 .part v0x2692460_0, 1, 1; +L_0x26cae40 .part v0x2692460_0, 2, 1; +L_0x26cb150 .part v0x2692460_0, 3, 1; +L_0x26cb010 .part v0x2692380_0, 0, 1; +L_0x26cb340 .part v0x2692380_0, 1, 1; +L_0x26cb1f0 .part v0x2692380_0, 2, 1; +L_0x26cb290 .part v0x2692380_0, 3, 1; +L_0x26cb3e0 .array/port v0x2691080, L_0x26cb740; +L_0x26cb740 .concat [ 4 2 0 0], v0x268e250_0, L_0x2ace9a32a2a0; +LS_0x26cb5d0_0_0 .concat8 [ 11 1 1 1], v0x26914c0_2, L_0x26cb1f0, L_0x26cae40, L_0x26caa40; +LS_0x26cb5d0_0_4 .concat8 [ 1 0 0 0], L_0x26ca630; +L_0x26cb5d0 .concat8 [ 14 1 0 0], LS_0x26cb5d0_0_0, LS_0x26cb5d0_0_4; +LS_0x26cbb80_0_0 .concat8 [ 11 1 1 1], v0x26914c0_3, L_0x26cb290, L_0x26cb150, L_0x26cad10; +LS_0x26cbb80_0_4 .concat8 [ 1 0 0 0], L_0x26ca910; +L_0x26cbb80 .concat8 [ 14 1 0 0], LS_0x26cbb80_0_0, LS_0x26cbb80_0_4; +LS_0x26cb8a0_0_0 .concat8 [ 11 1 1 1], v0x26914c0_0, L_0x26cb010, L_0x26cabf0, L_0x26ca810; +LS_0x26cb8a0_0_4 .concat8 [ 1 0 0 0], L_0x26ca350; +L_0x26cb8a0 .concat8 [ 14 1 0 0], LS_0x26cb8a0_0_0, LS_0x26cb8a0_0_4; +LS_0x26cc270_0_0 .concat8 [ 11 1 1 1], v0x26914c0_1, L_0x26cb340, L_0x26caf70, L_0x26cab50; +LS_0x26cc270_0_4 .concat8 [ 1 0 0 0], L_0x26ca720; +L_0x26cc270 .concat8 [ 14 1 0 0], LS_0x26cc270_0_0, LS_0x26cc270_0_4; +L_0x26cbee0 .part L_0x26c9260, 14, 4; +L_0x26cc700 .part L_0x26c9260, 11, 3; +L_0x26cc510 .part L_0x26c9260, 8, 3; +L_0x26cc950 .part L_0x26c9260, 10, 4; +L_0x26cc7a0 .part L_0x26c9260, 0, 11; +S_0x2692a60 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x25d8690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -215,175 +215,175 @@ S_0x1ac6a60 .scope module, "down" "tis100" 2 30, 3 49 0, S_0x1a0c690; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1ac6c50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1ac6c90 .param/str "memFile" 0 3 60, "regTest/down.dat"; -L_0x1af80e0 .functor BUFZ 11, v0x1ac6f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1af82e0 .functor BUFZ 11, v0x1ac6f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1af91a0 .functor BUFZ 18, L_0x1afb110, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1ac6f90_0 .var/s "ACC", 10 0; -v0x1ac7090_0 .var/s "BAK", 10 0; -v0x1ac7170_0 .net "DST", 2 0, L_0x1afc290; 1 drivers -v0x1ac7230_0 .net/s "IMM", 10 0, L_0x1afc330; 1 drivers -v0x1ac7310_0 .net "INST", 3 0, L_0x1afbb70; 1 drivers -v0x1ac7440_0 .net "LABEL", 3 0, L_0x1afc4e0; 1 drivers -v0x1ac7520_0 .var "PC", 3 0; -v0x1ac7600_0 .var "PCNEXT", 3 0; -v0x1ac76e0_0 .net "SRC", 2 0, L_0x1afc0a0; 1 drivers -v0x1ac7850_0 .net *"_s103", 0 0, L_0x1afa450; 1 drivers -v0x1ac7930_0 .net *"_s107", 0 0, L_0x1afa360; 1 drivers -v0x1ac7a10_0 .net *"_s111", 0 0, L_0x1afa640; 1 drivers -v0x1ac7af0_0 .net *"_s115", 0 0, L_0x1afa540; 1 drivers -v0x1ac7bd0_0 .net *"_s119", 0 0, L_0x1afa880; 1 drivers -v0x1ac7cb0_0 .net *"_s123", 0 0, L_0x1afa770; 1 drivers -v0x1ac7d90_0 .net *"_s127", 0 0, L_0x1afaa40; 1 drivers -v0x1ac7e70_0 .net *"_s131", 0 0, L_0x1afa920; 1 drivers -v0x1ac8020_0 .net *"_s135", 0 0, L_0x1afaca0; 1 drivers -v0x1ac80c0_0 .net *"_s139", 0 0, L_0x1afab70; 1 drivers -v0x1ac81a0_0 .net *"_s143", 0 0, L_0x1afae80; 1 drivers -v0x1ac8280_0 .net *"_s147", 0 0, L_0x1afad40; 1 drivers -v0x1ac8360_0 .net *"_s151", 0 0, L_0x1afb070; 1 drivers -v0x1ac8440_0 .net *"_s155", 0 0, L_0x1afaf20; 1 drivers -v0x1ac8520_0 .net *"_s159", 0 0, L_0x1afafc0; 1 drivers -v0x1ac8600_0 .net *"_s160", 17 0, L_0x1afb110; 1 drivers -v0x1ac86e0_0 .net *"_s162", 5 0, L_0x1afb470; 1 drivers -L_0x2acae8b88210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1ac87c0_0 .net *"_s165", 1 0, L_0x2acae8b88210; 1 drivers -v0x1aca750_2 .array/port v0x1aca750, 2; -v0x1ac88a0_0 .net *"_s173", 10 0, v0x1aca750_2; 1 drivers -v0x1aca750_3 .array/port v0x1aca750, 3; -v0x1ac8980_0 .net *"_s179", 10 0, v0x1aca750_3; 1 drivers -v0x1aca750_0 .array/port v0x1aca750, 0; -v0x1ac8a60_0 .net *"_s185", 10 0, v0x1aca750_0; 1 drivers -v0x1aca750_1 .array/port v0x1aca750, 1; -v0x1ac8b40_0 .net *"_s191", 10 0, v0x1aca750_1; 1 drivers -v0x1ac8c20_0 .net *"_s23", 0 0, L_0x1af8930; 1 drivers -v0x1ac8d00_0 .net *"_s27", 0 0, L_0x1af8a50; 1 drivers -v0x1ac7f50_0 .net *"_s31", 0 0, L_0x1af8b40; 1 drivers -v0x1ac8fd0_0 .net *"_s36", 0 0, L_0x1af8e30; 1 drivers -v0x1ac90b0_0 .net *"_s42", 0 0, L_0x1af9060; 1 drivers -v0x1ac9190_0 .net *"_s46", 0 0, L_0x1af9100; 1 drivers -v0x1ac9270_0 .net *"_s50", 0 0, L_0x1af9210; 1 drivers -v0x1ac9350_0 .net *"_s55", 0 0, L_0x1af9420; 1 drivers -v0x1ac9430_0 .net *"_s61", 0 0, L_0x1af9690; 1 drivers -v0x1ac9510_0 .net *"_s65", 0 0, L_0x1af97c0; 1 drivers -v0x1ac95f0_0 .net *"_s69", 0 0, L_0x1af9990; 1 drivers -v0x1ac96d0_0 .net *"_s74", 0 0, L_0x1af98f0; 1 drivers -v0x1ac97b0_0 .net *"_s80", 0 0, L_0x1af9b20; 1 drivers -v0x1ac9890_0 .net *"_s84", 0 0, L_0x1af9e10; 1 drivers -v0x1ac9970_0 .net *"_s88", 0 0, L_0x1af9d50; 1 drivers -v0x1ac9a50_0 .net *"_s93", 0 0, L_0x1af9eb0; 1 drivers -v0x1ac9b30_0 .net *"_s99", 0 0, L_0x1afa140; 1 drivers -v0x1ac9c10_0 .net/s "accOut", 10 0, L_0x1af80e0; alias, 1 drivers -v0x1ac9cf0_0 .net "anyHasData", 0 0, L_0x1af8f70; 1 drivers -v0x1ac9db0_0 .net "anyReadAck", 0 0, L_0x1af9cb0; 1 drivers -v0x1ac9e70_0 .net "anyWantData", 0 0, L_0x1af9510; 1 drivers -v0x1ac9f30_0 .net "anyWriteAck", 0 0, L_0x1afa270; 1 drivers -v0x1ac9ff0_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers -o0x2acae8b58cc8 .functor BUFZ 15, C4; HiZ drive -v0x1aca090_0 .net "down", 14 0, o0x2acae8b58cc8; 0 drivers -v0x1aca150_0 .net "downOut", 14 0, L_0x1afb890; 1 drivers -v0x1aca230_0 .net "instruction", 17 0, L_0x1af91a0; 1 drivers -v0x1aca310 .array "instructions", 15 0, 17 0; -v0x1aca3d0_0 .var "last", 2 0; -o0x2acae8b58d88 .functor BUFZ 15, C4; HiZ drive -v0x1aca4b0_0 .net "left", 14 0, o0x2acae8b58d88; 0 drivers -v0x1aca590_0 .net "leftOut", 14 0, L_0x1afb5d0; 1 drivers -v0x1aca670_0 .var "mode", 2 0; -v0x1aca750 .array/s "outVals", 2 5, 10 0; -v0x1aca890_0 .var "phase", 2 0; -v0x1aca970_0 .net "portsHaveData", 5 2, L_0x1af8c70; 1 drivers -v0x1ac8da0_0 .net "portsWantData", 5 2, L_0x1af92b0; 1 drivers -v0x1ac8e80_0 .net "readAckIn", 5 2, L_0x1af9a30; 1 drivers -v0x1acae20_0 .var "readAckOut", 5 2; -v0x1acaec0_0 .var "readTarget", 2 0; -v0x1acaf60_0 .var/s "readValue", 10 0; -L_0x2acae8b881c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1acb000 .array "regVals", 0 7; -v0x1acb000_0 .net/s v0x1acb000 0, 10 0, L_0x2acae8b881c8; 1 drivers -v0x1acb000_1 .net/s v0x1acb000 1, 10 0, L_0x1af82e0; 1 drivers -v0x1acb000_2 .net/s v0x1acb000 2, 10 0, L_0x1af8650; 1 drivers -v0x1acb000_3 .net/s v0x1acb000 3, 10 0, L_0x1af86f0; 1 drivers -v0x1acb000_4 .net/s v0x1acb000 4, 10 0, L_0x1af8790; 1 drivers -v0x1acb000_5 .net/s v0x1acb000 5, 10 0, L_0x1af8830; 1 drivers -o0x2acae8b59148 .functor BUFZ 11, C4; HiZ drive -v0x1acb000_6 .net/s v0x1acb000 6, 10 0, o0x2acae8b59148; 0 drivers -o0x2acae8b59178 .functor BUFZ 11, C4; HiZ drive -v0x1acb000_7 .net/s v0x1acb000 7, 10 0, o0x2acae8b59178; 0 drivers -o0x2acae8b591a8 .functor BUFZ 15, C4; HiZ drive -v0x1acb210_0 .net "right", 14 0, o0x2acae8b591a8; 0 drivers -v0x1acb2f0_0 .net "rightOut", 14 0, L_0x1afbe80; 1 drivers -v0x1acb3d0_0 .net "up", 14 0, L_0x1affb80; alias, 1 drivers -v0x1acb4c0_0 .net "upOut", 14 0, L_0x1afb3a0; alias, 1 drivers -v0x1acb590_0 .var "weHaveData", 5 2; -v0x1acb650_0 .var "weWantData", 5 2; -v0x1acb730_0 .net "writeAckIn", 5 2, L_0x1af9f80; 1 drivers -v0x1acb810_0 .var "writeAckOut", 5 2; -v0x1acb8f0_0 .var "writeTarget", 2 0; -v0x1acb9d0_0 .var/s "writeValue", 10 0; -L_0x1af8650 .part o0x2acae8b58d88, 0, 11; -L_0x1af86f0 .part o0x2acae8b591a8, 0, 11; -L_0x1af8790 .part L_0x1affb80, 0, 11; -L_0x1af8830 .part o0x2acae8b58cc8, 0, 11; -L_0x1af8930 .part o0x2acae8b58d88, 11, 1; -L_0x1af8a50 .part o0x2acae8b591a8, 11, 1; -L_0x1af8b40 .part L_0x1affb80, 11, 1; -L_0x1af8c70 .concat8 [ 1 1 1 1], L_0x1af8930, L_0x1af8a50, L_0x1af8b40, L_0x1af8e30; -L_0x1af8e30 .part o0x2acae8b58cc8, 11, 1; -L_0x1af8f70 .reduce/or L_0x1af8c70; -L_0x1af9060 .part o0x2acae8b58d88, 12, 1; -L_0x1af9100 .part o0x2acae8b591a8, 12, 1; -L_0x1af9210 .part L_0x1affb80, 12, 1; -L_0x1af92b0 .concat8 [ 1 1 1 1], L_0x1af9060, L_0x1af9100, L_0x1af9210, L_0x1af9420; -L_0x1af9420 .part o0x2acae8b58cc8, 12, 1; -L_0x1af9510 .reduce/or L_0x1af92b0; -L_0x1af9690 .part o0x2acae8b58d88, 13, 1; -L_0x1af97c0 .part o0x2acae8b591a8, 13, 1; -L_0x1af9990 .part L_0x1affb80, 13, 1; -L_0x1af9a30 .concat8 [ 1 1 1 1], L_0x1af9690, L_0x1af97c0, L_0x1af9990, L_0x1af98f0; -L_0x1af98f0 .part o0x2acae8b58cc8, 13, 1; -L_0x1af9cb0 .reduce/or L_0x1af9a30; -L_0x1af9b20 .part o0x2acae8b58d88, 14, 1; -L_0x1af9e10 .part o0x2acae8b591a8, 14, 1; -L_0x1af9d50 .part L_0x1affb80, 14, 1; -L_0x1af9f80 .concat8 [ 1 1 1 1], L_0x1af9b20, L_0x1af9e10, L_0x1af9d50, L_0x1af9eb0; -L_0x1af9eb0 .part o0x2acae8b58cc8, 14, 1; -L_0x1afa270 .reduce/or L_0x1af9f80; -L_0x1afa140 .part v0x1acae20_0, 0, 1; -L_0x1afa450 .part v0x1acae20_0, 1, 1; -L_0x1afa360 .part v0x1acae20_0, 2, 1; -L_0x1afa640 .part v0x1acae20_0, 3, 1; -L_0x1afa540 .part v0x1acb810_0, 0, 1; -L_0x1afa880 .part v0x1acb810_0, 1, 1; -L_0x1afa770 .part v0x1acb810_0, 2, 1; -L_0x1afaa40 .part v0x1acb810_0, 3, 1; -L_0x1afa920 .part v0x1acb650_0, 0, 1; -L_0x1afaca0 .part v0x1acb650_0, 1, 1; -L_0x1afab70 .part v0x1acb650_0, 2, 1; -L_0x1afae80 .part v0x1acb650_0, 3, 1; -L_0x1afad40 .part v0x1acb590_0, 0, 1; -L_0x1afb070 .part v0x1acb590_0, 1, 1; -L_0x1afaf20 .part v0x1acb590_0, 2, 1; -L_0x1afafc0 .part v0x1acb590_0, 3, 1; -L_0x1afb110 .array/port v0x1aca310, L_0x1afb470; -L_0x1afb470 .concat [ 4 2 0 0], v0x1ac7520_0, L_0x2acae8b88210; -LS_0x1afb3a0_0_0 .concat8 [ 11 1 1 1], v0x1aca750_2, L_0x1afaf20, L_0x1afab70, L_0x1afa770; -LS_0x1afb3a0_0_4 .concat8 [ 1 0 0 0], L_0x1afa360; -L_0x1afb3a0 .concat8 [ 14 1 0 0], LS_0x1afb3a0_0_0, LS_0x1afb3a0_0_4; -LS_0x1afb890_0_0 .concat8 [ 11 1 1 1], v0x1aca750_3, L_0x1afafc0, L_0x1afae80, L_0x1afaa40; -LS_0x1afb890_0_4 .concat8 [ 1 0 0 0], L_0x1afa640; -L_0x1afb890 .concat8 [ 14 1 0 0], LS_0x1afb890_0_0, LS_0x1afb890_0_4; -LS_0x1afb5d0_0_0 .concat8 [ 11 1 1 1], v0x1aca750_0, L_0x1afad40, L_0x1afa920, L_0x1afa540; -LS_0x1afb5d0_0_4 .concat8 [ 1 0 0 0], L_0x1afa140; -L_0x1afb5d0 .concat8 [ 14 1 0 0], LS_0x1afb5d0_0_0, LS_0x1afb5d0_0_4; -LS_0x1afbe80_0_0 .concat8 [ 11 1 1 1], v0x1aca750_1, L_0x1afb070, L_0x1afaca0, L_0x1afa880; -LS_0x1afbe80_0_4 .concat8 [ 1 0 0 0], L_0x1afa450; -L_0x1afbe80 .concat8 [ 14 1 0 0], LS_0x1afbe80_0_0, LS_0x1afbe80_0_4; -L_0x1afbb70 .part L_0x1af91a0, 14, 4; -L_0x1afc290 .part L_0x1af91a0, 11, 3; -L_0x1afc0a0 .part L_0x1af91a0, 8, 3; -L_0x1afc4e0 .part L_0x1af91a0, 10, 4; -L_0x1afc330 .part L_0x1af91a0, 0, 11; -S_0x1acbc50 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x1a0c690; +P_0x2692c50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x2692c90 .param/str "memFile" 0 3 60, "regTest/down.dat"; +L_0x26c40e0 .functor BUFZ 11, v0x2692f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26c42e0 .functor BUFZ 11, v0x2692f90_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26c51a0 .functor BUFZ 18, L_0x26c7110, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x2692f90_0 .var/s "ACC", 10 0; +v0x2693090_0 .var/s "BAK", 10 0; +v0x2693170_0 .net "DST", 2 0, L_0x26c8290; 1 drivers +v0x2693230_0 .net/s "IMM", 10 0, L_0x26c8330; 1 drivers +v0x2693310_0 .net "INST", 3 0, L_0x26c7b70; 1 drivers +v0x2693440_0 .net "LABEL", 3 0, L_0x26c84e0; 1 drivers +v0x2693520_0 .var "PC", 3 0; +v0x2693600_0 .var "PCNEXT", 3 0; +v0x26936e0_0 .net "SRC", 2 0, L_0x26c80a0; 1 drivers +v0x2693850_0 .net *"_s103", 0 0, L_0x26c6450; 1 drivers +v0x2693930_0 .net *"_s107", 0 0, L_0x26c6360; 1 drivers +v0x2693a10_0 .net *"_s111", 0 0, L_0x26c6640; 1 drivers +v0x2693af0_0 .net *"_s115", 0 0, L_0x26c6540; 1 drivers +v0x2693bd0_0 .net *"_s119", 0 0, L_0x26c6880; 1 drivers +v0x2693cb0_0 .net *"_s123", 0 0, L_0x26c6770; 1 drivers +v0x2693d90_0 .net *"_s127", 0 0, L_0x26c6a40; 1 drivers +v0x2693e70_0 .net *"_s131", 0 0, L_0x26c6920; 1 drivers +v0x2694020_0 .net *"_s135", 0 0, L_0x26c6ca0; 1 drivers +v0x26940c0_0 .net *"_s139", 0 0, L_0x26c6b70; 1 drivers +v0x26941a0_0 .net *"_s143", 0 0, L_0x26c6e80; 1 drivers +v0x2694280_0 .net *"_s147", 0 0, L_0x26c6d40; 1 drivers +v0x2694360_0 .net *"_s151", 0 0, L_0x26c7070; 1 drivers +v0x2694440_0 .net *"_s155", 0 0, L_0x26c6f20; 1 drivers +v0x2694520_0 .net *"_s159", 0 0, L_0x26c6fc0; 1 drivers +v0x2694600_0 .net *"_s160", 17 0, L_0x26c7110; 1 drivers +v0x26946e0_0 .net *"_s162", 5 0, L_0x26c7470; 1 drivers +L_0x2ace9a32a210 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x26947c0_0 .net *"_s165", 1 0, L_0x2ace9a32a210; 1 drivers +v0x2696750_2 .array/port v0x2696750, 2; +v0x26948a0_0 .net *"_s173", 10 0, v0x2696750_2; 1 drivers +v0x2696750_3 .array/port v0x2696750, 3; +v0x2694980_0 .net *"_s179", 10 0, v0x2696750_3; 1 drivers +v0x2696750_0 .array/port v0x2696750, 0; +v0x2694a60_0 .net *"_s185", 10 0, v0x2696750_0; 1 drivers +v0x2696750_1 .array/port v0x2696750, 1; +v0x2694b40_0 .net *"_s191", 10 0, v0x2696750_1; 1 drivers +v0x2694c20_0 .net *"_s23", 0 0, L_0x26c4930; 1 drivers +v0x2694d00_0 .net *"_s27", 0 0, L_0x26c4a50; 1 drivers +v0x2693f50_0 .net *"_s31", 0 0, L_0x26c4b40; 1 drivers +v0x2694fd0_0 .net *"_s36", 0 0, L_0x26c4e30; 1 drivers +v0x26950b0_0 .net *"_s42", 0 0, L_0x26c5060; 1 drivers +v0x2695190_0 .net *"_s46", 0 0, L_0x26c5100; 1 drivers +v0x2695270_0 .net *"_s50", 0 0, L_0x26c5210; 1 drivers +v0x2695350_0 .net *"_s55", 0 0, L_0x26c5420; 1 drivers +v0x2695430_0 .net *"_s61", 0 0, L_0x26c5690; 1 drivers +v0x2695510_0 .net *"_s65", 0 0, L_0x26c57c0; 1 drivers +v0x26955f0_0 .net *"_s69", 0 0, L_0x26c5990; 1 drivers +v0x26956d0_0 .net *"_s74", 0 0, L_0x26c58f0; 1 drivers +v0x26957b0_0 .net *"_s80", 0 0, L_0x26c5b20; 1 drivers +v0x2695890_0 .net *"_s84", 0 0, L_0x26c5e10; 1 drivers +v0x2695970_0 .net *"_s88", 0 0, L_0x26c5d50; 1 drivers +v0x2695a50_0 .net *"_s93", 0 0, L_0x26c5eb0; 1 drivers +v0x2695b30_0 .net *"_s99", 0 0, L_0x26c6140; 1 drivers +v0x2695c10_0 .net/s "accOut", 10 0, L_0x26c40e0; alias, 1 drivers +v0x2695cf0_0 .net "anyHasData", 0 0, L_0x26c4f70; 1 drivers +v0x2695db0_0 .net "anyReadAck", 0 0, L_0x26c5cb0; 1 drivers +v0x2695e70_0 .net "anyWantData", 0 0, L_0x26c5510; 1 drivers +v0x2695f30_0 .net "anyWriteAck", 0 0, L_0x26c6270; 1 drivers +v0x2695ff0_0 .net "clk", 0 0, v0x26a7f40_0; alias, 1 drivers +o0x2ace9a2facc8 .functor BUFZ 15, C4; HiZ drive +v0x2696090_0 .net "down", 14 0, o0x2ace9a2facc8; 0 drivers +v0x2696150_0 .net "downOut", 14 0, L_0x26c7890; 1 drivers +v0x2696230_0 .net "instruction", 17 0, L_0x26c51a0; 1 drivers +v0x2696310 .array "instructions", 15 0, 17 0; +v0x26963d0_0 .var "last", 2 0; +o0x2ace9a2fad88 .functor BUFZ 15, C4; HiZ drive +v0x26964b0_0 .net "left", 14 0, o0x2ace9a2fad88; 0 drivers +v0x2696590_0 .net "leftOut", 14 0, L_0x26c75d0; 1 drivers +v0x2696670_0 .var "mode", 2 0; +v0x2696750 .array/s "outVals", 2 5, 10 0; +v0x2696890_0 .var "phase", 2 0; +v0x2696970_0 .net "portsHaveData", 5 2, L_0x26c4c70; 1 drivers +v0x2694da0_0 .net "portsWantData", 5 2, L_0x26c52b0; 1 drivers +v0x2694e80_0 .net "readAckIn", 5 2, L_0x26c5a30; 1 drivers +v0x2696e20_0 .var "readAckOut", 5 2; +v0x2696ec0_0 .var "readTarget", 2 0; +v0x2696f60_0 .var/s "readValue", 10 0; +L_0x2ace9a32a1c8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x2697000 .array "regVals", 0 7; +v0x2697000_0 .net/s v0x2697000 0, 10 0, L_0x2ace9a32a1c8; 1 drivers +v0x2697000_1 .net/s v0x2697000 1, 10 0, L_0x26c42e0; 1 drivers +v0x2697000_2 .net/s v0x2697000 2, 10 0, L_0x26c4650; 1 drivers +v0x2697000_3 .net/s v0x2697000 3, 10 0, L_0x26c46f0; 1 drivers +v0x2697000_4 .net/s v0x2697000 4, 10 0, L_0x26c4790; 1 drivers +v0x2697000_5 .net/s v0x2697000 5, 10 0, L_0x26c4830; 1 drivers +o0x2ace9a2fb148 .functor BUFZ 11, C4; HiZ drive +v0x2697000_6 .net/s v0x2697000 6, 10 0, o0x2ace9a2fb148; 0 drivers +o0x2ace9a2fb178 .functor BUFZ 11, C4; HiZ drive +v0x2697000_7 .net/s v0x2697000 7, 10 0, o0x2ace9a2fb178; 0 drivers +o0x2ace9a2fb1a8 .functor BUFZ 15, C4; HiZ drive +v0x2697210_0 .net "right", 14 0, o0x2ace9a2fb1a8; 0 drivers +v0x26972f0_0 .net "rightOut", 14 0, L_0x26c7e80; 1 drivers +v0x26973d0_0 .net "up", 14 0, L_0x26cbb80; alias, 1 drivers +v0x26974c0_0 .net "upOut", 14 0, L_0x26c73a0; alias, 1 drivers +v0x2697590_0 .var "weHaveData", 5 2; +v0x2697650_0 .var "weWantData", 5 2; +v0x2697730_0 .net "writeAckIn", 5 2, L_0x26c5f80; 1 drivers +v0x2697810_0 .var "writeAckOut", 5 2; +v0x26978f0_0 .var "writeTarget", 2 0; +v0x26979d0_0 .var/s "writeValue", 10 0; +L_0x26c4650 .part o0x2ace9a2fad88, 0, 11; +L_0x26c46f0 .part o0x2ace9a2fb1a8, 0, 11; +L_0x26c4790 .part L_0x26cbb80, 0, 11; +L_0x26c4830 .part o0x2ace9a2facc8, 0, 11; +L_0x26c4930 .part o0x2ace9a2fad88, 11, 1; +L_0x26c4a50 .part o0x2ace9a2fb1a8, 11, 1; +L_0x26c4b40 .part L_0x26cbb80, 11, 1; +L_0x26c4c70 .concat8 [ 1 1 1 1], L_0x26c4930, L_0x26c4a50, L_0x26c4b40, L_0x26c4e30; +L_0x26c4e30 .part o0x2ace9a2facc8, 11, 1; +L_0x26c4f70 .reduce/or L_0x26c4c70; +L_0x26c5060 .part o0x2ace9a2fad88, 12, 1; +L_0x26c5100 .part o0x2ace9a2fb1a8, 12, 1; +L_0x26c5210 .part L_0x26cbb80, 12, 1; +L_0x26c52b0 .concat8 [ 1 1 1 1], L_0x26c5060, L_0x26c5100, L_0x26c5210, L_0x26c5420; +L_0x26c5420 .part o0x2ace9a2facc8, 12, 1; +L_0x26c5510 .reduce/or L_0x26c52b0; +L_0x26c5690 .part o0x2ace9a2fad88, 13, 1; +L_0x26c57c0 .part o0x2ace9a2fb1a8, 13, 1; +L_0x26c5990 .part L_0x26cbb80, 13, 1; +L_0x26c5a30 .concat8 [ 1 1 1 1], L_0x26c5690, L_0x26c57c0, L_0x26c5990, L_0x26c58f0; +L_0x26c58f0 .part o0x2ace9a2facc8, 13, 1; +L_0x26c5cb0 .reduce/or L_0x26c5a30; +L_0x26c5b20 .part o0x2ace9a2fad88, 14, 1; +L_0x26c5e10 .part o0x2ace9a2fb1a8, 14, 1; +L_0x26c5d50 .part L_0x26cbb80, 14, 1; +L_0x26c5f80 .concat8 [ 1 1 1 1], L_0x26c5b20, L_0x26c5e10, L_0x26c5d50, L_0x26c5eb0; +L_0x26c5eb0 .part o0x2ace9a2facc8, 14, 1; +L_0x26c6270 .reduce/or L_0x26c5f80; +L_0x26c6140 .part v0x2696e20_0, 0, 1; +L_0x26c6450 .part v0x2696e20_0, 1, 1; +L_0x26c6360 .part v0x2696e20_0, 2, 1; +L_0x26c6640 .part v0x2696e20_0, 3, 1; +L_0x26c6540 .part v0x2697810_0, 0, 1; +L_0x26c6880 .part v0x2697810_0, 1, 1; +L_0x26c6770 .part v0x2697810_0, 2, 1; +L_0x26c6a40 .part v0x2697810_0, 3, 1; +L_0x26c6920 .part v0x2697650_0, 0, 1; +L_0x26c6ca0 .part v0x2697650_0, 1, 1; +L_0x26c6b70 .part v0x2697650_0, 2, 1; +L_0x26c6e80 .part v0x2697650_0, 3, 1; +L_0x26c6d40 .part v0x2697590_0, 0, 1; +L_0x26c7070 .part v0x2697590_0, 1, 1; +L_0x26c6f20 .part v0x2697590_0, 2, 1; +L_0x26c6fc0 .part v0x2697590_0, 3, 1; +L_0x26c7110 .array/port v0x2696310, L_0x26c7470; +L_0x26c7470 .concat [ 4 2 0 0], v0x2693520_0, L_0x2ace9a32a210; +LS_0x26c73a0_0_0 .concat8 [ 11 1 1 1], v0x2696750_2, L_0x26c6f20, L_0x26c6b70, L_0x26c6770; +LS_0x26c73a0_0_4 .concat8 [ 1 0 0 0], L_0x26c6360; +L_0x26c73a0 .concat8 [ 14 1 0 0], LS_0x26c73a0_0_0, LS_0x26c73a0_0_4; +LS_0x26c7890_0_0 .concat8 [ 11 1 1 1], v0x2696750_3, L_0x26c6fc0, L_0x26c6e80, L_0x26c6a40; +LS_0x26c7890_0_4 .concat8 [ 1 0 0 0], L_0x26c6640; +L_0x26c7890 .concat8 [ 14 1 0 0], LS_0x26c7890_0_0, LS_0x26c7890_0_4; +LS_0x26c75d0_0_0 .concat8 [ 11 1 1 1], v0x2696750_0, L_0x26c6d40, L_0x26c6920, L_0x26c6540; +LS_0x26c75d0_0_4 .concat8 [ 1 0 0 0], L_0x26c6140; +L_0x26c75d0 .concat8 [ 14 1 0 0], LS_0x26c75d0_0_0, LS_0x26c75d0_0_4; +LS_0x26c7e80_0_0 .concat8 [ 11 1 1 1], v0x2696750_1, L_0x26c7070, L_0x26c6ca0, L_0x26c6880; +LS_0x26c7e80_0_4 .concat8 [ 1 0 0 0], L_0x26c6450; +L_0x26c7e80 .concat8 [ 14 1 0 0], LS_0x26c7e80_0_0, LS_0x26c7e80_0_4; +L_0x26c7b70 .part L_0x26c51a0, 14, 4; +L_0x26c8290 .part L_0x26c51a0, 11, 3; +L_0x26c80a0 .part L_0x26c51a0, 8, 3; +L_0x26c84e0 .part L_0x26c51a0, 10, 4; +L_0x26c8330 .part L_0x26c51a0, 0, 11; +S_0x2697c50 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x25d8690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -395,175 +395,175 @@ S_0x1acbc50 .scope module, "left" "tis100" 2 27, 3 49 0, S_0x1a0c690; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1acbe50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1acbe90 .param/str "memFile" 0 3 60, "regTest/left.dat"; -L_0x1adc160 .functor BUFZ 11, v0x1acc0f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1aec200 .functor BUFZ 11, v0x1acc0f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1aecf70 .functor BUFZ 18, L_0x1aeee70, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1acc0f0_0 .var/s "ACC", 10 0; -v0x1acc1b0_0 .var/s "BAK", 10 0; -v0x1acc290_0 .net "DST", 2 0, L_0x1aefff0; 1 drivers -v0x1acc380_0 .net/s "IMM", 10 0, L_0x1af0090; 1 drivers -v0x1acc460_0 .net "INST", 3 0, L_0x1aef8d0; 1 drivers -v0x1acc590_0 .net "LABEL", 3 0, L_0x1af0240; 1 drivers -v0x1acc670_0 .var "PC", 3 0; -v0x1acc750_0 .var "PCNEXT", 3 0; -v0x1acc830_0 .net "SRC", 2 0, L_0x1aefe00; 1 drivers -v0x1acc9a0_0 .net *"_s103", 0 0, L_0x1aee1b0; 1 drivers -v0x1acca80_0 .net *"_s107", 0 0, L_0x1aee0c0; 1 drivers -v0x1accb60_0 .net *"_s111", 0 0, L_0x1aee3a0; 1 drivers -v0x1accc40_0 .net *"_s115", 0 0, L_0x1aee2a0; 1 drivers -v0x1accd20_0 .net *"_s119", 0 0, L_0x1aee5e0; 1 drivers -v0x1acce00_0 .net *"_s123", 0 0, L_0x1aee4d0; 1 drivers -v0x1accee0_0 .net *"_s127", 0 0, L_0x1aee7a0; 1 drivers -v0x1accfc0_0 .net *"_s131", 0 0, L_0x1aee680; 1 drivers -v0x1acd170_0 .net *"_s135", 0 0, L_0x1aeea00; 1 drivers -v0x1acd210_0 .net *"_s139", 0 0, L_0x1aee8d0; 1 drivers -v0x1acd2f0_0 .net *"_s143", 0 0, L_0x1aeebe0; 1 drivers -v0x1acd3d0_0 .net *"_s147", 0 0, L_0x1aeeaa0; 1 drivers -v0x1acd4b0_0 .net *"_s151", 0 0, L_0x1aeedd0; 1 drivers -v0x1acd590_0 .net *"_s155", 0 0, L_0x1aeec80; 1 drivers -v0x1acd670_0 .net *"_s159", 0 0, L_0x1aeed20; 1 drivers -v0x1acd750_0 .net *"_s160", 17 0, L_0x1aeee70; 1 drivers -v0x1acd830_0 .net *"_s162", 5 0, L_0x1aef1d0; 1 drivers -L_0x2acae8b88060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1acd910_0 .net *"_s165", 1 0, L_0x2acae8b88060; 1 drivers -v0x1acf8c0_2 .array/port v0x1acf8c0, 2; -v0x1acd9f0_0 .net *"_s173", 10 0, v0x1acf8c0_2; 1 drivers -v0x1acf8c0_3 .array/port v0x1acf8c0, 3; -v0x1acdad0_0 .net *"_s179", 10 0, v0x1acf8c0_3; 1 drivers -v0x1acf8c0_0 .array/port v0x1acf8c0, 0; -v0x1acdbb0_0 .net *"_s185", 10 0, v0x1acf8c0_0; 1 drivers -v0x1acf8c0_1 .array/port v0x1acf8c0, 1; -v0x1acdc90_0 .net *"_s191", 10 0, v0x1acf8c0_1; 1 drivers -v0x1acdd70_0 .net *"_s23", 0 0, L_0x1aec660; 1 drivers -v0x1acde50_0 .net *"_s27", 0 0, L_0x1aec780; 1 drivers -v0x1acd0a0_0 .net *"_s31", 0 0, L_0x1aec8f0; 1 drivers -v0x1ace120_0 .net *"_s36", 0 0, L_0x1aecba0; 1 drivers -v0x1ace200_0 .net *"_s42", 0 0, L_0x1aece30; 1 drivers -v0x1ace2e0_0 .net *"_s46", 0 0, L_0x1aeced0; 1 drivers -v0x1ace3c0_0 .net *"_s50", 0 0, L_0x1ad0340; 1 drivers -v0x1ace4a0_0 .net *"_s55", 0 0, L_0x1aed150; 1 drivers -v0x1ace580_0 .net *"_s61", 0 0, L_0x1aed3c0; 1 drivers -v0x1ace660_0 .net *"_s65", 0 0, L_0x1aed4f0; 1 drivers -v0x1ace740_0 .net *"_s69", 0 0, L_0x1aed630; 1 drivers -v0x1ace820_0 .net *"_s74", 0 0, L_0x1aed590; 1 drivers -v0x1ace900_0 .net *"_s80", 0 0, L_0x1aed850; 1 drivers -v0x1ace9e0_0 .net *"_s84", 0 0, L_0x1aedb40; 1 drivers -v0x1aceac0_0 .net *"_s88", 0 0, L_0x1aeda80; 1 drivers -v0x1aceba0_0 .net *"_s93", 0 0, L_0x1aedbe0; 1 drivers -v0x1acec80_0 .net *"_s99", 0 0, L_0x1aedea0; 1 drivers -v0x1aced60_0 .net/s "accOut", 10 0, L_0x1adc160; alias, 1 drivers -v0x1acee40_0 .net "anyHasData", 0 0, L_0x1aecce0; 1 drivers -v0x1acef00_0 .net "anyReadAck", 0 0, L_0x1aed9e0; 1 drivers -v0x1acefc0_0 .net "anyWantData", 0 0, L_0x1aed240; 1 drivers -v0x1acf080_0 .net "anyWriteAck", 0 0, L_0x1aedfd0; 1 drivers -v0x1acf140_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers -o0x2acae8b59ef8 .functor BUFZ 15, C4; HiZ drive -v0x1acf1e0_0 .net "down", 14 0, o0x2acae8b59ef8; 0 drivers -v0x1acf2c0_0 .net "downOut", 14 0, L_0x1aef5f0; 1 drivers -v0x1acf3a0_0 .net "instruction", 17 0, L_0x1aecf70; 1 drivers -v0x1acf480 .array "instructions", 15 0, 17 0; -v0x1acf540_0 .var "last", 2 0; -o0x2acae8b59fb8 .functor BUFZ 15, C4; HiZ drive -v0x1acf620_0 .net "left", 14 0, o0x2acae8b59fb8; 0 drivers -v0x1acf700_0 .net "leftOut", 14 0, L_0x1aef330; 1 drivers -v0x1acf7e0_0 .var "mode", 2 0; -v0x1acf8c0 .array/s "outVals", 2 5, 10 0; -v0x1acfa00_0 .var "phase", 2 0; -v0x1acfae0_0 .net "portsHaveData", 5 2, L_0x1aec990; 1 drivers -v0x1acdf10_0 .net "portsWantData", 5 2, L_0x1aecfe0; 1 drivers -v0x1acdff0_0 .net "readAckIn", 5 2, L_0x1aed760; 1 drivers -v0x1acff90_0 .var "readAckOut", 5 2; -v0x1ad0050_0 .var "readTarget", 2 0; -v0x1ad0130_0 .var/s "readValue", 10 0; -L_0x2acae8b88018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1ad0210 .array "regVals", 0 7; -v0x1ad0210_0 .net/s v0x1ad0210 0, 10 0, L_0x2acae8b88018; 1 drivers -v0x1ad0210_1 .net/s v0x1ad0210 1, 10 0, L_0x1aec200; 1 drivers -v0x1ad0210_2 .net/s v0x1ad0210 2, 10 0, L_0x1aec2c0; 1 drivers -v0x1ad0210_3 .net/s v0x1ad0210 3, 10 0, L_0x1aec360; 1 drivers -v0x1ad0210_4 .net/s v0x1ad0210 4, 10 0, L_0x1aec430; 1 drivers -v0x1ad0210_5 .net/s v0x1ad0210 5, 10 0, L_0x1aec530; 1 drivers -o0x2acae8b5a378 .functor BUFZ 11, C4; HiZ drive -v0x1ad0210_6 .net/s v0x1ad0210 6, 10 0, o0x2acae8b5a378; 0 drivers -o0x2acae8b5a3a8 .functor BUFZ 11, C4; HiZ drive -v0x1ad0210_7 .net/s v0x1ad0210 7, 10 0, o0x2acae8b5a3a8; 0 drivers -v0x1ad0420_0 .net "right", 14 0, L_0x1aff8a0; alias, 1 drivers -v0x1ad0510_0 .net "rightOut", 14 0, L_0x1aefbe0; alias, 1 drivers -o0x2acae8b5a3d8 .functor BUFZ 15, C4; HiZ drive -v0x1ad05e0_0 .net "up", 14 0, o0x2acae8b5a3d8; 0 drivers -v0x1ad06a0_0 .net "upOut", 14 0, L_0x1aef100; 1 drivers -v0x1ad0780_0 .var "weHaveData", 5 2; -v0x1ad0860_0 .var "weWantData", 5 2; -v0x1ad0940_0 .net "writeAckIn", 5 2, L_0x1aedcb0; 1 drivers -v0x1ad0a20_0 .var "writeAckOut", 5 2; -v0x1ad0b00_0 .var "writeTarget", 2 0; -v0x1ad0be0_0 .var/s "writeValue", 10 0; -L_0x1aec2c0 .part o0x2acae8b59fb8, 0, 11; -L_0x1aec360 .part L_0x1aff8a0, 0, 11; -L_0x1aec430 .part o0x2acae8b5a3d8, 0, 11; -L_0x1aec530 .part o0x2acae8b59ef8, 0, 11; -L_0x1aec660 .part o0x2acae8b59fb8, 11, 1; -L_0x1aec780 .part L_0x1aff8a0, 11, 1; -L_0x1aec8f0 .part o0x2acae8b5a3d8, 11, 1; -L_0x1aec990 .concat8 [ 1 1 1 1], L_0x1aec660, L_0x1aec780, L_0x1aec8f0, L_0x1aecba0; -L_0x1aecba0 .part o0x2acae8b59ef8, 11, 1; -L_0x1aecce0 .reduce/or L_0x1aec990; -L_0x1aece30 .part o0x2acae8b59fb8, 12, 1; -L_0x1aeced0 .part L_0x1aff8a0, 12, 1; -L_0x1ad0340 .part o0x2acae8b5a3d8, 12, 1; -L_0x1aecfe0 .concat8 [ 1 1 1 1], L_0x1aece30, L_0x1aeced0, L_0x1ad0340, L_0x1aed150; -L_0x1aed150 .part o0x2acae8b59ef8, 12, 1; -L_0x1aed240 .reduce/or L_0x1aecfe0; -L_0x1aed3c0 .part o0x2acae8b59fb8, 13, 1; -L_0x1aed4f0 .part L_0x1aff8a0, 13, 1; -L_0x1aed630 .part o0x2acae8b5a3d8, 13, 1; -L_0x1aed760 .concat8 [ 1 1 1 1], L_0x1aed3c0, L_0x1aed4f0, L_0x1aed630, L_0x1aed590; -L_0x1aed590 .part o0x2acae8b59ef8, 13, 1; -L_0x1aed9e0 .reduce/or L_0x1aed760; -L_0x1aed850 .part o0x2acae8b59fb8, 14, 1; -L_0x1aedb40 .part L_0x1aff8a0, 14, 1; -L_0x1aeda80 .part o0x2acae8b5a3d8, 14, 1; -L_0x1aedcb0 .concat8 [ 1 1 1 1], L_0x1aed850, L_0x1aedb40, L_0x1aeda80, L_0x1aedbe0; -L_0x1aedbe0 .part o0x2acae8b59ef8, 14, 1; -L_0x1aedfd0 .reduce/or L_0x1aedcb0; -L_0x1aedea0 .part v0x1acff90_0, 0, 1; -L_0x1aee1b0 .part v0x1acff90_0, 1, 1; -L_0x1aee0c0 .part v0x1acff90_0, 2, 1; -L_0x1aee3a0 .part v0x1acff90_0, 3, 1; -L_0x1aee2a0 .part v0x1ad0a20_0, 0, 1; -L_0x1aee5e0 .part v0x1ad0a20_0, 1, 1; -L_0x1aee4d0 .part v0x1ad0a20_0, 2, 1; -L_0x1aee7a0 .part v0x1ad0a20_0, 3, 1; -L_0x1aee680 .part v0x1ad0860_0, 0, 1; -L_0x1aeea00 .part v0x1ad0860_0, 1, 1; -L_0x1aee8d0 .part v0x1ad0860_0, 2, 1; -L_0x1aeebe0 .part v0x1ad0860_0, 3, 1; -L_0x1aeeaa0 .part v0x1ad0780_0, 0, 1; -L_0x1aeedd0 .part v0x1ad0780_0, 1, 1; -L_0x1aeec80 .part v0x1ad0780_0, 2, 1; -L_0x1aeed20 .part v0x1ad0780_0, 3, 1; -L_0x1aeee70 .array/port v0x1acf480, L_0x1aef1d0; -L_0x1aef1d0 .concat [ 4 2 0 0], v0x1acc670_0, L_0x2acae8b88060; -LS_0x1aef100_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_2, L_0x1aeec80, L_0x1aee8d0, L_0x1aee4d0; -LS_0x1aef100_0_4 .concat8 [ 1 0 0 0], L_0x1aee0c0; -L_0x1aef100 .concat8 [ 14 1 0 0], LS_0x1aef100_0_0, LS_0x1aef100_0_4; -LS_0x1aef5f0_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_3, L_0x1aeed20, L_0x1aeebe0, L_0x1aee7a0; -LS_0x1aef5f0_0_4 .concat8 [ 1 0 0 0], L_0x1aee3a0; -L_0x1aef5f0 .concat8 [ 14 1 0 0], LS_0x1aef5f0_0_0, LS_0x1aef5f0_0_4; -LS_0x1aef330_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_0, L_0x1aeeaa0, L_0x1aee680, L_0x1aee2a0; -LS_0x1aef330_0_4 .concat8 [ 1 0 0 0], L_0x1aedea0; -L_0x1aef330 .concat8 [ 14 1 0 0], LS_0x1aef330_0_0, LS_0x1aef330_0_4; -LS_0x1aefbe0_0_0 .concat8 [ 11 1 1 1], v0x1acf8c0_1, L_0x1aeedd0, L_0x1aeea00, L_0x1aee5e0; -LS_0x1aefbe0_0_4 .concat8 [ 1 0 0 0], L_0x1aee1b0; -L_0x1aefbe0 .concat8 [ 14 1 0 0], LS_0x1aefbe0_0_0, LS_0x1aefbe0_0_4; -L_0x1aef8d0 .part L_0x1aecf70, 14, 4; -L_0x1aefff0 .part L_0x1aecf70, 11, 3; -L_0x1aefe00 .part L_0x1aecf70, 8, 3; -L_0x1af0240 .part L_0x1aecf70, 10, 4; -L_0x1af0090 .part L_0x1aecf70, 0, 11; -S_0x1ad0e60 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x1a0c690; +P_0x2697e50 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x2697e90 .param/str "memFile" 0 3 60, "regTest/left.dat"; +L_0x26a8160 .functor BUFZ 11, v0x26980f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26b8200 .functor BUFZ 11, v0x26980f0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26b8f70 .functor BUFZ 18, L_0x26bae70, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x26980f0_0 .var/s "ACC", 10 0; +v0x26981b0_0 .var/s "BAK", 10 0; +v0x2698290_0 .net "DST", 2 0, L_0x26bbff0; 1 drivers +v0x2698380_0 .net/s "IMM", 10 0, L_0x26bc090; 1 drivers +v0x2698460_0 .net "INST", 3 0, L_0x26bb8d0; 1 drivers +v0x2698590_0 .net "LABEL", 3 0, L_0x26bc240; 1 drivers +v0x2698670_0 .var "PC", 3 0; +v0x2698750_0 .var "PCNEXT", 3 0; +v0x2698830_0 .net "SRC", 2 0, L_0x26bbe00; 1 drivers +v0x26989a0_0 .net *"_s103", 0 0, L_0x26ba1b0; 1 drivers +v0x2698a80_0 .net *"_s107", 0 0, L_0x26ba0c0; 1 drivers +v0x2698b60_0 .net *"_s111", 0 0, L_0x26ba3a0; 1 drivers +v0x2698c40_0 .net *"_s115", 0 0, L_0x26ba2a0; 1 drivers +v0x2698d20_0 .net *"_s119", 0 0, L_0x26ba5e0; 1 drivers +v0x2698e00_0 .net *"_s123", 0 0, L_0x26ba4d0; 1 drivers +v0x2698ee0_0 .net *"_s127", 0 0, L_0x26ba7a0; 1 drivers +v0x2698fc0_0 .net *"_s131", 0 0, L_0x26ba680; 1 drivers +v0x2699170_0 .net *"_s135", 0 0, L_0x26baa00; 1 drivers +v0x2699210_0 .net *"_s139", 0 0, L_0x26ba8d0; 1 drivers +v0x26992f0_0 .net *"_s143", 0 0, L_0x26babe0; 1 drivers +v0x26993d0_0 .net *"_s147", 0 0, L_0x26baaa0; 1 drivers +v0x26994b0_0 .net *"_s151", 0 0, L_0x26badd0; 1 drivers +v0x2699590_0 .net *"_s155", 0 0, L_0x26bac80; 1 drivers +v0x2699670_0 .net *"_s159", 0 0, L_0x26bad20; 1 drivers +v0x2699750_0 .net *"_s160", 17 0, L_0x26bae70; 1 drivers +v0x2699830_0 .net *"_s162", 5 0, L_0x26bb1d0; 1 drivers +L_0x2ace9a32a060 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x2699910_0 .net *"_s165", 1 0, L_0x2ace9a32a060; 1 drivers +v0x269b8c0_2 .array/port v0x269b8c0, 2; +v0x26999f0_0 .net *"_s173", 10 0, v0x269b8c0_2; 1 drivers +v0x269b8c0_3 .array/port v0x269b8c0, 3; +v0x2699ad0_0 .net *"_s179", 10 0, v0x269b8c0_3; 1 drivers +v0x269b8c0_0 .array/port v0x269b8c0, 0; +v0x2699bb0_0 .net *"_s185", 10 0, v0x269b8c0_0; 1 drivers +v0x269b8c0_1 .array/port v0x269b8c0, 1; +v0x2699c90_0 .net *"_s191", 10 0, v0x269b8c0_1; 1 drivers +v0x2699d70_0 .net *"_s23", 0 0, L_0x26b8660; 1 drivers +v0x2699e50_0 .net *"_s27", 0 0, L_0x26b8780; 1 drivers +v0x26990a0_0 .net *"_s31", 0 0, L_0x26b88f0; 1 drivers +v0x269a120_0 .net *"_s36", 0 0, L_0x26b8ba0; 1 drivers +v0x269a200_0 .net *"_s42", 0 0, L_0x26b8e30; 1 drivers +v0x269a2e0_0 .net *"_s46", 0 0, L_0x26b8ed0; 1 drivers +v0x269a3c0_0 .net *"_s50", 0 0, L_0x269c340; 1 drivers +v0x269a4a0_0 .net *"_s55", 0 0, L_0x26b9150; 1 drivers +v0x269a580_0 .net *"_s61", 0 0, L_0x26b93c0; 1 drivers +v0x269a660_0 .net *"_s65", 0 0, L_0x26b94f0; 1 drivers +v0x269a740_0 .net *"_s69", 0 0, L_0x26b9630; 1 drivers +v0x269a820_0 .net *"_s74", 0 0, L_0x26b9590; 1 drivers +v0x269a900_0 .net *"_s80", 0 0, L_0x26b9850; 1 drivers +v0x269a9e0_0 .net *"_s84", 0 0, L_0x26b9b40; 1 drivers +v0x269aac0_0 .net *"_s88", 0 0, L_0x26b9a80; 1 drivers +v0x269aba0_0 .net *"_s93", 0 0, L_0x26b9be0; 1 drivers +v0x269ac80_0 .net *"_s99", 0 0, L_0x26b9ea0; 1 drivers +v0x269ad60_0 .net/s "accOut", 10 0, L_0x26a8160; alias, 1 drivers +v0x269ae40_0 .net "anyHasData", 0 0, L_0x26b8ce0; 1 drivers +v0x269af00_0 .net "anyReadAck", 0 0, L_0x26b99e0; 1 drivers +v0x269afc0_0 .net "anyWantData", 0 0, L_0x26b9240; 1 drivers +v0x269b080_0 .net "anyWriteAck", 0 0, L_0x26b9fd0; 1 drivers +v0x269b140_0 .net "clk", 0 0, v0x26a7f40_0; alias, 1 drivers +o0x2ace9a2fbef8 .functor BUFZ 15, C4; HiZ drive +v0x269b1e0_0 .net "down", 14 0, o0x2ace9a2fbef8; 0 drivers +v0x269b2c0_0 .net "downOut", 14 0, L_0x26bb5f0; 1 drivers +v0x269b3a0_0 .net "instruction", 17 0, L_0x26b8f70; 1 drivers +v0x269b480 .array "instructions", 15 0, 17 0; +v0x269b540_0 .var "last", 2 0; +o0x2ace9a2fbfb8 .functor BUFZ 15, C4; HiZ drive +v0x269b620_0 .net "left", 14 0, o0x2ace9a2fbfb8; 0 drivers +v0x269b700_0 .net "leftOut", 14 0, L_0x26bb330; 1 drivers +v0x269b7e0_0 .var "mode", 2 0; +v0x269b8c0 .array/s "outVals", 2 5, 10 0; +v0x269ba00_0 .var "phase", 2 0; +v0x269bae0_0 .net "portsHaveData", 5 2, L_0x26b8990; 1 drivers +v0x2699f10_0 .net "portsWantData", 5 2, L_0x26b8fe0; 1 drivers +v0x2699ff0_0 .net "readAckIn", 5 2, L_0x26b9760; 1 drivers +v0x269bf90_0 .var "readAckOut", 5 2; +v0x269c050_0 .var "readTarget", 2 0; +v0x269c130_0 .var/s "readValue", 10 0; +L_0x2ace9a32a018 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x269c210 .array "regVals", 0 7; +v0x269c210_0 .net/s v0x269c210 0, 10 0, L_0x2ace9a32a018; 1 drivers +v0x269c210_1 .net/s v0x269c210 1, 10 0, L_0x26b8200; 1 drivers +v0x269c210_2 .net/s v0x269c210 2, 10 0, L_0x26b82c0; 1 drivers +v0x269c210_3 .net/s v0x269c210 3, 10 0, L_0x26b8360; 1 drivers +v0x269c210_4 .net/s v0x269c210 4, 10 0, L_0x26b8430; 1 drivers +v0x269c210_5 .net/s v0x269c210 5, 10 0, L_0x26b8530; 1 drivers +o0x2ace9a2fc378 .functor BUFZ 11, C4; HiZ drive +v0x269c210_6 .net/s v0x269c210 6, 10 0, o0x2ace9a2fc378; 0 drivers +o0x2ace9a2fc3a8 .functor BUFZ 11, C4; HiZ drive +v0x269c210_7 .net/s v0x269c210 7, 10 0, o0x2ace9a2fc3a8; 0 drivers +v0x269c420_0 .net "right", 14 0, L_0x26cb8a0; alias, 1 drivers +v0x269c510_0 .net "rightOut", 14 0, L_0x26bbbe0; alias, 1 drivers +o0x2ace9a2fc3d8 .functor BUFZ 15, C4; HiZ drive +v0x269c5e0_0 .net "up", 14 0, o0x2ace9a2fc3d8; 0 drivers +v0x269c6a0_0 .net "upOut", 14 0, L_0x26bb100; 1 drivers +v0x269c780_0 .var "weHaveData", 5 2; +v0x269c860_0 .var "weWantData", 5 2; +v0x269c940_0 .net "writeAckIn", 5 2, L_0x26b9cb0; 1 drivers +v0x269ca20_0 .var "writeAckOut", 5 2; +v0x269cb00_0 .var "writeTarget", 2 0; +v0x269cbe0_0 .var/s "writeValue", 10 0; +L_0x26b82c0 .part o0x2ace9a2fbfb8, 0, 11; +L_0x26b8360 .part L_0x26cb8a0, 0, 11; +L_0x26b8430 .part o0x2ace9a2fc3d8, 0, 11; +L_0x26b8530 .part o0x2ace9a2fbef8, 0, 11; +L_0x26b8660 .part o0x2ace9a2fbfb8, 11, 1; +L_0x26b8780 .part L_0x26cb8a0, 11, 1; +L_0x26b88f0 .part o0x2ace9a2fc3d8, 11, 1; +L_0x26b8990 .concat8 [ 1 1 1 1], L_0x26b8660, L_0x26b8780, L_0x26b88f0, L_0x26b8ba0; +L_0x26b8ba0 .part o0x2ace9a2fbef8, 11, 1; +L_0x26b8ce0 .reduce/or L_0x26b8990; +L_0x26b8e30 .part o0x2ace9a2fbfb8, 12, 1; +L_0x26b8ed0 .part L_0x26cb8a0, 12, 1; +L_0x269c340 .part o0x2ace9a2fc3d8, 12, 1; +L_0x26b8fe0 .concat8 [ 1 1 1 1], L_0x26b8e30, L_0x26b8ed0, L_0x269c340, L_0x26b9150; +L_0x26b9150 .part o0x2ace9a2fbef8, 12, 1; +L_0x26b9240 .reduce/or L_0x26b8fe0; +L_0x26b93c0 .part o0x2ace9a2fbfb8, 13, 1; +L_0x26b94f0 .part L_0x26cb8a0, 13, 1; +L_0x26b9630 .part o0x2ace9a2fc3d8, 13, 1; +L_0x26b9760 .concat8 [ 1 1 1 1], L_0x26b93c0, L_0x26b94f0, L_0x26b9630, L_0x26b9590; +L_0x26b9590 .part o0x2ace9a2fbef8, 13, 1; +L_0x26b99e0 .reduce/or L_0x26b9760; +L_0x26b9850 .part o0x2ace9a2fbfb8, 14, 1; +L_0x26b9b40 .part L_0x26cb8a0, 14, 1; +L_0x26b9a80 .part o0x2ace9a2fc3d8, 14, 1; +L_0x26b9cb0 .concat8 [ 1 1 1 1], L_0x26b9850, L_0x26b9b40, L_0x26b9a80, L_0x26b9be0; +L_0x26b9be0 .part o0x2ace9a2fbef8, 14, 1; +L_0x26b9fd0 .reduce/or L_0x26b9cb0; +L_0x26b9ea0 .part v0x269bf90_0, 0, 1; +L_0x26ba1b0 .part v0x269bf90_0, 1, 1; +L_0x26ba0c0 .part v0x269bf90_0, 2, 1; +L_0x26ba3a0 .part v0x269bf90_0, 3, 1; +L_0x26ba2a0 .part v0x269ca20_0, 0, 1; +L_0x26ba5e0 .part v0x269ca20_0, 1, 1; +L_0x26ba4d0 .part v0x269ca20_0, 2, 1; +L_0x26ba7a0 .part v0x269ca20_0, 3, 1; +L_0x26ba680 .part v0x269c860_0, 0, 1; +L_0x26baa00 .part v0x269c860_0, 1, 1; +L_0x26ba8d0 .part v0x269c860_0, 2, 1; +L_0x26babe0 .part v0x269c860_0, 3, 1; +L_0x26baaa0 .part v0x269c780_0, 0, 1; +L_0x26badd0 .part v0x269c780_0, 1, 1; +L_0x26bac80 .part v0x269c780_0, 2, 1; +L_0x26bad20 .part v0x269c780_0, 3, 1; +L_0x26bae70 .array/port v0x269b480, L_0x26bb1d0; +L_0x26bb1d0 .concat [ 4 2 0 0], v0x2698670_0, L_0x2ace9a32a060; +LS_0x26bb100_0_0 .concat8 [ 11 1 1 1], v0x269b8c0_2, L_0x26bac80, L_0x26ba8d0, L_0x26ba4d0; +LS_0x26bb100_0_4 .concat8 [ 1 0 0 0], L_0x26ba0c0; +L_0x26bb100 .concat8 [ 14 1 0 0], LS_0x26bb100_0_0, LS_0x26bb100_0_4; +LS_0x26bb5f0_0_0 .concat8 [ 11 1 1 1], v0x269b8c0_3, L_0x26bad20, L_0x26babe0, L_0x26ba7a0; +LS_0x26bb5f0_0_4 .concat8 [ 1 0 0 0], L_0x26ba3a0; +L_0x26bb5f0 .concat8 [ 14 1 0 0], LS_0x26bb5f0_0_0, LS_0x26bb5f0_0_4; +LS_0x26bb330_0_0 .concat8 [ 11 1 1 1], v0x269b8c0_0, L_0x26baaa0, L_0x26ba680, L_0x26ba2a0; +LS_0x26bb330_0_4 .concat8 [ 1 0 0 0], L_0x26b9ea0; +L_0x26bb330 .concat8 [ 14 1 0 0], LS_0x26bb330_0_0, LS_0x26bb330_0_4; +LS_0x26bbbe0_0_0 .concat8 [ 11 1 1 1], v0x269b8c0_1, L_0x26badd0, L_0x26baa00, L_0x26ba5e0; +LS_0x26bbbe0_0_4 .concat8 [ 1 0 0 0], L_0x26ba1b0; +L_0x26bbbe0 .concat8 [ 14 1 0 0], LS_0x26bbbe0_0_0, LS_0x26bbbe0_0_4; +L_0x26bb8d0 .part L_0x26b8f70, 14, 4; +L_0x26bbff0 .part L_0x26b8f70, 11, 3; +L_0x26bbe00 .part L_0x26b8f70, 8, 3; +L_0x26bc240 .part L_0x26b8f70, 10, 4; +L_0x26bc090 .part L_0x26b8f70, 0, 11; +S_0x269ce60 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x25d8690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -575,175 +575,175 @@ S_0x1ad0e60 .scope module, "right" "tis100" 2 28, 3 49 0, S_0x1a0c690; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1ad1030 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1ad1070 .param/str "memFile" 0 3 60, "regTest/right.dat"; -L_0x1aeff30 .functor BUFZ 11, v0x1ad13e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1af0130 .functor BUFZ 11, v0x1ad13e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1af1080 .functor BUFZ 18, L_0x1af2ff0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1ad13e0_0 .var/s "ACC", 10 0; -v0x1ad14e0_0 .var/s "BAK", 10 0; -v0x1ad15c0_0 .net "DST", 2 0, L_0x1af40f0; 1 drivers -v0x1ad1680_0 .net/s "IMM", 10 0, L_0x1af4190; 1 drivers -v0x1ad1760_0 .net "INST", 3 0, L_0x1af3a10; 1 drivers -v0x1ad1840_0 .net "LABEL", 3 0, L_0x1af4340; 1 drivers -v0x1ad1920_0 .var "PC", 3 0; -v0x1ad1a00_0 .var "PCNEXT", 3 0; -v0x1ad1ae0_0 .net "SRC", 2 0, L_0x1af3f00; 1 drivers -v0x1ad1c50_0 .net *"_s103", 0 0, L_0x1af2330; 1 drivers -v0x1ad1d30_0 .net *"_s107", 0 0, L_0x1af2240; 1 drivers -v0x1ad1e10_0 .net *"_s111", 0 0, L_0x1af2520; 1 drivers -v0x1ad1ef0_0 .net *"_s115", 0 0, L_0x1af2420; 1 drivers -v0x1ad1fd0_0 .net *"_s119", 0 0, L_0x1af2760; 1 drivers -v0x1ad20b0_0 .net *"_s123", 0 0, L_0x1af2650; 1 drivers -v0x1ad2190_0 .net *"_s127", 0 0, L_0x1af2920; 1 drivers -v0x1ad2270_0 .net *"_s131", 0 0, L_0x1af2800; 1 drivers -v0x1ad2420_0 .net *"_s135", 0 0, L_0x1af2b80; 1 drivers -v0x1ad24c0_0 .net *"_s139", 0 0, L_0x1af2a50; 1 drivers -v0x1ad25a0_0 .net *"_s143", 0 0, L_0x1af2d60; 1 drivers -v0x1ad2680_0 .net *"_s147", 0 0, L_0x1af2c20; 1 drivers -v0x1ad2760_0 .net *"_s151", 0 0, L_0x1af2f50; 1 drivers -v0x1ad2840_0 .net *"_s155", 0 0, L_0x1af2e00; 1 drivers -v0x1ad2920_0 .net *"_s159", 0 0, L_0x1af2ea0; 1 drivers -v0x1ad2a00_0 .net *"_s160", 17 0, L_0x1af2ff0; 1 drivers -v0x1ad2ae0_0 .net *"_s162", 5 0, L_0x1af3350; 1 drivers -L_0x2acae8b880f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1ad2bc0_0 .net *"_s165", 1 0, L_0x2acae8b880f0; 1 drivers -v0x1ad4af0_2 .array/port v0x1ad4af0, 2; -v0x1ad2ca0_0 .net *"_s173", 10 0, v0x1ad4af0_2; 1 drivers -v0x1ad4af0_3 .array/port v0x1ad4af0, 3; -v0x1ad2d80_0 .net *"_s179", 10 0, v0x1ad4af0_3; 1 drivers -v0x1ad4af0_0 .array/port v0x1ad4af0, 0; -v0x1ad2e60_0 .net *"_s185", 10 0, v0x1ad4af0_0; 1 drivers -v0x1ad4af0_1 .array/port v0x1ad4af0, 1; -v0x1ad2f40_0 .net *"_s191", 10 0, v0x1ad4af0_1; 1 drivers -v0x1ad3020_0 .net *"_s23", 0 0, L_0x1af07b0; 1 drivers -v0x1ad3100_0 .net *"_s27", 0 0, L_0x1af0910; 1 drivers -v0x1ad2350_0 .net *"_s31", 0 0, L_0x1af09e0; 1 drivers -v0x1ad33d0_0 .net *"_s36", 0 0, L_0x1af0cb0; 1 drivers -v0x1ad34b0_0 .net *"_s42", 0 0, L_0x1af0f40; 1 drivers -v0x1ad3590_0 .net *"_s46", 0 0, L_0x1af0fe0; 1 drivers -v0x1ad3670_0 .net *"_s50", 0 0, L_0x1af10f0; 1 drivers -v0x1ad3750_0 .net *"_s55", 0 0, L_0x1af1300; 1 drivers -v0x1ad3830_0 .net *"_s61", 0 0, L_0x1af1570; 1 drivers -v0x1ad3910_0 .net *"_s65", 0 0, L_0x1af1610; 1 drivers -v0x1ad39f0_0 .net *"_s69", 0 0, L_0x1af17e0; 1 drivers -v0x1ad3ad0_0 .net *"_s74", 0 0, L_0x1af1740; 1 drivers -v0x1ad3bb0_0 .net *"_s80", 0 0, L_0x1af19d0; 1 drivers -v0x1ad3c90_0 .net *"_s84", 0 0, L_0x1af1cc0; 1 drivers -v0x1ad3d70_0 .net *"_s88", 0 0, L_0x1af1c00; 1 drivers -v0x1ad3e50_0 .net *"_s93", 0 0, L_0x1af1d60; 1 drivers -v0x1ad3f30_0 .net *"_s99", 0 0, L_0x1af2020; 1 drivers -v0x1ad4010_0 .net/s "accOut", 10 0, L_0x1aeff30; alias, 1 drivers -v0x1ad40f0_0 .net "anyHasData", 0 0, L_0x1af0df0; 1 drivers -v0x1ad41b0_0 .net "anyReadAck", 0 0, L_0x1af1b60; 1 drivers -v0x1ad4270_0 .net "anyWantData", 0 0, L_0x1af13f0; 1 drivers -v0x1ad4330_0 .net "anyWriteAck", 0 0, L_0x1af2150; 1 drivers -v0x1ad43f0_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers -o0x2acae8b5b128 .functor BUFZ 15, C4; HiZ drive -v0x1ad4490_0 .net "down", 14 0, o0x2acae8b5b128; 0 drivers -v0x1ad4570_0 .net "downOut", 14 0, L_0x1af3770; 1 drivers -v0x1ad4650_0 .net "instruction", 17 0, L_0x1af1080; 1 drivers -v0x1ad4730 .array "instructions", 15 0, 17 0; -v0x1ad47f0_0 .var "last", 2 0; -v0x1ad48d0_0 .net "left", 14 0, L_0x1b00270; alias, 1 drivers -v0x1ad4990_0 .net "leftOut", 14 0, L_0x1af34b0; alias, 1 drivers -v0x1ad4a30_0 .var "mode", 2 0; -v0x1ad4af0 .array/s "outVals", 2 5, 10 0; -v0x1ad4c60_0 .var "phase", 2 0; -v0x1ad4d40_0 .net "portsHaveData", 5 2, L_0x1af0ad0; 1 drivers -v0x1ad31a0_0 .net "portsWantData", 5 2, L_0x1af1190; 1 drivers -v0x1ad3280_0 .net "readAckIn", 5 2, L_0x1af1880; 1 drivers -v0x1ad51f0_0 .var "readAckOut", 5 2; -v0x1ad5290_0 .var "readTarget", 2 0; -v0x1ad5330_0 .var/s "readValue", 10 0; -L_0x2acae8b880a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1ad53d0 .array "regVals", 0 7; -v0x1ad53d0_0 .net/s v0x1ad53d0 0, 10 0, L_0x2acae8b880a8; 1 drivers -v0x1ad53d0_1 .net/s v0x1ad53d0 1, 10 0, L_0x1af0130; 1 drivers -v0x1ad53d0_2 .net/s v0x1ad53d0 2, 10 0, L_0x1af04a0; 1 drivers -v0x1ad53d0_3 .net/s v0x1ad53d0 3, 10 0, L_0x1af0540; 1 drivers -v0x1ad53d0_4 .net/s v0x1ad53d0 4, 10 0, L_0x1af05e0; 1 drivers -v0x1ad53d0_5 .net/s v0x1ad53d0 5, 10 0, L_0x1af0680; 1 drivers -o0x2acae8b5b548 .functor BUFZ 11, C4; HiZ drive -v0x1ad53d0_6 .net/s v0x1ad53d0 6, 10 0, o0x2acae8b5b548; 0 drivers -o0x2acae8b5b578 .functor BUFZ 11, C4; HiZ drive -v0x1ad53d0_7 .net/s v0x1ad53d0 7, 10 0, o0x2acae8b5b578; 0 drivers -o0x2acae8b5b5a8 .functor BUFZ 15, C4; HiZ drive -v0x1ad55e0_0 .net "right", 14 0, o0x2acae8b5b5a8; 0 drivers -v0x1ad56c0_0 .net "rightOut", 14 0, L_0x1af3ce0; 1 drivers -o0x2acae8b5b608 .functor BUFZ 15, C4; HiZ drive -v0x1ad57a0_0 .net "up", 14 0, o0x2acae8b5b608; 0 drivers -v0x1ad5880_0 .net "upOut", 14 0, L_0x1af3260; 1 drivers -v0x1ad5960_0 .var "weHaveData", 5 2; -v0x1ad5a40_0 .var "weWantData", 5 2; -v0x1ad5b20_0 .net "writeAckIn", 5 2, L_0x1af1e30; 1 drivers -v0x1ad5c00_0 .var "writeAckOut", 5 2; -v0x1ad5ce0_0 .var "writeTarget", 2 0; -v0x1ad5dc0_0 .var/s "writeValue", 10 0; -L_0x1af04a0 .part L_0x1b00270, 0, 11; -L_0x1af0540 .part o0x2acae8b5b5a8, 0, 11; -L_0x1af05e0 .part o0x2acae8b5b608, 0, 11; -L_0x1af0680 .part o0x2acae8b5b128, 0, 11; -L_0x1af07b0 .part L_0x1b00270, 11, 1; -L_0x1af0910 .part o0x2acae8b5b5a8, 11, 1; -L_0x1af09e0 .part o0x2acae8b5b608, 11, 1; -L_0x1af0ad0 .concat8 [ 1 1 1 1], L_0x1af07b0, L_0x1af0910, L_0x1af09e0, L_0x1af0cb0; -L_0x1af0cb0 .part o0x2acae8b5b128, 11, 1; -L_0x1af0df0 .reduce/or L_0x1af0ad0; -L_0x1af0f40 .part L_0x1b00270, 12, 1; -L_0x1af0fe0 .part o0x2acae8b5b5a8, 12, 1; -L_0x1af10f0 .part o0x2acae8b5b608, 12, 1; -L_0x1af1190 .concat8 [ 1 1 1 1], L_0x1af0f40, L_0x1af0fe0, L_0x1af10f0, L_0x1af1300; -L_0x1af1300 .part o0x2acae8b5b128, 12, 1; -L_0x1af13f0 .reduce/or L_0x1af1190; -L_0x1af1570 .part L_0x1b00270, 13, 1; -L_0x1af1610 .part o0x2acae8b5b5a8, 13, 1; -L_0x1af17e0 .part o0x2acae8b5b608, 13, 1; -L_0x1af1880 .concat8 [ 1 1 1 1], L_0x1af1570, L_0x1af1610, L_0x1af17e0, L_0x1af1740; -L_0x1af1740 .part o0x2acae8b5b128, 13, 1; -L_0x1af1b60 .reduce/or L_0x1af1880; -L_0x1af19d0 .part L_0x1b00270, 14, 1; -L_0x1af1cc0 .part o0x2acae8b5b5a8, 14, 1; -L_0x1af1c00 .part o0x2acae8b5b608, 14, 1; -L_0x1af1e30 .concat8 [ 1 1 1 1], L_0x1af19d0, L_0x1af1cc0, L_0x1af1c00, L_0x1af1d60; -L_0x1af1d60 .part o0x2acae8b5b128, 14, 1; -L_0x1af2150 .reduce/or L_0x1af1e30; -L_0x1af2020 .part v0x1ad51f0_0, 0, 1; -L_0x1af2330 .part v0x1ad51f0_0, 1, 1; -L_0x1af2240 .part v0x1ad51f0_0, 2, 1; -L_0x1af2520 .part v0x1ad51f0_0, 3, 1; -L_0x1af2420 .part v0x1ad5c00_0, 0, 1; -L_0x1af2760 .part v0x1ad5c00_0, 1, 1; -L_0x1af2650 .part v0x1ad5c00_0, 2, 1; -L_0x1af2920 .part v0x1ad5c00_0, 3, 1; -L_0x1af2800 .part v0x1ad5a40_0, 0, 1; -L_0x1af2b80 .part v0x1ad5a40_0, 1, 1; -L_0x1af2a50 .part v0x1ad5a40_0, 2, 1; -L_0x1af2d60 .part v0x1ad5a40_0, 3, 1; -L_0x1af2c20 .part v0x1ad5960_0, 0, 1; -L_0x1af2f50 .part v0x1ad5960_0, 1, 1; -L_0x1af2e00 .part v0x1ad5960_0, 2, 1; -L_0x1af2ea0 .part v0x1ad5960_0, 3, 1; -L_0x1af2ff0 .array/port v0x1ad4730, L_0x1af3350; -L_0x1af3350 .concat [ 4 2 0 0], v0x1ad1920_0, L_0x2acae8b880f0; -LS_0x1af3260_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_2, L_0x1af2e00, L_0x1af2a50, L_0x1af2650; -LS_0x1af3260_0_4 .concat8 [ 1 0 0 0], L_0x1af2240; -L_0x1af3260 .concat8 [ 14 1 0 0], LS_0x1af3260_0_0, LS_0x1af3260_0_4; -LS_0x1af3770_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_3, L_0x1af2ea0, L_0x1af2d60, L_0x1af2920; -LS_0x1af3770_0_4 .concat8 [ 1 0 0 0], L_0x1af2520; -L_0x1af3770 .concat8 [ 14 1 0 0], LS_0x1af3770_0_0, LS_0x1af3770_0_4; -LS_0x1af34b0_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_0, L_0x1af2c20, L_0x1af2800, L_0x1af2420; -LS_0x1af34b0_0_4 .concat8 [ 1 0 0 0], L_0x1af2020; -L_0x1af34b0 .concat8 [ 14 1 0 0], LS_0x1af34b0_0_0, LS_0x1af34b0_0_4; -LS_0x1af3ce0_0_0 .concat8 [ 11 1 1 1], v0x1ad4af0_1, L_0x1af2f50, L_0x1af2b80, L_0x1af2760; -LS_0x1af3ce0_0_4 .concat8 [ 1 0 0 0], L_0x1af2330; -L_0x1af3ce0 .concat8 [ 14 1 0 0], LS_0x1af3ce0_0_0, LS_0x1af3ce0_0_4; -L_0x1af3a10 .part L_0x1af1080, 14, 4; -L_0x1af40f0 .part L_0x1af1080, 11, 3; -L_0x1af3f00 .part L_0x1af1080, 8, 3; -L_0x1af4340 .part L_0x1af1080, 10, 4; -L_0x1af4190 .part L_0x1af1080, 0, 11; -S_0x1ad6040 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x1a0c690; +P_0x269d030 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x269d070 .param/str "memFile" 0 3 60, "regTest/right.dat"; +L_0x26bbf30 .functor BUFZ 11, v0x269d3e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26bc130 .functor BUFZ 11, v0x269d3e0_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26bd080 .functor BUFZ 18, L_0x26beff0, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x269d3e0_0 .var/s "ACC", 10 0; +v0x269d4e0_0 .var/s "BAK", 10 0; +v0x269d5c0_0 .net "DST", 2 0, L_0x26c00f0; 1 drivers +v0x269d680_0 .net/s "IMM", 10 0, L_0x26c0190; 1 drivers +v0x269d760_0 .net "INST", 3 0, L_0x26bfa10; 1 drivers +v0x269d840_0 .net "LABEL", 3 0, L_0x26c0340; 1 drivers +v0x269d920_0 .var "PC", 3 0; +v0x269da00_0 .var "PCNEXT", 3 0; +v0x269dae0_0 .net "SRC", 2 0, L_0x26bff00; 1 drivers +v0x269dc50_0 .net *"_s103", 0 0, L_0x26be330; 1 drivers +v0x269dd30_0 .net *"_s107", 0 0, L_0x26be240; 1 drivers +v0x269de10_0 .net *"_s111", 0 0, L_0x26be520; 1 drivers +v0x269def0_0 .net *"_s115", 0 0, L_0x26be420; 1 drivers +v0x269dfd0_0 .net *"_s119", 0 0, L_0x26be760; 1 drivers +v0x269e0b0_0 .net *"_s123", 0 0, L_0x26be650; 1 drivers +v0x269e190_0 .net *"_s127", 0 0, L_0x26be920; 1 drivers +v0x269e270_0 .net *"_s131", 0 0, L_0x26be800; 1 drivers +v0x269e420_0 .net *"_s135", 0 0, L_0x26beb80; 1 drivers +v0x269e4c0_0 .net *"_s139", 0 0, L_0x26bea50; 1 drivers +v0x269e5a0_0 .net *"_s143", 0 0, L_0x26bed60; 1 drivers +v0x269e680_0 .net *"_s147", 0 0, L_0x26bec20; 1 drivers +v0x269e760_0 .net *"_s151", 0 0, L_0x26bef50; 1 drivers +v0x269e840_0 .net *"_s155", 0 0, L_0x26bee00; 1 drivers +v0x269e920_0 .net *"_s159", 0 0, L_0x26beea0; 1 drivers +v0x269ea00_0 .net *"_s160", 17 0, L_0x26beff0; 1 drivers +v0x269eae0_0 .net *"_s162", 5 0, L_0x26bf350; 1 drivers +L_0x2ace9a32a0f0 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x269ebc0_0 .net *"_s165", 1 0, L_0x2ace9a32a0f0; 1 drivers +v0x26a0af0_2 .array/port v0x26a0af0, 2; +v0x269eca0_0 .net *"_s173", 10 0, v0x26a0af0_2; 1 drivers +v0x26a0af0_3 .array/port v0x26a0af0, 3; +v0x269ed80_0 .net *"_s179", 10 0, v0x26a0af0_3; 1 drivers +v0x26a0af0_0 .array/port v0x26a0af0, 0; +v0x269ee60_0 .net *"_s185", 10 0, v0x26a0af0_0; 1 drivers +v0x26a0af0_1 .array/port v0x26a0af0, 1; +v0x269ef40_0 .net *"_s191", 10 0, v0x26a0af0_1; 1 drivers +v0x269f020_0 .net *"_s23", 0 0, L_0x26bc7b0; 1 drivers +v0x269f100_0 .net *"_s27", 0 0, L_0x26bc910; 1 drivers +v0x269e350_0 .net *"_s31", 0 0, L_0x26bc9e0; 1 drivers +v0x269f3d0_0 .net *"_s36", 0 0, L_0x26bccb0; 1 drivers +v0x269f4b0_0 .net *"_s42", 0 0, L_0x26bcf40; 1 drivers +v0x269f590_0 .net *"_s46", 0 0, L_0x26bcfe0; 1 drivers +v0x269f670_0 .net *"_s50", 0 0, L_0x26bd0f0; 1 drivers +v0x269f750_0 .net *"_s55", 0 0, L_0x26bd300; 1 drivers +v0x269f830_0 .net *"_s61", 0 0, L_0x26bd570; 1 drivers +v0x269f910_0 .net *"_s65", 0 0, L_0x26bd610; 1 drivers +v0x269f9f0_0 .net *"_s69", 0 0, L_0x26bd7e0; 1 drivers +v0x269fad0_0 .net *"_s74", 0 0, L_0x26bd740; 1 drivers +v0x269fbb0_0 .net *"_s80", 0 0, L_0x26bd9d0; 1 drivers +v0x269fc90_0 .net *"_s84", 0 0, L_0x26bdcc0; 1 drivers +v0x269fd70_0 .net *"_s88", 0 0, L_0x26bdc00; 1 drivers +v0x269fe50_0 .net *"_s93", 0 0, L_0x26bdd60; 1 drivers +v0x269ff30_0 .net *"_s99", 0 0, L_0x26be020; 1 drivers +v0x26a0010_0 .net/s "accOut", 10 0, L_0x26bbf30; alias, 1 drivers +v0x26a00f0_0 .net "anyHasData", 0 0, L_0x26bcdf0; 1 drivers +v0x26a01b0_0 .net "anyReadAck", 0 0, L_0x26bdb60; 1 drivers +v0x26a0270_0 .net "anyWantData", 0 0, L_0x26bd3f0; 1 drivers +v0x26a0330_0 .net "anyWriteAck", 0 0, L_0x26be150; 1 drivers +v0x26a03f0_0 .net "clk", 0 0, v0x26a7f40_0; alias, 1 drivers +o0x2ace9a2fd128 .functor BUFZ 15, C4; HiZ drive +v0x26a0490_0 .net "down", 14 0, o0x2ace9a2fd128; 0 drivers +v0x26a0570_0 .net "downOut", 14 0, L_0x26bf770; 1 drivers +v0x26a0650_0 .net "instruction", 17 0, L_0x26bd080; 1 drivers +v0x26a0730 .array "instructions", 15 0, 17 0; +v0x26a07f0_0 .var "last", 2 0; +v0x26a08d0_0 .net "left", 14 0, L_0x26cc270; alias, 1 drivers +v0x26a0990_0 .net "leftOut", 14 0, L_0x26bf4b0; alias, 1 drivers +v0x26a0a30_0 .var "mode", 2 0; +v0x26a0af0 .array/s "outVals", 2 5, 10 0; +v0x26a0c60_0 .var "phase", 2 0; +v0x26a0d40_0 .net "portsHaveData", 5 2, L_0x26bcad0; 1 drivers +v0x269f1a0_0 .net "portsWantData", 5 2, L_0x26bd190; 1 drivers +v0x269f280_0 .net "readAckIn", 5 2, L_0x26bd880; 1 drivers +v0x26a11f0_0 .var "readAckOut", 5 2; +v0x26a1290_0 .var "readTarget", 2 0; +v0x26a1330_0 .var/s "readValue", 10 0; +L_0x2ace9a32a0a8 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x26a13d0 .array "regVals", 0 7; +v0x26a13d0_0 .net/s v0x26a13d0 0, 10 0, L_0x2ace9a32a0a8; 1 drivers +v0x26a13d0_1 .net/s v0x26a13d0 1, 10 0, L_0x26bc130; 1 drivers +v0x26a13d0_2 .net/s v0x26a13d0 2, 10 0, L_0x26bc4a0; 1 drivers +v0x26a13d0_3 .net/s v0x26a13d0 3, 10 0, L_0x26bc540; 1 drivers +v0x26a13d0_4 .net/s v0x26a13d0 4, 10 0, L_0x26bc5e0; 1 drivers +v0x26a13d0_5 .net/s v0x26a13d0 5, 10 0, L_0x26bc680; 1 drivers +o0x2ace9a2fd548 .functor BUFZ 11, C4; HiZ drive +v0x26a13d0_6 .net/s v0x26a13d0 6, 10 0, o0x2ace9a2fd548; 0 drivers +o0x2ace9a2fd578 .functor BUFZ 11, C4; HiZ drive +v0x26a13d0_7 .net/s v0x26a13d0 7, 10 0, o0x2ace9a2fd578; 0 drivers +o0x2ace9a2fd5a8 .functor BUFZ 15, C4; HiZ drive +v0x26a15e0_0 .net "right", 14 0, o0x2ace9a2fd5a8; 0 drivers +v0x26a16c0_0 .net "rightOut", 14 0, L_0x26bfce0; 1 drivers +o0x2ace9a2fd608 .functor BUFZ 15, C4; HiZ drive +v0x26a17a0_0 .net "up", 14 0, o0x2ace9a2fd608; 0 drivers +v0x26a1880_0 .net "upOut", 14 0, L_0x26bf260; 1 drivers +v0x26a1960_0 .var "weHaveData", 5 2; +v0x26a1a40_0 .var "weWantData", 5 2; +v0x26a1b20_0 .net "writeAckIn", 5 2, L_0x26bde30; 1 drivers +v0x26a1c00_0 .var "writeAckOut", 5 2; +v0x26a1ce0_0 .var "writeTarget", 2 0; +v0x26a1dc0_0 .var/s "writeValue", 10 0; +L_0x26bc4a0 .part L_0x26cc270, 0, 11; +L_0x26bc540 .part o0x2ace9a2fd5a8, 0, 11; +L_0x26bc5e0 .part o0x2ace9a2fd608, 0, 11; +L_0x26bc680 .part o0x2ace9a2fd128, 0, 11; +L_0x26bc7b0 .part L_0x26cc270, 11, 1; +L_0x26bc910 .part o0x2ace9a2fd5a8, 11, 1; +L_0x26bc9e0 .part o0x2ace9a2fd608, 11, 1; +L_0x26bcad0 .concat8 [ 1 1 1 1], L_0x26bc7b0, L_0x26bc910, L_0x26bc9e0, L_0x26bccb0; +L_0x26bccb0 .part o0x2ace9a2fd128, 11, 1; +L_0x26bcdf0 .reduce/or L_0x26bcad0; +L_0x26bcf40 .part L_0x26cc270, 12, 1; +L_0x26bcfe0 .part o0x2ace9a2fd5a8, 12, 1; +L_0x26bd0f0 .part o0x2ace9a2fd608, 12, 1; +L_0x26bd190 .concat8 [ 1 1 1 1], L_0x26bcf40, L_0x26bcfe0, L_0x26bd0f0, L_0x26bd300; +L_0x26bd300 .part o0x2ace9a2fd128, 12, 1; +L_0x26bd3f0 .reduce/or L_0x26bd190; +L_0x26bd570 .part L_0x26cc270, 13, 1; +L_0x26bd610 .part o0x2ace9a2fd5a8, 13, 1; +L_0x26bd7e0 .part o0x2ace9a2fd608, 13, 1; +L_0x26bd880 .concat8 [ 1 1 1 1], L_0x26bd570, L_0x26bd610, L_0x26bd7e0, L_0x26bd740; +L_0x26bd740 .part o0x2ace9a2fd128, 13, 1; +L_0x26bdb60 .reduce/or L_0x26bd880; +L_0x26bd9d0 .part L_0x26cc270, 14, 1; +L_0x26bdcc0 .part o0x2ace9a2fd5a8, 14, 1; +L_0x26bdc00 .part o0x2ace9a2fd608, 14, 1; +L_0x26bde30 .concat8 [ 1 1 1 1], L_0x26bd9d0, L_0x26bdcc0, L_0x26bdc00, L_0x26bdd60; +L_0x26bdd60 .part o0x2ace9a2fd128, 14, 1; +L_0x26be150 .reduce/or L_0x26bde30; +L_0x26be020 .part v0x26a11f0_0, 0, 1; +L_0x26be330 .part v0x26a11f0_0, 1, 1; +L_0x26be240 .part v0x26a11f0_0, 2, 1; +L_0x26be520 .part v0x26a11f0_0, 3, 1; +L_0x26be420 .part v0x26a1c00_0, 0, 1; +L_0x26be760 .part v0x26a1c00_0, 1, 1; +L_0x26be650 .part v0x26a1c00_0, 2, 1; +L_0x26be920 .part v0x26a1c00_0, 3, 1; +L_0x26be800 .part v0x26a1a40_0, 0, 1; +L_0x26beb80 .part v0x26a1a40_0, 1, 1; +L_0x26bea50 .part v0x26a1a40_0, 2, 1; +L_0x26bed60 .part v0x26a1a40_0, 3, 1; +L_0x26bec20 .part v0x26a1960_0, 0, 1; +L_0x26bef50 .part v0x26a1960_0, 1, 1; +L_0x26bee00 .part v0x26a1960_0, 2, 1; +L_0x26beea0 .part v0x26a1960_0, 3, 1; +L_0x26beff0 .array/port v0x26a0730, L_0x26bf350; +L_0x26bf350 .concat [ 4 2 0 0], v0x269d920_0, L_0x2ace9a32a0f0; +LS_0x26bf260_0_0 .concat8 [ 11 1 1 1], v0x26a0af0_2, L_0x26bee00, L_0x26bea50, L_0x26be650; +LS_0x26bf260_0_4 .concat8 [ 1 0 0 0], L_0x26be240; +L_0x26bf260 .concat8 [ 14 1 0 0], LS_0x26bf260_0_0, LS_0x26bf260_0_4; +LS_0x26bf770_0_0 .concat8 [ 11 1 1 1], v0x26a0af0_3, L_0x26beea0, L_0x26bed60, L_0x26be920; +LS_0x26bf770_0_4 .concat8 [ 1 0 0 0], L_0x26be520; +L_0x26bf770 .concat8 [ 14 1 0 0], LS_0x26bf770_0_0, LS_0x26bf770_0_4; +LS_0x26bf4b0_0_0 .concat8 [ 11 1 1 1], v0x26a0af0_0, L_0x26bec20, L_0x26be800, L_0x26be420; +LS_0x26bf4b0_0_4 .concat8 [ 1 0 0 0], L_0x26be020; +L_0x26bf4b0 .concat8 [ 14 1 0 0], LS_0x26bf4b0_0_0, LS_0x26bf4b0_0_4; +LS_0x26bfce0_0_0 .concat8 [ 11 1 1 1], v0x26a0af0_1, L_0x26bef50, L_0x26beb80, L_0x26be760; +LS_0x26bfce0_0_4 .concat8 [ 1 0 0 0], L_0x26be330; +L_0x26bfce0 .concat8 [ 14 1 0 0], LS_0x26bfce0_0_0, LS_0x26bfce0_0_4; +L_0x26bfa10 .part L_0x26bd080, 14, 4; +L_0x26c00f0 .part L_0x26bd080, 11, 3; +L_0x26bff00 .part L_0x26bd080, 8, 3; +L_0x26c0340 .part L_0x26bd080, 10, 4; +L_0x26c0190 .part L_0x26bd080, 0, 11; +S_0x26a2040 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x25d8690; .timescale 0 0; .port_info 0 /INPUT 1 "clk" .port_info 1 /INPUT 15 "up" @@ -755,219 +755,219 @@ S_0x1ad6040 .scope module, "up" "tis100" 2 29, 3 49 0, S_0x1a0c690; .port_info 7 /OUTPUT 15 "leftOut" .port_info 8 /OUTPUT 15 "rightOut" .port_info 9 /OUTPUT 11 "accOut" -P_0x1ad6260 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; -P_0x1ad62a0 .param/str "memFile" 0 3 60, "regTest/up.dat"; -L_0x1af4030 .functor BUFZ 11, v0x1ad6560_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1af4280 .functor BUFZ 11, v0x1ad6560_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; -L_0x1af50c0 .functor BUFZ 18, L_0x1af7060, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; -v0x1ad6560_0 .var/s "ACC", 10 0; -v0x1ad6660_0 .var/s "BAK", 10 0; -v0x1ad6740_0 .net "DST", 2 0, L_0x1af81a0; 1 drivers -v0x1ad6800_0 .net/s "IMM", 10 0, L_0x1af8240; 1 drivers -v0x1ad68e0_0 .net "INST", 3 0, L_0x1af7a80; 1 drivers -v0x1ad6a10_0 .net "LABEL", 3 0, L_0x1af83f0; 1 drivers -v0x1ad6af0_0 .var "PC", 3 0; -v0x1ad6bd0_0 .var "PCNEXT", 3 0; -v0x1ad6cb0_0 .net "SRC", 2 0, L_0x1af7fb0; 1 drivers -v0x1ad6e20_0 .net *"_s103", 0 0, L_0x1af63a0; 1 drivers -v0x1ad6f00_0 .net *"_s107", 0 0, L_0x1af62b0; 1 drivers -v0x1ad6fe0_0 .net *"_s111", 0 0, L_0x1af6590; 1 drivers -v0x1ad70c0_0 .net *"_s115", 0 0, L_0x1af6490; 1 drivers -v0x1ad71a0_0 .net *"_s119", 0 0, L_0x1af67d0; 1 drivers -v0x1ad7280_0 .net *"_s123", 0 0, L_0x1af66c0; 1 drivers -v0x1ad7360_0 .net *"_s127", 0 0, L_0x1af6990; 1 drivers -v0x1ad7440_0 .net *"_s131", 0 0, L_0x1af6870; 1 drivers -v0x1ad75f0_0 .net *"_s135", 0 0, L_0x1af6bf0; 1 drivers -v0x1ad7690_0 .net *"_s139", 0 0, L_0x1af6ac0; 1 drivers -v0x1ad7770_0 .net *"_s143", 0 0, L_0x1af6dd0; 1 drivers -v0x1ad7850_0 .net *"_s147", 0 0, L_0x1af6c90; 1 drivers -v0x1ad7930_0 .net *"_s151", 0 0, L_0x1af6fc0; 1 drivers -v0x1ad7a10_0 .net *"_s155", 0 0, L_0x1af6e70; 1 drivers -v0x1ad7af0_0 .net *"_s159", 0 0, L_0x1af6f10; 1 drivers -v0x1ad7bd0_0 .net *"_s160", 17 0, L_0x1af7060; 1 drivers -v0x1ad7cb0_0 .net *"_s162", 5 0, L_0x1af73c0; 1 drivers -L_0x2acae8b88180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; -v0x1ad7d90_0 .net *"_s165", 1 0, L_0x2acae8b88180; 1 drivers -v0x1ad9d50_2 .array/port v0x1ad9d50, 2; -v0x1ad7e70_0 .net *"_s173", 10 0, v0x1ad9d50_2; 1 drivers -v0x1ad9d50_3 .array/port v0x1ad9d50, 3; -v0x1ad7f50_0 .net *"_s179", 10 0, v0x1ad9d50_3; 1 drivers -v0x1ad9d50_0 .array/port v0x1ad9d50, 0; -v0x1ad8030_0 .net *"_s185", 10 0, v0x1ad9d50_0; 1 drivers -v0x1ad9d50_1 .array/port v0x1ad9d50, 1; -v0x1ad8110_0 .net *"_s191", 10 0, v0x1ad9d50_1; 1 drivers -v0x1ad81f0_0 .net *"_s23", 0 0, L_0x1af4880; 1 drivers -v0x1ad82d0_0 .net *"_s27", 0 0, L_0x1af49a0; 1 drivers -v0x1ad7520_0 .net *"_s31", 0 0, L_0x1af4a90; 1 drivers -v0x1ad85a0_0 .net *"_s36", 0 0, L_0x1af4d60; 1 drivers -v0x1ad8680_0 .net *"_s42", 0 0, L_0x1af4f80; 1 drivers -v0x1ad8760_0 .net *"_s46", 0 0, L_0x1af5020; 1 drivers -v0x1ad8840_0 .net *"_s50", 0 0, L_0x1af5130; 1 drivers -v0x1ad8920_0 .net *"_s55", 0 0, L_0x1af5370; 1 drivers -v0x1ad8a00_0 .net *"_s61", 0 0, L_0x1af55e0; 1 drivers -v0x1ad8ae0_0 .net *"_s65", 0 0, L_0x1af5710; 1 drivers -v0x1ad8bc0_0 .net *"_s69", 0 0, L_0x1af58e0; 1 drivers -v0x1ad8ca0_0 .net *"_s74", 0 0, L_0x1af5840; 1 drivers -v0x1ad8d80_0 .net *"_s80", 0 0, L_0x1af5a80; 1 drivers -v0x1ad8e60_0 .net *"_s84", 0 0, L_0x1af5d30; 1 drivers -v0x1ad8f40_0 .net *"_s88", 0 0, L_0x1af5c70; 1 drivers -v0x1ad9020_0 .net *"_s93", 0 0, L_0x1af5dd0; 1 drivers -v0x1ad9100_0 .net *"_s99", 0 0, L_0x1af6090; 1 drivers -v0x1ad91e0_0 .net/s "accOut", 10 0, L_0x1af4030; alias, 1 drivers -v0x1ad92c0_0 .net "anyHasData", 0 0, L_0x1af4ee0; 1 drivers -v0x1ad9380_0 .net "anyReadAck", 0 0, L_0x1af5b80; 1 drivers -v0x1ad9440_0 .net "anyWantData", 0 0, L_0x1af5460; 1 drivers -v0x1ad9500_0 .net "anyWriteAck", 0 0, L_0x1af61c0; 1 drivers -v0x1ad95c0_0 .net "clk", 0 0, v0x1adbf40_0; alias, 1 drivers -v0x1ad96f0_0 .net "down", 14 0, L_0x1aff5d0; alias, 1 drivers -v0x1ad97b0_0 .net "downOut", 14 0, L_0x1af77e0; alias, 1 drivers -v0x1ad9850_0 .net "instruction", 17 0, L_0x1af50c0; 1 drivers -v0x1ad9910 .array "instructions", 15 0, 17 0; -v0x1ad99d0_0 .var "last", 2 0; -o0x2acae8b5c3b8 .functor BUFZ 15, C4; HiZ drive -v0x1ad9ab0_0 .net "left", 14 0, o0x2acae8b5c3b8; 0 drivers -v0x1ad9b90_0 .net "leftOut", 14 0, L_0x1af7520; 1 drivers -v0x1ad9c70_0 .var "mode", 2 0; -v0x1ad9d50 .array/s "outVals", 2 5, 10 0; -v0x1ad9ec0_0 .var "phase", 2 0; -v0x1ad9fa0_0 .net "portsHaveData", 5 2, L_0x1af4b80; 1 drivers -v0x1ad8370_0 .net "portsWantData", 5 2, L_0x1af51d0; 1 drivers -v0x1ad8450_0 .net "readAckIn", 5 2, L_0x1af5980; 1 drivers -v0x1ada450_0 .var "readAckOut", 5 2; -v0x1ada4f0_0 .var "readTarget", 2 0; -v0x1ada590_0 .var/s "readValue", 10 0; -L_0x2acae8b88138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; -v0x1ada630 .array "regVals", 0 7; -v0x1ada630_0 .net/s v0x1ada630 0, 10 0, L_0x2acae8b88138; 1 drivers -v0x1ada630_1 .net/s v0x1ada630 1, 10 0, L_0x1af4280; 1 drivers -v0x1ada630_2 .net/s v0x1ada630 2, 10 0, L_0x1af45a0; 1 drivers -v0x1ada630_3 .net/s v0x1ada630 3, 10 0, L_0x1af4640; 1 drivers -v0x1ada630_4 .net/s v0x1ada630 4, 10 0, L_0x1af46e0; 1 drivers -v0x1ada630_5 .net/s v0x1ada630 5, 10 0, L_0x1af4780; 1 drivers -o0x2acae8b5c778 .functor BUFZ 11, C4; HiZ drive -v0x1ada630_6 .net/s v0x1ada630 6, 10 0, o0x2acae8b5c778; 0 drivers -o0x2acae8b5c7a8 .functor BUFZ 11, C4; HiZ drive -v0x1ada630_7 .net/s v0x1ada630 7, 10 0, o0x2acae8b5c7a8; 0 drivers -o0x2acae8b5c7d8 .functor BUFZ 15, C4; HiZ drive -v0x1ada840_0 .net "right", 14 0, o0x2acae8b5c7d8; 0 drivers -v0x1ada920_0 .net "rightOut", 14 0, L_0x1af7d90; 1 drivers -o0x2acae8b5c838 .functor BUFZ 15, C4; HiZ drive -v0x1adaa00_0 .net "up", 14 0, o0x2acae8b5c838; 0 drivers -v0x1adaae0_0 .net "upOut", 14 0, L_0x1af72d0; 1 drivers -v0x1adabc0_0 .var "weHaveData", 5 2; -v0x1adaca0_0 .var "weWantData", 5 2; -v0x1adad80_0 .net "writeAckIn", 5 2, L_0x1af5ea0; 1 drivers -v0x1adae60_0 .var "writeAckOut", 5 2; -v0x1adaf40_0 .var "writeTarget", 2 0; -v0x1adb020_0 .var/s "writeValue", 10 0; -L_0x1af45a0 .part o0x2acae8b5c3b8, 0, 11; -L_0x1af4640 .part o0x2acae8b5c7d8, 0, 11; -L_0x1af46e0 .part o0x2acae8b5c838, 0, 11; -L_0x1af4780 .part L_0x1aff5d0, 0, 11; -L_0x1af4880 .part o0x2acae8b5c3b8, 11, 1; -L_0x1af49a0 .part o0x2acae8b5c7d8, 11, 1; -L_0x1af4a90 .part o0x2acae8b5c838, 11, 1; -L_0x1af4b80 .concat8 [ 1 1 1 1], L_0x1af4880, L_0x1af49a0, L_0x1af4a90, L_0x1af4d60; -L_0x1af4d60 .part L_0x1aff5d0, 11, 1; -L_0x1af4ee0 .reduce/or L_0x1af4b80; -L_0x1af4f80 .part o0x2acae8b5c3b8, 12, 1; -L_0x1af5020 .part o0x2acae8b5c7d8, 12, 1; -L_0x1af5130 .part o0x2acae8b5c838, 12, 1; -L_0x1af51d0 .concat8 [ 1 1 1 1], L_0x1af4f80, L_0x1af5020, L_0x1af5130, L_0x1af5370; -L_0x1af5370 .part L_0x1aff5d0, 12, 1; -L_0x1af5460 .reduce/or L_0x1af51d0; -L_0x1af55e0 .part o0x2acae8b5c3b8, 13, 1; -L_0x1af5710 .part o0x2acae8b5c7d8, 13, 1; -L_0x1af58e0 .part o0x2acae8b5c838, 13, 1; -L_0x1af5980 .concat8 [ 1 1 1 1], L_0x1af55e0, L_0x1af5710, L_0x1af58e0, L_0x1af5840; -L_0x1af5840 .part L_0x1aff5d0, 13, 1; -L_0x1af5b80 .reduce/or L_0x1af5980; -L_0x1af5a80 .part o0x2acae8b5c3b8, 14, 1; -L_0x1af5d30 .part o0x2acae8b5c7d8, 14, 1; -L_0x1af5c70 .part o0x2acae8b5c838, 14, 1; -L_0x1af5ea0 .concat8 [ 1 1 1 1], L_0x1af5a80, L_0x1af5d30, L_0x1af5c70, L_0x1af5dd0; -L_0x1af5dd0 .part L_0x1aff5d0, 14, 1; -L_0x1af61c0 .reduce/or L_0x1af5ea0; -L_0x1af6090 .part v0x1ada450_0, 0, 1; -L_0x1af63a0 .part v0x1ada450_0, 1, 1; -L_0x1af62b0 .part v0x1ada450_0, 2, 1; -L_0x1af6590 .part v0x1ada450_0, 3, 1; -L_0x1af6490 .part v0x1adae60_0, 0, 1; -L_0x1af67d0 .part v0x1adae60_0, 1, 1; -L_0x1af66c0 .part v0x1adae60_0, 2, 1; -L_0x1af6990 .part v0x1adae60_0, 3, 1; -L_0x1af6870 .part v0x1adaca0_0, 0, 1; -L_0x1af6bf0 .part v0x1adaca0_0, 1, 1; -L_0x1af6ac0 .part v0x1adaca0_0, 2, 1; -L_0x1af6dd0 .part v0x1adaca0_0, 3, 1; -L_0x1af6c90 .part v0x1adabc0_0, 0, 1; -L_0x1af6fc0 .part v0x1adabc0_0, 1, 1; -L_0x1af6e70 .part v0x1adabc0_0, 2, 1; -L_0x1af6f10 .part v0x1adabc0_0, 3, 1; -L_0x1af7060 .array/port v0x1ad9910, L_0x1af73c0; -L_0x1af73c0 .concat [ 4 2 0 0], v0x1ad6af0_0, L_0x2acae8b88180; -LS_0x1af72d0_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_2, L_0x1af6e70, L_0x1af6ac0, L_0x1af66c0; -LS_0x1af72d0_0_4 .concat8 [ 1 0 0 0], L_0x1af62b0; -L_0x1af72d0 .concat8 [ 14 1 0 0], LS_0x1af72d0_0_0, LS_0x1af72d0_0_4; -LS_0x1af77e0_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_3, L_0x1af6f10, L_0x1af6dd0, L_0x1af6990; -LS_0x1af77e0_0_4 .concat8 [ 1 0 0 0], L_0x1af6590; -L_0x1af77e0 .concat8 [ 14 1 0 0], LS_0x1af77e0_0_0, LS_0x1af77e0_0_4; -LS_0x1af7520_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_0, L_0x1af6c90, L_0x1af6870, L_0x1af6490; -LS_0x1af7520_0_4 .concat8 [ 1 0 0 0], L_0x1af6090; -L_0x1af7520 .concat8 [ 14 1 0 0], LS_0x1af7520_0_0, LS_0x1af7520_0_4; -LS_0x1af7d90_0_0 .concat8 [ 11 1 1 1], v0x1ad9d50_1, L_0x1af6fc0, L_0x1af6bf0, L_0x1af67d0; -LS_0x1af7d90_0_4 .concat8 [ 1 0 0 0], L_0x1af63a0; -L_0x1af7d90 .concat8 [ 14 1 0 0], LS_0x1af7d90_0_0, LS_0x1af7d90_0_4; -L_0x1af7a80 .part L_0x1af50c0, 14, 4; -L_0x1af81a0 .part L_0x1af50c0, 11, 3; -L_0x1af7fb0 .part L_0x1af50c0, 8, 3; -L_0x1af83f0 .part L_0x1af50c0, 10, 4; -L_0x1af8240 .part L_0x1af50c0, 0, 11; - .scope S_0x1acbc50; +P_0x26a2260 .param/l "debug" 0 3 61, +C4<00000000000000000000000000000000>; +P_0x26a22a0 .param/str "memFile" 0 3 60, "regTest/up.dat"; +L_0x26c0030 .functor BUFZ 11, v0x26a2560_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26c0280 .functor BUFZ 11, v0x26a2560_0, C4<00000000000>, C4<00000000000>, C4<00000000000>; +L_0x26c10c0 .functor BUFZ 18, L_0x26c3060, C4<000000000000000000>, C4<000000000000000000>, C4<000000000000000000>; +v0x26a2560_0 .var/s "ACC", 10 0; +v0x26a2660_0 .var/s "BAK", 10 0; +v0x26a2740_0 .net "DST", 2 0, L_0x26c41a0; 1 drivers +v0x26a2800_0 .net/s "IMM", 10 0, L_0x26c4240; 1 drivers +v0x26a28e0_0 .net "INST", 3 0, L_0x26c3a80; 1 drivers +v0x26a2a10_0 .net "LABEL", 3 0, L_0x26c43f0; 1 drivers +v0x26a2af0_0 .var "PC", 3 0; +v0x26a2bd0_0 .var "PCNEXT", 3 0; +v0x26a2cb0_0 .net "SRC", 2 0, L_0x26c3fb0; 1 drivers +v0x26a2e20_0 .net *"_s103", 0 0, L_0x26c23a0; 1 drivers +v0x26a2f00_0 .net *"_s107", 0 0, L_0x26c22b0; 1 drivers +v0x26a2fe0_0 .net *"_s111", 0 0, L_0x26c2590; 1 drivers +v0x26a30c0_0 .net *"_s115", 0 0, L_0x26c2490; 1 drivers +v0x26a31a0_0 .net *"_s119", 0 0, L_0x26c27d0; 1 drivers +v0x26a3280_0 .net *"_s123", 0 0, L_0x26c26c0; 1 drivers +v0x26a3360_0 .net *"_s127", 0 0, L_0x26c2990; 1 drivers +v0x26a3440_0 .net *"_s131", 0 0, L_0x26c2870; 1 drivers +v0x26a35f0_0 .net *"_s135", 0 0, L_0x26c2bf0; 1 drivers +v0x26a3690_0 .net *"_s139", 0 0, L_0x26c2ac0; 1 drivers +v0x26a3770_0 .net *"_s143", 0 0, L_0x26c2dd0; 1 drivers +v0x26a3850_0 .net *"_s147", 0 0, L_0x26c2c90; 1 drivers +v0x26a3930_0 .net *"_s151", 0 0, L_0x26c2fc0; 1 drivers +v0x26a3a10_0 .net *"_s155", 0 0, L_0x26c2e70; 1 drivers +v0x26a3af0_0 .net *"_s159", 0 0, L_0x26c2f10; 1 drivers +v0x26a3bd0_0 .net *"_s160", 17 0, L_0x26c3060; 1 drivers +v0x26a3cb0_0 .net *"_s162", 5 0, L_0x26c33c0; 1 drivers +L_0x2ace9a32a180 .functor BUFT 1, C4<00>, C4<0>, C4<0>, C4<0>; +v0x26a3d90_0 .net *"_s165", 1 0, L_0x2ace9a32a180; 1 drivers +v0x26a5d50_2 .array/port v0x26a5d50, 2; +v0x26a3e70_0 .net *"_s173", 10 0, v0x26a5d50_2; 1 drivers +v0x26a5d50_3 .array/port v0x26a5d50, 3; +v0x26a3f50_0 .net *"_s179", 10 0, v0x26a5d50_3; 1 drivers +v0x26a5d50_0 .array/port v0x26a5d50, 0; +v0x26a4030_0 .net *"_s185", 10 0, v0x26a5d50_0; 1 drivers +v0x26a5d50_1 .array/port v0x26a5d50, 1; +v0x26a4110_0 .net *"_s191", 10 0, v0x26a5d50_1; 1 drivers +v0x26a41f0_0 .net *"_s23", 0 0, L_0x26c0880; 1 drivers +v0x26a42d0_0 .net *"_s27", 0 0, L_0x26c09a0; 1 drivers +v0x26a3520_0 .net *"_s31", 0 0, L_0x26c0a90; 1 drivers +v0x26a45a0_0 .net *"_s36", 0 0, L_0x26c0d60; 1 drivers +v0x26a4680_0 .net *"_s42", 0 0, L_0x26c0f80; 1 drivers +v0x26a4760_0 .net *"_s46", 0 0, L_0x26c1020; 1 drivers +v0x26a4840_0 .net *"_s50", 0 0, L_0x26c1130; 1 drivers +v0x26a4920_0 .net *"_s55", 0 0, L_0x26c1370; 1 drivers +v0x26a4a00_0 .net *"_s61", 0 0, L_0x26c15e0; 1 drivers +v0x26a4ae0_0 .net *"_s65", 0 0, L_0x26c1710; 1 drivers +v0x26a4bc0_0 .net *"_s69", 0 0, L_0x26c18e0; 1 drivers +v0x26a4ca0_0 .net *"_s74", 0 0, L_0x26c1840; 1 drivers +v0x26a4d80_0 .net *"_s80", 0 0, L_0x26c1a80; 1 drivers +v0x26a4e60_0 .net *"_s84", 0 0, L_0x26c1d30; 1 drivers +v0x26a4f40_0 .net *"_s88", 0 0, L_0x26c1c70; 1 drivers +v0x26a5020_0 .net *"_s93", 0 0, L_0x26c1dd0; 1 drivers +v0x26a5100_0 .net *"_s99", 0 0, L_0x26c2090; 1 drivers +v0x26a51e0_0 .net/s "accOut", 10 0, L_0x26c0030; alias, 1 drivers +v0x26a52c0_0 .net "anyHasData", 0 0, L_0x26c0ee0; 1 drivers +v0x26a5380_0 .net "anyReadAck", 0 0, L_0x26c1b80; 1 drivers +v0x26a5440_0 .net "anyWantData", 0 0, L_0x26c1460; 1 drivers +v0x26a5500_0 .net "anyWriteAck", 0 0, L_0x26c21c0; 1 drivers +v0x26a55c0_0 .net "clk", 0 0, v0x26a7f40_0; alias, 1 drivers +v0x26a56f0_0 .net "down", 14 0, L_0x26cb5d0; alias, 1 drivers +v0x26a57b0_0 .net "downOut", 14 0, L_0x26c37e0; alias, 1 drivers +v0x26a5850_0 .net "instruction", 17 0, L_0x26c10c0; 1 drivers +v0x26a5910 .array "instructions", 15 0, 17 0; +v0x26a59d0_0 .var "last", 2 0; +o0x2ace9a2fe3b8 .functor BUFZ 15, C4; HiZ drive +v0x26a5ab0_0 .net "left", 14 0, o0x2ace9a2fe3b8; 0 drivers +v0x26a5b90_0 .net "leftOut", 14 0, L_0x26c3520; 1 drivers +v0x26a5c70_0 .var "mode", 2 0; +v0x26a5d50 .array/s "outVals", 2 5, 10 0; +v0x26a5ec0_0 .var "phase", 2 0; +v0x26a5fa0_0 .net "portsHaveData", 5 2, L_0x26c0b80; 1 drivers +v0x26a4370_0 .net "portsWantData", 5 2, L_0x26c11d0; 1 drivers +v0x26a4450_0 .net "readAckIn", 5 2, L_0x26c1980; 1 drivers +v0x26a6450_0 .var "readAckOut", 5 2; +v0x26a64f0_0 .var "readTarget", 2 0; +v0x26a6590_0 .var/s "readValue", 10 0; +L_0x2ace9a32a138 .functor BUFT 1, C4<00000000000>, C4<0>, C4<0>, C4<0>; +v0x26a6630 .array "regVals", 0 7; +v0x26a6630_0 .net/s v0x26a6630 0, 10 0, L_0x2ace9a32a138; 1 drivers +v0x26a6630_1 .net/s v0x26a6630 1, 10 0, L_0x26c0280; 1 drivers +v0x26a6630_2 .net/s v0x26a6630 2, 10 0, L_0x26c05a0; 1 drivers +v0x26a6630_3 .net/s v0x26a6630 3, 10 0, L_0x26c0640; 1 drivers +v0x26a6630_4 .net/s v0x26a6630 4, 10 0, L_0x26c06e0; 1 drivers +v0x26a6630_5 .net/s v0x26a6630 5, 10 0, L_0x26c0780; 1 drivers +o0x2ace9a2fe778 .functor BUFZ 11, C4; HiZ drive +v0x26a6630_6 .net/s v0x26a6630 6, 10 0, o0x2ace9a2fe778; 0 drivers +o0x2ace9a2fe7a8 .functor BUFZ 11, C4; HiZ drive +v0x26a6630_7 .net/s v0x26a6630 7, 10 0, o0x2ace9a2fe7a8; 0 drivers +o0x2ace9a2fe7d8 .functor BUFZ 15, C4; HiZ drive +v0x26a6840_0 .net "right", 14 0, o0x2ace9a2fe7d8; 0 drivers +v0x26a6920_0 .net "rightOut", 14 0, L_0x26c3d90; 1 drivers +o0x2ace9a2fe838 .functor BUFZ 15, C4; HiZ drive +v0x26a6a00_0 .net "up", 14 0, o0x2ace9a2fe838; 0 drivers +v0x26a6ae0_0 .net "upOut", 14 0, L_0x26c32d0; 1 drivers +v0x26a6bc0_0 .var "weHaveData", 5 2; +v0x26a6ca0_0 .var "weWantData", 5 2; +v0x26a6d80_0 .net "writeAckIn", 5 2, L_0x26c1ea0; 1 drivers +v0x26a6e60_0 .var "writeAckOut", 5 2; +v0x26a6f40_0 .var "writeTarget", 2 0; +v0x26a7020_0 .var/s "writeValue", 10 0; +L_0x26c05a0 .part o0x2ace9a2fe3b8, 0, 11; +L_0x26c0640 .part o0x2ace9a2fe7d8, 0, 11; +L_0x26c06e0 .part o0x2ace9a2fe838, 0, 11; +L_0x26c0780 .part L_0x26cb5d0, 0, 11; +L_0x26c0880 .part o0x2ace9a2fe3b8, 11, 1; +L_0x26c09a0 .part o0x2ace9a2fe7d8, 11, 1; +L_0x26c0a90 .part o0x2ace9a2fe838, 11, 1; +L_0x26c0b80 .concat8 [ 1 1 1 1], L_0x26c0880, L_0x26c09a0, L_0x26c0a90, L_0x26c0d60; +L_0x26c0d60 .part L_0x26cb5d0, 11, 1; +L_0x26c0ee0 .reduce/or L_0x26c0b80; +L_0x26c0f80 .part o0x2ace9a2fe3b8, 12, 1; +L_0x26c1020 .part o0x2ace9a2fe7d8, 12, 1; +L_0x26c1130 .part o0x2ace9a2fe838, 12, 1; +L_0x26c11d0 .concat8 [ 1 1 1 1], L_0x26c0f80, L_0x26c1020, L_0x26c1130, L_0x26c1370; +L_0x26c1370 .part L_0x26cb5d0, 12, 1; +L_0x26c1460 .reduce/or L_0x26c11d0; +L_0x26c15e0 .part o0x2ace9a2fe3b8, 13, 1; +L_0x26c1710 .part o0x2ace9a2fe7d8, 13, 1; +L_0x26c18e0 .part o0x2ace9a2fe838, 13, 1; +L_0x26c1980 .concat8 [ 1 1 1 1], L_0x26c15e0, L_0x26c1710, L_0x26c18e0, L_0x26c1840; +L_0x26c1840 .part L_0x26cb5d0, 13, 1; +L_0x26c1b80 .reduce/or L_0x26c1980; +L_0x26c1a80 .part o0x2ace9a2fe3b8, 14, 1; +L_0x26c1d30 .part o0x2ace9a2fe7d8, 14, 1; +L_0x26c1c70 .part o0x2ace9a2fe838, 14, 1; +L_0x26c1ea0 .concat8 [ 1 1 1 1], L_0x26c1a80, L_0x26c1d30, L_0x26c1c70, L_0x26c1dd0; +L_0x26c1dd0 .part L_0x26cb5d0, 14, 1; +L_0x26c21c0 .reduce/or L_0x26c1ea0; +L_0x26c2090 .part v0x26a6450_0, 0, 1; +L_0x26c23a0 .part v0x26a6450_0, 1, 1; +L_0x26c22b0 .part v0x26a6450_0, 2, 1; +L_0x26c2590 .part v0x26a6450_0, 3, 1; +L_0x26c2490 .part v0x26a6e60_0, 0, 1; +L_0x26c27d0 .part v0x26a6e60_0, 1, 1; +L_0x26c26c0 .part v0x26a6e60_0, 2, 1; +L_0x26c2990 .part v0x26a6e60_0, 3, 1; +L_0x26c2870 .part v0x26a6ca0_0, 0, 1; +L_0x26c2bf0 .part v0x26a6ca0_0, 1, 1; +L_0x26c2ac0 .part v0x26a6ca0_0, 2, 1; +L_0x26c2dd0 .part v0x26a6ca0_0, 3, 1; +L_0x26c2c90 .part v0x26a6bc0_0, 0, 1; +L_0x26c2fc0 .part v0x26a6bc0_0, 1, 1; +L_0x26c2e70 .part v0x26a6bc0_0, 2, 1; +L_0x26c2f10 .part v0x26a6bc0_0, 3, 1; +L_0x26c3060 .array/port v0x26a5910, L_0x26c33c0; +L_0x26c33c0 .concat [ 4 2 0 0], v0x26a2af0_0, L_0x2ace9a32a180; +LS_0x26c32d0_0_0 .concat8 [ 11 1 1 1], v0x26a5d50_2, L_0x26c2e70, L_0x26c2ac0, L_0x26c26c0; +LS_0x26c32d0_0_4 .concat8 [ 1 0 0 0], L_0x26c22b0; +L_0x26c32d0 .concat8 [ 14 1 0 0], LS_0x26c32d0_0_0, LS_0x26c32d0_0_4; +LS_0x26c37e0_0_0 .concat8 [ 11 1 1 1], v0x26a5d50_3, L_0x26c2f10, L_0x26c2dd0, L_0x26c2990; +LS_0x26c37e0_0_4 .concat8 [ 1 0 0 0], L_0x26c2590; +L_0x26c37e0 .concat8 [ 14 1 0 0], LS_0x26c37e0_0_0, LS_0x26c37e0_0_4; +LS_0x26c3520_0_0 .concat8 [ 11 1 1 1], v0x26a5d50_0, L_0x26c2c90, L_0x26c2870, L_0x26c2490; +LS_0x26c3520_0_4 .concat8 [ 1 0 0 0], L_0x26c2090; +L_0x26c3520 .concat8 [ 14 1 0 0], LS_0x26c3520_0_0, LS_0x26c3520_0_4; +LS_0x26c3d90_0_0 .concat8 [ 11 1 1 1], v0x26a5d50_1, L_0x26c2fc0, L_0x26c2bf0, L_0x26c27d0; +LS_0x26c3d90_0_4 .concat8 [ 1 0 0 0], L_0x26c23a0; +L_0x26c3d90 .concat8 [ 14 1 0 0], LS_0x26c3d90_0_0, LS_0x26c3d90_0_4; +L_0x26c3a80 .part L_0x26c10c0, 14, 4; +L_0x26c41a0 .part L_0x26c10c0, 11, 3; +L_0x26c3fb0 .part L_0x26c10c0, 8, 3; +L_0x26c43f0 .part L_0x26c10c0, 10, 4; +L_0x26c4240 .part L_0x26c10c0, 0, 11; + .scope S_0x2697c50; T_0 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1acf7e0_0, 0, 3; + %store/vec4 v0x269b7e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1acfa00_0, 0, 3; + %store/vec4 v0x269ba00_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1acf540_0, 0, 3; + %store/vec4 v0x269b540_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1acc0f0_0, 0, 11; + %store/vec4 v0x26980f0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1acc1b0_0, 0, 11; + %store/vec4 v0x26981b0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acc670_0, 0, 4; + %store/vec4 v0x2698670_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acff90_0, 0, 4; + %store/vec4 v0x269bf90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad0860_0, 0, 4; + %store/vec4 v0x269c860_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad0a20_0, 0, 4; + %store/vec4 v0x269ca20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad0780_0, 0, 4; + %store/vec4 v0x269c780_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1acf8c0, 4, 0; + %store/vec4a v0x269b8c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1acf8c0, 4, 0; + %store/vec4a v0x269b8c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1acf8c0, 4, 0; + %store/vec4a v0x269b8c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1acf8c0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1acbe90, v0x1acf480 {0 0 0}; + %store/vec4a v0x269b8c0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x2697e90, v0x269b480 {0 0 0}; %end; .thread T_0; - .scope S_0x1acbc50; + .scope S_0x2697c50; T_1 ; - %wait E_0x1a3fcc0; - %load/vec4 v0x1acf7e0_0; + %wait E_0x260bcc0; + %load/vec4 v0x269b7e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -982,7 +982,7 @@ T_1 ; %jmp/1 T_1.2, 6; %jmp T_1.3; T_1.0 ; - %load/vec4 v0x1acfa00_0; + %load/vec4 v0x269ba00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -997,185 +997,185 @@ T_1.0 ; %jmp/1 T_1.6, 6; %jmp T_1.7; T_1.4 ; - %load/vec4 v0x1acc460_0; + %load/vec4 v0x2698460_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_1.8, 5; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_1.10, 5; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %jmp T_1.11; T_1.10 ; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_1.12, 5; - %load/vec4 v0x1acfae0_0; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x269bae0_0; + %load/vec4 v0x2698830_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.14, 8; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acff90_0, 4, 5; - %load/vec4 v0x1acc830_0; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4/off/d v0x269bf90_0, 4, 5; + %load/vec4 v0x2698830_0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.15; T_1.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; - %load/vec4 v0x1acc830_0; - %assign/vec4 v0x1ad0050_0, 0; + %assign/vec4 v0x269b7e0_0, 0; + %load/vec4 v0x2698830_0; + %assign/vec4 v0x269c050_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; - %load/vec4 v0x1acc830_0; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4/off/d v0x269c860_0, 4, 5; + %load/vec4 v0x2698830_0; + %assign/vec4 v0x269b540_0, 0; T_1.15 ; %jmp T_1.13; T_1.12 ; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.16, 4; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %cmpi/e 0, 0, 3; %jmp/0xz T_1.18, 4; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %jmp T_1.19; T_1.18 ; - %load/vec4 v0x1acfae0_0; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269bae0_0; + %load/vec4 v0x269b540_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.20, 8; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %jmp T_1.21; T_1.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; - %load/vec4 v0x1acf540_0; - %assign/vec4 v0x1ad0050_0, 0; + %assign/vec4 v0x269b7e0_0, 0; + %load/vec4 v0x269b540_0; + %assign/vec4 v0x269c050_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %assign/vec4/off/d v0x269c860_0, 4, 5; T_1.21 ; T_1.19 ; %jmp T_1.17; T_1.16 ; - %load/vec4 v0x1acc830_0; + %load/vec4 v0x2698830_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.22, 4; - %load/vec4 v0x1acee40_0; + %load/vec4 v0x269ae40_0; %flag_set/vec4 8; %jmp/0xz T_1.24, 8; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.27; T_1.26 ; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.29; T_1.28 ; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.31; T_1.30 ; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; T_1.32 ; T_1.31 ; T_1.29 ; @@ -1183,29 +1183,29 @@ T_1.27 ; %jmp T_1.25; T_1.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; - %load/vec4 v0x1acc830_0; - %assign/vec4 v0x1ad0050_0, 0; + %assign/vec4 v0x269b7e0_0, 0; + %load/vec4 v0x2698830_0; + %assign/vec4 v0x269c050_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %assign/vec4/off/d v0x269c860_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %assign/vec4/off/d v0x269c860_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %assign/vec4/off/d v0x269c860_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; + %assign/vec4/off/d v0x269c860_0, 4, 5; T_1.25 ; T_1.22 ; T_1.17 ; @@ -1213,10 +1213,10 @@ T_1.13 ; T_1.11 ; T_1.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.7; T_1.5 ; - %load/vec4 v0x1acc460_0; + %load/vec4 v0x2698460_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -1283,180 +1283,180 @@ T_1.5 ; %jmp/1 T_1.49, 6; %jmp T_1.50; T_1.34 ; - %load/vec4 v0x1acc0f0_0; - %load/vec4 v0x1ad0130_0; + %load/vec4 v0x26980f0_0; + %load/vec4 v0x269c130_0; %add; - %assign/vec4 v0x1acc0f0_0, 0; - %load/vec4 v0x1acc670_0; + %assign/vec4 v0x26980f0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.35 ; - %load/vec4 v0x1acc0f0_0; - %load/vec4 v0x1ad0130_0; + %load/vec4 v0x26980f0_0; + %load/vec4 v0x269c130_0; %sub; - %assign/vec4 v0x1acc0f0_0, 0; - %load/vec4 v0x1acc670_0; + %assign/vec4 v0x26980f0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.36 ; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698670_0; %pad/u 11; - %load/vec4 v0x1ad0130_0; + %load/vec4 v0x269c130_0; %add; %pad/u 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.37 ; - %load/vec4 v0x1ad0130_0; - %assign/vec4 v0x1ad0be0_0, 0; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x269c130_0; + %assign/vec4 v0x269cbe0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.38 ; - %load/vec4 v0x1acc380_0; - %assign/vec4 v0x1ad0be0_0, 0; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698380_0; + %assign/vec4 v0x269cbe0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.39 ; - %load/vec4 v0x1acc0f0_0; - %load/vec4 v0x1acc380_0; + %load/vec4 v0x26980f0_0; + %load/vec4 v0x2698380_0; %add; - %assign/vec4 v0x1acc0f0_0, 0; - %load/vec4 v0x1acc670_0; + %assign/vec4 v0x26980f0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.40 ; - %load/vec4 v0x1acc0f0_0; - %load/vec4 v0x1acc380_0; + %load/vec4 v0x26980f0_0; + %load/vec4 v0x2698380_0; %sub; - %assign/vec4 v0x1acc0f0_0, 0; - %load/vec4 v0x1acc670_0; + %assign/vec4 v0x26980f0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.41 ; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698670_0; %pad/u 11; - %load/vec4 v0x1acc380_0; + %load/vec4 v0x2698380_0; %add; %pad/u 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.42 ; - %load/vec4 v0x1acc1b0_0; - %assign/vec4 v0x1acc0f0_0, 0; - %load/vec4 v0x1acc0f0_0; - %assign/vec4 v0x1acc1b0_0, 0; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x26981b0_0; + %assign/vec4 v0x26980f0_0, 0; + %load/vec4 v0x26980f0_0; + %assign/vec4 v0x26981b0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.43 ; - %load/vec4 v0x1acc0f0_0; - %assign/vec4 v0x1acc1b0_0, 0; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x26980f0_0; + %assign/vec4 v0x26981b0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.44 ; - %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x26980f0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1acc0f0_0, 0; - %load/vec4 v0x1acc670_0; + %assign/vec4 v0x26980f0_0, 0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.45 ; - %load/vec4 v0x1acc590_0; - %assign/vec4 v0x1acc750_0, 0; + %load/vec4 v0x2698590_0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.50; T_1.46 ; - %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x26980f0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_1.51, 4; - %load/vec4 v0x1acc590_0; - %assign/vec4 v0x1acc750_0, 0; + %load/vec4 v0x2698590_0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.52; T_1.51 ; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; T_1.52 ; %jmp T_1.50; T_1.47 ; - %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x26980f0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_1.53, 4; - %load/vec4 v0x1acc590_0; - %assign/vec4 v0x1acc750_0, 0; + %load/vec4 v0x2698590_0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.54; T_1.53 ; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; T_1.54 ; %jmp T_1.50; T_1.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x26980f0_0; %pad/s 32; %cmp/s; %jmp/0xz T_1.55, 5; - %load/vec4 v0x1acc590_0; - %assign/vec4 v0x1acc750_0, 0; + %load/vec4 v0x2698590_0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.56; T_1.55 ; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; T_1.56 ; %jmp T_1.50; T_1.49 ; - %load/vec4 v0x1acc0f0_0; + %load/vec4 v0x26980f0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_1.57, 5; - %load/vec4 v0x1acc590_0; - %assign/vec4 v0x1acc750_0, 0; + %load/vec4 v0x2698590_0; + %assign/vec4 v0x2698750_0, 0; %jmp T_1.58; T_1.57 ; - %load/vec4 v0x1acc670_0; + %load/vec4 v0x2698670_0; %addi 1, 0, 4; - %assign/vec4 v0x1acc750_0, 0; + %assign/vec4 v0x2698750_0, 0; T_1.58 ; %jmp T_1.50; T_1.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.7; T_1.6 ; - %load/vec4 v0x1acc460_0; + %load/vec4 v0x2698460_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1acc460_0; + %load/vec4 v0x2698460_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_1.59, 4; - %load/vec4 v0x1acc290_0; + %load/vec4 v0x2698290_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1acc290_0; + %load/vec4 v0x2698290_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -1464,162 +1464,162 @@ T_1.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_1.61, 9; - %load/vec4 v0x1acc290_0; + %load/vec4 v0x2698290_0; %cmpi/e 1, 0, 3; %jmp/0xz T_1.63, 4; - %load/vec4 v0x1ad0be0_0; - %assign/vec4 v0x1acc0f0_0, 0; + %load/vec4 v0x269cbe0_0; + %assign/vec4 v0x26980f0_0, 0; T_1.63 ; %jmp T_1.62; T_1.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; - %load/vec4 v0x1acc290_0; + %assign/vec4 v0x269b7e0_0, 0; + %load/vec4 v0x2698290_0; %cmpi/e 6, 0, 3; %jmp/0xz T_1.65, 4; - %load/vec4 v0x1acf540_0; - %assign/vec4 v0x1ad0b00_0, 0; - %load/vec4 v0x1ad0be0_0; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; + %assign/vec4 v0x269cb00_0, 0; + %load/vec4 v0x269cbe0_0; + %load/vec4 v0x269b540_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acf540_0; + %load/vec4 v0x269b540_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; + %assign/vec4/off/d v0x269c780_0, 4, 5; %jmp T_1.66; T_1.65 ; - %load/vec4 v0x1acc290_0; + %load/vec4 v0x2698290_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.67, 4; - %load/vec4 v0x1acc290_0; - %assign/vec4 v0x1ad0b00_0, 0; - %load/vec4 v0x1ad0be0_0; - %load/vec4 v0x1acc290_0; + %load/vec4 v0x2698290_0; + %assign/vec4 v0x269cb00_0, 0; + %load/vec4 v0x269cbe0_0; + %load/vec4 v0x2698290_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acc290_0; + %load/vec4 v0x2698290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1acc290_0; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x2698290_0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.68; T_1.67 ; - %load/vec4 v0x1acefc0_0; + %load/vec4 v0x269afc0_0; %flag_set/vec4 8; %jmp/0xz T_1.69, 8; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.72; T_1.71 ; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.74; T_1.73 ; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.76; T_1.75 ; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; T_1.77 ; T_1.76 ; T_1.74 ; T_1.72 ; %jmp T_1.70; T_1.69 ; - %load/vec4 v0x1acc290_0; - %assign/vec4 v0x1ad0b00_0, 0; + %load/vec4 v0x2698290_0; + %assign/vec4 v0x269cb00_0, 0; T_1.70 ; T_1.68 ; T_1.66 ; T_1.62 ; T_1.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.7; T_1.7 ; %pop/vec4 1; %jmp T_1.3; T_1.1 ; - %load/vec4 v0x1acfa00_0; + %load/vec4 v0x269ba00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1634,82 +1634,82 @@ T_1.1 ; %jmp/1 T_1.81, 6; %jmp T_1.82; T_1.79 ; - %load/vec4 v0x1ad0050_0; + %load/vec4 v0x269c050_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.83, 4; - %load/vec4 v0x1acee40_0; + %load/vec4 v0x269ae40_0; %flag_set/vec4 8; %jmp/0xz T_1.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; + %assign/vec4 v0x269b7e0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad0860_0, 0, 4; - %load/vec4 v0x1acfae0_0; + %store/vec4 v0x269c860_0, 0, 4; + %load/vec4 v0x269bae0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.88; T_1.87 ; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.90; T_1.89 ; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.92; T_1.91 ; - %load/vec4 v0x1acfae0_0; + %load/vec4 v0x269bae0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; T_1.93 ; T_1.92 ; T_1.90 ; @@ -1717,54 +1717,54 @@ T_1.88 ; T_1.85 ; %jmp T_1.84; T_1.83 ; - %load/vec4 v0x1acfae0_0; - %load/vec4 v0x1ad0050_0; + %load/vec4 v0x269bae0_0; + %load/vec4 v0x269c050_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; - %load/vec4 v0x1ad0050_0; + %assign/vec4 v0x269b7e0_0, 0; + %load/vec4 v0x269c050_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad0210, 4; - %assign/vec4 v0x1ad0130_0, 0; + %load/vec4a v0x269c210, 4; + %assign/vec4 v0x269c130_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad0050_0; + %load/vec4 v0x269c050_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acff90_0, 4, 5; + %assign/vec4/off/d v0x269bf90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad0050_0; + %load/vec4 v0x269c050_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad0860_0, 4, 5; - %load/vec4 v0x1ad0050_0; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4/off/d v0x269c860_0, 4, 5; + %load/vec4 v0x269c050_0; + %assign/vec4 v0x269b540_0, 0; T_1.95 ; T_1.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.82; T_1.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.82; T_1.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.82; T_1.82 ; %pop/vec4 1; %jmp T_1.3; T_1.2 ; - %load/vec4 v0x1acfa00_0; + %load/vec4 v0x269ba00_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -1780,93 +1780,93 @@ T_1.2 ; %jmp T_1.100; T_1.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.100; T_1.98 ; - %load/vec4 v0x1ad0b00_0; + %load/vec4 v0x269cb00_0; %cmpi/e 7, 0, 3; %jmp/0xz T_1.101, 4; - %load/vec4 v0x1acefc0_0; + %load/vec4 v0x269afc0_0; %flag_set/vec4 8; %jmp/0xz T_1.103, 8; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_1.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.106; T_1.105 ; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_1.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.108; T_1.107 ; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_1.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; %jmp T_1.110; T_1.109 ; - %load/vec4 v0x1acdf10_0; + %load/vec4 v0x2699f10_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_1.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad0b00_0, 0; + %assign/vec4 v0x269cb00_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad0780_0, 4, 5; - %load/vec4 v0x1ad0be0_0; + %assign/vec4/off/d v0x269c780_0, 4, 5; + %load/vec4 v0x269cbe0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1acf8c0, 0, 4; + %assign/vec4/a/d v0x269b8c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b540_0, 0; T_1.111 ; T_1.110 ; T_1.108 ; @@ -1874,33 +1874,33 @@ T_1.106 ; T_1.103 ; T_1.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.100; T_1.99 ; - %load/vec4 v0x1ad0b00_0; + %load/vec4 v0x269cb00_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_1.113, 4; - %load/vec4 v0x1ad0940_0; - %load/vec4 v0x1ad0b00_0; + %load/vec4 v0x269c940_0; + %load/vec4 v0x269cb00_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_1.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1ad0b00_0; + %load/vec4 v0x269cb00_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1ad0780_0, 4, 1; + %store/vec4 v0x269c780_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1acf7e0_0, 0; - %load/vec4 v0x1ad0b00_0; - %assign/vec4 v0x1acf540_0, 0; + %assign/vec4 v0x269b7e0_0, 0; + %load/vec4 v0x269cb00_0; + %assign/vec4 v0x269b540_0, 0; T_1.115 ; T_1.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1acfa00_0, 0; + %assign/vec4 v0x269ba00_0, 0; %jmp T_1.100; T_1.100 ; %pop/vec4 1; @@ -1909,19 +1909,19 @@ T_1.3 ; %pop/vec4 1; %jmp T_1; .thread T_1; - .scope S_0x1acbc50; + .scope S_0x2697c50; T_2 ; - %wait E_0x1a1d520; - %load/vec4 v0x1acfa00_0; + %wait E_0x25e9520; + %load/vec4 v0x269ba00_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1acf7e0_0; + %load/vec4 v0x269b7e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1acc750_0; + %load/vec4 v0x2698750_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -1930,62 +1930,62 @@ T_2 ; %and; %flag_set/vec4 8; %jmp/0xz T_2.0, 8; - %load/vec4 v0x1acc750_0; - %assign/vec4 v0x1acc670_0, 0; + %load/vec4 v0x2698750_0; + %assign/vec4 v0x2698670_0, 0; T_2.0 ; - %load/vec4 v0x1acfa00_0; + %load/vec4 v0x269ba00_0; %cmpi/e 0, 0, 3; %jmp/0xz T_2.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acff90_0, 0, 4; + %store/vec4 v0x269bf90_0, 0, 4; T_2.2 ; %jmp T_2; .thread T_2; - .scope S_0x1ad0e60; + .scope S_0x269ce60; T_3 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ad4a30_0, 0, 3; + %store/vec4 v0x26a0a30_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ad4c60_0, 0, 3; + %store/vec4 v0x26a0c60_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ad47f0_0, 0, 3; + %store/vec4 v0x26a07f0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ad13e0_0, 0, 11; + %store/vec4 v0x269d3e0_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ad14e0_0, 0, 11; + %store/vec4 v0x269d4e0_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad1920_0, 0, 4; + %store/vec4 v0x269d920_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad51f0_0, 0, 4; + %store/vec4 v0x26a11f0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad5a40_0, 0, 4; + %store/vec4 v0x26a1a40_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad5c00_0, 0, 4; + %store/vec4 v0x26a1c00_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad5960_0, 0, 4; + %store/vec4 v0x26a1960_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad4af0, 4, 0; + %store/vec4a v0x26a0af0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad4af0, 4, 0; + %store/vec4a v0x26a0af0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad4af0, 4, 0; + %store/vec4a v0x26a0af0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad4af0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1ad1070, v0x1ad4730 {0 0 0}; + %store/vec4a v0x26a0af0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x269d070, v0x26a0730 {0 0 0}; %end; .thread T_3; - .scope S_0x1ad0e60; + .scope S_0x269ce60; T_4 ; - %wait E_0x1a3fcc0; - %load/vec4 v0x1ad4a30_0; + %wait E_0x260bcc0; + %load/vec4 v0x26a0a30_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2000,7 +2000,7 @@ T_4 ; %jmp/1 T_4.2, 6; %jmp T_4.3; T_4.0 ; - %load/vec4 v0x1ad4c60_0; + %load/vec4 v0x26a0c60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2015,185 +2015,185 @@ T_4.0 ; %jmp/1 T_4.6, 6; %jmp T_4.7; T_4.4 ; - %load/vec4 v0x1ad1760_0; + %load/vec4 v0x269d760_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_4.8, 5; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_4.10, 5; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %jmp T_4.11; T_4.10 ; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_4.12, 5; - %load/vec4 v0x1ad4d40_0; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x26a0d40_0; + %load/vec4 v0x269dae0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.14, 8; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; - %load/vec4 v0x1ad1ae0_0; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; + %load/vec4 v0x269dae0_0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.15; T_4.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; - %load/vec4 v0x1ad1ae0_0; - %assign/vec4 v0x1ad5290_0, 0; + %assign/vec4 v0x26a0a30_0, 0; + %load/vec4 v0x269dae0_0; + %assign/vec4 v0x26a1290_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; - %load/vec4 v0x1ad1ae0_0; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; + %load/vec4 v0x269dae0_0; + %assign/vec4 v0x26a07f0_0, 0; T_4.15 ; %jmp T_4.13; T_4.12 ; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.16, 4; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_4.18, 4; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %jmp T_4.19; T_4.18 ; - %load/vec4 v0x1ad4d40_0; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a0d40_0; + %load/vec4 v0x26a07f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.20, 8; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %jmp T_4.21; T_4.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; - %load/vec4 v0x1ad47f0_0; - %assign/vec4 v0x1ad5290_0, 0; + %assign/vec4 v0x26a0a30_0, 0; + %load/vec4 v0x26a07f0_0; + %assign/vec4 v0x26a1290_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; T_4.21 ; T_4.19 ; %jmp T_4.17; T_4.16 ; - %load/vec4 v0x1ad1ae0_0; + %load/vec4 v0x269dae0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.22, 4; - %load/vec4 v0x1ad40f0_0; + %load/vec4 v0x26a00f0_0; %flag_set/vec4 8; %jmp/0xz T_4.24, 8; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.27; T_4.26 ; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.29; T_4.28 ; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.31; T_4.30 ; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; T_4.32 ; T_4.31 ; T_4.29 ; @@ -2201,29 +2201,29 @@ T_4.27 ; %jmp T_4.25; T_4.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; - %load/vec4 v0x1ad1ae0_0; - %assign/vec4 v0x1ad5290_0, 0; + %assign/vec4 v0x26a0a30_0, 0; + %load/vec4 v0x269dae0_0; + %assign/vec4 v0x26a1290_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; T_4.25 ; T_4.22 ; T_4.17 ; @@ -2231,10 +2231,10 @@ T_4.13 ; T_4.11 ; T_4.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.7; T_4.5 ; - %load/vec4 v0x1ad1760_0; + %load/vec4 v0x269d760_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -2301,180 +2301,180 @@ T_4.5 ; %jmp/1 T_4.49, 6; %jmp T_4.50; T_4.34 ; - %load/vec4 v0x1ad13e0_0; - %load/vec4 v0x1ad5330_0; + %load/vec4 v0x269d3e0_0; + %load/vec4 v0x26a1330_0; %add; - %assign/vec4 v0x1ad13e0_0, 0; - %load/vec4 v0x1ad1920_0; + %assign/vec4 v0x269d3e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.35 ; - %load/vec4 v0x1ad13e0_0; - %load/vec4 v0x1ad5330_0; + %load/vec4 v0x269d3e0_0; + %load/vec4 v0x26a1330_0; %sub; - %assign/vec4 v0x1ad13e0_0, 0; - %load/vec4 v0x1ad1920_0; + %assign/vec4 v0x269d3e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.36 ; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d920_0; %pad/u 11; - %load/vec4 v0x1ad5330_0; + %load/vec4 v0x26a1330_0; %add; %pad/u 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.37 ; - %load/vec4 v0x1ad5330_0; - %assign/vec4 v0x1ad5dc0_0, 0; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x26a1330_0; + %assign/vec4 v0x26a1dc0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.38 ; - %load/vec4 v0x1ad1680_0; - %assign/vec4 v0x1ad5dc0_0, 0; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d680_0; + %assign/vec4 v0x26a1dc0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.39 ; - %load/vec4 v0x1ad13e0_0; - %load/vec4 v0x1ad1680_0; + %load/vec4 v0x269d3e0_0; + %load/vec4 v0x269d680_0; %add; - %assign/vec4 v0x1ad13e0_0, 0; - %load/vec4 v0x1ad1920_0; + %assign/vec4 v0x269d3e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.40 ; - %load/vec4 v0x1ad13e0_0; - %load/vec4 v0x1ad1680_0; + %load/vec4 v0x269d3e0_0; + %load/vec4 v0x269d680_0; %sub; - %assign/vec4 v0x1ad13e0_0, 0; - %load/vec4 v0x1ad1920_0; + %assign/vec4 v0x269d3e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.41 ; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d920_0; %pad/u 11; - %load/vec4 v0x1ad1680_0; + %load/vec4 v0x269d680_0; %add; %pad/u 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.42 ; - %load/vec4 v0x1ad14e0_0; - %assign/vec4 v0x1ad13e0_0, 0; - %load/vec4 v0x1ad13e0_0; - %assign/vec4 v0x1ad14e0_0, 0; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d4e0_0; + %assign/vec4 v0x269d3e0_0, 0; + %load/vec4 v0x269d3e0_0; + %assign/vec4 v0x269d4e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.43 ; - %load/vec4 v0x1ad13e0_0; - %assign/vec4 v0x1ad14e0_0, 0; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d3e0_0; + %assign/vec4 v0x269d4e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.44 ; - %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x269d3e0_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1ad13e0_0, 0; - %load/vec4 v0x1ad1920_0; + %assign/vec4 v0x269d3e0_0, 0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.45 ; - %load/vec4 v0x1ad1840_0; - %assign/vec4 v0x1ad1a00_0, 0; + %load/vec4 v0x269d840_0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.50; T_4.46 ; - %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x269d3e0_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_4.51, 4; - %load/vec4 v0x1ad1840_0; - %assign/vec4 v0x1ad1a00_0, 0; + %load/vec4 v0x269d840_0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.52; T_4.51 ; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; T_4.52 ; %jmp T_4.50; T_4.47 ; - %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x269d3e0_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_4.53, 4; - %load/vec4 v0x1ad1840_0; - %assign/vec4 v0x1ad1a00_0, 0; + %load/vec4 v0x269d840_0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.54; T_4.53 ; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; T_4.54 ; %jmp T_4.50; T_4.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x269d3e0_0; %pad/s 32; %cmp/s; %jmp/0xz T_4.55, 5; - %load/vec4 v0x1ad1840_0; - %assign/vec4 v0x1ad1a00_0, 0; + %load/vec4 v0x269d840_0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.56; T_4.55 ; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; T_4.56 ; %jmp T_4.50; T_4.49 ; - %load/vec4 v0x1ad13e0_0; + %load/vec4 v0x269d3e0_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_4.57, 5; - %load/vec4 v0x1ad1840_0; - %assign/vec4 v0x1ad1a00_0, 0; + %load/vec4 v0x269d840_0; + %assign/vec4 v0x269da00_0, 0; %jmp T_4.58; T_4.57 ; - %load/vec4 v0x1ad1920_0; + %load/vec4 v0x269d920_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad1a00_0, 0; + %assign/vec4 v0x269da00_0, 0; T_4.58 ; %jmp T_4.50; T_4.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.7; T_4.6 ; - %load/vec4 v0x1ad1760_0; + %load/vec4 v0x269d760_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1ad1760_0; + %load/vec4 v0x269d760_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_4.59, 4; - %load/vec4 v0x1ad15c0_0; + %load/vec4 v0x269d5c0_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1ad15c0_0; + %load/vec4 v0x269d5c0_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -2482,162 +2482,162 @@ T_4.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_4.61, 9; - %load/vec4 v0x1ad15c0_0; + %load/vec4 v0x269d5c0_0; %cmpi/e 1, 0, 3; %jmp/0xz T_4.63, 4; - %load/vec4 v0x1ad5dc0_0; - %assign/vec4 v0x1ad13e0_0, 0; + %load/vec4 v0x26a1dc0_0; + %assign/vec4 v0x269d3e0_0, 0; T_4.63 ; %jmp T_4.62; T_4.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; - %load/vec4 v0x1ad15c0_0; + %assign/vec4 v0x26a0a30_0, 0; + %load/vec4 v0x269d5c0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_4.65, 4; - %load/vec4 v0x1ad47f0_0; - %assign/vec4 v0x1ad5ce0_0, 0; - %load/vec4 v0x1ad5dc0_0; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; + %assign/vec4 v0x26a1ce0_0, 0; + %load/vec4 v0x26a1dc0_0; + %load/vec4 v0x26a07f0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad47f0_0; + %load/vec4 v0x26a07f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; + %assign/vec4/off/d v0x26a1960_0, 4, 5; %jmp T_4.66; T_4.65 ; - %load/vec4 v0x1ad15c0_0; + %load/vec4 v0x269d5c0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.67, 4; - %load/vec4 v0x1ad15c0_0; - %assign/vec4 v0x1ad5ce0_0, 0; - %load/vec4 v0x1ad5dc0_0; - %load/vec4 v0x1ad15c0_0; + %load/vec4 v0x269d5c0_0; + %assign/vec4 v0x26a1ce0_0, 0; + %load/vec4 v0x26a1dc0_0; + %load/vec4 v0x269d5c0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad15c0_0; + %load/vec4 v0x269d5c0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad15c0_0; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x269d5c0_0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.68; T_4.67 ; - %load/vec4 v0x1ad4270_0; + %load/vec4 v0x26a0270_0; %flag_set/vec4 8; %jmp/0xz T_4.69, 8; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.72; T_4.71 ; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.74; T_4.73 ; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.76; T_4.75 ; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; T_4.77 ; T_4.76 ; T_4.74 ; T_4.72 ; %jmp T_4.70; T_4.69 ; - %load/vec4 v0x1ad15c0_0; - %assign/vec4 v0x1ad5ce0_0, 0; + %load/vec4 v0x269d5c0_0; + %assign/vec4 v0x26a1ce0_0, 0; T_4.70 ; T_4.68 ; T_4.66 ; T_4.62 ; T_4.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.7; T_4.7 ; %pop/vec4 1; %jmp T_4.3; T_4.1 ; - %load/vec4 v0x1ad4c60_0; + %load/vec4 v0x26a0c60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2652,82 +2652,82 @@ T_4.1 ; %jmp/1 T_4.81, 6; %jmp T_4.82; T_4.79 ; - %load/vec4 v0x1ad5290_0; + %load/vec4 v0x26a1290_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.83, 4; - %load/vec4 v0x1ad40f0_0; + %load/vec4 v0x26a00f0_0; %flag_set/vec4 8; %jmp/0xz T_4.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; + %assign/vec4 v0x26a0a30_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad5a40_0, 0, 4; - %load/vec4 v0x1ad4d40_0; + %store/vec4 v0x26a1a40_0, 0, 4; + %load/vec4 v0x26a0d40_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.88; T_4.87 ; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.90; T_4.89 ; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.92; T_4.91 ; - %load/vec4 v0x1ad4d40_0; + %load/vec4 v0x26a0d40_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; T_4.93 ; T_4.92 ; T_4.90 ; @@ -2735,54 +2735,54 @@ T_4.88 ; T_4.85 ; %jmp T_4.84; T_4.83 ; - %load/vec4 v0x1ad4d40_0; - %load/vec4 v0x1ad5290_0; + %load/vec4 v0x26a0d40_0; + %load/vec4 v0x26a1290_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; - %load/vec4 v0x1ad5290_0; + %assign/vec4 v0x26a0a30_0, 0; + %load/vec4 v0x26a1290_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ad53d0, 4; - %assign/vec4 v0x1ad5330_0, 0; + %load/vec4a v0x26a13d0, 4; + %assign/vec4 v0x26a1330_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad5290_0; + %load/vec4 v0x26a1290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad51f0_0, 4, 5; + %assign/vec4/off/d v0x26a11f0_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad5290_0; + %load/vec4 v0x26a1290_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ad5a40_0, 4, 5; - %load/vec4 v0x1ad5290_0; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4/off/d v0x26a1a40_0, 4, 5; + %load/vec4 v0x26a1290_0; + %assign/vec4 v0x26a07f0_0, 0; T_4.95 ; T_4.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.82; T_4.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.82; T_4.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.82; T_4.82 ; %pop/vec4 1; %jmp T_4.3; T_4.2 ; - %load/vec4 v0x1ad4c60_0; + %load/vec4 v0x26a0c60_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -2798,93 +2798,93 @@ T_4.2 ; %jmp T_4.100; T_4.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.100; T_4.98 ; - %load/vec4 v0x1ad5ce0_0; + %load/vec4 v0x26a1ce0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_4.101, 4; - %load/vec4 v0x1ad4270_0; + %load/vec4 v0x26a0270_0; %flag_set/vec4 8; %jmp/0xz T_4.103, 8; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_4.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.106; T_4.105 ; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_4.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.108; T_4.107 ; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_4.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; %jmp T_4.110; T_4.109 ; - %load/vec4 v0x1ad31a0_0; + %load/vec4 v0x269f1a0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_4.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad5ce0_0, 0; + %assign/vec4 v0x26a1ce0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ad5960_0, 4, 5; - %load/vec4 v0x1ad5dc0_0; + %assign/vec4/off/d v0x26a1960_0, 4, 5; + %load/vec4 v0x26a1dc0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad4af0, 0, 4; + %assign/vec4/a/d v0x26a0af0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a07f0_0, 0; T_4.111 ; T_4.110 ; T_4.108 ; @@ -2892,33 +2892,33 @@ T_4.106 ; T_4.103 ; T_4.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.100; T_4.99 ; - %load/vec4 v0x1ad5ce0_0; + %load/vec4 v0x26a1ce0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_4.113, 4; - %load/vec4 v0x1ad5b20_0; - %load/vec4 v0x1ad5ce0_0; + %load/vec4 v0x26a1b20_0; + %load/vec4 v0x26a1ce0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_4.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1ad5ce0_0; + %load/vec4 v0x26a1ce0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1ad5960_0, 4, 1; + %store/vec4 v0x26a1960_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad4a30_0, 0; - %load/vec4 v0x1ad5ce0_0; - %assign/vec4 v0x1ad47f0_0, 0; + %assign/vec4 v0x26a0a30_0, 0; + %load/vec4 v0x26a1ce0_0; + %assign/vec4 v0x26a07f0_0, 0; T_4.115 ; T_4.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad4c60_0, 0; + %assign/vec4 v0x26a0c60_0, 0; %jmp T_4.100; T_4.100 ; %pop/vec4 1; @@ -2927,19 +2927,19 @@ T_4.3 ; %pop/vec4 1; %jmp T_4; .thread T_4; - .scope S_0x1ad0e60; + .scope S_0x269ce60; T_5 ; - %wait E_0x1a1d520; - %load/vec4 v0x1ad4c60_0; + %wait E_0x25e9520; + %load/vec4 v0x26a0c60_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ad4a30_0; + %load/vec4 v0x26a0a30_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1ad1a00_0; + %load/vec4 v0x269da00_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -2948,62 +2948,62 @@ T_5 ; %and; %flag_set/vec4 8; %jmp/0xz T_5.0, 8; - %load/vec4 v0x1ad1a00_0; - %assign/vec4 v0x1ad1920_0, 0; + %load/vec4 v0x269da00_0; + %assign/vec4 v0x269d920_0, 0; T_5.0 ; - %load/vec4 v0x1ad4c60_0; + %load/vec4 v0x26a0c60_0; %cmpi/e 0, 0, 3; %jmp/0xz T_5.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad51f0_0, 0, 4; + %store/vec4 v0x26a11f0_0, 0, 4; T_5.2 ; %jmp T_5; .thread T_5; - .scope S_0x1ad6040; + .scope S_0x26a2040; T_6 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ad9c70_0, 0, 3; + %store/vec4 v0x26a5c70_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ad9ec0_0, 0, 3; + %store/vec4 v0x26a5ec0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ad99d0_0, 0, 3; + %store/vec4 v0x26a59d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ad6560_0, 0, 11; + %store/vec4 v0x26a2560_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ad6660_0, 0, 11; + %store/vec4 v0x26a2660_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ad6af0_0, 0, 4; + %store/vec4 v0x26a2af0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ada450_0, 0, 4; + %store/vec4 v0x26a6450_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1adaca0_0, 0, 4; + %store/vec4 v0x26a6ca0_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1adae60_0, 0, 4; + %store/vec4 v0x26a6e60_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1adabc0_0, 0, 4; + %store/vec4 v0x26a6bc0_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad9d50, 4, 0; + %store/vec4a v0x26a5d50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad9d50, 4, 0; + %store/vec4a v0x26a5d50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad9d50, 4, 0; + %store/vec4a v0x26a5d50, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ad9d50, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1ad62a0, v0x1ad9910 {0 0 0}; + %store/vec4a v0x26a5d50, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x26a22a0, v0x26a5910 {0 0 0}; %end; .thread T_6; - .scope S_0x1ad6040; + .scope S_0x26a2040; T_7 ; - %wait E_0x1a3fcc0; - %load/vec4 v0x1ad9c70_0; + %wait E_0x260bcc0; + %load/vec4 v0x26a5c70_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3018,7 +3018,7 @@ T_7 ; %jmp/1 T_7.2, 6; %jmp T_7.3; T_7.0 ; - %load/vec4 v0x1ad9ec0_0; + %load/vec4 v0x26a5ec0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3033,185 +3033,185 @@ T_7.0 ; %jmp/1 T_7.6, 6; %jmp T_7.7; T_7.4 ; - %load/vec4 v0x1ad68e0_0; + %load/vec4 v0x26a28e0_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_7.8, 5; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_7.10, 5; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %jmp T_7.11; T_7.10 ; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_7.12, 5; - %load/vec4 v0x1ad9fa0_0; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a5fa0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.14, 8; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ada450_0, 4, 5; - %load/vec4 v0x1ad6cb0_0; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4/off/d v0x26a6450_0, 4, 5; + %load/vec4 v0x26a2cb0_0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.15; T_7.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; - %load/vec4 v0x1ad6cb0_0; - %assign/vec4 v0x1ada4f0_0, 0; + %assign/vec4 v0x26a5c70_0, 0; + %load/vec4 v0x26a2cb0_0; + %assign/vec4 v0x26a64f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; - %load/vec4 v0x1ad6cb0_0; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; + %load/vec4 v0x26a2cb0_0; + %assign/vec4 v0x26a59d0_0, 0; T_7.15 ; %jmp T_7.13; T_7.12 ; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.16, 4; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_7.18, 4; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %jmp T_7.19; T_7.18 ; - %load/vec4 v0x1ad9fa0_0; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a5fa0_0; + %load/vec4 v0x26a59d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.20, 8; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %jmp T_7.21; T_7.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; - %load/vec4 v0x1ad99d0_0; - %assign/vec4 v0x1ada4f0_0, 0; + %assign/vec4 v0x26a5c70_0, 0; + %load/vec4 v0x26a59d0_0; + %assign/vec4 v0x26a64f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; T_7.21 ; T_7.19 ; %jmp T_7.17; T_7.16 ; - %load/vec4 v0x1ad6cb0_0; + %load/vec4 v0x26a2cb0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.22, 4; - %load/vec4 v0x1ad92c0_0; + %load/vec4 v0x26a52c0_0; %flag_set/vec4 8; %jmp/0xz T_7.24, 8; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.27; T_7.26 ; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.29; T_7.28 ; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.31; T_7.30 ; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; T_7.32 ; T_7.31 ; T_7.29 ; @@ -3219,29 +3219,29 @@ T_7.27 ; %jmp T_7.25; T_7.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; - %load/vec4 v0x1ad6cb0_0; - %assign/vec4 v0x1ada4f0_0, 0; + %assign/vec4 v0x26a5c70_0, 0; + %load/vec4 v0x26a2cb0_0; + %assign/vec4 v0x26a64f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; T_7.25 ; T_7.22 ; T_7.17 ; @@ -3249,10 +3249,10 @@ T_7.13 ; T_7.11 ; T_7.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.7; T_7.5 ; - %load/vec4 v0x1ad68e0_0; + %load/vec4 v0x26a28e0_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -3319,180 +3319,180 @@ T_7.5 ; %jmp/1 T_7.49, 6; %jmp T_7.50; T_7.34 ; - %load/vec4 v0x1ad6560_0; - %load/vec4 v0x1ada590_0; + %load/vec4 v0x26a2560_0; + %load/vec4 v0x26a6590_0; %add; - %assign/vec4 v0x1ad6560_0, 0; - %load/vec4 v0x1ad6af0_0; + %assign/vec4 v0x26a2560_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.35 ; - %load/vec4 v0x1ad6560_0; - %load/vec4 v0x1ada590_0; + %load/vec4 v0x26a2560_0; + %load/vec4 v0x26a6590_0; %sub; - %assign/vec4 v0x1ad6560_0, 0; - %load/vec4 v0x1ad6af0_0; + %assign/vec4 v0x26a2560_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.36 ; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2af0_0; %pad/u 11; - %load/vec4 v0x1ada590_0; + %load/vec4 v0x26a6590_0; %add; %pad/u 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.37 ; - %load/vec4 v0x1ada590_0; - %assign/vec4 v0x1adb020_0, 0; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a6590_0; + %assign/vec4 v0x26a7020_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.38 ; - %load/vec4 v0x1ad6800_0; - %assign/vec4 v0x1adb020_0, 0; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2800_0; + %assign/vec4 v0x26a7020_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.39 ; - %load/vec4 v0x1ad6560_0; - %load/vec4 v0x1ad6800_0; + %load/vec4 v0x26a2560_0; + %load/vec4 v0x26a2800_0; %add; - %assign/vec4 v0x1ad6560_0, 0; - %load/vec4 v0x1ad6af0_0; + %assign/vec4 v0x26a2560_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.40 ; - %load/vec4 v0x1ad6560_0; - %load/vec4 v0x1ad6800_0; + %load/vec4 v0x26a2560_0; + %load/vec4 v0x26a2800_0; %sub; - %assign/vec4 v0x1ad6560_0, 0; - %load/vec4 v0x1ad6af0_0; + %assign/vec4 v0x26a2560_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.41 ; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2af0_0; %pad/u 11; - %load/vec4 v0x1ad6800_0; + %load/vec4 v0x26a2800_0; %add; %pad/u 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.42 ; - %load/vec4 v0x1ad6660_0; - %assign/vec4 v0x1ad6560_0, 0; - %load/vec4 v0x1ad6560_0; - %assign/vec4 v0x1ad6660_0, 0; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2660_0; + %assign/vec4 v0x26a2560_0, 0; + %load/vec4 v0x26a2560_0; + %assign/vec4 v0x26a2660_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.43 ; - %load/vec4 v0x1ad6560_0; - %assign/vec4 v0x1ad6660_0, 0; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2560_0; + %assign/vec4 v0x26a2660_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.44 ; - %load/vec4 v0x1ad6560_0; + %load/vec4 v0x26a2560_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1ad6560_0, 0; - %load/vec4 v0x1ad6af0_0; + %assign/vec4 v0x26a2560_0, 0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.45 ; - %load/vec4 v0x1ad6a10_0; - %assign/vec4 v0x1ad6bd0_0, 0; + %load/vec4 v0x26a2a10_0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.50; T_7.46 ; - %load/vec4 v0x1ad6560_0; + %load/vec4 v0x26a2560_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_7.51, 4; - %load/vec4 v0x1ad6a10_0; - %assign/vec4 v0x1ad6bd0_0, 0; + %load/vec4 v0x26a2a10_0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.52; T_7.51 ; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; T_7.52 ; %jmp T_7.50; T_7.47 ; - %load/vec4 v0x1ad6560_0; + %load/vec4 v0x26a2560_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_7.53, 4; - %load/vec4 v0x1ad6a10_0; - %assign/vec4 v0x1ad6bd0_0, 0; + %load/vec4 v0x26a2a10_0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.54; T_7.53 ; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; T_7.54 ; %jmp T_7.50; T_7.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1ad6560_0; + %load/vec4 v0x26a2560_0; %pad/s 32; %cmp/s; %jmp/0xz T_7.55, 5; - %load/vec4 v0x1ad6a10_0; - %assign/vec4 v0x1ad6bd0_0, 0; + %load/vec4 v0x26a2a10_0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.56; T_7.55 ; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; T_7.56 ; %jmp T_7.50; T_7.49 ; - %load/vec4 v0x1ad6560_0; + %load/vec4 v0x26a2560_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_7.57, 5; - %load/vec4 v0x1ad6a10_0; - %assign/vec4 v0x1ad6bd0_0, 0; + %load/vec4 v0x26a2a10_0; + %assign/vec4 v0x26a2bd0_0, 0; %jmp T_7.58; T_7.57 ; - %load/vec4 v0x1ad6af0_0; + %load/vec4 v0x26a2af0_0; %addi 1, 0, 4; - %assign/vec4 v0x1ad6bd0_0, 0; + %assign/vec4 v0x26a2bd0_0, 0; T_7.58 ; %jmp T_7.50; T_7.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.7; T_7.6 ; - %load/vec4 v0x1ad68e0_0; + %load/vec4 v0x26a28e0_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1ad68e0_0; + %load/vec4 v0x26a28e0_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_7.59, 4; - %load/vec4 v0x1ad6740_0; + %load/vec4 v0x26a2740_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1ad6740_0; + %load/vec4 v0x26a2740_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -3500,162 +3500,162 @@ T_7.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_7.61, 9; - %load/vec4 v0x1ad6740_0; + %load/vec4 v0x26a2740_0; %cmpi/e 1, 0, 3; %jmp/0xz T_7.63, 4; - %load/vec4 v0x1adb020_0; - %assign/vec4 v0x1ad6560_0, 0; + %load/vec4 v0x26a7020_0; + %assign/vec4 v0x26a2560_0, 0; T_7.63 ; %jmp T_7.62; T_7.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; - %load/vec4 v0x1ad6740_0; + %assign/vec4 v0x26a5c70_0, 0; + %load/vec4 v0x26a2740_0; %cmpi/e 6, 0, 3; %jmp/0xz T_7.65, 4; - %load/vec4 v0x1ad99d0_0; - %assign/vec4 v0x1adaf40_0, 0; - %load/vec4 v0x1adb020_0; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; + %assign/vec4 v0x26a6f40_0, 0; + %load/vec4 v0x26a7020_0; + %load/vec4 v0x26a59d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad99d0_0; + %load/vec4 v0x26a59d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; %jmp T_7.66; T_7.65 ; - %load/vec4 v0x1ad6740_0; + %load/vec4 v0x26a2740_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.67, 4; - %load/vec4 v0x1ad6740_0; - %assign/vec4 v0x1adaf40_0, 0; - %load/vec4 v0x1adb020_0; - %load/vec4 v0x1ad6740_0; + %load/vec4 v0x26a2740_0; + %assign/vec4 v0x26a6f40_0, 0; + %load/vec4 v0x26a7020_0; + %load/vec4 v0x26a2740_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ad6740_0; + %load/vec4 v0x26a2740_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1ad6740_0; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a2740_0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.68; T_7.67 ; - %load/vec4 v0x1ad9440_0; + %load/vec4 v0x26a5440_0; %flag_set/vec4 8; %jmp/0xz T_7.69, 8; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.72; T_7.71 ; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.74; T_7.73 ; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.76; T_7.75 ; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; T_7.77 ; T_7.76 ; T_7.74 ; T_7.72 ; %jmp T_7.70; T_7.69 ; - %load/vec4 v0x1ad6740_0; - %assign/vec4 v0x1adaf40_0, 0; + %load/vec4 v0x26a2740_0; + %assign/vec4 v0x26a6f40_0, 0; T_7.70 ; T_7.68 ; T_7.66 ; T_7.62 ; T_7.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.7; T_7.7 ; %pop/vec4 1; %jmp T_7.3; T_7.1 ; - %load/vec4 v0x1ad9ec0_0; + %load/vec4 v0x26a5ec0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3670,82 +3670,82 @@ T_7.1 ; %jmp/1 T_7.81, 6; %jmp T_7.82; T_7.79 ; - %load/vec4 v0x1ada4f0_0; + %load/vec4 v0x26a64f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.83, 4; - %load/vec4 v0x1ad92c0_0; + %load/vec4 v0x26a52c0_0; %flag_set/vec4 8; %jmp/0xz T_7.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; + %assign/vec4 v0x26a5c70_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1adaca0_0, 0, 4; - %load/vec4 v0x1ad9fa0_0; + %store/vec4 v0x26a6ca0_0, 0, 4; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.88; T_7.87 ; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.90; T_7.89 ; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.92; T_7.91 ; - %load/vec4 v0x1ad9fa0_0; + %load/vec4 v0x26a5fa0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; T_7.93 ; T_7.92 ; T_7.90 ; @@ -3753,54 +3753,54 @@ T_7.88 ; T_7.85 ; %jmp T_7.84; T_7.83 ; - %load/vec4 v0x1ad9fa0_0; - %load/vec4 v0x1ada4f0_0; + %load/vec4 v0x26a5fa0_0; + %load/vec4 v0x26a64f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; - %load/vec4 v0x1ada4f0_0; + %assign/vec4 v0x26a5c70_0, 0; + %load/vec4 v0x26a64f0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ada630, 4; - %assign/vec4 v0x1ada590_0, 0; + %load/vec4a v0x26a6630, 4; + %assign/vec4 v0x26a6590_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ada4f0_0; + %load/vec4 v0x26a64f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ada450_0, 4, 5; + %assign/vec4/off/d v0x26a6450_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ada4f0_0; + %load/vec4 v0x26a64f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1adaca0_0, 4, 5; - %load/vec4 v0x1ada4f0_0; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4/off/d v0x26a6ca0_0, 4, 5; + %load/vec4 v0x26a64f0_0; + %assign/vec4 v0x26a59d0_0, 0; T_7.95 ; T_7.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.82; T_7.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.82; T_7.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.82; T_7.82 ; %pop/vec4 1; %jmp T_7.3; T_7.2 ; - %load/vec4 v0x1ad9ec0_0; + %load/vec4 v0x26a5ec0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -3816,93 +3816,93 @@ T_7.2 ; %jmp T_7.100; T_7.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.100; T_7.98 ; - %load/vec4 v0x1adaf40_0; + %load/vec4 v0x26a6f40_0; %cmpi/e 7, 0, 3; %jmp/0xz T_7.101, 4; - %load/vec4 v0x1ad9440_0; + %load/vec4 v0x26a5440_0; %flag_set/vec4 8; %jmp/0xz T_7.103, 8; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_7.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.106; T_7.105 ; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_7.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.108; T_7.107 ; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_7.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; %jmp T_7.110; T_7.109 ; - %load/vec4 v0x1ad8370_0; + %load/vec4 v0x26a4370_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_7.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1adaf40_0, 0; + %assign/vec4 v0x26a6f40_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1adabc0_0, 4, 5; - %load/vec4 v0x1adb020_0; + %assign/vec4/off/d v0x26a6bc0_0, 4, 5; + %load/vec4 v0x26a7020_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ad9d50, 0, 4; + %assign/vec4/a/d v0x26a5d50, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a59d0_0, 0; T_7.111 ; T_7.110 ; T_7.108 ; @@ -3910,33 +3910,33 @@ T_7.106 ; T_7.103 ; T_7.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.100; T_7.99 ; - %load/vec4 v0x1adaf40_0; + %load/vec4 v0x26a6f40_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_7.113, 4; - %load/vec4 v0x1adad80_0; - %load/vec4 v0x1adaf40_0; + %load/vec4 v0x26a6d80_0; + %load/vec4 v0x26a6f40_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_7.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1adaf40_0; + %load/vec4 v0x26a6f40_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1adabc0_0, 4, 1; + %store/vec4 v0x26a6bc0_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad9c70_0, 0; - %load/vec4 v0x1adaf40_0; - %assign/vec4 v0x1ad99d0_0, 0; + %assign/vec4 v0x26a5c70_0, 0; + %load/vec4 v0x26a6f40_0; + %assign/vec4 v0x26a59d0_0, 0; T_7.115 ; T_7.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ad9ec0_0, 0; + %assign/vec4 v0x26a5ec0_0, 0; %jmp T_7.100; T_7.100 ; %pop/vec4 1; @@ -3945,19 +3945,19 @@ T_7.3 ; %pop/vec4 1; %jmp T_7; .thread T_7; - .scope S_0x1ad6040; + .scope S_0x26a2040; T_8 ; - %wait E_0x1a1d520; - %load/vec4 v0x1ad9ec0_0; + %wait E_0x25e9520; + %load/vec4 v0x26a5ec0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ad9c70_0; + %load/vec4 v0x26a5c70_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1ad6bd0_0; + %load/vec4 v0x26a2bd0_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -3966,62 +3966,62 @@ T_8 ; %and; %flag_set/vec4 8; %jmp/0xz T_8.0, 8; - %load/vec4 v0x1ad6bd0_0; - %assign/vec4 v0x1ad6af0_0, 0; + %load/vec4 v0x26a2bd0_0; + %assign/vec4 v0x26a2af0_0, 0; T_8.0 ; - %load/vec4 v0x1ad9ec0_0; + %load/vec4 v0x26a5ec0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_8.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ada450_0, 0, 4; + %store/vec4 v0x26a6450_0, 0, 4; T_8.2 ; %jmp T_8; .thread T_8; - .scope S_0x1ac6a60; + .scope S_0x2692a60; T_9 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1aca670_0, 0, 3; + %store/vec4 v0x2696670_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1aca890_0, 0, 3; + %store/vec4 v0x2696890_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1aca3d0_0, 0, 3; + %store/vec4 v0x26963d0_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ac6f90_0, 0, 11; + %store/vec4 v0x2692f90_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ac7090_0, 0, 11; + %store/vec4 v0x2693090_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac7520_0, 0, 4; + %store/vec4 v0x2693520_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acae20_0, 0, 4; + %store/vec4 v0x2696e20_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acb650_0, 0, 4; + %store/vec4 v0x2697650_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acb810_0, 0, 4; + %store/vec4 v0x2697810_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acb590_0, 0, 4; + %store/vec4 v0x2697590_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1aca750, 4, 0; + %store/vec4a v0x2696750, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1aca750, 4, 0; + %store/vec4a v0x2696750, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1aca750, 4, 0; + %store/vec4a v0x2696750, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1aca750, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1ac6c90, v0x1aca310 {0 0 0}; + %store/vec4a v0x2696750, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x2692c90, v0x2696310 {0 0 0}; %end; .thread T_9; - .scope S_0x1ac6a60; + .scope S_0x2692a60; T_10 ; - %wait E_0x1a3fcc0; - %load/vec4 v0x1aca670_0; + %wait E_0x260bcc0; + %load/vec4 v0x2696670_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4036,7 +4036,7 @@ T_10 ; %jmp/1 T_10.2, 6; %jmp T_10.3; T_10.0 ; - %load/vec4 v0x1aca890_0; + %load/vec4 v0x2696890_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4051,185 +4051,185 @@ T_10.0 ; %jmp/1 T_10.6, 6; %jmp T_10.7; T_10.4 ; - %load/vec4 v0x1ac7310_0; + %load/vec4 v0x2693310_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_10.8, 5; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_10.10, 5; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %jmp T_10.11; T_10.10 ; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_10.12, 5; - %load/vec4 v0x1aca970_0; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x2696970_0; + %load/vec4 v0x26936e0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.14, 8; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acae20_0, 4, 5; - %load/vec4 v0x1ac76e0_0; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4/off/d v0x2696e20_0, 4, 5; + %load/vec4 v0x26936e0_0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.15; T_10.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1aca670_0, 0; - %load/vec4 v0x1ac76e0_0; - %assign/vec4 v0x1acaec0_0, 0; + %assign/vec4 v0x2696670_0, 0; + %load/vec4 v0x26936e0_0; + %assign/vec4 v0x2696ec0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acb650_0, 4, 5; - %load/vec4 v0x1ac76e0_0; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4/off/d v0x2697650_0, 4, 5; + %load/vec4 v0x26936e0_0; + %assign/vec4 v0x26963d0_0, 0; T_10.15 ; %jmp T_10.13; T_10.12 ; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.16, 4; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %cmpi/e 0, 0, 3; %jmp/0xz T_10.18, 4; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %jmp T_10.19; T_10.18 ; - %load/vec4 v0x1aca970_0; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x2696970_0; + %load/vec4 v0x26963d0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.20, 8; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %jmp T_10.21; T_10.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1aca670_0, 0; - %load/vec4 v0x1aca3d0_0; - %assign/vec4 v0x1acaec0_0, 0; + %assign/vec4 v0x2696670_0, 0; + %load/vec4 v0x26963d0_0; + %assign/vec4 v0x2696ec0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acb650_0, 4, 5; + %assign/vec4/off/d v0x2697650_0, 4, 5; T_10.21 ; T_10.19 ; %jmp T_10.17; T_10.16 ; - %load/vec4 v0x1ac76e0_0; + %load/vec4 v0x26936e0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.22, 4; - %load/vec4 v0x1ac9cf0_0; + %load/vec4 v0x2695cf0_0; %flag_set/vec4 8; %jmp/0xz T_10.24, 8; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.27; T_10.26 ; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.29; T_10.28 ; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.31; T_10.30 ; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; T_10.32 ; T_10.31 ; T_10.29 ; @@ -4237,29 +4237,29 @@ T_10.27 ; %jmp T_10.25; T_10.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1aca670_0, 0; - %load/vec4 v0x1ac76e0_0; - %assign/vec4 v0x1acaec0_0, 0; + %assign/vec4 v0x2696670_0, 0; + %load/vec4 v0x26936e0_0; + %assign/vec4 v0x2696ec0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb650_0, 4, 5; + %assign/vec4/off/d v0x2697650_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb650_0, 4, 5; + %assign/vec4/off/d v0x2697650_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb650_0, 4, 5; + %assign/vec4/off/d v0x2697650_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb650_0, 4, 5; + %assign/vec4/off/d v0x2697650_0, 4, 5; T_10.25 ; T_10.22 ; T_10.17 ; @@ -4267,10 +4267,10 @@ T_10.13 ; T_10.11 ; T_10.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.7; T_10.5 ; - %load/vec4 v0x1ac7310_0; + %load/vec4 v0x2693310_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -4337,180 +4337,180 @@ T_10.5 ; %jmp/1 T_10.49, 6; %jmp T_10.50; T_10.34 ; - %load/vec4 v0x1ac6f90_0; - %load/vec4 v0x1acaf60_0; + %load/vec4 v0x2692f90_0; + %load/vec4 v0x2696f60_0; %add; - %assign/vec4 v0x1ac6f90_0, 0; - %load/vec4 v0x1ac7520_0; + %assign/vec4 v0x2692f90_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.35 ; - %load/vec4 v0x1ac6f90_0; - %load/vec4 v0x1acaf60_0; + %load/vec4 v0x2692f90_0; + %load/vec4 v0x2696f60_0; %sub; - %assign/vec4 v0x1ac6f90_0, 0; - %load/vec4 v0x1ac7520_0; + %assign/vec4 v0x2692f90_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.36 ; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693520_0; %pad/u 11; - %load/vec4 v0x1acaf60_0; + %load/vec4 v0x2696f60_0; %add; %pad/u 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.37 ; - %load/vec4 v0x1acaf60_0; - %assign/vec4 v0x1acb9d0_0, 0; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2696f60_0; + %assign/vec4 v0x26979d0_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.38 ; - %load/vec4 v0x1ac7230_0; - %assign/vec4 v0x1acb9d0_0, 0; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693230_0; + %assign/vec4 v0x26979d0_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.39 ; - %load/vec4 v0x1ac6f90_0; - %load/vec4 v0x1ac7230_0; + %load/vec4 v0x2692f90_0; + %load/vec4 v0x2693230_0; %add; - %assign/vec4 v0x1ac6f90_0, 0; - %load/vec4 v0x1ac7520_0; + %assign/vec4 v0x2692f90_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.40 ; - %load/vec4 v0x1ac6f90_0; - %load/vec4 v0x1ac7230_0; + %load/vec4 v0x2692f90_0; + %load/vec4 v0x2693230_0; %sub; - %assign/vec4 v0x1ac6f90_0, 0; - %load/vec4 v0x1ac7520_0; + %assign/vec4 v0x2692f90_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.41 ; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693520_0; %pad/u 11; - %load/vec4 v0x1ac7230_0; + %load/vec4 v0x2693230_0; %add; %pad/u 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.42 ; - %load/vec4 v0x1ac7090_0; - %assign/vec4 v0x1ac6f90_0, 0; - %load/vec4 v0x1ac6f90_0; - %assign/vec4 v0x1ac7090_0, 0; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693090_0; + %assign/vec4 v0x2692f90_0, 0; + %load/vec4 v0x2692f90_0; + %assign/vec4 v0x2693090_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.43 ; - %load/vec4 v0x1ac6f90_0; - %assign/vec4 v0x1ac7090_0, 0; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2692f90_0; + %assign/vec4 v0x2693090_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.44 ; - %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x2692f90_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1ac6f90_0, 0; - %load/vec4 v0x1ac7520_0; + %assign/vec4 v0x2692f90_0, 0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.45 ; - %load/vec4 v0x1ac7440_0; - %assign/vec4 v0x1ac7600_0, 0; + %load/vec4 v0x2693440_0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.50; T_10.46 ; - %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x2692f90_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_10.51, 4; - %load/vec4 v0x1ac7440_0; - %assign/vec4 v0x1ac7600_0, 0; + %load/vec4 v0x2693440_0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.52; T_10.51 ; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; T_10.52 ; %jmp T_10.50; T_10.47 ; - %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x2692f90_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_10.53, 4; - %load/vec4 v0x1ac7440_0; - %assign/vec4 v0x1ac7600_0, 0; + %load/vec4 v0x2693440_0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.54; T_10.53 ; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; T_10.54 ; %jmp T_10.50; T_10.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x2692f90_0; %pad/s 32; %cmp/s; %jmp/0xz T_10.55, 5; - %load/vec4 v0x1ac7440_0; - %assign/vec4 v0x1ac7600_0, 0; + %load/vec4 v0x2693440_0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.56; T_10.55 ; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; T_10.56 ; %jmp T_10.50; T_10.49 ; - %load/vec4 v0x1ac6f90_0; + %load/vec4 v0x2692f90_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_10.57, 5; - %load/vec4 v0x1ac7440_0; - %assign/vec4 v0x1ac7600_0, 0; + %load/vec4 v0x2693440_0; + %assign/vec4 v0x2693600_0, 0; %jmp T_10.58; T_10.57 ; - %load/vec4 v0x1ac7520_0; + %load/vec4 v0x2693520_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac7600_0, 0; + %assign/vec4 v0x2693600_0, 0; T_10.58 ; %jmp T_10.50; T_10.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.7; T_10.6 ; - %load/vec4 v0x1ac7310_0; + %load/vec4 v0x2693310_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1ac7310_0; + %load/vec4 v0x2693310_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_10.59, 4; - %load/vec4 v0x1ac7170_0; + %load/vec4 v0x2693170_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1ac7170_0; + %load/vec4 v0x2693170_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -4518,162 +4518,162 @@ T_10.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_10.61, 9; - %load/vec4 v0x1ac7170_0; + %load/vec4 v0x2693170_0; %cmpi/e 1, 0, 3; %jmp/0xz T_10.63, 4; - %load/vec4 v0x1acb9d0_0; - %assign/vec4 v0x1ac6f90_0, 0; + %load/vec4 v0x26979d0_0; + %assign/vec4 v0x2692f90_0, 0; T_10.63 ; %jmp T_10.62; T_10.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca670_0, 0; - %load/vec4 v0x1ac7170_0; + %assign/vec4 v0x2696670_0, 0; + %load/vec4 v0x2693170_0; %cmpi/e 6, 0, 3; %jmp/0xz T_10.65, 4; - %load/vec4 v0x1aca3d0_0; - %assign/vec4 v0x1acb8f0_0, 0; - %load/vec4 v0x1acb9d0_0; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; + %assign/vec4 v0x26978f0_0, 0; + %load/vec4 v0x26979d0_0; + %load/vec4 v0x26963d0_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1aca3d0_0; + %load/vec4 v0x26963d0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acb590_0, 4, 5; + %assign/vec4/off/d v0x2697590_0, 4, 5; %jmp T_10.66; T_10.65 ; - %load/vec4 v0x1ac7170_0; + %load/vec4 v0x2693170_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.67, 4; - %load/vec4 v0x1ac7170_0; - %assign/vec4 v0x1acb8f0_0, 0; - %load/vec4 v0x1acb9d0_0; - %load/vec4 v0x1ac7170_0; + %load/vec4 v0x2693170_0; + %assign/vec4 v0x26978f0_0, 0; + %load/vec4 v0x26979d0_0; + %load/vec4 v0x2693170_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac7170_0; + %load/vec4 v0x2693170_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1ac7170_0; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x2693170_0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.68; T_10.67 ; - %load/vec4 v0x1ac9e70_0; + %load/vec4 v0x2695e70_0; %flag_set/vec4 8; %jmp/0xz T_10.69, 8; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.72; T_10.71 ; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.74; T_10.73 ; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.76; T_10.75 ; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; T_10.77 ; T_10.76 ; T_10.74 ; T_10.72 ; %jmp T_10.70; T_10.69 ; - %load/vec4 v0x1ac7170_0; - %assign/vec4 v0x1acb8f0_0, 0; + %load/vec4 v0x2693170_0; + %assign/vec4 v0x26978f0_0, 0; T_10.70 ; T_10.68 ; T_10.66 ; T_10.62 ; T_10.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.7; T_10.7 ; %pop/vec4 1; %jmp T_10.3; T_10.1 ; - %load/vec4 v0x1aca890_0; + %load/vec4 v0x2696890_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4688,82 +4688,82 @@ T_10.1 ; %jmp/1 T_10.81, 6; %jmp T_10.82; T_10.79 ; - %load/vec4 v0x1acaec0_0; + %load/vec4 v0x2696ec0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.83, 4; - %load/vec4 v0x1ac9cf0_0; + %load/vec4 v0x2695cf0_0; %flag_set/vec4 8; %jmp/0xz T_10.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1aca670_0, 0; + %assign/vec4 v0x2696670_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acb650_0, 0, 4; - %load/vec4 v0x1aca970_0; + %store/vec4 v0x2697650_0, 0, 4; + %load/vec4 v0x2696970_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.88; T_10.87 ; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.90; T_10.89 ; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.92; T_10.91 ; - %load/vec4 v0x1aca970_0; + %load/vec4 v0x2696970_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; T_10.93 ; T_10.92 ; T_10.90 ; @@ -4771,54 +4771,54 @@ T_10.88 ; T_10.85 ; %jmp T_10.84; T_10.83 ; - %load/vec4 v0x1aca970_0; - %load/vec4 v0x1acaec0_0; + %load/vec4 v0x2696970_0; + %load/vec4 v0x2696ec0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1aca670_0, 0; - %load/vec4 v0x1acaec0_0; + %assign/vec4 v0x2696670_0, 0; + %load/vec4 v0x2696ec0_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1acb000, 4; - %assign/vec4 v0x1acaf60_0, 0; + %load/vec4a v0x2697000, 4; + %assign/vec4 v0x2696f60_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acaec0_0; + %load/vec4 v0x2696ec0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acae20_0, 4, 5; + %assign/vec4/off/d v0x2696e20_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1acaec0_0; + %load/vec4 v0x2696ec0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1acb650_0, 4, 5; - %load/vec4 v0x1acaec0_0; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4/off/d v0x2697650_0, 4, 5; + %load/vec4 v0x2696ec0_0; + %assign/vec4 v0x26963d0_0, 0; T_10.95 ; T_10.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.82; T_10.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.82; T_10.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.82; T_10.82 ; %pop/vec4 1; %jmp T_10.3; T_10.2 ; - %load/vec4 v0x1aca890_0; + %load/vec4 v0x2696890_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -4834,93 +4834,93 @@ T_10.2 ; %jmp T_10.100; T_10.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.100; T_10.98 ; - %load/vec4 v0x1acb8f0_0; + %load/vec4 v0x26978f0_0; %cmpi/e 7, 0, 3; %jmp/0xz T_10.101, 4; - %load/vec4 v0x1ac9e70_0; + %load/vec4 v0x2695e70_0; %flag_set/vec4 8; %jmp/0xz T_10.103, 8; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_10.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.106; T_10.105 ; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_10.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.108; T_10.107 ; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_10.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; %jmp T_10.110; T_10.109 ; - %load/vec4 v0x1ac8da0_0; + %load/vec4 v0x2694da0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_10.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1acb8f0_0, 0; + %assign/vec4 v0x26978f0_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1acb590_0, 4, 5; - %load/vec4 v0x1acb9d0_0; + %assign/vec4/off/d v0x2697590_0, 4, 5; + %load/vec4 v0x26979d0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1aca750, 0, 4; + %assign/vec4/a/d v0x2696750, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x26963d0_0, 0; T_10.111 ; T_10.110 ; T_10.108 ; @@ -4928,33 +4928,33 @@ T_10.106 ; T_10.103 ; T_10.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.100; T_10.99 ; - %load/vec4 v0x1acb8f0_0; + %load/vec4 v0x26978f0_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_10.113, 4; - %load/vec4 v0x1acb730_0; - %load/vec4 v0x1acb8f0_0; + %load/vec4 v0x2697730_0; + %load/vec4 v0x26978f0_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_10.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1acb8f0_0; + %load/vec4 v0x26978f0_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1acb590_0, 4, 1; + %store/vec4 v0x2697590_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1aca670_0, 0; - %load/vec4 v0x1acb8f0_0; - %assign/vec4 v0x1aca3d0_0, 0; + %assign/vec4 v0x2696670_0, 0; + %load/vec4 v0x26978f0_0; + %assign/vec4 v0x26963d0_0, 0; T_10.115 ; T_10.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1aca890_0, 0; + %assign/vec4 v0x2696890_0, 0; %jmp T_10.100; T_10.100 ; %pop/vec4 1; @@ -4963,19 +4963,19 @@ T_10.3 ; %pop/vec4 1; %jmp T_10; .thread T_10; - .scope S_0x1ac6a60; + .scope S_0x2692a60; T_11 ; - %wait E_0x1a1d520; - %load/vec4 v0x1aca890_0; + %wait E_0x25e9520; + %load/vec4 v0x2696890_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1aca670_0; + %load/vec4 v0x2696670_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1ac7600_0; + %load/vec4 v0x2693600_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -4984,62 +4984,62 @@ T_11 ; %and; %flag_set/vec4 8; %jmp/0xz T_11.0, 8; - %load/vec4 v0x1ac7600_0; - %assign/vec4 v0x1ac7520_0, 0; + %load/vec4 v0x2693600_0; + %assign/vec4 v0x2693520_0, 0; T_11.0 ; - %load/vec4 v0x1aca890_0; + %load/vec4 v0x2696890_0; %cmpi/e 0, 0, 3; %jmp/0xz T_11.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1acae20_0, 0, 4; + %store/vec4 v0x2696e20_0, 0, 4; T_11.2 ; %jmp T_11; .thread T_11; - .scope S_0x1a35820; + .scope S_0x2601820; T_12 ; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ac53e0_0, 0, 3; + %store/vec4 v0x26913e0_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ac5600_0, 0, 3; + %store/vec4 v0x2691600_0, 0, 3; %pushi/vec4 0, 0, 3; - %store/vec4 v0x1ac5140_0, 0, 3; + %store/vec4 v0x2691140_0, 0, 3; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1a82310_0, 0, 11; + %store/vec4 v0x264e310_0, 0, 11; %pushi/vec4 0, 0, 11; - %store/vec4 v0x1ac1d90_0, 0, 11; + %store/vec4 v0x268dd90_0, 0, 11; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac2250_0, 0, 4; + %store/vec4 v0x268e250_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac5b90_0, 0, 4; + %store/vec4 v0x2691b90_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac6460_0, 0, 4; + %store/vec4 v0x2692460_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac6620_0, 0, 4; + %store/vec4 v0x2692620_0, 0, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac6380_0, 0, 4; + %store/vec4 v0x2692380_0, 0, 4; %pushi/vec4 0, 0, 11; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ac54c0, 4, 0; + %store/vec4a v0x26914c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ac54c0, 4, 0; + %store/vec4a v0x26914c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 0, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ac54c0, 4, 0; + %store/vec4a v0x26914c0, 4, 0; %pushi/vec4 0, 0, 11; %ix/load 4, 1, 0; %flag_set/imm 4, 0; - %store/vec4a v0x1ac54c0, 4, 0; - %vpi_call 3 187 "$readmemb", P_0x1a29550, v0x1ac5080 {0 0 0}; + %store/vec4a v0x26914c0, 4, 0; + %vpi_call 3 187 "$readmemb", P_0x25f5550, v0x2691080 {0 0 0}; %end; .thread T_12; - .scope S_0x1a35820; + .scope S_0x2601820; T_13 ; - %wait E_0x1a3fcc0; - %load/vec4 v0x1ac53e0_0; + %wait E_0x260bcc0; + %load/vec4 v0x26913e0_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5054,7 +5054,7 @@ T_13 ; %jmp/1 T_13.2, 6; %jmp T_13.3; T_13.0 ; - %load/vec4 v0x1ac5600_0; + %load/vec4 v0x2691600_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5069,185 +5069,185 @@ T_13.0 ; %jmp/1 T_13.6, 6; %jmp T_13.7; T_13.4 ; - %load/vec4 v0x1ac2040_0; + %load/vec4 v0x268e040_0; %pad/u 32; %cmpi/u 4, 0, 32; %jmp/0xz T_13.8, 5; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %pad/u 32; %cmpi/u 2, 0, 32; %jmp/0xz T_13.10, 5; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %jmp T_13.11; T_13.10 ; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %pad/u 32; %cmpi/u 6, 0, 32; %jmp/0xz T_13.12, 5; - %load/vec4 v0x1ac56e0_0; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x26916e0_0; + %load/vec4 v0x268e410_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.14, 8; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; - %load/vec4 v0x1ac2410_0; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4/off/d v0x2691b90_0, 4, 5; + %load/vec4 v0x268e410_0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.15; T_13.14 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; - %load/vec4 v0x1ac2410_0; - %assign/vec4 v0x1ac5c30_0, 0; + %assign/vec4 v0x26913e0_0, 0; + %load/vec4 v0x268e410_0; + %assign/vec4 v0x2691c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; - %load/vec4 v0x1ac2410_0; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4/off/d v0x2692460_0, 4, 5; + %load/vec4 v0x268e410_0; + %assign/vec4 v0x2691140_0, 0; T_13.15 ; %jmp T_13.13; T_13.12 ; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.16, 4; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %cmpi/e 0, 0, 3; %jmp/0xz T_13.18, 4; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %jmp T_13.19; T_13.18 ; - %load/vec4 v0x1ac56e0_0; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x26916e0_0; + %load/vec4 v0x2691140_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.20, 8; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %jmp T_13.21; T_13.20 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; - %load/vec4 v0x1ac5140_0; - %assign/vec4 v0x1ac5c30_0, 0; + %assign/vec4 v0x26913e0_0, 0; + %load/vec4 v0x2691140_0; + %assign/vec4 v0x2691c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %assign/vec4/off/d v0x2692460_0, 4, 5; T_13.21 ; T_13.19 ; %jmp T_13.17; T_13.16 ; - %load/vec4 v0x1ac2410_0; + %load/vec4 v0x268e410_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.22, 4; - %load/vec4 v0x1ac4a20_0; + %load/vec4 v0x2690a20_0; %flag_set/vec4 8; %jmp/0xz T_13.24, 8; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.26, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.27; T_13.26 ; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.28, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.29; T_13.28 ; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.30, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.31; T_13.30 ; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.32, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; T_13.32 ; T_13.31 ; T_13.29 ; @@ -5255,29 +5255,29 @@ T_13.27 ; %jmp T_13.25; T_13.24 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; - %load/vec4 v0x1ac2410_0; - %assign/vec4 v0x1ac5c30_0, 0; + %assign/vec4 v0x26913e0_0, 0; + %load/vec4 v0x268e410_0; + %assign/vec4 v0x2691c30_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %assign/vec4/off/d v0x2692460_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %assign/vec4/off/d v0x2692460_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %assign/vec4/off/d v0x2692460_0, 4, 5; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; + %assign/vec4/off/d v0x2692460_0, 4, 5; T_13.25 ; T_13.22 ; T_13.17 ; @@ -5285,10 +5285,10 @@ T_13.13 ; T_13.11 ; T_13.8 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.7; T_13.5 ; - %load/vec4 v0x1ac2040_0; + %load/vec4 v0x268e040_0; %dup/vec4; %pushi/vec4 0, 0, 4; %cmp/u; @@ -5355,180 +5355,180 @@ T_13.5 ; %jmp/1 T_13.49, 6; %jmp T_13.50; T_13.34 ; - %load/vec4 v0x1a82310_0; - %load/vec4 v0x1ac5d10_0; + %load/vec4 v0x264e310_0; + %load/vec4 v0x2691d10_0; %add; - %assign/vec4 v0x1a82310_0, 0; - %load/vec4 v0x1ac2250_0; + %assign/vec4 v0x264e310_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.35 ; - %load/vec4 v0x1a82310_0; - %load/vec4 v0x1ac5d10_0; + %load/vec4 v0x264e310_0; + %load/vec4 v0x2691d10_0; %sub; - %assign/vec4 v0x1a82310_0, 0; - %load/vec4 v0x1ac2250_0; + %assign/vec4 v0x264e310_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.36 ; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268e250_0; %pad/u 11; - %load/vec4 v0x1ac5d10_0; + %load/vec4 v0x2691d10_0; %add; %pad/u 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.37 ; - %load/vec4 v0x1ac5d10_0; - %assign/vec4 v0x1ac67e0_0, 0; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x2691d10_0; + %assign/vec4 v0x26927e0_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.38 ; - %load/vec4 v0x1ac1f60_0; - %assign/vec4 v0x1ac67e0_0, 0; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268df60_0; + %assign/vec4 v0x26927e0_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.39 ; - %load/vec4 v0x1a82310_0; - %load/vec4 v0x1ac1f60_0; + %load/vec4 v0x264e310_0; + %load/vec4 v0x268df60_0; %add; - %assign/vec4 v0x1a82310_0, 0; - %load/vec4 v0x1ac2250_0; + %assign/vec4 v0x264e310_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.40 ; - %load/vec4 v0x1a82310_0; - %load/vec4 v0x1ac1f60_0; + %load/vec4 v0x264e310_0; + %load/vec4 v0x268df60_0; %sub; - %assign/vec4 v0x1a82310_0, 0; - %load/vec4 v0x1ac2250_0; + %assign/vec4 v0x264e310_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.41 ; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268e250_0; %pad/u 11; - %load/vec4 v0x1ac1f60_0; + %load/vec4 v0x268df60_0; %add; %pad/u 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.42 ; - %load/vec4 v0x1ac1d90_0; - %assign/vec4 v0x1a82310_0, 0; - %load/vec4 v0x1a82310_0; - %assign/vec4 v0x1ac1d90_0, 0; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268dd90_0; + %assign/vec4 v0x264e310_0, 0; + %load/vec4 v0x264e310_0; + %assign/vec4 v0x268dd90_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.43 ; - %load/vec4 v0x1a82310_0; - %assign/vec4 v0x1ac1d90_0, 0; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x264e310_0; + %assign/vec4 v0x268dd90_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.44 ; - %load/vec4 v0x1a82310_0; + %load/vec4 v0x264e310_0; %inv; %pushi/vec4 1, 0, 11; %add; - %assign/vec4 v0x1a82310_0, 0; - %load/vec4 v0x1ac2250_0; + %assign/vec4 v0x264e310_0, 0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.45 ; - %load/vec4 v0x1ac2170_0; - %assign/vec4 v0x1ac2330_0, 0; + %load/vec4 v0x268e170_0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.50; T_13.46 ; - %load/vec4 v0x1a82310_0; + %load/vec4 v0x264e310_0; %pad/s 32; %cmpi/e 0, 0, 32; %jmp/0xz T_13.51, 4; - %load/vec4 v0x1ac2170_0; - %assign/vec4 v0x1ac2330_0, 0; + %load/vec4 v0x268e170_0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.52; T_13.51 ; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; T_13.52 ; %jmp T_13.50; T_13.47 ; - %load/vec4 v0x1a82310_0; + %load/vec4 v0x264e310_0; %pad/s 32; %cmpi/ne 0, 0, 32; %jmp/0xz T_13.53, 4; - %load/vec4 v0x1ac2170_0; - %assign/vec4 v0x1ac2330_0, 0; + %load/vec4 v0x268e170_0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.54; T_13.53 ; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; T_13.54 ; %jmp T_13.50; T_13.48 ; %pushi/vec4 0, 0, 32; - %load/vec4 v0x1a82310_0; + %load/vec4 v0x264e310_0; %pad/s 32; %cmp/s; %jmp/0xz T_13.55, 5; - %load/vec4 v0x1ac2170_0; - %assign/vec4 v0x1ac2330_0, 0; + %load/vec4 v0x268e170_0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.56; T_13.55 ; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; T_13.56 ; %jmp T_13.50; T_13.49 ; - %load/vec4 v0x1a82310_0; + %load/vec4 v0x264e310_0; %pad/s 32; %cmpi/s 0, 0, 32; %jmp/0xz T_13.57, 5; - %load/vec4 v0x1ac2170_0; - %assign/vec4 v0x1ac2330_0, 0; + %load/vec4 v0x268e170_0; + %assign/vec4 v0x268e330_0, 0; %jmp T_13.58; T_13.57 ; - %load/vec4 v0x1ac2250_0; + %load/vec4 v0x268e250_0; %addi 1, 0, 4; - %assign/vec4 v0x1ac2330_0, 0; + %assign/vec4 v0x268e330_0, 0; T_13.58 ; %jmp T_13.50; T_13.50 ; %pop/vec4 1; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.7; T_13.6 ; - %load/vec4 v0x1ac2040_0; + %load/vec4 v0x268e040_0; %cmpi/e 3, 0, 4; %flag_mov 8, 4; - %load/vec4 v0x1ac2040_0; + %load/vec4 v0x268e040_0; %cmpi/e 4, 0, 4; %flag_or 4, 8; %jmp/0xz T_13.59, 4; - %load/vec4 v0x1ac1e70_0; + %load/vec4 v0x268de70_0; %pad/u 32; %cmpi/u 2, 0, 32; %flag_mov 8, 5; - %load/vec4 v0x1ac1e70_0; + %load/vec4 v0x268de70_0; %pushi/vec4 6, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; @@ -5536,162 +5536,162 @@ T_13.6 ; %flag_set/vec4 9; %flag_or 9, 8; %jmp/0xz T_13.61, 9; - %load/vec4 v0x1ac1e70_0; + %load/vec4 v0x268de70_0; %cmpi/e 1, 0, 3; %jmp/0xz T_13.63, 4; - %load/vec4 v0x1ac67e0_0; - %assign/vec4 v0x1a82310_0, 0; + %load/vec4 v0x26927e0_0; + %assign/vec4 v0x264e310_0, 0; T_13.63 ; %jmp T_13.62; T_13.61 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; - %load/vec4 v0x1ac1e70_0; + %assign/vec4 v0x26913e0_0, 0; + %load/vec4 v0x268de70_0; %cmpi/e 6, 0, 3; %jmp/0xz T_13.65, 4; - %load/vec4 v0x1ac5140_0; - %assign/vec4 v0x1ac6700_0, 0; - %load/vec4 v0x1ac67e0_0; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; + %assign/vec4 v0x2692700_0, 0; + %load/vec4 v0x26927e0_0; + %load/vec4 v0x2691140_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac5140_0; + %load/vec4 v0x2691140_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; + %assign/vec4/off/d v0x2692380_0, 4, 5; %jmp T_13.66; T_13.65 ; - %load/vec4 v0x1ac1e70_0; + %load/vec4 v0x268de70_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.67, 4; - %load/vec4 v0x1ac1e70_0; - %assign/vec4 v0x1ac6700_0, 0; - %load/vec4 v0x1ac67e0_0; - %load/vec4 v0x1ac1e70_0; + %load/vec4 v0x268de70_0; + %assign/vec4 v0x2692700_0, 0; + %load/vec4 v0x26927e0_0; + %load/vec4 v0x268de70_0; %pad/u 4; %subi 2, 0, 4; %ix/vec4 3; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac1e70_0; + %load/vec4 v0x268de70_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac1e70_0; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x268de70_0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.68; T_13.67 ; - %load/vec4 v0x1ac4ba0_0; + %load/vec4 v0x2690ba0_0; %flag_set/vec4 8; %jmp/0xz T_13.69, 8; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.71, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.72; T_13.71 ; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.73, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.74; T_13.73 ; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.75, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.76; T_13.75 ; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.77, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; T_13.77 ; T_13.76 ; T_13.74 ; T_13.72 ; %jmp T_13.70; T_13.69 ; - %load/vec4 v0x1ac1e70_0; - %assign/vec4 v0x1ac6700_0, 0; + %load/vec4 v0x268de70_0; + %assign/vec4 v0x2692700_0, 0; T_13.70 ; T_13.68 ; T_13.66 ; T_13.62 ; T_13.59 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.7; T_13.7 ; %pop/vec4 1; %jmp T_13.3; T_13.1 ; - %load/vec4 v0x1ac5600_0; + %load/vec4 v0x2691600_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5706,82 +5706,82 @@ T_13.1 ; %jmp/1 T_13.81, 6; %jmp T_13.82; T_13.79 ; - %load/vec4 v0x1ac5c30_0; + %load/vec4 v0x2691c30_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.83, 4; - %load/vec4 v0x1ac4a20_0; + %load/vec4 v0x2690a20_0; %flag_set/vec4 8; %jmp/0xz T_13.85, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; + %assign/vec4 v0x26913e0_0, 0; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac6460_0, 0, 4; - %load/vec4 v0x1ac56e0_0; + %store/vec4 v0x2692460_0, 0, 4; + %load/vec4 v0x26916e0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.87, 8; %ix/load 4, 2, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.88; T_13.87 ; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.89, 8; %ix/load 4, 3, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.90; T_13.89 ; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.91, 8; %ix/load 4, 4, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.92; T_13.91 ; - %load/vec4 v0x1ac56e0_0; + %load/vec4 v0x26916e0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.93, 8; %ix/load 4, 5, 0; %flag_set/imm 4, 0; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; T_13.93 ; T_13.92 ; T_13.90 ; @@ -5789,54 +5789,54 @@ T_13.88 ; T_13.85 ; %jmp T_13.84; T_13.83 ; - %load/vec4 v0x1ac56e0_0; - %load/vec4 v0x1ac5c30_0; + %load/vec4 v0x26916e0_0; + %load/vec4 v0x2691c30_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.95, 8; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; - %load/vec4 v0x1ac5c30_0; + %assign/vec4 v0x26913e0_0, 0; + %load/vec4 v0x2691c30_0; %pad/u 5; %ix/vec4 4; - %load/vec4a v0x1ac5df0, 4; - %assign/vec4 v0x1ac5d10_0, 0; + %load/vec4a v0x2691df0, 4; + %assign/vec4 v0x2691d10_0, 0; %pushi/vec4 1, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac5c30_0; + %load/vec4 v0x2691c30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac5b90_0, 4, 5; + %assign/vec4/off/d v0x2691b90_0, 4, 5; %pushi/vec4 0, 0, 1; %ix/load 5, 0, 0; - %load/vec4 v0x1ac5c30_0; + %load/vec4 v0x2691c30_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %assign/vec4/off/d v0x1ac6460_0, 4, 5; - %load/vec4 v0x1ac5c30_0; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4/off/d v0x2692460_0, 4, 5; + %load/vec4 v0x2691c30_0; + %assign/vec4 v0x2691140_0, 0; T_13.95 ; T_13.84 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.82; T_13.80 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.82; T_13.81 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.82; T_13.82 ; %pop/vec4 1; %jmp T_13.3; T_13.2 ; - %load/vec4 v0x1ac5600_0; + %load/vec4 v0x2691600_0; %dup/vec4; %pushi/vec4 0, 0, 3; %cmp/u; @@ -5852,93 +5852,93 @@ T_13.2 ; %jmp T_13.100; T_13.97 ; %pushi/vec4 1, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.100; T_13.98 ; - %load/vec4 v0x1ac6700_0; + %load/vec4 v0x2692700_0; %cmpi/e 7, 0, 3; %jmp/0xz T_13.101, 4; - %load/vec4 v0x1ac4ba0_0; + %load/vec4 v0x2690ba0_0; %flag_set/vec4 8; %jmp/0xz T_13.103, 8; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 2, 3; %flag_set/vec4 8; %jmp/0xz T_13.105, 8; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 2, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 2, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 4, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.106; T_13.105 ; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 0, 2; %flag_set/vec4 8; %jmp/0xz T_13.107, 8; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 0, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 0, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.108; T_13.107 ; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 1, 2; %flag_set/vec4 8; %jmp/0xz T_13.109, 8; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 1, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 1, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 3, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; %jmp T_13.110; T_13.109 ; - %load/vec4 v0x1ac3ad0_0; + %load/vec4 v0x268fad0_0; %parti/s 1, 3, 3; %flag_set/vec4 8; %jmp/0xz T_13.111, 8; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ac6700_0, 0; + %assign/vec4 v0x2692700_0, 0; %pushi/vec4 1, 0, 1; %ix/load 4, 3, 0; %ix/load 5, 0, 0; %flag_set/imm 4, 0; - %assign/vec4/off/d v0x1ac6380_0, 4, 5; - %load/vec4 v0x1ac67e0_0; + %assign/vec4/off/d v0x2692380_0, 4, 5; + %load/vec4 v0x26927e0_0; %ix/load 3, 3, 0; %flag_set/imm 4, 0; %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x1ac54c0, 0, 4; + %assign/vec4/a/d v0x26914c0, 0, 4; %pushi/vec4 5, 0, 3; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x2691140_0, 0; T_13.111 ; T_13.110 ; T_13.108 ; @@ -5946,33 +5946,33 @@ T_13.106 ; T_13.103 ; T_13.101 ; %pushi/vec4 2, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.100; T_13.99 ; - %load/vec4 v0x1ac6700_0; + %load/vec4 v0x2692700_0; %cmpi/ne 7, 0, 3; %jmp/0xz T_13.113, 4; - %load/vec4 v0x1ac6540_0; - %load/vec4 v0x1ac6700_0; + %load/vec4 v0x2692540_0; + %load/vec4 v0x2692700_0; %pad/u 5; %subi 2, 0, 5; %part/s 1; %flag_set/vec4 8; %jmp/0xz T_13.115, 8; %pushi/vec4 0, 0, 1; - %load/vec4 v0x1ac6700_0; + %load/vec4 v0x2692700_0; %pad/u 5; %subi 2, 0, 5; %ix/vec4/s 4; - %store/vec4 v0x1ac6380_0, 4, 1; + %store/vec4 v0x2692380_0, 4, 1; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ac53e0_0, 0; - %load/vec4 v0x1ac6700_0; - %assign/vec4 v0x1ac5140_0, 0; + %assign/vec4 v0x26913e0_0, 0; + %load/vec4 v0x2692700_0; + %assign/vec4 v0x2691140_0, 0; T_13.115 ; T_13.113 ; %pushi/vec4 0, 0, 3; - %assign/vec4 v0x1ac5600_0, 0; + %assign/vec4 v0x2691600_0, 0; %jmp T_13.100; T_13.100 ; %pop/vec4 1; @@ -5981,19 +5981,19 @@ T_13.3 ; %pop/vec4 1; %jmp T_13; .thread T_13; - .scope S_0x1a35820; + .scope S_0x2601820; T_14 ; - %wait E_0x1a1d520; - %load/vec4 v0x1ac5600_0; + %wait E_0x25e9520; + %load/vec4 v0x2691600_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; - %load/vec4 v0x1ac53e0_0; + %load/vec4 v0x26913e0_0; %pushi/vec4 0, 0, 3; %cmp/e; %flag_get/vec4 4; %and; - %load/vec4 v0x1ac2330_0; + %load/vec4 v0x268e330_0; %xor/r; %pushi/vec4 1, 1, 1; %cmp/e; @@ -6002,93 +6002,93 @@ T_14 ; %and; %flag_set/vec4 8; %jmp/0xz T_14.0, 8; - %load/vec4 v0x1ac2330_0; - %assign/vec4 v0x1ac2250_0, 0; + %load/vec4 v0x268e330_0; + %assign/vec4 v0x268e250_0, 0; T_14.0 ; - %load/vec4 v0x1ac5600_0; + %load/vec4 v0x2691600_0; %cmpi/e 0, 0, 3; %jmp/0xz T_14.2, 4; %pushi/vec4 0, 0, 4; - %store/vec4 v0x1ac5b90_0, 0, 4; + %store/vec4 v0x2691b90_0, 0, 4; T_14.2 ; %jmp T_14; .thread T_14; - .scope S_0x1a0c690; + .scope S_0x25d8690; T_15 ; %pushi/vec4 0, 0, 33; - %store/vec4 v0x1adc080_0, 0, 33; + %store/vec4 v0x26a8080_0, 0, 33; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1adbfe0_0, 0, 1; + %store/vec4 v0x26a7fe0_0, 0, 1; %pushi/vec4 0, 0, 33; - %store/vec4 v0x1adc080_0, 0, 33; + %store/vec4 v0x26a8080_0, 0, 33; T_15.0 ; - %load/vec4 v0x1adc080_0; + %load/vec4 v0x26a8080_0; %cmpi/u 10, 0, 33; %jmp/0xz T_15.1, 5; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbf40_0, 0, 1; + %store/vec4 v0x26a7f40_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1adbf40_0, 0, 1; + %store/vec4 v0x26a7f40_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbf40_0, 0, 1; + %store/vec4 v0x26a7f40_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1adbf40_0, 0, 1; + %store/vec4 v0x26a7f40_0, 0, 1; %delay 1, 0; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbf40_0, 0, 1; + %store/vec4 v0x26a7f40_0, 0, 1; %delay 1, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x1adbf40_0, 0, 1; + %store/vec4 v0x26a7f40_0, 0, 1; %delay 1, 0; - %load/vec4 v0x1adc080_0; + %load/vec4 v0x26a8080_0; %addi 1, 0, 33; - %store/vec4 v0x1adc080_0, 0, 33; + %store/vec4 v0x26a8080_0, 0, 33; %jmp T_15.0; T_15.1 ; - %load/vec4 v0x1adbea0_0; + %load/vec4 v0x26a7ea0_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.2, 4; - %vpi_call 2 51 "$display", "Failed on up test of regTest, %d", v0x1adbea0_0 {0 0 0}; + %vpi_call 2 51 "$display", "Failed on up test of regTest, %d", v0x26a7ea0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbfe0_0, 0, 1; + %store/vec4 v0x26a7fe0_0, 0, 1; T_15.2 ; - %load/vec4 v0x1adbd60_0; + %load/vec4 v0x26a7d60_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.4, 4; - %vpi_call 2 55 "$display", "Failed on left test of regTest, %d", v0x1adbd60_0 {0 0 0}; + %vpi_call 2 55 "$display", "Failed on left test of regTest, %d", v0x26a7d60_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbfe0_0, 0, 1; + %store/vec4 v0x26a7fe0_0, 0, 1; T_15.4 ; - %load/vec4 v0x1adbe00_0; + %load/vec4 v0x26a7e00_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.6, 4; - %vpi_call 2 59 "$display", "Failed on right test of regTest, %d", v0x1adbe00_0 {0 0 0}; + %vpi_call 2 59 "$display", "Failed on right test of regTest, %d", v0x26a7e00_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbfe0_0, 0, 1; + %store/vec4 v0x26a7fe0_0, 0, 1; T_15.6 ; - %load/vec4 v0x1adbcc0_0; + %load/vec4 v0x26a7cc0_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.8, 4; - %vpi_call 2 63 "$display", "Failed on down test of regTest, %d", v0x1adbcc0_0 {0 0 0}; + %vpi_call 2 63 "$display", "Failed on down test of regTest, %d", v0x26a7cc0_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbfe0_0, 0, 1; + %store/vec4 v0x26a7fe0_0, 0, 1; T_15.8 ; - %load/vec4 v0x1adbb70_0; + %load/vec4 v0x26a7b70_0; %pad/s 32; %cmpi/ne 1, 0, 32; %jmp/0xz T_15.10, 4; - %vpi_call 2 67 "$display", "Failed on center test of regTest, %d", v0x1adbb70_0 {0 0 0}; + %vpi_call 2 67 "$display", "Failed on center test of regTest, %d", v0x26a7b70_0 {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x1adbfe0_0, 0, 1; + %store/vec4 v0x26a7fe0_0, 0, 1; T_15.10 ; - %load/vec4 v0x1adbfe0_0; + %load/vec4 v0x26a7fe0_0; %flag_set/vec4 8; %jmp/0xz T_15.12, 8; %vpi_call 2 71 "$display", "DUT passed regTest" {0 0 0}; From f375df6085bb662a2a7c04bfba8af2867862abb8 Mon Sep 17 00:00:00 2001 From: TShapinsky Date: Mon, 11 Dec 2017 22:59:48 -0500 Subject: [PATCH 11/14] Added TIS-100 ISA --- TIS_100_ISA.pdf | Bin 0 -> 182129 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 TIS_100_ISA.pdf diff --git a/TIS_100_ISA.pdf b/TIS_100_ISA.pdf new file mode 100644 index 0000000000000000000000000000000000000000..21580c04dc07054a3d3965b9b3fb68b83cfb8030 GIT binary patch literal 182129 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zUk#*B`DyRHtDvw}v>VuoOCJNCx4K6Yc5W>|h7@*W466P%IKBFG0W_SIO7)eSt!Q-a z7cNJI#v9WS8w ztn42I;Yx*_Ufe+uGgmx#a(N?|402N1DJH2atTVtRfcvSlobHSmK*xspWxkHl4(Wn!5sQCPJ| z$|~;g`<0j6@3pLCA(PD~(Yns%*)<7|UJ2nGuy`zz0^*pAHRVkMLywFXVO#UkA*}*6xW=jMZGf(ELyp%~v!~w)o(2!!}x&sZ@YT zUp|si-Lu5driBtGPkPD{TO><$qDue3;G2#%93vvoV&4@(lQw#K58YhD=eF+P)@!~8 z#5_)nk>E+?Un$v!@wLS*h zb880Y6UD&c7LUplfu^dFk%k Date: Tue, 12 Dec 2017 14:23:28 -0500 Subject: [PATCH 13/14] Update README.md --- README.md | 89 ++----------------------------------------------------- 1 file changed, 3 insertions(+), 86 deletions(-) diff --git a/README.md b/README.md index 81361ca..927e9d8 100644 --- a/README.md +++ b/README.md @@ -1,87 +1,4 @@ -# CompArch Final Project - -The goal of the final project is for you to explore a topic of interest within Computer Architecture, driven by your personal learning goals. This could build on and extend something we discussed in class, or dive into some other area of Computer Architecture (broadly defined). - -You may work in teams of any size, as long as they are appropriately scaled for your proposed project. Groups with > 4 members will face heavy skepticism about meeting this requirement. - -In terms of scale, this is not a months-long capstone but rather more like an extended Lab. You will have about 2 weeks to complete it, and it will comprise 15% of your final grade. Be ambitious but realistic. - -## Timeline - -- Nov 17 (in class) – project ideation and team formation fair -- Nov 28 (in class) – draft project proposal due , consultations with teams -- Nov 29 – revised project proposal and work plan due -- Dec 5 – mid-point check in (self-defined in work plan, highly recommended) -- Dec 12 – final project due - -## Proposal (10%) -Your project proposal should be about 1-2 pages, and must include: - -- Project title -- Team members -- Brief description of project (1-3 paragraphs) -- 2-3 references you plan to use -- Minimum, planned, and stretch deliverables -- Work plan (by Tuesday) - -We will discuss your proposal in class on November 28 (first class after break). These meetings will be quick and to-the-point, so you must come prepared with a printed out copy of your proposal. You should have done some background research by this point and have a good idea of your planned project trajectory. - -Based on the feedback from this meeting, you will revise your proposal and submit the final version including a work plan the following day. - -## Documentation (55%) -The documentation counts for 55% of your grade whether you succeed at your goal or not. Did you shoot for the moon and land among the harsh vacuum of space? You still learned something from the process, and as long as you document it well, you will get full credit. - -Documentation should be posted in the form of a project website (PDF or MarkDown in a repo can also be acceptable depending on the project) and must answer the following questions: - -### What did you do? -Your project abstract: one catchy sentence followed by a paragraph or two. The intended audience should include people that aren't necessarily versed in Computer Architecture, but are technically competent. -### Why did you do it? -A paragraph or so about why the project you chose is worthwhile and interesting. -### How did you do it? -This portion can assume an audience that has taken Computer Architecture, but don't let the story you’re telling get bogged down by buzzwords. A sure sign of a bad engineer is ORA (over reliance on acronyms). - -### How can someone else build on it? -Include everything necessary to pick up where you left off. This should include (as appropriate): - -- code -- schematics -- scripts and build instructions -- proper attribution for resources used and anything you did not write yourself -- list of difficulties and ‘gotchas’ while doing this project -- reflection on the project as a whole as well as your work plan -- possible TODOs to extend the depth of the project - -This should all be posted somewhere accessible, e.g. your project webpage or repository. Please do not literally include these question prompts and then answer them (you're better than that) - instead, use them to check that you've covered all the bases as you tell the story in the way that best makes sense for your project. - -## Choosing and Achieving your Goal (30%) -There is a lot of flexibility available in what your actual final project can be. As a first pass, it needs to satisfy the following criteria: - -1. Build upon what we have learned in class this semester or other "Computer Architecture" topics -1. Have well-defined criteria for when it is finished and successful -1. Be achievable within the time allotted - -## Possible broad directions: - -- Extending something you started in Computer Architecture -- Teaching somebody something cool about Computer Architecture -- Something useful to someone that uses Computer Architecture -- Something that needs the skills learned in Computer Architecture -- Something that you can present at Expo that will make people want to take Computer Architecture - -Append one of the following phrases to a cool project idea to make it more CompArch-y: - -- ... with an FPGA -- ... in assembly -- ... on a GPU -- ... inside a nested series of black boxes -- ... hardware accelerated - -As you put your project plans together, remember that a major portion of the project is communicating it to others. - -## Demo (5%) -We’ll present your project work during the time blocked out for "final exam" period – December 12 from 12 – 3PM. This is mainly an opportunity to show off and celebrate your great work (small percentage of overall grade), and the details are up to you. - -The "default" option is a poster version of your project documentation (along with a running live demo if appropriate), so that folks can walk around in a studio session and see what you did. Maybe you feel that a presentation is more appropriate for your project work. Perhaps a tutorial session with everyone participating makes the most sense. It could be that only a puppet show truly captures the essence of your project. Think about final demo format as you put together your proposal, but you don't need to make a final decision just yet. - -Good luck, and have fun! +# TIS-100 CPU in verilog +To run rebuild all verilog and asm files and run all the tests as well as the demo use + ``make test`` From 352b48d188f3e1eea072464059585a3403b1fe8e Mon Sep 17 00:00:00 2001 From: TShapinsky Date: Tue, 23 Jul 2019 17:18:58 -0400 Subject: [PATCH 14/14] Update README.md --- README.md | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/README.md b/README.md index 927e9d8..d6a9fcc 100644 --- a/README.md +++ b/README.md @@ -1,4 +1,5 @@ # TIS-100 CPU in verilog - +This is an implementation of the TIS-100 cpu from the [game of the same name](http://www.zachtronics.com/tis-100/). Information about the functions of this machine can be found in our [ISA](https://github.com/TShapinsky/FinalProject/blob/master/TIS_100_ISA.pdf) +## Running To run rebuild all verilog and asm files and run all the tests as well as the demo use ``make test``