diff --git a/CompArch_Lab0.pdf b/CompArch_Lab0.pdf new file mode 100644 index 0000000..5daaabc Binary files /dev/null and b/CompArch_Lab0.pdf differ diff --git a/FullAdder4bit.vcd b/FullAdder4bit.vcd new file mode 100644 index 0000000..eb074a7 --- /dev/null +++ b/FullAdder4bit.vcd @@ -0,0 +1,524 @@ +$date + Tue Sep 26 18:38:53 2017 +$end +$version + Icarus Verilog +$end +$timescale + 1ps +$end +$scope module forTesting $end +$upscope $end +$scope module testFourBitAdder $end +$var wire 1 ! Cout $end +$var wire 1 " overflow $end +$var wire 4 # sum [3:0] $end +$var reg 4 $ a [3:0] $end +$var reg 4 % b [3:0] $end +$scope module test $end +$var wire 4 & a [3:0] $end +$var wire 4 ' b [3:0] $end +$var wire 1 ! carryout $end +$var wire 1 ( cout0 $end +$var wire 1 ) cout1 $end +$var wire 1 * cout2 $end +$var wire 1 " overflow $end +$var wire 4 + sum [3:0] $end +$scope module gate0 $end +$var wire 1 , AandB $end +$var wire 1 - AxorB $end +$var wire 1 . CAxorB $end +$var wire 1 ( Cout $end +$var wire 1 / a $end +$var wire 1 0 b $end +$var wire 1 1 carryin $end +$var wire 1 2 structsum $end +$upscope $end +$scope module gate1 $end +$var wire 1 3 AandB $end +$var wire 1 4 AxorB $end +$var wire 1 5 CAxorB $end +$var wire 1 ) Cout $end +$var wire 1 6 a $end +$var wire 1 7 b $end +$var wire 1 ( carryin $end +$var wire 1 8 structsum $end +$upscope $end +$scope module gate2 $end +$var wire 1 9 AandB $end +$var wire 1 : AxorB $end +$var wire 1 ; CAxorB $end +$var wire 1 * Cout $end +$var wire 1 < a $end +$var wire 1 = b $end +$var wire 1 ) carryin $end +$var wire 1 > structsum $end +$upscope $end +$scope module gate3 $end +$var wire 1 ? AandB $end +$var wire 1 @ AxorB $end +$var wire 1 A CAxorB $end +$var wire 1 ! Cout $end +$var wire 1 B a $end +$var wire 1 C b $end +$var wire 1 * carryin $end +$var wire 1 D structsum $end +$upscope $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +xD +0C +0B +xA +z@ +z? +x> +1= +0< +x; +z: +z9 +x8 +07 +16 +x5 +z4 +z3 +x2 +01 +00 +0/ +z. +z- +z, +bx + +x* +x) +x( +b100 ' +b10 & +b100 % +b10 $ +bx # +x" +x! +$end +#50000 +0? +0@ +09 +1: +03 +14 +0. +0, +0- +#100000 +0A +0( +02 +bx0 # +bx0 + +#150000 +0! +18 +bx10 # +bx10 + +05 +#200000 +0) +#250000 +1> +bx110 # +bx110 + +0; +#300000 +0* +#350000 +0D +b110 # +b110 + +0" +#1000000 +17 +1/ +06 +b110 % +b110 ' +b1 $ +b1 & +#1050000 +1- +#1100000 +12 +b111 # +b111 + +#2000000 +10 +07 +1C +1< +b1101 % +b1101 ' +b101 $ +b101 & +#2050000 +0- +1, +04 +1@ +0: +19 +#2100000 +02 +1( +08 +1D +0> +b1000 # +b1000 + +1* +#2150000 +18 +0D +b10 # +b10 + +1A +1" +#2200000 +1! +#2250000 +0" +#3000000 +17 +0/ +16 +0< +b1111 % +b1111 ' +b10 $ +b10 & +#3050000 +1- +0, +13 +1: +09 +#3100000 +12 +0( +1) +1> +b111 # +b111 + +0* +#3150000 +08 +0> +1; +1D +b1001 # +b1001 + +0A +1" +#3200000 +1* +0! +#3250000 +0D +b1 # +b1 + +1A +#3300000 +1! +#3350000 +0" +#4000000 +0= +0C +06 +1B +b11 % +b11 ' +b1000 $ +b1000 & +#4050000 +0: +14 +03 +#4100000 +1> +0; +18 +b111 # +b111 + +0) +#4150000 +0* +0> +b11 # +b11 + +#4200000 +1D +b1011 # +b1011 + +0A +1" +#4250000 +0! +#4300000 +0" +#5000000 +00 +1< +b10 % +b10 ' +b1100 $ +b1100 & +#5050000 +0- +1: +#5100000 +02 +1> +b1110 # +b1110 + +#6000000 +10 +1/ +b11 % +b11 ' +b1101 $ +b1101 & +#6050000 +1, +#6100000 +1( +#6150000 +08 +b1100 # +b1100 + +15 +#6200000 +1) +#6250000 +0> +b1000 # +b1000 + +1; +#6300000 +1* +#6350000 +0D +b0 # +b0 + +1A +1" +#6400000 +1! +#6450000 +0" +#7000000 +1= +0< +b111 % +b111 ' +b1001 $ +b1001 & +#8000000 +00 +07 +1C +1< +b1100 % +b1100 ' +b1101 $ +b1101 & +#8050000 +1- +0, +04 +0@ +1? +0: +19 +#8100000 +12 +0( +18 +05 +1D +0A +1> +b1111 # +b1111 + +0; +#8150000 +08 +b1101 # +b1101 + +0) +#8200000 +0> +b1001 # +b1001 + +#9000000 +17 +0= +0/ +16 +b1010 % +b1010 ' +b1110 $ +b1110 & +#9050000 +1: +09 +0- +13 +#9100000 +1> +0* +02 +b1100 # +b1100 + +1) +#9150000 +0D +1" +0> +b0 # +b0 + +1; +#9200000 +1* +#9250000 +1D +b1000 # +b1000 + +0" +#10000000 +1= +0C +1/ +06 +0B +b110 % +b110 ' +b101 $ +b101 & +#10050000 +0: +19 +1- +14 +03 +0? +#10100000 +1> +0; +12 +18 +b1111 # +b1111 + +0) +0! +#10150000 +0> +b1011 # +b1011 + +1" +#11000000 +10 +0/ +16 +0< +b111 % +b111 ' +b10 $ +b10 & +#11050000 +04 +13 +1: +09 +#11100000 +08 +1) +1> +b1101 # +b1101 + +0* +#11150000 +0> +1; +0D +b1 # +b1 + +0" +#11200000 +1* +#11250000 +1D +b1001 # +b1001 + +1" +#12000000 +1C +06 +1B +b1111 % +b1111 ' +b1000 $ +b1000 & +#12050000 +14 +03 +1? +#12100000 +18 +b1011 # +b1011 + +0) +1! +#12150000 +1> +b1111 # +b1111 + +0; +0" +#12200000 +0* +#12250000 +0D +b111 # +b111 + +1" +#14000000 +07 +b1101 % +b1101 ' +#14050000 +04 +#14100000 +08 +b101 # +b101 + +#15000000 +00 +1/ +16 +b1100 % +b1100 ' +b1011 $ +b1011 & +#15050000 +14 +#15100000 +18 +b111 # +b111 + +#16000000 diff --git a/adder.t.v b/adder.t.v new file mode 100644 index 0000000..f08df07 --- /dev/null +++ b/adder.t.v @@ -0,0 +1,96 @@ +// Lab 0 Adder testbench +`timescale 1 ns/ 1 ps +`include "adder.v" + +module testFourBitAdder(); + + + reg [3:0] a; + reg [3:0] b; + + wire [3:0] sum; + wire cout0; + wire cout1; + wire cout2; + wire Cout; + wire overflow; + + FullAdder4bit test(sum[3:0], Cout, overflow, a, b); + +initial begin + + $dumpfile("FullAdder4bit.vcd"); + $dumpvars(); + + $display("Testing for what? | In0 | In1 |ExpectSum|ActSum|COut| Overflow"); + +// Testing different possible test cases + +//Pos + Pos < 7 | 2 + 4 = 6 | 2 = 0010 | 4 = 0100 | 6 = 0110 | NO OVERFLOW + a = 4'b0010; b = 4'b0100; #1000 + $display("Pos + Pos < 7, No OF | %b | %b | 0110 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Pos < 7 | 1 + 6 = 7 | 1 = 0001 | 6 = 0110 | 7 = 0111 | NO OVERFLOW + a = 4'b0001; b = 4'b0110; #1000 + $display("Pos + Pos < 7, No OF | %b | %b | 0111 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Neg > 0 | 5 + -3 = 2 | 5 = 0101 | -3 = 1101 | 2 = 0010 | NO OVERFLOW + a = 4'b0101; b = 4'b1101; #1000 + $display("Pos + Neg > 0, No OF | %b | %b | 0010 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Neg > 0 | 2 + -1 = 1 | 2 = 0010 | -1 = 1111 | 1 = 0001 | NO OVERFLOW + a = 4'b0010; b = 4'b1111; #1000 + $display("Pos + Neg > 0, No OF | %b | %b | 0001 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Neg < 0 | -8 + 3 = -5 | -8 = 1000 | 3 = 0011 | -5 = 1011 | NO OVERFLOW + a = 4'b1000; b = 4'b0011; #1000 + $display("Pos + Neg < 0, No OF | %b | %b | 1011 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Neg < 0 | -4 + 2 = -2 | -4 = 1100 | 2 = 0010 | -2 = 1110 | NO OVERFLOW + a = 4'b1100; b = 4'b0010; #1000 + $display("Pos + Neg < 0, No OF | %b | %b | 1110 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Neg = 0 | -5 + 5 = 0 | -5 = 1101 | 5 = 0101 | 0 = 0000 | NO OVERFLOW + a = 4'b1101; b = 4'b0011; #1000 + $display("Pos + Neg = 0, No OF | %b | %b | 0000 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Neg = 0 | -7 + 7 = 0 | -7 = 1001 | 7 = 0111 | 0 = 0000 | NO OVERFLOW + a = 4'b1001; b = 4'b0111; #1000 + $display("Pos + Neg = 0, No OF | %b | %b | 0000 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Neg + Neg > -8 | -3 + -4 = -7 | -3 = 1101 | -4 = 1100 | -7 = 1001 | NO OVERFLOW + a = 4'b1101; b = 4'b1100; #1000 + $display("Neg + Neg > -8, No OF | %b | %b | 1001 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Neg + Neg > -8 | -2 + -6 = -8 | -2 = 1110 | -6 = 1010 | -8 = 1000 | NO OVERFLOW + a = 4'b1110; b = 4'b1010; #1000 + $display("Neg + Neg > -8, No OF | %b | %b | 1000 | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Pos > 7 | 5 + 6 = 11 | 5 = 0101 | 6 = 0110 | | OVERFLOW + a = 4'b0101; b = 4'b0110; #1000 + $display("Pos + Pos > 7, OF | %b | %b | XX | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Pos > 7 | 2 + 7 = 9 | 2 = 0010 | 7 = 0111 | | OVERFLOW + a = 4'b0010; b = 4'b0111; #1000 + $display("Pos + Pos > 7, OF | %b | %b | XX | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Pos + Pos > 7 | 7 + 7 = 14 | 7 = 0111 | 7 = 0111 | | OVERFLOW + a = 4'b0111; b = 4'b0111; #1000 + $display("Pos + Pos > 7, OF | %b | %b | XX | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Neg + Neg < -8 | -8 + -1 = -9 | -8 = 1000 | -1 = 1111 | | OVERFLOW + a = 4'b1000; b = 4'b1111; #1000 + $display("Neg + Neg < -8, OF | %b | %b | XX | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Neg + Neg < -8 | -8 + -3 = -11 | -8 = 1000 | -3 = 1101 | | OVERFLOW + a = 4'b1000; b = 4'b1101; #1000 + $display("Neg + Neg < -8, OF | %b | %b | XX | %b | %b | %b ", a, b, sum, Cout, overflow); + +//Neg + Neg < -8 | -5 + -4 = -9 | -5 = 1011 | -4 = 1100 | | OVERFLOW + a = 4'b1011; b = 4'b1100; #1000 + $display("Neg + Neg < -8, OF | %b | %b | XX | %b | %b | %b ", a, b, sum, Cout, overflow); + +end + +endmodule + diff --git a/adder.v b/adder.v new file mode 100644 index 0000000..738a73d --- /dev/null +++ b/adder.v @@ -0,0 +1,59 @@ +// Adder circuit +// an adder is a type of snake! + +`define AND and #50 +`define OR or #50 +`define NOT not #50 +`define XOR xor #50 + +module adder +( + input a, + input b, + input carryin, + output structsum, Cout +); + + wire AxorB; + wire AandB; + wire CAxorB; + +// Calculate sum + `XOR xorgate1(AxorB, a, b); + `XOR xorgate2(structsum, AxorB, carryin); + +// Calculate carryout + `AND andgate1(AandB, a, b); + `AND andgate2(CAxorB, carryin, AxorB); + `OR orgate1(Cout, AandB, CAxorB); + +endmodule + +module FullAdder4bit +( + output[3:0] sum, + output carryout, + output overflow, + input[3:0] a, + input[3:0] b +); + + wire cout0; // carryout from first summation + wire cout1; // carryout from second summation + wire cout2; // carryout from third summation + +// Full four bit adder is four adders in a row, where the carryout of the first is the carryin of the next + adder gate0(a[0], b[0], 0, sum[0], cout0); + adder gate1(a[1], b[1], cout0, sum[1], cout1); + adder gate2(a[2], b[2], cout1, sum[2], cout2); + adder gate3(a[3], b[3], cout2, sum[3], carryout); + +// Overflow happens when the carryin to the most significant place is not equal to the carryout from that place + `XOR xorgate(overflow, cout2, carryout); + +endmodule + +module forTesting(); +//FullAdder4bit adder(.sum(res0), .carryout(cout), .overflow(ovf), .a(opA), .b(opB)); +endmodule +