From 4d48757a962f82aa85865b4c64d9b4d64ab5a4ff Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 3 Oct 2017 22:13:53 -0400 Subject: [PATCH 01/38] Create work_plan.txt --- work_plan.txt | 12 ++++++++++++ 1 file changed, 12 insertions(+) create mode 100644 work_plan.txt diff --git a/work_plan.txt b/work_plan.txt new file mode 100644 index 0000000..9f6eef3 --- /dev/null +++ b/work_plan.txt @@ -0,0 +1,12 @@ +Create ALU in Verilog + Implement ADD, SUB, XOR, SLT - 1 hour - 10/8 + + Implement AND, NAND, OR, NOR - 0.5 hours - 10/8 + +Create testbenches - 1.5 hours - 10/9 + +Set timing - 1 hour- 10/9 + +Test ALU in Verilog - 1 hour - 10/9 + +Write report- 2 hours - 10/11 From 0b388a942b14e4a38225afb8a43a0b62b18d64a0 Mon Sep 17 00:00:00 2001 From: Kimber Date: Sun, 8 Oct 2017 19:16:20 -0400 Subject: [PATCH 02/38] Adder subtractor and friends --- adder.v | 76 ++++++++++++++++++++++++++++++++++++++++++ adder_subtracter.t.v | 34 +++++++++++++++++++ adder_subtracter.v | 79 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 189 insertions(+) create mode 100644 adder.v create mode 100644 adder_subtracter.t.v create mode 100644 adder_subtracter.v diff --git a/adder.v b/adder.v new file mode 100644 index 0000000..cc610e8 --- /dev/null +++ b/adder.v @@ -0,0 +1,76 @@ +// Adder circuit + +module behavioralFullAdder +( + output sum, + output carryout, + input a, + input b, + input carryin +); + // Uses concatenation operator and built-in '+' + assign {carryout, sum}=a+b+carryin; +endmodule + +module structuralFullAdder +( + output sum, + output carryout, + input a, + input b, + input carryin +); + wire ab; //setting up wires + wire acarryin; + wire bcarryin; + wire orpairintermediate; + wire orsingleintermediate; + wire orall; + wire andsumintermediate; + wire andsingleintermediate; + wire andall; + wire invcarryout; + and #(50) andab(ab, a, b); // a and b + and #(50) andacarryin(acarryin, a, carryin); // a and carryin + and #(50) andbcarryin(bcarryin, b, carryin); // b and carryin + or #(50) orpair(orpairintermediate, ab, acarryin); // (a and b) or (a and carryin) + or #(50) orcarryout(carryout, orpairintermediate, bcarryin); // ((a and b) or (a and carryin)) or (b and carryin) + or #(50) orintermediate(orsingleintermediate, a, b); // a or b + or #(50) orallinputs(orall, orsingleintermediate, carryin); // (a or b) or carryin + not #(50) inv(invcarryout, carryout); // not carryout + and #(50) sumintermediate(andsumintermediate, invcarryout, orall); // (a or b or carryin) and not carryout + and #(50) andintermediate(andsingleintermediate, a, b); // a and b + and #(50) andallinputs(andall, andsingleintermediate, carryin); // (a and b) and carryin + or #(50) adder(sum, andsumintermediate, andall); // ((a or b or carryin) and not carryout) or (a and b and c) +endmodule + +module FullAdder4bit +( + output[3:0] sum, // 2's complement sum of a and b + output carryout, // Carry out of the summation of a and b + output overflow, // True if the calculation resulted in an overflow + input[3:0] a, // First operand in 2's complement format + input[3:0] b, // Second operand in 2's complement format + input carryin +); + wire carryout1; // wire setup for carryouts from each adder + wire carryout2; + wire carryout3; + wire aandb; + wire anorb; + wire bandsum; + wire bnorsum; + wire abandnoror; + wire bsumandnornor; + structuralFullAdder #50 adder1(sum[0], carryout1, a[0], b[0], carryin); // first adder to handle the first added bits + structuralFullAdder #50 adder2(sum[1], carryout2, a[1], b[1], carryout1); // second adder to take the carryout from the first adder and the next added bits + structuralFullAdder #50 adder3(sum[2], carryout3, a[2], b[2], carryout2); // third adder to take the second carryout and the third added bits + structuralFullAdder #50 adder4(sum[3], carryout, a[3], b[3], carryout3); // fourth adder to take the third carryout and the fourth bits + and #50 andinputs(aandb, a[3], b[3]); // logic to determine overflow (overflow occurs when two positives result in a negative or two negatives result in a positive, the larges bit in both inputs are equal and the largest bit in the output is not the same) + nor #50 norinputs(anorb, a[3], b[3]); + and #50 andsum(bandsum, b[3], sum[3]); + nor #50 norsum(bnorsum, b[3], sum[3]); + or #50 orinputcombs(abandnoror, aandb, anorb); + nor #50 norsumcombs(bsumandnornor, bandsum, bnorsum); + and #50 finaland(overflow, abandnoror, bsumandnornor); +endmodule \ No newline at end of file diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v new file mode 100644 index 0000000..0268912 --- /dev/null +++ b/adder_subtracter.t.v @@ -0,0 +1,34 @@ +// Adder_subtacter testbench + +`timescale 1 ns / 1 ps +`include "adder_subtracter.v" + +module test32bitAdder(); + reg[31:0] a; + reg[31:0] b; + reg[2:0] carryin; + wire[31:0] ans; + wire carryout, overflow; + + adder_subtracter adder0(ans[31:0], carryout, overflow, finalB[31:0],a[31:0], b[31:0], carryin[2:0]); + + initial begin + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB[31:0]); + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB); + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=1;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=1;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB); + + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=1;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=1;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=1;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=1;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB); + + end +endmodule \ No newline at end of file diff --git a/adder_subtracter.v b/adder_subtracter.v new file mode 100644 index 0000000..7c9dfb3 --- /dev/null +++ b/adder_subtracter.v @@ -0,0 +1,79 @@ +`include "adder.v" + +module two_bit_mux + ( + output out, + input address, + input in0, in1 + ); + wire[1:0] inputs = {in1, in0}; + assign out = inputs[address]; +endmodule + +module adder_subtracter + ( + output[31:0] ans, + output carryout, + output overflow, + output[31:0] finalB, + input[31:0] opA, + input[31:0] opB, + input[2:0] command + ); + wire[31:0] invertedB; //wire to invert b in the event of a subtraction + wire[31:0] finalB; + wire normalB; //added b + wire cout0; + wire cout1; + wire cout2; + wire cout3; + wire cout4; + wire cout5; + wire cout6; + wire _; + + not invertB0(invertedB[0], opB[0]); + not invertB1(invertedB[1], opB[1]); + not invertB2(invertedB[2], opB[2]); + not invertB3(invertedB[3], opB[3]); + not invertB4(invertedB[4], opB[4]); + not invertB5(invertedB[5], opB[5]); + not invertB6(invertedB[6], opB[6]); + not invertB7(invertedB[7], opB[7]); + not invertB8(invertedB[8], opB[8]); + not invertB9(invertedB[9], opB[9]); + not invertB10(invertedB[10], opB[10]); + not invertB11(invertedB[11], opB[11]); + not invertB12(invertedB[12], opB[12]); + not invertB13(invertedB[13], opB[13]); + not invertB14(invertedB[14], opB[14]); + not invertB15(invertedB[15], opB[15]); + not invertB16(invertedB[16], opB[16]); + not invertB17(invertedB[17], opB[17]); + not invertB18(invertedB[18], opB[18]); + not invertB19(invertedB[19], opB[19]); + not invertB20(invertedB[20], opB[20]); + not invertB21(invertedB[21], opB[21]); + not invertB22(invertedB[22], opB[22]); + not invertB23(invertedB[23], opB[23]); + not invertB24(invertedB[24], opB[24]); + not invertB25(invertedB[25], opB[25]); + not invertB26(invertedB[26], opB[26]); + not invertB27(invertedB[27], opB[27]); + not invertB28(invertedB[28], opB[28]); + not invertB29(invertedB[29], opB[29]); + not invertB30(invertedB[30], opB[30]); + not invertB31(invertedB[31], opB[31]); + + two_bit_mux addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); + + FullAdder4bit #50 adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], 0); //coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one + FullAdder4bit #50 adder1(ans[7:4], cout1, _, opA[7:4], finalB[7:4], cout0); + FullAdder4bit #50 adder2(ans[11:8], cout2, _, opA[11:8], finalB[11:8], cout1); + FullAdder4bit #50 adder3(ans[15:12], cout3, _, opA[15:12], finalB[15:12], cout2); + FullAdder4bit #50 adder4(ans[19:16], cout4, _, opA[19:16], finalB[19:16], cout3); + FullAdder4bit #50 adder5(ans[23:20], cout5, _, opA[23:20], finalB[23:20], cout4); + FullAdder4bit #50 adder6(ans[27:24], cout6, _, opA[27:24], finalB[27:24], cout5); + FullAdder4bit #50 adder7(ans[31:28], carryout, overflow, opA[31:28], finalB[31:28], cout6); + +endmodule \ No newline at end of file From bb619e867ec7b840d8cc088ed8e66f2f645b4180 Mon Sep 17 00:00:00 2001 From: apan64 Date: Mon, 9 Oct 2017 20:53:37 -0400 Subject: [PATCH 03/38] fixed the mux --- adder_subtracter.t.v | 11 ++- adder_subtracter.v | 195 ++++++++++++++++++++++++++++++++++++++++--- 2 files changed, 187 insertions(+), 19 deletions(-) diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v index 0268912..36e008a 100644 --- a/adder_subtracter.t.v +++ b/adder_subtracter.t.v @@ -9,26 +9,25 @@ module test32bitAdder(); reg[2:0] carryin; wire[31:0] ans; wire carryout, overflow; + wire[31:0] finalB; - adder_subtracter adder0(ans[31:0], carryout, overflow, finalB[31:0],a[31:0], b[31:0], carryin[2:0]); + adder_subtracter adder0(ans[31:0], carryout, overflow, finalB[31:0], a[31:0], b[31:0], carryin[2:0]); initial begin - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=1; carryin[0]=0;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB[31:0]); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=1;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=1;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB); a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=1;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=1;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=1;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=1;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - $display("~~~~~~~~~~~~~~~~~~~~~~~~ %b~~~~~~~~~~", finalB); + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); end endmodule \ No newline at end of file diff --git a/adder_subtracter.v b/adder_subtracter.v index 7c9dfb3..04bd2fb 100644 --- a/adder_subtracter.v +++ b/adder_subtracter.v @@ -1,13 +1,176 @@ `include "adder.v" -module two_bit_mux +module mux ( - output out, + output[31:0] out, input address, - input in0, in1 + input[31:0] in0, + input[31:0] in1 ); - wire[1:0] inputs = {in1, in0}; - assign out = inputs[address]; + wire invaddr; + wire in00addr; // input 0 bit 0 andded with address + wire in01addr; + wire in02addr; + wire in03addr; + wire in04addr; + wire in05addr; + wire in06addr; + wire in07addr; + wire in08addr; + wire in09addr; + wire in010addr; + wire in011addr; + wire in012addr; + wire in013addr; + wire in014addr; + wire in015addr; + wire in016addr; + wire in017addr; + wire in018addr; + wire in019addr; + wire in020addr; + wire in021addr; + wire in022addr; + wire in023addr; + wire in024addr; + wire in025addr; + wire in026addr; + wire in027addr; + wire in028addr; + wire in029addr; + wire in030addr; + wire in031addr; + wire in10addr; + wire in11addr; + wire in12addr; + wire in13addr; + wire in14addr; + wire in15addr; + wire in16addr; + wire in17addr; + wire in18addr; + wire in19addr; + wire in110addr; + wire in111addr; + wire in112addr; + wire in113addr; + wire in114addr; + wire in115addr; + wire in116addr; + wire in117addr; + wire in118addr; + wire in119addr; + wire in120addr; + wire in121addr; + wire in122addr; + wire in123addr; + wire in124addr; + wire in125addr; + wire in126addr; + wire in127addr; + wire in128addr; + wire in129addr; + wire in130addr; + wire in131addr; + + not inv(invaddr, address); + and and00(in00addr, in0[0], invaddr); + and and01(in01addr, in0[1], invaddr); + and and02(in02addr, in0[2], invaddr); + and and03(in03addr, in0[3], invaddr); + and and04(in04addr, in0[4], invaddr); + and and05(in05addr, in0[5], invaddr); + and and06(in06addr, in0[6], invaddr); + and and07(in07addr, in0[7], invaddr); + and and08(in08addr, in0[8], invaddr); + and and09(in09addr, in0[9], invaddr); + and and010(in010addr, in0[10], invaddr); + and and011(in011addr, in0[11], invaddr); + and and012(in012addr, in0[12], invaddr); + and and013(in013addr, in0[13], invaddr); + and and014(in014addr, in0[14], invaddr); + and and015(in015addr, in0[15], invaddr); + and and016(in016addr, in0[16], invaddr); + and and017(in017addr, in0[17], invaddr); + and and018(in018addr, in0[18], invaddr); + and and019(in019addr, in0[19], invaddr); + and and020(in020addr, in0[20], invaddr); + and and021(in021addr, in0[21], invaddr); + and and022(in022addr, in0[22], invaddr); + and and023(in023addr, in0[23], invaddr); + and and024(in024addr, in0[24], invaddr); + and and025(in025addr, in0[25], invaddr); + and and026(in026addr, in0[26], invaddr); + and and027(in027addr, in0[27], invaddr); + and and028(in028addr, in0[28], invaddr); + and and029(in029addr, in0[29], invaddr); + and and030(in030addr, in0[30], invaddr); + and and031(in031addr, in0[31], invaddr); + and and10(in10addr, in1[0], address); + and and11(in11addr, in1[1], address); + and and12(in12addr, in1[2], address); + and and13(in13addr, in1[3], address); + and and14(in14addr, in1[4], address); + and and15(in15addr, in1[5], address); + and and16(in16addr, in1[6], address); + and and17(in17addr, in1[7], address); + and and18(in18addr, in1[8], address); + and and19(in19addr, in1[9], address); + and and110(in110addr, in1[10], address); + and and111(in111addr, in1[11], address); + and and112(in112addr, in1[12], address); + and and113(in113addr, in1[13], address); + and and114(in114addr, in1[14], address); + and and115(in115addr, in1[15], address); + and and116(in116addr, in1[16], address); + and and117(in117addr, in1[17], address); + and and118(in118addr, in1[18], address); + and and119(in119addr, in1[19], address); + and and120(in120addr, in1[20], address); + and and121(in121addr, in1[21], address); + and and122(in122addr, in1[22], address); + and and123(in123addr, in1[23], address); + and and124(in124addr, in1[24], address); + and and125(in125addr, in1[25], address); + and and126(in126addr, in1[26], address); + and and127(in127addr, in1[27], address); + and and128(in128addr, in1[28], address); + and and129(in129addr, in1[29], address); + and and130(in130addr, in1[30], address); + and and131(in131addr, in1[31], address); + + or or0(out[0], in00addr, in10addr); + or or1(out[1], in01addr, in11addr); + or or2(out[2], in02addr, in12addr); + or or3(out[3], in03addr, in13addr); + or or4(out[4], in04addr, in14addr); + or or5(out[5], in05addr, in15addr); + or or6(out[6], in06addr, in16addr); + or or7(out[7], in07addr, in17addr); + or or8(out[8], in08addr, in18addr); + or or9(out[9], in09addr, in19addr); + or or10(out[10], in010addr, in110addr); + or or11(out[11], in011addr, in111addr); + or or12(out[12], in012addr, in112addr); + or or13(out[13], in013addr, in113addr); + or or14(out[14], in014addr, in114addr); + or or15(out[15], in015addr, in115addr); + or or16(out[16], in016addr, in116addr); + or or17(out[17], in017addr, in117addr); + or or18(out[18], in018addr, in118addr); + or or19(out[19], in019addr, in119addr); + or or20(out[20], in020addr, in120addr); + or or21(out[21], in021addr, in121addr); + or or22(out[22], in022addr, in122addr); + or or23(out[23], in023addr, in123addr); + or or24(out[24], in024addr, in124addr); + or or25(out[25], in025addr, in125addr); + or or26(out[26], in026addr, in126addr); + or or27(out[27], in027addr, in127addr); + or or28(out[28], in028addr, in128addr); + or or29(out[29], in029addr, in129addr); + or or30(out[30], in030addr, in130addr); + or or31(out[31], in031addr, in131addr); endmodule module adder_subtracter @@ -21,7 +184,7 @@ module adder_subtracter input[2:0] command ); wire[31:0] invertedB; //wire to invert b in the event of a subtraction - wire[31:0] finalB; + // wire[31:0] finalB; wire normalB; //added b wire cout0; wire cout1; @@ -31,6 +194,12 @@ module adder_subtracter wire cout5; wire cout6; wire _; + wire _1; + wire _2; + wire _3; + wire _4; + wire _5; + wire _6; not invertB0(invertedB[0], opB[0]); not invertB1(invertedB[1], opB[1]); @@ -65,15 +234,15 @@ module adder_subtracter not invertB30(invertedB[30], opB[30]); not invertB31(invertedB[31], opB[31]); - two_bit_mux addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); + mux addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); FullAdder4bit #50 adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], 0); //coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one - FullAdder4bit #50 adder1(ans[7:4], cout1, _, opA[7:4], finalB[7:4], cout0); - FullAdder4bit #50 adder2(ans[11:8], cout2, _, opA[11:8], finalB[11:8], cout1); - FullAdder4bit #50 adder3(ans[15:12], cout3, _, opA[15:12], finalB[15:12], cout2); - FullAdder4bit #50 adder4(ans[19:16], cout4, _, opA[19:16], finalB[19:16], cout3); - FullAdder4bit #50 adder5(ans[23:20], cout5, _, opA[23:20], finalB[23:20], cout4); - FullAdder4bit #50 adder6(ans[27:24], cout6, _, opA[27:24], finalB[27:24], cout5); + FullAdder4bit #50 adder1(ans[7:4], cout1, _1, opA[7:4], finalB[7:4], cout0); + FullAdder4bit #50 adder2(ans[11:8], cout2, _2, opA[11:8], finalB[11:8], cout1); + FullAdder4bit #50 adder3(ans[15:12], cout3, _3, opA[15:12], finalB[15:12], cout2); + FullAdder4bit #50 adder4(ans[19:16], cout4, _4, opA[19:16], finalB[19:16], cout3); + FullAdder4bit #50 adder5(ans[23:20], cout5, _5, opA[23:20], finalB[23:20], cout4); + FullAdder4bit #50 adder6(ans[27:24], cout6, _6, opA[27:24], finalB[27:24], cout5); FullAdder4bit #50 adder7(ans[31:28], carryout, overflow, opA[31:28], finalB[31:28], cout6); endmodule \ No newline at end of file From 90b15d3364900770153fe42de43a5d84d425ebf9 Mon Sep 17 00:00:00 2001 From: Kimber Date: Tue, 10 Oct 2017 00:16:33 -0400 Subject: [PATCH 04/38] Fixed a little. added a new test case that breaks it though :( --- adder_subtracter.t.v | 6 +++++- adder_subtracter.v | 2 +- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v index 36e008a..6931801 100644 --- a/adder_subtracter.t.v +++ b/adder_subtracter.t.v @@ -15,7 +15,7 @@ module test32bitAdder(); initial begin - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=1; carryin[0]=0;carryin[1]=0;carryin[2]=0; #5000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 @@ -29,5 +29,9 @@ module test32bitAdder(); a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("~~~~~~~~~~~~~~~~%b~~~~~~~",finalB); end endmodule \ No newline at end of file diff --git a/adder_subtracter.v b/adder_subtracter.v index 04bd2fb..9604257 100644 --- a/adder_subtracter.v +++ b/adder_subtracter.v @@ -236,7 +236,7 @@ module adder_subtracter mux addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); - FullAdder4bit #50 adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], 0); //coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one + FullAdder4bit #50 adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], command[0]); //coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one FullAdder4bit #50 adder1(ans[7:4], cout1, _1, opA[7:4], finalB[7:4], cout0); FullAdder4bit #50 adder2(ans[11:8], cout2, _2, opA[11:8], finalB[11:8], cout1); FullAdder4bit #50 adder3(ans[15:12], cout3, _3, opA[15:12], finalB[15:12], cout2); From ec8c677ad8dbeab6a6c3c97bcef839c50127f8bb Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 10:19:58 -0400 Subject: [PATCH 05/38] made slt --- adder_subtracter.t.v | 4 +- slt.t.v | 24 ++++++++++++ slt.v | 88 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 115 insertions(+), 1 deletion(-) create mode 100644 slt.t.v create mode 100644 slt.v diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v index 6931801..aa36b4a 100644 --- a/adder_subtracter.t.v +++ b/adder_subtracter.t.v @@ -32,6 +32,8 @@ module test32bitAdder(); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - $display("~~~~~~~~~~~~~~~~%b~~~~~~~",finalB); + + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=0;carryin[1]=0;carryin[2]=0; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); end endmodule \ No newline at end of file diff --git a/slt.t.v b/slt.t.v new file mode 100644 index 0000000..cde96d9 --- /dev/null +++ b/slt.t.v @@ -0,0 +1,24 @@ +`timescale 1 ns / 1 ps +`include "slt.v" + +module test32bitslt(); + reg[31:0] a; + reg[31:0] b; + wire ans; + + full_slt_32bit slt(ans, a[31:0], b[31:0]); + + initial begin + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans); + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans); + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans); + + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans); + end +endmodule \ No newline at end of file diff --git a/slt.v b/slt.v new file mode 100644 index 0000000..25bb7c4 --- /dev/null +++ b/slt.v @@ -0,0 +1,88 @@ +module single_slt + ( + output out, + input a, + input b, + input defaultCompare + ); + wire abxor; + wire axorand; + wire xornot; + wire xornotand; + xor axb(abxor, a, b); + and aaxb(axorand, a, abxor); + not invxor(xornot, abxor); + and xorandinput(xornotand, xornot, defaultCompare); + or compare(out, axorand, xornotand); +endmodule + +module full_slt_32bit + ( + output out, + input[31:0] a, + input[31:0] b + ); + wire slt0; + wire slt1; + wire slt2; + wire slt3; + wire slt4; + wire slt5; + wire slt6; + wire slt7; + wire slt8; + wire slt9; + wire slt10; + wire slt11; + wire slt12; + wire slt13; + wire slt14; + wire slt15; + wire slt16; + wire slt17; + wire slt18; + wire slt19; + wire slt20; + wire slt21; + wire slt22; + wire slt23; + wire slt24; + wire slt25; + wire slt26; + wire slt27; + wire slt28; + wire slt29; + wire slt30; + single_slt bit0(slt0, a[0], b[0], 0); + single_slt bit1(slt1, a[1], b[1], slt0); + single_slt bit2(slt2, a[2], b[2], slt1); + single_slt bit3(slt3, a[3], b[3], slt2); + single_slt bit4(slt4, a[4], b[4], slt3); + single_slt bit5(slt5, a[5], b[5], slt4); + single_slt bit6(slt6, a[6], b[6], slt5); + single_slt bit7(slt7, a[7], b[7], slt6); + single_slt bit8(slt8, a[8], b[8], slt7); + single_slt bit9(slt9, a[9], b[9], slt8); + single_slt bit10(slt10, a[10], b[10], slt9); + single_slt bit11(slt11, a[11], b[11], slt10); + single_slt bit12(slt12, a[12], b[12], slt11); + single_slt bit13(slt13, a[13], b[13], slt12); + single_slt bit14(slt14, a[14], b[14], slt13); + single_slt bit15(slt15, a[15], b[15], slt14); + single_slt bit16(slt16, a[16], b[16], slt15); + single_slt bit17(slt17, a[17], b[17], slt16); + single_slt bit18(slt18, a[18], b[18], slt17); + single_slt bit19(slt19, a[19], b[19], slt18); + single_slt bit20(slt20, a[20], b[20], slt19); + single_slt bit21(slt21, a[21], b[21], slt20); + single_slt bit22(slt22, a[22], b[22], slt21); + single_slt bit23(slt23, a[23], b[23], slt22); + single_slt bit24(slt24, a[24], b[24], slt23); + single_slt bit25(slt25, a[25], b[25], slt24); + single_slt bit26(slt26, a[26], b[26], slt25); + single_slt bit27(slt27, a[27], b[27], slt26); + single_slt bit28(slt28, a[28], b[28], slt27); + single_slt bit29(slt29, a[29], b[29], slt28); + single_slt bit30(slt30, a[30], b[30], slt29); + single_slt bit31(out, a[31], b[31], slt30); +endmodule \ No newline at end of file From 4c603892059313044f11f1fc98797200f2b4adfa Mon Sep 17 00:00:00 2001 From: Kimber Date: Tue, 10 Oct 2017 21:21:43 -0400 Subject: [PATCH 06/38] 32 bit ALU & friendz --- ALU32bit.v | 52 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 ALU32bit.v diff --git a/ALU32bit.v b/ALU32bit.v new file mode 100644 index 0000000..9226ede --- /dev/null +++ b/ALU32bit.v @@ -0,0 +1,52 @@ +//final 32-bit ALU + +`include "adder_subtracter.v" +`include "slt.v" + +module ALUcontrolLUT //Ben Hill's code +( + output reg [31:0]controlsignal, //final 32-bit output + output cout, //addsub only + output flag, //addsub only + output [31:0]finalsignal, + input [2:0]ALUcommand, + input [31:0]a, + input [31:0]b, + input [31:0]xorin, //placeholders + input [31:0]andin, + input [31:0]nandin, + input [31:0]norin, + input [31:0]orin + +); +adder_subtracter addsub0([31:0]addsub,cout,flag,[31:0]a,[31:0]b,[2:0]ALUcommand); +full_slt_32bit slt0=([31:0]slt,[31:0]a,[31:0]b); + + + always @(ALUcommand) + begin + case (ALUcommand==[0,0,0]) + controlsignal==addsub; + endcase + case (ALUcommand==[0,0,1]) + controlsignal==addsub; + endcase + case (ALUcommand==[0,1,0]) + controlsignal==xor; + endcase + case (ALUcommand==[0,1,1]) + controlsignal==slt; + endcase + case (ALUcommand==[1,0,0]) + controlsignal==and; + endcase + case (ALUcommand==[1,0,1]) + controlsignal==nand; + endcase + case (ALUcommand==[1,1,0]) + controlsignal==nor; + endcase + case (ALUcommand==[1,0,0]) + controlsignal==or; + endcase +endmodule From 0a79f2e23ff0f7fda9bbe8a584ccc3d8db8724e5 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 21:25:00 -0400 Subject: [PATCH 07/38] changed slt to output 32 bits --- slt.t.v | 16 +++++++++++----- slt.v | 2 +- 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/slt.t.v b/slt.t.v index cde96d9..827c24a 100644 --- a/slt.t.v +++ b/slt.t.v @@ -4,21 +4,27 @@ module test32bitslt(); reg[31:0] a; reg[31:0] b; - wire ans; + wire[31:0] ans; full_slt_32bit slt(ans, a[31:0], b[31:0]); initial begin a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans); + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans); + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans); + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans); + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); end endmodule \ No newline at end of file diff --git a/slt.v b/slt.v index 25bb7c4..a838e2a 100644 --- a/slt.v +++ b/slt.v @@ -18,7 +18,7 @@ endmodule module full_slt_32bit ( - output out, + output[31:0] out, input[31:0] a, input[31:0] b ); From 5fe898da23ba1ad51e01de247c33fdb7aef58b15 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 21:46:17 -0400 Subject: [PATCH 08/38] created and, nand, and nor --- and_32bit.t.v | 36 ++++++++++++++++++++++++++++++++++++ and_32bit.v | 38 ++++++++++++++++++++++++++++++++++++++ nand_32bit.t.v | 36 ++++++++++++++++++++++++++++++++++++ nand_32bit.v | 38 ++++++++++++++++++++++++++++++++++++++ nor_32bit.t.v | 36 ++++++++++++++++++++++++++++++++++++ nor_32bit.v | 38 ++++++++++++++++++++++++++++++++++++++ 6 files changed, 222 insertions(+) create mode 100644 and_32bit.t.v create mode 100644 and_32bit.v create mode 100644 nand_32bit.t.v create mode 100644 nand_32bit.v create mode 100644 nor_32bit.t.v create mode 100644 nor_32bit.v diff --git a/and_32bit.t.v b/and_32bit.t.v new file mode 100644 index 0000000..5857179 --- /dev/null +++ b/and_32bit.t.v @@ -0,0 +1,36 @@ +`timescale 1 ns / 1 ps +`include "and_32bit.v" + +module test32bitand(); + reg[31:0] a; + reg[31:0] b; + wire[31:0] ans; + + and_32bit and32(ans, a[31:0], b[31:0]); + + initial begin + // 00000000000000000000000000000000 00000000000000000000000000000000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000001 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000010 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000000 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 11000000000000000000000000000000 10000000000000000000000000000001 + a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 10000000000000000000000000000000 11000000000000000000000000000001 + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + end +endmodule \ No newline at end of file diff --git a/and_32bit.v b/and_32bit.v new file mode 100644 index 0000000..f37937c --- /dev/null +++ b/and_32bit.v @@ -0,0 +1,38 @@ +module and_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + and bit0(out[0], a[0], b[0]); + and bit1(out[1], a[1], b[1]); + and bit2(out[2], a[2], b[2]); + and bit3(out[3], a[3], b[3]); + and bit4(out[4], a[4], b[4]); + and bit5(out[5], a[5], b[5]); + and bit6(out[6], a[6], b[6]); + and bit7(out[7], a[7], b[7]); + and bit8(out[8], a[8], b[8]); + and bit9(out[9], a[9], b[9]); + and bit10(out[10], a[10], b[10]); + and bit11(out[11], a[11], b[11]); + and bit12(out[12], a[12], b[12]); + and bit13(out[13], a[13], b[13]); + and bit14(out[14], a[14], b[14]); + and bit15(out[15], a[15], b[15]); + and bit16(out[16], a[16], b[16]); + and bit17(out[17], a[17], b[17]); + and bit18(out[18], a[18], b[18]); + and bit19(out[19], a[19], b[19]); + and bit20(out[20], a[20], b[20]); + and bit21(out[21], a[21], b[21]); + and bit22(out[22], a[22], b[22]); + and bit23(out[23], a[23], b[23]); + and bit24(out[24], a[24], b[24]); + and bit25(out[25], a[25], b[25]); + and bit26(out[26], a[26], b[26]); + and bit27(out[27], a[27], b[27]); + and bit28(out[28], a[28], b[28]); + and bit29(out[29], a[29], b[29]); + and bit30(out[30], a[30], b[30]); + and bit31(out[31], a[31], b[31]); +endmodule diff --git a/nand_32bit.t.v b/nand_32bit.t.v new file mode 100644 index 0000000..28a4791 --- /dev/null +++ b/nand_32bit.t.v @@ -0,0 +1,36 @@ +`timescale 1 ns / 1 ps +`include "nand_32bit.v" + +module test32bitnand(); + reg[31:0] a; + reg[31:0] b; + wire[31:0] ans; + + nand_32bit nand32(ans, a[31:0], b[31:0]); + + initial begin + // 00000000000000000000000000000000 00000000000000000000000000000000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000001 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000010 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000000 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 11000000000000000000000000000000 10000000000000000000000000000001 + a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 10000000000000000000000000000000 11000000000000000000000000000001 + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + end +endmodule \ No newline at end of file diff --git a/nand_32bit.v b/nand_32bit.v new file mode 100644 index 0000000..0b7c0f2 --- /dev/null +++ b/nand_32bit.v @@ -0,0 +1,38 @@ +module nand_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + nand bit0(out[0], a[0], b[0]); + nand bit1(out[1], a[1], b[1]); + nand bit2(out[2], a[2], b[2]); + nand bit3(out[3], a[3], b[3]); + nand bit4(out[4], a[4], b[4]); + nand bit5(out[5], a[5], b[5]); + nand bit6(out[6], a[6], b[6]); + nand bit7(out[7], a[7], b[7]); + nand bit8(out[8], a[8], b[8]); + nand bit9(out[9], a[9], b[9]); + nand bit10(out[10], a[10], b[10]); + nand bit11(out[11], a[11], b[11]); + nand bit12(out[12], a[12], b[12]); + nand bit13(out[13], a[13], b[13]); + nand bit14(out[14], a[14], b[14]); + nand bit15(out[15], a[15], b[15]); + nand bit16(out[16], a[16], b[16]); + nand bit17(out[17], a[17], b[17]); + nand bit18(out[18], a[18], b[18]); + nand bit19(out[19], a[19], b[19]); + nand bit20(out[20], a[20], b[20]); + nand bit21(out[21], a[21], b[21]); + nand bit22(out[22], a[22], b[22]); + nand bit23(out[23], a[23], b[23]); + nand bit24(out[24], a[24], b[24]); + nand bit25(out[25], a[25], b[25]); + nand bit26(out[26], a[26], b[26]); + nand bit27(out[27], a[27], b[27]); + nand bit28(out[28], a[28], b[28]); + nand bit29(out[29], a[29], b[29]); + nand bit30(out[30], a[30], b[30]); + nand bit31(out[31], a[31], b[31]); +endmodule diff --git a/nor_32bit.t.v b/nor_32bit.t.v new file mode 100644 index 0000000..619fd4a --- /dev/null +++ b/nor_32bit.t.v @@ -0,0 +1,36 @@ +`timescale 1 ns / 1 ps +`include "nor_32bit.v" + +module test32bitnor(); + reg[31:0] a; + reg[31:0] b; + wire[31:0] ans; + + nor_32bit nor32(ans, a[31:0], b[31:0]); + + initial begin + // 00000000000000000000000000000000 00000000000000000000000000000000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000001 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000010 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000000 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 11000000000000000000000000000000 10000000000000000000000000000001 + a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 10000000000000000000000000000000 11000000000000000000000000000001 + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + end +endmodule \ No newline at end of file diff --git a/nor_32bit.v b/nor_32bit.v new file mode 100644 index 0000000..b14a9ce --- /dev/null +++ b/nor_32bit.v @@ -0,0 +1,38 @@ +module nor_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + nor #10 bit0(out[0], a[0], b[0]); + nor #10 bit1(out[1], a[1], b[1]); + nor #10 bit2(out[2], a[2], b[2]); + nor #10 bit3(out[3], a[3], b[3]); + nor #10 bit4(out[4], a[4], b[4]); + nor #10 bit5(out[5], a[5], b[5]); + nor #10 bit6(out[6], a[6], b[6]); + nor #10 bit7(out[7], a[7], b[7]); + nor #10 bit8(out[8], a[8], b[8]); + nor #10 bit9(out[9], a[9], b[9]); + nor #10 bit10(out[10], a[10], b[10]); + nor #10 bit11(out[11], a[11], b[11]); + nor #10 bit12(out[12], a[12], b[12]); + nor #10 bit13(out[13], a[13], b[13]); + nor #10 bit14(out[14], a[14], b[14]); + nor #10 bit15(out[15], a[15], b[15]); + nor #10 bit16(out[16], a[16], b[16]); + nor #10 bit17(out[17], a[17], b[17]); + nor #10 bit18(out[18], a[18], b[18]); + nor #10 bit19(out[19], a[19], b[19]); + nor #10 bit20(out[20], a[20], b[20]); + nor #10 bit21(out[21], a[21], b[21]); + nor #10 bit22(out[22], a[22], b[22]); + nor #10 bit23(out[23], a[23], b[23]); + nor #10 bit24(out[24], a[24], b[24]); + nor #10 bit25(out[25], a[25], b[25]); + nor #10 bit26(out[26], a[26], b[26]); + nor #10 bit27(out[27], a[27], b[27]); + nor #10 bit28(out[28], a[28], b[28]); + nor #10 bit29(out[29], a[29], b[29]); + nor #10 bit30(out[30], a[30], b[30]); + nor #10 bit31(out[31], a[31], b[31]); +endmodule From 07d3136798614b038bbc0319e5576258f6952e88 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 21:47:39 -0400 Subject: [PATCH 09/38] added delays --- and_32bit.v | 64 ++++++++++++++++++++++++++-------------------------- nand_32bit.v | 64 ++++++++++++++++++++++++++-------------------------- 2 files changed, 64 insertions(+), 64 deletions(-) diff --git a/and_32bit.v b/and_32bit.v index f37937c..c321a78 100644 --- a/and_32bit.v +++ b/and_32bit.v @@ -3,36 +3,36 @@ module and_32bit input[31:0] a, input[31:0] b ); - and bit0(out[0], a[0], b[0]); - and bit1(out[1], a[1], b[1]); - and bit2(out[2], a[2], b[2]); - and bit3(out[3], a[3], b[3]); - and bit4(out[4], a[4], b[4]); - and bit5(out[5], a[5], b[5]); - and bit6(out[6], a[6], b[6]); - and bit7(out[7], a[7], b[7]); - and bit8(out[8], a[8], b[8]); - and bit9(out[9], a[9], b[9]); - and bit10(out[10], a[10], b[10]); - and bit11(out[11], a[11], b[11]); - and bit12(out[12], a[12], b[12]); - and bit13(out[13], a[13], b[13]); - and bit14(out[14], a[14], b[14]); - and bit15(out[15], a[15], b[15]); - and bit16(out[16], a[16], b[16]); - and bit17(out[17], a[17], b[17]); - and bit18(out[18], a[18], b[18]); - and bit19(out[19], a[19], b[19]); - and bit20(out[20], a[20], b[20]); - and bit21(out[21], a[21], b[21]); - and bit22(out[22], a[22], b[22]); - and bit23(out[23], a[23], b[23]); - and bit24(out[24], a[24], b[24]); - and bit25(out[25], a[25], b[25]); - and bit26(out[26], a[26], b[26]); - and bit27(out[27], a[27], b[27]); - and bit28(out[28], a[28], b[28]); - and bit29(out[29], a[29], b[29]); - and bit30(out[30], a[30], b[30]); - and bit31(out[31], a[31], b[31]); + and #10 bit0(out[0], a[0], b[0]); + and #10 bit1(out[1], a[1], b[1]); + and #10 bit2(out[2], a[2], b[2]); + and #10 bit3(out[3], a[3], b[3]); + and #10 bit4(out[4], a[4], b[4]); + and #10 bit5(out[5], a[5], b[5]); + and #10 bit6(out[6], a[6], b[6]); + and #10 bit7(out[7], a[7], b[7]); + and #10 bit8(out[8], a[8], b[8]); + and #10 bit9(out[9], a[9], b[9]); + and #10 bit10(out[10], a[10], b[10]); + and #10 bit11(out[11], a[11], b[11]); + and #10 bit12(out[12], a[12], b[12]); + and #10 bit13(out[13], a[13], b[13]); + and #10 bit14(out[14], a[14], b[14]); + and #10 bit15(out[15], a[15], b[15]); + and #10 bit16(out[16], a[16], b[16]); + and #10 bit17(out[17], a[17], b[17]); + and #10 bit18(out[18], a[18], b[18]); + and #10 bit19(out[19], a[19], b[19]); + and #10 bit20(out[20], a[20], b[20]); + and #10 bit21(out[21], a[21], b[21]); + and #10 bit22(out[22], a[22], b[22]); + and #10 bit23(out[23], a[23], b[23]); + and #10 bit24(out[24], a[24], b[24]); + and #10 bit25(out[25], a[25], b[25]); + and #10 bit26(out[26], a[26], b[26]); + and #10 bit27(out[27], a[27], b[27]); + and #10 bit28(out[28], a[28], b[28]); + and #10 bit29(out[29], a[29], b[29]); + and #10 bit30(out[30], a[30], b[30]); + and #10 bit31(out[31], a[31], b[31]); endmodule diff --git a/nand_32bit.v b/nand_32bit.v index 0b7c0f2..0ab6109 100644 --- a/nand_32bit.v +++ b/nand_32bit.v @@ -3,36 +3,36 @@ module nand_32bit input[31:0] a, input[31:0] b ); - nand bit0(out[0], a[0], b[0]); - nand bit1(out[1], a[1], b[1]); - nand bit2(out[2], a[2], b[2]); - nand bit3(out[3], a[3], b[3]); - nand bit4(out[4], a[4], b[4]); - nand bit5(out[5], a[5], b[5]); - nand bit6(out[6], a[6], b[6]); - nand bit7(out[7], a[7], b[7]); - nand bit8(out[8], a[8], b[8]); - nand bit9(out[9], a[9], b[9]); - nand bit10(out[10], a[10], b[10]); - nand bit11(out[11], a[11], b[11]); - nand bit12(out[12], a[12], b[12]); - nand bit13(out[13], a[13], b[13]); - nand bit14(out[14], a[14], b[14]); - nand bit15(out[15], a[15], b[15]); - nand bit16(out[16], a[16], b[16]); - nand bit17(out[17], a[17], b[17]); - nand bit18(out[18], a[18], b[18]); - nand bit19(out[19], a[19], b[19]); - nand bit20(out[20], a[20], b[20]); - nand bit21(out[21], a[21], b[21]); - nand bit22(out[22], a[22], b[22]); - nand bit23(out[23], a[23], b[23]); - nand bit24(out[24], a[24], b[24]); - nand bit25(out[25], a[25], b[25]); - nand bit26(out[26], a[26], b[26]); - nand bit27(out[27], a[27], b[27]); - nand bit28(out[28], a[28], b[28]); - nand bit29(out[29], a[29], b[29]); - nand bit30(out[30], a[30], b[30]); - nand bit31(out[31], a[31], b[31]); + nand #10 bit0(out[0], a[0], b[0]); + nand #10 bit1(out[1], a[1], b[1]); + nand #10 bit2(out[2], a[2], b[2]); + nand #10 bit3(out[3], a[3], b[3]); + nand #10 bit4(out[4], a[4], b[4]); + nand #10 bit5(out[5], a[5], b[5]); + nand #10 bit6(out[6], a[6], b[6]); + nand #10 bit7(out[7], a[7], b[7]); + nand #10 bit8(out[8], a[8], b[8]); + nand #10 bit9(out[9], a[9], b[9]); + nand #10 bit10(out[10], a[10], b[10]); + nand #10 bit11(out[11], a[11], b[11]); + nand #10 bit12(out[12], a[12], b[12]); + nand #10 bit13(out[13], a[13], b[13]); + nand #10 bit14(out[14], a[14], b[14]); + nand #10 bit15(out[15], a[15], b[15]); + nand #10 bit16(out[16], a[16], b[16]); + nand #10 bit17(out[17], a[17], b[17]); + nand #10 bit18(out[18], a[18], b[18]); + nand #10 bit19(out[19], a[19], b[19]); + nand #10 bit20(out[20], a[20], b[20]); + nand #10 bit21(out[21], a[21], b[21]); + nand #10 bit22(out[22], a[22], b[22]); + nand #10 bit23(out[23], a[23], b[23]); + nand #10 bit24(out[24], a[24], b[24]); + nand #10 bit25(out[25], a[25], b[25]); + nand #10 bit26(out[26], a[26], b[26]); + nand #10 bit27(out[27], a[27], b[27]); + nand #10 bit28(out[28], a[28], b[28]); + nand #10 bit29(out[29], a[29], b[29]); + nand #10 bit30(out[30], a[30], b[30]); + nand #10 bit31(out[31], a[31], b[31]); endmodule From b0bc947071bad872be830e883de112b4e93b95a5 Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Tue, 10 Oct 2017 21:53:00 -0400 Subject: [PATCH 10/38] created or and xor --- or_32bit.t.v | 36 ++++++++++++++++++++++++++++++++++++ or_32bit.v | 38 ++++++++++++++++++++++++++++++++++++++ xor_32bit.t.v | 36 ++++++++++++++++++++++++++++++++++++ xor_32bit.v | 38 ++++++++++++++++++++++++++++++++++++++ 4 files changed, 148 insertions(+) create mode 100644 or_32bit.t.v create mode 100644 or_32bit.v create mode 100644 xor_32bit.t.v create mode 100644 xor_32bit.v diff --git a/or_32bit.t.v b/or_32bit.t.v new file mode 100644 index 0000000..5371849 --- /dev/null +++ b/or_32bit.t.v @@ -0,0 +1,36 @@ +`timescale 1 ns / 1 ps +`include "or_32bit.v" + +module test32bitor(); + reg[31:0] a; + reg[31:0] b; + wire[31:0] ans; + + or_32bit or32(ans, a[31:0], b[31:0]); + + initial begin + // 00000000000000000000000000000000 00000000000000000000000000000000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000001 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000010 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000000 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 11000000000000000000000000000000 10000000000000000000000000000001 + a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 10000000000000000000000000000000 11000000000000000000000000000001 + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + end +endmodule \ No newline at end of file diff --git a/or_32bit.v b/or_32bit.v new file mode 100644 index 0000000..83a217b --- /dev/null +++ b/or_32bit.v @@ -0,0 +1,38 @@ +module or_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + or bit0(out[0], a[0], b[0]); + or bit1(out[1], a[1], b[1]); + or bit2(out[2], a[2], b[2]); + or bit3(out[3], a[3], b[3]); + or bit4(out[4], a[4], b[4]); + or bit5(out[5], a[5], b[5]); + or bit6(out[6], a[6], b[6]); + or bit7(out[7], a[7], b[7]); + or bit8(out[8], a[8], b[8]); + or bit9(out[9], a[9], b[9]); + or bit10(out[10], a[10], b[10]); + or bit11(out[11], a[11], b[11]); + or bit12(out[12], a[12], b[12]); + or bit13(out[13], a[13], b[13]); + or bit14(out[14], a[14], b[14]); + or bit15(out[15], a[15], b[15]); + or bit16(out[16], a[16], b[16]); + or bit17(out[17], a[17], b[17]); + or bit18(out[18], a[18], b[18]); + or bit19(out[19], a[19], b[19]); + or bit20(out[20], a[20], b[20]); + or bit21(out[21], a[21], b[21]); + or bit22(out[22], a[22], b[22]); + or bit23(out[23], a[23], b[23]); + or bit24(out[24], a[24], b[24]); + or bit25(out[25], a[25], b[25]); + or bit26(out[26], a[26], b[26]); + or bit27(out[27], a[27], b[27]); + or bit28(out[28], a[28], b[28]); + or bit29(out[29], a[29], b[29]); + or bit30(out[30], a[30], b[30]); + or bit31(out[31], a[31], b[31]); +endmodule \ No newline at end of file diff --git a/xor_32bit.t.v b/xor_32bit.t.v new file mode 100644 index 0000000..bbd0725 --- /dev/null +++ b/xor_32bit.t.v @@ -0,0 +1,36 @@ +`timescale 1 ns / 1 ps +`include "xor_32bit.v" + +module test32bitxor(); + reg[31:0] a; + reg[31:0] b; + wire[31:0] ans; + + xor_32bit xor32(ans, a[31:0], b[31:0]); + + initial begin + // 00000000000000000000000000000000 00000000000000000000000000000000 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000001 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000010 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 00000000000000000000000000000000 00000000000000000000000000000001 + a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 11000000000000000000000000000000 10000000000000000000000000000001 + a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + // 10000000000000000000000000000000 11000000000000000000000000000001 + a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + end +endmodule \ No newline at end of file diff --git a/xor_32bit.v b/xor_32bit.v new file mode 100644 index 0000000..65db6b1 --- /dev/null +++ b/xor_32bit.v @@ -0,0 +1,38 @@ +module xor_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + xor bit0(out[0], a[0], b[0]); + xor bit1(out[1], a[1], b[1]); + xor bit2(out[2], a[2], b[2]); + xor bit3(out[3], a[3], b[3]); + xor bit4(out[4], a[4], b[4]); + xor bit5(out[5], a[5], b[5]); + xor bit6(out[6], a[6], b[6]); + xor bit7(out[7], a[7], b[7]); + xor bit8(out[8], a[8], b[8]); + xor bit9(out[9], a[9], b[9]); + xor bit10(out[10], a[10], b[10]); + xor bit11(out[11], a[11], b[11]); + xor bit12(out[12], a[12], b[12]); + xor bit13(out[13], a[13], b[13]); + xor bit14(out[14], a[14], b[14]); + xor bit15(out[15], a[15], b[15]); + xor bit16(out[16], a[16], b[16]); + xor bit17(out[17], a[17], b[17]); + xor bit18(out[18], a[18], b[18]); + xor bit19(out[19], a[19], b[19]); + xor bit20(out[20], a[20], b[20]); + xor bit21(out[21], a[21], b[21]); + xor bit22(out[22], a[22], b[22]); + xor bit23(out[23], a[23], b[23]); + xor bit24(out[24], a[24], b[24]); + xor bit25(out[25], a[25], b[25]); + xor bit26(out[26], a[26], b[26]); + xor bit27(out[27], a[27], b[27]); + xor bit28(out[28], a[28], b[28]); + xor bit29(out[29], a[29], b[29]); + xor bit30(out[30], a[30], b[30]); + xor bit31(out[31], a[31], b[31]); +endmodule From 25ef21ba93adad1b88b3d6b9123005252c534d45 Mon Sep 17 00:00:00 2001 From: Kimber Date: Tue, 10 Oct 2017 21:56:27 -0400 Subject: [PATCH 11/38] More ALU32 bit --- ALU32bit.v | 48 +- testAddSub | 3387 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 3408 insertions(+), 27 deletions(-) create mode 100755 testAddSub diff --git a/ALU32bit.v b/ALU32bit.v index 9226ede..6594850 100644 --- a/ALU32bit.v +++ b/ALU32bit.v @@ -8,7 +8,7 @@ module ALUcontrolLUT //Ben Hill's code output reg [31:0]controlsignal, //final 32-bit output output cout, //addsub only output flag, //addsub only - output [31:0]finalsignal, + output reg[31:0] finalsignal, input [2:0]ALUcommand, input [31:0]a, input [31:0]b, @@ -19,34 +19,28 @@ module ALUcontrolLUT //Ben Hill's code input [31:0]orin ); -adder_subtracter addsub0([31:0]addsub,cout,flag,[31:0]a,[31:0]b,[2:0]ALUcommand); -full_slt_32bit slt0=([31:0]slt,[31:0]a,[31:0]b); + +adder_subtracter addsub0(addsub[31:0],cout,flag,a[31:0],b[31:0],ALUcommand[2:0]); +full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); always @(ALUcommand) begin - case (ALUcommand==[0,0,0]) - controlsignal==addsub; - endcase - case (ALUcommand==[0,0,1]) - controlsignal==addsub; - endcase - case (ALUcommand==[0,1,0]) - controlsignal==xor; - endcase - case (ALUcommand==[0,1,1]) - controlsignal==slt; - endcase - case (ALUcommand==[1,0,0]) - controlsignal==and; - endcase - case (ALUcommand==[1,0,1]) - controlsignal==nand; - endcase - case (ALUcommand==[1,1,0]) - controlsignal==nor; - endcase - case (ALUcommand==[1,0,0]) - controlsignal==or; - endcase + if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) + finalsignal[31:0]=addsub[31:0]; + if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) + finalsignal[31:0]=xorin[31:0]; + if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==0) + finalsignal[31:0]=xorin[31:0]; + if(ALUcommand[0]==1 && ALUcommand[1]==1 && ALUcommand[2]==0) + finalsignal[31:0]=slt[31:0]; + if(ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==1) + finalsignal[31:0]=andin[31:0]; + if(ALUcommand[0]==1 && ALUcommand[1]==0 && ALUcommand[2]==1) + finalsignal[31:0]=nandin[31:0]; + if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==1) + finalsignal[31:0]=norin[31:0]; + else + finalsignal[31:0]=orin[31:0]; + end endmodule diff --git a/testAddSub b/testAddSub new file mode 100755 index 0000000..835ef91 --- /dev/null +++ b/testAddSub @@ -0,0 +1,3387 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2092990 .scope module, "behavioralFullAdder" "behavioralFullAdder" 2 3; + .timescale -9 -12; +v0x20becb0_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x21f68e0_0 .net *"_s11", 1 0, L_0x221fd60; 1 drivers +v0x21f6980_0 .net *"_s13", 1 0, L_0x221feb0; 1 drivers +v0x21f6a20_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x21f6ad0_0 .net *"_s17", 1 0, L_0x2220020; 1 drivers +v0x21f6b70_0 .net *"_s3", 1 0, L_0x221fab0; 1 drivers +v0x21f6c50_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x21f6cf0_0 .net *"_s7", 1 0, L_0x221fbf0; 1 drivers +v0x21f6de0_0 .net "a", 0 0, C4; 0 drivers +v0x21f6e80_0 .net "b", 0 0, C4; 0 drivers +v0x21f6f80_0 .net "carryin", 0 0, C4; 0 drivers +v0x21f7020_0 .net "carryout", 0 0, L_0x221f970; 1 drivers +v0x21f7130_0 .net "sum", 0 0, L_0x221fa10; 1 drivers +L_0x221f970 .part L_0x2220020, 1, 1; +L_0x221fa10 .part L_0x2220020, 0, 1; +L_0x221fab0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x221fbf0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x221fd60 .arith/sum 2, L_0x221fab0, L_0x221fbf0; +L_0x221feb0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x2220020 .arith/sum 2, L_0x221fd60, L_0x221feb0; +S_0x21afb70 .scope module, "test32bitAdder" "test32bitAdder" 3 6; + .timescale -9 -12; +v0x221f1f0_0 .var "a", 31 0; +RS_0x7f8758e34ca8/0/0 .resolv tri, L_0x22355f0, L_0x223a700, L_0x223f6a0, L_0x2244a50; +RS_0x7f8758e34ca8/0/4 .resolv tri, L_0x2249f40, L_0x224f430, L_0x2254950, L_0x2259eb0; +RS_0x7f8758e34ca8 .resolv tri, RS_0x7f8758e34ca8/0/0, RS_0x7f8758e34ca8/0/4, C4, C4; +v0x221f2a0_0 .net8 "ans", 31 0, RS_0x7f8758e34ca8; 8 drivers +v0x221f6f0_0 .var "b", 31 0; +v0x221f770_0 .var "carryin", 2 0; +v0x221f7f0_0 .net "carryout", 0 0, L_0x2258230; 1 drivers +RS_0x7f8758e34078/0/0 .resolv tri, L_0x222bef0, L_0x22253f0, L_0x222bd80, L_0x222a540; +RS_0x7f8758e34078/0/4 .resolv tri, L_0x2225520, L_0x222cdb0, L_0x222d0b0, L_0x222d210; +RS_0x7f8758e34078/0/8 .resolv tri, L_0x222d400, L_0x222d5f0, L_0x222d830, L_0x222da20; +RS_0x7f8758e34078/0/12 .resolv tri, L_0x222de80, L_0x222e020, L_0x222e110, L_0x222db10; +RS_0x7f8758e34078/0/16 .resolv tri, L_0x222e300, L_0x222e790, L_0x222ec20, L_0x222ee10; +RS_0x7f8758e34078/0/20 .resolv tri, L_0x222e8d0, L_0x222ef10, L_0x222f100, L_0x222f2f0; +RS_0x7f8758e34078/0/24 .resolv tri, L_0x222f7b0, L_0x222fcf0, L_0x222f480, L_0x222fa10; +RS_0x7f8758e34078/0/28 .resolv tri, L_0x222fc00, L_0x222fe90, L_0x222ff30, L_0x22303d0; +RS_0x7f8758e34078/1/0 .resolv tri, RS_0x7f8758e34078/0/0, RS_0x7f8758e34078/0/4, RS_0x7f8758e34078/0/8, RS_0x7f8758e34078/0/12; +RS_0x7f8758e34078/1/4 .resolv tri, RS_0x7f8758e34078/0/16, RS_0x7f8758e34078/0/20, RS_0x7f8758e34078/0/24, RS_0x7f8758e34078/0/28; +RS_0x7f8758e34078 .resolv tri, RS_0x7f8758e34078/1/0, RS_0x7f8758e34078/1/4, C4, C4; +v0x221f870_0 .net8 "finalB", 31 0, RS_0x7f8758e34078; 32 drivers +v0x221f8f0_0 .net "overflow", 0 0, L_0x2259d70; 1 drivers +S_0x21f71d0 .scope module, "adder0" "adder_subtracter" 3 14, 4 176, S_0x21afb70; + .timescale -9 -12; +L_0x221bf70 .functor NOT 1, L_0x22202a0, C4<0>, C4<0>, C4<0>; +L_0x2220430 .functor NOT 1, L_0x22204e0, C4<0>, C4<0>, C4<0>; +L_0x2220790 .functor NOT 1, L_0x22207f0, C4<0>, C4<0>, C4<0>; +L_0x2220930 .functor NOT 1, L_0x22209e0, C4<0>, C4<0>, C4<0>; +L_0x2220bc0 .functor NOT 1, L_0x2220c70, C4<0>, C4<0>, C4<0>; +L_0x2220e60 .functor NOT 1, L_0x2220ec0, C4<0>, C4<0>, C4<0>; +L_0x2220d60 .functor NOT 1, L_0x2221270, C4<0>, C4<0>, C4<0>; +L_0x2221430 .functor NOT 1, L_0x2221530, C4<0>, C4<0>, C4<0>; +L_0x2221750 .functor NOT 1, L_0x2221800, C4<0>, C4<0>, C4<0>; +L_0x2221620 .functor NOT 1, L_0x2221ae0, C4<0>, C4<0>, C4<0>; +L_0x2221c30 .functor NOT 1, L_0x2221ce0, C4<0>, C4<0>, C4<0>; +L_0x2221e90 .functor NOT 1, L_0x2221f40, C4<0>, C4<0>, C4<0>; +L_0x2221a80 .functor NOT 1, L_0x2222150, C4<0>, C4<0>, C4<0>; +L_0x2222320 .functor NOT 1, L_0x22223d0, C4<0>, C4<0>, C4<0>; +L_0x2221160 .functor NOT 1, L_0x22228e0, C4<0>, C4<0>, C4<0>; +L_0x2222a20 .functor NOT 1, L_0x2222b60, C4<0>, C4<0>, C4<0>; +L_0x2222cf0 .functor NOT 1, L_0x2222da0, C4<0>, C4<0>, C4<0>; +L_0x2221050 .functor NOT 1, L_0x22230a0, C4<0>, C4<0>, C4<0>; +L_0x2222f30 .functor NOT 1, L_0x22232c0, C4<0>, C4<0>, C4<0>; +L_0x22231e0 .functor NOT 1, L_0x2223000, C4<0>, C4<0>, C4<0>; +L_0x2223450 .functor NOT 1, L_0x22237e0, C4<0>, C4<0>, C4<0>; +L_0x22236e0 .functor NOT 1, L_0x2223540, C4<0>, C4<0>, C4<0>; +L_0x2223970 .functor NOT 1, L_0x2223cb0, C4<0>, C4<0>, C4<0>; +L_0x2223be0 .functor NOT 1, L_0x2223a30, C4<0>, C4<0>, C4<0>; +L_0x2223e40 .functor NOT 1, L_0x22241d0, C4<0>, C4<0>, C4<0>; +L_0x22240e0 .functor NOT 1, L_0x2223ef0, C4<0>, C4<0>, C4<0>; +L_0x2224360 .functor NOT 1, L_0x22246f0, C4<0>, C4<0>, C4<0>; +L_0x22245e0 .functor NOT 1, L_0x2224460, C4<0>, C4<0>, C4<0>; +L_0x2224830 .functor NOT 1, L_0x2224c10, C4<0>, C4<0>, C4<0>; +L_0x2224ae0 .functor NOT 1, L_0x2224930, C4<0>, C4<0>, C4<0>; +L_0x221cde0 .functor NOT 1, L_0x2224d50, C4<0>, C4<0>, C4<0>; +L_0x221fe00 .functor NOT 1, L_0x2224e90, C4<0>, C4<0>, C4<0>; +v0x221b3c0_0 .net "_", 0 0, L_0x2235460; 1 drivers +v0x221ba00_0 .net "_1", 0 0, L_0x223a5b0; 1 drivers +v0x221ba80_0 .net "_2", 0 0, L_0x223f510; 1 drivers +v0x221bb00_0 .net "_3", 0 0, L_0x2244900; 1 drivers +v0x221bb80_0 .net "_4", 0 0, L_0x2249db0; 1 drivers +v0x221bc30_0 .net "_5", 0 0, L_0x224f2a0; 1 drivers +v0x221bcf0_0 .net "_6", 0 0, L_0x22547c0; 1 drivers +v0x221bda0_0 .net *"_s0", 0 0, L_0x221bf70; 1 drivers +v0x221be70_0 .net *"_s100", 0 0, L_0x22240e0; 1 drivers +v0x221bef0_0 .net *"_s103", 0 0, L_0x2223ef0; 1 drivers +v0x221bfd0_0 .net *"_s104", 0 0, L_0x2224360; 1 drivers +v0x221c050_0 .net *"_s107", 0 0, L_0x22246f0; 1 drivers +v0x221c140_0 .net *"_s108", 0 0, L_0x22245e0; 1 drivers +v0x221c1c0_0 .net *"_s11", 0 0, L_0x22207f0; 1 drivers +v0x221c2c0_0 .net *"_s111", 0 0, L_0x2224460; 1 drivers +v0x221c360_0 .net *"_s112", 0 0, L_0x2224830; 1 drivers +v0x221c240_0 .net *"_s115", 0 0, L_0x2224c10; 1 drivers +v0x221c4b0_0 .net *"_s116", 0 0, L_0x2224ae0; 1 drivers +v0x221c5d0_0 .net *"_s119", 0 0, L_0x2224930; 1 drivers +v0x221c650_0 .net *"_s12", 0 0, L_0x2220930; 1 drivers +v0x221c530_0 .net *"_s120", 0 0, L_0x221cde0; 1 drivers +v0x221c780_0 .net *"_s123", 0 0, L_0x2224d50; 1 drivers +v0x221c6d0_0 .net *"_s124", 0 0, L_0x221fe00; 1 drivers +v0x221c8c0_0 .net *"_s127", 0 0, L_0x2224e90; 1 drivers +v0x221c820_0 .net *"_s15", 0 0, L_0x22209e0; 1 drivers +v0x221ca10_0 .net *"_s16", 0 0, L_0x2220bc0; 1 drivers +v0x221c960_0 .net *"_s19", 0 0, L_0x2220c70; 1 drivers +v0x221cb70_0 .net *"_s20", 0 0, L_0x2220e60; 1 drivers +v0x221cab0_0 .net *"_s23", 0 0, L_0x2220ec0; 1 drivers +v0x221cce0_0 .net *"_s24", 0 0, L_0x2220d60; 1 drivers +v0x221cbf0_0 .net *"_s27", 0 0, L_0x2221270; 1 drivers +v0x221ce60_0 .net *"_s28", 0 0, L_0x2221430; 1 drivers +v0x221cd60_0 .net *"_s3", 0 0, L_0x22202a0; 1 drivers +v0x221cff0_0 .net *"_s31", 0 0, L_0x2221530; 1 drivers +v0x221cee0_0 .net *"_s32", 0 0, L_0x2221750; 1 drivers +v0x221d190_0 .net *"_s35", 0 0, L_0x2221800; 1 drivers +v0x221d070_0 .net *"_s36", 0 0, L_0x2221620; 1 drivers +v0x221d110_0 .net *"_s39", 0 0, L_0x2221ae0; 1 drivers +v0x221d350_0 .net *"_s4", 0 0, L_0x2220430; 1 drivers +v0x221d3d0_0 .net *"_s40", 0 0, L_0x2221c30; 1 drivers +v0x221d210_0 .net *"_s43", 0 0, L_0x2221ce0; 1 drivers +v0x221d2b0_0 .net *"_s44", 0 0, L_0x2221e90; 1 drivers +v0x221d5b0_0 .net *"_s47", 0 0, L_0x2221f40; 1 drivers +v0x221d630_0 .net *"_s48", 0 0, L_0x2221a80; 1 drivers +v0x221d450_0 .net *"_s51", 0 0, L_0x2222150; 1 drivers +v0x221d4f0_0 .net *"_s52", 0 0, L_0x2222320; 1 drivers +v0x221d830_0 .net *"_s55", 0 0, L_0x22223d0; 1 drivers +v0x221d8b0_0 .net *"_s56", 0 0, L_0x2221160; 1 drivers +v0x221d6d0_0 .net *"_s59", 0 0, L_0x22228e0; 1 drivers +v0x221d770_0 .net *"_s60", 0 0, L_0x2222a20; 1 drivers +v0x221dad0_0 .net *"_s63", 0 0, L_0x2222b60; 1 drivers +v0x221db50_0 .net *"_s64", 0 0, L_0x2222cf0; 1 drivers +v0x221d950_0 .net *"_s67", 0 0, L_0x2222da0; 1 drivers +v0x221d9f0_0 .net *"_s68", 0 0, L_0x2221050; 1 drivers +v0x221dd90_0 .net *"_s7", 0 0, L_0x22204e0; 1 drivers +v0x221de10_0 .net *"_s71", 0 0, L_0x22230a0; 1 drivers +v0x221dbd0_0 .net *"_s72", 0 0, L_0x2222f30; 1 drivers +v0x221dc70_0 .net *"_s75", 0 0, L_0x22232c0; 1 drivers +v0x221dd10_0 .net *"_s76", 0 0, L_0x22231e0; 1 drivers +v0x221e090_0 .net *"_s79", 0 0, L_0x2223000; 1 drivers +v0x221deb0_0 .net *"_s8", 0 0, L_0x2220790; 1 drivers +v0x221df50_0 .net *"_s80", 0 0, L_0x2223450; 1 drivers +v0x221dff0_0 .net *"_s83", 0 0, L_0x22237e0; 1 drivers +v0x221e330_0 .net *"_s84", 0 0, L_0x22236e0; 1 drivers +v0x221e130_0 .net *"_s87", 0 0, L_0x2223540; 1 drivers +v0x221e1d0_0 .net *"_s88", 0 0, L_0x2223970; 1 drivers +v0x221e270_0 .net *"_s91", 0 0, L_0x2223cb0; 1 drivers +v0x221e5d0_0 .net *"_s92", 0 0, L_0x2223be0; 1 drivers +v0x221e3d0_0 .net *"_s95", 0 0, L_0x2223a30; 1 drivers +v0x221e470_0 .net *"_s96", 0 0, L_0x2223e40; 1 drivers +v0x221e510_0 .net *"_s99", 0 0, L_0x22241d0; 1 drivers +v0x221e890_0 .alias "ans", 31 0, v0x221f2a0_0; +v0x221e650_0 .alias "carryout", 0 0, v0x221f7f0_0; +v0x221e6d0_0 .net "command", 2 0, v0x221f770_0; 1 drivers +v0x221e770_0 .net "cout0", 0 0, L_0x22339b0; 1 drivers +v0x221eb70_0 .net "cout1", 0 0, L_0x2238b00; 1 drivers +v0x221e9a0_0 .net "cout2", 0 0, L_0x223db20; 1 drivers +v0x221eab0_0 .net "cout3", 0 0, L_0x2242db0; 1 drivers +v0x221ef00_0 .net "cout4", 0 0, L_0x2248260; 1 drivers +v0x221f010_0 .net "cout5", 0 0, L_0x224d750; 1 drivers +v0x221ec80_0 .net "cout6", 0 0, L_0x2252c70; 1 drivers +v0x221ed90_0 .alias "finalB", 31 0, v0x221f870_0; +RS_0x7f8758e33a18/0/0 .resolv tri, L_0x2220160, L_0x2220390, L_0x2220660, L_0x2220890; +RS_0x7f8758e33a18/0/4 .resolv tri, L_0x2220b20, L_0x2220dc0, L_0x22210c0, L_0x2221390; +RS_0x7f8758e33a18/0/8 .resolv tri, L_0x22216b0, L_0x2221990, L_0x22218f0, L_0x2221b80; +RS_0x7f8758e33a18/0/12 .resolv tri, L_0x2221dd0, L_0x2222030, L_0x2222240, L_0x2222980; +RS_0x7f8758e33a18/0/16 .resolv tri, L_0x2222c50, L_0x2220fb0, L_0x2222e90, L_0x2223140; +RS_0x7f8758e33a18/0/20 .resolv tri, L_0x22233b0, L_0x2223640, L_0x22238d0, L_0x2223b40; +RS_0x7f8758e33a18/0/24 .resolv tri, L_0x2223da0, L_0x2224040, L_0x22242c0, L_0x2224540; +RS_0x7f8758e33a18/0/28 .resolv tri, L_0x2224790, L_0x2224a40, L_0x2224cb0, L_0x22226c0; +RS_0x7f8758e33a18/1/0 .resolv tri, RS_0x7f8758e33a18/0/0, RS_0x7f8758e33a18/0/4, RS_0x7f8758e33a18/0/8, RS_0x7f8758e33a18/0/12; +RS_0x7f8758e33a18/1/4 .resolv tri, RS_0x7f8758e33a18/0/16, RS_0x7f8758e33a18/0/20, RS_0x7f8758e33a18/0/24, RS_0x7f8758e33a18/0/28; +RS_0x7f8758e33a18 .resolv tri, RS_0x7f8758e33a18/1/0, RS_0x7f8758e33a18/1/4, C4, C4; +v0x221f330_0 .net8 "invertedB", 31 0, RS_0x7f8758e33a18; 32 drivers +v0x221f3b0_0 .net "opA", 31 0, v0x221f1f0_0; 1 drivers +v0x221f090_0 .net "opB", 31 0, v0x221f6f0_0; 1 drivers +v0x221f140_0 .alias "overflow", 0 0, v0x221f8f0_0; +L_0x2220160 .part/pv L_0x221bf70, 0, 1, 32; +L_0x22202a0 .part v0x221f6f0_0, 0, 1; +L_0x2220390 .part/pv L_0x2220430, 1, 1, 32; +L_0x22204e0 .part v0x221f6f0_0, 1, 1; +L_0x2220660 .part/pv L_0x2220790, 2, 1, 32; +L_0x22207f0 .part v0x221f6f0_0, 2, 1; +L_0x2220890 .part/pv L_0x2220930, 3, 1, 32; +L_0x22209e0 .part v0x221f6f0_0, 3, 1; +L_0x2220b20 .part/pv L_0x2220bc0, 4, 1, 32; +L_0x2220c70 .part v0x221f6f0_0, 4, 1; +L_0x2220dc0 .part/pv L_0x2220e60, 5, 1, 32; +L_0x2220ec0 .part v0x221f6f0_0, 5, 1; +L_0x22210c0 .part/pv L_0x2220d60, 6, 1, 32; +L_0x2221270 .part v0x221f6f0_0, 6, 1; +L_0x2221390 .part/pv L_0x2221430, 7, 1, 32; +L_0x2221530 .part v0x221f6f0_0, 7, 1; +L_0x22216b0 .part/pv L_0x2221750, 8, 1, 32; +L_0x2221800 .part v0x221f6f0_0, 8, 1; +L_0x2221990 .part/pv L_0x2221620, 9, 1, 32; +L_0x2221ae0 .part v0x221f6f0_0, 9, 1; +L_0x22218f0 .part/pv L_0x2221c30, 10, 1, 32; +L_0x2221ce0 .part v0x221f6f0_0, 10, 1; +L_0x2221b80 .part/pv L_0x2221e90, 11, 1, 32; +L_0x2221f40 .part v0x221f6f0_0, 11, 1; +L_0x2221dd0 .part/pv L_0x2221a80, 12, 1, 32; +L_0x2222150 .part v0x221f6f0_0, 12, 1; +L_0x2222030 .part/pv L_0x2222320, 13, 1, 32; +L_0x22223d0 .part v0x221f6f0_0, 13, 1; +L_0x2222240 .part/pv L_0x2221160, 14, 1, 32; +L_0x22228e0 .part v0x221f6f0_0, 14, 1; +L_0x2222980 .part/pv L_0x2222a20, 15, 1, 32; +L_0x2222b60 .part v0x221f6f0_0, 15, 1; +L_0x2222c50 .part/pv L_0x2222cf0, 16, 1, 32; +L_0x2222da0 .part v0x221f6f0_0, 16, 1; +L_0x2220fb0 .part/pv L_0x2221050, 17, 1, 32; +L_0x22230a0 .part v0x221f6f0_0, 17, 1; +L_0x2222e90 .part/pv L_0x2222f30, 18, 1, 32; +L_0x22232c0 .part v0x221f6f0_0, 18, 1; +L_0x2223140 .part/pv L_0x22231e0, 19, 1, 32; +L_0x2223000 .part v0x221f6f0_0, 19, 1; +L_0x22233b0 .part/pv L_0x2223450, 20, 1, 32; +L_0x22237e0 .part v0x221f6f0_0, 20, 1; +L_0x2223640 .part/pv L_0x22236e0, 21, 1, 32; +L_0x2223540 .part v0x221f6f0_0, 21, 1; +L_0x22238d0 .part/pv L_0x2223970, 22, 1, 32; +L_0x2223cb0 .part v0x221f6f0_0, 22, 1; +L_0x2223b40 .part/pv L_0x2223be0, 23, 1, 32; +L_0x2223a30 .part v0x221f6f0_0, 23, 1; +L_0x2223da0 .part/pv L_0x2223e40, 24, 1, 32; +L_0x22241d0 .part v0x221f6f0_0, 24, 1; +L_0x2224040 .part/pv L_0x22240e0, 25, 1, 32; +L_0x2223ef0 .part v0x221f6f0_0, 25, 1; +L_0x22242c0 .part/pv L_0x2224360, 26, 1, 32; +L_0x22246f0 .part v0x221f6f0_0, 26, 1; +L_0x2224540 .part/pv L_0x22245e0, 27, 1, 32; +L_0x2224460 .part v0x221f6f0_0, 27, 1; +L_0x2224790 .part/pv L_0x2224830, 28, 1, 32; +L_0x2224c10 .part v0x221f6f0_0, 28, 1; +L_0x2224a40 .part/pv L_0x2224ae0, 29, 1, 32; +L_0x2224930 .part v0x221f6f0_0, 29, 1; +L_0x2224cb0 .part/pv L_0x221cde0, 30, 1, 32; +L_0x2224d50 .part v0x221f6f0_0, 30, 1; +L_0x22226c0 .part/pv L_0x221fe00, 31, 1, 32; +L_0x2224e90 .part v0x221f6f0_0, 31, 1; +L_0x22305c0 .part v0x221f770_0, 0, 1; +RS_0x7f8758e32188 .resolv tri, L_0x22315c0, L_0x22323b0, L_0x2233410, L_0x2234310; +L_0x22355f0 .part/pv RS_0x7f8758e32188, 0, 4, 32; +L_0x22257b0 .part v0x221f1f0_0, 0, 4; +L_0x22258a0 .part RS_0x7f8758e34078, 0, 4; +L_0x22358c0 .part v0x221f770_0, 0, 1; +RS_0x7f8758e313a8 .resolv tri, L_0x2236620, L_0x2237550, L_0x2238560, L_0x2239460; +L_0x223a700 .part/pv RS_0x7f8758e313a8, 4, 4, 32; +L_0x2235690 .part v0x221f1f0_0, 4, 4; +L_0x2235730 .part RS_0x7f8758e34078, 4, 4; +RS_0x7f8758e305c8 .resolv tri, L_0x223b5f0, L_0x223c520, L_0x223d580, L_0x223e480; +L_0x223f6a0 .part/pv RS_0x7f8758e305c8, 8, 4, 32; +L_0x223f7d0 .part v0x221f1f0_0, 8, 4; +L_0x223a7a0 .part RS_0x7f8758e34078, 8, 4; +RS_0x7f8758e2f7e8 .resolv tri, L_0x2240600, L_0x2241610, L_0x22427d0, L_0x2243830; +L_0x2244a50 .part/pv RS_0x7f8758e2f7e8, 12, 4, 32; +L_0x223f900 .part v0x221f1f0_0, 12, 4; +L_0x223f9a0 .part RS_0x7f8758e34078, 12, 4; +RS_0x7f8758e2ea08 .resolv tri, L_0x2245a50, L_0x2246ae0, L_0x2247c80, L_0x2248ce0; +L_0x2249f40 .part/pv RS_0x7f8758e2ea08, 16, 4, 32; +L_0x2249fe0 .part v0x221f1f0_0, 16, 4; +L_0x2244af0 .part RS_0x7f8758e34078, 16, 4; +RS_0x7f8758e2dc28 .resolv tri, L_0x224af40, L_0x224bfd0, L_0x224d170, L_0x224e1d0; +L_0x224f430 .part/pv RS_0x7f8758e2dc28, 20, 4, 32; +L_0x224a080 .part v0x221f1f0_0, 20, 4; +L_0x224a120 .part RS_0x7f8758e34078, 20, 4; +RS_0x7f8758e2ce48 .resolv tri, L_0x2250440, L_0x22514d0, L_0x2252670, L_0x22536f0; +L_0x2254950 .part/pv RS_0x7f8758e2ce48, 24, 4, 32; +L_0x2254b00 .part v0x221f1f0_0, 24, 4; +L_0x224f4d0 .part RS_0x7f8758e34078, 24, 4; +RS_0x7f8758e2c068 .resolv tri, L_0x2255a50, L_0x2256ab0, L_0x2257c50, L_0x2258cf0; +L_0x2259eb0 .part/pv RS_0x7f8758e2c068, 28, 4, 32; +L_0x2254cb0 .part v0x221f1f0_0, 28, 4; +L_0x2254d50 .part RS_0x7f8758e34078, 28, 4; +S_0x2214bd0 .scope module, "addsubmux" "mux" 4 237, 4 3, S_0x21f71d0; + .timescale -9 -12; +L_0x221c0d0 .functor NOT 1, L_0x22305c0, C4<0>, C4<0>, C4<0>; +L_0x2222870 .functor AND 1, L_0x22224c0, L_0x221c0d0, C4<1>, C4<1>; +L_0x22225b0 .functor AND 1, L_0x2222610, L_0x221c0d0, C4<1>, C4<1>; +L_0x22259c0 .functor AND 1, L_0x2225ab0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2225b50 .functor AND 1, L_0x2225bb0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2225ca0 .functor AND 1, L_0x2225d00, L_0x221c0d0, C4<1>, C4<1>; +L_0x2225df0 .functor AND 1, L_0x2225e50, L_0x221c0d0, C4<1>, C4<1>; +L_0x2225f40 .functor AND 1, L_0x22260b0, L_0x221c0d0, C4<1>, C4<1>; +L_0x22261a0 .functor AND 1, L_0x2226200, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226340 .functor AND 1, L_0x22263a0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226490 .functor AND 1, L_0x22264f0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226640 .functor AND 1, L_0x2226710, L_0x221c0d0, C4<1>, C4<1>; +L_0x2225a20 .functor AND 1, L_0x22267b0, L_0x221c0d0, C4<1>, C4<1>; +L_0x22265e0 .functor AND 1, L_0x2226990, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226a80 .functor AND 1, L_0x2226ae0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226c50 .functor AND 1, L_0x2226ec0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226f60 .functor AND 1, L_0x2226fc0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227140 .functor AND 1, L_0x2227240, L_0x221c0d0, C4<1>, C4<1>; +L_0x22272e0 .functor AND 1, L_0x2227340, L_0x221c0d0, C4<1>, C4<1>; +L_0x22270b0 .functor AND 1, L_0x22271a0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227600 .functor AND 1, L_0x2227690, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227430 .functor AND 1, L_0x2227500, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227940 .functor AND 1, L_0x22279d0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227780 .functor AND 1, L_0x2227810, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227ca0 .functor AND 1, L_0x2227d00, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227ac0 .functor AND 1, L_0x2227b50, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227fa0 .functor AND 1, L_0x2228030, L_0x221c0d0, C4<1>, C4<1>; +L_0x2227df0 .functor AND 1, L_0x2227e80, L_0x221c0d0, C4<1>, C4<1>; +L_0x22282f0 .functor AND 1, L_0x2228350, L_0x221c0d0, C4<1>, C4<1>; +L_0x2228120 .functor AND 1, L_0x22281b0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2228630 .functor AND 1, L_0x2228690, L_0x221c0d0, C4<1>, C4<1>; +L_0x2217b80 .functor AND 1, L_0x22268a0, L_0x221c0d0, C4<1>, C4<1>; +L_0x22266a0 .functor AND 1, L_0x2226dc0, L_0x221c0d0, C4<1>, C4<1>; +L_0x2226e60 .functor AND 1, L_0x2228560, L_0x22305c0, C4<1>, C4<1>; +L_0x2226cb0 .functor AND 1, L_0x2226d10, L_0x22305c0, C4<1>, C4<1>; +L_0x2224f90 .functor AND 1, L_0x2228440, L_0x22305c0, C4<1>, C4<1>; +L_0x2225340 .functor AND 1, L_0x22293a0, L_0x22305c0, C4<1>, C4<1>; +L_0x22250f0 .functor AND 1, L_0x2225150, L_0x22305c0, C4<1>, C4<1>; +L_0x2225240 .functor AND 1, L_0x22296b0, L_0x22305c0, C4<1>, C4<1>; +L_0x2229440 .functor AND 1, L_0x22294d0, L_0x22305c0, C4<1>, C4<1>; +L_0x22295c0 .functor AND 1, L_0x2224ff0, L_0x22305c0, C4<1>, C4<1>; +L_0x2229750 .functor AND 1, L_0x22297e0, L_0x22305c0, C4<1>, C4<1>; +L_0x22299f0 .functor AND 1, L_0x2229da0, L_0x22305c0, C4<1>, C4<1>; +L_0x2229ad0 .functor AND 1, L_0x2229b30, L_0x22305c0, C4<1>, C4<1>; +L_0x2229c20 .functor AND 1, L_0x2229c80, L_0x22305c0, C4<1>, C4<1>; +L_0x2229e40 .functor AND 1, L_0x2229ea0, L_0x22305c0, C4<1>, C4<1>; +L_0x2229f90 .functor AND 1, L_0x222a020, L_0x22305c0, C4<1>, C4<1>; +L_0x222a110 .functor AND 1, L_0x222a1a0, L_0x22305c0, C4<1>, C4<1>; +L_0x222a290 .functor AND 1, L_0x222a320, L_0x22305c0, C4<1>, C4<1>; +L_0x22298e0 .functor AND 1, L_0x222a790, L_0x22305c0, C4<1>, C4<1>; +L_0x222a880 .functor AND 1, L_0x222aab0, L_0x22305c0, C4<1>, C4<1>; +L_0x222a8e0 .functor AND 1, L_0x222a970, L_0x22305c0, C4<1>, C4<1>; +L_0x222ad40 .functor AND 1, L_0x222ada0, L_0x22305c0, C4<1>, C4<1>; +L_0x222aba0 .functor AND 1, L_0x222ac60, L_0x22305c0, C4<1>, C4<1>; +L_0x222b040 .functor AND 1, L_0x222b0a0, L_0x22305c0, C4<1>, C4<1>; +L_0x222ae40 .functor AND 1, L_0x222af00, L_0x22305c0, C4<1>, C4<1>; +L_0x222a3c0 .functor AND 1, L_0x222a450, L_0x22305c0, C4<1>, C4<1>; +L_0x222b190 .functor AND 1, L_0x222b220, L_0x22305c0, C4<1>, C4<1>; +L_0x222b310 .functor AND 1, L_0x222b370, L_0x22305c0, C4<1>, C4<1>; +L_0x222b460 .functor AND 1, L_0x222b6b0, L_0x22305c0, C4<1>, C4<1>; +L_0x222b7a0 .functor AND 1, L_0x222b830, L_0x22305c0, C4<1>, C4<1>; +L_0x222b8d0 .functor AND 1, L_0x222b960, L_0x22305c0, C4<1>, C4<1>; +L_0x222ba50 .functor AND 1, L_0x222b4c0, L_0x22305c0, C4<1>, C4<1>; +L_0x222b5b0 .functor AND 1, L_0x222bb00, L_0x22305c0, C4<1>, C4<1>; +L_0x222b640 .functor AND 1, L_0x222bbf0, L_0x22305c0, C4<1>, C4<1>; +L_0x222bfc0 .functor OR 1, L_0x2222870, L_0x2226e60, C4<0>, C4<0>; +L_0x2225740 .functor OR 1, L_0x22225b0, L_0x2226cb0, C4<0>, C4<0>; +L_0x222be20 .functor OR 1, L_0x22259c0, L_0x2224f90, C4<0>, C4<0>; +L_0x222a5e0 .functor OR 1, L_0x2225b50, L_0x2225340, C4<0>, C4<0>; +L_0x22255c0 .functor OR 1, L_0x2225ca0, L_0x22250f0, C4<0>, C4<0>; +L_0x222cf60 .functor OR 1, L_0x2225df0, L_0x2225240, C4<0>, C4<0>; +L_0x222d150 .functor OR 1, L_0x2225f40, L_0x2229440, C4<0>, C4<0>; +L_0x222d2b0 .functor OR 1, L_0x22261a0, L_0x22295c0, C4<0>, C4<0>; +L_0x222d4a0 .functor OR 1, L_0x2226340, L_0x2229750, C4<0>, C4<0>; +L_0x222d6e0 .functor OR 1, L_0x2226490, L_0x22299f0, C4<0>, C4<0>; +L_0x222d8d0 .functor OR 1, L_0x2226640, L_0x2229ad0, C4<0>, C4<0>; +L_0x222dd30 .functor OR 1, L_0x2225a20, L_0x2229c20, C4<0>, C4<0>; +L_0x222df20 .functor OR 1, L_0x22265e0, L_0x2229e40, C4<0>, C4<0>; +L_0x222ce50 .functor OR 1, L_0x2226a80, L_0x2229f90, C4<0>, C4<0>; +L_0x222e1b0 .functor OR 1, L_0x2226c50, L_0x222a110, C4<0>, C4<0>; +L_0x222dbb0 .functor OR 1, L_0x2226f60, L_0x222a290, C4<0>, C4<0>; +L_0x222e3a0 .functor OR 1, L_0x2227140, L_0x22298e0, C4<0>, C4<0>; +L_0x222ead0 .functor OR 1, L_0x22272e0, L_0x222a880, C4<0>, C4<0>; +L_0x222ecc0 .functor OR 1, L_0x22270b0, L_0x222a8e0, C4<0>, C4<0>; +L_0x222eeb0 .functor OR 1, L_0x2227600, L_0x222ad40, C4<0>, C4<0>; +L_0x222e970 .functor OR 1, L_0x2227430, L_0x222aba0, C4<0>, C4<0>; +L_0x222efb0 .functor OR 1, L_0x2227940, L_0x222b040, C4<0>, C4<0>; +L_0x222f1a0 .functor OR 1, L_0x2227780, L_0x222ae40, C4<0>, C4<0>; +L_0x222f660 .functor OR 1, L_0x2227ca0, L_0x222a3c0, C4<0>, C4<0>; +L_0x222f850 .functor OR 1, L_0x2227ac0, L_0x222b190, C4<0>, C4<0>; +L_0x222f9a0 .functor OR 1, L_0x2227fa0, L_0x222b310, C4<0>, C4<0>; +L_0x222f520 .functor OR 1, L_0x2227df0, L_0x222b460, C4<0>, C4<0>; +L_0x222fab0 .functor OR 1, L_0x22282f0, L_0x222b7a0, C4<0>, C4<0>; +L_0x222fd90 .functor OR 1, L_0x2228120, L_0x222b8d0, C4<0>, C4<0>; +L_0x222aea0 .functor OR 1, L_0x2228630, L_0x222ba50, C4<0>, C4<0>; +L_0x222a730 .functor OR 1, L_0x2217b80, L_0x222b5b0, C4<0>, C4<0>; +L_0x2230470 .functor OR 1, L_0x22266a0, L_0x222b640, C4<0>, C4<0>; +v0x2214cc0_0 .net *"_s1", 0 0, L_0x22224c0; 1 drivers +v0x2214d80_0 .net *"_s101", 0 0, L_0x222a970; 1 drivers +v0x2214e20_0 .net *"_s103", 0 0, L_0x222ada0; 1 drivers +v0x2214ec0_0 .net *"_s105", 0 0, L_0x222ac60; 1 drivers +v0x2214f40_0 .net *"_s107", 0 0, L_0x222b0a0; 1 drivers +v0x2214fe0_0 .net *"_s109", 0 0, L_0x222af00; 1 drivers +v0x2215080_0 .net *"_s11", 0 0, L_0x2225e50; 1 drivers +v0x2215120_0 .net *"_s111", 0 0, L_0x222a450; 1 drivers +v0x2215210_0 .net *"_s113", 0 0, L_0x222b220; 1 drivers +v0x22152b0_0 .net *"_s115", 0 0, L_0x222b370; 1 drivers +v0x2215350_0 .net *"_s117", 0 0, L_0x222b6b0; 1 drivers +v0x22153f0_0 .net *"_s119", 0 0, L_0x222b830; 1 drivers +v0x2215490_0 .net *"_s121", 0 0, L_0x222b960; 1 drivers +v0x2215530_0 .net *"_s123", 0 0, L_0x222b4c0; 1 drivers +v0x2215650_0 .net *"_s125", 0 0, L_0x222bb00; 1 drivers +v0x22156f0_0 .net *"_s127", 0 0, L_0x222bbf0; 1 drivers +v0x22155b0_0 .net *"_s128", 0 0, L_0x222bfc0; 1 drivers +v0x2215840_0 .net *"_s13", 0 0, L_0x22260b0; 1 drivers +v0x2215960_0 .net *"_s130", 0 0, L_0x2225740; 1 drivers +v0x22159e0_0 .net *"_s132", 0 0, L_0x222be20; 1 drivers +v0x22158c0_0 .net *"_s134", 0 0, L_0x222a5e0; 1 drivers +v0x2215b10_0 .net *"_s136", 0 0, L_0x22255c0; 1 drivers +v0x2215a60_0 .net *"_s138", 0 0, L_0x222cf60; 1 drivers +v0x2215c50_0 .net *"_s140", 0 0, L_0x222d150; 1 drivers +v0x2215bb0_0 .net *"_s142", 0 0, L_0x222d2b0; 1 drivers +v0x2215da0_0 .net *"_s144", 0 0, L_0x222d4a0; 1 drivers +v0x2215cf0_0 .net *"_s146", 0 0, L_0x222d6e0; 1 drivers +v0x2215f00_0 .net *"_s148", 0 0, L_0x222d8d0; 1 drivers +v0x2215e40_0 .net *"_s15", 0 0, L_0x2226200; 1 drivers +v0x2216070_0 .net *"_s150", 0 0, L_0x222dd30; 1 drivers +v0x2215f80_0 .net *"_s152", 0 0, L_0x222df20; 1 drivers +v0x22161f0_0 .net *"_s154", 0 0, L_0x222ce50; 1 drivers +v0x22160f0_0 .net *"_s156", 0 0, L_0x222e1b0; 1 drivers +v0x2216380_0 .net *"_s158", 0 0, L_0x222dbb0; 1 drivers +v0x2216270_0 .net *"_s160", 0 0, L_0x222e3a0; 1 drivers +v0x2216520_0 .net *"_s162", 0 0, L_0x222ead0; 1 drivers +v0x2216400_0 .net *"_s164", 0 0, L_0x222ecc0; 1 drivers +v0x22164a0_0 .net *"_s166", 0 0, L_0x222eeb0; 1 drivers +v0x22166e0_0 .net *"_s168", 0 0, L_0x222e970; 1 drivers +v0x2216760_0 .net *"_s17", 0 0, L_0x22263a0; 1 drivers +v0x22165a0_0 .net *"_s170", 0 0, L_0x222efb0; 1 drivers +v0x2216640_0 .net *"_s172", 0 0, L_0x222f1a0; 1 drivers +v0x2216940_0 .net *"_s174", 0 0, L_0x222f660; 1 drivers +v0x22169c0_0 .net *"_s176", 0 0, L_0x222f850; 1 drivers +v0x22167e0_0 .net *"_s178", 0 0, L_0x222f9a0; 1 drivers +v0x2216880_0 .net *"_s180", 0 0, L_0x222f520; 1 drivers +v0x2216bc0_0 .net *"_s182", 0 0, L_0x222fab0; 1 drivers +v0x2216c40_0 .net *"_s184", 0 0, L_0x222fd90; 1 drivers +v0x2216a60_0 .net *"_s186", 0 0, L_0x222aea0; 1 drivers +v0x2216b00_0 .net *"_s188", 0 0, L_0x222a730; 1 drivers +v0x2216e60_0 .net *"_s19", 0 0, L_0x22264f0; 1 drivers +v0x2216ee0_0 .net *"_s190", 0 0, L_0x2230470; 1 drivers +v0x2216cc0_0 .net *"_s21", 0 0, L_0x2226710; 1 drivers +v0x2216d60_0 .net *"_s23", 0 0, L_0x22267b0; 1 drivers +v0x2217120_0 .net *"_s25", 0 0, L_0x2226990; 1 drivers +v0x22171a0_0 .net *"_s27", 0 0, L_0x2226ae0; 1 drivers +v0x2216f60_0 .net *"_s29", 0 0, L_0x2226ec0; 1 drivers +v0x2217000_0 .net *"_s3", 0 0, L_0x2222610; 1 drivers +v0x22170a0_0 .net *"_s31", 0 0, L_0x2226fc0; 1 drivers +v0x2217400_0 .net *"_s33", 0 0, L_0x2227240; 1 drivers +v0x2217220_0 .net *"_s35", 0 0, L_0x2227340; 1 drivers +v0x22172c0_0 .net *"_s37", 0 0, L_0x22271a0; 1 drivers +v0x2217360_0 .net *"_s39", 0 0, L_0x2227690; 1 drivers +v0x2217680_0 .net *"_s41", 0 0, L_0x2227500; 1 drivers +v0x2217480_0 .net *"_s43", 0 0, L_0x22279d0; 1 drivers +v0x2217520_0 .net *"_s45", 0 0, L_0x2227810; 1 drivers +v0x22175c0_0 .net *"_s47", 0 0, L_0x2227d00; 1 drivers +v0x2217920_0 .net *"_s49", 0 0, L_0x2227b50; 1 drivers +v0x2217700_0 .net *"_s5", 0 0, L_0x2225ab0; 1 drivers +v0x2217780_0 .net *"_s51", 0 0, L_0x2228030; 1 drivers +v0x2217820_0 .net *"_s53", 0 0, L_0x2227e80; 1 drivers +v0x2217be0_0 .net *"_s55", 0 0, L_0x2228350; 1 drivers +v0x22179a0_0 .net *"_s57", 0 0, L_0x22281b0; 1 drivers +v0x2217a40_0 .net *"_s59", 0 0, L_0x2228690; 1 drivers +v0x2217ae0_0 .net *"_s61", 0 0, L_0x22268a0; 1 drivers +v0x2217ec0_0 .net *"_s63", 0 0, L_0x2226dc0; 1 drivers +v0x2217c60_0 .net *"_s65", 0 0, L_0x2228560; 1 drivers +v0x2217ce0_0 .net *"_s67", 0 0, L_0x2226d10; 1 drivers +v0x2217d80_0 .net *"_s69", 0 0, L_0x2228440; 1 drivers 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drivers +v0x2218870_0 .alias "in0", 31 0, v0x221f090_0; +v0x2218da0_0 .net "in00addr", 0 0, L_0x2222870; 1 drivers +v0x2218e20_0 .net "in010addr", 0 0, L_0x2226640; 1 drivers +v0x2218a80_0 .net "in011addr", 0 0, L_0x2225a20; 1 drivers +v0x2218b20_0 .net "in012addr", 0 0, L_0x22265e0; 1 drivers +v0x2218bc0_0 .net "in013addr", 0 0, L_0x2226a80; 1 drivers +v0x2218c60_0 .net "in014addr", 0 0, L_0x2226c50; 1 drivers +v0x2218d00_0 .net "in015addr", 0 0, L_0x2226f60; 1 drivers +v0x22191f0_0 .net "in016addr", 0 0, L_0x2227140; 1 drivers +v0x2218ea0_0 .net "in017addr", 0 0, L_0x22272e0; 1 drivers +v0x2218f40_0 .net "in018addr", 0 0, L_0x22270b0; 1 drivers +v0x2218fe0_0 .net "in019addr", 0 0, L_0x2227600; 1 drivers +v0x2219080_0 .net "in01addr", 0 0, L_0x22225b0; 1 drivers +v0x2219120_0 .net "in020addr", 0 0, L_0x2227430; 1 drivers +v0x22195f0_0 .net "in021addr", 0 0, L_0x2227940; 1 drivers +v0x2219270_0 .net "in022addr", 0 0, L_0x2227780; 1 drivers +v0x2219310_0 .net "in023addr", 0 0, L_0x2227ca0; 1 drivers +v0x22193b0_0 .net "in024addr", 0 0, L_0x2227ac0; 1 drivers +v0x2219450_0 .net "in025addr", 0 0, L_0x2227fa0; 1 drivers +v0x22194f0_0 .net "in026addr", 0 0, L_0x2227df0; 1 drivers +v0x2219a20_0 .net "in027addr", 0 0, L_0x22282f0; 1 drivers +v0x2219670_0 .net "in028addr", 0 0, L_0x2228120; 1 drivers +v0x22196f0_0 .net "in029addr", 0 0, L_0x2228630; 1 drivers +v0x2219790_0 .net "in02addr", 0 0, L_0x22259c0; 1 drivers +v0x2219830_0 .net "in030addr", 0 0, L_0x2217b80; 1 drivers +v0x22198d0_0 .net "in031addr", 0 0, L_0x22266a0; 1 drivers +v0x2219970_0 .net "in03addr", 0 0, L_0x2225b50; 1 drivers +v0x2219e90_0 .net "in04addr", 0 0, L_0x2225ca0; 1 drivers +v0x2219f10_0 .net "in05addr", 0 0, L_0x2225df0; 1 drivers +v0x2219aa0_0 .net "in06addr", 0 0, L_0x2225f40; 1 drivers +v0x2219b20_0 .net "in07addr", 0 0, L_0x22261a0; 1 drivers +v0x2219bc0_0 .net "in08addr", 0 0, L_0x2226340; 1 drivers +v0x2219c60_0 .net "in09addr", 0 0, L_0x2226490; 1 drivers +v0x2219d00_0 .alias "in1", 31 0, v0x221f330_0; +v0x2219da0_0 .net "in10addr", 0 0, L_0x2226e60; 1 drivers +v0x221a3c0_0 .net "in110addr", 0 0, L_0x2229ad0; 1 drivers +v0x221a440_0 .net "in111addr", 0 0, L_0x2229c20; 1 drivers +v0x2219f90_0 .net "in112addr", 0 0, L_0x2229e40; 1 drivers +v0x221a030_0 .net "in113addr", 0 0, L_0x2229f90; 1 drivers +v0x221a0d0_0 .net "in114addr", 0 0, L_0x222a110; 1 drivers +v0x221a170_0 .net "in115addr", 0 0, L_0x222a290; 1 drivers +v0x221a210_0 .net "in116addr", 0 0, L_0x22298e0; 1 drivers +v0x221a2b0_0 .net "in117addr", 0 0, L_0x222a880; 1 drivers +v0x221a930_0 .net "in118addr", 0 0, L_0x222a8e0; 1 drivers +v0x221a9b0_0 .net "in119addr", 0 0, L_0x222ad40; 1 drivers +v0x221a4c0_0 .net "in11addr", 0 0, L_0x2226cb0; 1 drivers +v0x221a560_0 .net "in120addr", 0 0, L_0x222aba0; 1 drivers +v0x221a600_0 .net "in121addr", 0 0, L_0x222b040; 1 drivers +v0x221a6a0_0 .net "in122addr", 0 0, L_0x222ae40; 1 drivers +v0x221a740_0 .net "in123addr", 0 0, L_0x222a3c0; 1 drivers +v0x221a7e0_0 .net "in124addr", 0 0, L_0x222b190; 1 drivers +v0x221a880_0 .net "in125addr", 0 0, L_0x222b310; 1 drivers +v0x221aee0_0 .net "in126addr", 0 0, L_0x222b460; 1 drivers +v0x221aa30_0 .net "in127addr", 0 0, L_0x222b7a0; 1 drivers +v0x221aad0_0 .net "in128addr", 0 0, L_0x222b8d0; 1 drivers +v0x221ab70_0 .net "in129addr", 0 0, L_0x222ba50; 1 drivers +v0x221ac10_0 .net "in12addr", 0 0, L_0x2224f90; 1 drivers +v0x221acb0_0 .net "in130addr", 0 0, L_0x222b5b0; 1 drivers +v0x221ad50_0 .net "in131addr", 0 0, L_0x222b640; 1 drivers +v0x221adf0_0 .net "in13addr", 0 0, L_0x2225340; 1 drivers +v0x221b450_0 .net "in14addr", 0 0, L_0x22250f0; 1 drivers +v0x221af60_0 .net "in15addr", 0 0, L_0x2225240; 1 drivers +v0x221b000_0 .net "in16addr", 0 0, L_0x2229440; 1 drivers +v0x221b0a0_0 .net "in17addr", 0 0, L_0x22295c0; 1 drivers +v0x221b140_0 .net "in18addr", 0 0, L_0x2229750; 1 drivers +v0x221b1e0_0 .net "in19addr", 0 0, L_0x22299f0; 1 drivers +v0x221b280_0 .net "invaddr", 0 0, L_0x221c0d0; 1 drivers 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+L_0x2227b50 .part v0x221f6f0_0, 24, 1; +L_0x2228030 .part v0x221f6f0_0, 25, 1; +L_0x2227e80 .part v0x221f6f0_0, 26, 1; +L_0x2228350 .part v0x221f6f0_0, 27, 1; +L_0x22281b0 .part v0x221f6f0_0, 28, 1; +L_0x2228690 .part v0x221f6f0_0, 29, 1; +L_0x22268a0 .part v0x221f6f0_0, 30, 1; +L_0x2226dc0 .part v0x221f6f0_0, 31, 1; +L_0x2228560 .part RS_0x7f8758e33a18, 0, 1; +L_0x2226d10 .part RS_0x7f8758e33a18, 1, 1; +L_0x2228440 .part RS_0x7f8758e33a18, 2, 1; +L_0x22293a0 .part RS_0x7f8758e33a18, 3, 1; +L_0x2225150 .part RS_0x7f8758e33a18, 4, 1; +L_0x22296b0 .part RS_0x7f8758e33a18, 5, 1; +L_0x22294d0 .part RS_0x7f8758e33a18, 6, 1; +L_0x2224ff0 .part RS_0x7f8758e33a18, 7, 1; +L_0x22297e0 .part RS_0x7f8758e33a18, 8, 1; +L_0x2229da0 .part RS_0x7f8758e33a18, 9, 1; +L_0x2229b30 .part RS_0x7f8758e33a18, 10, 1; +L_0x2229c80 .part RS_0x7f8758e33a18, 11, 1; +L_0x2229ea0 .part RS_0x7f8758e33a18, 12, 1; +L_0x222a020 .part RS_0x7f8758e33a18, 13, 1; +L_0x222a1a0 .part RS_0x7f8758e33a18, 14, 1; +L_0x222a320 .part RS_0x7f8758e33a18, 15, 1; +L_0x222a790 .part RS_0x7f8758e33a18, 16, 1; +L_0x222aab0 .part RS_0x7f8758e33a18, 17, 1; +L_0x222a970 .part RS_0x7f8758e33a18, 18, 1; +L_0x222ada0 .part RS_0x7f8758e33a18, 19, 1; +L_0x222ac60 .part RS_0x7f8758e33a18, 20, 1; +L_0x222b0a0 .part RS_0x7f8758e33a18, 21, 1; +L_0x222af00 .part RS_0x7f8758e33a18, 22, 1; +L_0x222a450 .part RS_0x7f8758e33a18, 23, 1; +L_0x222b220 .part RS_0x7f8758e33a18, 24, 1; +L_0x222b370 .part RS_0x7f8758e33a18, 25, 1; +L_0x222b6b0 .part RS_0x7f8758e33a18, 26, 1; +L_0x222b830 .part RS_0x7f8758e33a18, 27, 1; +L_0x222b960 .part RS_0x7f8758e33a18, 28, 1; +L_0x222b4c0 .part RS_0x7f8758e33a18, 29, 1; +L_0x222bb00 .part RS_0x7f8758e33a18, 30, 1; +L_0x222bbf0 .part RS_0x7f8758e33a18, 31, 1; +L_0x222bef0 .part/pv L_0x222bfc0, 0, 1, 32; +L_0x22253f0 .part/pv L_0x2225740, 1, 1, 32; +L_0x222bd80 .part/pv L_0x222be20, 2, 1, 32; +L_0x222a540 .part/pv L_0x222a5e0, 3, 1, 32; +L_0x2225520 .part/pv L_0x22255c0, 4, 1, 32; +L_0x222cdb0 .part/pv L_0x222cf60, 5, 1, 32; +L_0x222d0b0 .part/pv L_0x222d150, 6, 1, 32; +L_0x222d210 .part/pv L_0x222d2b0, 7, 1, 32; +L_0x222d400 .part/pv L_0x222d4a0, 8, 1, 32; +L_0x222d5f0 .part/pv L_0x222d6e0, 9, 1, 32; +L_0x222d830 .part/pv L_0x222d8d0, 10, 1, 32; +L_0x222da20 .part/pv L_0x222dd30, 11, 1, 32; +L_0x222de80 .part/pv L_0x222df20, 12, 1, 32; +L_0x222e020 .part/pv L_0x222ce50, 13, 1, 32; +L_0x222e110 .part/pv L_0x222e1b0, 14, 1, 32; +L_0x222db10 .part/pv L_0x222dbb0, 15, 1, 32; +L_0x222e300 .part/pv L_0x222e3a0, 16, 1, 32; +L_0x222e790 .part/pv L_0x222ead0, 17, 1, 32; +L_0x222ec20 .part/pv L_0x222ecc0, 18, 1, 32; +L_0x222ee10 .part/pv L_0x222eeb0, 19, 1, 32; +L_0x222e8d0 .part/pv L_0x222e970, 20, 1, 32; +L_0x222ef10 .part/pv L_0x222efb0, 21, 1, 32; +L_0x222f100 .part/pv L_0x222f1a0, 22, 1, 32; +L_0x222f2f0 .part/pv L_0x222f660, 23, 1, 32; +L_0x222f7b0 .part/pv L_0x222f850, 24, 1, 32; +L_0x222fcf0 .part/pv L_0x222f9a0, 25, 1, 32; +L_0x222f480 .part/pv L_0x222f520, 26, 1, 32; +L_0x222fa10 .part/pv L_0x222fab0, 27, 1, 32; +L_0x222fc00 .part/pv L_0x222fd90, 28, 1, 32; +L_0x222fe90 .part/pv L_0x222aea0, 29, 1, 32; +L_0x222ff30 .part/pv L_0x222a730, 30, 1, 32; +L_0x22303d0 .part/pv L_0x2230470, 31, 1, 32; +S_0x22110c0 .scope module, "adder0" "FullAdder4bit" 4 239, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x2234070/d .functor AND 1, L_0x2234750, L_0x22347f0, C4<1>, C4<1>; +L_0x2234070 .delay (50000,50000,50000) L_0x2234070/d; +L_0x2234910/d .functor NOR 1, L_0x22349b0, L_0x2234a50, C4<0>, C4<0>; +L_0x2234910 .delay (50000,50000,50000) L_0x2234910/d; +L_0x2234b80/d .functor AND 1, L_0x2234c70, L_0x2234d10, C4<1>, C4<1>; +L_0x2234b80 .delay (50000,50000,50000) L_0x2234b80/d; +L_0x2234af0/d .functor NOR 1, L_0x2234f30, L_0x22350e0, C4<0>, C4<0>; +L_0x2234af0 .delay (50000,50000,50000) L_0x2234af0/d; +L_0x2234e00/d .functor OR 1, L_0x2234070, L_0x2234910, C4<0>, C4<0>; +L_0x2234e00 .delay (50000,50000,50000) L_0x2234e00/d; +L_0x2235320/d .functor NOR 1, L_0x2234b80, L_0x2234af0, C4<0>, C4<0>; +L_0x2235320 .delay (50000,50000,50000) L_0x2235320/d; +L_0x2235460/d .functor AND 1, L_0x2234e00, L_0x2235320, C4<1>, C4<1>; +L_0x2235460 .delay (50000,50000,50000) L_0x2235460/d; +v0x2213cb0_0 .net *"_s25", 0 0, L_0x2234750; 1 drivers +v0x2213d70_0 .net *"_s27", 0 0, L_0x22347f0; 1 drivers +v0x2213e10_0 .net *"_s29", 0 0, L_0x22349b0; 1 drivers +v0x2213eb0_0 .net *"_s31", 0 0, L_0x2234a50; 1 drivers +v0x2213f30_0 .net *"_s33", 0 0, L_0x2234c70; 1 drivers +v0x2213fd0_0 .net *"_s35", 0 0, L_0x2234d10; 1 drivers +v0x2214070_0 .net *"_s37", 0 0, L_0x2234f30; 1 drivers +v0x2214110_0 .net *"_s39", 0 0, L_0x22350e0; 1 drivers +v0x22141b0_0 .net "a", 3 0, L_0x22257b0; 1 drivers +v0x2214250_0 .net "aandb", 0 0, L_0x2234070; 1 drivers +v0x22142f0_0 .net "abandnoror", 0 0, L_0x2234e00; 1 drivers +v0x2214390_0 .net "anorb", 0 0, L_0x2234910; 1 drivers +v0x2214430_0 .net "b", 3 0, L_0x22258a0; 1 drivers +v0x22144d0_0 .net "bandsum", 0 0, L_0x2234b80; 1 drivers +v0x22145f0_0 .net "bnorsum", 0 0, L_0x2234af0; 1 drivers +v0x2214690_0 .net "bsumandnornor", 0 0, L_0x2235320; 1 drivers +v0x2214550_0 .net "carryin", 0 0, L_0x22358c0; 1 drivers +v0x22147c0_0 .alias "carryout", 0 0, v0x221e770_0; +v0x2214710_0 .net "carryout1", 0 0, L_0x222e540; 1 drivers +v0x22148e0_0 .net "carryout2", 0 0, L_0x2231a50; 1 drivers +v0x2214a10_0 .net "carryout3", 0 0, L_0x2232a70; 1 drivers +v0x2214a90_0 .alias "overflow", 0 0, v0x221b3c0_0; +v0x2214960_0 .net8 "sum", 3 0, RS_0x7f8758e32188; 4 drivers +L_0x22315c0 .part/pv L_0x22314f0, 0, 1, 4; +L_0x2231660 .part L_0x22257b0, 0, 1; +L_0x2231700 .part L_0x22258a0, 0, 1; +L_0x22323b0 .part/pv L_0x22322e0, 1, 1, 4; +L_0x22324a0 .part L_0x22257b0, 1, 1; +L_0x2232590 .part L_0x22258a0, 1, 1; +L_0x2233410 .part/pv L_0x2233340, 2, 1, 4; +L_0x22334b0 .part L_0x22257b0, 2, 1; +L_0x22335a0 .part L_0x22258a0, 2, 1; +L_0x2234310 .part/pv L_0x2234240, 3, 1, 4; +L_0x2234440 .part L_0x22257b0, 3, 1; +L_0x2234570 .part L_0x22258a0, 3, 1; +L_0x2234750 .part L_0x22257b0, 3, 1; +L_0x22347f0 .part L_0x22258a0, 3, 1; +L_0x22349b0 .part L_0x22257b0, 3, 1; +L_0x2234a50 .part L_0x22258a0, 3, 1; +L_0x2234c70 .part L_0x22258a0, 3, 1; +L_0x2234d10 .part RS_0x7f8758e32188, 3, 1; +L_0x2234f30 .part L_0x22258a0, 3, 1; +L_0x22350e0 .part RS_0x7f8758e32188, 3, 1; +S_0x2213220 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x22110c0; + .timescale -9 -12; +L_0x22306b0/d .functor AND 1, L_0x2231660, L_0x2231700, C4<1>, C4<1>; +L_0x22306b0 .delay (50000,50000,50000) L_0x22306b0/d; +L_0x2230760/d .functor AND 1, L_0x2231660, L_0x22358c0, C4<1>, C4<1>; +L_0x2230760 .delay (50000,50000,50000) L_0x2230760/d; +L_0x2230860/d .functor AND 1, L_0x2231700, L_0x22358c0, C4<1>, C4<1>; +L_0x2230860 .delay (50000,50000,50000) L_0x2230860/d; +L_0x2230910/d .functor OR 1, L_0x22306b0, L_0x2230760, C4<0>, C4<0>; +L_0x2230910 .delay (50000,50000,50000) L_0x2230910/d; +L_0x222e540/d .functor OR 1, L_0x2230910, L_0x2230860, C4<0>, C4<0>; +L_0x222e540 .delay (50000,50000,50000) L_0x222e540/d; +L_0x222e640/d .functor OR 1, L_0x2231660, L_0x2231700, C4<0>, C4<0>; +L_0x222e640 .delay (50000,50000,50000) L_0x222e640/d; +L_0x222e6a0/d .functor OR 1, L_0x222e640, L_0x22358c0, C4<0>, C4<0>; +L_0x222e6a0 .delay (50000,50000,50000) L_0x222e6a0/d; +L_0x22310c0/d .functor NOT 1, L_0x222e540, C4<0>, C4<0>, C4<0>; +L_0x22310c0 .delay (50000,50000,50000) L_0x22310c0/d; +L_0x22311b0/d .functor AND 1, L_0x22310c0, L_0x222e6a0, C4<1>, C4<1>; +L_0x22311b0 .delay (50000,50000,50000) L_0x22311b0/d; +L_0x22312b0/d .functor AND 1, L_0x2231660, L_0x2231700, C4<1>, C4<1>; +L_0x22312b0 .delay (50000,50000,50000) L_0x22312b0/d; +L_0x2231490/d .functor AND 1, L_0x22312b0, L_0x22358c0, C4<1>, C4<1>; +L_0x2231490 .delay (50000,50000,50000) L_0x2231490/d; +L_0x22314f0/d .functor OR 1, L_0x22311b0, L_0x2231490, C4<0>, C4<0>; +L_0x22314f0 .delay (50000,50000,50000) L_0x22314f0/d; +v0x2213310_0 .net "a", 0 0, L_0x2231660; 1 drivers +v0x22133d0_0 .net "ab", 0 0, L_0x22306b0; 1 drivers +v0x2213470_0 .net "acarryin", 0 0, L_0x2230760; 1 drivers +v0x2213510_0 .net "andall", 0 0, L_0x2231490; 1 drivers +v0x2213590_0 .net "andsingleintermediate", 0 0, L_0x22312b0; 1 drivers +v0x2213630_0 .net "andsumintermediate", 0 0, L_0x22311b0; 1 drivers +v0x22136d0_0 .net "b", 0 0, L_0x2231700; 1 drivers +v0x2213770_0 .net "bcarryin", 0 0, L_0x2230860; 1 drivers +v0x2213810_0 .alias "carryin", 0 0, v0x2214550_0; +v0x22138b0_0 .alias "carryout", 0 0, v0x2214710_0; +v0x2213930_0 .net "invcarryout", 0 0, L_0x22310c0; 1 drivers +v0x22139b0_0 .net "orall", 0 0, L_0x222e6a0; 1 drivers +v0x2213a50_0 .net "orpairintermediate", 0 0, L_0x2230910; 1 drivers +v0x2213af0_0 .net "orsingleintermediate", 0 0, L_0x222e640; 1 drivers +v0x2213c10_0 .net "sum", 0 0, L_0x22314f0; 1 drivers +S_0x2212790 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x22110c0; + .timescale -9 -12; +L_0x2231430/d .functor AND 1, L_0x22324a0, L_0x2232590, C4<1>, C4<1>; +L_0x2231430 .delay (50000,50000,50000) L_0x2231430/d; +L_0x22317f0/d .functor AND 1, L_0x22324a0, L_0x222e540, C4<1>, C4<1>; +L_0x22317f0 .delay (50000,50000,50000) L_0x22317f0/d; +L_0x22318a0/d .functor AND 1, L_0x2232590, L_0x222e540, C4<1>, C4<1>; +L_0x22318a0 .delay (50000,50000,50000) L_0x22318a0/d; +L_0x2231950/d .functor OR 1, L_0x2231430, L_0x22317f0, C4<0>, C4<0>; +L_0x2231950 .delay (50000,50000,50000) L_0x2231950/d; +L_0x2231a50/d .functor OR 1, L_0x2231950, L_0x22318a0, C4<0>, C4<0>; +L_0x2231a50 .delay (50000,50000,50000) L_0x2231a50/d; +L_0x2231b50/d .functor OR 1, L_0x22324a0, L_0x2232590, C4<0>, C4<0>; +L_0x2231b50 .delay (50000,50000,50000) L_0x2231b50/d; +L_0x2231c30/d .functor OR 1, L_0x2231b50, L_0x222e540, C4<0>, C4<0>; +L_0x2231c30 .delay (50000,50000,50000) L_0x2231c30/d; +L_0x2231d20/d .functor NOT 1, L_0x2231a50, C4<0>, C4<0>, C4<0>; +L_0x2231d20 .delay (50000,50000,50000) L_0x2231d20/d; +L_0x2231e50/d .functor AND 1, L_0x2231d20, L_0x2231c30, C4<1>, C4<1>; +L_0x2231e50 .delay (50000,50000,50000) L_0x2231e50/d; +L_0x2231f50/d .functor AND 1, L_0x22324a0, L_0x2232590, C4<1>, C4<1>; +L_0x2231f50 .delay (50000,50000,50000) L_0x2231f50/d; +L_0x2232170/d .functor AND 1, L_0x2231f50, L_0x222e540, C4<1>, C4<1>; +L_0x2232170 .delay (50000,50000,50000) L_0x2232170/d; +L_0x22322e0/d .functor OR 1, L_0x2231e50, L_0x2232170, C4<0>, C4<0>; +L_0x22322e0 .delay (50000,50000,50000) L_0x22322e0/d; +v0x2212880_0 .net "a", 0 0, L_0x22324a0; 1 drivers +v0x2212940_0 .net "ab", 0 0, L_0x2231430; 1 drivers +v0x22129e0_0 .net "acarryin", 0 0, L_0x22317f0; 1 drivers +v0x2212a80_0 .net "andall", 0 0, L_0x2232170; 1 drivers +v0x2212b00_0 .net "andsingleintermediate", 0 0, L_0x2231f50; 1 drivers +v0x2212ba0_0 .net "andsumintermediate", 0 0, L_0x2231e50; 1 drivers +v0x2212c40_0 .net "b", 0 0, L_0x2232590; 1 drivers +v0x2212ce0_0 .net "bcarryin", 0 0, L_0x22318a0; 1 drivers +v0x2212d80_0 .alias "carryin", 0 0, v0x2214710_0; +v0x2212e20_0 .alias "carryout", 0 0, v0x22148e0_0; +v0x2212ea0_0 .net "invcarryout", 0 0, L_0x2231d20; 1 drivers +v0x2212f20_0 .net "orall", 0 0, L_0x2231c30; 1 drivers +v0x2212fc0_0 .net "orpairintermediate", 0 0, L_0x2231950; 1 drivers +v0x2213060_0 .net "orsingleintermediate", 0 0, L_0x2231b50; 1 drivers +v0x2213180_0 .net "sum", 0 0, L_0x22322e0; 1 drivers +S_0x2211cb0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x22110c0; + .timescale -9 -12; +L_0x2232110/d .functor AND 1, L_0x22334b0, L_0x22335a0, C4<1>, C4<1>; +L_0x2232110 .delay (50000,50000,50000) L_0x2232110/d; +L_0x2232750/d .functor AND 1, L_0x22334b0, L_0x2231a50, C4<1>, C4<1>; +L_0x2232750 .delay (50000,50000,50000) L_0x2232750/d; +L_0x2232840/d .functor AND 1, L_0x22335a0, L_0x2231a50, C4<1>, C4<1>; +L_0x2232840 .delay (50000,50000,50000) L_0x2232840/d; +L_0x2232930/d .functor OR 1, L_0x2232110, L_0x2232750, C4<0>, C4<0>; +L_0x2232930 .delay (50000,50000,50000) L_0x2232930/d; +L_0x2232a70/d .functor OR 1, L_0x2232930, L_0x2232840, C4<0>, C4<0>; +L_0x2232a70 .delay (50000,50000,50000) L_0x2232a70/d; +L_0x2232bb0/d .functor OR 1, L_0x22334b0, L_0x22335a0, C4<0>, C4<0>; +L_0x2232bb0 .delay (50000,50000,50000) L_0x2232bb0/d; +L_0x2232c90/d .functor OR 1, L_0x2232bb0, L_0x2231a50, C4<0>, C4<0>; +L_0x2232c90 .delay (50000,50000,50000) L_0x2232c90/d; +L_0x2232d80/d .functor NOT 1, L_0x2232a70, C4<0>, C4<0>, C4<0>; +L_0x2232d80 .delay (50000,50000,50000) L_0x2232d80/d; +L_0x2232eb0/d .functor AND 1, L_0x2232d80, L_0x2232c90, C4<1>, C4<1>; +L_0x2232eb0 .delay (50000,50000,50000) L_0x2232eb0/d; +L_0x2232fb0/d .functor AND 1, L_0x22334b0, L_0x22335a0, C4<1>, C4<1>; +L_0x2232fb0 .delay (50000,50000,50000) L_0x2232fb0/d; +L_0x22331d0/d .functor AND 1, L_0x2232fb0, L_0x2231a50, C4<1>, C4<1>; +L_0x22331d0 .delay (50000,50000,50000) L_0x22331d0/d; +L_0x2233340/d .functor OR 1, L_0x2232eb0, L_0x22331d0, C4<0>, C4<0>; +L_0x2233340 .delay (50000,50000,50000) L_0x2233340/d; +v0x2211da0_0 .net "a", 0 0, L_0x22334b0; 1 drivers +v0x2211e60_0 .net "ab", 0 0, L_0x2232110; 1 drivers +v0x2211f00_0 .net "acarryin", 0 0, L_0x2232750; 1 drivers +v0x2211fa0_0 .net "andall", 0 0, L_0x22331d0; 1 drivers +v0x2212020_0 .net "andsingleintermediate", 0 0, L_0x2232fb0; 1 drivers +v0x22120c0_0 .net "andsumintermediate", 0 0, L_0x2232eb0; 1 drivers +v0x2212160_0 .net "b", 0 0, L_0x22335a0; 1 drivers +v0x2212200_0 .net "bcarryin", 0 0, L_0x2232840; 1 drivers +v0x22122f0_0 .alias "carryin", 0 0, v0x22148e0_0; +v0x2212390_0 .alias "carryout", 0 0, v0x2214a10_0; +v0x2212410_0 .net "invcarryout", 0 0, L_0x2232d80; 1 drivers +v0x2212490_0 .net "orall", 0 0, L_0x2232c90; 1 drivers +v0x2212530_0 .net "orpairintermediate", 0 0, L_0x2232930; 1 drivers +v0x22125d0_0 .net "orsingleintermediate", 0 0, L_0x2232bb0; 1 drivers +v0x22126f0_0 .net "sum", 0 0, L_0x2233340; 1 drivers +S_0x22111b0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x22110c0; + .timescale -9 -12; +L_0x2233170/d .functor AND 1, L_0x2234440, L_0x2234570, C4<1>, C4<1>; +L_0x2233170 .delay (50000,50000,50000) L_0x2233170/d; +L_0x2233690/d .functor AND 1, L_0x2234440, L_0x2232a70, C4<1>, C4<1>; +L_0x2233690 .delay (50000,50000,50000) L_0x2233690/d; +L_0x2233780/d .functor AND 1, L_0x2234570, L_0x2232a70, C4<1>, C4<1>; +L_0x2233780 .delay (50000,50000,50000) L_0x2233780/d; +L_0x2233870/d .functor OR 1, L_0x2233170, L_0x2233690, C4<0>, C4<0>; +L_0x2233870 .delay (50000,50000,50000) L_0x2233870/d; +L_0x22339b0/d .functor OR 1, L_0x2233870, L_0x2233780, C4<0>, C4<0>; +L_0x22339b0 .delay (50000,50000,50000) L_0x22339b0/d; +L_0x2233af0/d .functor OR 1, L_0x2234440, L_0x2234570, C4<0>, C4<0>; +L_0x2233af0 .delay (50000,50000,50000) L_0x2233af0/d; +L_0x2233bd0/d .functor OR 1, L_0x2233af0, L_0x2232a70, C4<0>, C4<0>; +L_0x2233bd0 .delay (50000,50000,50000) L_0x2233bd0/d; +L_0x2233cc0/d .functor NOT 1, L_0x22339b0, C4<0>, C4<0>, C4<0>; +L_0x2233cc0 .delay (50000,50000,50000) L_0x2233cc0/d; +L_0x2233d60/d .functor AND 1, L_0x2233cc0, L_0x2233bd0, C4<1>, C4<1>; +L_0x2233d60 .delay (50000,50000,50000) L_0x2233d60/d; +L_0x2233eb0/d .functor AND 1, L_0x2234440, L_0x2234570, C4<1>, C4<1>; +L_0x2233eb0 .delay (50000,50000,50000) L_0x2233eb0/d; +L_0x22340d0/d .functor AND 1, L_0x2233eb0, L_0x2232a70, C4<1>, C4<1>; +L_0x22340d0 .delay (50000,50000,50000) L_0x22340d0/d; +L_0x2234240/d .functor OR 1, L_0x2233d60, L_0x22340d0, C4<0>, C4<0>; +L_0x2234240 .delay (50000,50000,50000) L_0x2234240/d; +v0x22112a0_0 .net "a", 0 0, L_0x2234440; 1 drivers +v0x2211360_0 .net "ab", 0 0, L_0x2233170; 1 drivers +v0x2211400_0 .net "acarryin", 0 0, L_0x2233690; 1 drivers +v0x22114a0_0 .net "andall", 0 0, L_0x22340d0; 1 drivers +v0x2211520_0 .net "andsingleintermediate", 0 0, L_0x2233eb0; 1 drivers +v0x22115c0_0 .net "andsumintermediate", 0 0, L_0x2233d60; 1 drivers +v0x2211660_0 .net "b", 0 0, L_0x2234570; 1 drivers +v0x2211700_0 .net "bcarryin", 0 0, L_0x2233780; 1 drivers +v0x22117f0_0 .alias "carryin", 0 0, v0x2214a10_0; +v0x2211890_0 .alias "carryout", 0 0, v0x221e770_0; +v0x2211910_0 .net "invcarryout", 0 0, L_0x2233cc0; 1 drivers +v0x22119b0_0 .net "orall", 0 0, L_0x2233bd0; 1 drivers +v0x2211a50_0 .net "orpairintermediate", 0 0, L_0x2233870; 1 drivers +v0x2211af0_0 .net "orsingleintermediate", 0 0, L_0x2233af0; 1 drivers +v0x2211c10_0 .net "sum", 0 0, L_0x2234240; 1 drivers +S_0x220d5b0 .scope module, "adder1" "FullAdder4bit" 4 240, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x22391c0/d .functor AND 1, L_0x22398a0, L_0x2239940, C4<1>, C4<1>; +L_0x22391c0 .delay (50000,50000,50000) L_0x22391c0/d; +L_0x2239a60/d .functor NOR 1, L_0x2239b00, L_0x2239ba0, C4<0>, C4<0>; +L_0x2239a60 .delay (50000,50000,50000) L_0x2239a60/d; +L_0x2239cd0/d .functor AND 1, L_0x2239dc0, L_0x2239e60, C4<1>, C4<1>; +L_0x2239cd0 .delay (50000,50000,50000) L_0x2239cd0/d; +L_0x2239c40/d .functor NOR 1, L_0x223a080, L_0x223a230, C4<0>, C4<0>; +L_0x2239c40 .delay (50000,50000,50000) L_0x2239c40/d; +L_0x2239f50/d .functor OR 1, L_0x22391c0, L_0x2239a60, C4<0>, C4<0>; +L_0x2239f50 .delay (50000,50000,50000) L_0x2239f50/d; +L_0x223a470/d .functor NOR 1, L_0x2239cd0, L_0x2239c40, C4<0>, C4<0>; +L_0x223a470 .delay (50000,50000,50000) L_0x223a470/d; +L_0x223a5b0/d .functor AND 1, L_0x2239f50, L_0x223a470, C4<1>, C4<1>; +L_0x223a5b0 .delay (50000,50000,50000) L_0x223a5b0/d; +v0x22101a0_0 .net *"_s25", 0 0, L_0x22398a0; 1 drivers +v0x2210260_0 .net *"_s27", 0 0, L_0x2239940; 1 drivers +v0x2210300_0 .net *"_s29", 0 0, L_0x2239b00; 1 drivers +v0x22103a0_0 .net *"_s31", 0 0, L_0x2239ba0; 1 drivers +v0x2210420_0 .net *"_s33", 0 0, L_0x2239dc0; 1 drivers +v0x22104c0_0 .net *"_s35", 0 0, L_0x2239e60; 1 drivers +v0x2210560_0 .net *"_s37", 0 0, L_0x223a080; 1 drivers +v0x2210600_0 .net *"_s39", 0 0, L_0x223a230; 1 drivers +v0x22106a0_0 .net "a", 3 0, L_0x2235690; 1 drivers +v0x2210740_0 .net "aandb", 0 0, L_0x22391c0; 1 drivers +v0x22107e0_0 .net "abandnoror", 0 0, L_0x2239f50; 1 drivers +v0x2210880_0 .net "anorb", 0 0, L_0x2239a60; 1 drivers +v0x2210920_0 .net "b", 3 0, L_0x2235730; 1 drivers +v0x22109c0_0 .net "bandsum", 0 0, L_0x2239cd0; 1 drivers +v0x2210ae0_0 .net "bnorsum", 0 0, L_0x2239c40; 1 drivers +v0x2210b80_0 .net "bsumandnornor", 0 0, L_0x223a470; 1 drivers +v0x2210a40_0 .alias "carryin", 0 0, v0x221e770_0; +v0x2210cb0_0 .alias "carryout", 0 0, v0x221eb70_0; +v0x2210c00_0 .net "carryout1", 0 0, L_0x2235d80; 1 drivers +v0x2210dd0_0 .net "carryout2", 0 0, L_0x2236bb0; 1 drivers +v0x2210f00_0 .net "carryout3", 0 0, L_0x2237c10; 1 drivers +v0x2210f80_0 .alias "overflow", 0 0, v0x221ba00_0; +v0x2210e50_0 .net8 "sum", 3 0, RS_0x7f8758e313a8; 4 drivers +L_0x2236620 .part/pv L_0x2236580, 0, 1, 4; +L_0x22366c0 .part L_0x2235690, 0, 1; +L_0x2236760 .part L_0x2235730, 0, 1; +L_0x2237550 .part/pv L_0x2237480, 1, 1, 4; +L_0x2237640 .part L_0x2235690, 1, 1; +L_0x2237730 .part L_0x2235730, 1, 1; +L_0x2238560 .part/pv L_0x2238490, 2, 1, 4; +L_0x2238600 .part L_0x2235690, 2, 1; +L_0x22386f0 .part L_0x2235730, 2, 1; +L_0x2239460 .part/pv L_0x2239390, 3, 1, 4; +L_0x2239590 .part L_0x2235690, 3, 1; +L_0x22396c0 .part L_0x2235730, 3, 1; +L_0x22398a0 .part L_0x2235690, 3, 1; +L_0x2239940 .part L_0x2235730, 3, 1; +L_0x2239b00 .part L_0x2235690, 3, 1; +L_0x2239ba0 .part L_0x2235730, 3, 1; +L_0x2239dc0 .part L_0x2235730, 3, 1; +L_0x2239e60 .part RS_0x7f8758e313a8, 3, 1; +L_0x223a080 .part L_0x2235730, 3, 1; +L_0x223a230 .part RS_0x7f8758e313a8, 3, 1; +S_0x220f710 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x220d5b0; + .timescale -9 -12; +L_0x2225940/d .functor AND 1, L_0x22366c0, L_0x2236760, C4<1>, C4<1>; +L_0x2225940 .delay (50000,50000,50000) L_0x2225940/d; +L_0x22359f0/d .functor AND 1, L_0x22366c0, L_0x22339b0, C4<1>, C4<1>; +L_0x22359f0 .delay (50000,50000,50000) L_0x22359f0/d; +L_0x2235ae0/d .functor AND 1, L_0x2236760, L_0x22339b0, C4<1>, C4<1>; +L_0x2235ae0 .delay (50000,50000,50000) L_0x2235ae0/d; +L_0x221e830/d .functor OR 1, L_0x2225940, L_0x22359f0, C4<0>, C4<0>; +L_0x221e830 .delay (50000,50000,50000) L_0x221e830/d; +L_0x2235d80/d .functor OR 1, L_0x221e830, L_0x2235ae0, C4<0>, C4<0>; +L_0x2235d80 .delay (50000,50000,50000) L_0x2235d80/d; +L_0x2235ec0/d .functor OR 1, L_0x22366c0, L_0x2236760, C4<0>, C4<0>; +L_0x2235ec0 .delay (50000,50000,50000) L_0x2235ec0/d; +L_0x2235fa0/d .functor OR 1, L_0x2235ec0, L_0x22339b0, C4<0>, C4<0>; +L_0x2235fa0 .delay (50000,50000,50000) L_0x2235fa0/d; +L_0x2236090/d .functor NOT 1, L_0x2235d80, C4<0>, C4<0>, C4<0>; +L_0x2236090 .delay (50000,50000,50000) L_0x2236090/d; +L_0x22361c0/d .functor AND 1, L_0x2236090, L_0x2235fa0, C4<1>, C4<1>; +L_0x22361c0 .delay (50000,50000,50000) L_0x22361c0/d; +L_0x22362c0/d .functor AND 1, L_0x22366c0, L_0x2236760, C4<1>, C4<1>; +L_0x22362c0 .delay (50000,50000,50000) L_0x22362c0/d; +L_0x22364e0/d .functor AND 1, L_0x22362c0, L_0x22339b0, C4<1>, C4<1>; +L_0x22364e0 .delay (50000,50000,50000) L_0x22364e0/d; +L_0x2236580/d .functor OR 1, L_0x22361c0, L_0x22364e0, C4<0>, C4<0>; +L_0x2236580 .delay (50000,50000,50000) L_0x2236580/d; +v0x220f800_0 .net "a", 0 0, L_0x22366c0; 1 drivers +v0x220f8c0_0 .net "ab", 0 0, L_0x2225940; 1 drivers +v0x220f960_0 .net "acarryin", 0 0, L_0x22359f0; 1 drivers +v0x220fa00_0 .net "andall", 0 0, L_0x22364e0; 1 drivers +v0x220fa80_0 .net "andsingleintermediate", 0 0, L_0x22362c0; 1 drivers +v0x220fb20_0 .net "andsumintermediate", 0 0, L_0x22361c0; 1 drivers +v0x220fbc0_0 .net "b", 0 0, L_0x2236760; 1 drivers +v0x220fc60_0 .net "bcarryin", 0 0, L_0x2235ae0; 1 drivers +v0x220fd00_0 .alias "carryin", 0 0, v0x221e770_0; +v0x220fda0_0 .alias "carryout", 0 0, v0x2210c00_0; +v0x220fe20_0 .net "invcarryout", 0 0, L_0x2236090; 1 drivers +v0x220fea0_0 .net "orall", 0 0, L_0x2235fa0; 1 drivers +v0x220ff40_0 .net "orpairintermediate", 0 0, L_0x221e830; 1 drivers +v0x220ffe0_0 .net "orsingleintermediate", 0 0, L_0x2235ec0; 1 drivers +v0x2210100_0 .net "sum", 0 0, L_0x2236580; 1 drivers +S_0x220ec80 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x220d5b0; + .timescale -9 -12; +L_0x2236480/d .functor AND 1, L_0x2237640, L_0x2237730, C4<1>, C4<1>; +L_0x2236480 .delay (50000,50000,50000) L_0x2236480/d; +L_0x2236890/d .functor AND 1, L_0x2237640, L_0x2235d80, C4<1>, C4<1>; +L_0x2236890 .delay (50000,50000,50000) L_0x2236890/d; +L_0x2236980/d .functor AND 1, L_0x2237730, L_0x2235d80, C4<1>, C4<1>; +L_0x2236980 .delay (50000,50000,50000) L_0x2236980/d; +L_0x2236a70/d .functor OR 1, L_0x2236480, L_0x2236890, C4<0>, C4<0>; +L_0x2236a70 .delay (50000,50000,50000) L_0x2236a70/d; +L_0x2236bb0/d .functor OR 1, L_0x2236a70, L_0x2236980, C4<0>, C4<0>; +L_0x2236bb0 .delay (50000,50000,50000) L_0x2236bb0/d; +L_0x2236cf0/d .functor OR 1, L_0x2237640, L_0x2237730, C4<0>, C4<0>; +L_0x2236cf0 .delay (50000,50000,50000) L_0x2236cf0/d; +L_0x2236dd0/d .functor OR 1, L_0x2236cf0, L_0x2235d80, C4<0>, C4<0>; +L_0x2236dd0 .delay (50000,50000,50000) L_0x2236dd0/d; +L_0x2236ec0/d .functor NOT 1, L_0x2236bb0, C4<0>, C4<0>, C4<0>; +L_0x2236ec0 .delay (50000,50000,50000) L_0x2236ec0/d; +L_0x2236ff0/d .functor AND 1, L_0x2236ec0, L_0x2236dd0, C4<1>, C4<1>; +L_0x2236ff0 .delay (50000,50000,50000) L_0x2236ff0/d; +L_0x22370f0/d .functor AND 1, L_0x2237640, L_0x2237730, C4<1>, C4<1>; +L_0x22370f0 .delay (50000,50000,50000) L_0x22370f0/d; +L_0x2237310/d .functor AND 1, L_0x22370f0, L_0x2235d80, C4<1>, C4<1>; +L_0x2237310 .delay (50000,50000,50000) L_0x2237310/d; +L_0x2237480/d .functor OR 1, L_0x2236ff0, L_0x2237310, C4<0>, C4<0>; +L_0x2237480 .delay (50000,50000,50000) L_0x2237480/d; +v0x220ed70_0 .net "a", 0 0, L_0x2237640; 1 drivers +v0x220ee30_0 .net "ab", 0 0, L_0x2236480; 1 drivers +v0x220eed0_0 .net "acarryin", 0 0, L_0x2236890; 1 drivers +v0x220ef70_0 .net "andall", 0 0, L_0x2237310; 1 drivers +v0x220eff0_0 .net "andsingleintermediate", 0 0, L_0x22370f0; 1 drivers +v0x220f090_0 .net "andsumintermediate", 0 0, L_0x2236ff0; 1 drivers +v0x220f130_0 .net "b", 0 0, L_0x2237730; 1 drivers +v0x220f1d0_0 .net "bcarryin", 0 0, L_0x2236980; 1 drivers +v0x220f270_0 .alias "carryin", 0 0, v0x2210c00_0; +v0x220f310_0 .alias "carryout", 0 0, v0x2210dd0_0; +v0x220f390_0 .net "invcarryout", 0 0, L_0x2236ec0; 1 drivers +v0x220f410_0 .net "orall", 0 0, L_0x2236dd0; 1 drivers +v0x220f4b0_0 .net "orpairintermediate", 0 0, L_0x2236a70; 1 drivers +v0x220f550_0 .net "orsingleintermediate", 0 0, L_0x2236cf0; 1 drivers +v0x220f670_0 .net "sum", 0 0, L_0x2237480; 1 drivers +S_0x220e1a0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x220d5b0; + .timescale -9 -12; +L_0x22372b0/d .functor AND 1, L_0x2238600, L_0x22386f0, C4<1>, C4<1>; +L_0x22372b0 .delay (50000,50000,50000) L_0x22372b0/d; +L_0x22378f0/d .functor AND 1, L_0x2238600, L_0x2236bb0, C4<1>, C4<1>; +L_0x22378f0 .delay (50000,50000,50000) L_0x22378f0/d; +L_0x22379e0/d .functor AND 1, L_0x22386f0, L_0x2236bb0, C4<1>, C4<1>; +L_0x22379e0 .delay (50000,50000,50000) L_0x22379e0/d; +L_0x2237ad0/d .functor OR 1, L_0x22372b0, L_0x22378f0, C4<0>, C4<0>; +L_0x2237ad0 .delay (50000,50000,50000) L_0x2237ad0/d; +L_0x2237c10/d .functor OR 1, L_0x2237ad0, L_0x22379e0, C4<0>, C4<0>; +L_0x2237c10 .delay (50000,50000,50000) L_0x2237c10/d; +L_0x2237d50/d .functor OR 1, L_0x2238600, L_0x22386f0, C4<0>, C4<0>; +L_0x2237d50 .delay (50000,50000,50000) L_0x2237d50/d; +L_0x2237e30/d .functor OR 1, L_0x2237d50, L_0x2236bb0, C4<0>, C4<0>; +L_0x2237e30 .delay (50000,50000,50000) L_0x2237e30/d; +L_0x2237f20/d .functor NOT 1, L_0x2237c10, C4<0>, C4<0>, C4<0>; +L_0x2237f20 .delay (50000,50000,50000) L_0x2237f20/d; +L_0x2234890/d .functor AND 1, L_0x2237f20, L_0x2237e30, C4<1>, C4<1>; +L_0x2234890 .delay (50000,50000,50000) L_0x2234890/d; +L_0x2238100/d .functor AND 1, L_0x2238600, L_0x22386f0, C4<1>, C4<1>; +L_0x2238100 .delay (50000,50000,50000) L_0x2238100/d; +L_0x2238320/d .functor AND 1, L_0x2238100, L_0x2236bb0, C4<1>, C4<1>; +L_0x2238320 .delay (50000,50000,50000) L_0x2238320/d; +L_0x2238490/d .functor OR 1, L_0x2234890, L_0x2238320, C4<0>, C4<0>; +L_0x2238490 .delay (50000,50000,50000) L_0x2238490/d; +v0x220e290_0 .net "a", 0 0, L_0x2238600; 1 drivers +v0x220e350_0 .net "ab", 0 0, L_0x22372b0; 1 drivers +v0x220e3f0_0 .net "acarryin", 0 0, L_0x22378f0; 1 drivers +v0x220e490_0 .net "andall", 0 0, L_0x2238320; 1 drivers +v0x220e510_0 .net "andsingleintermediate", 0 0, L_0x2238100; 1 drivers +v0x220e5b0_0 .net "andsumintermediate", 0 0, L_0x2234890; 1 drivers +v0x220e650_0 .net "b", 0 0, L_0x22386f0; 1 drivers +v0x220e6f0_0 .net "bcarryin", 0 0, L_0x22379e0; 1 drivers +v0x220e7e0_0 .alias "carryin", 0 0, v0x2210dd0_0; +v0x220e880_0 .alias "carryout", 0 0, v0x2210f00_0; +v0x220e900_0 .net "invcarryout", 0 0, L_0x2237f20; 1 drivers +v0x220e980_0 .net "orall", 0 0, L_0x2237e30; 1 drivers +v0x220ea20_0 .net "orpairintermediate", 0 0, L_0x2237ad0; 1 drivers +v0x220eac0_0 .net "orsingleintermediate", 0 0, L_0x2237d50; 1 drivers +v0x220ebe0_0 .net "sum", 0 0, L_0x2238490; 1 drivers +S_0x220d6a0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x220d5b0; + .timescale -9 -12; +L_0x22382c0/d .functor AND 1, L_0x2239590, L_0x22396c0, C4<1>, C4<1>; +L_0x22382c0 .delay (50000,50000,50000) L_0x22382c0/d; +L_0x22387e0/d .functor AND 1, L_0x2239590, L_0x2237c10, C4<1>, C4<1>; +L_0x22387e0 .delay (50000,50000,50000) L_0x22387e0/d; +L_0x22388d0/d .functor AND 1, L_0x22396c0, L_0x2237c10, C4<1>, C4<1>; +L_0x22388d0 .delay (50000,50000,50000) L_0x22388d0/d; +L_0x22389c0/d .functor OR 1, L_0x22382c0, L_0x22387e0, C4<0>, C4<0>; +L_0x22389c0 .delay (50000,50000,50000) L_0x22389c0/d; +L_0x2238b00/d .functor OR 1, L_0x22389c0, L_0x22388d0, C4<0>, C4<0>; +L_0x2238b00 .delay (50000,50000,50000) L_0x2238b00/d; +L_0x2238c40/d .functor OR 1, L_0x2239590, L_0x22396c0, C4<0>, C4<0>; +L_0x2238c40 .delay (50000,50000,50000) L_0x2238c40/d; +L_0x2238d20/d .functor OR 1, L_0x2238c40, L_0x2237c10, C4<0>, C4<0>; +L_0x2238d20 .delay (50000,50000,50000) L_0x2238d20/d; +L_0x2238e10/d .functor NOT 1, L_0x2238b00, C4<0>, C4<0>, C4<0>; +L_0x2238e10 .delay (50000,50000,50000) L_0x2238e10/d; +L_0x2238eb0/d .functor AND 1, L_0x2238e10, L_0x2238d20, C4<1>, C4<1>; +L_0x2238eb0 .delay (50000,50000,50000) L_0x2238eb0/d; +L_0x2239000/d .functor AND 1, L_0x2239590, L_0x22396c0, C4<1>, C4<1>; +L_0x2239000 .delay (50000,50000,50000) L_0x2239000/d; +L_0x2239220/d .functor AND 1, L_0x2239000, L_0x2237c10, C4<1>, C4<1>; +L_0x2239220 .delay (50000,50000,50000) L_0x2239220/d; +L_0x2239390/d .functor OR 1, L_0x2238eb0, L_0x2239220, C4<0>, C4<0>; +L_0x2239390 .delay (50000,50000,50000) L_0x2239390/d; +v0x220d790_0 .net "a", 0 0, L_0x2239590; 1 drivers +v0x220d850_0 .net "ab", 0 0, L_0x22382c0; 1 drivers +v0x220d8f0_0 .net "acarryin", 0 0, L_0x22387e0; 1 drivers +v0x220d990_0 .net "andall", 0 0, L_0x2239220; 1 drivers +v0x220da10_0 .net "andsingleintermediate", 0 0, L_0x2239000; 1 drivers +v0x220dab0_0 .net "andsumintermediate", 0 0, L_0x2238eb0; 1 drivers +v0x220db50_0 .net "b", 0 0, L_0x22396c0; 1 drivers +v0x220dbf0_0 .net "bcarryin", 0 0, L_0x22388d0; 1 drivers +v0x220dce0_0 .alias "carryin", 0 0, v0x2210f00_0; +v0x220dd80_0 .alias "carryout", 0 0, v0x221eb70_0; +v0x220de00_0 .net "invcarryout", 0 0, L_0x2238e10; 1 drivers +v0x220dea0_0 .net "orall", 0 0, L_0x2238d20; 1 drivers +v0x220df40_0 .net "orpairintermediate", 0 0, L_0x22389c0; 1 drivers +v0x220dfe0_0 .net "orsingleintermediate", 0 0, L_0x2238c40; 1 drivers +v0x220e100_0 .net "sum", 0 0, L_0x2239390; 1 drivers +S_0x2209aa0 .scope module, "adder2" "FullAdder4bit" 4 241, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x223e1e0/d .functor AND 1, L_0x223e8c0, L_0x223e960, C4<1>, C4<1>; +L_0x223e1e0 .delay (50000,50000,50000) L_0x223e1e0/d; +L_0x223ea00/d .functor NOR 1, L_0x223eaa0, L_0x223eb40, C4<0>, C4<0>; +L_0x223ea00 .delay (50000,50000,50000) L_0x223ea00/d; +L_0x223ec70/d .functor AND 1, L_0x223ed60, L_0x223ee00, C4<1>, C4<1>; +L_0x223ec70 .delay (50000,50000,50000) L_0x223ec70/d; +L_0x223ebe0/d .functor NOR 1, L_0x223f020, L_0x223f1d0, C4<0>, C4<0>; +L_0x223ebe0 .delay (50000,50000,50000) L_0x223ebe0/d; +L_0x223eef0/d .functor OR 1, L_0x223e1e0, L_0x223ea00, C4<0>, C4<0>; +L_0x223eef0 .delay (50000,50000,50000) L_0x223eef0/d; +L_0x223f410/d .functor NOR 1, L_0x223ec70, L_0x223ebe0, C4<0>, C4<0>; +L_0x223f410 .delay (50000,50000,50000) L_0x223f410/d; +L_0x223f510/d .functor AND 1, L_0x223eef0, L_0x223f410, C4<1>, C4<1>; +L_0x223f510 .delay (50000,50000,50000) L_0x223f510/d; +v0x220c690_0 .net *"_s25", 0 0, L_0x223e8c0; 1 drivers +v0x220c750_0 .net *"_s27", 0 0, L_0x223e960; 1 drivers +v0x220c7f0_0 .net *"_s29", 0 0, L_0x223eaa0; 1 drivers +v0x220c890_0 .net *"_s31", 0 0, L_0x223eb40; 1 drivers +v0x220c910_0 .net *"_s33", 0 0, L_0x223ed60; 1 drivers +v0x220c9b0_0 .net *"_s35", 0 0, L_0x223ee00; 1 drivers +v0x220ca50_0 .net *"_s37", 0 0, L_0x223f020; 1 drivers +v0x220caf0_0 .net *"_s39", 0 0, L_0x223f1d0; 1 drivers +v0x220cb90_0 .net "a", 3 0, L_0x223f7d0; 1 drivers +v0x220cc30_0 .net "aandb", 0 0, L_0x223e1e0; 1 drivers +v0x220ccd0_0 .net "abandnoror", 0 0, L_0x223eef0; 1 drivers +v0x220cd70_0 .net "anorb", 0 0, L_0x223ea00; 1 drivers +v0x220ce10_0 .net "b", 3 0, L_0x223a7a0; 1 drivers +v0x220ceb0_0 .net "bandsum", 0 0, L_0x223ec70; 1 drivers +v0x220cfd0_0 .net "bnorsum", 0 0, L_0x223ebe0; 1 drivers +v0x220d070_0 .net "bsumandnornor", 0 0, L_0x223f410; 1 drivers +v0x220cf30_0 .alias "carryin", 0 0, v0x221eb70_0; +v0x220d1a0_0 .alias "carryout", 0 0, v0x221e9a0_0; +v0x220d0f0_0 .net "carryout1", 0 0, L_0x223ad50; 1 drivers +v0x220d2c0_0 .net "carryout2", 0 0, L_0x223bb80; 1 drivers +v0x220d3f0_0 .net "carryout3", 0 0, L_0x223cbe0; 1 drivers +v0x220d470_0 .alias "overflow", 0 0, v0x221ba80_0; +v0x220d340_0 .net8 "sum", 3 0, RS_0x7f8758e305c8; 4 drivers +L_0x223b5f0 .part/pv L_0x223b550, 0, 1, 4; +L_0x223b690 .part L_0x223f7d0, 0, 1; +L_0x223b730 .part L_0x223a7a0, 0, 1; +L_0x223c520 .part/pv L_0x223c450, 1, 1, 4; +L_0x223c610 .part L_0x223f7d0, 1, 1; +L_0x223c700 .part L_0x223a7a0, 1, 1; +L_0x223d580 .part/pv L_0x223d4b0, 2, 1, 4; +L_0x223d620 .part L_0x223f7d0, 2, 1; +L_0x223d710 .part L_0x223a7a0, 2, 1; +L_0x223e480 .part/pv L_0x223e3b0, 3, 1, 4; +L_0x223e5b0 .part L_0x223f7d0, 3, 1; +L_0x223e6e0 .part L_0x223a7a0, 3, 1; +L_0x223e8c0 .part L_0x223f7d0, 3, 1; +L_0x223e960 .part L_0x223a7a0, 3, 1; +L_0x223eaa0 .part L_0x223f7d0, 3, 1; +L_0x223eb40 .part L_0x223a7a0, 3, 1; +L_0x223ed60 .part L_0x223a7a0, 3, 1; +L_0x223ee00 .part RS_0x7f8758e305c8, 3, 1; +L_0x223f020 .part L_0x223a7a0, 3, 1; +L_0x223f1d0 .part RS_0x7f8758e305c8, 3, 1; +S_0x220bc00 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x2209aa0; + .timescale -9 -12; +L_0x22357d0/d .functor AND 1, L_0x223b690, L_0x223b730, C4<1>, C4<1>; +L_0x22357d0 .delay (50000,50000,50000) L_0x22357d0/d; +L_0x223a9f0/d .functor AND 1, L_0x223b690, L_0x2238b00, C4<1>, C4<1>; +L_0x223a9f0 .delay (50000,50000,50000) L_0x223a9f0/d; +L_0x223aaa0/d .functor AND 1, L_0x223b730, L_0x2238b00, C4<1>, C4<1>; +L_0x223aaa0 .delay (50000,50000,50000) L_0x223aaa0/d; +L_0x223ac10/d .functor OR 1, L_0x22357d0, L_0x223a9f0, C4<0>, C4<0>; +L_0x223ac10 .delay (50000,50000,50000) L_0x223ac10/d; +L_0x223ad50/d .functor OR 1, L_0x223ac10, L_0x223aaa0, C4<0>, C4<0>; +L_0x223ad50 .delay (50000,50000,50000) L_0x223ad50/d; +L_0x223ae90/d .functor OR 1, L_0x223b690, L_0x223b730, C4<0>, C4<0>; +L_0x223ae90 .delay (50000,50000,50000) L_0x223ae90/d; +L_0x223af70/d .functor OR 1, L_0x223ae90, L_0x2238b00, C4<0>, C4<0>; +L_0x223af70 .delay (50000,50000,50000) L_0x223af70/d; +L_0x223b060/d .functor NOT 1, L_0x223ad50, C4<0>, C4<0>, C4<0>; +L_0x223b060 .delay (50000,50000,50000) L_0x223b060/d; +L_0x223b190/d .functor AND 1, L_0x223b060, L_0x223af70, C4<1>, C4<1>; +L_0x223b190 .delay (50000,50000,50000) L_0x223b190/d; +L_0x223b290/d .functor AND 1, L_0x223b690, L_0x223b730, C4<1>, C4<1>; +L_0x223b290 .delay (50000,50000,50000) L_0x223b290/d; +L_0x223b4b0/d .functor AND 1, L_0x223b290, L_0x2238b00, C4<1>, C4<1>; +L_0x223b4b0 .delay (50000,50000,50000) L_0x223b4b0/d; +L_0x223b550/d .functor OR 1, L_0x223b190, L_0x223b4b0, C4<0>, C4<0>; +L_0x223b550 .delay (50000,50000,50000) L_0x223b550/d; +v0x220bcf0_0 .net "a", 0 0, L_0x223b690; 1 drivers +v0x220bdb0_0 .net "ab", 0 0, L_0x22357d0; 1 drivers +v0x220be50_0 .net "acarryin", 0 0, L_0x223a9f0; 1 drivers +v0x220bef0_0 .net "andall", 0 0, L_0x223b4b0; 1 drivers +v0x220bf70_0 .net "andsingleintermediate", 0 0, L_0x223b290; 1 drivers +v0x220c010_0 .net "andsumintermediate", 0 0, L_0x223b190; 1 drivers +v0x220c0b0_0 .net "b", 0 0, L_0x223b730; 1 drivers +v0x220c150_0 .net "bcarryin", 0 0, L_0x223aaa0; 1 drivers +v0x220c1f0_0 .alias "carryin", 0 0, v0x221eb70_0; +v0x220c290_0 .alias "carryout", 0 0, v0x220d0f0_0; +v0x220c310_0 .net "invcarryout", 0 0, L_0x223b060; 1 drivers +v0x220c390_0 .net "orall", 0 0, L_0x223af70; 1 drivers +v0x220c430_0 .net "orpairintermediate", 0 0, L_0x223ac10; 1 drivers +v0x220c4d0_0 .net "orsingleintermediate", 0 0, L_0x223ae90; 1 drivers +v0x220c5f0_0 .net "sum", 0 0, L_0x223b550; 1 drivers +S_0x220b170 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x2209aa0; + .timescale -9 -12; +L_0x223b450/d .functor AND 1, L_0x223c610, L_0x223c700, C4<1>, C4<1>; +L_0x223b450 .delay (50000,50000,50000) L_0x223b450/d; +L_0x223b860/d .functor AND 1, L_0x223c610, L_0x223ad50, C4<1>, C4<1>; +L_0x223b860 .delay (50000,50000,50000) L_0x223b860/d; +L_0x223b950/d .functor AND 1, L_0x223c700, L_0x223ad50, C4<1>, C4<1>; +L_0x223b950 .delay (50000,50000,50000) L_0x223b950/d; +L_0x223ba40/d .functor OR 1, L_0x223b450, L_0x223b860, C4<0>, C4<0>; +L_0x223ba40 .delay (50000,50000,50000) L_0x223ba40/d; +L_0x223bb80/d .functor OR 1, L_0x223ba40, L_0x223b950, C4<0>, C4<0>; +L_0x223bb80 .delay (50000,50000,50000) L_0x223bb80/d; +L_0x223bcc0/d .functor OR 1, L_0x223c610, L_0x223c700, C4<0>, C4<0>; +L_0x223bcc0 .delay (50000,50000,50000) L_0x223bcc0/d; +L_0x223bda0/d .functor OR 1, L_0x223bcc0, L_0x223ad50, C4<0>, C4<0>; +L_0x223bda0 .delay (50000,50000,50000) L_0x223bda0/d; +L_0x223be90/d .functor NOT 1, L_0x223bb80, C4<0>, C4<0>, C4<0>; +L_0x223be90 .delay (50000,50000,50000) L_0x223be90/d; +L_0x223bfc0/d .functor AND 1, L_0x223be90, L_0x223bda0, C4<1>, C4<1>; +L_0x223bfc0 .delay (50000,50000,50000) L_0x223bfc0/d; +L_0x223c0c0/d .functor AND 1, L_0x223c610, L_0x223c700, C4<1>, C4<1>; +L_0x223c0c0 .delay (50000,50000,50000) L_0x223c0c0/d; +L_0x223c2e0/d .functor AND 1, L_0x223c0c0, L_0x223ad50, C4<1>, C4<1>; +L_0x223c2e0 .delay (50000,50000,50000) L_0x223c2e0/d; +L_0x223c450/d .functor OR 1, L_0x223bfc0, L_0x223c2e0, C4<0>, C4<0>; +L_0x223c450 .delay (50000,50000,50000) L_0x223c450/d; +v0x220b260_0 .net "a", 0 0, L_0x223c610; 1 drivers +v0x220b320_0 .net "ab", 0 0, L_0x223b450; 1 drivers +v0x220b3c0_0 .net "acarryin", 0 0, L_0x223b860; 1 drivers +v0x220b460_0 .net "andall", 0 0, L_0x223c2e0; 1 drivers +v0x220b4e0_0 .net "andsingleintermediate", 0 0, L_0x223c0c0; 1 drivers +v0x220b580_0 .net "andsumintermediate", 0 0, L_0x223bfc0; 1 drivers +v0x220b620_0 .net "b", 0 0, L_0x223c700; 1 drivers +v0x220b6c0_0 .net "bcarryin", 0 0, L_0x223b950; 1 drivers +v0x220b760_0 .alias "carryin", 0 0, v0x220d0f0_0; +v0x220b800_0 .alias "carryout", 0 0, v0x220d2c0_0; +v0x220b880_0 .net "invcarryout", 0 0, L_0x223be90; 1 drivers +v0x220b900_0 .net "orall", 0 0, L_0x223bda0; 1 drivers +v0x220b9a0_0 .net "orpairintermediate", 0 0, L_0x223ba40; 1 drivers +v0x220ba40_0 .net "orsingleintermediate", 0 0, L_0x223bcc0; 1 drivers +v0x220bb60_0 .net "sum", 0 0, L_0x223c450; 1 drivers +S_0x220a690 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x2209aa0; + .timescale -9 -12; +L_0x223c280/d .functor AND 1, L_0x223d620, L_0x223d710, C4<1>, C4<1>; +L_0x223c280 .delay (50000,50000,50000) L_0x223c280/d; +L_0x223c8c0/d .functor AND 1, L_0x223d620, L_0x223bb80, C4<1>, C4<1>; +L_0x223c8c0 .delay (50000,50000,50000) L_0x223c8c0/d; +L_0x223c9b0/d .functor AND 1, L_0x223d710, L_0x223bb80, C4<1>, C4<1>; +L_0x223c9b0 .delay (50000,50000,50000) L_0x223c9b0/d; +L_0x223caa0/d .functor OR 1, L_0x223c280, L_0x223c8c0, C4<0>, C4<0>; +L_0x223caa0 .delay (50000,50000,50000) L_0x223caa0/d; +L_0x223cbe0/d .functor OR 1, L_0x223caa0, L_0x223c9b0, C4<0>, C4<0>; +L_0x223cbe0 .delay (50000,50000,50000) L_0x223cbe0/d; +L_0x223cd20/d .functor OR 1, L_0x223d620, L_0x223d710, C4<0>, C4<0>; +L_0x223cd20 .delay (50000,50000,50000) L_0x223cd20/d; +L_0x223ce00/d .functor OR 1, L_0x223cd20, L_0x223bb80, C4<0>, C4<0>; +L_0x223ce00 .delay (50000,50000,50000) L_0x223ce00/d; +L_0x223cef0/d .functor NOT 1, L_0x223cbe0, C4<0>, C4<0>, C4<0>; +L_0x223cef0 .delay (50000,50000,50000) L_0x223cef0/d; +L_0x223d020/d .functor AND 1, L_0x223cef0, L_0x223ce00, C4<1>, C4<1>; +L_0x223d020 .delay (50000,50000,50000) L_0x223d020/d; +L_0x223d120/d .functor AND 1, L_0x223d620, L_0x223d710, C4<1>, C4<1>; +L_0x223d120 .delay (50000,50000,50000) L_0x223d120/d; +L_0x223d340/d .functor AND 1, L_0x223d120, L_0x223bb80, C4<1>, C4<1>; +L_0x223d340 .delay (50000,50000,50000) L_0x223d340/d; +L_0x223d4b0/d .functor OR 1, L_0x223d020, L_0x223d340, C4<0>, C4<0>; +L_0x223d4b0 .delay (50000,50000,50000) L_0x223d4b0/d; +v0x220a780_0 .net "a", 0 0, L_0x223d620; 1 drivers +v0x220a840_0 .net "ab", 0 0, L_0x223c280; 1 drivers +v0x220a8e0_0 .net "acarryin", 0 0, L_0x223c8c0; 1 drivers +v0x220a980_0 .net "andall", 0 0, L_0x223d340; 1 drivers +v0x220aa00_0 .net "andsingleintermediate", 0 0, L_0x223d120; 1 drivers +v0x220aaa0_0 .net "andsumintermediate", 0 0, L_0x223d020; 1 drivers +v0x220ab40_0 .net "b", 0 0, L_0x223d710; 1 drivers +v0x220abe0_0 .net "bcarryin", 0 0, L_0x223c9b0; 1 drivers +v0x220acd0_0 .alias "carryin", 0 0, v0x220d2c0_0; +v0x220ad70_0 .alias "carryout", 0 0, v0x220d3f0_0; +v0x220adf0_0 .net "invcarryout", 0 0, L_0x223cef0; 1 drivers +v0x220ae70_0 .net "orall", 0 0, L_0x223ce00; 1 drivers +v0x220af10_0 .net "orpairintermediate", 0 0, L_0x223caa0; 1 drivers +v0x220afb0_0 .net "orsingleintermediate", 0 0, L_0x223cd20; 1 drivers +v0x220b0d0_0 .net "sum", 0 0, L_0x223d4b0; 1 drivers +S_0x2209b90 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x2209aa0; + .timescale -9 -12; +L_0x223d2e0/d .functor AND 1, L_0x223e5b0, L_0x223e6e0, C4<1>, C4<1>; +L_0x223d2e0 .delay (50000,50000,50000) L_0x223d2e0/d; +L_0x223d800/d .functor AND 1, L_0x223e5b0, L_0x223cbe0, C4<1>, C4<1>; +L_0x223d800 .delay (50000,50000,50000) L_0x223d800/d; +L_0x223d8f0/d .functor AND 1, L_0x223e6e0, L_0x223cbe0, C4<1>, C4<1>; +L_0x223d8f0 .delay (50000,50000,50000) L_0x223d8f0/d; +L_0x223d9e0/d .functor OR 1, L_0x223d2e0, L_0x223d800, C4<0>, C4<0>; +L_0x223d9e0 .delay (50000,50000,50000) L_0x223d9e0/d; +L_0x223db20/d .functor OR 1, L_0x223d9e0, L_0x223d8f0, C4<0>, C4<0>; +L_0x223db20 .delay (50000,50000,50000) L_0x223db20/d; +L_0x223dc60/d .functor OR 1, L_0x223e5b0, L_0x223e6e0, C4<0>, C4<0>; +L_0x223dc60 .delay (50000,50000,50000) L_0x223dc60/d; +L_0x223dd40/d .functor OR 1, L_0x223dc60, L_0x223cbe0, C4<0>, C4<0>; +L_0x223dd40 .delay (50000,50000,50000) L_0x223dd40/d; +L_0x223de30/d .functor NOT 1, L_0x223db20, C4<0>, C4<0>, C4<0>; +L_0x223de30 .delay (50000,50000,50000) L_0x223de30/d; +L_0x223ded0/d .functor AND 1, L_0x223de30, L_0x223dd40, C4<1>, C4<1>; +L_0x223ded0 .delay (50000,50000,50000) L_0x223ded0/d; +L_0x223e020/d .functor AND 1, L_0x223e5b0, L_0x223e6e0, C4<1>, C4<1>; +L_0x223e020 .delay (50000,50000,50000) L_0x223e020/d; +L_0x223e240/d .functor AND 1, L_0x223e020, L_0x223cbe0, C4<1>, C4<1>; +L_0x223e240 .delay (50000,50000,50000) L_0x223e240/d; +L_0x223e3b0/d .functor OR 1, L_0x223ded0, L_0x223e240, C4<0>, C4<0>; +L_0x223e3b0 .delay (50000,50000,50000) L_0x223e3b0/d; +v0x2209c80_0 .net "a", 0 0, L_0x223e5b0; 1 drivers +v0x2209d40_0 .net "ab", 0 0, L_0x223d2e0; 1 drivers +v0x2209de0_0 .net "acarryin", 0 0, L_0x223d800; 1 drivers +v0x2209e80_0 .net "andall", 0 0, L_0x223e240; 1 drivers +v0x2209f00_0 .net "andsingleintermediate", 0 0, L_0x223e020; 1 drivers +v0x2209fa0_0 .net "andsumintermediate", 0 0, L_0x223ded0; 1 drivers +v0x220a040_0 .net "b", 0 0, L_0x223e6e0; 1 drivers +v0x220a0e0_0 .net "bcarryin", 0 0, L_0x223d8f0; 1 drivers +v0x220a1d0_0 .alias "carryin", 0 0, v0x220d3f0_0; +v0x220a270_0 .alias "carryout", 0 0, v0x221e9a0_0; +v0x220a2f0_0 .net "invcarryout", 0 0, L_0x223de30; 1 drivers +v0x220a390_0 .net "orall", 0 0, L_0x223dd40; 1 drivers +v0x220a430_0 .net "orpairintermediate", 0 0, L_0x223d9e0; 1 drivers +v0x220a4d0_0 .net "orsingleintermediate", 0 0, L_0x223dc60; 1 drivers +v0x220a5f0_0 .net "sum", 0 0, L_0x223e3b0; 1 drivers +S_0x2205f90 .scope module, "adder3" "FullAdder4bit" 4 242, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x2243530/d .functor AND 1, L_0x2243c70, L_0x2243d10, C4<1>, C4<1>; +L_0x2243530 .delay (50000,50000,50000) L_0x2243530/d; +L_0x2243db0/d .functor NOR 1, L_0x2243e50, L_0x2243ef0, C4<0>, C4<0>; +L_0x2243db0 .delay (50000,50000,50000) L_0x2243db0/d; +L_0x2244020/d .functor AND 1, L_0x2244110, L_0x22441b0, C4<1>, C4<1>; +L_0x2244020 .delay (50000,50000,50000) L_0x2244020/d; +L_0x2243f90/d .functor NOR 1, L_0x22443d0, L_0x2244580, C4<0>, C4<0>; +L_0x2243f90 .delay (50000,50000,50000) L_0x2243f90/d; +L_0x22442a0/d .functor OR 1, L_0x2243530, L_0x2243db0, C4<0>, C4<0>; +L_0x22442a0 .delay (50000,50000,50000) L_0x22442a0/d; +L_0x22447c0/d .functor NOR 1, L_0x2244020, L_0x2243f90, C4<0>, C4<0>; +L_0x22447c0 .delay (50000,50000,50000) L_0x22447c0/d; +L_0x2244900/d .functor AND 1, L_0x22442a0, L_0x22447c0, C4<1>, C4<1>; +L_0x2244900 .delay (50000,50000,50000) L_0x2244900/d; +v0x2208b80_0 .net *"_s25", 0 0, L_0x2243c70; 1 drivers +v0x2208c40_0 .net *"_s27", 0 0, L_0x2243d10; 1 drivers +v0x2208ce0_0 .net *"_s29", 0 0, L_0x2243e50; 1 drivers +v0x2208d80_0 .net *"_s31", 0 0, L_0x2243ef0; 1 drivers +v0x2208e00_0 .net *"_s33", 0 0, L_0x2244110; 1 drivers +v0x2208ea0_0 .net *"_s35", 0 0, L_0x22441b0; 1 drivers +v0x2208f40_0 .net *"_s37", 0 0, L_0x22443d0; 1 drivers +v0x2208fe0_0 .net *"_s39", 0 0, L_0x2244580; 1 drivers +v0x2209080_0 .net "a", 3 0, L_0x223f900; 1 drivers +v0x2209120_0 .net "aandb", 0 0, L_0x2243530; 1 drivers +v0x22091c0_0 .net "abandnoror", 0 0, L_0x22442a0; 1 drivers +v0x2209260_0 .net "anorb", 0 0, L_0x2243db0; 1 drivers +v0x2209300_0 .net "b", 3 0, L_0x223f9a0; 1 drivers +v0x22093a0_0 .net "bandsum", 0 0, L_0x2244020; 1 drivers +v0x22094c0_0 .net "bnorsum", 0 0, L_0x2243f90; 1 drivers +v0x2209560_0 .net "bsumandnornor", 0 0, L_0x22447c0; 1 drivers +v0x2209420_0 .alias "carryin", 0 0, v0x221e9a0_0; +v0x2209690_0 .alias "carryout", 0 0, v0x221eab0_0; +v0x22095e0_0 .net "carryout1", 0 0, L_0x223fd60; 1 drivers +v0x22097b0_0 .net "carryout2", 0 0, L_0x2240b90; 1 drivers +v0x22098e0_0 .net "carryout3", 0 0, L_0x2241d10; 1 drivers +v0x2209960_0 .alias "overflow", 0 0, v0x221bb00_0; +v0x2209830_0 .net8 "sum", 3 0, RS_0x7f8758e2f7e8; 4 drivers +L_0x2240600 .part/pv L_0x2240560, 0, 1, 4; +L_0x22406a0 .part L_0x223f900, 0, 1; +L_0x2240740 .part L_0x223f9a0, 0, 1; +L_0x2241610 .part/pv L_0x2241500, 1, 1, 4; +L_0x2241700 .part L_0x223f900, 1, 1; +L_0x22417f0 .part L_0x223f9a0, 1, 1; +L_0x22427d0 .part/pv L_0x22426c0, 2, 1, 4; +L_0x2242870 .part L_0x223f900, 2, 1; +L_0x2242960 .part L_0x223f9a0, 2, 1; +L_0x2243830 .part/pv L_0x2243720, 3, 1, 4; +L_0x2243960 .part L_0x223f900, 3, 1; +L_0x2243a90 .part L_0x223f9a0, 3, 1; +L_0x2243c70 .part L_0x223f900, 3, 1; +L_0x2243d10 .part L_0x223f9a0, 3, 1; +L_0x2243e50 .part L_0x223f900, 3, 1; +L_0x2243ef0 .part L_0x223f9a0, 3, 1; +L_0x2244110 .part L_0x223f9a0, 3, 1; +L_0x22441b0 .part RS_0x7f8758e2f7e8, 3, 1; +L_0x22443d0 .part L_0x223f9a0, 3, 1; +L_0x2244580 .part RS_0x7f8758e2f7e8, 3, 1; +S_0x22080f0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x2205f90; + .timescale -9 -12; +L_0x223a840/d .functor AND 1, L_0x22406a0, L_0x2240740, C4<1>, C4<1>; +L_0x223a840 .delay (50000,50000,50000) L_0x223a840/d; +L_0x223a8e0/d .functor AND 1, L_0x22406a0, L_0x223db20, C4<1>, C4<1>; +L_0x223a8e0 .delay (50000,50000,50000) L_0x223a8e0/d; +L_0x223a980/d .functor AND 1, L_0x2240740, L_0x223db20, C4<1>, C4<1>; +L_0x223a980 .delay (50000,50000,50000) L_0x223a980/d; +L_0x223fc70/d .functor OR 1, L_0x223a840, L_0x223a8e0, C4<0>, C4<0>; +L_0x223fc70 .delay (50000,50000,50000) L_0x223fc70/d; +L_0x223fd60/d .functor OR 1, L_0x223fc70, L_0x223a980, C4<0>, C4<0>; +L_0x223fd60 .delay (50000,50000,50000) L_0x223fd60/d; +L_0x223fea0/d .functor OR 1, L_0x22406a0, L_0x2240740, C4<0>, C4<0>; +L_0x223fea0 .delay (50000,50000,50000) L_0x223fea0/d; +L_0x223ff80/d .functor OR 1, L_0x223fea0, L_0x223db20, C4<0>, C4<0>; +L_0x223ff80 .delay (50000,50000,50000) L_0x223ff80/d; +L_0x2240070/d .functor NOT 1, L_0x223fd60, C4<0>, C4<0>, C4<0>; +L_0x2240070 .delay (50000,50000,50000) L_0x2240070/d; +L_0x22401a0/d .functor AND 1, L_0x2240070, L_0x223ff80, C4<1>, C4<1>; +L_0x22401a0 .delay (50000,50000,50000) L_0x22401a0/d; +L_0x22402a0/d .functor AND 1, L_0x22406a0, L_0x2240740, C4<1>, C4<1>; +L_0x22402a0 .delay (50000,50000,50000) L_0x22402a0/d; +L_0x22404c0/d .functor AND 1, L_0x22402a0, L_0x223db20, C4<1>, C4<1>; +L_0x22404c0 .delay (50000,50000,50000) L_0x22404c0/d; +L_0x2240560/d .functor OR 1, L_0x22401a0, L_0x22404c0, C4<0>, C4<0>; +L_0x2240560 .delay (50000,50000,50000) L_0x2240560/d; +v0x22081e0_0 .net "a", 0 0, L_0x22406a0; 1 drivers +v0x22082a0_0 .net "ab", 0 0, L_0x223a840; 1 drivers +v0x2208340_0 .net "acarryin", 0 0, L_0x223a8e0; 1 drivers +v0x22083e0_0 .net "andall", 0 0, L_0x22404c0; 1 drivers +v0x2208460_0 .net "andsingleintermediate", 0 0, L_0x22402a0; 1 drivers +v0x2208500_0 .net "andsumintermediate", 0 0, L_0x22401a0; 1 drivers +v0x22085a0_0 .net "b", 0 0, L_0x2240740; 1 drivers +v0x2208640_0 .net "bcarryin", 0 0, L_0x223a980; 1 drivers +v0x22086e0_0 .alias "carryin", 0 0, v0x221e9a0_0; +v0x2208780_0 .alias "carryout", 0 0, v0x22095e0_0; +v0x2208800_0 .net "invcarryout", 0 0, L_0x2240070; 1 drivers +v0x2208880_0 .net "orall", 0 0, L_0x223ff80; 1 drivers +v0x2208920_0 .net "orpairintermediate", 0 0, L_0x223fc70; 1 drivers +v0x22089c0_0 .net "orsingleintermediate", 0 0, L_0x223fea0; 1 drivers +v0x2208ae0_0 .net "sum", 0 0, L_0x2240560; 1 drivers +S_0x2207660 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x2205f90; + .timescale -9 -12; +L_0x2240460/d .functor AND 1, L_0x2241700, L_0x22417f0, C4<1>, C4<1>; +L_0x2240460 .delay (50000,50000,50000) L_0x2240460/d; +L_0x2240870/d .functor AND 1, L_0x2241700, L_0x223fd60, C4<1>, C4<1>; +L_0x2240870 .delay (50000,50000,50000) L_0x2240870/d; +L_0x2240960/d .functor AND 1, L_0x22417f0, L_0x223fd60, C4<1>, C4<1>; +L_0x2240960 .delay (50000,50000,50000) L_0x2240960/d; +L_0x2240a50/d .functor OR 1, L_0x2240460, L_0x2240870, C4<0>, C4<0>; +L_0x2240a50 .delay (50000,50000,50000) L_0x2240a50/d; +L_0x2240b90/d .functor OR 1, L_0x2240a50, L_0x2240960, C4<0>, C4<0>; +L_0x2240b90 .delay (50000,50000,50000) L_0x2240b90/d; +L_0x2240cd0/d .functor OR 1, L_0x2241700, L_0x22417f0, C4<0>, C4<0>; +L_0x2240cd0 .delay (50000,50000,50000) L_0x2240cd0/d; +L_0x2240db0/d .functor OR 1, L_0x2240cd0, L_0x223fd60, C4<0>, C4<0>; +L_0x2240db0 .delay (50000,50000,50000) L_0x2240db0/d; +L_0x2240ec0/d .functor NOT 1, L_0x2240b90, C4<0>, C4<0>, C4<0>; +L_0x2240ec0 .delay (50000,50000,50000) L_0x2240ec0/d; +L_0x2241010/d .functor AND 1, L_0x2240ec0, L_0x2240db0, C4<1>, C4<1>; +L_0x2241010 .delay (50000,50000,50000) L_0x2241010/d; +L_0x2241130/d .functor AND 1, L_0x2241700, L_0x22417f0, C4<1>, C4<1>; +L_0x2241130 .delay (50000,50000,50000) L_0x2241130/d; +L_0x2241370/d .functor AND 1, L_0x2241130, L_0x223fd60, C4<1>, C4<1>; +L_0x2241370 .delay (50000,50000,50000) L_0x2241370/d; +L_0x2241500/d .functor OR 1, L_0x2241010, L_0x2241370, C4<0>, C4<0>; +L_0x2241500 .delay (50000,50000,50000) L_0x2241500/d; +v0x2207750_0 .net "a", 0 0, L_0x2241700; 1 drivers +v0x2207810_0 .net "ab", 0 0, L_0x2240460; 1 drivers +v0x22078b0_0 .net "acarryin", 0 0, L_0x2240870; 1 drivers +v0x2207950_0 .net "andall", 0 0, L_0x2241370; 1 drivers +v0x22079d0_0 .net "andsingleintermediate", 0 0, L_0x2241130; 1 drivers +v0x2207a70_0 .net "andsumintermediate", 0 0, L_0x2241010; 1 drivers +v0x2207b10_0 .net "b", 0 0, L_0x22417f0; 1 drivers +v0x2207bb0_0 .net "bcarryin", 0 0, L_0x2240960; 1 drivers +v0x2207c50_0 .alias "carryin", 0 0, v0x22095e0_0; +v0x2207cf0_0 .alias "carryout", 0 0, v0x22097b0_0; +v0x2207d70_0 .net "invcarryout", 0 0, L_0x2240ec0; 1 drivers +v0x2207df0_0 .net "orall", 0 0, L_0x2240db0; 1 drivers +v0x2207e90_0 .net "orpairintermediate", 0 0, L_0x2240a50; 1 drivers +v0x2207f30_0 .net "orsingleintermediate", 0 0, L_0x2240cd0; 1 drivers +v0x2208050_0 .net "sum", 0 0, L_0x2241500; 1 drivers +S_0x2206b80 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x2205f90; + .timescale -9 -12; +L_0x2241310/d .functor AND 1, L_0x2242870, L_0x2242960, C4<1>, C4<1>; +L_0x2241310 .delay (50000,50000,50000) L_0x2241310/d; +L_0x22419b0/d .functor AND 1, L_0x2242870, L_0x2240b90, C4<1>, C4<1>; +L_0x22419b0 .delay (50000,50000,50000) L_0x22419b0/d; +L_0x2241aa0/d .functor AND 1, L_0x2242960, L_0x2240b90, C4<1>, C4<1>; +L_0x2241aa0 .delay (50000,50000,50000) L_0x2241aa0/d; +L_0x2241bb0/d .functor OR 1, L_0x2241310, L_0x22419b0, C4<0>, C4<0>; +L_0x2241bb0 .delay (50000,50000,50000) L_0x2241bb0/d; +L_0x2241d10/d .functor OR 1, L_0x2241bb0, L_0x2241aa0, C4<0>, C4<0>; +L_0x2241d10 .delay (50000,50000,50000) L_0x2241d10/d; +L_0x2241e70/d .functor OR 1, L_0x2242870, L_0x2242960, C4<0>, C4<0>; +L_0x2241e70 .delay (50000,50000,50000) L_0x2241e70/d; +L_0x2241f70/d .functor OR 1, L_0x2241e70, L_0x2240b90, C4<0>, C4<0>; +L_0x2241f70 .delay (50000,50000,50000) L_0x2241f70/d; +L_0x2242080/d .functor NOT 1, L_0x2241d10, C4<0>, C4<0>, C4<0>; +L_0x2242080 .delay (50000,50000,50000) L_0x2242080/d; +L_0x22421d0/d .functor AND 1, L_0x2242080, L_0x2241f70, C4<1>, C4<1>; +L_0x22421d0 .delay (50000,50000,50000) L_0x22421d0/d; +L_0x22422f0/d .functor AND 1, L_0x2242870, L_0x2242960, C4<1>, C4<1>; +L_0x22422f0 .delay (50000,50000,50000) L_0x22422f0/d; +L_0x2242530/d .functor AND 1, L_0x22422f0, L_0x2240b90, C4<1>, C4<1>; +L_0x2242530 .delay (50000,50000,50000) L_0x2242530/d; +L_0x22426c0/d .functor OR 1, L_0x22421d0, L_0x2242530, C4<0>, C4<0>; +L_0x22426c0 .delay (50000,50000,50000) L_0x22426c0/d; +v0x2206c70_0 .net "a", 0 0, L_0x2242870; 1 drivers +v0x2206d30_0 .net "ab", 0 0, L_0x2241310; 1 drivers +v0x2206dd0_0 .net "acarryin", 0 0, L_0x22419b0; 1 drivers +v0x2206e70_0 .net "andall", 0 0, L_0x2242530; 1 drivers +v0x2206ef0_0 .net "andsingleintermediate", 0 0, L_0x22422f0; 1 drivers +v0x2206f90_0 .net "andsumintermediate", 0 0, L_0x22421d0; 1 drivers +v0x2207030_0 .net "b", 0 0, L_0x2242960; 1 drivers +v0x22070d0_0 .net "bcarryin", 0 0, L_0x2241aa0; 1 drivers +v0x22071c0_0 .alias "carryin", 0 0, v0x22097b0_0; +v0x2207260_0 .alias "carryout", 0 0, v0x22098e0_0; +v0x22072e0_0 .net "invcarryout", 0 0, L_0x2242080; 1 drivers +v0x2207360_0 .net "orall", 0 0, L_0x2241f70; 1 drivers +v0x2207400_0 .net "orpairintermediate", 0 0, L_0x2241bb0; 1 drivers +v0x22074a0_0 .net "orsingleintermediate", 0 0, L_0x2241e70; 1 drivers +v0x22075c0_0 .net "sum", 0 0, L_0x22426c0; 1 drivers +S_0x2206080 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x2205f90; + .timescale -9 -12; +L_0x22424d0/d .functor AND 1, L_0x2243960, L_0x2243a90, C4<1>, C4<1>; +L_0x22424d0 .delay (50000,50000,50000) L_0x22424d0/d; +L_0x2242a50/d .functor AND 1, L_0x2243960, L_0x2241d10, C4<1>, C4<1>; +L_0x2242a50 .delay (50000,50000,50000) L_0x2242a50/d; +L_0x2242b40/d .functor AND 1, L_0x2243a90, L_0x2241d10, C4<1>, C4<1>; +L_0x2242b40 .delay (50000,50000,50000) L_0x2242b40/d; +L_0x2242c50/d .functor OR 1, L_0x22424d0, L_0x2242a50, C4<0>, C4<0>; +L_0x2242c50 .delay (50000,50000,50000) L_0x2242c50/d; +L_0x2242db0/d .functor OR 1, L_0x2242c50, L_0x2242b40, C4<0>, C4<0>; +L_0x2242db0 .delay (50000,50000,50000) L_0x2242db0/d; +L_0x2242f10/d .functor OR 1, L_0x2243960, L_0x2243a90, C4<0>, C4<0>; +L_0x2242f10 .delay (50000,50000,50000) L_0x2242f10/d; +L_0x2243010/d .functor OR 1, L_0x2242f10, L_0x2241d10, C4<0>, C4<0>; +L_0x2243010 .delay (50000,50000,50000) L_0x2243010/d; +L_0x2243120/d .functor NOT 1, L_0x2242db0, C4<0>, C4<0>, C4<0>; +L_0x2243120 .delay (50000,50000,50000) L_0x2243120/d; +L_0x22431e0/d .functor AND 1, L_0x2243120, L_0x2243010, C4<1>, C4<1>; +L_0x22431e0 .delay (50000,50000,50000) L_0x22431e0/d; +L_0x2243350/d .functor AND 1, L_0x2243960, L_0x2243a90, C4<1>, C4<1>; +L_0x2243350 .delay (50000,50000,50000) L_0x2243350/d; +L_0x2243590/d .functor AND 1, L_0x2243350, L_0x2241d10, C4<1>, C4<1>; +L_0x2243590 .delay (50000,50000,50000) L_0x2243590/d; +L_0x2243720/d .functor OR 1, L_0x22431e0, L_0x2243590, C4<0>, C4<0>; +L_0x2243720 .delay (50000,50000,50000) L_0x2243720/d; +v0x2206170_0 .net "a", 0 0, L_0x2243960; 1 drivers +v0x2206230_0 .net "ab", 0 0, L_0x22424d0; 1 drivers +v0x22062d0_0 .net "acarryin", 0 0, L_0x2242a50; 1 drivers +v0x2206370_0 .net "andall", 0 0, L_0x2243590; 1 drivers +v0x22063f0_0 .net "andsingleintermediate", 0 0, L_0x2243350; 1 drivers +v0x2206490_0 .net "andsumintermediate", 0 0, L_0x22431e0; 1 drivers +v0x2206530_0 .net "b", 0 0, L_0x2243a90; 1 drivers +v0x22065d0_0 .net "bcarryin", 0 0, L_0x2242b40; 1 drivers +v0x22066c0_0 .alias "carryin", 0 0, v0x22098e0_0; +v0x2206760_0 .alias "carryout", 0 0, v0x221eab0_0; +v0x22067e0_0 .net "invcarryout", 0 0, L_0x2243120; 1 drivers +v0x2206880_0 .net "orall", 0 0, L_0x2243010; 1 drivers +v0x2206920_0 .net "orpairintermediate", 0 0, L_0x2242c50; 1 drivers +v0x22069c0_0 .net "orsingleintermediate", 0 0, L_0x2242f10; 1 drivers +v0x2206ae0_0 .net "sum", 0 0, L_0x2243720; 1 drivers +S_0x2202480 .scope module, "adder4" "FullAdder4bit" 4 243, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x22489e0/d .functor AND 1, L_0x2249120, L_0x22491c0, C4<1>, C4<1>; +L_0x22489e0 .delay (50000,50000,50000) L_0x22489e0/d; +L_0x2249260/d .functor NOR 1, L_0x2249300, L_0x22493a0, C4<0>, C4<0>; +L_0x2249260 .delay (50000,50000,50000) L_0x2249260/d; +L_0x22494d0/d .functor AND 1, L_0x22495c0, L_0x2249660, C4<1>, C4<1>; +L_0x22494d0 .delay (50000,50000,50000) L_0x22494d0/d; +L_0x2249440/d .functor NOR 1, L_0x2249880, L_0x2249a30, C4<0>, C4<0>; +L_0x2249440 .delay (50000,50000,50000) L_0x2249440/d; +L_0x2249750/d .functor OR 1, L_0x22489e0, L_0x2249260, C4<0>, C4<0>; +L_0x2249750 .delay (50000,50000,50000) L_0x2249750/d; +L_0x2249c70/d .functor NOR 1, L_0x22494d0, L_0x2249440, C4<0>, C4<0>; +L_0x2249c70 .delay (50000,50000,50000) L_0x2249c70/d; +L_0x2249db0/d .functor AND 1, L_0x2249750, L_0x2249c70, C4<1>, C4<1>; +L_0x2249db0 .delay (50000,50000,50000) L_0x2249db0/d; +v0x2205070_0 .net *"_s25", 0 0, L_0x2249120; 1 drivers +v0x2205130_0 .net *"_s27", 0 0, L_0x22491c0; 1 drivers +v0x22051d0_0 .net *"_s29", 0 0, L_0x2249300; 1 drivers +v0x2205270_0 .net *"_s31", 0 0, L_0x22493a0; 1 drivers +v0x22052f0_0 .net *"_s33", 0 0, L_0x22495c0; 1 drivers +v0x2205390_0 .net *"_s35", 0 0, L_0x2249660; 1 drivers +v0x2205430_0 .net *"_s37", 0 0, L_0x2249880; 1 drivers +v0x22054d0_0 .net *"_s39", 0 0, L_0x2249a30; 1 drivers +v0x2205570_0 .net "a", 3 0, L_0x2249fe0; 1 drivers +v0x2205610_0 .net "aandb", 0 0, L_0x22489e0; 1 drivers +v0x22056b0_0 .net "abandnoror", 0 0, L_0x2249750; 1 drivers +v0x2205750_0 .net "anorb", 0 0, L_0x2249260; 1 drivers +v0x22057f0_0 .net "b", 3 0, L_0x2244af0; 1 drivers +v0x2205890_0 .net "bandsum", 0 0, L_0x22494d0; 1 drivers +v0x22059b0_0 .net "bnorsum", 0 0, L_0x2249440; 1 drivers +v0x2205a50_0 .net "bsumandnornor", 0 0, L_0x2249c70; 1 drivers +v0x2205910_0 .alias "carryin", 0 0, v0x221eab0_0; +v0x2205b80_0 .alias "carryout", 0 0, v0x221ef00_0; +v0x2205ad0_0 .net "carryout1", 0 0, L_0x22450b0; 1 drivers +v0x2205ca0_0 .net "carryout2", 0 0, L_0x2246020; 1 drivers +v0x2205dd0_0 .net "carryout3", 0 0, L_0x22471c0; 1 drivers +v0x2205e50_0 .alias "overflow", 0 0, v0x221bb80_0; +v0x2205d20_0 .net8 "sum", 3 0, RS_0x7f8758e2ea08; 4 drivers +L_0x2245a50 .part/pv L_0x2245990, 0, 1, 4; +L_0x2245b10 .part L_0x2249fe0, 0, 1; +L_0x2245bb0 .part L_0x2244af0, 0, 1; +L_0x2246ae0 .part/pv L_0x22469d0, 1, 1, 4; +L_0x2246bd0 .part L_0x2249fe0, 1, 1; +L_0x2246cc0 .part L_0x2244af0, 1, 1; +L_0x2247c80 .part/pv L_0x2247b70, 2, 1, 4; +L_0x2247d20 .part L_0x2249fe0, 2, 1; +L_0x2247e10 .part L_0x2244af0, 2, 1; +L_0x2248ce0 .part/pv L_0x2248bd0, 3, 1, 4; +L_0x2248e10 .part L_0x2249fe0, 3, 1; +L_0x2248f40 .part L_0x2244af0, 3, 1; +L_0x2249120 .part L_0x2249fe0, 3, 1; +L_0x22491c0 .part L_0x2244af0, 3, 1; +L_0x2249300 .part L_0x2249fe0, 3, 1; +L_0x22493a0 .part L_0x2244af0, 3, 1; +L_0x22495c0 .part L_0x2244af0, 3, 1; +L_0x2249660 .part RS_0x7f8758e2ea08, 3, 1; +L_0x2249880 .part L_0x2244af0, 3, 1; +L_0x2249a30 .part RS_0x7f8758e2ea08, 3, 1; +S_0x22045e0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x2202480; + .timescale -9 -12; +L_0x223fa40/d .functor AND 1, L_0x2245b10, L_0x2245bb0, C4<1>, C4<1>; +L_0x223fa40 .delay (50000,50000,50000) L_0x223fa40/d; +L_0x223fae0/d .functor AND 1, L_0x2245b10, L_0x2242db0, C4<1>, C4<1>; +L_0x223fae0 .delay (50000,50000,50000) L_0x223fae0/d; +L_0x2244e00/d .functor AND 1, L_0x2245bb0, L_0x2242db0, C4<1>, C4<1>; +L_0x2244e00 .delay (50000,50000,50000) L_0x2244e00/d; +L_0x2244f70/d .functor OR 1, L_0x223fa40, L_0x223fae0, C4<0>, C4<0>; +L_0x2244f70 .delay (50000,50000,50000) L_0x2244f70/d; +L_0x22450b0/d .functor OR 1, L_0x2244f70, L_0x2244e00, C4<0>, C4<0>; +L_0x22450b0 .delay (50000,50000,50000) L_0x22450b0/d; +L_0x2245210/d .functor OR 1, L_0x2245b10, L_0x2245bb0, C4<0>, C4<0>; +L_0x2245210 .delay (50000,50000,50000) L_0x2245210/d; +L_0x2245310/d .functor OR 1, L_0x2245210, L_0x2242db0, C4<0>, C4<0>; +L_0x2245310 .delay (50000,50000,50000) L_0x2245310/d; +L_0x2245420/d .functor NOT 1, L_0x22450b0, C4<0>, C4<0>, C4<0>; +L_0x2245420 .delay (50000,50000,50000) L_0x2245420/d; +L_0x2245570/d .functor AND 1, L_0x2245420, L_0x2245310, C4<1>, C4<1>; +L_0x2245570 .delay (50000,50000,50000) L_0x2245570/d; +L_0x2245690/d .functor AND 1, L_0x2245b10, L_0x2245bb0, C4<1>, C4<1>; +L_0x2245690 .delay (50000,50000,50000) L_0x2245690/d; +L_0x22458d0/d .functor AND 1, L_0x2245690, L_0x2242db0, C4<1>, C4<1>; +L_0x22458d0 .delay (50000,50000,50000) L_0x22458d0/d; +L_0x2245990/d .functor OR 1, L_0x2245570, L_0x22458d0, C4<0>, C4<0>; +L_0x2245990 .delay (50000,50000,50000) L_0x2245990/d; +v0x22046d0_0 .net "a", 0 0, L_0x2245b10; 1 drivers +v0x2204790_0 .net "ab", 0 0, L_0x223fa40; 1 drivers +v0x2204830_0 .net "acarryin", 0 0, L_0x223fae0; 1 drivers +v0x22048d0_0 .net "andall", 0 0, L_0x22458d0; 1 drivers +v0x2204950_0 .net "andsingleintermediate", 0 0, L_0x2245690; 1 drivers +v0x22049f0_0 .net "andsumintermediate", 0 0, L_0x2245570; 1 drivers +v0x2204a90_0 .net "b", 0 0, L_0x2245bb0; 1 drivers +v0x2204b30_0 .net "bcarryin", 0 0, L_0x2244e00; 1 drivers +v0x2204bd0_0 .alias "carryin", 0 0, v0x221eab0_0; +v0x2204c70_0 .alias "carryout", 0 0, v0x2205ad0_0; +v0x2204cf0_0 .net "invcarryout", 0 0, L_0x2245420; 1 drivers +v0x2204d70_0 .net "orall", 0 0, L_0x2245310; 1 drivers +v0x2204e10_0 .net "orpairintermediate", 0 0, L_0x2244f70; 1 drivers +v0x2204eb0_0 .net "orsingleintermediate", 0 0, L_0x2245210; 1 drivers +v0x2204fd0_0 .net "sum", 0 0, L_0x2245990; 1 drivers +S_0x2203b50 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x2202480; + .timescale -9 -12; +L_0x2245870/d .functor AND 1, L_0x2246bd0, L_0x2246cc0, C4<1>, C4<1>; +L_0x2245870 .delay (50000,50000,50000) L_0x2245870/d; +L_0x2245ce0/d .functor AND 1, L_0x2246bd0, L_0x22450b0, C4<1>, C4<1>; +L_0x2245ce0 .delay (50000,50000,50000) L_0x2245ce0/d; +L_0x2245dd0/d .functor AND 1, L_0x2246cc0, L_0x22450b0, C4<1>, C4<1>; +L_0x2245dd0 .delay (50000,50000,50000) L_0x2245dd0/d; +L_0x2245ec0/d .functor OR 1, L_0x2245870, L_0x2245ce0, C4<0>, C4<0>; +L_0x2245ec0 .delay (50000,50000,50000) L_0x2245ec0/d; +L_0x2246020/d .functor OR 1, L_0x2245ec0, L_0x2245dd0, C4<0>, C4<0>; +L_0x2246020 .delay (50000,50000,50000) L_0x2246020/d; +L_0x2246180/d .functor OR 1, L_0x2246bd0, L_0x2246cc0, C4<0>, C4<0>; +L_0x2246180 .delay (50000,50000,50000) L_0x2246180/d; +L_0x2246280/d .functor OR 1, L_0x2246180, L_0x22450b0, C4<0>, C4<0>; +L_0x2246280 .delay (50000,50000,50000) L_0x2246280/d; +L_0x2246390/d .functor NOT 1, L_0x2246020, C4<0>, C4<0>, C4<0>; +L_0x2246390 .delay (50000,50000,50000) L_0x2246390/d; +L_0x22464e0/d .functor AND 1, L_0x2246390, L_0x2246280, C4<1>, C4<1>; +L_0x22464e0 .delay (50000,50000,50000) L_0x22464e0/d; +L_0x2246600/d .functor AND 1, L_0x2246bd0, L_0x2246cc0, C4<1>, C4<1>; +L_0x2246600 .delay (50000,50000,50000) L_0x2246600/d; +L_0x2246840/d .functor AND 1, L_0x2246600, L_0x22450b0, C4<1>, C4<1>; +L_0x2246840 .delay (50000,50000,50000) L_0x2246840/d; +L_0x22469d0/d .functor OR 1, L_0x22464e0, L_0x2246840, C4<0>, C4<0>; +L_0x22469d0 .delay (50000,50000,50000) L_0x22469d0/d; +v0x2203c40_0 .net "a", 0 0, L_0x2246bd0; 1 drivers +v0x2203d00_0 .net "ab", 0 0, L_0x2245870; 1 drivers +v0x2203da0_0 .net "acarryin", 0 0, L_0x2245ce0; 1 drivers +v0x2203e40_0 .net "andall", 0 0, L_0x2246840; 1 drivers +v0x2203ec0_0 .net "andsingleintermediate", 0 0, L_0x2246600; 1 drivers +v0x2203f60_0 .net "andsumintermediate", 0 0, L_0x22464e0; 1 drivers +v0x2204000_0 .net "b", 0 0, L_0x2246cc0; 1 drivers +v0x22040a0_0 .net "bcarryin", 0 0, L_0x2245dd0; 1 drivers +v0x2204140_0 .alias "carryin", 0 0, v0x2205ad0_0; +v0x22041e0_0 .alias "carryout", 0 0, v0x2205ca0_0; +v0x2204260_0 .net "invcarryout", 0 0, L_0x2246390; 1 drivers +v0x22042e0_0 .net "orall", 0 0, L_0x2246280; 1 drivers +v0x2204380_0 .net "orpairintermediate", 0 0, L_0x2245ec0; 1 drivers +v0x2204420_0 .net "orsingleintermediate", 0 0, L_0x2246180; 1 drivers +v0x2204540_0 .net "sum", 0 0, L_0x22469d0; 1 drivers +S_0x2203070 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x2202480; + .timescale -9 -12; +L_0x22467e0/d .functor AND 1, L_0x2247d20, L_0x2247e10, C4<1>, C4<1>; +L_0x22467e0 .delay (50000,50000,50000) L_0x22467e0/d; +L_0x2246e80/d .functor AND 1, L_0x2247d20, L_0x2246020, C4<1>, C4<1>; +L_0x2246e80 .delay (50000,50000,50000) L_0x2246e80/d; +L_0x2246f70/d .functor AND 1, L_0x2247e10, L_0x2246020, C4<1>, C4<1>; +L_0x2246f70 .delay (50000,50000,50000) L_0x2246f70/d; +L_0x2247060/d .functor OR 1, L_0x22467e0, L_0x2246e80, C4<0>, C4<0>; +L_0x2247060 .delay (50000,50000,50000) L_0x2247060/d; +L_0x22471c0/d .functor OR 1, L_0x2247060, L_0x2246f70, C4<0>, C4<0>; +L_0x22471c0 .delay (50000,50000,50000) L_0x22471c0/d; +L_0x2247320/d .functor OR 1, L_0x2247d20, L_0x2247e10, C4<0>, C4<0>; +L_0x2247320 .delay (50000,50000,50000) L_0x2247320/d; +L_0x2247420/d .functor OR 1, L_0x2247320, L_0x2246020, C4<0>, C4<0>; +L_0x2247420 .delay (50000,50000,50000) L_0x2247420/d; +L_0x2247530/d .functor NOT 1, L_0x22471c0, C4<0>, C4<0>, C4<0>; +L_0x2247530 .delay (50000,50000,50000) L_0x2247530/d; +L_0x2247680/d .functor AND 1, L_0x2247530, L_0x2247420, C4<1>, C4<1>; +L_0x2247680 .delay (50000,50000,50000) L_0x2247680/d; +L_0x22477a0/d .functor AND 1, L_0x2247d20, L_0x2247e10, C4<1>, C4<1>; +L_0x22477a0 .delay (50000,50000,50000) L_0x22477a0/d; +L_0x22479e0/d .functor AND 1, L_0x22477a0, L_0x2246020, C4<1>, C4<1>; +L_0x22479e0 .delay (50000,50000,50000) L_0x22479e0/d; +L_0x2247b70/d .functor OR 1, L_0x2247680, L_0x22479e0, C4<0>, C4<0>; +L_0x2247b70 .delay (50000,50000,50000) L_0x2247b70/d; +v0x2203160_0 .net "a", 0 0, L_0x2247d20; 1 drivers +v0x2203220_0 .net "ab", 0 0, L_0x22467e0; 1 drivers +v0x22032c0_0 .net "acarryin", 0 0, L_0x2246e80; 1 drivers +v0x2203360_0 .net "andall", 0 0, L_0x22479e0; 1 drivers +v0x22033e0_0 .net "andsingleintermediate", 0 0, L_0x22477a0; 1 drivers +v0x2203480_0 .net "andsumintermediate", 0 0, L_0x2247680; 1 drivers +v0x2203520_0 .net "b", 0 0, L_0x2247e10; 1 drivers +v0x22035c0_0 .net "bcarryin", 0 0, L_0x2246f70; 1 drivers +v0x22036b0_0 .alias "carryin", 0 0, v0x2205ca0_0; +v0x2203750_0 .alias "carryout", 0 0, v0x2205dd0_0; +v0x22037d0_0 .net "invcarryout", 0 0, L_0x2247530; 1 drivers +v0x2203850_0 .net "orall", 0 0, L_0x2247420; 1 drivers +v0x22038f0_0 .net "orpairintermediate", 0 0, L_0x2247060; 1 drivers +v0x2203990_0 .net "orsingleintermediate", 0 0, L_0x2247320; 1 drivers +v0x2203ab0_0 .net "sum", 0 0, L_0x2247b70; 1 drivers +S_0x2202570 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x2202480; + .timescale -9 -12; +L_0x2247980/d .functor AND 1, L_0x2248e10, L_0x2248f40, C4<1>, C4<1>; +L_0x2247980 .delay (50000,50000,50000) L_0x2247980/d; +L_0x2247f00/d .functor AND 1, L_0x2248e10, L_0x22471c0, C4<1>, C4<1>; +L_0x2247f00 .delay (50000,50000,50000) L_0x2247f00/d; +L_0x2247ff0/d .functor AND 1, L_0x2248f40, L_0x22471c0, C4<1>, C4<1>; +L_0x2247ff0 .delay (50000,50000,50000) L_0x2247ff0/d; +L_0x2248100/d .functor OR 1, L_0x2247980, L_0x2247f00, C4<0>, C4<0>; +L_0x2248100 .delay (50000,50000,50000) L_0x2248100/d; +L_0x2248260/d .functor OR 1, L_0x2248100, L_0x2247ff0, C4<0>, C4<0>; +L_0x2248260 .delay (50000,50000,50000) L_0x2248260/d; +L_0x22483c0/d .functor OR 1, L_0x2248e10, L_0x2248f40, C4<0>, C4<0>; +L_0x22483c0 .delay (50000,50000,50000) L_0x22483c0/d; +L_0x22484c0/d .functor OR 1, L_0x22483c0, L_0x22471c0, C4<0>, C4<0>; +L_0x22484c0 .delay (50000,50000,50000) L_0x22484c0/d; +L_0x22485d0/d .functor NOT 1, L_0x2248260, C4<0>, C4<0>, C4<0>; +L_0x22485d0 .delay (50000,50000,50000) L_0x22485d0/d; +L_0x2248690/d .functor AND 1, L_0x22485d0, L_0x22484c0, C4<1>, C4<1>; +L_0x2248690 .delay (50000,50000,50000) L_0x2248690/d; +L_0x2248800/d .functor AND 1, L_0x2248e10, L_0x2248f40, C4<1>, C4<1>; +L_0x2248800 .delay (50000,50000,50000) L_0x2248800/d; +L_0x2248a40/d .functor AND 1, L_0x2248800, L_0x22471c0, C4<1>, C4<1>; +L_0x2248a40 .delay (50000,50000,50000) L_0x2248a40/d; +L_0x2248bd0/d .functor OR 1, L_0x2248690, L_0x2248a40, C4<0>, C4<0>; +L_0x2248bd0 .delay (50000,50000,50000) L_0x2248bd0/d; +v0x2202660_0 .net "a", 0 0, L_0x2248e10; 1 drivers +v0x2202720_0 .net "ab", 0 0, L_0x2247980; 1 drivers +v0x22027c0_0 .net "acarryin", 0 0, L_0x2247f00; 1 drivers +v0x2202860_0 .net "andall", 0 0, L_0x2248a40; 1 drivers +v0x22028e0_0 .net "andsingleintermediate", 0 0, L_0x2248800; 1 drivers +v0x2202980_0 .net "andsumintermediate", 0 0, L_0x2248690; 1 drivers +v0x2202a20_0 .net "b", 0 0, L_0x2248f40; 1 drivers +v0x2202ac0_0 .net "bcarryin", 0 0, L_0x2247ff0; 1 drivers +v0x2202bb0_0 .alias "carryin", 0 0, v0x2205dd0_0; +v0x2202c50_0 .alias "carryout", 0 0, v0x221ef00_0; +v0x2202cd0_0 .net "invcarryout", 0 0, L_0x22485d0; 1 drivers +v0x2202d70_0 .net "orall", 0 0, L_0x22484c0; 1 drivers +v0x2202e10_0 .net "orpairintermediate", 0 0, L_0x2248100; 1 drivers +v0x2202eb0_0 .net "orsingleintermediate", 0 0, L_0x22483c0; 1 drivers +v0x2202fd0_0 .net "sum", 0 0, L_0x2248bd0; 1 drivers +S_0x21fe970 .scope module, "adder5" "FullAdder4bit" 4 244, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x224ded0/d .functor AND 1, L_0x224e610, L_0x224e6b0, C4<1>, C4<1>; +L_0x224ded0 .delay (50000,50000,50000) L_0x224ded0/d; +L_0x224e750/d .functor NOR 1, L_0x224e7f0, L_0x224e890, C4<0>, C4<0>; +L_0x224e750 .delay (50000,50000,50000) L_0x224e750/d; +L_0x224e9c0/d .functor AND 1, L_0x224eab0, L_0x224eb50, C4<1>, C4<1>; +L_0x224e9c0 .delay (50000,50000,50000) L_0x224e9c0/d; +L_0x224e930/d .functor NOR 1, L_0x224ed70, L_0x224ef20, C4<0>, C4<0>; +L_0x224e930 .delay (50000,50000,50000) L_0x224e930/d; +L_0x224ec40/d .functor OR 1, L_0x224ded0, L_0x224e750, C4<0>, C4<0>; +L_0x224ec40 .delay (50000,50000,50000) L_0x224ec40/d; +L_0x224f160/d .functor NOR 1, L_0x224e9c0, L_0x224e930, C4<0>, C4<0>; +L_0x224f160 .delay (50000,50000,50000) L_0x224f160/d; +L_0x224f2a0/d .functor AND 1, L_0x224ec40, L_0x224f160, C4<1>, C4<1>; +L_0x224f2a0 .delay (50000,50000,50000) L_0x224f2a0/d; +v0x2201560_0 .net *"_s25", 0 0, L_0x224e610; 1 drivers +v0x2201620_0 .net *"_s27", 0 0, L_0x224e6b0; 1 drivers +v0x22016c0_0 .net *"_s29", 0 0, L_0x224e7f0; 1 drivers +v0x2201760_0 .net *"_s31", 0 0, L_0x224e890; 1 drivers +v0x22017e0_0 .net *"_s33", 0 0, L_0x224eab0; 1 drivers +v0x2201880_0 .net *"_s35", 0 0, L_0x224eb50; 1 drivers +v0x2201920_0 .net *"_s37", 0 0, L_0x224ed70; 1 drivers +v0x22019c0_0 .net *"_s39", 0 0, L_0x224ef20; 1 drivers +v0x2201a60_0 .net "a", 3 0, L_0x224a080; 1 drivers +v0x2201b00_0 .net "aandb", 0 0, L_0x224ded0; 1 drivers +v0x2201ba0_0 .net "abandnoror", 0 0, L_0x224ec40; 1 drivers +v0x2201c40_0 .net "anorb", 0 0, L_0x224e750; 1 drivers +v0x2201ce0_0 .net "b", 3 0, L_0x224a120; 1 drivers +v0x2201d80_0 .net "bandsum", 0 0, L_0x224e9c0; 1 drivers +v0x2201ea0_0 .net "bnorsum", 0 0, L_0x224e930; 1 drivers +v0x2201f40_0 .net "bsumandnornor", 0 0, L_0x224f160; 1 drivers +v0x2201e00_0 .alias "carryin", 0 0, v0x221ef00_0; +v0x2202070_0 .alias "carryout", 0 0, v0x221f010_0; +v0x2201fc0_0 .net "carryout1", 0 0, L_0x224a5c0; 1 drivers +v0x2202190_0 .net "carryout2", 0 0, L_0x224b510; 1 drivers +v0x22022c0_0 .net "carryout3", 0 0, L_0x224c6b0; 1 drivers +v0x2202340_0 .alias "overflow", 0 0, v0x221bc30_0; +v0x2202210_0 .net8 "sum", 3 0, RS_0x7f8758e2dc28; 4 drivers +L_0x224af40 .part/pv L_0x224ae80, 0, 1, 4; +L_0x224b000 .part L_0x224a080, 0, 1; +L_0x224b0a0 .part L_0x224a120, 0, 1; +L_0x224bfd0 .part/pv L_0x224bec0, 1, 1, 4; +L_0x224c0c0 .part L_0x224a080, 1, 1; +L_0x224c1b0 .part L_0x224a120, 1, 1; +L_0x224d170 .part/pv L_0x224d060, 2, 1, 4; +L_0x224d210 .part L_0x224a080, 2, 1; +L_0x224d300 .part L_0x224a120, 2, 1; +L_0x224e1d0 .part/pv L_0x224e0c0, 3, 1, 4; +L_0x224e300 .part L_0x224a080, 3, 1; +L_0x224e430 .part L_0x224a120, 3, 1; +L_0x224e610 .part L_0x224a080, 3, 1; +L_0x224e6b0 .part L_0x224a120, 3, 1; +L_0x224e7f0 .part L_0x224a080, 3, 1; +L_0x224e890 .part L_0x224a120, 3, 1; +L_0x224eab0 .part L_0x224a120, 3, 1; +L_0x224eb50 .part RS_0x7f8758e2dc28, 3, 1; +L_0x224ed70 .part L_0x224a120, 3, 1; +L_0x224ef20 .part RS_0x7f8758e2dc28, 3, 1; +S_0x2200ad0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x21fe970; + .timescale -9 -12; +L_0x2244b90/d .functor AND 1, L_0x224b000, L_0x224b0a0, C4<1>, C4<1>; +L_0x2244b90 .delay (50000,50000,50000) L_0x2244b90/d; +L_0x2244c30/d .functor AND 1, L_0x224b000, L_0x2248260, C4<1>, C4<1>; +L_0x2244c30 .delay (50000,50000,50000) L_0x2244c30/d; +L_0x224a310/d .functor AND 1, L_0x224b0a0, L_0x2248260, C4<1>, C4<1>; +L_0x224a310 .delay (50000,50000,50000) L_0x224a310/d; +L_0x224a480/d .functor OR 1, L_0x2244b90, L_0x2244c30, C4<0>, C4<0>; +L_0x224a480 .delay (50000,50000,50000) L_0x224a480/d; +L_0x224a5c0/d .functor OR 1, L_0x224a480, L_0x224a310, C4<0>, C4<0>; +L_0x224a5c0 .delay (50000,50000,50000) L_0x224a5c0/d; +L_0x224a700/d .functor OR 1, L_0x224b000, L_0x224b0a0, C4<0>, C4<0>; +L_0x224a700 .delay (50000,50000,50000) L_0x224a700/d; +L_0x224a800/d .functor OR 1, L_0x224a700, L_0x2248260, C4<0>, C4<0>; +L_0x224a800 .delay (50000,50000,50000) L_0x224a800/d; +L_0x224a910/d .functor NOT 1, L_0x224a5c0, C4<0>, C4<0>, C4<0>; +L_0x224a910 .delay (50000,50000,50000) L_0x224a910/d; +L_0x224aa60/d .functor AND 1, L_0x224a910, L_0x224a800, C4<1>, C4<1>; +L_0x224aa60 .delay (50000,50000,50000) L_0x224aa60/d; +L_0x224ab80/d .functor AND 1, L_0x224b000, L_0x224b0a0, C4<1>, C4<1>; +L_0x224ab80 .delay (50000,50000,50000) L_0x224ab80/d; +L_0x224adc0/d .functor AND 1, L_0x224ab80, L_0x2248260, C4<1>, C4<1>; +L_0x224adc0 .delay (50000,50000,50000) L_0x224adc0/d; +L_0x224ae80/d .functor OR 1, L_0x224aa60, L_0x224adc0, C4<0>, C4<0>; +L_0x224ae80 .delay (50000,50000,50000) L_0x224ae80/d; +v0x2200bc0_0 .net "a", 0 0, L_0x224b000; 1 drivers +v0x2200c80_0 .net "ab", 0 0, L_0x2244b90; 1 drivers +v0x2200d20_0 .net "acarryin", 0 0, L_0x2244c30; 1 drivers +v0x2200dc0_0 .net "andall", 0 0, L_0x224adc0; 1 drivers +v0x2200e40_0 .net "andsingleintermediate", 0 0, L_0x224ab80; 1 drivers +v0x2200ee0_0 .net "andsumintermediate", 0 0, L_0x224aa60; 1 drivers +v0x2200f80_0 .net "b", 0 0, L_0x224b0a0; 1 drivers +v0x2201020_0 .net "bcarryin", 0 0, L_0x224a310; 1 drivers +v0x22010c0_0 .alias "carryin", 0 0, v0x221ef00_0; +v0x2201160_0 .alias "carryout", 0 0, v0x2201fc0_0; +v0x22011e0_0 .net "invcarryout", 0 0, L_0x224a910; 1 drivers +v0x2201260_0 .net "orall", 0 0, L_0x224a800; 1 drivers +v0x2201300_0 .net "orpairintermediate", 0 0, L_0x224a480; 1 drivers +v0x22013a0_0 .net "orsingleintermediate", 0 0, L_0x224a700; 1 drivers +v0x22014c0_0 .net "sum", 0 0, L_0x224ae80; 1 drivers +S_0x2200040 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x21fe970; + .timescale -9 -12; +L_0x224ad60/d .functor AND 1, L_0x224c0c0, L_0x224c1b0, C4<1>, C4<1>; +L_0x224ad60 .delay (50000,50000,50000) L_0x224ad60/d; +L_0x224b1d0/d .functor AND 1, L_0x224c0c0, L_0x224a5c0, C4<1>, C4<1>; +L_0x224b1d0 .delay (50000,50000,50000) L_0x224b1d0/d; +L_0x224b2c0/d .functor AND 1, L_0x224c1b0, L_0x224a5c0, C4<1>, C4<1>; +L_0x224b2c0 .delay (50000,50000,50000) L_0x224b2c0/d; +L_0x224b3b0/d .functor OR 1, L_0x224ad60, L_0x224b1d0, C4<0>, C4<0>; +L_0x224b3b0 .delay (50000,50000,50000) L_0x224b3b0/d; +L_0x224b510/d .functor OR 1, L_0x224b3b0, L_0x224b2c0, C4<0>, C4<0>; +L_0x224b510 .delay (50000,50000,50000) L_0x224b510/d; +L_0x224b670/d .functor OR 1, L_0x224c0c0, L_0x224c1b0, C4<0>, C4<0>; +L_0x224b670 .delay (50000,50000,50000) L_0x224b670/d; +L_0x224b770/d .functor OR 1, L_0x224b670, L_0x224a5c0, C4<0>, C4<0>; +L_0x224b770 .delay (50000,50000,50000) L_0x224b770/d; +L_0x224b880/d .functor NOT 1, L_0x224b510, C4<0>, C4<0>, C4<0>; +L_0x224b880 .delay (50000,50000,50000) L_0x224b880/d; +L_0x224b9d0/d .functor AND 1, L_0x224b880, L_0x224b770, C4<1>, C4<1>; +L_0x224b9d0 .delay (50000,50000,50000) L_0x224b9d0/d; +L_0x224baf0/d .functor AND 1, L_0x224c0c0, L_0x224c1b0, C4<1>, C4<1>; +L_0x224baf0 .delay (50000,50000,50000) L_0x224baf0/d; +L_0x224bd30/d .functor AND 1, L_0x224baf0, L_0x224a5c0, C4<1>, C4<1>; +L_0x224bd30 .delay (50000,50000,50000) L_0x224bd30/d; +L_0x224bec0/d .functor OR 1, L_0x224b9d0, L_0x224bd30, C4<0>, C4<0>; +L_0x224bec0 .delay (50000,50000,50000) L_0x224bec0/d; +v0x2200130_0 .net "a", 0 0, L_0x224c0c0; 1 drivers +v0x22001f0_0 .net "ab", 0 0, L_0x224ad60; 1 drivers +v0x2200290_0 .net "acarryin", 0 0, L_0x224b1d0; 1 drivers +v0x2200330_0 .net "andall", 0 0, L_0x224bd30; 1 drivers +v0x22003b0_0 .net "andsingleintermediate", 0 0, L_0x224baf0; 1 drivers +v0x2200450_0 .net "andsumintermediate", 0 0, L_0x224b9d0; 1 drivers +v0x22004f0_0 .net "b", 0 0, L_0x224c1b0; 1 drivers +v0x2200590_0 .net "bcarryin", 0 0, L_0x224b2c0; 1 drivers +v0x2200630_0 .alias "carryin", 0 0, v0x2201fc0_0; +v0x22006d0_0 .alias "carryout", 0 0, v0x2202190_0; +v0x2200750_0 .net "invcarryout", 0 0, L_0x224b880; 1 drivers +v0x22007d0_0 .net "orall", 0 0, L_0x224b770; 1 drivers +v0x2200870_0 .net "orpairintermediate", 0 0, L_0x224b3b0; 1 drivers +v0x2200910_0 .net "orsingleintermediate", 0 0, L_0x224b670; 1 drivers +v0x2200a30_0 .net "sum", 0 0, L_0x224bec0; 1 drivers +S_0x21ff560 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x21fe970; + .timescale -9 -12; +L_0x224bcd0/d .functor AND 1, L_0x224d210, L_0x224d300, C4<1>, C4<1>; +L_0x224bcd0 .delay (50000,50000,50000) L_0x224bcd0/d; +L_0x224c370/d .functor AND 1, L_0x224d210, L_0x224b510, C4<1>, C4<1>; +L_0x224c370 .delay (50000,50000,50000) L_0x224c370/d; +L_0x224c460/d .functor AND 1, L_0x224d300, L_0x224b510, C4<1>, C4<1>; +L_0x224c460 .delay (50000,50000,50000) L_0x224c460/d; +L_0x224c550/d .functor OR 1, L_0x224bcd0, L_0x224c370, C4<0>, C4<0>; +L_0x224c550 .delay (50000,50000,50000) L_0x224c550/d; +L_0x224c6b0/d .functor OR 1, L_0x224c550, L_0x224c460, C4<0>, C4<0>; +L_0x224c6b0 .delay (50000,50000,50000) L_0x224c6b0/d; +L_0x224c810/d .functor OR 1, L_0x224d210, L_0x224d300, C4<0>, C4<0>; +L_0x224c810 .delay (50000,50000,50000) L_0x224c810/d; +L_0x224c910/d .functor OR 1, L_0x224c810, L_0x224b510, C4<0>, C4<0>; +L_0x224c910 .delay (50000,50000,50000) L_0x224c910/d; +L_0x224ca20/d .functor NOT 1, L_0x224c6b0, C4<0>, C4<0>, C4<0>; +L_0x224ca20 .delay (50000,50000,50000) L_0x224ca20/d; +L_0x224cb70/d .functor AND 1, L_0x224ca20, L_0x224c910, C4<1>, C4<1>; +L_0x224cb70 .delay (50000,50000,50000) L_0x224cb70/d; +L_0x224cc90/d .functor AND 1, L_0x224d210, L_0x224d300, C4<1>, C4<1>; +L_0x224cc90 .delay (50000,50000,50000) L_0x224cc90/d; +L_0x224ced0/d .functor AND 1, L_0x224cc90, L_0x224b510, C4<1>, C4<1>; +L_0x224ced0 .delay (50000,50000,50000) L_0x224ced0/d; +L_0x224d060/d .functor OR 1, L_0x224cb70, L_0x224ced0, C4<0>, C4<0>; +L_0x224d060 .delay (50000,50000,50000) L_0x224d060/d; +v0x21ff650_0 .net "a", 0 0, L_0x224d210; 1 drivers +v0x21ff710_0 .net "ab", 0 0, L_0x224bcd0; 1 drivers +v0x21ff7b0_0 .net "acarryin", 0 0, L_0x224c370; 1 drivers +v0x21ff850_0 .net "andall", 0 0, L_0x224ced0; 1 drivers +v0x21ff8d0_0 .net "andsingleintermediate", 0 0, L_0x224cc90; 1 drivers +v0x21ff970_0 .net "andsumintermediate", 0 0, L_0x224cb70; 1 drivers +v0x21ffa10_0 .net "b", 0 0, L_0x224d300; 1 drivers +v0x21ffab0_0 .net "bcarryin", 0 0, L_0x224c460; 1 drivers +v0x21ffba0_0 .alias "carryin", 0 0, v0x2202190_0; +v0x21ffc40_0 .alias "carryout", 0 0, v0x22022c0_0; +v0x21ffcc0_0 .net "invcarryout", 0 0, L_0x224ca20; 1 drivers +v0x21ffd40_0 .net "orall", 0 0, L_0x224c910; 1 drivers +v0x21ffde0_0 .net "orpairintermediate", 0 0, L_0x224c550; 1 drivers +v0x21ffe80_0 .net "orsingleintermediate", 0 0, L_0x224c810; 1 drivers +v0x21fffa0_0 .net "sum", 0 0, L_0x224d060; 1 drivers +S_0x21fea60 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x21fe970; + .timescale -9 -12; +L_0x224ce70/d .functor AND 1, L_0x224e300, L_0x224e430, C4<1>, C4<1>; +L_0x224ce70 .delay (50000,50000,50000) L_0x224ce70/d; +L_0x224d3f0/d .functor AND 1, L_0x224e300, L_0x224c6b0, C4<1>, C4<1>; +L_0x224d3f0 .delay (50000,50000,50000) L_0x224d3f0/d; +L_0x224d4e0/d .functor AND 1, L_0x224e430, L_0x224c6b0, C4<1>, C4<1>; +L_0x224d4e0 .delay (50000,50000,50000) L_0x224d4e0/d; +L_0x224d5f0/d .functor OR 1, L_0x224ce70, L_0x224d3f0, C4<0>, C4<0>; +L_0x224d5f0 .delay (50000,50000,50000) L_0x224d5f0/d; +L_0x224d750/d .functor OR 1, L_0x224d5f0, L_0x224d4e0, C4<0>, C4<0>; +L_0x224d750 .delay (50000,50000,50000) L_0x224d750/d; +L_0x224d8b0/d .functor OR 1, L_0x224e300, L_0x224e430, C4<0>, C4<0>; +L_0x224d8b0 .delay (50000,50000,50000) L_0x224d8b0/d; +L_0x224d9b0/d .functor OR 1, L_0x224d8b0, L_0x224c6b0, C4<0>, C4<0>; +L_0x224d9b0 .delay (50000,50000,50000) L_0x224d9b0/d; +L_0x224dac0/d .functor NOT 1, L_0x224d750, C4<0>, C4<0>, C4<0>; +L_0x224dac0 .delay (50000,50000,50000) L_0x224dac0/d; +L_0x224db80/d .functor AND 1, L_0x224dac0, L_0x224d9b0, C4<1>, C4<1>; +L_0x224db80 .delay (50000,50000,50000) L_0x224db80/d; +L_0x224dcf0/d .functor AND 1, L_0x224e300, L_0x224e430, C4<1>, C4<1>; +L_0x224dcf0 .delay (50000,50000,50000) L_0x224dcf0/d; +L_0x224df30/d .functor AND 1, L_0x224dcf0, L_0x224c6b0, C4<1>, C4<1>; +L_0x224df30 .delay (50000,50000,50000) L_0x224df30/d; +L_0x224e0c0/d .functor OR 1, L_0x224db80, L_0x224df30, C4<0>, C4<0>; +L_0x224e0c0 .delay (50000,50000,50000) L_0x224e0c0/d; +v0x21feb50_0 .net "a", 0 0, L_0x224e300; 1 drivers +v0x21fec10_0 .net "ab", 0 0, L_0x224ce70; 1 drivers +v0x21fecb0_0 .net "acarryin", 0 0, L_0x224d3f0; 1 drivers +v0x21fed50_0 .net "andall", 0 0, L_0x224df30; 1 drivers +v0x21fedd0_0 .net "andsingleintermediate", 0 0, L_0x224dcf0; 1 drivers +v0x21fee70_0 .net "andsumintermediate", 0 0, L_0x224db80; 1 drivers +v0x21fef10_0 .net "b", 0 0, L_0x224e430; 1 drivers +v0x21fefb0_0 .net "bcarryin", 0 0, L_0x224d4e0; 1 drivers +v0x21ff0a0_0 .alias "carryin", 0 0, v0x22022c0_0; +v0x21ff140_0 .alias "carryout", 0 0, v0x221f010_0; +v0x21ff1c0_0 .net "invcarryout", 0 0, L_0x224dac0; 1 drivers +v0x21ff260_0 .net "orall", 0 0, L_0x224d9b0; 1 drivers +v0x21ff300_0 .net "orpairintermediate", 0 0, L_0x224d5f0; 1 drivers +v0x21ff3a0_0 .net "orsingleintermediate", 0 0, L_0x224d8b0; 1 drivers +v0x21ff4c0_0 .net "sum", 0 0, L_0x224e0c0; 1 drivers +S_0x21faea0 .scope module, "adder6" "FullAdder4bit" 4 245, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x22533f0/d .functor AND 1, L_0x2253b30, L_0x2253bd0, C4<1>, C4<1>; +L_0x22533f0 .delay (50000,50000,50000) L_0x22533f0/d; +L_0x2253c70/d .functor NOR 1, L_0x2253d10, L_0x2253db0, C4<0>, C4<0>; +L_0x2253c70 .delay (50000,50000,50000) L_0x2253c70/d; +L_0x2253ee0/d .functor AND 1, L_0x2253fd0, L_0x2254070, C4<1>, C4<1>; +L_0x2253ee0 .delay (50000,50000,50000) L_0x2253ee0/d; +L_0x2253e50/d .functor NOR 1, L_0x2254290, L_0x2254440, C4<0>, C4<0>; +L_0x2253e50 .delay (50000,50000,50000) L_0x2253e50/d; +L_0x2254160/d .functor OR 1, L_0x22533f0, L_0x2253c70, C4<0>, C4<0>; +L_0x2254160 .delay (50000,50000,50000) L_0x2254160/d; +L_0x2254680/d .functor NOR 1, L_0x2253ee0, L_0x2253e50, C4<0>, C4<0>; +L_0x2254680 .delay (50000,50000,50000) L_0x2254680/d; +L_0x22547c0/d .functor AND 1, L_0x2254160, L_0x2254680, C4<1>, C4<1>; +L_0x22547c0 .delay (50000,50000,50000) L_0x22547c0/d; +v0x21fda50_0 .net *"_s25", 0 0, L_0x2253b30; 1 drivers +v0x21fdb10_0 .net *"_s27", 0 0, L_0x2253bd0; 1 drivers +v0x21fdbb0_0 .net *"_s29", 0 0, L_0x2253d10; 1 drivers +v0x21fdc50_0 .net *"_s31", 0 0, L_0x2253db0; 1 drivers +v0x21fdcd0_0 .net *"_s33", 0 0, L_0x2253fd0; 1 drivers +v0x21fdd70_0 .net *"_s35", 0 0, L_0x2254070; 1 drivers +v0x21fde10_0 .net *"_s37", 0 0, L_0x2254290; 1 drivers +v0x21fdeb0_0 .net *"_s39", 0 0, L_0x2254440; 1 drivers +v0x21fdf50_0 .net "a", 3 0, L_0x2254b00; 1 drivers +v0x21fdff0_0 .net "aandb", 0 0, L_0x22533f0; 1 drivers +v0x21fe090_0 .net "abandnoror", 0 0, L_0x2254160; 1 drivers +v0x21fe130_0 .net "anorb", 0 0, L_0x2253c70; 1 drivers +v0x21fe1d0_0 .net "b", 3 0, L_0x224f4d0; 1 drivers +v0x21fe270_0 .net "bandsum", 0 0, L_0x2253ee0; 1 drivers +v0x21fe390_0 .net "bnorsum", 0 0, L_0x2253e50; 1 drivers +v0x21fe430_0 .net "bsumandnornor", 0 0, L_0x2254680; 1 drivers +v0x21fe2f0_0 .alias "carryin", 0 0, v0x221f010_0; +v0x21fe560_0 .alias "carryout", 0 0, v0x221ec80_0; +v0x21fe4b0_0 .net "carryout1", 0 0, L_0x224faa0; 1 drivers +v0x21fe680_0 .net "carryout2", 0 0, L_0x2250a10; 1 drivers +v0x21fe7b0_0 .net "carryout3", 0 0, L_0x2251bb0; 1 drivers +v0x21fe830_0 .alias "overflow", 0 0, v0x221bcf0_0; +v0x21fe700_0 .net8 "sum", 3 0, RS_0x7f8758e2ce48; 4 drivers +L_0x2250440 .part/pv L_0x2250380, 0, 1, 4; +L_0x2250500 .part L_0x2254b00, 0, 1; +L_0x22505a0 .part L_0x224f4d0, 0, 1; +L_0x22514d0 .part/pv L_0x22513c0, 1, 1, 4; +L_0x22515c0 .part L_0x2254b00, 1, 1; +L_0x22516b0 .part L_0x224f4d0, 1, 1; +L_0x2252670 .part/pv L_0x2252560, 2, 1, 4; +L_0x2252710 .part L_0x2254b00, 2, 1; +L_0x2252800 .part L_0x224f4d0, 2, 1; +L_0x22536f0 .part/pv L_0x22535e0, 3, 1, 4; +L_0x2253820 .part L_0x2254b00, 3, 1; +L_0x2253950 .part L_0x224f4d0, 3, 1; +L_0x2253b30 .part L_0x2254b00, 3, 1; +L_0x2253bd0 .part L_0x224f4d0, 3, 1; +L_0x2253d10 .part L_0x2254b00, 3, 1; +L_0x2253db0 .part L_0x224f4d0, 3, 1; +L_0x2253fd0 .part L_0x224f4d0, 3, 1; +L_0x2254070 .part RS_0x7f8758e2ce48, 3, 1; +L_0x2254290 .part L_0x224f4d0, 3, 1; +L_0x2254440 .part RS_0x7f8758e2ce48, 3, 1; +S_0x21fcfc0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x21faea0; + .timescale -9 -12; +L_0x224a1c0/d .functor AND 1, L_0x2250500, L_0x22505a0, C4<1>, C4<1>; +L_0x224a1c0 .delay (50000,50000,50000) L_0x224a1c0/d; +L_0x224a260/d .functor AND 1, L_0x2250500, L_0x224d750, C4<1>, C4<1>; +L_0x224a260 .delay (50000,50000,50000) L_0x224a260/d; +L_0x224f7d0/d .functor AND 1, L_0x22505a0, L_0x224d750, C4<1>, C4<1>; +L_0x224f7d0 .delay (50000,50000,50000) L_0x224f7d0/d; +L_0x224f940/d .functor OR 1, L_0x224a1c0, L_0x224a260, C4<0>, C4<0>; +L_0x224f940 .delay (50000,50000,50000) L_0x224f940/d; +L_0x224faa0/d .functor OR 1, L_0x224f940, L_0x224f7d0, C4<0>, C4<0>; +L_0x224faa0 .delay (50000,50000,50000) L_0x224faa0/d; +L_0x224fc00/d .functor OR 1, L_0x2250500, L_0x22505a0, C4<0>, C4<0>; +L_0x224fc00 .delay (50000,50000,50000) L_0x224fc00/d; +L_0x224fd00/d .functor OR 1, L_0x224fc00, L_0x224d750, C4<0>, C4<0>; +L_0x224fd00 .delay (50000,50000,50000) L_0x224fd00/d; +L_0x224fe10/d .functor NOT 1, L_0x224faa0, C4<0>, C4<0>, C4<0>; +L_0x224fe10 .delay (50000,50000,50000) L_0x224fe10/d; +L_0x224ff60/d .functor AND 1, L_0x224fe10, L_0x224fd00, C4<1>, C4<1>; +L_0x224ff60 .delay (50000,50000,50000) L_0x224ff60/d; +L_0x2250080/d .functor AND 1, L_0x2250500, L_0x22505a0, C4<1>, C4<1>; +L_0x2250080 .delay (50000,50000,50000) L_0x2250080/d; +L_0x22502c0/d .functor AND 1, L_0x2250080, L_0x224d750, C4<1>, C4<1>; +L_0x22502c0 .delay (50000,50000,50000) L_0x22502c0/d; +L_0x2250380/d .functor OR 1, L_0x224ff60, L_0x22502c0, C4<0>, C4<0>; +L_0x2250380 .delay (50000,50000,50000) L_0x2250380/d; +v0x21fd0b0_0 .net "a", 0 0, L_0x2250500; 1 drivers +v0x21fd170_0 .net "ab", 0 0, L_0x224a1c0; 1 drivers +v0x21fd210_0 .net "acarryin", 0 0, L_0x224a260; 1 drivers +v0x21fd2b0_0 .net "andall", 0 0, L_0x22502c0; 1 drivers +v0x21fd330_0 .net "andsingleintermediate", 0 0, L_0x2250080; 1 drivers +v0x21fd3d0_0 .net "andsumintermediate", 0 0, L_0x224ff60; 1 drivers +v0x21fd470_0 .net "b", 0 0, L_0x22505a0; 1 drivers +v0x21fd510_0 .net "bcarryin", 0 0, L_0x224f7d0; 1 drivers +v0x21fd5b0_0 .alias "carryin", 0 0, v0x221f010_0; +v0x21fd650_0 .alias "carryout", 0 0, v0x21fe4b0_0; +v0x21fd6d0_0 .net "invcarryout", 0 0, L_0x224fe10; 1 drivers +v0x21fd750_0 .net "orall", 0 0, L_0x224fd00; 1 drivers +v0x21fd7f0_0 .net "orpairintermediate", 0 0, L_0x224f940; 1 drivers +v0x21fd890_0 .net "orsingleintermediate", 0 0, L_0x224fc00; 1 drivers +v0x21fd9b0_0 .net "sum", 0 0, L_0x2250380; 1 drivers +S_0x21fc530 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x21faea0; + .timescale -9 -12; +L_0x2250260/d .functor AND 1, L_0x22515c0, L_0x22516b0, C4<1>, C4<1>; +L_0x2250260 .delay (50000,50000,50000) L_0x2250260/d; +L_0x22506d0/d .functor AND 1, L_0x22515c0, L_0x224faa0, C4<1>, C4<1>; +L_0x22506d0 .delay (50000,50000,50000) L_0x22506d0/d; +L_0x22507c0/d .functor AND 1, L_0x22516b0, L_0x224faa0, C4<1>, C4<1>; +L_0x22507c0 .delay (50000,50000,50000) L_0x22507c0/d; +L_0x22508b0/d .functor OR 1, L_0x2250260, L_0x22506d0, C4<0>, C4<0>; +L_0x22508b0 .delay (50000,50000,50000) L_0x22508b0/d; +L_0x2250a10/d .functor OR 1, L_0x22508b0, L_0x22507c0, C4<0>, C4<0>; +L_0x2250a10 .delay (50000,50000,50000) L_0x2250a10/d; +L_0x2250b70/d .functor OR 1, L_0x22515c0, L_0x22516b0, C4<0>, C4<0>; +L_0x2250b70 .delay (50000,50000,50000) L_0x2250b70/d; +L_0x2250c70/d .functor OR 1, L_0x2250b70, L_0x224faa0, C4<0>, C4<0>; +L_0x2250c70 .delay (50000,50000,50000) L_0x2250c70/d; +L_0x2250d80/d .functor NOT 1, L_0x2250a10, C4<0>, C4<0>, C4<0>; +L_0x2250d80 .delay (50000,50000,50000) L_0x2250d80/d; +L_0x2250ed0/d .functor AND 1, L_0x2250d80, L_0x2250c70, C4<1>, C4<1>; +L_0x2250ed0 .delay (50000,50000,50000) L_0x2250ed0/d; +L_0x2250ff0/d .functor AND 1, L_0x22515c0, L_0x22516b0, C4<1>, C4<1>; +L_0x2250ff0 .delay (50000,50000,50000) L_0x2250ff0/d; +L_0x2251230/d .functor AND 1, L_0x2250ff0, L_0x224faa0, C4<1>, C4<1>; +L_0x2251230 .delay (50000,50000,50000) L_0x2251230/d; +L_0x22513c0/d .functor OR 1, L_0x2250ed0, L_0x2251230, C4<0>, C4<0>; +L_0x22513c0 .delay (50000,50000,50000) L_0x22513c0/d; +v0x21fc620_0 .net "a", 0 0, L_0x22515c0; 1 drivers +v0x21fc6e0_0 .net "ab", 0 0, L_0x2250260; 1 drivers +v0x21fc780_0 .net "acarryin", 0 0, L_0x22506d0; 1 drivers +v0x21fc820_0 .net "andall", 0 0, L_0x2251230; 1 drivers +v0x21fc8a0_0 .net "andsingleintermediate", 0 0, L_0x2250ff0; 1 drivers +v0x21fc940_0 .net "andsumintermediate", 0 0, L_0x2250ed0; 1 drivers +v0x21fc9e0_0 .net "b", 0 0, L_0x22516b0; 1 drivers +v0x21fca80_0 .net "bcarryin", 0 0, L_0x22507c0; 1 drivers +v0x21fcb20_0 .alias "carryin", 0 0, v0x21fe4b0_0; +v0x21fcbc0_0 .alias "carryout", 0 0, v0x21fe680_0; +v0x21fcc40_0 .net "invcarryout", 0 0, L_0x2250d80; 1 drivers +v0x21fccc0_0 .net "orall", 0 0, L_0x2250c70; 1 drivers +v0x21fcd60_0 .net "orpairintermediate", 0 0, L_0x22508b0; 1 drivers +v0x21fce00_0 .net "orsingleintermediate", 0 0, L_0x2250b70; 1 drivers +v0x21fcf20_0 .net "sum", 0 0, L_0x22513c0; 1 drivers +S_0x21fba50 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x21faea0; + .timescale -9 -12; +L_0x22511d0/d .functor AND 1, L_0x2252710, L_0x2252800, C4<1>, C4<1>; +L_0x22511d0 .delay (50000,50000,50000) L_0x22511d0/d; +L_0x2251870/d .functor AND 1, L_0x2252710, L_0x2250a10, C4<1>, C4<1>; +L_0x2251870 .delay (50000,50000,50000) L_0x2251870/d; +L_0x2251960/d .functor AND 1, L_0x2252800, L_0x2250a10, C4<1>, C4<1>; +L_0x2251960 .delay (50000,50000,50000) L_0x2251960/d; +L_0x2251a50/d .functor OR 1, L_0x22511d0, L_0x2251870, C4<0>, C4<0>; +L_0x2251a50 .delay (50000,50000,50000) L_0x2251a50/d; +L_0x2251bb0/d .functor OR 1, L_0x2251a50, L_0x2251960, C4<0>, C4<0>; +L_0x2251bb0 .delay (50000,50000,50000) L_0x2251bb0/d; +L_0x2251d10/d .functor OR 1, L_0x2252710, L_0x2252800, C4<0>, C4<0>; +L_0x2251d10 .delay (50000,50000,50000) L_0x2251d10/d; +L_0x2251e10/d .functor OR 1, L_0x2251d10, L_0x2250a10, C4<0>, C4<0>; +L_0x2251e10 .delay (50000,50000,50000) L_0x2251e10/d; +L_0x2251f20/d .functor NOT 1, L_0x2251bb0, C4<0>, C4<0>, C4<0>; +L_0x2251f20 .delay (50000,50000,50000) L_0x2251f20/d; +L_0x2252070/d .functor AND 1, L_0x2251f20, L_0x2251e10, C4<1>, C4<1>; +L_0x2252070 .delay (50000,50000,50000) L_0x2252070/d; +L_0x2252190/d .functor AND 1, L_0x2252710, L_0x2252800, C4<1>, C4<1>; +L_0x2252190 .delay (50000,50000,50000) L_0x2252190/d; +L_0x22523d0/d .functor AND 1, L_0x2252190, L_0x2250a10, C4<1>, C4<1>; +L_0x22523d0 .delay (50000,50000,50000) L_0x22523d0/d; +L_0x2252560/d .functor OR 1, L_0x2252070, L_0x22523d0, C4<0>, C4<0>; +L_0x2252560 .delay (50000,50000,50000) L_0x2252560/d; +v0x21fbb40_0 .net "a", 0 0, L_0x2252710; 1 drivers +v0x21fbc00_0 .net "ab", 0 0, L_0x22511d0; 1 drivers +v0x21fbca0_0 .net "acarryin", 0 0, L_0x2251870; 1 drivers +v0x21fbd40_0 .net "andall", 0 0, L_0x22523d0; 1 drivers +v0x21fbdc0_0 .net "andsingleintermediate", 0 0, L_0x2252190; 1 drivers +v0x21fbe60_0 .net "andsumintermediate", 0 0, L_0x2252070; 1 drivers +v0x21fbf00_0 .net "b", 0 0, L_0x2252800; 1 drivers +v0x21fbfa0_0 .net "bcarryin", 0 0, L_0x2251960; 1 drivers +v0x21fc090_0 .alias "carryin", 0 0, v0x21fe680_0; +v0x21fc130_0 .alias "carryout", 0 0, v0x21fe7b0_0; +v0x21fc1b0_0 .net "invcarryout", 0 0, L_0x2251f20; 1 drivers +v0x21fc230_0 .net "orall", 0 0, L_0x2251e10; 1 drivers +v0x21fc2d0_0 .net "orpairintermediate", 0 0, L_0x2251a50; 1 drivers +v0x21fc370_0 .net "orsingleintermediate", 0 0, L_0x2251d10; 1 drivers +v0x21fc490_0 .net "sum", 0 0, L_0x2252560; 1 drivers +S_0x21faf90 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x21faea0; + .timescale -9 -12; +L_0x2252370/d .functor AND 1, L_0x2253820, L_0x2253950, C4<1>, C4<1>; +L_0x2252370 .delay (50000,50000,50000) L_0x2252370/d; +L_0x22528f0/d .functor AND 1, L_0x2253820, L_0x2251bb0, C4<1>, C4<1>; +L_0x22528f0 .delay (50000,50000,50000) L_0x22528f0/d; +L_0x2252a00/d .functor AND 1, L_0x2253950, L_0x2251bb0, C4<1>, C4<1>; +L_0x2252a00 .delay (50000,50000,50000) L_0x2252a00/d; +L_0x2252b10/d .functor OR 1, L_0x2252370, L_0x22528f0, C4<0>, C4<0>; +L_0x2252b10 .delay (50000,50000,50000) L_0x2252b10/d; +L_0x2252c70/d .functor OR 1, L_0x2252b10, L_0x2252a00, C4<0>, C4<0>; +L_0x2252c70 .delay (50000,50000,50000) L_0x2252c70/d; +L_0x2252dd0/d .functor OR 1, L_0x2253820, L_0x2253950, C4<0>, C4<0>; +L_0x2252dd0 .delay (50000,50000,50000) L_0x2252dd0/d; +L_0x2252ed0/d .functor OR 1, L_0x2252dd0, L_0x2251bb0, C4<0>, C4<0>; +L_0x2252ed0 .delay (50000,50000,50000) L_0x2252ed0/d; +L_0x2252fe0/d .functor NOT 1, L_0x2252c70, C4<0>, C4<0>, C4<0>; +L_0x2252fe0 .delay (50000,50000,50000) L_0x2252fe0/d; +L_0x22530a0/d .functor AND 1, L_0x2252fe0, L_0x2252ed0, C4<1>, C4<1>; +L_0x22530a0 .delay (50000,50000,50000) L_0x22530a0/d; +L_0x2253210/d .functor AND 1, L_0x2253820, L_0x2253950, C4<1>, C4<1>; +L_0x2253210 .delay (50000,50000,50000) L_0x2253210/d; +L_0x2253450/d .functor AND 1, L_0x2253210, L_0x2251bb0, C4<1>, C4<1>; +L_0x2253450 .delay (50000,50000,50000) L_0x2253450/d; +L_0x22535e0/d .functor OR 1, L_0x22530a0, L_0x2253450, C4<0>, C4<0>; +L_0x22535e0 .delay (50000,50000,50000) L_0x22535e0/d; +v0x21fb080_0 .net "a", 0 0, L_0x2253820; 1 drivers +v0x21fb100_0 .net "ab", 0 0, L_0x2252370; 1 drivers +v0x21fb1a0_0 .net "acarryin", 0 0, L_0x22528f0; 1 drivers +v0x21fb240_0 .net "andall", 0 0, L_0x2253450; 1 drivers +v0x21fb2c0_0 .net "andsingleintermediate", 0 0, L_0x2253210; 1 drivers +v0x21fb360_0 .net "andsumintermediate", 0 0, L_0x22530a0; 1 drivers +v0x21fb400_0 .net "b", 0 0, L_0x2253950; 1 drivers +v0x21fb4a0_0 .net "bcarryin", 0 0, L_0x2252a00; 1 drivers +v0x21fb590_0 .alias "carryin", 0 0, v0x21fe7b0_0; +v0x21fb630_0 .alias "carryout", 0 0, v0x221ec80_0; +v0x21fb6b0_0 .net "invcarryout", 0 0, L_0x2252fe0; 1 drivers +v0x21fb750_0 .net "orall", 0 0, L_0x2252ed0; 1 drivers +v0x21fb7f0_0 .net "orpairintermediate", 0 0, L_0x2252b10; 1 drivers +v0x21fb890_0 .net "orsingleintermediate", 0 0, L_0x2252dd0; 1 drivers +v0x21fb9b0_0 .net "sum", 0 0, L_0x22535e0; 1 drivers +S_0x21f72c0 .scope module, "adder7" "FullAdder4bit" 4 246, 2 47, S_0x21f71d0; + .timescale -9 -12; +L_0x22589f0/d .functor AND 1, L_0x2259080, L_0x2259120, C4<1>, C4<1>; +L_0x22589f0 .delay (50000,50000,50000) L_0x22589f0/d; +L_0x22591c0/d .functor NOR 1, L_0x2259270, L_0x2259310, C4<0>, C4<0>; +L_0x22591c0 .delay (50000,50000,50000) L_0x22591c0/d; +L_0x2259490/d .functor AND 1, L_0x2259580, L_0x2259620, C4<1>, C4<1>; +L_0x2259490 .delay (50000,50000,50000) L_0x2259490/d; +L_0x2259400/d .functor NOR 1, L_0x2259840, L_0x22599f0, C4<0>, C4<0>; +L_0x2259400 .delay (50000,50000,50000) L_0x2259400/d; +L_0x2259710/d .functor OR 1, L_0x22589f0, L_0x22591c0, C4<0>, C4<0>; +L_0x2259710 .delay (50000,50000,50000) L_0x2259710/d; +L_0x2259c30/d .functor NOR 1, L_0x2259490, L_0x2259400, C4<0>, C4<0>; +L_0x2259c30 .delay (50000,50000,50000) L_0x2259c30/d; +L_0x2259d70/d .functor AND 1, L_0x2259710, L_0x2259c30, C4<1>, C4<1>; +L_0x2259d70 .delay (50000,50000,50000) L_0x2259d70/d; +v0x21f9f00_0 .net *"_s25", 0 0, L_0x2259080; 1 drivers +v0x21f9fc0_0 .net *"_s27", 0 0, L_0x2259120; 1 drivers +v0x21fa060_0 .net *"_s29", 0 0, L_0x2259270; 1 drivers +v0x21fa100_0 .net *"_s31", 0 0, L_0x2259310; 1 drivers +v0x21fa1b0_0 .net *"_s33", 0 0, L_0x2259580; 1 drivers +v0x21fa250_0 .net *"_s35", 0 0, L_0x2259620; 1 drivers +v0x21fa2f0_0 .net *"_s37", 0 0, L_0x2259840; 1 drivers +v0x21fa390_0 .net *"_s39", 0 0, L_0x22599f0; 1 drivers +v0x21fa430_0 .net "a", 3 0, L_0x2254cb0; 1 drivers +v0x21fa4d0_0 .net "aandb", 0 0, L_0x22589f0; 1 drivers +v0x21fa570_0 .net "abandnoror", 0 0, L_0x2259710; 1 drivers +v0x21fa610_0 .net "anorb", 0 0, L_0x22591c0; 1 drivers +v0x21fa6b0_0 .net "b", 3 0, L_0x2254d50; 1 drivers +v0x21fa750_0 .net "bandsum", 0 0, L_0x2259490; 1 drivers +v0x21fa870_0 .net "bnorsum", 0 0, L_0x2259400; 1 drivers +v0x21fa910_0 .net "bsumandnornor", 0 0, L_0x2259c30; 1 drivers +v0x21fa7d0_0 .alias "carryin", 0 0, v0x221ec80_0; +v0x21faa40_0 .alias "carryout", 0 0, v0x221f7f0_0; +v0x21fab60_0 .net "carryout1", 0 0, L_0x22550d0; 1 drivers +v0x21fabe0_0 .net "carryout2", 0 0, L_0x2256000; 1 drivers +v0x21faac0_0 .net "carryout3", 0 0, L_0x2257190; 1 drivers +v0x21fad60_0 .alias "overflow", 0 0, v0x221f8f0_0; +v0x21fac60_0 .net8 "sum", 3 0, RS_0x7f8758e2c068; 4 drivers +L_0x2255a50 .part/pv L_0x2255990, 0, 1, 4; +L_0x2255af0 .part L_0x2254cb0, 0, 1; +L_0x2255b90 .part L_0x2254d50, 0, 1; +L_0x2256ab0 .part/pv L_0x22569a0, 1, 1, 4; +L_0x2256ba0 .part L_0x2254cb0, 1, 1; +L_0x2256c90 .part L_0x2254d50, 1, 1; +L_0x2257c50 .part/pv L_0x2257b40, 2, 1, 4; +L_0x2257cf0 .part L_0x2254cb0, 2, 1; +L_0x2257de0 .part L_0x2254d50, 2, 1; +L_0x2258cf0 .part/pv L_0x2258be0, 3, 1, 4; +L_0x2258e20 .part L_0x2254cb0, 3, 1; +L_0x2258f50 .part L_0x2254d50, 3, 1; +L_0x2259080 .part L_0x2254cb0, 3, 1; +L_0x2259120 .part L_0x2254d50, 3, 1; +L_0x2259270 .part L_0x2254cb0, 3, 1; +L_0x2259310 .part L_0x2254d50, 3, 1; +L_0x2259580 .part L_0x2254d50, 3, 1; +L_0x2259620 .part RS_0x7f8758e2c068, 3, 1; +L_0x2259840 .part L_0x2254d50, 3, 1; +L_0x22599f0 .part RS_0x7f8758e2c068, 3, 1; +S_0x21f9440 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x21f72c0; + .timescale -9 -12; +L_0x224f570/d .functor AND 1, L_0x2255af0, L_0x2255b90, C4<1>, C4<1>; +L_0x224f570 .delay (50000,50000,50000) L_0x224f570/d; +L_0x224f610/d .functor AND 1, L_0x2255af0, L_0x2252c70, C4<1>, C4<1>; +L_0x224f610 .delay (50000,50000,50000) L_0x224f610/d; +L_0x224f700/d .functor AND 1, L_0x2255b90, L_0x2252c70, C4<1>, C4<1>; +L_0x224f700 .delay (50000,50000,50000) L_0x224f700/d; +L_0x223f870/d .functor OR 1, L_0x224f570, L_0x224f610, C4<0>, C4<0>; +L_0x223f870 .delay (50000,50000,50000) L_0x223f870/d; +L_0x22550d0/d .functor OR 1, L_0x223f870, L_0x224f700, C4<0>, C4<0>; +L_0x22550d0 .delay (50000,50000,50000) L_0x22550d0/d; +L_0x2255210/d .functor OR 1, L_0x2255af0, L_0x2255b90, C4<0>, C4<0>; +L_0x2255210 .delay (50000,50000,50000) L_0x2255210/d; +L_0x2255310/d .functor OR 1, L_0x2255210, L_0x2252c70, C4<0>, C4<0>; +L_0x2255310 .delay (50000,50000,50000) L_0x2255310/d; +L_0x2255420/d .functor NOT 1, L_0x22550d0, C4<0>, C4<0>, C4<0>; +L_0x2255420 .delay (50000,50000,50000) L_0x2255420/d; +L_0x2255570/d .functor AND 1, L_0x2255420, L_0x2255310, C4<1>, C4<1>; +L_0x2255570 .delay (50000,50000,50000) L_0x2255570/d; +L_0x2255690/d .functor AND 1, L_0x2255af0, L_0x2255b90, C4<1>, C4<1>; +L_0x2255690 .delay (50000,50000,50000) L_0x2255690/d; +L_0x22558d0/d .functor AND 1, L_0x2255690, L_0x2252c70, C4<1>, C4<1>; +L_0x22558d0 .delay (50000,50000,50000) L_0x22558d0/d; +L_0x2255990/d .functor OR 1, L_0x2255570, L_0x22558d0, C4<0>, C4<0>; +L_0x2255990 .delay (50000,50000,50000) L_0x2255990/d; +v0x21f9530_0 .net "a", 0 0, L_0x2255af0; 1 drivers +v0x21f95f0_0 .net "ab", 0 0, L_0x224f570; 1 drivers +v0x21f9690_0 .net "acarryin", 0 0, L_0x224f610; 1 drivers +v0x21f9730_0 .net "andall", 0 0, L_0x22558d0; 1 drivers +v0x21f97e0_0 .net "andsingleintermediate", 0 0, L_0x2255690; 1 drivers +v0x21f9880_0 .net "andsumintermediate", 0 0, L_0x2255570; 1 drivers +v0x21f9920_0 .net "b", 0 0, L_0x2255b90; 1 drivers +v0x21f99c0_0 .net "bcarryin", 0 0, L_0x224f700; 1 drivers +v0x21f9a60_0 .alias "carryin", 0 0, v0x221ec80_0; +v0x21f9b00_0 .alias "carryout", 0 0, v0x21fab60_0; +v0x21f9b80_0 .net "invcarryout", 0 0, L_0x2255420; 1 drivers +v0x21f9c00_0 .net "orall", 0 0, L_0x2255310; 1 drivers +v0x21f9ca0_0 .net "orpairintermediate", 0 0, L_0x223f870; 1 drivers +v0x21f9d40_0 .net "orsingleintermediate", 0 0, L_0x2255210; 1 drivers +v0x21f9e60_0 .net "sum", 0 0, L_0x2255990; 1 drivers +S_0x21f8980 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x21f72c0; + .timescale -9 -12; +L_0x2255870/d .functor AND 1, L_0x2256ba0, L_0x2256c90, C4<1>, C4<1>; +L_0x2255870 .delay (50000,50000,50000) L_0x2255870/d; +L_0x2255cc0/d .functor AND 1, L_0x2256ba0, L_0x22550d0, C4<1>, C4<1>; +L_0x2255cc0 .delay (50000,50000,50000) L_0x2255cc0/d; +L_0x2255db0/d .functor AND 1, L_0x2256c90, L_0x22550d0, C4<1>, C4<1>; +L_0x2255db0 .delay (50000,50000,50000) L_0x2255db0/d; +L_0x2255ea0/d .functor OR 1, L_0x2255870, L_0x2255cc0, C4<0>, C4<0>; +L_0x2255ea0 .delay (50000,50000,50000) L_0x2255ea0/d; +L_0x2256000/d .functor OR 1, L_0x2255ea0, L_0x2255db0, C4<0>, C4<0>; +L_0x2256000 .delay (50000,50000,50000) L_0x2256000/d; +L_0x2256160/d .functor OR 1, L_0x2256ba0, L_0x2256c90, C4<0>, C4<0>; +L_0x2256160 .delay (50000,50000,50000) L_0x2256160/d; +L_0x2256260/d .functor OR 1, L_0x2256160, L_0x22550d0, C4<0>, C4<0>; +L_0x2256260 .delay (50000,50000,50000) L_0x2256260/d; +L_0x2256370/d .functor NOT 1, L_0x2256000, C4<0>, C4<0>, C4<0>; +L_0x2256370 .delay (50000,50000,50000) L_0x2256370/d; +L_0x21fa9c0/d .functor AND 1, L_0x2256370, L_0x2256260, C4<1>, C4<1>; +L_0x21fa9c0 .delay (50000,50000,50000) L_0x21fa9c0/d; +L_0x22565d0/d .functor AND 1, L_0x2256ba0, L_0x2256c90, C4<1>, C4<1>; +L_0x22565d0 .delay (50000,50000,50000) L_0x22565d0/d; +L_0x2256810/d .functor AND 1, L_0x22565d0, L_0x22550d0, C4<1>, C4<1>; +L_0x2256810 .delay (50000,50000,50000) L_0x2256810/d; +L_0x22569a0/d .functor OR 1, L_0x21fa9c0, L_0x2256810, C4<0>, C4<0>; +L_0x22569a0 .delay (50000,50000,50000) L_0x22569a0/d; +v0x21f8a70_0 .net "a", 0 0, L_0x2256ba0; 1 drivers +v0x21f8b30_0 .net "ab", 0 0, L_0x2255870; 1 drivers +v0x21f8bd0_0 .net "acarryin", 0 0, L_0x2255cc0; 1 drivers +v0x21f8c70_0 .net "andall", 0 0, L_0x2256810; 1 drivers +v0x21f8d20_0 .net "andsingleintermediate", 0 0, L_0x22565d0; 1 drivers +v0x21f8dc0_0 .net "andsumintermediate", 0 0, L_0x21fa9c0; 1 drivers +v0x21f8e60_0 .net "b", 0 0, L_0x2256c90; 1 drivers +v0x21f8f00_0 .net "bcarryin", 0 0, L_0x2255db0; 1 drivers +v0x21f8fa0_0 .alias "carryin", 0 0, v0x21fab60_0; +v0x21f9040_0 .alias "carryout", 0 0, v0x21fabe0_0; +v0x21f90c0_0 .net "invcarryout", 0 0, L_0x2256370; 1 drivers +v0x21f9140_0 .net "orall", 0 0, L_0x2256260; 1 drivers +v0x21f91e0_0 .net "orpairintermediate", 0 0, L_0x2255ea0; 1 drivers +v0x21f9280_0 .net "orsingleintermediate", 0 0, L_0x2256160; 1 drivers +v0x21f93a0_0 .net "sum", 0 0, L_0x22569a0; 1 drivers +S_0x21f7ef0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x21f72c0; + .timescale -9 -12; +L_0x22567b0/d .functor AND 1, L_0x2257cf0, L_0x2257de0, C4<1>, C4<1>; +L_0x22567b0 .delay (50000,50000,50000) L_0x22567b0/d; +L_0x2256e50/d .functor AND 1, L_0x2257cf0, L_0x2256000, C4<1>, C4<1>; +L_0x2256e50 .delay (50000,50000,50000) L_0x2256e50/d; +L_0x2256f40/d .functor AND 1, L_0x2257de0, L_0x2256000, C4<1>, C4<1>; +L_0x2256f40 .delay (50000,50000,50000) L_0x2256f40/d; +L_0x2257030/d .functor OR 1, L_0x22567b0, L_0x2256e50, C4<0>, C4<0>; +L_0x2257030 .delay (50000,50000,50000) L_0x2257030/d; +L_0x2257190/d .functor OR 1, L_0x2257030, L_0x2256f40, C4<0>, C4<0>; +L_0x2257190 .delay (50000,50000,50000) L_0x2257190/d; +L_0x22572f0/d .functor OR 1, L_0x2257cf0, L_0x2257de0, C4<0>, C4<0>; +L_0x22572f0 .delay (50000,50000,50000) L_0x22572f0/d; +L_0x22573f0/d .functor OR 1, L_0x22572f0, L_0x2256000, C4<0>, C4<0>; +L_0x22573f0 .delay (50000,50000,50000) L_0x22573f0/d; +L_0x2257500/d .functor NOT 1, L_0x2257190, C4<0>, C4<0>, C4<0>; +L_0x2257500 .delay (50000,50000,50000) L_0x2257500/d; +L_0x2257650/d .functor AND 1, L_0x2257500, L_0x22573f0, C4<1>, C4<1>; +L_0x2257650 .delay (50000,50000,50000) L_0x2257650/d; +L_0x2257770/d .functor AND 1, L_0x2257cf0, L_0x2257de0, C4<1>, C4<1>; +L_0x2257770 .delay (50000,50000,50000) L_0x2257770/d; +L_0x22579b0/d .functor AND 1, L_0x2257770, L_0x2256000, C4<1>, C4<1>; +L_0x22579b0 .delay (50000,50000,50000) L_0x22579b0/d; +L_0x2257b40/d .functor OR 1, L_0x2257650, L_0x22579b0, C4<0>, C4<0>; +L_0x2257b40 .delay (50000,50000,50000) L_0x2257b40/d; +v0x21f7fe0_0 .net "a", 0 0, L_0x2257cf0; 1 drivers +v0x21f80a0_0 .net "ab", 0 0, L_0x22567b0; 1 drivers +v0x21f8140_0 .net "acarryin", 0 0, L_0x2256e50; 1 drivers +v0x21f81e0_0 .net "andall", 0 0, L_0x22579b0; 1 drivers +v0x21f8260_0 .net "andsingleintermediate", 0 0, L_0x2257770; 1 drivers +v0x21f8300_0 .net "andsumintermediate", 0 0, L_0x2257650; 1 drivers +v0x21f83a0_0 .net "b", 0 0, L_0x2257de0; 1 drivers +v0x21f8440_0 .net "bcarryin", 0 0, L_0x2256f40; 1 drivers +v0x21f84e0_0 .alias "carryin", 0 0, v0x21fabe0_0; +v0x21f8580_0 .alias "carryout", 0 0, v0x21faac0_0; +v0x21f8600_0 .net "invcarryout", 0 0, L_0x2257500; 1 drivers +v0x21f8680_0 .net "orall", 0 0, L_0x22573f0; 1 drivers +v0x21f8720_0 .net "orpairintermediate", 0 0, L_0x2257030; 1 drivers +v0x21f87c0_0 .net "orsingleintermediate", 0 0, L_0x22572f0; 1 drivers +v0x21f88e0_0 .net "sum", 0 0, L_0x2257b40; 1 drivers +S_0x21f73b0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x21f72c0; + .timescale -9 -12; +L_0x2257950/d .functor AND 1, L_0x2258e20, L_0x2258f50, C4<1>, C4<1>; +L_0x2257950 .delay (50000,50000,50000) L_0x2257950/d; +L_0x2257ed0/d .functor AND 1, L_0x2258e20, L_0x2257190, C4<1>, C4<1>; +L_0x2257ed0 .delay (50000,50000,50000) L_0x2257ed0/d; +L_0x2257fc0/d .functor AND 1, L_0x2258f50, L_0x2257190, C4<1>, C4<1>; +L_0x2257fc0 .delay (50000,50000,50000) L_0x2257fc0/d; +L_0x22580d0/d .functor OR 1, L_0x2257950, L_0x2257ed0, C4<0>, C4<0>; +L_0x22580d0 .delay (50000,50000,50000) L_0x22580d0/d; +L_0x2258230/d .functor OR 1, L_0x22580d0, L_0x2257fc0, C4<0>, C4<0>; +L_0x2258230 .delay (50000,50000,50000) L_0x2258230/d; +L_0x22583d0/d .functor OR 1, L_0x2258e20, L_0x2258f50, C4<0>, C4<0>; +L_0x22583d0 .delay (50000,50000,50000) L_0x22583d0/d; +L_0x22584d0/d .functor OR 1, L_0x22583d0, L_0x2257190, C4<0>, C4<0>; +L_0x22584d0 .delay (50000,50000,50000) L_0x22584d0/d; +L_0x22585e0/d .functor NOT 1, L_0x2258230, C4<0>, C4<0>, C4<0>; +L_0x22585e0 .delay (50000,50000,50000) L_0x22585e0/d; +L_0x22586a0/d .functor AND 1, L_0x22585e0, L_0x22584d0, C4<1>, C4<1>; +L_0x22586a0 .delay (50000,50000,50000) L_0x22586a0/d; +L_0x2258810/d .functor AND 1, L_0x2258e20, L_0x2258f50, C4<1>, C4<1>; +L_0x2258810 .delay (50000,50000,50000) L_0x2258810/d; +L_0x2258a50/d .functor AND 1, L_0x2258810, L_0x2257190, C4<1>, C4<1>; +L_0x2258a50 .delay (50000,50000,50000) L_0x2258a50/d; +L_0x2258be0/d .functor OR 1, L_0x22586a0, L_0x2258a50, C4<0>, C4<0>; +L_0x2258be0 .delay (50000,50000,50000) L_0x2258be0/d; +v0x21f74a0_0 .net "a", 0 0, L_0x2258e20; 1 drivers +v0x21f7560_0 .net "ab", 0 0, L_0x2257950; 1 drivers +v0x21f7600_0 .net "acarryin", 0 0, L_0x2257ed0; 1 drivers +v0x21f76a0_0 .net "andall", 0 0, L_0x2258a50; 1 drivers +v0x21f7720_0 .net "andsingleintermediate", 0 0, L_0x2258810; 1 drivers +v0x21f77c0_0 .net "andsumintermediate", 0 0, L_0x22586a0; 1 drivers +v0x21f7860_0 .net "b", 0 0, L_0x2258f50; 1 drivers +v0x21f7900_0 .net "bcarryin", 0 0, L_0x2257fc0; 1 drivers +v0x21f79a0_0 .alias "carryin", 0 0, v0x21faac0_0; +v0x21f7a40_0 .alias "carryout", 0 0, v0x221f7f0_0; +v0x21f7ae0_0 .net "invcarryout", 0 0, L_0x22585e0; 1 drivers +v0x21f7b80_0 .net "orall", 0 0, L_0x22584d0; 1 drivers +v0x21f7c90_0 .net "orpairintermediate", 0 0, L_0x22580d0; 1 drivers +v0x21f7d30_0 .net "orsingleintermediate", 0 0, L_0x22583d0; 1 drivers +v0x21f7e50_0 .net "sum", 0 0, L_0x2258be0; 1 drivers + .scope S_0x21afb70; +T_0 ; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 19 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 22 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 25 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 28 "$display", "%b %b %b | %b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 31 "$display", "%b %b %b | %b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 34 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %ix/load 0, 31, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f1f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f1f0_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f6f0_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f6f0_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x221f770_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x221f770_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 37 "$display", "%b %b %b | %b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 5; + "N/A"; + ""; + "./adder.v"; + "adder_subtracter.t.v"; + "./adder_subtracter.v"; From 028671ae7df592930d84417b53fa063e246c4f9a Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:03:20 -0400 Subject: [PATCH 12/38] merge and added time delays, changed number of adder inputs --- adder_subtracter | 3515 ++++++++++++++++++++++++++++++++++++++++++ adder_subtracter.t.v | 3 +- adder_subtracter.v | 261 ++-- and_32bit | 1073 +++++++++++++ nand_32bit | 1073 +++++++++++++ nor_32bit | 1073 +++++++++++++ slt | 1543 ++++++++++++++++++ slt.v | 10 +- 8 files changed, 8413 insertions(+), 138 deletions(-) create mode 100755 adder_subtracter create mode 100755 and_32bit create mode 100755 nand_32bit create mode 100755 nor_32bit create mode 100755 slt diff --git a/adder_subtracter b/adder_subtracter new file mode 100755 index 0000000..729e2fe --- /dev/null +++ b/adder_subtracter @@ -0,0 +1,3515 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0xabb2d0 .scope module, "behavioralFullAdder" "behavioralFullAdder" 2 3; + .timescale -9 -12; +v0xaeb900_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0xc28110_0 .net *"_s11", 1 0, L_0xc51550; 1 drivers +v0xc281b0_0 .net *"_s13", 1 0, L_0xc51650; 1 drivers +v0xc28250_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0xc28300_0 .net *"_s17", 1 0, L_0xc517c0; 1 drivers +v0xc283a0_0 .net *"_s3", 1 0, L_0xc512a0; 1 drivers +v0xc28480_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0xc28520_0 .net *"_s7", 1 0, L_0xc513e0; 1 drivers +v0xc28610_0 .net "a", 0 0, C4; 0 drivers +v0xc286b0_0 .net "b", 0 0, C4; 0 drivers +v0xc287b0_0 .net "carryin", 0 0, C4; 0 drivers +v0xc28850_0 .net "carryout", 0 0, L_0xc51130; 1 drivers +v0xc28960_0 .net "sum", 0 0, L_0xc511d0; 1 drivers +L_0xc51130 .part L_0xc517c0, 1, 1; +L_0xc511d0 .part L_0xc517c0, 0, 1; +L_0xc512a0 .concat [ 1 1 0 0], C4, C4<0>; +L_0xc513e0 .concat [ 1 1 0 0], C4, C4<0>; +L_0xc51550 .arith/sum 2, L_0xc512a0, L_0xc513e0; +L_0xc51650 .concat [ 1 1 0 0], C4, C4<0>; +L_0xc517c0 .arith/sum 2, L_0xc51550, L_0xc51650; +S_0xbe1330 .scope module, "test32bitAdder" "test32bitAdder" 3 6; + .timescale -9 -12; +v0xc50a30_0 .var "a", 31 0; +RS_0x7fb7ca18cca8/0/0 .resolv tri, L_0xc69540, L_0xc6e9c0, L_0xc73ec0, L_0xc79440; +RS_0x7fb7ca18cca8/0/4 .resolv tri, L_0xc7e8f0, L_0xc83ba0, L_0xc890e0, L_0xc8e690; +RS_0x7fb7ca18cca8 .resolv tri, RS_0x7fb7ca18cca8/0/0, RS_0x7fb7ca18cca8/0/4, C4, C4; +v0xc50ae0_0 .net8 "ans", 31 0, RS_0x7fb7ca18cca8; 8 drivers +v0xc50f30_0 .var "b", 31 0; +v0xc50fb0_0 .var "carryin", 2 0; +v0xc51030_0 .net "carryout", 0 0, L_0xc8c9c0; 1 drivers +v0xc510b0_0 .net "overflow", 0 0, L_0xc8e550; 1 drivers +S_0xc28a00 .scope module, "adder0" "adder_subtracter" 3 13, 4 176, S_0xbe1330; + .timescale -9 -12; +L_0xc4d7d0/d .functor NOT 1, L_0xc51a90, C4<0>, C4<0>, C4<0>; +L_0xc4d7d0 .delay (10000,10000,10000) L_0xc4d7d0/d; +L_0xc51bd0/d .functor NOT 1, L_0xc51d10, C4<0>, C4<0>, C4<0>; +L_0xc51bd0 .delay (10000,10000,10000) L_0xc51bd0/d; +L_0xc51f70/d .functor NOT 1, L_0xc52010, C4<0>, C4<0>, C4<0>; +L_0xc51f70 .delay (10000,10000,10000) L_0xc51f70/d; +L_0xc52190/d .functor NOT 1, L_0xc522d0, C4<0>, C4<0>, C4<0>; +L_0xc52190 .delay (10000,10000,10000) L_0xc52190/d; +L_0xc52460/d .functor NOT 1, L_0xc52560, C4<0>, C4<0>, C4<0>; +L_0xc52460 .delay (10000,10000,10000) L_0xc52460/d; +L_0xc52700/d .functor NOT 1, L_0xc52830, C4<0>, C4<0>, C4<0>; +L_0xc52700 .delay (10000,10000,10000) L_0xc52700/d; +L_0xc52600/d .functor NOT 1, L_0xc52b90, C4<0>, C4<0>, C4<0>; +L_0xc52600 .delay (10000,10000,10000) L_0xc52600/d; +L_0xc52d50/d .functor NOT 1, L_0xc52e50, C4<0>, C4<0>, C4<0>; +L_0xc52d50 .delay (10000,10000,10000) L_0xc52d50/d; +L_0xc53070/d .functor NOT 1, L_0xc53170, C4<0>, C4<0>, C4<0>; +L_0xc53070 .delay (10000,10000,10000) L_0xc53070/d; +L_0xc52f40/d .functor NOT 1, L_0xc53490, C4<0>, C4<0>, C4<0>; +L_0xc52f40 .delay (10000,10000,10000) L_0xc52f40/d; +L_0xc535e0/d .functor NOT 1, L_0xc536d0, C4<0>, C4<0>, C4<0>; +L_0xc535e0 .delay (10000,10000,10000) L_0xc535e0/d; +L_0xc53830/d .functor NOT 1, L_0xc53970, C4<0>, C4<0>, C4<0>; +L_0xc53830 .delay (10000,10000,10000) L_0xc53830/d; +L_0xc53430/d .functor NOT 1, L_0xc53bc0, C4<0>, C4<0>, C4<0>; +L_0xc53430 .delay (10000,10000,10000) L_0xc53430/d; +L_0xc53d40/d .functor NOT 1, L_0xc53e80, C4<0>, C4<0>, C4<0>; +L_0xc53d40 .delay (10000,10000,10000) L_0xc53d40/d; +L_0xc52a80/d .functor NOT 1, L_0xc54340, C4<0>, C4<0>, C4<0>; +L_0xc52a80 .delay (10000,10000,10000) L_0xc52a80/d; +L_0xc52b30/d .functor NOT 1, L_0xc54640, C4<0>, C4<0>, C4<0>; +L_0xc52b30 .delay (10000,10000,10000) L_0xc52b30/d; +L_0xc54780/d .functor NOT 1, L_0xc548c0, C4<0>, C4<0>, C4<0>; +L_0xc54780 .delay (10000,10000,10000) L_0xc54780/d; +L_0xc52970/d .functor NOT 1, L_0xc54c00, C4<0>, C4<0>, C4<0>; +L_0xc52970 .delay (10000,10000,10000) L_0xc52970/d; +L_0xc54a00/d .functor NOT 1, L_0xc54e20, C4<0>, C4<0>, C4<0>; +L_0xc54a00 .delay (10000,10000,10000) L_0xc54a00/d; +L_0xc54d40/d .functor NOT 1, L_0xc54b60, C4<0>, C4<0>, C4<0>; +L_0xc54d40 .delay (10000,10000,10000) L_0xc54d40/d; +L_0xc54f60/d .functor NOT 1, L_0xc55380, C4<0>, C4<0>, C4<0>; +L_0xc54f60 .delay (10000,10000,10000) L_0xc54f60/d; +L_0xc55230/d .functor NOT 1, L_0xc550e0, C4<0>, C4<0>, C4<0>; +L_0xc55230 .delay (10000,10000,10000) L_0xc55230/d; +L_0xc554c0/d .functor NOT 1, L_0xc558d0, C4<0>, C4<0>, C4<0>; +L_0xc554c0 .delay (10000,10000,10000) L_0xc554c0/d; +L_0xc55770/d .functor NOT 1, L_0xc55610, C4<0>, C4<0>, C4<0>; +L_0xc55770 .delay (10000,10000,10000) L_0xc55770/d; +L_0xc55a10/d .functor NOT 1, L_0xc55e70, C4<0>, C4<0>, C4<0>; +L_0xc55a10 .delay (10000,10000,10000) L_0xc55a10/d; +L_0xc55cf0/d .functor NOT 1, L_0xc55b80, C4<0>, C4<0>, C4<0>; +L_0xc55cf0 .delay (10000,10000,10000) L_0xc55cf0/d; +L_0xc55fb0/d .functor NOT 1, L_0xc563e0, C4<0>, C4<0>, C4<0>; +L_0xc55fb0 .delay (10000,10000,10000) L_0xc55fb0/d; +L_0xc56280/d .functor NOT 1, L_0xc56100, C4<0>, C4<0>, C4<0>; +L_0xc56280 .delay (10000,10000,10000) L_0xc56280/d; +L_0xc56520/d .functor NOT 1, L_0xc56950, C4<0>, C4<0>, C4<0>; +L_0xc56520 .delay (10000,10000,10000) L_0xc56520/d; +L_0xc56820/d .functor NOT 1, L_0xc56690, C4<0>, C4<0>, C4<0>; +L_0xc56820 .delay (10000,10000,10000) L_0xc56820/d; +L_0xc514b0/d .functor NOT 1, L_0xc56a90, C4<0>, C4<0>, C4<0>; +L_0xc514b0 .delay (10000,10000,10000) L_0xc514b0/d; +L_0xc515f0/d .functor NOT 1, L_0xc54250, C4<0>, C4<0>, C4<0>; +L_0xc515f0 .delay (10000,10000,10000) L_0xc515f0/d; +v0xc4ccc0_0 .net "_", 0 0, L_0xc693b0; 1 drivers +v0xc4d300_0 .net "_1", 0 0, L_0xc6e830; 1 drivers +v0xc4d380_0 .net "_2", 0 0, L_0xc73d30; 1 drivers +v0xc4d400_0 .net "_3", 0 0, L_0xc792b0; 1 drivers +v0xc4d480_0 .net "_4", 0 0, L_0xc7e7a0; 1 drivers +v0xc4d500_0 .net "_5", 0 0, L_0xc83a10; 1 drivers +v0xc4d580_0 .net "_6", 0 0, L_0xc88f50; 1 drivers +v0xc4d600_0 .net *"_s0", 0 0, L_0xc4d7d0; 1 drivers +v0xc4d6d0_0 .net *"_s100", 0 0, L_0xc55cf0; 1 drivers +v0xc4d750_0 .net *"_s103", 0 0, L_0xc55b80; 1 drivers +v0xc4d830_0 .net *"_s104", 0 0, L_0xc55fb0; 1 drivers +v0xc4d8b0_0 .net *"_s107", 0 0, L_0xc563e0; 1 drivers +v0xc4d9a0_0 .net *"_s108", 0 0, L_0xc56280; 1 drivers +v0xc4da20_0 .net *"_s11", 0 0, L_0xc52010; 1 drivers +v0xc4db20_0 .net *"_s111", 0 0, L_0xc56100; 1 drivers +v0xc4dba0_0 .net *"_s112", 0 0, L_0xc56520; 1 drivers +v0xc4daa0_0 .net *"_s115", 0 0, L_0xc56950; 1 drivers +v0xc4dcf0_0 .net *"_s116", 0 0, L_0xc56820; 1 drivers +v0xc4de10_0 .net *"_s119", 0 0, L_0xc56690; 1 drivers +v0xc4de90_0 .net *"_s12", 0 0, L_0xc52190; 1 drivers +v0xc4dd70_0 .net *"_s120", 0 0, L_0xc514b0; 1 drivers +v0xc4dfc0_0 .net *"_s123", 0 0, L_0xc56a90; 1 drivers +v0xc4df10_0 .net *"_s124", 0 0, L_0xc515f0; 1 drivers +v0xc4e100_0 .net *"_s127", 0 0, L_0xc54250; 1 drivers +v0xc4e060_0 .net *"_s15", 0 0, L_0xc522d0; 1 drivers +v0xc4e250_0 .net *"_s16", 0 0, L_0xc52460; 1 drivers +v0xc4e1a0_0 .net *"_s19", 0 0, L_0xc52560; 1 drivers +v0xc4e3b0_0 .net *"_s20", 0 0, L_0xc52700; 1 drivers +v0xc4e2f0_0 .net *"_s23", 0 0, L_0xc52830; 1 drivers +v0xc4e520_0 .net *"_s24", 0 0, L_0xc52600; 1 drivers +v0xc4e430_0 .net *"_s27", 0 0, L_0xc52b90; 1 drivers +v0xc4e6a0_0 .net *"_s28", 0 0, L_0xc52d50; 1 drivers +v0xc4e5a0_0 .net *"_s3", 0 0, L_0xc51a90; 1 drivers +v0xc4e830_0 .net *"_s31", 0 0, L_0xc52e50; 1 drivers +v0xc4e720_0 .net *"_s32", 0 0, L_0xc53070; 1 drivers +v0xc4e9d0_0 .net *"_s35", 0 0, L_0xc53170; 1 drivers +v0xc4e8b0_0 .net *"_s36", 0 0, L_0xc52f40; 1 drivers +v0xc4e950_0 .net *"_s39", 0 0, L_0xc53490; 1 drivers +v0xc4eb90_0 .net *"_s4", 0 0, L_0xc51bd0; 1 drivers +v0xc4ec10_0 .net *"_s40", 0 0, L_0xc535e0; 1 drivers +v0xc4ea50_0 .net *"_s43", 0 0, L_0xc536d0; 1 drivers +v0xc4eaf0_0 .net *"_s44", 0 0, L_0xc53830; 1 drivers +v0xc4edf0_0 .net *"_s47", 0 0, L_0xc53970; 1 drivers +v0xc4ee70_0 .net *"_s48", 0 0, L_0xc53430; 1 drivers +v0xc4ec90_0 .net *"_s51", 0 0, L_0xc53bc0; 1 drivers +v0xc4ed30_0 .net *"_s52", 0 0, L_0xc53d40; 1 drivers +v0xc4f070_0 .net *"_s55", 0 0, L_0xc53e80; 1 drivers +v0xc4f0f0_0 .net *"_s56", 0 0, L_0xc52a80; 1 drivers +v0xc4ef10_0 .net *"_s59", 0 0, L_0xc54340; 1 drivers +v0xc4efb0_0 .net *"_s60", 0 0, L_0xc52b30; 1 drivers +v0xc4f310_0 .net *"_s63", 0 0, L_0xc54640; 1 drivers +v0xc4f390_0 .net *"_s64", 0 0, L_0xc54780; 1 drivers +v0xc4f190_0 .net *"_s67", 0 0, L_0xc548c0; 1 drivers +v0xc4f230_0 .net *"_s68", 0 0, L_0xc52970; 1 drivers +v0xc4f5d0_0 .net *"_s7", 0 0, L_0xc51d10; 1 drivers +v0xc4f650_0 .net *"_s71", 0 0, L_0xc54c00; 1 drivers +v0xc4f410_0 .net *"_s72", 0 0, L_0xc54a00; 1 drivers +v0xc4f4b0_0 .net *"_s75", 0 0, L_0xc54e20; 1 drivers +v0xc4f550_0 .net *"_s76", 0 0, L_0xc54d40; 1 drivers +v0xc4f8d0_0 .net *"_s79", 0 0, L_0xc54b60; 1 drivers +v0xc4f6f0_0 .net *"_s8", 0 0, L_0xc51f70; 1 drivers +v0xc4f790_0 .net *"_s80", 0 0, L_0xc54f60; 1 drivers +v0xc4f830_0 .net *"_s83", 0 0, L_0xc55380; 1 drivers +v0xc4fb70_0 .net *"_s84", 0 0, L_0xc55230; 1 drivers +v0xc4f970_0 .net *"_s87", 0 0, L_0xc550e0; 1 drivers +v0xc4fa10_0 .net *"_s88", 0 0, L_0xc554c0; 1 drivers +v0xc4fab0_0 .net *"_s91", 0 0, L_0xc558d0; 1 drivers +v0xc4fe10_0 .net *"_s92", 0 0, L_0xc55770; 1 drivers +v0xc4fc10_0 .net *"_s95", 0 0, L_0xc55610; 1 drivers +v0xc4fcb0_0 .net *"_s96", 0 0, L_0xc55a10; 1 drivers +v0xc4fd50_0 .net *"_s99", 0 0, L_0xc55e70; 1 drivers +v0xc500d0_0 .alias "ans", 31 0, v0xc50ae0_0; +v0xc4fe90_0 .alias "carryout", 0 0, v0xc51030_0; +v0xc4ff10_0 .net "command", 2 0, v0xc50fb0_0; 1 drivers +v0xc4ffb0_0 .net "cout0", 0 0, L_0xc67900; 1 drivers +v0xc503b0_0 .net "cout1", 0 0, L_0xc6cce0; 1 drivers +v0xc501e0_0 .net "cout2", 0 0, L_0xc721e0; 1 drivers +v0xc502f0_0 .net "cout3", 0 0, L_0xc77760; 1 drivers +v0xc50740_0 .net "cout4", 0 0, L_0xc7cc50; 1 drivers +v0xc50850_0 .net "cout5", 0 0, L_0xc81f00; 1 drivers +v0xc504c0_0 .net "cout6", 0 0, L_0xc87400; 1 drivers +RS_0x7fb7ca18c078/0/0 .resolv tri, L_0xc57320, L_0xc5f030, L_0xc57110, L_0xc5ee10; +RS_0x7fb7ca18c078/0/4 .resolv tri, L_0xc5fd60, L_0xc5ff00, L_0xc60130, L_0xc60420; +RS_0x7fb7ca18c078/0/8 .resolv tri, L_0xc60650, L_0xc60930, L_0xc60b60, L_0xc60d90; +RS_0x7fb7ca18c078/0/12 .resolv tri, L_0xc60fc0, L_0xc611f0, L_0xc61420, L_0xc61770; +RS_0x7fb7ca18c078/0/16 .resolv tri, L_0xc619a0, L_0xc61bf0, L_0xc61e40, L_0xc62090; +RS_0x7fb7ca18c078/0/20 .resolv tri, L_0xc62590, L_0xc626d0, L_0xc62130, L_0xc62320; +RS_0x7fb7ca18c078/0/24 .resolv tri, L_0xc62c00, L_0xc62e70, L_0xc633a0, L_0xc63590; +RS_0x7fb7ca18c078/0/28 .resolv tri, L_0xc62f10, L_0xc638c0, L_0xc63b10, L_0xc614c0; +RS_0x7fb7ca18c078/1/0 .resolv tri, RS_0x7fb7ca18c078/0/0, RS_0x7fb7ca18c078/0/4, RS_0x7fb7ca18c078/0/8, RS_0x7fb7ca18c078/0/12; +RS_0x7fb7ca18c078/1/4 .resolv tri, RS_0x7fb7ca18c078/0/16, RS_0x7fb7ca18c078/0/20, RS_0x7fb7ca18c078/0/24, RS_0x7fb7ca18c078/0/28; +RS_0x7fb7ca18c078 .resolv tri, RS_0x7fb7ca18c078/1/0, RS_0x7fb7ca18c078/1/4, C4, C4; +v0xc505d0_0 .net8 "finalB", 31 0, RS_0x7fb7ca18c078; 32 drivers +RS_0x7fb7ca18ba18/0/0 .resolv tri, L_0xc51900, L_0xc51b30, L_0xc51e40, L_0xc520f0; +RS_0x7fb7ca18ba18/0/4 .resolv tri, L_0xc523c0, L_0xc52660, L_0xc529e0, L_0xc52cb0; +RS_0x7fb7ca18ba18/0/8 .resolv tri, L_0xc52fd0, L_0xc532b0, L_0xc53210, L_0xc53530; +RS_0x7fb7ca18ba18/0/12 .resolv tri, L_0xc53770, L_0xc53a10, L_0xc53c60, L_0xc54430; +RS_0x7fb7ca18ba18/0/16 .resolv tri, L_0xc546e0, L_0xc528d0, L_0xc54960, L_0xc54ca0; +RS_0x7fb7ca18ba18/0/20 .resolv tri, L_0xc54ec0, L_0xc55190, L_0xc55420, L_0xc556d0; +RS_0x7fb7ca18ba18/0/24 .resolv tri, L_0xc55970, L_0xc55c50, L_0xc55f10, L_0xc561e0; +RS_0x7fb7ca18ba18/0/28 .resolv tri, L_0xc56480, L_0xc56780, L_0xc569f0, L_0xc54120; +RS_0x7fb7ca18ba18/1/0 .resolv tri, RS_0x7fb7ca18ba18/0/0, RS_0x7fb7ca18ba18/0/4, RS_0x7fb7ca18ba18/0/8, RS_0x7fb7ca18ba18/0/12; +RS_0x7fb7ca18ba18/1/4 .resolv tri, RS_0x7fb7ca18ba18/0/16, RS_0x7fb7ca18ba18/0/20, RS_0x7fb7ca18ba18/0/24, RS_0x7fb7ca18ba18/0/28; +RS_0x7fb7ca18ba18 .resolv tri, RS_0x7fb7ca18ba18/1/0, RS_0x7fb7ca18ba18/1/4, C4, C4; +v0xc50b70_0 .net8 "invertedB", 31 0, RS_0x7fb7ca18ba18; 32 drivers +v0xc50bf0_0 .net "opA", 31 0, v0xc50a30_0; 1 drivers +v0xc508d0_0 .net "opB", 31 0, v0xc50f30_0; 1 drivers +v0xc50980_0 .alias "overflow", 0 0, v0xc510b0_0; +L_0xc51900 .part/pv L_0xc4d7d0, 0, 1, 32; +L_0xc51a90 .part v0xc50f30_0, 0, 1; +L_0xc51b30 .part/pv L_0xc51bd0, 1, 1, 32; +L_0xc51d10 .part v0xc50f30_0, 1, 1; +L_0xc51e40 .part/pv L_0xc51f70, 2, 1, 32; +L_0xc52010 .part v0xc50f30_0, 2, 1; +L_0xc520f0 .part/pv L_0xc52190, 3, 1, 32; +L_0xc522d0 .part v0xc50f30_0, 3, 1; +L_0xc523c0 .part/pv L_0xc52460, 4, 1, 32; +L_0xc52560 .part v0xc50f30_0, 4, 1; +L_0xc52660 .part/pv L_0xc52700, 5, 1, 32; +L_0xc52830 .part v0xc50f30_0, 5, 1; +L_0xc529e0 .part/pv L_0xc52600, 6, 1, 32; +L_0xc52b90 .part v0xc50f30_0, 6, 1; +L_0xc52cb0 .part/pv L_0xc52d50, 7, 1, 32; +L_0xc52e50 .part v0xc50f30_0, 7, 1; +L_0xc52fd0 .part/pv L_0xc53070, 8, 1, 32; +L_0xc53170 .part v0xc50f30_0, 8, 1; +L_0xc532b0 .part/pv L_0xc52f40, 9, 1, 32; +L_0xc53490 .part v0xc50f30_0, 9, 1; +L_0xc53210 .part/pv L_0xc535e0, 10, 1, 32; +L_0xc536d0 .part v0xc50f30_0, 10, 1; +L_0xc53530 .part/pv L_0xc53830, 11, 1, 32; +L_0xc53970 .part v0xc50f30_0, 11, 1; +L_0xc53770 .part/pv L_0xc53430, 12, 1, 32; +L_0xc53bc0 .part v0xc50f30_0, 12, 1; +L_0xc53a10 .part/pv L_0xc53d40, 13, 1, 32; +L_0xc53e80 .part v0xc50f30_0, 13, 1; +L_0xc53c60 .part/pv L_0xc52a80, 14, 1, 32; +L_0xc54340 .part v0xc50f30_0, 14, 1; +L_0xc54430 .part/pv L_0xc52b30, 15, 1, 32; +L_0xc54640 .part v0xc50f30_0, 15, 1; +L_0xc546e0 .part/pv L_0xc54780, 16, 1, 32; +L_0xc548c0 .part v0xc50f30_0, 16, 1; +L_0xc528d0 .part/pv L_0xc52970, 17, 1, 32; +L_0xc54c00 .part v0xc50f30_0, 17, 1; +L_0xc54960 .part/pv L_0xc54a00, 18, 1, 32; +L_0xc54e20 .part v0xc50f30_0, 18, 1; +L_0xc54ca0 .part/pv L_0xc54d40, 19, 1, 32; +L_0xc54b60 .part v0xc50f30_0, 19, 1; +L_0xc54ec0 .part/pv L_0xc54f60, 20, 1, 32; +L_0xc55380 .part v0xc50f30_0, 20, 1; +L_0xc55190 .part/pv L_0xc55230, 21, 1, 32; +L_0xc550e0 .part v0xc50f30_0, 21, 1; +L_0xc55420 .part/pv L_0xc554c0, 22, 1, 32; +L_0xc558d0 .part v0xc50f30_0, 22, 1; +L_0xc556d0 .part/pv L_0xc55770, 23, 1, 32; +L_0xc55610 .part v0xc50f30_0, 23, 1; +L_0xc55970 .part/pv L_0xc55a10, 24, 1, 32; +L_0xc55e70 .part v0xc50f30_0, 24, 1; +L_0xc55c50 .part/pv L_0xc55cf0, 25, 1, 32; +L_0xc55b80 .part v0xc50f30_0, 25, 1; +L_0xc55f10 .part/pv L_0xc55fb0, 26, 1, 32; +L_0xc563e0 .part v0xc50f30_0, 26, 1; +L_0xc561e0 .part/pv L_0xc56280, 27, 1, 32; +L_0xc56100 .part v0xc50f30_0, 27, 1; +L_0xc56480 .part/pv L_0xc56520, 28, 1, 32; +L_0xc56950 .part v0xc50f30_0, 28, 1; +L_0xc56780 .part/pv L_0xc56820, 29, 1, 32; +L_0xc56690 .part v0xc50f30_0, 29, 1; +L_0xc569f0 .part/pv L_0xc514b0, 30, 1, 32; +L_0xc56a90 .part v0xc50f30_0, 30, 1; +L_0xc54120 .part/pv L_0xc515f0, 31, 1, 32; +L_0xc54250 .part v0xc50f30_0, 31, 1; +L_0xc64060 .part v0xc50fb0_0, 0, 1; +RS_0x7fb7ca18a188 .resolv tri, L_0xc653d0, L_0xc66300, L_0xc67360, L_0xc68260; +L_0xc69540 .part/pv RS_0x7fb7ca18a188, 0, 4, 32; +L_0xc57650 .part v0xc50a30_0, 0, 4; +L_0xc57740 .part RS_0x7fb7ca18c078, 0, 4; +L_0xc69810 .part v0xc50fb0_0, 0, 1; +RS_0x7fb7ca1893a8 .resolv tri, L_0xc6a570, L_0xc6b4e0, L_0xc6c6a0, L_0xc6d760; +L_0xc6e9c0 .part/pv RS_0x7fb7ca1893a8, 4, 4, 32; +L_0xc695e0 .part v0xc50a30_0, 4, 4; +L_0xc69680 .part RS_0x7fb7ca18c078, 4, 4; +RS_0x7fb7ca1885c8 .resolv tri, L_0xc6f9d0, L_0xc70a60, L_0xc71c00, L_0xc72c60; +L_0xc73ec0 .part/pv RS_0x7fb7ca1885c8, 8, 4, 32; +L_0xc73ff0 .part v0xc50a30_0, 8, 4; +L_0xc6ea60 .part RS_0x7fb7ca18c078, 8, 4; +RS_0x7fb7ca1877e8 .resolv tri, L_0xc74f50, L_0xc75fe0, L_0xc77180, L_0xc781e0; +L_0xc79440 .part/pv RS_0x7fb7ca1877e8, 12, 4, 32; +L_0xc74120 .part v0xc50a30_0, 12, 4; +L_0xc741c0 .part RS_0x7fb7ca18c078, 12, 4; +RS_0x7fb7ca186a08 .resolv tri, L_0xc7a440, L_0xc7b4d0, L_0xc7c670, L_0xc7d6d0; +L_0xc7e8f0 .part/pv RS_0x7fb7ca186a08, 16, 4, 32; +L_0xc7e990 .part v0xc50a30_0, 16, 4; +L_0xc794e0 .part RS_0x7fb7ca18c078, 16, 4; +RS_0x7fb7ca185c28 .resolv tri, L_0xc7f8f0, L_0xc80980, L_0xc81960, L_0xc82860; +L_0xc83ba0 .part/pv RS_0x7fb7ca185c28, 20, 4, 32; +L_0xc7ea30 .part v0xc50a30_0, 20, 4; +L_0xc7ead0 .part RS_0x7fb7ca18c078, 20, 4; +RS_0x7fb7ca184e48 .resolv tri, L_0xc84bd0, L_0xc85c60, L_0xc86e00, L_0xc87e80; +L_0xc890e0 .part/pv RS_0x7fb7ca184e48, 24, 4, 32; +L_0xc89290 .part v0xc50a30_0, 24, 4; +L_0xc83c40 .part RS_0x7fb7ca18c078, 24, 4; +RS_0x7fb7ca184068 .resolv tri, L_0xc8a1e0, L_0xc8b240, L_0xc8c3e0, L_0xc8d480; +L_0xc8e690 .part/pv RS_0x7fb7ca184068, 28, 4, 32; +L_0xc89440 .part v0xc50a30_0, 28, 4; +L_0xc894e0 .part RS_0x7fb7ca18c078, 28, 4; +S_0xc46430 .scope module, "addsubmux" "mux" 4 236, 4 3, S_0xc28a00; + .timescale -9 -12; +L_0xc4d930/d .functor NOT 1, L_0xc64060, C4<0>, C4<0>, C4<0>; +L_0xc4d930 .delay (10000,10000,10000) L_0xc4d930/d; +L_0xc56c20/d .functor AND 1, L_0xc53f20, L_0xc4d930, C4<1>, C4<1>; +L_0xc56c20 .delay (10000,10000,10000) L_0xc56c20/d; +L_0xc56cc0/d .functor AND 1, L_0xc57860, L_0xc4d930, C4<1>, C4<1>; +L_0xc56cc0 .delay (10000,10000,10000) L_0xc56cc0/d; +L_0xc540a0/d .functor AND 1, L_0xc579d0, L_0xc4d930, C4<1>, C4<1>; +L_0xc540a0 .delay (10000,10000,10000) L_0xc540a0/d; +L_0xc57a70/d .functor AND 1, L_0xc57b60, L_0xc4d930, C4<1>, C4<1>; +L_0xc57a70 .delay (10000,10000,10000) L_0xc57a70/d; +L_0xc57c00/d .functor AND 1, L_0xc57d30, L_0xc4d930, C4<1>, C4<1>; +L_0xc57c00 .delay (10000,10000,10000) L_0xc57c00/d; +L_0xc57dd0/d .functor AND 1, L_0xc57ec0, L_0xc4d930, C4<1>, C4<1>; +L_0xc57dd0 .delay (10000,10000,10000) L_0xc57dd0/d; +L_0xc57fa0/d .functor AND 1, L_0xc58110, L_0xc4d930, C4<1>, C4<1>; +L_0xc57fa0 .delay (10000,10000,10000) L_0xc57fa0/d; +L_0xc58200/d .functor AND 1, L_0xc582b0, L_0xc4d930, C4<1>, C4<1>; +L_0xc58200 .delay (10000,10000,10000) L_0xc58200/d; +L_0xc583a0/d .functor AND 1, L_0xc584b0, L_0xc4d930, C4<1>, C4<1>; +L_0xc583a0 .delay (10000,10000,10000) L_0xc583a0/d; +L_0xc58550/d .functor AND 1, L_0xc585f0, L_0xc4d930, C4<1>, C4<1>; +L_0xc58550 .delay (10000,10000,10000) L_0xc58550/d; +L_0xc586f0/d .functor AND 1, L_0xc58800, L_0xc4d930, C4<1>, C4<1>; +L_0xc586f0 .delay (10000,10000,10000) L_0xc586f0/d; +L_0xc58450/d .functor AND 1, L_0xc58930, L_0xc4d930, C4<1>, C4<1>; +L_0xc58450 .delay (10000,10000,10000) L_0xc58450/d; +L_0xc58690/d .functor AND 1, L_0xc58b50, L_0xc4d930, C4<1>, C4<1>; +L_0xc58690 .delay (10000,10000,10000) L_0xc58690/d; +L_0xc58bf0/d .functor AND 1, L_0xc58d10, L_0xc4d930, C4<1>, C4<1>; +L_0xc58bf0 .delay (10000,10000,10000) L_0xc58bf0/d; +L_0xc58e30/d .functor AND 1, L_0xc59160, L_0xc4d930, C4<1>, C4<1>; +L_0xc58e30 .delay (10000,10000,10000) L_0xc58e30/d; +L_0xc58090/d .functor AND 1, L_0xc592c0, L_0xc4d930, C4<1>, C4<1>; +L_0xc58090 .delay (10000,10000,10000) L_0xc58090/d; +L_0xc593f0/d .functor AND 1, L_0xc595b0, L_0xc4d930, C4<1>, C4<1>; +L_0xc593f0 .delay (10000,10000,10000) L_0xc593f0/d; +L_0xc590d0/d .functor AND 1, L_0xc596e0, L_0xc4d930, C4<1>, C4<1>; +L_0xc590d0 .delay (10000,10000,10000) L_0xc590d0/d; +L_0xc59360/d .functor AND 1, L_0xc59510, L_0xc4d930, C4<1>, C4<1>; +L_0xc59360 .delay (10000,10000,10000) L_0xc59360/d; +L_0xc59960/d .functor AND 1, L_0xc59a80, L_0xc4d930, C4<1>, C4<1>; +L_0xc59960 .delay (10000,10000,10000) L_0xc59960/d; +L_0xc59780/d .functor AND 1, L_0xc598b0, L_0xc4d930, C4<1>, C4<1>; +L_0xc59780 .delay (10000,10000,10000) L_0xc59780/d; +L_0xc59ce0/d .functor AND 1, L_0xc59e00, L_0xc4d930, C4<1>, C4<1>; +L_0xc59ce0 .delay (10000,10000,10000) L_0xc59ce0/d; +L_0xc59b20/d .functor AND 1, L_0xc59c20, L_0xc4d930, C4<1>, C4<1>; +L_0xc59b20 .delay (10000,10000,10000) L_0xc59b20/d; +L_0xc5a0c0/d .functor AND 1, L_0xc5a1e0, L_0xc4d930, C4<1>, C4<1>; +L_0xc5a0c0 .delay (10000,10000,10000) L_0xc5a0c0/d; +L_0xc59ea0/d .functor AND 1, L_0xc59ff0, L_0xc4d930, C4<1>, C4<1>; +L_0xc59ea0 .delay (10000,10000,10000) L_0xc59ea0/d; +L_0xc5a4c0/d .functor AND 1, L_0xc5a5b0, L_0xc4d930, C4<1>, C4<1>; +L_0xc5a4c0 .delay (10000,10000,10000) L_0xc5a4c0/d; +L_0xc5a280/d .functor AND 1, L_0xc5a3e0, L_0xc4d930, C4<1>, C4<1>; +L_0xc5a280 .delay (10000,10000,10000) L_0xc5a280/d; +L_0xc5a870/d .functor AND 1, L_0xc5a920, L_0xc4d930, C4<1>, C4<1>; +L_0xc5a870 .delay (10000,10000,10000) L_0xc5a870/d; +L_0xc5a650/d .functor AND 1, L_0xc5a780, L_0xc4d930, C4<1>, C4<1>; +L_0xc5a650 .delay (10000,10000,10000) L_0xc5a650/d; +L_0xc5ac00/d .functor AND 1, L_0xc5acf0, L_0xc4d930, C4<1>, C4<1>; +L_0xc5ac00 .delay (10000,10000,10000) L_0xc5ac00/d; +L_0xc589d0/d .functor AND 1, L_0xc5a9c0, L_0xc4d930, C4<1>, C4<1>; +L_0xc589d0 .delay (10000,10000,10000) L_0xc589d0/d; +L_0xc58ad0/d .functor AND 1, L_0xc59020, L_0xc4d930, C4<1>, C4<1>; +L_0xc58ad0 .delay (10000,10000,10000) L_0xc58ad0/d; +L_0xc5ab00/d .functor AND 1, L_0xc58ec0, L_0xc64060, C4<1>, C4<1>; +L_0xc5ab00 .delay (10000,10000,10000) L_0xc5ab00/d; +L_0xc58f60/d .functor AND 1, L_0xc57070, L_0xc64060, C4<1>, C4<1>; +L_0xc58f60 .delay (10000,10000,10000) L_0xc58f60/d; +L_0xc56d20/d .functor AND 1, L_0xc56ec0, L_0xc64060, C4<1>, C4<1>; +L_0xc56d20 .delay (10000,10000,10000) L_0xc56d20/d; +L_0xc56f60/d .functor AND 1, L_0xc5bd20, L_0xc64060, C4<1>, C4<1>; +L_0xc56f60 .delay (10000,10000,10000) L_0xc56f60/d; +L_0xc5b9b0/d .functor AND 1, L_0xc5bb60, L_0xc64060, C4<1>, C4<1>; +L_0xc5b9b0 .delay (10000,10000,10000) L_0xc5b9b0/d; +L_0xc5ba70/d .functor AND 1, L_0xc5c0c0, L_0xc64060, C4<1>, C4<1>; +L_0xc5ba70 .delay (10000,10000,10000) L_0xc5ba70/d; +L_0xc5bdc0/d .functor AND 1, L_0xc5bed0, L_0xc64060, C4<1>, C4<1>; +L_0xc5bdc0 .delay (10000,10000,10000) L_0xc5bdc0/d; +L_0xc5bf70/d .functor AND 1, L_0xc5c500, L_0xc64060, C4<1>, C4<1>; +L_0xc5bf70 .delay (10000,10000,10000) L_0xc5bf70/d; +L_0xc5c160/d .functor AND 1, L_0xc5c3b0, L_0xc64060, C4<1>, C4<1>; +L_0xc5c160 .delay (10000,10000,10000) L_0xc5c160/d; +L_0xc5c450/d .functor AND 1, L_0xc5c8a0, L_0xc64060, C4<1>, C4<1>; +L_0xc5c450 .delay (10000,10000,10000) L_0xc5c450/d; +L_0xc5c5a0/d .functor AND 1, L_0xc5c690, L_0xc64060, C4<1>, C4<1>; +L_0xc5c5a0 .delay (10000,10000,10000) L_0xc5c5a0/d; +L_0xc5c730/d .functor AND 1, L_0xc5cc10, L_0xc64060, C4<1>, C4<1>; +L_0xc5c730 .delay (10000,10000,10000) L_0xc5c730/d; +L_0xc5c940/d .functor AND 1, L_0xc5ca30, L_0xc64060, C4<1>, C4<1>; +L_0xc5c940 .delay (10000,10000,10000) L_0xc5c940/d; +L_0xc5cad0/d .functor AND 1, L_0xc5cfa0, L_0xc64060, C4<1>, C4<1>; +L_0xc5cad0 .delay (10000,10000,10000) L_0xc5cad0/d; +L_0xc5ccb0/d .functor AND 1, L_0xc5cdd0, L_0xc64060, C4<1>, C4<1>; +L_0xc5ccb0 .delay (10000,10000,10000) L_0xc5ccb0/d; +L_0xc5ce70/d .functor AND 1, L_0xc5c280, L_0xc64060, C4<1>, C4<1>; +L_0xc5ce70 .delay (10000,10000,10000) L_0xc5ce70/d; +L_0xc5cf40/d .functor AND 1, L_0xc5d0d0, L_0xc64060, C4<1>, C4<1>; +L_0xc5cf40 .delay (10000,10000,10000) L_0xc5cf40/d; +L_0xc5d3d0/d .functor AND 1, L_0xc5d490, L_0xc64060, C4<1>, C4<1>; +L_0xc5d3d0 .delay (10000,10000,10000) L_0xc5d3d0/d; +L_0xc5d530/d .functor AND 1, L_0xc5d620, L_0xc64060, C4<1>, C4<1>; +L_0xc5d530 .delay (10000,10000,10000) L_0xc5d530/d; +L_0xc5d6c0/d .functor AND 1, L_0xc5d7e0, L_0xc64060, C4<1>, C4<1>; +L_0xc5d6c0 .delay (10000,10000,10000) L_0xc5d6c0/d; +L_0xc5d890/d .functor AND 1, L_0xc5d9b0, L_0xc64060, C4<1>, C4<1>; +L_0xc5d890 .delay (10000,10000,10000) L_0xc5d890/d; +L_0xc5da50/d .functor AND 1, L_0xc5df50, L_0xc64060, C4<1>, C4<1>; +L_0xc5da50 .delay (10000,10000,10000) L_0xc5da50/d; +L_0xc5db70/d .functor AND 1, L_0xc5dc90, L_0xc64060, C4<1>, C4<1>; +L_0xc5db70 .delay (10000,10000,10000) L_0xc5db70/d; +L_0xc5dd30/d .functor AND 1, L_0xc5de50, L_0xc64060, C4<1>, C4<1>; +L_0xc5dd30 .delay (10000,10000,10000) L_0xc5dd30/d; +L_0xc5def0/d .functor AND 1, L_0xc5e0b0, L_0xc64060, C4<1>, C4<1>; +L_0xc5def0 .delay (10000,10000,10000) L_0xc5def0/d; +L_0xc5e150/d .functor AND 1, L_0xc5e270, L_0xc64060, C4<1>, C4<1>; +L_0xc5e150 .delay (10000,10000,10000) L_0xc5e150/d; +L_0xc5e310/d .functor AND 1, L_0xc5e400, L_0xc64060, C4<1>, C4<1>; +L_0xc5e310 .delay (10000,10000,10000) L_0xc5e310/d; +L_0xc5e4a0/d .functor AND 1, L_0xc5e5c0, L_0xc64060, C4<1>, C4<1>; +L_0xc5e4a0 .delay (10000,10000,10000) L_0xc5e4a0/d; +L_0xc5e660/d .functor AND 1, L_0xc5e780, L_0xc64060, C4<1>, C4<1>; +L_0xc5e660 .delay (10000,10000,10000) L_0xc5e660/d; +L_0xc5e820/d .functor AND 1, L_0xc5e940, L_0xc64060, C4<1>, C4<1>; +L_0xc5e820 .delay (10000,10000,10000) L_0xc5e820/d; +L_0xc5e9e0/d .functor AND 1, L_0xc5ec80, L_0xc64060, C4<1>, C4<1>; +L_0xc5e9e0 .delay (10000,10000,10000) L_0xc5e9e0/d; +L_0xc5d250/d .functor AND 1, L_0xc5ed20, L_0xc64060, C4<1>, C4<1>; +L_0xc5d250 .delay (10000,10000,10000) L_0xc5d250/d; +L_0xc5d370/d .functor OR 1, L_0xc56c20, L_0xc5ab00, C4<0>, C4<0>; +L_0xc5d370 .delay (10000,10000,10000) L_0xc5d370/d; +L_0xc5ea70/d .functor OR 1, L_0xc56cc0, L_0xc58f60, C4<0>, C4<0>; +L_0xc5ea70 .delay (10000,10000,10000) L_0xc5ea70/d; +L_0xc57240/d .functor OR 1, L_0xc540a0, L_0xc56d20, C4<0>, C4<0>; +L_0xc57240 .delay (10000,10000,10000) L_0xc57240/d; +L_0xc5eeb0/d .functor OR 1, L_0xc57a70, L_0xc56f60, C4<0>, C4<0>; +L_0xc5eeb0 .delay (10000,10000,10000) L_0xc5eeb0/d; +L_0xc5fe00/d .functor OR 1, L_0xc57c00, L_0xc5b9b0, C4<0>, C4<0>; +L_0xc5fe00 .delay (10000,10000,10000) L_0xc5fe00/d; +L_0xc5ffa0/d .functor OR 1, L_0xc57dd0, L_0xc5ba70, C4<0>, C4<0>; +L_0xc5ffa0 .delay (10000,10000,10000) L_0xc5ffa0/d; +L_0xc571b0/d .functor OR 1, L_0xc57fa0, L_0xc5bdc0, C4<0>, C4<0>; +L_0xc571b0 .delay (10000,10000,10000) L_0xc571b0/d; +L_0xc604c0/d .functor OR 1, L_0xc58200, L_0xc5bf70, C4<0>, C4<0>; +L_0xc604c0 .delay (10000,10000,10000) L_0xc604c0/d; +L_0xc606f0/d .functor OR 1, L_0xc583a0, L_0xc5c160, C4<0>, C4<0>; +L_0xc606f0 .delay (10000,10000,10000) L_0xc606f0/d; +L_0xc609d0/d .functor OR 1, L_0xc58550, L_0xc5c450, C4<0>, C4<0>; +L_0xc609d0 .delay (10000,10000,10000) L_0xc609d0/d; +L_0xc60c00/d .functor OR 1, L_0xc586f0, L_0xc5c5a0, C4<0>, C4<0>; +L_0xc60c00 .delay (10000,10000,10000) L_0xc60c00/d; +L_0xc60e30/d .functor OR 1, L_0xc58450, L_0xc5c730, C4<0>, C4<0>; +L_0xc60e30 .delay (10000,10000,10000) L_0xc60e30/d; +L_0xc61060/d .functor OR 1, L_0xc58690, L_0xc5c940, C4<0>, C4<0>; +L_0xc61060 .delay (10000,10000,10000) L_0xc61060/d; +L_0xc61290/d .functor OR 1, L_0xc58bf0, L_0xc5cad0, C4<0>, C4<0>; +L_0xc61290 .delay (10000,10000,10000) L_0xc61290/d; +L_0xc616d0/d .functor OR 1, L_0xc58e30, L_0xc5ccb0, C4<0>, C4<0>; +L_0xc616d0 .delay (10000,10000,10000) L_0xc616d0/d; +L_0xc61810/d .functor OR 1, L_0xc58090, L_0xc5ce70, C4<0>, C4<0>; +L_0xc61810 .delay (10000,10000,10000) L_0xc61810/d; +L_0xc61a40/d .functor OR 1, L_0xc593f0, L_0xc5cf40, C4<0>, C4<0>; +L_0xc61a40 .delay (10000,10000,10000) L_0xc61a40/d; +L_0xc61c90/d .functor OR 1, L_0xc590d0, L_0xc5d3d0, C4<0>, C4<0>; +L_0xc61c90 .delay (10000,10000,10000) L_0xc61c90/d; +L_0xc61ee0/d .functor OR 1, L_0xc59360, L_0xc5d530, C4<0>, C4<0>; +L_0xc61ee0 .delay (10000,10000,10000) L_0xc61ee0/d; +L_0xc623e0/d .functor OR 1, L_0xc59960, L_0xc5d6c0, C4<0>, C4<0>; +L_0xc623e0 .delay (10000,10000,10000) L_0xc623e0/d; +L_0xc62630/d .functor OR 1, L_0xc59780, L_0xc5d890, C4<0>, C4<0>; +L_0xc62630 .delay (10000,10000,10000) L_0xc62630/d; +L_0xc62770/d .functor OR 1, L_0xc59ce0, L_0xc5da50, C4<0>, C4<0>; +L_0xc62770 .delay (10000,10000,10000) L_0xc62770/d; +L_0xc62920/d .functor OR 1, L_0xc59b20, L_0xc5db70, C4<0>, C4<0>; +L_0xc62920 .delay (10000,10000,10000) L_0xc62920/d; +L_0xc62a70/d .functor OR 1, L_0xc5a0c0, L_0xc5dd30, C4<0>, C4<0>; +L_0xc62a70 .delay (10000,10000,10000) L_0xc62a70/d; +L_0xc62ca0/d .functor OR 1, L_0xc59ea0, L_0xc5def0, C4<0>, C4<0>; +L_0xc62ca0 .delay (10000,10000,10000) L_0xc62ca0/d; +L_0xc631f0/d .functor OR 1, L_0xc5a4c0, L_0xc5e150, C4<0>, C4<0>; +L_0xc631f0 .delay (10000,10000,10000) L_0xc631f0/d; +L_0xc63440/d .functor OR 1, L_0xc5a280, L_0xc5e310, C4<0>, C4<0>; +L_0xc63440 .delay (10000,10000,10000) L_0xc63440/d; +L_0xc63630/d .functor OR 1, L_0xc5a870, L_0xc5e4a0, C4<0>, C4<0>; +L_0xc63630 .delay (10000,10000,10000) L_0xc63630/d; +L_0xc62fb0/d .functor OR 1, L_0xc5a650, L_0xc5e660, C4<0>, C4<0>; +L_0xc62fb0 .delay (10000,10000,10000) L_0xc62fb0/d; +L_0xc63960/d .functor OR 1, L_0xc5ac00, L_0xc5e820, C4<0>, C4<0>; +L_0xc63960 .delay (10000,10000,10000) L_0xc63960/d; +L_0xc59f00/d .functor OR 1, L_0xc589d0, L_0xc5e9e0, C4<0>, C4<0>; +L_0xc59f00 .delay (10000,10000,10000) L_0xc59f00/d; +L_0xc5ba10/d .functor OR 1, L_0xc58ad0, L_0xc5d250, C4<0>, C4<0>; +L_0xc5ba10 .delay (10000,10000,10000) L_0xc5ba10/d; +v0xc46520_0 .net *"_s1", 0 0, L_0xc53f20; 1 drivers +v0xc465e0_0 .net *"_s101", 0 0, L_0xc5d620; 1 drivers +v0xc46680_0 .net *"_s103", 0 0, L_0xc5d7e0; 1 drivers +v0xc46720_0 .net *"_s105", 0 0, L_0xc5d9b0; 1 drivers +v0xc467a0_0 .net *"_s107", 0 0, L_0xc5df50; 1 drivers +v0xc46840_0 .net *"_s109", 0 0, L_0xc5dc90; 1 drivers +v0xc468e0_0 .net *"_s11", 0 0, L_0xc57ec0; 1 drivers +v0xc46980_0 .net *"_s111", 0 0, L_0xc5de50; 1 drivers +v0xc46a70_0 .net *"_s113", 0 0, L_0xc5e0b0; 1 drivers +v0xc46b10_0 .net *"_s115", 0 0, L_0xc5e270; 1 drivers +v0xc46bb0_0 .net *"_s117", 0 0, L_0xc5e400; 1 drivers +v0xc46c50_0 .net *"_s119", 0 0, L_0xc5e5c0; 1 drivers +v0xc46cf0_0 .net *"_s121", 0 0, L_0xc5e780; 1 drivers +v0xc46d90_0 .net *"_s123", 0 0, L_0xc5e940; 1 drivers +v0xc46eb0_0 .net *"_s125", 0 0, L_0xc5ec80; 1 drivers +v0xc46f50_0 .net *"_s127", 0 0, L_0xc5ed20; 1 drivers +v0xc46e10_0 .net *"_s128", 0 0, L_0xc5d370; 1 drivers +v0xc470a0_0 .net *"_s13", 0 0, L_0xc58110; 1 drivers +v0xc471c0_0 .net *"_s130", 0 0, L_0xc5ea70; 1 drivers +v0xc47240_0 .net *"_s132", 0 0, L_0xc57240; 1 drivers +v0xc47120_0 .net *"_s134", 0 0, L_0xc5eeb0; 1 drivers +v0xc47370_0 .net *"_s136", 0 0, L_0xc5fe00; 1 drivers +v0xc472c0_0 .net *"_s138", 0 0, L_0xc5ffa0; 1 drivers +v0xc474b0_0 .net *"_s140", 0 0, L_0xc571b0; 1 drivers +v0xc47410_0 .net *"_s142", 0 0, L_0xc604c0; 1 drivers +v0xc47600_0 .net *"_s144", 0 0, L_0xc606f0; 1 drivers +v0xc47550_0 .net *"_s146", 0 0, L_0xc609d0; 1 drivers +v0xc47760_0 .net *"_s148", 0 0, L_0xc60c00; 1 drivers +v0xc476a0_0 .net *"_s15", 0 0, L_0xc582b0; 1 drivers +v0xc478d0_0 .net *"_s150", 0 0, L_0xc60e30; 1 drivers +v0xc477e0_0 .net *"_s152", 0 0, L_0xc61060; 1 drivers +v0xc47a50_0 .net *"_s154", 0 0, L_0xc61290; 1 drivers +v0xc47950_0 .net *"_s156", 0 0, L_0xc616d0; 1 drivers +v0xc47be0_0 .net *"_s158", 0 0, L_0xc61810; 1 drivers +v0xc47ad0_0 .net *"_s160", 0 0, L_0xc61a40; 1 drivers +v0xc47d80_0 .net *"_s162", 0 0, L_0xc61c90; 1 drivers +v0xc47c60_0 .net *"_s164", 0 0, L_0xc61ee0; 1 drivers +v0xc47d00_0 .net *"_s166", 0 0, L_0xc623e0; 1 drivers +v0xc47f40_0 .net *"_s168", 0 0, L_0xc62630; 1 drivers +v0xc47fc0_0 .net *"_s17", 0 0, L_0xc584b0; 1 drivers +v0xc47e00_0 .net *"_s170", 0 0, L_0xc62770; 1 drivers +v0xc47ea0_0 .net *"_s172", 0 0, L_0xc62920; 1 drivers +v0xc481a0_0 .net *"_s174", 0 0, L_0xc62a70; 1 drivers +v0xc48220_0 .net *"_s176", 0 0, L_0xc62ca0; 1 drivers +v0xc48040_0 .net *"_s178", 0 0, L_0xc631f0; 1 drivers +v0xc480e0_0 .net *"_s180", 0 0, L_0xc63440; 1 drivers +v0xc48420_0 .net *"_s182", 0 0, L_0xc63630; 1 drivers +v0xc484a0_0 .net *"_s184", 0 0, L_0xc62fb0; 1 drivers +v0xc482c0_0 .net *"_s186", 0 0, L_0xc63960; 1 drivers +v0xc48360_0 .net *"_s188", 0 0, L_0xc59f00; 1 drivers +v0xc486c0_0 .net *"_s19", 0 0, L_0xc585f0; 1 drivers +v0xc48740_0 .net *"_s190", 0 0, L_0xc5ba10; 1 drivers +v0xc48540_0 .net *"_s21", 0 0, L_0xc58800; 1 drivers +v0xc485e0_0 .net *"_s23", 0 0, L_0xc58930; 1 drivers +v0xc48980_0 .net *"_s25", 0 0, L_0xc58b50; 1 drivers +v0xc48a00_0 .net *"_s27", 0 0, L_0xc58d10; 1 drivers +v0xc487c0_0 .net *"_s29", 0 0, L_0xc59160; 1 drivers +v0xc48860_0 .net *"_s3", 0 0, L_0xc57860; 1 drivers +v0xc48900_0 .net *"_s31", 0 0, L_0xc592c0; 1 drivers +v0xc48c80_0 .net *"_s33", 0 0, L_0xc595b0; 1 drivers +v0xc48aa0_0 .net *"_s35", 0 0, L_0xc596e0; 1 drivers +v0xc48b40_0 .net *"_s37", 0 0, L_0xc59510; 1 drivers +v0xc48be0_0 .net *"_s39", 0 0, L_0xc59a80; 1 drivers +v0xc48f20_0 .net *"_s41", 0 0, L_0xc598b0; 1 drivers +v0xc48d20_0 .net *"_s43", 0 0, L_0xc59e00; 1 drivers +v0xc48dc0_0 .net *"_s45", 0 0, L_0xc59c20; 1 drivers +v0xc48e60_0 .net *"_s47", 0 0, L_0xc5a1e0; 1 drivers +v0xc491c0_0 .net *"_s49", 0 0, L_0xc59ff0; 1 drivers +v0xc48fc0_0 .net *"_s5", 0 0, L_0xc579d0; 1 drivers +v0xc49060_0 .net *"_s51", 0 0, L_0xc5a5b0; 1 drivers +v0xc49100_0 .net *"_s53", 0 0, L_0xc5a3e0; 1 drivers +v0xc49480_0 .net *"_s55", 0 0, L_0xc5a920; 1 drivers +v0xc49240_0 .net *"_s57", 0 0, L_0xc5a780; 1 drivers +v0xc492e0_0 .net *"_s59", 0 0, L_0xc5acf0; 1 drivers +v0xc49380_0 .net *"_s61", 0 0, L_0xc5a9c0; 1 drivers +v0xc49760_0 .net *"_s63", 0 0, L_0xc59020; 1 drivers +v0xc49500_0 .net *"_s65", 0 0, L_0xc58ec0; 1 drivers +v0xc495a0_0 .net *"_s67", 0 0, L_0xc57070; 1 drivers +v0xc49640_0 .net *"_s69", 0 0, L_0xc56ec0; 1 drivers +v0xc496e0_0 .net *"_s7", 0 0, L_0xc57b60; 1 drivers +v0xc49a70_0 .net *"_s71", 0 0, L_0xc5bd20; 1 drivers +v0xc49af0_0 .net *"_s73", 0 0, L_0xc5bb60; 1 drivers +v0xc49800_0 .net *"_s75", 0 0, L_0xc5c0c0; 1 drivers +v0xc498a0_0 .net *"_s77", 0 0, L_0xc5bed0; 1 drivers +v0xc49940_0 .net *"_s79", 0 0, L_0xc5c500; 1 drivers +v0xc499e0_0 .net *"_s81", 0 0, L_0xc5c3b0; 1 drivers +v0xc49e50_0 .net *"_s83", 0 0, L_0xc5c8a0; 1 drivers +v0xc49ef0_0 .net *"_s85", 0 0, L_0xc5c690; 1 drivers +v0xc49b90_0 .net *"_s87", 0 0, L_0xc5cc10; 1 drivers +v0xc49c30_0 .net *"_s89", 0 0, L_0xc5ca30; 1 drivers +v0xc49cd0_0 .net *"_s9", 0 0, L_0xc57d30; 1 drivers +v0xc49d70_0 .net *"_s91", 0 0, L_0xc5cfa0; 1 drivers +v0xc4a260_0 .net *"_s93", 0 0, L_0xc5cdd0; 1 drivers +v0xc4a2e0_0 .net *"_s95", 0 0, L_0xc5c280; 1 drivers +v0xc49f90_0 .net *"_s97", 0 0, L_0xc5d0d0; 1 drivers +v0xc4a030_0 .net *"_s99", 0 0, L_0xc5d490; 1 drivers +v0xc4a0d0_0 .net "address", 0 0, L_0xc64060; 1 drivers +v0xc4a170_0 .alias "in0", 31 0, v0xc508d0_0; +v0xc4a680_0 .net "in00addr", 0 0, L_0xc56c20; 1 drivers +v0xc4a700_0 .net "in010addr", 0 0, L_0xc586f0; 1 drivers +v0xc4a360_0 .net "in011addr", 0 0, L_0xc58450; 1 drivers +v0xc4a400_0 .net "in012addr", 0 0, L_0xc58690; 1 drivers +v0xc4a4a0_0 .net "in013addr", 0 0, L_0xc58bf0; 1 drivers +v0xc4a540_0 .net "in014addr", 0 0, L_0xc58e30; 1 drivers +v0xc4a5e0_0 .net "in015addr", 0 0, L_0xc58090; 1 drivers +v0xc4aad0_0 .net "in016addr", 0 0, L_0xc593f0; 1 drivers +v0xc4a7a0_0 .net "in017addr", 0 0, L_0xc590d0; 1 drivers +v0xc4a840_0 .net "in018addr", 0 0, L_0xc59360; 1 drivers +v0xc4a8e0_0 .net "in019addr", 0 0, L_0xc59960; 1 drivers +v0xc4a980_0 .net "in01addr", 0 0, L_0xc56cc0; 1 drivers +v0xc4aa20_0 .net "in020addr", 0 0, L_0xc59780; 1 drivers +v0xc4aed0_0 .net "in021addr", 0 0, L_0xc59ce0; 1 drivers +v0xc4ab70_0 .net "in022addr", 0 0, L_0xc59b20; 1 drivers +v0xc4ac10_0 .net "in023addr", 0 0, L_0xc5a0c0; 1 drivers +v0xc4acb0_0 .net "in024addr", 0 0, L_0xc59ea0; 1 drivers +v0xc4ad50_0 .net "in025addr", 0 0, L_0xc5a4c0; 1 drivers +v0xc4adf0_0 .net "in026addr", 0 0, L_0xc5a280; 1 drivers +v0xc4b300_0 .net "in027addr", 0 0, L_0xc5a870; 1 drivers +v0xc4af50_0 .net "in028addr", 0 0, L_0xc5a650; 1 drivers +v0xc4afd0_0 .net "in029addr", 0 0, L_0xc5ac00; 1 drivers +v0xc4b070_0 .net "in02addr", 0 0, L_0xc540a0; 1 drivers +v0xc4b110_0 .net "in030addr", 0 0, L_0xc589d0; 1 drivers +v0xc4b1b0_0 .net "in031addr", 0 0, L_0xc58ad0; 1 drivers +v0xc4b250_0 .net "in03addr", 0 0, L_0xc57a70; 1 drivers +v0xc4b770_0 .net "in04addr", 0 0, L_0xc57c00; 1 drivers +v0xc4b810_0 .net "in05addr", 0 0, L_0xc57dd0; 1 drivers +v0xc4b380_0 .net "in06addr", 0 0, L_0xc57fa0; 1 drivers +v0xc4b420_0 .net "in07addr", 0 0, L_0xc58200; 1 drivers +v0xc4b4c0_0 .net "in08addr", 0 0, L_0xc583a0; 1 drivers +v0xc4b560_0 .net "in09addr", 0 0, L_0xc58550; 1 drivers +v0xc4b600_0 .alias "in1", 31 0, v0xc50b70_0; +v0xc4b6a0_0 .net "in10addr", 0 0, L_0xc5ab00; 1 drivers +v0xc4bcc0_0 .net "in110addr", 0 0, L_0xc5c5a0; 1 drivers +v0xc4bd40_0 .net "in111addr", 0 0, L_0xc5c730; 1 drivers +v0xc4b890_0 .net "in112addr", 0 0, L_0xc5c940; 1 drivers +v0xc4b930_0 .net "in113addr", 0 0, L_0xc5cad0; 1 drivers +v0xc4b9d0_0 .net "in114addr", 0 0, L_0xc5ccb0; 1 drivers +v0xc4ba70_0 .net "in115addr", 0 0, L_0xc5ce70; 1 drivers +v0xc4bb10_0 .net "in116addr", 0 0, L_0xc5cf40; 1 drivers +v0xc4bbb0_0 .net "in117addr", 0 0, L_0xc5d3d0; 1 drivers +v0xc4c230_0 .net "in118addr", 0 0, L_0xc5d530; 1 drivers +v0xc4c2b0_0 .net "in119addr", 0 0, L_0xc5d6c0; 1 drivers +v0xc4bdc0_0 .net "in11addr", 0 0, L_0xc58f60; 1 drivers +v0xc4be40_0 .net "in120addr", 0 0, L_0xc5d890; 1 drivers +v0xc4bee0_0 .net "in121addr", 0 0, L_0xc5da50; 1 drivers +v0xc4bf80_0 .net "in122addr", 0 0, L_0xc5db70; 1 drivers +v0xc4c020_0 .net "in123addr", 0 0, L_0xc5dd30; 1 drivers +v0xc4c0c0_0 .net "in124addr", 0 0, L_0xc5def0; 1 drivers +v0xc4c160_0 .net "in125addr", 0 0, L_0xc5e150; 1 drivers +v0xc4c7e0_0 .net "in126addr", 0 0, L_0xc5e310; 1 drivers +v0xc4c330_0 .net "in127addr", 0 0, L_0xc5e4a0; 1 drivers +v0xc4c3d0_0 .net "in128addr", 0 0, L_0xc5e660; 1 drivers +v0xc4c470_0 .net "in129addr", 0 0, L_0xc5e820; 1 drivers +v0xc4c510_0 .net "in12addr", 0 0, L_0xc56d20; 1 drivers +v0xc4c5b0_0 .net "in130addr", 0 0, L_0xc5e9e0; 1 drivers +v0xc4c650_0 .net "in131addr", 0 0, L_0xc5d250; 1 drivers +v0xc4c6f0_0 .net "in13addr", 0 0, L_0xc56f60; 1 drivers +v0xc4cd50_0 .net "in14addr", 0 0, L_0xc5b9b0; 1 drivers +v0xc4c860_0 .net "in15addr", 0 0, L_0xc5ba70; 1 drivers +v0xc4c900_0 .net "in16addr", 0 0, L_0xc5bdc0; 1 drivers +v0xc4c9a0_0 .net "in17addr", 0 0, L_0xc5bf70; 1 drivers +v0xc4ca40_0 .net "in18addr", 0 0, L_0xc5c160; 1 drivers +v0xc4cae0_0 .net "in19addr", 0 0, L_0xc5c450; 1 drivers +v0xc4cb80_0 .net "invaddr", 0 0, L_0xc4d930; 1 drivers +v0xc4cc20_0 .alias "out", 31 0, v0xc505d0_0; +L_0xc53f20 .part v0xc50f30_0, 0, 1; +L_0xc57860 .part v0xc50f30_0, 1, 1; +L_0xc579d0 .part v0xc50f30_0, 2, 1; +L_0xc57b60 .part v0xc50f30_0, 3, 1; +L_0xc57d30 .part v0xc50f30_0, 4, 1; +L_0xc57ec0 .part v0xc50f30_0, 5, 1; +L_0xc58110 .part v0xc50f30_0, 6, 1; +L_0xc582b0 .part v0xc50f30_0, 7, 1; +L_0xc584b0 .part v0xc50f30_0, 8, 1; +L_0xc585f0 .part v0xc50f30_0, 9, 1; +L_0xc58800 .part v0xc50f30_0, 10, 1; +L_0xc58930 .part v0xc50f30_0, 11, 1; +L_0xc58b50 .part v0xc50f30_0, 12, 1; +L_0xc58d10 .part v0xc50f30_0, 13, 1; +L_0xc59160 .part v0xc50f30_0, 14, 1; +L_0xc592c0 .part v0xc50f30_0, 15, 1; +L_0xc595b0 .part v0xc50f30_0, 16, 1; +L_0xc596e0 .part v0xc50f30_0, 17, 1; +L_0xc59510 .part v0xc50f30_0, 18, 1; +L_0xc59a80 .part v0xc50f30_0, 19, 1; +L_0xc598b0 .part v0xc50f30_0, 20, 1; +L_0xc59e00 .part v0xc50f30_0, 21, 1; +L_0xc59c20 .part v0xc50f30_0, 22, 1; +L_0xc5a1e0 .part v0xc50f30_0, 23, 1; +L_0xc59ff0 .part v0xc50f30_0, 24, 1; +L_0xc5a5b0 .part v0xc50f30_0, 25, 1; +L_0xc5a3e0 .part v0xc50f30_0, 26, 1; +L_0xc5a920 .part v0xc50f30_0, 27, 1; +L_0xc5a780 .part v0xc50f30_0, 28, 1; +L_0xc5acf0 .part v0xc50f30_0, 29, 1; +L_0xc5a9c0 .part v0xc50f30_0, 30, 1; +L_0xc59020 .part v0xc50f30_0, 31, 1; +L_0xc58ec0 .part RS_0x7fb7ca18ba18, 0, 1; +L_0xc57070 .part RS_0x7fb7ca18ba18, 1, 1; +L_0xc56ec0 .part RS_0x7fb7ca18ba18, 2, 1; +L_0xc5bd20 .part RS_0x7fb7ca18ba18, 3, 1; +L_0xc5bb60 .part RS_0x7fb7ca18ba18, 4, 1; +L_0xc5c0c0 .part RS_0x7fb7ca18ba18, 5, 1; +L_0xc5bed0 .part RS_0x7fb7ca18ba18, 6, 1; +L_0xc5c500 .part RS_0x7fb7ca18ba18, 7, 1; +L_0xc5c3b0 .part RS_0x7fb7ca18ba18, 8, 1; +L_0xc5c8a0 .part RS_0x7fb7ca18ba18, 9, 1; +L_0xc5c690 .part RS_0x7fb7ca18ba18, 10, 1; +L_0xc5cc10 .part RS_0x7fb7ca18ba18, 11, 1; +L_0xc5ca30 .part RS_0x7fb7ca18ba18, 12, 1; +L_0xc5cfa0 .part RS_0x7fb7ca18ba18, 13, 1; +L_0xc5cdd0 .part RS_0x7fb7ca18ba18, 14, 1; +L_0xc5c280 .part RS_0x7fb7ca18ba18, 15, 1; +L_0xc5d0d0 .part RS_0x7fb7ca18ba18, 16, 1; +L_0xc5d490 .part RS_0x7fb7ca18ba18, 17, 1; +L_0xc5d620 .part RS_0x7fb7ca18ba18, 18, 1; +L_0xc5d7e0 .part RS_0x7fb7ca18ba18, 19, 1; +L_0xc5d9b0 .part RS_0x7fb7ca18ba18, 20, 1; +L_0xc5df50 .part RS_0x7fb7ca18ba18, 21, 1; +L_0xc5dc90 .part RS_0x7fb7ca18ba18, 22, 1; +L_0xc5de50 .part RS_0x7fb7ca18ba18, 23, 1; +L_0xc5e0b0 .part RS_0x7fb7ca18ba18, 24, 1; +L_0xc5e270 .part RS_0x7fb7ca18ba18, 25, 1; +L_0xc5e400 .part RS_0x7fb7ca18ba18, 26, 1; +L_0xc5e5c0 .part RS_0x7fb7ca18ba18, 27, 1; +L_0xc5e780 .part RS_0x7fb7ca18ba18, 28, 1; +L_0xc5e940 .part RS_0x7fb7ca18ba18, 29, 1; +L_0xc5ec80 .part RS_0x7fb7ca18ba18, 30, 1; +L_0xc5ed20 .part RS_0x7fb7ca18ba18, 31, 1; +L_0xc57320 .part/pv L_0xc5d370, 0, 1, 32; +L_0xc5f030 .part/pv L_0xc5ea70, 1, 1, 32; +L_0xc57110 .part/pv L_0xc57240, 2, 1, 32; +L_0xc5ee10 .part/pv L_0xc5eeb0, 3, 1, 32; +L_0xc5fd60 .part/pv L_0xc5fe00, 4, 1, 32; +L_0xc5ff00 .part/pv L_0xc5ffa0, 5, 1, 32; +L_0xc60130 .part/pv L_0xc571b0, 6, 1, 32; +L_0xc60420 .part/pv L_0xc604c0, 7, 1, 32; +L_0xc60650 .part/pv L_0xc606f0, 8, 1, 32; +L_0xc60930 .part/pv L_0xc609d0, 9, 1, 32; +L_0xc60b60 .part/pv L_0xc60c00, 10, 1, 32; +L_0xc60d90 .part/pv L_0xc60e30, 11, 1, 32; +L_0xc60fc0 .part/pv L_0xc61060, 12, 1, 32; +L_0xc611f0 .part/pv L_0xc61290, 13, 1, 32; +L_0xc61420 .part/pv L_0xc616d0, 14, 1, 32; +L_0xc61770 .part/pv L_0xc61810, 15, 1, 32; +L_0xc619a0 .part/pv L_0xc61a40, 16, 1, 32; +L_0xc61bf0 .part/pv L_0xc61c90, 17, 1, 32; +L_0xc61e40 .part/pv L_0xc61ee0, 18, 1, 32; +L_0xc62090 .part/pv L_0xc623e0, 19, 1, 32; +L_0xc62590 .part/pv L_0xc62630, 20, 1, 32; +L_0xc626d0 .part/pv L_0xc62770, 21, 1, 32; +L_0xc62130 .part/pv L_0xc62920, 22, 1, 32; +L_0xc62320 .part/pv L_0xc62a70, 23, 1, 32; +L_0xc62c00 .part/pv L_0xc62ca0, 24, 1, 32; +L_0xc62e70 .part/pv L_0xc631f0, 25, 1, 32; +L_0xc633a0 .part/pv L_0xc63440, 26, 1, 32; +L_0xc63590 .part/pv L_0xc63630, 27, 1, 32; +L_0xc62f10 .part/pv L_0xc62fb0, 28, 1, 32; +L_0xc638c0 .part/pv L_0xc63960, 29, 1, 32; +L_0xc63b10 .part/pv L_0xc59f00, 30, 1, 32; +L_0xc614c0 .part/pv L_0xc5ba10, 31, 1, 32; +S_0xc42920 .scope module, "adder0" "FullAdder4bit" 4 238, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc67fc0/d .functor AND 1, L_0xc686a0, L_0xc68740, C4<1>, C4<1>; +L_0xc67fc0 .delay (50000,50000,50000) L_0xc67fc0/d; +L_0xc68860/d .functor NOR 1, L_0xc68900, L_0xc689a0, C4<0>, C4<0>; +L_0xc68860 .delay (50000,50000,50000) L_0xc68860/d; +L_0xc68ad0/d .functor AND 1, L_0xc68bc0, L_0xc68c60, C4<1>, C4<1>; +L_0xc68ad0 .delay (50000,50000,50000) L_0xc68ad0/d; +L_0xc68a40/d .functor NOR 1, L_0xc68e80, L_0xc69030, C4<0>, C4<0>; +L_0xc68a40 .delay (50000,50000,50000) L_0xc68a40/d; +L_0xc68d50/d .functor OR 1, L_0xc67fc0, L_0xc68860, C4<0>, C4<0>; +L_0xc68d50 .delay (50000,50000,50000) L_0xc68d50/d; +L_0xc69270/d .functor NOR 1, L_0xc68ad0, L_0xc68a40, C4<0>, C4<0>; +L_0xc69270 .delay (50000,50000,50000) L_0xc69270/d; +L_0xc693b0/d .functor AND 1, L_0xc68d50, L_0xc69270, C4<1>, C4<1>; +L_0xc693b0 .delay (50000,50000,50000) L_0xc693b0/d; +v0xc45510_0 .net *"_s25", 0 0, L_0xc686a0; 1 drivers +v0xc455d0_0 .net *"_s27", 0 0, L_0xc68740; 1 drivers +v0xc45670_0 .net *"_s29", 0 0, L_0xc68900; 1 drivers +v0xc45710_0 .net *"_s31", 0 0, L_0xc689a0; 1 drivers +v0xc45790_0 .net *"_s33", 0 0, L_0xc68bc0; 1 drivers +v0xc45830_0 .net *"_s35", 0 0, L_0xc68c60; 1 drivers +v0xc458d0_0 .net *"_s37", 0 0, L_0xc68e80; 1 drivers +v0xc45970_0 .net *"_s39", 0 0, L_0xc69030; 1 drivers +v0xc45a10_0 .net "a", 3 0, L_0xc57650; 1 drivers +v0xc45ab0_0 .net "aandb", 0 0, L_0xc67fc0; 1 drivers +v0xc45b50_0 .net "abandnoror", 0 0, L_0xc68d50; 1 drivers +v0xc45bf0_0 .net "anorb", 0 0, L_0xc68860; 1 drivers +v0xc45c90_0 .net "b", 3 0, L_0xc57740; 1 drivers +v0xc45d30_0 .net "bandsum", 0 0, L_0xc68ad0; 1 drivers +v0xc45e50_0 .net "bnorsum", 0 0, L_0xc68a40; 1 drivers +v0xc45ef0_0 .net "bsumandnornor", 0 0, L_0xc69270; 1 drivers +v0xc45db0_0 .net "carryin", 0 0, L_0xc69810; 1 drivers +v0xc46020_0 .alias "carryout", 0 0, v0xc4ffb0_0; +v0xc45f70_0 .net "carryout1", 0 0, L_0xc615b0; 1 drivers +v0xc46140_0 .net "carryout2", 0 0, L_0xc65960; 1 drivers +v0xc46270_0 .net "carryout3", 0 0, L_0xc669c0; 1 drivers +v0xc462f0_0 .alias "overflow", 0 0, v0xc4ccc0_0; +v0xc461c0_0 .net8 "sum", 3 0, RS_0x7fb7ca18a188; 4 drivers +L_0xc653d0 .part/pv L_0xc652c0, 0, 1, 4; +L_0xc65470 .part L_0xc57650, 0, 1; +L_0xc65510 .part L_0xc57740, 0, 1; +L_0xc66300 .part/pv L_0xc66230, 1, 1, 4; +L_0xc663f0 .part L_0xc57650, 1, 1; +L_0xc664e0 .part L_0xc57740, 1, 1; +L_0xc67360 .part/pv L_0xc67290, 2, 1, 4; +L_0xc67400 .part L_0xc57650, 2, 1; +L_0xc674f0 .part L_0xc57740, 2, 1; +L_0xc68260 .part/pv L_0xc68190, 3, 1, 4; +L_0xc68390 .part L_0xc57650, 3, 1; +L_0xc684c0 .part L_0xc57740, 3, 1; +L_0xc686a0 .part L_0xc57650, 3, 1; +L_0xc68740 .part L_0xc57740, 3, 1; +L_0xc68900 .part L_0xc57650, 3, 1; +L_0xc689a0 .part L_0xc57740, 3, 1; +L_0xc68bc0 .part L_0xc57740, 3, 1; +L_0xc68c60 .part RS_0x7fb7ca18a188, 3, 1; +L_0xc68e80 .part L_0xc57740, 3, 1; +L_0xc69030 .part RS_0x7fb7ca18a188, 3, 1; +S_0xc44a80 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc42920; + .timescale -9 -12; +L_0xc64100/d .functor AND 1, L_0xc65470, L_0xc65510, C4<1>, C4<1>; +L_0xc64100 .delay (50000,50000,50000) L_0xc64100/d; +L_0xc64210/d .functor AND 1, L_0xc65470, L_0xc69810, C4<1>, C4<1>; +L_0xc64210 .delay (50000,50000,50000) L_0xc64210/d; +L_0xc64350/d .functor AND 1, L_0xc65510, L_0xc69810, C4<1>, C4<1>; +L_0xc64350 .delay (50000,50000,50000) L_0xc64350/d; +L_0xc637e0/d .functor OR 1, L_0xc64100, L_0xc64210, C4<0>, C4<0>; +L_0xc637e0 .delay (50000,50000,50000) L_0xc637e0/d; +L_0xc615b0/d .functor OR 1, L_0xc637e0, L_0xc64350, C4<0>, C4<0>; +L_0xc615b0 .delay (50000,50000,50000) L_0xc615b0/d; +L_0xc64bc0/d .functor OR 1, L_0xc65470, L_0xc65510, C4<0>, C4<0>; +L_0xc64bc0 .delay (50000,50000,50000) L_0xc64bc0/d; +L_0xc64ca0/d .functor OR 1, L_0xc64bc0, L_0xc69810, C4<0>, C4<0>; +L_0xc64ca0 .delay (50000,50000,50000) L_0xc64ca0/d; +L_0xc64dd0/d .functor NOT 1, L_0xc615b0, C4<0>, C4<0>, C4<0>; +L_0xc64dd0 .delay (50000,50000,50000) L_0xc64dd0/d; +L_0xc64f00/d .functor AND 1, L_0xc64dd0, L_0xc64ca0, C4<1>, C4<1>; +L_0xc64f00 .delay (50000,50000,50000) L_0xc64f00/d; +L_0xc65000/d .functor AND 1, L_0xc65470, L_0xc65510, C4<1>, C4<1>; +L_0xc65000 .delay (50000,50000,50000) L_0xc65000/d; +L_0xc65220/d .functor AND 1, L_0xc65000, L_0xc69810, C4<1>, C4<1>; +L_0xc65220 .delay (50000,50000,50000) L_0xc65220/d; +L_0xc652c0/d .functor OR 1, L_0xc64f00, L_0xc65220, C4<0>, C4<0>; +L_0xc652c0 .delay (50000,50000,50000) L_0xc652c0/d; +v0xc44b70_0 .net "a", 0 0, L_0xc65470; 1 drivers +v0xc44c30_0 .net "ab", 0 0, L_0xc64100; 1 drivers +v0xc44cd0_0 .net "acarryin", 0 0, L_0xc64210; 1 drivers +v0xc44d70_0 .net "andall", 0 0, L_0xc65220; 1 drivers +v0xc44df0_0 .net "andsingleintermediate", 0 0, L_0xc65000; 1 drivers +v0xc44e90_0 .net "andsumintermediate", 0 0, L_0xc64f00; 1 drivers +v0xc44f30_0 .net "b", 0 0, L_0xc65510; 1 drivers +v0xc44fd0_0 .net "bcarryin", 0 0, L_0xc64350; 1 drivers +v0xc45070_0 .alias "carryin", 0 0, v0xc45db0_0; +v0xc45110_0 .alias "carryout", 0 0, v0xc45f70_0; +v0xc45190_0 .net "invcarryout", 0 0, L_0xc64dd0; 1 drivers +v0xc45210_0 .net "orall", 0 0, L_0xc64ca0; 1 drivers +v0xc452b0_0 .net "orpairintermediate", 0 0, L_0xc637e0; 1 drivers +v0xc45350_0 .net "orsingleintermediate", 0 0, L_0xc64bc0; 1 drivers +v0xc45470_0 .net "sum", 0 0, L_0xc652c0; 1 drivers +S_0xc43ff0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc42920; + .timescale -9 -12; +L_0xc651c0/d .functor AND 1, L_0xc663f0, L_0xc664e0, C4<1>, C4<1>; +L_0xc651c0 .delay (50000,50000,50000) L_0xc651c0/d; +L_0xc65640/d .functor AND 1, L_0xc663f0, L_0xc615b0, C4<1>, C4<1>; +L_0xc65640 .delay (50000,50000,50000) L_0xc65640/d; +L_0xc65730/d .functor AND 1, L_0xc664e0, L_0xc615b0, C4<1>, C4<1>; +L_0xc65730 .delay (50000,50000,50000) L_0xc65730/d; +L_0xc65820/d .functor OR 1, L_0xc651c0, L_0xc65640, C4<0>, C4<0>; +L_0xc65820 .delay (50000,50000,50000) L_0xc65820/d; +L_0xc65960/d .functor OR 1, L_0xc65820, L_0xc65730, C4<0>, C4<0>; +L_0xc65960 .delay (50000,50000,50000) L_0xc65960/d; +L_0xc65aa0/d .functor OR 1, L_0xc663f0, L_0xc664e0, C4<0>, C4<0>; +L_0xc65aa0 .delay (50000,50000,50000) L_0xc65aa0/d; +L_0xc65b80/d .functor OR 1, L_0xc65aa0, L_0xc615b0, C4<0>, C4<0>; +L_0xc65b80 .delay (50000,50000,50000) L_0xc65b80/d; +L_0xc65c70/d .functor NOT 1, L_0xc65960, C4<0>, C4<0>, C4<0>; +L_0xc65c70 .delay (50000,50000,50000) L_0xc65c70/d; +L_0xc65da0/d .functor AND 1, L_0xc65c70, L_0xc65b80, C4<1>, C4<1>; +L_0xc65da0 .delay (50000,50000,50000) L_0xc65da0/d; +L_0xc65ea0/d .functor AND 1, L_0xc663f0, L_0xc664e0, C4<1>, C4<1>; +L_0xc65ea0 .delay (50000,50000,50000) L_0xc65ea0/d; +L_0xc660c0/d .functor AND 1, L_0xc65ea0, L_0xc615b0, C4<1>, C4<1>; +L_0xc660c0 .delay (50000,50000,50000) L_0xc660c0/d; +L_0xc66230/d .functor OR 1, L_0xc65da0, L_0xc660c0, C4<0>, C4<0>; +L_0xc66230 .delay (50000,50000,50000) L_0xc66230/d; +v0xc440e0_0 .net "a", 0 0, L_0xc663f0; 1 drivers +v0xc441a0_0 .net "ab", 0 0, L_0xc651c0; 1 drivers +v0xc44240_0 .net "acarryin", 0 0, L_0xc65640; 1 drivers +v0xc442e0_0 .net "andall", 0 0, L_0xc660c0; 1 drivers +v0xc44360_0 .net "andsingleintermediate", 0 0, L_0xc65ea0; 1 drivers +v0xc44400_0 .net "andsumintermediate", 0 0, L_0xc65da0; 1 drivers +v0xc444a0_0 .net "b", 0 0, L_0xc664e0; 1 drivers +v0xc44540_0 .net "bcarryin", 0 0, L_0xc65730; 1 drivers +v0xc445e0_0 .alias "carryin", 0 0, v0xc45f70_0; +v0xc44680_0 .alias "carryout", 0 0, v0xc46140_0; +v0xc44700_0 .net "invcarryout", 0 0, L_0xc65c70; 1 drivers +v0xc44780_0 .net "orall", 0 0, L_0xc65b80; 1 drivers +v0xc44820_0 .net "orpairintermediate", 0 0, L_0xc65820; 1 drivers +v0xc448c0_0 .net "orsingleintermediate", 0 0, L_0xc65aa0; 1 drivers +v0xc449e0_0 .net "sum", 0 0, L_0xc66230; 1 drivers +S_0xc43510 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc42920; + .timescale -9 -12; +L_0xc66060/d .functor AND 1, L_0xc67400, L_0xc674f0, C4<1>, C4<1>; +L_0xc66060 .delay (50000,50000,50000) L_0xc66060/d; +L_0xc666a0/d .functor AND 1, L_0xc67400, L_0xc65960, C4<1>, C4<1>; +L_0xc666a0 .delay (50000,50000,50000) L_0xc666a0/d; +L_0xc66790/d .functor AND 1, L_0xc674f0, L_0xc65960, C4<1>, C4<1>; +L_0xc66790 .delay (50000,50000,50000) L_0xc66790/d; +L_0xc66880/d .functor OR 1, L_0xc66060, L_0xc666a0, C4<0>, C4<0>; +L_0xc66880 .delay (50000,50000,50000) L_0xc66880/d; +L_0xc669c0/d .functor OR 1, L_0xc66880, L_0xc66790, C4<0>, C4<0>; +L_0xc669c0 .delay (50000,50000,50000) L_0xc669c0/d; +L_0xc66b00/d .functor OR 1, L_0xc67400, L_0xc674f0, C4<0>, C4<0>; +L_0xc66b00 .delay (50000,50000,50000) L_0xc66b00/d; +L_0xc66be0/d .functor OR 1, L_0xc66b00, L_0xc65960, C4<0>, C4<0>; +L_0xc66be0 .delay (50000,50000,50000) L_0xc66be0/d; +L_0xc66cd0/d .functor NOT 1, L_0xc669c0, C4<0>, C4<0>, C4<0>; +L_0xc66cd0 .delay (50000,50000,50000) L_0xc66cd0/d; +L_0xc66e00/d .functor AND 1, L_0xc66cd0, L_0xc66be0, C4<1>, C4<1>; +L_0xc66e00 .delay (50000,50000,50000) L_0xc66e00/d; +L_0xc66f00/d .functor AND 1, L_0xc67400, L_0xc674f0, C4<1>, C4<1>; +L_0xc66f00 .delay (50000,50000,50000) L_0xc66f00/d; +L_0xc67120/d .functor AND 1, L_0xc66f00, L_0xc65960, C4<1>, C4<1>; +L_0xc67120 .delay (50000,50000,50000) L_0xc67120/d; +L_0xc67290/d .functor OR 1, L_0xc66e00, L_0xc67120, C4<0>, C4<0>; +L_0xc67290 .delay (50000,50000,50000) L_0xc67290/d; +v0xc43600_0 .net "a", 0 0, L_0xc67400; 1 drivers +v0xc436c0_0 .net "ab", 0 0, L_0xc66060; 1 drivers +v0xc43760_0 .net "acarryin", 0 0, L_0xc666a0; 1 drivers +v0xc43800_0 .net "andall", 0 0, L_0xc67120; 1 drivers +v0xc43880_0 .net "andsingleintermediate", 0 0, L_0xc66f00; 1 drivers +v0xc43920_0 .net "andsumintermediate", 0 0, L_0xc66e00; 1 drivers +v0xc439c0_0 .net "b", 0 0, L_0xc674f0; 1 drivers +v0xc43a60_0 .net "bcarryin", 0 0, L_0xc66790; 1 drivers +v0xc43b50_0 .alias "carryin", 0 0, v0xc46140_0; +v0xc43bf0_0 .alias "carryout", 0 0, v0xc46270_0; +v0xc43c70_0 .net "invcarryout", 0 0, L_0xc66cd0; 1 drivers +v0xc43cf0_0 .net "orall", 0 0, L_0xc66be0; 1 drivers +v0xc43d90_0 .net "orpairintermediate", 0 0, L_0xc66880; 1 drivers +v0xc43e30_0 .net "orsingleintermediate", 0 0, L_0xc66b00; 1 drivers +v0xc43f50_0 .net "sum", 0 0, L_0xc67290; 1 drivers +S_0xc42a10 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc42920; + .timescale -9 -12; +L_0xc670c0/d .functor AND 1, L_0xc68390, L_0xc684c0, C4<1>, C4<1>; +L_0xc670c0 .delay (50000,50000,50000) L_0xc670c0/d; +L_0xc675e0/d .functor AND 1, L_0xc68390, L_0xc669c0, C4<1>, C4<1>; +L_0xc675e0 .delay (50000,50000,50000) L_0xc675e0/d; +L_0xc676d0/d .functor AND 1, L_0xc684c0, L_0xc669c0, C4<1>, C4<1>; +L_0xc676d0 .delay (50000,50000,50000) L_0xc676d0/d; +L_0xc677c0/d .functor OR 1, L_0xc670c0, L_0xc675e0, C4<0>, C4<0>; +L_0xc677c0 .delay (50000,50000,50000) L_0xc677c0/d; +L_0xc67900/d .functor OR 1, L_0xc677c0, L_0xc676d0, C4<0>, C4<0>; +L_0xc67900 .delay (50000,50000,50000) L_0xc67900/d; +L_0xc67a40/d .functor OR 1, L_0xc68390, L_0xc684c0, C4<0>, C4<0>; +L_0xc67a40 .delay (50000,50000,50000) L_0xc67a40/d; +L_0xc67b20/d .functor OR 1, L_0xc67a40, L_0xc669c0, C4<0>, C4<0>; +L_0xc67b20 .delay (50000,50000,50000) L_0xc67b20/d; +L_0xc67c10/d .functor NOT 1, L_0xc67900, C4<0>, C4<0>, C4<0>; +L_0xc67c10 .delay (50000,50000,50000) L_0xc67c10/d; +L_0xc67cb0/d .functor AND 1, L_0xc67c10, L_0xc67b20, C4<1>, C4<1>; +L_0xc67cb0 .delay (50000,50000,50000) L_0xc67cb0/d; +L_0xc67e00/d .functor AND 1, L_0xc68390, L_0xc684c0, C4<1>, C4<1>; +L_0xc67e00 .delay (50000,50000,50000) L_0xc67e00/d; +L_0xc68020/d .functor AND 1, L_0xc67e00, L_0xc669c0, C4<1>, C4<1>; +L_0xc68020 .delay (50000,50000,50000) L_0xc68020/d; +L_0xc68190/d .functor OR 1, L_0xc67cb0, L_0xc68020, C4<0>, C4<0>; +L_0xc68190 .delay (50000,50000,50000) L_0xc68190/d; +v0xc42b00_0 .net "a", 0 0, L_0xc68390; 1 drivers +v0xc42bc0_0 .net "ab", 0 0, L_0xc670c0; 1 drivers +v0xc42c60_0 .net "acarryin", 0 0, L_0xc675e0; 1 drivers +v0xc42d00_0 .net "andall", 0 0, L_0xc68020; 1 drivers +v0xc42d80_0 .net "andsingleintermediate", 0 0, L_0xc67e00; 1 drivers +v0xc42e20_0 .net "andsumintermediate", 0 0, L_0xc67cb0; 1 drivers +v0xc42ec0_0 .net "b", 0 0, L_0xc684c0; 1 drivers +v0xc42f60_0 .net "bcarryin", 0 0, L_0xc676d0; 1 drivers +v0xc43050_0 .alias "carryin", 0 0, v0xc46270_0; +v0xc430f0_0 .alias "carryout", 0 0, v0xc4ffb0_0; +v0xc43170_0 .net "invcarryout", 0 0, L_0xc67c10; 1 drivers +v0xc43210_0 .net "orall", 0 0, L_0xc67b20; 1 drivers +v0xc432b0_0 .net "orpairintermediate", 0 0, L_0xc677c0; 1 drivers +v0xc43350_0 .net "orsingleintermediate", 0 0, L_0xc67a40; 1 drivers +v0xc43470_0 .net "sum", 0 0, L_0xc68190; 1 drivers +S_0xc3ede0 .scope module, "adder1" "FullAdder4bit" 4 239, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc6d460/d .functor AND 1, L_0xc6dba0, L_0xc6dc40, C4<1>, C4<1>; +L_0xc6d460 .delay (50000,50000,50000) L_0xc6d460/d; +L_0xc6dce0/d .functor NOR 1, L_0xc6dd80, L_0xc6de20, C4<0>, C4<0>; +L_0xc6dce0 .delay (50000,50000,50000) L_0xc6dce0/d; +L_0xc6df50/d .functor AND 1, L_0xc6e040, L_0xc6e0e0, C4<1>, C4<1>; +L_0xc6df50 .delay (50000,50000,50000) L_0xc6df50/d; +L_0xc6dec0/d .functor NOR 1, L_0xc6e300, L_0xc6e4b0, C4<0>, C4<0>; +L_0xc6dec0 .delay (50000,50000,50000) L_0xc6dec0/d; +L_0xc6e1d0/d .functor OR 1, L_0xc6d460, L_0xc6dce0, C4<0>, C4<0>; +L_0xc6e1d0 .delay (50000,50000,50000) L_0xc6e1d0/d; +L_0xc6e6f0/d .functor NOR 1, L_0xc6df50, L_0xc6dec0, C4<0>, C4<0>; +L_0xc6e6f0 .delay (50000,50000,50000) L_0xc6e6f0/d; +L_0xc6e830/d .functor AND 1, L_0xc6e1d0, L_0xc6e6f0, C4<1>, C4<1>; +L_0xc6e830 .delay (50000,50000,50000) L_0xc6e830/d; +v0xc419d0_0 .net *"_s25", 0 0, L_0xc6dba0; 1 drivers +v0xc41a90_0 .net *"_s27", 0 0, L_0xc6dc40; 1 drivers +v0xc41b30_0 .net *"_s29", 0 0, L_0xc6dd80; 1 drivers +v0xc41bd0_0 .net *"_s31", 0 0, L_0xc6de20; 1 drivers +v0xc41c80_0 .net *"_s33", 0 0, L_0xc6e040; 1 drivers +v0xc41d20_0 .net *"_s35", 0 0, L_0xc6e0e0; 1 drivers +v0xc41dc0_0 .net *"_s37", 0 0, L_0xc6e300; 1 drivers +v0xc41e60_0 .net *"_s39", 0 0, L_0xc6e4b0; 1 drivers +v0xc41f00_0 .net "a", 3 0, L_0xc695e0; 1 drivers +v0xc41fa0_0 .net "aandb", 0 0, L_0xc6d460; 1 drivers +v0xc42040_0 .net "abandnoror", 0 0, L_0xc6e1d0; 1 drivers +v0xc420e0_0 .net "anorb", 0 0, L_0xc6dce0; 1 drivers +v0xc42180_0 .net "b", 3 0, L_0xc69680; 1 drivers +v0xc42220_0 .net "bandsum", 0 0, L_0xc6df50; 1 drivers +v0xc42340_0 .net "bnorsum", 0 0, L_0xc6dec0; 1 drivers +v0xc423e0_0 .net "bsumandnornor", 0 0, L_0xc6e6f0; 1 drivers +v0xc422a0_0 .alias "carryin", 0 0, v0xc4ffb0_0; +v0xc42510_0 .alias "carryout", 0 0, v0xc503b0_0; +v0xc42460_0 .net "carryout1", 0 0, L_0xc69cd0; 1 drivers +v0xc42630_0 .net "carryout2", 0 0, L_0xc6ab00; 1 drivers +v0xc42760_0 .net "carryout3", 0 0, L_0xc6bbe0; 1 drivers +v0xc427e0_0 .alias "overflow", 0 0, v0xc4d300_0; +v0xc426b0_0 .net8 "sum", 3 0, RS_0x7fb7ca1893a8; 4 drivers +L_0xc6a570 .part/pv L_0xc6a4d0, 0, 1, 4; +L_0xc6a610 .part L_0xc695e0, 0, 1; +L_0xc6a6b0 .part L_0xc69680, 0, 1; +L_0xc6b4e0 .part/pv L_0xc6b3d0, 1, 1, 4; +L_0xc6b5d0 .part L_0xc695e0, 1, 1; +L_0xc6b6c0 .part L_0xc69680, 1, 1; +L_0xc6c6a0 .part/pv L_0xc6c590, 2, 1, 4; +L_0xc6c740 .part L_0xc695e0, 2, 1; +L_0xc6c830 .part L_0xc69680, 2, 1; +L_0xc6d760 .part/pv L_0xc6d650, 3, 1, 4; +L_0xc6d890 .part L_0xc695e0, 3, 1; +L_0xc6d9c0 .part L_0xc69680, 3, 1; +L_0xc6dba0 .part L_0xc695e0, 3, 1; +L_0xc6dc40 .part L_0xc69680, 3, 1; +L_0xc6dd80 .part L_0xc695e0, 3, 1; +L_0xc6de20 .part L_0xc69680, 3, 1; +L_0xc6e040 .part L_0xc69680, 3, 1; +L_0xc6e0e0 .part RS_0x7fb7ca1893a8, 3, 1; +L_0xc6e300 .part L_0xc69680, 3, 1; +L_0xc6e4b0 .part RS_0x7fb7ca1893a8, 3, 1; +S_0xc40f10 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc3ede0; + .timescale -9 -12; +L_0xc577e0/d .functor AND 1, L_0xc6a610, L_0xc6a6b0, C4<1>, C4<1>; +L_0xc577e0 .delay (50000,50000,50000) L_0xc577e0/d; +L_0xc69940/d .functor AND 1, L_0xc6a610, L_0xc67900, C4<1>, C4<1>; +L_0xc69940 .delay (50000,50000,50000) L_0xc69940/d; +L_0xc69a30/d .functor AND 1, L_0xc6a6b0, L_0xc67900, C4<1>, C4<1>; +L_0xc69a30 .delay (50000,50000,50000) L_0xc69a30/d; +L_0xc50070/d .functor OR 1, L_0xc577e0, L_0xc69940, C4<0>, C4<0>; +L_0xc50070 .delay (50000,50000,50000) L_0xc50070/d; +L_0xc69cd0/d .functor OR 1, L_0xc50070, L_0xc69a30, C4<0>, C4<0>; +L_0xc69cd0 .delay (50000,50000,50000) L_0xc69cd0/d; +L_0xc69e10/d .functor OR 1, L_0xc6a610, L_0xc6a6b0, C4<0>, C4<0>; +L_0xc69e10 .delay (50000,50000,50000) L_0xc69e10/d; +L_0xc69ef0/d .functor OR 1, L_0xc69e10, L_0xc67900, C4<0>, C4<0>; +L_0xc69ef0 .delay (50000,50000,50000) L_0xc69ef0/d; +L_0xc69fe0/d .functor NOT 1, L_0xc69cd0, C4<0>, C4<0>, C4<0>; +L_0xc69fe0 .delay (50000,50000,50000) L_0xc69fe0/d; +L_0xc6a110/d .functor AND 1, L_0xc69fe0, L_0xc69ef0, C4<1>, C4<1>; +L_0xc6a110 .delay (50000,50000,50000) L_0xc6a110/d; +L_0xc6a210/d .functor AND 1, L_0xc6a610, L_0xc6a6b0, C4<1>, C4<1>; +L_0xc6a210 .delay (50000,50000,50000) L_0xc6a210/d; +L_0xc6a430/d .functor AND 1, L_0xc6a210, L_0xc67900, C4<1>, C4<1>; +L_0xc6a430 .delay (50000,50000,50000) L_0xc6a430/d; +L_0xc6a4d0/d .functor OR 1, L_0xc6a110, L_0xc6a430, C4<0>, C4<0>; +L_0xc6a4d0 .delay (50000,50000,50000) L_0xc6a4d0/d; +v0xc41000_0 .net "a", 0 0, L_0xc6a610; 1 drivers +v0xc410c0_0 .net "ab", 0 0, L_0xc577e0; 1 drivers +v0xc41160_0 .net "acarryin", 0 0, L_0xc69940; 1 drivers +v0xc41200_0 .net "andall", 0 0, L_0xc6a430; 1 drivers +v0xc412b0_0 .net "andsingleintermediate", 0 0, L_0xc6a210; 1 drivers +v0xc41350_0 .net "andsumintermediate", 0 0, L_0xc6a110; 1 drivers +v0xc413f0_0 .net "b", 0 0, L_0xc6a6b0; 1 drivers +v0xc41490_0 .net "bcarryin", 0 0, L_0xc69a30; 1 drivers +v0xc41530_0 .alias "carryin", 0 0, v0xc4ffb0_0; +v0xc415d0_0 .alias "carryout", 0 0, v0xc42460_0; +v0xc41650_0 .net "invcarryout", 0 0, L_0xc69fe0; 1 drivers +v0xc416d0_0 .net "orall", 0 0, L_0xc69ef0; 1 drivers +v0xc41770_0 .net "orpairintermediate", 0 0, L_0xc50070; 1 drivers +v0xc41810_0 .net "orsingleintermediate", 0 0, L_0xc69e10; 1 drivers +v0xc41930_0 .net "sum", 0 0, L_0xc6a4d0; 1 drivers +S_0xc40480 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc3ede0; + .timescale -9 -12; +L_0xc6a3d0/d .functor AND 1, L_0xc6b5d0, L_0xc6b6c0, C4<1>, C4<1>; +L_0xc6a3d0 .delay (50000,50000,50000) L_0xc6a3d0/d; +L_0xc6a7e0/d .functor AND 1, L_0xc6b5d0, L_0xc69cd0, C4<1>, C4<1>; +L_0xc6a7e0 .delay (50000,50000,50000) L_0xc6a7e0/d; +L_0xc6a8d0/d .functor AND 1, L_0xc6b6c0, L_0xc69cd0, C4<1>, C4<1>; +L_0xc6a8d0 .delay (50000,50000,50000) L_0xc6a8d0/d; +L_0xc6a9c0/d .functor OR 1, L_0xc6a3d0, L_0xc6a7e0, C4<0>, C4<0>; +L_0xc6a9c0 .delay (50000,50000,50000) L_0xc6a9c0/d; +L_0xc6ab00/d .functor OR 1, L_0xc6a9c0, L_0xc6a8d0, C4<0>, C4<0>; +L_0xc6ab00 .delay (50000,50000,50000) L_0xc6ab00/d; +L_0xc6ac40/d .functor OR 1, L_0xc6b5d0, L_0xc6b6c0, C4<0>, C4<0>; +L_0xc6ac40 .delay (50000,50000,50000) L_0xc6ac40/d; +L_0xc6ad20/d .functor OR 1, L_0xc6ac40, L_0xc69cd0, C4<0>, C4<0>; +L_0xc6ad20 .delay (50000,50000,50000) L_0xc6ad20/d; +L_0xc6ae10/d .functor NOT 1, L_0xc6ab00, C4<0>, C4<0>, C4<0>; +L_0xc6ae10 .delay (50000,50000,50000) L_0xc6ae10/d; +L_0xc6af40/d .functor AND 1, L_0xc6ae10, L_0xc6ad20, C4<1>, C4<1>; +L_0xc6af40 .delay (50000,50000,50000) L_0xc6af40/d; +L_0xc6b040/d .functor AND 1, L_0xc6b5d0, L_0xc6b6c0, C4<1>, C4<1>; +L_0xc6b040 .delay (50000,50000,50000) L_0xc6b040/d; +L_0xc6b260/d .functor AND 1, L_0xc6b040, L_0xc69cd0, C4<1>, C4<1>; +L_0xc6b260 .delay (50000,50000,50000) L_0xc6b260/d; +L_0xc6b3d0/d .functor OR 1, L_0xc6af40, L_0xc6b260, C4<0>, C4<0>; +L_0xc6b3d0 .delay (50000,50000,50000) L_0xc6b3d0/d; +v0xc40570_0 .net "a", 0 0, L_0xc6b5d0; 1 drivers +v0xc40630_0 .net "ab", 0 0, L_0xc6a3d0; 1 drivers +v0xc406d0_0 .net "acarryin", 0 0, L_0xc6a7e0; 1 drivers +v0xc40770_0 .net "andall", 0 0, L_0xc6b260; 1 drivers +v0xc407f0_0 .net "andsingleintermediate", 0 0, L_0xc6b040; 1 drivers +v0xc40890_0 .net "andsumintermediate", 0 0, L_0xc6af40; 1 drivers +v0xc40930_0 .net "b", 0 0, L_0xc6b6c0; 1 drivers +v0xc409d0_0 .net "bcarryin", 0 0, L_0xc6a8d0; 1 drivers +v0xc40a70_0 .alias "carryin", 0 0, v0xc42460_0; +v0xc40b10_0 .alias "carryout", 0 0, v0xc42630_0; +v0xc40b90_0 .net "invcarryout", 0 0, L_0xc6ae10; 1 drivers +v0xc40c10_0 .net "orall", 0 0, L_0xc6ad20; 1 drivers +v0xc40cb0_0 .net "orpairintermediate", 0 0, L_0xc6a9c0; 1 drivers +v0xc40d50_0 .net "orsingleintermediate", 0 0, L_0xc6ac40; 1 drivers +v0xc40e70_0 .net "sum", 0 0, L_0xc6b3d0; 1 drivers +S_0xc3f9a0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc3ede0; + .timescale -9 -12; +L_0xc6b200/d .functor AND 1, L_0xc6c740, L_0xc6c830, C4<1>, C4<1>; +L_0xc6b200 .delay (50000,50000,50000) L_0xc6b200/d; +L_0xc6b880/d .functor AND 1, L_0xc6c740, L_0xc6ab00, C4<1>, C4<1>; +L_0xc6b880 .delay (50000,50000,50000) L_0xc6b880/d; +L_0xc6b970/d .functor AND 1, L_0xc6c830, L_0xc6ab00, C4<1>, C4<1>; +L_0xc6b970 .delay (50000,50000,50000) L_0xc6b970/d; +L_0xc6ba80/d .functor OR 1, L_0xc6b200, L_0xc6b880, C4<0>, C4<0>; +L_0xc6ba80 .delay (50000,50000,50000) L_0xc6ba80/d; +L_0xc6bbe0/d .functor OR 1, L_0xc6ba80, L_0xc6b970, C4<0>, C4<0>; +L_0xc6bbe0 .delay (50000,50000,50000) L_0xc6bbe0/d; +L_0xc6bd40/d .functor OR 1, L_0xc6c740, L_0xc6c830, C4<0>, C4<0>; +L_0xc6bd40 .delay (50000,50000,50000) L_0xc6bd40/d; +L_0xc6be40/d .functor OR 1, L_0xc6bd40, L_0xc6ab00, C4<0>, C4<0>; +L_0xc6be40 .delay (50000,50000,50000) L_0xc6be40/d; +L_0xc6bf50/d .functor NOT 1, L_0xc6bbe0, C4<0>, C4<0>, C4<0>; +L_0xc6bf50 .delay (50000,50000,50000) L_0xc6bf50/d; +L_0xc6c0a0/d .functor AND 1, L_0xc6bf50, L_0xc6be40, C4<1>, C4<1>; +L_0xc6c0a0 .delay (50000,50000,50000) L_0xc6c0a0/d; +L_0xc6c1c0/d .functor AND 1, L_0xc6c740, L_0xc6c830, C4<1>, C4<1>; +L_0xc6c1c0 .delay (50000,50000,50000) L_0xc6c1c0/d; +L_0xc6c400/d .functor AND 1, L_0xc6c1c0, L_0xc6ab00, C4<1>, C4<1>; +L_0xc6c400 .delay (50000,50000,50000) L_0xc6c400/d; +L_0xc6c590/d .functor OR 1, L_0xc6c0a0, L_0xc6c400, C4<0>, C4<0>; +L_0xc6c590 .delay (50000,50000,50000) L_0xc6c590/d; +v0xc3fa90_0 .net "a", 0 0, L_0xc6c740; 1 drivers +v0xc3fb50_0 .net "ab", 0 0, L_0xc6b200; 1 drivers +v0xc3fbf0_0 .net "acarryin", 0 0, L_0xc6b880; 1 drivers +v0xc3fc90_0 .net "andall", 0 0, L_0xc6c400; 1 drivers +v0xc3fd10_0 .net "andsingleintermediate", 0 0, L_0xc6c1c0; 1 drivers +v0xc3fdb0_0 .net "andsumintermediate", 0 0, L_0xc6c0a0; 1 drivers +v0xc3fe50_0 .net "b", 0 0, L_0xc6c830; 1 drivers +v0xc3fef0_0 .net "bcarryin", 0 0, L_0xc6b970; 1 drivers +v0xc3ffe0_0 .alias "carryin", 0 0, v0xc42630_0; +v0xc40080_0 .alias "carryout", 0 0, v0xc42760_0; +v0xc40100_0 .net "invcarryout", 0 0, L_0xc6bf50; 1 drivers +v0xc40180_0 .net "orall", 0 0, L_0xc6be40; 1 drivers +v0xc40220_0 .net "orpairintermediate", 0 0, L_0xc6ba80; 1 drivers +v0xc402c0_0 .net "orsingleintermediate", 0 0, L_0xc6bd40; 1 drivers +v0xc403e0_0 .net "sum", 0 0, L_0xc6c590; 1 drivers +S_0xc3eed0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc3ede0; + .timescale -9 -12; +L_0xc6c3a0/d .functor AND 1, L_0xc6d890, L_0xc6d9c0, C4<1>, C4<1>; +L_0xc6c3a0 .delay (50000,50000,50000) L_0xc6c3a0/d; +L_0xc6c940/d .functor AND 1, L_0xc6d890, L_0xc6bbe0, C4<1>, C4<1>; +L_0xc6c940 .delay (50000,50000,50000) L_0xc6c940/d; +L_0xc6ca50/d .functor AND 1, L_0xc6d9c0, L_0xc6bbe0, C4<1>, C4<1>; +L_0xc6ca50 .delay (50000,50000,50000) L_0xc6ca50/d; +L_0xc6cb80/d .functor OR 1, L_0xc6c3a0, L_0xc6c940, C4<0>, C4<0>; +L_0xc6cb80 .delay (50000,50000,50000) L_0xc6cb80/d; +L_0xc6cce0/d .functor OR 1, L_0xc6cb80, L_0xc6ca50, C4<0>, C4<0>; +L_0xc6cce0 .delay (50000,50000,50000) L_0xc6cce0/d; +L_0xc6ce40/d .functor OR 1, L_0xc6d890, L_0xc6d9c0, C4<0>, C4<0>; +L_0xc6ce40 .delay (50000,50000,50000) L_0xc6ce40/d; +L_0xc6cf40/d .functor OR 1, L_0xc6ce40, L_0xc6bbe0, C4<0>, C4<0>; +L_0xc6cf40 .delay (50000,50000,50000) L_0xc6cf40/d; +L_0xc6d050/d .functor NOT 1, L_0xc6cce0, C4<0>, C4<0>, C4<0>; +L_0xc6d050 .delay (50000,50000,50000) L_0xc6d050/d; +L_0xc6d110/d .functor AND 1, L_0xc6d050, L_0xc6cf40, C4<1>, C4<1>; +L_0xc6d110 .delay (50000,50000,50000) L_0xc6d110/d; +L_0xc6d280/d .functor AND 1, L_0xc6d890, L_0xc6d9c0, C4<1>, C4<1>; +L_0xc6d280 .delay (50000,50000,50000) L_0xc6d280/d; +L_0xc6d4c0/d .functor AND 1, L_0xc6d280, L_0xc6bbe0, C4<1>, C4<1>; +L_0xc6d4c0 .delay (50000,50000,50000) L_0xc6d4c0/d; +L_0xc6d650/d .functor OR 1, L_0xc6d110, L_0xc6d4c0, C4<0>, C4<0>; +L_0xc6d650 .delay (50000,50000,50000) L_0xc6d650/d; +v0xc3efc0_0 .net "a", 0 0, L_0xc6d890; 1 drivers +v0xc3f040_0 .net "ab", 0 0, L_0xc6c3a0; 1 drivers +v0xc3f0c0_0 .net "acarryin", 0 0, L_0xc6c940; 1 drivers +v0xc3f140_0 .net "andall", 0 0, L_0xc6d4c0; 1 drivers +v0xc3f1c0_0 .net "andsingleintermediate", 0 0, L_0xc6d280; 1 drivers +v0xc3f240_0 .net "andsumintermediate", 0 0, L_0xc6d110; 1 drivers +v0xc3f2c0_0 .net "b", 0 0, L_0xc6d9c0; 1 drivers +v0xc3f340_0 .net "bcarryin", 0 0, L_0xc6ca50; 1 drivers +v0xc3f410_0 .alias "carryin", 0 0, v0xc42760_0; +v0xc3f4b0_0 .alias "carryout", 0 0, v0xc503b0_0; +v0xc3f590_0 .net "invcarryout", 0 0, L_0xc6d050; 1 drivers +v0xc3f630_0 .net "orall", 0 0, L_0xc6cf40; 1 drivers +v0xc3f740_0 .net "orpairintermediate", 0 0, L_0xc6cb80; 1 drivers +v0xc3f7e0_0 .net "orsingleintermediate", 0 0, L_0xc6ce40; 1 drivers +v0xc3f900_0 .net "sum", 0 0, L_0xc6d650; 1 drivers +S_0xc3b2d0 .scope module, "adder2" "FullAdder4bit" 4 240, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc72960/d .functor AND 1, L_0xc730a0, L_0xc73140, C4<1>, C4<1>; +L_0xc72960 .delay (50000,50000,50000) L_0xc72960/d; +L_0xc731e0/d .functor NOR 1, L_0xc73280, L_0xc73320, C4<0>, C4<0>; +L_0xc731e0 .delay (50000,50000,50000) L_0xc731e0/d; +L_0xc73450/d .functor AND 1, L_0xc73540, L_0xc735e0, C4<1>, C4<1>; +L_0xc73450 .delay (50000,50000,50000) L_0xc73450/d; +L_0xc733c0/d .functor NOR 1, L_0xc73800, L_0xc739b0, C4<0>, C4<0>; +L_0xc733c0 .delay (50000,50000,50000) L_0xc733c0/d; +L_0xc736d0/d .functor OR 1, L_0xc72960, L_0xc731e0, C4<0>, C4<0>; +L_0xc736d0 .delay (50000,50000,50000) L_0xc736d0/d; +L_0xc73bf0/d .functor NOR 1, L_0xc73450, L_0xc733c0, C4<0>, C4<0>; +L_0xc73bf0 .delay (50000,50000,50000) L_0xc73bf0/d; +L_0xc73d30/d .functor AND 1, L_0xc736d0, L_0xc73bf0, C4<1>, C4<1>; +L_0xc73d30 .delay (50000,50000,50000) L_0xc73d30/d; +v0xc3dec0_0 .net *"_s25", 0 0, L_0xc730a0; 1 drivers +v0xc3df80_0 .net *"_s27", 0 0, L_0xc73140; 1 drivers +v0xc3e020_0 .net *"_s29", 0 0, L_0xc73280; 1 drivers +v0xc3e0c0_0 .net *"_s31", 0 0, L_0xc73320; 1 drivers +v0xc3e140_0 .net *"_s33", 0 0, L_0xc73540; 1 drivers +v0xc3e1e0_0 .net *"_s35", 0 0, L_0xc735e0; 1 drivers +v0xc3e280_0 .net *"_s37", 0 0, L_0xc73800; 1 drivers +v0xc3e320_0 .net *"_s39", 0 0, L_0xc739b0; 1 drivers +v0xc3e3c0_0 .net "a", 3 0, L_0xc73ff0; 1 drivers +v0xc3e460_0 .net "aandb", 0 0, L_0xc72960; 1 drivers +v0xc3e500_0 .net "abandnoror", 0 0, L_0xc736d0; 1 drivers +v0xc3e5a0_0 .net "anorb", 0 0, L_0xc731e0; 1 drivers +v0xc3e640_0 .net "b", 3 0, L_0xc6ea60; 1 drivers +v0xc3e6e0_0 .net "bandsum", 0 0, L_0xc73450; 1 drivers +v0xc3e800_0 .net "bnorsum", 0 0, L_0xc733c0; 1 drivers +v0xc3e8a0_0 .net "bsumandnornor", 0 0, L_0xc73bf0; 1 drivers +v0xc3e760_0 .alias "carryin", 0 0, v0xc503b0_0; +v0xc3e9d0_0 .alias "carryout", 0 0, v0xc501e0_0; +v0xc3e920_0 .net "carryout1", 0 0, L_0xc6f030; 1 drivers +v0xc3eaf0_0 .net "carryout2", 0 0, L_0xc6ffa0; 1 drivers +v0xc3ec20_0 .net "carryout3", 0 0, L_0xc71140; 1 drivers +v0xc3eca0_0 .alias "overflow", 0 0, v0xc4d380_0; +v0xc3eb70_0 .net8 "sum", 3 0, RS_0x7fb7ca1885c8; 4 drivers +L_0xc6f9d0 .part/pv L_0xc6f910, 0, 1, 4; +L_0xc6fa90 .part L_0xc73ff0, 0, 1; +L_0xc6fb30 .part L_0xc6ea60, 0, 1; +L_0xc70a60 .part/pv L_0xc70950, 1, 1, 4; +L_0xc70b50 .part L_0xc73ff0, 1, 1; +L_0xc70c40 .part L_0xc6ea60, 1, 1; +L_0xc71c00 .part/pv L_0xc71af0, 2, 1, 4; +L_0xc71ca0 .part L_0xc73ff0, 2, 1; +L_0xc71d90 .part L_0xc6ea60, 2, 1; +L_0xc72c60 .part/pv L_0xc72b50, 3, 1, 4; +L_0xc72d90 .part L_0xc73ff0, 3, 1; +L_0xc72ec0 .part L_0xc6ea60, 3, 1; +L_0xc730a0 .part L_0xc73ff0, 3, 1; +L_0xc73140 .part L_0xc6ea60, 3, 1; +L_0xc73280 .part L_0xc73ff0, 3, 1; +L_0xc73320 .part L_0xc6ea60, 3, 1; +L_0xc73540 .part L_0xc6ea60, 3, 1; +L_0xc735e0 .part RS_0x7fb7ca1885c8, 3, 1; +L_0xc73800 .part L_0xc6ea60, 3, 1; +L_0xc739b0 .part RS_0x7fb7ca1885c8, 3, 1; +S_0xc3d430 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc3b2d0; + .timescale -9 -12; +L_0xc69720/d .functor AND 1, L_0xc6fa90, L_0xc6fb30, C4<1>, C4<1>; +L_0xc69720 .delay (50000,50000,50000) L_0xc69720/d; +L_0xc6ecb0/d .functor AND 1, L_0xc6fa90, L_0xc6cce0, C4<1>, C4<1>; +L_0xc6ecb0 .delay (50000,50000,50000) L_0xc6ecb0/d; +L_0xc6ed60/d .functor AND 1, L_0xc6fb30, L_0xc6cce0, C4<1>, C4<1>; +L_0xc6ed60 .delay (50000,50000,50000) L_0xc6ed60/d; +L_0xc6eed0/d .functor OR 1, L_0xc69720, L_0xc6ecb0, C4<0>, C4<0>; +L_0xc6eed0 .delay (50000,50000,50000) L_0xc6eed0/d; +L_0xc6f030/d .functor OR 1, L_0xc6eed0, L_0xc6ed60, C4<0>, C4<0>; +L_0xc6f030 .delay (50000,50000,50000) L_0xc6f030/d; +L_0xc6f190/d .functor OR 1, L_0xc6fa90, L_0xc6fb30, C4<0>, C4<0>; +L_0xc6f190 .delay (50000,50000,50000) L_0xc6f190/d; +L_0xc6f290/d .functor OR 1, L_0xc6f190, L_0xc6cce0, C4<0>, C4<0>; +L_0xc6f290 .delay (50000,50000,50000) L_0xc6f290/d; +L_0xc6f3a0/d .functor NOT 1, L_0xc6f030, C4<0>, C4<0>, C4<0>; +L_0xc6f3a0 .delay (50000,50000,50000) L_0xc6f3a0/d; +L_0xc6f4f0/d .functor AND 1, L_0xc6f3a0, L_0xc6f290, C4<1>, C4<1>; +L_0xc6f4f0 .delay (50000,50000,50000) L_0xc6f4f0/d; +L_0xc6f610/d .functor AND 1, L_0xc6fa90, L_0xc6fb30, C4<1>, C4<1>; +L_0xc6f610 .delay (50000,50000,50000) L_0xc6f610/d; +L_0xc6f850/d .functor AND 1, L_0xc6f610, L_0xc6cce0, C4<1>, C4<1>; +L_0xc6f850 .delay (50000,50000,50000) L_0xc6f850/d; +L_0xc6f910/d .functor OR 1, L_0xc6f4f0, L_0xc6f850, C4<0>, C4<0>; +L_0xc6f910 .delay (50000,50000,50000) L_0xc6f910/d; +v0xc3d520_0 .net "a", 0 0, L_0xc6fa90; 1 drivers +v0xc3d5e0_0 .net "ab", 0 0, L_0xc69720; 1 drivers +v0xc3d680_0 .net "acarryin", 0 0, L_0xc6ecb0; 1 drivers +v0xc3d720_0 .net "andall", 0 0, L_0xc6f850; 1 drivers +v0xc3d7a0_0 .net "andsingleintermediate", 0 0, L_0xc6f610; 1 drivers +v0xc3d840_0 .net "andsumintermediate", 0 0, L_0xc6f4f0; 1 drivers +v0xc3d8e0_0 .net "b", 0 0, L_0xc6fb30; 1 drivers +v0xc3d980_0 .net "bcarryin", 0 0, L_0xc6ed60; 1 drivers +v0xc3da20_0 .alias "carryin", 0 0, v0xc503b0_0; +v0xc3dac0_0 .alias "carryout", 0 0, v0xc3e920_0; +v0xc3db40_0 .net "invcarryout", 0 0, L_0xc6f3a0; 1 drivers +v0xc3dbc0_0 .net "orall", 0 0, L_0xc6f290; 1 drivers +v0xc3dc60_0 .net "orpairintermediate", 0 0, L_0xc6eed0; 1 drivers +v0xc3dd00_0 .net "orsingleintermediate", 0 0, L_0xc6f190; 1 drivers +v0xc3de20_0 .net "sum", 0 0, L_0xc6f910; 1 drivers +S_0xc3c9a0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc3b2d0; + .timescale -9 -12; +L_0xc6f7f0/d .functor AND 1, L_0xc70b50, L_0xc70c40, C4<1>, C4<1>; +L_0xc6f7f0 .delay (50000,50000,50000) L_0xc6f7f0/d; +L_0xc6fc60/d .functor AND 1, L_0xc70b50, L_0xc6f030, C4<1>, C4<1>; +L_0xc6fc60 .delay (50000,50000,50000) L_0xc6fc60/d; +L_0xc6fd50/d .functor AND 1, L_0xc70c40, L_0xc6f030, C4<1>, C4<1>; +L_0xc6fd50 .delay (50000,50000,50000) L_0xc6fd50/d; +L_0xc6fe40/d .functor OR 1, L_0xc6f7f0, L_0xc6fc60, C4<0>, C4<0>; +L_0xc6fe40 .delay (50000,50000,50000) L_0xc6fe40/d; +L_0xc6ffa0/d .functor OR 1, L_0xc6fe40, L_0xc6fd50, C4<0>, C4<0>; +L_0xc6ffa0 .delay (50000,50000,50000) L_0xc6ffa0/d; +L_0xc70100/d .functor OR 1, L_0xc70b50, L_0xc70c40, C4<0>, C4<0>; +L_0xc70100 .delay (50000,50000,50000) L_0xc70100/d; +L_0xc70200/d .functor OR 1, L_0xc70100, L_0xc6f030, C4<0>, C4<0>; +L_0xc70200 .delay (50000,50000,50000) L_0xc70200/d; +L_0xc70310/d .functor NOT 1, L_0xc6ffa0, C4<0>, C4<0>, C4<0>; +L_0xc70310 .delay (50000,50000,50000) L_0xc70310/d; +L_0xc70460/d .functor AND 1, L_0xc70310, L_0xc70200, C4<1>, C4<1>; +L_0xc70460 .delay (50000,50000,50000) L_0xc70460/d; +L_0xc70580/d .functor AND 1, L_0xc70b50, L_0xc70c40, C4<1>, C4<1>; +L_0xc70580 .delay (50000,50000,50000) L_0xc70580/d; +L_0xc707c0/d .functor AND 1, L_0xc70580, L_0xc6f030, C4<1>, C4<1>; +L_0xc707c0 .delay (50000,50000,50000) L_0xc707c0/d; +L_0xc70950/d .functor OR 1, L_0xc70460, L_0xc707c0, C4<0>, C4<0>; +L_0xc70950 .delay (50000,50000,50000) L_0xc70950/d; +v0xc3ca90_0 .net "a", 0 0, L_0xc70b50; 1 drivers +v0xc3cb50_0 .net "ab", 0 0, L_0xc6f7f0; 1 drivers +v0xc3cbf0_0 .net "acarryin", 0 0, L_0xc6fc60; 1 drivers +v0xc3cc90_0 .net "andall", 0 0, L_0xc707c0; 1 drivers +v0xc3cd10_0 .net "andsingleintermediate", 0 0, L_0xc70580; 1 drivers +v0xc3cdb0_0 .net "andsumintermediate", 0 0, L_0xc70460; 1 drivers +v0xc3ce50_0 .net "b", 0 0, L_0xc70c40; 1 drivers +v0xc3cef0_0 .net "bcarryin", 0 0, L_0xc6fd50; 1 drivers +v0xc3cf90_0 .alias "carryin", 0 0, v0xc3e920_0; +v0xc3d030_0 .alias "carryout", 0 0, v0xc3eaf0_0; +v0xc3d0b0_0 .net "invcarryout", 0 0, L_0xc70310; 1 drivers +v0xc3d130_0 .net "orall", 0 0, L_0xc70200; 1 drivers +v0xc3d1d0_0 .net "orpairintermediate", 0 0, L_0xc6fe40; 1 drivers +v0xc3d270_0 .net "orsingleintermediate", 0 0, L_0xc70100; 1 drivers +v0xc3d390_0 .net "sum", 0 0, L_0xc70950; 1 drivers +S_0xc3bec0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc3b2d0; + .timescale -9 -12; +L_0xc70760/d .functor AND 1, L_0xc71ca0, L_0xc71d90, C4<1>, C4<1>; +L_0xc70760 .delay (50000,50000,50000) L_0xc70760/d; +L_0xc70e00/d .functor AND 1, L_0xc71ca0, L_0xc6ffa0, C4<1>, C4<1>; +L_0xc70e00 .delay (50000,50000,50000) L_0xc70e00/d; +L_0xc70ef0/d .functor AND 1, L_0xc71d90, L_0xc6ffa0, C4<1>, C4<1>; +L_0xc70ef0 .delay (50000,50000,50000) L_0xc70ef0/d; +L_0xc70fe0/d .functor OR 1, L_0xc70760, L_0xc70e00, C4<0>, C4<0>; +L_0xc70fe0 .delay (50000,50000,50000) L_0xc70fe0/d; +L_0xc71140/d .functor OR 1, L_0xc70fe0, L_0xc70ef0, C4<0>, C4<0>; +L_0xc71140 .delay (50000,50000,50000) L_0xc71140/d; +L_0xc712a0/d .functor OR 1, L_0xc71ca0, L_0xc71d90, C4<0>, C4<0>; +L_0xc712a0 .delay (50000,50000,50000) L_0xc712a0/d; +L_0xc713a0/d .functor OR 1, L_0xc712a0, L_0xc6ffa0, C4<0>, C4<0>; +L_0xc713a0 .delay (50000,50000,50000) L_0xc713a0/d; +L_0xc714b0/d .functor NOT 1, L_0xc71140, C4<0>, C4<0>, C4<0>; +L_0xc714b0 .delay (50000,50000,50000) L_0xc714b0/d; +L_0xc71600/d .functor AND 1, L_0xc714b0, L_0xc713a0, C4<1>, C4<1>; +L_0xc71600 .delay (50000,50000,50000) L_0xc71600/d; +L_0xc71720/d .functor AND 1, L_0xc71ca0, L_0xc71d90, C4<1>, C4<1>; +L_0xc71720 .delay (50000,50000,50000) L_0xc71720/d; +L_0xc71960/d .functor AND 1, L_0xc71720, L_0xc6ffa0, C4<1>, C4<1>; +L_0xc71960 .delay (50000,50000,50000) L_0xc71960/d; +L_0xc71af0/d .functor OR 1, L_0xc71600, L_0xc71960, C4<0>, C4<0>; +L_0xc71af0 .delay (50000,50000,50000) L_0xc71af0/d; +v0xc3bfb0_0 .net "a", 0 0, L_0xc71ca0; 1 drivers +v0xc3c070_0 .net "ab", 0 0, L_0xc70760; 1 drivers +v0xc3c110_0 .net "acarryin", 0 0, L_0xc70e00; 1 drivers +v0xc3c1b0_0 .net "andall", 0 0, L_0xc71960; 1 drivers +v0xc3c230_0 .net "andsingleintermediate", 0 0, L_0xc71720; 1 drivers +v0xc3c2d0_0 .net "andsumintermediate", 0 0, L_0xc71600; 1 drivers +v0xc3c370_0 .net "b", 0 0, L_0xc71d90; 1 drivers +v0xc3c410_0 .net "bcarryin", 0 0, L_0xc70ef0; 1 drivers +v0xc3c500_0 .alias "carryin", 0 0, v0xc3eaf0_0; +v0xc3c5a0_0 .alias "carryout", 0 0, v0xc3ec20_0; +v0xc3c620_0 .net "invcarryout", 0 0, L_0xc714b0; 1 drivers +v0xc3c6a0_0 .net "orall", 0 0, L_0xc713a0; 1 drivers +v0xc3c740_0 .net "orpairintermediate", 0 0, L_0xc70fe0; 1 drivers +v0xc3c7e0_0 .net "orsingleintermediate", 0 0, L_0xc712a0; 1 drivers +v0xc3c900_0 .net "sum", 0 0, L_0xc71af0; 1 drivers +S_0xc3b3c0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc3b2d0; + .timescale -9 -12; +L_0xc71900/d .functor AND 1, L_0xc72d90, L_0xc72ec0, C4<1>, C4<1>; +L_0xc71900 .delay (50000,50000,50000) L_0xc71900/d; +L_0xc71e80/d .functor AND 1, L_0xc72d90, L_0xc71140, C4<1>, C4<1>; +L_0xc71e80 .delay (50000,50000,50000) L_0xc71e80/d; +L_0xc71f70/d .functor AND 1, L_0xc72ec0, L_0xc71140, C4<1>, C4<1>; +L_0xc71f70 .delay (50000,50000,50000) L_0xc71f70/d; +L_0xc72080/d .functor OR 1, L_0xc71900, L_0xc71e80, C4<0>, C4<0>; +L_0xc72080 .delay (50000,50000,50000) L_0xc72080/d; +L_0xc721e0/d .functor OR 1, L_0xc72080, L_0xc71f70, C4<0>, C4<0>; +L_0xc721e0 .delay (50000,50000,50000) L_0xc721e0/d; +L_0xc72340/d .functor OR 1, L_0xc72d90, L_0xc72ec0, C4<0>, C4<0>; +L_0xc72340 .delay (50000,50000,50000) L_0xc72340/d; +L_0xc72440/d .functor OR 1, L_0xc72340, L_0xc71140, C4<0>, C4<0>; +L_0xc72440 .delay (50000,50000,50000) L_0xc72440/d; +L_0xc72550/d .functor NOT 1, L_0xc721e0, C4<0>, C4<0>, C4<0>; +L_0xc72550 .delay (50000,50000,50000) L_0xc72550/d; +L_0xc72610/d .functor AND 1, L_0xc72550, L_0xc72440, C4<1>, C4<1>; +L_0xc72610 .delay (50000,50000,50000) L_0xc72610/d; +L_0xc72780/d .functor AND 1, L_0xc72d90, L_0xc72ec0, C4<1>, C4<1>; +L_0xc72780 .delay (50000,50000,50000) L_0xc72780/d; +L_0xc729c0/d .functor AND 1, L_0xc72780, L_0xc71140, C4<1>, C4<1>; +L_0xc729c0 .delay (50000,50000,50000) L_0xc729c0/d; +L_0xc72b50/d .functor OR 1, L_0xc72610, L_0xc729c0, C4<0>, C4<0>; +L_0xc72b50 .delay (50000,50000,50000) L_0xc72b50/d; +v0xc3b4b0_0 .net "a", 0 0, L_0xc72d90; 1 drivers +v0xc3b570_0 .net "ab", 0 0, L_0xc71900; 1 drivers +v0xc3b610_0 .net "acarryin", 0 0, L_0xc71e80; 1 drivers +v0xc3b6b0_0 .net "andall", 0 0, L_0xc729c0; 1 drivers +v0xc3b730_0 .net "andsingleintermediate", 0 0, L_0xc72780; 1 drivers +v0xc3b7d0_0 .net "andsumintermediate", 0 0, L_0xc72610; 1 drivers +v0xc3b870_0 .net "b", 0 0, L_0xc72ec0; 1 drivers +v0xc3b910_0 .net "bcarryin", 0 0, L_0xc71f70; 1 drivers +v0xc3ba00_0 .alias "carryin", 0 0, v0xc3ec20_0; +v0xc3baa0_0 .alias "carryout", 0 0, v0xc501e0_0; +v0xc3bb20_0 .net "invcarryout", 0 0, L_0xc72550; 1 drivers +v0xc3bbc0_0 .net "orall", 0 0, L_0xc72440; 1 drivers +v0xc3bc60_0 .net "orpairintermediate", 0 0, L_0xc72080; 1 drivers +v0xc3bd00_0 .net "orsingleintermediate", 0 0, L_0xc72340; 1 drivers +v0xc3be20_0 .net "sum", 0 0, L_0xc72b50; 1 drivers +S_0xc377c0 .scope module, "adder3" "FullAdder4bit" 4 241, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc77ee0/d .functor AND 1, L_0xc78620, L_0xc786c0, C4<1>, C4<1>; +L_0xc77ee0 .delay (50000,50000,50000) L_0xc77ee0/d; +L_0xc78760/d .functor NOR 1, L_0xc78800, L_0xc788a0, C4<0>, C4<0>; +L_0xc78760 .delay (50000,50000,50000) L_0xc78760/d; +L_0xc789d0/d .functor AND 1, L_0xc78ac0, L_0xc78b60, C4<1>, C4<1>; +L_0xc789d0 .delay (50000,50000,50000) L_0xc789d0/d; +L_0xc78940/d .functor NOR 1, L_0xc78d80, L_0xc78f30, C4<0>, C4<0>; +L_0xc78940 .delay (50000,50000,50000) L_0xc78940/d; +L_0xc78c50/d .functor OR 1, L_0xc77ee0, L_0xc78760, C4<0>, C4<0>; +L_0xc78c50 .delay (50000,50000,50000) L_0xc78c50/d; +L_0xc79170/d .functor NOR 1, L_0xc789d0, L_0xc78940, C4<0>, C4<0>; +L_0xc79170 .delay (50000,50000,50000) L_0xc79170/d; +L_0xc792b0/d .functor AND 1, L_0xc78c50, L_0xc79170, C4<1>, C4<1>; +L_0xc792b0 .delay (50000,50000,50000) L_0xc792b0/d; +v0xc3a3b0_0 .net *"_s25", 0 0, L_0xc78620; 1 drivers +v0xc3a470_0 .net *"_s27", 0 0, L_0xc786c0; 1 drivers +v0xc3a510_0 .net *"_s29", 0 0, L_0xc78800; 1 drivers +v0xc3a5b0_0 .net *"_s31", 0 0, L_0xc788a0; 1 drivers +v0xc3a630_0 .net *"_s33", 0 0, L_0xc78ac0; 1 drivers +v0xc3a6d0_0 .net *"_s35", 0 0, L_0xc78b60; 1 drivers +v0xc3a770_0 .net *"_s37", 0 0, L_0xc78d80; 1 drivers +v0xc3a810_0 .net *"_s39", 0 0, L_0xc78f30; 1 drivers +v0xc3a8b0_0 .net "a", 3 0, L_0xc74120; 1 drivers +v0xc3a950_0 .net "aandb", 0 0, L_0xc77ee0; 1 drivers +v0xc3a9f0_0 .net "abandnoror", 0 0, L_0xc78c50; 1 drivers +v0xc3aa90_0 .net "anorb", 0 0, L_0xc78760; 1 drivers +v0xc3ab30_0 .net "b", 3 0, L_0xc741c0; 1 drivers +v0xc3abd0_0 .net "bandsum", 0 0, L_0xc789d0; 1 drivers +v0xc3acf0_0 .net "bnorsum", 0 0, L_0xc78940; 1 drivers +v0xc3ad90_0 .net "bsumandnornor", 0 0, L_0xc79170; 1 drivers +v0xc3ac50_0 .alias "carryin", 0 0, v0xc501e0_0; +v0xc3aec0_0 .alias "carryout", 0 0, v0xc502f0_0; +v0xc3ae10_0 .net "carryout1", 0 0, L_0xc745d0; 1 drivers +v0xc3afe0_0 .net "carryout2", 0 0, L_0xc75520; 1 drivers +v0xc3b110_0 .net "carryout3", 0 0, L_0xc766c0; 1 drivers +v0xc3b190_0 .alias "overflow", 0 0, v0xc4d400_0; +v0xc3b060_0 .net8 "sum", 3 0, RS_0x7fb7ca1877e8; 4 drivers +L_0xc74f50 .part/pv L_0xc74e90, 0, 1, 4; +L_0xc75010 .part L_0xc74120, 0, 1; +L_0xc750b0 .part L_0xc741c0, 0, 1; +L_0xc75fe0 .part/pv L_0xc75ed0, 1, 1, 4; +L_0xc760d0 .part L_0xc74120, 1, 1; +L_0xc761c0 .part L_0xc741c0, 1, 1; +L_0xc77180 .part/pv L_0xc77070, 2, 1, 4; +L_0xc77220 .part L_0xc74120, 2, 1; +L_0xc77310 .part L_0xc741c0, 2, 1; +L_0xc781e0 .part/pv L_0xc780d0, 3, 1, 4; +L_0xc78310 .part L_0xc74120, 3, 1; +L_0xc78440 .part L_0xc741c0, 3, 1; +L_0xc78620 .part L_0xc74120, 3, 1; +L_0xc786c0 .part L_0xc741c0, 3, 1; +L_0xc78800 .part L_0xc74120, 3, 1; +L_0xc788a0 .part L_0xc741c0, 3, 1; +L_0xc78ac0 .part L_0xc741c0, 3, 1; +L_0xc78b60 .part RS_0x7fb7ca1877e8, 3, 1; +L_0xc78d80 .part L_0xc741c0, 3, 1; +L_0xc78f30 .part RS_0x7fb7ca1877e8, 3, 1; +S_0xc39920 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc377c0; + .timescale -9 -12; +L_0xc6eb00/d .functor AND 1, L_0xc75010, L_0xc750b0, C4<1>, C4<1>; +L_0xc6eb00 .delay (50000,50000,50000) L_0xc6eb00/d; +L_0xc6eba0/d .functor AND 1, L_0xc75010, L_0xc721e0, C4<1>, C4<1>; +L_0xc6eba0 .delay (50000,50000,50000) L_0xc6eba0/d; +L_0xc6ec40/d .functor AND 1, L_0xc750b0, L_0xc721e0, C4<1>, C4<1>; +L_0xc6ec40 .delay (50000,50000,50000) L_0xc6ec40/d; +L_0xc74490/d .functor OR 1, L_0xc6eb00, L_0xc6eba0, C4<0>, C4<0>; +L_0xc74490 .delay (50000,50000,50000) L_0xc74490/d; +L_0xc745d0/d .functor OR 1, L_0xc74490, L_0xc6ec40, C4<0>, C4<0>; +L_0xc745d0 .delay (50000,50000,50000) L_0xc745d0/d; +L_0xc74710/d .functor OR 1, L_0xc75010, L_0xc750b0, C4<0>, C4<0>; +L_0xc74710 .delay (50000,50000,50000) L_0xc74710/d; +L_0xc74810/d .functor OR 1, L_0xc74710, L_0xc721e0, C4<0>, C4<0>; +L_0xc74810 .delay (50000,50000,50000) L_0xc74810/d; +L_0xc74920/d .functor NOT 1, L_0xc745d0, C4<0>, C4<0>, C4<0>; +L_0xc74920 .delay (50000,50000,50000) L_0xc74920/d; +L_0xc74a70/d .functor AND 1, L_0xc74920, L_0xc74810, C4<1>, C4<1>; +L_0xc74a70 .delay (50000,50000,50000) L_0xc74a70/d; +L_0xc74b90/d .functor AND 1, L_0xc75010, L_0xc750b0, C4<1>, C4<1>; +L_0xc74b90 .delay (50000,50000,50000) L_0xc74b90/d; +L_0xc74dd0/d .functor AND 1, L_0xc74b90, L_0xc721e0, C4<1>, C4<1>; +L_0xc74dd0 .delay (50000,50000,50000) L_0xc74dd0/d; +L_0xc74e90/d .functor OR 1, L_0xc74a70, L_0xc74dd0, C4<0>, C4<0>; +L_0xc74e90 .delay (50000,50000,50000) L_0xc74e90/d; +v0xc39a10_0 .net "a", 0 0, L_0xc75010; 1 drivers +v0xc39ad0_0 .net "ab", 0 0, L_0xc6eb00; 1 drivers +v0xc39b70_0 .net "acarryin", 0 0, L_0xc6eba0; 1 drivers +v0xc39c10_0 .net "andall", 0 0, L_0xc74dd0; 1 drivers +v0xc39c90_0 .net "andsingleintermediate", 0 0, L_0xc74b90; 1 drivers +v0xc39d30_0 .net "andsumintermediate", 0 0, L_0xc74a70; 1 drivers +v0xc39dd0_0 .net "b", 0 0, L_0xc750b0; 1 drivers +v0xc39e70_0 .net "bcarryin", 0 0, L_0xc6ec40; 1 drivers +v0xc39f10_0 .alias "carryin", 0 0, v0xc501e0_0; +v0xc39fb0_0 .alias "carryout", 0 0, v0xc3ae10_0; +v0xc3a030_0 .net "invcarryout", 0 0, L_0xc74920; 1 drivers +v0xc3a0b0_0 .net "orall", 0 0, L_0xc74810; 1 drivers +v0xc3a150_0 .net "orpairintermediate", 0 0, L_0xc74490; 1 drivers +v0xc3a1f0_0 .net "orsingleintermediate", 0 0, L_0xc74710; 1 drivers +v0xc3a310_0 .net "sum", 0 0, L_0xc74e90; 1 drivers +S_0xc38e90 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc377c0; + .timescale -9 -12; +L_0xc74d70/d .functor AND 1, L_0xc760d0, L_0xc761c0, C4<1>, C4<1>; +L_0xc74d70 .delay (50000,50000,50000) L_0xc74d70/d; +L_0xc751e0/d .functor AND 1, L_0xc760d0, L_0xc745d0, C4<1>, C4<1>; +L_0xc751e0 .delay (50000,50000,50000) L_0xc751e0/d; +L_0xc752d0/d .functor AND 1, L_0xc761c0, L_0xc745d0, C4<1>, C4<1>; +L_0xc752d0 .delay (50000,50000,50000) L_0xc752d0/d; +L_0xc753c0/d .functor OR 1, L_0xc74d70, L_0xc751e0, C4<0>, C4<0>; +L_0xc753c0 .delay (50000,50000,50000) L_0xc753c0/d; +L_0xc75520/d .functor OR 1, L_0xc753c0, L_0xc752d0, C4<0>, C4<0>; +L_0xc75520 .delay (50000,50000,50000) L_0xc75520/d; +L_0xc75680/d .functor OR 1, L_0xc760d0, L_0xc761c0, C4<0>, C4<0>; +L_0xc75680 .delay (50000,50000,50000) L_0xc75680/d; +L_0xc75780/d .functor OR 1, L_0xc75680, L_0xc745d0, C4<0>, C4<0>; +L_0xc75780 .delay (50000,50000,50000) L_0xc75780/d; +L_0xc75890/d .functor NOT 1, L_0xc75520, C4<0>, C4<0>, C4<0>; +L_0xc75890 .delay (50000,50000,50000) L_0xc75890/d; +L_0xc759e0/d .functor AND 1, L_0xc75890, L_0xc75780, C4<1>, C4<1>; +L_0xc759e0 .delay (50000,50000,50000) L_0xc759e0/d; +L_0xc75b00/d .functor AND 1, L_0xc760d0, L_0xc761c0, C4<1>, C4<1>; +L_0xc75b00 .delay (50000,50000,50000) L_0xc75b00/d; +L_0xc75d40/d .functor AND 1, L_0xc75b00, L_0xc745d0, C4<1>, C4<1>; +L_0xc75d40 .delay (50000,50000,50000) L_0xc75d40/d; +L_0xc75ed0/d .functor OR 1, L_0xc759e0, L_0xc75d40, C4<0>, C4<0>; +L_0xc75ed0 .delay (50000,50000,50000) L_0xc75ed0/d; +v0xc38f80_0 .net "a", 0 0, L_0xc760d0; 1 drivers +v0xc39040_0 .net "ab", 0 0, L_0xc74d70; 1 drivers +v0xc390e0_0 .net "acarryin", 0 0, L_0xc751e0; 1 drivers +v0xc39180_0 .net "andall", 0 0, L_0xc75d40; 1 drivers +v0xc39200_0 .net "andsingleintermediate", 0 0, L_0xc75b00; 1 drivers +v0xc392a0_0 .net "andsumintermediate", 0 0, L_0xc759e0; 1 drivers +v0xc39340_0 .net "b", 0 0, L_0xc761c0; 1 drivers +v0xc393e0_0 .net "bcarryin", 0 0, L_0xc752d0; 1 drivers +v0xc39480_0 .alias "carryin", 0 0, v0xc3ae10_0; +v0xc39520_0 .alias "carryout", 0 0, v0xc3afe0_0; +v0xc395a0_0 .net "invcarryout", 0 0, L_0xc75890; 1 drivers +v0xc39620_0 .net "orall", 0 0, L_0xc75780; 1 drivers +v0xc396c0_0 .net "orpairintermediate", 0 0, L_0xc753c0; 1 drivers +v0xc39760_0 .net "orsingleintermediate", 0 0, L_0xc75680; 1 drivers +v0xc39880_0 .net "sum", 0 0, L_0xc75ed0; 1 drivers +S_0xc383b0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc377c0; + .timescale -9 -12; +L_0xc75ce0/d .functor AND 1, L_0xc77220, L_0xc77310, C4<1>, C4<1>; +L_0xc75ce0 .delay (50000,50000,50000) L_0xc75ce0/d; +L_0xc76380/d .functor AND 1, L_0xc77220, L_0xc75520, C4<1>, C4<1>; +L_0xc76380 .delay (50000,50000,50000) L_0xc76380/d; +L_0xc76470/d .functor AND 1, L_0xc77310, L_0xc75520, C4<1>, C4<1>; +L_0xc76470 .delay (50000,50000,50000) L_0xc76470/d; +L_0xc76560/d .functor OR 1, L_0xc75ce0, L_0xc76380, C4<0>, C4<0>; +L_0xc76560 .delay (50000,50000,50000) L_0xc76560/d; +L_0xc766c0/d .functor OR 1, L_0xc76560, L_0xc76470, C4<0>, C4<0>; +L_0xc766c0 .delay (50000,50000,50000) L_0xc766c0/d; +L_0xc76820/d .functor OR 1, L_0xc77220, L_0xc77310, C4<0>, C4<0>; +L_0xc76820 .delay (50000,50000,50000) L_0xc76820/d; +L_0xc76920/d .functor OR 1, L_0xc76820, L_0xc75520, C4<0>, C4<0>; +L_0xc76920 .delay (50000,50000,50000) L_0xc76920/d; +L_0xc76a30/d .functor NOT 1, L_0xc766c0, C4<0>, C4<0>, C4<0>; +L_0xc76a30 .delay (50000,50000,50000) L_0xc76a30/d; +L_0xc76b80/d .functor AND 1, L_0xc76a30, L_0xc76920, C4<1>, C4<1>; +L_0xc76b80 .delay (50000,50000,50000) L_0xc76b80/d; +L_0xc76ca0/d .functor AND 1, L_0xc77220, L_0xc77310, C4<1>, C4<1>; +L_0xc76ca0 .delay (50000,50000,50000) L_0xc76ca0/d; +L_0xc76ee0/d .functor AND 1, L_0xc76ca0, L_0xc75520, C4<1>, C4<1>; +L_0xc76ee0 .delay (50000,50000,50000) L_0xc76ee0/d; +L_0xc77070/d .functor OR 1, L_0xc76b80, L_0xc76ee0, C4<0>, C4<0>; +L_0xc77070 .delay (50000,50000,50000) L_0xc77070/d; +v0xc384a0_0 .net "a", 0 0, L_0xc77220; 1 drivers +v0xc38560_0 .net "ab", 0 0, L_0xc75ce0; 1 drivers +v0xc38600_0 .net "acarryin", 0 0, L_0xc76380; 1 drivers +v0xc386a0_0 .net "andall", 0 0, L_0xc76ee0; 1 drivers +v0xc38720_0 .net "andsingleintermediate", 0 0, L_0xc76ca0; 1 drivers +v0xc387c0_0 .net "andsumintermediate", 0 0, L_0xc76b80; 1 drivers +v0xc38860_0 .net "b", 0 0, L_0xc77310; 1 drivers +v0xc38900_0 .net "bcarryin", 0 0, L_0xc76470; 1 drivers +v0xc389f0_0 .alias "carryin", 0 0, v0xc3afe0_0; +v0xc38a90_0 .alias "carryout", 0 0, v0xc3b110_0; +v0xc38b10_0 .net "invcarryout", 0 0, L_0xc76a30; 1 drivers +v0xc38b90_0 .net "orall", 0 0, L_0xc76920; 1 drivers +v0xc38c30_0 .net "orpairintermediate", 0 0, L_0xc76560; 1 drivers +v0xc38cd0_0 .net "orsingleintermediate", 0 0, L_0xc76820; 1 drivers +v0xc38df0_0 .net "sum", 0 0, L_0xc77070; 1 drivers +S_0xc378b0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc377c0; + .timescale -9 -12; +L_0xc76e80/d .functor AND 1, L_0xc78310, L_0xc78440, C4<1>, C4<1>; +L_0xc76e80 .delay (50000,50000,50000) L_0xc76e80/d; +L_0xc77400/d .functor AND 1, L_0xc78310, L_0xc766c0, C4<1>, C4<1>; +L_0xc77400 .delay (50000,50000,50000) L_0xc77400/d; +L_0xc774f0/d .functor AND 1, L_0xc78440, L_0xc766c0, C4<1>, C4<1>; +L_0xc774f0 .delay (50000,50000,50000) L_0xc774f0/d; +L_0xc77600/d .functor OR 1, L_0xc76e80, L_0xc77400, C4<0>, C4<0>; +L_0xc77600 .delay (50000,50000,50000) L_0xc77600/d; +L_0xc77760/d .functor OR 1, L_0xc77600, L_0xc774f0, C4<0>, C4<0>; +L_0xc77760 .delay (50000,50000,50000) L_0xc77760/d; +L_0xc778c0/d .functor OR 1, L_0xc78310, L_0xc78440, C4<0>, C4<0>; +L_0xc778c0 .delay (50000,50000,50000) L_0xc778c0/d; +L_0xc779c0/d .functor OR 1, L_0xc778c0, L_0xc766c0, C4<0>, C4<0>; +L_0xc779c0 .delay (50000,50000,50000) L_0xc779c0/d; +L_0xc77ad0/d .functor NOT 1, L_0xc77760, C4<0>, C4<0>, C4<0>; +L_0xc77ad0 .delay (50000,50000,50000) L_0xc77ad0/d; +L_0xc77b90/d .functor AND 1, L_0xc77ad0, L_0xc779c0, C4<1>, C4<1>; +L_0xc77b90 .delay (50000,50000,50000) L_0xc77b90/d; +L_0xc77d00/d .functor AND 1, L_0xc78310, L_0xc78440, C4<1>, C4<1>; +L_0xc77d00 .delay (50000,50000,50000) L_0xc77d00/d; +L_0xc77f40/d .functor AND 1, L_0xc77d00, L_0xc766c0, C4<1>, C4<1>; +L_0xc77f40 .delay (50000,50000,50000) L_0xc77f40/d; +L_0xc780d0/d .functor OR 1, L_0xc77b90, L_0xc77f40, C4<0>, C4<0>; +L_0xc780d0 .delay (50000,50000,50000) L_0xc780d0/d; +v0xc379a0_0 .net "a", 0 0, L_0xc78310; 1 drivers +v0xc37a60_0 .net "ab", 0 0, L_0xc76e80; 1 drivers +v0xc37b00_0 .net "acarryin", 0 0, L_0xc77400; 1 drivers +v0xc37ba0_0 .net "andall", 0 0, L_0xc77f40; 1 drivers +v0xc37c20_0 .net "andsingleintermediate", 0 0, L_0xc77d00; 1 drivers +v0xc37cc0_0 .net "andsumintermediate", 0 0, L_0xc77b90; 1 drivers +v0xc37d60_0 .net "b", 0 0, L_0xc78440; 1 drivers +v0xc37e00_0 .net "bcarryin", 0 0, L_0xc774f0; 1 drivers +v0xc37ef0_0 .alias "carryin", 0 0, v0xc3b110_0; +v0xc37f90_0 .alias "carryout", 0 0, v0xc502f0_0; +v0xc38010_0 .net "invcarryout", 0 0, L_0xc77ad0; 1 drivers +v0xc380b0_0 .net "orall", 0 0, L_0xc779c0; 1 drivers +v0xc38150_0 .net "orpairintermediate", 0 0, L_0xc77600; 1 drivers +v0xc381f0_0 .net "orsingleintermediate", 0 0, L_0xc778c0; 1 drivers +v0xc38310_0 .net "sum", 0 0, L_0xc780d0; 1 drivers +S_0xc33cb0 .scope module, "adder4" "FullAdder4bit" 4 242, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc7d3d0/d .functor AND 1, L_0xc7db10, L_0xc7dbb0, C4<1>, C4<1>; +L_0xc7d3d0 .delay (50000,50000,50000) L_0xc7d3d0/d; +L_0xc7dc50/d .functor NOR 1, L_0xc7dcf0, L_0xc7dd90, C4<0>, C4<0>; +L_0xc7dc50 .delay (50000,50000,50000) L_0xc7dc50/d; +L_0xc7dec0/d .functor AND 1, L_0xc7dfb0, L_0xc7e050, C4<1>, C4<1>; +L_0xc7dec0 .delay (50000,50000,50000) L_0xc7dec0/d; +L_0xc7de30/d .functor NOR 1, L_0xc7e270, L_0xc7e420, C4<0>, C4<0>; +L_0xc7de30 .delay (50000,50000,50000) L_0xc7de30/d; +L_0xc7e140/d .functor OR 1, L_0xc7d3d0, L_0xc7dc50, C4<0>, C4<0>; +L_0xc7e140 .delay (50000,50000,50000) L_0xc7e140/d; +L_0xc7e660/d .functor NOR 1, L_0xc7dec0, L_0xc7de30, C4<0>, C4<0>; +L_0xc7e660 .delay (50000,50000,50000) L_0xc7e660/d; +L_0xc7e7a0/d .functor AND 1, L_0xc7e140, L_0xc7e660, C4<1>, C4<1>; +L_0xc7e7a0 .delay (50000,50000,50000) L_0xc7e7a0/d; +v0xc368a0_0 .net *"_s25", 0 0, L_0xc7db10; 1 drivers +v0xc36960_0 .net *"_s27", 0 0, L_0xc7dbb0; 1 drivers +v0xc36a00_0 .net *"_s29", 0 0, L_0xc7dcf0; 1 drivers +v0xc36aa0_0 .net *"_s31", 0 0, L_0xc7dd90; 1 drivers +v0xc36b20_0 .net *"_s33", 0 0, L_0xc7dfb0; 1 drivers +v0xc36bc0_0 .net *"_s35", 0 0, L_0xc7e050; 1 drivers +v0xc36c60_0 .net *"_s37", 0 0, L_0xc7e270; 1 drivers +v0xc36d00_0 .net *"_s39", 0 0, L_0xc7e420; 1 drivers +v0xc36da0_0 .net "a", 3 0, L_0xc7e990; 1 drivers +v0xc36e40_0 .net "aandb", 0 0, L_0xc7d3d0; 1 drivers +v0xc36ee0_0 .net "abandnoror", 0 0, L_0xc7e140; 1 drivers +v0xc36f80_0 .net "anorb", 0 0, L_0xc7dc50; 1 drivers +v0xc37020_0 .net "b", 3 0, L_0xc794e0; 1 drivers +v0xc370c0_0 .net "bandsum", 0 0, L_0xc7dec0; 1 drivers +v0xc371e0_0 .net "bnorsum", 0 0, L_0xc7de30; 1 drivers +v0xc37280_0 .net "bsumandnornor", 0 0, L_0xc7e660; 1 drivers +v0xc37140_0 .alias "carryin", 0 0, v0xc502f0_0; +v0xc373b0_0 .alias "carryout", 0 0, v0xc50740_0; +v0xc37300_0 .net "carryout1", 0 0, L_0xc79aa0; 1 drivers +v0xc374d0_0 .net "carryout2", 0 0, L_0xc7aa10; 1 drivers +v0xc37600_0 .net "carryout3", 0 0, L_0xc7bbb0; 1 drivers +v0xc37680_0 .alias "overflow", 0 0, v0xc4d480_0; +v0xc37550_0 .net8 "sum", 3 0, RS_0x7fb7ca186a08; 4 drivers +L_0xc7a440 .part/pv L_0xc7a380, 0, 1, 4; +L_0xc7a500 .part L_0xc7e990, 0, 1; +L_0xc7a5a0 .part L_0xc794e0, 0, 1; +L_0xc7b4d0 .part/pv L_0xc7b3c0, 1, 1, 4; +L_0xc7b5c0 .part L_0xc7e990, 1, 1; +L_0xc7b6b0 .part L_0xc794e0, 1, 1; +L_0xc7c670 .part/pv L_0xc7c560, 2, 1, 4; +L_0xc7c710 .part L_0xc7e990, 2, 1; +L_0xc7c800 .part L_0xc794e0, 2, 1; +L_0xc7d6d0 .part/pv L_0xc7d5c0, 3, 1, 4; +L_0xc7d800 .part L_0xc7e990, 3, 1; +L_0xc7d930 .part L_0xc794e0, 3, 1; +L_0xc7db10 .part L_0xc7e990, 3, 1; +L_0xc7dbb0 .part L_0xc794e0, 3, 1; +L_0xc7dcf0 .part L_0xc7e990, 3, 1; +L_0xc7dd90 .part L_0xc794e0, 3, 1; +L_0xc7dfb0 .part L_0xc794e0, 3, 1; +L_0xc7e050 .part RS_0x7fb7ca186a08, 3, 1; +L_0xc7e270 .part L_0xc794e0, 3, 1; +L_0xc7e420 .part RS_0x7fb7ca186a08, 3, 1; +S_0xc35e10 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc33cb0; + .timescale -9 -12; +L_0xc74260/d .functor AND 1, L_0xc7a500, L_0xc7a5a0, C4<1>, C4<1>; +L_0xc74260 .delay (50000,50000,50000) L_0xc74260/d; +L_0xc74300/d .functor AND 1, L_0xc7a500, L_0xc77760, C4<1>, C4<1>; +L_0xc74300 .delay (50000,50000,50000) L_0xc74300/d; +L_0xc797f0/d .functor AND 1, L_0xc7a5a0, L_0xc77760, C4<1>, C4<1>; +L_0xc797f0 .delay (50000,50000,50000) L_0xc797f0/d; +L_0xc79960/d .functor OR 1, L_0xc74260, L_0xc74300, C4<0>, C4<0>; +L_0xc79960 .delay (50000,50000,50000) L_0xc79960/d; +L_0xc79aa0/d .functor OR 1, L_0xc79960, L_0xc797f0, C4<0>, C4<0>; +L_0xc79aa0 .delay (50000,50000,50000) L_0xc79aa0/d; +L_0xc79c00/d .functor OR 1, L_0xc7a500, L_0xc7a5a0, C4<0>, C4<0>; +L_0xc79c00 .delay (50000,50000,50000) L_0xc79c00/d; +L_0xc79d00/d .functor OR 1, L_0xc79c00, L_0xc77760, C4<0>, C4<0>; +L_0xc79d00 .delay (50000,50000,50000) L_0xc79d00/d; +L_0xc79e10/d .functor NOT 1, L_0xc79aa0, C4<0>, C4<0>, C4<0>; +L_0xc79e10 .delay (50000,50000,50000) L_0xc79e10/d; +L_0xc79f60/d .functor AND 1, L_0xc79e10, L_0xc79d00, C4<1>, C4<1>; +L_0xc79f60 .delay (50000,50000,50000) L_0xc79f60/d; +L_0xc7a080/d .functor AND 1, L_0xc7a500, L_0xc7a5a0, C4<1>, C4<1>; +L_0xc7a080 .delay (50000,50000,50000) L_0xc7a080/d; +L_0xc7a2c0/d .functor AND 1, L_0xc7a080, L_0xc77760, C4<1>, C4<1>; +L_0xc7a2c0 .delay (50000,50000,50000) L_0xc7a2c0/d; +L_0xc7a380/d .functor OR 1, L_0xc79f60, L_0xc7a2c0, C4<0>, C4<0>; +L_0xc7a380 .delay (50000,50000,50000) L_0xc7a380/d; +v0xc35f00_0 .net "a", 0 0, L_0xc7a500; 1 drivers +v0xc35fc0_0 .net "ab", 0 0, L_0xc74260; 1 drivers +v0xc36060_0 .net "acarryin", 0 0, L_0xc74300; 1 drivers +v0xc36100_0 .net "andall", 0 0, L_0xc7a2c0; 1 drivers +v0xc36180_0 .net "andsingleintermediate", 0 0, L_0xc7a080; 1 drivers +v0xc36220_0 .net "andsumintermediate", 0 0, L_0xc79f60; 1 drivers +v0xc362c0_0 .net "b", 0 0, L_0xc7a5a0; 1 drivers +v0xc36360_0 .net "bcarryin", 0 0, L_0xc797f0; 1 drivers +v0xc36400_0 .alias "carryin", 0 0, v0xc502f0_0; +v0xc364a0_0 .alias "carryout", 0 0, v0xc37300_0; +v0xc36520_0 .net "invcarryout", 0 0, L_0xc79e10; 1 drivers +v0xc365a0_0 .net "orall", 0 0, L_0xc79d00; 1 drivers +v0xc36640_0 .net "orpairintermediate", 0 0, L_0xc79960; 1 drivers +v0xc366e0_0 .net "orsingleintermediate", 0 0, L_0xc79c00; 1 drivers +v0xc36800_0 .net "sum", 0 0, L_0xc7a380; 1 drivers +S_0xc35380 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc33cb0; + .timescale -9 -12; +L_0xc7a260/d .functor AND 1, L_0xc7b5c0, L_0xc7b6b0, C4<1>, C4<1>; +L_0xc7a260 .delay (50000,50000,50000) L_0xc7a260/d; +L_0xc7a6d0/d .functor AND 1, L_0xc7b5c0, L_0xc79aa0, C4<1>, C4<1>; +L_0xc7a6d0 .delay (50000,50000,50000) L_0xc7a6d0/d; +L_0xc7a7c0/d .functor AND 1, L_0xc7b6b0, L_0xc79aa0, C4<1>, C4<1>; +L_0xc7a7c0 .delay (50000,50000,50000) L_0xc7a7c0/d; +L_0xc7a8b0/d .functor OR 1, L_0xc7a260, L_0xc7a6d0, C4<0>, C4<0>; +L_0xc7a8b0 .delay (50000,50000,50000) L_0xc7a8b0/d; +L_0xc7aa10/d .functor OR 1, L_0xc7a8b0, L_0xc7a7c0, C4<0>, C4<0>; +L_0xc7aa10 .delay (50000,50000,50000) L_0xc7aa10/d; +L_0xc7ab70/d .functor OR 1, L_0xc7b5c0, L_0xc7b6b0, C4<0>, C4<0>; +L_0xc7ab70 .delay (50000,50000,50000) L_0xc7ab70/d; +L_0xc7ac70/d .functor OR 1, L_0xc7ab70, L_0xc79aa0, C4<0>, C4<0>; +L_0xc7ac70 .delay (50000,50000,50000) L_0xc7ac70/d; +L_0xc7ad80/d .functor NOT 1, L_0xc7aa10, C4<0>, C4<0>, C4<0>; +L_0xc7ad80 .delay (50000,50000,50000) L_0xc7ad80/d; +L_0xc7aed0/d .functor AND 1, L_0xc7ad80, L_0xc7ac70, C4<1>, C4<1>; +L_0xc7aed0 .delay (50000,50000,50000) L_0xc7aed0/d; +L_0xc7aff0/d .functor AND 1, L_0xc7b5c0, L_0xc7b6b0, C4<1>, C4<1>; +L_0xc7aff0 .delay (50000,50000,50000) L_0xc7aff0/d; +L_0xc7b230/d .functor AND 1, L_0xc7aff0, L_0xc79aa0, C4<1>, C4<1>; +L_0xc7b230 .delay (50000,50000,50000) L_0xc7b230/d; +L_0xc7b3c0/d .functor OR 1, L_0xc7aed0, L_0xc7b230, C4<0>, C4<0>; +L_0xc7b3c0 .delay (50000,50000,50000) L_0xc7b3c0/d; +v0xc35470_0 .net "a", 0 0, L_0xc7b5c0; 1 drivers +v0xc35530_0 .net "ab", 0 0, L_0xc7a260; 1 drivers +v0xc355d0_0 .net "acarryin", 0 0, L_0xc7a6d0; 1 drivers +v0xc35670_0 .net "andall", 0 0, L_0xc7b230; 1 drivers +v0xc356f0_0 .net "andsingleintermediate", 0 0, L_0xc7aff0; 1 drivers +v0xc35790_0 .net "andsumintermediate", 0 0, L_0xc7aed0; 1 drivers +v0xc35830_0 .net "b", 0 0, L_0xc7b6b0; 1 drivers +v0xc358d0_0 .net "bcarryin", 0 0, L_0xc7a7c0; 1 drivers +v0xc35970_0 .alias "carryin", 0 0, v0xc37300_0; +v0xc35a10_0 .alias "carryout", 0 0, v0xc374d0_0; +v0xc35a90_0 .net "invcarryout", 0 0, L_0xc7ad80; 1 drivers +v0xc35b10_0 .net "orall", 0 0, L_0xc7ac70; 1 drivers +v0xc35bb0_0 .net "orpairintermediate", 0 0, L_0xc7a8b0; 1 drivers +v0xc35c50_0 .net "orsingleintermediate", 0 0, L_0xc7ab70; 1 drivers +v0xc35d70_0 .net "sum", 0 0, L_0xc7b3c0; 1 drivers +S_0xc348a0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc33cb0; + .timescale -9 -12; +L_0xc7b1d0/d .functor AND 1, L_0xc7c710, L_0xc7c800, C4<1>, C4<1>; +L_0xc7b1d0 .delay (50000,50000,50000) L_0xc7b1d0/d; +L_0xc7b870/d .functor AND 1, L_0xc7c710, L_0xc7aa10, C4<1>, C4<1>; +L_0xc7b870 .delay (50000,50000,50000) L_0xc7b870/d; +L_0xc7b960/d .functor AND 1, L_0xc7c800, L_0xc7aa10, C4<1>, C4<1>; +L_0xc7b960 .delay (50000,50000,50000) L_0xc7b960/d; +L_0xc7ba50/d .functor OR 1, L_0xc7b1d0, L_0xc7b870, C4<0>, C4<0>; +L_0xc7ba50 .delay (50000,50000,50000) L_0xc7ba50/d; +L_0xc7bbb0/d .functor OR 1, L_0xc7ba50, L_0xc7b960, C4<0>, C4<0>; +L_0xc7bbb0 .delay (50000,50000,50000) L_0xc7bbb0/d; +L_0xc7bd10/d .functor OR 1, L_0xc7c710, L_0xc7c800, C4<0>, C4<0>; +L_0xc7bd10 .delay (50000,50000,50000) L_0xc7bd10/d; +L_0xc7be10/d .functor OR 1, L_0xc7bd10, L_0xc7aa10, C4<0>, C4<0>; +L_0xc7be10 .delay (50000,50000,50000) L_0xc7be10/d; +L_0xc7bf20/d .functor NOT 1, L_0xc7bbb0, C4<0>, C4<0>, C4<0>; +L_0xc7bf20 .delay (50000,50000,50000) L_0xc7bf20/d; +L_0xc7c070/d .functor AND 1, L_0xc7bf20, L_0xc7be10, C4<1>, C4<1>; +L_0xc7c070 .delay (50000,50000,50000) L_0xc7c070/d; +L_0xc7c190/d .functor AND 1, L_0xc7c710, L_0xc7c800, C4<1>, C4<1>; +L_0xc7c190 .delay (50000,50000,50000) L_0xc7c190/d; +L_0xc7c3d0/d .functor AND 1, L_0xc7c190, L_0xc7aa10, C4<1>, C4<1>; +L_0xc7c3d0 .delay (50000,50000,50000) L_0xc7c3d0/d; +L_0xc7c560/d .functor OR 1, L_0xc7c070, L_0xc7c3d0, C4<0>, C4<0>; +L_0xc7c560 .delay (50000,50000,50000) L_0xc7c560/d; +v0xc34990_0 .net "a", 0 0, L_0xc7c710; 1 drivers +v0xc34a50_0 .net "ab", 0 0, L_0xc7b1d0; 1 drivers +v0xc34af0_0 .net "acarryin", 0 0, L_0xc7b870; 1 drivers +v0xc34b90_0 .net "andall", 0 0, L_0xc7c3d0; 1 drivers +v0xc34c10_0 .net "andsingleintermediate", 0 0, L_0xc7c190; 1 drivers +v0xc34cb0_0 .net "andsumintermediate", 0 0, L_0xc7c070; 1 drivers +v0xc34d50_0 .net "b", 0 0, L_0xc7c800; 1 drivers +v0xc34df0_0 .net "bcarryin", 0 0, L_0xc7b960; 1 drivers +v0xc34ee0_0 .alias "carryin", 0 0, v0xc374d0_0; +v0xc34f80_0 .alias "carryout", 0 0, v0xc37600_0; +v0xc35000_0 .net "invcarryout", 0 0, L_0xc7bf20; 1 drivers +v0xc35080_0 .net "orall", 0 0, L_0xc7be10; 1 drivers +v0xc35120_0 .net "orpairintermediate", 0 0, L_0xc7ba50; 1 drivers +v0xc351c0_0 .net "orsingleintermediate", 0 0, L_0xc7bd10; 1 drivers +v0xc352e0_0 .net "sum", 0 0, L_0xc7c560; 1 drivers +S_0xc33da0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc33cb0; + .timescale -9 -12; +L_0xc7c370/d .functor AND 1, L_0xc7d800, L_0xc7d930, C4<1>, C4<1>; +L_0xc7c370 .delay (50000,50000,50000) L_0xc7c370/d; +L_0xc7c8f0/d .functor AND 1, L_0xc7d800, L_0xc7bbb0, C4<1>, C4<1>; +L_0xc7c8f0 .delay (50000,50000,50000) L_0xc7c8f0/d; +L_0xc7c9e0/d .functor AND 1, L_0xc7d930, L_0xc7bbb0, C4<1>, C4<1>; +L_0xc7c9e0 .delay (50000,50000,50000) L_0xc7c9e0/d; +L_0xc7caf0/d .functor OR 1, L_0xc7c370, L_0xc7c8f0, C4<0>, C4<0>; +L_0xc7caf0 .delay (50000,50000,50000) L_0xc7caf0/d; +L_0xc7cc50/d .functor OR 1, L_0xc7caf0, L_0xc7c9e0, C4<0>, C4<0>; +L_0xc7cc50 .delay (50000,50000,50000) L_0xc7cc50/d; +L_0xc7cdb0/d .functor OR 1, L_0xc7d800, L_0xc7d930, C4<0>, C4<0>; +L_0xc7cdb0 .delay (50000,50000,50000) L_0xc7cdb0/d; +L_0xc7ceb0/d .functor OR 1, L_0xc7cdb0, L_0xc7bbb0, C4<0>, C4<0>; +L_0xc7ceb0 .delay (50000,50000,50000) L_0xc7ceb0/d; +L_0xc7cfc0/d .functor NOT 1, L_0xc7cc50, C4<0>, C4<0>, C4<0>; +L_0xc7cfc0 .delay (50000,50000,50000) L_0xc7cfc0/d; +L_0xc7d080/d .functor AND 1, L_0xc7cfc0, L_0xc7ceb0, C4<1>, C4<1>; +L_0xc7d080 .delay (50000,50000,50000) L_0xc7d080/d; +L_0xc7d1f0/d .functor AND 1, L_0xc7d800, L_0xc7d930, C4<1>, C4<1>; +L_0xc7d1f0 .delay (50000,50000,50000) L_0xc7d1f0/d; +L_0xc7d430/d .functor AND 1, L_0xc7d1f0, L_0xc7bbb0, C4<1>, C4<1>; +L_0xc7d430 .delay (50000,50000,50000) L_0xc7d430/d; +L_0xc7d5c0/d .functor OR 1, L_0xc7d080, L_0xc7d430, C4<0>, C4<0>; +L_0xc7d5c0 .delay (50000,50000,50000) L_0xc7d5c0/d; +v0xc33e90_0 .net "a", 0 0, L_0xc7d800; 1 drivers +v0xc33f50_0 .net "ab", 0 0, L_0xc7c370; 1 drivers +v0xc33ff0_0 .net "acarryin", 0 0, L_0xc7c8f0; 1 drivers +v0xc34090_0 .net "andall", 0 0, L_0xc7d430; 1 drivers +v0xc34110_0 .net "andsingleintermediate", 0 0, L_0xc7d1f0; 1 drivers +v0xc341b0_0 .net "andsumintermediate", 0 0, L_0xc7d080; 1 drivers +v0xc34250_0 .net "b", 0 0, L_0xc7d930; 1 drivers +v0xc342f0_0 .net "bcarryin", 0 0, L_0xc7c9e0; 1 drivers +v0xc343e0_0 .alias "carryin", 0 0, v0xc37600_0; +v0xc34480_0 .alias "carryout", 0 0, v0xc50740_0; +v0xc34500_0 .net "invcarryout", 0 0, L_0xc7cfc0; 1 drivers +v0xc345a0_0 .net "orall", 0 0, L_0xc7ceb0; 1 drivers +v0xc34640_0 .net "orpairintermediate", 0 0, L_0xc7caf0; 1 drivers +v0xc346e0_0 .net "orsingleintermediate", 0 0, L_0xc7cdb0; 1 drivers +v0xc34800_0 .net "sum", 0 0, L_0xc7d5c0; 1 drivers +S_0xc301a0 .scope module, "adder5" "FullAdder4bit" 4 243, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc825c0/d .functor AND 1, L_0xc82ca0, L_0xc82d40, C4<1>, C4<1>; +L_0xc825c0 .delay (50000,50000,50000) L_0xc825c0/d; +L_0xc82e60/d .functor NOR 1, L_0xc82f00, L_0xc82fa0, C4<0>, C4<0>; +L_0xc82e60 .delay (50000,50000,50000) L_0xc82e60/d; +L_0xc830d0/d .functor AND 1, L_0xc831f0, L_0xc83290, C4<1>, C4<1>; +L_0xc830d0 .delay (50000,50000,50000) L_0xc830d0/d; +L_0xc83040/d .functor NOR 1, L_0xc834e0, L_0xc83690, C4<0>, C4<0>; +L_0xc83040 .delay (50000,50000,50000) L_0xc83040/d; +L_0xc83380/d .functor OR 1, L_0xc825c0, L_0xc82e60, C4<0>, C4<0>; +L_0xc83380 .delay (50000,50000,50000) L_0xc83380/d; +L_0xc838d0/d .functor NOR 1, L_0xc830d0, L_0xc83040, C4<0>, C4<0>; +L_0xc838d0 .delay (50000,50000,50000) L_0xc838d0/d; +L_0xc83a10/d .functor AND 1, L_0xc83380, L_0xc838d0, C4<1>, C4<1>; +L_0xc83a10 .delay (50000,50000,50000) L_0xc83a10/d; +v0xc32d90_0 .net *"_s25", 0 0, L_0xc82ca0; 1 drivers +v0xc32e50_0 .net *"_s27", 0 0, L_0xc82d40; 1 drivers +v0xc32ef0_0 .net *"_s29", 0 0, L_0xc82f00; 1 drivers +v0xc32f90_0 .net *"_s31", 0 0, L_0xc82fa0; 1 drivers +v0xc33010_0 .net *"_s33", 0 0, L_0xc831f0; 1 drivers +v0xc330b0_0 .net *"_s35", 0 0, L_0xc83290; 1 drivers +v0xc33150_0 .net *"_s37", 0 0, L_0xc834e0; 1 drivers +v0xc331f0_0 .net *"_s39", 0 0, L_0xc83690; 1 drivers +v0xc33290_0 .net "a", 3 0, L_0xc7ea30; 1 drivers +v0xc33330_0 .net "aandb", 0 0, L_0xc825c0; 1 drivers +v0xc333d0_0 .net "abandnoror", 0 0, L_0xc83380; 1 drivers +v0xc33470_0 .net "anorb", 0 0, L_0xc82e60; 1 drivers +v0xc33510_0 .net "b", 3 0, L_0xc7ead0; 1 drivers +v0xc335b0_0 .net "bandsum", 0 0, L_0xc830d0; 1 drivers +v0xc336d0_0 .net "bnorsum", 0 0, L_0xc83040; 1 drivers +v0xc33770_0 .net "bsumandnornor", 0 0, L_0xc838d0; 1 drivers +v0xc33630_0 .alias "carryin", 0 0, v0xc50740_0; +v0xc338a0_0 .alias "carryout", 0 0, v0xc50850_0; +v0xc337f0_0 .net "carryout1", 0 0, L_0xc7ef70; 1 drivers +v0xc339c0_0 .net "carryout2", 0 0, L_0xc7fec0; 1 drivers +v0xc33af0_0 .net "carryout3", 0 0, L_0xc687e0; 1 drivers +v0xc33b70_0 .alias "overflow", 0 0, v0xc4d500_0; +v0xc33a40_0 .net8 "sum", 3 0, RS_0x7fb7ca185c28; 4 drivers +L_0xc7f8f0 .part/pv L_0xc7f830, 0, 1, 4; +L_0xc7f9b0 .part L_0xc7ea30, 0, 1; +L_0xc7fa50 .part L_0xc7ead0, 0, 1; +L_0xc80980 .part/pv L_0xc80870, 1, 1, 4; +L_0xc80a70 .part L_0xc7ea30, 1, 1; +L_0xc80b60 .part L_0xc7ead0, 1, 1; +L_0xc81960 .part/pv L_0xc81890, 2, 1, 4; +L_0xc81a00 .part L_0xc7ea30, 2, 1; +L_0xc81af0 .part L_0xc7ead0, 2, 1; +L_0xc82860 .part/pv L_0xc82790, 3, 1, 4; +L_0xc82990 .part L_0xc7ea30, 3, 1; +L_0xc82ac0 .part L_0xc7ead0, 3, 1; +L_0xc82ca0 .part L_0xc7ea30, 3, 1; +L_0xc82d40 .part L_0xc7ead0, 3, 1; +L_0xc82f00 .part L_0xc7ea30, 3, 1; +L_0xc82fa0 .part L_0xc7ead0, 3, 1; +L_0xc831f0 .part L_0xc7ead0, 3, 1; +L_0xc83290 .part RS_0x7fb7ca185c28, 3, 1; +L_0xc834e0 .part L_0xc7ead0, 3, 1; +L_0xc83690 .part RS_0x7fb7ca185c28, 3, 1; +S_0xc32300 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc301a0; + .timescale -9 -12; +L_0xc79580/d .functor AND 1, L_0xc7f9b0, L_0xc7fa50, C4<1>, C4<1>; +L_0xc79580 .delay (50000,50000,50000) L_0xc79580/d; +L_0xc79620/d .functor AND 1, L_0xc7f9b0, L_0xc7cc50, C4<1>, C4<1>; +L_0xc79620 .delay (50000,50000,50000) L_0xc79620/d; +L_0xc7ecc0/d .functor AND 1, L_0xc7fa50, L_0xc7cc50, C4<1>, C4<1>; +L_0xc7ecc0 .delay (50000,50000,50000) L_0xc7ecc0/d; +L_0xc7ee30/d .functor OR 1, L_0xc79580, L_0xc79620, C4<0>, C4<0>; +L_0xc7ee30 .delay (50000,50000,50000) L_0xc7ee30/d; +L_0xc7ef70/d .functor OR 1, L_0xc7ee30, L_0xc7ecc0, C4<0>, C4<0>; +L_0xc7ef70 .delay (50000,50000,50000) L_0xc7ef70/d; +L_0xc7f0b0/d .functor OR 1, L_0xc7f9b0, L_0xc7fa50, C4<0>, C4<0>; +L_0xc7f0b0 .delay (50000,50000,50000) L_0xc7f0b0/d; +L_0xc7f1b0/d .functor OR 1, L_0xc7f0b0, L_0xc7cc50, C4<0>, C4<0>; +L_0xc7f1b0 .delay (50000,50000,50000) L_0xc7f1b0/d; +L_0xc7f2c0/d .functor NOT 1, L_0xc7ef70, C4<0>, C4<0>, C4<0>; +L_0xc7f2c0 .delay (50000,50000,50000) L_0xc7f2c0/d; +L_0xc7f410/d .functor AND 1, L_0xc7f2c0, L_0xc7f1b0, C4<1>, C4<1>; +L_0xc7f410 .delay (50000,50000,50000) L_0xc7f410/d; +L_0xc7f530/d .functor AND 1, L_0xc7f9b0, L_0xc7fa50, C4<1>, C4<1>; +L_0xc7f530 .delay (50000,50000,50000) L_0xc7f530/d; +L_0xc7f770/d .functor AND 1, L_0xc7f530, L_0xc7cc50, C4<1>, C4<1>; +L_0xc7f770 .delay (50000,50000,50000) L_0xc7f770/d; +L_0xc7f830/d .functor OR 1, L_0xc7f410, L_0xc7f770, C4<0>, C4<0>; +L_0xc7f830 .delay (50000,50000,50000) L_0xc7f830/d; +v0xc323f0_0 .net "a", 0 0, L_0xc7f9b0; 1 drivers +v0xc324b0_0 .net "ab", 0 0, L_0xc79580; 1 drivers +v0xc32550_0 .net "acarryin", 0 0, L_0xc79620; 1 drivers +v0xc325f0_0 .net "andall", 0 0, L_0xc7f770; 1 drivers +v0xc32670_0 .net "andsingleintermediate", 0 0, L_0xc7f530; 1 drivers +v0xc32710_0 .net "andsumintermediate", 0 0, L_0xc7f410; 1 drivers +v0xc327b0_0 .net "b", 0 0, L_0xc7fa50; 1 drivers +v0xc32850_0 .net "bcarryin", 0 0, L_0xc7ecc0; 1 drivers +v0xc328f0_0 .alias "carryin", 0 0, v0xc50740_0; +v0xc32990_0 .alias "carryout", 0 0, v0xc337f0_0; +v0xc32a10_0 .net "invcarryout", 0 0, L_0xc7f2c0; 1 drivers +v0xc32a90_0 .net "orall", 0 0, L_0xc7f1b0; 1 drivers +v0xc32b30_0 .net "orpairintermediate", 0 0, L_0xc7ee30; 1 drivers +v0xc32bd0_0 .net "orsingleintermediate", 0 0, L_0xc7f0b0; 1 drivers +v0xc32cf0_0 .net "sum", 0 0, L_0xc7f830; 1 drivers +S_0xc31870 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc301a0; + .timescale -9 -12; +L_0xc7f710/d .functor AND 1, L_0xc80a70, L_0xc80b60, C4<1>, C4<1>; +L_0xc7f710 .delay (50000,50000,50000) L_0xc7f710/d; +L_0xc7fb80/d .functor AND 1, L_0xc80a70, L_0xc7ef70, C4<1>, C4<1>; +L_0xc7fb80 .delay (50000,50000,50000) L_0xc7fb80/d; +L_0xc7fc70/d .functor AND 1, L_0xc80b60, L_0xc7ef70, C4<1>, C4<1>; +L_0xc7fc70 .delay (50000,50000,50000) L_0xc7fc70/d; +L_0xc7fd60/d .functor OR 1, L_0xc7f710, L_0xc7fb80, C4<0>, C4<0>; +L_0xc7fd60 .delay (50000,50000,50000) L_0xc7fd60/d; +L_0xc7fec0/d .functor OR 1, L_0xc7fd60, L_0xc7fc70, C4<0>, C4<0>; +L_0xc7fec0 .delay (50000,50000,50000) L_0xc7fec0/d; +L_0xc80020/d .functor OR 1, L_0xc80a70, L_0xc80b60, C4<0>, C4<0>; +L_0xc80020 .delay (50000,50000,50000) L_0xc80020/d; +L_0xc80120/d .functor OR 1, L_0xc80020, L_0xc7ef70, C4<0>, C4<0>; +L_0xc80120 .delay (50000,50000,50000) L_0xc80120/d; +L_0xc80230/d .functor NOT 1, L_0xc7fec0, C4<0>, C4<0>, C4<0>; +L_0xc80230 .delay (50000,50000,50000) L_0xc80230/d; +L_0xc80380/d .functor AND 1, L_0xc80230, L_0xc80120, C4<1>, C4<1>; +L_0xc80380 .delay (50000,50000,50000) L_0xc80380/d; +L_0xc804a0/d .functor AND 1, L_0xc80a70, L_0xc80b60, C4<1>, C4<1>; +L_0xc804a0 .delay (50000,50000,50000) L_0xc804a0/d; +L_0xc806e0/d .functor AND 1, L_0xc804a0, L_0xc7ef70, C4<1>, C4<1>; +L_0xc806e0 .delay (50000,50000,50000) L_0xc806e0/d; +L_0xc80870/d .functor OR 1, L_0xc80380, L_0xc806e0, C4<0>, C4<0>; +L_0xc80870 .delay (50000,50000,50000) L_0xc80870/d; +v0xc31960_0 .net "a", 0 0, L_0xc80a70; 1 drivers +v0xc31a20_0 .net "ab", 0 0, L_0xc7f710; 1 drivers +v0xc31ac0_0 .net "acarryin", 0 0, L_0xc7fb80; 1 drivers +v0xc31b60_0 .net "andall", 0 0, L_0xc806e0; 1 drivers +v0xc31be0_0 .net "andsingleintermediate", 0 0, L_0xc804a0; 1 drivers +v0xc31c80_0 .net "andsumintermediate", 0 0, L_0xc80380; 1 drivers +v0xc31d20_0 .net "b", 0 0, L_0xc80b60; 1 drivers +v0xc31dc0_0 .net "bcarryin", 0 0, L_0xc7fc70; 1 drivers +v0xc31e60_0 .alias "carryin", 0 0, v0xc337f0_0; +v0xc31f00_0 .alias "carryout", 0 0, v0xc339c0_0; +v0xc31f80_0 .net "invcarryout", 0 0, L_0xc80230; 1 drivers +v0xc32000_0 .net "orall", 0 0, L_0xc80120; 1 drivers +v0xc320a0_0 .net "orpairintermediate", 0 0, L_0xc7fd60; 1 drivers +v0xc32140_0 .net "orsingleintermediate", 0 0, L_0xc80020; 1 drivers +v0xc32260_0 .net "sum", 0 0, L_0xc80870; 1 drivers +S_0xc30d90 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc301a0; + .timescale -9 -12; +L_0xc80680/d .functor AND 1, L_0xc81a00, L_0xc81af0, C4<1>, C4<1>; +L_0xc80680 .delay (50000,50000,50000) L_0xc80680/d; +L_0xc80d20/d .functor AND 1, L_0xc81a00, L_0xc7fec0, C4<1>, C4<1>; +L_0xc80d20 .delay (50000,50000,50000) L_0xc80d20/d; +L_0xc80e10/d .functor AND 1, L_0xc81af0, L_0xc7fec0, C4<1>, C4<1>; +L_0xc80e10 .delay (50000,50000,50000) L_0xc80e10/d; +L_0xc80f00/d .functor OR 1, L_0xc80680, L_0xc80d20, C4<0>, C4<0>; +L_0xc80f00 .delay (50000,50000,50000) L_0xc80f00/d; +L_0xc687e0/d .functor OR 1, L_0xc80f00, L_0xc80e10, C4<0>, C4<0>; +L_0xc687e0 .delay (50000,50000,50000) L_0xc687e0/d; +L_0xc81100/d .functor OR 1, L_0xc81a00, L_0xc81af0, C4<0>, C4<0>; +L_0xc81100 .delay (50000,50000,50000) L_0xc81100/d; +L_0xc811e0/d .functor OR 1, L_0xc81100, L_0xc7fec0, C4<0>, C4<0>; +L_0xc811e0 .delay (50000,50000,50000) L_0xc811e0/d; +L_0xc812d0/d .functor NOT 1, L_0xc687e0, C4<0>, C4<0>, C4<0>; +L_0xc812d0 .delay (50000,50000,50000) L_0xc812d0/d; +L_0xc81400/d .functor AND 1, L_0xc812d0, L_0xc811e0, C4<1>, C4<1>; +L_0xc81400 .delay (50000,50000,50000) L_0xc81400/d; +L_0xc81500/d .functor AND 1, L_0xc81a00, L_0xc81af0, C4<1>, C4<1>; +L_0xc81500 .delay (50000,50000,50000) L_0xc81500/d; +L_0xc81720/d .functor AND 1, L_0xc81500, L_0xc7fec0, C4<1>, C4<1>; +L_0xc81720 .delay (50000,50000,50000) L_0xc81720/d; +L_0xc81890/d .functor OR 1, L_0xc81400, L_0xc81720, C4<0>, C4<0>; +L_0xc81890 .delay (50000,50000,50000) L_0xc81890/d; +v0xc30e80_0 .net "a", 0 0, L_0xc81a00; 1 drivers +v0xc30f40_0 .net "ab", 0 0, L_0xc80680; 1 drivers +v0xc30fe0_0 .net "acarryin", 0 0, L_0xc80d20; 1 drivers +v0xc31080_0 .net "andall", 0 0, L_0xc81720; 1 drivers +v0xc31100_0 .net "andsingleintermediate", 0 0, L_0xc81500; 1 drivers +v0xc311a0_0 .net "andsumintermediate", 0 0, L_0xc81400; 1 drivers +v0xc31240_0 .net "b", 0 0, L_0xc81af0; 1 drivers +v0xc312e0_0 .net "bcarryin", 0 0, L_0xc80e10; 1 drivers +v0xc313d0_0 .alias "carryin", 0 0, v0xc339c0_0; +v0xc31470_0 .alias "carryout", 0 0, v0xc33af0_0; +v0xc314f0_0 .net "invcarryout", 0 0, L_0xc812d0; 1 drivers +v0xc31570_0 .net "orall", 0 0, L_0xc811e0; 1 drivers +v0xc31610_0 .net "orpairintermediate", 0 0, L_0xc80f00; 1 drivers +v0xc316b0_0 .net "orsingleintermediate", 0 0, L_0xc81100; 1 drivers +v0xc317d0_0 .net "sum", 0 0, L_0xc81890; 1 drivers +S_0xc30290 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc301a0; + .timescale -9 -12; +L_0xc816c0/d .functor AND 1, L_0xc82990, L_0xc82ac0, C4<1>, C4<1>; +L_0xc816c0 .delay (50000,50000,50000) L_0xc816c0/d; +L_0xc81be0/d .functor AND 1, L_0xc82990, L_0xc687e0, C4<1>, C4<1>; +L_0xc81be0 .delay (50000,50000,50000) L_0xc81be0/d; +L_0xc81cd0/d .functor AND 1, L_0xc82ac0, L_0xc687e0, C4<1>, C4<1>; +L_0xc81cd0 .delay (50000,50000,50000) L_0xc81cd0/d; +L_0xc81dc0/d .functor OR 1, L_0xc816c0, L_0xc81be0, C4<0>, C4<0>; +L_0xc81dc0 .delay (50000,50000,50000) L_0xc81dc0/d; +L_0xc81f00/d .functor OR 1, L_0xc81dc0, L_0xc81cd0, C4<0>, C4<0>; +L_0xc81f00 .delay (50000,50000,50000) L_0xc81f00/d; +L_0xc82040/d .functor OR 1, L_0xc82990, L_0xc82ac0, C4<0>, C4<0>; +L_0xc82040 .delay (50000,50000,50000) L_0xc82040/d; +L_0xc82120/d .functor OR 1, L_0xc82040, L_0xc687e0, C4<0>, C4<0>; +L_0xc82120 .delay (50000,50000,50000) L_0xc82120/d; +L_0xc82210/d .functor NOT 1, L_0xc81f00, C4<0>, C4<0>, C4<0>; +L_0xc82210 .delay (50000,50000,50000) L_0xc82210/d; +L_0xc822b0/d .functor AND 1, L_0xc82210, L_0xc82120, C4<1>, C4<1>; +L_0xc822b0 .delay (50000,50000,50000) L_0xc822b0/d; +L_0xc82400/d .functor AND 1, L_0xc82990, L_0xc82ac0, C4<1>, C4<1>; +L_0xc82400 .delay (50000,50000,50000) L_0xc82400/d; +L_0xc82620/d .functor AND 1, L_0xc82400, L_0xc687e0, C4<1>, C4<1>; +L_0xc82620 .delay (50000,50000,50000) L_0xc82620/d; +L_0xc82790/d .functor OR 1, L_0xc822b0, L_0xc82620, C4<0>, C4<0>; +L_0xc82790 .delay (50000,50000,50000) L_0xc82790/d; +v0xc30380_0 .net "a", 0 0, L_0xc82990; 1 drivers +v0xc30440_0 .net "ab", 0 0, L_0xc816c0; 1 drivers +v0xc304e0_0 .net "acarryin", 0 0, L_0xc81be0; 1 drivers +v0xc30580_0 .net "andall", 0 0, L_0xc82620; 1 drivers +v0xc30600_0 .net "andsingleintermediate", 0 0, L_0xc82400; 1 drivers +v0xc306a0_0 .net "andsumintermediate", 0 0, L_0xc822b0; 1 drivers +v0xc30740_0 .net "b", 0 0, L_0xc82ac0; 1 drivers +v0xc307e0_0 .net "bcarryin", 0 0, L_0xc81cd0; 1 drivers +v0xc308d0_0 .alias "carryin", 0 0, v0xc33af0_0; +v0xc30970_0 .alias "carryout", 0 0, v0xc50850_0; +v0xc309f0_0 .net "invcarryout", 0 0, L_0xc82210; 1 drivers +v0xc30a90_0 .net "orall", 0 0, L_0xc82120; 1 drivers +v0xc30b30_0 .net "orpairintermediate", 0 0, L_0xc81dc0; 1 drivers +v0xc30bd0_0 .net "orsingleintermediate", 0 0, L_0xc82040; 1 drivers +v0xc30cf0_0 .net "sum", 0 0, L_0xc82790; 1 drivers +S_0xc2c6d0 .scope module, "adder6" "FullAdder4bit" 4 244, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc87b80/d .functor AND 1, L_0xc882c0, L_0xc88360, C4<1>, C4<1>; +L_0xc87b80 .delay (50000,50000,50000) L_0xc87b80/d; +L_0xc88400/d .functor NOR 1, L_0xc884a0, L_0xc88540, C4<0>, C4<0>; +L_0xc88400 .delay (50000,50000,50000) L_0xc88400/d; +L_0xc88670/d .functor AND 1, L_0xc88760, L_0xc88800, C4<1>, C4<1>; +L_0xc88670 .delay (50000,50000,50000) L_0xc88670/d; +L_0xc885e0/d .functor NOR 1, L_0xc88a20, L_0xc88bd0, C4<0>, C4<0>; +L_0xc885e0 .delay (50000,50000,50000) L_0xc885e0/d; +L_0xc888f0/d .functor OR 1, L_0xc87b80, L_0xc88400, C4<0>, C4<0>; +L_0xc888f0 .delay (50000,50000,50000) L_0xc888f0/d; +L_0xc88e10/d .functor NOR 1, L_0xc88670, L_0xc885e0, C4<0>, C4<0>; +L_0xc88e10 .delay (50000,50000,50000) L_0xc88e10/d; +L_0xc88f50/d .functor AND 1, L_0xc888f0, L_0xc88e10, C4<1>, C4<1>; +L_0xc88f50 .delay (50000,50000,50000) L_0xc88f50/d; +v0xc2f280_0 .net *"_s25", 0 0, L_0xc882c0; 1 drivers +v0xc2f340_0 .net *"_s27", 0 0, L_0xc88360; 1 drivers +v0xc2f3e0_0 .net *"_s29", 0 0, L_0xc884a0; 1 drivers +v0xc2f480_0 .net *"_s31", 0 0, L_0xc88540; 1 drivers +v0xc2f500_0 .net *"_s33", 0 0, L_0xc88760; 1 drivers +v0xc2f5a0_0 .net *"_s35", 0 0, L_0xc88800; 1 drivers +v0xc2f640_0 .net *"_s37", 0 0, L_0xc88a20; 1 drivers +v0xc2f6e0_0 .net *"_s39", 0 0, L_0xc88bd0; 1 drivers +v0xc2f780_0 .net "a", 3 0, L_0xc89290; 1 drivers +v0xc2f820_0 .net "aandb", 0 0, L_0xc87b80; 1 drivers +v0xc2f8c0_0 .net "abandnoror", 0 0, L_0xc888f0; 1 drivers +v0xc2f960_0 .net "anorb", 0 0, L_0xc88400; 1 drivers +v0xc2fa00_0 .net "b", 3 0, L_0xc83c40; 1 drivers +v0xc2faa0_0 .net "bandsum", 0 0, L_0xc88670; 1 drivers +v0xc2fbc0_0 .net "bnorsum", 0 0, L_0xc885e0; 1 drivers +v0xc2fc60_0 .net "bsumandnornor", 0 0, L_0xc88e10; 1 drivers +v0xc2fb20_0 .alias "carryin", 0 0, v0xc50850_0; +v0xc2fd90_0 .alias "carryout", 0 0, v0xc504c0_0; +v0xc2fce0_0 .net "carryout1", 0 0, L_0xc84230; 1 drivers +v0xc2feb0_0 .net "carryout2", 0 0, L_0xc851a0; 1 drivers +v0xc2ffe0_0 .net "carryout3", 0 0, L_0xc86340; 1 drivers +v0xc30060_0 .alias "overflow", 0 0, v0xc4d580_0; +v0xc2ff30_0 .net8 "sum", 3 0, RS_0x7fb7ca184e48; 4 drivers +L_0xc84bd0 .part/pv L_0xc84b10, 0, 1, 4; +L_0xc84c90 .part L_0xc89290, 0, 1; +L_0xc84d30 .part L_0xc83c40, 0, 1; +L_0xc85c60 .part/pv L_0xc85b50, 1, 1, 4; +L_0xc85d50 .part L_0xc89290, 1, 1; +L_0xc85e40 .part L_0xc83c40, 1, 1; +L_0xc86e00 .part/pv L_0xc86cf0, 2, 1, 4; +L_0xc86ea0 .part L_0xc89290, 2, 1; +L_0xc86f90 .part L_0xc83c40, 2, 1; +L_0xc87e80 .part/pv L_0xc87d70, 3, 1, 4; +L_0xc87fb0 .part L_0xc89290, 3, 1; +L_0xc880e0 .part L_0xc83c40, 3, 1; +L_0xc882c0 .part L_0xc89290, 3, 1; +L_0xc88360 .part L_0xc83c40, 3, 1; +L_0xc884a0 .part L_0xc89290, 3, 1; +L_0xc88540 .part L_0xc83c40, 3, 1; +L_0xc88760 .part L_0xc83c40, 3, 1; +L_0xc88800 .part RS_0x7fb7ca184e48, 3, 1; +L_0xc88a20 .part L_0xc83c40, 3, 1; +L_0xc88bd0 .part RS_0x7fb7ca184e48, 3, 1; +S_0xc2e7f0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc2c6d0; + .timescale -9 -12; +L_0xc7eb70/d .functor AND 1, L_0xc84c90, L_0xc84d30, C4<1>, C4<1>; +L_0xc7eb70 .delay (50000,50000,50000) L_0xc7eb70/d; +L_0xc7ec10/d .functor AND 1, L_0xc84c90, L_0xc81f00, C4<1>, C4<1>; +L_0xc7ec10 .delay (50000,50000,50000) L_0xc7ec10/d; +L_0xc83f40/d .functor AND 1, L_0xc84d30, L_0xc81f00, C4<1>, C4<1>; +L_0xc83f40 .delay (50000,50000,50000) L_0xc83f40/d; +L_0xc840d0/d .functor OR 1, L_0xc7eb70, L_0xc7ec10, C4<0>, C4<0>; +L_0xc840d0 .delay (50000,50000,50000) L_0xc840d0/d; +L_0xc84230/d .functor OR 1, L_0xc840d0, L_0xc83f40, C4<0>, C4<0>; +L_0xc84230 .delay (50000,50000,50000) L_0xc84230/d; +L_0xc84390/d .functor OR 1, L_0xc84c90, L_0xc84d30, C4<0>, C4<0>; +L_0xc84390 .delay (50000,50000,50000) L_0xc84390/d; +L_0xc84490/d .functor OR 1, L_0xc84390, L_0xc81f00, C4<0>, C4<0>; +L_0xc84490 .delay (50000,50000,50000) L_0xc84490/d; +L_0xc845a0/d .functor NOT 1, L_0xc84230, C4<0>, C4<0>, C4<0>; +L_0xc845a0 .delay (50000,50000,50000) L_0xc845a0/d; +L_0xc846f0/d .functor AND 1, L_0xc845a0, L_0xc84490, C4<1>, C4<1>; +L_0xc846f0 .delay (50000,50000,50000) L_0xc846f0/d; +L_0xc84810/d .functor AND 1, L_0xc84c90, L_0xc84d30, C4<1>, C4<1>; +L_0xc84810 .delay (50000,50000,50000) L_0xc84810/d; +L_0xc84a50/d .functor AND 1, L_0xc84810, L_0xc81f00, C4<1>, C4<1>; +L_0xc84a50 .delay (50000,50000,50000) L_0xc84a50/d; +L_0xc84b10/d .functor OR 1, L_0xc846f0, L_0xc84a50, C4<0>, C4<0>; +L_0xc84b10 .delay (50000,50000,50000) L_0xc84b10/d; +v0xc2e8e0_0 .net "a", 0 0, L_0xc84c90; 1 drivers +v0xc2e9a0_0 .net "ab", 0 0, L_0xc7eb70; 1 drivers +v0xc2ea40_0 .net "acarryin", 0 0, L_0xc7ec10; 1 drivers +v0xc2eae0_0 .net "andall", 0 0, L_0xc84a50; 1 drivers +v0xc2eb60_0 .net "andsingleintermediate", 0 0, L_0xc84810; 1 drivers +v0xc2ec00_0 .net "andsumintermediate", 0 0, L_0xc846f0; 1 drivers +v0xc2eca0_0 .net "b", 0 0, L_0xc84d30; 1 drivers +v0xc2ed40_0 .net "bcarryin", 0 0, L_0xc83f40; 1 drivers +v0xc2ede0_0 .alias "carryin", 0 0, v0xc50850_0; +v0xc2ee80_0 .alias "carryout", 0 0, v0xc2fce0_0; +v0xc2ef00_0 .net "invcarryout", 0 0, L_0xc845a0; 1 drivers +v0xc2ef80_0 .net "orall", 0 0, L_0xc84490; 1 drivers +v0xc2f020_0 .net "orpairintermediate", 0 0, L_0xc840d0; 1 drivers +v0xc2f0c0_0 .net "orsingleintermediate", 0 0, L_0xc84390; 1 drivers +v0xc2f1e0_0 .net "sum", 0 0, L_0xc84b10; 1 drivers +S_0xc2dd60 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc2c6d0; + .timescale -9 -12; +L_0xc849f0/d .functor AND 1, L_0xc85d50, L_0xc85e40, C4<1>, C4<1>; +L_0xc849f0 .delay (50000,50000,50000) L_0xc849f0/d; +L_0xc84e60/d .functor AND 1, L_0xc85d50, L_0xc84230, C4<1>, C4<1>; +L_0xc84e60 .delay (50000,50000,50000) L_0xc84e60/d; +L_0xc84f50/d .functor AND 1, L_0xc85e40, L_0xc84230, C4<1>, C4<1>; +L_0xc84f50 .delay (50000,50000,50000) L_0xc84f50/d; +L_0xc85040/d .functor OR 1, L_0xc849f0, L_0xc84e60, C4<0>, C4<0>; +L_0xc85040 .delay (50000,50000,50000) L_0xc85040/d; +L_0xc851a0/d .functor OR 1, L_0xc85040, L_0xc84f50, C4<0>, C4<0>; +L_0xc851a0 .delay (50000,50000,50000) L_0xc851a0/d; +L_0xc85300/d .functor OR 1, L_0xc85d50, L_0xc85e40, C4<0>, C4<0>; +L_0xc85300 .delay (50000,50000,50000) L_0xc85300/d; +L_0xc85400/d .functor OR 1, L_0xc85300, L_0xc84230, C4<0>, C4<0>; +L_0xc85400 .delay (50000,50000,50000) L_0xc85400/d; +L_0xc85510/d .functor NOT 1, L_0xc851a0, C4<0>, C4<0>, C4<0>; +L_0xc85510 .delay (50000,50000,50000) L_0xc85510/d; +L_0xc85660/d .functor AND 1, L_0xc85510, L_0xc85400, C4<1>, C4<1>; +L_0xc85660 .delay (50000,50000,50000) L_0xc85660/d; +L_0xc85780/d .functor AND 1, L_0xc85d50, L_0xc85e40, C4<1>, C4<1>; +L_0xc85780 .delay (50000,50000,50000) L_0xc85780/d; +L_0xc859c0/d .functor AND 1, L_0xc85780, L_0xc84230, C4<1>, C4<1>; +L_0xc859c0 .delay (50000,50000,50000) L_0xc859c0/d; +L_0xc85b50/d .functor OR 1, L_0xc85660, L_0xc859c0, C4<0>, C4<0>; +L_0xc85b50 .delay (50000,50000,50000) L_0xc85b50/d; +v0xc2de50_0 .net "a", 0 0, L_0xc85d50; 1 drivers +v0xc2df10_0 .net "ab", 0 0, L_0xc849f0; 1 drivers +v0xc2dfb0_0 .net "acarryin", 0 0, L_0xc84e60; 1 drivers +v0xc2e050_0 .net "andall", 0 0, L_0xc859c0; 1 drivers +v0xc2e0d0_0 .net "andsingleintermediate", 0 0, L_0xc85780; 1 drivers +v0xc2e170_0 .net "andsumintermediate", 0 0, L_0xc85660; 1 drivers +v0xc2e210_0 .net "b", 0 0, L_0xc85e40; 1 drivers +v0xc2e2b0_0 .net "bcarryin", 0 0, L_0xc84f50; 1 drivers +v0xc2e350_0 .alias "carryin", 0 0, v0xc2fce0_0; +v0xc2e3f0_0 .alias "carryout", 0 0, v0xc2feb0_0; +v0xc2e470_0 .net "invcarryout", 0 0, L_0xc85510; 1 drivers +v0xc2e4f0_0 .net "orall", 0 0, L_0xc85400; 1 drivers +v0xc2e590_0 .net "orpairintermediate", 0 0, L_0xc85040; 1 drivers +v0xc2e630_0 .net "orsingleintermediate", 0 0, L_0xc85300; 1 drivers +v0xc2e750_0 .net "sum", 0 0, L_0xc85b50; 1 drivers +S_0xc2d280 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc2c6d0; + .timescale -9 -12; +L_0xc85960/d .functor AND 1, L_0xc86ea0, L_0xc86f90, C4<1>, C4<1>; +L_0xc85960 .delay (50000,50000,50000) L_0xc85960/d; +L_0xc86000/d .functor AND 1, L_0xc86ea0, L_0xc851a0, C4<1>, C4<1>; +L_0xc86000 .delay (50000,50000,50000) L_0xc86000/d; +L_0xc860f0/d .functor AND 1, L_0xc86f90, L_0xc851a0, C4<1>, C4<1>; +L_0xc860f0 .delay (50000,50000,50000) L_0xc860f0/d; +L_0xc861e0/d .functor OR 1, L_0xc85960, L_0xc86000, C4<0>, C4<0>; +L_0xc861e0 .delay (50000,50000,50000) L_0xc861e0/d; +L_0xc86340/d .functor OR 1, L_0xc861e0, L_0xc860f0, C4<0>, C4<0>; +L_0xc86340 .delay (50000,50000,50000) L_0xc86340/d; +L_0xc864a0/d .functor OR 1, L_0xc86ea0, L_0xc86f90, C4<0>, C4<0>; +L_0xc864a0 .delay (50000,50000,50000) L_0xc864a0/d; +L_0xc865a0/d .functor OR 1, L_0xc864a0, L_0xc851a0, C4<0>, C4<0>; +L_0xc865a0 .delay (50000,50000,50000) L_0xc865a0/d; +L_0xc866b0/d .functor NOT 1, L_0xc86340, C4<0>, C4<0>, C4<0>; +L_0xc866b0 .delay (50000,50000,50000) L_0xc866b0/d; +L_0xc86800/d .functor AND 1, L_0xc866b0, L_0xc865a0, C4<1>, C4<1>; +L_0xc86800 .delay (50000,50000,50000) L_0xc86800/d; +L_0xc86920/d .functor AND 1, L_0xc86ea0, L_0xc86f90, C4<1>, C4<1>; +L_0xc86920 .delay (50000,50000,50000) L_0xc86920/d; +L_0xc86b60/d .functor AND 1, L_0xc86920, L_0xc851a0, C4<1>, C4<1>; +L_0xc86b60 .delay (50000,50000,50000) L_0xc86b60/d; +L_0xc86cf0/d .functor OR 1, L_0xc86800, L_0xc86b60, C4<0>, C4<0>; +L_0xc86cf0 .delay (50000,50000,50000) L_0xc86cf0/d; +v0xc2d370_0 .net "a", 0 0, L_0xc86ea0; 1 drivers +v0xc2d430_0 .net "ab", 0 0, L_0xc85960; 1 drivers +v0xc2d4d0_0 .net "acarryin", 0 0, L_0xc86000; 1 drivers +v0xc2d570_0 .net "andall", 0 0, L_0xc86b60; 1 drivers +v0xc2d5f0_0 .net "andsingleintermediate", 0 0, L_0xc86920; 1 drivers +v0xc2d690_0 .net "andsumintermediate", 0 0, L_0xc86800; 1 drivers +v0xc2d730_0 .net "b", 0 0, L_0xc86f90; 1 drivers +v0xc2d7d0_0 .net "bcarryin", 0 0, L_0xc860f0; 1 drivers +v0xc2d8c0_0 .alias "carryin", 0 0, v0xc2feb0_0; +v0xc2d960_0 .alias "carryout", 0 0, v0xc2ffe0_0; +v0xc2d9e0_0 .net "invcarryout", 0 0, L_0xc866b0; 1 drivers +v0xc2da60_0 .net "orall", 0 0, L_0xc865a0; 1 drivers +v0xc2db00_0 .net "orpairintermediate", 0 0, L_0xc861e0; 1 drivers +v0xc2dba0_0 .net "orsingleintermediate", 0 0, L_0xc864a0; 1 drivers +v0xc2dcc0_0 .net "sum", 0 0, L_0xc86cf0; 1 drivers +S_0xc2c7c0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc2c6d0; + .timescale -9 -12; +L_0xc86b00/d .functor AND 1, L_0xc87fb0, L_0xc880e0, C4<1>, C4<1>; +L_0xc86b00 .delay (50000,50000,50000) L_0xc86b00/d; +L_0xc87080/d .functor AND 1, L_0xc87fb0, L_0xc86340, C4<1>, C4<1>; +L_0xc87080 .delay (50000,50000,50000) L_0xc87080/d; +L_0xc87190/d .functor AND 1, L_0xc880e0, L_0xc86340, C4<1>, C4<1>; +L_0xc87190 .delay (50000,50000,50000) L_0xc87190/d; +L_0xc872a0/d .functor OR 1, L_0xc86b00, L_0xc87080, C4<0>, C4<0>; +L_0xc872a0 .delay (50000,50000,50000) L_0xc872a0/d; +L_0xc87400/d .functor OR 1, L_0xc872a0, L_0xc87190, C4<0>, C4<0>; +L_0xc87400 .delay (50000,50000,50000) L_0xc87400/d; +L_0xc87560/d .functor OR 1, L_0xc87fb0, L_0xc880e0, C4<0>, C4<0>; +L_0xc87560 .delay (50000,50000,50000) L_0xc87560/d; +L_0xc87660/d .functor OR 1, L_0xc87560, L_0xc86340, C4<0>, C4<0>; +L_0xc87660 .delay (50000,50000,50000) L_0xc87660/d; +L_0xc87770/d .functor NOT 1, L_0xc87400, C4<0>, C4<0>, C4<0>; +L_0xc87770 .delay (50000,50000,50000) L_0xc87770/d; +L_0xc87830/d .functor AND 1, L_0xc87770, L_0xc87660, C4<1>, C4<1>; +L_0xc87830 .delay (50000,50000,50000) L_0xc87830/d; +L_0xc879a0/d .functor AND 1, L_0xc87fb0, L_0xc880e0, C4<1>, C4<1>; +L_0xc879a0 .delay (50000,50000,50000) L_0xc879a0/d; +L_0xc87be0/d .functor AND 1, L_0xc879a0, L_0xc86340, C4<1>, C4<1>; +L_0xc87be0 .delay (50000,50000,50000) L_0xc87be0/d; +L_0xc87d70/d .functor OR 1, L_0xc87830, L_0xc87be0, C4<0>, C4<0>; +L_0xc87d70 .delay (50000,50000,50000) L_0xc87d70/d; +v0xc2c8b0_0 .net "a", 0 0, L_0xc87fb0; 1 drivers +v0xc2c930_0 .net "ab", 0 0, L_0xc86b00; 1 drivers +v0xc2c9d0_0 .net "acarryin", 0 0, L_0xc87080; 1 drivers +v0xc2ca70_0 .net "andall", 0 0, L_0xc87be0; 1 drivers +v0xc2caf0_0 .net "andsingleintermediate", 0 0, L_0xc879a0; 1 drivers +v0xc2cb90_0 .net "andsumintermediate", 0 0, L_0xc87830; 1 drivers +v0xc2cc30_0 .net "b", 0 0, L_0xc880e0; 1 drivers +v0xc2ccd0_0 .net "bcarryin", 0 0, L_0xc87190; 1 drivers +v0xc2cdc0_0 .alias "carryin", 0 0, v0xc2ffe0_0; +v0xc2ce60_0 .alias "carryout", 0 0, v0xc504c0_0; +v0xc2cee0_0 .net "invcarryout", 0 0, L_0xc87770; 1 drivers +v0xc2cf80_0 .net "orall", 0 0, L_0xc87660; 1 drivers +v0xc2d020_0 .net "orpairintermediate", 0 0, L_0xc872a0; 1 drivers +v0xc2d0c0_0 .net "orsingleintermediate", 0 0, L_0xc87560; 1 drivers +v0xc2d1e0_0 .net "sum", 0 0, L_0xc87d70; 1 drivers +S_0xc28af0 .scope module, "adder7" "FullAdder4bit" 4 245, 2 47, S_0xc28a00; + .timescale -9 -12; +L_0xc8d180/d .functor AND 1, L_0xc8d8c0, L_0xc8d960, C4<1>, C4<1>; +L_0xc8d180 .delay (50000,50000,50000) L_0xc8d180/d; +L_0xc8da00/d .functor NOR 1, L_0xc8daa0, L_0xc8db40, C4<0>, C4<0>; +L_0xc8da00 .delay (50000,50000,50000) L_0xc8da00/d; +L_0xc8dc70/d .functor AND 1, L_0xc8dd60, L_0xc8de00, C4<1>, C4<1>; +L_0xc8dc70 .delay (50000,50000,50000) L_0xc8dc70/d; +L_0xc8dbe0/d .functor NOR 1, L_0xc8e020, L_0xc8e1d0, C4<0>, C4<0>; +L_0xc8dbe0 .delay (50000,50000,50000) L_0xc8dbe0/d; +L_0xc8def0/d .functor OR 1, L_0xc8d180, L_0xc8da00, C4<0>, C4<0>; +L_0xc8def0 .delay (50000,50000,50000) L_0xc8def0/d; +L_0xc8e410/d .functor NOR 1, L_0xc8dc70, L_0xc8dbe0, C4<0>, C4<0>; +L_0xc8e410 .delay (50000,50000,50000) L_0xc8e410/d; +L_0xc8e550/d .functor AND 1, L_0xc8def0, L_0xc8e410, C4<1>, C4<1>; +L_0xc8e550 .delay (50000,50000,50000) L_0xc8e550/d; +v0xc2b730_0 .net *"_s25", 0 0, L_0xc8d8c0; 1 drivers +v0xc2b7f0_0 .net *"_s27", 0 0, L_0xc8d960; 1 drivers +v0xc2b890_0 .net *"_s29", 0 0, L_0xc8daa0; 1 drivers +v0xc2b930_0 .net *"_s31", 0 0, L_0xc8db40; 1 drivers +v0xc2b9e0_0 .net *"_s33", 0 0, L_0xc8dd60; 1 drivers +v0xc2ba80_0 .net *"_s35", 0 0, L_0xc8de00; 1 drivers +v0xc2bb20_0 .net *"_s37", 0 0, L_0xc8e020; 1 drivers +v0xc2bbc0_0 .net *"_s39", 0 0, L_0xc8e1d0; 1 drivers +v0xc2bc60_0 .net "a", 3 0, L_0xc89440; 1 drivers +v0xc2bd00_0 .net "aandb", 0 0, L_0xc8d180; 1 drivers +v0xc2bda0_0 .net "abandnoror", 0 0, L_0xc8def0; 1 drivers +v0xc2be40_0 .net "anorb", 0 0, L_0xc8da00; 1 drivers +v0xc2bee0_0 .net "b", 3 0, L_0xc894e0; 1 drivers +v0xc2bf80_0 .net "bandsum", 0 0, L_0xc8dc70; 1 drivers +v0xc2c0a0_0 .net "bnorsum", 0 0, L_0xc8dbe0; 1 drivers +v0xc2c140_0 .net "bsumandnornor", 0 0, L_0xc8e410; 1 drivers +v0xc2c000_0 .alias "carryin", 0 0, v0xc504c0_0; +v0xc2c270_0 .alias "carryout", 0 0, v0xc51030_0; +v0xc2c390_0 .net "carryout1", 0 0, L_0xc89860; 1 drivers +v0xc2c410_0 .net "carryout2", 0 0, L_0xc8a790; 1 drivers +v0xc2c2f0_0 .net "carryout3", 0 0, L_0xc8b920; 1 drivers +v0xc2c590_0 .alias "overflow", 0 0, v0xc510b0_0; +v0xc2c490_0 .net8 "sum", 3 0, RS_0x7fb7ca184068; 4 drivers +L_0xc8a1e0 .part/pv L_0xc8a120, 0, 1, 4; +L_0xc8a280 .part L_0xc89440, 0, 1; +L_0xc8a320 .part L_0xc894e0, 0, 1; +L_0xc8b240 .part/pv L_0xc8b130, 1, 1, 4; +L_0xc8b330 .part L_0xc89440, 1, 1; +L_0xc8b420 .part L_0xc894e0, 1, 1; +L_0xc8c3e0 .part/pv L_0xc8c2d0, 2, 1, 4; +L_0xc8c480 .part L_0xc89440, 2, 1; +L_0xc8c570 .part L_0xc894e0, 2, 1; +L_0xc8d480 .part/pv L_0xc8d370, 3, 1, 4; +L_0xc8d5b0 .part L_0xc89440, 3, 1; +L_0xc8d6e0 .part L_0xc894e0, 3, 1; +L_0xc8d8c0 .part L_0xc89440, 3, 1; +L_0xc8d960 .part L_0xc894e0, 3, 1; +L_0xc8daa0 .part L_0xc89440, 3, 1; +L_0xc8db40 .part L_0xc894e0, 3, 1; +L_0xc8dd60 .part L_0xc894e0, 3, 1; +L_0xc8de00 .part RS_0x7fb7ca184068, 3, 1; +L_0xc8e020 .part L_0xc894e0, 3, 1; +L_0xc8e1d0 .part RS_0x7fb7ca184068, 3, 1; +S_0xc2ac70 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc28af0; + .timescale -9 -12; +L_0xc83ce0/d .functor AND 1, L_0xc8a280, L_0xc8a320, C4<1>, C4<1>; +L_0xc83ce0 .delay (50000,50000,50000) L_0xc83ce0/d; +L_0xc83d80/d .functor AND 1, L_0xc8a280, L_0xc87400, C4<1>, C4<1>; +L_0xc83d80 .delay (50000,50000,50000) L_0xc83d80/d; +L_0xc83e70/d .functor AND 1, L_0xc8a320, L_0xc87400, C4<1>, C4<1>; +L_0xc83e70 .delay (50000,50000,50000) L_0xc83e70/d; +L_0xc74090/d .functor OR 1, L_0xc83ce0, L_0xc83d80, C4<0>, C4<0>; +L_0xc74090 .delay (50000,50000,50000) L_0xc74090/d; +L_0xc89860/d .functor OR 1, L_0xc74090, L_0xc83e70, C4<0>, C4<0>; +L_0xc89860 .delay (50000,50000,50000) L_0xc89860/d; +L_0xc899a0/d .functor OR 1, L_0xc8a280, L_0xc8a320, C4<0>, C4<0>; +L_0xc899a0 .delay (50000,50000,50000) L_0xc899a0/d; +L_0xc89aa0/d .functor OR 1, L_0xc899a0, L_0xc87400, C4<0>, C4<0>; +L_0xc89aa0 .delay (50000,50000,50000) L_0xc89aa0/d; +L_0xc89bb0/d .functor NOT 1, L_0xc89860, C4<0>, C4<0>, C4<0>; +L_0xc89bb0 .delay (50000,50000,50000) L_0xc89bb0/d; +L_0xc89d00/d .functor AND 1, L_0xc89bb0, L_0xc89aa0, C4<1>, C4<1>; +L_0xc89d00 .delay (50000,50000,50000) L_0xc89d00/d; +L_0xc89e20/d .functor AND 1, L_0xc8a280, L_0xc8a320, C4<1>, C4<1>; +L_0xc89e20 .delay (50000,50000,50000) L_0xc89e20/d; +L_0xc8a060/d .functor AND 1, L_0xc89e20, L_0xc87400, C4<1>, C4<1>; +L_0xc8a060 .delay (50000,50000,50000) L_0xc8a060/d; +L_0xc8a120/d .functor OR 1, L_0xc89d00, L_0xc8a060, C4<0>, C4<0>; +L_0xc8a120 .delay (50000,50000,50000) L_0xc8a120/d; +v0xc2ad60_0 .net "a", 0 0, L_0xc8a280; 1 drivers +v0xc2ae20_0 .net "ab", 0 0, L_0xc83ce0; 1 drivers +v0xc2aec0_0 .net "acarryin", 0 0, L_0xc83d80; 1 drivers +v0xc2af60_0 .net "andall", 0 0, L_0xc8a060; 1 drivers +v0xc2b010_0 .net "andsingleintermediate", 0 0, L_0xc89e20; 1 drivers +v0xc2b0b0_0 .net "andsumintermediate", 0 0, L_0xc89d00; 1 drivers +v0xc2b150_0 .net "b", 0 0, L_0xc8a320; 1 drivers +v0xc2b1f0_0 .net "bcarryin", 0 0, L_0xc83e70; 1 drivers +v0xc2b290_0 .alias "carryin", 0 0, v0xc504c0_0; +v0xc2b330_0 .alias "carryout", 0 0, v0xc2c390_0; +v0xc2b3b0_0 .net "invcarryout", 0 0, L_0xc89bb0; 1 drivers +v0xc2b430_0 .net "orall", 0 0, L_0xc89aa0; 1 drivers +v0xc2b4d0_0 .net "orpairintermediate", 0 0, L_0xc74090; 1 drivers +v0xc2b570_0 .net "orsingleintermediate", 0 0, L_0xc899a0; 1 drivers +v0xc2b690_0 .net "sum", 0 0, L_0xc8a120; 1 drivers +S_0xc2a1b0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc28af0; + .timescale -9 -12; +L_0xc8a000/d .functor AND 1, L_0xc8b330, L_0xc8b420, C4<1>, C4<1>; +L_0xc8a000 .delay (50000,50000,50000) L_0xc8a000/d; +L_0xc8a450/d .functor AND 1, L_0xc8b330, L_0xc89860, C4<1>, C4<1>; +L_0xc8a450 .delay (50000,50000,50000) L_0xc8a450/d; +L_0xc8a540/d .functor AND 1, L_0xc8b420, L_0xc89860, C4<1>, C4<1>; +L_0xc8a540 .delay (50000,50000,50000) L_0xc8a540/d; +L_0xc8a630/d .functor OR 1, L_0xc8a000, L_0xc8a450, C4<0>, C4<0>; +L_0xc8a630 .delay (50000,50000,50000) L_0xc8a630/d; +L_0xc8a790/d .functor OR 1, L_0xc8a630, L_0xc8a540, C4<0>, C4<0>; +L_0xc8a790 .delay (50000,50000,50000) L_0xc8a790/d; +L_0xc8a8f0/d .functor OR 1, L_0xc8b330, L_0xc8b420, C4<0>, C4<0>; +L_0xc8a8f0 .delay (50000,50000,50000) L_0xc8a8f0/d; +L_0xc8a9f0/d .functor OR 1, L_0xc8a8f0, L_0xc89860, C4<0>, C4<0>; +L_0xc8a9f0 .delay (50000,50000,50000) L_0xc8a9f0/d; +L_0xc8ab00/d .functor NOT 1, L_0xc8a790, C4<0>, C4<0>, C4<0>; +L_0xc8ab00 .delay (50000,50000,50000) L_0xc8ab00/d; +L_0xc2c1f0/d .functor AND 1, L_0xc8ab00, L_0xc8a9f0, C4<1>, C4<1>; +L_0xc2c1f0 .delay (50000,50000,50000) L_0xc2c1f0/d; +L_0xc8ad60/d .functor AND 1, L_0xc8b330, L_0xc8b420, C4<1>, C4<1>; +L_0xc8ad60 .delay (50000,50000,50000) L_0xc8ad60/d; +L_0xc8afa0/d .functor AND 1, L_0xc8ad60, L_0xc89860, C4<1>, C4<1>; +L_0xc8afa0 .delay (50000,50000,50000) L_0xc8afa0/d; +L_0xc8b130/d .functor OR 1, L_0xc2c1f0, L_0xc8afa0, C4<0>, C4<0>; +L_0xc8b130 .delay (50000,50000,50000) L_0xc8b130/d; +v0xc2a2a0_0 .net "a", 0 0, L_0xc8b330; 1 drivers +v0xc2a360_0 .net "ab", 0 0, L_0xc8a000; 1 drivers +v0xc2a400_0 .net "acarryin", 0 0, L_0xc8a450; 1 drivers +v0xc2a4a0_0 .net "andall", 0 0, L_0xc8afa0; 1 drivers +v0xc2a550_0 .net "andsingleintermediate", 0 0, L_0xc8ad60; 1 drivers +v0xc2a5f0_0 .net "andsumintermediate", 0 0, L_0xc2c1f0; 1 drivers +v0xc2a690_0 .net "b", 0 0, L_0xc8b420; 1 drivers +v0xc2a730_0 .net "bcarryin", 0 0, L_0xc8a540; 1 drivers +v0xc2a7d0_0 .alias "carryin", 0 0, v0xc2c390_0; +v0xc2a870_0 .alias "carryout", 0 0, v0xc2c410_0; +v0xc2a8f0_0 .net "invcarryout", 0 0, L_0xc8ab00; 1 drivers +v0xc2a970_0 .net "orall", 0 0, L_0xc8a9f0; 1 drivers +v0xc2aa10_0 .net "orpairintermediate", 0 0, L_0xc8a630; 1 drivers +v0xc2aab0_0 .net "orsingleintermediate", 0 0, L_0xc8a8f0; 1 drivers +v0xc2abd0_0 .net "sum", 0 0, L_0xc8b130; 1 drivers +S_0xc29720 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc28af0; + .timescale -9 -12; +L_0xc8af40/d .functor AND 1, L_0xc8c480, L_0xc8c570, C4<1>, C4<1>; +L_0xc8af40 .delay (50000,50000,50000) L_0xc8af40/d; +L_0xc8b5e0/d .functor AND 1, L_0xc8c480, L_0xc8a790, C4<1>, C4<1>; +L_0xc8b5e0 .delay (50000,50000,50000) L_0xc8b5e0/d; +L_0xc8b6d0/d .functor AND 1, L_0xc8c570, L_0xc8a790, C4<1>, C4<1>; +L_0xc8b6d0 .delay (50000,50000,50000) L_0xc8b6d0/d; +L_0xc8b7c0/d .functor OR 1, L_0xc8af40, L_0xc8b5e0, C4<0>, C4<0>; +L_0xc8b7c0 .delay (50000,50000,50000) L_0xc8b7c0/d; +L_0xc8b920/d .functor OR 1, L_0xc8b7c0, L_0xc8b6d0, C4<0>, C4<0>; +L_0xc8b920 .delay (50000,50000,50000) L_0xc8b920/d; +L_0xc8ba80/d .functor OR 1, L_0xc8c480, L_0xc8c570, C4<0>, C4<0>; +L_0xc8ba80 .delay (50000,50000,50000) L_0xc8ba80/d; +L_0xc8bb80/d .functor OR 1, L_0xc8ba80, L_0xc8a790, C4<0>, C4<0>; +L_0xc8bb80 .delay (50000,50000,50000) L_0xc8bb80/d; +L_0xc8bc90/d .functor NOT 1, L_0xc8b920, C4<0>, C4<0>, C4<0>; +L_0xc8bc90 .delay (50000,50000,50000) L_0xc8bc90/d; +L_0xc8bde0/d .functor AND 1, L_0xc8bc90, L_0xc8bb80, C4<1>, C4<1>; +L_0xc8bde0 .delay (50000,50000,50000) L_0xc8bde0/d; +L_0xc8bf00/d .functor AND 1, L_0xc8c480, L_0xc8c570, C4<1>, C4<1>; +L_0xc8bf00 .delay (50000,50000,50000) L_0xc8bf00/d; +L_0xc8c140/d .functor AND 1, L_0xc8bf00, L_0xc8a790, C4<1>, C4<1>; +L_0xc8c140 .delay (50000,50000,50000) L_0xc8c140/d; +L_0xc8c2d0/d .functor OR 1, L_0xc8bde0, L_0xc8c140, C4<0>, C4<0>; +L_0xc8c2d0 .delay (50000,50000,50000) L_0xc8c2d0/d; +v0xc29810_0 .net "a", 0 0, L_0xc8c480; 1 drivers +v0xc298d0_0 .net "ab", 0 0, L_0xc8af40; 1 drivers +v0xc29970_0 .net "acarryin", 0 0, L_0xc8b5e0; 1 drivers +v0xc29a10_0 .net "andall", 0 0, L_0xc8c140; 1 drivers +v0xc29a90_0 .net "andsingleintermediate", 0 0, L_0xc8bf00; 1 drivers +v0xc29b30_0 .net "andsumintermediate", 0 0, L_0xc8bde0; 1 drivers +v0xc29bd0_0 .net "b", 0 0, L_0xc8c570; 1 drivers +v0xc29c70_0 .net "bcarryin", 0 0, L_0xc8b6d0; 1 drivers +v0xc29d10_0 .alias "carryin", 0 0, v0xc2c410_0; +v0xc29db0_0 .alias "carryout", 0 0, v0xc2c2f0_0; +v0xc29e30_0 .net "invcarryout", 0 0, L_0xc8bc90; 1 drivers +v0xc29eb0_0 .net "orall", 0 0, L_0xc8bb80; 1 drivers +v0xc29f50_0 .net "orpairintermediate", 0 0, L_0xc8b7c0; 1 drivers +v0xc29ff0_0 .net "orsingleintermediate", 0 0, L_0xc8ba80; 1 drivers +v0xc2a110_0 .net "sum", 0 0, L_0xc8c2d0; 1 drivers +S_0xc28be0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc28af0; + .timescale -9 -12; +L_0xc8c0e0/d .functor AND 1, L_0xc8d5b0, L_0xc8d6e0, C4<1>, C4<1>; +L_0xc8c0e0 .delay (50000,50000,50000) L_0xc8c0e0/d; +L_0xc8c660/d .functor AND 1, L_0xc8d5b0, L_0xc8b920, C4<1>, C4<1>; +L_0xc8c660 .delay (50000,50000,50000) L_0xc8c660/d; +L_0xc8c750/d .functor AND 1, L_0xc8d6e0, L_0xc8b920, C4<1>, C4<1>; +L_0xc8c750 .delay (50000,50000,50000) L_0xc8c750/d; +L_0xc8c860/d .functor OR 1, L_0xc8c0e0, L_0xc8c660, C4<0>, C4<0>; +L_0xc8c860 .delay (50000,50000,50000) L_0xc8c860/d; +L_0xc8c9c0/d .functor OR 1, L_0xc8c860, L_0xc8c750, C4<0>, C4<0>; +L_0xc8c9c0 .delay (50000,50000,50000) L_0xc8c9c0/d; +L_0xc8cb60/d .functor OR 1, L_0xc8d5b0, L_0xc8d6e0, C4<0>, C4<0>; +L_0xc8cb60 .delay (50000,50000,50000) L_0xc8cb60/d; +L_0xc8cc60/d .functor OR 1, L_0xc8cb60, L_0xc8b920, C4<0>, C4<0>; +L_0xc8cc60 .delay (50000,50000,50000) L_0xc8cc60/d; +L_0xc8cd70/d .functor NOT 1, L_0xc8c9c0, C4<0>, C4<0>, C4<0>; +L_0xc8cd70 .delay (50000,50000,50000) L_0xc8cd70/d; +L_0xc8ce30/d .functor AND 1, L_0xc8cd70, L_0xc8cc60, C4<1>, C4<1>; +L_0xc8ce30 .delay (50000,50000,50000) L_0xc8ce30/d; +L_0xc8cfa0/d .functor AND 1, L_0xc8d5b0, L_0xc8d6e0, C4<1>, C4<1>; +L_0xc8cfa0 .delay (50000,50000,50000) L_0xc8cfa0/d; +L_0xc8d1e0/d .functor AND 1, L_0xc8cfa0, L_0xc8b920, C4<1>, C4<1>; +L_0xc8d1e0 .delay (50000,50000,50000) L_0xc8d1e0/d; +L_0xc8d370/d .functor OR 1, L_0xc8ce30, L_0xc8d1e0, C4<0>, C4<0>; +L_0xc8d370 .delay (50000,50000,50000) L_0xc8d370/d; +v0xc28cd0_0 .net "a", 0 0, L_0xc8d5b0; 1 drivers +v0xc28d90_0 .net "ab", 0 0, L_0xc8c0e0; 1 drivers +v0xc28e30_0 .net "acarryin", 0 0, L_0xc8c660; 1 drivers +v0xc28ed0_0 .net "andall", 0 0, L_0xc8d1e0; 1 drivers +v0xc28f50_0 .net "andsingleintermediate", 0 0, L_0xc8cfa0; 1 drivers +v0xc28ff0_0 .net "andsumintermediate", 0 0, L_0xc8ce30; 1 drivers +v0xc29090_0 .net "b", 0 0, L_0xc8d6e0; 1 drivers +v0xc29130_0 .net "bcarryin", 0 0, L_0xc8c750; 1 drivers +v0xc291d0_0 .alias "carryin", 0 0, v0xc2c2f0_0; +v0xc29270_0 .alias "carryout", 0 0, v0xc51030_0; +v0xc29310_0 .net "invcarryout", 0 0, L_0xc8cd70; 1 drivers +v0xc293b0_0 .net "orall", 0 0, L_0xc8cc60; 1 drivers +v0xc294c0_0 .net "orpairintermediate", 0 0, L_0xc8c860; 1 drivers +v0xc29560_0 .net "orsingleintermediate", 0 0, L_0xc8cb60; 1 drivers +v0xc29680_0 .net "sum", 0 0, L_0xc8d370; 1 drivers + .scope S_0xbe1330; +T_0 ; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 18 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 21 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 24 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 27 "$display", "%b %b %b | %b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 30 "$display", "%b %b %b | %b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 1, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 33 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %ix/load 0, 31, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50a30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50a30_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50f30_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50f30_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xc50fb0_0, 0, 1; + %delay 5000000, 0; + %vpi_call 3 36 "$display", "%b %b %b | %b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 5; + "N/A"; + ""; + "./adder.v"; + "adder_subtracter.t.v"; + "./adder_subtracter.v"; diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v index aa36b4a..6e955df 100644 --- a/adder_subtracter.t.v +++ b/adder_subtracter.t.v @@ -9,9 +9,8 @@ module test32bitAdder(); reg[2:0] carryin; wire[31:0] ans; wire carryout, overflow; - wire[31:0] finalB; - adder_subtracter adder0(ans[31:0], carryout, overflow, finalB[31:0], a[31:0], b[31:0], carryin[2:0]); + adder_subtracter adder0(ans[31:0], carryout, overflow, a[31:0], b[31:0], carryin[2:0]); initial begin diff --git a/adder_subtracter.v b/adder_subtracter.v index 9604257..44aaf35 100644 --- a/adder_subtracter.v +++ b/adder_subtracter.v @@ -73,104 +73,104 @@ module mux wire in130addr; wire in131addr; - not inv(invaddr, address); - and and00(in00addr, in0[0], invaddr); - and and01(in01addr, in0[1], invaddr); - and and02(in02addr, in0[2], invaddr); - and and03(in03addr, in0[3], invaddr); - and and04(in04addr, in0[4], invaddr); - and and05(in05addr, in0[5], invaddr); - and and06(in06addr, in0[6], invaddr); - and and07(in07addr, in0[7], invaddr); - and and08(in08addr, in0[8], invaddr); - and and09(in09addr, in0[9], invaddr); - and and010(in010addr, in0[10], invaddr); - and and011(in011addr, in0[11], invaddr); - and and012(in012addr, in0[12], invaddr); - and and013(in013addr, in0[13], invaddr); - and and014(in014addr, in0[14], invaddr); - and and015(in015addr, in0[15], invaddr); - and and016(in016addr, in0[16], invaddr); - and and017(in017addr, in0[17], invaddr); - and and018(in018addr, in0[18], invaddr); - and and019(in019addr, in0[19], invaddr); - and and020(in020addr, in0[20], invaddr); - and and021(in021addr, in0[21], invaddr); - and and022(in022addr, in0[22], invaddr); - and and023(in023addr, in0[23], invaddr); - and and024(in024addr, in0[24], invaddr); - and and025(in025addr, in0[25], invaddr); - and and026(in026addr, in0[26], invaddr); - and and027(in027addr, in0[27], invaddr); - and and028(in028addr, in0[28], invaddr); - and and029(in029addr, in0[29], invaddr); - and and030(in030addr, in0[30], invaddr); - and and031(in031addr, in0[31], invaddr); - and and10(in10addr, in1[0], address); - and and11(in11addr, in1[1], address); - and and12(in12addr, in1[2], address); - and and13(in13addr, in1[3], address); - and and14(in14addr, in1[4], address); - and and15(in15addr, in1[5], address); - and and16(in16addr, in1[6], address); - and and17(in17addr, in1[7], address); - and and18(in18addr, in1[8], address); - and and19(in19addr, in1[9], address); - and and110(in110addr, in1[10], address); - and and111(in111addr, in1[11], address); - and and112(in112addr, in1[12], address); - and and113(in113addr, in1[13], address); - and and114(in114addr, in1[14], address); - and and115(in115addr, in1[15], address); - and and116(in116addr, in1[16], address); - and and117(in117addr, in1[17], address); - and and118(in118addr, in1[18], address); - and and119(in119addr, in1[19], address); - and and120(in120addr, in1[20], address); - and and121(in121addr, in1[21], address); - and and122(in122addr, in1[22], address); - and and123(in123addr, in1[23], address); - and and124(in124addr, in1[24], address); - and and125(in125addr, in1[25], address); - and and126(in126addr, in1[26], address); - and and127(in127addr, in1[27], address); - and and128(in128addr, in1[28], address); - and and129(in129addr, in1[29], address); - and and130(in130addr, in1[30], address); - and and131(in131addr, in1[31], address); + not #10 inv(invaddr, address); + and #10 and00(in00addr, in0[0], invaddr); + and #10 and01(in01addr, in0[1], invaddr); + and #10 and02(in02addr, in0[2], invaddr); + and #10 and03(in03addr, in0[3], invaddr); + and #10 and04(in04addr, in0[4], invaddr); + and #10 and05(in05addr, in0[5], invaddr); + and #10 and06(in06addr, in0[6], invaddr); + and #10 and07(in07addr, in0[7], invaddr); + and #10 and08(in08addr, in0[8], invaddr); + and #10 and09(in09addr, in0[9], invaddr); + and #10 and010(in010addr, in0[10], invaddr); + and #10 and011(in011addr, in0[11], invaddr); + and #10 and012(in012addr, in0[12], invaddr); + and #10 and013(in013addr, in0[13], invaddr); + and #10 and014(in014addr, in0[14], invaddr); + and #10 and015(in015addr, in0[15], invaddr); + and #10 and016(in016addr, in0[16], invaddr); + and #10 and017(in017addr, in0[17], invaddr); + and #10 and018(in018addr, in0[18], invaddr); + and #10 and019(in019addr, in0[19], invaddr); + and #10 and020(in020addr, in0[20], invaddr); + and #10 and021(in021addr, in0[21], invaddr); + and #10 and022(in022addr, in0[22], invaddr); + and #10 and023(in023addr, in0[23], invaddr); + and #10 and024(in024addr, in0[24], invaddr); + and #10 and025(in025addr, in0[25], invaddr); + and #10 and026(in026addr, in0[26], invaddr); + and #10 and027(in027addr, in0[27], invaddr); + and #10 and028(in028addr, in0[28], invaddr); + and #10 and029(in029addr, in0[29], invaddr); + and #10 and030(in030addr, in0[30], invaddr); + and #10 and031(in031addr, in0[31], invaddr); + and #10 and10(in10addr, in1[0], address); + and #10 and11(in11addr, in1[1], address); + and #10 and12(in12addr, in1[2], address); + and #10 and13(in13addr, in1[3], address); + and #10 and14(in14addr, in1[4], address); + and #10 and15(in15addr, in1[5], address); + and #10 and16(in16addr, in1[6], address); + and #10 and17(in17addr, in1[7], address); + and #10 and18(in18addr, in1[8], address); + and #10 and19(in19addr, in1[9], address); + and #10 and110(in110addr, in1[10], address); + and #10 and111(in111addr, in1[11], address); + and #10 and112(in112addr, in1[12], address); + and #10 and113(in113addr, in1[13], address); + and #10 and114(in114addr, in1[14], address); + and #10 and115(in115addr, in1[15], address); + and #10 and116(in116addr, in1[16], address); + and #10 and117(in117addr, in1[17], address); + and #10 and118(in118addr, in1[18], address); + and #10 and119(in119addr, in1[19], address); + and #10 and120(in120addr, in1[20], address); + and #10 and121(in121addr, in1[21], address); + and #10 and122(in122addr, in1[22], address); + and #10 and123(in123addr, in1[23], address); + and #10 and124(in124addr, in1[24], address); + and #10 and125(in125addr, in1[25], address); + and #10 and126(in126addr, in1[26], address); + and #10 and127(in127addr, in1[27], address); + and #10 and128(in128addr, in1[28], address); + and #10 and129(in129addr, in1[29], address); + and #10 and130(in130addr, in1[30], address); + and #10 and131(in131addr, in1[31], address); - or or0(out[0], in00addr, in10addr); - or or1(out[1], in01addr, in11addr); - or or2(out[2], in02addr, in12addr); - or or3(out[3], in03addr, in13addr); - or or4(out[4], in04addr, in14addr); - or or5(out[5], in05addr, in15addr); - or or6(out[6], in06addr, in16addr); - or or7(out[7], in07addr, in17addr); - or or8(out[8], in08addr, in18addr); - or or9(out[9], in09addr, in19addr); - or or10(out[10], in010addr, in110addr); - or or11(out[11], in011addr, in111addr); - or or12(out[12], in012addr, in112addr); - or or13(out[13], in013addr, in113addr); - or or14(out[14], in014addr, in114addr); - or or15(out[15], in015addr, in115addr); - or or16(out[16], in016addr, in116addr); - or or17(out[17], in017addr, in117addr); - or or18(out[18], in018addr, in118addr); - or or19(out[19], in019addr, in119addr); - or or20(out[20], in020addr, in120addr); - or or21(out[21], in021addr, in121addr); - or or22(out[22], in022addr, in122addr); - or or23(out[23], in023addr, in123addr); - or or24(out[24], in024addr, in124addr); - or or25(out[25], in025addr, in125addr); - or or26(out[26], in026addr, in126addr); - or or27(out[27], in027addr, in127addr); - or or28(out[28], in028addr, in128addr); - or or29(out[29], in029addr, in129addr); - or or30(out[30], in030addr, in130addr); - or or31(out[31], in031addr, in131addr); + or #10 or0(out[0], in00addr, in10addr); + or #10 or1(out[1], in01addr, in11addr); + or #10 or2(out[2], in02addr, in12addr); + or #10 or3(out[3], in03addr, in13addr); + or #10 or4(out[4], in04addr, in14addr); + or #10 or5(out[5], in05addr, in15addr); + or #10 or6(out[6], in06addr, in16addr); + or #10 or7(out[7], in07addr, in17addr); + or #10 or8(out[8], in08addr, in18addr); + or #10 or9(out[9], in09addr, in19addr); + or #10 or10(out[10], in010addr, in110addr); + or #10 or11(out[11], in011addr, in111addr); + or #10 or12(out[12], in012addr, in112addr); + or #10 or13(out[13], in013addr, in113addr); + or #10 or14(out[14], in014addr, in114addr); + or #10 or15(out[15], in015addr, in115addr); + or #10 or16(out[16], in016addr, in116addr); + or #10 or17(out[17], in017addr, in117addr); + or #10 or18(out[18], in018addr, in118addr); + or #10 or19(out[19], in019addr, in119addr); + or #10 or20(out[20], in020addr, in120addr); + or #10 or21(out[21], in021addr, in121addr); + or #10 or22(out[22], in022addr, in122addr); + or #10 or23(out[23], in023addr, in123addr); + or #10 or24(out[24], in024addr, in124addr); + or #10 or25(out[25], in025addr, in125addr); + or #10 or26(out[26], in026addr, in126addr); + or #10 or27(out[27], in027addr, in127addr); + or #10 or28(out[28], in028addr, in128addr); + or #10 or29(out[29], in029addr, in129addr); + or #10 or30(out[30], in030addr, in130addr); + or #10 or31(out[31], in031addr, in131addr); endmodule module adder_subtracter @@ -178,13 +178,12 @@ module adder_subtracter output[31:0] ans, output carryout, output overflow, - output[31:0] finalB, input[31:0] opA, input[31:0] opB, input[2:0] command ); wire[31:0] invertedB; //wire to invert b in the event of a subtraction - // wire[31:0] finalB; + wire[31:0] finalB; wire normalB; //added b wire cout0; wire cout1; @@ -201,38 +200,38 @@ module adder_subtracter wire _5; wire _6; - not invertB0(invertedB[0], opB[0]); - not invertB1(invertedB[1], opB[1]); - not invertB2(invertedB[2], opB[2]); - not invertB3(invertedB[3], opB[3]); - not invertB4(invertedB[4], opB[4]); - not invertB5(invertedB[5], opB[5]); - not invertB6(invertedB[6], opB[6]); - not invertB7(invertedB[7], opB[7]); - not invertB8(invertedB[8], opB[8]); - not invertB9(invertedB[9], opB[9]); - not invertB10(invertedB[10], opB[10]); - not invertB11(invertedB[11], opB[11]); - not invertB12(invertedB[12], opB[12]); - not invertB13(invertedB[13], opB[13]); - not invertB14(invertedB[14], opB[14]); - not invertB15(invertedB[15], opB[15]); - not invertB16(invertedB[16], opB[16]); - not invertB17(invertedB[17], opB[17]); - not invertB18(invertedB[18], opB[18]); - not invertB19(invertedB[19], opB[19]); - not invertB20(invertedB[20], opB[20]); - not invertB21(invertedB[21], opB[21]); - not invertB22(invertedB[22], opB[22]); - not invertB23(invertedB[23], opB[23]); - not invertB24(invertedB[24], opB[24]); - not invertB25(invertedB[25], opB[25]); - not invertB26(invertedB[26], opB[26]); - not invertB27(invertedB[27], opB[27]); - not invertB28(invertedB[28], opB[28]); - not invertB29(invertedB[29], opB[29]); - not invertB30(invertedB[30], opB[30]); - not invertB31(invertedB[31], opB[31]); + not #10 invertB0(invertedB[0], opB[0]); + not #10 invertB1(invertedB[1], opB[1]); + not #10 invertB2(invertedB[2], opB[2]); + not #10 invertB3(invertedB[3], opB[3]); + not #10 invertB4(invertedB[4], opB[4]); + not #10 invertB5(invertedB[5], opB[5]); + not #10 invertB6(invertedB[6], opB[6]); + not #10 invertB7(invertedB[7], opB[7]); + not #10 invertB8(invertedB[8], opB[8]); + not #10 invertB9(invertedB[9], opB[9]); + not #10 invertB10(invertedB[10], opB[10]); + not #10 invertB11(invertedB[11], opB[11]); + not #10 invertB12(invertedB[12], opB[12]); + not #10 invertB13(invertedB[13], opB[13]); + not #10 invertB14(invertedB[14], opB[14]); + not #10 invertB15(invertedB[15], opB[15]); + not #10 invertB16(invertedB[16], opB[16]); + not #10 invertB17(invertedB[17], opB[17]); + not #10 invertB18(invertedB[18], opB[18]); + not #10 invertB19(invertedB[19], opB[19]); + not #10 invertB20(invertedB[20], opB[20]); + not #10 invertB21(invertedB[21], opB[21]); + not #10 invertB22(invertedB[22], opB[22]); + not #10 invertB23(invertedB[23], opB[23]); + not #10 invertB24(invertedB[24], opB[24]); + not #10 invertB25(invertedB[25], opB[25]); + not #10 invertB26(invertedB[26], opB[26]); + not #10 invertB27(invertedB[27], opB[27]); + not #10 invertB28(invertedB[28], opB[28]); + not #10 invertB29(invertedB[29], opB[29]); + not #10 invertB30(invertedB[30], opB[30]); + not #10 invertB31(invertedB[31], opB[31]); mux addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); diff --git a/and_32bit b/and_32bit new file mode 100755 index 0000000..5cf0c8c --- /dev/null +++ b/and_32bit @@ -0,0 +1,1073 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0xe5a730 .scope module, "test32bitand" "test32bitand" 2 4; + .timescale -9 -12; +v0xf1b620_0 .var "a", 31 0; +RS_0x7fece1d8c278/0/0 .resolv tri, L_0xf1b800, L_0xf1bba0, L_0xf1bf50, L_0xf1c420; +RS_0x7fece1d8c278/0/4 .resolv tri, L_0xf1c710, L_0xf1caa0, L_0xf1cf80, L_0xf1d4f0; +RS_0x7fece1d8c278/0/8 .resolv tri, L_0xf1d590, L_0xf1dbc0, L_0xf1dc60, L_0xf1e320; +RS_0x7fece1d8c278/0/12 .resolv tri, L_0xf1e3c0, L_0xf1ea60, L_0xf1eb00, L_0xf1d3e0; +RS_0x7fece1d8c278/0/16 .resolv tri, L_0xf1f6e0, L_0xf1f9f0, L_0xf1fb80, L_0xf20140; +RS_0x7fece1d8c278/0/20 .resolv tri, L_0xf20300, L_0xf20850, L_0xf209f0, L_0xf20f80; +RS_0x7fece1d8c278/0/24 .resolv tri, L_0xf21150, L_0xf21720, L_0xf21920, L_0xf21ea0; +RS_0x7fece1d8c278/0/28 .resolv tri, L_0xf220d0, L_0xf228b0, L_0xf22c30, L_0xf22a40; +RS_0x7fece1d8c278/1/0 .resolv tri, RS_0x7fece1d8c278/0/0, RS_0x7fece1d8c278/0/4, RS_0x7fece1d8c278/0/8, RS_0x7fece1d8c278/0/12; +RS_0x7fece1d8c278/1/4 .resolv tri, RS_0x7fece1d8c278/0/16, RS_0x7fece1d8c278/0/20, RS_0x7fece1d8c278/0/24, RS_0x7fece1d8c278/0/28; +RS_0x7fece1d8c278 .resolv tri, RS_0x7fece1d8c278/1/0, RS_0x7fece1d8c278/1/4, C4, C4; +v0xf1b6a0_0 .net8 "ans", 31 0, RS_0x7fece1d8c278; 32 drivers +v0xf1b750_0 .var "b", 31 0; +S_0xe5a820 .scope module, "and32" "and_32bit" 2 9, 3 1, S_0xe5a730; + .timescale -9 -12; +L_0xf179e0/d .functor AND 1, L_0xf1b970, L_0xf1ba60, C4<1>, C4<1>; +L_0xf179e0 .delay (10000,10000,10000) L_0xf179e0/d; +L_0xf1bc40/d .functor AND 1, L_0xf1bd80, L_0xf1be20, C4<1>, C4<1>; +L_0xf1bc40 .delay (10000,10000,10000) L_0xf1bc40/d; +L_0xf1c080/d .functor AND 1, L_0xf1c170, L_0xf1c2a0, C4<1>, C4<1>; +L_0xf1c080 .delay (10000,10000,10000) L_0xf1c080/d; +L_0xf1c520/d .functor AND 1, L_0xf1c580, L_0xf1c620, C4<1>, C4<1>; +L_0xf1c520 .delay (10000,10000,10000) L_0xf1c520/d; +L_0xf1c4c0/d .functor AND 1, L_0xf1c890, L_0xf1c9b0, C4<1>, C4<1>; +L_0xf1c4c0 .delay (10000,10000,10000) L_0xf1c4c0/d; +L_0xf1cbd0/d .functor AND 1, L_0xf1cd50, L_0xf1cdf0, C4<1>, C4<1>; +L_0xf1cbd0 .delay (10000,10000,10000) L_0xf1cbd0/d; +L_0xf1cb40/d .functor AND 1, L_0xf1d180, L_0xf1cee0, C4<1>, C4<1>; +L_0xf1cb40 .delay (10000,10000,10000) L_0xf1cb40/d; +L_0xf1c390/d .functor AND 1, L_0xf1d6a0, L_0xf1d790, C4<1>, C4<1>; +L_0xf1c390 .delay (10000,10000,10000) L_0xf1c390/d; +L_0xf1d380/d .functor AND 1, L_0xf1d9f0, L_0xf1d880, C4<1>, C4<1>; +L_0xf1d380 .delay (10000,10000,10000) L_0xf1d380/d; +L_0xf1da90/d .functor AND 1, L_0xf1de40, L_0xf1dee0, C4<1>, C4<1>; +L_0xf1da90 .delay (10000,10000,10000) L_0xf1da90/d; +L_0xf1e080/d .functor AND 1, L_0xf1e170, L_0xf1df80, C4<1>, C4<1>; +L_0xf1e080 .delay (10000,10000,10000) L_0xf1e080/d; +L_0xf1e210/d .functor AND 1, L_0xf1e530, L_0xf1e5d0, C4<1>, C4<1>; +L_0xf1e210 .delay (10000,10000,10000) L_0xf1e210/d; +L_0xf1dde0/d .functor AND 1, L_0xf1e880, L_0xf1e6c0, C4<1>, C4<1>; +L_0xf1dde0 .delay (10000,10000,10000) L_0xf1dde0/d; +L_0xf1e920/d .functor AND 1, L_0xf1ec50, L_0xf1ecf0, C4<1>, C4<1>; +L_0xf1e920 .delay (10000,10000,10000) L_0xf1e920/d; +L_0xf1eba0/d .functor AND 1, L_0xf1d070, L_0xf1d220, C4<1>, C4<1>; +L_0xf1eba0 .delay (10000,10000,10000) L_0xf1eba0/d; +L_0xf1d480/d .functor AND 1, L_0xf1f3f0, L_0xf1f860, C4<1>, C4<1>; +L_0xf1d480 .delay (10000,10000,10000) L_0xf1d480/d; +L_0xf1f780/d .functor AND 1, L_0xf1fae0, L_0xf1f900, C4<1>, C4<1>; +L_0xf1f780 .delay (10000,10000,10000) L_0xf1f780/d; +L_0xf1fd30/d .functor AND 1, L_0xf1ff10, L_0xf1ffb0, C4<1>, C4<1>; +L_0xf1fd30 .delay (10000,10000,10000) L_0xf1fd30/d; +L_0xf1fc20/d .functor AND 1, L_0xf20210, L_0xf20050, C4<1>, C4<1>; +L_0xf1fc20 .delay (10000,10000,10000) L_0xf1fc20/d; +L_0xf1fcd0/d .functor AND 1, L_0xf1fe70, L_0xf20670, C4<1>, C4<1>; +L_0xf1fcd0 .delay (10000,10000,10000) L_0xf1fcd0/d; +L_0xf203a0/d .functor AND 1, L_0xf20950, L_0xf20760, C4<1>, C4<1>; +L_0xf203a0 .delay (10000,10000,10000) L_0xf203a0/d; +L_0xf208f0/d .functor AND 1, L_0xf205c0, L_0xf20da0, C4<1>, C4<1>; +L_0xf208f0 .delay (10000,10000,10000) L_0xf208f0/d; +L_0xf20a90/d .functor AND 1, L_0xf210b0, L_0xf20e90, C4<1>, C4<1>; +L_0xf20a90 .delay (10000,10000,10000) L_0xf20a90/d; +L_0xf21020/d .functor AND 1, L_0xf20ce0, L_0xf21540, C4<1>, C4<1>; +L_0xf21020 .delay (10000,10000,10000) L_0xf21020/d; +L_0xf211f0/d .functor AND 1, L_0xf21880, L_0xf21630, C4<1>, C4<1>; +L_0xf211f0 .delay (10000,10000,10000) L_0xf211f0/d; +L_0xf21330/d .functor AND 1, L_0xf21470, L_0xf21cc0, C4<1>, C4<1>; +L_0xf21330 .delay (10000,10000,10000) L_0xf21330/d; +L_0xf219c0/d .functor AND 1, L_0xf22030, L_0xf21db0, C4<1>, C4<1>; +L_0xf219c0 .delay (10000,10000,10000) L_0xf219c0/d; +L_0xf21f40/d .functor AND 1, L_0xf21be0, L_0xf22460, C4<1>, C4<1>; +L_0xf21f40 .delay (10000,10000,10000) L_0xf21f40/d; +L_0xf22170/d .functor AND 1, L_0xf22270, L_0xf22810, C4<1>, C4<1>; +L_0xf22170 .delay (10000,10000,10000) L_0xf22170/d; +L_0xf22550/d .functor AND 1, L_0xf22750, L_0xf22370, C4<1>, C4<1>; +L_0xf22550 .delay (10000,10000,10000) L_0xf22550/d; +L_0xf17b80/d .functor AND 1, L_0xf1ef60, L_0xf22950, C4<1>, C4<1>; +L_0xf17b80 .delay (10000,10000,10000) L_0xf17b80/d; +L_0xf1f300/d .functor AND 1, L_0xf1f5e0, L_0xf22650, C4<1>, C4<1>; +L_0xf1f300 .delay (10000,10000,10000) L_0xf1f300/d; +v0xe99360_0 .net *"_s0", 0 0, L_0xf179e0; 1 drivers +v0xf173c0_0 .net *"_s101", 0 0, L_0xf1f900; 1 drivers +v0xf17460_0 .net *"_s102", 0 0, L_0xf1fd30; 1 drivers +v0xf17500_0 .net *"_s105", 0 0, L_0xf1ff10; 1 drivers +v0xf175b0_0 .net *"_s107", 0 0, L_0xf1ffb0; 1 drivers +v0xf17650_0 .net *"_s108", 0 0, L_0xf1fc20; 1 drivers +v0xf17730_0 .net *"_s11", 0 0, L_0xf1be20; 1 drivers +v0xf177d0_0 .net *"_s111", 0 0, L_0xf20210; 1 drivers +v0xf178c0_0 .net *"_s113", 0 0, L_0xf20050; 1 drivers +v0xf17960_0 .net *"_s114", 0 0, L_0xf1fcd0; 1 drivers +v0xf17a60_0 .net *"_s117", 0 0, L_0xf1fe70; 1 drivers +v0xf17b00_0 .net *"_s119", 0 0, L_0xf20670; 1 drivers +v0xf17c10_0 .net *"_s12", 0 0, L_0xf1c080; 1 drivers +v0xf17cb0_0 .net *"_s120", 0 0, L_0xf203a0; 1 drivers +v0xf17dd0_0 .net *"_s123", 0 0, L_0xf20950; 1 drivers +v0xf17e70_0 .net *"_s125", 0 0, L_0xf20760; 1 drivers +v0xf17d30_0 .net *"_s126", 0 0, L_0xf208f0; 1 drivers +v0xf17fc0_0 .net *"_s129", 0 0, L_0xf205c0; 1 drivers +v0xf180e0_0 .net *"_s131", 0 0, L_0xf20da0; 1 drivers +v0xf18160_0 .net *"_s132", 0 0, L_0xf20a90; 1 drivers +v0xf18040_0 .net *"_s135", 0 0, L_0xf210b0; 1 drivers +v0xf18290_0 .net *"_s137", 0 0, L_0xf20e90; 1 drivers +v0xf181e0_0 .net *"_s138", 0 0, L_0xf21020; 1 drivers +v0xf183d0_0 .net *"_s141", 0 0, L_0xf20ce0; 1 drivers +v0xf18330_0 .net *"_s143", 0 0, L_0xf21540; 1 drivers +v0xf18520_0 .net *"_s144", 0 0, L_0xf211f0; 1 drivers +v0xf18470_0 .net *"_s147", 0 0, L_0xf21880; 1 drivers +v0xf18680_0 .net *"_s149", 0 0, L_0xf21630; 1 drivers +v0xf185c0_0 .net *"_s15", 0 0, L_0xf1c170; 1 drivers +v0xf187f0_0 .net *"_s150", 0 0, L_0xf21330; 1 drivers +v0xf18700_0 .net *"_s153", 0 0, L_0xf21470; 1 drivers +v0xf18970_0 .net *"_s155", 0 0, L_0xf21cc0; 1 drivers +v0xf18870_0 .net *"_s156", 0 0, L_0xf219c0; 1 drivers +v0xf18b00_0 .net *"_s159", 0 0, L_0xf22030; 1 drivers +v0xf189f0_0 .net *"_s161", 0 0, L_0xf21db0; 1 drivers +v0xf18ca0_0 .net *"_s162", 0 0, L_0xf21f40; 1 drivers +v0xf18b80_0 .net *"_s165", 0 0, L_0xf21be0; 1 drivers +v0xf18c20_0 .net *"_s167", 0 0, L_0xf22460; 1 drivers +v0xf18e60_0 .net *"_s168", 0 0, L_0xf22170; 1 drivers +v0xf18ee0_0 .net *"_s17", 0 0, L_0xf1c2a0; 1 drivers +v0xf18d20_0 .net *"_s171", 0 0, L_0xf22270; 1 drivers +v0xf18dc0_0 .net *"_s173", 0 0, L_0xf22810; 1 drivers +v0xf190c0_0 .net *"_s174", 0 0, L_0xf22550; 1 drivers +v0xf19140_0 .net *"_s177", 0 0, L_0xf22750; 1 drivers +v0xf18f60_0 .net *"_s179", 0 0, L_0xf22370; 1 drivers +v0xf19000_0 .net *"_s18", 0 0, L_0xf1c520; 1 drivers +v0xf19340_0 .net *"_s180", 0 0, L_0xf17b80; 1 drivers +v0xf193c0_0 .net *"_s183", 0 0, L_0xf1ef60; 1 drivers +v0xf191e0_0 .net *"_s185", 0 0, L_0xf22950; 1 drivers +v0xf19280_0 .net *"_s186", 0 0, L_0xf1f300; 1 drivers +v0xf195e0_0 .net *"_s189", 0 0, L_0xf1f5e0; 1 drivers +v0xf19660_0 .net *"_s191", 0 0, L_0xf22650; 1 drivers +v0xf19460_0 .net *"_s21", 0 0, L_0xf1c580; 1 drivers +v0xf19500_0 .net *"_s23", 0 0, L_0xf1c620; 1 drivers +v0xf198a0_0 .net *"_s24", 0 0, L_0xf1c4c0; 1 drivers +v0xf19920_0 .net *"_s27", 0 0, L_0xf1c890; 1 drivers +v0xf196e0_0 .net *"_s29", 0 0, L_0xf1c9b0; 1 drivers +v0xf19780_0 .net *"_s3", 0 0, L_0xf1b970; 1 drivers +v0xf19820_0 .net *"_s30", 0 0, L_0xf1cbd0; 1 drivers +v0xf19ba0_0 .net *"_s33", 0 0, L_0xf1cd50; 1 drivers +v0xf199c0_0 .net *"_s35", 0 0, L_0xf1cdf0; 1 drivers +v0xf19a60_0 .net *"_s36", 0 0, L_0xf1cb40; 1 drivers +v0xf19b00_0 .net *"_s39", 0 0, L_0xf1d180; 1 drivers +v0xf19e40_0 .net *"_s41", 0 0, L_0xf1cee0; 1 drivers +v0xf19c40_0 .net *"_s42", 0 0, L_0xf1c390; 1 drivers +v0xf19ce0_0 .net *"_s45", 0 0, L_0xf1d6a0; 1 drivers +v0xf19d80_0 .net *"_s47", 0 0, L_0xf1d790; 1 drivers +v0xf1a0e0_0 .net *"_s48", 0 0, L_0xf1d380; 1 drivers +v0xf19ee0_0 .net *"_s5", 0 0, L_0xf1ba60; 1 drivers +v0xf19f80_0 .net *"_s51", 0 0, L_0xf1d9f0; 1 drivers +v0xf1a020_0 .net *"_s53", 0 0, L_0xf1d880; 1 drivers +v0xf1a3a0_0 .net *"_s54", 0 0, L_0xf1da90; 1 drivers +v0xf1a160_0 .net *"_s57", 0 0, L_0xf1de40; 1 drivers +v0xf1a200_0 .net *"_s59", 0 0, L_0xf1dee0; 1 drivers +v0xf1a2a0_0 .net *"_s6", 0 0, L_0xf1bc40; 1 drivers +v0xf1a680_0 .net *"_s60", 0 0, L_0xf1e080; 1 drivers +v0xf1a420_0 .net *"_s63", 0 0, L_0xf1e170; 1 drivers +v0xf1a4c0_0 .net *"_s65", 0 0, L_0xf1df80; 1 drivers +v0xf1a560_0 .net *"_s66", 0 0, L_0xf1e210; 1 drivers +v0xf1a600_0 .net *"_s69", 0 0, L_0xf1e530; 1 drivers +v0xf1a990_0 .net *"_s71", 0 0, L_0xf1e5d0; 1 drivers +v0xf1aa10_0 .net *"_s72", 0 0, L_0xf1dde0; 1 drivers +v0xf1a720_0 .net *"_s75", 0 0, L_0xf1e880; 1 drivers +v0xf1a7c0_0 .net *"_s77", 0 0, L_0xf1e6c0; 1 drivers +v0xf1a860_0 .net *"_s78", 0 0, L_0xf1e920; 1 drivers +v0xf1a900_0 .net *"_s81", 0 0, L_0xf1ec50; 1 drivers +v0xf1ad70_0 .net *"_s83", 0 0, L_0xf1ecf0; 1 drivers +v0xf1ae10_0 .net *"_s84", 0 0, L_0xf1eba0; 1 drivers +v0xf1aab0_0 .net *"_s87", 0 0, L_0xf1d070; 1 drivers +v0xf1ab50_0 .net *"_s89", 0 0, L_0xf1d220; 1 drivers +v0xf1abf0_0 .net *"_s9", 0 0, L_0xf1bd80; 1 drivers +v0xf1ac90_0 .net *"_s90", 0 0, L_0xf1d480; 1 drivers +v0xf1b180_0 .net *"_s93", 0 0, L_0xf1f3f0; 1 drivers +v0xf1b200_0 .net *"_s95", 0 0, L_0xf1f860; 1 drivers +v0xf1aeb0_0 .net *"_s96", 0 0, L_0xf1f780; 1 drivers +v0xf1af50_0 .net *"_s99", 0 0, L_0xf1fae0; 1 drivers +v0xf1aff0_0 .net "a", 31 0, v0xf1b620_0; 1 drivers +v0xf1b090_0 .net "b", 31 0, v0xf1b750_0; 1 drivers +v0xf1b5a0_0 .alias "out", 31 0, v0xf1b6a0_0; +L_0xf1b800 .part/pv L_0xf179e0, 0, 1, 32; +L_0xf1b970 .part v0xf1b620_0, 0, 1; +L_0xf1ba60 .part v0xf1b750_0, 0, 1; +L_0xf1bba0 .part/pv L_0xf1bc40, 1, 1, 32; +L_0xf1bd80 .part v0xf1b620_0, 1, 1; +L_0xf1be20 .part v0xf1b750_0, 1, 1; +L_0xf1bf50 .part/pv L_0xf1c080, 2, 1, 32; +L_0xf1c170 .part v0xf1b620_0, 2, 1; +L_0xf1c2a0 .part v0xf1b750_0, 2, 1; +L_0xf1c420 .part/pv L_0xf1c520, 3, 1, 32; +L_0xf1c580 .part v0xf1b620_0, 3, 1; +L_0xf1c620 .part v0xf1b750_0, 3, 1; +L_0xf1c710 .part/pv L_0xf1c4c0, 4, 1, 32; +L_0xf1c890 .part v0xf1b620_0, 4, 1; +L_0xf1c9b0 .part v0xf1b750_0, 4, 1; +L_0xf1caa0 .part/pv L_0xf1cbd0, 5, 1, 32; +L_0xf1cd50 .part v0xf1b620_0, 5, 1; +L_0xf1cdf0 .part v0xf1b750_0, 5, 1; +L_0xf1cf80 .part/pv L_0xf1cb40, 6, 1, 32; +L_0xf1d180 .part v0xf1b620_0, 6, 1; +L_0xf1cee0 .part v0xf1b750_0, 6, 1; +L_0xf1d4f0 .part/pv L_0xf1c390, 7, 1, 32; +L_0xf1d6a0 .part v0xf1b620_0, 7, 1; +L_0xf1d790 .part v0xf1b750_0, 7, 1; +L_0xf1d590 .part/pv L_0xf1d380, 8, 1, 32; +L_0xf1d9f0 .part v0xf1b620_0, 8, 1; +L_0xf1d880 .part v0xf1b750_0, 8, 1; +L_0xf1dbc0 .part/pv L_0xf1da90, 9, 1, 32; +L_0xf1de40 .part v0xf1b620_0, 9, 1; +L_0xf1dee0 .part v0xf1b750_0, 9, 1; +L_0xf1dc60 .part/pv L_0xf1e080, 10, 1, 32; +L_0xf1e170 .part v0xf1b620_0, 10, 1; +L_0xf1df80 .part v0xf1b750_0, 10, 1; +L_0xf1e320 .part/pv L_0xf1e210, 11, 1, 32; +L_0xf1e530 .part v0xf1b620_0, 11, 1; +L_0xf1e5d0 .part v0xf1b750_0, 11, 1; +L_0xf1e3c0 .part/pv L_0xf1dde0, 12, 1, 32; +L_0xf1e880 .part v0xf1b620_0, 12, 1; +L_0xf1e6c0 .part v0xf1b750_0, 12, 1; +L_0xf1ea60 .part/pv L_0xf1e920, 13, 1, 32; +L_0xf1ec50 .part v0xf1b620_0, 13, 1; +L_0xf1ecf0 .part v0xf1b750_0, 13, 1; +L_0xf1eb00 .part/pv L_0xf1eba0, 14, 1, 32; +L_0xf1d070 .part v0xf1b620_0, 14, 1; +L_0xf1d220 .part v0xf1b750_0, 14, 1; +L_0xf1d3e0 .part/pv L_0xf1d480, 15, 1, 32; +L_0xf1f3f0 .part v0xf1b620_0, 15, 1; +L_0xf1f860 .part v0xf1b750_0, 15, 1; +L_0xf1f6e0 .part/pv L_0xf1f780, 16, 1, 32; +L_0xf1fae0 .part v0xf1b620_0, 16, 1; +L_0xf1f900 .part v0xf1b750_0, 16, 1; +L_0xf1f9f0 .part/pv L_0xf1fd30, 17, 1, 32; +L_0xf1ff10 .part v0xf1b620_0, 17, 1; +L_0xf1ffb0 .part v0xf1b750_0, 17, 1; +L_0xf1fb80 .part/pv L_0xf1fc20, 18, 1, 32; +L_0xf20210 .part v0xf1b620_0, 18, 1; +L_0xf20050 .part v0xf1b750_0, 18, 1; +L_0xf20140 .part/pv L_0xf1fcd0, 19, 1, 32; +L_0xf1fe70 .part v0xf1b620_0, 19, 1; +L_0xf20670 .part v0xf1b750_0, 19, 1; +L_0xf20300 .part/pv L_0xf203a0, 20, 1, 32; +L_0xf20950 .part v0xf1b620_0, 20, 1; +L_0xf20760 .part v0xf1b750_0, 20, 1; +L_0xf20850 .part/pv L_0xf208f0, 21, 1, 32; +L_0xf205c0 .part v0xf1b620_0, 21, 1; +L_0xf20da0 .part v0xf1b750_0, 21, 1; +L_0xf209f0 .part/pv L_0xf20a90, 22, 1, 32; +L_0xf210b0 .part v0xf1b620_0, 22, 1; +L_0xf20e90 .part v0xf1b750_0, 22, 1; +L_0xf20f80 .part/pv L_0xf21020, 23, 1, 32; +L_0xf20ce0 .part v0xf1b620_0, 23, 1; +L_0xf21540 .part v0xf1b750_0, 23, 1; +L_0xf21150 .part/pv L_0xf211f0, 24, 1, 32; +L_0xf21880 .part v0xf1b620_0, 24, 1; +L_0xf21630 .part v0xf1b750_0, 24, 1; +L_0xf21720 .part/pv L_0xf21330, 25, 1, 32; +L_0xf21470 .part v0xf1b620_0, 25, 1; +L_0xf21cc0 .part v0xf1b750_0, 25, 1; +L_0xf21920 .part/pv L_0xf219c0, 26, 1, 32; +L_0xf22030 .part v0xf1b620_0, 26, 1; +L_0xf21db0 .part v0xf1b750_0, 26, 1; +L_0xf21ea0 .part/pv L_0xf21f40, 27, 1, 32; +L_0xf21be0 .part v0xf1b620_0, 27, 1; +L_0xf22460 .part v0xf1b750_0, 27, 1; +L_0xf220d0 .part/pv L_0xf22170, 28, 1, 32; +L_0xf22270 .part v0xf1b620_0, 28, 1; +L_0xf22810 .part v0xf1b750_0, 28, 1; +L_0xf228b0 .part/pv L_0xf22550, 29, 1, 32; +L_0xf22750 .part v0xf1b620_0, 29, 1; +L_0xf22370 .part v0xf1b750_0, 29, 1; +L_0xf22c30 .part/pv L_0xf17b80, 30, 1, 32; +L_0xf1ef60 .part v0xf1b620_0, 30, 1; +L_0xf22950 .part v0xf1b750_0, 30, 1; +L_0xf22a40 .part/pv L_0xf1f300, 31, 1, 32; +L_0xf1f5e0 .part v0xf1b620_0, 31, 1; +L_0xf22650 .part v0xf1b750_0, 31, 1; + .scope S_0xe5a730; +T_0 ; + %ix/load 0, 31, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b750_0, 0, 1; + %delay 5000000, 0; + %vpi_call 2 14 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b620_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 18 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b620_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 22 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 26 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xf1b620_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b620_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xf1b750_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 30 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xf1b620_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xf1b750_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xf1b750_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xf1b750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xf1b750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 34 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "and_32bit.t.v"; + "./and_32bit.v"; diff --git a/nand_32bit b/nand_32bit new file mode 100755 index 0000000..6f76a62 --- /dev/null +++ b/nand_32bit @@ -0,0 +1,1073 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1960730 .scope module, "test32bitnand" "test32bitnand" 2 4; + .timescale -9 -12; +v0x1a21620_0 .var "a", 31 0; +RS_0x7f074f768278/0/0 .resolv tri, L_0x1a21800, L_0x1a21ba0, L_0x1a21f50, L_0x1a22420; +RS_0x7f074f768278/0/4 .resolv tri, L_0x1a22710, L_0x1a22aa0, L_0x1a22f80, L_0x1a234f0; +RS_0x7f074f768278/0/8 .resolv tri, L_0x1a23590, L_0x1a23bc0, L_0x1a23c60, L_0x1a24320; +RS_0x7f074f768278/0/12 .resolv tri, L_0x1a243c0, L_0x1a24a60, L_0x1a24b00, L_0x1a233e0; +RS_0x7f074f768278/0/16 .resolv tri, L_0x1a256e0, L_0x1a259f0, L_0x1a25b80, L_0x1a26140; +RS_0x7f074f768278/0/20 .resolv tri, L_0x1a26300, L_0x1a26850, L_0x1a269f0, L_0x1a26f80; +RS_0x7f074f768278/0/24 .resolv tri, L_0x1a27150, L_0x1a27720, L_0x1a27920, L_0x1a27ea0; +RS_0x7f074f768278/0/28 .resolv tri, L_0x1a280d0, L_0x1a288b0, L_0x1a28c30, L_0x1a28a40; +RS_0x7f074f768278/1/0 .resolv tri, RS_0x7f074f768278/0/0, RS_0x7f074f768278/0/4, RS_0x7f074f768278/0/8, RS_0x7f074f768278/0/12; +RS_0x7f074f768278/1/4 .resolv tri, RS_0x7f074f768278/0/16, RS_0x7f074f768278/0/20, RS_0x7f074f768278/0/24, RS_0x7f074f768278/0/28; +RS_0x7f074f768278 .resolv tri, RS_0x7f074f768278/1/0, RS_0x7f074f768278/1/4, C4, C4; +v0x1a216a0_0 .net8 "ans", 31 0, RS_0x7f074f768278; 32 drivers +v0x1a21750_0 .var "b", 31 0; +S_0x1960820 .scope module, "nand32" "nand_32bit" 2 9, 3 1, S_0x1960730; + .timescale -9 -12; +L_0x1a1d9e0/d .functor NAND 1, L_0x1a21970, L_0x1a21a60, C4<1>, C4<1>; +L_0x1a1d9e0 .delay (10000,10000,10000) L_0x1a1d9e0/d; +L_0x1a21c40/d .functor NAND 1, L_0x1a21d80, L_0x1a21e20, C4<1>, C4<1>; +L_0x1a21c40 .delay (10000,10000,10000) L_0x1a21c40/d; +L_0x1a22080/d .functor NAND 1, L_0x1a22170, L_0x1a222a0, C4<1>, C4<1>; +L_0x1a22080 .delay (10000,10000,10000) L_0x1a22080/d; +L_0x1a22520/d .functor NAND 1, L_0x1a22580, L_0x1a22620, C4<1>, C4<1>; +L_0x1a22520 .delay (10000,10000,10000) L_0x1a22520/d; +L_0x1a224c0/d .functor NAND 1, L_0x1a22890, L_0x1a229b0, C4<1>, C4<1>; +L_0x1a224c0 .delay (10000,10000,10000) L_0x1a224c0/d; +L_0x1a22bd0/d .functor NAND 1, L_0x1a22d50, L_0x1a22df0, C4<1>, C4<1>; +L_0x1a22bd0 .delay (10000,10000,10000) L_0x1a22bd0/d; +L_0x1a22b40/d .functor NAND 1, L_0x1a23180, L_0x1a22ee0, C4<1>, C4<1>; +L_0x1a22b40 .delay (10000,10000,10000) L_0x1a22b40/d; +L_0x1a22390/d .functor NAND 1, L_0x1a236a0, L_0x1a23790, C4<1>, C4<1>; +L_0x1a22390 .delay (10000,10000,10000) L_0x1a22390/d; +L_0x1a23380/d .functor NAND 1, L_0x1a239f0, L_0x1a23880, C4<1>, C4<1>; +L_0x1a23380 .delay (10000,10000,10000) L_0x1a23380/d; +L_0x1a23a90/d .functor NAND 1, L_0x1a23e40, L_0x1a23ee0, C4<1>, C4<1>; +L_0x1a23a90 .delay (10000,10000,10000) L_0x1a23a90/d; +L_0x1a24080/d .functor NAND 1, L_0x1a24170, L_0x1a23f80, C4<1>, C4<1>; +L_0x1a24080 .delay (10000,10000,10000) L_0x1a24080/d; +L_0x1a24210/d .functor NAND 1, L_0x1a24530, L_0x1a245d0, C4<1>, C4<1>; +L_0x1a24210 .delay (10000,10000,10000) L_0x1a24210/d; +L_0x1a23de0/d .functor NAND 1, L_0x1a24880, L_0x1a246c0, C4<1>, C4<1>; +L_0x1a23de0 .delay (10000,10000,10000) L_0x1a23de0/d; +L_0x1a24920/d .functor NAND 1, L_0x1a24c50, L_0x1a24cf0, C4<1>, C4<1>; +L_0x1a24920 .delay (10000,10000,10000) L_0x1a24920/d; +L_0x1a24ba0/d .functor NAND 1, L_0x1a23070, L_0x1a23220, C4<1>, C4<1>; +L_0x1a24ba0 .delay (10000,10000,10000) L_0x1a24ba0/d; +L_0x1a23480/d .functor NAND 1, L_0x1a253f0, L_0x1a25860, C4<1>, C4<1>; +L_0x1a23480 .delay (10000,10000,10000) L_0x1a23480/d; +L_0x1a25780/d .functor NAND 1, L_0x1a25ae0, L_0x1a25900, C4<1>, C4<1>; +L_0x1a25780 .delay (10000,10000,10000) L_0x1a25780/d; +L_0x1a25d30/d .functor NAND 1, L_0x1a25f10, L_0x1a25fb0, C4<1>, C4<1>; +L_0x1a25d30 .delay (10000,10000,10000) L_0x1a25d30/d; +L_0x1a25c20/d .functor NAND 1, L_0x1a26210, L_0x1a26050, C4<1>, C4<1>; +L_0x1a25c20 .delay (10000,10000,10000) L_0x1a25c20/d; +L_0x1a25cd0/d .functor NAND 1, L_0x1a25e70, L_0x1a26670, C4<1>, C4<1>; +L_0x1a25cd0 .delay (10000,10000,10000) L_0x1a25cd0/d; +L_0x1a263a0/d .functor NAND 1, L_0x1a26950, L_0x1a26760, C4<1>, C4<1>; +L_0x1a263a0 .delay (10000,10000,10000) L_0x1a263a0/d; +L_0x1a268f0/d .functor NAND 1, L_0x1a265c0, L_0x1a26da0, C4<1>, C4<1>; +L_0x1a268f0 .delay (10000,10000,10000) L_0x1a268f0/d; +L_0x1a26a90/d .functor NAND 1, L_0x1a270b0, L_0x1a26e90, C4<1>, C4<1>; +L_0x1a26a90 .delay (10000,10000,10000) L_0x1a26a90/d; +L_0x1a27020/d .functor NAND 1, L_0x1a26ce0, L_0x1a27540, C4<1>, C4<1>; +L_0x1a27020 .delay (10000,10000,10000) L_0x1a27020/d; +L_0x1a271f0/d .functor NAND 1, L_0x1a27880, L_0x1a27630, C4<1>, C4<1>; +L_0x1a271f0 .delay (10000,10000,10000) L_0x1a271f0/d; +L_0x1a27330/d .functor NAND 1, L_0x1a27470, L_0x1a27cc0, C4<1>, C4<1>; +L_0x1a27330 .delay (10000,10000,10000) L_0x1a27330/d; +L_0x1a279c0/d .functor NAND 1, L_0x1a28030, L_0x1a27db0, C4<1>, C4<1>; +L_0x1a279c0 .delay (10000,10000,10000) L_0x1a279c0/d; +L_0x1a27f40/d .functor NAND 1, L_0x1a27be0, L_0x1a28460, C4<1>, C4<1>; +L_0x1a27f40 .delay (10000,10000,10000) L_0x1a27f40/d; +L_0x1a28170/d .functor NAND 1, L_0x1a28270, L_0x1a28810, C4<1>, C4<1>; +L_0x1a28170 .delay (10000,10000,10000) L_0x1a28170/d; +L_0x1a28550/d .functor NAND 1, L_0x1a28750, L_0x1a28370, C4<1>, C4<1>; +L_0x1a28550 .delay (10000,10000,10000) L_0x1a28550/d; +L_0x1a1db80/d .functor NAND 1, L_0x1a24f60, L_0x1a28950, C4<1>, C4<1>; +L_0x1a1db80 .delay (10000,10000,10000) L_0x1a1db80/d; +L_0x1a25300/d .functor NAND 1, L_0x1a255e0, L_0x1a28650, C4<1>, C4<1>; +L_0x1a25300 .delay (10000,10000,10000) L_0x1a25300/d; +v0x199f360_0 .net *"_s0", 0 0, L_0x1a1d9e0; 1 drivers +v0x1a1d3c0_0 .net *"_s101", 0 0, L_0x1a25900; 1 drivers +v0x1a1d460_0 .net *"_s102", 0 0, L_0x1a25d30; 1 drivers +v0x1a1d500_0 .net *"_s105", 0 0, L_0x1a25f10; 1 drivers +v0x1a1d5b0_0 .net *"_s107", 0 0, L_0x1a25fb0; 1 drivers +v0x1a1d650_0 .net *"_s108", 0 0, L_0x1a25c20; 1 drivers +v0x1a1d730_0 .net *"_s11", 0 0, L_0x1a21e20; 1 drivers +v0x1a1d7d0_0 .net *"_s111", 0 0, L_0x1a26210; 1 drivers +v0x1a1d8c0_0 .net *"_s113", 0 0, L_0x1a26050; 1 drivers +v0x1a1d960_0 .net *"_s114", 0 0, L_0x1a25cd0; 1 drivers +v0x1a1da60_0 .net *"_s117", 0 0, L_0x1a25e70; 1 drivers +v0x1a1db00_0 .net *"_s119", 0 0, L_0x1a26670; 1 drivers +v0x1a1dc10_0 .net *"_s12", 0 0, L_0x1a22080; 1 drivers +v0x1a1dcb0_0 .net *"_s120", 0 0, L_0x1a263a0; 1 drivers +v0x1a1ddd0_0 .net *"_s123", 0 0, L_0x1a26950; 1 drivers +v0x1a1de70_0 .net *"_s125", 0 0, L_0x1a26760; 1 drivers +v0x1a1dd30_0 .net *"_s126", 0 0, L_0x1a268f0; 1 drivers +v0x1a1dfc0_0 .net *"_s129", 0 0, L_0x1a265c0; 1 drivers +v0x1a1e0e0_0 .net *"_s131", 0 0, L_0x1a26da0; 1 drivers +v0x1a1e160_0 .net *"_s132", 0 0, L_0x1a26a90; 1 drivers +v0x1a1e040_0 .net *"_s135", 0 0, L_0x1a270b0; 1 drivers +v0x1a1e290_0 .net *"_s137", 0 0, L_0x1a26e90; 1 drivers +v0x1a1e1e0_0 .net *"_s138", 0 0, L_0x1a27020; 1 drivers +v0x1a1e3d0_0 .net *"_s141", 0 0, L_0x1a26ce0; 1 drivers +v0x1a1e330_0 .net *"_s143", 0 0, L_0x1a27540; 1 drivers +v0x1a1e520_0 .net *"_s144", 0 0, L_0x1a271f0; 1 drivers +v0x1a1e470_0 .net *"_s147", 0 0, L_0x1a27880; 1 drivers +v0x1a1e680_0 .net *"_s149", 0 0, L_0x1a27630; 1 drivers +v0x1a1e5c0_0 .net *"_s15", 0 0, L_0x1a22170; 1 drivers +v0x1a1e7f0_0 .net *"_s150", 0 0, L_0x1a27330; 1 drivers +v0x1a1e700_0 .net *"_s153", 0 0, L_0x1a27470; 1 drivers +v0x1a1e970_0 .net *"_s155", 0 0, L_0x1a27cc0; 1 drivers +v0x1a1e870_0 .net *"_s156", 0 0, L_0x1a279c0; 1 drivers +v0x1a1eb00_0 .net *"_s159", 0 0, L_0x1a28030; 1 drivers +v0x1a1e9f0_0 .net *"_s161", 0 0, L_0x1a27db0; 1 drivers +v0x1a1eca0_0 .net *"_s162", 0 0, L_0x1a27f40; 1 drivers +v0x1a1eb80_0 .net *"_s165", 0 0, L_0x1a27be0; 1 drivers +v0x1a1ec20_0 .net *"_s167", 0 0, L_0x1a28460; 1 drivers +v0x1a1ee60_0 .net *"_s168", 0 0, L_0x1a28170; 1 drivers +v0x1a1eee0_0 .net *"_s17", 0 0, L_0x1a222a0; 1 drivers +v0x1a1ed20_0 .net *"_s171", 0 0, L_0x1a28270; 1 drivers +v0x1a1edc0_0 .net *"_s173", 0 0, L_0x1a28810; 1 drivers +v0x1a1f0c0_0 .net *"_s174", 0 0, L_0x1a28550; 1 drivers +v0x1a1f140_0 .net *"_s177", 0 0, L_0x1a28750; 1 drivers +v0x1a1ef60_0 .net *"_s179", 0 0, L_0x1a28370; 1 drivers +v0x1a1f000_0 .net *"_s18", 0 0, L_0x1a22520; 1 drivers +v0x1a1f340_0 .net *"_s180", 0 0, L_0x1a1db80; 1 drivers +v0x1a1f3c0_0 .net *"_s183", 0 0, L_0x1a24f60; 1 drivers +v0x1a1f1e0_0 .net *"_s185", 0 0, L_0x1a28950; 1 drivers +v0x1a1f280_0 .net *"_s186", 0 0, L_0x1a25300; 1 drivers +v0x1a1f5e0_0 .net *"_s189", 0 0, L_0x1a255e0; 1 drivers +v0x1a1f660_0 .net *"_s191", 0 0, L_0x1a28650; 1 drivers +v0x1a1f460_0 .net *"_s21", 0 0, L_0x1a22580; 1 drivers +v0x1a1f500_0 .net *"_s23", 0 0, L_0x1a22620; 1 drivers +v0x1a1f8a0_0 .net *"_s24", 0 0, L_0x1a224c0; 1 drivers +v0x1a1f920_0 .net *"_s27", 0 0, L_0x1a22890; 1 drivers +v0x1a1f6e0_0 .net *"_s29", 0 0, L_0x1a229b0; 1 drivers +v0x1a1f780_0 .net *"_s3", 0 0, L_0x1a21970; 1 drivers +v0x1a1f820_0 .net *"_s30", 0 0, L_0x1a22bd0; 1 drivers +v0x1a1fba0_0 .net *"_s33", 0 0, L_0x1a22d50; 1 drivers +v0x1a1f9c0_0 .net *"_s35", 0 0, L_0x1a22df0; 1 drivers +v0x1a1fa60_0 .net *"_s36", 0 0, L_0x1a22b40; 1 drivers +v0x1a1fb00_0 .net *"_s39", 0 0, L_0x1a23180; 1 drivers +v0x1a1fe40_0 .net *"_s41", 0 0, L_0x1a22ee0; 1 drivers +v0x1a1fc40_0 .net *"_s42", 0 0, L_0x1a22390; 1 drivers +v0x1a1fce0_0 .net *"_s45", 0 0, L_0x1a236a0; 1 drivers +v0x1a1fd80_0 .net *"_s47", 0 0, L_0x1a23790; 1 drivers +v0x1a200e0_0 .net *"_s48", 0 0, L_0x1a23380; 1 drivers +v0x1a1fee0_0 .net *"_s5", 0 0, L_0x1a21a60; 1 drivers +v0x1a1ff80_0 .net *"_s51", 0 0, L_0x1a239f0; 1 drivers +v0x1a20020_0 .net *"_s53", 0 0, L_0x1a23880; 1 drivers +v0x1a203a0_0 .net *"_s54", 0 0, L_0x1a23a90; 1 drivers +v0x1a20160_0 .net *"_s57", 0 0, L_0x1a23e40; 1 drivers +v0x1a20200_0 .net *"_s59", 0 0, L_0x1a23ee0; 1 drivers +v0x1a202a0_0 .net *"_s6", 0 0, L_0x1a21c40; 1 drivers +v0x1a20680_0 .net *"_s60", 0 0, L_0x1a24080; 1 drivers +v0x1a20420_0 .net *"_s63", 0 0, L_0x1a24170; 1 drivers +v0x1a204c0_0 .net *"_s65", 0 0, L_0x1a23f80; 1 drivers +v0x1a20560_0 .net *"_s66", 0 0, L_0x1a24210; 1 drivers +v0x1a20600_0 .net *"_s69", 0 0, L_0x1a24530; 1 drivers +v0x1a20990_0 .net *"_s71", 0 0, L_0x1a245d0; 1 drivers +v0x1a20a10_0 .net *"_s72", 0 0, L_0x1a23de0; 1 drivers +v0x1a20720_0 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v0x1a21620_0, 0, 1; +L_0x1a21a60 .part v0x1a21750_0, 0, 1; +L_0x1a21ba0 .part/pv L_0x1a21c40, 1, 1, 32; +L_0x1a21d80 .part v0x1a21620_0, 1, 1; +L_0x1a21e20 .part v0x1a21750_0, 1, 1; +L_0x1a21f50 .part/pv L_0x1a22080, 2, 1, 32; +L_0x1a22170 .part v0x1a21620_0, 2, 1; +L_0x1a222a0 .part v0x1a21750_0, 2, 1; +L_0x1a22420 .part/pv L_0x1a22520, 3, 1, 32; +L_0x1a22580 .part v0x1a21620_0, 3, 1; +L_0x1a22620 .part v0x1a21750_0, 3, 1; +L_0x1a22710 .part/pv L_0x1a224c0, 4, 1, 32; +L_0x1a22890 .part v0x1a21620_0, 4, 1; +L_0x1a229b0 .part v0x1a21750_0, 4, 1; +L_0x1a22aa0 .part/pv L_0x1a22bd0, 5, 1, 32; +L_0x1a22d50 .part v0x1a21620_0, 5, 1; +L_0x1a22df0 .part v0x1a21750_0, 5, 1; +L_0x1a22f80 .part/pv L_0x1a22b40, 6, 1, 32; +L_0x1a23180 .part v0x1a21620_0, 6, 1; +L_0x1a22ee0 .part v0x1a21750_0, 6, 1; +L_0x1a234f0 .part/pv L_0x1a22390, 7, 1, 32; +L_0x1a236a0 .part v0x1a21620_0, 7, 1; +L_0x1a23790 .part v0x1a21750_0, 7, 1; +L_0x1a23590 .part/pv L_0x1a23380, 8, 1, 32; +L_0x1a239f0 .part v0x1a21620_0, 8, 1; +L_0x1a23880 .part v0x1a21750_0, 8, 1; +L_0x1a23bc0 .part/pv L_0x1a23a90, 9, 1, 32; +L_0x1a23e40 .part v0x1a21620_0, 9, 1; +L_0x1a23ee0 .part v0x1a21750_0, 9, 1; +L_0x1a23c60 .part/pv L_0x1a24080, 10, 1, 32; +L_0x1a24170 .part v0x1a21620_0, 10, 1; +L_0x1a23f80 .part v0x1a21750_0, 10, 1; +L_0x1a24320 .part/pv L_0x1a24210, 11, 1, 32; +L_0x1a24530 .part v0x1a21620_0, 11, 1; +L_0x1a245d0 .part v0x1a21750_0, 11, 1; +L_0x1a243c0 .part/pv L_0x1a23de0, 12, 1, 32; +L_0x1a24880 .part v0x1a21620_0, 12, 1; +L_0x1a246c0 .part v0x1a21750_0, 12, 1; +L_0x1a24a60 .part/pv L_0x1a24920, 13, 1, 32; +L_0x1a24c50 .part v0x1a21620_0, 13, 1; +L_0x1a24cf0 .part v0x1a21750_0, 13, 1; +L_0x1a24b00 .part/pv L_0x1a24ba0, 14, 1, 32; +L_0x1a23070 .part v0x1a21620_0, 14, 1; +L_0x1a23220 .part v0x1a21750_0, 14, 1; +L_0x1a233e0 .part/pv L_0x1a23480, 15, 1, 32; +L_0x1a253f0 .part v0x1a21620_0, 15, 1; +L_0x1a25860 .part v0x1a21750_0, 15, 1; +L_0x1a256e0 .part/pv L_0x1a25780, 16, 1, 32; +L_0x1a25ae0 .part v0x1a21620_0, 16, 1; +L_0x1a25900 .part v0x1a21750_0, 16, 1; +L_0x1a259f0 .part/pv L_0x1a25d30, 17, 1, 32; +L_0x1a25f10 .part v0x1a21620_0, 17, 1; +L_0x1a25fb0 .part v0x1a21750_0, 17, 1; +L_0x1a25b80 .part/pv L_0x1a25c20, 18, 1, 32; +L_0x1a26210 .part v0x1a21620_0, 18, 1; +L_0x1a26050 .part v0x1a21750_0, 18, 1; +L_0x1a26140 .part/pv L_0x1a25cd0, 19, 1, 32; +L_0x1a25e70 .part v0x1a21620_0, 19, 1; +L_0x1a26670 .part v0x1a21750_0, 19, 1; +L_0x1a26300 .part/pv L_0x1a263a0, 20, 1, 32; +L_0x1a26950 .part v0x1a21620_0, 20, 1; +L_0x1a26760 .part v0x1a21750_0, 20, 1; +L_0x1a26850 .part/pv L_0x1a268f0, 21, 1, 32; +L_0x1a265c0 .part v0x1a21620_0, 21, 1; +L_0x1a26da0 .part v0x1a21750_0, 21, 1; +L_0x1a269f0 .part/pv L_0x1a26a90, 22, 1, 32; +L_0x1a270b0 .part v0x1a21620_0, 22, 1; +L_0x1a26e90 .part v0x1a21750_0, 22, 1; +L_0x1a26f80 .part/pv L_0x1a27020, 23, 1, 32; +L_0x1a26ce0 .part v0x1a21620_0, 23, 1; +L_0x1a27540 .part v0x1a21750_0, 23, 1; +L_0x1a27150 .part/pv L_0x1a271f0, 24, 1, 32; +L_0x1a27880 .part v0x1a21620_0, 24, 1; +L_0x1a27630 .part v0x1a21750_0, 24, 1; +L_0x1a27720 .part/pv L_0x1a27330, 25, 1, 32; +L_0x1a27470 .part v0x1a21620_0, 25, 1; +L_0x1a27cc0 .part v0x1a21750_0, 25, 1; +L_0x1a27920 .part/pv L_0x1a279c0, 26, 1, 32; +L_0x1a28030 .part v0x1a21620_0, 26, 1; +L_0x1a27db0 .part v0x1a21750_0, 26, 1; +L_0x1a27ea0 .part/pv L_0x1a27f40, 27, 1, 32; +L_0x1a27be0 .part v0x1a21620_0, 27, 1; +L_0x1a28460 .part v0x1a21750_0, 27, 1; +L_0x1a280d0 .part/pv L_0x1a28170, 28, 1, 32; +L_0x1a28270 .part v0x1a21620_0, 28, 1; +L_0x1a28810 .part v0x1a21750_0, 28, 1; +L_0x1a288b0 .part/pv L_0x1a28550, 29, 1, 32; +L_0x1a28750 .part v0x1a21620_0, 29, 1; +L_0x1a28370 .part v0x1a21750_0, 29, 1; +L_0x1a28c30 .part/pv L_0x1a1db80, 30, 1, 32; +L_0x1a24f60 .part v0x1a21620_0, 30, 1; +L_0x1a28950 .part v0x1a21750_0, 30, 1; +L_0x1a28a40 .part/pv L_0x1a25300, 31, 1, 32; +L_0x1a255e0 .part v0x1a21620_0, 31, 1; +L_0x1a28650 .part v0x1a21750_0, 31, 1; + .scope S_0x1960730; +T_0 ; + %ix/load 0, 31, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21750_0, 0, 1; + %delay 5000000, 0; + %vpi_call 2 14 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; + %ix/load 0, 31, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21620_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 18 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; + %ix/load 0, 31, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21620_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 22 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; + %ix/load 0, 31, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 26 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; + %ix/load 0, 31, 0; + %set/x0 v0x1a21620_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21620_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x1a21750_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 30 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; + %ix/load 0, 31, 0; + %set/x0 v0x1a21620_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x1a21750_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x1a21750_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x1a21750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x1a21750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 34 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "nand_32bit.t.v"; + "./nand_32bit.v"; diff --git a/nor_32bit b/nor_32bit new file mode 100755 index 0000000..072257f --- /dev/null +++ b/nor_32bit @@ -0,0 +1,1073 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x9e3730 .scope module, "test32bitnor" "test32bitnor" 2 4; + .timescale -9 -12; +v0xaa4620_0 .var "a", 31 0; +RS_0x7f7c4f155278/0/0 .resolv tri, L_0xaa4800, L_0xaa4ba0, L_0xaa4f50, L_0xaa5420; +RS_0x7f7c4f155278/0/4 .resolv tri, L_0xaa5710, L_0xaa5aa0, L_0xaa5f80, L_0xaa64f0; +RS_0x7f7c4f155278/0/8 .resolv tri, L_0xaa6590, L_0xaa6bc0, L_0xaa6c60, L_0xaa7320; +RS_0x7f7c4f155278/0/12 .resolv tri, L_0xaa73c0, L_0xaa7a60, L_0xaa7b00, L_0xaa63e0; +RS_0x7f7c4f155278/0/16 .resolv tri, L_0xaa86e0, L_0xaa89f0, L_0xaa8b80, L_0xaa9140; +RS_0x7f7c4f155278/0/20 .resolv tri, L_0xaa9300, L_0xaa9850, L_0xaa99f0, L_0xaa9f80; +RS_0x7f7c4f155278/0/24 .resolv tri, L_0xaaa150, L_0xaaa720, L_0xaaa920, L_0xaaaea0; +RS_0x7f7c4f155278/0/28 .resolv tri, L_0xaab0d0, L_0xaab8b0, L_0xaabc30, L_0xaaba40; +RS_0x7f7c4f155278/1/0 .resolv tri, RS_0x7f7c4f155278/0/0, RS_0x7f7c4f155278/0/4, RS_0x7f7c4f155278/0/8, RS_0x7f7c4f155278/0/12; +RS_0x7f7c4f155278/1/4 .resolv tri, RS_0x7f7c4f155278/0/16, RS_0x7f7c4f155278/0/20, RS_0x7f7c4f155278/0/24, RS_0x7f7c4f155278/0/28; +RS_0x7f7c4f155278 .resolv tri, RS_0x7f7c4f155278/1/0, RS_0x7f7c4f155278/1/4, C4, C4; +v0xaa46a0_0 .net8 "ans", 31 0, RS_0x7f7c4f155278; 32 drivers +v0xaa4750_0 .var "b", 31 0; +S_0x9e3820 .scope module, "nor32" "nor_32bit" 2 9, 3 1, S_0x9e3730; + .timescale -9 -12; +L_0xaa09e0/d .functor NOR 1, L_0xaa4970, L_0xaa4a60, C4<0>, C4<0>; +L_0xaa09e0 .delay (10000,10000,10000) L_0xaa09e0/d; +L_0xaa4c40/d .functor NOR 1, L_0xaa4d80, L_0xaa4e20, C4<0>, C4<0>; +L_0xaa4c40 .delay (10000,10000,10000) L_0xaa4c40/d; +L_0xaa5080/d .functor NOR 1, L_0xaa5170, L_0xaa52a0, C4<0>, C4<0>; +L_0xaa5080 .delay (10000,10000,10000) L_0xaa5080/d; +L_0xaa5520/d .functor NOR 1, L_0xaa5580, L_0xaa5620, C4<0>, C4<0>; +L_0xaa5520 .delay (10000,10000,10000) L_0xaa5520/d; +L_0xaa54c0/d .functor NOR 1, L_0xaa5890, L_0xaa59b0, C4<0>, C4<0>; +L_0xaa54c0 .delay (10000,10000,10000) L_0xaa54c0/d; +L_0xaa5bd0/d .functor NOR 1, L_0xaa5d50, L_0xaa5df0, C4<0>, C4<0>; +L_0xaa5bd0 .delay (10000,10000,10000) L_0xaa5bd0/d; +L_0xaa5b40/d .functor NOR 1, L_0xaa6180, L_0xaa5ee0, C4<0>, C4<0>; +L_0xaa5b40 .delay (10000,10000,10000) L_0xaa5b40/d; +L_0xaa5390/d .functor NOR 1, L_0xaa66a0, L_0xaa6790, C4<0>, C4<0>; +L_0xaa5390 .delay (10000,10000,10000) L_0xaa5390/d; +L_0xaa6380/d .functor NOR 1, L_0xaa69f0, L_0xaa6880, C4<0>, C4<0>; +L_0xaa6380 .delay (10000,10000,10000) L_0xaa6380/d; +L_0xaa6a90/d .functor NOR 1, L_0xaa6e40, L_0xaa6ee0, C4<0>, C4<0>; +L_0xaa6a90 .delay (10000,10000,10000) L_0xaa6a90/d; +L_0xaa7080/d .functor NOR 1, L_0xaa7170, L_0xaa6f80, C4<0>, C4<0>; +L_0xaa7080 .delay (10000,10000,10000) L_0xaa7080/d; +L_0xaa7210/d .functor NOR 1, L_0xaa7530, L_0xaa75d0, C4<0>, C4<0>; +L_0xaa7210 .delay (10000,10000,10000) L_0xaa7210/d; +L_0xaa6de0/d .functor NOR 1, L_0xaa7880, L_0xaa76c0, C4<0>, C4<0>; +L_0xaa6de0 .delay (10000,10000,10000) L_0xaa6de0/d; +L_0xaa7920/d .functor NOR 1, L_0xaa7c50, L_0xaa7cf0, C4<0>, C4<0>; +L_0xaa7920 .delay (10000,10000,10000) L_0xaa7920/d; +L_0xaa7ba0/d .functor NOR 1, L_0xaa6070, L_0xaa6220, C4<0>, C4<0>; +L_0xaa7ba0 .delay (10000,10000,10000) L_0xaa7ba0/d; +L_0xaa6480/d .functor NOR 1, L_0xaa83f0, L_0xaa8860, C4<0>, C4<0>; +L_0xaa6480 .delay (10000,10000,10000) L_0xaa6480/d; +L_0xaa8780/d .functor NOR 1, L_0xaa8ae0, L_0xaa8900, C4<0>, C4<0>; +L_0xaa8780 .delay (10000,10000,10000) L_0xaa8780/d; +L_0xaa8d30/d .functor NOR 1, L_0xaa8f10, L_0xaa8fb0, C4<0>, C4<0>; +L_0xaa8d30 .delay (10000,10000,10000) L_0xaa8d30/d; +L_0xaa8c20/d .functor NOR 1, L_0xaa9210, L_0xaa9050, C4<0>, C4<0>; +L_0xaa8c20 .delay (10000,10000,10000) L_0xaa8c20/d; +L_0xaa8cd0/d .functor NOR 1, L_0xaa8e70, L_0xaa9670, C4<0>, C4<0>; +L_0xaa8cd0 .delay (10000,10000,10000) L_0xaa8cd0/d; +L_0xaa93a0/d .functor NOR 1, L_0xaa9950, L_0xaa9760, C4<0>, C4<0>; +L_0xaa93a0 .delay (10000,10000,10000) L_0xaa93a0/d; +L_0xaa98f0/d .functor NOR 1, L_0xaa95c0, L_0xaa9da0, C4<0>, C4<0>; +L_0xaa98f0 .delay (10000,10000,10000) L_0xaa98f0/d; +L_0xaa9a90/d .functor NOR 1, L_0xaaa0b0, L_0xaa9e90, C4<0>, C4<0>; +L_0xaa9a90 .delay (10000,10000,10000) L_0xaa9a90/d; +L_0xaaa020/d .functor NOR 1, L_0xaa9ce0, L_0xaaa540, C4<0>, C4<0>; +L_0xaaa020 .delay (10000,10000,10000) L_0xaaa020/d; +L_0xaaa1f0/d .functor NOR 1, L_0xaaa880, L_0xaaa630, C4<0>, C4<0>; +L_0xaaa1f0 .delay (10000,10000,10000) L_0xaaa1f0/d; +L_0xaaa330/d .functor NOR 1, L_0xaaa470, L_0xaaacc0, C4<0>, C4<0>; +L_0xaaa330 .delay (10000,10000,10000) L_0xaaa330/d; +L_0xaaa9c0/d .functor NOR 1, L_0xaab030, L_0xaaadb0, C4<0>, C4<0>; +L_0xaaa9c0 .delay (10000,10000,10000) L_0xaaa9c0/d; +L_0xaaaf40/d .functor NOR 1, L_0xaaabe0, L_0xaab460, C4<0>, C4<0>; +L_0xaaaf40 .delay (10000,10000,10000) L_0xaaaf40/d; +L_0xaab170/d .functor NOR 1, L_0xaab270, L_0xaab810, C4<0>, C4<0>; +L_0xaab170 .delay (10000,10000,10000) L_0xaab170/d; +L_0xaab550/d .functor NOR 1, L_0xaab750, L_0xaab370, C4<0>, C4<0>; +L_0xaab550 .delay (10000,10000,10000) L_0xaab550/d; +L_0xaa0b80/d .functor NOR 1, L_0xaa7f60, L_0xaab950, C4<0>, C4<0>; +L_0xaa0b80 .delay (10000,10000,10000) L_0xaa0b80/d; +L_0xaa8300/d .functor NOR 1, L_0xaa85e0, L_0xaab650, C4<0>, C4<0>; +L_0xaa8300 .delay (10000,10000,10000) L_0xaa8300/d; +v0xa22360_0 .net *"_s0", 0 0, L_0xaa09e0; 1 drivers +v0xaa03c0_0 .net *"_s101", 0 0, L_0xaa8900; 1 drivers +v0xaa0460_0 .net *"_s102", 0 0, L_0xaa8d30; 1 drivers +v0xaa0500_0 .net *"_s105", 0 0, L_0xaa8f10; 1 drivers +v0xaa05b0_0 .net *"_s107", 0 0, L_0xaa8fb0; 1 drivers +v0xaa0650_0 .net *"_s108", 0 0, L_0xaa8c20; 1 drivers +v0xaa0730_0 .net *"_s11", 0 0, L_0xaa4e20; 1 drivers +v0xaa07d0_0 .net *"_s111", 0 0, L_0xaa9210; 1 drivers +v0xaa08c0_0 .net *"_s113", 0 0, L_0xaa9050; 1 drivers +v0xaa0960_0 .net *"_s114", 0 0, L_0xaa8cd0; 1 drivers +v0xaa0a60_0 .net *"_s117", 0 0, L_0xaa8e70; 1 drivers +v0xaa0b00_0 .net *"_s119", 0 0, L_0xaa9670; 1 drivers +v0xaa0c10_0 .net *"_s12", 0 0, L_0xaa5080; 1 drivers +v0xaa0cb0_0 .net *"_s120", 0 0, L_0xaa93a0; 1 drivers +v0xaa0dd0_0 .net *"_s123", 0 0, L_0xaa9950; 1 drivers +v0xaa0e70_0 .net *"_s125", 0 0, L_0xaa9760; 1 drivers +v0xaa0d30_0 .net *"_s126", 0 0, L_0xaa98f0; 1 drivers +v0xaa0fc0_0 .net *"_s129", 0 0, L_0xaa95c0; 1 drivers +v0xaa10e0_0 .net *"_s131", 0 0, L_0xaa9da0; 1 drivers +v0xaa1160_0 .net *"_s132", 0 0, L_0xaa9a90; 1 drivers +v0xaa1040_0 .net *"_s135", 0 0, L_0xaaa0b0; 1 drivers +v0xaa1290_0 .net *"_s137", 0 0, L_0xaa9e90; 1 drivers +v0xaa11e0_0 .net *"_s138", 0 0, L_0xaaa020; 1 drivers +v0xaa13d0_0 .net *"_s141", 0 0, L_0xaa9ce0; 1 drivers +v0xaa1330_0 .net *"_s143", 0 0, L_0xaaa540; 1 drivers +v0xaa1520_0 .net *"_s144", 0 0, L_0xaaa1f0; 1 drivers +v0xaa1470_0 .net *"_s147", 0 0, L_0xaaa880; 1 drivers +v0xaa1680_0 .net *"_s149", 0 0, L_0xaaa630; 1 drivers +v0xaa15c0_0 .net *"_s15", 0 0, L_0xaa5170; 1 drivers +v0xaa17f0_0 .net *"_s150", 0 0, L_0xaaa330; 1 drivers +v0xaa1700_0 .net *"_s153", 0 0, L_0xaaa470; 1 drivers +v0xaa1970_0 .net *"_s155", 0 0, L_0xaaacc0; 1 drivers +v0xaa1870_0 .net *"_s156", 0 0, L_0xaaa9c0; 1 drivers +v0xaa1b00_0 .net *"_s159", 0 0, L_0xaab030; 1 drivers +v0xaa19f0_0 .net *"_s161", 0 0, L_0xaaadb0; 1 drivers +v0xaa1ca0_0 .net *"_s162", 0 0, L_0xaaaf40; 1 drivers +v0xaa1b80_0 .net *"_s165", 0 0, L_0xaaabe0; 1 drivers +v0xaa1c20_0 .net *"_s167", 0 0, L_0xaab460; 1 drivers +v0xaa1e60_0 .net *"_s168", 0 0, L_0xaab170; 1 drivers +v0xaa1ee0_0 .net *"_s17", 0 0, L_0xaa52a0; 1 drivers +v0xaa1d20_0 .net *"_s171", 0 0, L_0xaab270; 1 drivers +v0xaa1dc0_0 .net *"_s173", 0 0, L_0xaab810; 1 drivers +v0xaa20c0_0 .net *"_s174", 0 0, L_0xaab550; 1 drivers +v0xaa2140_0 .net *"_s177", 0 0, L_0xaab750; 1 drivers +v0xaa1f60_0 .net *"_s179", 0 0, L_0xaab370; 1 drivers +v0xaa2000_0 .net *"_s18", 0 0, L_0xaa5520; 1 drivers +v0xaa2340_0 .net *"_s180", 0 0, L_0xaa0b80; 1 drivers +v0xaa23c0_0 .net *"_s183", 0 0, L_0xaa7f60; 1 drivers +v0xaa21e0_0 .net *"_s185", 0 0, L_0xaab950; 1 drivers +v0xaa2280_0 .net *"_s186", 0 0, L_0xaa8300; 1 drivers +v0xaa25e0_0 .net *"_s189", 0 0, L_0xaa85e0; 1 drivers +v0xaa2660_0 .net *"_s191", 0 0, L_0xaab650; 1 drivers +v0xaa2460_0 .net *"_s21", 0 0, L_0xaa5580; 1 drivers +v0xaa2500_0 .net *"_s23", 0 0, L_0xaa5620; 1 drivers +v0xaa28a0_0 .net *"_s24", 0 0, L_0xaa54c0; 1 drivers +v0xaa2920_0 .net *"_s27", 0 0, L_0xaa5890; 1 drivers +v0xaa26e0_0 .net *"_s29", 0 0, L_0xaa59b0; 1 drivers +v0xaa2780_0 .net *"_s3", 0 0, L_0xaa4970; 1 drivers +v0xaa2820_0 .net *"_s30", 0 0, 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v0xaa4750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4750_0, 0, 1; + %delay 5000000, 0; + %vpi_call 2 14 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4620_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 18 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4620_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 22 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 26 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xaa4620_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4620_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xaa4750_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 30 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; + %ix/load 0, 31, 0; + %set/x0 v0xaa4620_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4620_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0xaa4750_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0xaa4750_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0xaa4750_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0xaa4750_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 34 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "nor_32bit.t.v"; + "./nor_32bit.v"; diff --git a/slt b/slt new file mode 100755 index 0000000..73d9e70 --- /dev/null +++ b/slt @@ -0,0 +1,1543 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2480cc0 .scope module, "test32bitslt" "test32bitslt" 2 4; + .timescale -9 -12; +v0x24d9d70_0 .var "a", 31 0; +v0x24d9df0_0 .net "ans", 31 0, L_0x24e8780; 1 drivers +v0x24d9e70_0 .var "b", 31 0; +S_0x2480000 .scope module, "slt" "full_slt_32bit" 2 9, 3 19, S_0x2480cc0; + .timescale -9 -12; +v0x24d7e90_0 .net *"_s129", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x24d7f50_0 .net "a", 31 0, v0x24d9d70_0; 1 drivers +v0x24d7ff0_0 .net "b", 31 0, v0x24d9e70_0; 1 drivers +v0x24d8090_0 .alias "out", 31 0, v0x24d9df0_0; +v0x24d8140_0 .net "slt0", 0 0, L_0x24da190; 1 drivers +v0x24d8210_0 .net "slt1", 0 0, L_0x24da9a0; 1 drivers +v0x24d82e0_0 .net "slt10", 0 0, L_0x24dead0; 1 drivers +v0x24d83b0_0 .net "slt11", 0 0, L_0x24df1f0; 1 drivers +v0x24d84d0_0 .net "slt12", 0 0, L_0x24df900; 1 drivers +v0x24d85a0_0 .net "slt13", 0 0, L_0x24e0020; 1 drivers +v0x24d8680_0 .net "slt14", 0 0, L_0x24e0730; 1 drivers +v0x24d8750_0 .net "slt15", 0 0, L_0x24e1060; 1 drivers +v0x24d8890_0 .net "slt16", 0 0, L_0x24e1760; 1 drivers +v0x24d8960_0 .net "slt17", 0 0, L_0x24e1e70; 1 drivers +v0x24d8ab0_0 .net "slt18", 0 0, L_0x24e2580; 1 drivers +v0x24d8b80_0 .net "slt19", 0 0, L_0x24e2c90; 1 drivers +v0x24d89e0_0 .net "slt2", 0 0, L_0x24db080; 1 drivers +v0x24d8d30_0 .net "slt20", 0 0, L_0x24e33b0; 1 drivers +v0x24d8e50_0 .net "slt21", 0 0, L_0x24e3ac0; 1 drivers +v0x24d8f20_0 .net "slt22", 0 0, L_0x24e41d0; 1 drivers +v0x24d9050_0 .net "slt23", 0 0, L_0x24e48e0; 1 drivers +v0x24d90d0_0 .net "slt24", 0 0, L_0x24e5000; 1 drivers +v0x24d9210_0 .net "slt25", 0 0, L_0x24e5710; 1 drivers +v0x24d9290_0 .net "slt26", 0 0, L_0x24d8ff0; 1 drivers +v0x24d93e0_0 .net "slt27", 0 0, L_0x24e6530; 1 drivers +v0x24d9460_0 .net "slt28", 0 0, L_0x24e6c70; 1 drivers +v0x24d9360_0 .net "slt29", 0 0, L_0x24e73c0; 1 drivers +v0x24d9610_0 .net "slt3", 0 0, L_0x24db840; 1 drivers +v0x24d9530_0 .net "slt30", 0 0, L_0x24e7b00; 1 drivers +v0x24d97d0_0 .net "slt4", 0 0, L_0x24dbf50; 1 drivers +v0x24d96e0_0 .net "slt5", 0 0, L_0x24dc660; 1 drivers +v0x24d99a0_0 .net "slt6", 0 0, L_0x24dcd00; 1 drivers +v0x24d98a0_0 .net "slt7", 0 0, L_0x24dd5a0; 1 drivers +v0x24d9b80_0 .net "slt8", 0 0, L_0x24ddca0; 1 drivers +v0x24d9a70_0 .net "slt9", 0 0, L_0x24de3c0; 1 drivers +L_0x24da2d0 .part v0x24d9d70_0, 0, 1; +L_0x24da370 .part v0x24d9e70_0, 0, 1; +L_0x24dab00 .part v0x24d9d70_0, 1, 1; +L_0x24daba0 .part v0x24d9e70_0, 1, 1; +L_0x24db1e0 .part v0x24d9d70_0, 2, 1; +L_0x24db310 .part v0x24d9e70_0, 2, 1; +L_0x24db9a0 .part v0x24d9d70_0, 3, 1; +L_0x24dba40 .part v0x24d9e70_0, 3, 1; +L_0x24dc0b0 .part v0x24d9d70_0, 4, 1; +L_0x24dc150 .part v0x24d9e70_0, 4, 1; +L_0x24dc7c0 .part v0x24d9d70_0, 5, 1; +L_0x24dc860 .part v0x24d9e70_0, 5, 1; +L_0x24dce60 .part v0x24d9d70_0, 6, 1; +L_0x24dd010 .part v0x24d9e70_0, 6, 1; +L_0x24dd700 .part v0x24d9d70_0, 7, 1; +L_0x24dd7a0 .part v0x24d9e70_0, 7, 1; +L_0x24dde00 .part v0x24d9d70_0, 8, 1; +L_0x24ddea0 .part v0x24d9e70_0, 8, 1; +L_0x24de520 .part v0x24d9d70_0, 9, 1; +L_0x24de5c0 .part v0x24d9e70_0, 9, 1; +L_0x24dec30 .part v0x24d9d70_0, 10, 1; +L_0x24decd0 .part v0x24d9e70_0, 10, 1; +L_0x24df350 .part v0x24d9d70_0, 11, 1; +L_0x24df3f0 .part v0x24d9e70_0, 11, 1; +L_0x24dfa60 .part v0x24d9d70_0, 12, 1; +L_0x24dfb00 .part v0x24d9e70_0, 12, 1; +L_0x24e0180 .part v0x24d9d70_0, 13, 1; +L_0x24e0220 .part v0x24d9e70_0, 13, 1; +L_0x24e0890 .part v0x24d9d70_0, 14, 1; +L_0x24dcf00 .part v0x24d9e70_0, 14, 1; +L_0x24e11c0 .part v0x24d9d70_0, 15, 1; +L_0x24e1260 .part v0x24d9e70_0, 15, 1; +L_0x24e18c0 .part v0x24d9d70_0, 16, 1; +L_0x24e1960 .part v0x24d9e70_0, 16, 1; +L_0x24e1fd0 .part v0x24d9d70_0, 17, 1; +L_0x24e2070 .part v0x24d9e70_0, 17, 1; +L_0x24e26e0 .part v0x24d9d70_0, 18, 1; +L_0x24e2780 .part v0x24d9e70_0, 18, 1; +L_0x24e2df0 .part v0x24d9d70_0, 19, 1; +L_0x24e2e90 .part v0x24d9e70_0, 19, 1; +L_0x24e3510 .part v0x24d9d70_0, 20, 1; +L_0x24e35b0 .part v0x24d9e70_0, 20, 1; +L_0x24e3c20 .part v0x24d9d70_0, 21, 1; +L_0x24e3cc0 .part v0x24d9e70_0, 21, 1; +L_0x24e4330 .part v0x24d9d70_0, 22, 1; +L_0x24e43d0 .part v0x24d9e70_0, 22, 1; +L_0x24e4a40 .part v0x24d9d70_0, 23, 1; +L_0x24e4ae0 .part v0x24d9e70_0, 23, 1; +L_0x24e5160 .part v0x24d9d70_0, 24, 1; +L_0x24e5200 .part v0x24d9e70_0, 24, 1; +L_0x24e5870 .part v0x24d9d70_0, 25, 1; +L_0x24e5910 .part v0x24d9e70_0, 25, 1; +L_0x24e5f80 .part v0x24d9d70_0, 26, 1; +L_0x24e6020 .part v0x24d9e70_0, 26, 1; +L_0x24e6690 .part v0x24d9d70_0, 27, 1; +L_0x24e6730 .part v0x24d9e70_0, 27, 1; +L_0x24e6dd0 .part v0x24d9d70_0, 28, 1; +L_0x24e6e70 .part v0x24d9e70_0, 28, 1; +L_0x24e7520 .part v0x24d9d70_0, 29, 1; +L_0x24e75c0 .part v0x24d9e70_0, 29, 1; +L_0x24e7c60 .part v0x24d9d70_0, 30, 1; +L_0x24e0930 .part v0x24d9e70_0, 30, 1; +L_0x24e8780 .concat [ 1 31 0 0], L_0x24e8610, C4<0000000000000000000000000000000>; +L_0x24e8920 .part v0x24d9d70_0, 31, 1; +L_0x24e09d0 .part v0x24d9e70_0, 31, 1; +S_0x24d7860 .scope module, "bit0" "single_slt" 3 56, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24d8620/d .functor XOR 1, L_0x24da2d0, L_0x24da370, C4<0>, C4<0>; +L_0x24d8620 .delay (10000,10000,10000) L_0x24d8620/d; +L_0x24d9f40/d .functor AND 1, L_0x24da2d0, L_0x24d8620, C4<1>, C4<1>; +L_0x24d9f40 .delay (10000,10000,10000) L_0x24d9f40/d; +L_0x24da040/d .functor NOT 1, L_0x24d8620, C4<0>, C4<0>, C4<0>; +L_0x24da040 .delay (10000,10000,10000) L_0x24da040/d; +L_0x24da0a0/d .functor AND 1, L_0x24da040, C4<0>, C4<1>, C4<1>; +L_0x24da0a0 .delay (10000,10000,10000) L_0x24da0a0/d; +L_0x24da190/d .functor OR 1, L_0x24d9f40, L_0x24da0a0, C4<0>, C4<0>; +L_0x24da190 .delay (10000,10000,10000) L_0x24da190/d; +v0x24d7950_0 .net "a", 0 0, L_0x24da2d0; 1 drivers +v0x24d7a10_0 .net "abxor", 0 0, L_0x24d8620; 1 drivers +v0x24d7ab0_0 .net "axorand", 0 0, L_0x24d9f40; 1 drivers +v0x24d7b50_0 .net "b", 0 0, L_0x24da370; 1 drivers +v0x24d7c00_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x24d7ca0_0 .alias "out", 0 0, v0x24d8140_0; +v0x24d7d20_0 .net "xornot", 0 0, L_0x24da040; 1 drivers +v0x24d7da0_0 .net "xornotand", 0 0, L_0x24da0a0; 1 drivers +S_0x24d7230 .scope module, "bit1" "single_slt" 3 57, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24da540/d .functor XOR 1, L_0x24dab00, L_0x24daba0, C4<0>, C4<0>; +L_0x24da540 .delay (10000,10000,10000) L_0x24da540/d; +L_0x24da650/d .functor AND 1, L_0x24dab00, L_0x24da540, C4<1>, C4<1>; +L_0x24da650 .delay (10000,10000,10000) L_0x24da650/d; +L_0x24da790/d .functor NOT 1, L_0x24da540, C4<0>, C4<0>, C4<0>; +L_0x24da790 .delay (10000,10000,10000) L_0x24da790/d; +L_0x24da850/d .functor AND 1, L_0x24da790, L_0x24da190, C4<1>, C4<1>; +L_0x24da850 .delay (10000,10000,10000) L_0x24da850/d; +L_0x24da9a0/d .functor OR 1, L_0x24da650, L_0x24da850, C4<0>, C4<0>; +L_0x24da9a0 .delay (10000,10000,10000) L_0x24da9a0/d; +v0x24d7320_0 .net "a", 0 0, L_0x24dab00; 1 drivers +v0x24d73e0_0 .net "abxor", 0 0, L_0x24da540; 1 drivers +v0x24d7480_0 .net "axorand", 0 0, L_0x24da650; 1 drivers +v0x24d7520_0 .net "b", 0 0, L_0x24daba0; 1 drivers +v0x24d75d0_0 .alias "defaultCompare", 0 0, v0x24d8140_0; +v0x24d7670_0 .alias "out", 0 0, v0x24d8210_0; +v0x24d76f0_0 .net "xornot", 0 0, L_0x24da790; 1 drivers +v0x24d7770_0 .net "xornotand", 0 0, L_0x24da850; 1 drivers +S_0x24d6c00 .scope module, "bit2" "single_slt" 3 58, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dac40/d .functor XOR 1, L_0x24db1e0, L_0x24db310, C4<0>, C4<0>; +L_0x24dac40 .delay (10000,10000,10000) L_0x24dac40/d; +L_0x24dad30/d .functor AND 1, L_0x24db1e0, L_0x24dac40, C4<1>, C4<1>; +L_0x24dad30 .delay (10000,10000,10000) L_0x24dad30/d; +L_0x24dae70/d .functor NOT 1, L_0x24dac40, C4<0>, C4<0>, C4<0>; +L_0x24dae70 .delay (10000,10000,10000) L_0x24dae70/d; +L_0x24daf30/d .functor AND 1, L_0x24dae70, L_0x24da9a0, C4<1>, C4<1>; +L_0x24daf30 .delay (10000,10000,10000) L_0x24daf30/d; +L_0x24db080/d .functor OR 1, L_0x24dad30, L_0x24daf30, C4<0>, C4<0>; +L_0x24db080 .delay (10000,10000,10000) L_0x24db080/d; +v0x24d6cf0_0 .net "a", 0 0, L_0x24db1e0; 1 drivers +v0x24d6db0_0 .net "abxor", 0 0, L_0x24dac40; 1 drivers +v0x24d6e50_0 .net "axorand", 0 0, L_0x24dad30; 1 drivers +v0x24d6ef0_0 .net "b", 0 0, L_0x24db310; 1 drivers +v0x24d6fa0_0 .alias "defaultCompare", 0 0, v0x24d8210_0; +v0x24d7040_0 .alias "out", 0 0, v0x24d89e0_0; +v0x24d70c0_0 .net "xornot", 0 0, L_0x24dae70; 1 drivers +v0x24d7140_0 .net "xornotand", 0 0, L_0x24daf30; 1 drivers +S_0x24d65d0 .scope module, "bit3" "single_slt" 3 59, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24db480/d .functor XOR 1, L_0x24db9a0, L_0x24dba40, C4<0>, C4<0>; +L_0x24db480 .delay (10000,10000,10000) L_0x24db480/d; +L_0x24db540/d .functor AND 1, L_0x24db9a0, L_0x24db480, C4<1>, C4<1>; +L_0x24db540 .delay (10000,10000,10000) L_0x24db540/d; +L_0x24db630/d .functor NOT 1, L_0x24db480, C4<0>, C4<0>, C4<0>; +L_0x24db630 .delay (10000,10000,10000) L_0x24db630/d; +L_0x24db6f0/d .functor AND 1, L_0x24db630, L_0x24db080, C4<1>, C4<1>; +L_0x24db6f0 .delay (10000,10000,10000) L_0x24db6f0/d; +L_0x24db840/d .functor OR 1, L_0x24db540, L_0x24db6f0, C4<0>, C4<0>; +L_0x24db840 .delay (10000,10000,10000) L_0x24db840/d; +v0x24d66c0_0 .net "a", 0 0, L_0x24db9a0; 1 drivers +v0x24d6780_0 .net "abxor", 0 0, L_0x24db480; 1 drivers +v0x24d6820_0 .net "axorand", 0 0, L_0x24db540; 1 drivers +v0x24d68c0_0 .net "b", 0 0, L_0x24dba40; 1 drivers +v0x24d6970_0 .alias "defaultCompare", 0 0, v0x24d89e0_0; +v0x24d6a10_0 .alias "out", 0 0, v0x24d9610_0; +v0x24d6a90_0 .net "xornot", 0 0, L_0x24db630; 1 drivers +v0x24d6b10_0 .net "xornotand", 0 0, L_0x24db6f0; 1 drivers +S_0x24d5fa0 .scope module, "bit4" "single_slt" 3 60, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dbb30/d .functor XOR 1, L_0x24dc0b0, L_0x24dc150, C4<0>, C4<0>; +L_0x24dbb30 .delay (10000,10000,10000) L_0x24dbb30/d; +L_0x24dbc00/d .functor AND 1, L_0x24dc0b0, L_0x24dbb30, C4<1>, C4<1>; +L_0x24dbc00 .delay (10000,10000,10000) L_0x24dbc00/d; +L_0x24dbd40/d .functor NOT 1, L_0x24dbb30, C4<0>, C4<0>, C4<0>; +L_0x24dbd40 .delay (10000,10000,10000) L_0x24dbd40/d; +L_0x24dbe00/d .functor AND 1, L_0x24dbd40, L_0x24db840, C4<1>, C4<1>; +L_0x24dbe00 .delay (10000,10000,10000) L_0x24dbe00/d; +L_0x24dbf50/d .functor OR 1, L_0x24dbc00, L_0x24dbe00, C4<0>, C4<0>; +L_0x24dbf50 .delay (10000,10000,10000) L_0x24dbf50/d; +v0x24d6090_0 .net "a", 0 0, L_0x24dc0b0; 1 drivers +v0x24d6110_0 .net "abxor", 0 0, L_0x24dbb30; 1 drivers +v0x24d61b0_0 .net "axorand", 0 0, L_0x24dbc00; 1 drivers +v0x24d6250_0 .net "b", 0 0, L_0x24dc150; 1 drivers +v0x24d6300_0 .alias "defaultCompare", 0 0, v0x24d9610_0; +v0x24d63a0_0 .alias "out", 0 0, v0x24d97d0_0; +v0x24d6460_0 .net "xornot", 0 0, L_0x24dbd40; 1 drivers +v0x24d64e0_0 .net "xornotand", 0 0, L_0x24dbe00; 1 drivers +S_0x24d5970 .scope module, "bit5" "single_slt" 3 61, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dc250/d .functor XOR 1, L_0x24dc7c0, L_0x24dc860, C4<0>, C4<0>; +L_0x24dc250 .delay (10000,10000,10000) L_0x24dc250/d; +L_0x24dc310/d .functor AND 1, L_0x24dc7c0, L_0x24dc250, C4<1>, C4<1>; +L_0x24dc310 .delay (10000,10000,10000) L_0x24dc310/d; +L_0x24dc450/d .functor NOT 1, L_0x24dc250, C4<0>, C4<0>, C4<0>; +L_0x24dc450 .delay (10000,10000,10000) L_0x24dc450/d; +L_0x24dc510/d .functor AND 1, L_0x24dc450, L_0x24dbf50, C4<1>, C4<1>; +L_0x24dc510 .delay (10000,10000,10000) L_0x24dc510/d; +L_0x24dc660/d .functor OR 1, L_0x24dc310, L_0x24dc510, C4<0>, C4<0>; +L_0x24dc660 .delay (10000,10000,10000) L_0x24dc660/d; +v0x24d5a60_0 .net "a", 0 0, L_0x24dc7c0; 1 drivers +v0x24d5b20_0 .net "abxor", 0 0, L_0x24dc250; 1 drivers +v0x24d5bc0_0 .net "axorand", 0 0, L_0x24dc310; 1 drivers +v0x24d5c60_0 .net "b", 0 0, L_0x24dc860; 1 drivers +v0x24d5d10_0 .alias "defaultCompare", 0 0, v0x24d97d0_0; +v0x24d5db0_0 .alias "out", 0 0, v0x24d96e0_0; +v0x24d5e30_0 .net "xornot", 0 0, L_0x24dc450; 1 drivers +v0x24d5eb0_0 .net "xornotand", 0 0, L_0x24dc510; 1 drivers +S_0x24d5340 .scope module, "bit6" "single_slt" 3 62, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dc1f0/d .functor XOR 1, L_0x24dce60, L_0x24dd010, C4<0>, C4<0>; +L_0x24dc1f0 .delay (10000,10000,10000) L_0x24dc1f0/d; +L_0x24dc9b0/d .functor AND 1, L_0x24dce60, L_0x24dc1f0, C4<1>, C4<1>; +L_0x24dc9b0 .delay (10000,10000,10000) L_0x24dc9b0/d; +L_0x24dcaf0/d .functor NOT 1, L_0x24dc1f0, C4<0>, C4<0>, C4<0>; +L_0x24dcaf0 .delay (10000,10000,10000) L_0x24dcaf0/d; +L_0x24dcbb0/d .functor AND 1, L_0x24dcaf0, L_0x24dc660, C4<1>, C4<1>; +L_0x24dcbb0 .delay (10000,10000,10000) L_0x24dcbb0/d; +L_0x24dcd00/d .functor OR 1, L_0x24dc9b0, L_0x24dcbb0, C4<0>, C4<0>; +L_0x24dcd00 .delay (10000,10000,10000) L_0x24dcd00/d; +v0x24d5430_0 .net "a", 0 0, L_0x24dce60; 1 drivers +v0x24d54f0_0 .net "abxor", 0 0, L_0x24dc1f0; 1 drivers +v0x24d5590_0 .net "axorand", 0 0, L_0x24dc9b0; 1 drivers +v0x24d5630_0 .net "b", 0 0, L_0x24dd010; 1 drivers +v0x24d56e0_0 .alias "defaultCompare", 0 0, v0x24d96e0_0; +v0x24d5780_0 .alias "out", 0 0, v0x24d99a0_0; +v0x24d5800_0 .net "xornot", 0 0, L_0x24dcaf0; 1 drivers +v0x24d5880_0 .net "xornotand", 0 0, L_0x24dcbb0; 1 drivers +S_0x24d4d10 .scope module, "bit7" "single_slt" 3 63, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24db3b0/d .functor XOR 1, L_0x24dd700, L_0x24dd7a0, C4<0>, C4<0>; +L_0x24db3b0 .delay (10000,10000,10000) L_0x24db3b0/d; +L_0x24dd250/d .functor AND 1, L_0x24dd700, L_0x24db3b0, C4<1>, C4<1>; +L_0x24dd250 .delay (10000,10000,10000) L_0x24dd250/d; +L_0x24dd390/d .functor NOT 1, L_0x24db3b0, C4<0>, C4<0>, C4<0>; +L_0x24dd390 .delay (10000,10000,10000) L_0x24dd390/d; +L_0x24dd450/d .functor AND 1, L_0x24dd390, L_0x24dcd00, C4<1>, C4<1>; +L_0x24dd450 .delay (10000,10000,10000) L_0x24dd450/d; +L_0x24dd5a0/d .functor OR 1, L_0x24dd250, L_0x24dd450, C4<0>, C4<0>; +L_0x24dd5a0 .delay (10000,10000,10000) L_0x24dd5a0/d; +v0x24d4e00_0 .net "a", 0 0, L_0x24dd700; 1 drivers +v0x24d4ec0_0 .net "abxor", 0 0, L_0x24db3b0; 1 drivers +v0x24d4f60_0 .net "axorand", 0 0, L_0x24dd250; 1 drivers +v0x24d5000_0 .net "b", 0 0, L_0x24dd7a0; 1 drivers +v0x24d50b0_0 .alias "defaultCompare", 0 0, v0x24d99a0_0; +v0x24d5150_0 .alias "out", 0 0, v0x24d98a0_0; +v0x24d51d0_0 .net "xornot", 0 0, L_0x24dd390; 1 drivers +v0x24d5250_0 .net "xornotand", 0 0, L_0x24dd450; 1 drivers +S_0x24d46e0 .scope module, "bit8" "single_slt" 3 64, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dd840/d .functor XOR 1, L_0x24dde00, L_0x24ddea0, C4<0>, C4<0>; +L_0x24dd840 .delay (10000,10000,10000) L_0x24dd840/d; +L_0x24dd950/d .functor AND 1, L_0x24dde00, L_0x24dd840, C4<1>, C4<1>; +L_0x24dd950 .delay (10000,10000,10000) L_0x24dd950/d; +L_0x24dda90/d .functor NOT 1, L_0x24dd840, C4<0>, C4<0>, C4<0>; +L_0x24dda90 .delay (10000,10000,10000) L_0x24dda90/d; +L_0x24ddb50/d .functor AND 1, L_0x24dda90, L_0x24dd5a0, C4<1>, C4<1>; +L_0x24ddb50 .delay (10000,10000,10000) L_0x24ddb50/d; +L_0x24ddca0/d .functor OR 1, L_0x24dd950, L_0x24ddb50, C4<0>, C4<0>; +L_0x24ddca0 .delay (10000,10000,10000) L_0x24ddca0/d; +v0x24d47d0_0 .net "a", 0 0, L_0x24dde00; 1 drivers +v0x24d4890_0 .net "abxor", 0 0, L_0x24dd840; 1 drivers +v0x24d4930_0 .net "axorand", 0 0, L_0x24dd950; 1 drivers +v0x24d49d0_0 .net "b", 0 0, L_0x24ddea0; 1 drivers +v0x24d4a80_0 .alias "defaultCompare", 0 0, v0x24d98a0_0; +v0x24d4b20_0 .alias "out", 0 0, v0x24d9b80_0; +v0x24d4ba0_0 .net "xornot", 0 0, L_0x24dda90; 1 drivers +v0x24d4c20_0 .net "xornotand", 0 0, L_0x24ddb50; 1 drivers +S_0x24d40b0 .scope module, "bit9" "single_slt" 3 65, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24db280/d .functor XOR 1, L_0x24de520, L_0x24de5c0, C4<0>, C4<0>; +L_0x24db280 .delay (10000,10000,10000) L_0x24db280/d; +L_0x24de070/d .functor AND 1, L_0x24de520, L_0x24db280, C4<1>, C4<1>; +L_0x24de070 .delay (10000,10000,10000) L_0x24de070/d; +L_0x24de1b0/d .functor NOT 1, L_0x24db280, C4<0>, C4<0>, C4<0>; +L_0x24de1b0 .delay (10000,10000,10000) L_0x24de1b0/d; +L_0x24de270/d .functor AND 1, L_0x24de1b0, L_0x24ddca0, C4<1>, C4<1>; +L_0x24de270 .delay (10000,10000,10000) L_0x24de270/d; +L_0x24de3c0/d .functor OR 1, L_0x24de070, L_0x24de270, C4<0>, C4<0>; +L_0x24de3c0 .delay (10000,10000,10000) L_0x24de3c0/d; +v0x24d41a0_0 .net "a", 0 0, L_0x24de520; 1 drivers +v0x24d4260_0 .net "abxor", 0 0, L_0x24db280; 1 drivers +v0x24d4300_0 .net "axorand", 0 0, L_0x24de070; 1 drivers +v0x24d43a0_0 .net "b", 0 0, L_0x24de5c0; 1 drivers +v0x24d4450_0 .alias "defaultCompare", 0 0, v0x24d9b80_0; +v0x24d44f0_0 .alias "out", 0 0, v0x24d9a70_0; +v0x24d4570_0 .net "xornot", 0 0, L_0x24de1b0; 1 drivers +v0x24d45f0_0 .net "xornotand", 0 0, L_0x24de270; 1 drivers +S_0x24d3a80 .scope module, "bit10" "single_slt" 3 66, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24ddf40/d .functor XOR 1, L_0x24dec30, L_0x24decd0, C4<0>, C4<0>; +L_0x24ddf40 .delay (10000,10000,10000) L_0x24ddf40/d; +L_0x24de7a0/d .functor AND 1, L_0x24dec30, L_0x24ddf40, C4<1>, C4<1>; +L_0x24de7a0 .delay (10000,10000,10000) L_0x24de7a0/d; +L_0x24de8e0/d .functor NOT 1, L_0x24ddf40, C4<0>, C4<0>, C4<0>; +L_0x24de8e0 .delay (10000,10000,10000) L_0x24de8e0/d; +L_0x24de980/d .functor AND 1, L_0x24de8e0, L_0x24de3c0, C4<1>, C4<1>; +L_0x24de980 .delay (10000,10000,10000) L_0x24de980/d; +L_0x24dead0/d .functor OR 1, L_0x24de7a0, L_0x24de980, C4<0>, C4<0>; +L_0x24dead0 .delay (10000,10000,10000) L_0x24dead0/d; +v0x24d3b70_0 .net "a", 0 0, L_0x24dec30; 1 drivers +v0x24d3c30_0 .net "abxor", 0 0, L_0x24ddf40; 1 drivers +v0x24d3cd0_0 .net "axorand", 0 0, L_0x24de7a0; 1 drivers +v0x24d3d70_0 .net "b", 0 0, L_0x24decd0; 1 drivers +v0x24d3e20_0 .alias "defaultCompare", 0 0, v0x24d9a70_0; +v0x24d3ec0_0 .alias "out", 0 0, v0x24d82e0_0; +v0x24d3f40_0 .net "xornot", 0 0, L_0x24de8e0; 1 drivers +v0x24d3fc0_0 .net "xornotand", 0 0, L_0x24de980; 1 drivers +S_0x24d3450 .scope module, "bit11" "single_slt" 3 67, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24de660/d .functor XOR 1, L_0x24df350, L_0x24df3f0, C4<0>, C4<0>; +L_0x24de660 .delay (10000,10000,10000) L_0x24de660/d; +L_0x24deec0/d .functor AND 1, L_0x24df350, L_0x24de660, C4<1>, C4<1>; +L_0x24deec0 .delay (10000,10000,10000) L_0x24deec0/d; +L_0x24df000/d .functor NOT 1, L_0x24de660, C4<0>, C4<0>, C4<0>; +L_0x24df000 .delay (10000,10000,10000) L_0x24df000/d; +L_0x24df0a0/d .functor AND 1, L_0x24df000, L_0x24dead0, C4<1>, C4<1>; +L_0x24df0a0 .delay (10000,10000,10000) L_0x24df0a0/d; +L_0x24df1f0/d .functor OR 1, L_0x24deec0, L_0x24df0a0, C4<0>, C4<0>; +L_0x24df1f0 .delay (10000,10000,10000) L_0x24df1f0/d; +v0x24d3540_0 .net "a", 0 0, L_0x24df350; 1 drivers +v0x24d3600_0 .net "abxor", 0 0, L_0x24de660; 1 drivers +v0x24d36a0_0 .net "axorand", 0 0, L_0x24deec0; 1 drivers +v0x24d3740_0 .net "b", 0 0, L_0x24df3f0; 1 drivers +v0x24d37f0_0 .alias "defaultCompare", 0 0, v0x24d82e0_0; +v0x24d3890_0 .alias "out", 0 0, v0x24d83b0_0; +v0x24d3910_0 .net "xornot", 0 0, L_0x24df000; 1 drivers +v0x24d3990_0 .net "xornotand", 0 0, L_0x24df0a0; 1 drivers +S_0x24d2e20 .scope module, "bit12" "single_slt" 3 68, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24ded70/d .functor XOR 1, L_0x24dfa60, L_0x24dfb00, C4<0>, C4<0>; +L_0x24ded70 .delay (10000,10000,10000) L_0x24ded70/d; +L_0x24df5b0/d .functor AND 1, L_0x24dfa60, L_0x24ded70, C4<1>, C4<1>; +L_0x24df5b0 .delay (10000,10000,10000) L_0x24df5b0/d; +L_0x24df6f0/d .functor NOT 1, L_0x24ded70, C4<0>, C4<0>, C4<0>; +L_0x24df6f0 .delay (10000,10000,10000) L_0x24df6f0/d; +L_0x24df7b0/d .functor AND 1, L_0x24df6f0, L_0x24df1f0, C4<1>, C4<1>; +L_0x24df7b0 .delay (10000,10000,10000) L_0x24df7b0/d; +L_0x24df900/d .functor OR 1, L_0x24df5b0, L_0x24df7b0, C4<0>, C4<0>; +L_0x24df900 .delay (10000,10000,10000) L_0x24df900/d; +v0x24d2f10_0 .net "a", 0 0, L_0x24dfa60; 1 drivers +v0x24d2fd0_0 .net "abxor", 0 0, L_0x24ded70; 1 drivers +v0x24d3070_0 .net "axorand", 0 0, L_0x24df5b0; 1 drivers +v0x24d3110_0 .net "b", 0 0, L_0x24dfb00; 1 drivers +v0x24d31c0_0 .alias "defaultCompare", 0 0, v0x24d83b0_0; +v0x24d3260_0 .alias "out", 0 0, v0x24d84d0_0; +v0x24d32e0_0 .net "xornot", 0 0, L_0x24df6f0; 1 drivers +v0x24d3360_0 .net "xornotand", 0 0, L_0x24df7b0; 1 drivers +S_0x24d27f0 .scope module, "bit13" "single_slt" 3 69, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24df490/d .functor XOR 1, L_0x24e0180, L_0x24e0220, C4<0>, C4<0>; +L_0x24df490 .delay (10000,10000,10000) L_0x24df490/d; +L_0x24dfcd0/d .functor AND 1, L_0x24e0180, L_0x24df490, C4<1>, C4<1>; +L_0x24dfcd0 .delay (10000,10000,10000) L_0x24dfcd0/d; +L_0x24dfe10/d .functor NOT 1, L_0x24df490, C4<0>, C4<0>, C4<0>; +L_0x24dfe10 .delay (10000,10000,10000) L_0x24dfe10/d; +L_0x24dfed0/d .functor AND 1, L_0x24dfe10, L_0x24df900, C4<1>, C4<1>; +L_0x24dfed0 .delay (10000,10000,10000) L_0x24dfed0/d; +L_0x24e0020/d .functor OR 1, L_0x24dfcd0, L_0x24dfed0, C4<0>, C4<0>; +L_0x24e0020 .delay (10000,10000,10000) L_0x24e0020/d; +v0x24d28e0_0 .net "a", 0 0, L_0x24e0180; 1 drivers +v0x24d29a0_0 .net "abxor", 0 0, L_0x24df490; 1 drivers +v0x24d2a40_0 .net "axorand", 0 0, L_0x24dfcd0; 1 drivers +v0x24d2ae0_0 .net "b", 0 0, L_0x24e0220; 1 drivers +v0x24d2b90_0 .alias "defaultCompare", 0 0, v0x24d84d0_0; +v0x24d2c30_0 .alias "out", 0 0, v0x24d85a0_0; +v0x24d2cb0_0 .net "xornot", 0 0, L_0x24dfe10; 1 drivers +v0x24d2d30_0 .net "xornotand", 0 0, L_0x24dfed0; 1 drivers +S_0x24d21c0 .scope module, "bit14" "single_slt" 3 70, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dfba0/d .functor XOR 1, L_0x24e0890, L_0x24dcf00, C4<0>, C4<0>; +L_0x24dfba0 .delay (10000,10000,10000) L_0x24dfba0/d; +L_0x24e0400/d .functor AND 1, L_0x24e0890, L_0x24dfba0, C4<1>, C4<1>; +L_0x24e0400 .delay (10000,10000,10000) L_0x24e0400/d; +L_0x24e0540/d .functor NOT 1, L_0x24dfba0, C4<0>, C4<0>, C4<0>; +L_0x24e0540 .delay (10000,10000,10000) L_0x24e0540/d; +L_0x24e05e0/d .functor AND 1, L_0x24e0540, L_0x24e0020, C4<1>, C4<1>; +L_0x24e05e0 .delay (10000,10000,10000) L_0x24e05e0/d; +L_0x24e0730/d .functor OR 1, L_0x24e0400, L_0x24e05e0, C4<0>, C4<0>; +L_0x24e0730 .delay (10000,10000,10000) L_0x24e0730/d; +v0x24d22b0_0 .net "a", 0 0, L_0x24e0890; 1 drivers +v0x24d2370_0 .net "abxor", 0 0, L_0x24dfba0; 1 drivers +v0x24d2410_0 .net "axorand", 0 0, L_0x24e0400; 1 drivers +v0x24d24b0_0 .net "b", 0 0, L_0x24dcf00; 1 drivers +v0x24d2560_0 .alias "defaultCompare", 0 0, v0x24d85a0_0; +v0x24d2600_0 .alias "out", 0 0, v0x24d8680_0; +v0x24d2680_0 .net "xornot", 0 0, L_0x24e0540; 1 drivers +v0x24d2700_0 .net "xornotand", 0 0, L_0x24e05e0; 1 drivers +S_0x24d1b90 .scope module, "bit15" "single_slt" 3 71, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dcfa0/d .functor XOR 1, L_0x24e11c0, L_0x24e1260, C4<0>, C4<0>; +L_0x24dcfa0 .delay (10000,10000,10000) L_0x24dcfa0/d; +L_0x24e0d50/d .functor AND 1, L_0x24e11c0, L_0x24dcfa0, C4<1>, C4<1>; +L_0x24e0d50 .delay (10000,10000,10000) L_0x24e0d50/d; +L_0x24e0e50/d .functor NOT 1, L_0x24dcfa0, C4<0>, C4<0>, C4<0>; +L_0x24e0e50 .delay (10000,10000,10000) L_0x24e0e50/d; +L_0x24e0f10/d .functor AND 1, L_0x24e0e50, L_0x24e0730, C4<1>, C4<1>; +L_0x24e0f10 .delay (10000,10000,10000) L_0x24e0f10/d; +L_0x24e1060/d .functor OR 1, L_0x24e0d50, L_0x24e0f10, C4<0>, C4<0>; +L_0x24e1060 .delay (10000,10000,10000) L_0x24e1060/d; +v0x24d1c80_0 .net "a", 0 0, L_0x24e11c0; 1 drivers +v0x24d1d40_0 .net "abxor", 0 0, L_0x24dcfa0; 1 drivers +v0x24d1de0_0 .net "axorand", 0 0, L_0x24e0d50; 1 drivers +v0x24d1e80_0 .net "b", 0 0, L_0x24e1260; 1 drivers +v0x24d1f30_0 .alias "defaultCompare", 0 0, v0x24d8680_0; +v0x24d1fd0_0 .alias "out", 0 0, v0x24d8750_0; +v0x24d2050_0 .net "xornot", 0 0, L_0x24e0e50; 1 drivers +v0x24d20d0_0 .net "xornotand", 0 0, L_0x24e0f10; 1 drivers +S_0x24d1560 .scope module, "bit16" "single_slt" 3 72, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e1300/d .functor XOR 1, L_0x24e18c0, L_0x24e1960, C4<0>, C4<0>; +L_0x24e1300 .delay (10000,10000,10000) L_0x24e1300/d; +L_0x24e1410/d .functor AND 1, L_0x24e18c0, L_0x24e1300, C4<1>, C4<1>; +L_0x24e1410 .delay (10000,10000,10000) L_0x24e1410/d; +L_0x24e1550/d .functor NOT 1, L_0x24e1300, C4<0>, C4<0>, C4<0>; +L_0x24e1550 .delay (10000,10000,10000) L_0x24e1550/d; +L_0x24e1610/d .functor AND 1, L_0x24e1550, L_0x24e1060, C4<1>, C4<1>; +L_0x24e1610 .delay (10000,10000,10000) L_0x24e1610/d; +L_0x24e1760/d .functor OR 1, L_0x24e1410, L_0x24e1610, C4<0>, C4<0>; +L_0x24e1760 .delay (10000,10000,10000) L_0x24e1760/d; +v0x24d1650_0 .net "a", 0 0, L_0x24e18c0; 1 drivers +v0x24d1710_0 .net "abxor", 0 0, L_0x24e1300; 1 drivers +v0x24d17b0_0 .net "axorand", 0 0, L_0x24e1410; 1 drivers +v0x24d1850_0 .net "b", 0 0, L_0x24e1960; 1 drivers +v0x24d1900_0 .alias "defaultCompare", 0 0, v0x24d8750_0; +v0x24d19a0_0 .alias "out", 0 0, v0x24d8890_0; +v0x24d1a20_0 .net "xornot", 0 0, L_0x24e1550; 1 drivers +v0x24d1aa0_0 .net "xornotand", 0 0, L_0x24e1610; 1 drivers +S_0x24d0f30 .scope module, "bit17" "single_slt" 3 73, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24dd0b0/d .functor XOR 1, L_0x24e1fd0, L_0x24e2070, C4<0>, C4<0>; +L_0x24dd0b0 .delay (10000,10000,10000) L_0x24dd0b0/d; +L_0x24e1b20/d .functor AND 1, L_0x24e1fd0, L_0x24dd0b0, C4<1>, C4<1>; +L_0x24e1b20 .delay (10000,10000,10000) L_0x24e1b20/d; +L_0x24e1c60/d .functor NOT 1, L_0x24dd0b0, C4<0>, C4<0>, C4<0>; +L_0x24e1c60 .delay (10000,10000,10000) L_0x24e1c60/d; +L_0x24e1d20/d .functor AND 1, L_0x24e1c60, L_0x24e1760, C4<1>, C4<1>; +L_0x24e1d20 .delay (10000,10000,10000) L_0x24e1d20/d; +L_0x24e1e70/d .functor OR 1, L_0x24e1b20, L_0x24e1d20, C4<0>, C4<0>; +L_0x24e1e70 .delay (10000,10000,10000) L_0x24e1e70/d; +v0x24d1020_0 .net "a", 0 0, L_0x24e1fd0; 1 drivers +v0x24d10e0_0 .net "abxor", 0 0, L_0x24dd0b0; 1 drivers +v0x24d1180_0 .net "axorand", 0 0, L_0x24e1b20; 1 drivers +v0x24d1220_0 .net "b", 0 0, L_0x24e2070; 1 drivers +v0x24d12d0_0 .alias "defaultCompare", 0 0, v0x24d8890_0; +v0x24d1370_0 .alias "out", 0 0, v0x24d8960_0; +v0x24d13f0_0 .net "xornot", 0 0, L_0x24e1c60; 1 drivers +v0x24d1470_0 .net "xornotand", 0 0, L_0x24e1d20; 1 drivers +S_0x24d0900 .scope module, "bit18" "single_slt" 3 74, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e1a00/d .functor XOR 1, L_0x24e26e0, L_0x24e2780, C4<0>, C4<0>; +L_0x24e1a00 .delay (10000,10000,10000) L_0x24e1a00/d; +L_0x24e1ac0/d .functor AND 1, L_0x24e26e0, L_0x24e1a00, C4<1>, C4<1>; +L_0x24e1ac0 .delay (10000,10000,10000) L_0x24e1ac0/d; +L_0x24e2370/d .functor NOT 1, L_0x24e1a00, C4<0>, C4<0>, C4<0>; +L_0x24e2370 .delay (10000,10000,10000) L_0x24e2370/d; +L_0x24e2430/d .functor AND 1, L_0x24e2370, L_0x24e1e70, C4<1>, C4<1>; +L_0x24e2430 .delay (10000,10000,10000) L_0x24e2430/d; +L_0x24e2580/d .functor OR 1, L_0x24e1ac0, L_0x24e2430, C4<0>, C4<0>; +L_0x24e2580 .delay (10000,10000,10000) L_0x24e2580/d; +v0x24d09f0_0 .net "a", 0 0, L_0x24e26e0; 1 drivers +v0x24d0ab0_0 .net "abxor", 0 0, L_0x24e1a00; 1 drivers +v0x24d0b50_0 .net "axorand", 0 0, L_0x24e1ac0; 1 drivers +v0x24d0bf0_0 .net "b", 0 0, L_0x24e2780; 1 drivers +v0x24d0ca0_0 .alias "defaultCompare", 0 0, v0x24d8960_0; +v0x24d0d40_0 .alias "out", 0 0, v0x24d8ab0_0; +v0x24d0dc0_0 .net "xornot", 0 0, L_0x24e2370; 1 drivers +v0x24d0e40_0 .net "xornotand", 0 0, L_0x24e2430; 1 drivers +S_0x24d02d0 .scope module, "bit19" "single_slt" 3 75, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e2110/d .functor XOR 1, L_0x24e2df0, L_0x24e2e90, C4<0>, C4<0>; +L_0x24e2110 .delay (10000,10000,10000) L_0x24e2110/d; +L_0x24e2960/d .functor AND 1, L_0x24e2df0, L_0x24e2110, C4<1>, C4<1>; +L_0x24e2960 .delay (10000,10000,10000) L_0x24e2960/d; +L_0x24e2aa0/d .functor NOT 1, L_0x24e2110, C4<0>, C4<0>, C4<0>; +L_0x24e2aa0 .delay (10000,10000,10000) L_0x24e2aa0/d; +L_0x24e2b40/d .functor AND 1, L_0x24e2aa0, L_0x24e2580, C4<1>, C4<1>; +L_0x24e2b40 .delay (10000,10000,10000) L_0x24e2b40/d; +L_0x24e2c90/d .functor OR 1, L_0x24e2960, L_0x24e2b40, C4<0>, C4<0>; +L_0x24e2c90 .delay (10000,10000,10000) L_0x24e2c90/d; +v0x24d03c0_0 .net "a", 0 0, L_0x24e2df0; 1 drivers +v0x24d0480_0 .net "abxor", 0 0, L_0x24e2110; 1 drivers +v0x24d0520_0 .net "axorand", 0 0, L_0x24e2960; 1 drivers +v0x24d05c0_0 .net "b", 0 0, L_0x24e2e90; 1 drivers +v0x24d0670_0 .alias "defaultCompare", 0 0, v0x24d8ab0_0; +v0x24d0710_0 .alias "out", 0 0, v0x24d8b80_0; +v0x24d0790_0 .net "xornot", 0 0, L_0x24e2aa0; 1 drivers +v0x24d0810_0 .net "xornotand", 0 0, L_0x24e2b40; 1 drivers +S_0x24cfca0 .scope module, "bit20" "single_slt" 3 76, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e2820/d .functor XOR 1, L_0x24e3510, L_0x24e35b0, C4<0>, C4<0>; +L_0x24e2820 .delay (10000,10000,10000) L_0x24e2820/d; +L_0x24e3080/d .functor AND 1, L_0x24e3510, L_0x24e2820, C4<1>, C4<1>; +L_0x24e3080 .delay (10000,10000,10000) L_0x24e3080/d; +L_0x24e31c0/d .functor NOT 1, L_0x24e2820, C4<0>, C4<0>, C4<0>; +L_0x24e31c0 .delay (10000,10000,10000) L_0x24e31c0/d; +L_0x24e3260/d .functor AND 1, L_0x24e31c0, L_0x24e2c90, C4<1>, C4<1>; +L_0x24e3260 .delay (10000,10000,10000) L_0x24e3260/d; +L_0x24e33b0/d .functor OR 1, L_0x24e3080, L_0x24e3260, C4<0>, C4<0>; +L_0x24e33b0 .delay (10000,10000,10000) L_0x24e33b0/d; +v0x24cfd90_0 .net "a", 0 0, L_0x24e3510; 1 drivers +v0x24cfe50_0 .net "abxor", 0 0, L_0x24e2820; 1 drivers +v0x24cfef0_0 .net "axorand", 0 0, L_0x24e3080; 1 drivers +v0x24cff90_0 .net "b", 0 0, L_0x24e35b0; 1 drivers +v0x24d0040_0 .alias "defaultCompare", 0 0, v0x24d8b80_0; +v0x24d00e0_0 .alias "out", 0 0, v0x24d8d30_0; +v0x24d0160_0 .net "xornot", 0 0, L_0x24e31c0; 1 drivers +v0x24d01e0_0 .net "xornotand", 0 0, L_0x24e3260; 1 drivers +S_0x24cf670 .scope module, "bit21" "single_slt" 3 77, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e2f30/d .functor XOR 1, L_0x24e3c20, L_0x24e3cc0, C4<0>, C4<0>; +L_0x24e2f30 .delay (10000,10000,10000) L_0x24e2f30/d; +L_0x24e37b0/d .functor AND 1, L_0x24e3c20, L_0x24e2f30, C4<1>, C4<1>; +L_0x24e37b0 .delay (10000,10000,10000) L_0x24e37b0/d; +L_0x24e38b0/d .functor NOT 1, L_0x24e2f30, C4<0>, C4<0>, C4<0>; +L_0x24e38b0 .delay (10000,10000,10000) L_0x24e38b0/d; +L_0x24e3970/d .functor AND 1, L_0x24e38b0, L_0x24e33b0, C4<1>, C4<1>; +L_0x24e3970 .delay (10000,10000,10000) L_0x24e3970/d; +L_0x24e3ac0/d .functor OR 1, L_0x24e37b0, L_0x24e3970, C4<0>, C4<0>; +L_0x24e3ac0 .delay (10000,10000,10000) L_0x24e3ac0/d; +v0x24cf760_0 .net "a", 0 0, L_0x24e3c20; 1 drivers +v0x24cf820_0 .net "abxor", 0 0, L_0x24e2f30; 1 drivers +v0x24cf8c0_0 .net "axorand", 0 0, L_0x24e37b0; 1 drivers +v0x24cf960_0 .net "b", 0 0, L_0x24e3cc0; 1 drivers +v0x24cfa10_0 .alias "defaultCompare", 0 0, v0x24d8d30_0; +v0x24cfab0_0 .alias "out", 0 0, v0x24d8e50_0; +v0x24cfb30_0 .net "xornot", 0 0, L_0x24e38b0; 1 drivers +v0x24cfbb0_0 .net "xornotand", 0 0, L_0x24e3970; 1 drivers +S_0x24cf040 .scope module, "bit22" "single_slt" 3 78, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e3650/d .functor XOR 1, L_0x24e4330, L_0x24e43d0, C4<0>, C4<0>; +L_0x24e3650 .delay (10000,10000,10000) L_0x24e3650/d; +L_0x24e3ed0/d .functor AND 1, L_0x24e4330, L_0x24e3650, C4<1>, C4<1>; +L_0x24e3ed0 .delay (10000,10000,10000) L_0x24e3ed0/d; +L_0x24e3fc0/d .functor NOT 1, L_0x24e3650, C4<0>, C4<0>, C4<0>; +L_0x24e3fc0 .delay (10000,10000,10000) L_0x24e3fc0/d; +L_0x24e4080/d .functor AND 1, L_0x24e3fc0, L_0x24e3ac0, C4<1>, C4<1>; +L_0x24e4080 .delay (10000,10000,10000) L_0x24e4080/d; +L_0x24e41d0/d .functor OR 1, L_0x24e3ed0, L_0x24e4080, C4<0>, C4<0>; +L_0x24e41d0 .delay (10000,10000,10000) L_0x24e41d0/d; +v0x24cf130_0 .net "a", 0 0, L_0x24e4330; 1 drivers +v0x24cf1f0_0 .net "abxor", 0 0, L_0x24e3650; 1 drivers +v0x24cf290_0 .net "axorand", 0 0, L_0x24e3ed0; 1 drivers +v0x24cf330_0 .net "b", 0 0, L_0x24e43d0; 1 drivers +v0x24cf3e0_0 .alias "defaultCompare", 0 0, v0x24d8e50_0; +v0x24cf480_0 .alias "out", 0 0, v0x24d8f20_0; +v0x24cf500_0 .net "xornot", 0 0, L_0x24e3fc0; 1 drivers +v0x24cf580_0 .net "xornotand", 0 0, L_0x24e4080; 1 drivers +S_0x24cea10 .scope module, "bit23" "single_slt" 3 79, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e3d60/d .functor XOR 1, L_0x24e4a40, L_0x24e4ae0, C4<0>, C4<0>; +L_0x24e3d60 .delay (10000,10000,10000) L_0x24e3d60/d; +L_0x24e3e70/d .functor AND 1, L_0x24e4a40, L_0x24e3d60, C4<1>, C4<1>; +L_0x24e3e70 .delay (10000,10000,10000) L_0x24e3e70/d; +L_0x24e46d0/d .functor NOT 1, L_0x24e3d60, C4<0>, C4<0>, C4<0>; +L_0x24e46d0 .delay (10000,10000,10000) L_0x24e46d0/d; +L_0x24e4790/d .functor AND 1, L_0x24e46d0, L_0x24e41d0, C4<1>, C4<1>; +L_0x24e4790 .delay (10000,10000,10000) L_0x24e4790/d; +L_0x24e48e0/d .functor OR 1, L_0x24e3e70, L_0x24e4790, C4<0>, C4<0>; +L_0x24e48e0 .delay (10000,10000,10000) L_0x24e48e0/d; +v0x24ceb00_0 .net "a", 0 0, L_0x24e4a40; 1 drivers +v0x24cebc0_0 .net "abxor", 0 0, L_0x24e3d60; 1 drivers +v0x24cec60_0 .net "axorand", 0 0, L_0x24e3e70; 1 drivers +v0x24ced00_0 .net "b", 0 0, L_0x24e4ae0; 1 drivers +v0x24cedb0_0 .alias "defaultCompare", 0 0, v0x24d8f20_0; +v0x24cee50_0 .alias "out", 0 0, v0x24d9050_0; +v0x24ceed0_0 .net "xornot", 0 0, L_0x24e46d0; 1 drivers +v0x24cef50_0 .net "xornotand", 0 0, L_0x24e4790; 1 drivers +S_0x24ce3e0 .scope module, "bit24" "single_slt" 3 80, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e4470/d .functor XOR 1, L_0x24e5160, L_0x24e5200, C4<0>, C4<0>; +L_0x24e4470 .delay (10000,10000,10000) L_0x24e4470/d; +L_0x24e4580/d .functor AND 1, L_0x24e5160, L_0x24e4470, C4<1>, C4<1>; +L_0x24e4580 .delay (10000,10000,10000) L_0x24e4580/d; +L_0x24e4df0/d .functor NOT 1, L_0x24e4470, C4<0>, C4<0>, C4<0>; +L_0x24e4df0 .delay (10000,10000,10000) L_0x24e4df0/d; +L_0x24e4eb0/d .functor AND 1, L_0x24e4df0, L_0x24e48e0, C4<1>, C4<1>; +L_0x24e4eb0 .delay (10000,10000,10000) L_0x24e4eb0/d; +L_0x24e5000/d .functor OR 1, L_0x24e4580, L_0x24e4eb0, C4<0>, C4<0>; +L_0x24e5000 .delay (10000,10000,10000) L_0x24e5000/d; +v0x24ce4d0_0 .net "a", 0 0, L_0x24e5160; 1 drivers +v0x24ce590_0 .net "abxor", 0 0, L_0x24e4470; 1 drivers +v0x24ce630_0 .net "axorand", 0 0, L_0x24e4580; 1 drivers +v0x24ce6d0_0 .net "b", 0 0, L_0x24e5200; 1 drivers +v0x24ce780_0 .alias "defaultCompare", 0 0, v0x24d9050_0; +v0x24ce820_0 .alias "out", 0 0, v0x24d90d0_0; +v0x24ce8a0_0 .net "xornot", 0 0, L_0x24e4df0; 1 drivers +v0x24ce920_0 .net "xornotand", 0 0, L_0x24e4eb0; 1 drivers +S_0x24cddb0 .scope module, "bit25" "single_slt" 3 81, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e4b80/d .functor XOR 1, L_0x24e5870, L_0x24e5910, C4<0>, C4<0>; +L_0x24e4b80 .delay (10000,10000,10000) L_0x24e4b80/d; +L_0x24e4c90/d .functor AND 1, L_0x24e5870, L_0x24e4b80, C4<1>, C4<1>; +L_0x24e4c90 .delay (10000,10000,10000) L_0x24e4c90/d; +L_0x24e5520/d .functor NOT 1, L_0x24e4b80, C4<0>, C4<0>, C4<0>; +L_0x24e5520 .delay (10000,10000,10000) L_0x24e5520/d; +L_0x24e55c0/d .functor AND 1, L_0x24e5520, L_0x24e5000, C4<1>, C4<1>; +L_0x24e55c0 .delay (10000,10000,10000) L_0x24e55c0/d; +L_0x24e5710/d .functor OR 1, L_0x24e4c90, L_0x24e55c0, C4<0>, C4<0>; +L_0x24e5710 .delay (10000,10000,10000) L_0x24e5710/d; +v0x24cdea0_0 .net "a", 0 0, L_0x24e5870; 1 drivers +v0x24cdf60_0 .net "abxor", 0 0, L_0x24e4b80; 1 drivers +v0x24ce000_0 .net "axorand", 0 0, L_0x24e4c90; 1 drivers +v0x24ce0a0_0 .net "b", 0 0, L_0x24e5910; 1 drivers +v0x24ce150_0 .alias "defaultCompare", 0 0, v0x24d90d0_0; +v0x24ce1f0_0 .alias "out", 0 0, v0x24d9210_0; +v0x24ce270_0 .net "xornot", 0 0, L_0x24e5520; 1 drivers +v0x24ce2f0_0 .net "xornotand", 0 0, L_0x24e55c0; 1 drivers +S_0x24cd780 .scope module, "bit26" "single_slt" 3 82, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e52a0/d .functor XOR 1, L_0x24e5f80, L_0x24e6020, C4<0>, C4<0>; +L_0x24e52a0 .delay (10000,10000,10000) L_0x24e52a0/d; +L_0x24e53b0/d .functor AND 1, L_0x24e5f80, L_0x24e52a0, C4<1>, C4<1>; +L_0x24e53b0 .delay (10000,10000,10000) L_0x24e53b0/d; +L_0x24e5c40/d .functor NOT 1, L_0x24e52a0, C4<0>, C4<0>, C4<0>; +L_0x24e5c40 .delay (10000,10000,10000) L_0x24e5c40/d; +L_0x24e5ce0/d .functor AND 1, L_0x24e5c40, L_0x24e5710, C4<1>, C4<1>; +L_0x24e5ce0 .delay (10000,10000,10000) L_0x24e5ce0/d; +L_0x24d8ff0/d .functor OR 1, L_0x24e53b0, L_0x24e5ce0, C4<0>, C4<0>; +L_0x24d8ff0 .delay (10000,10000,10000) L_0x24d8ff0/d; +v0x24cd870_0 .net "a", 0 0, L_0x24e5f80; 1 drivers +v0x24cd930_0 .net "abxor", 0 0, L_0x24e52a0; 1 drivers +v0x24cd9d0_0 .net "axorand", 0 0, L_0x24e53b0; 1 drivers +v0x24cda70_0 .net "b", 0 0, L_0x24e6020; 1 drivers +v0x24cdb20_0 .alias "defaultCompare", 0 0, v0x24d9210_0; +v0x24cdbc0_0 .alias "out", 0 0, v0x24d9290_0; +v0x24cdc40_0 .net "xornot", 0 0, L_0x24e5c40; 1 drivers +v0x24cdcc0_0 .net "xornotand", 0 0, L_0x24e5ce0; 1 drivers +S_0x24cd150 .scope module, "bit27" "single_slt" 3 83, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e59b0/d .functor XOR 1, L_0x24e6690, L_0x24e6730, C4<0>, C4<0>; +L_0x24e59b0 .delay (10000,10000,10000) L_0x24e59b0/d; +L_0x24e5ac0/d .functor AND 1, L_0x24e6690, L_0x24e59b0, C4<1>, C4<1>; +L_0x24e5ac0 .delay (10000,10000,10000) L_0x24e5ac0/d; +L_0x24e6320/d .functor NOT 1, L_0x24e59b0, C4<0>, C4<0>, C4<0>; +L_0x24e6320 .delay (10000,10000,10000) L_0x24e6320/d; +L_0x24e63e0/d .functor AND 1, L_0x24e6320, L_0x24d8ff0, C4<1>, C4<1>; +L_0x24e63e0 .delay (10000,10000,10000) L_0x24e63e0/d; +L_0x24e6530/d .functor OR 1, L_0x24e5ac0, L_0x24e63e0, C4<0>, C4<0>; +L_0x24e6530 .delay (10000,10000,10000) L_0x24e6530/d; +v0x24cd240_0 .net "a", 0 0, L_0x24e6690; 1 drivers +v0x24cd300_0 .net "abxor", 0 0, L_0x24e59b0; 1 drivers +v0x24cd3a0_0 .net "axorand", 0 0, L_0x24e5ac0; 1 drivers +v0x24cd440_0 .net "b", 0 0, L_0x24e6730; 1 drivers +v0x24cd4f0_0 .alias "defaultCompare", 0 0, v0x24d9290_0; +v0x24cd590_0 .alias "out", 0 0, v0x24d93e0_0; +v0x24cd610_0 .net "xornot", 0 0, L_0x24e6320; 1 drivers +v0x24cd690_0 .net "xornotand", 0 0, L_0x24e63e0; 1 drivers +S_0x24ccb20 .scope module, "bit28" "single_slt" 3 84, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e60c0/d .functor XOR 1, L_0x24e6dd0, L_0x24e6e70, C4<0>, C4<0>; +L_0x24e60c0 .delay (10000,10000,10000) L_0x24e60c0/d; +L_0x24e61d0/d .functor AND 1, L_0x24e6dd0, L_0x24e60c0, C4<1>, C4<1>; +L_0x24e61d0 .delay (10000,10000,10000) L_0x24e61d0/d; +L_0x24e6a80/d .functor NOT 1, L_0x24e60c0, C4<0>, C4<0>, C4<0>; +L_0x24e6a80 .delay (10000,10000,10000) L_0x24e6a80/d; +L_0x24e6b20/d .functor AND 1, L_0x24e6a80, L_0x24e6530, C4<1>, C4<1>; +L_0x24e6b20 .delay (10000,10000,10000) L_0x24e6b20/d; +L_0x24e6c70/d .functor OR 1, L_0x24e61d0, L_0x24e6b20, C4<0>, C4<0>; +L_0x24e6c70 .delay (10000,10000,10000) L_0x24e6c70/d; +v0x24ccc10_0 .net "a", 0 0, L_0x24e6dd0; 1 drivers +v0x24cccd0_0 .net "abxor", 0 0, L_0x24e60c0; 1 drivers +v0x24ccd70_0 .net "axorand", 0 0, L_0x24e61d0; 1 drivers +v0x24cce10_0 .net "b", 0 0, L_0x24e6e70; 1 drivers +v0x24ccec0_0 .alias "defaultCompare", 0 0, v0x24d93e0_0; +v0x24ccf60_0 .alias "out", 0 0, v0x24d9460_0; +v0x24ccfe0_0 .net "xornot", 0 0, L_0x24e6a80; 1 drivers +v0x24cd060_0 .net "xornotand", 0 0, L_0x24e6b20; 1 drivers +S_0x24cc4f0 .scope module, "bit29" "single_slt" 3 85, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e67d0/d .functor XOR 1, L_0x24e7520, L_0x24e75c0, C4<0>, C4<0>; +L_0x24e67d0 .delay (10000,10000,10000) L_0x24e67d0/d; +L_0x24e68e0/d .functor AND 1, L_0x24e7520, L_0x24e67d0, C4<1>, C4<1>; +L_0x24e68e0 .delay (10000,10000,10000) L_0x24e68e0/d; +L_0x24e71d0/d .functor NOT 1, L_0x24e67d0, C4<0>, C4<0>, C4<0>; +L_0x24e71d0 .delay (10000,10000,10000) L_0x24e71d0/d; +L_0x24e7270/d .functor AND 1, L_0x24e71d0, L_0x24e6c70, C4<1>, C4<1>; +L_0x24e7270 .delay (10000,10000,10000) L_0x24e7270/d; +L_0x24e73c0/d .functor OR 1, L_0x24e68e0, L_0x24e7270, C4<0>, C4<0>; +L_0x24e73c0 .delay (10000,10000,10000) L_0x24e73c0/d; +v0x24cc5e0_0 .net "a", 0 0, L_0x24e7520; 1 drivers +v0x24cc6a0_0 .net "abxor", 0 0, L_0x24e67d0; 1 drivers +v0x24cc740_0 .net "axorand", 0 0, L_0x24e68e0; 1 drivers +v0x24cc7e0_0 .net "b", 0 0, L_0x24e75c0; 1 drivers +v0x24cc890_0 .alias "defaultCompare", 0 0, v0x24d9460_0; +v0x24cc930_0 .alias "out", 0 0, v0x24d9360_0; +v0x24cc9b0_0 .net "xornot", 0 0, L_0x24e71d0; 1 drivers +v0x24cca30_0 .net "xornotand", 0 0, L_0x24e7270; 1 drivers +S_0x24cbef0 .scope module, "bit30" "single_slt" 3 86, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24e6f10/d .functor XOR 1, L_0x24e7c60, L_0x24e0930, C4<0>, C4<0>; +L_0x24e6f10 .delay (10000,10000,10000) L_0x24e6f10/d; +L_0x24e7020/d .functor AND 1, L_0x24e7c60, L_0x24e6f10, C4<1>, C4<1>; +L_0x24e7020 .delay (10000,10000,10000) L_0x24e7020/d; +L_0x24e78f0/d .functor NOT 1, L_0x24e6f10, C4<0>, C4<0>, C4<0>; +L_0x24e78f0 .delay (10000,10000,10000) L_0x24e78f0/d; +L_0x24e79b0/d .functor AND 1, L_0x24e78f0, L_0x24e73c0, C4<1>, C4<1>; +L_0x24e79b0 .delay (10000,10000,10000) L_0x24e79b0/d; +L_0x24e7b00/d .functor OR 1, L_0x24e7020, L_0x24e79b0, C4<0>, C4<0>; +L_0x24e7b00 .delay (10000,10000,10000) L_0x24e7b00/d; +v0x24cbfe0_0 .net "a", 0 0, L_0x24e7c60; 1 drivers +v0x24cc0a0_0 .net "abxor", 0 0, L_0x24e6f10; 1 drivers +v0x24cc140_0 .net "axorand", 0 0, L_0x24e7020; 1 drivers +v0x24cc1e0_0 .net "b", 0 0, L_0x24e0930; 1 drivers +v0x24cc260_0 .alias "defaultCompare", 0 0, v0x24d9360_0; +v0x24cc300_0 .alias "out", 0 0, v0x24d9530_0; +v0x24cc380_0 .net "xornot", 0 0, L_0x24e78f0; 1 drivers +v0x24cc400_0 .net "xornotand", 0 0, L_0x24e79b0; 1 drivers +S_0x247fda0 .scope module, "bit31" "single_slt" 3 87, 3 1, S_0x2480000; + .timescale -9 -12; +L_0x24d87d0/d .functor XOR 1, L_0x24e8920, L_0x24e09d0, C4<0>, C4<0>; +L_0x24d87d0 .delay (10000,10000,10000) L_0x24d87d0/d; +L_0x24e0c90/d .functor AND 1, L_0x24e8920, L_0x24d87d0, C4<1>, C4<1>; +L_0x24e0c90 .delay (10000,10000,10000) L_0x24e0c90/d; +L_0x24e7740/d .functor NOT 1, L_0x24d87d0, C4<0>, C4<0>, C4<0>; +L_0x24e7740 .delay (10000,10000,10000) L_0x24e7740/d; +L_0x24e8520/d .functor AND 1, L_0x24e7740, L_0x24e7b00, C4<1>, C4<1>; +L_0x24e8520 .delay (10000,10000,10000) L_0x24e8520/d; +L_0x24e8610/d .functor OR 1, L_0x24e0c90, L_0x24e8520, C4<0>, C4<0>; +L_0x24e8610 .delay (10000,10000,10000) L_0x24e8610/d; +v0x247f1c0_0 .net "a", 0 0, L_0x24e8920; 1 drivers +v0x24cb9f0_0 .net "abxor", 0 0, L_0x24d87d0; 1 drivers +v0x24cba90_0 .net "axorand", 0 0, L_0x24e0c90; 1 drivers +v0x24cbb30_0 .net "b", 0 0, L_0x24e09d0; 1 drivers +v0x24cbbe0_0 .alias "defaultCompare", 0 0, v0x24d9530_0; +v0x24cbc80_0 .net "out", 0 0, L_0x24e8610; 1 drivers +v0x24cbd60_0 .net "xornot", 0 0, L_0x24e7740; 1 drivers +v0x24cbe00_0 .net "xornotand", 0 0, L_0x24e8520; 1 drivers + .scope S_0x2480cc0; +T_0 ; + %ix/load 0, 31, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %delay 5000000, 0; + %vpi_call 2 13 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; + %ix/load 0, 31, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9d70_0, 1, 1; + %ix/load 0, 31, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %delay 5000000, 0; + %vpi_call 2 16 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; + %ix/load 0, 31, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9d70_0, 1, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 19 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; + %ix/load 0, 31, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 22 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; + %ix/load 0, 31, 0; + %set/x0 v0x24d9d70_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9d70_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 25 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; + %ix/load 0, 31, 0; + %set/x0 v0x24d9d70_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9d70_0, 0, 1; + %ix/load 0, 31, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %ix/load 0, 30, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %ix/load 0, 29, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 28, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 27, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 26, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 25, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 24, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 23, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 22, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 21, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 20, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 19, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 18, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 17, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 16, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 15, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 14, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 13, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 12, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 11, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 10, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 9, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 8, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 7, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 6, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 5, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 4, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 3, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 2, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 1, 0; + %set/x0 v0x24d9e70_0, 0, 1; + %ix/load 0, 0, 0; + %set/x0 v0x24d9e70_0, 1, 1; + %delay 5000000, 0; + %vpi_call 2 28 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "slt.t.v"; + "./slt.v"; diff --git a/slt.v b/slt.v index a838e2a..8d5c670 100644 --- a/slt.v +++ b/slt.v @@ -9,11 +9,11 @@ module single_slt wire axorand; wire xornot; wire xornotand; - xor axb(abxor, a, b); - and aaxb(axorand, a, abxor); - not invxor(xornot, abxor); - and xorandinput(xornotand, xornot, defaultCompare); - or compare(out, axorand, xornotand); + xor #10 axb(abxor, a, b); + and #10 aaxb(axorand, a, abxor); + not #10 invxor(xornot, abxor); + and #10 xorandinput(xornotand, xornot, defaultCompare); + or #10 compare(out, axorand, xornotand); endmodule module full_slt_32bit From 05fe4139e9cd8a516d28f3f76cf4c78507c363f8 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:04:14 -0400 Subject: [PATCH 13/38] Delete adder_subtracter --- adder_subtracter | 3515 ---------------------------------------------- 1 file changed, 3515 deletions(-) delete mode 100755 adder_subtracter diff --git a/adder_subtracter b/adder_subtracter deleted file mode 100755 index 729e2fe..0000000 --- a/adder_subtracter +++ /dev/null @@ -1,3515 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "0.9.7 " "(v0_9_7)"; -:vpi_time_precision - 12; -:vpi_module "system"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0xabb2d0 .scope module, "behavioralFullAdder" "behavioralFullAdder" 2 3; - .timescale -9 -12; -v0xaeb900_0 .net *"_s10", 0 0, C4<0>; 1 drivers -v0xc28110_0 .net *"_s11", 1 0, L_0xc51550; 1 drivers -v0xc281b0_0 .net *"_s13", 1 0, L_0xc51650; 1 drivers -v0xc28250_0 .net *"_s16", 0 0, C4<0>; 1 drivers -v0xc28300_0 .net *"_s17", 1 0, L_0xc517c0; 1 drivers -v0xc283a0_0 .net *"_s3", 1 0, L_0xc512a0; 1 drivers -v0xc28480_0 .net *"_s6", 0 0, C4<0>; 1 drivers -v0xc28520_0 .net *"_s7", 1 0, L_0xc513e0; 1 drivers -v0xc28610_0 .net "a", 0 0, C4; 0 drivers -v0xc286b0_0 .net "b", 0 0, C4; 0 drivers -v0xc287b0_0 .net "carryin", 0 0, C4; 0 drivers -v0xc28850_0 .net "carryout", 0 0, L_0xc51130; 1 drivers -v0xc28960_0 .net "sum", 0 0, L_0xc511d0; 1 drivers -L_0xc51130 .part L_0xc517c0, 1, 1; -L_0xc511d0 .part L_0xc517c0, 0, 1; -L_0xc512a0 .concat [ 1 1 0 0], C4, C4<0>; -L_0xc513e0 .concat [ 1 1 0 0], C4, C4<0>; -L_0xc51550 .arith/sum 2, L_0xc512a0, L_0xc513e0; -L_0xc51650 .concat [ 1 1 0 0], C4, C4<0>; -L_0xc517c0 .arith/sum 2, L_0xc51550, L_0xc51650; -S_0xbe1330 .scope module, "test32bitAdder" "test32bitAdder" 3 6; - .timescale -9 -12; -v0xc50a30_0 .var "a", 31 0; -RS_0x7fb7ca18cca8/0/0 .resolv tri, L_0xc69540, L_0xc6e9c0, L_0xc73ec0, L_0xc79440; -RS_0x7fb7ca18cca8/0/4 .resolv tri, L_0xc7e8f0, L_0xc83ba0, L_0xc890e0, L_0xc8e690; -RS_0x7fb7ca18cca8 .resolv tri, RS_0x7fb7ca18cca8/0/0, RS_0x7fb7ca18cca8/0/4, C4, C4; -v0xc50ae0_0 .net8 "ans", 31 0, RS_0x7fb7ca18cca8; 8 drivers -v0xc50f30_0 .var "b", 31 0; -v0xc50fb0_0 .var "carryin", 2 0; -v0xc51030_0 .net "carryout", 0 0, L_0xc8c9c0; 1 drivers -v0xc510b0_0 .net "overflow", 0 0, L_0xc8e550; 1 drivers -S_0xc28a00 .scope module, "adder0" "adder_subtracter" 3 13, 4 176, S_0xbe1330; - .timescale -9 -12; -L_0xc4d7d0/d .functor NOT 1, L_0xc51a90, C4<0>, C4<0>, C4<0>; -L_0xc4d7d0 .delay (10000,10000,10000) L_0xc4d7d0/d; -L_0xc51bd0/d .functor NOT 1, L_0xc51d10, C4<0>, C4<0>, C4<0>; -L_0xc51bd0 .delay (10000,10000,10000) L_0xc51bd0/d; -L_0xc51f70/d .functor NOT 1, L_0xc52010, C4<0>, C4<0>, C4<0>; -L_0xc51f70 .delay (10000,10000,10000) L_0xc51f70/d; -L_0xc52190/d .functor NOT 1, L_0xc522d0, C4<0>, C4<0>, C4<0>; -L_0xc52190 .delay (10000,10000,10000) L_0xc52190/d; -L_0xc52460/d .functor NOT 1, L_0xc52560, C4<0>, C4<0>, C4<0>; -L_0xc52460 .delay (10000,10000,10000) L_0xc52460/d; -L_0xc52700/d .functor NOT 1, L_0xc52830, C4<0>, C4<0>, C4<0>; -L_0xc52700 .delay (10000,10000,10000) L_0xc52700/d; -L_0xc52600/d .functor NOT 1, L_0xc52b90, C4<0>, C4<0>, C4<0>; -L_0xc52600 .delay (10000,10000,10000) L_0xc52600/d; -L_0xc52d50/d .functor NOT 1, L_0xc52e50, C4<0>, C4<0>, C4<0>; -L_0xc52d50 .delay (10000,10000,10000) L_0xc52d50/d; -L_0xc53070/d .functor NOT 1, L_0xc53170, C4<0>, C4<0>, C4<0>; -L_0xc53070 .delay (10000,10000,10000) L_0xc53070/d; -L_0xc52f40/d .functor NOT 1, L_0xc53490, C4<0>, C4<0>, C4<0>; -L_0xc52f40 .delay (10000,10000,10000) L_0xc52f40/d; -L_0xc535e0/d .functor NOT 1, L_0xc536d0, C4<0>, C4<0>, C4<0>; -L_0xc535e0 .delay (10000,10000,10000) L_0xc535e0/d; -L_0xc53830/d .functor NOT 1, L_0xc53970, C4<0>, C4<0>, C4<0>; -L_0xc53830 .delay (10000,10000,10000) L_0xc53830/d; -L_0xc53430/d .functor NOT 1, L_0xc53bc0, C4<0>, C4<0>, C4<0>; -L_0xc53430 .delay (10000,10000,10000) L_0xc53430/d; -L_0xc53d40/d .functor NOT 1, L_0xc53e80, C4<0>, C4<0>, C4<0>; -L_0xc53d40 .delay (10000,10000,10000) L_0xc53d40/d; -L_0xc52a80/d .functor NOT 1, L_0xc54340, C4<0>, C4<0>, C4<0>; -L_0xc52a80 .delay (10000,10000,10000) L_0xc52a80/d; -L_0xc52b30/d .functor NOT 1, L_0xc54640, C4<0>, C4<0>, C4<0>; -L_0xc52b30 .delay (10000,10000,10000) L_0xc52b30/d; -L_0xc54780/d .functor NOT 1, L_0xc548c0, C4<0>, C4<0>, C4<0>; -L_0xc54780 .delay (10000,10000,10000) L_0xc54780/d; -L_0xc52970/d .functor NOT 1, L_0xc54c00, C4<0>, C4<0>, C4<0>; -L_0xc52970 .delay (10000,10000,10000) L_0xc52970/d; -L_0xc54a00/d .functor NOT 1, L_0xc54e20, C4<0>, C4<0>, C4<0>; -L_0xc54a00 .delay (10000,10000,10000) L_0xc54a00/d; -L_0xc54d40/d .functor NOT 1, L_0xc54b60, C4<0>, C4<0>, C4<0>; -L_0xc54d40 .delay (10000,10000,10000) L_0xc54d40/d; -L_0xc54f60/d .functor NOT 1, L_0xc55380, C4<0>, C4<0>, C4<0>; -L_0xc54f60 .delay (10000,10000,10000) L_0xc54f60/d; -L_0xc55230/d .functor NOT 1, L_0xc550e0, C4<0>, C4<0>, C4<0>; -L_0xc55230 .delay (10000,10000,10000) L_0xc55230/d; -L_0xc554c0/d .functor NOT 1, L_0xc558d0, C4<0>, C4<0>, C4<0>; -L_0xc554c0 .delay (10000,10000,10000) L_0xc554c0/d; -L_0xc55770/d .functor NOT 1, L_0xc55610, C4<0>, C4<0>, C4<0>; -L_0xc55770 .delay (10000,10000,10000) L_0xc55770/d; -L_0xc55a10/d .functor NOT 1, L_0xc55e70, C4<0>, C4<0>, C4<0>; -L_0xc55a10 .delay (10000,10000,10000) L_0xc55a10/d; -L_0xc55cf0/d .functor NOT 1, L_0xc55b80, C4<0>, C4<0>, C4<0>; -L_0xc55cf0 .delay (10000,10000,10000) L_0xc55cf0/d; -L_0xc55fb0/d .functor NOT 1, L_0xc563e0, C4<0>, C4<0>, C4<0>; -L_0xc55fb0 .delay (10000,10000,10000) L_0xc55fb0/d; -L_0xc56280/d .functor NOT 1, L_0xc56100, C4<0>, C4<0>, C4<0>; -L_0xc56280 .delay (10000,10000,10000) L_0xc56280/d; -L_0xc56520/d .functor NOT 1, L_0xc56950, C4<0>, C4<0>, C4<0>; -L_0xc56520 .delay (10000,10000,10000) L_0xc56520/d; -L_0xc56820/d .functor NOT 1, L_0xc56690, C4<0>, C4<0>, C4<0>; -L_0xc56820 .delay (10000,10000,10000) L_0xc56820/d; -L_0xc514b0/d .functor NOT 1, L_0xc56a90, C4<0>, C4<0>, C4<0>; -L_0xc514b0 .delay (10000,10000,10000) L_0xc514b0/d; -L_0xc515f0/d .functor NOT 1, L_0xc54250, C4<0>, C4<0>, C4<0>; -L_0xc515f0 .delay (10000,10000,10000) L_0xc515f0/d; -v0xc4ccc0_0 .net "_", 0 0, L_0xc693b0; 1 drivers -v0xc4d300_0 .net "_1", 0 0, L_0xc6e830; 1 drivers -v0xc4d380_0 .net "_2", 0 0, L_0xc73d30; 1 drivers -v0xc4d400_0 .net "_3", 0 0, L_0xc792b0; 1 drivers -v0xc4d480_0 .net "_4", 0 0, L_0xc7e7a0; 1 drivers -v0xc4d500_0 .net "_5", 0 0, L_0xc83a10; 1 drivers -v0xc4d580_0 .net "_6", 0 0, L_0xc88f50; 1 drivers -v0xc4d600_0 .net *"_s0", 0 0, L_0xc4d7d0; 1 drivers -v0xc4d6d0_0 .net *"_s100", 0 0, L_0xc55cf0; 1 drivers -v0xc4d750_0 .net *"_s103", 0 0, L_0xc55b80; 1 drivers -v0xc4d830_0 .net *"_s104", 0 0, L_0xc55fb0; 1 drivers -v0xc4d8b0_0 .net *"_s107", 0 0, L_0xc563e0; 1 drivers -v0xc4d9a0_0 .net *"_s108", 0 0, L_0xc56280; 1 drivers -v0xc4da20_0 .net *"_s11", 0 0, L_0xc52010; 1 drivers -v0xc4db20_0 .net *"_s111", 0 0, L_0xc56100; 1 drivers -v0xc4dba0_0 .net *"_s112", 0 0, L_0xc56520; 1 drivers -v0xc4daa0_0 .net *"_s115", 0 0, L_0xc56950; 1 drivers -v0xc4dcf0_0 .net *"_s116", 0 0, L_0xc56820; 1 drivers -v0xc4de10_0 .net *"_s119", 0 0, L_0xc56690; 1 drivers -v0xc4de90_0 .net *"_s12", 0 0, L_0xc52190; 1 drivers -v0xc4dd70_0 .net *"_s120", 0 0, L_0xc514b0; 1 drivers -v0xc4dfc0_0 .net *"_s123", 0 0, L_0xc56a90; 1 drivers -v0xc4df10_0 .net *"_s124", 0 0, L_0xc515f0; 1 drivers -v0xc4e100_0 .net *"_s127", 0 0, L_0xc54250; 1 drivers -v0xc4e060_0 .net *"_s15", 0 0, L_0xc522d0; 1 drivers -v0xc4e250_0 .net *"_s16", 0 0, L_0xc52460; 1 drivers -v0xc4e1a0_0 .net *"_s19", 0 0, L_0xc52560; 1 drivers -v0xc4e3b0_0 .net *"_s20", 0 0, L_0xc52700; 1 drivers -v0xc4e2f0_0 .net *"_s23", 0 0, L_0xc52830; 1 drivers -v0xc4e520_0 .net *"_s24", 0 0, L_0xc52600; 1 drivers -v0xc4e430_0 .net *"_s27", 0 0, L_0xc52b90; 1 drivers -v0xc4e6a0_0 .net *"_s28", 0 0, L_0xc52d50; 1 drivers -v0xc4e5a0_0 .net *"_s3", 0 0, L_0xc51a90; 1 drivers -v0xc4e830_0 .net *"_s31", 0 0, L_0xc52e50; 1 drivers -v0xc4e720_0 .net *"_s32", 0 0, L_0xc53070; 1 drivers -v0xc4e9d0_0 .net *"_s35", 0 0, L_0xc53170; 1 drivers -v0xc4e8b0_0 .net *"_s36", 0 0, L_0xc52f40; 1 drivers -v0xc4e950_0 .net *"_s39", 0 0, L_0xc53490; 1 drivers -v0xc4eb90_0 .net *"_s4", 0 0, L_0xc51bd0; 1 drivers -v0xc4ec10_0 .net *"_s40", 0 0, L_0xc535e0; 1 drivers -v0xc4ea50_0 .net *"_s43", 0 0, L_0xc536d0; 1 drivers -v0xc4eaf0_0 .net *"_s44", 0 0, L_0xc53830; 1 drivers -v0xc4edf0_0 .net *"_s47", 0 0, L_0xc53970; 1 drivers -v0xc4ee70_0 .net *"_s48", 0 0, L_0xc53430; 1 drivers -v0xc4ec90_0 .net *"_s51", 0 0, L_0xc53bc0; 1 drivers -v0xc4ed30_0 .net *"_s52", 0 0, L_0xc53d40; 1 drivers -v0xc4f070_0 .net *"_s55", 0 0, L_0xc53e80; 1 drivers -v0xc4f0f0_0 .net *"_s56", 0 0, L_0xc52a80; 1 drivers -v0xc4ef10_0 .net *"_s59", 0 0, L_0xc54340; 1 drivers -v0xc4efb0_0 .net *"_s60", 0 0, L_0xc52b30; 1 drivers -v0xc4f310_0 .net *"_s63", 0 0, L_0xc54640; 1 drivers -v0xc4f390_0 .net *"_s64", 0 0, L_0xc54780; 1 drivers -v0xc4f190_0 .net *"_s67", 0 0, L_0xc548c0; 1 drivers -v0xc4f230_0 .net *"_s68", 0 0, L_0xc52970; 1 drivers -v0xc4f5d0_0 .net *"_s7", 0 0, L_0xc51d10; 1 drivers -v0xc4f650_0 .net *"_s71", 0 0, L_0xc54c00; 1 drivers -v0xc4f410_0 .net *"_s72", 0 0, L_0xc54a00; 1 drivers -v0xc4f4b0_0 .net *"_s75", 0 0, L_0xc54e20; 1 drivers -v0xc4f550_0 .net *"_s76", 0 0, L_0xc54d40; 1 drivers -v0xc4f8d0_0 .net *"_s79", 0 0, L_0xc54b60; 1 drivers -v0xc4f6f0_0 .net *"_s8", 0 0, L_0xc51f70; 1 drivers -v0xc4f790_0 .net *"_s80", 0 0, L_0xc54f60; 1 drivers -v0xc4f830_0 .net *"_s83", 0 0, L_0xc55380; 1 drivers -v0xc4fb70_0 .net *"_s84", 0 0, L_0xc55230; 1 drivers -v0xc4f970_0 .net *"_s87", 0 0, L_0xc550e0; 1 drivers -v0xc4fa10_0 .net *"_s88", 0 0, L_0xc554c0; 1 drivers -v0xc4fab0_0 .net *"_s91", 0 0, L_0xc558d0; 1 drivers -v0xc4fe10_0 .net *"_s92", 0 0, L_0xc55770; 1 drivers -v0xc4fc10_0 .net *"_s95", 0 0, L_0xc55610; 1 drivers -v0xc4fcb0_0 .net *"_s96", 0 0, L_0xc55a10; 1 drivers -v0xc4fd50_0 .net *"_s99", 0 0, L_0xc55e70; 1 drivers -v0xc500d0_0 .alias "ans", 31 0, v0xc50ae0_0; -v0xc4fe90_0 .alias "carryout", 0 0, v0xc51030_0; -v0xc4ff10_0 .net "command", 2 0, v0xc50fb0_0; 1 drivers -v0xc4ffb0_0 .net "cout0", 0 0, L_0xc67900; 1 drivers -v0xc503b0_0 .net "cout1", 0 0, L_0xc6cce0; 1 drivers -v0xc501e0_0 .net "cout2", 0 0, L_0xc721e0; 1 drivers -v0xc502f0_0 .net "cout3", 0 0, L_0xc77760; 1 drivers -v0xc50740_0 .net "cout4", 0 0, L_0xc7cc50; 1 drivers -v0xc50850_0 .net "cout5", 0 0, L_0xc81f00; 1 drivers -v0xc504c0_0 .net "cout6", 0 0, L_0xc87400; 1 drivers -RS_0x7fb7ca18c078/0/0 .resolv tri, L_0xc57320, L_0xc5f030, L_0xc57110, L_0xc5ee10; -RS_0x7fb7ca18c078/0/4 .resolv tri, L_0xc5fd60, L_0xc5ff00, L_0xc60130, L_0xc60420; -RS_0x7fb7ca18c078/0/8 .resolv tri, L_0xc60650, L_0xc60930, L_0xc60b60, L_0xc60d90; -RS_0x7fb7ca18c078/0/12 .resolv tri, L_0xc60fc0, L_0xc611f0, L_0xc61420, L_0xc61770; -RS_0x7fb7ca18c078/0/16 .resolv tri, L_0xc619a0, L_0xc61bf0, L_0xc61e40, L_0xc62090; -RS_0x7fb7ca18c078/0/20 .resolv tri, L_0xc62590, L_0xc626d0, L_0xc62130, L_0xc62320; -RS_0x7fb7ca18c078/0/24 .resolv tri, L_0xc62c00, L_0xc62e70, L_0xc633a0, L_0xc63590; -RS_0x7fb7ca18c078/0/28 .resolv tri, L_0xc62f10, L_0xc638c0, L_0xc63b10, L_0xc614c0; -RS_0x7fb7ca18c078/1/0 .resolv tri, RS_0x7fb7ca18c078/0/0, RS_0x7fb7ca18c078/0/4, RS_0x7fb7ca18c078/0/8, RS_0x7fb7ca18c078/0/12; -RS_0x7fb7ca18c078/1/4 .resolv tri, RS_0x7fb7ca18c078/0/16, RS_0x7fb7ca18c078/0/20, RS_0x7fb7ca18c078/0/24, RS_0x7fb7ca18c078/0/28; -RS_0x7fb7ca18c078 .resolv tri, RS_0x7fb7ca18c078/1/0, RS_0x7fb7ca18c078/1/4, C4, C4; -v0xc505d0_0 .net8 "finalB", 31 0, RS_0x7fb7ca18c078; 32 drivers -RS_0x7fb7ca18ba18/0/0 .resolv tri, L_0xc51900, L_0xc51b30, L_0xc51e40, L_0xc520f0; -RS_0x7fb7ca18ba18/0/4 .resolv tri, L_0xc523c0, L_0xc52660, L_0xc529e0, L_0xc52cb0; -RS_0x7fb7ca18ba18/0/8 .resolv tri, L_0xc52fd0, L_0xc532b0, L_0xc53210, L_0xc53530; -RS_0x7fb7ca18ba18/0/12 .resolv tri, L_0xc53770, L_0xc53a10, L_0xc53c60, L_0xc54430; -RS_0x7fb7ca18ba18/0/16 .resolv tri, L_0xc546e0, L_0xc528d0, L_0xc54960, L_0xc54ca0; -RS_0x7fb7ca18ba18/0/20 .resolv tri, L_0xc54ec0, L_0xc55190, L_0xc55420, L_0xc556d0; -RS_0x7fb7ca18ba18/0/24 .resolv tri, L_0xc55970, L_0xc55c50, L_0xc55f10, L_0xc561e0; -RS_0x7fb7ca18ba18/0/28 .resolv tri, L_0xc56480, L_0xc56780, L_0xc569f0, L_0xc54120; -RS_0x7fb7ca18ba18/1/0 .resolv tri, RS_0x7fb7ca18ba18/0/0, RS_0x7fb7ca18ba18/0/4, RS_0x7fb7ca18ba18/0/8, RS_0x7fb7ca18ba18/0/12; -RS_0x7fb7ca18ba18/1/4 .resolv tri, RS_0x7fb7ca18ba18/0/16, RS_0x7fb7ca18ba18/0/20, RS_0x7fb7ca18ba18/0/24, RS_0x7fb7ca18ba18/0/28; -RS_0x7fb7ca18ba18 .resolv tri, RS_0x7fb7ca18ba18/1/0, RS_0x7fb7ca18ba18/1/4, C4, C4; -v0xc50b70_0 .net8 "invertedB", 31 0, RS_0x7fb7ca18ba18; 32 drivers -v0xc50bf0_0 .net "opA", 31 0, v0xc50a30_0; 1 drivers -v0xc508d0_0 .net "opB", 31 0, v0xc50f30_0; 1 drivers -v0xc50980_0 .alias "overflow", 0 0, v0xc510b0_0; -L_0xc51900 .part/pv L_0xc4d7d0, 0, 1, 32; -L_0xc51a90 .part v0xc50f30_0, 0, 1; -L_0xc51b30 .part/pv L_0xc51bd0, 1, 1, 32; -L_0xc51d10 .part v0xc50f30_0, 1, 1; -L_0xc51e40 .part/pv L_0xc51f70, 2, 1, 32; -L_0xc52010 .part v0xc50f30_0, 2, 1; -L_0xc520f0 .part/pv L_0xc52190, 3, 1, 32; -L_0xc522d0 .part v0xc50f30_0, 3, 1; -L_0xc523c0 .part/pv L_0xc52460, 4, 1, 32; -L_0xc52560 .part v0xc50f30_0, 4, 1; -L_0xc52660 .part/pv L_0xc52700, 5, 1, 32; -L_0xc52830 .part v0xc50f30_0, 5, 1; -L_0xc529e0 .part/pv L_0xc52600, 6, 1, 32; -L_0xc52b90 .part v0xc50f30_0, 6, 1; -L_0xc52cb0 .part/pv L_0xc52d50, 7, 1, 32; -L_0xc52e50 .part v0xc50f30_0, 7, 1; -L_0xc52fd0 .part/pv L_0xc53070, 8, 1, 32; -L_0xc53170 .part v0xc50f30_0, 8, 1; -L_0xc532b0 .part/pv L_0xc52f40, 9, 1, 32; -L_0xc53490 .part v0xc50f30_0, 9, 1; -L_0xc53210 .part/pv L_0xc535e0, 10, 1, 32; -L_0xc536d0 .part v0xc50f30_0, 10, 1; -L_0xc53530 .part/pv L_0xc53830, 11, 1, 32; -L_0xc53970 .part v0xc50f30_0, 11, 1; -L_0xc53770 .part/pv L_0xc53430, 12, 1, 32; -L_0xc53bc0 .part v0xc50f30_0, 12, 1; -L_0xc53a10 .part/pv L_0xc53d40, 13, 1, 32; -L_0xc53e80 .part v0xc50f30_0, 13, 1; -L_0xc53c60 .part/pv L_0xc52a80, 14, 1, 32; -L_0xc54340 .part v0xc50f30_0, 14, 1; -L_0xc54430 .part/pv L_0xc52b30, 15, 1, 32; -L_0xc54640 .part v0xc50f30_0, 15, 1; -L_0xc546e0 .part/pv L_0xc54780, 16, 1, 32; -L_0xc548c0 .part v0xc50f30_0, 16, 1; -L_0xc528d0 .part/pv L_0xc52970, 17, 1, 32; -L_0xc54c00 .part v0xc50f30_0, 17, 1; -L_0xc54960 .part/pv L_0xc54a00, 18, 1, 32; -L_0xc54e20 .part v0xc50f30_0, 18, 1; -L_0xc54ca0 .part/pv L_0xc54d40, 19, 1, 32; -L_0xc54b60 .part v0xc50f30_0, 19, 1; -L_0xc54ec0 .part/pv L_0xc54f60, 20, 1, 32; -L_0xc55380 .part v0xc50f30_0, 20, 1; -L_0xc55190 .part/pv L_0xc55230, 21, 1, 32; -L_0xc550e0 .part v0xc50f30_0, 21, 1; -L_0xc55420 .part/pv L_0xc554c0, 22, 1, 32; -L_0xc558d0 .part v0xc50f30_0, 22, 1; -L_0xc556d0 .part/pv L_0xc55770, 23, 1, 32; -L_0xc55610 .part v0xc50f30_0, 23, 1; -L_0xc55970 .part/pv L_0xc55a10, 24, 1, 32; -L_0xc55e70 .part v0xc50f30_0, 24, 1; -L_0xc55c50 .part/pv L_0xc55cf0, 25, 1, 32; -L_0xc55b80 .part v0xc50f30_0, 25, 1; -L_0xc55f10 .part/pv L_0xc55fb0, 26, 1, 32; -L_0xc563e0 .part v0xc50f30_0, 26, 1; -L_0xc561e0 .part/pv L_0xc56280, 27, 1, 32; -L_0xc56100 .part v0xc50f30_0, 27, 1; -L_0xc56480 .part/pv L_0xc56520, 28, 1, 32; -L_0xc56950 .part v0xc50f30_0, 28, 1; -L_0xc56780 .part/pv L_0xc56820, 29, 1, 32; -L_0xc56690 .part v0xc50f30_0, 29, 1; -L_0xc569f0 .part/pv L_0xc514b0, 30, 1, 32; -L_0xc56a90 .part v0xc50f30_0, 30, 1; -L_0xc54120 .part/pv L_0xc515f0, 31, 1, 32; -L_0xc54250 .part v0xc50f30_0, 31, 1; -L_0xc64060 .part v0xc50fb0_0, 0, 1; -RS_0x7fb7ca18a188 .resolv tri, L_0xc653d0, L_0xc66300, L_0xc67360, L_0xc68260; -L_0xc69540 .part/pv RS_0x7fb7ca18a188, 0, 4, 32; -L_0xc57650 .part v0xc50a30_0, 0, 4; -L_0xc57740 .part RS_0x7fb7ca18c078, 0, 4; -L_0xc69810 .part v0xc50fb0_0, 0, 1; -RS_0x7fb7ca1893a8 .resolv tri, L_0xc6a570, L_0xc6b4e0, L_0xc6c6a0, L_0xc6d760; -L_0xc6e9c0 .part/pv RS_0x7fb7ca1893a8, 4, 4, 32; -L_0xc695e0 .part v0xc50a30_0, 4, 4; -L_0xc69680 .part RS_0x7fb7ca18c078, 4, 4; -RS_0x7fb7ca1885c8 .resolv tri, L_0xc6f9d0, L_0xc70a60, L_0xc71c00, L_0xc72c60; -L_0xc73ec0 .part/pv RS_0x7fb7ca1885c8, 8, 4, 32; -L_0xc73ff0 .part v0xc50a30_0, 8, 4; -L_0xc6ea60 .part RS_0x7fb7ca18c078, 8, 4; -RS_0x7fb7ca1877e8 .resolv tri, L_0xc74f50, L_0xc75fe0, L_0xc77180, L_0xc781e0; -L_0xc79440 .part/pv RS_0x7fb7ca1877e8, 12, 4, 32; -L_0xc74120 .part v0xc50a30_0, 12, 4; -L_0xc741c0 .part RS_0x7fb7ca18c078, 12, 4; -RS_0x7fb7ca186a08 .resolv tri, L_0xc7a440, L_0xc7b4d0, L_0xc7c670, L_0xc7d6d0; -L_0xc7e8f0 .part/pv RS_0x7fb7ca186a08, 16, 4, 32; -L_0xc7e990 .part v0xc50a30_0, 16, 4; -L_0xc794e0 .part RS_0x7fb7ca18c078, 16, 4; -RS_0x7fb7ca185c28 .resolv tri, L_0xc7f8f0, L_0xc80980, L_0xc81960, L_0xc82860; -L_0xc83ba0 .part/pv RS_0x7fb7ca185c28, 20, 4, 32; -L_0xc7ea30 .part v0xc50a30_0, 20, 4; -L_0xc7ead0 .part RS_0x7fb7ca18c078, 20, 4; -RS_0x7fb7ca184e48 .resolv tri, L_0xc84bd0, L_0xc85c60, L_0xc86e00, L_0xc87e80; -L_0xc890e0 .part/pv RS_0x7fb7ca184e48, 24, 4, 32; -L_0xc89290 .part v0xc50a30_0, 24, 4; -L_0xc83c40 .part RS_0x7fb7ca18c078, 24, 4; -RS_0x7fb7ca184068 .resolv tri, L_0xc8a1e0, L_0xc8b240, L_0xc8c3e0, L_0xc8d480; -L_0xc8e690 .part/pv RS_0x7fb7ca184068, 28, 4, 32; -L_0xc89440 .part v0xc50a30_0, 28, 4; -L_0xc894e0 .part RS_0x7fb7ca18c078, 28, 4; -S_0xc46430 .scope module, "addsubmux" "mux" 4 236, 4 3, S_0xc28a00; - .timescale -9 -12; -L_0xc4d930/d .functor NOT 1, L_0xc64060, C4<0>, C4<0>, C4<0>; -L_0xc4d930 .delay (10000,10000,10000) L_0xc4d930/d; -L_0xc56c20/d .functor AND 1, L_0xc53f20, L_0xc4d930, C4<1>, C4<1>; -L_0xc56c20 .delay (10000,10000,10000) L_0xc56c20/d; -L_0xc56cc0/d .functor AND 1, L_0xc57860, L_0xc4d930, C4<1>, C4<1>; -L_0xc56cc0 .delay (10000,10000,10000) L_0xc56cc0/d; -L_0xc540a0/d .functor AND 1, L_0xc579d0, L_0xc4d930, C4<1>, C4<1>; -L_0xc540a0 .delay (10000,10000,10000) L_0xc540a0/d; -L_0xc57a70/d .functor AND 1, L_0xc57b60, L_0xc4d930, C4<1>, C4<1>; -L_0xc57a70 .delay (10000,10000,10000) L_0xc57a70/d; -L_0xc57c00/d .functor AND 1, L_0xc57d30, L_0xc4d930, C4<1>, C4<1>; -L_0xc57c00 .delay (10000,10000,10000) L_0xc57c00/d; -L_0xc57dd0/d .functor AND 1, L_0xc57ec0, L_0xc4d930, C4<1>, C4<1>; -L_0xc57dd0 .delay (10000,10000,10000) L_0xc57dd0/d; -L_0xc57fa0/d .functor AND 1, L_0xc58110, L_0xc4d930, C4<1>, C4<1>; -L_0xc57fa0 .delay (10000,10000,10000) L_0xc57fa0/d; -L_0xc58200/d .functor AND 1, L_0xc582b0, L_0xc4d930, C4<1>, C4<1>; -L_0xc58200 .delay (10000,10000,10000) L_0xc58200/d; -L_0xc583a0/d .functor AND 1, L_0xc584b0, L_0xc4d930, C4<1>, C4<1>; -L_0xc583a0 .delay (10000,10000,10000) L_0xc583a0/d; -L_0xc58550/d .functor AND 1, L_0xc585f0, L_0xc4d930, C4<1>, C4<1>; -L_0xc58550 .delay (10000,10000,10000) L_0xc58550/d; -L_0xc586f0/d .functor AND 1, L_0xc58800, L_0xc4d930, C4<1>, C4<1>; -L_0xc586f0 .delay (10000,10000,10000) L_0xc586f0/d; -L_0xc58450/d .functor AND 1, L_0xc58930, L_0xc4d930, C4<1>, C4<1>; -L_0xc58450 .delay (10000,10000,10000) L_0xc58450/d; -L_0xc58690/d .functor AND 1, L_0xc58b50, L_0xc4d930, C4<1>, C4<1>; -L_0xc58690 .delay (10000,10000,10000) L_0xc58690/d; -L_0xc58bf0/d .functor AND 1, L_0xc58d10, L_0xc4d930, C4<1>, C4<1>; -L_0xc58bf0 .delay (10000,10000,10000) L_0xc58bf0/d; -L_0xc58e30/d .functor AND 1, L_0xc59160, L_0xc4d930, C4<1>, C4<1>; -L_0xc58e30 .delay (10000,10000,10000) L_0xc58e30/d; -L_0xc58090/d .functor AND 1, L_0xc592c0, L_0xc4d930, C4<1>, C4<1>; -L_0xc58090 .delay (10000,10000,10000) L_0xc58090/d; -L_0xc593f0/d .functor AND 1, L_0xc595b0, L_0xc4d930, C4<1>, C4<1>; -L_0xc593f0 .delay (10000,10000,10000) L_0xc593f0/d; -L_0xc590d0/d .functor AND 1, L_0xc596e0, L_0xc4d930, C4<1>, C4<1>; -L_0xc590d0 .delay (10000,10000,10000) L_0xc590d0/d; -L_0xc59360/d .functor AND 1, L_0xc59510, L_0xc4d930, C4<1>, C4<1>; -L_0xc59360 .delay (10000,10000,10000) L_0xc59360/d; -L_0xc59960/d .functor AND 1, L_0xc59a80, L_0xc4d930, C4<1>, C4<1>; -L_0xc59960 .delay (10000,10000,10000) L_0xc59960/d; -L_0xc59780/d .functor AND 1, L_0xc598b0, L_0xc4d930, C4<1>, C4<1>; -L_0xc59780 .delay (10000,10000,10000) L_0xc59780/d; -L_0xc59ce0/d .functor AND 1, L_0xc59e00, L_0xc4d930, C4<1>, C4<1>; -L_0xc59ce0 .delay (10000,10000,10000) L_0xc59ce0/d; -L_0xc59b20/d .functor AND 1, L_0xc59c20, L_0xc4d930, C4<1>, C4<1>; -L_0xc59b20 .delay (10000,10000,10000) L_0xc59b20/d; -L_0xc5a0c0/d .functor AND 1, L_0xc5a1e0, L_0xc4d930, C4<1>, C4<1>; -L_0xc5a0c0 .delay (10000,10000,10000) L_0xc5a0c0/d; -L_0xc59ea0/d .functor AND 1, L_0xc59ff0, L_0xc4d930, C4<1>, C4<1>; -L_0xc59ea0 .delay (10000,10000,10000) L_0xc59ea0/d; -L_0xc5a4c0/d .functor AND 1, L_0xc5a5b0, L_0xc4d930, C4<1>, C4<1>; -L_0xc5a4c0 .delay (10000,10000,10000) L_0xc5a4c0/d; -L_0xc5a280/d .functor AND 1, L_0xc5a3e0, L_0xc4d930, C4<1>, C4<1>; -L_0xc5a280 .delay (10000,10000,10000) L_0xc5a280/d; -L_0xc5a870/d .functor AND 1, L_0xc5a920, L_0xc4d930, C4<1>, C4<1>; -L_0xc5a870 .delay (10000,10000,10000) L_0xc5a870/d; -L_0xc5a650/d .functor AND 1, L_0xc5a780, L_0xc4d930, C4<1>, C4<1>; -L_0xc5a650 .delay (10000,10000,10000) L_0xc5a650/d; -L_0xc5ac00/d .functor AND 1, L_0xc5acf0, L_0xc4d930, C4<1>, C4<1>; -L_0xc5ac00 .delay (10000,10000,10000) L_0xc5ac00/d; -L_0xc589d0/d .functor AND 1, L_0xc5a9c0, L_0xc4d930, C4<1>, C4<1>; -L_0xc589d0 .delay (10000,10000,10000) L_0xc589d0/d; -L_0xc58ad0/d .functor AND 1, L_0xc59020, L_0xc4d930, C4<1>, C4<1>; -L_0xc58ad0 .delay (10000,10000,10000) L_0xc58ad0/d; -L_0xc5ab00/d .functor AND 1, L_0xc58ec0, L_0xc64060, C4<1>, C4<1>; -L_0xc5ab00 .delay (10000,10000,10000) L_0xc5ab00/d; -L_0xc58f60/d .functor AND 1, L_0xc57070, L_0xc64060, C4<1>, C4<1>; -L_0xc58f60 .delay (10000,10000,10000) L_0xc58f60/d; -L_0xc56d20/d .functor AND 1, L_0xc56ec0, L_0xc64060, C4<1>, C4<1>; -L_0xc56d20 .delay (10000,10000,10000) L_0xc56d20/d; -L_0xc56f60/d .functor AND 1, L_0xc5bd20, L_0xc64060, C4<1>, C4<1>; -L_0xc56f60 .delay (10000,10000,10000) L_0xc56f60/d; -L_0xc5b9b0/d .functor AND 1, L_0xc5bb60, L_0xc64060, C4<1>, C4<1>; -L_0xc5b9b0 .delay (10000,10000,10000) L_0xc5b9b0/d; -L_0xc5ba70/d .functor AND 1, L_0xc5c0c0, L_0xc64060, C4<1>, C4<1>; -L_0xc5ba70 .delay (10000,10000,10000) L_0xc5ba70/d; -L_0xc5bdc0/d .functor AND 1, L_0xc5bed0, L_0xc64060, C4<1>, C4<1>; -L_0xc5bdc0 .delay (10000,10000,10000) L_0xc5bdc0/d; -L_0xc5bf70/d .functor AND 1, L_0xc5c500, L_0xc64060, C4<1>, C4<1>; -L_0xc5bf70 .delay (10000,10000,10000) L_0xc5bf70/d; -L_0xc5c160/d .functor AND 1, L_0xc5c3b0, L_0xc64060, C4<1>, C4<1>; -L_0xc5c160 .delay (10000,10000,10000) L_0xc5c160/d; -L_0xc5c450/d .functor AND 1, L_0xc5c8a0, L_0xc64060, C4<1>, C4<1>; -L_0xc5c450 .delay (10000,10000,10000) L_0xc5c450/d; -L_0xc5c5a0/d .functor AND 1, L_0xc5c690, L_0xc64060, C4<1>, C4<1>; -L_0xc5c5a0 .delay (10000,10000,10000) L_0xc5c5a0/d; -L_0xc5c730/d .functor AND 1, L_0xc5cc10, L_0xc64060, C4<1>, C4<1>; -L_0xc5c730 .delay (10000,10000,10000) L_0xc5c730/d; -L_0xc5c940/d .functor AND 1, L_0xc5ca30, L_0xc64060, C4<1>, C4<1>; -L_0xc5c940 .delay (10000,10000,10000) L_0xc5c940/d; -L_0xc5cad0/d .functor AND 1, L_0xc5cfa0, L_0xc64060, C4<1>, C4<1>; -L_0xc5cad0 .delay (10000,10000,10000) L_0xc5cad0/d; -L_0xc5ccb0/d .functor AND 1, L_0xc5cdd0, L_0xc64060, C4<1>, C4<1>; -L_0xc5ccb0 .delay (10000,10000,10000) L_0xc5ccb0/d; -L_0xc5ce70/d .functor AND 1, L_0xc5c280, L_0xc64060, C4<1>, C4<1>; -L_0xc5ce70 .delay (10000,10000,10000) L_0xc5ce70/d; -L_0xc5cf40/d .functor AND 1, L_0xc5d0d0, L_0xc64060, C4<1>, C4<1>; -L_0xc5cf40 .delay (10000,10000,10000) L_0xc5cf40/d; -L_0xc5d3d0/d .functor AND 1, L_0xc5d490, L_0xc64060, C4<1>, C4<1>; -L_0xc5d3d0 .delay (10000,10000,10000) L_0xc5d3d0/d; -L_0xc5d530/d .functor AND 1, L_0xc5d620, L_0xc64060, C4<1>, C4<1>; -L_0xc5d530 .delay (10000,10000,10000) L_0xc5d530/d; -L_0xc5d6c0/d .functor AND 1, L_0xc5d7e0, L_0xc64060, C4<1>, C4<1>; -L_0xc5d6c0 .delay (10000,10000,10000) L_0xc5d6c0/d; -L_0xc5d890/d .functor AND 1, L_0xc5d9b0, L_0xc64060, C4<1>, C4<1>; -L_0xc5d890 .delay (10000,10000,10000) L_0xc5d890/d; -L_0xc5da50/d .functor AND 1, L_0xc5df50, L_0xc64060, C4<1>, C4<1>; -L_0xc5da50 .delay (10000,10000,10000) L_0xc5da50/d; -L_0xc5db70/d .functor AND 1, L_0xc5dc90, L_0xc64060, C4<1>, C4<1>; -L_0xc5db70 .delay (10000,10000,10000) L_0xc5db70/d; -L_0xc5dd30/d .functor AND 1, L_0xc5de50, L_0xc64060, C4<1>, C4<1>; -L_0xc5dd30 .delay (10000,10000,10000) L_0xc5dd30/d; -L_0xc5def0/d .functor AND 1, L_0xc5e0b0, L_0xc64060, C4<1>, C4<1>; -L_0xc5def0 .delay (10000,10000,10000) L_0xc5def0/d; -L_0xc5e150/d .functor AND 1, L_0xc5e270, L_0xc64060, C4<1>, C4<1>; -L_0xc5e150 .delay (10000,10000,10000) L_0xc5e150/d; -L_0xc5e310/d .functor AND 1, L_0xc5e400, L_0xc64060, C4<1>, C4<1>; -L_0xc5e310 .delay (10000,10000,10000) L_0xc5e310/d; -L_0xc5e4a0/d .functor AND 1, L_0xc5e5c0, L_0xc64060, C4<1>, C4<1>; -L_0xc5e4a0 .delay (10000,10000,10000) L_0xc5e4a0/d; -L_0xc5e660/d .functor AND 1, L_0xc5e780, L_0xc64060, C4<1>, C4<1>; -L_0xc5e660 .delay (10000,10000,10000) L_0xc5e660/d; -L_0xc5e820/d .functor AND 1, L_0xc5e940, L_0xc64060, C4<1>, C4<1>; -L_0xc5e820 .delay (10000,10000,10000) L_0xc5e820/d; -L_0xc5e9e0/d .functor AND 1, L_0xc5ec80, L_0xc64060, C4<1>, C4<1>; -L_0xc5e9e0 .delay (10000,10000,10000) L_0xc5e9e0/d; -L_0xc5d250/d .functor AND 1, L_0xc5ed20, L_0xc64060, C4<1>, C4<1>; -L_0xc5d250 .delay (10000,10000,10000) L_0xc5d250/d; -L_0xc5d370/d .functor OR 1, L_0xc56c20, L_0xc5ab00, C4<0>, C4<0>; -L_0xc5d370 .delay (10000,10000,10000) L_0xc5d370/d; -L_0xc5ea70/d .functor OR 1, L_0xc56cc0, L_0xc58f60, C4<0>, C4<0>; -L_0xc5ea70 .delay (10000,10000,10000) L_0xc5ea70/d; -L_0xc57240/d .functor OR 1, L_0xc540a0, L_0xc56d20, C4<0>, C4<0>; -L_0xc57240 .delay (10000,10000,10000) L_0xc57240/d; -L_0xc5eeb0/d .functor OR 1, L_0xc57a70, L_0xc56f60, C4<0>, C4<0>; -L_0xc5eeb0 .delay (10000,10000,10000) L_0xc5eeb0/d; -L_0xc5fe00/d .functor OR 1, L_0xc57c00, L_0xc5b9b0, C4<0>, C4<0>; -L_0xc5fe00 .delay (10000,10000,10000) L_0xc5fe00/d; -L_0xc5ffa0/d .functor OR 1, L_0xc57dd0, L_0xc5ba70, C4<0>, C4<0>; -L_0xc5ffa0 .delay (10000,10000,10000) L_0xc5ffa0/d; -L_0xc571b0/d .functor OR 1, L_0xc57fa0, L_0xc5bdc0, C4<0>, C4<0>; -L_0xc571b0 .delay (10000,10000,10000) L_0xc571b0/d; -L_0xc604c0/d .functor OR 1, L_0xc58200, L_0xc5bf70, C4<0>, C4<0>; -L_0xc604c0 .delay (10000,10000,10000) L_0xc604c0/d; -L_0xc606f0/d .functor OR 1, L_0xc583a0, L_0xc5c160, C4<0>, C4<0>; -L_0xc606f0 .delay (10000,10000,10000) L_0xc606f0/d; -L_0xc609d0/d .functor OR 1, L_0xc58550, L_0xc5c450, C4<0>, C4<0>; -L_0xc609d0 .delay (10000,10000,10000) L_0xc609d0/d; -L_0xc60c00/d .functor OR 1, L_0xc586f0, L_0xc5c5a0, C4<0>, C4<0>; -L_0xc60c00 .delay (10000,10000,10000) L_0xc60c00/d; -L_0xc60e30/d .functor OR 1, L_0xc58450, L_0xc5c730, C4<0>, C4<0>; -L_0xc60e30 .delay (10000,10000,10000) L_0xc60e30/d; -L_0xc61060/d .functor OR 1, L_0xc58690, L_0xc5c940, C4<0>, C4<0>; -L_0xc61060 .delay (10000,10000,10000) L_0xc61060/d; -L_0xc61290/d .functor OR 1, L_0xc58bf0, L_0xc5cad0, C4<0>, C4<0>; -L_0xc61290 .delay (10000,10000,10000) L_0xc61290/d; -L_0xc616d0/d .functor OR 1, L_0xc58e30, L_0xc5ccb0, C4<0>, C4<0>; -L_0xc616d0 .delay (10000,10000,10000) L_0xc616d0/d; -L_0xc61810/d .functor OR 1, L_0xc58090, L_0xc5ce70, C4<0>, C4<0>; -L_0xc61810 .delay (10000,10000,10000) L_0xc61810/d; -L_0xc61a40/d .functor OR 1, L_0xc593f0, L_0xc5cf40, C4<0>, C4<0>; -L_0xc61a40 .delay (10000,10000,10000) L_0xc61a40/d; -L_0xc61c90/d .functor OR 1, L_0xc590d0, L_0xc5d3d0, C4<0>, C4<0>; -L_0xc61c90 .delay (10000,10000,10000) L_0xc61c90/d; -L_0xc61ee0/d .functor OR 1, L_0xc59360, L_0xc5d530, C4<0>, C4<0>; -L_0xc61ee0 .delay (10000,10000,10000) L_0xc61ee0/d; -L_0xc623e0/d .functor OR 1, L_0xc59960, L_0xc5d6c0, C4<0>, C4<0>; -L_0xc623e0 .delay (10000,10000,10000) L_0xc623e0/d; -L_0xc62630/d .functor OR 1, L_0xc59780, L_0xc5d890, C4<0>, C4<0>; -L_0xc62630 .delay (10000,10000,10000) L_0xc62630/d; -L_0xc62770/d .functor OR 1, L_0xc59ce0, L_0xc5da50, C4<0>, C4<0>; -L_0xc62770 .delay (10000,10000,10000) L_0xc62770/d; -L_0xc62920/d .functor OR 1, L_0xc59b20, L_0xc5db70, C4<0>, C4<0>; -L_0xc62920 .delay (10000,10000,10000) L_0xc62920/d; -L_0xc62a70/d .functor OR 1, L_0xc5a0c0, L_0xc5dd30, C4<0>, C4<0>; -L_0xc62a70 .delay (10000,10000,10000) L_0xc62a70/d; -L_0xc62ca0/d .functor OR 1, L_0xc59ea0, L_0xc5def0, C4<0>, C4<0>; -L_0xc62ca0 .delay (10000,10000,10000) L_0xc62ca0/d; -L_0xc631f0/d .functor OR 1, L_0xc5a4c0, L_0xc5e150, C4<0>, C4<0>; -L_0xc631f0 .delay (10000,10000,10000) L_0xc631f0/d; -L_0xc63440/d .functor OR 1, L_0xc5a280, L_0xc5e310, C4<0>, C4<0>; -L_0xc63440 .delay (10000,10000,10000) L_0xc63440/d; -L_0xc63630/d .functor OR 1, L_0xc5a870, L_0xc5e4a0, C4<0>, C4<0>; -L_0xc63630 .delay (10000,10000,10000) L_0xc63630/d; -L_0xc62fb0/d .functor OR 1, L_0xc5a650, L_0xc5e660, C4<0>, C4<0>; -L_0xc62fb0 .delay (10000,10000,10000) L_0xc62fb0/d; -L_0xc63960/d .functor OR 1, L_0xc5ac00, L_0xc5e820, C4<0>, C4<0>; -L_0xc63960 .delay (10000,10000,10000) L_0xc63960/d; -L_0xc59f00/d .functor OR 1, L_0xc589d0, L_0xc5e9e0, C4<0>, C4<0>; -L_0xc59f00 .delay (10000,10000,10000) L_0xc59f00/d; -L_0xc5ba10/d .functor OR 1, L_0xc58ad0, L_0xc5d250, C4<0>, C4<0>; -L_0xc5ba10 .delay (10000,10000,10000) L_0xc5ba10/d; -v0xc46520_0 .net *"_s1", 0 0, L_0xc53f20; 1 drivers -v0xc465e0_0 .net *"_s101", 0 0, L_0xc5d620; 1 drivers -v0xc46680_0 .net *"_s103", 0 0, L_0xc5d7e0; 1 drivers -v0xc46720_0 .net *"_s105", 0 0, L_0xc5d9b0; 1 drivers -v0xc467a0_0 .net *"_s107", 0 0, L_0xc5df50; 1 drivers -v0xc46840_0 .net *"_s109", 0 0, L_0xc5dc90; 1 drivers -v0xc468e0_0 .net *"_s11", 0 0, L_0xc57ec0; 1 drivers -v0xc46980_0 .net *"_s111", 0 0, L_0xc5de50; 1 drivers -v0xc46a70_0 .net *"_s113", 0 0, L_0xc5e0b0; 1 drivers -v0xc46b10_0 .net *"_s115", 0 0, L_0xc5e270; 1 drivers -v0xc46bb0_0 .net *"_s117", 0 0, L_0xc5e400; 1 drivers -v0xc46c50_0 .net *"_s119", 0 0, L_0xc5e5c0; 1 drivers -v0xc46cf0_0 .net *"_s121", 0 0, L_0xc5e780; 1 drivers -v0xc46d90_0 .net *"_s123", 0 0, L_0xc5e940; 1 drivers -v0xc46eb0_0 .net *"_s125", 0 0, L_0xc5ec80; 1 drivers -v0xc46f50_0 .net *"_s127", 0 0, L_0xc5ed20; 1 drivers -v0xc46e10_0 .net *"_s128", 0 0, L_0xc5d370; 1 drivers -v0xc470a0_0 .net *"_s13", 0 0, L_0xc58110; 1 drivers -v0xc471c0_0 .net *"_s130", 0 0, L_0xc5ea70; 1 drivers -v0xc47240_0 .net *"_s132", 0 0, L_0xc57240; 1 drivers -v0xc47120_0 .net *"_s134", 0 0, L_0xc5eeb0; 1 drivers -v0xc47370_0 .net *"_s136", 0 0, L_0xc5fe00; 1 drivers -v0xc472c0_0 .net *"_s138", 0 0, L_0xc5ffa0; 1 drivers -v0xc474b0_0 .net *"_s140", 0 0, L_0xc571b0; 1 drivers -v0xc47410_0 .net *"_s142", 0 0, L_0xc604c0; 1 drivers -v0xc47600_0 .net *"_s144", 0 0, L_0xc606f0; 1 drivers -v0xc47550_0 .net *"_s146", 0 0, L_0xc609d0; 1 drivers -v0xc47760_0 .net *"_s148", 0 0, L_0xc60c00; 1 drivers -v0xc476a0_0 .net *"_s15", 0 0, L_0xc582b0; 1 drivers -v0xc478d0_0 .net *"_s150", 0 0, L_0xc60e30; 1 drivers -v0xc477e0_0 .net *"_s152", 0 0, L_0xc61060; 1 drivers -v0xc47a50_0 .net *"_s154", 0 0, L_0xc61290; 1 drivers -v0xc47950_0 .net *"_s156", 0 0, L_0xc616d0; 1 drivers -v0xc47be0_0 .net *"_s158", 0 0, L_0xc61810; 1 drivers -v0xc47ad0_0 .net *"_s160", 0 0, L_0xc61a40; 1 drivers -v0xc47d80_0 .net *"_s162", 0 0, L_0xc61c90; 1 drivers -v0xc47c60_0 .net *"_s164", 0 0, L_0xc61ee0; 1 drivers -v0xc47d00_0 .net *"_s166", 0 0, L_0xc623e0; 1 drivers -v0xc47f40_0 .net *"_s168", 0 0, L_0xc62630; 1 drivers -v0xc47fc0_0 .net *"_s17", 0 0, L_0xc584b0; 1 drivers -v0xc47e00_0 .net *"_s170", 0 0, L_0xc62770; 1 drivers -v0xc47ea0_0 .net *"_s172", 0 0, L_0xc62920; 1 drivers -v0xc481a0_0 .net *"_s174", 0 0, L_0xc62a70; 1 drivers -v0xc48220_0 .net *"_s176", 0 0, L_0xc62ca0; 1 drivers -v0xc48040_0 .net *"_s178", 0 0, L_0xc631f0; 1 drivers -v0xc480e0_0 .net *"_s180", 0 0, L_0xc63440; 1 drivers -v0xc48420_0 .net *"_s182", 0 0, L_0xc63630; 1 drivers -v0xc484a0_0 .net *"_s184", 0 0, L_0xc62fb0; 1 drivers -v0xc482c0_0 .net *"_s186", 0 0, L_0xc63960; 1 drivers -v0xc48360_0 .net *"_s188", 0 0, L_0xc59f00; 1 drivers -v0xc486c0_0 .net *"_s19", 0 0, L_0xc585f0; 1 drivers -v0xc48740_0 .net *"_s190", 0 0, L_0xc5ba10; 1 drivers -v0xc48540_0 .net *"_s21", 0 0, L_0xc58800; 1 drivers -v0xc485e0_0 .net *"_s23", 0 0, L_0xc58930; 1 drivers -v0xc48980_0 .net *"_s25", 0 0, L_0xc58b50; 1 drivers -v0xc48a00_0 .net *"_s27", 0 0, L_0xc58d10; 1 drivers -v0xc487c0_0 .net *"_s29", 0 0, L_0xc59160; 1 drivers -v0xc48860_0 .net *"_s3", 0 0, L_0xc57860; 1 drivers -v0xc48900_0 .net *"_s31", 0 0, L_0xc592c0; 1 drivers -v0xc48c80_0 .net *"_s33", 0 0, L_0xc595b0; 1 drivers -v0xc48aa0_0 .net *"_s35", 0 0, L_0xc596e0; 1 drivers -v0xc48b40_0 .net *"_s37", 0 0, L_0xc59510; 1 drivers -v0xc48be0_0 .net *"_s39", 0 0, L_0xc59a80; 1 drivers -v0xc48f20_0 .net *"_s41", 0 0, L_0xc598b0; 1 drivers -v0xc48d20_0 .net *"_s43", 0 0, L_0xc59e00; 1 drivers -v0xc48dc0_0 .net *"_s45", 0 0, L_0xc59c20; 1 drivers -v0xc48e60_0 .net *"_s47", 0 0, L_0xc5a1e0; 1 drivers -v0xc491c0_0 .net *"_s49", 0 0, L_0xc59ff0; 1 drivers -v0xc48fc0_0 .net *"_s5", 0 0, L_0xc579d0; 1 drivers -v0xc49060_0 .net *"_s51", 0 0, L_0xc5a5b0; 1 drivers -v0xc49100_0 .net *"_s53", 0 0, L_0xc5a3e0; 1 drivers -v0xc49480_0 .net *"_s55", 0 0, L_0xc5a920; 1 drivers -v0xc49240_0 .net *"_s57", 0 0, L_0xc5a780; 1 drivers -v0xc492e0_0 .net *"_s59", 0 0, L_0xc5acf0; 1 drivers -v0xc49380_0 .net *"_s61", 0 0, L_0xc5a9c0; 1 drivers -v0xc49760_0 .net *"_s63", 0 0, L_0xc59020; 1 drivers -v0xc49500_0 .net *"_s65", 0 0, L_0xc58ec0; 1 drivers -v0xc495a0_0 .net *"_s67", 0 0, L_0xc57070; 1 drivers -v0xc49640_0 .net *"_s69", 0 0, L_0xc56ec0; 1 drivers -v0xc496e0_0 .net *"_s7", 0 0, L_0xc57b60; 1 drivers -v0xc49a70_0 .net *"_s71", 0 0, L_0xc5bd20; 1 drivers -v0xc49af0_0 .net *"_s73", 0 0, L_0xc5bb60; 1 drivers -v0xc49800_0 .net *"_s75", 0 0, L_0xc5c0c0; 1 drivers -v0xc498a0_0 .net *"_s77", 0 0, L_0xc5bed0; 1 drivers -v0xc49940_0 .net *"_s79", 0 0, L_0xc5c500; 1 drivers -v0xc499e0_0 .net *"_s81", 0 0, L_0xc5c3b0; 1 drivers -v0xc49e50_0 .net *"_s83", 0 0, L_0xc5c8a0; 1 drivers -v0xc49ef0_0 .net *"_s85", 0 0, L_0xc5c690; 1 drivers -v0xc49b90_0 .net *"_s87", 0 0, L_0xc5cc10; 1 drivers -v0xc49c30_0 .net *"_s89", 0 0, L_0xc5ca30; 1 drivers -v0xc49cd0_0 .net *"_s9", 0 0, L_0xc57d30; 1 drivers -v0xc49d70_0 .net *"_s91", 0 0, L_0xc5cfa0; 1 drivers -v0xc4a260_0 .net *"_s93", 0 0, L_0xc5cdd0; 1 drivers -v0xc4a2e0_0 .net *"_s95", 0 0, L_0xc5c280; 1 drivers -v0xc49f90_0 .net *"_s97", 0 0, L_0xc5d0d0; 1 drivers -v0xc4a030_0 .net *"_s99", 0 0, L_0xc5d490; 1 drivers -v0xc4a0d0_0 .net "address", 0 0, L_0xc64060; 1 drivers -v0xc4a170_0 .alias "in0", 31 0, v0xc508d0_0; -v0xc4a680_0 .net "in00addr", 0 0, L_0xc56c20; 1 drivers -v0xc4a700_0 .net "in010addr", 0 0, L_0xc586f0; 1 drivers -v0xc4a360_0 .net "in011addr", 0 0, L_0xc58450; 1 drivers -v0xc4a400_0 .net "in012addr", 0 0, L_0xc58690; 1 drivers -v0xc4a4a0_0 .net "in013addr", 0 0, L_0xc58bf0; 1 drivers -v0xc4a540_0 .net "in014addr", 0 0, L_0xc58e30; 1 drivers -v0xc4a5e0_0 .net "in015addr", 0 0, L_0xc58090; 1 drivers -v0xc4aad0_0 .net "in016addr", 0 0, L_0xc593f0; 1 drivers -v0xc4a7a0_0 .net "in017addr", 0 0, L_0xc590d0; 1 drivers -v0xc4a840_0 .net "in018addr", 0 0, L_0xc59360; 1 drivers -v0xc4a8e0_0 .net "in019addr", 0 0, L_0xc59960; 1 drivers -v0xc4a980_0 .net "in01addr", 0 0, L_0xc56cc0; 1 drivers -v0xc4aa20_0 .net "in020addr", 0 0, L_0xc59780; 1 drivers -v0xc4aed0_0 .net "in021addr", 0 0, L_0xc59ce0; 1 drivers -v0xc4ab70_0 .net "in022addr", 0 0, L_0xc59b20; 1 drivers -v0xc4ac10_0 .net "in023addr", 0 0, L_0xc5a0c0; 1 drivers -v0xc4acb0_0 .net "in024addr", 0 0, L_0xc59ea0; 1 drivers -v0xc4ad50_0 .net "in025addr", 0 0, L_0xc5a4c0; 1 drivers -v0xc4adf0_0 .net "in026addr", 0 0, L_0xc5a280; 1 drivers -v0xc4b300_0 .net "in027addr", 0 0, L_0xc5a870; 1 drivers -v0xc4af50_0 .net "in028addr", 0 0, L_0xc5a650; 1 drivers -v0xc4afd0_0 .net "in029addr", 0 0, L_0xc5ac00; 1 drivers -v0xc4b070_0 .net "in02addr", 0 0, L_0xc540a0; 1 drivers -v0xc4b110_0 .net "in030addr", 0 0, L_0xc589d0; 1 drivers -v0xc4b1b0_0 .net "in031addr", 0 0, L_0xc58ad0; 1 drivers -v0xc4b250_0 .net "in03addr", 0 0, L_0xc57a70; 1 drivers -v0xc4b770_0 .net "in04addr", 0 0, L_0xc57c00; 1 drivers -v0xc4b810_0 .net "in05addr", 0 0, L_0xc57dd0; 1 drivers -v0xc4b380_0 .net "in06addr", 0 0, L_0xc57fa0; 1 drivers -v0xc4b420_0 .net "in07addr", 0 0, L_0xc58200; 1 drivers -v0xc4b4c0_0 .net "in08addr", 0 0, L_0xc583a0; 1 drivers -v0xc4b560_0 .net "in09addr", 0 0, L_0xc58550; 1 drivers -v0xc4b600_0 .alias "in1", 31 0, v0xc50b70_0; -v0xc4b6a0_0 .net "in10addr", 0 0, L_0xc5ab00; 1 drivers -v0xc4bcc0_0 .net "in110addr", 0 0, L_0xc5c5a0; 1 drivers -v0xc4bd40_0 .net "in111addr", 0 0, L_0xc5c730; 1 drivers -v0xc4b890_0 .net "in112addr", 0 0, L_0xc5c940; 1 drivers -v0xc4b930_0 .net "in113addr", 0 0, L_0xc5cad0; 1 drivers -v0xc4b9d0_0 .net "in114addr", 0 0, L_0xc5ccb0; 1 drivers -v0xc4ba70_0 .net "in115addr", 0 0, L_0xc5ce70; 1 drivers -v0xc4bb10_0 .net "in116addr", 0 0, L_0xc5cf40; 1 drivers -v0xc4bbb0_0 .net "in117addr", 0 0, L_0xc5d3d0; 1 drivers -v0xc4c230_0 .net "in118addr", 0 0, L_0xc5d530; 1 drivers -v0xc4c2b0_0 .net "in119addr", 0 0, L_0xc5d6c0; 1 drivers -v0xc4bdc0_0 .net "in11addr", 0 0, L_0xc58f60; 1 drivers -v0xc4be40_0 .net "in120addr", 0 0, L_0xc5d890; 1 drivers -v0xc4bee0_0 .net "in121addr", 0 0, L_0xc5da50; 1 drivers -v0xc4bf80_0 .net "in122addr", 0 0, L_0xc5db70; 1 drivers -v0xc4c020_0 .net "in123addr", 0 0, L_0xc5dd30; 1 drivers -v0xc4c0c0_0 .net "in124addr", 0 0, L_0xc5def0; 1 drivers -v0xc4c160_0 .net "in125addr", 0 0, L_0xc5e150; 1 drivers -v0xc4c7e0_0 .net "in126addr", 0 0, L_0xc5e310; 1 drivers -v0xc4c330_0 .net "in127addr", 0 0, L_0xc5e4a0; 1 drivers -v0xc4c3d0_0 .net "in128addr", 0 0, L_0xc5e660; 1 drivers -v0xc4c470_0 .net "in129addr", 0 0, L_0xc5e820; 1 drivers -v0xc4c510_0 .net "in12addr", 0 0, L_0xc56d20; 1 drivers -v0xc4c5b0_0 .net "in130addr", 0 0, L_0xc5e9e0; 1 drivers -v0xc4c650_0 .net "in131addr", 0 0, L_0xc5d250; 1 drivers -v0xc4c6f0_0 .net "in13addr", 0 0, L_0xc56f60; 1 drivers -v0xc4cd50_0 .net "in14addr", 0 0, L_0xc5b9b0; 1 drivers -v0xc4c860_0 .net "in15addr", 0 0, L_0xc5ba70; 1 drivers -v0xc4c900_0 .net "in16addr", 0 0, L_0xc5bdc0; 1 drivers -v0xc4c9a0_0 .net "in17addr", 0 0, L_0xc5bf70; 1 drivers -v0xc4ca40_0 .net "in18addr", 0 0, L_0xc5c160; 1 drivers -v0xc4cae0_0 .net "in19addr", 0 0, L_0xc5c450; 1 drivers -v0xc4cb80_0 .net "invaddr", 0 0, L_0xc4d930; 1 drivers -v0xc4cc20_0 .alias "out", 31 0, v0xc505d0_0; -L_0xc53f20 .part v0xc50f30_0, 0, 1; -L_0xc57860 .part v0xc50f30_0, 1, 1; -L_0xc579d0 .part v0xc50f30_0, 2, 1; -L_0xc57b60 .part v0xc50f30_0, 3, 1; -L_0xc57d30 .part v0xc50f30_0, 4, 1; -L_0xc57ec0 .part v0xc50f30_0, 5, 1; -L_0xc58110 .part v0xc50f30_0, 6, 1; -L_0xc582b0 .part v0xc50f30_0, 7, 1; -L_0xc584b0 .part v0xc50f30_0, 8, 1; -L_0xc585f0 .part v0xc50f30_0, 9, 1; -L_0xc58800 .part v0xc50f30_0, 10, 1; -L_0xc58930 .part v0xc50f30_0, 11, 1; -L_0xc58b50 .part v0xc50f30_0, 12, 1; -L_0xc58d10 .part v0xc50f30_0, 13, 1; -L_0xc59160 .part v0xc50f30_0, 14, 1; -L_0xc592c0 .part v0xc50f30_0, 15, 1; -L_0xc595b0 .part v0xc50f30_0, 16, 1; -L_0xc596e0 .part v0xc50f30_0, 17, 1; -L_0xc59510 .part v0xc50f30_0, 18, 1; -L_0xc59a80 .part v0xc50f30_0, 19, 1; -L_0xc598b0 .part v0xc50f30_0, 20, 1; -L_0xc59e00 .part v0xc50f30_0, 21, 1; -L_0xc59c20 .part v0xc50f30_0, 22, 1; -L_0xc5a1e0 .part v0xc50f30_0, 23, 1; -L_0xc59ff0 .part v0xc50f30_0, 24, 1; -L_0xc5a5b0 .part v0xc50f30_0, 25, 1; -L_0xc5a3e0 .part v0xc50f30_0, 26, 1; -L_0xc5a920 .part v0xc50f30_0, 27, 1; -L_0xc5a780 .part v0xc50f30_0, 28, 1; -L_0xc5acf0 .part v0xc50f30_0, 29, 1; -L_0xc5a9c0 .part v0xc50f30_0, 30, 1; -L_0xc59020 .part v0xc50f30_0, 31, 1; -L_0xc58ec0 .part RS_0x7fb7ca18ba18, 0, 1; -L_0xc57070 .part RS_0x7fb7ca18ba18, 1, 1; -L_0xc56ec0 .part RS_0x7fb7ca18ba18, 2, 1; -L_0xc5bd20 .part RS_0x7fb7ca18ba18, 3, 1; -L_0xc5bb60 .part RS_0x7fb7ca18ba18, 4, 1; -L_0xc5c0c0 .part RS_0x7fb7ca18ba18, 5, 1; -L_0xc5bed0 .part RS_0x7fb7ca18ba18, 6, 1; -L_0xc5c500 .part RS_0x7fb7ca18ba18, 7, 1; -L_0xc5c3b0 .part RS_0x7fb7ca18ba18, 8, 1; -L_0xc5c8a0 .part RS_0x7fb7ca18ba18, 9, 1; -L_0xc5c690 .part RS_0x7fb7ca18ba18, 10, 1; -L_0xc5cc10 .part RS_0x7fb7ca18ba18, 11, 1; -L_0xc5ca30 .part RS_0x7fb7ca18ba18, 12, 1; -L_0xc5cfa0 .part RS_0x7fb7ca18ba18, 13, 1; -L_0xc5cdd0 .part RS_0x7fb7ca18ba18, 14, 1; -L_0xc5c280 .part RS_0x7fb7ca18ba18, 15, 1; -L_0xc5d0d0 .part RS_0x7fb7ca18ba18, 16, 1; -L_0xc5d490 .part RS_0x7fb7ca18ba18, 17, 1; -L_0xc5d620 .part RS_0x7fb7ca18ba18, 18, 1; -L_0xc5d7e0 .part RS_0x7fb7ca18ba18, 19, 1; -L_0xc5d9b0 .part RS_0x7fb7ca18ba18, 20, 1; -L_0xc5df50 .part RS_0x7fb7ca18ba18, 21, 1; -L_0xc5dc90 .part RS_0x7fb7ca18ba18, 22, 1; -L_0xc5de50 .part RS_0x7fb7ca18ba18, 23, 1; -L_0xc5e0b0 .part RS_0x7fb7ca18ba18, 24, 1; -L_0xc5e270 .part RS_0x7fb7ca18ba18, 25, 1; -L_0xc5e400 .part RS_0x7fb7ca18ba18, 26, 1; -L_0xc5e5c0 .part RS_0x7fb7ca18ba18, 27, 1; -L_0xc5e780 .part RS_0x7fb7ca18ba18, 28, 1; -L_0xc5e940 .part RS_0x7fb7ca18ba18, 29, 1; -L_0xc5ec80 .part RS_0x7fb7ca18ba18, 30, 1; -L_0xc5ed20 .part RS_0x7fb7ca18ba18, 31, 1; -L_0xc57320 .part/pv L_0xc5d370, 0, 1, 32; -L_0xc5f030 .part/pv L_0xc5ea70, 1, 1, 32; -L_0xc57110 .part/pv L_0xc57240, 2, 1, 32; -L_0xc5ee10 .part/pv L_0xc5eeb0, 3, 1, 32; -L_0xc5fd60 .part/pv L_0xc5fe00, 4, 1, 32; -L_0xc5ff00 .part/pv L_0xc5ffa0, 5, 1, 32; -L_0xc60130 .part/pv L_0xc571b0, 6, 1, 32; -L_0xc60420 .part/pv L_0xc604c0, 7, 1, 32; -L_0xc60650 .part/pv L_0xc606f0, 8, 1, 32; -L_0xc60930 .part/pv L_0xc609d0, 9, 1, 32; -L_0xc60b60 .part/pv L_0xc60c00, 10, 1, 32; -L_0xc60d90 .part/pv L_0xc60e30, 11, 1, 32; -L_0xc60fc0 .part/pv L_0xc61060, 12, 1, 32; -L_0xc611f0 .part/pv L_0xc61290, 13, 1, 32; -L_0xc61420 .part/pv L_0xc616d0, 14, 1, 32; -L_0xc61770 .part/pv L_0xc61810, 15, 1, 32; -L_0xc619a0 .part/pv L_0xc61a40, 16, 1, 32; -L_0xc61bf0 .part/pv L_0xc61c90, 17, 1, 32; -L_0xc61e40 .part/pv L_0xc61ee0, 18, 1, 32; -L_0xc62090 .part/pv L_0xc623e0, 19, 1, 32; -L_0xc62590 .part/pv L_0xc62630, 20, 1, 32; -L_0xc626d0 .part/pv L_0xc62770, 21, 1, 32; -L_0xc62130 .part/pv L_0xc62920, 22, 1, 32; -L_0xc62320 .part/pv L_0xc62a70, 23, 1, 32; -L_0xc62c00 .part/pv L_0xc62ca0, 24, 1, 32; -L_0xc62e70 .part/pv L_0xc631f0, 25, 1, 32; -L_0xc633a0 .part/pv L_0xc63440, 26, 1, 32; -L_0xc63590 .part/pv L_0xc63630, 27, 1, 32; -L_0xc62f10 .part/pv L_0xc62fb0, 28, 1, 32; -L_0xc638c0 .part/pv L_0xc63960, 29, 1, 32; -L_0xc63b10 .part/pv L_0xc59f00, 30, 1, 32; -L_0xc614c0 .part/pv L_0xc5ba10, 31, 1, 32; -S_0xc42920 .scope module, "adder0" "FullAdder4bit" 4 238, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc67fc0/d .functor AND 1, L_0xc686a0, L_0xc68740, C4<1>, C4<1>; -L_0xc67fc0 .delay (50000,50000,50000) L_0xc67fc0/d; -L_0xc68860/d .functor NOR 1, L_0xc68900, L_0xc689a0, C4<0>, C4<0>; -L_0xc68860 .delay (50000,50000,50000) L_0xc68860/d; -L_0xc68ad0/d .functor AND 1, L_0xc68bc0, L_0xc68c60, C4<1>, C4<1>; -L_0xc68ad0 .delay (50000,50000,50000) L_0xc68ad0/d; -L_0xc68a40/d .functor NOR 1, L_0xc68e80, L_0xc69030, C4<0>, C4<0>; -L_0xc68a40 .delay (50000,50000,50000) L_0xc68a40/d; -L_0xc68d50/d .functor OR 1, L_0xc67fc0, L_0xc68860, C4<0>, C4<0>; -L_0xc68d50 .delay (50000,50000,50000) L_0xc68d50/d; -L_0xc69270/d .functor NOR 1, L_0xc68ad0, L_0xc68a40, C4<0>, C4<0>; -L_0xc69270 .delay (50000,50000,50000) L_0xc69270/d; -L_0xc693b0/d .functor AND 1, L_0xc68d50, L_0xc69270, C4<1>, C4<1>; -L_0xc693b0 .delay (50000,50000,50000) L_0xc693b0/d; -v0xc45510_0 .net *"_s25", 0 0, L_0xc686a0; 1 drivers -v0xc455d0_0 .net *"_s27", 0 0, L_0xc68740; 1 drivers -v0xc45670_0 .net *"_s29", 0 0, L_0xc68900; 1 drivers -v0xc45710_0 .net *"_s31", 0 0, L_0xc689a0; 1 drivers -v0xc45790_0 .net *"_s33", 0 0, L_0xc68bc0; 1 drivers -v0xc45830_0 .net *"_s35", 0 0, L_0xc68c60; 1 drivers -v0xc458d0_0 .net *"_s37", 0 0, L_0xc68e80; 1 drivers -v0xc45970_0 .net *"_s39", 0 0, L_0xc69030; 1 drivers -v0xc45a10_0 .net "a", 3 0, L_0xc57650; 1 drivers -v0xc45ab0_0 .net "aandb", 0 0, L_0xc67fc0; 1 drivers -v0xc45b50_0 .net "abandnoror", 0 0, L_0xc68d50; 1 drivers -v0xc45bf0_0 .net "anorb", 0 0, L_0xc68860; 1 drivers -v0xc45c90_0 .net "b", 3 0, L_0xc57740; 1 drivers -v0xc45d30_0 .net "bandsum", 0 0, L_0xc68ad0; 1 drivers -v0xc45e50_0 .net "bnorsum", 0 0, L_0xc68a40; 1 drivers -v0xc45ef0_0 .net "bsumandnornor", 0 0, L_0xc69270; 1 drivers -v0xc45db0_0 .net "carryin", 0 0, L_0xc69810; 1 drivers -v0xc46020_0 .alias "carryout", 0 0, v0xc4ffb0_0; -v0xc45f70_0 .net "carryout1", 0 0, L_0xc615b0; 1 drivers -v0xc46140_0 .net "carryout2", 0 0, L_0xc65960; 1 drivers -v0xc46270_0 .net "carryout3", 0 0, L_0xc669c0; 1 drivers -v0xc462f0_0 .alias "overflow", 0 0, v0xc4ccc0_0; -v0xc461c0_0 .net8 "sum", 3 0, RS_0x7fb7ca18a188; 4 drivers -L_0xc653d0 .part/pv L_0xc652c0, 0, 1, 4; -L_0xc65470 .part L_0xc57650, 0, 1; -L_0xc65510 .part L_0xc57740, 0, 1; -L_0xc66300 .part/pv L_0xc66230, 1, 1, 4; -L_0xc663f0 .part L_0xc57650, 1, 1; -L_0xc664e0 .part L_0xc57740, 1, 1; -L_0xc67360 .part/pv L_0xc67290, 2, 1, 4; -L_0xc67400 .part L_0xc57650, 2, 1; -L_0xc674f0 .part L_0xc57740, 2, 1; -L_0xc68260 .part/pv L_0xc68190, 3, 1, 4; -L_0xc68390 .part L_0xc57650, 3, 1; -L_0xc684c0 .part L_0xc57740, 3, 1; -L_0xc686a0 .part L_0xc57650, 3, 1; -L_0xc68740 .part L_0xc57740, 3, 1; -L_0xc68900 .part L_0xc57650, 3, 1; -L_0xc689a0 .part L_0xc57740, 3, 1; -L_0xc68bc0 .part L_0xc57740, 3, 1; -L_0xc68c60 .part RS_0x7fb7ca18a188, 3, 1; -L_0xc68e80 .part L_0xc57740, 3, 1; -L_0xc69030 .part RS_0x7fb7ca18a188, 3, 1; -S_0xc44a80 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc42920; - .timescale -9 -12; -L_0xc64100/d .functor AND 1, L_0xc65470, L_0xc65510, C4<1>, C4<1>; -L_0xc64100 .delay (50000,50000,50000) L_0xc64100/d; -L_0xc64210/d .functor AND 1, L_0xc65470, L_0xc69810, C4<1>, C4<1>; -L_0xc64210 .delay (50000,50000,50000) L_0xc64210/d; -L_0xc64350/d .functor AND 1, L_0xc65510, L_0xc69810, C4<1>, C4<1>; -L_0xc64350 .delay (50000,50000,50000) L_0xc64350/d; -L_0xc637e0/d .functor OR 1, L_0xc64100, L_0xc64210, C4<0>, C4<0>; -L_0xc637e0 .delay (50000,50000,50000) L_0xc637e0/d; -L_0xc615b0/d .functor OR 1, L_0xc637e0, L_0xc64350, C4<0>, C4<0>; -L_0xc615b0 .delay (50000,50000,50000) L_0xc615b0/d; -L_0xc64bc0/d .functor OR 1, L_0xc65470, L_0xc65510, C4<0>, C4<0>; -L_0xc64bc0 .delay (50000,50000,50000) L_0xc64bc0/d; -L_0xc64ca0/d .functor OR 1, L_0xc64bc0, L_0xc69810, C4<0>, C4<0>; -L_0xc64ca0 .delay (50000,50000,50000) L_0xc64ca0/d; -L_0xc64dd0/d .functor NOT 1, L_0xc615b0, C4<0>, C4<0>, C4<0>; -L_0xc64dd0 .delay (50000,50000,50000) L_0xc64dd0/d; -L_0xc64f00/d .functor AND 1, L_0xc64dd0, L_0xc64ca0, C4<1>, C4<1>; -L_0xc64f00 .delay (50000,50000,50000) L_0xc64f00/d; -L_0xc65000/d .functor AND 1, L_0xc65470, L_0xc65510, C4<1>, C4<1>; -L_0xc65000 .delay (50000,50000,50000) L_0xc65000/d; -L_0xc65220/d .functor AND 1, L_0xc65000, L_0xc69810, C4<1>, C4<1>; -L_0xc65220 .delay (50000,50000,50000) L_0xc65220/d; -L_0xc652c0/d .functor OR 1, L_0xc64f00, L_0xc65220, C4<0>, C4<0>; -L_0xc652c0 .delay (50000,50000,50000) L_0xc652c0/d; -v0xc44b70_0 .net "a", 0 0, L_0xc65470; 1 drivers -v0xc44c30_0 .net "ab", 0 0, L_0xc64100; 1 drivers -v0xc44cd0_0 .net "acarryin", 0 0, L_0xc64210; 1 drivers -v0xc44d70_0 .net "andall", 0 0, L_0xc65220; 1 drivers -v0xc44df0_0 .net "andsingleintermediate", 0 0, L_0xc65000; 1 drivers -v0xc44e90_0 .net "andsumintermediate", 0 0, L_0xc64f00; 1 drivers -v0xc44f30_0 .net "b", 0 0, L_0xc65510; 1 drivers -v0xc44fd0_0 .net "bcarryin", 0 0, L_0xc64350; 1 drivers -v0xc45070_0 .alias "carryin", 0 0, v0xc45db0_0; -v0xc45110_0 .alias "carryout", 0 0, v0xc45f70_0; -v0xc45190_0 .net "invcarryout", 0 0, L_0xc64dd0; 1 drivers -v0xc45210_0 .net "orall", 0 0, L_0xc64ca0; 1 drivers -v0xc452b0_0 .net "orpairintermediate", 0 0, L_0xc637e0; 1 drivers -v0xc45350_0 .net "orsingleintermediate", 0 0, L_0xc64bc0; 1 drivers -v0xc45470_0 .net "sum", 0 0, L_0xc652c0; 1 drivers -S_0xc43ff0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc42920; - .timescale -9 -12; -L_0xc651c0/d .functor AND 1, L_0xc663f0, L_0xc664e0, C4<1>, C4<1>; -L_0xc651c0 .delay (50000,50000,50000) L_0xc651c0/d; -L_0xc65640/d .functor AND 1, L_0xc663f0, L_0xc615b0, C4<1>, C4<1>; -L_0xc65640 .delay (50000,50000,50000) L_0xc65640/d; -L_0xc65730/d .functor AND 1, L_0xc664e0, L_0xc615b0, C4<1>, C4<1>; -L_0xc65730 .delay (50000,50000,50000) L_0xc65730/d; -L_0xc65820/d .functor OR 1, L_0xc651c0, L_0xc65640, C4<0>, C4<0>; -L_0xc65820 .delay (50000,50000,50000) L_0xc65820/d; -L_0xc65960/d .functor OR 1, L_0xc65820, L_0xc65730, C4<0>, C4<0>; -L_0xc65960 .delay (50000,50000,50000) L_0xc65960/d; -L_0xc65aa0/d .functor OR 1, L_0xc663f0, L_0xc664e0, C4<0>, C4<0>; -L_0xc65aa0 .delay (50000,50000,50000) L_0xc65aa0/d; -L_0xc65b80/d .functor OR 1, L_0xc65aa0, L_0xc615b0, C4<0>, C4<0>; -L_0xc65b80 .delay (50000,50000,50000) L_0xc65b80/d; -L_0xc65c70/d .functor NOT 1, L_0xc65960, C4<0>, C4<0>, C4<0>; -L_0xc65c70 .delay (50000,50000,50000) L_0xc65c70/d; -L_0xc65da0/d .functor AND 1, L_0xc65c70, L_0xc65b80, C4<1>, C4<1>; -L_0xc65da0 .delay (50000,50000,50000) L_0xc65da0/d; -L_0xc65ea0/d .functor AND 1, L_0xc663f0, L_0xc664e0, C4<1>, C4<1>; -L_0xc65ea0 .delay (50000,50000,50000) L_0xc65ea0/d; -L_0xc660c0/d .functor AND 1, L_0xc65ea0, L_0xc615b0, C4<1>, C4<1>; -L_0xc660c0 .delay (50000,50000,50000) L_0xc660c0/d; -L_0xc66230/d .functor OR 1, L_0xc65da0, L_0xc660c0, C4<0>, C4<0>; -L_0xc66230 .delay (50000,50000,50000) L_0xc66230/d; -v0xc440e0_0 .net "a", 0 0, L_0xc663f0; 1 drivers -v0xc441a0_0 .net "ab", 0 0, L_0xc651c0; 1 drivers -v0xc44240_0 .net "acarryin", 0 0, L_0xc65640; 1 drivers -v0xc442e0_0 .net "andall", 0 0, L_0xc660c0; 1 drivers -v0xc44360_0 .net "andsingleintermediate", 0 0, L_0xc65ea0; 1 drivers -v0xc44400_0 .net "andsumintermediate", 0 0, L_0xc65da0; 1 drivers -v0xc444a0_0 .net "b", 0 0, L_0xc664e0; 1 drivers -v0xc44540_0 .net "bcarryin", 0 0, L_0xc65730; 1 drivers -v0xc445e0_0 .alias "carryin", 0 0, v0xc45f70_0; -v0xc44680_0 .alias "carryout", 0 0, v0xc46140_0; -v0xc44700_0 .net "invcarryout", 0 0, L_0xc65c70; 1 drivers -v0xc44780_0 .net "orall", 0 0, L_0xc65b80; 1 drivers -v0xc44820_0 .net "orpairintermediate", 0 0, L_0xc65820; 1 drivers -v0xc448c0_0 .net "orsingleintermediate", 0 0, L_0xc65aa0; 1 drivers -v0xc449e0_0 .net "sum", 0 0, L_0xc66230; 1 drivers -S_0xc43510 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc42920; - .timescale -9 -12; -L_0xc66060/d .functor AND 1, L_0xc67400, L_0xc674f0, C4<1>, C4<1>; -L_0xc66060 .delay (50000,50000,50000) L_0xc66060/d; -L_0xc666a0/d .functor AND 1, L_0xc67400, L_0xc65960, C4<1>, C4<1>; -L_0xc666a0 .delay (50000,50000,50000) L_0xc666a0/d; -L_0xc66790/d .functor AND 1, L_0xc674f0, L_0xc65960, C4<1>, C4<1>; -L_0xc66790 .delay (50000,50000,50000) L_0xc66790/d; -L_0xc66880/d .functor OR 1, L_0xc66060, L_0xc666a0, C4<0>, C4<0>; -L_0xc66880 .delay (50000,50000,50000) L_0xc66880/d; -L_0xc669c0/d .functor OR 1, L_0xc66880, L_0xc66790, C4<0>, C4<0>; -L_0xc669c0 .delay (50000,50000,50000) L_0xc669c0/d; -L_0xc66b00/d .functor OR 1, L_0xc67400, L_0xc674f0, C4<0>, C4<0>; -L_0xc66b00 .delay (50000,50000,50000) L_0xc66b00/d; -L_0xc66be0/d .functor OR 1, L_0xc66b00, L_0xc65960, C4<0>, C4<0>; -L_0xc66be0 .delay (50000,50000,50000) L_0xc66be0/d; -L_0xc66cd0/d .functor NOT 1, L_0xc669c0, C4<0>, C4<0>, C4<0>; -L_0xc66cd0 .delay (50000,50000,50000) L_0xc66cd0/d; -L_0xc66e00/d .functor AND 1, L_0xc66cd0, L_0xc66be0, C4<1>, C4<1>; -L_0xc66e00 .delay (50000,50000,50000) L_0xc66e00/d; -L_0xc66f00/d .functor AND 1, L_0xc67400, L_0xc674f0, C4<1>, C4<1>; -L_0xc66f00 .delay (50000,50000,50000) L_0xc66f00/d; -L_0xc67120/d .functor AND 1, L_0xc66f00, L_0xc65960, C4<1>, C4<1>; -L_0xc67120 .delay (50000,50000,50000) L_0xc67120/d; -L_0xc67290/d .functor OR 1, L_0xc66e00, L_0xc67120, C4<0>, C4<0>; -L_0xc67290 .delay (50000,50000,50000) L_0xc67290/d; -v0xc43600_0 .net "a", 0 0, L_0xc67400; 1 drivers -v0xc436c0_0 .net "ab", 0 0, L_0xc66060; 1 drivers -v0xc43760_0 .net "acarryin", 0 0, L_0xc666a0; 1 drivers -v0xc43800_0 .net "andall", 0 0, L_0xc67120; 1 drivers -v0xc43880_0 .net "andsingleintermediate", 0 0, L_0xc66f00; 1 drivers -v0xc43920_0 .net "andsumintermediate", 0 0, L_0xc66e00; 1 drivers -v0xc439c0_0 .net "b", 0 0, L_0xc674f0; 1 drivers -v0xc43a60_0 .net "bcarryin", 0 0, L_0xc66790; 1 drivers -v0xc43b50_0 .alias "carryin", 0 0, v0xc46140_0; -v0xc43bf0_0 .alias "carryout", 0 0, v0xc46270_0; -v0xc43c70_0 .net "invcarryout", 0 0, L_0xc66cd0; 1 drivers -v0xc43cf0_0 .net "orall", 0 0, L_0xc66be0; 1 drivers -v0xc43d90_0 .net "orpairintermediate", 0 0, L_0xc66880; 1 drivers -v0xc43e30_0 .net "orsingleintermediate", 0 0, L_0xc66b00; 1 drivers -v0xc43f50_0 .net "sum", 0 0, L_0xc67290; 1 drivers -S_0xc42a10 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc42920; - .timescale -9 -12; -L_0xc670c0/d .functor AND 1, L_0xc68390, L_0xc684c0, C4<1>, C4<1>; -L_0xc670c0 .delay (50000,50000,50000) L_0xc670c0/d; -L_0xc675e0/d .functor AND 1, L_0xc68390, L_0xc669c0, C4<1>, C4<1>; -L_0xc675e0 .delay (50000,50000,50000) L_0xc675e0/d; -L_0xc676d0/d .functor AND 1, L_0xc684c0, L_0xc669c0, C4<1>, C4<1>; -L_0xc676d0 .delay (50000,50000,50000) L_0xc676d0/d; -L_0xc677c0/d .functor OR 1, L_0xc670c0, L_0xc675e0, C4<0>, C4<0>; -L_0xc677c0 .delay (50000,50000,50000) L_0xc677c0/d; -L_0xc67900/d .functor OR 1, L_0xc677c0, L_0xc676d0, C4<0>, C4<0>; -L_0xc67900 .delay (50000,50000,50000) L_0xc67900/d; -L_0xc67a40/d .functor OR 1, L_0xc68390, L_0xc684c0, C4<0>, C4<0>; -L_0xc67a40 .delay (50000,50000,50000) L_0xc67a40/d; -L_0xc67b20/d .functor OR 1, L_0xc67a40, L_0xc669c0, C4<0>, C4<0>; -L_0xc67b20 .delay (50000,50000,50000) L_0xc67b20/d; -L_0xc67c10/d .functor NOT 1, L_0xc67900, C4<0>, C4<0>, C4<0>; -L_0xc67c10 .delay (50000,50000,50000) L_0xc67c10/d; -L_0xc67cb0/d .functor AND 1, L_0xc67c10, L_0xc67b20, C4<1>, C4<1>; -L_0xc67cb0 .delay (50000,50000,50000) L_0xc67cb0/d; -L_0xc67e00/d .functor AND 1, L_0xc68390, L_0xc684c0, C4<1>, C4<1>; -L_0xc67e00 .delay (50000,50000,50000) L_0xc67e00/d; -L_0xc68020/d .functor AND 1, L_0xc67e00, L_0xc669c0, C4<1>, C4<1>; -L_0xc68020 .delay (50000,50000,50000) L_0xc68020/d; -L_0xc68190/d .functor OR 1, L_0xc67cb0, L_0xc68020, C4<0>, C4<0>; -L_0xc68190 .delay (50000,50000,50000) L_0xc68190/d; -v0xc42b00_0 .net "a", 0 0, L_0xc68390; 1 drivers -v0xc42bc0_0 .net "ab", 0 0, L_0xc670c0; 1 drivers -v0xc42c60_0 .net "acarryin", 0 0, L_0xc675e0; 1 drivers -v0xc42d00_0 .net "andall", 0 0, L_0xc68020; 1 drivers -v0xc42d80_0 .net "andsingleintermediate", 0 0, L_0xc67e00; 1 drivers -v0xc42e20_0 .net "andsumintermediate", 0 0, L_0xc67cb0; 1 drivers -v0xc42ec0_0 .net "b", 0 0, L_0xc684c0; 1 drivers -v0xc42f60_0 .net "bcarryin", 0 0, L_0xc676d0; 1 drivers -v0xc43050_0 .alias "carryin", 0 0, v0xc46270_0; -v0xc430f0_0 .alias "carryout", 0 0, v0xc4ffb0_0; -v0xc43170_0 .net "invcarryout", 0 0, L_0xc67c10; 1 drivers -v0xc43210_0 .net "orall", 0 0, L_0xc67b20; 1 drivers -v0xc432b0_0 .net "orpairintermediate", 0 0, L_0xc677c0; 1 drivers -v0xc43350_0 .net "orsingleintermediate", 0 0, L_0xc67a40; 1 drivers -v0xc43470_0 .net "sum", 0 0, L_0xc68190; 1 drivers -S_0xc3ede0 .scope module, "adder1" "FullAdder4bit" 4 239, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc6d460/d .functor AND 1, L_0xc6dba0, L_0xc6dc40, C4<1>, C4<1>; -L_0xc6d460 .delay (50000,50000,50000) L_0xc6d460/d; -L_0xc6dce0/d .functor NOR 1, L_0xc6dd80, L_0xc6de20, C4<0>, C4<0>; -L_0xc6dce0 .delay (50000,50000,50000) L_0xc6dce0/d; -L_0xc6df50/d .functor AND 1, L_0xc6e040, L_0xc6e0e0, C4<1>, C4<1>; -L_0xc6df50 .delay (50000,50000,50000) L_0xc6df50/d; -L_0xc6dec0/d .functor NOR 1, L_0xc6e300, L_0xc6e4b0, C4<0>, C4<0>; -L_0xc6dec0 .delay (50000,50000,50000) L_0xc6dec0/d; -L_0xc6e1d0/d .functor OR 1, L_0xc6d460, L_0xc6dce0, C4<0>, C4<0>; -L_0xc6e1d0 .delay (50000,50000,50000) L_0xc6e1d0/d; -L_0xc6e6f0/d .functor NOR 1, L_0xc6df50, L_0xc6dec0, C4<0>, C4<0>; -L_0xc6e6f0 .delay (50000,50000,50000) L_0xc6e6f0/d; -L_0xc6e830/d .functor AND 1, L_0xc6e1d0, L_0xc6e6f0, C4<1>, C4<1>; -L_0xc6e830 .delay (50000,50000,50000) L_0xc6e830/d; -v0xc419d0_0 .net *"_s25", 0 0, L_0xc6dba0; 1 drivers -v0xc41a90_0 .net *"_s27", 0 0, L_0xc6dc40; 1 drivers -v0xc41b30_0 .net *"_s29", 0 0, L_0xc6dd80; 1 drivers -v0xc41bd0_0 .net *"_s31", 0 0, L_0xc6de20; 1 drivers -v0xc41c80_0 .net *"_s33", 0 0, L_0xc6e040; 1 drivers -v0xc41d20_0 .net *"_s35", 0 0, L_0xc6e0e0; 1 drivers -v0xc41dc0_0 .net *"_s37", 0 0, L_0xc6e300; 1 drivers -v0xc41e60_0 .net *"_s39", 0 0, L_0xc6e4b0; 1 drivers -v0xc41f00_0 .net "a", 3 0, L_0xc695e0; 1 drivers -v0xc41fa0_0 .net "aandb", 0 0, L_0xc6d460; 1 drivers -v0xc42040_0 .net "abandnoror", 0 0, L_0xc6e1d0; 1 drivers -v0xc420e0_0 .net "anorb", 0 0, L_0xc6dce0; 1 drivers -v0xc42180_0 .net "b", 3 0, L_0xc69680; 1 drivers -v0xc42220_0 .net "bandsum", 0 0, L_0xc6df50; 1 drivers -v0xc42340_0 .net "bnorsum", 0 0, L_0xc6dec0; 1 drivers -v0xc423e0_0 .net "bsumandnornor", 0 0, L_0xc6e6f0; 1 drivers -v0xc422a0_0 .alias "carryin", 0 0, v0xc4ffb0_0; -v0xc42510_0 .alias "carryout", 0 0, v0xc503b0_0; -v0xc42460_0 .net "carryout1", 0 0, L_0xc69cd0; 1 drivers -v0xc42630_0 .net "carryout2", 0 0, L_0xc6ab00; 1 drivers -v0xc42760_0 .net "carryout3", 0 0, L_0xc6bbe0; 1 drivers -v0xc427e0_0 .alias "overflow", 0 0, v0xc4d300_0; -v0xc426b0_0 .net8 "sum", 3 0, RS_0x7fb7ca1893a8; 4 drivers -L_0xc6a570 .part/pv L_0xc6a4d0, 0, 1, 4; -L_0xc6a610 .part L_0xc695e0, 0, 1; -L_0xc6a6b0 .part L_0xc69680, 0, 1; -L_0xc6b4e0 .part/pv L_0xc6b3d0, 1, 1, 4; -L_0xc6b5d0 .part L_0xc695e0, 1, 1; -L_0xc6b6c0 .part L_0xc69680, 1, 1; -L_0xc6c6a0 .part/pv L_0xc6c590, 2, 1, 4; -L_0xc6c740 .part L_0xc695e0, 2, 1; -L_0xc6c830 .part L_0xc69680, 2, 1; -L_0xc6d760 .part/pv L_0xc6d650, 3, 1, 4; -L_0xc6d890 .part L_0xc695e0, 3, 1; -L_0xc6d9c0 .part L_0xc69680, 3, 1; -L_0xc6dba0 .part L_0xc695e0, 3, 1; -L_0xc6dc40 .part L_0xc69680, 3, 1; -L_0xc6dd80 .part L_0xc695e0, 3, 1; -L_0xc6de20 .part L_0xc69680, 3, 1; -L_0xc6e040 .part L_0xc69680, 3, 1; -L_0xc6e0e0 .part RS_0x7fb7ca1893a8, 3, 1; -L_0xc6e300 .part L_0xc69680, 3, 1; -L_0xc6e4b0 .part RS_0x7fb7ca1893a8, 3, 1; -S_0xc40f10 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc3ede0; - .timescale -9 -12; -L_0xc577e0/d .functor AND 1, L_0xc6a610, L_0xc6a6b0, C4<1>, C4<1>; -L_0xc577e0 .delay (50000,50000,50000) L_0xc577e0/d; -L_0xc69940/d .functor AND 1, L_0xc6a610, L_0xc67900, C4<1>, C4<1>; -L_0xc69940 .delay (50000,50000,50000) L_0xc69940/d; -L_0xc69a30/d .functor AND 1, L_0xc6a6b0, L_0xc67900, C4<1>, C4<1>; -L_0xc69a30 .delay (50000,50000,50000) L_0xc69a30/d; -L_0xc50070/d .functor OR 1, L_0xc577e0, L_0xc69940, C4<0>, C4<0>; -L_0xc50070 .delay (50000,50000,50000) L_0xc50070/d; -L_0xc69cd0/d .functor OR 1, L_0xc50070, L_0xc69a30, C4<0>, C4<0>; -L_0xc69cd0 .delay (50000,50000,50000) L_0xc69cd0/d; -L_0xc69e10/d .functor OR 1, L_0xc6a610, L_0xc6a6b0, C4<0>, C4<0>; -L_0xc69e10 .delay (50000,50000,50000) L_0xc69e10/d; -L_0xc69ef0/d .functor OR 1, L_0xc69e10, L_0xc67900, C4<0>, C4<0>; -L_0xc69ef0 .delay (50000,50000,50000) L_0xc69ef0/d; -L_0xc69fe0/d .functor NOT 1, L_0xc69cd0, C4<0>, C4<0>, C4<0>; -L_0xc69fe0 .delay (50000,50000,50000) L_0xc69fe0/d; -L_0xc6a110/d .functor AND 1, L_0xc69fe0, L_0xc69ef0, C4<1>, C4<1>; -L_0xc6a110 .delay (50000,50000,50000) L_0xc6a110/d; -L_0xc6a210/d .functor AND 1, L_0xc6a610, L_0xc6a6b0, C4<1>, C4<1>; -L_0xc6a210 .delay (50000,50000,50000) L_0xc6a210/d; -L_0xc6a430/d .functor AND 1, L_0xc6a210, L_0xc67900, C4<1>, C4<1>; -L_0xc6a430 .delay (50000,50000,50000) L_0xc6a430/d; -L_0xc6a4d0/d .functor OR 1, L_0xc6a110, L_0xc6a430, C4<0>, C4<0>; -L_0xc6a4d0 .delay (50000,50000,50000) L_0xc6a4d0/d; -v0xc41000_0 .net "a", 0 0, L_0xc6a610; 1 drivers -v0xc410c0_0 .net "ab", 0 0, L_0xc577e0; 1 drivers -v0xc41160_0 .net "acarryin", 0 0, L_0xc69940; 1 drivers -v0xc41200_0 .net "andall", 0 0, L_0xc6a430; 1 drivers -v0xc412b0_0 .net "andsingleintermediate", 0 0, L_0xc6a210; 1 drivers -v0xc41350_0 .net "andsumintermediate", 0 0, L_0xc6a110; 1 drivers -v0xc413f0_0 .net "b", 0 0, L_0xc6a6b0; 1 drivers -v0xc41490_0 .net "bcarryin", 0 0, L_0xc69a30; 1 drivers -v0xc41530_0 .alias "carryin", 0 0, v0xc4ffb0_0; -v0xc415d0_0 .alias "carryout", 0 0, v0xc42460_0; -v0xc41650_0 .net "invcarryout", 0 0, L_0xc69fe0; 1 drivers -v0xc416d0_0 .net "orall", 0 0, L_0xc69ef0; 1 drivers -v0xc41770_0 .net "orpairintermediate", 0 0, L_0xc50070; 1 drivers -v0xc41810_0 .net "orsingleintermediate", 0 0, L_0xc69e10; 1 drivers -v0xc41930_0 .net "sum", 0 0, L_0xc6a4d0; 1 drivers -S_0xc40480 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc3ede0; - .timescale -9 -12; -L_0xc6a3d0/d .functor AND 1, L_0xc6b5d0, L_0xc6b6c0, C4<1>, C4<1>; -L_0xc6a3d0 .delay (50000,50000,50000) L_0xc6a3d0/d; -L_0xc6a7e0/d .functor AND 1, L_0xc6b5d0, L_0xc69cd0, C4<1>, C4<1>; -L_0xc6a7e0 .delay (50000,50000,50000) L_0xc6a7e0/d; -L_0xc6a8d0/d .functor AND 1, L_0xc6b6c0, L_0xc69cd0, C4<1>, C4<1>; -L_0xc6a8d0 .delay (50000,50000,50000) L_0xc6a8d0/d; -L_0xc6a9c0/d .functor OR 1, L_0xc6a3d0, L_0xc6a7e0, C4<0>, C4<0>; -L_0xc6a9c0 .delay (50000,50000,50000) L_0xc6a9c0/d; -L_0xc6ab00/d .functor OR 1, L_0xc6a9c0, L_0xc6a8d0, C4<0>, C4<0>; -L_0xc6ab00 .delay (50000,50000,50000) L_0xc6ab00/d; -L_0xc6ac40/d .functor OR 1, L_0xc6b5d0, L_0xc6b6c0, C4<0>, C4<0>; -L_0xc6ac40 .delay (50000,50000,50000) L_0xc6ac40/d; -L_0xc6ad20/d .functor OR 1, L_0xc6ac40, L_0xc69cd0, C4<0>, C4<0>; -L_0xc6ad20 .delay (50000,50000,50000) L_0xc6ad20/d; -L_0xc6ae10/d .functor NOT 1, L_0xc6ab00, C4<0>, C4<0>, C4<0>; -L_0xc6ae10 .delay (50000,50000,50000) L_0xc6ae10/d; -L_0xc6af40/d .functor AND 1, L_0xc6ae10, L_0xc6ad20, C4<1>, C4<1>; -L_0xc6af40 .delay (50000,50000,50000) L_0xc6af40/d; -L_0xc6b040/d .functor AND 1, L_0xc6b5d0, L_0xc6b6c0, C4<1>, C4<1>; -L_0xc6b040 .delay (50000,50000,50000) L_0xc6b040/d; -L_0xc6b260/d .functor AND 1, L_0xc6b040, L_0xc69cd0, C4<1>, C4<1>; -L_0xc6b260 .delay (50000,50000,50000) L_0xc6b260/d; -L_0xc6b3d0/d .functor OR 1, L_0xc6af40, L_0xc6b260, C4<0>, C4<0>; -L_0xc6b3d0 .delay (50000,50000,50000) L_0xc6b3d0/d; -v0xc40570_0 .net "a", 0 0, L_0xc6b5d0; 1 drivers -v0xc40630_0 .net "ab", 0 0, L_0xc6a3d0; 1 drivers -v0xc406d0_0 .net "acarryin", 0 0, L_0xc6a7e0; 1 drivers -v0xc40770_0 .net "andall", 0 0, L_0xc6b260; 1 drivers -v0xc407f0_0 .net "andsingleintermediate", 0 0, L_0xc6b040; 1 drivers -v0xc40890_0 .net "andsumintermediate", 0 0, L_0xc6af40; 1 drivers -v0xc40930_0 .net "b", 0 0, L_0xc6b6c0; 1 drivers -v0xc409d0_0 .net "bcarryin", 0 0, L_0xc6a8d0; 1 drivers -v0xc40a70_0 .alias "carryin", 0 0, v0xc42460_0; -v0xc40b10_0 .alias "carryout", 0 0, v0xc42630_0; -v0xc40b90_0 .net "invcarryout", 0 0, L_0xc6ae10; 1 drivers -v0xc40c10_0 .net "orall", 0 0, L_0xc6ad20; 1 drivers -v0xc40cb0_0 .net "orpairintermediate", 0 0, L_0xc6a9c0; 1 drivers -v0xc40d50_0 .net "orsingleintermediate", 0 0, L_0xc6ac40; 1 drivers -v0xc40e70_0 .net "sum", 0 0, L_0xc6b3d0; 1 drivers -S_0xc3f9a0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc3ede0; - .timescale -9 -12; -L_0xc6b200/d .functor AND 1, L_0xc6c740, L_0xc6c830, C4<1>, C4<1>; -L_0xc6b200 .delay (50000,50000,50000) L_0xc6b200/d; -L_0xc6b880/d .functor AND 1, L_0xc6c740, L_0xc6ab00, C4<1>, C4<1>; -L_0xc6b880 .delay (50000,50000,50000) L_0xc6b880/d; -L_0xc6b970/d .functor AND 1, L_0xc6c830, L_0xc6ab00, C4<1>, C4<1>; -L_0xc6b970 .delay (50000,50000,50000) L_0xc6b970/d; -L_0xc6ba80/d .functor OR 1, L_0xc6b200, L_0xc6b880, C4<0>, C4<0>; -L_0xc6ba80 .delay (50000,50000,50000) L_0xc6ba80/d; -L_0xc6bbe0/d .functor OR 1, L_0xc6ba80, L_0xc6b970, C4<0>, C4<0>; -L_0xc6bbe0 .delay (50000,50000,50000) L_0xc6bbe0/d; -L_0xc6bd40/d .functor OR 1, L_0xc6c740, L_0xc6c830, C4<0>, C4<0>; -L_0xc6bd40 .delay (50000,50000,50000) L_0xc6bd40/d; -L_0xc6be40/d .functor OR 1, L_0xc6bd40, L_0xc6ab00, C4<0>, C4<0>; -L_0xc6be40 .delay (50000,50000,50000) L_0xc6be40/d; -L_0xc6bf50/d .functor NOT 1, L_0xc6bbe0, C4<0>, C4<0>, C4<0>; -L_0xc6bf50 .delay (50000,50000,50000) L_0xc6bf50/d; -L_0xc6c0a0/d .functor AND 1, L_0xc6bf50, L_0xc6be40, C4<1>, C4<1>; -L_0xc6c0a0 .delay (50000,50000,50000) L_0xc6c0a0/d; -L_0xc6c1c0/d .functor AND 1, L_0xc6c740, L_0xc6c830, C4<1>, C4<1>; -L_0xc6c1c0 .delay (50000,50000,50000) L_0xc6c1c0/d; -L_0xc6c400/d .functor AND 1, L_0xc6c1c0, L_0xc6ab00, C4<1>, C4<1>; -L_0xc6c400 .delay (50000,50000,50000) L_0xc6c400/d; -L_0xc6c590/d .functor OR 1, L_0xc6c0a0, L_0xc6c400, C4<0>, C4<0>; -L_0xc6c590 .delay (50000,50000,50000) L_0xc6c590/d; -v0xc3fa90_0 .net "a", 0 0, L_0xc6c740; 1 drivers -v0xc3fb50_0 .net "ab", 0 0, L_0xc6b200; 1 drivers -v0xc3fbf0_0 .net "acarryin", 0 0, L_0xc6b880; 1 drivers -v0xc3fc90_0 .net "andall", 0 0, L_0xc6c400; 1 drivers -v0xc3fd10_0 .net "andsingleintermediate", 0 0, L_0xc6c1c0; 1 drivers -v0xc3fdb0_0 .net "andsumintermediate", 0 0, L_0xc6c0a0; 1 drivers -v0xc3fe50_0 .net "b", 0 0, L_0xc6c830; 1 drivers -v0xc3fef0_0 .net "bcarryin", 0 0, L_0xc6b970; 1 drivers -v0xc3ffe0_0 .alias "carryin", 0 0, v0xc42630_0; -v0xc40080_0 .alias "carryout", 0 0, v0xc42760_0; -v0xc40100_0 .net "invcarryout", 0 0, L_0xc6bf50; 1 drivers -v0xc40180_0 .net "orall", 0 0, L_0xc6be40; 1 drivers -v0xc40220_0 .net "orpairintermediate", 0 0, L_0xc6ba80; 1 drivers -v0xc402c0_0 .net "orsingleintermediate", 0 0, L_0xc6bd40; 1 drivers -v0xc403e0_0 .net "sum", 0 0, L_0xc6c590; 1 drivers -S_0xc3eed0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc3ede0; - .timescale -9 -12; -L_0xc6c3a0/d .functor AND 1, L_0xc6d890, L_0xc6d9c0, C4<1>, C4<1>; -L_0xc6c3a0 .delay (50000,50000,50000) L_0xc6c3a0/d; -L_0xc6c940/d .functor AND 1, L_0xc6d890, L_0xc6bbe0, C4<1>, C4<1>; -L_0xc6c940 .delay (50000,50000,50000) L_0xc6c940/d; -L_0xc6ca50/d .functor AND 1, L_0xc6d9c0, L_0xc6bbe0, C4<1>, C4<1>; -L_0xc6ca50 .delay (50000,50000,50000) L_0xc6ca50/d; -L_0xc6cb80/d .functor OR 1, L_0xc6c3a0, L_0xc6c940, C4<0>, C4<0>; -L_0xc6cb80 .delay (50000,50000,50000) L_0xc6cb80/d; -L_0xc6cce0/d .functor OR 1, L_0xc6cb80, L_0xc6ca50, C4<0>, C4<0>; -L_0xc6cce0 .delay (50000,50000,50000) L_0xc6cce0/d; -L_0xc6ce40/d .functor OR 1, L_0xc6d890, L_0xc6d9c0, C4<0>, C4<0>; -L_0xc6ce40 .delay (50000,50000,50000) L_0xc6ce40/d; -L_0xc6cf40/d .functor OR 1, L_0xc6ce40, L_0xc6bbe0, C4<0>, C4<0>; -L_0xc6cf40 .delay (50000,50000,50000) L_0xc6cf40/d; -L_0xc6d050/d .functor NOT 1, L_0xc6cce0, C4<0>, C4<0>, C4<0>; -L_0xc6d050 .delay (50000,50000,50000) L_0xc6d050/d; -L_0xc6d110/d .functor AND 1, L_0xc6d050, L_0xc6cf40, C4<1>, C4<1>; -L_0xc6d110 .delay (50000,50000,50000) L_0xc6d110/d; -L_0xc6d280/d .functor AND 1, L_0xc6d890, L_0xc6d9c0, C4<1>, C4<1>; -L_0xc6d280 .delay (50000,50000,50000) L_0xc6d280/d; -L_0xc6d4c0/d .functor AND 1, L_0xc6d280, L_0xc6bbe0, C4<1>, C4<1>; -L_0xc6d4c0 .delay (50000,50000,50000) L_0xc6d4c0/d; -L_0xc6d650/d .functor OR 1, L_0xc6d110, L_0xc6d4c0, C4<0>, C4<0>; -L_0xc6d650 .delay (50000,50000,50000) L_0xc6d650/d; -v0xc3efc0_0 .net "a", 0 0, L_0xc6d890; 1 drivers -v0xc3f040_0 .net "ab", 0 0, L_0xc6c3a0; 1 drivers -v0xc3f0c0_0 .net "acarryin", 0 0, L_0xc6c940; 1 drivers -v0xc3f140_0 .net "andall", 0 0, L_0xc6d4c0; 1 drivers -v0xc3f1c0_0 .net "andsingleintermediate", 0 0, L_0xc6d280; 1 drivers -v0xc3f240_0 .net "andsumintermediate", 0 0, L_0xc6d110; 1 drivers -v0xc3f2c0_0 .net "b", 0 0, L_0xc6d9c0; 1 drivers -v0xc3f340_0 .net "bcarryin", 0 0, L_0xc6ca50; 1 drivers -v0xc3f410_0 .alias "carryin", 0 0, v0xc42760_0; -v0xc3f4b0_0 .alias "carryout", 0 0, v0xc503b0_0; -v0xc3f590_0 .net "invcarryout", 0 0, L_0xc6d050; 1 drivers -v0xc3f630_0 .net "orall", 0 0, L_0xc6cf40; 1 drivers -v0xc3f740_0 .net "orpairintermediate", 0 0, L_0xc6cb80; 1 drivers -v0xc3f7e0_0 .net "orsingleintermediate", 0 0, L_0xc6ce40; 1 drivers -v0xc3f900_0 .net "sum", 0 0, L_0xc6d650; 1 drivers -S_0xc3b2d0 .scope module, "adder2" "FullAdder4bit" 4 240, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc72960/d .functor AND 1, L_0xc730a0, L_0xc73140, C4<1>, C4<1>; -L_0xc72960 .delay (50000,50000,50000) L_0xc72960/d; -L_0xc731e0/d .functor NOR 1, L_0xc73280, L_0xc73320, C4<0>, C4<0>; -L_0xc731e0 .delay (50000,50000,50000) L_0xc731e0/d; -L_0xc73450/d .functor AND 1, L_0xc73540, L_0xc735e0, C4<1>, C4<1>; -L_0xc73450 .delay (50000,50000,50000) L_0xc73450/d; -L_0xc733c0/d .functor NOR 1, L_0xc73800, L_0xc739b0, C4<0>, C4<0>; -L_0xc733c0 .delay (50000,50000,50000) L_0xc733c0/d; -L_0xc736d0/d .functor OR 1, L_0xc72960, L_0xc731e0, C4<0>, C4<0>; -L_0xc736d0 .delay (50000,50000,50000) L_0xc736d0/d; -L_0xc73bf0/d .functor NOR 1, L_0xc73450, L_0xc733c0, C4<0>, C4<0>; -L_0xc73bf0 .delay (50000,50000,50000) L_0xc73bf0/d; -L_0xc73d30/d .functor AND 1, L_0xc736d0, L_0xc73bf0, C4<1>, C4<1>; -L_0xc73d30 .delay (50000,50000,50000) L_0xc73d30/d; -v0xc3dec0_0 .net *"_s25", 0 0, L_0xc730a0; 1 drivers -v0xc3df80_0 .net *"_s27", 0 0, L_0xc73140; 1 drivers -v0xc3e020_0 .net *"_s29", 0 0, L_0xc73280; 1 drivers -v0xc3e0c0_0 .net *"_s31", 0 0, L_0xc73320; 1 drivers -v0xc3e140_0 .net *"_s33", 0 0, L_0xc73540; 1 drivers -v0xc3e1e0_0 .net *"_s35", 0 0, L_0xc735e0; 1 drivers -v0xc3e280_0 .net *"_s37", 0 0, L_0xc73800; 1 drivers -v0xc3e320_0 .net *"_s39", 0 0, L_0xc739b0; 1 drivers -v0xc3e3c0_0 .net "a", 3 0, L_0xc73ff0; 1 drivers -v0xc3e460_0 .net "aandb", 0 0, L_0xc72960; 1 drivers -v0xc3e500_0 .net "abandnoror", 0 0, L_0xc736d0; 1 drivers -v0xc3e5a0_0 .net "anorb", 0 0, L_0xc731e0; 1 drivers -v0xc3e640_0 .net "b", 3 0, L_0xc6ea60; 1 drivers -v0xc3e6e0_0 .net "bandsum", 0 0, L_0xc73450; 1 drivers -v0xc3e800_0 .net "bnorsum", 0 0, L_0xc733c0; 1 drivers -v0xc3e8a0_0 .net "bsumandnornor", 0 0, L_0xc73bf0; 1 drivers -v0xc3e760_0 .alias "carryin", 0 0, v0xc503b0_0; -v0xc3e9d0_0 .alias "carryout", 0 0, v0xc501e0_0; -v0xc3e920_0 .net "carryout1", 0 0, L_0xc6f030; 1 drivers -v0xc3eaf0_0 .net "carryout2", 0 0, L_0xc6ffa0; 1 drivers -v0xc3ec20_0 .net "carryout3", 0 0, L_0xc71140; 1 drivers -v0xc3eca0_0 .alias "overflow", 0 0, v0xc4d380_0; -v0xc3eb70_0 .net8 "sum", 3 0, RS_0x7fb7ca1885c8; 4 drivers -L_0xc6f9d0 .part/pv L_0xc6f910, 0, 1, 4; -L_0xc6fa90 .part L_0xc73ff0, 0, 1; -L_0xc6fb30 .part L_0xc6ea60, 0, 1; -L_0xc70a60 .part/pv L_0xc70950, 1, 1, 4; -L_0xc70b50 .part L_0xc73ff0, 1, 1; -L_0xc70c40 .part L_0xc6ea60, 1, 1; -L_0xc71c00 .part/pv L_0xc71af0, 2, 1, 4; -L_0xc71ca0 .part L_0xc73ff0, 2, 1; -L_0xc71d90 .part L_0xc6ea60, 2, 1; -L_0xc72c60 .part/pv L_0xc72b50, 3, 1, 4; -L_0xc72d90 .part L_0xc73ff0, 3, 1; -L_0xc72ec0 .part L_0xc6ea60, 3, 1; -L_0xc730a0 .part L_0xc73ff0, 3, 1; -L_0xc73140 .part L_0xc6ea60, 3, 1; -L_0xc73280 .part L_0xc73ff0, 3, 1; -L_0xc73320 .part L_0xc6ea60, 3, 1; -L_0xc73540 .part L_0xc6ea60, 3, 1; -L_0xc735e0 .part RS_0x7fb7ca1885c8, 3, 1; -L_0xc73800 .part L_0xc6ea60, 3, 1; -L_0xc739b0 .part RS_0x7fb7ca1885c8, 3, 1; -S_0xc3d430 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc3b2d0; - .timescale -9 -12; -L_0xc69720/d .functor AND 1, L_0xc6fa90, L_0xc6fb30, C4<1>, C4<1>; -L_0xc69720 .delay (50000,50000,50000) L_0xc69720/d; -L_0xc6ecb0/d .functor AND 1, L_0xc6fa90, L_0xc6cce0, C4<1>, C4<1>; -L_0xc6ecb0 .delay (50000,50000,50000) L_0xc6ecb0/d; -L_0xc6ed60/d .functor AND 1, L_0xc6fb30, L_0xc6cce0, C4<1>, C4<1>; -L_0xc6ed60 .delay (50000,50000,50000) L_0xc6ed60/d; -L_0xc6eed0/d .functor OR 1, L_0xc69720, L_0xc6ecb0, C4<0>, C4<0>; -L_0xc6eed0 .delay (50000,50000,50000) L_0xc6eed0/d; -L_0xc6f030/d .functor OR 1, L_0xc6eed0, L_0xc6ed60, C4<0>, C4<0>; -L_0xc6f030 .delay (50000,50000,50000) L_0xc6f030/d; -L_0xc6f190/d .functor OR 1, L_0xc6fa90, L_0xc6fb30, C4<0>, C4<0>; -L_0xc6f190 .delay (50000,50000,50000) L_0xc6f190/d; -L_0xc6f290/d .functor OR 1, L_0xc6f190, L_0xc6cce0, C4<0>, C4<0>; -L_0xc6f290 .delay (50000,50000,50000) L_0xc6f290/d; -L_0xc6f3a0/d .functor NOT 1, L_0xc6f030, C4<0>, C4<0>, C4<0>; -L_0xc6f3a0 .delay (50000,50000,50000) L_0xc6f3a0/d; -L_0xc6f4f0/d .functor AND 1, L_0xc6f3a0, L_0xc6f290, C4<1>, C4<1>; -L_0xc6f4f0 .delay (50000,50000,50000) L_0xc6f4f0/d; -L_0xc6f610/d .functor AND 1, L_0xc6fa90, L_0xc6fb30, C4<1>, C4<1>; -L_0xc6f610 .delay (50000,50000,50000) L_0xc6f610/d; -L_0xc6f850/d .functor AND 1, L_0xc6f610, L_0xc6cce0, C4<1>, C4<1>; -L_0xc6f850 .delay (50000,50000,50000) L_0xc6f850/d; -L_0xc6f910/d .functor OR 1, L_0xc6f4f0, L_0xc6f850, C4<0>, C4<0>; -L_0xc6f910 .delay (50000,50000,50000) L_0xc6f910/d; -v0xc3d520_0 .net "a", 0 0, L_0xc6fa90; 1 drivers -v0xc3d5e0_0 .net "ab", 0 0, L_0xc69720; 1 drivers -v0xc3d680_0 .net "acarryin", 0 0, L_0xc6ecb0; 1 drivers -v0xc3d720_0 .net "andall", 0 0, L_0xc6f850; 1 drivers -v0xc3d7a0_0 .net "andsingleintermediate", 0 0, L_0xc6f610; 1 drivers -v0xc3d840_0 .net "andsumintermediate", 0 0, L_0xc6f4f0; 1 drivers -v0xc3d8e0_0 .net "b", 0 0, L_0xc6fb30; 1 drivers -v0xc3d980_0 .net "bcarryin", 0 0, L_0xc6ed60; 1 drivers -v0xc3da20_0 .alias "carryin", 0 0, v0xc503b0_0; -v0xc3dac0_0 .alias "carryout", 0 0, v0xc3e920_0; -v0xc3db40_0 .net "invcarryout", 0 0, L_0xc6f3a0; 1 drivers -v0xc3dbc0_0 .net "orall", 0 0, L_0xc6f290; 1 drivers -v0xc3dc60_0 .net "orpairintermediate", 0 0, L_0xc6eed0; 1 drivers -v0xc3dd00_0 .net "orsingleintermediate", 0 0, L_0xc6f190; 1 drivers -v0xc3de20_0 .net "sum", 0 0, L_0xc6f910; 1 drivers -S_0xc3c9a0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc3b2d0; - .timescale -9 -12; -L_0xc6f7f0/d .functor AND 1, L_0xc70b50, L_0xc70c40, C4<1>, C4<1>; -L_0xc6f7f0 .delay (50000,50000,50000) L_0xc6f7f0/d; -L_0xc6fc60/d .functor AND 1, L_0xc70b50, L_0xc6f030, C4<1>, C4<1>; -L_0xc6fc60 .delay (50000,50000,50000) L_0xc6fc60/d; -L_0xc6fd50/d .functor AND 1, L_0xc70c40, L_0xc6f030, C4<1>, C4<1>; -L_0xc6fd50 .delay (50000,50000,50000) L_0xc6fd50/d; -L_0xc6fe40/d .functor OR 1, L_0xc6f7f0, L_0xc6fc60, C4<0>, C4<0>; -L_0xc6fe40 .delay (50000,50000,50000) L_0xc6fe40/d; -L_0xc6ffa0/d .functor OR 1, L_0xc6fe40, L_0xc6fd50, C4<0>, C4<0>; -L_0xc6ffa0 .delay (50000,50000,50000) L_0xc6ffa0/d; -L_0xc70100/d .functor OR 1, L_0xc70b50, L_0xc70c40, C4<0>, C4<0>; -L_0xc70100 .delay (50000,50000,50000) L_0xc70100/d; -L_0xc70200/d .functor OR 1, L_0xc70100, L_0xc6f030, C4<0>, C4<0>; -L_0xc70200 .delay (50000,50000,50000) L_0xc70200/d; -L_0xc70310/d .functor NOT 1, L_0xc6ffa0, C4<0>, C4<0>, C4<0>; -L_0xc70310 .delay (50000,50000,50000) L_0xc70310/d; -L_0xc70460/d .functor AND 1, L_0xc70310, L_0xc70200, C4<1>, C4<1>; -L_0xc70460 .delay (50000,50000,50000) L_0xc70460/d; -L_0xc70580/d .functor AND 1, L_0xc70b50, L_0xc70c40, C4<1>, C4<1>; -L_0xc70580 .delay (50000,50000,50000) L_0xc70580/d; -L_0xc707c0/d .functor AND 1, L_0xc70580, L_0xc6f030, C4<1>, C4<1>; -L_0xc707c0 .delay (50000,50000,50000) L_0xc707c0/d; -L_0xc70950/d .functor OR 1, L_0xc70460, L_0xc707c0, C4<0>, C4<0>; -L_0xc70950 .delay (50000,50000,50000) L_0xc70950/d; -v0xc3ca90_0 .net "a", 0 0, L_0xc70b50; 1 drivers -v0xc3cb50_0 .net "ab", 0 0, L_0xc6f7f0; 1 drivers -v0xc3cbf0_0 .net "acarryin", 0 0, L_0xc6fc60; 1 drivers -v0xc3cc90_0 .net "andall", 0 0, L_0xc707c0; 1 drivers -v0xc3cd10_0 .net "andsingleintermediate", 0 0, L_0xc70580; 1 drivers -v0xc3cdb0_0 .net "andsumintermediate", 0 0, L_0xc70460; 1 drivers -v0xc3ce50_0 .net "b", 0 0, L_0xc70c40; 1 drivers -v0xc3cef0_0 .net "bcarryin", 0 0, L_0xc6fd50; 1 drivers -v0xc3cf90_0 .alias "carryin", 0 0, v0xc3e920_0; -v0xc3d030_0 .alias "carryout", 0 0, v0xc3eaf0_0; -v0xc3d0b0_0 .net "invcarryout", 0 0, L_0xc70310; 1 drivers -v0xc3d130_0 .net "orall", 0 0, L_0xc70200; 1 drivers -v0xc3d1d0_0 .net "orpairintermediate", 0 0, L_0xc6fe40; 1 drivers -v0xc3d270_0 .net "orsingleintermediate", 0 0, L_0xc70100; 1 drivers -v0xc3d390_0 .net "sum", 0 0, L_0xc70950; 1 drivers -S_0xc3bec0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc3b2d0; - .timescale -9 -12; -L_0xc70760/d .functor AND 1, L_0xc71ca0, L_0xc71d90, C4<1>, C4<1>; -L_0xc70760 .delay (50000,50000,50000) L_0xc70760/d; -L_0xc70e00/d .functor AND 1, L_0xc71ca0, L_0xc6ffa0, C4<1>, C4<1>; -L_0xc70e00 .delay (50000,50000,50000) L_0xc70e00/d; -L_0xc70ef0/d .functor AND 1, L_0xc71d90, L_0xc6ffa0, C4<1>, C4<1>; -L_0xc70ef0 .delay (50000,50000,50000) L_0xc70ef0/d; -L_0xc70fe0/d .functor OR 1, L_0xc70760, L_0xc70e00, C4<0>, C4<0>; -L_0xc70fe0 .delay (50000,50000,50000) L_0xc70fe0/d; -L_0xc71140/d .functor OR 1, L_0xc70fe0, L_0xc70ef0, C4<0>, C4<0>; -L_0xc71140 .delay (50000,50000,50000) L_0xc71140/d; -L_0xc712a0/d .functor OR 1, L_0xc71ca0, L_0xc71d90, C4<0>, C4<0>; -L_0xc712a0 .delay (50000,50000,50000) L_0xc712a0/d; -L_0xc713a0/d .functor OR 1, L_0xc712a0, L_0xc6ffa0, C4<0>, C4<0>; -L_0xc713a0 .delay (50000,50000,50000) L_0xc713a0/d; -L_0xc714b0/d .functor NOT 1, L_0xc71140, C4<0>, C4<0>, C4<0>; -L_0xc714b0 .delay (50000,50000,50000) L_0xc714b0/d; -L_0xc71600/d .functor AND 1, L_0xc714b0, L_0xc713a0, C4<1>, C4<1>; -L_0xc71600 .delay (50000,50000,50000) L_0xc71600/d; -L_0xc71720/d .functor AND 1, L_0xc71ca0, L_0xc71d90, C4<1>, C4<1>; -L_0xc71720 .delay (50000,50000,50000) L_0xc71720/d; -L_0xc71960/d .functor AND 1, L_0xc71720, L_0xc6ffa0, C4<1>, C4<1>; -L_0xc71960 .delay (50000,50000,50000) L_0xc71960/d; -L_0xc71af0/d .functor OR 1, L_0xc71600, L_0xc71960, C4<0>, C4<0>; -L_0xc71af0 .delay (50000,50000,50000) L_0xc71af0/d; -v0xc3bfb0_0 .net "a", 0 0, L_0xc71ca0; 1 drivers -v0xc3c070_0 .net "ab", 0 0, L_0xc70760; 1 drivers -v0xc3c110_0 .net "acarryin", 0 0, L_0xc70e00; 1 drivers -v0xc3c1b0_0 .net "andall", 0 0, L_0xc71960; 1 drivers -v0xc3c230_0 .net "andsingleintermediate", 0 0, L_0xc71720; 1 drivers -v0xc3c2d0_0 .net "andsumintermediate", 0 0, L_0xc71600; 1 drivers -v0xc3c370_0 .net "b", 0 0, L_0xc71d90; 1 drivers -v0xc3c410_0 .net "bcarryin", 0 0, L_0xc70ef0; 1 drivers -v0xc3c500_0 .alias "carryin", 0 0, v0xc3eaf0_0; -v0xc3c5a0_0 .alias "carryout", 0 0, v0xc3ec20_0; -v0xc3c620_0 .net "invcarryout", 0 0, L_0xc714b0; 1 drivers -v0xc3c6a0_0 .net "orall", 0 0, L_0xc713a0; 1 drivers -v0xc3c740_0 .net "orpairintermediate", 0 0, L_0xc70fe0; 1 drivers -v0xc3c7e0_0 .net "orsingleintermediate", 0 0, L_0xc712a0; 1 drivers -v0xc3c900_0 .net "sum", 0 0, L_0xc71af0; 1 drivers -S_0xc3b3c0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc3b2d0; - .timescale -9 -12; -L_0xc71900/d .functor AND 1, L_0xc72d90, L_0xc72ec0, C4<1>, C4<1>; -L_0xc71900 .delay (50000,50000,50000) L_0xc71900/d; -L_0xc71e80/d .functor AND 1, L_0xc72d90, L_0xc71140, C4<1>, C4<1>; -L_0xc71e80 .delay (50000,50000,50000) L_0xc71e80/d; -L_0xc71f70/d .functor AND 1, L_0xc72ec0, L_0xc71140, C4<1>, C4<1>; -L_0xc71f70 .delay (50000,50000,50000) L_0xc71f70/d; -L_0xc72080/d .functor OR 1, L_0xc71900, L_0xc71e80, C4<0>, C4<0>; -L_0xc72080 .delay (50000,50000,50000) L_0xc72080/d; -L_0xc721e0/d .functor OR 1, L_0xc72080, L_0xc71f70, C4<0>, C4<0>; -L_0xc721e0 .delay (50000,50000,50000) L_0xc721e0/d; -L_0xc72340/d .functor OR 1, L_0xc72d90, L_0xc72ec0, C4<0>, C4<0>; -L_0xc72340 .delay (50000,50000,50000) L_0xc72340/d; -L_0xc72440/d .functor OR 1, L_0xc72340, L_0xc71140, C4<0>, C4<0>; -L_0xc72440 .delay (50000,50000,50000) L_0xc72440/d; -L_0xc72550/d .functor NOT 1, L_0xc721e0, C4<0>, C4<0>, C4<0>; -L_0xc72550 .delay (50000,50000,50000) L_0xc72550/d; -L_0xc72610/d .functor AND 1, L_0xc72550, L_0xc72440, C4<1>, C4<1>; -L_0xc72610 .delay (50000,50000,50000) L_0xc72610/d; -L_0xc72780/d .functor AND 1, L_0xc72d90, L_0xc72ec0, C4<1>, C4<1>; -L_0xc72780 .delay (50000,50000,50000) L_0xc72780/d; -L_0xc729c0/d .functor AND 1, L_0xc72780, L_0xc71140, C4<1>, C4<1>; -L_0xc729c0 .delay (50000,50000,50000) L_0xc729c0/d; -L_0xc72b50/d .functor OR 1, L_0xc72610, L_0xc729c0, C4<0>, C4<0>; -L_0xc72b50 .delay (50000,50000,50000) L_0xc72b50/d; -v0xc3b4b0_0 .net "a", 0 0, L_0xc72d90; 1 drivers -v0xc3b570_0 .net "ab", 0 0, L_0xc71900; 1 drivers -v0xc3b610_0 .net "acarryin", 0 0, L_0xc71e80; 1 drivers -v0xc3b6b0_0 .net "andall", 0 0, L_0xc729c0; 1 drivers -v0xc3b730_0 .net "andsingleintermediate", 0 0, L_0xc72780; 1 drivers -v0xc3b7d0_0 .net "andsumintermediate", 0 0, L_0xc72610; 1 drivers -v0xc3b870_0 .net "b", 0 0, L_0xc72ec0; 1 drivers -v0xc3b910_0 .net "bcarryin", 0 0, L_0xc71f70; 1 drivers -v0xc3ba00_0 .alias "carryin", 0 0, v0xc3ec20_0; -v0xc3baa0_0 .alias "carryout", 0 0, v0xc501e0_0; -v0xc3bb20_0 .net "invcarryout", 0 0, L_0xc72550; 1 drivers -v0xc3bbc0_0 .net "orall", 0 0, L_0xc72440; 1 drivers -v0xc3bc60_0 .net "orpairintermediate", 0 0, L_0xc72080; 1 drivers -v0xc3bd00_0 .net "orsingleintermediate", 0 0, L_0xc72340; 1 drivers -v0xc3be20_0 .net "sum", 0 0, L_0xc72b50; 1 drivers -S_0xc377c0 .scope module, "adder3" "FullAdder4bit" 4 241, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc77ee0/d .functor AND 1, L_0xc78620, L_0xc786c0, C4<1>, C4<1>; -L_0xc77ee0 .delay (50000,50000,50000) L_0xc77ee0/d; -L_0xc78760/d .functor NOR 1, L_0xc78800, L_0xc788a0, C4<0>, C4<0>; -L_0xc78760 .delay (50000,50000,50000) L_0xc78760/d; -L_0xc789d0/d .functor AND 1, L_0xc78ac0, L_0xc78b60, C4<1>, C4<1>; -L_0xc789d0 .delay (50000,50000,50000) L_0xc789d0/d; -L_0xc78940/d .functor NOR 1, L_0xc78d80, L_0xc78f30, C4<0>, C4<0>; -L_0xc78940 .delay (50000,50000,50000) L_0xc78940/d; -L_0xc78c50/d .functor OR 1, L_0xc77ee0, L_0xc78760, C4<0>, C4<0>; -L_0xc78c50 .delay (50000,50000,50000) L_0xc78c50/d; -L_0xc79170/d .functor NOR 1, L_0xc789d0, L_0xc78940, C4<0>, C4<0>; -L_0xc79170 .delay (50000,50000,50000) L_0xc79170/d; -L_0xc792b0/d .functor AND 1, L_0xc78c50, L_0xc79170, C4<1>, C4<1>; -L_0xc792b0 .delay (50000,50000,50000) L_0xc792b0/d; -v0xc3a3b0_0 .net *"_s25", 0 0, L_0xc78620; 1 drivers -v0xc3a470_0 .net *"_s27", 0 0, L_0xc786c0; 1 drivers -v0xc3a510_0 .net *"_s29", 0 0, L_0xc78800; 1 drivers -v0xc3a5b0_0 .net *"_s31", 0 0, L_0xc788a0; 1 drivers -v0xc3a630_0 .net *"_s33", 0 0, L_0xc78ac0; 1 drivers -v0xc3a6d0_0 .net *"_s35", 0 0, L_0xc78b60; 1 drivers -v0xc3a770_0 .net *"_s37", 0 0, L_0xc78d80; 1 drivers -v0xc3a810_0 .net *"_s39", 0 0, L_0xc78f30; 1 drivers -v0xc3a8b0_0 .net "a", 3 0, L_0xc74120; 1 drivers -v0xc3a950_0 .net "aandb", 0 0, L_0xc77ee0; 1 drivers -v0xc3a9f0_0 .net "abandnoror", 0 0, L_0xc78c50; 1 drivers -v0xc3aa90_0 .net "anorb", 0 0, L_0xc78760; 1 drivers -v0xc3ab30_0 .net "b", 3 0, L_0xc741c0; 1 drivers -v0xc3abd0_0 .net "bandsum", 0 0, L_0xc789d0; 1 drivers -v0xc3acf0_0 .net "bnorsum", 0 0, L_0xc78940; 1 drivers -v0xc3ad90_0 .net "bsumandnornor", 0 0, L_0xc79170; 1 drivers -v0xc3ac50_0 .alias "carryin", 0 0, v0xc501e0_0; -v0xc3aec0_0 .alias "carryout", 0 0, v0xc502f0_0; -v0xc3ae10_0 .net "carryout1", 0 0, L_0xc745d0; 1 drivers -v0xc3afe0_0 .net "carryout2", 0 0, L_0xc75520; 1 drivers -v0xc3b110_0 .net "carryout3", 0 0, L_0xc766c0; 1 drivers -v0xc3b190_0 .alias "overflow", 0 0, v0xc4d400_0; -v0xc3b060_0 .net8 "sum", 3 0, RS_0x7fb7ca1877e8; 4 drivers -L_0xc74f50 .part/pv L_0xc74e90, 0, 1, 4; -L_0xc75010 .part L_0xc74120, 0, 1; -L_0xc750b0 .part L_0xc741c0, 0, 1; -L_0xc75fe0 .part/pv L_0xc75ed0, 1, 1, 4; -L_0xc760d0 .part L_0xc74120, 1, 1; -L_0xc761c0 .part L_0xc741c0, 1, 1; -L_0xc77180 .part/pv L_0xc77070, 2, 1, 4; -L_0xc77220 .part L_0xc74120, 2, 1; -L_0xc77310 .part L_0xc741c0, 2, 1; -L_0xc781e0 .part/pv L_0xc780d0, 3, 1, 4; -L_0xc78310 .part L_0xc74120, 3, 1; -L_0xc78440 .part L_0xc741c0, 3, 1; -L_0xc78620 .part L_0xc74120, 3, 1; -L_0xc786c0 .part L_0xc741c0, 3, 1; -L_0xc78800 .part L_0xc74120, 3, 1; -L_0xc788a0 .part L_0xc741c0, 3, 1; -L_0xc78ac0 .part L_0xc741c0, 3, 1; -L_0xc78b60 .part RS_0x7fb7ca1877e8, 3, 1; -L_0xc78d80 .part L_0xc741c0, 3, 1; -L_0xc78f30 .part RS_0x7fb7ca1877e8, 3, 1; -S_0xc39920 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc377c0; - .timescale -9 -12; -L_0xc6eb00/d .functor AND 1, L_0xc75010, L_0xc750b0, C4<1>, C4<1>; -L_0xc6eb00 .delay (50000,50000,50000) L_0xc6eb00/d; -L_0xc6eba0/d .functor AND 1, L_0xc75010, L_0xc721e0, C4<1>, C4<1>; -L_0xc6eba0 .delay (50000,50000,50000) L_0xc6eba0/d; -L_0xc6ec40/d .functor AND 1, L_0xc750b0, L_0xc721e0, C4<1>, C4<1>; -L_0xc6ec40 .delay (50000,50000,50000) L_0xc6ec40/d; -L_0xc74490/d .functor OR 1, L_0xc6eb00, L_0xc6eba0, C4<0>, C4<0>; -L_0xc74490 .delay (50000,50000,50000) L_0xc74490/d; -L_0xc745d0/d .functor OR 1, L_0xc74490, L_0xc6ec40, C4<0>, C4<0>; -L_0xc745d0 .delay (50000,50000,50000) L_0xc745d0/d; -L_0xc74710/d .functor OR 1, L_0xc75010, L_0xc750b0, C4<0>, C4<0>; -L_0xc74710 .delay (50000,50000,50000) L_0xc74710/d; -L_0xc74810/d .functor OR 1, L_0xc74710, L_0xc721e0, C4<0>, C4<0>; -L_0xc74810 .delay (50000,50000,50000) L_0xc74810/d; -L_0xc74920/d .functor NOT 1, L_0xc745d0, C4<0>, C4<0>, C4<0>; -L_0xc74920 .delay (50000,50000,50000) L_0xc74920/d; -L_0xc74a70/d .functor AND 1, L_0xc74920, L_0xc74810, C4<1>, C4<1>; -L_0xc74a70 .delay (50000,50000,50000) L_0xc74a70/d; -L_0xc74b90/d .functor AND 1, L_0xc75010, L_0xc750b0, C4<1>, C4<1>; -L_0xc74b90 .delay (50000,50000,50000) L_0xc74b90/d; -L_0xc74dd0/d .functor AND 1, L_0xc74b90, L_0xc721e0, C4<1>, C4<1>; -L_0xc74dd0 .delay (50000,50000,50000) L_0xc74dd0/d; -L_0xc74e90/d .functor OR 1, L_0xc74a70, L_0xc74dd0, C4<0>, C4<0>; -L_0xc74e90 .delay (50000,50000,50000) L_0xc74e90/d; -v0xc39a10_0 .net "a", 0 0, L_0xc75010; 1 drivers -v0xc39ad0_0 .net "ab", 0 0, L_0xc6eb00; 1 drivers -v0xc39b70_0 .net "acarryin", 0 0, L_0xc6eba0; 1 drivers -v0xc39c10_0 .net "andall", 0 0, L_0xc74dd0; 1 drivers -v0xc39c90_0 .net "andsingleintermediate", 0 0, L_0xc74b90; 1 drivers -v0xc39d30_0 .net "andsumintermediate", 0 0, L_0xc74a70; 1 drivers -v0xc39dd0_0 .net "b", 0 0, L_0xc750b0; 1 drivers -v0xc39e70_0 .net "bcarryin", 0 0, L_0xc6ec40; 1 drivers -v0xc39f10_0 .alias "carryin", 0 0, v0xc501e0_0; -v0xc39fb0_0 .alias "carryout", 0 0, v0xc3ae10_0; -v0xc3a030_0 .net "invcarryout", 0 0, L_0xc74920; 1 drivers -v0xc3a0b0_0 .net "orall", 0 0, L_0xc74810; 1 drivers -v0xc3a150_0 .net "orpairintermediate", 0 0, L_0xc74490; 1 drivers -v0xc3a1f0_0 .net "orsingleintermediate", 0 0, L_0xc74710; 1 drivers -v0xc3a310_0 .net "sum", 0 0, L_0xc74e90; 1 drivers -S_0xc38e90 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc377c0; - .timescale -9 -12; -L_0xc74d70/d .functor AND 1, L_0xc760d0, L_0xc761c0, C4<1>, C4<1>; -L_0xc74d70 .delay (50000,50000,50000) L_0xc74d70/d; -L_0xc751e0/d .functor AND 1, L_0xc760d0, L_0xc745d0, C4<1>, C4<1>; -L_0xc751e0 .delay (50000,50000,50000) L_0xc751e0/d; -L_0xc752d0/d .functor AND 1, L_0xc761c0, L_0xc745d0, C4<1>, C4<1>; -L_0xc752d0 .delay (50000,50000,50000) L_0xc752d0/d; -L_0xc753c0/d .functor OR 1, L_0xc74d70, L_0xc751e0, C4<0>, C4<0>; -L_0xc753c0 .delay (50000,50000,50000) L_0xc753c0/d; -L_0xc75520/d .functor OR 1, L_0xc753c0, L_0xc752d0, C4<0>, C4<0>; -L_0xc75520 .delay (50000,50000,50000) L_0xc75520/d; -L_0xc75680/d .functor OR 1, L_0xc760d0, L_0xc761c0, C4<0>, C4<0>; -L_0xc75680 .delay (50000,50000,50000) L_0xc75680/d; -L_0xc75780/d .functor OR 1, L_0xc75680, L_0xc745d0, C4<0>, C4<0>; -L_0xc75780 .delay (50000,50000,50000) L_0xc75780/d; -L_0xc75890/d .functor NOT 1, L_0xc75520, C4<0>, C4<0>, C4<0>; -L_0xc75890 .delay (50000,50000,50000) L_0xc75890/d; -L_0xc759e0/d .functor AND 1, L_0xc75890, L_0xc75780, C4<1>, C4<1>; -L_0xc759e0 .delay (50000,50000,50000) L_0xc759e0/d; -L_0xc75b00/d .functor AND 1, L_0xc760d0, L_0xc761c0, C4<1>, C4<1>; -L_0xc75b00 .delay (50000,50000,50000) L_0xc75b00/d; -L_0xc75d40/d .functor AND 1, L_0xc75b00, L_0xc745d0, C4<1>, C4<1>; -L_0xc75d40 .delay (50000,50000,50000) L_0xc75d40/d; -L_0xc75ed0/d .functor OR 1, L_0xc759e0, L_0xc75d40, C4<0>, C4<0>; -L_0xc75ed0 .delay (50000,50000,50000) L_0xc75ed0/d; -v0xc38f80_0 .net "a", 0 0, L_0xc760d0; 1 drivers -v0xc39040_0 .net "ab", 0 0, L_0xc74d70; 1 drivers -v0xc390e0_0 .net "acarryin", 0 0, L_0xc751e0; 1 drivers -v0xc39180_0 .net "andall", 0 0, L_0xc75d40; 1 drivers -v0xc39200_0 .net "andsingleintermediate", 0 0, L_0xc75b00; 1 drivers -v0xc392a0_0 .net "andsumintermediate", 0 0, L_0xc759e0; 1 drivers -v0xc39340_0 .net "b", 0 0, L_0xc761c0; 1 drivers -v0xc393e0_0 .net "bcarryin", 0 0, L_0xc752d0; 1 drivers -v0xc39480_0 .alias "carryin", 0 0, v0xc3ae10_0; -v0xc39520_0 .alias "carryout", 0 0, v0xc3afe0_0; -v0xc395a0_0 .net "invcarryout", 0 0, L_0xc75890; 1 drivers -v0xc39620_0 .net "orall", 0 0, L_0xc75780; 1 drivers -v0xc396c0_0 .net "orpairintermediate", 0 0, L_0xc753c0; 1 drivers -v0xc39760_0 .net "orsingleintermediate", 0 0, L_0xc75680; 1 drivers -v0xc39880_0 .net "sum", 0 0, L_0xc75ed0; 1 drivers -S_0xc383b0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc377c0; - .timescale -9 -12; -L_0xc75ce0/d .functor AND 1, L_0xc77220, L_0xc77310, C4<1>, C4<1>; -L_0xc75ce0 .delay (50000,50000,50000) L_0xc75ce0/d; -L_0xc76380/d .functor AND 1, L_0xc77220, L_0xc75520, C4<1>, C4<1>; -L_0xc76380 .delay (50000,50000,50000) L_0xc76380/d; -L_0xc76470/d .functor AND 1, L_0xc77310, L_0xc75520, C4<1>, C4<1>; -L_0xc76470 .delay (50000,50000,50000) L_0xc76470/d; -L_0xc76560/d .functor OR 1, L_0xc75ce0, L_0xc76380, C4<0>, C4<0>; -L_0xc76560 .delay (50000,50000,50000) L_0xc76560/d; -L_0xc766c0/d .functor OR 1, L_0xc76560, L_0xc76470, C4<0>, C4<0>; -L_0xc766c0 .delay (50000,50000,50000) L_0xc766c0/d; -L_0xc76820/d .functor OR 1, L_0xc77220, L_0xc77310, C4<0>, C4<0>; -L_0xc76820 .delay (50000,50000,50000) L_0xc76820/d; -L_0xc76920/d .functor OR 1, L_0xc76820, L_0xc75520, C4<0>, C4<0>; -L_0xc76920 .delay (50000,50000,50000) L_0xc76920/d; -L_0xc76a30/d .functor NOT 1, L_0xc766c0, C4<0>, C4<0>, C4<0>; -L_0xc76a30 .delay (50000,50000,50000) L_0xc76a30/d; -L_0xc76b80/d .functor AND 1, L_0xc76a30, L_0xc76920, C4<1>, C4<1>; -L_0xc76b80 .delay (50000,50000,50000) L_0xc76b80/d; -L_0xc76ca0/d .functor AND 1, L_0xc77220, L_0xc77310, C4<1>, C4<1>; -L_0xc76ca0 .delay (50000,50000,50000) L_0xc76ca0/d; -L_0xc76ee0/d .functor AND 1, L_0xc76ca0, L_0xc75520, C4<1>, C4<1>; -L_0xc76ee0 .delay (50000,50000,50000) L_0xc76ee0/d; -L_0xc77070/d .functor OR 1, L_0xc76b80, L_0xc76ee0, C4<0>, C4<0>; -L_0xc77070 .delay (50000,50000,50000) L_0xc77070/d; -v0xc384a0_0 .net "a", 0 0, L_0xc77220; 1 drivers -v0xc38560_0 .net "ab", 0 0, L_0xc75ce0; 1 drivers -v0xc38600_0 .net "acarryin", 0 0, L_0xc76380; 1 drivers -v0xc386a0_0 .net "andall", 0 0, L_0xc76ee0; 1 drivers -v0xc38720_0 .net "andsingleintermediate", 0 0, L_0xc76ca0; 1 drivers -v0xc387c0_0 .net "andsumintermediate", 0 0, L_0xc76b80; 1 drivers -v0xc38860_0 .net "b", 0 0, L_0xc77310; 1 drivers -v0xc38900_0 .net "bcarryin", 0 0, L_0xc76470; 1 drivers -v0xc389f0_0 .alias "carryin", 0 0, v0xc3afe0_0; -v0xc38a90_0 .alias "carryout", 0 0, v0xc3b110_0; -v0xc38b10_0 .net "invcarryout", 0 0, L_0xc76a30; 1 drivers -v0xc38b90_0 .net "orall", 0 0, L_0xc76920; 1 drivers -v0xc38c30_0 .net "orpairintermediate", 0 0, L_0xc76560; 1 drivers -v0xc38cd0_0 .net "orsingleintermediate", 0 0, L_0xc76820; 1 drivers -v0xc38df0_0 .net "sum", 0 0, L_0xc77070; 1 drivers -S_0xc378b0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc377c0; - .timescale -9 -12; -L_0xc76e80/d .functor AND 1, L_0xc78310, L_0xc78440, C4<1>, C4<1>; -L_0xc76e80 .delay (50000,50000,50000) L_0xc76e80/d; -L_0xc77400/d .functor AND 1, L_0xc78310, L_0xc766c0, C4<1>, C4<1>; -L_0xc77400 .delay (50000,50000,50000) L_0xc77400/d; -L_0xc774f0/d .functor AND 1, L_0xc78440, L_0xc766c0, C4<1>, C4<1>; -L_0xc774f0 .delay (50000,50000,50000) L_0xc774f0/d; -L_0xc77600/d .functor OR 1, L_0xc76e80, L_0xc77400, C4<0>, C4<0>; -L_0xc77600 .delay (50000,50000,50000) L_0xc77600/d; -L_0xc77760/d .functor OR 1, L_0xc77600, L_0xc774f0, C4<0>, C4<0>; -L_0xc77760 .delay (50000,50000,50000) L_0xc77760/d; -L_0xc778c0/d .functor OR 1, L_0xc78310, L_0xc78440, C4<0>, C4<0>; -L_0xc778c0 .delay (50000,50000,50000) L_0xc778c0/d; -L_0xc779c0/d .functor OR 1, L_0xc778c0, L_0xc766c0, C4<0>, C4<0>; -L_0xc779c0 .delay (50000,50000,50000) L_0xc779c0/d; -L_0xc77ad0/d .functor NOT 1, L_0xc77760, C4<0>, C4<0>, C4<0>; -L_0xc77ad0 .delay (50000,50000,50000) L_0xc77ad0/d; -L_0xc77b90/d .functor AND 1, L_0xc77ad0, L_0xc779c0, C4<1>, C4<1>; -L_0xc77b90 .delay (50000,50000,50000) L_0xc77b90/d; -L_0xc77d00/d .functor AND 1, L_0xc78310, L_0xc78440, C4<1>, C4<1>; -L_0xc77d00 .delay (50000,50000,50000) L_0xc77d00/d; -L_0xc77f40/d .functor AND 1, L_0xc77d00, L_0xc766c0, C4<1>, C4<1>; -L_0xc77f40 .delay (50000,50000,50000) L_0xc77f40/d; -L_0xc780d0/d .functor OR 1, L_0xc77b90, L_0xc77f40, C4<0>, C4<0>; -L_0xc780d0 .delay (50000,50000,50000) L_0xc780d0/d; -v0xc379a0_0 .net "a", 0 0, L_0xc78310; 1 drivers -v0xc37a60_0 .net "ab", 0 0, L_0xc76e80; 1 drivers -v0xc37b00_0 .net "acarryin", 0 0, L_0xc77400; 1 drivers -v0xc37ba0_0 .net "andall", 0 0, L_0xc77f40; 1 drivers -v0xc37c20_0 .net "andsingleintermediate", 0 0, L_0xc77d00; 1 drivers -v0xc37cc0_0 .net "andsumintermediate", 0 0, L_0xc77b90; 1 drivers -v0xc37d60_0 .net "b", 0 0, L_0xc78440; 1 drivers -v0xc37e00_0 .net "bcarryin", 0 0, L_0xc774f0; 1 drivers -v0xc37ef0_0 .alias "carryin", 0 0, v0xc3b110_0; -v0xc37f90_0 .alias "carryout", 0 0, v0xc502f0_0; -v0xc38010_0 .net "invcarryout", 0 0, L_0xc77ad0; 1 drivers -v0xc380b0_0 .net "orall", 0 0, L_0xc779c0; 1 drivers -v0xc38150_0 .net "orpairintermediate", 0 0, L_0xc77600; 1 drivers -v0xc381f0_0 .net "orsingleintermediate", 0 0, L_0xc778c0; 1 drivers -v0xc38310_0 .net "sum", 0 0, L_0xc780d0; 1 drivers -S_0xc33cb0 .scope module, "adder4" "FullAdder4bit" 4 242, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc7d3d0/d .functor AND 1, L_0xc7db10, L_0xc7dbb0, C4<1>, C4<1>; -L_0xc7d3d0 .delay (50000,50000,50000) L_0xc7d3d0/d; -L_0xc7dc50/d .functor NOR 1, L_0xc7dcf0, L_0xc7dd90, C4<0>, C4<0>; -L_0xc7dc50 .delay (50000,50000,50000) L_0xc7dc50/d; -L_0xc7dec0/d .functor AND 1, L_0xc7dfb0, L_0xc7e050, C4<1>, C4<1>; -L_0xc7dec0 .delay (50000,50000,50000) L_0xc7dec0/d; -L_0xc7de30/d .functor NOR 1, L_0xc7e270, L_0xc7e420, C4<0>, C4<0>; -L_0xc7de30 .delay (50000,50000,50000) L_0xc7de30/d; -L_0xc7e140/d .functor OR 1, L_0xc7d3d0, L_0xc7dc50, C4<0>, C4<0>; -L_0xc7e140 .delay (50000,50000,50000) L_0xc7e140/d; -L_0xc7e660/d .functor NOR 1, L_0xc7dec0, L_0xc7de30, C4<0>, C4<0>; -L_0xc7e660 .delay (50000,50000,50000) L_0xc7e660/d; -L_0xc7e7a0/d .functor AND 1, L_0xc7e140, L_0xc7e660, C4<1>, C4<1>; -L_0xc7e7a0 .delay (50000,50000,50000) L_0xc7e7a0/d; -v0xc368a0_0 .net *"_s25", 0 0, L_0xc7db10; 1 drivers -v0xc36960_0 .net *"_s27", 0 0, L_0xc7dbb0; 1 drivers -v0xc36a00_0 .net *"_s29", 0 0, L_0xc7dcf0; 1 drivers -v0xc36aa0_0 .net *"_s31", 0 0, L_0xc7dd90; 1 drivers -v0xc36b20_0 .net *"_s33", 0 0, L_0xc7dfb0; 1 drivers -v0xc36bc0_0 .net *"_s35", 0 0, L_0xc7e050; 1 drivers -v0xc36c60_0 .net *"_s37", 0 0, L_0xc7e270; 1 drivers -v0xc36d00_0 .net *"_s39", 0 0, L_0xc7e420; 1 drivers -v0xc36da0_0 .net "a", 3 0, L_0xc7e990; 1 drivers -v0xc36e40_0 .net "aandb", 0 0, L_0xc7d3d0; 1 drivers -v0xc36ee0_0 .net "abandnoror", 0 0, L_0xc7e140; 1 drivers -v0xc36f80_0 .net "anorb", 0 0, L_0xc7dc50; 1 drivers -v0xc37020_0 .net "b", 3 0, L_0xc794e0; 1 drivers -v0xc370c0_0 .net "bandsum", 0 0, L_0xc7dec0; 1 drivers -v0xc371e0_0 .net "bnorsum", 0 0, L_0xc7de30; 1 drivers -v0xc37280_0 .net "bsumandnornor", 0 0, L_0xc7e660; 1 drivers -v0xc37140_0 .alias "carryin", 0 0, v0xc502f0_0; -v0xc373b0_0 .alias "carryout", 0 0, v0xc50740_0; -v0xc37300_0 .net "carryout1", 0 0, L_0xc79aa0; 1 drivers -v0xc374d0_0 .net "carryout2", 0 0, L_0xc7aa10; 1 drivers -v0xc37600_0 .net "carryout3", 0 0, L_0xc7bbb0; 1 drivers -v0xc37680_0 .alias "overflow", 0 0, v0xc4d480_0; -v0xc37550_0 .net8 "sum", 3 0, RS_0x7fb7ca186a08; 4 drivers -L_0xc7a440 .part/pv L_0xc7a380, 0, 1, 4; -L_0xc7a500 .part L_0xc7e990, 0, 1; -L_0xc7a5a0 .part L_0xc794e0, 0, 1; -L_0xc7b4d0 .part/pv L_0xc7b3c0, 1, 1, 4; -L_0xc7b5c0 .part L_0xc7e990, 1, 1; -L_0xc7b6b0 .part L_0xc794e0, 1, 1; -L_0xc7c670 .part/pv L_0xc7c560, 2, 1, 4; -L_0xc7c710 .part L_0xc7e990, 2, 1; -L_0xc7c800 .part L_0xc794e0, 2, 1; -L_0xc7d6d0 .part/pv L_0xc7d5c0, 3, 1, 4; -L_0xc7d800 .part L_0xc7e990, 3, 1; -L_0xc7d930 .part L_0xc794e0, 3, 1; -L_0xc7db10 .part L_0xc7e990, 3, 1; -L_0xc7dbb0 .part L_0xc794e0, 3, 1; -L_0xc7dcf0 .part L_0xc7e990, 3, 1; -L_0xc7dd90 .part L_0xc794e0, 3, 1; -L_0xc7dfb0 .part L_0xc794e0, 3, 1; -L_0xc7e050 .part RS_0x7fb7ca186a08, 3, 1; -L_0xc7e270 .part L_0xc794e0, 3, 1; -L_0xc7e420 .part RS_0x7fb7ca186a08, 3, 1; -S_0xc35e10 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc33cb0; - .timescale -9 -12; -L_0xc74260/d .functor AND 1, L_0xc7a500, L_0xc7a5a0, C4<1>, C4<1>; -L_0xc74260 .delay (50000,50000,50000) L_0xc74260/d; -L_0xc74300/d .functor AND 1, L_0xc7a500, L_0xc77760, C4<1>, C4<1>; -L_0xc74300 .delay (50000,50000,50000) L_0xc74300/d; -L_0xc797f0/d .functor AND 1, L_0xc7a5a0, L_0xc77760, C4<1>, C4<1>; -L_0xc797f0 .delay (50000,50000,50000) L_0xc797f0/d; -L_0xc79960/d .functor OR 1, L_0xc74260, L_0xc74300, C4<0>, C4<0>; -L_0xc79960 .delay (50000,50000,50000) L_0xc79960/d; -L_0xc79aa0/d .functor OR 1, L_0xc79960, L_0xc797f0, C4<0>, C4<0>; -L_0xc79aa0 .delay (50000,50000,50000) L_0xc79aa0/d; -L_0xc79c00/d .functor OR 1, L_0xc7a500, L_0xc7a5a0, C4<0>, C4<0>; -L_0xc79c00 .delay (50000,50000,50000) L_0xc79c00/d; -L_0xc79d00/d .functor OR 1, L_0xc79c00, L_0xc77760, C4<0>, C4<0>; -L_0xc79d00 .delay (50000,50000,50000) L_0xc79d00/d; -L_0xc79e10/d .functor NOT 1, L_0xc79aa0, C4<0>, C4<0>, C4<0>; -L_0xc79e10 .delay (50000,50000,50000) L_0xc79e10/d; -L_0xc79f60/d .functor AND 1, L_0xc79e10, L_0xc79d00, C4<1>, C4<1>; -L_0xc79f60 .delay (50000,50000,50000) L_0xc79f60/d; -L_0xc7a080/d .functor AND 1, L_0xc7a500, L_0xc7a5a0, C4<1>, C4<1>; -L_0xc7a080 .delay (50000,50000,50000) L_0xc7a080/d; -L_0xc7a2c0/d .functor AND 1, L_0xc7a080, L_0xc77760, C4<1>, C4<1>; -L_0xc7a2c0 .delay (50000,50000,50000) L_0xc7a2c0/d; -L_0xc7a380/d .functor OR 1, L_0xc79f60, L_0xc7a2c0, C4<0>, C4<0>; -L_0xc7a380 .delay (50000,50000,50000) L_0xc7a380/d; -v0xc35f00_0 .net "a", 0 0, L_0xc7a500; 1 drivers -v0xc35fc0_0 .net "ab", 0 0, L_0xc74260; 1 drivers -v0xc36060_0 .net "acarryin", 0 0, L_0xc74300; 1 drivers -v0xc36100_0 .net "andall", 0 0, L_0xc7a2c0; 1 drivers -v0xc36180_0 .net "andsingleintermediate", 0 0, L_0xc7a080; 1 drivers -v0xc36220_0 .net "andsumintermediate", 0 0, L_0xc79f60; 1 drivers -v0xc362c0_0 .net "b", 0 0, L_0xc7a5a0; 1 drivers -v0xc36360_0 .net "bcarryin", 0 0, L_0xc797f0; 1 drivers -v0xc36400_0 .alias "carryin", 0 0, v0xc502f0_0; -v0xc364a0_0 .alias "carryout", 0 0, v0xc37300_0; -v0xc36520_0 .net "invcarryout", 0 0, L_0xc79e10; 1 drivers -v0xc365a0_0 .net "orall", 0 0, L_0xc79d00; 1 drivers -v0xc36640_0 .net "orpairintermediate", 0 0, L_0xc79960; 1 drivers -v0xc366e0_0 .net "orsingleintermediate", 0 0, L_0xc79c00; 1 drivers -v0xc36800_0 .net "sum", 0 0, L_0xc7a380; 1 drivers -S_0xc35380 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc33cb0; - .timescale -9 -12; -L_0xc7a260/d .functor AND 1, L_0xc7b5c0, L_0xc7b6b0, C4<1>, C4<1>; -L_0xc7a260 .delay (50000,50000,50000) L_0xc7a260/d; -L_0xc7a6d0/d .functor AND 1, L_0xc7b5c0, L_0xc79aa0, C4<1>, C4<1>; -L_0xc7a6d0 .delay (50000,50000,50000) L_0xc7a6d0/d; -L_0xc7a7c0/d .functor AND 1, L_0xc7b6b0, L_0xc79aa0, C4<1>, C4<1>; -L_0xc7a7c0 .delay (50000,50000,50000) L_0xc7a7c0/d; -L_0xc7a8b0/d .functor OR 1, L_0xc7a260, L_0xc7a6d0, C4<0>, C4<0>; -L_0xc7a8b0 .delay (50000,50000,50000) L_0xc7a8b0/d; -L_0xc7aa10/d .functor OR 1, L_0xc7a8b0, L_0xc7a7c0, C4<0>, C4<0>; -L_0xc7aa10 .delay (50000,50000,50000) L_0xc7aa10/d; -L_0xc7ab70/d .functor OR 1, L_0xc7b5c0, L_0xc7b6b0, C4<0>, C4<0>; -L_0xc7ab70 .delay (50000,50000,50000) L_0xc7ab70/d; -L_0xc7ac70/d .functor OR 1, L_0xc7ab70, L_0xc79aa0, C4<0>, C4<0>; -L_0xc7ac70 .delay (50000,50000,50000) L_0xc7ac70/d; -L_0xc7ad80/d .functor NOT 1, L_0xc7aa10, C4<0>, C4<0>, C4<0>; -L_0xc7ad80 .delay (50000,50000,50000) L_0xc7ad80/d; -L_0xc7aed0/d .functor AND 1, L_0xc7ad80, L_0xc7ac70, C4<1>, C4<1>; -L_0xc7aed0 .delay (50000,50000,50000) L_0xc7aed0/d; -L_0xc7aff0/d .functor AND 1, L_0xc7b5c0, L_0xc7b6b0, C4<1>, C4<1>; -L_0xc7aff0 .delay (50000,50000,50000) L_0xc7aff0/d; -L_0xc7b230/d .functor AND 1, L_0xc7aff0, L_0xc79aa0, C4<1>, C4<1>; -L_0xc7b230 .delay (50000,50000,50000) L_0xc7b230/d; -L_0xc7b3c0/d .functor OR 1, L_0xc7aed0, L_0xc7b230, C4<0>, C4<0>; -L_0xc7b3c0 .delay (50000,50000,50000) L_0xc7b3c0/d; -v0xc35470_0 .net "a", 0 0, L_0xc7b5c0; 1 drivers -v0xc35530_0 .net "ab", 0 0, L_0xc7a260; 1 drivers -v0xc355d0_0 .net "acarryin", 0 0, L_0xc7a6d0; 1 drivers -v0xc35670_0 .net "andall", 0 0, L_0xc7b230; 1 drivers -v0xc356f0_0 .net "andsingleintermediate", 0 0, L_0xc7aff0; 1 drivers -v0xc35790_0 .net "andsumintermediate", 0 0, L_0xc7aed0; 1 drivers -v0xc35830_0 .net "b", 0 0, L_0xc7b6b0; 1 drivers -v0xc358d0_0 .net "bcarryin", 0 0, L_0xc7a7c0; 1 drivers -v0xc35970_0 .alias "carryin", 0 0, v0xc37300_0; -v0xc35a10_0 .alias "carryout", 0 0, v0xc374d0_0; -v0xc35a90_0 .net "invcarryout", 0 0, L_0xc7ad80; 1 drivers -v0xc35b10_0 .net "orall", 0 0, L_0xc7ac70; 1 drivers -v0xc35bb0_0 .net "orpairintermediate", 0 0, L_0xc7a8b0; 1 drivers -v0xc35c50_0 .net "orsingleintermediate", 0 0, L_0xc7ab70; 1 drivers -v0xc35d70_0 .net "sum", 0 0, L_0xc7b3c0; 1 drivers -S_0xc348a0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc33cb0; - .timescale -9 -12; -L_0xc7b1d0/d .functor AND 1, L_0xc7c710, L_0xc7c800, C4<1>, C4<1>; -L_0xc7b1d0 .delay (50000,50000,50000) L_0xc7b1d0/d; -L_0xc7b870/d .functor AND 1, L_0xc7c710, L_0xc7aa10, C4<1>, C4<1>; -L_0xc7b870 .delay (50000,50000,50000) L_0xc7b870/d; -L_0xc7b960/d .functor AND 1, L_0xc7c800, L_0xc7aa10, C4<1>, C4<1>; -L_0xc7b960 .delay (50000,50000,50000) L_0xc7b960/d; -L_0xc7ba50/d .functor OR 1, L_0xc7b1d0, L_0xc7b870, C4<0>, C4<0>; -L_0xc7ba50 .delay (50000,50000,50000) L_0xc7ba50/d; -L_0xc7bbb0/d .functor OR 1, L_0xc7ba50, L_0xc7b960, C4<0>, C4<0>; -L_0xc7bbb0 .delay (50000,50000,50000) L_0xc7bbb0/d; -L_0xc7bd10/d .functor OR 1, L_0xc7c710, L_0xc7c800, C4<0>, C4<0>; -L_0xc7bd10 .delay (50000,50000,50000) L_0xc7bd10/d; -L_0xc7be10/d .functor OR 1, L_0xc7bd10, L_0xc7aa10, C4<0>, C4<0>; -L_0xc7be10 .delay (50000,50000,50000) L_0xc7be10/d; -L_0xc7bf20/d .functor NOT 1, L_0xc7bbb0, C4<0>, C4<0>, C4<0>; -L_0xc7bf20 .delay (50000,50000,50000) L_0xc7bf20/d; -L_0xc7c070/d .functor AND 1, L_0xc7bf20, L_0xc7be10, C4<1>, C4<1>; -L_0xc7c070 .delay (50000,50000,50000) L_0xc7c070/d; -L_0xc7c190/d .functor AND 1, L_0xc7c710, L_0xc7c800, C4<1>, C4<1>; -L_0xc7c190 .delay (50000,50000,50000) L_0xc7c190/d; -L_0xc7c3d0/d .functor AND 1, L_0xc7c190, L_0xc7aa10, C4<1>, C4<1>; -L_0xc7c3d0 .delay (50000,50000,50000) L_0xc7c3d0/d; -L_0xc7c560/d .functor OR 1, L_0xc7c070, L_0xc7c3d0, C4<0>, C4<0>; -L_0xc7c560 .delay (50000,50000,50000) L_0xc7c560/d; -v0xc34990_0 .net "a", 0 0, L_0xc7c710; 1 drivers -v0xc34a50_0 .net "ab", 0 0, L_0xc7b1d0; 1 drivers -v0xc34af0_0 .net "acarryin", 0 0, L_0xc7b870; 1 drivers -v0xc34b90_0 .net "andall", 0 0, L_0xc7c3d0; 1 drivers -v0xc34c10_0 .net "andsingleintermediate", 0 0, L_0xc7c190; 1 drivers -v0xc34cb0_0 .net "andsumintermediate", 0 0, L_0xc7c070; 1 drivers -v0xc34d50_0 .net "b", 0 0, L_0xc7c800; 1 drivers -v0xc34df0_0 .net "bcarryin", 0 0, L_0xc7b960; 1 drivers -v0xc34ee0_0 .alias "carryin", 0 0, v0xc374d0_0; -v0xc34f80_0 .alias "carryout", 0 0, v0xc37600_0; -v0xc35000_0 .net "invcarryout", 0 0, L_0xc7bf20; 1 drivers -v0xc35080_0 .net "orall", 0 0, L_0xc7be10; 1 drivers -v0xc35120_0 .net "orpairintermediate", 0 0, L_0xc7ba50; 1 drivers -v0xc351c0_0 .net "orsingleintermediate", 0 0, L_0xc7bd10; 1 drivers -v0xc352e0_0 .net "sum", 0 0, L_0xc7c560; 1 drivers -S_0xc33da0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc33cb0; - .timescale -9 -12; -L_0xc7c370/d .functor AND 1, L_0xc7d800, L_0xc7d930, C4<1>, C4<1>; -L_0xc7c370 .delay (50000,50000,50000) L_0xc7c370/d; -L_0xc7c8f0/d .functor AND 1, L_0xc7d800, L_0xc7bbb0, C4<1>, C4<1>; -L_0xc7c8f0 .delay (50000,50000,50000) L_0xc7c8f0/d; -L_0xc7c9e0/d .functor AND 1, L_0xc7d930, L_0xc7bbb0, C4<1>, C4<1>; -L_0xc7c9e0 .delay (50000,50000,50000) L_0xc7c9e0/d; -L_0xc7caf0/d .functor OR 1, L_0xc7c370, L_0xc7c8f0, C4<0>, C4<0>; -L_0xc7caf0 .delay (50000,50000,50000) L_0xc7caf0/d; -L_0xc7cc50/d .functor OR 1, L_0xc7caf0, L_0xc7c9e0, C4<0>, C4<0>; -L_0xc7cc50 .delay (50000,50000,50000) L_0xc7cc50/d; -L_0xc7cdb0/d .functor OR 1, L_0xc7d800, L_0xc7d930, C4<0>, C4<0>; -L_0xc7cdb0 .delay (50000,50000,50000) L_0xc7cdb0/d; -L_0xc7ceb0/d .functor OR 1, L_0xc7cdb0, L_0xc7bbb0, C4<0>, C4<0>; -L_0xc7ceb0 .delay (50000,50000,50000) L_0xc7ceb0/d; -L_0xc7cfc0/d .functor NOT 1, L_0xc7cc50, C4<0>, C4<0>, C4<0>; -L_0xc7cfc0 .delay (50000,50000,50000) L_0xc7cfc0/d; -L_0xc7d080/d .functor AND 1, L_0xc7cfc0, L_0xc7ceb0, C4<1>, C4<1>; -L_0xc7d080 .delay (50000,50000,50000) L_0xc7d080/d; -L_0xc7d1f0/d .functor AND 1, L_0xc7d800, L_0xc7d930, C4<1>, C4<1>; -L_0xc7d1f0 .delay (50000,50000,50000) L_0xc7d1f0/d; -L_0xc7d430/d .functor AND 1, L_0xc7d1f0, L_0xc7bbb0, C4<1>, C4<1>; -L_0xc7d430 .delay (50000,50000,50000) L_0xc7d430/d; -L_0xc7d5c0/d .functor OR 1, L_0xc7d080, L_0xc7d430, C4<0>, C4<0>; -L_0xc7d5c0 .delay (50000,50000,50000) L_0xc7d5c0/d; -v0xc33e90_0 .net "a", 0 0, L_0xc7d800; 1 drivers -v0xc33f50_0 .net "ab", 0 0, L_0xc7c370; 1 drivers -v0xc33ff0_0 .net "acarryin", 0 0, L_0xc7c8f0; 1 drivers -v0xc34090_0 .net "andall", 0 0, L_0xc7d430; 1 drivers -v0xc34110_0 .net "andsingleintermediate", 0 0, L_0xc7d1f0; 1 drivers -v0xc341b0_0 .net "andsumintermediate", 0 0, L_0xc7d080; 1 drivers -v0xc34250_0 .net "b", 0 0, L_0xc7d930; 1 drivers -v0xc342f0_0 .net "bcarryin", 0 0, L_0xc7c9e0; 1 drivers -v0xc343e0_0 .alias "carryin", 0 0, v0xc37600_0; -v0xc34480_0 .alias "carryout", 0 0, v0xc50740_0; -v0xc34500_0 .net "invcarryout", 0 0, L_0xc7cfc0; 1 drivers -v0xc345a0_0 .net "orall", 0 0, L_0xc7ceb0; 1 drivers -v0xc34640_0 .net "orpairintermediate", 0 0, L_0xc7caf0; 1 drivers -v0xc346e0_0 .net "orsingleintermediate", 0 0, L_0xc7cdb0; 1 drivers -v0xc34800_0 .net "sum", 0 0, L_0xc7d5c0; 1 drivers -S_0xc301a0 .scope module, "adder5" "FullAdder4bit" 4 243, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc825c0/d .functor AND 1, L_0xc82ca0, L_0xc82d40, C4<1>, C4<1>; -L_0xc825c0 .delay (50000,50000,50000) L_0xc825c0/d; -L_0xc82e60/d .functor NOR 1, L_0xc82f00, L_0xc82fa0, C4<0>, C4<0>; -L_0xc82e60 .delay (50000,50000,50000) L_0xc82e60/d; -L_0xc830d0/d .functor AND 1, L_0xc831f0, L_0xc83290, C4<1>, C4<1>; -L_0xc830d0 .delay (50000,50000,50000) L_0xc830d0/d; -L_0xc83040/d .functor NOR 1, L_0xc834e0, L_0xc83690, C4<0>, C4<0>; -L_0xc83040 .delay (50000,50000,50000) L_0xc83040/d; -L_0xc83380/d .functor OR 1, L_0xc825c0, L_0xc82e60, C4<0>, C4<0>; -L_0xc83380 .delay (50000,50000,50000) L_0xc83380/d; -L_0xc838d0/d .functor NOR 1, L_0xc830d0, L_0xc83040, C4<0>, C4<0>; -L_0xc838d0 .delay (50000,50000,50000) L_0xc838d0/d; -L_0xc83a10/d .functor AND 1, L_0xc83380, L_0xc838d0, C4<1>, C4<1>; -L_0xc83a10 .delay (50000,50000,50000) L_0xc83a10/d; -v0xc32d90_0 .net *"_s25", 0 0, L_0xc82ca0; 1 drivers -v0xc32e50_0 .net *"_s27", 0 0, L_0xc82d40; 1 drivers -v0xc32ef0_0 .net *"_s29", 0 0, L_0xc82f00; 1 drivers -v0xc32f90_0 .net *"_s31", 0 0, L_0xc82fa0; 1 drivers -v0xc33010_0 .net *"_s33", 0 0, L_0xc831f0; 1 drivers -v0xc330b0_0 .net *"_s35", 0 0, L_0xc83290; 1 drivers -v0xc33150_0 .net *"_s37", 0 0, L_0xc834e0; 1 drivers -v0xc331f0_0 .net *"_s39", 0 0, L_0xc83690; 1 drivers -v0xc33290_0 .net "a", 3 0, L_0xc7ea30; 1 drivers -v0xc33330_0 .net "aandb", 0 0, L_0xc825c0; 1 drivers -v0xc333d0_0 .net "abandnoror", 0 0, L_0xc83380; 1 drivers -v0xc33470_0 .net "anorb", 0 0, L_0xc82e60; 1 drivers -v0xc33510_0 .net "b", 3 0, L_0xc7ead0; 1 drivers -v0xc335b0_0 .net "bandsum", 0 0, L_0xc830d0; 1 drivers -v0xc336d0_0 .net "bnorsum", 0 0, L_0xc83040; 1 drivers -v0xc33770_0 .net "bsumandnornor", 0 0, L_0xc838d0; 1 drivers -v0xc33630_0 .alias "carryin", 0 0, v0xc50740_0; -v0xc338a0_0 .alias "carryout", 0 0, v0xc50850_0; -v0xc337f0_0 .net "carryout1", 0 0, L_0xc7ef70; 1 drivers -v0xc339c0_0 .net "carryout2", 0 0, L_0xc7fec0; 1 drivers -v0xc33af0_0 .net "carryout3", 0 0, L_0xc687e0; 1 drivers -v0xc33b70_0 .alias "overflow", 0 0, v0xc4d500_0; -v0xc33a40_0 .net8 "sum", 3 0, RS_0x7fb7ca185c28; 4 drivers -L_0xc7f8f0 .part/pv L_0xc7f830, 0, 1, 4; -L_0xc7f9b0 .part L_0xc7ea30, 0, 1; -L_0xc7fa50 .part L_0xc7ead0, 0, 1; -L_0xc80980 .part/pv L_0xc80870, 1, 1, 4; -L_0xc80a70 .part L_0xc7ea30, 1, 1; -L_0xc80b60 .part L_0xc7ead0, 1, 1; -L_0xc81960 .part/pv L_0xc81890, 2, 1, 4; -L_0xc81a00 .part L_0xc7ea30, 2, 1; -L_0xc81af0 .part L_0xc7ead0, 2, 1; -L_0xc82860 .part/pv L_0xc82790, 3, 1, 4; -L_0xc82990 .part L_0xc7ea30, 3, 1; -L_0xc82ac0 .part L_0xc7ead0, 3, 1; -L_0xc82ca0 .part L_0xc7ea30, 3, 1; -L_0xc82d40 .part L_0xc7ead0, 3, 1; -L_0xc82f00 .part L_0xc7ea30, 3, 1; -L_0xc82fa0 .part L_0xc7ead0, 3, 1; -L_0xc831f0 .part L_0xc7ead0, 3, 1; -L_0xc83290 .part RS_0x7fb7ca185c28, 3, 1; -L_0xc834e0 .part L_0xc7ead0, 3, 1; -L_0xc83690 .part RS_0x7fb7ca185c28, 3, 1; -S_0xc32300 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc301a0; - .timescale -9 -12; -L_0xc79580/d .functor AND 1, L_0xc7f9b0, L_0xc7fa50, C4<1>, C4<1>; -L_0xc79580 .delay (50000,50000,50000) L_0xc79580/d; -L_0xc79620/d .functor AND 1, L_0xc7f9b0, L_0xc7cc50, C4<1>, C4<1>; -L_0xc79620 .delay (50000,50000,50000) L_0xc79620/d; -L_0xc7ecc0/d .functor AND 1, L_0xc7fa50, L_0xc7cc50, C4<1>, C4<1>; -L_0xc7ecc0 .delay (50000,50000,50000) L_0xc7ecc0/d; -L_0xc7ee30/d .functor OR 1, L_0xc79580, L_0xc79620, C4<0>, C4<0>; -L_0xc7ee30 .delay (50000,50000,50000) L_0xc7ee30/d; -L_0xc7ef70/d .functor OR 1, L_0xc7ee30, L_0xc7ecc0, C4<0>, C4<0>; -L_0xc7ef70 .delay (50000,50000,50000) L_0xc7ef70/d; -L_0xc7f0b0/d .functor OR 1, L_0xc7f9b0, L_0xc7fa50, C4<0>, C4<0>; -L_0xc7f0b0 .delay (50000,50000,50000) L_0xc7f0b0/d; -L_0xc7f1b0/d .functor OR 1, L_0xc7f0b0, L_0xc7cc50, C4<0>, C4<0>; -L_0xc7f1b0 .delay (50000,50000,50000) L_0xc7f1b0/d; -L_0xc7f2c0/d .functor NOT 1, L_0xc7ef70, C4<0>, C4<0>, C4<0>; -L_0xc7f2c0 .delay (50000,50000,50000) L_0xc7f2c0/d; -L_0xc7f410/d .functor AND 1, L_0xc7f2c0, L_0xc7f1b0, C4<1>, C4<1>; -L_0xc7f410 .delay (50000,50000,50000) L_0xc7f410/d; -L_0xc7f530/d .functor AND 1, L_0xc7f9b0, L_0xc7fa50, C4<1>, C4<1>; -L_0xc7f530 .delay (50000,50000,50000) L_0xc7f530/d; -L_0xc7f770/d .functor AND 1, L_0xc7f530, L_0xc7cc50, C4<1>, C4<1>; -L_0xc7f770 .delay (50000,50000,50000) L_0xc7f770/d; -L_0xc7f830/d .functor OR 1, L_0xc7f410, L_0xc7f770, C4<0>, C4<0>; -L_0xc7f830 .delay (50000,50000,50000) L_0xc7f830/d; -v0xc323f0_0 .net "a", 0 0, L_0xc7f9b0; 1 drivers -v0xc324b0_0 .net "ab", 0 0, L_0xc79580; 1 drivers -v0xc32550_0 .net "acarryin", 0 0, L_0xc79620; 1 drivers -v0xc325f0_0 .net "andall", 0 0, L_0xc7f770; 1 drivers -v0xc32670_0 .net "andsingleintermediate", 0 0, L_0xc7f530; 1 drivers -v0xc32710_0 .net "andsumintermediate", 0 0, L_0xc7f410; 1 drivers -v0xc327b0_0 .net "b", 0 0, L_0xc7fa50; 1 drivers -v0xc32850_0 .net "bcarryin", 0 0, L_0xc7ecc0; 1 drivers -v0xc328f0_0 .alias "carryin", 0 0, v0xc50740_0; -v0xc32990_0 .alias "carryout", 0 0, v0xc337f0_0; -v0xc32a10_0 .net "invcarryout", 0 0, L_0xc7f2c0; 1 drivers -v0xc32a90_0 .net "orall", 0 0, L_0xc7f1b0; 1 drivers -v0xc32b30_0 .net "orpairintermediate", 0 0, L_0xc7ee30; 1 drivers -v0xc32bd0_0 .net "orsingleintermediate", 0 0, L_0xc7f0b0; 1 drivers -v0xc32cf0_0 .net "sum", 0 0, L_0xc7f830; 1 drivers -S_0xc31870 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc301a0; - .timescale -9 -12; -L_0xc7f710/d .functor AND 1, L_0xc80a70, L_0xc80b60, C4<1>, C4<1>; -L_0xc7f710 .delay (50000,50000,50000) L_0xc7f710/d; -L_0xc7fb80/d .functor AND 1, L_0xc80a70, L_0xc7ef70, C4<1>, C4<1>; -L_0xc7fb80 .delay (50000,50000,50000) L_0xc7fb80/d; -L_0xc7fc70/d .functor AND 1, L_0xc80b60, L_0xc7ef70, C4<1>, C4<1>; -L_0xc7fc70 .delay (50000,50000,50000) L_0xc7fc70/d; -L_0xc7fd60/d .functor OR 1, L_0xc7f710, L_0xc7fb80, C4<0>, C4<0>; -L_0xc7fd60 .delay (50000,50000,50000) L_0xc7fd60/d; -L_0xc7fec0/d .functor OR 1, L_0xc7fd60, L_0xc7fc70, C4<0>, C4<0>; -L_0xc7fec0 .delay (50000,50000,50000) L_0xc7fec0/d; -L_0xc80020/d .functor OR 1, L_0xc80a70, L_0xc80b60, C4<0>, C4<0>; -L_0xc80020 .delay (50000,50000,50000) L_0xc80020/d; -L_0xc80120/d .functor OR 1, L_0xc80020, L_0xc7ef70, C4<0>, C4<0>; -L_0xc80120 .delay (50000,50000,50000) L_0xc80120/d; -L_0xc80230/d .functor NOT 1, L_0xc7fec0, C4<0>, C4<0>, C4<0>; -L_0xc80230 .delay (50000,50000,50000) L_0xc80230/d; -L_0xc80380/d .functor AND 1, L_0xc80230, L_0xc80120, C4<1>, C4<1>; -L_0xc80380 .delay (50000,50000,50000) L_0xc80380/d; -L_0xc804a0/d .functor AND 1, L_0xc80a70, L_0xc80b60, C4<1>, C4<1>; -L_0xc804a0 .delay (50000,50000,50000) L_0xc804a0/d; -L_0xc806e0/d .functor AND 1, L_0xc804a0, L_0xc7ef70, C4<1>, C4<1>; -L_0xc806e0 .delay (50000,50000,50000) L_0xc806e0/d; -L_0xc80870/d .functor OR 1, L_0xc80380, L_0xc806e0, C4<0>, C4<0>; -L_0xc80870 .delay (50000,50000,50000) L_0xc80870/d; -v0xc31960_0 .net "a", 0 0, L_0xc80a70; 1 drivers -v0xc31a20_0 .net "ab", 0 0, L_0xc7f710; 1 drivers -v0xc31ac0_0 .net "acarryin", 0 0, L_0xc7fb80; 1 drivers -v0xc31b60_0 .net "andall", 0 0, L_0xc806e0; 1 drivers -v0xc31be0_0 .net "andsingleintermediate", 0 0, L_0xc804a0; 1 drivers -v0xc31c80_0 .net "andsumintermediate", 0 0, L_0xc80380; 1 drivers -v0xc31d20_0 .net "b", 0 0, L_0xc80b60; 1 drivers -v0xc31dc0_0 .net "bcarryin", 0 0, L_0xc7fc70; 1 drivers -v0xc31e60_0 .alias "carryin", 0 0, v0xc337f0_0; -v0xc31f00_0 .alias "carryout", 0 0, v0xc339c0_0; -v0xc31f80_0 .net "invcarryout", 0 0, L_0xc80230; 1 drivers -v0xc32000_0 .net "orall", 0 0, L_0xc80120; 1 drivers -v0xc320a0_0 .net "orpairintermediate", 0 0, L_0xc7fd60; 1 drivers -v0xc32140_0 .net "orsingleintermediate", 0 0, L_0xc80020; 1 drivers -v0xc32260_0 .net "sum", 0 0, L_0xc80870; 1 drivers -S_0xc30d90 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc301a0; - .timescale -9 -12; -L_0xc80680/d .functor AND 1, L_0xc81a00, L_0xc81af0, C4<1>, C4<1>; -L_0xc80680 .delay (50000,50000,50000) L_0xc80680/d; -L_0xc80d20/d .functor AND 1, L_0xc81a00, L_0xc7fec0, C4<1>, C4<1>; -L_0xc80d20 .delay (50000,50000,50000) L_0xc80d20/d; -L_0xc80e10/d .functor AND 1, L_0xc81af0, L_0xc7fec0, C4<1>, C4<1>; -L_0xc80e10 .delay (50000,50000,50000) L_0xc80e10/d; -L_0xc80f00/d .functor OR 1, L_0xc80680, L_0xc80d20, C4<0>, C4<0>; -L_0xc80f00 .delay (50000,50000,50000) L_0xc80f00/d; -L_0xc687e0/d .functor OR 1, L_0xc80f00, L_0xc80e10, C4<0>, C4<0>; -L_0xc687e0 .delay (50000,50000,50000) L_0xc687e0/d; -L_0xc81100/d .functor OR 1, L_0xc81a00, L_0xc81af0, C4<0>, C4<0>; -L_0xc81100 .delay (50000,50000,50000) L_0xc81100/d; -L_0xc811e0/d .functor OR 1, L_0xc81100, L_0xc7fec0, C4<0>, C4<0>; -L_0xc811e0 .delay (50000,50000,50000) L_0xc811e0/d; -L_0xc812d0/d .functor NOT 1, L_0xc687e0, C4<0>, C4<0>, C4<0>; -L_0xc812d0 .delay (50000,50000,50000) L_0xc812d0/d; -L_0xc81400/d .functor AND 1, L_0xc812d0, L_0xc811e0, C4<1>, C4<1>; -L_0xc81400 .delay (50000,50000,50000) L_0xc81400/d; -L_0xc81500/d .functor AND 1, L_0xc81a00, L_0xc81af0, C4<1>, C4<1>; -L_0xc81500 .delay (50000,50000,50000) L_0xc81500/d; -L_0xc81720/d .functor AND 1, L_0xc81500, L_0xc7fec0, C4<1>, C4<1>; -L_0xc81720 .delay (50000,50000,50000) L_0xc81720/d; -L_0xc81890/d .functor OR 1, L_0xc81400, L_0xc81720, C4<0>, C4<0>; -L_0xc81890 .delay (50000,50000,50000) L_0xc81890/d; -v0xc30e80_0 .net "a", 0 0, L_0xc81a00; 1 drivers -v0xc30f40_0 .net "ab", 0 0, L_0xc80680; 1 drivers -v0xc30fe0_0 .net "acarryin", 0 0, L_0xc80d20; 1 drivers -v0xc31080_0 .net "andall", 0 0, L_0xc81720; 1 drivers -v0xc31100_0 .net "andsingleintermediate", 0 0, L_0xc81500; 1 drivers -v0xc311a0_0 .net "andsumintermediate", 0 0, L_0xc81400; 1 drivers -v0xc31240_0 .net "b", 0 0, L_0xc81af0; 1 drivers -v0xc312e0_0 .net "bcarryin", 0 0, L_0xc80e10; 1 drivers -v0xc313d0_0 .alias "carryin", 0 0, v0xc339c0_0; -v0xc31470_0 .alias "carryout", 0 0, v0xc33af0_0; -v0xc314f0_0 .net "invcarryout", 0 0, L_0xc812d0; 1 drivers -v0xc31570_0 .net "orall", 0 0, L_0xc811e0; 1 drivers -v0xc31610_0 .net "orpairintermediate", 0 0, L_0xc80f00; 1 drivers -v0xc316b0_0 .net "orsingleintermediate", 0 0, L_0xc81100; 1 drivers -v0xc317d0_0 .net "sum", 0 0, L_0xc81890; 1 drivers -S_0xc30290 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc301a0; - .timescale -9 -12; -L_0xc816c0/d .functor AND 1, L_0xc82990, L_0xc82ac0, C4<1>, C4<1>; -L_0xc816c0 .delay (50000,50000,50000) L_0xc816c0/d; -L_0xc81be0/d .functor AND 1, L_0xc82990, L_0xc687e0, C4<1>, C4<1>; -L_0xc81be0 .delay (50000,50000,50000) L_0xc81be0/d; -L_0xc81cd0/d .functor AND 1, L_0xc82ac0, L_0xc687e0, C4<1>, C4<1>; -L_0xc81cd0 .delay (50000,50000,50000) L_0xc81cd0/d; -L_0xc81dc0/d .functor OR 1, L_0xc816c0, L_0xc81be0, C4<0>, C4<0>; -L_0xc81dc0 .delay (50000,50000,50000) L_0xc81dc0/d; -L_0xc81f00/d .functor OR 1, L_0xc81dc0, L_0xc81cd0, C4<0>, C4<0>; -L_0xc81f00 .delay (50000,50000,50000) L_0xc81f00/d; -L_0xc82040/d .functor OR 1, L_0xc82990, L_0xc82ac0, C4<0>, C4<0>; -L_0xc82040 .delay (50000,50000,50000) L_0xc82040/d; -L_0xc82120/d .functor OR 1, L_0xc82040, L_0xc687e0, C4<0>, C4<0>; -L_0xc82120 .delay (50000,50000,50000) L_0xc82120/d; -L_0xc82210/d .functor NOT 1, L_0xc81f00, C4<0>, C4<0>, C4<0>; -L_0xc82210 .delay (50000,50000,50000) L_0xc82210/d; -L_0xc822b0/d .functor AND 1, L_0xc82210, L_0xc82120, C4<1>, C4<1>; -L_0xc822b0 .delay (50000,50000,50000) L_0xc822b0/d; -L_0xc82400/d .functor AND 1, L_0xc82990, L_0xc82ac0, C4<1>, C4<1>; -L_0xc82400 .delay (50000,50000,50000) L_0xc82400/d; -L_0xc82620/d .functor AND 1, L_0xc82400, L_0xc687e0, C4<1>, C4<1>; -L_0xc82620 .delay (50000,50000,50000) L_0xc82620/d; -L_0xc82790/d .functor OR 1, L_0xc822b0, L_0xc82620, C4<0>, C4<0>; -L_0xc82790 .delay (50000,50000,50000) L_0xc82790/d; -v0xc30380_0 .net "a", 0 0, L_0xc82990; 1 drivers -v0xc30440_0 .net "ab", 0 0, L_0xc816c0; 1 drivers -v0xc304e0_0 .net "acarryin", 0 0, L_0xc81be0; 1 drivers -v0xc30580_0 .net "andall", 0 0, L_0xc82620; 1 drivers -v0xc30600_0 .net "andsingleintermediate", 0 0, L_0xc82400; 1 drivers -v0xc306a0_0 .net "andsumintermediate", 0 0, L_0xc822b0; 1 drivers -v0xc30740_0 .net "b", 0 0, L_0xc82ac0; 1 drivers -v0xc307e0_0 .net "bcarryin", 0 0, L_0xc81cd0; 1 drivers -v0xc308d0_0 .alias "carryin", 0 0, v0xc33af0_0; -v0xc30970_0 .alias "carryout", 0 0, v0xc50850_0; -v0xc309f0_0 .net "invcarryout", 0 0, L_0xc82210; 1 drivers -v0xc30a90_0 .net "orall", 0 0, L_0xc82120; 1 drivers -v0xc30b30_0 .net "orpairintermediate", 0 0, L_0xc81dc0; 1 drivers -v0xc30bd0_0 .net "orsingleintermediate", 0 0, L_0xc82040; 1 drivers -v0xc30cf0_0 .net "sum", 0 0, L_0xc82790; 1 drivers -S_0xc2c6d0 .scope module, "adder6" "FullAdder4bit" 4 244, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc87b80/d .functor AND 1, L_0xc882c0, L_0xc88360, C4<1>, C4<1>; -L_0xc87b80 .delay (50000,50000,50000) L_0xc87b80/d; -L_0xc88400/d .functor NOR 1, L_0xc884a0, L_0xc88540, C4<0>, C4<0>; -L_0xc88400 .delay (50000,50000,50000) L_0xc88400/d; -L_0xc88670/d .functor AND 1, L_0xc88760, L_0xc88800, C4<1>, C4<1>; -L_0xc88670 .delay (50000,50000,50000) L_0xc88670/d; -L_0xc885e0/d .functor NOR 1, L_0xc88a20, L_0xc88bd0, C4<0>, C4<0>; -L_0xc885e0 .delay (50000,50000,50000) L_0xc885e0/d; -L_0xc888f0/d .functor OR 1, L_0xc87b80, L_0xc88400, C4<0>, C4<0>; -L_0xc888f0 .delay (50000,50000,50000) L_0xc888f0/d; -L_0xc88e10/d .functor NOR 1, L_0xc88670, L_0xc885e0, C4<0>, C4<0>; -L_0xc88e10 .delay (50000,50000,50000) L_0xc88e10/d; -L_0xc88f50/d .functor AND 1, L_0xc888f0, L_0xc88e10, C4<1>, C4<1>; -L_0xc88f50 .delay (50000,50000,50000) L_0xc88f50/d; -v0xc2f280_0 .net *"_s25", 0 0, L_0xc882c0; 1 drivers -v0xc2f340_0 .net *"_s27", 0 0, L_0xc88360; 1 drivers -v0xc2f3e0_0 .net *"_s29", 0 0, L_0xc884a0; 1 drivers -v0xc2f480_0 .net *"_s31", 0 0, L_0xc88540; 1 drivers -v0xc2f500_0 .net *"_s33", 0 0, L_0xc88760; 1 drivers -v0xc2f5a0_0 .net *"_s35", 0 0, L_0xc88800; 1 drivers -v0xc2f640_0 .net *"_s37", 0 0, L_0xc88a20; 1 drivers -v0xc2f6e0_0 .net *"_s39", 0 0, L_0xc88bd0; 1 drivers -v0xc2f780_0 .net "a", 3 0, L_0xc89290; 1 drivers -v0xc2f820_0 .net "aandb", 0 0, L_0xc87b80; 1 drivers -v0xc2f8c0_0 .net "abandnoror", 0 0, L_0xc888f0; 1 drivers -v0xc2f960_0 .net "anorb", 0 0, L_0xc88400; 1 drivers -v0xc2fa00_0 .net "b", 3 0, L_0xc83c40; 1 drivers -v0xc2faa0_0 .net "bandsum", 0 0, L_0xc88670; 1 drivers -v0xc2fbc0_0 .net "bnorsum", 0 0, L_0xc885e0; 1 drivers -v0xc2fc60_0 .net "bsumandnornor", 0 0, L_0xc88e10; 1 drivers -v0xc2fb20_0 .alias "carryin", 0 0, v0xc50850_0; -v0xc2fd90_0 .alias "carryout", 0 0, v0xc504c0_0; -v0xc2fce0_0 .net "carryout1", 0 0, L_0xc84230; 1 drivers -v0xc2feb0_0 .net "carryout2", 0 0, L_0xc851a0; 1 drivers -v0xc2ffe0_0 .net "carryout3", 0 0, L_0xc86340; 1 drivers -v0xc30060_0 .alias "overflow", 0 0, v0xc4d580_0; -v0xc2ff30_0 .net8 "sum", 3 0, RS_0x7fb7ca184e48; 4 drivers -L_0xc84bd0 .part/pv L_0xc84b10, 0, 1, 4; -L_0xc84c90 .part L_0xc89290, 0, 1; -L_0xc84d30 .part L_0xc83c40, 0, 1; -L_0xc85c60 .part/pv L_0xc85b50, 1, 1, 4; -L_0xc85d50 .part L_0xc89290, 1, 1; -L_0xc85e40 .part L_0xc83c40, 1, 1; -L_0xc86e00 .part/pv L_0xc86cf0, 2, 1, 4; -L_0xc86ea0 .part L_0xc89290, 2, 1; -L_0xc86f90 .part L_0xc83c40, 2, 1; -L_0xc87e80 .part/pv L_0xc87d70, 3, 1, 4; -L_0xc87fb0 .part L_0xc89290, 3, 1; -L_0xc880e0 .part L_0xc83c40, 3, 1; -L_0xc882c0 .part L_0xc89290, 3, 1; -L_0xc88360 .part L_0xc83c40, 3, 1; -L_0xc884a0 .part L_0xc89290, 3, 1; -L_0xc88540 .part L_0xc83c40, 3, 1; -L_0xc88760 .part L_0xc83c40, 3, 1; -L_0xc88800 .part RS_0x7fb7ca184e48, 3, 1; -L_0xc88a20 .part L_0xc83c40, 3, 1; -L_0xc88bd0 .part RS_0x7fb7ca184e48, 3, 1; -S_0xc2e7f0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc2c6d0; - .timescale -9 -12; -L_0xc7eb70/d .functor AND 1, L_0xc84c90, L_0xc84d30, C4<1>, C4<1>; -L_0xc7eb70 .delay (50000,50000,50000) L_0xc7eb70/d; -L_0xc7ec10/d .functor AND 1, L_0xc84c90, L_0xc81f00, C4<1>, C4<1>; -L_0xc7ec10 .delay (50000,50000,50000) L_0xc7ec10/d; -L_0xc83f40/d .functor AND 1, L_0xc84d30, L_0xc81f00, C4<1>, C4<1>; -L_0xc83f40 .delay (50000,50000,50000) L_0xc83f40/d; -L_0xc840d0/d .functor OR 1, L_0xc7eb70, L_0xc7ec10, C4<0>, C4<0>; -L_0xc840d0 .delay (50000,50000,50000) L_0xc840d0/d; -L_0xc84230/d .functor OR 1, L_0xc840d0, L_0xc83f40, C4<0>, C4<0>; -L_0xc84230 .delay (50000,50000,50000) L_0xc84230/d; -L_0xc84390/d .functor OR 1, L_0xc84c90, L_0xc84d30, C4<0>, C4<0>; -L_0xc84390 .delay (50000,50000,50000) L_0xc84390/d; -L_0xc84490/d .functor OR 1, L_0xc84390, L_0xc81f00, C4<0>, C4<0>; -L_0xc84490 .delay (50000,50000,50000) L_0xc84490/d; -L_0xc845a0/d .functor NOT 1, L_0xc84230, C4<0>, C4<0>, C4<0>; -L_0xc845a0 .delay (50000,50000,50000) L_0xc845a0/d; -L_0xc846f0/d .functor AND 1, L_0xc845a0, L_0xc84490, C4<1>, C4<1>; -L_0xc846f0 .delay (50000,50000,50000) L_0xc846f0/d; -L_0xc84810/d .functor AND 1, L_0xc84c90, L_0xc84d30, C4<1>, C4<1>; -L_0xc84810 .delay (50000,50000,50000) L_0xc84810/d; -L_0xc84a50/d .functor AND 1, L_0xc84810, L_0xc81f00, C4<1>, C4<1>; -L_0xc84a50 .delay (50000,50000,50000) L_0xc84a50/d; -L_0xc84b10/d .functor OR 1, L_0xc846f0, L_0xc84a50, C4<0>, C4<0>; -L_0xc84b10 .delay (50000,50000,50000) L_0xc84b10/d; -v0xc2e8e0_0 .net "a", 0 0, L_0xc84c90; 1 drivers -v0xc2e9a0_0 .net "ab", 0 0, L_0xc7eb70; 1 drivers -v0xc2ea40_0 .net "acarryin", 0 0, L_0xc7ec10; 1 drivers -v0xc2eae0_0 .net "andall", 0 0, L_0xc84a50; 1 drivers -v0xc2eb60_0 .net "andsingleintermediate", 0 0, L_0xc84810; 1 drivers -v0xc2ec00_0 .net "andsumintermediate", 0 0, L_0xc846f0; 1 drivers -v0xc2eca0_0 .net "b", 0 0, L_0xc84d30; 1 drivers -v0xc2ed40_0 .net "bcarryin", 0 0, L_0xc83f40; 1 drivers -v0xc2ede0_0 .alias "carryin", 0 0, v0xc50850_0; -v0xc2ee80_0 .alias "carryout", 0 0, v0xc2fce0_0; -v0xc2ef00_0 .net "invcarryout", 0 0, L_0xc845a0; 1 drivers -v0xc2ef80_0 .net "orall", 0 0, L_0xc84490; 1 drivers -v0xc2f020_0 .net "orpairintermediate", 0 0, L_0xc840d0; 1 drivers -v0xc2f0c0_0 .net "orsingleintermediate", 0 0, L_0xc84390; 1 drivers -v0xc2f1e0_0 .net "sum", 0 0, L_0xc84b10; 1 drivers -S_0xc2dd60 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc2c6d0; - .timescale -9 -12; -L_0xc849f0/d .functor AND 1, L_0xc85d50, L_0xc85e40, C4<1>, C4<1>; -L_0xc849f0 .delay (50000,50000,50000) L_0xc849f0/d; -L_0xc84e60/d .functor AND 1, L_0xc85d50, L_0xc84230, C4<1>, C4<1>; -L_0xc84e60 .delay (50000,50000,50000) L_0xc84e60/d; -L_0xc84f50/d .functor AND 1, L_0xc85e40, L_0xc84230, C4<1>, C4<1>; -L_0xc84f50 .delay (50000,50000,50000) L_0xc84f50/d; -L_0xc85040/d .functor OR 1, L_0xc849f0, L_0xc84e60, C4<0>, C4<0>; -L_0xc85040 .delay (50000,50000,50000) L_0xc85040/d; -L_0xc851a0/d .functor OR 1, L_0xc85040, L_0xc84f50, C4<0>, C4<0>; -L_0xc851a0 .delay (50000,50000,50000) L_0xc851a0/d; -L_0xc85300/d .functor OR 1, L_0xc85d50, L_0xc85e40, C4<0>, C4<0>; -L_0xc85300 .delay (50000,50000,50000) L_0xc85300/d; -L_0xc85400/d .functor OR 1, L_0xc85300, L_0xc84230, C4<0>, C4<0>; -L_0xc85400 .delay (50000,50000,50000) L_0xc85400/d; -L_0xc85510/d .functor NOT 1, L_0xc851a0, C4<0>, C4<0>, C4<0>; -L_0xc85510 .delay (50000,50000,50000) L_0xc85510/d; -L_0xc85660/d .functor AND 1, L_0xc85510, L_0xc85400, C4<1>, C4<1>; -L_0xc85660 .delay (50000,50000,50000) L_0xc85660/d; -L_0xc85780/d .functor AND 1, L_0xc85d50, L_0xc85e40, C4<1>, C4<1>; -L_0xc85780 .delay (50000,50000,50000) L_0xc85780/d; -L_0xc859c0/d .functor AND 1, L_0xc85780, L_0xc84230, C4<1>, C4<1>; -L_0xc859c0 .delay (50000,50000,50000) L_0xc859c0/d; -L_0xc85b50/d .functor OR 1, L_0xc85660, L_0xc859c0, C4<0>, C4<0>; -L_0xc85b50 .delay (50000,50000,50000) L_0xc85b50/d; -v0xc2de50_0 .net "a", 0 0, L_0xc85d50; 1 drivers -v0xc2df10_0 .net "ab", 0 0, L_0xc849f0; 1 drivers -v0xc2dfb0_0 .net "acarryin", 0 0, L_0xc84e60; 1 drivers -v0xc2e050_0 .net "andall", 0 0, L_0xc859c0; 1 drivers -v0xc2e0d0_0 .net "andsingleintermediate", 0 0, L_0xc85780; 1 drivers -v0xc2e170_0 .net "andsumintermediate", 0 0, L_0xc85660; 1 drivers -v0xc2e210_0 .net "b", 0 0, L_0xc85e40; 1 drivers -v0xc2e2b0_0 .net "bcarryin", 0 0, L_0xc84f50; 1 drivers -v0xc2e350_0 .alias "carryin", 0 0, v0xc2fce0_0; -v0xc2e3f0_0 .alias "carryout", 0 0, v0xc2feb0_0; -v0xc2e470_0 .net "invcarryout", 0 0, L_0xc85510; 1 drivers -v0xc2e4f0_0 .net "orall", 0 0, L_0xc85400; 1 drivers -v0xc2e590_0 .net "orpairintermediate", 0 0, L_0xc85040; 1 drivers -v0xc2e630_0 .net "orsingleintermediate", 0 0, L_0xc85300; 1 drivers -v0xc2e750_0 .net "sum", 0 0, L_0xc85b50; 1 drivers -S_0xc2d280 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc2c6d0; - .timescale -9 -12; -L_0xc85960/d .functor AND 1, L_0xc86ea0, L_0xc86f90, C4<1>, C4<1>; -L_0xc85960 .delay (50000,50000,50000) L_0xc85960/d; -L_0xc86000/d .functor AND 1, L_0xc86ea0, L_0xc851a0, C4<1>, C4<1>; -L_0xc86000 .delay (50000,50000,50000) L_0xc86000/d; -L_0xc860f0/d .functor AND 1, L_0xc86f90, L_0xc851a0, C4<1>, C4<1>; -L_0xc860f0 .delay (50000,50000,50000) L_0xc860f0/d; -L_0xc861e0/d .functor OR 1, L_0xc85960, L_0xc86000, C4<0>, C4<0>; -L_0xc861e0 .delay (50000,50000,50000) L_0xc861e0/d; -L_0xc86340/d .functor OR 1, L_0xc861e0, L_0xc860f0, C4<0>, C4<0>; -L_0xc86340 .delay (50000,50000,50000) L_0xc86340/d; -L_0xc864a0/d .functor OR 1, L_0xc86ea0, L_0xc86f90, C4<0>, C4<0>; -L_0xc864a0 .delay (50000,50000,50000) L_0xc864a0/d; -L_0xc865a0/d .functor OR 1, L_0xc864a0, L_0xc851a0, C4<0>, C4<0>; -L_0xc865a0 .delay (50000,50000,50000) L_0xc865a0/d; -L_0xc866b0/d .functor NOT 1, L_0xc86340, C4<0>, C4<0>, C4<0>; -L_0xc866b0 .delay (50000,50000,50000) L_0xc866b0/d; -L_0xc86800/d .functor AND 1, L_0xc866b0, L_0xc865a0, C4<1>, C4<1>; -L_0xc86800 .delay (50000,50000,50000) L_0xc86800/d; -L_0xc86920/d .functor AND 1, L_0xc86ea0, L_0xc86f90, C4<1>, C4<1>; -L_0xc86920 .delay (50000,50000,50000) L_0xc86920/d; -L_0xc86b60/d .functor AND 1, L_0xc86920, L_0xc851a0, C4<1>, C4<1>; -L_0xc86b60 .delay (50000,50000,50000) L_0xc86b60/d; -L_0xc86cf0/d .functor OR 1, L_0xc86800, L_0xc86b60, C4<0>, C4<0>; -L_0xc86cf0 .delay (50000,50000,50000) L_0xc86cf0/d; -v0xc2d370_0 .net "a", 0 0, L_0xc86ea0; 1 drivers -v0xc2d430_0 .net "ab", 0 0, L_0xc85960; 1 drivers -v0xc2d4d0_0 .net "acarryin", 0 0, L_0xc86000; 1 drivers -v0xc2d570_0 .net "andall", 0 0, L_0xc86b60; 1 drivers -v0xc2d5f0_0 .net "andsingleintermediate", 0 0, L_0xc86920; 1 drivers -v0xc2d690_0 .net "andsumintermediate", 0 0, L_0xc86800; 1 drivers -v0xc2d730_0 .net "b", 0 0, L_0xc86f90; 1 drivers -v0xc2d7d0_0 .net "bcarryin", 0 0, L_0xc860f0; 1 drivers -v0xc2d8c0_0 .alias "carryin", 0 0, v0xc2feb0_0; -v0xc2d960_0 .alias "carryout", 0 0, v0xc2ffe0_0; -v0xc2d9e0_0 .net "invcarryout", 0 0, L_0xc866b0; 1 drivers -v0xc2da60_0 .net "orall", 0 0, L_0xc865a0; 1 drivers -v0xc2db00_0 .net "orpairintermediate", 0 0, L_0xc861e0; 1 drivers -v0xc2dba0_0 .net "orsingleintermediate", 0 0, L_0xc864a0; 1 drivers -v0xc2dcc0_0 .net "sum", 0 0, L_0xc86cf0; 1 drivers -S_0xc2c7c0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc2c6d0; - .timescale -9 -12; -L_0xc86b00/d .functor AND 1, L_0xc87fb0, L_0xc880e0, C4<1>, C4<1>; -L_0xc86b00 .delay (50000,50000,50000) L_0xc86b00/d; -L_0xc87080/d .functor AND 1, L_0xc87fb0, L_0xc86340, C4<1>, C4<1>; -L_0xc87080 .delay (50000,50000,50000) L_0xc87080/d; -L_0xc87190/d .functor AND 1, L_0xc880e0, L_0xc86340, C4<1>, C4<1>; -L_0xc87190 .delay (50000,50000,50000) L_0xc87190/d; -L_0xc872a0/d .functor OR 1, L_0xc86b00, L_0xc87080, C4<0>, C4<0>; -L_0xc872a0 .delay (50000,50000,50000) L_0xc872a0/d; -L_0xc87400/d .functor OR 1, L_0xc872a0, L_0xc87190, C4<0>, C4<0>; -L_0xc87400 .delay (50000,50000,50000) L_0xc87400/d; -L_0xc87560/d .functor OR 1, L_0xc87fb0, L_0xc880e0, C4<0>, C4<0>; -L_0xc87560 .delay (50000,50000,50000) L_0xc87560/d; -L_0xc87660/d .functor OR 1, L_0xc87560, L_0xc86340, C4<0>, C4<0>; -L_0xc87660 .delay (50000,50000,50000) L_0xc87660/d; -L_0xc87770/d .functor NOT 1, L_0xc87400, C4<0>, C4<0>, C4<0>; -L_0xc87770 .delay (50000,50000,50000) L_0xc87770/d; -L_0xc87830/d .functor AND 1, L_0xc87770, L_0xc87660, C4<1>, C4<1>; -L_0xc87830 .delay (50000,50000,50000) L_0xc87830/d; -L_0xc879a0/d .functor AND 1, L_0xc87fb0, L_0xc880e0, C4<1>, C4<1>; -L_0xc879a0 .delay (50000,50000,50000) L_0xc879a0/d; -L_0xc87be0/d .functor AND 1, L_0xc879a0, L_0xc86340, C4<1>, C4<1>; -L_0xc87be0 .delay (50000,50000,50000) L_0xc87be0/d; -L_0xc87d70/d .functor OR 1, L_0xc87830, L_0xc87be0, C4<0>, C4<0>; -L_0xc87d70 .delay (50000,50000,50000) L_0xc87d70/d; -v0xc2c8b0_0 .net "a", 0 0, L_0xc87fb0; 1 drivers -v0xc2c930_0 .net "ab", 0 0, L_0xc86b00; 1 drivers -v0xc2c9d0_0 .net "acarryin", 0 0, L_0xc87080; 1 drivers -v0xc2ca70_0 .net "andall", 0 0, L_0xc87be0; 1 drivers -v0xc2caf0_0 .net "andsingleintermediate", 0 0, L_0xc879a0; 1 drivers -v0xc2cb90_0 .net "andsumintermediate", 0 0, L_0xc87830; 1 drivers -v0xc2cc30_0 .net "b", 0 0, L_0xc880e0; 1 drivers -v0xc2ccd0_0 .net "bcarryin", 0 0, L_0xc87190; 1 drivers -v0xc2cdc0_0 .alias "carryin", 0 0, v0xc2ffe0_0; -v0xc2ce60_0 .alias "carryout", 0 0, v0xc504c0_0; -v0xc2cee0_0 .net "invcarryout", 0 0, L_0xc87770; 1 drivers -v0xc2cf80_0 .net "orall", 0 0, L_0xc87660; 1 drivers -v0xc2d020_0 .net "orpairintermediate", 0 0, L_0xc872a0; 1 drivers -v0xc2d0c0_0 .net "orsingleintermediate", 0 0, L_0xc87560; 1 drivers -v0xc2d1e0_0 .net "sum", 0 0, L_0xc87d70; 1 drivers -S_0xc28af0 .scope module, "adder7" "FullAdder4bit" 4 245, 2 47, S_0xc28a00; - .timescale -9 -12; -L_0xc8d180/d .functor AND 1, L_0xc8d8c0, L_0xc8d960, C4<1>, C4<1>; -L_0xc8d180 .delay (50000,50000,50000) L_0xc8d180/d; -L_0xc8da00/d .functor NOR 1, L_0xc8daa0, L_0xc8db40, C4<0>, C4<0>; -L_0xc8da00 .delay (50000,50000,50000) L_0xc8da00/d; -L_0xc8dc70/d .functor AND 1, L_0xc8dd60, L_0xc8de00, C4<1>, C4<1>; -L_0xc8dc70 .delay (50000,50000,50000) L_0xc8dc70/d; -L_0xc8dbe0/d .functor NOR 1, L_0xc8e020, L_0xc8e1d0, C4<0>, C4<0>; -L_0xc8dbe0 .delay (50000,50000,50000) L_0xc8dbe0/d; -L_0xc8def0/d .functor OR 1, L_0xc8d180, L_0xc8da00, C4<0>, C4<0>; -L_0xc8def0 .delay (50000,50000,50000) L_0xc8def0/d; -L_0xc8e410/d .functor NOR 1, L_0xc8dc70, L_0xc8dbe0, C4<0>, C4<0>; -L_0xc8e410 .delay (50000,50000,50000) L_0xc8e410/d; -L_0xc8e550/d .functor AND 1, L_0xc8def0, L_0xc8e410, C4<1>, C4<1>; -L_0xc8e550 .delay (50000,50000,50000) L_0xc8e550/d; -v0xc2b730_0 .net *"_s25", 0 0, L_0xc8d8c0; 1 drivers -v0xc2b7f0_0 .net *"_s27", 0 0, L_0xc8d960; 1 drivers -v0xc2b890_0 .net *"_s29", 0 0, L_0xc8daa0; 1 drivers -v0xc2b930_0 .net *"_s31", 0 0, L_0xc8db40; 1 drivers -v0xc2b9e0_0 .net *"_s33", 0 0, L_0xc8dd60; 1 drivers -v0xc2ba80_0 .net *"_s35", 0 0, L_0xc8de00; 1 drivers -v0xc2bb20_0 .net *"_s37", 0 0, L_0xc8e020; 1 drivers -v0xc2bbc0_0 .net *"_s39", 0 0, L_0xc8e1d0; 1 drivers -v0xc2bc60_0 .net "a", 3 0, L_0xc89440; 1 drivers -v0xc2bd00_0 .net "aandb", 0 0, L_0xc8d180; 1 drivers -v0xc2bda0_0 .net "abandnoror", 0 0, L_0xc8def0; 1 drivers -v0xc2be40_0 .net "anorb", 0 0, L_0xc8da00; 1 drivers -v0xc2bee0_0 .net "b", 3 0, L_0xc894e0; 1 drivers -v0xc2bf80_0 .net "bandsum", 0 0, L_0xc8dc70; 1 drivers -v0xc2c0a0_0 .net "bnorsum", 0 0, L_0xc8dbe0; 1 drivers -v0xc2c140_0 .net "bsumandnornor", 0 0, L_0xc8e410; 1 drivers -v0xc2c000_0 .alias "carryin", 0 0, v0xc504c0_0; -v0xc2c270_0 .alias "carryout", 0 0, v0xc51030_0; -v0xc2c390_0 .net "carryout1", 0 0, L_0xc89860; 1 drivers -v0xc2c410_0 .net "carryout2", 0 0, L_0xc8a790; 1 drivers -v0xc2c2f0_0 .net "carryout3", 0 0, L_0xc8b920; 1 drivers -v0xc2c590_0 .alias "overflow", 0 0, v0xc510b0_0; -v0xc2c490_0 .net8 "sum", 3 0, RS_0x7fb7ca184068; 4 drivers -L_0xc8a1e0 .part/pv L_0xc8a120, 0, 1, 4; -L_0xc8a280 .part L_0xc89440, 0, 1; -L_0xc8a320 .part L_0xc894e0, 0, 1; -L_0xc8b240 .part/pv L_0xc8b130, 1, 1, 4; -L_0xc8b330 .part L_0xc89440, 1, 1; -L_0xc8b420 .part L_0xc894e0, 1, 1; -L_0xc8c3e0 .part/pv L_0xc8c2d0, 2, 1, 4; -L_0xc8c480 .part L_0xc89440, 2, 1; -L_0xc8c570 .part L_0xc894e0, 2, 1; -L_0xc8d480 .part/pv L_0xc8d370, 3, 1, 4; -L_0xc8d5b0 .part L_0xc89440, 3, 1; -L_0xc8d6e0 .part L_0xc894e0, 3, 1; -L_0xc8d8c0 .part L_0xc89440, 3, 1; -L_0xc8d960 .part L_0xc894e0, 3, 1; -L_0xc8daa0 .part L_0xc89440, 3, 1; -L_0xc8db40 .part L_0xc894e0, 3, 1; -L_0xc8dd60 .part L_0xc894e0, 3, 1; -L_0xc8de00 .part RS_0x7fb7ca184068, 3, 1; -L_0xc8e020 .part L_0xc894e0, 3, 1; -L_0xc8e1d0 .part RS_0x7fb7ca184068, 3, 1; -S_0xc2ac70 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0xc28af0; - .timescale -9 -12; -L_0xc83ce0/d .functor AND 1, L_0xc8a280, L_0xc8a320, C4<1>, C4<1>; -L_0xc83ce0 .delay (50000,50000,50000) L_0xc83ce0/d; -L_0xc83d80/d .functor AND 1, L_0xc8a280, L_0xc87400, C4<1>, C4<1>; -L_0xc83d80 .delay (50000,50000,50000) L_0xc83d80/d; -L_0xc83e70/d .functor AND 1, L_0xc8a320, L_0xc87400, C4<1>, C4<1>; -L_0xc83e70 .delay (50000,50000,50000) L_0xc83e70/d; -L_0xc74090/d .functor OR 1, L_0xc83ce0, L_0xc83d80, C4<0>, C4<0>; -L_0xc74090 .delay (50000,50000,50000) L_0xc74090/d; -L_0xc89860/d .functor OR 1, L_0xc74090, L_0xc83e70, C4<0>, C4<0>; -L_0xc89860 .delay (50000,50000,50000) L_0xc89860/d; -L_0xc899a0/d .functor OR 1, L_0xc8a280, L_0xc8a320, C4<0>, C4<0>; -L_0xc899a0 .delay (50000,50000,50000) L_0xc899a0/d; -L_0xc89aa0/d .functor OR 1, L_0xc899a0, L_0xc87400, C4<0>, C4<0>; -L_0xc89aa0 .delay (50000,50000,50000) L_0xc89aa0/d; -L_0xc89bb0/d .functor NOT 1, L_0xc89860, C4<0>, C4<0>, C4<0>; -L_0xc89bb0 .delay (50000,50000,50000) L_0xc89bb0/d; -L_0xc89d00/d .functor AND 1, L_0xc89bb0, L_0xc89aa0, C4<1>, C4<1>; -L_0xc89d00 .delay (50000,50000,50000) L_0xc89d00/d; -L_0xc89e20/d .functor AND 1, L_0xc8a280, L_0xc8a320, C4<1>, C4<1>; -L_0xc89e20 .delay (50000,50000,50000) L_0xc89e20/d; -L_0xc8a060/d .functor AND 1, L_0xc89e20, L_0xc87400, C4<1>, C4<1>; -L_0xc8a060 .delay (50000,50000,50000) L_0xc8a060/d; -L_0xc8a120/d .functor OR 1, L_0xc89d00, L_0xc8a060, C4<0>, C4<0>; -L_0xc8a120 .delay (50000,50000,50000) L_0xc8a120/d; -v0xc2ad60_0 .net "a", 0 0, L_0xc8a280; 1 drivers -v0xc2ae20_0 .net "ab", 0 0, L_0xc83ce0; 1 drivers -v0xc2aec0_0 .net "acarryin", 0 0, L_0xc83d80; 1 drivers -v0xc2af60_0 .net "andall", 0 0, L_0xc8a060; 1 drivers -v0xc2b010_0 .net "andsingleintermediate", 0 0, L_0xc89e20; 1 drivers -v0xc2b0b0_0 .net "andsumintermediate", 0 0, L_0xc89d00; 1 drivers -v0xc2b150_0 .net "b", 0 0, L_0xc8a320; 1 drivers -v0xc2b1f0_0 .net "bcarryin", 0 0, L_0xc83e70; 1 drivers -v0xc2b290_0 .alias "carryin", 0 0, v0xc504c0_0; -v0xc2b330_0 .alias "carryout", 0 0, v0xc2c390_0; -v0xc2b3b0_0 .net "invcarryout", 0 0, L_0xc89bb0; 1 drivers -v0xc2b430_0 .net "orall", 0 0, L_0xc89aa0; 1 drivers -v0xc2b4d0_0 .net "orpairintermediate", 0 0, L_0xc74090; 1 drivers -v0xc2b570_0 .net "orsingleintermediate", 0 0, L_0xc899a0; 1 drivers -v0xc2b690_0 .net "sum", 0 0, L_0xc8a120; 1 drivers -S_0xc2a1b0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0xc28af0; - .timescale -9 -12; -L_0xc8a000/d .functor AND 1, L_0xc8b330, L_0xc8b420, C4<1>, C4<1>; -L_0xc8a000 .delay (50000,50000,50000) L_0xc8a000/d; -L_0xc8a450/d .functor AND 1, L_0xc8b330, L_0xc89860, C4<1>, C4<1>; -L_0xc8a450 .delay (50000,50000,50000) L_0xc8a450/d; -L_0xc8a540/d .functor AND 1, L_0xc8b420, L_0xc89860, C4<1>, C4<1>; -L_0xc8a540 .delay (50000,50000,50000) L_0xc8a540/d; -L_0xc8a630/d .functor OR 1, L_0xc8a000, L_0xc8a450, C4<0>, C4<0>; -L_0xc8a630 .delay (50000,50000,50000) L_0xc8a630/d; -L_0xc8a790/d .functor OR 1, L_0xc8a630, L_0xc8a540, C4<0>, C4<0>; -L_0xc8a790 .delay (50000,50000,50000) L_0xc8a790/d; -L_0xc8a8f0/d .functor OR 1, L_0xc8b330, L_0xc8b420, C4<0>, C4<0>; -L_0xc8a8f0 .delay (50000,50000,50000) L_0xc8a8f0/d; -L_0xc8a9f0/d .functor OR 1, L_0xc8a8f0, L_0xc89860, C4<0>, C4<0>; -L_0xc8a9f0 .delay (50000,50000,50000) L_0xc8a9f0/d; -L_0xc8ab00/d .functor NOT 1, L_0xc8a790, C4<0>, C4<0>, C4<0>; -L_0xc8ab00 .delay (50000,50000,50000) L_0xc8ab00/d; -L_0xc2c1f0/d .functor AND 1, L_0xc8ab00, L_0xc8a9f0, C4<1>, C4<1>; -L_0xc2c1f0 .delay (50000,50000,50000) L_0xc2c1f0/d; -L_0xc8ad60/d .functor AND 1, L_0xc8b330, L_0xc8b420, C4<1>, C4<1>; -L_0xc8ad60 .delay (50000,50000,50000) L_0xc8ad60/d; -L_0xc8afa0/d .functor AND 1, L_0xc8ad60, L_0xc89860, C4<1>, C4<1>; -L_0xc8afa0 .delay (50000,50000,50000) L_0xc8afa0/d; -L_0xc8b130/d .functor OR 1, L_0xc2c1f0, L_0xc8afa0, C4<0>, C4<0>; -L_0xc8b130 .delay (50000,50000,50000) L_0xc8b130/d; -v0xc2a2a0_0 .net "a", 0 0, L_0xc8b330; 1 drivers -v0xc2a360_0 .net "ab", 0 0, L_0xc8a000; 1 drivers -v0xc2a400_0 .net "acarryin", 0 0, L_0xc8a450; 1 drivers -v0xc2a4a0_0 .net "andall", 0 0, L_0xc8afa0; 1 drivers -v0xc2a550_0 .net "andsingleintermediate", 0 0, L_0xc8ad60; 1 drivers -v0xc2a5f0_0 .net "andsumintermediate", 0 0, L_0xc2c1f0; 1 drivers -v0xc2a690_0 .net "b", 0 0, L_0xc8b420; 1 drivers -v0xc2a730_0 .net "bcarryin", 0 0, L_0xc8a540; 1 drivers -v0xc2a7d0_0 .alias "carryin", 0 0, v0xc2c390_0; -v0xc2a870_0 .alias "carryout", 0 0, v0xc2c410_0; -v0xc2a8f0_0 .net "invcarryout", 0 0, L_0xc8ab00; 1 drivers -v0xc2a970_0 .net "orall", 0 0, L_0xc8a9f0; 1 drivers -v0xc2aa10_0 .net "orpairintermediate", 0 0, L_0xc8a630; 1 drivers -v0xc2aab0_0 .net "orsingleintermediate", 0 0, L_0xc8a8f0; 1 drivers -v0xc2abd0_0 .net "sum", 0 0, L_0xc8b130; 1 drivers -S_0xc29720 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0xc28af0; - .timescale -9 -12; -L_0xc8af40/d .functor AND 1, L_0xc8c480, L_0xc8c570, C4<1>, C4<1>; -L_0xc8af40 .delay (50000,50000,50000) L_0xc8af40/d; -L_0xc8b5e0/d .functor AND 1, L_0xc8c480, L_0xc8a790, C4<1>, C4<1>; -L_0xc8b5e0 .delay (50000,50000,50000) L_0xc8b5e0/d; -L_0xc8b6d0/d .functor AND 1, L_0xc8c570, L_0xc8a790, C4<1>, C4<1>; -L_0xc8b6d0 .delay (50000,50000,50000) L_0xc8b6d0/d; -L_0xc8b7c0/d .functor OR 1, L_0xc8af40, L_0xc8b5e0, C4<0>, C4<0>; -L_0xc8b7c0 .delay (50000,50000,50000) L_0xc8b7c0/d; -L_0xc8b920/d .functor OR 1, L_0xc8b7c0, L_0xc8b6d0, C4<0>, C4<0>; -L_0xc8b920 .delay (50000,50000,50000) L_0xc8b920/d; -L_0xc8ba80/d .functor OR 1, L_0xc8c480, L_0xc8c570, C4<0>, C4<0>; -L_0xc8ba80 .delay (50000,50000,50000) L_0xc8ba80/d; -L_0xc8bb80/d .functor OR 1, L_0xc8ba80, L_0xc8a790, C4<0>, C4<0>; -L_0xc8bb80 .delay (50000,50000,50000) L_0xc8bb80/d; -L_0xc8bc90/d .functor NOT 1, L_0xc8b920, C4<0>, C4<0>, C4<0>; -L_0xc8bc90 .delay (50000,50000,50000) L_0xc8bc90/d; -L_0xc8bde0/d .functor AND 1, L_0xc8bc90, L_0xc8bb80, C4<1>, C4<1>; -L_0xc8bde0 .delay (50000,50000,50000) L_0xc8bde0/d; -L_0xc8bf00/d .functor AND 1, L_0xc8c480, L_0xc8c570, C4<1>, C4<1>; -L_0xc8bf00 .delay (50000,50000,50000) L_0xc8bf00/d; -L_0xc8c140/d .functor AND 1, L_0xc8bf00, L_0xc8a790, C4<1>, C4<1>; -L_0xc8c140 .delay (50000,50000,50000) L_0xc8c140/d; -L_0xc8c2d0/d .functor OR 1, L_0xc8bde0, L_0xc8c140, C4<0>, C4<0>; -L_0xc8c2d0 .delay (50000,50000,50000) L_0xc8c2d0/d; -v0xc29810_0 .net "a", 0 0, L_0xc8c480; 1 drivers -v0xc298d0_0 .net "ab", 0 0, L_0xc8af40; 1 drivers -v0xc29970_0 .net "acarryin", 0 0, L_0xc8b5e0; 1 drivers -v0xc29a10_0 .net "andall", 0 0, L_0xc8c140; 1 drivers -v0xc29a90_0 .net "andsingleintermediate", 0 0, L_0xc8bf00; 1 drivers -v0xc29b30_0 .net "andsumintermediate", 0 0, L_0xc8bde0; 1 drivers -v0xc29bd0_0 .net "b", 0 0, L_0xc8c570; 1 drivers -v0xc29c70_0 .net "bcarryin", 0 0, L_0xc8b6d0; 1 drivers -v0xc29d10_0 .alias "carryin", 0 0, v0xc2c410_0; -v0xc29db0_0 .alias "carryout", 0 0, v0xc2c2f0_0; -v0xc29e30_0 .net "invcarryout", 0 0, L_0xc8bc90; 1 drivers -v0xc29eb0_0 .net "orall", 0 0, L_0xc8bb80; 1 drivers -v0xc29f50_0 .net "orpairintermediate", 0 0, L_0xc8b7c0; 1 drivers -v0xc29ff0_0 .net "orsingleintermediate", 0 0, L_0xc8ba80; 1 drivers -v0xc2a110_0 .net "sum", 0 0, L_0xc8c2d0; 1 drivers -S_0xc28be0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0xc28af0; - .timescale -9 -12; -L_0xc8c0e0/d .functor AND 1, L_0xc8d5b0, L_0xc8d6e0, C4<1>, C4<1>; -L_0xc8c0e0 .delay (50000,50000,50000) L_0xc8c0e0/d; -L_0xc8c660/d .functor AND 1, L_0xc8d5b0, L_0xc8b920, C4<1>, C4<1>; -L_0xc8c660 .delay (50000,50000,50000) L_0xc8c660/d; -L_0xc8c750/d .functor AND 1, L_0xc8d6e0, L_0xc8b920, C4<1>, C4<1>; -L_0xc8c750 .delay (50000,50000,50000) L_0xc8c750/d; -L_0xc8c860/d .functor OR 1, L_0xc8c0e0, L_0xc8c660, C4<0>, C4<0>; -L_0xc8c860 .delay (50000,50000,50000) L_0xc8c860/d; -L_0xc8c9c0/d .functor OR 1, L_0xc8c860, L_0xc8c750, C4<0>, C4<0>; -L_0xc8c9c0 .delay (50000,50000,50000) L_0xc8c9c0/d; -L_0xc8cb60/d .functor OR 1, L_0xc8d5b0, L_0xc8d6e0, C4<0>, C4<0>; -L_0xc8cb60 .delay (50000,50000,50000) L_0xc8cb60/d; -L_0xc8cc60/d .functor OR 1, L_0xc8cb60, L_0xc8b920, C4<0>, C4<0>; -L_0xc8cc60 .delay (50000,50000,50000) L_0xc8cc60/d; -L_0xc8cd70/d .functor NOT 1, L_0xc8c9c0, C4<0>, C4<0>, C4<0>; -L_0xc8cd70 .delay (50000,50000,50000) L_0xc8cd70/d; -L_0xc8ce30/d .functor AND 1, L_0xc8cd70, L_0xc8cc60, C4<1>, C4<1>; -L_0xc8ce30 .delay (50000,50000,50000) L_0xc8ce30/d; -L_0xc8cfa0/d .functor AND 1, L_0xc8d5b0, L_0xc8d6e0, C4<1>, C4<1>; -L_0xc8cfa0 .delay (50000,50000,50000) L_0xc8cfa0/d; -L_0xc8d1e0/d .functor AND 1, L_0xc8cfa0, L_0xc8b920, C4<1>, C4<1>; -L_0xc8d1e0 .delay (50000,50000,50000) L_0xc8d1e0/d; -L_0xc8d370/d .functor OR 1, L_0xc8ce30, L_0xc8d1e0, C4<0>, C4<0>; -L_0xc8d370 .delay (50000,50000,50000) L_0xc8d370/d; -v0xc28cd0_0 .net "a", 0 0, L_0xc8d5b0; 1 drivers -v0xc28d90_0 .net "ab", 0 0, L_0xc8c0e0; 1 drivers -v0xc28e30_0 .net "acarryin", 0 0, L_0xc8c660; 1 drivers -v0xc28ed0_0 .net "andall", 0 0, L_0xc8d1e0; 1 drivers -v0xc28f50_0 .net "andsingleintermediate", 0 0, L_0xc8cfa0; 1 drivers -v0xc28ff0_0 .net "andsumintermediate", 0 0, L_0xc8ce30; 1 drivers -v0xc29090_0 .net "b", 0 0, L_0xc8d6e0; 1 drivers -v0xc29130_0 .net "bcarryin", 0 0, L_0xc8c750; 1 drivers -v0xc291d0_0 .alias "carryin", 0 0, v0xc2c2f0_0; -v0xc29270_0 .alias "carryout", 0 0, v0xc51030_0; -v0xc29310_0 .net "invcarryout", 0 0, L_0xc8cd70; 1 drivers -v0xc293b0_0 .net "orall", 0 0, L_0xc8cc60; 1 drivers -v0xc294c0_0 .net "orpairintermediate", 0 0, L_0xc8c860; 1 drivers -v0xc29560_0 .net "orsingleintermediate", 0 0, L_0xc8cb60; 1 drivers -v0xc29680_0 .net "sum", 0 0, L_0xc8d370; 1 drivers - .scope S_0xbe1330; -T_0 ; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 18 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 21 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 24 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 27 "$display", "%b %b %b | %b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 30 "$display", "%b %b %b | %b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 33 "$display", "%b %b %b | \011%b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %ix/load 0, 31, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50a30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50a30_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50f30_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50f30_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xc50fb0_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 36 "$display", "%b %b %b | %b %b %b | ", v0xc50a30_0, v0xc50f30_0, v0xc50fb0_0, v0xc50ae0_0, v0xc51030_0, v0xc510b0_0; - %end; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 5; - "N/A"; - ""; - "./adder.v"; - "adder_subtracter.t.v"; - "./adder_subtracter.v"; From ea321657c8afbb565c8127f0cf7824a8109ce4ff Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:04:46 -0400 Subject: [PATCH 14/38] Delete and_32bit --- and_32bit | 1073 ----------------------------------------------------- 1 file changed, 1073 deletions(-) delete mode 100755 and_32bit diff --git a/and_32bit b/and_32bit deleted file mode 100755 index 5cf0c8c..0000000 --- a/and_32bit +++ /dev/null @@ -1,1073 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "0.9.7 " "(v0_9_7)"; -:vpi_time_precision - 12; -:vpi_module "system"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0xe5a730 .scope module, "test32bitand" "test32bitand" 2 4; - .timescale -9 -12; -v0xf1b620_0 .var "a", 31 0; -RS_0x7fece1d8c278/0/0 .resolv tri, L_0xf1b800, L_0xf1bba0, L_0xf1bf50, L_0xf1c420; -RS_0x7fece1d8c278/0/4 .resolv tri, L_0xf1c710, L_0xf1caa0, L_0xf1cf80, L_0xf1d4f0; -RS_0x7fece1d8c278/0/8 .resolv tri, L_0xf1d590, L_0xf1dbc0, L_0xf1dc60, L_0xf1e320; -RS_0x7fece1d8c278/0/12 .resolv tri, L_0xf1e3c0, L_0xf1ea60, L_0xf1eb00, L_0xf1d3e0; -RS_0x7fece1d8c278/0/16 .resolv tri, L_0xf1f6e0, L_0xf1f9f0, L_0xf1fb80, L_0xf20140; -RS_0x7fece1d8c278/0/20 .resolv tri, L_0xf20300, L_0xf20850, L_0xf209f0, L_0xf20f80; -RS_0x7fece1d8c278/0/24 .resolv tri, L_0xf21150, L_0xf21720, L_0xf21920, L_0xf21ea0; -RS_0x7fece1d8c278/0/28 .resolv tri, L_0xf220d0, L_0xf228b0, L_0xf22c30, L_0xf22a40; -RS_0x7fece1d8c278/1/0 .resolv tri, RS_0x7fece1d8c278/0/0, RS_0x7fece1d8c278/0/4, RS_0x7fece1d8c278/0/8, RS_0x7fece1d8c278/0/12; -RS_0x7fece1d8c278/1/4 .resolv tri, RS_0x7fece1d8c278/0/16, RS_0x7fece1d8c278/0/20, RS_0x7fece1d8c278/0/24, RS_0x7fece1d8c278/0/28; -RS_0x7fece1d8c278 .resolv tri, RS_0x7fece1d8c278/1/0, RS_0x7fece1d8c278/1/4, C4, C4; -v0xf1b6a0_0 .net8 "ans", 31 0, RS_0x7fece1d8c278; 32 drivers -v0xf1b750_0 .var "b", 31 0; -S_0xe5a820 .scope module, "and32" "and_32bit" 2 9, 3 1, S_0xe5a730; - .timescale -9 -12; -L_0xf179e0/d .functor AND 1, L_0xf1b970, L_0xf1ba60, C4<1>, C4<1>; -L_0xf179e0 .delay (10000,10000,10000) L_0xf179e0/d; -L_0xf1bc40/d .functor AND 1, L_0xf1bd80, L_0xf1be20, C4<1>, C4<1>; -L_0xf1bc40 .delay (10000,10000,10000) L_0xf1bc40/d; -L_0xf1c080/d .functor AND 1, L_0xf1c170, L_0xf1c2a0, C4<1>, C4<1>; -L_0xf1c080 .delay (10000,10000,10000) L_0xf1c080/d; -L_0xf1c520/d .functor AND 1, L_0xf1c580, L_0xf1c620, C4<1>, C4<1>; -L_0xf1c520 .delay (10000,10000,10000) L_0xf1c520/d; -L_0xf1c4c0/d .functor AND 1, L_0xf1c890, L_0xf1c9b0, C4<1>, C4<1>; -L_0xf1c4c0 .delay (10000,10000,10000) L_0xf1c4c0/d; -L_0xf1cbd0/d .functor AND 1, L_0xf1cd50, L_0xf1cdf0, C4<1>, C4<1>; -L_0xf1cbd0 .delay (10000,10000,10000) L_0xf1cbd0/d; -L_0xf1cb40/d .functor AND 1, L_0xf1d180, L_0xf1cee0, C4<1>, C4<1>; -L_0xf1cb40 .delay (10000,10000,10000) L_0xf1cb40/d; -L_0xf1c390/d .functor AND 1, L_0xf1d6a0, L_0xf1d790, C4<1>, C4<1>; -L_0xf1c390 .delay (10000,10000,10000) L_0xf1c390/d; -L_0xf1d380/d .functor AND 1, L_0xf1d9f0, L_0xf1d880, C4<1>, C4<1>; -L_0xf1d380 .delay (10000,10000,10000) L_0xf1d380/d; -L_0xf1da90/d .functor AND 1, L_0xf1de40, L_0xf1dee0, C4<1>, C4<1>; -L_0xf1da90 .delay (10000,10000,10000) L_0xf1da90/d; -L_0xf1e080/d .functor AND 1, L_0xf1e170, L_0xf1df80, C4<1>, C4<1>; -L_0xf1e080 .delay (10000,10000,10000) L_0xf1e080/d; -L_0xf1e210/d .functor AND 1, L_0xf1e530, L_0xf1e5d0, C4<1>, C4<1>; -L_0xf1e210 .delay (10000,10000,10000) L_0xf1e210/d; -L_0xf1dde0/d .functor AND 1, L_0xf1e880, L_0xf1e6c0, C4<1>, C4<1>; -L_0xf1dde0 .delay (10000,10000,10000) L_0xf1dde0/d; -L_0xf1e920/d .functor AND 1, L_0xf1ec50, L_0xf1ecf0, C4<1>, C4<1>; -L_0xf1e920 .delay (10000,10000,10000) L_0xf1e920/d; -L_0xf1eba0/d .functor AND 1, L_0xf1d070, L_0xf1d220, C4<1>, C4<1>; -L_0xf1eba0 .delay (10000,10000,10000) L_0xf1eba0/d; -L_0xf1d480/d .functor AND 1, L_0xf1f3f0, L_0xf1f860, C4<1>, C4<1>; -L_0xf1d480 .delay (10000,10000,10000) L_0xf1d480/d; -L_0xf1f780/d .functor AND 1, L_0xf1fae0, L_0xf1f900, C4<1>, C4<1>; -L_0xf1f780 .delay (10000,10000,10000) L_0xf1f780/d; -L_0xf1fd30/d .functor AND 1, L_0xf1ff10, L_0xf1ffb0, C4<1>, C4<1>; -L_0xf1fd30 .delay (10000,10000,10000) L_0xf1fd30/d; -L_0xf1fc20/d .functor AND 1, L_0xf20210, L_0xf20050, C4<1>, C4<1>; -L_0xf1fc20 .delay (10000,10000,10000) L_0xf1fc20/d; -L_0xf1fcd0/d .functor AND 1, L_0xf1fe70, L_0xf20670, C4<1>, C4<1>; -L_0xf1fcd0 .delay (10000,10000,10000) L_0xf1fcd0/d; -L_0xf203a0/d .functor AND 1, L_0xf20950, L_0xf20760, C4<1>, C4<1>; -L_0xf203a0 .delay (10000,10000,10000) L_0xf203a0/d; -L_0xf208f0/d .functor AND 1, L_0xf205c0, L_0xf20da0, C4<1>, C4<1>; -L_0xf208f0 .delay (10000,10000,10000) L_0xf208f0/d; -L_0xf20a90/d .functor AND 1, L_0xf210b0, L_0xf20e90, C4<1>, C4<1>; -L_0xf20a90 .delay (10000,10000,10000) L_0xf20a90/d; -L_0xf21020/d .functor AND 1, L_0xf20ce0, L_0xf21540, C4<1>, C4<1>; -L_0xf21020 .delay (10000,10000,10000) L_0xf21020/d; -L_0xf211f0/d .functor AND 1, L_0xf21880, L_0xf21630, C4<1>, C4<1>; -L_0xf211f0 .delay (10000,10000,10000) L_0xf211f0/d; -L_0xf21330/d .functor AND 1, L_0xf21470, L_0xf21cc0, C4<1>, C4<1>; -L_0xf21330 .delay (10000,10000,10000) L_0xf21330/d; -L_0xf219c0/d .functor AND 1, L_0xf22030, L_0xf21db0, C4<1>, C4<1>; -L_0xf219c0 .delay (10000,10000,10000) L_0xf219c0/d; -L_0xf21f40/d .functor AND 1, L_0xf21be0, L_0xf22460, C4<1>, C4<1>; -L_0xf21f40 .delay (10000,10000,10000) L_0xf21f40/d; -L_0xf22170/d .functor AND 1, L_0xf22270, L_0xf22810, C4<1>, C4<1>; -L_0xf22170 .delay (10000,10000,10000) L_0xf22170/d; -L_0xf22550/d .functor AND 1, L_0xf22750, L_0xf22370, C4<1>, C4<1>; -L_0xf22550 .delay (10000,10000,10000) L_0xf22550/d; -L_0xf17b80/d .functor AND 1, L_0xf1ef60, L_0xf22950, C4<1>, C4<1>; -L_0xf17b80 .delay (10000,10000,10000) L_0xf17b80/d; -L_0xf1f300/d .functor AND 1, L_0xf1f5e0, L_0xf22650, C4<1>, C4<1>; -L_0xf1f300 .delay (10000,10000,10000) L_0xf1f300/d; -v0xe99360_0 .net *"_s0", 0 0, L_0xf179e0; 1 drivers -v0xf173c0_0 .net *"_s101", 0 0, L_0xf1f900; 1 drivers -v0xf17460_0 .net *"_s102", 0 0, L_0xf1fd30; 1 drivers -v0xf17500_0 .net *"_s105", 0 0, L_0xf1ff10; 1 drivers -v0xf175b0_0 .net *"_s107", 0 0, L_0xf1ffb0; 1 drivers -v0xf17650_0 .net *"_s108", 0 0, L_0xf1fc20; 1 drivers -v0xf17730_0 .net *"_s11", 0 0, L_0xf1be20; 1 drivers -v0xf177d0_0 .net *"_s111", 0 0, L_0xf20210; 1 drivers -v0xf178c0_0 .net *"_s113", 0 0, L_0xf20050; 1 drivers -v0xf17960_0 .net *"_s114", 0 0, L_0xf1fcd0; 1 drivers -v0xf17a60_0 .net *"_s117", 0 0, L_0xf1fe70; 1 drivers -v0xf17b00_0 .net *"_s119", 0 0, L_0xf20670; 1 drivers -v0xf17c10_0 .net *"_s12", 0 0, L_0xf1c080; 1 drivers -v0xf17cb0_0 .net *"_s120", 0 0, L_0xf203a0; 1 drivers -v0xf17dd0_0 .net *"_s123", 0 0, L_0xf20950; 1 drivers -v0xf17e70_0 .net *"_s125", 0 0, L_0xf20760; 1 drivers -v0xf17d30_0 .net *"_s126", 0 0, L_0xf208f0; 1 drivers -v0xf17fc0_0 .net *"_s129", 0 0, L_0xf205c0; 1 drivers -v0xf180e0_0 .net *"_s131", 0 0, L_0xf20da0; 1 drivers -v0xf18160_0 .net *"_s132", 0 0, L_0xf20a90; 1 drivers -v0xf18040_0 .net *"_s135", 0 0, L_0xf210b0; 1 drivers -v0xf18290_0 .net *"_s137", 0 0, L_0xf20e90; 1 drivers -v0xf181e0_0 .net *"_s138", 0 0, L_0xf21020; 1 drivers -v0xf183d0_0 .net *"_s141", 0 0, L_0xf20ce0; 1 drivers -v0xf18330_0 .net *"_s143", 0 0, L_0xf21540; 1 drivers -v0xf18520_0 .net *"_s144", 0 0, L_0xf211f0; 1 drivers -v0xf18470_0 .net *"_s147", 0 0, L_0xf21880; 1 drivers -v0xf18680_0 .net *"_s149", 0 0, L_0xf21630; 1 drivers -v0xf185c0_0 .net *"_s15", 0 0, L_0xf1c170; 1 drivers -v0xf187f0_0 .net *"_s150", 0 0, L_0xf21330; 1 drivers -v0xf18700_0 .net *"_s153", 0 0, L_0xf21470; 1 drivers -v0xf18970_0 .net *"_s155", 0 0, L_0xf21cc0; 1 drivers -v0xf18870_0 .net *"_s156", 0 0, L_0xf219c0; 1 drivers -v0xf18b00_0 .net *"_s159", 0 0, L_0xf22030; 1 drivers -v0xf189f0_0 .net *"_s161", 0 0, L_0xf21db0; 1 drivers -v0xf18ca0_0 .net *"_s162", 0 0, L_0xf21f40; 1 drivers -v0xf18b80_0 .net *"_s165", 0 0, L_0xf21be0; 1 drivers -v0xf18c20_0 .net *"_s167", 0 0, L_0xf22460; 1 drivers -v0xf18e60_0 .net *"_s168", 0 0, L_0xf22170; 1 drivers -v0xf18ee0_0 .net *"_s17", 0 0, L_0xf1c2a0; 1 drivers -v0xf18d20_0 .net *"_s171", 0 0, L_0xf22270; 1 drivers -v0xf18dc0_0 .net *"_s173", 0 0, L_0xf22810; 1 drivers -v0xf190c0_0 .net *"_s174", 0 0, L_0xf22550; 1 drivers -v0xf19140_0 .net *"_s177", 0 0, L_0xf22750; 1 drivers -v0xf18f60_0 .net *"_s179", 0 0, L_0xf22370; 1 drivers -v0xf19000_0 .net *"_s18", 0 0, L_0xf1c520; 1 drivers -v0xf19340_0 .net *"_s180", 0 0, L_0xf17b80; 1 drivers -v0xf193c0_0 .net *"_s183", 0 0, L_0xf1ef60; 1 drivers -v0xf191e0_0 .net *"_s185", 0 0, L_0xf22950; 1 drivers -v0xf19280_0 .net *"_s186", 0 0, L_0xf1f300; 1 drivers -v0xf195e0_0 .net *"_s189", 0 0, L_0xf1f5e0; 1 drivers -v0xf19660_0 .net *"_s191", 0 0, L_0xf22650; 1 drivers -v0xf19460_0 .net *"_s21", 0 0, L_0xf1c580; 1 drivers -v0xf19500_0 .net *"_s23", 0 0, L_0xf1c620; 1 drivers -v0xf198a0_0 .net *"_s24", 0 0, L_0xf1c4c0; 1 drivers -v0xf19920_0 .net *"_s27", 0 0, L_0xf1c890; 1 drivers -v0xf196e0_0 .net *"_s29", 0 0, L_0xf1c9b0; 1 drivers -v0xf19780_0 .net *"_s3", 0 0, L_0xf1b970; 1 drivers -v0xf19820_0 .net *"_s30", 0 0, L_0xf1cbd0; 1 drivers -v0xf19ba0_0 .net *"_s33", 0 0, L_0xf1cd50; 1 drivers -v0xf199c0_0 .net *"_s35", 0 0, L_0xf1cdf0; 1 drivers -v0xf19a60_0 .net *"_s36", 0 0, L_0xf1cb40; 1 drivers -v0xf19b00_0 .net *"_s39", 0 0, L_0xf1d180; 1 drivers -v0xf19e40_0 .net *"_s41", 0 0, L_0xf1cee0; 1 drivers -v0xf19c40_0 .net *"_s42", 0 0, L_0xf1c390; 1 drivers -v0xf19ce0_0 .net *"_s45", 0 0, L_0xf1d6a0; 1 drivers -v0xf19d80_0 .net *"_s47", 0 0, L_0xf1d790; 1 drivers -v0xf1a0e0_0 .net *"_s48", 0 0, L_0xf1d380; 1 drivers -v0xf19ee0_0 .net *"_s5", 0 0, L_0xf1ba60; 1 drivers -v0xf19f80_0 .net *"_s51", 0 0, L_0xf1d9f0; 1 drivers -v0xf1a020_0 .net *"_s53", 0 0, L_0xf1d880; 1 drivers -v0xf1a3a0_0 .net *"_s54", 0 0, L_0xf1da90; 1 drivers -v0xf1a160_0 .net *"_s57", 0 0, L_0xf1de40; 1 drivers -v0xf1a200_0 .net *"_s59", 0 0, L_0xf1dee0; 1 drivers -v0xf1a2a0_0 .net *"_s6", 0 0, L_0xf1bc40; 1 drivers -v0xf1a680_0 .net *"_s60", 0 0, L_0xf1e080; 1 drivers -v0xf1a420_0 .net *"_s63", 0 0, L_0xf1e170; 1 drivers -v0xf1a4c0_0 .net *"_s65", 0 0, L_0xf1df80; 1 drivers -v0xf1a560_0 .net *"_s66", 0 0, L_0xf1e210; 1 drivers -v0xf1a600_0 .net *"_s69", 0 0, L_0xf1e530; 1 drivers -v0xf1a990_0 .net *"_s71", 0 0, L_0xf1e5d0; 1 drivers -v0xf1aa10_0 .net *"_s72", 0 0, L_0xf1dde0; 1 drivers -v0xf1a720_0 .net *"_s75", 0 0, L_0xf1e880; 1 drivers -v0xf1a7c0_0 .net *"_s77", 0 0, L_0xf1e6c0; 1 drivers -v0xf1a860_0 .net *"_s78", 0 0, L_0xf1e920; 1 drivers -v0xf1a900_0 .net *"_s81", 0 0, L_0xf1ec50; 1 drivers -v0xf1ad70_0 .net *"_s83", 0 0, L_0xf1ecf0; 1 drivers -v0xf1ae10_0 .net *"_s84", 0 0, L_0xf1eba0; 1 drivers -v0xf1aab0_0 .net *"_s87", 0 0, L_0xf1d070; 1 drivers -v0xf1ab50_0 .net *"_s89", 0 0, L_0xf1d220; 1 drivers -v0xf1abf0_0 .net *"_s9", 0 0, L_0xf1bd80; 1 drivers -v0xf1ac90_0 .net *"_s90", 0 0, L_0xf1d480; 1 drivers -v0xf1b180_0 .net *"_s93", 0 0, L_0xf1f3f0; 1 drivers -v0xf1b200_0 .net *"_s95", 0 0, L_0xf1f860; 1 drivers -v0xf1aeb0_0 .net *"_s96", 0 0, L_0xf1f780; 1 drivers -v0xf1af50_0 .net *"_s99", 0 0, L_0xf1fae0; 1 drivers -v0xf1aff0_0 .net "a", 31 0, v0xf1b620_0; 1 drivers -v0xf1b090_0 .net "b", 31 0, v0xf1b750_0; 1 drivers -v0xf1b5a0_0 .alias "out", 31 0, v0xf1b6a0_0; -L_0xf1b800 .part/pv L_0xf179e0, 0, 1, 32; -L_0xf1b970 .part v0xf1b620_0, 0, 1; -L_0xf1ba60 .part v0xf1b750_0, 0, 1; -L_0xf1bba0 .part/pv L_0xf1bc40, 1, 1, 32; -L_0xf1bd80 .part v0xf1b620_0, 1, 1; -L_0xf1be20 .part v0xf1b750_0, 1, 1; -L_0xf1bf50 .part/pv L_0xf1c080, 2, 1, 32; -L_0xf1c170 .part v0xf1b620_0, 2, 1; -L_0xf1c2a0 .part v0xf1b750_0, 2, 1; -L_0xf1c420 .part/pv L_0xf1c520, 3, 1, 32; -L_0xf1c580 .part v0xf1b620_0, 3, 1; -L_0xf1c620 .part v0xf1b750_0, 3, 1; -L_0xf1c710 .part/pv L_0xf1c4c0, 4, 1, 32; -L_0xf1c890 .part v0xf1b620_0, 4, 1; -L_0xf1c9b0 .part v0xf1b750_0, 4, 1; -L_0xf1caa0 .part/pv L_0xf1cbd0, 5, 1, 32; -L_0xf1cd50 .part v0xf1b620_0, 5, 1; -L_0xf1cdf0 .part v0xf1b750_0, 5, 1; -L_0xf1cf80 .part/pv L_0xf1cb40, 6, 1, 32; -L_0xf1d180 .part v0xf1b620_0, 6, 1; -L_0xf1cee0 .part v0xf1b750_0, 6, 1; -L_0xf1d4f0 .part/pv L_0xf1c390, 7, 1, 32; -L_0xf1d6a0 .part v0xf1b620_0, 7, 1; -L_0xf1d790 .part v0xf1b750_0, 7, 1; -L_0xf1d590 .part/pv L_0xf1d380, 8, 1, 32; -L_0xf1d9f0 .part v0xf1b620_0, 8, 1; -L_0xf1d880 .part v0xf1b750_0, 8, 1; -L_0xf1dbc0 .part/pv L_0xf1da90, 9, 1, 32; -L_0xf1de40 .part v0xf1b620_0, 9, 1; -L_0xf1dee0 .part v0xf1b750_0, 9, 1; -L_0xf1dc60 .part/pv L_0xf1e080, 10, 1, 32; -L_0xf1e170 .part v0xf1b620_0, 10, 1; -L_0xf1df80 .part v0xf1b750_0, 10, 1; -L_0xf1e320 .part/pv L_0xf1e210, 11, 1, 32; -L_0xf1e530 .part v0xf1b620_0, 11, 1; -L_0xf1e5d0 .part v0xf1b750_0, 11, 1; -L_0xf1e3c0 .part/pv L_0xf1dde0, 12, 1, 32; -L_0xf1e880 .part v0xf1b620_0, 12, 1; -L_0xf1e6c0 .part v0xf1b750_0, 12, 1; -L_0xf1ea60 .part/pv L_0xf1e920, 13, 1, 32; -L_0xf1ec50 .part v0xf1b620_0, 13, 1; -L_0xf1ecf0 .part v0xf1b750_0, 13, 1; -L_0xf1eb00 .part/pv L_0xf1eba0, 14, 1, 32; -L_0xf1d070 .part v0xf1b620_0, 14, 1; -L_0xf1d220 .part v0xf1b750_0, 14, 1; -L_0xf1d3e0 .part/pv L_0xf1d480, 15, 1, 32; -L_0xf1f3f0 .part v0xf1b620_0, 15, 1; -L_0xf1f860 .part v0xf1b750_0, 15, 1; -L_0xf1f6e0 .part/pv L_0xf1f780, 16, 1, 32; -L_0xf1fae0 .part v0xf1b620_0, 16, 1; -L_0xf1f900 .part v0xf1b750_0, 16, 1; -L_0xf1f9f0 .part/pv L_0xf1fd30, 17, 1, 32; -L_0xf1ff10 .part v0xf1b620_0, 17, 1; -L_0xf1ffb0 .part v0xf1b750_0, 17, 1; -L_0xf1fb80 .part/pv L_0xf1fc20, 18, 1, 32; -L_0xf20210 .part v0xf1b620_0, 18, 1; -L_0xf20050 .part v0xf1b750_0, 18, 1; -L_0xf20140 .part/pv L_0xf1fcd0, 19, 1, 32; -L_0xf1fe70 .part v0xf1b620_0, 19, 1; -L_0xf20670 .part v0xf1b750_0, 19, 1; -L_0xf20300 .part/pv L_0xf203a0, 20, 1, 32; -L_0xf20950 .part v0xf1b620_0, 20, 1; -L_0xf20760 .part v0xf1b750_0, 20, 1; -L_0xf20850 .part/pv L_0xf208f0, 21, 1, 32; -L_0xf205c0 .part v0xf1b620_0, 21, 1; -L_0xf20da0 .part v0xf1b750_0, 21, 1; -L_0xf209f0 .part/pv L_0xf20a90, 22, 1, 32; -L_0xf210b0 .part v0xf1b620_0, 22, 1; -L_0xf20e90 .part v0xf1b750_0, 22, 1; -L_0xf20f80 .part/pv L_0xf21020, 23, 1, 32; -L_0xf20ce0 .part v0xf1b620_0, 23, 1; -L_0xf21540 .part v0xf1b750_0, 23, 1; -L_0xf21150 .part/pv L_0xf211f0, 24, 1, 32; -L_0xf21880 .part v0xf1b620_0, 24, 1; -L_0xf21630 .part v0xf1b750_0, 24, 1; -L_0xf21720 .part/pv L_0xf21330, 25, 1, 32; -L_0xf21470 .part v0xf1b620_0, 25, 1; -L_0xf21cc0 .part v0xf1b750_0, 25, 1; -L_0xf21920 .part/pv L_0xf219c0, 26, 1, 32; -L_0xf22030 .part v0xf1b620_0, 26, 1; -L_0xf21db0 .part v0xf1b750_0, 26, 1; -L_0xf21ea0 .part/pv L_0xf21f40, 27, 1, 32; -L_0xf21be0 .part v0xf1b620_0, 27, 1; -L_0xf22460 .part v0xf1b750_0, 27, 1; -L_0xf220d0 .part/pv L_0xf22170, 28, 1, 32; -L_0xf22270 .part v0xf1b620_0, 28, 1; -L_0xf22810 .part v0xf1b750_0, 28, 1; -L_0xf228b0 .part/pv L_0xf22550, 29, 1, 32; -L_0xf22750 .part v0xf1b620_0, 29, 1; -L_0xf22370 .part v0xf1b750_0, 29, 1; -L_0xf22c30 .part/pv L_0xf17b80, 30, 1, 32; -L_0xf1ef60 .part v0xf1b620_0, 30, 1; -L_0xf22950 .part v0xf1b750_0, 30, 1; -L_0xf22a40 .part/pv L_0xf1f300, 31, 1, 32; -L_0xf1f5e0 .part v0xf1b620_0, 31, 1; -L_0xf22650 .part v0xf1b750_0, 31, 1; - .scope S_0xe5a730; -T_0 ; - %ix/load 0, 31, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b750_0, 0, 1; - %delay 5000000, 0; - %vpi_call 2 14 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b620_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 18 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b620_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 22 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 26 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xf1b620_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b620_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xf1b750_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 30 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xf1b620_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xf1b750_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xf1b750_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xf1b750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xf1b750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 34 "$display", "%b %b | %b", v0xf1b620_0, v0xf1b750_0, v0xf1b6a0_0; - %end; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 4; - "N/A"; - ""; - "and_32bit.t.v"; - "./and_32bit.v"; From 1148a0d7a9d3b60ef0a63694ec989ce73c33d750 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:04:53 -0400 Subject: [PATCH 15/38] Delete nand_32bit --- nand_32bit | 1073 ---------------------------------------------------- 1 file changed, 1073 deletions(-) delete mode 100755 nand_32bit diff --git a/nand_32bit b/nand_32bit deleted file mode 100755 index 6f76a62..0000000 --- a/nand_32bit +++ /dev/null @@ -1,1073 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "0.9.7 " "(v0_9_7)"; -:vpi_time_precision - 12; -:vpi_module "system"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0x1960730 .scope module, "test32bitnand" "test32bitnand" 2 4; - .timescale -9 -12; -v0x1a21620_0 .var "a", 31 0; -RS_0x7f074f768278/0/0 .resolv tri, L_0x1a21800, L_0x1a21ba0, L_0x1a21f50, L_0x1a22420; -RS_0x7f074f768278/0/4 .resolv tri, L_0x1a22710, L_0x1a22aa0, L_0x1a22f80, L_0x1a234f0; -RS_0x7f074f768278/0/8 .resolv tri, L_0x1a23590, L_0x1a23bc0, L_0x1a23c60, L_0x1a24320; -RS_0x7f074f768278/0/12 .resolv tri, L_0x1a243c0, L_0x1a24a60, L_0x1a24b00, L_0x1a233e0; -RS_0x7f074f768278/0/16 .resolv tri, L_0x1a256e0, L_0x1a259f0, L_0x1a25b80, L_0x1a26140; -RS_0x7f074f768278/0/20 .resolv tri, L_0x1a26300, L_0x1a26850, L_0x1a269f0, L_0x1a26f80; -RS_0x7f074f768278/0/24 .resolv tri, L_0x1a27150, L_0x1a27720, L_0x1a27920, L_0x1a27ea0; -RS_0x7f074f768278/0/28 .resolv tri, L_0x1a280d0, L_0x1a288b0, L_0x1a28c30, L_0x1a28a40; -RS_0x7f074f768278/1/0 .resolv tri, RS_0x7f074f768278/0/0, RS_0x7f074f768278/0/4, RS_0x7f074f768278/0/8, RS_0x7f074f768278/0/12; -RS_0x7f074f768278/1/4 .resolv tri, RS_0x7f074f768278/0/16, RS_0x7f074f768278/0/20, RS_0x7f074f768278/0/24, RS_0x7f074f768278/0/28; -RS_0x7f074f768278 .resolv tri, RS_0x7f074f768278/1/0, RS_0x7f074f768278/1/4, C4, C4; -v0x1a216a0_0 .net8 "ans", 31 0, RS_0x7f074f768278; 32 drivers -v0x1a21750_0 .var "b", 31 0; -S_0x1960820 .scope module, "nand32" "nand_32bit" 2 9, 3 1, S_0x1960730; - .timescale -9 -12; -L_0x1a1d9e0/d .functor NAND 1, L_0x1a21970, L_0x1a21a60, C4<1>, C4<1>; -L_0x1a1d9e0 .delay (10000,10000,10000) L_0x1a1d9e0/d; -L_0x1a21c40/d .functor NAND 1, L_0x1a21d80, L_0x1a21e20, C4<1>, C4<1>; -L_0x1a21c40 .delay (10000,10000,10000) L_0x1a21c40/d; -L_0x1a22080/d .functor NAND 1, L_0x1a22170, L_0x1a222a0, C4<1>, C4<1>; -L_0x1a22080 .delay (10000,10000,10000) L_0x1a22080/d; -L_0x1a22520/d .functor NAND 1, L_0x1a22580, L_0x1a22620, C4<1>, C4<1>; -L_0x1a22520 .delay (10000,10000,10000) L_0x1a22520/d; -L_0x1a224c0/d .functor NAND 1, L_0x1a22890, L_0x1a229b0, C4<1>, C4<1>; -L_0x1a224c0 .delay (10000,10000,10000) L_0x1a224c0/d; -L_0x1a22bd0/d .functor NAND 1, L_0x1a22d50, L_0x1a22df0, C4<1>, C4<1>; -L_0x1a22bd0 .delay (10000,10000,10000) L_0x1a22bd0/d; -L_0x1a22b40/d .functor NAND 1, L_0x1a23180, L_0x1a22ee0, C4<1>, C4<1>; -L_0x1a22b40 .delay (10000,10000,10000) L_0x1a22b40/d; -L_0x1a22390/d .functor NAND 1, L_0x1a236a0, L_0x1a23790, C4<1>, C4<1>; -L_0x1a22390 .delay (10000,10000,10000) L_0x1a22390/d; -L_0x1a23380/d .functor NAND 1, L_0x1a239f0, L_0x1a23880, C4<1>, C4<1>; -L_0x1a23380 .delay (10000,10000,10000) L_0x1a23380/d; -L_0x1a23a90/d .functor NAND 1, L_0x1a23e40, L_0x1a23ee0, C4<1>, C4<1>; -L_0x1a23a90 .delay (10000,10000,10000) L_0x1a23a90/d; -L_0x1a24080/d .functor NAND 1, L_0x1a24170, L_0x1a23f80, C4<1>, C4<1>; -L_0x1a24080 .delay (10000,10000,10000) L_0x1a24080/d; -L_0x1a24210/d .functor NAND 1, L_0x1a24530, L_0x1a245d0, C4<1>, C4<1>; -L_0x1a24210 .delay (10000,10000,10000) L_0x1a24210/d; -L_0x1a23de0/d .functor NAND 1, L_0x1a24880, L_0x1a246c0, C4<1>, C4<1>; -L_0x1a23de0 .delay (10000,10000,10000) L_0x1a23de0/d; -L_0x1a24920/d .functor NAND 1, L_0x1a24c50, L_0x1a24cf0, C4<1>, C4<1>; -L_0x1a24920 .delay (10000,10000,10000) L_0x1a24920/d; -L_0x1a24ba0/d .functor NAND 1, L_0x1a23070, L_0x1a23220, C4<1>, C4<1>; -L_0x1a24ba0 .delay (10000,10000,10000) L_0x1a24ba0/d; -L_0x1a23480/d .functor NAND 1, L_0x1a253f0, L_0x1a25860, C4<1>, C4<1>; -L_0x1a23480 .delay (10000,10000,10000) L_0x1a23480/d; -L_0x1a25780/d .functor NAND 1, L_0x1a25ae0, L_0x1a25900, C4<1>, C4<1>; -L_0x1a25780 .delay (10000,10000,10000) L_0x1a25780/d; -L_0x1a25d30/d .functor NAND 1, L_0x1a25f10, L_0x1a25fb0, C4<1>, C4<1>; -L_0x1a25d30 .delay (10000,10000,10000) L_0x1a25d30/d; -L_0x1a25c20/d .functor NAND 1, L_0x1a26210, L_0x1a26050, C4<1>, C4<1>; -L_0x1a25c20 .delay (10000,10000,10000) L_0x1a25c20/d; -L_0x1a25cd0/d .functor NAND 1, L_0x1a25e70, L_0x1a26670, C4<1>, C4<1>; -L_0x1a25cd0 .delay (10000,10000,10000) L_0x1a25cd0/d; -L_0x1a263a0/d .functor NAND 1, L_0x1a26950, L_0x1a26760, C4<1>, C4<1>; -L_0x1a263a0 .delay (10000,10000,10000) L_0x1a263a0/d; -L_0x1a268f0/d .functor NAND 1, L_0x1a265c0, L_0x1a26da0, C4<1>, C4<1>; -L_0x1a268f0 .delay (10000,10000,10000) L_0x1a268f0/d; -L_0x1a26a90/d .functor NAND 1, L_0x1a270b0, L_0x1a26e90, C4<1>, C4<1>; -L_0x1a26a90 .delay (10000,10000,10000) L_0x1a26a90/d; -L_0x1a27020/d .functor NAND 1, L_0x1a26ce0, L_0x1a27540, C4<1>, C4<1>; -L_0x1a27020 .delay (10000,10000,10000) L_0x1a27020/d; -L_0x1a271f0/d .functor NAND 1, L_0x1a27880, L_0x1a27630, C4<1>, C4<1>; -L_0x1a271f0 .delay (10000,10000,10000) L_0x1a271f0/d; -L_0x1a27330/d .functor NAND 1, L_0x1a27470, L_0x1a27cc0, C4<1>, C4<1>; -L_0x1a27330 .delay (10000,10000,10000) L_0x1a27330/d; -L_0x1a279c0/d .functor NAND 1, L_0x1a28030, L_0x1a27db0, C4<1>, C4<1>; -L_0x1a279c0 .delay (10000,10000,10000) L_0x1a279c0/d; -L_0x1a27f40/d .functor NAND 1, L_0x1a27be0, L_0x1a28460, C4<1>, C4<1>; -L_0x1a27f40 .delay (10000,10000,10000) L_0x1a27f40/d; -L_0x1a28170/d .functor NAND 1, L_0x1a28270, L_0x1a28810, C4<1>, C4<1>; -L_0x1a28170 .delay (10000,10000,10000) L_0x1a28170/d; -L_0x1a28550/d .functor NAND 1, L_0x1a28750, L_0x1a28370, C4<1>, C4<1>; -L_0x1a28550 .delay (10000,10000,10000) L_0x1a28550/d; -L_0x1a1db80/d .functor NAND 1, L_0x1a24f60, L_0x1a28950, C4<1>, C4<1>; -L_0x1a1db80 .delay (10000,10000,10000) L_0x1a1db80/d; -L_0x1a25300/d .functor NAND 1, L_0x1a255e0, L_0x1a28650, C4<1>, C4<1>; -L_0x1a25300 .delay (10000,10000,10000) L_0x1a25300/d; -v0x199f360_0 .net *"_s0", 0 0, L_0x1a1d9e0; 1 drivers -v0x1a1d3c0_0 .net *"_s101", 0 0, L_0x1a25900; 1 drivers -v0x1a1d460_0 .net *"_s102", 0 0, L_0x1a25d30; 1 drivers -v0x1a1d500_0 .net *"_s105", 0 0, L_0x1a25f10; 1 drivers -v0x1a1d5b0_0 .net *"_s107", 0 0, L_0x1a25fb0; 1 drivers -v0x1a1d650_0 .net *"_s108", 0 0, L_0x1a25c20; 1 drivers -v0x1a1d730_0 .net *"_s11", 0 0, L_0x1a21e20; 1 drivers -v0x1a1d7d0_0 .net *"_s111", 0 0, L_0x1a26210; 1 drivers -v0x1a1d8c0_0 .net *"_s113", 0 0, L_0x1a26050; 1 drivers -v0x1a1d960_0 .net *"_s114", 0 0, L_0x1a25cd0; 1 drivers -v0x1a1da60_0 .net *"_s117", 0 0, L_0x1a25e70; 1 drivers -v0x1a1db00_0 .net *"_s119", 0 0, L_0x1a26670; 1 drivers -v0x1a1dc10_0 .net *"_s12", 0 0, L_0x1a22080; 1 drivers -v0x1a1dcb0_0 .net *"_s120", 0 0, L_0x1a263a0; 1 drivers -v0x1a1ddd0_0 .net *"_s123", 0 0, L_0x1a26950; 1 drivers -v0x1a1de70_0 .net *"_s125", 0 0, L_0x1a26760; 1 drivers -v0x1a1dd30_0 .net *"_s126", 0 0, L_0x1a268f0; 1 drivers -v0x1a1dfc0_0 .net *"_s129", 0 0, L_0x1a265c0; 1 drivers -v0x1a1e0e0_0 .net *"_s131", 0 0, L_0x1a26da0; 1 drivers -v0x1a1e160_0 .net *"_s132", 0 0, L_0x1a26a90; 1 drivers -v0x1a1e040_0 .net *"_s135", 0 0, L_0x1a270b0; 1 drivers -v0x1a1e290_0 .net *"_s137", 0 0, L_0x1a26e90; 1 drivers -v0x1a1e1e0_0 .net *"_s138", 0 0, L_0x1a27020; 1 drivers -v0x1a1e3d0_0 .net *"_s141", 0 0, L_0x1a26ce0; 1 drivers -v0x1a1e330_0 .net *"_s143", 0 0, L_0x1a27540; 1 drivers -v0x1a1e520_0 .net *"_s144", 0 0, L_0x1a271f0; 1 drivers -v0x1a1e470_0 .net *"_s147", 0 0, L_0x1a27880; 1 drivers -v0x1a1e680_0 .net *"_s149", 0 0, L_0x1a27630; 1 drivers -v0x1a1e5c0_0 .net *"_s15", 0 0, L_0x1a22170; 1 drivers -v0x1a1e7f0_0 .net *"_s150", 0 0, L_0x1a27330; 1 drivers -v0x1a1e700_0 .net *"_s153", 0 0, L_0x1a27470; 1 drivers -v0x1a1e970_0 .net *"_s155", 0 0, L_0x1a27cc0; 1 drivers -v0x1a1e870_0 .net *"_s156", 0 0, L_0x1a279c0; 1 drivers -v0x1a1eb00_0 .net *"_s159", 0 0, L_0x1a28030; 1 drivers -v0x1a1e9f0_0 .net *"_s161", 0 0, L_0x1a27db0; 1 drivers -v0x1a1eca0_0 .net *"_s162", 0 0, L_0x1a27f40; 1 drivers -v0x1a1eb80_0 .net *"_s165", 0 0, L_0x1a27be0; 1 drivers -v0x1a1ec20_0 .net *"_s167", 0 0, L_0x1a28460; 1 drivers -v0x1a1ee60_0 .net *"_s168", 0 0, L_0x1a28170; 1 drivers -v0x1a1eee0_0 .net *"_s17", 0 0, L_0x1a222a0; 1 drivers -v0x1a1ed20_0 .net *"_s171", 0 0, L_0x1a28270; 1 drivers -v0x1a1edc0_0 .net *"_s173", 0 0, L_0x1a28810; 1 drivers -v0x1a1f0c0_0 .net *"_s174", 0 0, L_0x1a28550; 1 drivers -v0x1a1f140_0 .net *"_s177", 0 0, L_0x1a28750; 1 drivers -v0x1a1ef60_0 .net *"_s179", 0 0, L_0x1a28370; 1 drivers -v0x1a1f000_0 .net *"_s18", 0 0, L_0x1a22520; 1 drivers -v0x1a1f340_0 .net *"_s180", 0 0, L_0x1a1db80; 1 drivers -v0x1a1f3c0_0 .net *"_s183", 0 0, L_0x1a24f60; 1 drivers -v0x1a1f1e0_0 .net *"_s185", 0 0, L_0x1a28950; 1 drivers -v0x1a1f280_0 .net *"_s186", 0 0, L_0x1a25300; 1 drivers -v0x1a1f5e0_0 .net *"_s189", 0 0, L_0x1a255e0; 1 drivers -v0x1a1f660_0 .net *"_s191", 0 0, L_0x1a28650; 1 drivers -v0x1a1f460_0 .net *"_s21", 0 0, L_0x1a22580; 1 drivers -v0x1a1f500_0 .net *"_s23", 0 0, L_0x1a22620; 1 drivers -v0x1a1f8a0_0 .net *"_s24", 0 0, L_0x1a224c0; 1 drivers -v0x1a1f920_0 .net *"_s27", 0 0, L_0x1a22890; 1 drivers -v0x1a1f6e0_0 .net *"_s29", 0 0, L_0x1a229b0; 1 drivers -v0x1a1f780_0 .net *"_s3", 0 0, L_0x1a21970; 1 drivers -v0x1a1f820_0 .net *"_s30", 0 0, L_0x1a22bd0; 1 drivers -v0x1a1fba0_0 .net *"_s33", 0 0, L_0x1a22d50; 1 drivers -v0x1a1f9c0_0 .net *"_s35", 0 0, L_0x1a22df0; 1 drivers -v0x1a1fa60_0 .net *"_s36", 0 0, L_0x1a22b40; 1 drivers -v0x1a1fb00_0 .net *"_s39", 0 0, L_0x1a23180; 1 drivers -v0x1a1fe40_0 .net *"_s41", 0 0, L_0x1a22ee0; 1 drivers -v0x1a1fc40_0 .net *"_s42", 0 0, L_0x1a22390; 1 drivers -v0x1a1fce0_0 .net *"_s45", 0 0, L_0x1a236a0; 1 drivers -v0x1a1fd80_0 .net *"_s47", 0 0, L_0x1a23790; 1 drivers -v0x1a200e0_0 .net *"_s48", 0 0, L_0x1a23380; 1 drivers -v0x1a1fee0_0 .net *"_s5", 0 0, L_0x1a21a60; 1 drivers -v0x1a1ff80_0 .net *"_s51", 0 0, L_0x1a239f0; 1 drivers -v0x1a20020_0 .net *"_s53", 0 0, L_0x1a23880; 1 drivers -v0x1a203a0_0 .net *"_s54", 0 0, L_0x1a23a90; 1 drivers -v0x1a20160_0 .net *"_s57", 0 0, L_0x1a23e40; 1 drivers -v0x1a20200_0 .net *"_s59", 0 0, L_0x1a23ee0; 1 drivers -v0x1a202a0_0 .net *"_s6", 0 0, L_0x1a21c40; 1 drivers -v0x1a20680_0 .net *"_s60", 0 0, L_0x1a24080; 1 drivers -v0x1a20420_0 .net *"_s63", 0 0, L_0x1a24170; 1 drivers -v0x1a204c0_0 .net *"_s65", 0 0, L_0x1a23f80; 1 drivers -v0x1a20560_0 .net *"_s66", 0 0, L_0x1a24210; 1 drivers -v0x1a20600_0 .net *"_s69", 0 0, L_0x1a24530; 1 drivers -v0x1a20990_0 .net *"_s71", 0 0, L_0x1a245d0; 1 drivers -v0x1a20a10_0 .net *"_s72", 0 0, L_0x1a23de0; 1 drivers -v0x1a20720_0 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0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21750_0, 0, 1; - %delay 5000000, 0; - %vpi_call 2 14 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; - %ix/load 0, 31, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21620_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 18 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; - %ix/load 0, 31, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21620_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 22 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; - %ix/load 0, 31, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 26 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; - %ix/load 0, 31, 0; - %set/x0 v0x1a21620_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21620_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x1a21750_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 30 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; - %ix/load 0, 31, 0; - %set/x0 v0x1a21620_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x1a21750_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x1a21750_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x1a21750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x1a21750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 34 "$display", "%b %b | %b", v0x1a21620_0, v0x1a21750_0, v0x1a216a0_0; - %end; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 4; - "N/A"; - ""; - "nand_32bit.t.v"; - "./nand_32bit.v"; From 9e05231983970120adc1116158dc9b8b21a1a633 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:05:02 -0400 Subject: [PATCH 16/38] Delete nor_32bit --- nor_32bit | 1073 ----------------------------------------------------- 1 file changed, 1073 deletions(-) delete mode 100755 nor_32bit diff --git a/nor_32bit b/nor_32bit deleted file mode 100755 index 072257f..0000000 --- a/nor_32bit +++ /dev/null @@ -1,1073 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "0.9.7 " "(v0_9_7)"; -:vpi_time_precision - 12; -:vpi_module "system"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0x9e3730 .scope module, "test32bitnor" "test32bitnor" 2 4; - .timescale -9 -12; -v0xaa4620_0 .var "a", 31 0; -RS_0x7f7c4f155278/0/0 .resolv tri, L_0xaa4800, L_0xaa4ba0, L_0xaa4f50, L_0xaa5420; -RS_0x7f7c4f155278/0/4 .resolv tri, L_0xaa5710, L_0xaa5aa0, L_0xaa5f80, L_0xaa64f0; -RS_0x7f7c4f155278/0/8 .resolv tri, L_0xaa6590, L_0xaa6bc0, L_0xaa6c60, L_0xaa7320; -RS_0x7f7c4f155278/0/12 .resolv tri, L_0xaa73c0, L_0xaa7a60, L_0xaa7b00, L_0xaa63e0; -RS_0x7f7c4f155278/0/16 .resolv tri, L_0xaa86e0, L_0xaa89f0, L_0xaa8b80, L_0xaa9140; -RS_0x7f7c4f155278/0/20 .resolv tri, L_0xaa9300, L_0xaa9850, L_0xaa99f0, L_0xaa9f80; -RS_0x7f7c4f155278/0/24 .resolv tri, L_0xaaa150, L_0xaaa720, L_0xaaa920, L_0xaaaea0; -RS_0x7f7c4f155278/0/28 .resolv tri, L_0xaab0d0, L_0xaab8b0, L_0xaabc30, L_0xaaba40; -RS_0x7f7c4f155278/1/0 .resolv tri, RS_0x7f7c4f155278/0/0, RS_0x7f7c4f155278/0/4, RS_0x7f7c4f155278/0/8, RS_0x7f7c4f155278/0/12; -RS_0x7f7c4f155278/1/4 .resolv tri, RS_0x7f7c4f155278/0/16, RS_0x7f7c4f155278/0/20, RS_0x7f7c4f155278/0/24, RS_0x7f7c4f155278/0/28; -RS_0x7f7c4f155278 .resolv tri, RS_0x7f7c4f155278/1/0, RS_0x7f7c4f155278/1/4, C4, C4; -v0xaa46a0_0 .net8 "ans", 31 0, RS_0x7f7c4f155278; 32 drivers -v0xaa4750_0 .var "b", 31 0; -S_0x9e3820 .scope module, "nor32" "nor_32bit" 2 9, 3 1, S_0x9e3730; - .timescale -9 -12; -L_0xaa09e0/d .functor NOR 1, L_0xaa4970, L_0xaa4a60, C4<0>, C4<0>; -L_0xaa09e0 .delay (10000,10000,10000) L_0xaa09e0/d; -L_0xaa4c40/d .functor NOR 1, L_0xaa4d80, L_0xaa4e20, C4<0>, C4<0>; -L_0xaa4c40 .delay (10000,10000,10000) L_0xaa4c40/d; -L_0xaa5080/d .functor NOR 1, L_0xaa5170, L_0xaa52a0, C4<0>, C4<0>; -L_0xaa5080 .delay (10000,10000,10000) L_0xaa5080/d; -L_0xaa5520/d .functor NOR 1, L_0xaa5580, L_0xaa5620, C4<0>, C4<0>; -L_0xaa5520 .delay (10000,10000,10000) L_0xaa5520/d; -L_0xaa54c0/d .functor NOR 1, L_0xaa5890, L_0xaa59b0, C4<0>, C4<0>; -L_0xaa54c0 .delay (10000,10000,10000) L_0xaa54c0/d; -L_0xaa5bd0/d .functor NOR 1, L_0xaa5d50, L_0xaa5df0, C4<0>, C4<0>; -L_0xaa5bd0 .delay (10000,10000,10000) L_0xaa5bd0/d; -L_0xaa5b40/d .functor NOR 1, L_0xaa6180, L_0xaa5ee0, C4<0>, C4<0>; -L_0xaa5b40 .delay (10000,10000,10000) L_0xaa5b40/d; -L_0xaa5390/d .functor NOR 1, L_0xaa66a0, L_0xaa6790, C4<0>, C4<0>; -L_0xaa5390 .delay (10000,10000,10000) L_0xaa5390/d; -L_0xaa6380/d .functor NOR 1, L_0xaa69f0, L_0xaa6880, C4<0>, C4<0>; -L_0xaa6380 .delay (10000,10000,10000) L_0xaa6380/d; -L_0xaa6a90/d .functor NOR 1, L_0xaa6e40, L_0xaa6ee0, C4<0>, C4<0>; -L_0xaa6a90 .delay (10000,10000,10000) L_0xaa6a90/d; -L_0xaa7080/d .functor NOR 1, L_0xaa7170, L_0xaa6f80, C4<0>, C4<0>; -L_0xaa7080 .delay (10000,10000,10000) L_0xaa7080/d; -L_0xaa7210/d .functor NOR 1, L_0xaa7530, L_0xaa75d0, C4<0>, C4<0>; -L_0xaa7210 .delay (10000,10000,10000) L_0xaa7210/d; -L_0xaa6de0/d .functor NOR 1, L_0xaa7880, L_0xaa76c0, C4<0>, C4<0>; -L_0xaa6de0 .delay (10000,10000,10000) L_0xaa6de0/d; -L_0xaa7920/d .functor NOR 1, L_0xaa7c50, L_0xaa7cf0, C4<0>, C4<0>; -L_0xaa7920 .delay (10000,10000,10000) L_0xaa7920/d; -L_0xaa7ba0/d .functor NOR 1, L_0xaa6070, L_0xaa6220, C4<0>, C4<0>; -L_0xaa7ba0 .delay (10000,10000,10000) L_0xaa7ba0/d; -L_0xaa6480/d .functor NOR 1, L_0xaa83f0, L_0xaa8860, C4<0>, C4<0>; -L_0xaa6480 .delay (10000,10000,10000) L_0xaa6480/d; -L_0xaa8780/d .functor NOR 1, L_0xaa8ae0, L_0xaa8900, C4<0>, C4<0>; -L_0xaa8780 .delay (10000,10000,10000) L_0xaa8780/d; -L_0xaa8d30/d .functor NOR 1, L_0xaa8f10, L_0xaa8fb0, C4<0>, C4<0>; -L_0xaa8d30 .delay (10000,10000,10000) L_0xaa8d30/d; -L_0xaa8c20/d .functor NOR 1, L_0xaa9210, L_0xaa9050, C4<0>, C4<0>; -L_0xaa8c20 .delay (10000,10000,10000) L_0xaa8c20/d; -L_0xaa8cd0/d .functor NOR 1, L_0xaa8e70, L_0xaa9670, C4<0>, C4<0>; -L_0xaa8cd0 .delay (10000,10000,10000) L_0xaa8cd0/d; -L_0xaa93a0/d .functor NOR 1, L_0xaa9950, L_0xaa9760, C4<0>, C4<0>; -L_0xaa93a0 .delay (10000,10000,10000) L_0xaa93a0/d; -L_0xaa98f0/d .functor NOR 1, L_0xaa95c0, L_0xaa9da0, C4<0>, C4<0>; -L_0xaa98f0 .delay (10000,10000,10000) L_0xaa98f0/d; -L_0xaa9a90/d .functor NOR 1, L_0xaaa0b0, L_0xaa9e90, C4<0>, C4<0>; -L_0xaa9a90 .delay (10000,10000,10000) L_0xaa9a90/d; -L_0xaaa020/d .functor NOR 1, L_0xaa9ce0, L_0xaaa540, C4<0>, C4<0>; -L_0xaaa020 .delay (10000,10000,10000) L_0xaaa020/d; -L_0xaaa1f0/d .functor NOR 1, L_0xaaa880, L_0xaaa630, C4<0>, C4<0>; -L_0xaaa1f0 .delay (10000,10000,10000) L_0xaaa1f0/d; -L_0xaaa330/d .functor NOR 1, L_0xaaa470, L_0xaaacc0, C4<0>, C4<0>; -L_0xaaa330 .delay (10000,10000,10000) L_0xaaa330/d; -L_0xaaa9c0/d .functor NOR 1, L_0xaab030, L_0xaaadb0, C4<0>, C4<0>; -L_0xaaa9c0 .delay (10000,10000,10000) L_0xaaa9c0/d; -L_0xaaaf40/d .functor NOR 1, L_0xaaabe0, L_0xaab460, C4<0>, C4<0>; -L_0xaaaf40 .delay (10000,10000,10000) L_0xaaaf40/d; -L_0xaab170/d .functor NOR 1, L_0xaab270, L_0xaab810, C4<0>, C4<0>; -L_0xaab170 .delay (10000,10000,10000) L_0xaab170/d; -L_0xaab550/d .functor NOR 1, L_0xaab750, L_0xaab370, C4<0>, C4<0>; -L_0xaab550 .delay (10000,10000,10000) L_0xaab550/d; -L_0xaa0b80/d .functor NOR 1, L_0xaa7f60, L_0xaab950, C4<0>, C4<0>; -L_0xaa0b80 .delay (10000,10000,10000) L_0xaa0b80/d; -L_0xaa8300/d .functor NOR 1, L_0xaa85e0, L_0xaab650, C4<0>, C4<0>; -L_0xaa8300 .delay (10000,10000,10000) L_0xaa8300/d; -v0xa22360_0 .net *"_s0", 0 0, L_0xaa09e0; 1 drivers -v0xaa03c0_0 .net *"_s101", 0 0, L_0xaa8900; 1 drivers -v0xaa0460_0 .net *"_s102", 0 0, L_0xaa8d30; 1 drivers -v0xaa0500_0 .net *"_s105", 0 0, L_0xaa8f10; 1 drivers -v0xaa05b0_0 .net *"_s107", 0 0, L_0xaa8fb0; 1 drivers -v0xaa0650_0 .net *"_s108", 0 0, L_0xaa8c20; 1 drivers -v0xaa0730_0 .net *"_s11", 0 0, L_0xaa4e20; 1 drivers -v0xaa07d0_0 .net *"_s111", 0 0, L_0xaa9210; 1 drivers -v0xaa08c0_0 .net *"_s113", 0 0, L_0xaa9050; 1 drivers -v0xaa0960_0 .net *"_s114", 0 0, L_0xaa8cd0; 1 drivers -v0xaa0a60_0 .net *"_s117", 0 0, L_0xaa8e70; 1 drivers -v0xaa0b00_0 .net *"_s119", 0 0, L_0xaa9670; 1 drivers -v0xaa0c10_0 .net *"_s12", 0 0, L_0xaa5080; 1 drivers -v0xaa0cb0_0 .net *"_s120", 0 0, L_0xaa93a0; 1 drivers -v0xaa0dd0_0 .net *"_s123", 0 0, L_0xaa9950; 1 drivers -v0xaa0e70_0 .net *"_s125", 0 0, L_0xaa9760; 1 drivers -v0xaa0d30_0 .net *"_s126", 0 0, L_0xaa98f0; 1 drivers -v0xaa0fc0_0 .net *"_s129", 0 0, L_0xaa95c0; 1 drivers -v0xaa10e0_0 .net *"_s131", 0 0, L_0xaa9da0; 1 drivers -v0xaa1160_0 .net *"_s132", 0 0, L_0xaa9a90; 1 drivers -v0xaa1040_0 .net *"_s135", 0 0, L_0xaaa0b0; 1 drivers -v0xaa1290_0 .net *"_s137", 0 0, L_0xaa9e90; 1 drivers -v0xaa11e0_0 .net *"_s138", 0 0, L_0xaaa020; 1 drivers -v0xaa13d0_0 .net *"_s141", 0 0, L_0xaa9ce0; 1 drivers -v0xaa1330_0 .net *"_s143", 0 0, L_0xaaa540; 1 drivers -v0xaa1520_0 .net *"_s144", 0 0, L_0xaaa1f0; 1 drivers -v0xaa1470_0 .net *"_s147", 0 0, L_0xaaa880; 1 drivers -v0xaa1680_0 .net *"_s149", 0 0, L_0xaaa630; 1 drivers -v0xaa15c0_0 .net *"_s15", 0 0, L_0xaa5170; 1 drivers -v0xaa17f0_0 .net *"_s150", 0 0, L_0xaaa330; 1 drivers -v0xaa1700_0 .net *"_s153", 0 0, L_0xaaa470; 1 drivers -v0xaa1970_0 .net *"_s155", 0 0, L_0xaaacc0; 1 drivers -v0xaa1870_0 .net *"_s156", 0 0, L_0xaaa9c0; 1 drivers -v0xaa1b00_0 .net *"_s159", 0 0, L_0xaab030; 1 drivers -v0xaa19f0_0 .net *"_s161", 0 0, L_0xaaadb0; 1 drivers -v0xaa1ca0_0 .net *"_s162", 0 0, L_0xaaaf40; 1 drivers -v0xaa1b80_0 .net *"_s165", 0 0, L_0xaaabe0; 1 drivers -v0xaa1c20_0 .net *"_s167", 0 0, L_0xaab460; 1 drivers -v0xaa1e60_0 .net *"_s168", 0 0, L_0xaab170; 1 drivers -v0xaa1ee0_0 .net *"_s17", 0 0, L_0xaa52a0; 1 drivers -v0xaa1d20_0 .net *"_s171", 0 0, L_0xaab270; 1 drivers -v0xaa1dc0_0 .net *"_s173", 0 0, L_0xaab810; 1 drivers -v0xaa20c0_0 .net *"_s174", 0 0, L_0xaab550; 1 drivers -v0xaa2140_0 .net *"_s177", 0 0, L_0xaab750; 1 drivers -v0xaa1f60_0 .net *"_s179", 0 0, L_0xaab370; 1 drivers -v0xaa2000_0 .net *"_s18", 0 0, L_0xaa5520; 1 drivers -v0xaa2340_0 .net *"_s180", 0 0, L_0xaa0b80; 1 drivers -v0xaa23c0_0 .net *"_s183", 0 0, L_0xaa7f60; 1 drivers -v0xaa21e0_0 .net *"_s185", 0 0, L_0xaab950; 1 drivers -v0xaa2280_0 .net *"_s186", 0 0, L_0xaa8300; 1 drivers -v0xaa25e0_0 .net *"_s189", 0 0, L_0xaa85e0; 1 drivers -v0xaa2660_0 .net *"_s191", 0 0, L_0xaab650; 1 drivers -v0xaa2460_0 .net *"_s21", 0 0, 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0, 10, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4750_0, 0, 1; - %delay 5000000, 0; - %vpi_call 2 14 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4620_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 18 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4620_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 22 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 26 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xaa4620_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4620_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xaa4750_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 30 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; - %ix/load 0, 31, 0; - %set/x0 v0xaa4620_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4620_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0xaa4750_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0xaa4750_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0xaa4750_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0xaa4750_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 34 "$display", "%b %b | %b", v0xaa4620_0, v0xaa4750_0, v0xaa46a0_0; - %end; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 4; - "N/A"; - ""; - "nor_32bit.t.v"; - "./nor_32bit.v"; From 57fa00a9babc25a1c498b144bf4f837ff55a7a44 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:05:12 -0400 Subject: [PATCH 17/38] Delete slt --- slt | 1543 ----------------------------------------------------------- 1 file changed, 1543 deletions(-) delete mode 100755 slt diff --git a/slt b/slt deleted file mode 100755 index 73d9e70..0000000 --- a/slt +++ /dev/null @@ -1,1543 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "0.9.7 " "(v0_9_7)"; -:vpi_time_precision - 12; -:vpi_module "system"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0x2480cc0 .scope module, "test32bitslt" "test32bitslt" 2 4; - .timescale -9 -12; -v0x24d9d70_0 .var "a", 31 0; -v0x24d9df0_0 .net "ans", 31 0, L_0x24e8780; 1 drivers -v0x24d9e70_0 .var "b", 31 0; -S_0x2480000 .scope module, "slt" "full_slt_32bit" 2 9, 3 19, S_0x2480cc0; - .timescale -9 -12; -v0x24d7e90_0 .net *"_s129", 30 0, C4<0000000000000000000000000000000>; 1 drivers -v0x24d7f50_0 .net "a", 31 0, v0x24d9d70_0; 1 drivers -v0x24d7ff0_0 .net "b", 31 0, v0x24d9e70_0; 1 drivers -v0x24d8090_0 .alias "out", 31 0, v0x24d9df0_0; -v0x24d8140_0 .net "slt0", 0 0, L_0x24da190; 1 drivers -v0x24d8210_0 .net "slt1", 0 0, L_0x24da9a0; 1 drivers -v0x24d82e0_0 .net "slt10", 0 0, L_0x24dead0; 1 drivers -v0x24d83b0_0 .net "slt11", 0 0, L_0x24df1f0; 1 drivers -v0x24d84d0_0 .net "slt12", 0 0, L_0x24df900; 1 drivers -v0x24d85a0_0 .net "slt13", 0 0, L_0x24e0020; 1 drivers -v0x24d8680_0 .net "slt14", 0 0, L_0x24e0730; 1 drivers -v0x24d8750_0 .net "slt15", 0 0, L_0x24e1060; 1 drivers -v0x24d8890_0 .net "slt16", 0 0, L_0x24e1760; 1 drivers -v0x24d8960_0 .net "slt17", 0 0, L_0x24e1e70; 1 drivers -v0x24d8ab0_0 .net "slt18", 0 0, L_0x24e2580; 1 drivers -v0x24d8b80_0 .net "slt19", 0 0, L_0x24e2c90; 1 drivers -v0x24d89e0_0 .net "slt2", 0 0, L_0x24db080; 1 drivers -v0x24d8d30_0 .net "slt20", 0 0, L_0x24e33b0; 1 drivers -v0x24d8e50_0 .net "slt21", 0 0, L_0x24e3ac0; 1 drivers -v0x24d8f20_0 .net "slt22", 0 0, L_0x24e41d0; 1 drivers -v0x24d9050_0 .net "slt23", 0 0, L_0x24e48e0; 1 drivers -v0x24d90d0_0 .net "slt24", 0 0, L_0x24e5000; 1 drivers -v0x24d9210_0 .net "slt25", 0 0, L_0x24e5710; 1 drivers -v0x24d9290_0 .net "slt26", 0 0, L_0x24d8ff0; 1 drivers -v0x24d93e0_0 .net "slt27", 0 0, L_0x24e6530; 1 drivers -v0x24d9460_0 .net "slt28", 0 0, L_0x24e6c70; 1 drivers -v0x24d9360_0 .net "slt29", 0 0, L_0x24e73c0; 1 drivers -v0x24d9610_0 .net "slt3", 0 0, L_0x24db840; 1 drivers -v0x24d9530_0 .net "slt30", 0 0, L_0x24e7b00; 1 drivers -v0x24d97d0_0 .net "slt4", 0 0, L_0x24dbf50; 1 drivers -v0x24d96e0_0 .net "slt5", 0 0, L_0x24dc660; 1 drivers -v0x24d99a0_0 .net "slt6", 0 0, L_0x24dcd00; 1 drivers -v0x24d98a0_0 .net "slt7", 0 0, L_0x24dd5a0; 1 drivers -v0x24d9b80_0 .net "slt8", 0 0, L_0x24ddca0; 1 drivers -v0x24d9a70_0 .net "slt9", 0 0, L_0x24de3c0; 1 drivers -L_0x24da2d0 .part v0x24d9d70_0, 0, 1; -L_0x24da370 .part v0x24d9e70_0, 0, 1; -L_0x24dab00 .part v0x24d9d70_0, 1, 1; -L_0x24daba0 .part v0x24d9e70_0, 1, 1; -L_0x24db1e0 .part v0x24d9d70_0, 2, 1; -L_0x24db310 .part v0x24d9e70_0, 2, 1; -L_0x24db9a0 .part v0x24d9d70_0, 3, 1; -L_0x24dba40 .part v0x24d9e70_0, 3, 1; -L_0x24dc0b0 .part v0x24d9d70_0, 4, 1; -L_0x24dc150 .part v0x24d9e70_0, 4, 1; -L_0x24dc7c0 .part v0x24d9d70_0, 5, 1; -L_0x24dc860 .part v0x24d9e70_0, 5, 1; -L_0x24dce60 .part v0x24d9d70_0, 6, 1; -L_0x24dd010 .part v0x24d9e70_0, 6, 1; -L_0x24dd700 .part v0x24d9d70_0, 7, 1; -L_0x24dd7a0 .part v0x24d9e70_0, 7, 1; -L_0x24dde00 .part v0x24d9d70_0, 8, 1; -L_0x24ddea0 .part v0x24d9e70_0, 8, 1; -L_0x24de520 .part v0x24d9d70_0, 9, 1; -L_0x24de5c0 .part v0x24d9e70_0, 9, 1; -L_0x24dec30 .part v0x24d9d70_0, 10, 1; -L_0x24decd0 .part v0x24d9e70_0, 10, 1; -L_0x24df350 .part v0x24d9d70_0, 11, 1; -L_0x24df3f0 .part v0x24d9e70_0, 11, 1; -L_0x24dfa60 .part v0x24d9d70_0, 12, 1; -L_0x24dfb00 .part v0x24d9e70_0, 12, 1; -L_0x24e0180 .part v0x24d9d70_0, 13, 1; -L_0x24e0220 .part v0x24d9e70_0, 13, 1; -L_0x24e0890 .part v0x24d9d70_0, 14, 1; -L_0x24dcf00 .part v0x24d9e70_0, 14, 1; -L_0x24e11c0 .part v0x24d9d70_0, 15, 1; -L_0x24e1260 .part v0x24d9e70_0, 15, 1; -L_0x24e18c0 .part v0x24d9d70_0, 16, 1; -L_0x24e1960 .part v0x24d9e70_0, 16, 1; -L_0x24e1fd0 .part v0x24d9d70_0, 17, 1; -L_0x24e2070 .part v0x24d9e70_0, 17, 1; -L_0x24e26e0 .part v0x24d9d70_0, 18, 1; -L_0x24e2780 .part v0x24d9e70_0, 18, 1; -L_0x24e2df0 .part v0x24d9d70_0, 19, 1; -L_0x24e2e90 .part v0x24d9e70_0, 19, 1; -L_0x24e3510 .part v0x24d9d70_0, 20, 1; -L_0x24e35b0 .part v0x24d9e70_0, 20, 1; -L_0x24e3c20 .part v0x24d9d70_0, 21, 1; -L_0x24e3cc0 .part v0x24d9e70_0, 21, 1; -L_0x24e4330 .part v0x24d9d70_0, 22, 1; -L_0x24e43d0 .part v0x24d9e70_0, 22, 1; -L_0x24e4a40 .part v0x24d9d70_0, 23, 1; -L_0x24e4ae0 .part v0x24d9e70_0, 23, 1; -L_0x24e5160 .part v0x24d9d70_0, 24, 1; -L_0x24e5200 .part v0x24d9e70_0, 24, 1; -L_0x24e5870 .part v0x24d9d70_0, 25, 1; -L_0x24e5910 .part v0x24d9e70_0, 25, 1; -L_0x24e5f80 .part v0x24d9d70_0, 26, 1; -L_0x24e6020 .part v0x24d9e70_0, 26, 1; -L_0x24e6690 .part v0x24d9d70_0, 27, 1; -L_0x24e6730 .part v0x24d9e70_0, 27, 1; -L_0x24e6dd0 .part v0x24d9d70_0, 28, 1; -L_0x24e6e70 .part v0x24d9e70_0, 28, 1; -L_0x24e7520 .part v0x24d9d70_0, 29, 1; -L_0x24e75c0 .part v0x24d9e70_0, 29, 1; -L_0x24e7c60 .part v0x24d9d70_0, 30, 1; -L_0x24e0930 .part v0x24d9e70_0, 30, 1; -L_0x24e8780 .concat [ 1 31 0 0], L_0x24e8610, C4<0000000000000000000000000000000>; -L_0x24e8920 .part v0x24d9d70_0, 31, 1; -L_0x24e09d0 .part v0x24d9e70_0, 31, 1; -S_0x24d7860 .scope module, "bit0" "single_slt" 3 56, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24d8620/d .functor XOR 1, L_0x24da2d0, L_0x24da370, C4<0>, C4<0>; -L_0x24d8620 .delay (10000,10000,10000) L_0x24d8620/d; -L_0x24d9f40/d .functor AND 1, L_0x24da2d0, L_0x24d8620, C4<1>, C4<1>; -L_0x24d9f40 .delay (10000,10000,10000) L_0x24d9f40/d; -L_0x24da040/d .functor NOT 1, L_0x24d8620, C4<0>, C4<0>, C4<0>; -L_0x24da040 .delay (10000,10000,10000) L_0x24da040/d; -L_0x24da0a0/d .functor AND 1, L_0x24da040, C4<0>, C4<1>, C4<1>; -L_0x24da0a0 .delay (10000,10000,10000) L_0x24da0a0/d; -L_0x24da190/d .functor OR 1, L_0x24d9f40, L_0x24da0a0, C4<0>, C4<0>; -L_0x24da190 .delay (10000,10000,10000) L_0x24da190/d; -v0x24d7950_0 .net "a", 0 0, L_0x24da2d0; 1 drivers -v0x24d7a10_0 .net "abxor", 0 0, L_0x24d8620; 1 drivers -v0x24d7ab0_0 .net "axorand", 0 0, L_0x24d9f40; 1 drivers -v0x24d7b50_0 .net "b", 0 0, L_0x24da370; 1 drivers -v0x24d7c00_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers -v0x24d7ca0_0 .alias "out", 0 0, v0x24d8140_0; -v0x24d7d20_0 .net "xornot", 0 0, L_0x24da040; 1 drivers -v0x24d7da0_0 .net "xornotand", 0 0, L_0x24da0a0; 1 drivers -S_0x24d7230 .scope module, "bit1" "single_slt" 3 57, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24da540/d .functor XOR 1, L_0x24dab00, L_0x24daba0, C4<0>, C4<0>; -L_0x24da540 .delay (10000,10000,10000) L_0x24da540/d; -L_0x24da650/d .functor AND 1, L_0x24dab00, L_0x24da540, C4<1>, C4<1>; -L_0x24da650 .delay (10000,10000,10000) L_0x24da650/d; -L_0x24da790/d .functor NOT 1, L_0x24da540, C4<0>, C4<0>, C4<0>; -L_0x24da790 .delay (10000,10000,10000) L_0x24da790/d; -L_0x24da850/d .functor AND 1, L_0x24da790, L_0x24da190, C4<1>, C4<1>; -L_0x24da850 .delay (10000,10000,10000) L_0x24da850/d; -L_0x24da9a0/d .functor OR 1, L_0x24da650, L_0x24da850, C4<0>, C4<0>; -L_0x24da9a0 .delay (10000,10000,10000) L_0x24da9a0/d; -v0x24d7320_0 .net "a", 0 0, L_0x24dab00; 1 drivers -v0x24d73e0_0 .net "abxor", 0 0, L_0x24da540; 1 drivers -v0x24d7480_0 .net "axorand", 0 0, L_0x24da650; 1 drivers -v0x24d7520_0 .net "b", 0 0, L_0x24daba0; 1 drivers -v0x24d75d0_0 .alias "defaultCompare", 0 0, v0x24d8140_0; -v0x24d7670_0 .alias "out", 0 0, v0x24d8210_0; -v0x24d76f0_0 .net "xornot", 0 0, L_0x24da790; 1 drivers -v0x24d7770_0 .net "xornotand", 0 0, L_0x24da850; 1 drivers -S_0x24d6c00 .scope module, "bit2" "single_slt" 3 58, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dac40/d .functor XOR 1, L_0x24db1e0, L_0x24db310, C4<0>, C4<0>; -L_0x24dac40 .delay (10000,10000,10000) L_0x24dac40/d; -L_0x24dad30/d .functor AND 1, L_0x24db1e0, L_0x24dac40, C4<1>, C4<1>; -L_0x24dad30 .delay (10000,10000,10000) L_0x24dad30/d; -L_0x24dae70/d .functor NOT 1, L_0x24dac40, C4<0>, C4<0>, C4<0>; -L_0x24dae70 .delay (10000,10000,10000) L_0x24dae70/d; -L_0x24daf30/d .functor AND 1, L_0x24dae70, L_0x24da9a0, C4<1>, C4<1>; -L_0x24daf30 .delay (10000,10000,10000) L_0x24daf30/d; -L_0x24db080/d .functor OR 1, L_0x24dad30, L_0x24daf30, C4<0>, C4<0>; -L_0x24db080 .delay (10000,10000,10000) L_0x24db080/d; -v0x24d6cf0_0 .net "a", 0 0, L_0x24db1e0; 1 drivers -v0x24d6db0_0 .net "abxor", 0 0, L_0x24dac40; 1 drivers -v0x24d6e50_0 .net "axorand", 0 0, L_0x24dad30; 1 drivers -v0x24d6ef0_0 .net "b", 0 0, L_0x24db310; 1 drivers -v0x24d6fa0_0 .alias "defaultCompare", 0 0, v0x24d8210_0; -v0x24d7040_0 .alias "out", 0 0, v0x24d89e0_0; -v0x24d70c0_0 .net "xornot", 0 0, L_0x24dae70; 1 drivers -v0x24d7140_0 .net "xornotand", 0 0, L_0x24daf30; 1 drivers -S_0x24d65d0 .scope module, "bit3" "single_slt" 3 59, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24db480/d .functor XOR 1, L_0x24db9a0, L_0x24dba40, C4<0>, C4<0>; -L_0x24db480 .delay (10000,10000,10000) L_0x24db480/d; -L_0x24db540/d .functor AND 1, L_0x24db9a0, L_0x24db480, C4<1>, C4<1>; -L_0x24db540 .delay (10000,10000,10000) L_0x24db540/d; -L_0x24db630/d .functor NOT 1, L_0x24db480, C4<0>, C4<0>, C4<0>; -L_0x24db630 .delay (10000,10000,10000) L_0x24db630/d; -L_0x24db6f0/d .functor AND 1, L_0x24db630, L_0x24db080, C4<1>, C4<1>; -L_0x24db6f0 .delay (10000,10000,10000) L_0x24db6f0/d; -L_0x24db840/d .functor OR 1, L_0x24db540, L_0x24db6f0, C4<0>, C4<0>; -L_0x24db840 .delay (10000,10000,10000) L_0x24db840/d; -v0x24d66c0_0 .net "a", 0 0, L_0x24db9a0; 1 drivers -v0x24d6780_0 .net "abxor", 0 0, L_0x24db480; 1 drivers -v0x24d6820_0 .net "axorand", 0 0, L_0x24db540; 1 drivers -v0x24d68c0_0 .net "b", 0 0, L_0x24dba40; 1 drivers -v0x24d6970_0 .alias "defaultCompare", 0 0, v0x24d89e0_0; -v0x24d6a10_0 .alias "out", 0 0, v0x24d9610_0; -v0x24d6a90_0 .net "xornot", 0 0, L_0x24db630; 1 drivers -v0x24d6b10_0 .net "xornotand", 0 0, L_0x24db6f0; 1 drivers -S_0x24d5fa0 .scope module, "bit4" "single_slt" 3 60, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dbb30/d .functor XOR 1, L_0x24dc0b0, L_0x24dc150, C4<0>, C4<0>; -L_0x24dbb30 .delay (10000,10000,10000) L_0x24dbb30/d; -L_0x24dbc00/d .functor AND 1, L_0x24dc0b0, L_0x24dbb30, C4<1>, C4<1>; -L_0x24dbc00 .delay (10000,10000,10000) L_0x24dbc00/d; -L_0x24dbd40/d .functor NOT 1, L_0x24dbb30, C4<0>, C4<0>, C4<0>; -L_0x24dbd40 .delay (10000,10000,10000) L_0x24dbd40/d; -L_0x24dbe00/d .functor AND 1, L_0x24dbd40, L_0x24db840, C4<1>, C4<1>; -L_0x24dbe00 .delay (10000,10000,10000) L_0x24dbe00/d; -L_0x24dbf50/d .functor OR 1, L_0x24dbc00, L_0x24dbe00, C4<0>, C4<0>; -L_0x24dbf50 .delay (10000,10000,10000) L_0x24dbf50/d; -v0x24d6090_0 .net "a", 0 0, L_0x24dc0b0; 1 drivers -v0x24d6110_0 .net "abxor", 0 0, L_0x24dbb30; 1 drivers -v0x24d61b0_0 .net "axorand", 0 0, L_0x24dbc00; 1 drivers -v0x24d6250_0 .net "b", 0 0, L_0x24dc150; 1 drivers -v0x24d6300_0 .alias "defaultCompare", 0 0, v0x24d9610_0; -v0x24d63a0_0 .alias "out", 0 0, v0x24d97d0_0; -v0x24d6460_0 .net "xornot", 0 0, L_0x24dbd40; 1 drivers -v0x24d64e0_0 .net "xornotand", 0 0, L_0x24dbe00; 1 drivers -S_0x24d5970 .scope module, "bit5" "single_slt" 3 61, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dc250/d .functor XOR 1, L_0x24dc7c0, L_0x24dc860, C4<0>, C4<0>; -L_0x24dc250 .delay (10000,10000,10000) L_0x24dc250/d; -L_0x24dc310/d .functor AND 1, L_0x24dc7c0, L_0x24dc250, C4<1>, C4<1>; -L_0x24dc310 .delay (10000,10000,10000) L_0x24dc310/d; -L_0x24dc450/d .functor NOT 1, L_0x24dc250, C4<0>, C4<0>, C4<0>; -L_0x24dc450 .delay (10000,10000,10000) L_0x24dc450/d; -L_0x24dc510/d .functor AND 1, L_0x24dc450, L_0x24dbf50, C4<1>, C4<1>; -L_0x24dc510 .delay (10000,10000,10000) L_0x24dc510/d; -L_0x24dc660/d .functor OR 1, L_0x24dc310, L_0x24dc510, C4<0>, C4<0>; -L_0x24dc660 .delay (10000,10000,10000) L_0x24dc660/d; -v0x24d5a60_0 .net "a", 0 0, L_0x24dc7c0; 1 drivers -v0x24d5b20_0 .net "abxor", 0 0, L_0x24dc250; 1 drivers -v0x24d5bc0_0 .net "axorand", 0 0, L_0x24dc310; 1 drivers -v0x24d5c60_0 .net "b", 0 0, L_0x24dc860; 1 drivers -v0x24d5d10_0 .alias "defaultCompare", 0 0, v0x24d97d0_0; -v0x24d5db0_0 .alias "out", 0 0, v0x24d96e0_0; -v0x24d5e30_0 .net "xornot", 0 0, L_0x24dc450; 1 drivers -v0x24d5eb0_0 .net "xornotand", 0 0, L_0x24dc510; 1 drivers -S_0x24d5340 .scope module, "bit6" "single_slt" 3 62, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dc1f0/d .functor XOR 1, L_0x24dce60, L_0x24dd010, C4<0>, C4<0>; -L_0x24dc1f0 .delay (10000,10000,10000) L_0x24dc1f0/d; -L_0x24dc9b0/d .functor AND 1, L_0x24dce60, L_0x24dc1f0, C4<1>, C4<1>; -L_0x24dc9b0 .delay (10000,10000,10000) L_0x24dc9b0/d; -L_0x24dcaf0/d .functor NOT 1, L_0x24dc1f0, C4<0>, C4<0>, C4<0>; -L_0x24dcaf0 .delay (10000,10000,10000) L_0x24dcaf0/d; -L_0x24dcbb0/d .functor AND 1, L_0x24dcaf0, L_0x24dc660, C4<1>, C4<1>; -L_0x24dcbb0 .delay (10000,10000,10000) L_0x24dcbb0/d; -L_0x24dcd00/d .functor OR 1, L_0x24dc9b0, L_0x24dcbb0, C4<0>, C4<0>; -L_0x24dcd00 .delay (10000,10000,10000) L_0x24dcd00/d; -v0x24d5430_0 .net "a", 0 0, L_0x24dce60; 1 drivers -v0x24d54f0_0 .net "abxor", 0 0, L_0x24dc1f0; 1 drivers -v0x24d5590_0 .net "axorand", 0 0, L_0x24dc9b0; 1 drivers -v0x24d5630_0 .net "b", 0 0, L_0x24dd010; 1 drivers -v0x24d56e0_0 .alias "defaultCompare", 0 0, v0x24d96e0_0; -v0x24d5780_0 .alias "out", 0 0, v0x24d99a0_0; -v0x24d5800_0 .net "xornot", 0 0, L_0x24dcaf0; 1 drivers -v0x24d5880_0 .net "xornotand", 0 0, L_0x24dcbb0; 1 drivers -S_0x24d4d10 .scope module, "bit7" "single_slt" 3 63, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24db3b0/d .functor XOR 1, L_0x24dd700, L_0x24dd7a0, C4<0>, C4<0>; -L_0x24db3b0 .delay (10000,10000,10000) L_0x24db3b0/d; -L_0x24dd250/d .functor AND 1, L_0x24dd700, L_0x24db3b0, C4<1>, C4<1>; -L_0x24dd250 .delay (10000,10000,10000) L_0x24dd250/d; -L_0x24dd390/d .functor NOT 1, L_0x24db3b0, C4<0>, C4<0>, C4<0>; -L_0x24dd390 .delay (10000,10000,10000) L_0x24dd390/d; -L_0x24dd450/d .functor AND 1, L_0x24dd390, L_0x24dcd00, C4<1>, C4<1>; -L_0x24dd450 .delay (10000,10000,10000) L_0x24dd450/d; -L_0x24dd5a0/d .functor OR 1, L_0x24dd250, L_0x24dd450, C4<0>, C4<0>; -L_0x24dd5a0 .delay (10000,10000,10000) L_0x24dd5a0/d; -v0x24d4e00_0 .net "a", 0 0, L_0x24dd700; 1 drivers -v0x24d4ec0_0 .net "abxor", 0 0, L_0x24db3b0; 1 drivers -v0x24d4f60_0 .net "axorand", 0 0, L_0x24dd250; 1 drivers -v0x24d5000_0 .net "b", 0 0, L_0x24dd7a0; 1 drivers -v0x24d50b0_0 .alias "defaultCompare", 0 0, v0x24d99a0_0; -v0x24d5150_0 .alias "out", 0 0, v0x24d98a0_0; -v0x24d51d0_0 .net "xornot", 0 0, L_0x24dd390; 1 drivers -v0x24d5250_0 .net "xornotand", 0 0, L_0x24dd450; 1 drivers -S_0x24d46e0 .scope module, "bit8" "single_slt" 3 64, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dd840/d .functor XOR 1, L_0x24dde00, L_0x24ddea0, C4<0>, C4<0>; -L_0x24dd840 .delay (10000,10000,10000) L_0x24dd840/d; -L_0x24dd950/d .functor AND 1, L_0x24dde00, L_0x24dd840, C4<1>, C4<1>; -L_0x24dd950 .delay (10000,10000,10000) L_0x24dd950/d; -L_0x24dda90/d .functor NOT 1, L_0x24dd840, C4<0>, C4<0>, C4<0>; -L_0x24dda90 .delay (10000,10000,10000) L_0x24dda90/d; -L_0x24ddb50/d .functor AND 1, L_0x24dda90, L_0x24dd5a0, C4<1>, C4<1>; -L_0x24ddb50 .delay (10000,10000,10000) L_0x24ddb50/d; -L_0x24ddca0/d .functor OR 1, L_0x24dd950, L_0x24ddb50, C4<0>, C4<0>; -L_0x24ddca0 .delay (10000,10000,10000) L_0x24ddca0/d; -v0x24d47d0_0 .net "a", 0 0, L_0x24dde00; 1 drivers -v0x24d4890_0 .net "abxor", 0 0, L_0x24dd840; 1 drivers -v0x24d4930_0 .net "axorand", 0 0, L_0x24dd950; 1 drivers -v0x24d49d0_0 .net "b", 0 0, L_0x24ddea0; 1 drivers -v0x24d4a80_0 .alias "defaultCompare", 0 0, v0x24d98a0_0; -v0x24d4b20_0 .alias "out", 0 0, v0x24d9b80_0; -v0x24d4ba0_0 .net "xornot", 0 0, L_0x24dda90; 1 drivers -v0x24d4c20_0 .net "xornotand", 0 0, L_0x24ddb50; 1 drivers -S_0x24d40b0 .scope module, "bit9" "single_slt" 3 65, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24db280/d .functor XOR 1, L_0x24de520, L_0x24de5c0, C4<0>, C4<0>; -L_0x24db280 .delay (10000,10000,10000) L_0x24db280/d; -L_0x24de070/d .functor AND 1, L_0x24de520, L_0x24db280, C4<1>, C4<1>; -L_0x24de070 .delay (10000,10000,10000) L_0x24de070/d; -L_0x24de1b0/d .functor NOT 1, L_0x24db280, C4<0>, C4<0>, C4<0>; -L_0x24de1b0 .delay (10000,10000,10000) L_0x24de1b0/d; -L_0x24de270/d .functor AND 1, L_0x24de1b0, L_0x24ddca0, C4<1>, C4<1>; -L_0x24de270 .delay (10000,10000,10000) L_0x24de270/d; -L_0x24de3c0/d .functor OR 1, L_0x24de070, L_0x24de270, C4<0>, C4<0>; -L_0x24de3c0 .delay (10000,10000,10000) L_0x24de3c0/d; -v0x24d41a0_0 .net "a", 0 0, L_0x24de520; 1 drivers -v0x24d4260_0 .net "abxor", 0 0, L_0x24db280; 1 drivers -v0x24d4300_0 .net "axorand", 0 0, L_0x24de070; 1 drivers -v0x24d43a0_0 .net "b", 0 0, L_0x24de5c0; 1 drivers -v0x24d4450_0 .alias "defaultCompare", 0 0, v0x24d9b80_0; -v0x24d44f0_0 .alias "out", 0 0, v0x24d9a70_0; -v0x24d4570_0 .net "xornot", 0 0, L_0x24de1b0; 1 drivers -v0x24d45f0_0 .net "xornotand", 0 0, L_0x24de270; 1 drivers -S_0x24d3a80 .scope module, "bit10" "single_slt" 3 66, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24ddf40/d .functor XOR 1, L_0x24dec30, L_0x24decd0, C4<0>, C4<0>; -L_0x24ddf40 .delay (10000,10000,10000) L_0x24ddf40/d; -L_0x24de7a0/d .functor AND 1, L_0x24dec30, L_0x24ddf40, C4<1>, C4<1>; -L_0x24de7a0 .delay (10000,10000,10000) L_0x24de7a0/d; -L_0x24de8e0/d .functor NOT 1, L_0x24ddf40, C4<0>, C4<0>, C4<0>; -L_0x24de8e0 .delay (10000,10000,10000) L_0x24de8e0/d; -L_0x24de980/d .functor AND 1, L_0x24de8e0, L_0x24de3c0, C4<1>, C4<1>; -L_0x24de980 .delay (10000,10000,10000) L_0x24de980/d; -L_0x24dead0/d .functor OR 1, L_0x24de7a0, L_0x24de980, C4<0>, C4<0>; -L_0x24dead0 .delay (10000,10000,10000) L_0x24dead0/d; -v0x24d3b70_0 .net "a", 0 0, L_0x24dec30; 1 drivers -v0x24d3c30_0 .net "abxor", 0 0, L_0x24ddf40; 1 drivers -v0x24d3cd0_0 .net "axorand", 0 0, L_0x24de7a0; 1 drivers -v0x24d3d70_0 .net "b", 0 0, L_0x24decd0; 1 drivers -v0x24d3e20_0 .alias "defaultCompare", 0 0, v0x24d9a70_0; -v0x24d3ec0_0 .alias "out", 0 0, v0x24d82e0_0; -v0x24d3f40_0 .net "xornot", 0 0, L_0x24de8e0; 1 drivers -v0x24d3fc0_0 .net "xornotand", 0 0, L_0x24de980; 1 drivers -S_0x24d3450 .scope module, "bit11" "single_slt" 3 67, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24de660/d .functor XOR 1, L_0x24df350, L_0x24df3f0, C4<0>, C4<0>; -L_0x24de660 .delay (10000,10000,10000) L_0x24de660/d; -L_0x24deec0/d .functor AND 1, L_0x24df350, L_0x24de660, C4<1>, C4<1>; -L_0x24deec0 .delay (10000,10000,10000) L_0x24deec0/d; -L_0x24df000/d .functor NOT 1, L_0x24de660, C4<0>, C4<0>, C4<0>; -L_0x24df000 .delay (10000,10000,10000) L_0x24df000/d; -L_0x24df0a0/d .functor AND 1, L_0x24df000, L_0x24dead0, C4<1>, C4<1>; -L_0x24df0a0 .delay (10000,10000,10000) L_0x24df0a0/d; -L_0x24df1f0/d .functor OR 1, L_0x24deec0, L_0x24df0a0, C4<0>, C4<0>; -L_0x24df1f0 .delay (10000,10000,10000) L_0x24df1f0/d; -v0x24d3540_0 .net "a", 0 0, L_0x24df350; 1 drivers -v0x24d3600_0 .net "abxor", 0 0, L_0x24de660; 1 drivers -v0x24d36a0_0 .net "axorand", 0 0, L_0x24deec0; 1 drivers -v0x24d3740_0 .net "b", 0 0, L_0x24df3f0; 1 drivers -v0x24d37f0_0 .alias "defaultCompare", 0 0, v0x24d82e0_0; -v0x24d3890_0 .alias "out", 0 0, v0x24d83b0_0; -v0x24d3910_0 .net "xornot", 0 0, L_0x24df000; 1 drivers -v0x24d3990_0 .net "xornotand", 0 0, L_0x24df0a0; 1 drivers -S_0x24d2e20 .scope module, "bit12" "single_slt" 3 68, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24ded70/d .functor XOR 1, L_0x24dfa60, L_0x24dfb00, C4<0>, C4<0>; -L_0x24ded70 .delay (10000,10000,10000) L_0x24ded70/d; -L_0x24df5b0/d .functor AND 1, L_0x24dfa60, L_0x24ded70, C4<1>, C4<1>; -L_0x24df5b0 .delay (10000,10000,10000) L_0x24df5b0/d; -L_0x24df6f0/d .functor NOT 1, L_0x24ded70, C4<0>, C4<0>, C4<0>; -L_0x24df6f0 .delay (10000,10000,10000) L_0x24df6f0/d; -L_0x24df7b0/d .functor AND 1, L_0x24df6f0, L_0x24df1f0, C4<1>, C4<1>; -L_0x24df7b0 .delay (10000,10000,10000) L_0x24df7b0/d; -L_0x24df900/d .functor OR 1, L_0x24df5b0, L_0x24df7b0, C4<0>, C4<0>; -L_0x24df900 .delay (10000,10000,10000) L_0x24df900/d; -v0x24d2f10_0 .net "a", 0 0, L_0x24dfa60; 1 drivers -v0x24d2fd0_0 .net "abxor", 0 0, L_0x24ded70; 1 drivers -v0x24d3070_0 .net "axorand", 0 0, L_0x24df5b0; 1 drivers -v0x24d3110_0 .net "b", 0 0, L_0x24dfb00; 1 drivers -v0x24d31c0_0 .alias "defaultCompare", 0 0, v0x24d83b0_0; -v0x24d3260_0 .alias "out", 0 0, v0x24d84d0_0; -v0x24d32e0_0 .net "xornot", 0 0, L_0x24df6f0; 1 drivers -v0x24d3360_0 .net "xornotand", 0 0, L_0x24df7b0; 1 drivers -S_0x24d27f0 .scope module, "bit13" "single_slt" 3 69, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24df490/d .functor XOR 1, L_0x24e0180, L_0x24e0220, C4<0>, C4<0>; -L_0x24df490 .delay (10000,10000,10000) L_0x24df490/d; -L_0x24dfcd0/d .functor AND 1, L_0x24e0180, L_0x24df490, C4<1>, C4<1>; -L_0x24dfcd0 .delay (10000,10000,10000) L_0x24dfcd0/d; -L_0x24dfe10/d .functor NOT 1, L_0x24df490, C4<0>, C4<0>, C4<0>; -L_0x24dfe10 .delay (10000,10000,10000) L_0x24dfe10/d; -L_0x24dfed0/d .functor AND 1, L_0x24dfe10, L_0x24df900, C4<1>, C4<1>; -L_0x24dfed0 .delay (10000,10000,10000) L_0x24dfed0/d; -L_0x24e0020/d .functor OR 1, L_0x24dfcd0, L_0x24dfed0, C4<0>, C4<0>; -L_0x24e0020 .delay (10000,10000,10000) L_0x24e0020/d; -v0x24d28e0_0 .net "a", 0 0, L_0x24e0180; 1 drivers -v0x24d29a0_0 .net "abxor", 0 0, L_0x24df490; 1 drivers -v0x24d2a40_0 .net "axorand", 0 0, L_0x24dfcd0; 1 drivers -v0x24d2ae0_0 .net "b", 0 0, L_0x24e0220; 1 drivers -v0x24d2b90_0 .alias "defaultCompare", 0 0, v0x24d84d0_0; -v0x24d2c30_0 .alias "out", 0 0, v0x24d85a0_0; -v0x24d2cb0_0 .net "xornot", 0 0, L_0x24dfe10; 1 drivers -v0x24d2d30_0 .net "xornotand", 0 0, L_0x24dfed0; 1 drivers -S_0x24d21c0 .scope module, "bit14" "single_slt" 3 70, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dfba0/d .functor XOR 1, L_0x24e0890, L_0x24dcf00, C4<0>, C4<0>; -L_0x24dfba0 .delay (10000,10000,10000) L_0x24dfba0/d; -L_0x24e0400/d .functor AND 1, L_0x24e0890, L_0x24dfba0, C4<1>, C4<1>; -L_0x24e0400 .delay (10000,10000,10000) L_0x24e0400/d; -L_0x24e0540/d .functor NOT 1, L_0x24dfba0, C4<0>, C4<0>, C4<0>; -L_0x24e0540 .delay (10000,10000,10000) L_0x24e0540/d; -L_0x24e05e0/d .functor AND 1, L_0x24e0540, L_0x24e0020, C4<1>, C4<1>; -L_0x24e05e0 .delay (10000,10000,10000) L_0x24e05e0/d; -L_0x24e0730/d .functor OR 1, L_0x24e0400, L_0x24e05e0, C4<0>, C4<0>; -L_0x24e0730 .delay (10000,10000,10000) L_0x24e0730/d; -v0x24d22b0_0 .net "a", 0 0, L_0x24e0890; 1 drivers -v0x24d2370_0 .net "abxor", 0 0, L_0x24dfba0; 1 drivers -v0x24d2410_0 .net "axorand", 0 0, L_0x24e0400; 1 drivers -v0x24d24b0_0 .net "b", 0 0, L_0x24dcf00; 1 drivers -v0x24d2560_0 .alias "defaultCompare", 0 0, v0x24d85a0_0; -v0x24d2600_0 .alias "out", 0 0, v0x24d8680_0; -v0x24d2680_0 .net "xornot", 0 0, L_0x24e0540; 1 drivers -v0x24d2700_0 .net "xornotand", 0 0, L_0x24e05e0; 1 drivers -S_0x24d1b90 .scope module, "bit15" "single_slt" 3 71, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dcfa0/d .functor XOR 1, L_0x24e11c0, L_0x24e1260, C4<0>, C4<0>; -L_0x24dcfa0 .delay (10000,10000,10000) L_0x24dcfa0/d; -L_0x24e0d50/d .functor AND 1, L_0x24e11c0, L_0x24dcfa0, C4<1>, C4<1>; -L_0x24e0d50 .delay (10000,10000,10000) L_0x24e0d50/d; -L_0x24e0e50/d .functor NOT 1, L_0x24dcfa0, C4<0>, C4<0>, C4<0>; -L_0x24e0e50 .delay (10000,10000,10000) L_0x24e0e50/d; -L_0x24e0f10/d .functor AND 1, L_0x24e0e50, L_0x24e0730, C4<1>, C4<1>; -L_0x24e0f10 .delay (10000,10000,10000) L_0x24e0f10/d; -L_0x24e1060/d .functor OR 1, L_0x24e0d50, L_0x24e0f10, C4<0>, C4<0>; -L_0x24e1060 .delay (10000,10000,10000) L_0x24e1060/d; -v0x24d1c80_0 .net "a", 0 0, L_0x24e11c0; 1 drivers -v0x24d1d40_0 .net "abxor", 0 0, L_0x24dcfa0; 1 drivers -v0x24d1de0_0 .net "axorand", 0 0, L_0x24e0d50; 1 drivers -v0x24d1e80_0 .net "b", 0 0, L_0x24e1260; 1 drivers -v0x24d1f30_0 .alias "defaultCompare", 0 0, v0x24d8680_0; -v0x24d1fd0_0 .alias "out", 0 0, v0x24d8750_0; -v0x24d2050_0 .net "xornot", 0 0, L_0x24e0e50; 1 drivers -v0x24d20d0_0 .net "xornotand", 0 0, L_0x24e0f10; 1 drivers -S_0x24d1560 .scope module, "bit16" "single_slt" 3 72, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e1300/d .functor XOR 1, L_0x24e18c0, L_0x24e1960, C4<0>, C4<0>; -L_0x24e1300 .delay (10000,10000,10000) L_0x24e1300/d; -L_0x24e1410/d .functor AND 1, L_0x24e18c0, L_0x24e1300, C4<1>, C4<1>; -L_0x24e1410 .delay (10000,10000,10000) L_0x24e1410/d; -L_0x24e1550/d .functor NOT 1, L_0x24e1300, C4<0>, C4<0>, C4<0>; -L_0x24e1550 .delay (10000,10000,10000) L_0x24e1550/d; -L_0x24e1610/d .functor AND 1, L_0x24e1550, L_0x24e1060, C4<1>, C4<1>; -L_0x24e1610 .delay (10000,10000,10000) L_0x24e1610/d; -L_0x24e1760/d .functor OR 1, L_0x24e1410, L_0x24e1610, C4<0>, C4<0>; -L_0x24e1760 .delay (10000,10000,10000) L_0x24e1760/d; -v0x24d1650_0 .net "a", 0 0, L_0x24e18c0; 1 drivers -v0x24d1710_0 .net "abxor", 0 0, L_0x24e1300; 1 drivers -v0x24d17b0_0 .net "axorand", 0 0, L_0x24e1410; 1 drivers -v0x24d1850_0 .net "b", 0 0, L_0x24e1960; 1 drivers -v0x24d1900_0 .alias "defaultCompare", 0 0, v0x24d8750_0; -v0x24d19a0_0 .alias "out", 0 0, v0x24d8890_0; -v0x24d1a20_0 .net "xornot", 0 0, L_0x24e1550; 1 drivers -v0x24d1aa0_0 .net "xornotand", 0 0, L_0x24e1610; 1 drivers -S_0x24d0f30 .scope module, "bit17" "single_slt" 3 73, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24dd0b0/d .functor XOR 1, L_0x24e1fd0, L_0x24e2070, C4<0>, C4<0>; -L_0x24dd0b0 .delay (10000,10000,10000) L_0x24dd0b0/d; -L_0x24e1b20/d .functor AND 1, L_0x24e1fd0, L_0x24dd0b0, C4<1>, C4<1>; -L_0x24e1b20 .delay (10000,10000,10000) L_0x24e1b20/d; -L_0x24e1c60/d .functor NOT 1, L_0x24dd0b0, C4<0>, C4<0>, C4<0>; -L_0x24e1c60 .delay (10000,10000,10000) L_0x24e1c60/d; -L_0x24e1d20/d .functor AND 1, L_0x24e1c60, L_0x24e1760, C4<1>, C4<1>; -L_0x24e1d20 .delay (10000,10000,10000) L_0x24e1d20/d; -L_0x24e1e70/d .functor OR 1, L_0x24e1b20, L_0x24e1d20, C4<0>, C4<0>; -L_0x24e1e70 .delay (10000,10000,10000) L_0x24e1e70/d; -v0x24d1020_0 .net "a", 0 0, L_0x24e1fd0; 1 drivers -v0x24d10e0_0 .net "abxor", 0 0, L_0x24dd0b0; 1 drivers -v0x24d1180_0 .net "axorand", 0 0, L_0x24e1b20; 1 drivers -v0x24d1220_0 .net "b", 0 0, L_0x24e2070; 1 drivers -v0x24d12d0_0 .alias "defaultCompare", 0 0, v0x24d8890_0; -v0x24d1370_0 .alias "out", 0 0, v0x24d8960_0; -v0x24d13f0_0 .net "xornot", 0 0, L_0x24e1c60; 1 drivers -v0x24d1470_0 .net "xornotand", 0 0, L_0x24e1d20; 1 drivers -S_0x24d0900 .scope module, "bit18" "single_slt" 3 74, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e1a00/d .functor XOR 1, L_0x24e26e0, L_0x24e2780, C4<0>, C4<0>; -L_0x24e1a00 .delay (10000,10000,10000) L_0x24e1a00/d; -L_0x24e1ac0/d .functor AND 1, L_0x24e26e0, L_0x24e1a00, C4<1>, C4<1>; -L_0x24e1ac0 .delay (10000,10000,10000) L_0x24e1ac0/d; -L_0x24e2370/d .functor NOT 1, L_0x24e1a00, C4<0>, C4<0>, C4<0>; -L_0x24e2370 .delay (10000,10000,10000) L_0x24e2370/d; -L_0x24e2430/d .functor AND 1, L_0x24e2370, L_0x24e1e70, C4<1>, C4<1>; -L_0x24e2430 .delay (10000,10000,10000) L_0x24e2430/d; -L_0x24e2580/d .functor OR 1, L_0x24e1ac0, L_0x24e2430, C4<0>, C4<0>; -L_0x24e2580 .delay (10000,10000,10000) L_0x24e2580/d; -v0x24d09f0_0 .net "a", 0 0, L_0x24e26e0; 1 drivers -v0x24d0ab0_0 .net "abxor", 0 0, L_0x24e1a00; 1 drivers -v0x24d0b50_0 .net "axorand", 0 0, L_0x24e1ac0; 1 drivers -v0x24d0bf0_0 .net "b", 0 0, L_0x24e2780; 1 drivers -v0x24d0ca0_0 .alias "defaultCompare", 0 0, v0x24d8960_0; -v0x24d0d40_0 .alias "out", 0 0, v0x24d8ab0_0; -v0x24d0dc0_0 .net "xornot", 0 0, L_0x24e2370; 1 drivers -v0x24d0e40_0 .net "xornotand", 0 0, L_0x24e2430; 1 drivers -S_0x24d02d0 .scope module, "bit19" "single_slt" 3 75, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e2110/d .functor XOR 1, L_0x24e2df0, L_0x24e2e90, C4<0>, C4<0>; -L_0x24e2110 .delay (10000,10000,10000) L_0x24e2110/d; -L_0x24e2960/d .functor AND 1, L_0x24e2df0, L_0x24e2110, C4<1>, C4<1>; -L_0x24e2960 .delay (10000,10000,10000) L_0x24e2960/d; -L_0x24e2aa0/d .functor NOT 1, L_0x24e2110, C4<0>, C4<0>, C4<0>; -L_0x24e2aa0 .delay (10000,10000,10000) L_0x24e2aa0/d; -L_0x24e2b40/d .functor AND 1, L_0x24e2aa0, L_0x24e2580, C4<1>, C4<1>; -L_0x24e2b40 .delay (10000,10000,10000) L_0x24e2b40/d; -L_0x24e2c90/d .functor OR 1, L_0x24e2960, L_0x24e2b40, C4<0>, C4<0>; -L_0x24e2c90 .delay (10000,10000,10000) L_0x24e2c90/d; -v0x24d03c0_0 .net "a", 0 0, L_0x24e2df0; 1 drivers -v0x24d0480_0 .net "abxor", 0 0, L_0x24e2110; 1 drivers -v0x24d0520_0 .net "axorand", 0 0, L_0x24e2960; 1 drivers -v0x24d05c0_0 .net "b", 0 0, L_0x24e2e90; 1 drivers -v0x24d0670_0 .alias "defaultCompare", 0 0, v0x24d8ab0_0; -v0x24d0710_0 .alias "out", 0 0, v0x24d8b80_0; -v0x24d0790_0 .net "xornot", 0 0, L_0x24e2aa0; 1 drivers -v0x24d0810_0 .net "xornotand", 0 0, L_0x24e2b40; 1 drivers -S_0x24cfca0 .scope module, "bit20" "single_slt" 3 76, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e2820/d .functor XOR 1, L_0x24e3510, L_0x24e35b0, C4<0>, C4<0>; -L_0x24e2820 .delay (10000,10000,10000) L_0x24e2820/d; -L_0x24e3080/d .functor AND 1, L_0x24e3510, L_0x24e2820, C4<1>, C4<1>; -L_0x24e3080 .delay (10000,10000,10000) L_0x24e3080/d; -L_0x24e31c0/d .functor NOT 1, L_0x24e2820, C4<0>, C4<0>, C4<0>; -L_0x24e31c0 .delay (10000,10000,10000) L_0x24e31c0/d; -L_0x24e3260/d .functor AND 1, L_0x24e31c0, L_0x24e2c90, C4<1>, C4<1>; -L_0x24e3260 .delay (10000,10000,10000) L_0x24e3260/d; -L_0x24e33b0/d .functor OR 1, L_0x24e3080, L_0x24e3260, C4<0>, C4<0>; -L_0x24e33b0 .delay (10000,10000,10000) L_0x24e33b0/d; -v0x24cfd90_0 .net "a", 0 0, L_0x24e3510; 1 drivers -v0x24cfe50_0 .net "abxor", 0 0, L_0x24e2820; 1 drivers -v0x24cfef0_0 .net "axorand", 0 0, L_0x24e3080; 1 drivers -v0x24cff90_0 .net "b", 0 0, L_0x24e35b0; 1 drivers -v0x24d0040_0 .alias "defaultCompare", 0 0, v0x24d8b80_0; -v0x24d00e0_0 .alias "out", 0 0, v0x24d8d30_0; -v0x24d0160_0 .net "xornot", 0 0, L_0x24e31c0; 1 drivers -v0x24d01e0_0 .net "xornotand", 0 0, L_0x24e3260; 1 drivers -S_0x24cf670 .scope module, "bit21" "single_slt" 3 77, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e2f30/d .functor XOR 1, L_0x24e3c20, L_0x24e3cc0, C4<0>, C4<0>; -L_0x24e2f30 .delay (10000,10000,10000) L_0x24e2f30/d; -L_0x24e37b0/d .functor AND 1, L_0x24e3c20, L_0x24e2f30, C4<1>, C4<1>; -L_0x24e37b0 .delay (10000,10000,10000) L_0x24e37b0/d; -L_0x24e38b0/d .functor NOT 1, L_0x24e2f30, C4<0>, C4<0>, C4<0>; -L_0x24e38b0 .delay (10000,10000,10000) L_0x24e38b0/d; -L_0x24e3970/d .functor AND 1, L_0x24e38b0, L_0x24e33b0, C4<1>, C4<1>; -L_0x24e3970 .delay (10000,10000,10000) L_0x24e3970/d; -L_0x24e3ac0/d .functor OR 1, L_0x24e37b0, L_0x24e3970, C4<0>, C4<0>; -L_0x24e3ac0 .delay (10000,10000,10000) L_0x24e3ac0/d; -v0x24cf760_0 .net "a", 0 0, L_0x24e3c20; 1 drivers -v0x24cf820_0 .net "abxor", 0 0, L_0x24e2f30; 1 drivers -v0x24cf8c0_0 .net "axorand", 0 0, L_0x24e37b0; 1 drivers -v0x24cf960_0 .net "b", 0 0, L_0x24e3cc0; 1 drivers -v0x24cfa10_0 .alias "defaultCompare", 0 0, v0x24d8d30_0; -v0x24cfab0_0 .alias "out", 0 0, v0x24d8e50_0; -v0x24cfb30_0 .net "xornot", 0 0, L_0x24e38b0; 1 drivers -v0x24cfbb0_0 .net "xornotand", 0 0, L_0x24e3970; 1 drivers -S_0x24cf040 .scope module, "bit22" "single_slt" 3 78, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e3650/d .functor XOR 1, L_0x24e4330, L_0x24e43d0, C4<0>, C4<0>; -L_0x24e3650 .delay (10000,10000,10000) L_0x24e3650/d; -L_0x24e3ed0/d .functor AND 1, L_0x24e4330, L_0x24e3650, C4<1>, C4<1>; -L_0x24e3ed0 .delay (10000,10000,10000) L_0x24e3ed0/d; -L_0x24e3fc0/d .functor NOT 1, L_0x24e3650, C4<0>, C4<0>, C4<0>; -L_0x24e3fc0 .delay (10000,10000,10000) L_0x24e3fc0/d; -L_0x24e4080/d .functor AND 1, L_0x24e3fc0, L_0x24e3ac0, C4<1>, C4<1>; -L_0x24e4080 .delay (10000,10000,10000) L_0x24e4080/d; -L_0x24e41d0/d .functor OR 1, L_0x24e3ed0, L_0x24e4080, C4<0>, C4<0>; -L_0x24e41d0 .delay (10000,10000,10000) L_0x24e41d0/d; -v0x24cf130_0 .net "a", 0 0, L_0x24e4330; 1 drivers -v0x24cf1f0_0 .net "abxor", 0 0, L_0x24e3650; 1 drivers -v0x24cf290_0 .net "axorand", 0 0, L_0x24e3ed0; 1 drivers -v0x24cf330_0 .net "b", 0 0, L_0x24e43d0; 1 drivers -v0x24cf3e0_0 .alias "defaultCompare", 0 0, v0x24d8e50_0; -v0x24cf480_0 .alias "out", 0 0, v0x24d8f20_0; -v0x24cf500_0 .net "xornot", 0 0, L_0x24e3fc0; 1 drivers -v0x24cf580_0 .net "xornotand", 0 0, L_0x24e4080; 1 drivers -S_0x24cea10 .scope module, "bit23" "single_slt" 3 79, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e3d60/d .functor XOR 1, L_0x24e4a40, L_0x24e4ae0, C4<0>, C4<0>; -L_0x24e3d60 .delay (10000,10000,10000) L_0x24e3d60/d; -L_0x24e3e70/d .functor AND 1, L_0x24e4a40, L_0x24e3d60, C4<1>, C4<1>; -L_0x24e3e70 .delay (10000,10000,10000) L_0x24e3e70/d; -L_0x24e46d0/d .functor NOT 1, L_0x24e3d60, C4<0>, C4<0>, C4<0>; -L_0x24e46d0 .delay (10000,10000,10000) L_0x24e46d0/d; -L_0x24e4790/d .functor AND 1, L_0x24e46d0, L_0x24e41d0, C4<1>, C4<1>; -L_0x24e4790 .delay (10000,10000,10000) L_0x24e4790/d; -L_0x24e48e0/d .functor OR 1, L_0x24e3e70, L_0x24e4790, C4<0>, C4<0>; -L_0x24e48e0 .delay (10000,10000,10000) L_0x24e48e0/d; -v0x24ceb00_0 .net "a", 0 0, L_0x24e4a40; 1 drivers -v0x24cebc0_0 .net "abxor", 0 0, L_0x24e3d60; 1 drivers -v0x24cec60_0 .net "axorand", 0 0, L_0x24e3e70; 1 drivers -v0x24ced00_0 .net "b", 0 0, L_0x24e4ae0; 1 drivers -v0x24cedb0_0 .alias "defaultCompare", 0 0, v0x24d8f20_0; -v0x24cee50_0 .alias "out", 0 0, v0x24d9050_0; -v0x24ceed0_0 .net "xornot", 0 0, L_0x24e46d0; 1 drivers -v0x24cef50_0 .net "xornotand", 0 0, L_0x24e4790; 1 drivers -S_0x24ce3e0 .scope module, "bit24" "single_slt" 3 80, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e4470/d .functor XOR 1, L_0x24e5160, L_0x24e5200, C4<0>, C4<0>; -L_0x24e4470 .delay (10000,10000,10000) L_0x24e4470/d; -L_0x24e4580/d .functor AND 1, L_0x24e5160, L_0x24e4470, C4<1>, C4<1>; -L_0x24e4580 .delay (10000,10000,10000) L_0x24e4580/d; -L_0x24e4df0/d .functor NOT 1, L_0x24e4470, C4<0>, C4<0>, C4<0>; -L_0x24e4df0 .delay (10000,10000,10000) L_0x24e4df0/d; -L_0x24e4eb0/d .functor AND 1, L_0x24e4df0, L_0x24e48e0, C4<1>, C4<1>; -L_0x24e4eb0 .delay (10000,10000,10000) L_0x24e4eb0/d; -L_0x24e5000/d .functor OR 1, L_0x24e4580, L_0x24e4eb0, C4<0>, C4<0>; -L_0x24e5000 .delay (10000,10000,10000) L_0x24e5000/d; -v0x24ce4d0_0 .net "a", 0 0, L_0x24e5160; 1 drivers -v0x24ce590_0 .net "abxor", 0 0, L_0x24e4470; 1 drivers -v0x24ce630_0 .net "axorand", 0 0, L_0x24e4580; 1 drivers -v0x24ce6d0_0 .net "b", 0 0, L_0x24e5200; 1 drivers -v0x24ce780_0 .alias "defaultCompare", 0 0, v0x24d9050_0; -v0x24ce820_0 .alias "out", 0 0, v0x24d90d0_0; -v0x24ce8a0_0 .net "xornot", 0 0, L_0x24e4df0; 1 drivers -v0x24ce920_0 .net "xornotand", 0 0, L_0x24e4eb0; 1 drivers -S_0x24cddb0 .scope module, "bit25" "single_slt" 3 81, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e4b80/d .functor XOR 1, L_0x24e5870, L_0x24e5910, C4<0>, C4<0>; -L_0x24e4b80 .delay (10000,10000,10000) L_0x24e4b80/d; -L_0x24e4c90/d .functor AND 1, L_0x24e5870, L_0x24e4b80, C4<1>, C4<1>; -L_0x24e4c90 .delay (10000,10000,10000) L_0x24e4c90/d; -L_0x24e5520/d .functor NOT 1, L_0x24e4b80, C4<0>, C4<0>, C4<0>; -L_0x24e5520 .delay (10000,10000,10000) L_0x24e5520/d; -L_0x24e55c0/d .functor AND 1, L_0x24e5520, L_0x24e5000, C4<1>, C4<1>; -L_0x24e55c0 .delay (10000,10000,10000) L_0x24e55c0/d; -L_0x24e5710/d .functor OR 1, L_0x24e4c90, L_0x24e55c0, C4<0>, C4<0>; -L_0x24e5710 .delay (10000,10000,10000) L_0x24e5710/d; -v0x24cdea0_0 .net "a", 0 0, L_0x24e5870; 1 drivers -v0x24cdf60_0 .net "abxor", 0 0, L_0x24e4b80; 1 drivers -v0x24ce000_0 .net "axorand", 0 0, L_0x24e4c90; 1 drivers -v0x24ce0a0_0 .net "b", 0 0, L_0x24e5910; 1 drivers -v0x24ce150_0 .alias "defaultCompare", 0 0, v0x24d90d0_0; -v0x24ce1f0_0 .alias "out", 0 0, v0x24d9210_0; -v0x24ce270_0 .net "xornot", 0 0, L_0x24e5520; 1 drivers -v0x24ce2f0_0 .net "xornotand", 0 0, L_0x24e55c0; 1 drivers -S_0x24cd780 .scope module, "bit26" "single_slt" 3 82, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e52a0/d .functor XOR 1, L_0x24e5f80, L_0x24e6020, C4<0>, C4<0>; -L_0x24e52a0 .delay (10000,10000,10000) L_0x24e52a0/d; -L_0x24e53b0/d .functor AND 1, L_0x24e5f80, L_0x24e52a0, C4<1>, C4<1>; -L_0x24e53b0 .delay (10000,10000,10000) L_0x24e53b0/d; -L_0x24e5c40/d .functor NOT 1, L_0x24e52a0, C4<0>, C4<0>, C4<0>; -L_0x24e5c40 .delay (10000,10000,10000) L_0x24e5c40/d; -L_0x24e5ce0/d .functor AND 1, L_0x24e5c40, L_0x24e5710, C4<1>, C4<1>; -L_0x24e5ce0 .delay (10000,10000,10000) L_0x24e5ce0/d; -L_0x24d8ff0/d .functor OR 1, L_0x24e53b0, L_0x24e5ce0, C4<0>, C4<0>; -L_0x24d8ff0 .delay (10000,10000,10000) L_0x24d8ff0/d; -v0x24cd870_0 .net "a", 0 0, L_0x24e5f80; 1 drivers -v0x24cd930_0 .net "abxor", 0 0, L_0x24e52a0; 1 drivers -v0x24cd9d0_0 .net "axorand", 0 0, L_0x24e53b0; 1 drivers -v0x24cda70_0 .net "b", 0 0, L_0x24e6020; 1 drivers -v0x24cdb20_0 .alias "defaultCompare", 0 0, v0x24d9210_0; -v0x24cdbc0_0 .alias "out", 0 0, v0x24d9290_0; -v0x24cdc40_0 .net "xornot", 0 0, L_0x24e5c40; 1 drivers -v0x24cdcc0_0 .net "xornotand", 0 0, L_0x24e5ce0; 1 drivers -S_0x24cd150 .scope module, "bit27" "single_slt" 3 83, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e59b0/d .functor XOR 1, L_0x24e6690, L_0x24e6730, C4<0>, C4<0>; -L_0x24e59b0 .delay (10000,10000,10000) L_0x24e59b0/d; -L_0x24e5ac0/d .functor AND 1, L_0x24e6690, L_0x24e59b0, C4<1>, C4<1>; -L_0x24e5ac0 .delay (10000,10000,10000) L_0x24e5ac0/d; -L_0x24e6320/d .functor NOT 1, L_0x24e59b0, C4<0>, C4<0>, C4<0>; -L_0x24e6320 .delay (10000,10000,10000) L_0x24e6320/d; -L_0x24e63e0/d .functor AND 1, L_0x24e6320, L_0x24d8ff0, C4<1>, C4<1>; -L_0x24e63e0 .delay (10000,10000,10000) L_0x24e63e0/d; -L_0x24e6530/d .functor OR 1, L_0x24e5ac0, L_0x24e63e0, C4<0>, C4<0>; -L_0x24e6530 .delay (10000,10000,10000) L_0x24e6530/d; -v0x24cd240_0 .net "a", 0 0, L_0x24e6690; 1 drivers -v0x24cd300_0 .net "abxor", 0 0, L_0x24e59b0; 1 drivers -v0x24cd3a0_0 .net "axorand", 0 0, L_0x24e5ac0; 1 drivers -v0x24cd440_0 .net "b", 0 0, L_0x24e6730; 1 drivers -v0x24cd4f0_0 .alias "defaultCompare", 0 0, v0x24d9290_0; -v0x24cd590_0 .alias "out", 0 0, v0x24d93e0_0; -v0x24cd610_0 .net "xornot", 0 0, L_0x24e6320; 1 drivers -v0x24cd690_0 .net "xornotand", 0 0, L_0x24e63e0; 1 drivers -S_0x24ccb20 .scope module, "bit28" "single_slt" 3 84, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e60c0/d .functor XOR 1, L_0x24e6dd0, L_0x24e6e70, C4<0>, C4<0>; -L_0x24e60c0 .delay (10000,10000,10000) L_0x24e60c0/d; -L_0x24e61d0/d .functor AND 1, L_0x24e6dd0, L_0x24e60c0, C4<1>, C4<1>; -L_0x24e61d0 .delay (10000,10000,10000) L_0x24e61d0/d; -L_0x24e6a80/d .functor NOT 1, L_0x24e60c0, C4<0>, C4<0>, C4<0>; -L_0x24e6a80 .delay (10000,10000,10000) L_0x24e6a80/d; -L_0x24e6b20/d .functor AND 1, L_0x24e6a80, L_0x24e6530, C4<1>, C4<1>; -L_0x24e6b20 .delay (10000,10000,10000) L_0x24e6b20/d; -L_0x24e6c70/d .functor OR 1, L_0x24e61d0, L_0x24e6b20, C4<0>, C4<0>; -L_0x24e6c70 .delay (10000,10000,10000) L_0x24e6c70/d; -v0x24ccc10_0 .net "a", 0 0, L_0x24e6dd0; 1 drivers -v0x24cccd0_0 .net "abxor", 0 0, L_0x24e60c0; 1 drivers -v0x24ccd70_0 .net "axorand", 0 0, L_0x24e61d0; 1 drivers -v0x24cce10_0 .net "b", 0 0, L_0x24e6e70; 1 drivers -v0x24ccec0_0 .alias "defaultCompare", 0 0, v0x24d93e0_0; -v0x24ccf60_0 .alias "out", 0 0, v0x24d9460_0; -v0x24ccfe0_0 .net "xornot", 0 0, L_0x24e6a80; 1 drivers -v0x24cd060_0 .net "xornotand", 0 0, L_0x24e6b20; 1 drivers -S_0x24cc4f0 .scope module, "bit29" "single_slt" 3 85, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e67d0/d .functor XOR 1, L_0x24e7520, L_0x24e75c0, C4<0>, C4<0>; -L_0x24e67d0 .delay (10000,10000,10000) L_0x24e67d0/d; -L_0x24e68e0/d .functor AND 1, L_0x24e7520, L_0x24e67d0, C4<1>, C4<1>; -L_0x24e68e0 .delay (10000,10000,10000) L_0x24e68e0/d; -L_0x24e71d0/d .functor NOT 1, L_0x24e67d0, C4<0>, C4<0>, C4<0>; -L_0x24e71d0 .delay (10000,10000,10000) L_0x24e71d0/d; -L_0x24e7270/d .functor AND 1, L_0x24e71d0, L_0x24e6c70, C4<1>, C4<1>; -L_0x24e7270 .delay (10000,10000,10000) L_0x24e7270/d; -L_0x24e73c0/d .functor OR 1, L_0x24e68e0, L_0x24e7270, C4<0>, C4<0>; -L_0x24e73c0 .delay (10000,10000,10000) L_0x24e73c0/d; -v0x24cc5e0_0 .net "a", 0 0, L_0x24e7520; 1 drivers -v0x24cc6a0_0 .net "abxor", 0 0, L_0x24e67d0; 1 drivers -v0x24cc740_0 .net "axorand", 0 0, L_0x24e68e0; 1 drivers -v0x24cc7e0_0 .net "b", 0 0, L_0x24e75c0; 1 drivers -v0x24cc890_0 .alias "defaultCompare", 0 0, v0x24d9460_0; -v0x24cc930_0 .alias "out", 0 0, v0x24d9360_0; -v0x24cc9b0_0 .net "xornot", 0 0, L_0x24e71d0; 1 drivers -v0x24cca30_0 .net "xornotand", 0 0, L_0x24e7270; 1 drivers -S_0x24cbef0 .scope module, "bit30" "single_slt" 3 86, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24e6f10/d .functor XOR 1, L_0x24e7c60, L_0x24e0930, C4<0>, C4<0>; -L_0x24e6f10 .delay (10000,10000,10000) L_0x24e6f10/d; -L_0x24e7020/d .functor AND 1, L_0x24e7c60, L_0x24e6f10, C4<1>, C4<1>; -L_0x24e7020 .delay (10000,10000,10000) L_0x24e7020/d; -L_0x24e78f0/d .functor NOT 1, L_0x24e6f10, C4<0>, C4<0>, C4<0>; -L_0x24e78f0 .delay (10000,10000,10000) L_0x24e78f0/d; -L_0x24e79b0/d .functor AND 1, L_0x24e78f0, L_0x24e73c0, C4<1>, C4<1>; -L_0x24e79b0 .delay (10000,10000,10000) L_0x24e79b0/d; -L_0x24e7b00/d .functor OR 1, L_0x24e7020, L_0x24e79b0, C4<0>, C4<0>; -L_0x24e7b00 .delay (10000,10000,10000) L_0x24e7b00/d; -v0x24cbfe0_0 .net "a", 0 0, L_0x24e7c60; 1 drivers -v0x24cc0a0_0 .net "abxor", 0 0, L_0x24e6f10; 1 drivers -v0x24cc140_0 .net "axorand", 0 0, L_0x24e7020; 1 drivers -v0x24cc1e0_0 .net "b", 0 0, L_0x24e0930; 1 drivers -v0x24cc260_0 .alias "defaultCompare", 0 0, v0x24d9360_0; -v0x24cc300_0 .alias "out", 0 0, v0x24d9530_0; -v0x24cc380_0 .net "xornot", 0 0, L_0x24e78f0; 1 drivers -v0x24cc400_0 .net "xornotand", 0 0, L_0x24e79b0; 1 drivers -S_0x247fda0 .scope module, "bit31" "single_slt" 3 87, 3 1, S_0x2480000; - .timescale -9 -12; -L_0x24d87d0/d .functor XOR 1, L_0x24e8920, L_0x24e09d0, C4<0>, C4<0>; -L_0x24d87d0 .delay (10000,10000,10000) L_0x24d87d0/d; -L_0x24e0c90/d .functor AND 1, L_0x24e8920, L_0x24d87d0, C4<1>, C4<1>; -L_0x24e0c90 .delay (10000,10000,10000) L_0x24e0c90/d; -L_0x24e7740/d .functor NOT 1, L_0x24d87d0, C4<0>, C4<0>, C4<0>; -L_0x24e7740 .delay (10000,10000,10000) L_0x24e7740/d; -L_0x24e8520/d .functor AND 1, L_0x24e7740, L_0x24e7b00, C4<1>, C4<1>; -L_0x24e8520 .delay (10000,10000,10000) L_0x24e8520/d; -L_0x24e8610/d .functor OR 1, L_0x24e0c90, L_0x24e8520, C4<0>, C4<0>; -L_0x24e8610 .delay (10000,10000,10000) L_0x24e8610/d; -v0x247f1c0_0 .net "a", 0 0, L_0x24e8920; 1 drivers -v0x24cb9f0_0 .net "abxor", 0 0, L_0x24d87d0; 1 drivers -v0x24cba90_0 .net "axorand", 0 0, L_0x24e0c90; 1 drivers -v0x24cbb30_0 .net "b", 0 0, L_0x24e09d0; 1 drivers -v0x24cbbe0_0 .alias "defaultCompare", 0 0, v0x24d9530_0; -v0x24cbc80_0 .net "out", 0 0, L_0x24e8610; 1 drivers -v0x24cbd60_0 .net "xornot", 0 0, L_0x24e7740; 1 drivers -v0x24cbe00_0 .net "xornotand", 0 0, L_0x24e8520; 1 drivers - .scope S_0x2480cc0; -T_0 ; - %ix/load 0, 31, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %delay 5000000, 0; - %vpi_call 2 13 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; - %ix/load 0, 31, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9d70_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %delay 5000000, 0; - %vpi_call 2 16 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; - %ix/load 0, 31, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9d70_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 19 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; - %ix/load 0, 31, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 22 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; - %ix/load 0, 31, 0; - %set/x0 v0x24d9d70_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9d70_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 25 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; - %ix/load 0, 31, 0; - %set/x0 v0x24d9d70_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9d70_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %ix/load 0, 29, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x24d9e70_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x24d9e70_0, 1, 1; - %delay 5000000, 0; - %vpi_call 2 28 "$display", "%b %b | %b", v0x24d9d70_0, v0x24d9e70_0, v0x24d9df0_0; - %end; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 4; - "N/A"; - ""; - "slt.t.v"; - "./slt.v"; From 75e26ad0ea609d47d9faa28cf4a4dcc9f61043ef Mon Sep 17 00:00:00 2001 From: Kimber Date: Tue, 10 Oct 2017 22:06:10 -0400 Subject: [PATCH 18/38] ALU32bit.v --- ALU32bit.v | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/ALU32bit.v b/ALU32bit.v index 6594850..6d83f28 100644 --- a/ALU32bit.v +++ b/ALU32bit.v @@ -2,6 +2,11 @@ `include "adder_subtracter.v" `include "slt.v" +`include "and_32bit.v" +`include "nand_32bit.v" +`include "xor_32bit.v" +`include "nor_32bit.v" +`include "or_32bit.v" module ALUcontrolLUT //Ben Hill's code ( @@ -21,7 +26,12 @@ module ALUcontrolLUT //Ben Hill's code ); adder_subtracter addsub0(addsub[31:0],cout,flag,a[31:0],b[31:0],ALUcommand[2:0]); +xor_32bit xor0(xorin[31:0],a[31:0],b[31:0]); full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); +and_32bit and0(andin[31:0],a[31:0],b[31:0]); +nand_32bit nand0(nandin[31:0],a[31:0],b[31:0]); +nor_32bit nor0(norin[31:0],a[31:0],b[31:0]); +or_32bit or0(orin[31:0],a[31:0],b[31:0]); always @(ALUcommand) @@ -29,7 +39,7 @@ full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) finalsignal[31:0]=addsub[31:0]; if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) - finalsignal[31:0]=xorin[31:0]; + finalsignal[31:0]=addsub[31:0]; if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==0) finalsignal[31:0]=xorin[31:0]; if(ALUcommand[0]==1 && ALUcommand[1]==1 && ALUcommand[2]==0) From d5c75e2538df73e1eaf145e5d4c038141fe9cda9 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:08:02 -0400 Subject: [PATCH 19/38] removed binary, added gitignore --- .gitignore | 1 + testAddSub | 3387 ---------------------------------------------------- 2 files changed, 1 insertion(+), 3387 deletions(-) create mode 100644 .gitignore delete mode 100755 testAddSub diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..a1d35d9 --- /dev/null +++ b/.gitignore @@ -0,0 +1 @@ +!*.* diff --git a/testAddSub b/testAddSub deleted file mode 100755 index 835ef91..0000000 --- a/testAddSub +++ /dev/null @@ -1,3387 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "0.9.7 " "(v0_9_7)"; -:vpi_time_precision - 12; -:vpi_module "system"; -:vpi_module "v2005_math"; -:vpi_module "va_math"; -S_0x2092990 .scope module, "behavioralFullAdder" "behavioralFullAdder" 2 3; - .timescale -9 -12; -v0x20becb0_0 .net *"_s10", 0 0, C4<0>; 1 drivers -v0x21f68e0_0 .net *"_s11", 1 0, L_0x221fd60; 1 drivers -v0x21f6980_0 .net *"_s13", 1 0, L_0x221feb0; 1 drivers -v0x21f6a20_0 .net *"_s16", 0 0, C4<0>; 1 drivers -v0x21f6ad0_0 .net *"_s17", 1 0, L_0x2220020; 1 drivers -v0x21f6b70_0 .net *"_s3", 1 0, L_0x221fab0; 1 drivers -v0x21f6c50_0 .net *"_s6", 0 0, C4<0>; 1 drivers -v0x21f6cf0_0 .net *"_s7", 1 0, L_0x221fbf0; 1 drivers -v0x21f6de0_0 .net "a", 0 0, C4; 0 drivers -v0x21f6e80_0 .net "b", 0 0, C4; 0 drivers -v0x21f6f80_0 .net "carryin", 0 0, C4; 0 drivers -v0x21f7020_0 .net "carryout", 0 0, L_0x221f970; 1 drivers -v0x21f7130_0 .net "sum", 0 0, L_0x221fa10; 1 drivers -L_0x221f970 .part L_0x2220020, 1, 1; -L_0x221fa10 .part L_0x2220020, 0, 1; -L_0x221fab0 .concat [ 1 1 0 0], C4, C4<0>; -L_0x221fbf0 .concat [ 1 1 0 0], C4, C4<0>; -L_0x221fd60 .arith/sum 2, L_0x221fab0, L_0x221fbf0; -L_0x221feb0 .concat [ 1 1 0 0], C4, C4<0>; -L_0x2220020 .arith/sum 2, L_0x221fd60, L_0x221feb0; -S_0x21afb70 .scope module, "test32bitAdder" "test32bitAdder" 3 6; - .timescale -9 -12; -v0x221f1f0_0 .var "a", 31 0; -RS_0x7f8758e34ca8/0/0 .resolv tri, L_0x22355f0, L_0x223a700, L_0x223f6a0, L_0x2244a50; -RS_0x7f8758e34ca8/0/4 .resolv tri, L_0x2249f40, L_0x224f430, L_0x2254950, L_0x2259eb0; -RS_0x7f8758e34ca8 .resolv tri, RS_0x7f8758e34ca8/0/0, RS_0x7f8758e34ca8/0/4, C4, C4; -v0x221f2a0_0 .net8 "ans", 31 0, RS_0x7f8758e34ca8; 8 drivers -v0x221f6f0_0 .var "b", 31 0; -v0x221f770_0 .var "carryin", 2 0; -v0x221f7f0_0 .net "carryout", 0 0, L_0x2258230; 1 drivers -RS_0x7f8758e34078/0/0 .resolv tri, L_0x222bef0, L_0x22253f0, L_0x222bd80, L_0x222a540; -RS_0x7f8758e34078/0/4 .resolv tri, L_0x2225520, L_0x222cdb0, L_0x222d0b0, L_0x222d210; -RS_0x7f8758e34078/0/8 .resolv tri, L_0x222d400, L_0x222d5f0, L_0x222d830, L_0x222da20; -RS_0x7f8758e34078/0/12 .resolv tri, L_0x222de80, L_0x222e020, L_0x222e110, L_0x222db10; -RS_0x7f8758e34078/0/16 .resolv tri, L_0x222e300, L_0x222e790, L_0x222ec20, L_0x222ee10; -RS_0x7f8758e34078/0/20 .resolv tri, L_0x222e8d0, L_0x222ef10, L_0x222f100, L_0x222f2f0; -RS_0x7f8758e34078/0/24 .resolv tri, L_0x222f7b0, L_0x222fcf0, L_0x222f480, L_0x222fa10; -RS_0x7f8758e34078/0/28 .resolv tri, L_0x222fc00, L_0x222fe90, L_0x222ff30, L_0x22303d0; -RS_0x7f8758e34078/1/0 .resolv tri, RS_0x7f8758e34078/0/0, RS_0x7f8758e34078/0/4, RS_0x7f8758e34078/0/8, RS_0x7f8758e34078/0/12; -RS_0x7f8758e34078/1/4 .resolv tri, RS_0x7f8758e34078/0/16, RS_0x7f8758e34078/0/20, RS_0x7f8758e34078/0/24, RS_0x7f8758e34078/0/28; -RS_0x7f8758e34078 .resolv tri, RS_0x7f8758e34078/1/0, RS_0x7f8758e34078/1/4, C4, C4; -v0x221f870_0 .net8 "finalB", 31 0, RS_0x7f8758e34078; 32 drivers -v0x221f8f0_0 .net "overflow", 0 0, L_0x2259d70; 1 drivers -S_0x21f71d0 .scope module, "adder0" "adder_subtracter" 3 14, 4 176, S_0x21afb70; - .timescale -9 -12; -L_0x221bf70 .functor NOT 1, L_0x22202a0, C4<0>, C4<0>, C4<0>; -L_0x2220430 .functor NOT 1, L_0x22204e0, C4<0>, C4<0>, C4<0>; -L_0x2220790 .functor NOT 1, L_0x22207f0, C4<0>, C4<0>, C4<0>; -L_0x2220930 .functor NOT 1, L_0x22209e0, C4<0>, C4<0>, C4<0>; -L_0x2220bc0 .functor NOT 1, L_0x2220c70, C4<0>, C4<0>, C4<0>; -L_0x2220e60 .functor NOT 1, L_0x2220ec0, C4<0>, C4<0>, C4<0>; -L_0x2220d60 .functor NOT 1, L_0x2221270, C4<0>, C4<0>, C4<0>; -L_0x2221430 .functor NOT 1, L_0x2221530, C4<0>, C4<0>, C4<0>; -L_0x2221750 .functor NOT 1, L_0x2221800, C4<0>, C4<0>, C4<0>; -L_0x2221620 .functor NOT 1, L_0x2221ae0, C4<0>, C4<0>, C4<0>; -L_0x2221c30 .functor NOT 1, L_0x2221ce0, C4<0>, C4<0>, C4<0>; -L_0x2221e90 .functor NOT 1, L_0x2221f40, C4<0>, C4<0>, C4<0>; -L_0x2221a80 .functor NOT 1, L_0x2222150, C4<0>, C4<0>, C4<0>; -L_0x2222320 .functor NOT 1, L_0x22223d0, C4<0>, C4<0>, C4<0>; -L_0x2221160 .functor NOT 1, L_0x22228e0, C4<0>, C4<0>, C4<0>; -L_0x2222a20 .functor NOT 1, L_0x2222b60, C4<0>, C4<0>, C4<0>; -L_0x2222cf0 .functor NOT 1, L_0x2222da0, C4<0>, C4<0>, C4<0>; -L_0x2221050 .functor NOT 1, L_0x22230a0, C4<0>, C4<0>, C4<0>; -L_0x2222f30 .functor NOT 1, L_0x22232c0, C4<0>, C4<0>, C4<0>; -L_0x22231e0 .functor NOT 1, L_0x2223000, C4<0>, C4<0>, C4<0>; -L_0x2223450 .functor NOT 1, L_0x22237e0, C4<0>, C4<0>, C4<0>; -L_0x22236e0 .functor NOT 1, L_0x2223540, C4<0>, C4<0>, C4<0>; -L_0x2223970 .functor NOT 1, L_0x2223cb0, C4<0>, C4<0>, C4<0>; -L_0x2223be0 .functor NOT 1, L_0x2223a30, C4<0>, C4<0>, C4<0>; -L_0x2223e40 .functor NOT 1, L_0x22241d0, C4<0>, C4<0>, C4<0>; -L_0x22240e0 .functor NOT 1, L_0x2223ef0, C4<0>, C4<0>, C4<0>; -L_0x2224360 .functor NOT 1, L_0x22246f0, C4<0>, C4<0>, C4<0>; -L_0x22245e0 .functor NOT 1, L_0x2224460, C4<0>, C4<0>, C4<0>; -L_0x2224830 .functor NOT 1, L_0x2224c10, C4<0>, C4<0>, C4<0>; -L_0x2224ae0 .functor NOT 1, L_0x2224930, C4<0>, C4<0>, C4<0>; -L_0x221cde0 .functor NOT 1, L_0x2224d50, C4<0>, C4<0>, C4<0>; -L_0x221fe00 .functor NOT 1, L_0x2224e90, C4<0>, C4<0>, C4<0>; -v0x221b3c0_0 .net "_", 0 0, L_0x2235460; 1 drivers -v0x221ba00_0 .net "_1", 0 0, L_0x223a5b0; 1 drivers -v0x221ba80_0 .net "_2", 0 0, L_0x223f510; 1 drivers -v0x221bb00_0 .net "_3", 0 0, L_0x2244900; 1 drivers -v0x221bb80_0 .net "_4", 0 0, L_0x2249db0; 1 drivers -v0x221bc30_0 .net "_5", 0 0, L_0x224f2a0; 1 drivers -v0x221bcf0_0 .net "_6", 0 0, L_0x22547c0; 1 drivers -v0x221bda0_0 .net *"_s0", 0 0, L_0x221bf70; 1 drivers -v0x221be70_0 .net *"_s100", 0 0, L_0x22240e0; 1 drivers -v0x221bef0_0 .net *"_s103", 0 0, L_0x2223ef0; 1 drivers -v0x221bfd0_0 .net *"_s104", 0 0, L_0x2224360; 1 drivers -v0x221c050_0 .net *"_s107", 0 0, L_0x22246f0; 1 drivers -v0x221c140_0 .net *"_s108", 0 0, L_0x22245e0; 1 drivers -v0x221c1c0_0 .net *"_s11", 0 0, L_0x22207f0; 1 drivers -v0x221c2c0_0 .net *"_s111", 0 0, L_0x2224460; 1 drivers -v0x221c360_0 .net *"_s112", 0 0, L_0x2224830; 1 drivers -v0x221c240_0 .net *"_s115", 0 0, L_0x2224c10; 1 drivers -v0x221c4b0_0 .net *"_s116", 0 0, L_0x2224ae0; 1 drivers -v0x221c5d0_0 .net *"_s119", 0 0, L_0x2224930; 1 drivers -v0x221c650_0 .net *"_s12", 0 0, L_0x2220930; 1 drivers -v0x221c530_0 .net *"_s120", 0 0, L_0x221cde0; 1 drivers -v0x221c780_0 .net *"_s123", 0 0, L_0x2224d50; 1 drivers -v0x221c6d0_0 .net *"_s124", 0 0, L_0x221fe00; 1 drivers -v0x221c8c0_0 .net *"_s127", 0 0, L_0x2224e90; 1 drivers -v0x221c820_0 .net *"_s15", 0 0, L_0x22209e0; 1 drivers -v0x221ca10_0 .net *"_s16", 0 0, L_0x2220bc0; 1 drivers -v0x221c960_0 .net *"_s19", 0 0, L_0x2220c70; 1 drivers -v0x221cb70_0 .net *"_s20", 0 0, L_0x2220e60; 1 drivers -v0x221cab0_0 .net *"_s23", 0 0, L_0x2220ec0; 1 drivers -v0x221cce0_0 .net *"_s24", 0 0, L_0x2220d60; 1 drivers -v0x221cbf0_0 .net *"_s27", 0 0, L_0x2221270; 1 drivers -v0x221ce60_0 .net *"_s28", 0 0, L_0x2221430; 1 drivers -v0x221cd60_0 .net *"_s3", 0 0, L_0x22202a0; 1 drivers -v0x221cff0_0 .net *"_s31", 0 0, L_0x2221530; 1 drivers -v0x221cee0_0 .net *"_s32", 0 0, L_0x2221750; 1 drivers -v0x221d190_0 .net *"_s35", 0 0, L_0x2221800; 1 drivers -v0x221d070_0 .net *"_s36", 0 0, L_0x2221620; 1 drivers -v0x221d110_0 .net *"_s39", 0 0, L_0x2221ae0; 1 drivers -v0x221d350_0 .net *"_s4", 0 0, L_0x2220430; 1 drivers -v0x221d3d0_0 .net *"_s40", 0 0, L_0x2221c30; 1 drivers -v0x221d210_0 .net *"_s43", 0 0, L_0x2221ce0; 1 drivers -v0x221d2b0_0 .net *"_s44", 0 0, L_0x2221e90; 1 drivers -v0x221d5b0_0 .net *"_s47", 0 0, L_0x2221f40; 1 drivers -v0x221d630_0 .net *"_s48", 0 0, L_0x2221a80; 1 drivers -v0x221d450_0 .net *"_s51", 0 0, L_0x2222150; 1 drivers -v0x221d4f0_0 .net *"_s52", 0 0, L_0x2222320; 1 drivers -v0x221d830_0 .net *"_s55", 0 0, L_0x22223d0; 1 drivers -v0x221d8b0_0 .net *"_s56", 0 0, L_0x2221160; 1 drivers -v0x221d6d0_0 .net *"_s59", 0 0, L_0x22228e0; 1 drivers -v0x221d770_0 .net *"_s60", 0 0, L_0x2222a20; 1 drivers -v0x221dad0_0 .net *"_s63", 0 0, L_0x2222b60; 1 drivers -v0x221db50_0 .net *"_s64", 0 0, L_0x2222cf0; 1 drivers -v0x221d950_0 .net *"_s67", 0 0, L_0x2222da0; 1 drivers -v0x221d9f0_0 .net *"_s68", 0 0, L_0x2221050; 1 drivers -v0x221dd90_0 .net *"_s7", 0 0, L_0x22204e0; 1 drivers -v0x221de10_0 .net *"_s71", 0 0, L_0x22230a0; 1 drivers -v0x221dbd0_0 .net *"_s72", 0 0, L_0x2222f30; 1 drivers -v0x221dc70_0 .net *"_s75", 0 0, L_0x22232c0; 1 drivers -v0x221dd10_0 .net *"_s76", 0 0, L_0x22231e0; 1 drivers -v0x221e090_0 .net *"_s79", 0 0, L_0x2223000; 1 drivers -v0x221deb0_0 .net *"_s8", 0 0, L_0x2220790; 1 drivers -v0x221df50_0 .net *"_s80", 0 0, L_0x2223450; 1 drivers -v0x221dff0_0 .net *"_s83", 0 0, L_0x22237e0; 1 drivers -v0x221e330_0 .net *"_s84", 0 0, L_0x22236e0; 1 drivers -v0x221e130_0 .net *"_s87", 0 0, L_0x2223540; 1 drivers -v0x221e1d0_0 .net *"_s88", 0 0, L_0x2223970; 1 drivers -v0x221e270_0 .net *"_s91", 0 0, L_0x2223cb0; 1 drivers -v0x221e5d0_0 .net *"_s92", 0 0, L_0x2223be0; 1 drivers -v0x221e3d0_0 .net *"_s95", 0 0, L_0x2223a30; 1 drivers -v0x221e470_0 .net *"_s96", 0 0, L_0x2223e40; 1 drivers -v0x221e510_0 .net *"_s99", 0 0, L_0x22241d0; 1 drivers -v0x221e890_0 .alias "ans", 31 0, v0x221f2a0_0; -v0x221e650_0 .alias "carryout", 0 0, v0x221f7f0_0; -v0x221e6d0_0 .net "command", 2 0, v0x221f770_0; 1 drivers -v0x221e770_0 .net "cout0", 0 0, L_0x22339b0; 1 drivers -v0x221eb70_0 .net "cout1", 0 0, L_0x2238b00; 1 drivers -v0x221e9a0_0 .net "cout2", 0 0, L_0x223db20; 1 drivers -v0x221eab0_0 .net "cout3", 0 0, L_0x2242db0; 1 drivers -v0x221ef00_0 .net "cout4", 0 0, L_0x2248260; 1 drivers -v0x221f010_0 .net "cout5", 0 0, L_0x224d750; 1 drivers -v0x221ec80_0 .net "cout6", 0 0, L_0x2252c70; 1 drivers -v0x221ed90_0 .alias "finalB", 31 0, v0x221f870_0; -RS_0x7f8758e33a18/0/0 .resolv tri, L_0x2220160, L_0x2220390, L_0x2220660, L_0x2220890; -RS_0x7f8758e33a18/0/4 .resolv tri, L_0x2220b20, L_0x2220dc0, L_0x22210c0, L_0x2221390; -RS_0x7f8758e33a18/0/8 .resolv tri, L_0x22216b0, L_0x2221990, L_0x22218f0, L_0x2221b80; -RS_0x7f8758e33a18/0/12 .resolv tri, L_0x2221dd0, L_0x2222030, L_0x2222240, L_0x2222980; -RS_0x7f8758e33a18/0/16 .resolv tri, L_0x2222c50, L_0x2220fb0, L_0x2222e90, L_0x2223140; -RS_0x7f8758e33a18/0/20 .resolv tri, L_0x22233b0, L_0x2223640, L_0x22238d0, L_0x2223b40; -RS_0x7f8758e33a18/0/24 .resolv tri, L_0x2223da0, L_0x2224040, L_0x22242c0, L_0x2224540; -RS_0x7f8758e33a18/0/28 .resolv tri, L_0x2224790, L_0x2224a40, L_0x2224cb0, L_0x22226c0; -RS_0x7f8758e33a18/1/0 .resolv tri, RS_0x7f8758e33a18/0/0, RS_0x7f8758e33a18/0/4, RS_0x7f8758e33a18/0/8, RS_0x7f8758e33a18/0/12; -RS_0x7f8758e33a18/1/4 .resolv tri, RS_0x7f8758e33a18/0/16, RS_0x7f8758e33a18/0/20, RS_0x7f8758e33a18/0/24, RS_0x7f8758e33a18/0/28; -RS_0x7f8758e33a18 .resolv tri, RS_0x7f8758e33a18/1/0, RS_0x7f8758e33a18/1/4, C4, C4; -v0x221f330_0 .net8 "invertedB", 31 0, RS_0x7f8758e33a18; 32 drivers -v0x221f3b0_0 .net "opA", 31 0, v0x221f1f0_0; 1 drivers -v0x221f090_0 .net "opB", 31 0, v0x221f6f0_0; 1 drivers -v0x221f140_0 .alias "overflow", 0 0, v0x221f8f0_0; -L_0x2220160 .part/pv L_0x221bf70, 0, 1, 32; -L_0x22202a0 .part v0x221f6f0_0, 0, 1; -L_0x2220390 .part/pv L_0x2220430, 1, 1, 32; -L_0x22204e0 .part v0x221f6f0_0, 1, 1; -L_0x2220660 .part/pv L_0x2220790, 2, 1, 32; -L_0x22207f0 .part v0x221f6f0_0, 2, 1; -L_0x2220890 .part/pv L_0x2220930, 3, 1, 32; -L_0x22209e0 .part v0x221f6f0_0, 3, 1; -L_0x2220b20 .part/pv L_0x2220bc0, 4, 1, 32; -L_0x2220c70 .part v0x221f6f0_0, 4, 1; -L_0x2220dc0 .part/pv L_0x2220e60, 5, 1, 32; -L_0x2220ec0 .part v0x221f6f0_0, 5, 1; -L_0x22210c0 .part/pv L_0x2220d60, 6, 1, 32; -L_0x2221270 .part v0x221f6f0_0, 6, 1; -L_0x2221390 .part/pv L_0x2221430, 7, 1, 32; -L_0x2221530 .part v0x221f6f0_0, 7, 1; -L_0x22216b0 .part/pv L_0x2221750, 8, 1, 32; -L_0x2221800 .part v0x221f6f0_0, 8, 1; -L_0x2221990 .part/pv L_0x2221620, 9, 1, 32; -L_0x2221ae0 .part v0x221f6f0_0, 9, 1; -L_0x22218f0 .part/pv L_0x2221c30, 10, 1, 32; -L_0x2221ce0 .part v0x221f6f0_0, 10, 1; -L_0x2221b80 .part/pv L_0x2221e90, 11, 1, 32; -L_0x2221f40 .part v0x221f6f0_0, 11, 1; -L_0x2221dd0 .part/pv L_0x2221a80, 12, 1, 32; -L_0x2222150 .part v0x221f6f0_0, 12, 1; -L_0x2222030 .part/pv L_0x2222320, 13, 1, 32; -L_0x22223d0 .part v0x221f6f0_0, 13, 1; -L_0x2222240 .part/pv L_0x2221160, 14, 1, 32; -L_0x22228e0 .part v0x221f6f0_0, 14, 1; -L_0x2222980 .part/pv L_0x2222a20, 15, 1, 32; -L_0x2222b60 .part v0x221f6f0_0, 15, 1; -L_0x2222c50 .part/pv L_0x2222cf0, 16, 1, 32; -L_0x2222da0 .part v0x221f6f0_0, 16, 1; -L_0x2220fb0 .part/pv L_0x2221050, 17, 1, 32; -L_0x22230a0 .part v0x221f6f0_0, 17, 1; -L_0x2222e90 .part/pv L_0x2222f30, 18, 1, 32; -L_0x22232c0 .part v0x221f6f0_0, 18, 1; -L_0x2223140 .part/pv L_0x22231e0, 19, 1, 32; -L_0x2223000 .part v0x221f6f0_0, 19, 1; -L_0x22233b0 .part/pv L_0x2223450, 20, 1, 32; -L_0x22237e0 .part v0x221f6f0_0, 20, 1; -L_0x2223640 .part/pv L_0x22236e0, 21, 1, 32; -L_0x2223540 .part v0x221f6f0_0, 21, 1; -L_0x22238d0 .part/pv L_0x2223970, 22, 1, 32; -L_0x2223cb0 .part v0x221f6f0_0, 22, 1; -L_0x2223b40 .part/pv L_0x2223be0, 23, 1, 32; -L_0x2223a30 .part v0x221f6f0_0, 23, 1; -L_0x2223da0 .part/pv L_0x2223e40, 24, 1, 32; -L_0x22241d0 .part v0x221f6f0_0, 24, 1; -L_0x2224040 .part/pv L_0x22240e0, 25, 1, 32; -L_0x2223ef0 .part v0x221f6f0_0, 25, 1; -L_0x22242c0 .part/pv L_0x2224360, 26, 1, 32; -L_0x22246f0 .part v0x221f6f0_0, 26, 1; -L_0x2224540 .part/pv L_0x22245e0, 27, 1, 32; -L_0x2224460 .part v0x221f6f0_0, 27, 1; -L_0x2224790 .part/pv L_0x2224830, 28, 1, 32; -L_0x2224c10 .part v0x221f6f0_0, 28, 1; -L_0x2224a40 .part/pv L_0x2224ae0, 29, 1, 32; -L_0x2224930 .part v0x221f6f0_0, 29, 1; -L_0x2224cb0 .part/pv L_0x221cde0, 30, 1, 32; -L_0x2224d50 .part v0x221f6f0_0, 30, 1; -L_0x22226c0 .part/pv L_0x221fe00, 31, 1, 32; -L_0x2224e90 .part v0x221f6f0_0, 31, 1; -L_0x22305c0 .part v0x221f770_0, 0, 1; -RS_0x7f8758e32188 .resolv tri, L_0x22315c0, L_0x22323b0, L_0x2233410, L_0x2234310; -L_0x22355f0 .part/pv RS_0x7f8758e32188, 0, 4, 32; -L_0x22257b0 .part v0x221f1f0_0, 0, 4; -L_0x22258a0 .part RS_0x7f8758e34078, 0, 4; -L_0x22358c0 .part v0x221f770_0, 0, 1; -RS_0x7f8758e313a8 .resolv tri, L_0x2236620, L_0x2237550, L_0x2238560, L_0x2239460; -L_0x223a700 .part/pv RS_0x7f8758e313a8, 4, 4, 32; -L_0x2235690 .part v0x221f1f0_0, 4, 4; -L_0x2235730 .part RS_0x7f8758e34078, 4, 4; -RS_0x7f8758e305c8 .resolv tri, L_0x223b5f0, L_0x223c520, L_0x223d580, L_0x223e480; -L_0x223f6a0 .part/pv RS_0x7f8758e305c8, 8, 4, 32; -L_0x223f7d0 .part v0x221f1f0_0, 8, 4; -L_0x223a7a0 .part RS_0x7f8758e34078, 8, 4; -RS_0x7f8758e2f7e8 .resolv tri, L_0x2240600, L_0x2241610, L_0x22427d0, L_0x2243830; -L_0x2244a50 .part/pv RS_0x7f8758e2f7e8, 12, 4, 32; -L_0x223f900 .part v0x221f1f0_0, 12, 4; -L_0x223f9a0 .part RS_0x7f8758e34078, 12, 4; -RS_0x7f8758e2ea08 .resolv tri, L_0x2245a50, L_0x2246ae0, L_0x2247c80, L_0x2248ce0; -L_0x2249f40 .part/pv RS_0x7f8758e2ea08, 16, 4, 32; -L_0x2249fe0 .part v0x221f1f0_0, 16, 4; -L_0x2244af0 .part RS_0x7f8758e34078, 16, 4; -RS_0x7f8758e2dc28 .resolv tri, L_0x224af40, L_0x224bfd0, L_0x224d170, L_0x224e1d0; -L_0x224f430 .part/pv RS_0x7f8758e2dc28, 20, 4, 32; -L_0x224a080 .part v0x221f1f0_0, 20, 4; -L_0x224a120 .part RS_0x7f8758e34078, 20, 4; -RS_0x7f8758e2ce48 .resolv tri, L_0x2250440, L_0x22514d0, L_0x2252670, L_0x22536f0; -L_0x2254950 .part/pv RS_0x7f8758e2ce48, 24, 4, 32; -L_0x2254b00 .part v0x221f1f0_0, 24, 4; -L_0x224f4d0 .part RS_0x7f8758e34078, 24, 4; -RS_0x7f8758e2c068 .resolv tri, L_0x2255a50, L_0x2256ab0, L_0x2257c50, L_0x2258cf0; -L_0x2259eb0 .part/pv RS_0x7f8758e2c068, 28, 4, 32; -L_0x2254cb0 .part v0x221f1f0_0, 28, 4; -L_0x2254d50 .part RS_0x7f8758e34078, 28, 4; -S_0x2214bd0 .scope module, "addsubmux" "mux" 4 237, 4 3, S_0x21f71d0; - .timescale -9 -12; -L_0x221c0d0 .functor NOT 1, L_0x22305c0, C4<0>, C4<0>, C4<0>; -L_0x2222870 .functor AND 1, L_0x22224c0, L_0x221c0d0, C4<1>, C4<1>; -L_0x22225b0 .functor AND 1, L_0x2222610, L_0x221c0d0, C4<1>, C4<1>; -L_0x22259c0 .functor AND 1, L_0x2225ab0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2225b50 .functor AND 1, L_0x2225bb0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2225ca0 .functor AND 1, L_0x2225d00, L_0x221c0d0, C4<1>, C4<1>; -L_0x2225df0 .functor AND 1, L_0x2225e50, L_0x221c0d0, C4<1>, C4<1>; -L_0x2225f40 .functor AND 1, L_0x22260b0, L_0x221c0d0, C4<1>, C4<1>; -L_0x22261a0 .functor AND 1, L_0x2226200, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226340 .functor AND 1, L_0x22263a0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226490 .functor AND 1, L_0x22264f0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226640 .functor AND 1, L_0x2226710, L_0x221c0d0, C4<1>, C4<1>; -L_0x2225a20 .functor AND 1, L_0x22267b0, L_0x221c0d0, C4<1>, C4<1>; -L_0x22265e0 .functor AND 1, L_0x2226990, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226a80 .functor AND 1, L_0x2226ae0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226c50 .functor AND 1, L_0x2226ec0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226f60 .functor AND 1, L_0x2226fc0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227140 .functor AND 1, L_0x2227240, L_0x221c0d0, C4<1>, C4<1>; -L_0x22272e0 .functor AND 1, L_0x2227340, L_0x221c0d0, C4<1>, C4<1>; -L_0x22270b0 .functor AND 1, L_0x22271a0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227600 .functor AND 1, L_0x2227690, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227430 .functor AND 1, L_0x2227500, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227940 .functor AND 1, L_0x22279d0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227780 .functor AND 1, L_0x2227810, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227ca0 .functor AND 1, L_0x2227d00, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227ac0 .functor AND 1, L_0x2227b50, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227fa0 .functor AND 1, L_0x2228030, L_0x221c0d0, C4<1>, C4<1>; -L_0x2227df0 .functor AND 1, L_0x2227e80, L_0x221c0d0, C4<1>, C4<1>; -L_0x22282f0 .functor AND 1, L_0x2228350, L_0x221c0d0, C4<1>, C4<1>; -L_0x2228120 .functor AND 1, L_0x22281b0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2228630 .functor AND 1, L_0x2228690, L_0x221c0d0, C4<1>, C4<1>; -L_0x2217b80 .functor AND 1, L_0x22268a0, L_0x221c0d0, C4<1>, C4<1>; -L_0x22266a0 .functor AND 1, L_0x2226dc0, L_0x221c0d0, C4<1>, C4<1>; -L_0x2226e60 .functor AND 1, L_0x2228560, L_0x22305c0, C4<1>, C4<1>; -L_0x2226cb0 .functor AND 1, L_0x2226d10, L_0x22305c0, C4<1>, C4<1>; -L_0x2224f90 .functor AND 1, L_0x2228440, L_0x22305c0, C4<1>, C4<1>; -L_0x2225340 .functor AND 1, L_0x22293a0, L_0x22305c0, C4<1>, C4<1>; -L_0x22250f0 .functor AND 1, L_0x2225150, L_0x22305c0, C4<1>, C4<1>; -L_0x2225240 .functor AND 1, L_0x22296b0, L_0x22305c0, C4<1>, C4<1>; -L_0x2229440 .functor AND 1, L_0x22294d0, L_0x22305c0, C4<1>, C4<1>; -L_0x22295c0 .functor AND 1, L_0x2224ff0, L_0x22305c0, C4<1>, C4<1>; -L_0x2229750 .functor AND 1, L_0x22297e0, L_0x22305c0, C4<1>, C4<1>; -L_0x22299f0 .functor AND 1, L_0x2229da0, L_0x22305c0, C4<1>, C4<1>; -L_0x2229ad0 .functor AND 1, L_0x2229b30, L_0x22305c0, C4<1>, C4<1>; -L_0x2229c20 .functor AND 1, L_0x2229c80, L_0x22305c0, C4<1>, C4<1>; -L_0x2229e40 .functor AND 1, L_0x2229ea0, L_0x22305c0, C4<1>, C4<1>; -L_0x2229f90 .functor AND 1, L_0x222a020, L_0x22305c0, C4<1>, C4<1>; -L_0x222a110 .functor AND 1, L_0x222a1a0, L_0x22305c0, C4<1>, C4<1>; -L_0x222a290 .functor AND 1, L_0x222a320, L_0x22305c0, C4<1>, C4<1>; -L_0x22298e0 .functor AND 1, L_0x222a790, L_0x22305c0, C4<1>, C4<1>; -L_0x222a880 .functor AND 1, L_0x222aab0, L_0x22305c0, C4<1>, C4<1>; -L_0x222a8e0 .functor AND 1, L_0x222a970, L_0x22305c0, C4<1>, C4<1>; -L_0x222ad40 .functor AND 1, L_0x222ada0, L_0x22305c0, C4<1>, C4<1>; -L_0x222aba0 .functor AND 1, L_0x222ac60, L_0x22305c0, C4<1>, C4<1>; -L_0x222b040 .functor AND 1, L_0x222b0a0, L_0x22305c0, C4<1>, C4<1>; -L_0x222ae40 .functor AND 1, L_0x222af00, L_0x22305c0, C4<1>, C4<1>; -L_0x222a3c0 .functor AND 1, L_0x222a450, L_0x22305c0, C4<1>, C4<1>; -L_0x222b190 .functor AND 1, L_0x222b220, L_0x22305c0, C4<1>, C4<1>; -L_0x222b310 .functor AND 1, L_0x222b370, L_0x22305c0, C4<1>, C4<1>; -L_0x222b460 .functor AND 1, L_0x222b6b0, L_0x22305c0, C4<1>, C4<1>; -L_0x222b7a0 .functor AND 1, L_0x222b830, L_0x22305c0, C4<1>, C4<1>; -L_0x222b8d0 .functor AND 1, L_0x222b960, L_0x22305c0, C4<1>, C4<1>; -L_0x222ba50 .functor AND 1, L_0x222b4c0, L_0x22305c0, C4<1>, C4<1>; -L_0x222b5b0 .functor AND 1, L_0x222bb00, L_0x22305c0, C4<1>, C4<1>; -L_0x222b640 .functor AND 1, L_0x222bbf0, L_0x22305c0, C4<1>, C4<1>; -L_0x222bfc0 .functor OR 1, L_0x2222870, L_0x2226e60, C4<0>, C4<0>; -L_0x2225740 .functor OR 1, L_0x22225b0, L_0x2226cb0, C4<0>, C4<0>; -L_0x222be20 .functor OR 1, L_0x22259c0, L_0x2224f90, C4<0>, C4<0>; -L_0x222a5e0 .functor OR 1, L_0x2225b50, L_0x2225340, C4<0>, C4<0>; -L_0x22255c0 .functor OR 1, L_0x2225ca0, L_0x22250f0, C4<0>, C4<0>; -L_0x222cf60 .functor OR 1, L_0x2225df0, L_0x2225240, C4<0>, C4<0>; -L_0x222d150 .functor OR 1, L_0x2225f40, L_0x2229440, C4<0>, C4<0>; -L_0x222d2b0 .functor OR 1, L_0x22261a0, L_0x22295c0, C4<0>, C4<0>; -L_0x222d4a0 .functor OR 1, L_0x2226340, L_0x2229750, C4<0>, C4<0>; -L_0x222d6e0 .functor OR 1, L_0x2226490, L_0x22299f0, C4<0>, C4<0>; -L_0x222d8d0 .functor OR 1, L_0x2226640, L_0x2229ad0, C4<0>, C4<0>; -L_0x222dd30 .functor OR 1, L_0x2225a20, L_0x2229c20, C4<0>, C4<0>; -L_0x222df20 .functor OR 1, L_0x22265e0, L_0x2229e40, C4<0>, C4<0>; -L_0x222ce50 .functor OR 1, L_0x2226a80, L_0x2229f90, C4<0>, C4<0>; -L_0x222e1b0 .functor OR 1, L_0x2226c50, L_0x222a110, C4<0>, C4<0>; -L_0x222dbb0 .functor OR 1, L_0x2226f60, L_0x222a290, C4<0>, C4<0>; -L_0x222e3a0 .functor OR 1, L_0x2227140, L_0x22298e0, C4<0>, C4<0>; -L_0x222ead0 .functor OR 1, L_0x22272e0, L_0x222a880, C4<0>, C4<0>; -L_0x222ecc0 .functor OR 1, L_0x22270b0, L_0x222a8e0, C4<0>, C4<0>; -L_0x222eeb0 .functor OR 1, L_0x2227600, L_0x222ad40, C4<0>, C4<0>; -L_0x222e970 .functor OR 1, L_0x2227430, L_0x222aba0, C4<0>, C4<0>; -L_0x222efb0 .functor OR 1, L_0x2227940, L_0x222b040, C4<0>, C4<0>; -L_0x222f1a0 .functor OR 1, L_0x2227780, L_0x222ae40, C4<0>, C4<0>; -L_0x222f660 .functor OR 1, L_0x2227ca0, L_0x222a3c0, C4<0>, C4<0>; -L_0x222f850 .functor OR 1, L_0x2227ac0, L_0x222b190, C4<0>, C4<0>; -L_0x222f9a0 .functor OR 1, L_0x2227fa0, L_0x222b310, C4<0>, C4<0>; -L_0x222f520 .functor OR 1, L_0x2227df0, L_0x222b460, C4<0>, C4<0>; -L_0x222fab0 .functor OR 1, L_0x22282f0, L_0x222b7a0, C4<0>, C4<0>; -L_0x222fd90 .functor OR 1, L_0x2228120, L_0x222b8d0, C4<0>, C4<0>; -L_0x222aea0 .functor OR 1, L_0x2228630, L_0x222ba50, C4<0>, C4<0>; -L_0x222a730 .functor OR 1, L_0x2217b80, L_0x222b5b0, C4<0>, C4<0>; -L_0x2230470 .functor OR 1, L_0x22266a0, L_0x222b640, C4<0>, C4<0>; -v0x2214cc0_0 .net *"_s1", 0 0, L_0x22224c0; 1 drivers -v0x2214d80_0 .net *"_s101", 0 0, L_0x222a970; 1 drivers -v0x2214e20_0 .net *"_s103", 0 0, L_0x222ada0; 1 drivers -v0x2214ec0_0 .net *"_s105", 0 0, L_0x222ac60; 1 drivers -v0x2214f40_0 .net *"_s107", 0 0, L_0x222b0a0; 1 drivers -v0x2214fe0_0 .net *"_s109", 0 0, L_0x222af00; 1 drivers -v0x2215080_0 .net *"_s11", 0 0, L_0x2225e50; 1 drivers -v0x2215120_0 .net *"_s111", 0 0, L_0x222a450; 1 drivers -v0x2215210_0 .net *"_s113", 0 0, L_0x222b220; 1 drivers -v0x22152b0_0 .net *"_s115", 0 0, L_0x222b370; 1 drivers -v0x2215350_0 .net *"_s117", 0 0, L_0x222b6b0; 1 drivers -v0x22153f0_0 .net *"_s119", 0 0, L_0x222b830; 1 drivers -v0x2215490_0 .net *"_s121", 0 0, L_0x222b960; 1 drivers -v0x2215530_0 .net *"_s123", 0 0, L_0x222b4c0; 1 drivers -v0x2215650_0 .net *"_s125", 0 0, L_0x222bb00; 1 drivers -v0x22156f0_0 .net *"_s127", 0 0, L_0x222bbf0; 1 drivers -v0x22155b0_0 .net *"_s128", 0 0, L_0x222bfc0; 1 drivers -v0x2215840_0 .net *"_s13", 0 0, L_0x22260b0; 1 drivers -v0x2215960_0 .net *"_s130", 0 0, L_0x2225740; 1 drivers -v0x22159e0_0 .net *"_s132", 0 0, L_0x222be20; 1 drivers -v0x22158c0_0 .net *"_s134", 0 0, L_0x222a5e0; 1 drivers -v0x2215b10_0 .net *"_s136", 0 0, L_0x22255c0; 1 drivers -v0x2215a60_0 .net *"_s138", 0 0, L_0x222cf60; 1 drivers -v0x2215c50_0 .net *"_s140", 0 0, L_0x222d150; 1 drivers -v0x2215bb0_0 .net *"_s142", 0 0, L_0x222d2b0; 1 drivers -v0x2215da0_0 .net *"_s144", 0 0, L_0x222d4a0; 1 drivers -v0x2215cf0_0 .net *"_s146", 0 0, L_0x222d6e0; 1 drivers -v0x2215f00_0 .net *"_s148", 0 0, L_0x222d8d0; 1 drivers -v0x2215e40_0 .net *"_s15", 0 0, L_0x2226200; 1 drivers -v0x2216070_0 .net *"_s150", 0 0, L_0x222dd30; 1 drivers -v0x2215f80_0 .net *"_s152", 0 0, L_0x222df20; 1 drivers -v0x22161f0_0 .net *"_s154", 0 0, L_0x222ce50; 1 drivers -v0x22160f0_0 .net *"_s156", 0 0, L_0x222e1b0; 1 drivers -v0x2216380_0 .net *"_s158", 0 0, L_0x222dbb0; 1 drivers -v0x2216270_0 .net *"_s160", 0 0, L_0x222e3a0; 1 drivers -v0x2216520_0 .net *"_s162", 0 0, L_0x222ead0; 1 drivers -v0x2216400_0 .net *"_s164", 0 0, L_0x222ecc0; 1 drivers -v0x22164a0_0 .net *"_s166", 0 0, L_0x222eeb0; 1 drivers -v0x22166e0_0 .net *"_s168", 0 0, L_0x222e970; 1 drivers -v0x2216760_0 .net *"_s17", 0 0, L_0x22263a0; 1 drivers -v0x22165a0_0 .net *"_s170", 0 0, L_0x222efb0; 1 drivers -v0x2216640_0 .net *"_s172", 0 0, L_0x222f1a0; 1 drivers -v0x2216940_0 .net *"_s174", 0 0, L_0x222f660; 1 drivers -v0x22169c0_0 .net *"_s176", 0 0, L_0x222f850; 1 drivers -v0x22167e0_0 .net *"_s178", 0 0, L_0x222f9a0; 1 drivers -v0x2216880_0 .net *"_s180", 0 0, L_0x222f520; 1 drivers -v0x2216bc0_0 .net *"_s182", 0 0, L_0x222fab0; 1 drivers -v0x2216c40_0 .net *"_s184", 0 0, L_0x222fd90; 1 drivers -v0x2216a60_0 .net *"_s186", 0 0, L_0x222aea0; 1 drivers -v0x2216b00_0 .net *"_s188", 0 0, L_0x222a730; 1 drivers -v0x2216e60_0 .net *"_s19", 0 0, L_0x22264f0; 1 drivers -v0x2216ee0_0 .net *"_s190", 0 0, L_0x2230470; 1 drivers -v0x2216cc0_0 .net *"_s21", 0 0, L_0x2226710; 1 drivers -v0x2216d60_0 .net *"_s23", 0 0, L_0x22267b0; 1 drivers -v0x2217120_0 .net *"_s25", 0 0, L_0x2226990; 1 drivers -v0x22171a0_0 .net *"_s27", 0 0, L_0x2226ae0; 1 drivers -v0x2216f60_0 .net *"_s29", 0 0, L_0x2226ec0; 1 drivers -v0x2217000_0 .net *"_s3", 0 0, L_0x2222610; 1 drivers -v0x22170a0_0 .net *"_s31", 0 0, L_0x2226fc0; 1 drivers -v0x2217400_0 .net *"_s33", 0 0, L_0x2227240; 1 drivers -v0x2217220_0 .net *"_s35", 0 0, L_0x2227340; 1 drivers -v0x22172c0_0 .net *"_s37", 0 0, L_0x22271a0; 1 drivers -v0x2217360_0 .net *"_s39", 0 0, L_0x2227690; 1 drivers -v0x2217680_0 .net *"_s41", 0 0, L_0x2227500; 1 drivers -v0x2217480_0 .net *"_s43", 0 0, L_0x22279d0; 1 drivers -v0x2217520_0 .net *"_s45", 0 0, L_0x2227810; 1 drivers -v0x22175c0_0 .net *"_s47", 0 0, L_0x2227d00; 1 drivers -v0x2217920_0 .net *"_s49", 0 0, L_0x2227b50; 1 drivers -v0x2217700_0 .net *"_s5", 0 0, L_0x2225ab0; 1 drivers -v0x2217780_0 .net *"_s51", 0 0, L_0x2228030; 1 drivers -v0x2217820_0 .net *"_s53", 0 0, L_0x2227e80; 1 drivers -v0x2217be0_0 .net *"_s55", 0 0, L_0x2228350; 1 drivers -v0x22179a0_0 .net *"_s57", 0 0, L_0x22281b0; 1 drivers -v0x2217a40_0 .net *"_s59", 0 0, L_0x2228690; 1 drivers -v0x2217ae0_0 .net *"_s61", 0 0, L_0x22268a0; 1 drivers -v0x2217ec0_0 .net *"_s63", 0 0, L_0x2226dc0; 1 drivers -v0x2217c60_0 .net *"_s65", 0 0, L_0x2228560; 1 drivers -v0x2217ce0_0 .net *"_s67", 0 0, L_0x2226d10; 1 drivers -v0x2217d80_0 .net *"_s69", 0 0, L_0x2228440; 1 drivers -v0x2217e20_0 .net *"_s7", 0 0, L_0x2225bb0; 1 drivers -v0x22181d0_0 .net *"_s71", 0 0, L_0x22293a0; 1 drivers -v0x2218250_0 .net *"_s73", 0 0, L_0x2225150; 1 drivers -v0x2217f40_0 .net *"_s75", 0 0, L_0x22296b0; 1 drivers -v0x2217fc0_0 .net *"_s77", 0 0, L_0x22294d0; 1 drivers -v0x2218060_0 .net *"_s79", 0 0, L_0x2224ff0; 1 drivers -v0x2218100_0 .net *"_s81", 0 0, L_0x22297e0; 1 drivers -v0x2218590_0 .net *"_s83", 0 0, L_0x2229da0; 1 drivers -v0x2218610_0 .net *"_s85", 0 0, L_0x2229b30; 1 drivers -v0x22182d0_0 .net *"_s87", 0 0, L_0x2229c80; 1 drivers -v0x2218370_0 .net *"_s89", 0 0, L_0x2229ea0; 1 drivers -v0x2218410_0 .net *"_s9", 0 0, L_0x2225d00; 1 drivers -v0x22184b0_0 .net *"_s91", 0 0, L_0x222a020; 1 drivers -v0x2218980_0 .net *"_s93", 0 0, L_0x222a1a0; 1 drivers -v0x2218a00_0 .net *"_s95", 0 0, L_0x222a320; 1 drivers -v0x2218690_0 .net *"_s97", 0 0, L_0x222a790; 1 drivers -v0x2218730_0 .net *"_s99", 0 0, L_0x222aab0; 1 drivers -v0x22187d0_0 .net "address", 0 0, L_0x22305c0; 1 drivers -v0x2218870_0 .alias "in0", 31 0, v0x221f090_0; -v0x2218da0_0 .net "in00addr", 0 0, L_0x2222870; 1 drivers -v0x2218e20_0 .net "in010addr", 0 0, L_0x2226640; 1 drivers -v0x2218a80_0 .net "in011addr", 0 0, L_0x2225a20; 1 drivers -v0x2218b20_0 .net "in012addr", 0 0, L_0x22265e0; 1 drivers -v0x2218bc0_0 .net "in013addr", 0 0, L_0x2226a80; 1 drivers -v0x2218c60_0 .net "in014addr", 0 0, L_0x2226c50; 1 drivers -v0x2218d00_0 .net "in015addr", 0 0, L_0x2226f60; 1 drivers -v0x22191f0_0 .net "in016addr", 0 0, L_0x2227140; 1 drivers -v0x2218ea0_0 .net "in017addr", 0 0, L_0x22272e0; 1 drivers -v0x2218f40_0 .net "in018addr", 0 0, L_0x22270b0; 1 drivers -v0x2218fe0_0 .net "in019addr", 0 0, L_0x2227600; 1 drivers -v0x2219080_0 .net "in01addr", 0 0, L_0x22225b0; 1 drivers -v0x2219120_0 .net "in020addr", 0 0, L_0x2227430; 1 drivers -v0x22195f0_0 .net "in021addr", 0 0, L_0x2227940; 1 drivers -v0x2219270_0 .net "in022addr", 0 0, L_0x2227780; 1 drivers -v0x2219310_0 .net "in023addr", 0 0, L_0x2227ca0; 1 drivers -v0x22193b0_0 .net "in024addr", 0 0, L_0x2227ac0; 1 drivers -v0x2219450_0 .net "in025addr", 0 0, L_0x2227fa0; 1 drivers -v0x22194f0_0 .net "in026addr", 0 0, L_0x2227df0; 1 drivers -v0x2219a20_0 .net "in027addr", 0 0, L_0x22282f0; 1 drivers -v0x2219670_0 .net "in028addr", 0 0, L_0x2228120; 1 drivers -v0x22196f0_0 .net "in029addr", 0 0, L_0x2228630; 1 drivers -v0x2219790_0 .net "in02addr", 0 0, L_0x22259c0; 1 drivers -v0x2219830_0 .net "in030addr", 0 0, L_0x2217b80; 1 drivers -v0x22198d0_0 .net "in031addr", 0 0, L_0x22266a0; 1 drivers -v0x2219970_0 .net "in03addr", 0 0, L_0x2225b50; 1 drivers -v0x2219e90_0 .net "in04addr", 0 0, L_0x2225ca0; 1 drivers -v0x2219f10_0 .net "in05addr", 0 0, L_0x2225df0; 1 drivers -v0x2219aa0_0 .net "in06addr", 0 0, L_0x2225f40; 1 drivers -v0x2219b20_0 .net "in07addr", 0 0, L_0x22261a0; 1 drivers -v0x2219bc0_0 .net "in08addr", 0 0, L_0x2226340; 1 drivers -v0x2219c60_0 .net "in09addr", 0 0, L_0x2226490; 1 drivers -v0x2219d00_0 .alias "in1", 31 0, v0x221f330_0; -v0x2219da0_0 .net "in10addr", 0 0, L_0x2226e60; 1 drivers -v0x221a3c0_0 .net "in110addr", 0 0, L_0x2229ad0; 1 drivers -v0x221a440_0 .net "in111addr", 0 0, L_0x2229c20; 1 drivers -v0x2219f90_0 .net "in112addr", 0 0, L_0x2229e40; 1 drivers -v0x221a030_0 .net "in113addr", 0 0, L_0x2229f90; 1 drivers -v0x221a0d0_0 .net "in114addr", 0 0, L_0x222a110; 1 drivers -v0x221a170_0 .net "in115addr", 0 0, L_0x222a290; 1 drivers -v0x221a210_0 .net "in116addr", 0 0, L_0x22298e0; 1 drivers -v0x221a2b0_0 .net "in117addr", 0 0, L_0x222a880; 1 drivers -v0x221a930_0 .net "in118addr", 0 0, L_0x222a8e0; 1 drivers -v0x221a9b0_0 .net "in119addr", 0 0, L_0x222ad40; 1 drivers -v0x221a4c0_0 .net "in11addr", 0 0, L_0x2226cb0; 1 drivers -v0x221a560_0 .net "in120addr", 0 0, L_0x222aba0; 1 drivers -v0x221a600_0 .net "in121addr", 0 0, L_0x222b040; 1 drivers -v0x221a6a0_0 .net "in122addr", 0 0, L_0x222ae40; 1 drivers -v0x221a740_0 .net "in123addr", 0 0, L_0x222a3c0; 1 drivers -v0x221a7e0_0 .net "in124addr", 0 0, L_0x222b190; 1 drivers -v0x221a880_0 .net "in125addr", 0 0, L_0x222b310; 1 drivers -v0x221aee0_0 .net "in126addr", 0 0, L_0x222b460; 1 drivers -v0x221aa30_0 .net "in127addr", 0 0, L_0x222b7a0; 1 drivers -v0x221aad0_0 .net "in128addr", 0 0, L_0x222b8d0; 1 drivers -v0x221ab70_0 .net "in129addr", 0 0, L_0x222ba50; 1 drivers -v0x221ac10_0 .net "in12addr", 0 0, L_0x2224f90; 1 drivers -v0x221acb0_0 .net "in130addr", 0 0, L_0x222b5b0; 1 drivers -v0x221ad50_0 .net "in131addr", 0 0, L_0x222b640; 1 drivers -v0x221adf0_0 .net "in13addr", 0 0, L_0x2225340; 1 drivers -v0x221b450_0 .net "in14addr", 0 0, L_0x22250f0; 1 drivers -v0x221af60_0 .net "in15addr", 0 0, L_0x2225240; 1 drivers -v0x221b000_0 .net "in16addr", 0 0, L_0x2229440; 1 drivers -v0x221b0a0_0 .net "in17addr", 0 0, L_0x22295c0; 1 drivers -v0x221b140_0 .net "in18addr", 0 0, L_0x2229750; 1 drivers -v0x221b1e0_0 .net "in19addr", 0 0, L_0x22299f0; 1 drivers -v0x221b280_0 .net "invaddr", 0 0, L_0x221c0d0; 1 drivers -v0x221b320_0 .alias "out", 31 0, v0x221f870_0; -L_0x22224c0 .part v0x221f6f0_0, 0, 1; -L_0x2222610 .part v0x221f6f0_0, 1, 1; -L_0x2225ab0 .part v0x221f6f0_0, 2, 1; -L_0x2225bb0 .part v0x221f6f0_0, 3, 1; -L_0x2225d00 .part v0x221f6f0_0, 4, 1; -L_0x2225e50 .part v0x221f6f0_0, 5, 1; -L_0x22260b0 .part v0x221f6f0_0, 6, 1; -L_0x2226200 .part v0x221f6f0_0, 7, 1; -L_0x22263a0 .part v0x221f6f0_0, 8, 1; -L_0x22264f0 .part v0x221f6f0_0, 9, 1; -L_0x2226710 .part v0x221f6f0_0, 10, 1; -L_0x22267b0 .part v0x221f6f0_0, 11, 1; -L_0x2226990 .part v0x221f6f0_0, 12, 1; -L_0x2226ae0 .part v0x221f6f0_0, 13, 1; -L_0x2226ec0 .part v0x221f6f0_0, 14, 1; -L_0x2226fc0 .part v0x221f6f0_0, 15, 1; -L_0x2227240 .part v0x221f6f0_0, 16, 1; -L_0x2227340 .part v0x221f6f0_0, 17, 1; -L_0x22271a0 .part v0x221f6f0_0, 18, 1; -L_0x2227690 .part v0x221f6f0_0, 19, 1; -L_0x2227500 .part v0x221f6f0_0, 20, 1; -L_0x22279d0 .part v0x221f6f0_0, 21, 1; -L_0x2227810 .part v0x221f6f0_0, 22, 1; -L_0x2227d00 .part v0x221f6f0_0, 23, 1; -L_0x2227b50 .part v0x221f6f0_0, 24, 1; -L_0x2228030 .part v0x221f6f0_0, 25, 1; -L_0x2227e80 .part v0x221f6f0_0, 26, 1; -L_0x2228350 .part v0x221f6f0_0, 27, 1; -L_0x22281b0 .part v0x221f6f0_0, 28, 1; -L_0x2228690 .part v0x221f6f0_0, 29, 1; -L_0x22268a0 .part v0x221f6f0_0, 30, 1; -L_0x2226dc0 .part v0x221f6f0_0, 31, 1; -L_0x2228560 .part RS_0x7f8758e33a18, 0, 1; -L_0x2226d10 .part RS_0x7f8758e33a18, 1, 1; -L_0x2228440 .part RS_0x7f8758e33a18, 2, 1; -L_0x22293a0 .part RS_0x7f8758e33a18, 3, 1; -L_0x2225150 .part RS_0x7f8758e33a18, 4, 1; -L_0x22296b0 .part RS_0x7f8758e33a18, 5, 1; -L_0x22294d0 .part RS_0x7f8758e33a18, 6, 1; -L_0x2224ff0 .part RS_0x7f8758e33a18, 7, 1; -L_0x22297e0 .part RS_0x7f8758e33a18, 8, 1; -L_0x2229da0 .part RS_0x7f8758e33a18, 9, 1; -L_0x2229b30 .part RS_0x7f8758e33a18, 10, 1; -L_0x2229c80 .part RS_0x7f8758e33a18, 11, 1; -L_0x2229ea0 .part RS_0x7f8758e33a18, 12, 1; -L_0x222a020 .part RS_0x7f8758e33a18, 13, 1; -L_0x222a1a0 .part RS_0x7f8758e33a18, 14, 1; -L_0x222a320 .part RS_0x7f8758e33a18, 15, 1; -L_0x222a790 .part RS_0x7f8758e33a18, 16, 1; -L_0x222aab0 .part RS_0x7f8758e33a18, 17, 1; -L_0x222a970 .part RS_0x7f8758e33a18, 18, 1; -L_0x222ada0 .part RS_0x7f8758e33a18, 19, 1; -L_0x222ac60 .part RS_0x7f8758e33a18, 20, 1; -L_0x222b0a0 .part RS_0x7f8758e33a18, 21, 1; -L_0x222af00 .part RS_0x7f8758e33a18, 22, 1; -L_0x222a450 .part RS_0x7f8758e33a18, 23, 1; -L_0x222b220 .part RS_0x7f8758e33a18, 24, 1; -L_0x222b370 .part RS_0x7f8758e33a18, 25, 1; -L_0x222b6b0 .part RS_0x7f8758e33a18, 26, 1; -L_0x222b830 .part RS_0x7f8758e33a18, 27, 1; -L_0x222b960 .part RS_0x7f8758e33a18, 28, 1; -L_0x222b4c0 .part RS_0x7f8758e33a18, 29, 1; -L_0x222bb00 .part RS_0x7f8758e33a18, 30, 1; -L_0x222bbf0 .part RS_0x7f8758e33a18, 31, 1; -L_0x222bef0 .part/pv L_0x222bfc0, 0, 1, 32; -L_0x22253f0 .part/pv L_0x2225740, 1, 1, 32; -L_0x222bd80 .part/pv L_0x222be20, 2, 1, 32; -L_0x222a540 .part/pv L_0x222a5e0, 3, 1, 32; -L_0x2225520 .part/pv L_0x22255c0, 4, 1, 32; -L_0x222cdb0 .part/pv L_0x222cf60, 5, 1, 32; -L_0x222d0b0 .part/pv L_0x222d150, 6, 1, 32; -L_0x222d210 .part/pv L_0x222d2b0, 7, 1, 32; -L_0x222d400 .part/pv L_0x222d4a0, 8, 1, 32; -L_0x222d5f0 .part/pv L_0x222d6e0, 9, 1, 32; -L_0x222d830 .part/pv L_0x222d8d0, 10, 1, 32; -L_0x222da20 .part/pv L_0x222dd30, 11, 1, 32; -L_0x222de80 .part/pv L_0x222df20, 12, 1, 32; -L_0x222e020 .part/pv L_0x222ce50, 13, 1, 32; -L_0x222e110 .part/pv L_0x222e1b0, 14, 1, 32; -L_0x222db10 .part/pv L_0x222dbb0, 15, 1, 32; -L_0x222e300 .part/pv L_0x222e3a0, 16, 1, 32; -L_0x222e790 .part/pv L_0x222ead0, 17, 1, 32; -L_0x222ec20 .part/pv L_0x222ecc0, 18, 1, 32; -L_0x222ee10 .part/pv L_0x222eeb0, 19, 1, 32; -L_0x222e8d0 .part/pv L_0x222e970, 20, 1, 32; -L_0x222ef10 .part/pv L_0x222efb0, 21, 1, 32; -L_0x222f100 .part/pv L_0x222f1a0, 22, 1, 32; -L_0x222f2f0 .part/pv L_0x222f660, 23, 1, 32; -L_0x222f7b0 .part/pv L_0x222f850, 24, 1, 32; -L_0x222fcf0 .part/pv L_0x222f9a0, 25, 1, 32; -L_0x222f480 .part/pv L_0x222f520, 26, 1, 32; -L_0x222fa10 .part/pv L_0x222fab0, 27, 1, 32; -L_0x222fc00 .part/pv L_0x222fd90, 28, 1, 32; -L_0x222fe90 .part/pv L_0x222aea0, 29, 1, 32; -L_0x222ff30 .part/pv L_0x222a730, 30, 1, 32; -L_0x22303d0 .part/pv L_0x2230470, 31, 1, 32; -S_0x22110c0 .scope module, "adder0" "FullAdder4bit" 4 239, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x2234070/d .functor AND 1, L_0x2234750, L_0x22347f0, C4<1>, C4<1>; -L_0x2234070 .delay (50000,50000,50000) L_0x2234070/d; -L_0x2234910/d .functor NOR 1, L_0x22349b0, L_0x2234a50, C4<0>, C4<0>; -L_0x2234910 .delay (50000,50000,50000) L_0x2234910/d; -L_0x2234b80/d .functor AND 1, L_0x2234c70, L_0x2234d10, C4<1>, C4<1>; -L_0x2234b80 .delay (50000,50000,50000) L_0x2234b80/d; -L_0x2234af0/d .functor NOR 1, L_0x2234f30, L_0x22350e0, C4<0>, C4<0>; -L_0x2234af0 .delay (50000,50000,50000) L_0x2234af0/d; -L_0x2234e00/d .functor OR 1, L_0x2234070, L_0x2234910, C4<0>, C4<0>; -L_0x2234e00 .delay (50000,50000,50000) L_0x2234e00/d; -L_0x2235320/d .functor NOR 1, L_0x2234b80, L_0x2234af0, C4<0>, C4<0>; -L_0x2235320 .delay (50000,50000,50000) L_0x2235320/d; -L_0x2235460/d .functor AND 1, L_0x2234e00, L_0x2235320, C4<1>, C4<1>; -L_0x2235460 .delay (50000,50000,50000) L_0x2235460/d; -v0x2213cb0_0 .net *"_s25", 0 0, L_0x2234750; 1 drivers -v0x2213d70_0 .net *"_s27", 0 0, L_0x22347f0; 1 drivers -v0x2213e10_0 .net *"_s29", 0 0, L_0x22349b0; 1 drivers -v0x2213eb0_0 .net *"_s31", 0 0, L_0x2234a50; 1 drivers -v0x2213f30_0 .net *"_s33", 0 0, L_0x2234c70; 1 drivers -v0x2213fd0_0 .net *"_s35", 0 0, L_0x2234d10; 1 drivers -v0x2214070_0 .net *"_s37", 0 0, L_0x2234f30; 1 drivers -v0x2214110_0 .net *"_s39", 0 0, L_0x22350e0; 1 drivers -v0x22141b0_0 .net "a", 3 0, L_0x22257b0; 1 drivers -v0x2214250_0 .net "aandb", 0 0, L_0x2234070; 1 drivers -v0x22142f0_0 .net "abandnoror", 0 0, L_0x2234e00; 1 drivers -v0x2214390_0 .net "anorb", 0 0, L_0x2234910; 1 drivers -v0x2214430_0 .net "b", 3 0, L_0x22258a0; 1 drivers -v0x22144d0_0 .net "bandsum", 0 0, L_0x2234b80; 1 drivers -v0x22145f0_0 .net "bnorsum", 0 0, L_0x2234af0; 1 drivers -v0x2214690_0 .net "bsumandnornor", 0 0, L_0x2235320; 1 drivers -v0x2214550_0 .net "carryin", 0 0, L_0x22358c0; 1 drivers -v0x22147c0_0 .alias "carryout", 0 0, v0x221e770_0; -v0x2214710_0 .net "carryout1", 0 0, L_0x222e540; 1 drivers -v0x22148e0_0 .net "carryout2", 0 0, L_0x2231a50; 1 drivers -v0x2214a10_0 .net "carryout3", 0 0, L_0x2232a70; 1 drivers -v0x2214a90_0 .alias "overflow", 0 0, v0x221b3c0_0; -v0x2214960_0 .net8 "sum", 3 0, RS_0x7f8758e32188; 4 drivers -L_0x22315c0 .part/pv L_0x22314f0, 0, 1, 4; -L_0x2231660 .part L_0x22257b0, 0, 1; -L_0x2231700 .part L_0x22258a0, 0, 1; -L_0x22323b0 .part/pv L_0x22322e0, 1, 1, 4; -L_0x22324a0 .part L_0x22257b0, 1, 1; -L_0x2232590 .part L_0x22258a0, 1, 1; -L_0x2233410 .part/pv L_0x2233340, 2, 1, 4; -L_0x22334b0 .part L_0x22257b0, 2, 1; -L_0x22335a0 .part L_0x22258a0, 2, 1; -L_0x2234310 .part/pv L_0x2234240, 3, 1, 4; -L_0x2234440 .part L_0x22257b0, 3, 1; -L_0x2234570 .part L_0x22258a0, 3, 1; -L_0x2234750 .part L_0x22257b0, 3, 1; -L_0x22347f0 .part L_0x22258a0, 3, 1; -L_0x22349b0 .part L_0x22257b0, 3, 1; -L_0x2234a50 .part L_0x22258a0, 3, 1; -L_0x2234c70 .part L_0x22258a0, 3, 1; -L_0x2234d10 .part RS_0x7f8758e32188, 3, 1; -L_0x2234f30 .part L_0x22258a0, 3, 1; -L_0x22350e0 .part RS_0x7f8758e32188, 3, 1; -S_0x2213220 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x22110c0; - .timescale -9 -12; -L_0x22306b0/d .functor AND 1, L_0x2231660, L_0x2231700, C4<1>, C4<1>; -L_0x22306b0 .delay (50000,50000,50000) L_0x22306b0/d; -L_0x2230760/d .functor AND 1, L_0x2231660, L_0x22358c0, C4<1>, C4<1>; -L_0x2230760 .delay (50000,50000,50000) L_0x2230760/d; -L_0x2230860/d .functor AND 1, L_0x2231700, L_0x22358c0, C4<1>, C4<1>; -L_0x2230860 .delay (50000,50000,50000) L_0x2230860/d; -L_0x2230910/d .functor OR 1, L_0x22306b0, L_0x2230760, C4<0>, C4<0>; -L_0x2230910 .delay (50000,50000,50000) L_0x2230910/d; -L_0x222e540/d .functor OR 1, L_0x2230910, L_0x2230860, C4<0>, C4<0>; -L_0x222e540 .delay (50000,50000,50000) L_0x222e540/d; -L_0x222e640/d .functor OR 1, L_0x2231660, L_0x2231700, C4<0>, C4<0>; -L_0x222e640 .delay (50000,50000,50000) L_0x222e640/d; -L_0x222e6a0/d .functor OR 1, L_0x222e640, L_0x22358c0, C4<0>, C4<0>; -L_0x222e6a0 .delay (50000,50000,50000) L_0x222e6a0/d; -L_0x22310c0/d .functor NOT 1, L_0x222e540, C4<0>, C4<0>, C4<0>; -L_0x22310c0 .delay (50000,50000,50000) L_0x22310c0/d; -L_0x22311b0/d .functor AND 1, L_0x22310c0, L_0x222e6a0, C4<1>, C4<1>; -L_0x22311b0 .delay (50000,50000,50000) L_0x22311b0/d; -L_0x22312b0/d .functor AND 1, L_0x2231660, L_0x2231700, C4<1>, C4<1>; -L_0x22312b0 .delay (50000,50000,50000) L_0x22312b0/d; -L_0x2231490/d .functor AND 1, L_0x22312b0, L_0x22358c0, C4<1>, C4<1>; -L_0x2231490 .delay (50000,50000,50000) L_0x2231490/d; -L_0x22314f0/d .functor OR 1, L_0x22311b0, L_0x2231490, C4<0>, C4<0>; -L_0x22314f0 .delay (50000,50000,50000) L_0x22314f0/d; -v0x2213310_0 .net "a", 0 0, L_0x2231660; 1 drivers -v0x22133d0_0 .net "ab", 0 0, L_0x22306b0; 1 drivers -v0x2213470_0 .net "acarryin", 0 0, L_0x2230760; 1 drivers -v0x2213510_0 .net "andall", 0 0, L_0x2231490; 1 drivers -v0x2213590_0 .net "andsingleintermediate", 0 0, L_0x22312b0; 1 drivers -v0x2213630_0 .net "andsumintermediate", 0 0, L_0x22311b0; 1 drivers -v0x22136d0_0 .net "b", 0 0, L_0x2231700; 1 drivers -v0x2213770_0 .net "bcarryin", 0 0, L_0x2230860; 1 drivers -v0x2213810_0 .alias "carryin", 0 0, v0x2214550_0; -v0x22138b0_0 .alias "carryout", 0 0, v0x2214710_0; -v0x2213930_0 .net "invcarryout", 0 0, L_0x22310c0; 1 drivers -v0x22139b0_0 .net "orall", 0 0, L_0x222e6a0; 1 drivers -v0x2213a50_0 .net "orpairintermediate", 0 0, L_0x2230910; 1 drivers -v0x2213af0_0 .net "orsingleintermediate", 0 0, L_0x222e640; 1 drivers -v0x2213c10_0 .net "sum", 0 0, L_0x22314f0; 1 drivers -S_0x2212790 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x22110c0; - .timescale -9 -12; -L_0x2231430/d .functor AND 1, L_0x22324a0, L_0x2232590, C4<1>, C4<1>; -L_0x2231430 .delay (50000,50000,50000) L_0x2231430/d; -L_0x22317f0/d .functor AND 1, L_0x22324a0, L_0x222e540, C4<1>, C4<1>; -L_0x22317f0 .delay (50000,50000,50000) L_0x22317f0/d; -L_0x22318a0/d .functor AND 1, L_0x2232590, L_0x222e540, C4<1>, C4<1>; -L_0x22318a0 .delay (50000,50000,50000) L_0x22318a0/d; -L_0x2231950/d .functor OR 1, L_0x2231430, L_0x22317f0, C4<0>, C4<0>; -L_0x2231950 .delay (50000,50000,50000) L_0x2231950/d; -L_0x2231a50/d .functor OR 1, L_0x2231950, L_0x22318a0, C4<0>, C4<0>; -L_0x2231a50 .delay (50000,50000,50000) L_0x2231a50/d; -L_0x2231b50/d .functor OR 1, L_0x22324a0, L_0x2232590, C4<0>, C4<0>; -L_0x2231b50 .delay (50000,50000,50000) L_0x2231b50/d; -L_0x2231c30/d .functor OR 1, L_0x2231b50, L_0x222e540, C4<0>, C4<0>; -L_0x2231c30 .delay (50000,50000,50000) L_0x2231c30/d; -L_0x2231d20/d .functor NOT 1, L_0x2231a50, C4<0>, C4<0>, C4<0>; -L_0x2231d20 .delay (50000,50000,50000) L_0x2231d20/d; -L_0x2231e50/d .functor AND 1, L_0x2231d20, L_0x2231c30, C4<1>, C4<1>; -L_0x2231e50 .delay (50000,50000,50000) L_0x2231e50/d; -L_0x2231f50/d .functor AND 1, L_0x22324a0, L_0x2232590, C4<1>, C4<1>; -L_0x2231f50 .delay (50000,50000,50000) L_0x2231f50/d; -L_0x2232170/d .functor AND 1, L_0x2231f50, L_0x222e540, C4<1>, C4<1>; -L_0x2232170 .delay (50000,50000,50000) L_0x2232170/d; -L_0x22322e0/d .functor OR 1, L_0x2231e50, L_0x2232170, C4<0>, C4<0>; -L_0x22322e0 .delay (50000,50000,50000) L_0x22322e0/d; -v0x2212880_0 .net "a", 0 0, L_0x22324a0; 1 drivers -v0x2212940_0 .net "ab", 0 0, L_0x2231430; 1 drivers -v0x22129e0_0 .net "acarryin", 0 0, L_0x22317f0; 1 drivers -v0x2212a80_0 .net "andall", 0 0, L_0x2232170; 1 drivers -v0x2212b00_0 .net "andsingleintermediate", 0 0, L_0x2231f50; 1 drivers -v0x2212ba0_0 .net "andsumintermediate", 0 0, L_0x2231e50; 1 drivers -v0x2212c40_0 .net "b", 0 0, L_0x2232590; 1 drivers -v0x2212ce0_0 .net "bcarryin", 0 0, L_0x22318a0; 1 drivers -v0x2212d80_0 .alias "carryin", 0 0, v0x2214710_0; -v0x2212e20_0 .alias "carryout", 0 0, v0x22148e0_0; -v0x2212ea0_0 .net "invcarryout", 0 0, L_0x2231d20; 1 drivers -v0x2212f20_0 .net "orall", 0 0, L_0x2231c30; 1 drivers -v0x2212fc0_0 .net "orpairintermediate", 0 0, L_0x2231950; 1 drivers -v0x2213060_0 .net "orsingleintermediate", 0 0, L_0x2231b50; 1 drivers -v0x2213180_0 .net "sum", 0 0, L_0x22322e0; 1 drivers -S_0x2211cb0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x22110c0; - .timescale -9 -12; -L_0x2232110/d .functor AND 1, L_0x22334b0, L_0x22335a0, C4<1>, C4<1>; -L_0x2232110 .delay (50000,50000,50000) L_0x2232110/d; -L_0x2232750/d .functor AND 1, L_0x22334b0, L_0x2231a50, C4<1>, C4<1>; -L_0x2232750 .delay (50000,50000,50000) L_0x2232750/d; -L_0x2232840/d .functor AND 1, L_0x22335a0, L_0x2231a50, C4<1>, C4<1>; -L_0x2232840 .delay (50000,50000,50000) L_0x2232840/d; -L_0x2232930/d .functor OR 1, L_0x2232110, L_0x2232750, C4<0>, C4<0>; -L_0x2232930 .delay (50000,50000,50000) L_0x2232930/d; -L_0x2232a70/d .functor OR 1, L_0x2232930, L_0x2232840, C4<0>, C4<0>; -L_0x2232a70 .delay (50000,50000,50000) L_0x2232a70/d; -L_0x2232bb0/d .functor OR 1, L_0x22334b0, L_0x22335a0, C4<0>, C4<0>; -L_0x2232bb0 .delay (50000,50000,50000) L_0x2232bb0/d; -L_0x2232c90/d .functor OR 1, L_0x2232bb0, L_0x2231a50, C4<0>, C4<0>; -L_0x2232c90 .delay (50000,50000,50000) L_0x2232c90/d; -L_0x2232d80/d .functor NOT 1, L_0x2232a70, C4<0>, C4<0>, C4<0>; -L_0x2232d80 .delay (50000,50000,50000) L_0x2232d80/d; -L_0x2232eb0/d .functor AND 1, L_0x2232d80, L_0x2232c90, C4<1>, C4<1>; -L_0x2232eb0 .delay (50000,50000,50000) L_0x2232eb0/d; -L_0x2232fb0/d .functor AND 1, L_0x22334b0, L_0x22335a0, C4<1>, C4<1>; -L_0x2232fb0 .delay (50000,50000,50000) L_0x2232fb0/d; -L_0x22331d0/d .functor AND 1, L_0x2232fb0, L_0x2231a50, C4<1>, C4<1>; -L_0x22331d0 .delay (50000,50000,50000) L_0x22331d0/d; -L_0x2233340/d .functor OR 1, L_0x2232eb0, L_0x22331d0, C4<0>, C4<0>; -L_0x2233340 .delay (50000,50000,50000) L_0x2233340/d; -v0x2211da0_0 .net "a", 0 0, L_0x22334b0; 1 drivers -v0x2211e60_0 .net "ab", 0 0, L_0x2232110; 1 drivers -v0x2211f00_0 .net "acarryin", 0 0, L_0x2232750; 1 drivers -v0x2211fa0_0 .net "andall", 0 0, L_0x22331d0; 1 drivers -v0x2212020_0 .net "andsingleintermediate", 0 0, L_0x2232fb0; 1 drivers -v0x22120c0_0 .net "andsumintermediate", 0 0, L_0x2232eb0; 1 drivers -v0x2212160_0 .net "b", 0 0, L_0x22335a0; 1 drivers -v0x2212200_0 .net "bcarryin", 0 0, L_0x2232840; 1 drivers -v0x22122f0_0 .alias "carryin", 0 0, v0x22148e0_0; -v0x2212390_0 .alias "carryout", 0 0, v0x2214a10_0; -v0x2212410_0 .net "invcarryout", 0 0, L_0x2232d80; 1 drivers -v0x2212490_0 .net "orall", 0 0, L_0x2232c90; 1 drivers -v0x2212530_0 .net "orpairintermediate", 0 0, L_0x2232930; 1 drivers -v0x22125d0_0 .net "orsingleintermediate", 0 0, L_0x2232bb0; 1 drivers -v0x22126f0_0 .net "sum", 0 0, L_0x2233340; 1 drivers -S_0x22111b0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x22110c0; - .timescale -9 -12; -L_0x2233170/d .functor AND 1, L_0x2234440, L_0x2234570, C4<1>, C4<1>; -L_0x2233170 .delay (50000,50000,50000) L_0x2233170/d; -L_0x2233690/d .functor AND 1, L_0x2234440, L_0x2232a70, C4<1>, C4<1>; -L_0x2233690 .delay (50000,50000,50000) L_0x2233690/d; -L_0x2233780/d .functor AND 1, L_0x2234570, L_0x2232a70, C4<1>, C4<1>; -L_0x2233780 .delay (50000,50000,50000) L_0x2233780/d; -L_0x2233870/d .functor OR 1, L_0x2233170, L_0x2233690, C4<0>, C4<0>; -L_0x2233870 .delay (50000,50000,50000) L_0x2233870/d; -L_0x22339b0/d .functor OR 1, L_0x2233870, L_0x2233780, C4<0>, C4<0>; -L_0x22339b0 .delay (50000,50000,50000) L_0x22339b0/d; -L_0x2233af0/d .functor OR 1, L_0x2234440, L_0x2234570, C4<0>, C4<0>; -L_0x2233af0 .delay (50000,50000,50000) L_0x2233af0/d; -L_0x2233bd0/d .functor OR 1, L_0x2233af0, L_0x2232a70, C4<0>, C4<0>; -L_0x2233bd0 .delay (50000,50000,50000) L_0x2233bd0/d; -L_0x2233cc0/d .functor NOT 1, L_0x22339b0, C4<0>, C4<0>, C4<0>; -L_0x2233cc0 .delay (50000,50000,50000) L_0x2233cc0/d; -L_0x2233d60/d .functor AND 1, L_0x2233cc0, L_0x2233bd0, C4<1>, C4<1>; -L_0x2233d60 .delay (50000,50000,50000) L_0x2233d60/d; -L_0x2233eb0/d .functor AND 1, L_0x2234440, L_0x2234570, C4<1>, C4<1>; -L_0x2233eb0 .delay (50000,50000,50000) L_0x2233eb0/d; -L_0x22340d0/d .functor AND 1, L_0x2233eb0, L_0x2232a70, C4<1>, C4<1>; -L_0x22340d0 .delay (50000,50000,50000) L_0x22340d0/d; -L_0x2234240/d .functor OR 1, L_0x2233d60, L_0x22340d0, C4<0>, C4<0>; -L_0x2234240 .delay (50000,50000,50000) L_0x2234240/d; -v0x22112a0_0 .net "a", 0 0, L_0x2234440; 1 drivers -v0x2211360_0 .net "ab", 0 0, L_0x2233170; 1 drivers -v0x2211400_0 .net "acarryin", 0 0, L_0x2233690; 1 drivers -v0x22114a0_0 .net "andall", 0 0, L_0x22340d0; 1 drivers -v0x2211520_0 .net "andsingleintermediate", 0 0, L_0x2233eb0; 1 drivers -v0x22115c0_0 .net "andsumintermediate", 0 0, L_0x2233d60; 1 drivers -v0x2211660_0 .net "b", 0 0, L_0x2234570; 1 drivers -v0x2211700_0 .net "bcarryin", 0 0, L_0x2233780; 1 drivers -v0x22117f0_0 .alias "carryin", 0 0, v0x2214a10_0; -v0x2211890_0 .alias "carryout", 0 0, v0x221e770_0; -v0x2211910_0 .net "invcarryout", 0 0, L_0x2233cc0; 1 drivers -v0x22119b0_0 .net "orall", 0 0, L_0x2233bd0; 1 drivers -v0x2211a50_0 .net "orpairintermediate", 0 0, L_0x2233870; 1 drivers -v0x2211af0_0 .net "orsingleintermediate", 0 0, L_0x2233af0; 1 drivers -v0x2211c10_0 .net "sum", 0 0, L_0x2234240; 1 drivers -S_0x220d5b0 .scope module, "adder1" "FullAdder4bit" 4 240, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x22391c0/d .functor AND 1, L_0x22398a0, L_0x2239940, C4<1>, C4<1>; -L_0x22391c0 .delay (50000,50000,50000) L_0x22391c0/d; -L_0x2239a60/d .functor NOR 1, L_0x2239b00, L_0x2239ba0, C4<0>, C4<0>; -L_0x2239a60 .delay (50000,50000,50000) L_0x2239a60/d; -L_0x2239cd0/d .functor AND 1, L_0x2239dc0, L_0x2239e60, C4<1>, C4<1>; -L_0x2239cd0 .delay (50000,50000,50000) L_0x2239cd0/d; -L_0x2239c40/d .functor NOR 1, L_0x223a080, L_0x223a230, C4<0>, C4<0>; -L_0x2239c40 .delay (50000,50000,50000) L_0x2239c40/d; -L_0x2239f50/d .functor OR 1, L_0x22391c0, L_0x2239a60, C4<0>, C4<0>; -L_0x2239f50 .delay (50000,50000,50000) L_0x2239f50/d; -L_0x223a470/d .functor NOR 1, L_0x2239cd0, L_0x2239c40, C4<0>, C4<0>; -L_0x223a470 .delay (50000,50000,50000) L_0x223a470/d; -L_0x223a5b0/d .functor AND 1, L_0x2239f50, L_0x223a470, C4<1>, C4<1>; -L_0x223a5b0 .delay (50000,50000,50000) L_0x223a5b0/d; -v0x22101a0_0 .net *"_s25", 0 0, L_0x22398a0; 1 drivers -v0x2210260_0 .net *"_s27", 0 0, L_0x2239940; 1 drivers -v0x2210300_0 .net *"_s29", 0 0, L_0x2239b00; 1 drivers -v0x22103a0_0 .net *"_s31", 0 0, L_0x2239ba0; 1 drivers -v0x2210420_0 .net *"_s33", 0 0, L_0x2239dc0; 1 drivers -v0x22104c0_0 .net *"_s35", 0 0, L_0x2239e60; 1 drivers -v0x2210560_0 .net *"_s37", 0 0, L_0x223a080; 1 drivers -v0x2210600_0 .net *"_s39", 0 0, L_0x223a230; 1 drivers -v0x22106a0_0 .net "a", 3 0, L_0x2235690; 1 drivers -v0x2210740_0 .net "aandb", 0 0, L_0x22391c0; 1 drivers -v0x22107e0_0 .net "abandnoror", 0 0, L_0x2239f50; 1 drivers -v0x2210880_0 .net "anorb", 0 0, L_0x2239a60; 1 drivers -v0x2210920_0 .net "b", 3 0, L_0x2235730; 1 drivers -v0x22109c0_0 .net "bandsum", 0 0, L_0x2239cd0; 1 drivers -v0x2210ae0_0 .net "bnorsum", 0 0, L_0x2239c40; 1 drivers -v0x2210b80_0 .net "bsumandnornor", 0 0, L_0x223a470; 1 drivers -v0x2210a40_0 .alias "carryin", 0 0, v0x221e770_0; -v0x2210cb0_0 .alias "carryout", 0 0, v0x221eb70_0; -v0x2210c00_0 .net "carryout1", 0 0, L_0x2235d80; 1 drivers -v0x2210dd0_0 .net "carryout2", 0 0, L_0x2236bb0; 1 drivers -v0x2210f00_0 .net "carryout3", 0 0, L_0x2237c10; 1 drivers -v0x2210f80_0 .alias "overflow", 0 0, v0x221ba00_0; -v0x2210e50_0 .net8 "sum", 3 0, RS_0x7f8758e313a8; 4 drivers -L_0x2236620 .part/pv L_0x2236580, 0, 1, 4; -L_0x22366c0 .part L_0x2235690, 0, 1; -L_0x2236760 .part L_0x2235730, 0, 1; -L_0x2237550 .part/pv L_0x2237480, 1, 1, 4; -L_0x2237640 .part L_0x2235690, 1, 1; -L_0x2237730 .part L_0x2235730, 1, 1; -L_0x2238560 .part/pv L_0x2238490, 2, 1, 4; -L_0x2238600 .part L_0x2235690, 2, 1; -L_0x22386f0 .part L_0x2235730, 2, 1; -L_0x2239460 .part/pv L_0x2239390, 3, 1, 4; -L_0x2239590 .part L_0x2235690, 3, 1; -L_0x22396c0 .part L_0x2235730, 3, 1; -L_0x22398a0 .part L_0x2235690, 3, 1; -L_0x2239940 .part L_0x2235730, 3, 1; -L_0x2239b00 .part L_0x2235690, 3, 1; -L_0x2239ba0 .part L_0x2235730, 3, 1; -L_0x2239dc0 .part L_0x2235730, 3, 1; -L_0x2239e60 .part RS_0x7f8758e313a8, 3, 1; -L_0x223a080 .part L_0x2235730, 3, 1; -L_0x223a230 .part RS_0x7f8758e313a8, 3, 1; -S_0x220f710 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x220d5b0; - .timescale -9 -12; -L_0x2225940/d .functor AND 1, L_0x22366c0, L_0x2236760, C4<1>, C4<1>; -L_0x2225940 .delay (50000,50000,50000) L_0x2225940/d; -L_0x22359f0/d .functor AND 1, L_0x22366c0, L_0x22339b0, C4<1>, C4<1>; -L_0x22359f0 .delay (50000,50000,50000) L_0x22359f0/d; -L_0x2235ae0/d .functor AND 1, L_0x2236760, L_0x22339b0, C4<1>, C4<1>; -L_0x2235ae0 .delay (50000,50000,50000) L_0x2235ae0/d; -L_0x221e830/d .functor OR 1, L_0x2225940, L_0x22359f0, C4<0>, C4<0>; -L_0x221e830 .delay (50000,50000,50000) L_0x221e830/d; -L_0x2235d80/d .functor OR 1, L_0x221e830, L_0x2235ae0, C4<0>, C4<0>; -L_0x2235d80 .delay (50000,50000,50000) L_0x2235d80/d; -L_0x2235ec0/d .functor OR 1, L_0x22366c0, L_0x2236760, C4<0>, C4<0>; -L_0x2235ec0 .delay (50000,50000,50000) L_0x2235ec0/d; -L_0x2235fa0/d .functor OR 1, L_0x2235ec0, L_0x22339b0, C4<0>, C4<0>; -L_0x2235fa0 .delay (50000,50000,50000) L_0x2235fa0/d; -L_0x2236090/d .functor NOT 1, L_0x2235d80, C4<0>, C4<0>, C4<0>; -L_0x2236090 .delay (50000,50000,50000) L_0x2236090/d; -L_0x22361c0/d .functor AND 1, L_0x2236090, L_0x2235fa0, C4<1>, C4<1>; -L_0x22361c0 .delay (50000,50000,50000) L_0x22361c0/d; -L_0x22362c0/d .functor AND 1, L_0x22366c0, L_0x2236760, C4<1>, C4<1>; -L_0x22362c0 .delay (50000,50000,50000) L_0x22362c0/d; -L_0x22364e0/d .functor AND 1, L_0x22362c0, L_0x22339b0, C4<1>, C4<1>; -L_0x22364e0 .delay (50000,50000,50000) L_0x22364e0/d; -L_0x2236580/d .functor OR 1, L_0x22361c0, L_0x22364e0, C4<0>, C4<0>; -L_0x2236580 .delay (50000,50000,50000) L_0x2236580/d; -v0x220f800_0 .net "a", 0 0, L_0x22366c0; 1 drivers -v0x220f8c0_0 .net "ab", 0 0, L_0x2225940; 1 drivers -v0x220f960_0 .net "acarryin", 0 0, L_0x22359f0; 1 drivers -v0x220fa00_0 .net "andall", 0 0, L_0x22364e0; 1 drivers -v0x220fa80_0 .net "andsingleintermediate", 0 0, L_0x22362c0; 1 drivers -v0x220fb20_0 .net "andsumintermediate", 0 0, L_0x22361c0; 1 drivers -v0x220fbc0_0 .net "b", 0 0, L_0x2236760; 1 drivers -v0x220fc60_0 .net "bcarryin", 0 0, L_0x2235ae0; 1 drivers -v0x220fd00_0 .alias "carryin", 0 0, v0x221e770_0; -v0x220fda0_0 .alias "carryout", 0 0, v0x2210c00_0; -v0x220fe20_0 .net "invcarryout", 0 0, L_0x2236090; 1 drivers -v0x220fea0_0 .net "orall", 0 0, L_0x2235fa0; 1 drivers -v0x220ff40_0 .net "orpairintermediate", 0 0, L_0x221e830; 1 drivers -v0x220ffe0_0 .net "orsingleintermediate", 0 0, L_0x2235ec0; 1 drivers -v0x2210100_0 .net "sum", 0 0, L_0x2236580; 1 drivers -S_0x220ec80 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x220d5b0; - .timescale -9 -12; -L_0x2236480/d .functor AND 1, L_0x2237640, L_0x2237730, C4<1>, C4<1>; -L_0x2236480 .delay (50000,50000,50000) L_0x2236480/d; -L_0x2236890/d .functor AND 1, L_0x2237640, L_0x2235d80, C4<1>, C4<1>; -L_0x2236890 .delay (50000,50000,50000) L_0x2236890/d; -L_0x2236980/d .functor AND 1, L_0x2237730, L_0x2235d80, C4<1>, C4<1>; -L_0x2236980 .delay (50000,50000,50000) L_0x2236980/d; -L_0x2236a70/d .functor OR 1, L_0x2236480, L_0x2236890, C4<0>, C4<0>; -L_0x2236a70 .delay (50000,50000,50000) L_0x2236a70/d; -L_0x2236bb0/d .functor OR 1, L_0x2236a70, L_0x2236980, C4<0>, C4<0>; -L_0x2236bb0 .delay (50000,50000,50000) L_0x2236bb0/d; -L_0x2236cf0/d .functor OR 1, L_0x2237640, L_0x2237730, C4<0>, C4<0>; -L_0x2236cf0 .delay (50000,50000,50000) L_0x2236cf0/d; -L_0x2236dd0/d .functor OR 1, L_0x2236cf0, L_0x2235d80, C4<0>, C4<0>; -L_0x2236dd0 .delay (50000,50000,50000) L_0x2236dd0/d; -L_0x2236ec0/d .functor NOT 1, L_0x2236bb0, C4<0>, C4<0>, C4<0>; -L_0x2236ec0 .delay (50000,50000,50000) L_0x2236ec0/d; -L_0x2236ff0/d .functor AND 1, L_0x2236ec0, L_0x2236dd0, C4<1>, C4<1>; -L_0x2236ff0 .delay (50000,50000,50000) L_0x2236ff0/d; -L_0x22370f0/d .functor AND 1, L_0x2237640, L_0x2237730, C4<1>, C4<1>; -L_0x22370f0 .delay (50000,50000,50000) L_0x22370f0/d; -L_0x2237310/d .functor AND 1, L_0x22370f0, L_0x2235d80, C4<1>, C4<1>; -L_0x2237310 .delay (50000,50000,50000) L_0x2237310/d; -L_0x2237480/d .functor OR 1, L_0x2236ff0, L_0x2237310, C4<0>, C4<0>; -L_0x2237480 .delay (50000,50000,50000) L_0x2237480/d; -v0x220ed70_0 .net "a", 0 0, L_0x2237640; 1 drivers -v0x220ee30_0 .net "ab", 0 0, L_0x2236480; 1 drivers -v0x220eed0_0 .net "acarryin", 0 0, L_0x2236890; 1 drivers -v0x220ef70_0 .net "andall", 0 0, L_0x2237310; 1 drivers -v0x220eff0_0 .net "andsingleintermediate", 0 0, L_0x22370f0; 1 drivers -v0x220f090_0 .net "andsumintermediate", 0 0, L_0x2236ff0; 1 drivers -v0x220f130_0 .net "b", 0 0, L_0x2237730; 1 drivers -v0x220f1d0_0 .net "bcarryin", 0 0, L_0x2236980; 1 drivers -v0x220f270_0 .alias "carryin", 0 0, v0x2210c00_0; -v0x220f310_0 .alias "carryout", 0 0, v0x2210dd0_0; -v0x220f390_0 .net "invcarryout", 0 0, L_0x2236ec0; 1 drivers -v0x220f410_0 .net "orall", 0 0, L_0x2236dd0; 1 drivers -v0x220f4b0_0 .net "orpairintermediate", 0 0, L_0x2236a70; 1 drivers -v0x220f550_0 .net "orsingleintermediate", 0 0, L_0x2236cf0; 1 drivers -v0x220f670_0 .net "sum", 0 0, L_0x2237480; 1 drivers -S_0x220e1a0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x220d5b0; - .timescale -9 -12; -L_0x22372b0/d .functor AND 1, L_0x2238600, L_0x22386f0, C4<1>, C4<1>; -L_0x22372b0 .delay (50000,50000,50000) L_0x22372b0/d; -L_0x22378f0/d .functor AND 1, L_0x2238600, L_0x2236bb0, C4<1>, C4<1>; -L_0x22378f0 .delay (50000,50000,50000) L_0x22378f0/d; -L_0x22379e0/d .functor AND 1, L_0x22386f0, L_0x2236bb0, C4<1>, C4<1>; -L_0x22379e0 .delay (50000,50000,50000) L_0x22379e0/d; -L_0x2237ad0/d .functor OR 1, L_0x22372b0, L_0x22378f0, C4<0>, C4<0>; -L_0x2237ad0 .delay (50000,50000,50000) L_0x2237ad0/d; -L_0x2237c10/d .functor OR 1, L_0x2237ad0, L_0x22379e0, C4<0>, C4<0>; -L_0x2237c10 .delay (50000,50000,50000) L_0x2237c10/d; -L_0x2237d50/d .functor OR 1, L_0x2238600, L_0x22386f0, C4<0>, C4<0>; -L_0x2237d50 .delay (50000,50000,50000) L_0x2237d50/d; -L_0x2237e30/d .functor OR 1, L_0x2237d50, L_0x2236bb0, C4<0>, C4<0>; -L_0x2237e30 .delay (50000,50000,50000) L_0x2237e30/d; -L_0x2237f20/d .functor NOT 1, L_0x2237c10, C4<0>, C4<0>, C4<0>; -L_0x2237f20 .delay (50000,50000,50000) L_0x2237f20/d; -L_0x2234890/d .functor AND 1, L_0x2237f20, L_0x2237e30, C4<1>, C4<1>; -L_0x2234890 .delay (50000,50000,50000) L_0x2234890/d; -L_0x2238100/d .functor AND 1, L_0x2238600, L_0x22386f0, C4<1>, C4<1>; -L_0x2238100 .delay (50000,50000,50000) L_0x2238100/d; -L_0x2238320/d .functor AND 1, L_0x2238100, L_0x2236bb0, C4<1>, C4<1>; -L_0x2238320 .delay (50000,50000,50000) L_0x2238320/d; -L_0x2238490/d .functor OR 1, L_0x2234890, L_0x2238320, C4<0>, C4<0>; -L_0x2238490 .delay (50000,50000,50000) L_0x2238490/d; -v0x220e290_0 .net "a", 0 0, L_0x2238600; 1 drivers -v0x220e350_0 .net "ab", 0 0, L_0x22372b0; 1 drivers -v0x220e3f0_0 .net "acarryin", 0 0, L_0x22378f0; 1 drivers -v0x220e490_0 .net "andall", 0 0, L_0x2238320; 1 drivers -v0x220e510_0 .net "andsingleintermediate", 0 0, L_0x2238100; 1 drivers -v0x220e5b0_0 .net "andsumintermediate", 0 0, L_0x2234890; 1 drivers -v0x220e650_0 .net "b", 0 0, L_0x22386f0; 1 drivers -v0x220e6f0_0 .net "bcarryin", 0 0, L_0x22379e0; 1 drivers -v0x220e7e0_0 .alias "carryin", 0 0, v0x2210dd0_0; -v0x220e880_0 .alias "carryout", 0 0, v0x2210f00_0; -v0x220e900_0 .net "invcarryout", 0 0, L_0x2237f20; 1 drivers -v0x220e980_0 .net "orall", 0 0, L_0x2237e30; 1 drivers -v0x220ea20_0 .net "orpairintermediate", 0 0, L_0x2237ad0; 1 drivers -v0x220eac0_0 .net "orsingleintermediate", 0 0, L_0x2237d50; 1 drivers -v0x220ebe0_0 .net "sum", 0 0, L_0x2238490; 1 drivers -S_0x220d6a0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x220d5b0; - .timescale -9 -12; -L_0x22382c0/d .functor AND 1, L_0x2239590, L_0x22396c0, C4<1>, C4<1>; -L_0x22382c0 .delay (50000,50000,50000) L_0x22382c0/d; -L_0x22387e0/d .functor AND 1, L_0x2239590, L_0x2237c10, C4<1>, C4<1>; -L_0x22387e0 .delay (50000,50000,50000) L_0x22387e0/d; -L_0x22388d0/d .functor AND 1, L_0x22396c0, L_0x2237c10, C4<1>, C4<1>; -L_0x22388d0 .delay (50000,50000,50000) L_0x22388d0/d; -L_0x22389c0/d .functor OR 1, L_0x22382c0, L_0x22387e0, C4<0>, C4<0>; -L_0x22389c0 .delay (50000,50000,50000) L_0x22389c0/d; -L_0x2238b00/d .functor OR 1, L_0x22389c0, L_0x22388d0, C4<0>, C4<0>; -L_0x2238b00 .delay (50000,50000,50000) L_0x2238b00/d; -L_0x2238c40/d .functor OR 1, L_0x2239590, L_0x22396c0, C4<0>, C4<0>; -L_0x2238c40 .delay (50000,50000,50000) L_0x2238c40/d; -L_0x2238d20/d .functor OR 1, L_0x2238c40, L_0x2237c10, C4<0>, C4<0>; -L_0x2238d20 .delay (50000,50000,50000) L_0x2238d20/d; -L_0x2238e10/d .functor NOT 1, L_0x2238b00, C4<0>, C4<0>, C4<0>; -L_0x2238e10 .delay (50000,50000,50000) L_0x2238e10/d; -L_0x2238eb0/d .functor AND 1, L_0x2238e10, L_0x2238d20, C4<1>, C4<1>; -L_0x2238eb0 .delay (50000,50000,50000) L_0x2238eb0/d; -L_0x2239000/d .functor AND 1, L_0x2239590, L_0x22396c0, C4<1>, C4<1>; -L_0x2239000 .delay (50000,50000,50000) L_0x2239000/d; -L_0x2239220/d .functor AND 1, L_0x2239000, L_0x2237c10, C4<1>, C4<1>; -L_0x2239220 .delay (50000,50000,50000) L_0x2239220/d; -L_0x2239390/d .functor OR 1, L_0x2238eb0, L_0x2239220, C4<0>, C4<0>; -L_0x2239390 .delay (50000,50000,50000) L_0x2239390/d; -v0x220d790_0 .net "a", 0 0, L_0x2239590; 1 drivers -v0x220d850_0 .net "ab", 0 0, L_0x22382c0; 1 drivers -v0x220d8f0_0 .net "acarryin", 0 0, L_0x22387e0; 1 drivers -v0x220d990_0 .net "andall", 0 0, L_0x2239220; 1 drivers -v0x220da10_0 .net "andsingleintermediate", 0 0, L_0x2239000; 1 drivers -v0x220dab0_0 .net "andsumintermediate", 0 0, L_0x2238eb0; 1 drivers -v0x220db50_0 .net "b", 0 0, L_0x22396c0; 1 drivers -v0x220dbf0_0 .net "bcarryin", 0 0, L_0x22388d0; 1 drivers -v0x220dce0_0 .alias "carryin", 0 0, v0x2210f00_0; -v0x220dd80_0 .alias "carryout", 0 0, v0x221eb70_0; -v0x220de00_0 .net "invcarryout", 0 0, L_0x2238e10; 1 drivers -v0x220dea0_0 .net "orall", 0 0, L_0x2238d20; 1 drivers -v0x220df40_0 .net "orpairintermediate", 0 0, L_0x22389c0; 1 drivers -v0x220dfe0_0 .net "orsingleintermediate", 0 0, L_0x2238c40; 1 drivers -v0x220e100_0 .net "sum", 0 0, L_0x2239390; 1 drivers -S_0x2209aa0 .scope module, "adder2" "FullAdder4bit" 4 241, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x223e1e0/d .functor AND 1, L_0x223e8c0, L_0x223e960, C4<1>, C4<1>; -L_0x223e1e0 .delay (50000,50000,50000) L_0x223e1e0/d; -L_0x223ea00/d .functor NOR 1, L_0x223eaa0, L_0x223eb40, C4<0>, C4<0>; -L_0x223ea00 .delay (50000,50000,50000) L_0x223ea00/d; -L_0x223ec70/d .functor AND 1, L_0x223ed60, L_0x223ee00, C4<1>, C4<1>; -L_0x223ec70 .delay (50000,50000,50000) L_0x223ec70/d; -L_0x223ebe0/d .functor NOR 1, L_0x223f020, L_0x223f1d0, C4<0>, C4<0>; -L_0x223ebe0 .delay (50000,50000,50000) L_0x223ebe0/d; -L_0x223eef0/d .functor OR 1, L_0x223e1e0, L_0x223ea00, C4<0>, C4<0>; -L_0x223eef0 .delay (50000,50000,50000) L_0x223eef0/d; -L_0x223f410/d .functor NOR 1, L_0x223ec70, L_0x223ebe0, C4<0>, C4<0>; -L_0x223f410 .delay (50000,50000,50000) L_0x223f410/d; -L_0x223f510/d .functor AND 1, L_0x223eef0, L_0x223f410, C4<1>, C4<1>; -L_0x223f510 .delay (50000,50000,50000) L_0x223f510/d; -v0x220c690_0 .net *"_s25", 0 0, L_0x223e8c0; 1 drivers -v0x220c750_0 .net *"_s27", 0 0, L_0x223e960; 1 drivers -v0x220c7f0_0 .net *"_s29", 0 0, L_0x223eaa0; 1 drivers -v0x220c890_0 .net *"_s31", 0 0, L_0x223eb40; 1 drivers -v0x220c910_0 .net *"_s33", 0 0, L_0x223ed60; 1 drivers -v0x220c9b0_0 .net *"_s35", 0 0, L_0x223ee00; 1 drivers -v0x220ca50_0 .net *"_s37", 0 0, L_0x223f020; 1 drivers -v0x220caf0_0 .net *"_s39", 0 0, L_0x223f1d0; 1 drivers -v0x220cb90_0 .net "a", 3 0, L_0x223f7d0; 1 drivers -v0x220cc30_0 .net "aandb", 0 0, L_0x223e1e0; 1 drivers -v0x220ccd0_0 .net "abandnoror", 0 0, L_0x223eef0; 1 drivers -v0x220cd70_0 .net "anorb", 0 0, L_0x223ea00; 1 drivers -v0x220ce10_0 .net "b", 3 0, L_0x223a7a0; 1 drivers -v0x220ceb0_0 .net "bandsum", 0 0, L_0x223ec70; 1 drivers -v0x220cfd0_0 .net "bnorsum", 0 0, L_0x223ebe0; 1 drivers -v0x220d070_0 .net "bsumandnornor", 0 0, L_0x223f410; 1 drivers -v0x220cf30_0 .alias "carryin", 0 0, v0x221eb70_0; -v0x220d1a0_0 .alias "carryout", 0 0, v0x221e9a0_0; -v0x220d0f0_0 .net "carryout1", 0 0, L_0x223ad50; 1 drivers -v0x220d2c0_0 .net "carryout2", 0 0, L_0x223bb80; 1 drivers -v0x220d3f0_0 .net "carryout3", 0 0, L_0x223cbe0; 1 drivers -v0x220d470_0 .alias "overflow", 0 0, v0x221ba80_0; -v0x220d340_0 .net8 "sum", 3 0, RS_0x7f8758e305c8; 4 drivers -L_0x223b5f0 .part/pv L_0x223b550, 0, 1, 4; -L_0x223b690 .part L_0x223f7d0, 0, 1; -L_0x223b730 .part L_0x223a7a0, 0, 1; -L_0x223c520 .part/pv L_0x223c450, 1, 1, 4; -L_0x223c610 .part L_0x223f7d0, 1, 1; -L_0x223c700 .part L_0x223a7a0, 1, 1; -L_0x223d580 .part/pv L_0x223d4b0, 2, 1, 4; -L_0x223d620 .part L_0x223f7d0, 2, 1; -L_0x223d710 .part L_0x223a7a0, 2, 1; -L_0x223e480 .part/pv L_0x223e3b0, 3, 1, 4; -L_0x223e5b0 .part L_0x223f7d0, 3, 1; -L_0x223e6e0 .part L_0x223a7a0, 3, 1; -L_0x223e8c0 .part L_0x223f7d0, 3, 1; -L_0x223e960 .part L_0x223a7a0, 3, 1; -L_0x223eaa0 .part L_0x223f7d0, 3, 1; -L_0x223eb40 .part L_0x223a7a0, 3, 1; -L_0x223ed60 .part L_0x223a7a0, 3, 1; -L_0x223ee00 .part RS_0x7f8758e305c8, 3, 1; -L_0x223f020 .part L_0x223a7a0, 3, 1; -L_0x223f1d0 .part RS_0x7f8758e305c8, 3, 1; -S_0x220bc00 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x2209aa0; - .timescale -9 -12; -L_0x22357d0/d .functor AND 1, L_0x223b690, L_0x223b730, C4<1>, C4<1>; -L_0x22357d0 .delay (50000,50000,50000) L_0x22357d0/d; -L_0x223a9f0/d .functor AND 1, L_0x223b690, L_0x2238b00, C4<1>, C4<1>; -L_0x223a9f0 .delay (50000,50000,50000) L_0x223a9f0/d; -L_0x223aaa0/d .functor AND 1, L_0x223b730, L_0x2238b00, C4<1>, C4<1>; -L_0x223aaa0 .delay (50000,50000,50000) L_0x223aaa0/d; -L_0x223ac10/d .functor OR 1, L_0x22357d0, L_0x223a9f0, C4<0>, C4<0>; -L_0x223ac10 .delay (50000,50000,50000) L_0x223ac10/d; -L_0x223ad50/d .functor OR 1, L_0x223ac10, L_0x223aaa0, C4<0>, C4<0>; -L_0x223ad50 .delay (50000,50000,50000) L_0x223ad50/d; -L_0x223ae90/d .functor OR 1, L_0x223b690, L_0x223b730, C4<0>, C4<0>; -L_0x223ae90 .delay (50000,50000,50000) L_0x223ae90/d; -L_0x223af70/d .functor OR 1, L_0x223ae90, L_0x2238b00, C4<0>, C4<0>; -L_0x223af70 .delay (50000,50000,50000) L_0x223af70/d; -L_0x223b060/d .functor NOT 1, L_0x223ad50, C4<0>, C4<0>, C4<0>; -L_0x223b060 .delay (50000,50000,50000) L_0x223b060/d; -L_0x223b190/d .functor AND 1, L_0x223b060, L_0x223af70, C4<1>, C4<1>; -L_0x223b190 .delay (50000,50000,50000) L_0x223b190/d; -L_0x223b290/d .functor AND 1, L_0x223b690, L_0x223b730, C4<1>, C4<1>; -L_0x223b290 .delay (50000,50000,50000) L_0x223b290/d; -L_0x223b4b0/d .functor AND 1, L_0x223b290, L_0x2238b00, C4<1>, C4<1>; -L_0x223b4b0 .delay (50000,50000,50000) L_0x223b4b0/d; -L_0x223b550/d .functor OR 1, L_0x223b190, L_0x223b4b0, C4<0>, C4<0>; -L_0x223b550 .delay (50000,50000,50000) L_0x223b550/d; -v0x220bcf0_0 .net "a", 0 0, L_0x223b690; 1 drivers -v0x220bdb0_0 .net "ab", 0 0, L_0x22357d0; 1 drivers -v0x220be50_0 .net "acarryin", 0 0, L_0x223a9f0; 1 drivers -v0x220bef0_0 .net "andall", 0 0, L_0x223b4b0; 1 drivers -v0x220bf70_0 .net "andsingleintermediate", 0 0, L_0x223b290; 1 drivers -v0x220c010_0 .net "andsumintermediate", 0 0, L_0x223b190; 1 drivers -v0x220c0b0_0 .net "b", 0 0, L_0x223b730; 1 drivers -v0x220c150_0 .net "bcarryin", 0 0, L_0x223aaa0; 1 drivers -v0x220c1f0_0 .alias "carryin", 0 0, v0x221eb70_0; -v0x220c290_0 .alias "carryout", 0 0, v0x220d0f0_0; -v0x220c310_0 .net "invcarryout", 0 0, L_0x223b060; 1 drivers -v0x220c390_0 .net "orall", 0 0, L_0x223af70; 1 drivers -v0x220c430_0 .net "orpairintermediate", 0 0, L_0x223ac10; 1 drivers -v0x220c4d0_0 .net "orsingleintermediate", 0 0, L_0x223ae90; 1 drivers -v0x220c5f0_0 .net "sum", 0 0, L_0x223b550; 1 drivers -S_0x220b170 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x2209aa0; - .timescale -9 -12; -L_0x223b450/d .functor AND 1, L_0x223c610, L_0x223c700, C4<1>, C4<1>; -L_0x223b450 .delay (50000,50000,50000) L_0x223b450/d; -L_0x223b860/d .functor AND 1, L_0x223c610, L_0x223ad50, C4<1>, C4<1>; -L_0x223b860 .delay (50000,50000,50000) L_0x223b860/d; -L_0x223b950/d .functor AND 1, L_0x223c700, L_0x223ad50, C4<1>, C4<1>; -L_0x223b950 .delay (50000,50000,50000) L_0x223b950/d; -L_0x223ba40/d .functor OR 1, L_0x223b450, L_0x223b860, C4<0>, C4<0>; -L_0x223ba40 .delay (50000,50000,50000) L_0x223ba40/d; -L_0x223bb80/d .functor OR 1, L_0x223ba40, L_0x223b950, C4<0>, C4<0>; -L_0x223bb80 .delay (50000,50000,50000) L_0x223bb80/d; -L_0x223bcc0/d .functor OR 1, L_0x223c610, L_0x223c700, C4<0>, C4<0>; -L_0x223bcc0 .delay (50000,50000,50000) L_0x223bcc0/d; -L_0x223bda0/d .functor OR 1, L_0x223bcc0, L_0x223ad50, C4<0>, C4<0>; -L_0x223bda0 .delay (50000,50000,50000) L_0x223bda0/d; -L_0x223be90/d .functor NOT 1, L_0x223bb80, C4<0>, C4<0>, C4<0>; -L_0x223be90 .delay (50000,50000,50000) L_0x223be90/d; -L_0x223bfc0/d .functor AND 1, L_0x223be90, L_0x223bda0, C4<1>, C4<1>; -L_0x223bfc0 .delay (50000,50000,50000) L_0x223bfc0/d; -L_0x223c0c0/d .functor AND 1, L_0x223c610, L_0x223c700, C4<1>, C4<1>; -L_0x223c0c0 .delay (50000,50000,50000) L_0x223c0c0/d; -L_0x223c2e0/d .functor AND 1, L_0x223c0c0, L_0x223ad50, C4<1>, C4<1>; -L_0x223c2e0 .delay (50000,50000,50000) L_0x223c2e0/d; -L_0x223c450/d .functor OR 1, L_0x223bfc0, L_0x223c2e0, C4<0>, C4<0>; -L_0x223c450 .delay (50000,50000,50000) L_0x223c450/d; -v0x220b260_0 .net "a", 0 0, L_0x223c610; 1 drivers -v0x220b320_0 .net "ab", 0 0, L_0x223b450; 1 drivers -v0x220b3c0_0 .net "acarryin", 0 0, L_0x223b860; 1 drivers -v0x220b460_0 .net "andall", 0 0, L_0x223c2e0; 1 drivers -v0x220b4e0_0 .net "andsingleintermediate", 0 0, L_0x223c0c0; 1 drivers -v0x220b580_0 .net "andsumintermediate", 0 0, L_0x223bfc0; 1 drivers -v0x220b620_0 .net "b", 0 0, L_0x223c700; 1 drivers -v0x220b6c0_0 .net "bcarryin", 0 0, L_0x223b950; 1 drivers -v0x220b760_0 .alias "carryin", 0 0, v0x220d0f0_0; -v0x220b800_0 .alias "carryout", 0 0, v0x220d2c0_0; -v0x220b880_0 .net "invcarryout", 0 0, L_0x223be90; 1 drivers -v0x220b900_0 .net "orall", 0 0, L_0x223bda0; 1 drivers -v0x220b9a0_0 .net "orpairintermediate", 0 0, L_0x223ba40; 1 drivers -v0x220ba40_0 .net "orsingleintermediate", 0 0, L_0x223bcc0; 1 drivers -v0x220bb60_0 .net "sum", 0 0, L_0x223c450; 1 drivers -S_0x220a690 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x2209aa0; - .timescale -9 -12; -L_0x223c280/d .functor AND 1, L_0x223d620, L_0x223d710, C4<1>, C4<1>; -L_0x223c280 .delay (50000,50000,50000) L_0x223c280/d; -L_0x223c8c0/d .functor AND 1, L_0x223d620, L_0x223bb80, C4<1>, C4<1>; -L_0x223c8c0 .delay (50000,50000,50000) L_0x223c8c0/d; -L_0x223c9b0/d .functor AND 1, L_0x223d710, L_0x223bb80, C4<1>, C4<1>; -L_0x223c9b0 .delay (50000,50000,50000) L_0x223c9b0/d; -L_0x223caa0/d .functor OR 1, L_0x223c280, L_0x223c8c0, C4<0>, C4<0>; -L_0x223caa0 .delay (50000,50000,50000) L_0x223caa0/d; -L_0x223cbe0/d .functor OR 1, L_0x223caa0, L_0x223c9b0, C4<0>, C4<0>; -L_0x223cbe0 .delay (50000,50000,50000) L_0x223cbe0/d; -L_0x223cd20/d .functor OR 1, L_0x223d620, L_0x223d710, C4<0>, C4<0>; -L_0x223cd20 .delay (50000,50000,50000) L_0x223cd20/d; -L_0x223ce00/d .functor OR 1, L_0x223cd20, L_0x223bb80, C4<0>, C4<0>; -L_0x223ce00 .delay (50000,50000,50000) L_0x223ce00/d; -L_0x223cef0/d .functor NOT 1, L_0x223cbe0, C4<0>, C4<0>, C4<0>; -L_0x223cef0 .delay (50000,50000,50000) L_0x223cef0/d; -L_0x223d020/d .functor AND 1, L_0x223cef0, L_0x223ce00, C4<1>, C4<1>; -L_0x223d020 .delay (50000,50000,50000) L_0x223d020/d; -L_0x223d120/d .functor AND 1, L_0x223d620, L_0x223d710, C4<1>, C4<1>; -L_0x223d120 .delay (50000,50000,50000) L_0x223d120/d; -L_0x223d340/d .functor AND 1, L_0x223d120, L_0x223bb80, C4<1>, C4<1>; -L_0x223d340 .delay (50000,50000,50000) L_0x223d340/d; -L_0x223d4b0/d .functor OR 1, L_0x223d020, L_0x223d340, C4<0>, C4<0>; -L_0x223d4b0 .delay (50000,50000,50000) L_0x223d4b0/d; -v0x220a780_0 .net "a", 0 0, L_0x223d620; 1 drivers -v0x220a840_0 .net "ab", 0 0, L_0x223c280; 1 drivers -v0x220a8e0_0 .net "acarryin", 0 0, L_0x223c8c0; 1 drivers -v0x220a980_0 .net "andall", 0 0, L_0x223d340; 1 drivers -v0x220aa00_0 .net "andsingleintermediate", 0 0, L_0x223d120; 1 drivers -v0x220aaa0_0 .net "andsumintermediate", 0 0, L_0x223d020; 1 drivers -v0x220ab40_0 .net "b", 0 0, L_0x223d710; 1 drivers -v0x220abe0_0 .net "bcarryin", 0 0, L_0x223c9b0; 1 drivers -v0x220acd0_0 .alias "carryin", 0 0, v0x220d2c0_0; -v0x220ad70_0 .alias "carryout", 0 0, v0x220d3f0_0; -v0x220adf0_0 .net "invcarryout", 0 0, L_0x223cef0; 1 drivers -v0x220ae70_0 .net "orall", 0 0, L_0x223ce00; 1 drivers -v0x220af10_0 .net "orpairintermediate", 0 0, L_0x223caa0; 1 drivers -v0x220afb0_0 .net "orsingleintermediate", 0 0, L_0x223cd20; 1 drivers -v0x220b0d0_0 .net "sum", 0 0, L_0x223d4b0; 1 drivers -S_0x2209b90 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x2209aa0; - .timescale -9 -12; -L_0x223d2e0/d .functor AND 1, L_0x223e5b0, L_0x223e6e0, C4<1>, C4<1>; -L_0x223d2e0 .delay (50000,50000,50000) L_0x223d2e0/d; -L_0x223d800/d .functor AND 1, L_0x223e5b0, L_0x223cbe0, C4<1>, C4<1>; -L_0x223d800 .delay (50000,50000,50000) L_0x223d800/d; -L_0x223d8f0/d .functor AND 1, L_0x223e6e0, L_0x223cbe0, C4<1>, C4<1>; -L_0x223d8f0 .delay (50000,50000,50000) L_0x223d8f0/d; -L_0x223d9e0/d .functor OR 1, L_0x223d2e0, L_0x223d800, C4<0>, C4<0>; -L_0x223d9e0 .delay (50000,50000,50000) L_0x223d9e0/d; -L_0x223db20/d .functor OR 1, L_0x223d9e0, L_0x223d8f0, C4<0>, C4<0>; -L_0x223db20 .delay (50000,50000,50000) L_0x223db20/d; -L_0x223dc60/d .functor OR 1, L_0x223e5b0, L_0x223e6e0, C4<0>, C4<0>; -L_0x223dc60 .delay (50000,50000,50000) L_0x223dc60/d; -L_0x223dd40/d .functor OR 1, L_0x223dc60, L_0x223cbe0, C4<0>, C4<0>; -L_0x223dd40 .delay (50000,50000,50000) L_0x223dd40/d; -L_0x223de30/d .functor NOT 1, L_0x223db20, C4<0>, C4<0>, C4<0>; -L_0x223de30 .delay (50000,50000,50000) L_0x223de30/d; -L_0x223ded0/d .functor AND 1, L_0x223de30, L_0x223dd40, C4<1>, C4<1>; -L_0x223ded0 .delay (50000,50000,50000) L_0x223ded0/d; -L_0x223e020/d .functor AND 1, L_0x223e5b0, L_0x223e6e0, C4<1>, C4<1>; -L_0x223e020 .delay (50000,50000,50000) L_0x223e020/d; -L_0x223e240/d .functor AND 1, L_0x223e020, L_0x223cbe0, C4<1>, C4<1>; -L_0x223e240 .delay (50000,50000,50000) L_0x223e240/d; -L_0x223e3b0/d .functor OR 1, L_0x223ded0, L_0x223e240, C4<0>, C4<0>; -L_0x223e3b0 .delay (50000,50000,50000) L_0x223e3b0/d; -v0x2209c80_0 .net "a", 0 0, L_0x223e5b0; 1 drivers -v0x2209d40_0 .net "ab", 0 0, L_0x223d2e0; 1 drivers -v0x2209de0_0 .net "acarryin", 0 0, L_0x223d800; 1 drivers -v0x2209e80_0 .net "andall", 0 0, L_0x223e240; 1 drivers -v0x2209f00_0 .net "andsingleintermediate", 0 0, L_0x223e020; 1 drivers -v0x2209fa0_0 .net "andsumintermediate", 0 0, L_0x223ded0; 1 drivers -v0x220a040_0 .net "b", 0 0, L_0x223e6e0; 1 drivers -v0x220a0e0_0 .net "bcarryin", 0 0, L_0x223d8f0; 1 drivers -v0x220a1d0_0 .alias "carryin", 0 0, v0x220d3f0_0; -v0x220a270_0 .alias "carryout", 0 0, v0x221e9a0_0; -v0x220a2f0_0 .net "invcarryout", 0 0, L_0x223de30; 1 drivers -v0x220a390_0 .net "orall", 0 0, L_0x223dd40; 1 drivers -v0x220a430_0 .net "orpairintermediate", 0 0, L_0x223d9e0; 1 drivers -v0x220a4d0_0 .net "orsingleintermediate", 0 0, L_0x223dc60; 1 drivers -v0x220a5f0_0 .net "sum", 0 0, L_0x223e3b0; 1 drivers -S_0x2205f90 .scope module, "adder3" "FullAdder4bit" 4 242, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x2243530/d .functor AND 1, L_0x2243c70, L_0x2243d10, C4<1>, C4<1>; -L_0x2243530 .delay (50000,50000,50000) L_0x2243530/d; -L_0x2243db0/d .functor NOR 1, L_0x2243e50, L_0x2243ef0, C4<0>, C4<0>; -L_0x2243db0 .delay (50000,50000,50000) L_0x2243db0/d; -L_0x2244020/d .functor AND 1, L_0x2244110, L_0x22441b0, C4<1>, C4<1>; -L_0x2244020 .delay (50000,50000,50000) L_0x2244020/d; -L_0x2243f90/d .functor NOR 1, L_0x22443d0, L_0x2244580, C4<0>, C4<0>; -L_0x2243f90 .delay (50000,50000,50000) L_0x2243f90/d; -L_0x22442a0/d .functor OR 1, L_0x2243530, L_0x2243db0, C4<0>, C4<0>; -L_0x22442a0 .delay (50000,50000,50000) L_0x22442a0/d; -L_0x22447c0/d .functor NOR 1, L_0x2244020, L_0x2243f90, C4<0>, C4<0>; -L_0x22447c0 .delay (50000,50000,50000) L_0x22447c0/d; -L_0x2244900/d .functor AND 1, L_0x22442a0, L_0x22447c0, C4<1>, C4<1>; -L_0x2244900 .delay (50000,50000,50000) L_0x2244900/d; -v0x2208b80_0 .net *"_s25", 0 0, L_0x2243c70; 1 drivers -v0x2208c40_0 .net *"_s27", 0 0, L_0x2243d10; 1 drivers -v0x2208ce0_0 .net *"_s29", 0 0, L_0x2243e50; 1 drivers -v0x2208d80_0 .net *"_s31", 0 0, L_0x2243ef0; 1 drivers -v0x2208e00_0 .net *"_s33", 0 0, L_0x2244110; 1 drivers -v0x2208ea0_0 .net *"_s35", 0 0, L_0x22441b0; 1 drivers -v0x2208f40_0 .net *"_s37", 0 0, L_0x22443d0; 1 drivers -v0x2208fe0_0 .net *"_s39", 0 0, L_0x2244580; 1 drivers -v0x2209080_0 .net "a", 3 0, L_0x223f900; 1 drivers -v0x2209120_0 .net "aandb", 0 0, L_0x2243530; 1 drivers -v0x22091c0_0 .net "abandnoror", 0 0, L_0x22442a0; 1 drivers -v0x2209260_0 .net "anorb", 0 0, L_0x2243db0; 1 drivers -v0x2209300_0 .net "b", 3 0, L_0x223f9a0; 1 drivers -v0x22093a0_0 .net "bandsum", 0 0, L_0x2244020; 1 drivers -v0x22094c0_0 .net "bnorsum", 0 0, L_0x2243f90; 1 drivers -v0x2209560_0 .net "bsumandnornor", 0 0, L_0x22447c0; 1 drivers -v0x2209420_0 .alias "carryin", 0 0, v0x221e9a0_0; -v0x2209690_0 .alias "carryout", 0 0, v0x221eab0_0; -v0x22095e0_0 .net "carryout1", 0 0, L_0x223fd60; 1 drivers -v0x22097b0_0 .net "carryout2", 0 0, L_0x2240b90; 1 drivers -v0x22098e0_0 .net "carryout3", 0 0, L_0x2241d10; 1 drivers -v0x2209960_0 .alias "overflow", 0 0, v0x221bb00_0; -v0x2209830_0 .net8 "sum", 3 0, RS_0x7f8758e2f7e8; 4 drivers -L_0x2240600 .part/pv L_0x2240560, 0, 1, 4; -L_0x22406a0 .part L_0x223f900, 0, 1; -L_0x2240740 .part L_0x223f9a0, 0, 1; -L_0x2241610 .part/pv L_0x2241500, 1, 1, 4; -L_0x2241700 .part L_0x223f900, 1, 1; -L_0x22417f0 .part L_0x223f9a0, 1, 1; -L_0x22427d0 .part/pv L_0x22426c0, 2, 1, 4; -L_0x2242870 .part L_0x223f900, 2, 1; -L_0x2242960 .part L_0x223f9a0, 2, 1; -L_0x2243830 .part/pv L_0x2243720, 3, 1, 4; -L_0x2243960 .part L_0x223f900, 3, 1; -L_0x2243a90 .part L_0x223f9a0, 3, 1; -L_0x2243c70 .part L_0x223f900, 3, 1; -L_0x2243d10 .part L_0x223f9a0, 3, 1; -L_0x2243e50 .part L_0x223f900, 3, 1; -L_0x2243ef0 .part L_0x223f9a0, 3, 1; -L_0x2244110 .part L_0x223f9a0, 3, 1; -L_0x22441b0 .part RS_0x7f8758e2f7e8, 3, 1; -L_0x22443d0 .part L_0x223f9a0, 3, 1; -L_0x2244580 .part RS_0x7f8758e2f7e8, 3, 1; -S_0x22080f0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x2205f90; - .timescale -9 -12; -L_0x223a840/d .functor AND 1, L_0x22406a0, L_0x2240740, C4<1>, C4<1>; -L_0x223a840 .delay (50000,50000,50000) L_0x223a840/d; -L_0x223a8e0/d .functor AND 1, L_0x22406a0, L_0x223db20, C4<1>, C4<1>; -L_0x223a8e0 .delay (50000,50000,50000) L_0x223a8e0/d; -L_0x223a980/d .functor AND 1, L_0x2240740, L_0x223db20, C4<1>, C4<1>; -L_0x223a980 .delay (50000,50000,50000) L_0x223a980/d; -L_0x223fc70/d .functor OR 1, L_0x223a840, L_0x223a8e0, C4<0>, C4<0>; -L_0x223fc70 .delay (50000,50000,50000) L_0x223fc70/d; -L_0x223fd60/d .functor OR 1, L_0x223fc70, L_0x223a980, C4<0>, C4<0>; -L_0x223fd60 .delay (50000,50000,50000) L_0x223fd60/d; -L_0x223fea0/d .functor OR 1, L_0x22406a0, L_0x2240740, C4<0>, C4<0>; -L_0x223fea0 .delay (50000,50000,50000) L_0x223fea0/d; -L_0x223ff80/d .functor OR 1, L_0x223fea0, L_0x223db20, C4<0>, C4<0>; -L_0x223ff80 .delay (50000,50000,50000) L_0x223ff80/d; -L_0x2240070/d .functor NOT 1, L_0x223fd60, C4<0>, C4<0>, C4<0>; -L_0x2240070 .delay (50000,50000,50000) L_0x2240070/d; -L_0x22401a0/d .functor AND 1, L_0x2240070, L_0x223ff80, C4<1>, C4<1>; -L_0x22401a0 .delay (50000,50000,50000) L_0x22401a0/d; -L_0x22402a0/d .functor AND 1, L_0x22406a0, L_0x2240740, C4<1>, C4<1>; -L_0x22402a0 .delay (50000,50000,50000) L_0x22402a0/d; -L_0x22404c0/d .functor AND 1, L_0x22402a0, L_0x223db20, C4<1>, C4<1>; -L_0x22404c0 .delay (50000,50000,50000) L_0x22404c0/d; -L_0x2240560/d .functor OR 1, L_0x22401a0, L_0x22404c0, C4<0>, C4<0>; -L_0x2240560 .delay (50000,50000,50000) L_0x2240560/d; -v0x22081e0_0 .net "a", 0 0, L_0x22406a0; 1 drivers -v0x22082a0_0 .net "ab", 0 0, L_0x223a840; 1 drivers -v0x2208340_0 .net "acarryin", 0 0, L_0x223a8e0; 1 drivers -v0x22083e0_0 .net "andall", 0 0, L_0x22404c0; 1 drivers -v0x2208460_0 .net "andsingleintermediate", 0 0, L_0x22402a0; 1 drivers -v0x2208500_0 .net "andsumintermediate", 0 0, L_0x22401a0; 1 drivers -v0x22085a0_0 .net "b", 0 0, L_0x2240740; 1 drivers -v0x2208640_0 .net "bcarryin", 0 0, L_0x223a980; 1 drivers -v0x22086e0_0 .alias "carryin", 0 0, v0x221e9a0_0; -v0x2208780_0 .alias "carryout", 0 0, v0x22095e0_0; -v0x2208800_0 .net "invcarryout", 0 0, L_0x2240070; 1 drivers -v0x2208880_0 .net "orall", 0 0, L_0x223ff80; 1 drivers -v0x2208920_0 .net "orpairintermediate", 0 0, L_0x223fc70; 1 drivers -v0x22089c0_0 .net "orsingleintermediate", 0 0, L_0x223fea0; 1 drivers -v0x2208ae0_0 .net "sum", 0 0, L_0x2240560; 1 drivers -S_0x2207660 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x2205f90; - .timescale -9 -12; -L_0x2240460/d .functor AND 1, L_0x2241700, L_0x22417f0, C4<1>, C4<1>; -L_0x2240460 .delay (50000,50000,50000) L_0x2240460/d; -L_0x2240870/d .functor AND 1, L_0x2241700, L_0x223fd60, C4<1>, C4<1>; -L_0x2240870 .delay (50000,50000,50000) L_0x2240870/d; -L_0x2240960/d .functor AND 1, L_0x22417f0, L_0x223fd60, C4<1>, C4<1>; -L_0x2240960 .delay (50000,50000,50000) L_0x2240960/d; -L_0x2240a50/d .functor OR 1, L_0x2240460, L_0x2240870, C4<0>, C4<0>; -L_0x2240a50 .delay (50000,50000,50000) L_0x2240a50/d; -L_0x2240b90/d .functor OR 1, L_0x2240a50, L_0x2240960, C4<0>, C4<0>; -L_0x2240b90 .delay (50000,50000,50000) L_0x2240b90/d; -L_0x2240cd0/d .functor OR 1, L_0x2241700, L_0x22417f0, C4<0>, C4<0>; -L_0x2240cd0 .delay (50000,50000,50000) L_0x2240cd0/d; -L_0x2240db0/d .functor OR 1, L_0x2240cd0, L_0x223fd60, C4<0>, C4<0>; -L_0x2240db0 .delay (50000,50000,50000) L_0x2240db0/d; -L_0x2240ec0/d .functor NOT 1, L_0x2240b90, C4<0>, C4<0>, C4<0>; -L_0x2240ec0 .delay (50000,50000,50000) L_0x2240ec0/d; -L_0x2241010/d .functor AND 1, L_0x2240ec0, L_0x2240db0, C4<1>, C4<1>; -L_0x2241010 .delay (50000,50000,50000) L_0x2241010/d; -L_0x2241130/d .functor AND 1, L_0x2241700, L_0x22417f0, C4<1>, C4<1>; -L_0x2241130 .delay (50000,50000,50000) L_0x2241130/d; -L_0x2241370/d .functor AND 1, L_0x2241130, L_0x223fd60, C4<1>, C4<1>; -L_0x2241370 .delay (50000,50000,50000) L_0x2241370/d; -L_0x2241500/d .functor OR 1, L_0x2241010, L_0x2241370, C4<0>, C4<0>; -L_0x2241500 .delay (50000,50000,50000) L_0x2241500/d; -v0x2207750_0 .net "a", 0 0, L_0x2241700; 1 drivers -v0x2207810_0 .net "ab", 0 0, L_0x2240460; 1 drivers -v0x22078b0_0 .net "acarryin", 0 0, L_0x2240870; 1 drivers -v0x2207950_0 .net "andall", 0 0, L_0x2241370; 1 drivers -v0x22079d0_0 .net "andsingleintermediate", 0 0, L_0x2241130; 1 drivers -v0x2207a70_0 .net "andsumintermediate", 0 0, L_0x2241010; 1 drivers -v0x2207b10_0 .net "b", 0 0, L_0x22417f0; 1 drivers -v0x2207bb0_0 .net "bcarryin", 0 0, L_0x2240960; 1 drivers -v0x2207c50_0 .alias "carryin", 0 0, v0x22095e0_0; -v0x2207cf0_0 .alias "carryout", 0 0, v0x22097b0_0; -v0x2207d70_0 .net "invcarryout", 0 0, L_0x2240ec0; 1 drivers -v0x2207df0_0 .net "orall", 0 0, L_0x2240db0; 1 drivers -v0x2207e90_0 .net "orpairintermediate", 0 0, L_0x2240a50; 1 drivers -v0x2207f30_0 .net "orsingleintermediate", 0 0, L_0x2240cd0; 1 drivers -v0x2208050_0 .net "sum", 0 0, L_0x2241500; 1 drivers -S_0x2206b80 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x2205f90; - .timescale -9 -12; -L_0x2241310/d .functor AND 1, L_0x2242870, L_0x2242960, C4<1>, C4<1>; -L_0x2241310 .delay (50000,50000,50000) L_0x2241310/d; -L_0x22419b0/d .functor AND 1, L_0x2242870, L_0x2240b90, C4<1>, C4<1>; -L_0x22419b0 .delay (50000,50000,50000) L_0x22419b0/d; -L_0x2241aa0/d .functor AND 1, L_0x2242960, L_0x2240b90, C4<1>, C4<1>; -L_0x2241aa0 .delay (50000,50000,50000) L_0x2241aa0/d; -L_0x2241bb0/d .functor OR 1, L_0x2241310, L_0x22419b0, C4<0>, C4<0>; -L_0x2241bb0 .delay (50000,50000,50000) L_0x2241bb0/d; -L_0x2241d10/d .functor OR 1, L_0x2241bb0, L_0x2241aa0, C4<0>, C4<0>; -L_0x2241d10 .delay (50000,50000,50000) L_0x2241d10/d; -L_0x2241e70/d .functor OR 1, L_0x2242870, L_0x2242960, C4<0>, C4<0>; -L_0x2241e70 .delay (50000,50000,50000) L_0x2241e70/d; -L_0x2241f70/d .functor OR 1, L_0x2241e70, L_0x2240b90, C4<0>, C4<0>; -L_0x2241f70 .delay (50000,50000,50000) L_0x2241f70/d; -L_0x2242080/d .functor NOT 1, L_0x2241d10, C4<0>, C4<0>, C4<0>; -L_0x2242080 .delay (50000,50000,50000) L_0x2242080/d; -L_0x22421d0/d .functor AND 1, L_0x2242080, L_0x2241f70, C4<1>, C4<1>; -L_0x22421d0 .delay (50000,50000,50000) L_0x22421d0/d; -L_0x22422f0/d .functor AND 1, L_0x2242870, L_0x2242960, C4<1>, C4<1>; -L_0x22422f0 .delay (50000,50000,50000) L_0x22422f0/d; -L_0x2242530/d .functor AND 1, L_0x22422f0, L_0x2240b90, C4<1>, C4<1>; -L_0x2242530 .delay (50000,50000,50000) L_0x2242530/d; -L_0x22426c0/d .functor OR 1, L_0x22421d0, L_0x2242530, C4<0>, C4<0>; -L_0x22426c0 .delay (50000,50000,50000) L_0x22426c0/d; -v0x2206c70_0 .net "a", 0 0, L_0x2242870; 1 drivers -v0x2206d30_0 .net "ab", 0 0, L_0x2241310; 1 drivers -v0x2206dd0_0 .net "acarryin", 0 0, L_0x22419b0; 1 drivers -v0x2206e70_0 .net "andall", 0 0, L_0x2242530; 1 drivers -v0x2206ef0_0 .net "andsingleintermediate", 0 0, L_0x22422f0; 1 drivers -v0x2206f90_0 .net "andsumintermediate", 0 0, L_0x22421d0; 1 drivers -v0x2207030_0 .net "b", 0 0, L_0x2242960; 1 drivers -v0x22070d0_0 .net "bcarryin", 0 0, L_0x2241aa0; 1 drivers -v0x22071c0_0 .alias "carryin", 0 0, v0x22097b0_0; -v0x2207260_0 .alias "carryout", 0 0, v0x22098e0_0; -v0x22072e0_0 .net "invcarryout", 0 0, L_0x2242080; 1 drivers -v0x2207360_0 .net "orall", 0 0, L_0x2241f70; 1 drivers -v0x2207400_0 .net "orpairintermediate", 0 0, L_0x2241bb0; 1 drivers -v0x22074a0_0 .net "orsingleintermediate", 0 0, L_0x2241e70; 1 drivers -v0x22075c0_0 .net "sum", 0 0, L_0x22426c0; 1 drivers -S_0x2206080 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x2205f90; - .timescale -9 -12; -L_0x22424d0/d .functor AND 1, L_0x2243960, L_0x2243a90, C4<1>, C4<1>; -L_0x22424d0 .delay (50000,50000,50000) L_0x22424d0/d; -L_0x2242a50/d .functor AND 1, L_0x2243960, L_0x2241d10, C4<1>, C4<1>; -L_0x2242a50 .delay (50000,50000,50000) L_0x2242a50/d; -L_0x2242b40/d .functor AND 1, L_0x2243a90, L_0x2241d10, C4<1>, C4<1>; -L_0x2242b40 .delay (50000,50000,50000) L_0x2242b40/d; -L_0x2242c50/d .functor OR 1, L_0x22424d0, L_0x2242a50, C4<0>, C4<0>; -L_0x2242c50 .delay (50000,50000,50000) L_0x2242c50/d; -L_0x2242db0/d .functor OR 1, L_0x2242c50, L_0x2242b40, C4<0>, C4<0>; -L_0x2242db0 .delay (50000,50000,50000) L_0x2242db0/d; -L_0x2242f10/d .functor OR 1, L_0x2243960, L_0x2243a90, C4<0>, C4<0>; -L_0x2242f10 .delay (50000,50000,50000) L_0x2242f10/d; -L_0x2243010/d .functor OR 1, L_0x2242f10, L_0x2241d10, C4<0>, C4<0>; -L_0x2243010 .delay (50000,50000,50000) L_0x2243010/d; -L_0x2243120/d .functor NOT 1, L_0x2242db0, C4<0>, C4<0>, C4<0>; -L_0x2243120 .delay (50000,50000,50000) L_0x2243120/d; -L_0x22431e0/d .functor AND 1, L_0x2243120, L_0x2243010, C4<1>, C4<1>; -L_0x22431e0 .delay (50000,50000,50000) L_0x22431e0/d; -L_0x2243350/d .functor AND 1, L_0x2243960, L_0x2243a90, C4<1>, C4<1>; -L_0x2243350 .delay (50000,50000,50000) L_0x2243350/d; -L_0x2243590/d .functor AND 1, L_0x2243350, L_0x2241d10, C4<1>, C4<1>; -L_0x2243590 .delay (50000,50000,50000) L_0x2243590/d; -L_0x2243720/d .functor OR 1, L_0x22431e0, L_0x2243590, C4<0>, C4<0>; -L_0x2243720 .delay (50000,50000,50000) L_0x2243720/d; -v0x2206170_0 .net "a", 0 0, L_0x2243960; 1 drivers -v0x2206230_0 .net "ab", 0 0, L_0x22424d0; 1 drivers -v0x22062d0_0 .net "acarryin", 0 0, L_0x2242a50; 1 drivers -v0x2206370_0 .net "andall", 0 0, L_0x2243590; 1 drivers -v0x22063f0_0 .net "andsingleintermediate", 0 0, L_0x2243350; 1 drivers -v0x2206490_0 .net "andsumintermediate", 0 0, L_0x22431e0; 1 drivers -v0x2206530_0 .net "b", 0 0, L_0x2243a90; 1 drivers -v0x22065d0_0 .net "bcarryin", 0 0, L_0x2242b40; 1 drivers -v0x22066c0_0 .alias "carryin", 0 0, v0x22098e0_0; -v0x2206760_0 .alias "carryout", 0 0, v0x221eab0_0; -v0x22067e0_0 .net "invcarryout", 0 0, L_0x2243120; 1 drivers -v0x2206880_0 .net "orall", 0 0, L_0x2243010; 1 drivers -v0x2206920_0 .net "orpairintermediate", 0 0, L_0x2242c50; 1 drivers -v0x22069c0_0 .net "orsingleintermediate", 0 0, L_0x2242f10; 1 drivers -v0x2206ae0_0 .net "sum", 0 0, L_0x2243720; 1 drivers -S_0x2202480 .scope module, "adder4" "FullAdder4bit" 4 243, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x22489e0/d .functor AND 1, L_0x2249120, L_0x22491c0, C4<1>, C4<1>; -L_0x22489e0 .delay (50000,50000,50000) L_0x22489e0/d; -L_0x2249260/d .functor NOR 1, L_0x2249300, L_0x22493a0, C4<0>, C4<0>; -L_0x2249260 .delay (50000,50000,50000) L_0x2249260/d; -L_0x22494d0/d .functor AND 1, L_0x22495c0, L_0x2249660, C4<1>, C4<1>; -L_0x22494d0 .delay (50000,50000,50000) L_0x22494d0/d; -L_0x2249440/d .functor NOR 1, L_0x2249880, L_0x2249a30, C4<0>, C4<0>; -L_0x2249440 .delay (50000,50000,50000) L_0x2249440/d; -L_0x2249750/d .functor OR 1, L_0x22489e0, L_0x2249260, C4<0>, C4<0>; -L_0x2249750 .delay (50000,50000,50000) L_0x2249750/d; -L_0x2249c70/d .functor NOR 1, L_0x22494d0, L_0x2249440, C4<0>, C4<0>; -L_0x2249c70 .delay (50000,50000,50000) L_0x2249c70/d; -L_0x2249db0/d .functor AND 1, L_0x2249750, L_0x2249c70, C4<1>, C4<1>; -L_0x2249db0 .delay (50000,50000,50000) L_0x2249db0/d; -v0x2205070_0 .net *"_s25", 0 0, L_0x2249120; 1 drivers -v0x2205130_0 .net *"_s27", 0 0, L_0x22491c0; 1 drivers -v0x22051d0_0 .net *"_s29", 0 0, L_0x2249300; 1 drivers -v0x2205270_0 .net *"_s31", 0 0, L_0x22493a0; 1 drivers -v0x22052f0_0 .net *"_s33", 0 0, L_0x22495c0; 1 drivers -v0x2205390_0 .net *"_s35", 0 0, L_0x2249660; 1 drivers -v0x2205430_0 .net *"_s37", 0 0, L_0x2249880; 1 drivers -v0x22054d0_0 .net *"_s39", 0 0, L_0x2249a30; 1 drivers -v0x2205570_0 .net "a", 3 0, L_0x2249fe0; 1 drivers -v0x2205610_0 .net "aandb", 0 0, L_0x22489e0; 1 drivers -v0x22056b0_0 .net "abandnoror", 0 0, L_0x2249750; 1 drivers -v0x2205750_0 .net "anorb", 0 0, L_0x2249260; 1 drivers -v0x22057f0_0 .net "b", 3 0, L_0x2244af0; 1 drivers -v0x2205890_0 .net "bandsum", 0 0, L_0x22494d0; 1 drivers -v0x22059b0_0 .net "bnorsum", 0 0, L_0x2249440; 1 drivers -v0x2205a50_0 .net "bsumandnornor", 0 0, L_0x2249c70; 1 drivers -v0x2205910_0 .alias "carryin", 0 0, v0x221eab0_0; -v0x2205b80_0 .alias "carryout", 0 0, v0x221ef00_0; -v0x2205ad0_0 .net "carryout1", 0 0, L_0x22450b0; 1 drivers -v0x2205ca0_0 .net "carryout2", 0 0, L_0x2246020; 1 drivers -v0x2205dd0_0 .net "carryout3", 0 0, L_0x22471c0; 1 drivers -v0x2205e50_0 .alias "overflow", 0 0, v0x221bb80_0; -v0x2205d20_0 .net8 "sum", 3 0, RS_0x7f8758e2ea08; 4 drivers -L_0x2245a50 .part/pv L_0x2245990, 0, 1, 4; -L_0x2245b10 .part L_0x2249fe0, 0, 1; -L_0x2245bb0 .part L_0x2244af0, 0, 1; -L_0x2246ae0 .part/pv L_0x22469d0, 1, 1, 4; -L_0x2246bd0 .part L_0x2249fe0, 1, 1; -L_0x2246cc0 .part L_0x2244af0, 1, 1; -L_0x2247c80 .part/pv L_0x2247b70, 2, 1, 4; -L_0x2247d20 .part L_0x2249fe0, 2, 1; -L_0x2247e10 .part L_0x2244af0, 2, 1; -L_0x2248ce0 .part/pv L_0x2248bd0, 3, 1, 4; -L_0x2248e10 .part L_0x2249fe0, 3, 1; -L_0x2248f40 .part L_0x2244af0, 3, 1; -L_0x2249120 .part L_0x2249fe0, 3, 1; -L_0x22491c0 .part L_0x2244af0, 3, 1; -L_0x2249300 .part L_0x2249fe0, 3, 1; -L_0x22493a0 .part L_0x2244af0, 3, 1; -L_0x22495c0 .part L_0x2244af0, 3, 1; -L_0x2249660 .part RS_0x7f8758e2ea08, 3, 1; -L_0x2249880 .part L_0x2244af0, 3, 1; -L_0x2249a30 .part RS_0x7f8758e2ea08, 3, 1; -S_0x22045e0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x2202480; - .timescale -9 -12; -L_0x223fa40/d .functor AND 1, L_0x2245b10, L_0x2245bb0, C4<1>, C4<1>; -L_0x223fa40 .delay (50000,50000,50000) L_0x223fa40/d; -L_0x223fae0/d .functor AND 1, L_0x2245b10, L_0x2242db0, C4<1>, C4<1>; -L_0x223fae0 .delay (50000,50000,50000) L_0x223fae0/d; -L_0x2244e00/d .functor AND 1, L_0x2245bb0, L_0x2242db0, C4<1>, C4<1>; -L_0x2244e00 .delay (50000,50000,50000) L_0x2244e00/d; -L_0x2244f70/d .functor OR 1, L_0x223fa40, L_0x223fae0, C4<0>, C4<0>; -L_0x2244f70 .delay (50000,50000,50000) L_0x2244f70/d; -L_0x22450b0/d .functor OR 1, L_0x2244f70, L_0x2244e00, C4<0>, C4<0>; -L_0x22450b0 .delay (50000,50000,50000) L_0x22450b0/d; -L_0x2245210/d .functor OR 1, L_0x2245b10, L_0x2245bb0, C4<0>, C4<0>; -L_0x2245210 .delay (50000,50000,50000) L_0x2245210/d; -L_0x2245310/d .functor OR 1, L_0x2245210, L_0x2242db0, C4<0>, C4<0>; -L_0x2245310 .delay (50000,50000,50000) L_0x2245310/d; -L_0x2245420/d .functor NOT 1, L_0x22450b0, C4<0>, C4<0>, C4<0>; -L_0x2245420 .delay (50000,50000,50000) L_0x2245420/d; -L_0x2245570/d .functor AND 1, L_0x2245420, L_0x2245310, C4<1>, C4<1>; -L_0x2245570 .delay (50000,50000,50000) L_0x2245570/d; -L_0x2245690/d .functor AND 1, L_0x2245b10, L_0x2245bb0, C4<1>, C4<1>; -L_0x2245690 .delay (50000,50000,50000) L_0x2245690/d; -L_0x22458d0/d .functor AND 1, L_0x2245690, L_0x2242db0, C4<1>, C4<1>; -L_0x22458d0 .delay (50000,50000,50000) L_0x22458d0/d; -L_0x2245990/d .functor OR 1, L_0x2245570, L_0x22458d0, C4<0>, C4<0>; -L_0x2245990 .delay (50000,50000,50000) L_0x2245990/d; -v0x22046d0_0 .net "a", 0 0, L_0x2245b10; 1 drivers -v0x2204790_0 .net "ab", 0 0, L_0x223fa40; 1 drivers -v0x2204830_0 .net "acarryin", 0 0, L_0x223fae0; 1 drivers -v0x22048d0_0 .net "andall", 0 0, L_0x22458d0; 1 drivers -v0x2204950_0 .net "andsingleintermediate", 0 0, L_0x2245690; 1 drivers -v0x22049f0_0 .net "andsumintermediate", 0 0, L_0x2245570; 1 drivers -v0x2204a90_0 .net "b", 0 0, L_0x2245bb0; 1 drivers -v0x2204b30_0 .net "bcarryin", 0 0, L_0x2244e00; 1 drivers -v0x2204bd0_0 .alias "carryin", 0 0, v0x221eab0_0; -v0x2204c70_0 .alias "carryout", 0 0, v0x2205ad0_0; -v0x2204cf0_0 .net "invcarryout", 0 0, L_0x2245420; 1 drivers -v0x2204d70_0 .net "orall", 0 0, L_0x2245310; 1 drivers -v0x2204e10_0 .net "orpairintermediate", 0 0, L_0x2244f70; 1 drivers -v0x2204eb0_0 .net "orsingleintermediate", 0 0, L_0x2245210; 1 drivers -v0x2204fd0_0 .net "sum", 0 0, L_0x2245990; 1 drivers -S_0x2203b50 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x2202480; - .timescale -9 -12; -L_0x2245870/d .functor AND 1, L_0x2246bd0, L_0x2246cc0, C4<1>, C4<1>; -L_0x2245870 .delay (50000,50000,50000) L_0x2245870/d; -L_0x2245ce0/d .functor AND 1, L_0x2246bd0, L_0x22450b0, C4<1>, C4<1>; -L_0x2245ce0 .delay (50000,50000,50000) L_0x2245ce0/d; -L_0x2245dd0/d .functor AND 1, L_0x2246cc0, L_0x22450b0, C4<1>, C4<1>; -L_0x2245dd0 .delay (50000,50000,50000) L_0x2245dd0/d; -L_0x2245ec0/d .functor OR 1, L_0x2245870, L_0x2245ce0, C4<0>, C4<0>; -L_0x2245ec0 .delay (50000,50000,50000) L_0x2245ec0/d; -L_0x2246020/d .functor OR 1, L_0x2245ec0, L_0x2245dd0, C4<0>, C4<0>; -L_0x2246020 .delay (50000,50000,50000) L_0x2246020/d; -L_0x2246180/d .functor OR 1, L_0x2246bd0, L_0x2246cc0, C4<0>, C4<0>; -L_0x2246180 .delay (50000,50000,50000) L_0x2246180/d; -L_0x2246280/d .functor OR 1, L_0x2246180, L_0x22450b0, C4<0>, C4<0>; -L_0x2246280 .delay (50000,50000,50000) L_0x2246280/d; -L_0x2246390/d .functor NOT 1, L_0x2246020, C4<0>, C4<0>, C4<0>; -L_0x2246390 .delay (50000,50000,50000) L_0x2246390/d; -L_0x22464e0/d .functor AND 1, L_0x2246390, L_0x2246280, C4<1>, C4<1>; -L_0x22464e0 .delay (50000,50000,50000) L_0x22464e0/d; -L_0x2246600/d .functor AND 1, L_0x2246bd0, L_0x2246cc0, C4<1>, C4<1>; -L_0x2246600 .delay (50000,50000,50000) L_0x2246600/d; -L_0x2246840/d .functor AND 1, L_0x2246600, L_0x22450b0, C4<1>, C4<1>; -L_0x2246840 .delay (50000,50000,50000) L_0x2246840/d; -L_0x22469d0/d .functor OR 1, L_0x22464e0, L_0x2246840, C4<0>, C4<0>; -L_0x22469d0 .delay (50000,50000,50000) L_0x22469d0/d; -v0x2203c40_0 .net "a", 0 0, L_0x2246bd0; 1 drivers -v0x2203d00_0 .net "ab", 0 0, L_0x2245870; 1 drivers -v0x2203da0_0 .net "acarryin", 0 0, L_0x2245ce0; 1 drivers -v0x2203e40_0 .net "andall", 0 0, L_0x2246840; 1 drivers -v0x2203ec0_0 .net "andsingleintermediate", 0 0, L_0x2246600; 1 drivers -v0x2203f60_0 .net "andsumintermediate", 0 0, L_0x22464e0; 1 drivers -v0x2204000_0 .net "b", 0 0, L_0x2246cc0; 1 drivers -v0x22040a0_0 .net "bcarryin", 0 0, L_0x2245dd0; 1 drivers -v0x2204140_0 .alias "carryin", 0 0, v0x2205ad0_0; -v0x22041e0_0 .alias "carryout", 0 0, v0x2205ca0_0; -v0x2204260_0 .net "invcarryout", 0 0, L_0x2246390; 1 drivers -v0x22042e0_0 .net "orall", 0 0, L_0x2246280; 1 drivers -v0x2204380_0 .net "orpairintermediate", 0 0, L_0x2245ec0; 1 drivers -v0x2204420_0 .net "orsingleintermediate", 0 0, L_0x2246180; 1 drivers -v0x2204540_0 .net "sum", 0 0, L_0x22469d0; 1 drivers -S_0x2203070 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x2202480; - .timescale -9 -12; -L_0x22467e0/d .functor AND 1, L_0x2247d20, L_0x2247e10, C4<1>, C4<1>; -L_0x22467e0 .delay (50000,50000,50000) L_0x22467e0/d; -L_0x2246e80/d .functor AND 1, L_0x2247d20, L_0x2246020, C4<1>, C4<1>; -L_0x2246e80 .delay (50000,50000,50000) L_0x2246e80/d; -L_0x2246f70/d .functor AND 1, L_0x2247e10, L_0x2246020, C4<1>, C4<1>; -L_0x2246f70 .delay (50000,50000,50000) L_0x2246f70/d; -L_0x2247060/d .functor OR 1, L_0x22467e0, L_0x2246e80, C4<0>, C4<0>; -L_0x2247060 .delay (50000,50000,50000) L_0x2247060/d; -L_0x22471c0/d .functor OR 1, L_0x2247060, L_0x2246f70, C4<0>, C4<0>; -L_0x22471c0 .delay (50000,50000,50000) L_0x22471c0/d; -L_0x2247320/d .functor OR 1, L_0x2247d20, L_0x2247e10, C4<0>, C4<0>; -L_0x2247320 .delay (50000,50000,50000) L_0x2247320/d; -L_0x2247420/d .functor OR 1, L_0x2247320, L_0x2246020, C4<0>, C4<0>; -L_0x2247420 .delay (50000,50000,50000) L_0x2247420/d; -L_0x2247530/d .functor NOT 1, L_0x22471c0, C4<0>, C4<0>, C4<0>; -L_0x2247530 .delay (50000,50000,50000) L_0x2247530/d; -L_0x2247680/d .functor AND 1, L_0x2247530, L_0x2247420, C4<1>, C4<1>; -L_0x2247680 .delay (50000,50000,50000) L_0x2247680/d; -L_0x22477a0/d .functor AND 1, L_0x2247d20, L_0x2247e10, C4<1>, C4<1>; -L_0x22477a0 .delay (50000,50000,50000) L_0x22477a0/d; -L_0x22479e0/d .functor AND 1, L_0x22477a0, L_0x2246020, C4<1>, C4<1>; -L_0x22479e0 .delay (50000,50000,50000) L_0x22479e0/d; -L_0x2247b70/d .functor OR 1, L_0x2247680, L_0x22479e0, C4<0>, C4<0>; -L_0x2247b70 .delay (50000,50000,50000) L_0x2247b70/d; -v0x2203160_0 .net "a", 0 0, L_0x2247d20; 1 drivers -v0x2203220_0 .net "ab", 0 0, L_0x22467e0; 1 drivers -v0x22032c0_0 .net "acarryin", 0 0, L_0x2246e80; 1 drivers -v0x2203360_0 .net "andall", 0 0, L_0x22479e0; 1 drivers -v0x22033e0_0 .net "andsingleintermediate", 0 0, L_0x22477a0; 1 drivers -v0x2203480_0 .net "andsumintermediate", 0 0, L_0x2247680; 1 drivers -v0x2203520_0 .net "b", 0 0, L_0x2247e10; 1 drivers -v0x22035c0_0 .net "bcarryin", 0 0, L_0x2246f70; 1 drivers -v0x22036b0_0 .alias "carryin", 0 0, v0x2205ca0_0; -v0x2203750_0 .alias "carryout", 0 0, v0x2205dd0_0; -v0x22037d0_0 .net "invcarryout", 0 0, L_0x2247530; 1 drivers -v0x2203850_0 .net "orall", 0 0, L_0x2247420; 1 drivers -v0x22038f0_0 .net "orpairintermediate", 0 0, L_0x2247060; 1 drivers -v0x2203990_0 .net "orsingleintermediate", 0 0, L_0x2247320; 1 drivers -v0x2203ab0_0 .net "sum", 0 0, L_0x2247b70; 1 drivers -S_0x2202570 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x2202480; - .timescale -9 -12; -L_0x2247980/d .functor AND 1, L_0x2248e10, L_0x2248f40, C4<1>, C4<1>; -L_0x2247980 .delay (50000,50000,50000) L_0x2247980/d; -L_0x2247f00/d .functor AND 1, L_0x2248e10, L_0x22471c0, C4<1>, C4<1>; -L_0x2247f00 .delay (50000,50000,50000) L_0x2247f00/d; -L_0x2247ff0/d .functor AND 1, L_0x2248f40, L_0x22471c0, C4<1>, C4<1>; -L_0x2247ff0 .delay (50000,50000,50000) L_0x2247ff0/d; -L_0x2248100/d .functor OR 1, L_0x2247980, L_0x2247f00, C4<0>, C4<0>; -L_0x2248100 .delay (50000,50000,50000) L_0x2248100/d; -L_0x2248260/d .functor OR 1, L_0x2248100, L_0x2247ff0, C4<0>, C4<0>; -L_0x2248260 .delay (50000,50000,50000) L_0x2248260/d; -L_0x22483c0/d .functor OR 1, L_0x2248e10, L_0x2248f40, C4<0>, C4<0>; -L_0x22483c0 .delay (50000,50000,50000) L_0x22483c0/d; -L_0x22484c0/d .functor OR 1, L_0x22483c0, L_0x22471c0, C4<0>, C4<0>; -L_0x22484c0 .delay (50000,50000,50000) L_0x22484c0/d; -L_0x22485d0/d .functor NOT 1, L_0x2248260, C4<0>, C4<0>, C4<0>; -L_0x22485d0 .delay (50000,50000,50000) L_0x22485d0/d; -L_0x2248690/d .functor AND 1, L_0x22485d0, L_0x22484c0, C4<1>, C4<1>; -L_0x2248690 .delay (50000,50000,50000) L_0x2248690/d; -L_0x2248800/d .functor AND 1, L_0x2248e10, L_0x2248f40, C4<1>, C4<1>; -L_0x2248800 .delay (50000,50000,50000) L_0x2248800/d; -L_0x2248a40/d .functor AND 1, L_0x2248800, L_0x22471c0, C4<1>, C4<1>; -L_0x2248a40 .delay (50000,50000,50000) L_0x2248a40/d; -L_0x2248bd0/d .functor OR 1, L_0x2248690, L_0x2248a40, C4<0>, C4<0>; -L_0x2248bd0 .delay (50000,50000,50000) L_0x2248bd0/d; -v0x2202660_0 .net "a", 0 0, L_0x2248e10; 1 drivers -v0x2202720_0 .net "ab", 0 0, L_0x2247980; 1 drivers -v0x22027c0_0 .net "acarryin", 0 0, L_0x2247f00; 1 drivers -v0x2202860_0 .net "andall", 0 0, L_0x2248a40; 1 drivers -v0x22028e0_0 .net "andsingleintermediate", 0 0, L_0x2248800; 1 drivers -v0x2202980_0 .net "andsumintermediate", 0 0, L_0x2248690; 1 drivers -v0x2202a20_0 .net "b", 0 0, L_0x2248f40; 1 drivers -v0x2202ac0_0 .net "bcarryin", 0 0, L_0x2247ff0; 1 drivers -v0x2202bb0_0 .alias "carryin", 0 0, v0x2205dd0_0; -v0x2202c50_0 .alias "carryout", 0 0, v0x221ef00_0; -v0x2202cd0_0 .net "invcarryout", 0 0, L_0x22485d0; 1 drivers -v0x2202d70_0 .net "orall", 0 0, L_0x22484c0; 1 drivers -v0x2202e10_0 .net "orpairintermediate", 0 0, L_0x2248100; 1 drivers -v0x2202eb0_0 .net "orsingleintermediate", 0 0, L_0x22483c0; 1 drivers -v0x2202fd0_0 .net "sum", 0 0, L_0x2248bd0; 1 drivers -S_0x21fe970 .scope module, "adder5" "FullAdder4bit" 4 244, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x224ded0/d .functor AND 1, L_0x224e610, L_0x224e6b0, C4<1>, C4<1>; -L_0x224ded0 .delay (50000,50000,50000) L_0x224ded0/d; -L_0x224e750/d .functor NOR 1, L_0x224e7f0, L_0x224e890, C4<0>, C4<0>; -L_0x224e750 .delay (50000,50000,50000) L_0x224e750/d; -L_0x224e9c0/d .functor AND 1, L_0x224eab0, L_0x224eb50, C4<1>, C4<1>; -L_0x224e9c0 .delay (50000,50000,50000) L_0x224e9c0/d; -L_0x224e930/d .functor NOR 1, L_0x224ed70, L_0x224ef20, C4<0>, C4<0>; -L_0x224e930 .delay (50000,50000,50000) L_0x224e930/d; -L_0x224ec40/d .functor OR 1, L_0x224ded0, L_0x224e750, C4<0>, C4<0>; -L_0x224ec40 .delay (50000,50000,50000) L_0x224ec40/d; -L_0x224f160/d .functor NOR 1, L_0x224e9c0, L_0x224e930, C4<0>, C4<0>; -L_0x224f160 .delay (50000,50000,50000) L_0x224f160/d; -L_0x224f2a0/d .functor AND 1, L_0x224ec40, L_0x224f160, C4<1>, C4<1>; -L_0x224f2a0 .delay (50000,50000,50000) L_0x224f2a0/d; -v0x2201560_0 .net *"_s25", 0 0, L_0x224e610; 1 drivers -v0x2201620_0 .net *"_s27", 0 0, L_0x224e6b0; 1 drivers -v0x22016c0_0 .net *"_s29", 0 0, L_0x224e7f0; 1 drivers -v0x2201760_0 .net *"_s31", 0 0, L_0x224e890; 1 drivers -v0x22017e0_0 .net *"_s33", 0 0, L_0x224eab0; 1 drivers -v0x2201880_0 .net *"_s35", 0 0, L_0x224eb50; 1 drivers -v0x2201920_0 .net *"_s37", 0 0, L_0x224ed70; 1 drivers -v0x22019c0_0 .net *"_s39", 0 0, L_0x224ef20; 1 drivers -v0x2201a60_0 .net "a", 3 0, L_0x224a080; 1 drivers -v0x2201b00_0 .net "aandb", 0 0, L_0x224ded0; 1 drivers -v0x2201ba0_0 .net "abandnoror", 0 0, L_0x224ec40; 1 drivers -v0x2201c40_0 .net "anorb", 0 0, L_0x224e750; 1 drivers -v0x2201ce0_0 .net "b", 3 0, L_0x224a120; 1 drivers -v0x2201d80_0 .net "bandsum", 0 0, L_0x224e9c0; 1 drivers -v0x2201ea0_0 .net "bnorsum", 0 0, L_0x224e930; 1 drivers -v0x2201f40_0 .net "bsumandnornor", 0 0, L_0x224f160; 1 drivers -v0x2201e00_0 .alias "carryin", 0 0, v0x221ef00_0; -v0x2202070_0 .alias "carryout", 0 0, v0x221f010_0; -v0x2201fc0_0 .net "carryout1", 0 0, L_0x224a5c0; 1 drivers -v0x2202190_0 .net "carryout2", 0 0, L_0x224b510; 1 drivers -v0x22022c0_0 .net "carryout3", 0 0, L_0x224c6b0; 1 drivers -v0x2202340_0 .alias "overflow", 0 0, v0x221bc30_0; -v0x2202210_0 .net8 "sum", 3 0, RS_0x7f8758e2dc28; 4 drivers -L_0x224af40 .part/pv L_0x224ae80, 0, 1, 4; -L_0x224b000 .part L_0x224a080, 0, 1; -L_0x224b0a0 .part L_0x224a120, 0, 1; -L_0x224bfd0 .part/pv L_0x224bec0, 1, 1, 4; -L_0x224c0c0 .part L_0x224a080, 1, 1; -L_0x224c1b0 .part L_0x224a120, 1, 1; -L_0x224d170 .part/pv L_0x224d060, 2, 1, 4; -L_0x224d210 .part L_0x224a080, 2, 1; -L_0x224d300 .part L_0x224a120, 2, 1; -L_0x224e1d0 .part/pv L_0x224e0c0, 3, 1, 4; -L_0x224e300 .part L_0x224a080, 3, 1; -L_0x224e430 .part L_0x224a120, 3, 1; -L_0x224e610 .part L_0x224a080, 3, 1; -L_0x224e6b0 .part L_0x224a120, 3, 1; -L_0x224e7f0 .part L_0x224a080, 3, 1; -L_0x224e890 .part L_0x224a120, 3, 1; -L_0x224eab0 .part L_0x224a120, 3, 1; -L_0x224eb50 .part RS_0x7f8758e2dc28, 3, 1; -L_0x224ed70 .part L_0x224a120, 3, 1; -L_0x224ef20 .part RS_0x7f8758e2dc28, 3, 1; -S_0x2200ad0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x21fe970; - .timescale -9 -12; -L_0x2244b90/d .functor AND 1, L_0x224b000, L_0x224b0a0, C4<1>, C4<1>; -L_0x2244b90 .delay (50000,50000,50000) L_0x2244b90/d; -L_0x2244c30/d .functor AND 1, L_0x224b000, L_0x2248260, C4<1>, C4<1>; -L_0x2244c30 .delay (50000,50000,50000) L_0x2244c30/d; -L_0x224a310/d .functor AND 1, L_0x224b0a0, L_0x2248260, C4<1>, C4<1>; -L_0x224a310 .delay (50000,50000,50000) L_0x224a310/d; -L_0x224a480/d .functor OR 1, L_0x2244b90, L_0x2244c30, C4<0>, C4<0>; -L_0x224a480 .delay (50000,50000,50000) L_0x224a480/d; -L_0x224a5c0/d .functor OR 1, L_0x224a480, L_0x224a310, C4<0>, C4<0>; -L_0x224a5c0 .delay (50000,50000,50000) L_0x224a5c0/d; -L_0x224a700/d .functor OR 1, L_0x224b000, L_0x224b0a0, C4<0>, C4<0>; -L_0x224a700 .delay (50000,50000,50000) L_0x224a700/d; -L_0x224a800/d .functor OR 1, L_0x224a700, L_0x2248260, C4<0>, C4<0>; -L_0x224a800 .delay (50000,50000,50000) L_0x224a800/d; -L_0x224a910/d .functor NOT 1, L_0x224a5c0, C4<0>, C4<0>, C4<0>; -L_0x224a910 .delay (50000,50000,50000) L_0x224a910/d; -L_0x224aa60/d .functor AND 1, L_0x224a910, L_0x224a800, C4<1>, C4<1>; -L_0x224aa60 .delay (50000,50000,50000) L_0x224aa60/d; -L_0x224ab80/d .functor AND 1, L_0x224b000, L_0x224b0a0, C4<1>, C4<1>; -L_0x224ab80 .delay (50000,50000,50000) L_0x224ab80/d; -L_0x224adc0/d .functor AND 1, L_0x224ab80, L_0x2248260, C4<1>, C4<1>; -L_0x224adc0 .delay (50000,50000,50000) L_0x224adc0/d; -L_0x224ae80/d .functor OR 1, L_0x224aa60, L_0x224adc0, C4<0>, C4<0>; -L_0x224ae80 .delay (50000,50000,50000) L_0x224ae80/d; -v0x2200bc0_0 .net "a", 0 0, L_0x224b000; 1 drivers -v0x2200c80_0 .net "ab", 0 0, L_0x2244b90; 1 drivers -v0x2200d20_0 .net "acarryin", 0 0, L_0x2244c30; 1 drivers -v0x2200dc0_0 .net "andall", 0 0, L_0x224adc0; 1 drivers -v0x2200e40_0 .net "andsingleintermediate", 0 0, L_0x224ab80; 1 drivers -v0x2200ee0_0 .net "andsumintermediate", 0 0, L_0x224aa60; 1 drivers -v0x2200f80_0 .net "b", 0 0, L_0x224b0a0; 1 drivers -v0x2201020_0 .net "bcarryin", 0 0, L_0x224a310; 1 drivers -v0x22010c0_0 .alias "carryin", 0 0, v0x221ef00_0; -v0x2201160_0 .alias "carryout", 0 0, v0x2201fc0_0; -v0x22011e0_0 .net "invcarryout", 0 0, L_0x224a910; 1 drivers -v0x2201260_0 .net "orall", 0 0, L_0x224a800; 1 drivers -v0x2201300_0 .net "orpairintermediate", 0 0, L_0x224a480; 1 drivers -v0x22013a0_0 .net "orsingleintermediate", 0 0, L_0x224a700; 1 drivers -v0x22014c0_0 .net "sum", 0 0, L_0x224ae80; 1 drivers -S_0x2200040 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x21fe970; - .timescale -9 -12; -L_0x224ad60/d .functor AND 1, L_0x224c0c0, L_0x224c1b0, C4<1>, C4<1>; -L_0x224ad60 .delay (50000,50000,50000) L_0x224ad60/d; -L_0x224b1d0/d .functor AND 1, L_0x224c0c0, L_0x224a5c0, C4<1>, C4<1>; -L_0x224b1d0 .delay (50000,50000,50000) L_0x224b1d0/d; -L_0x224b2c0/d .functor AND 1, L_0x224c1b0, L_0x224a5c0, C4<1>, C4<1>; -L_0x224b2c0 .delay (50000,50000,50000) L_0x224b2c0/d; -L_0x224b3b0/d .functor OR 1, L_0x224ad60, L_0x224b1d0, C4<0>, C4<0>; -L_0x224b3b0 .delay (50000,50000,50000) L_0x224b3b0/d; -L_0x224b510/d .functor OR 1, L_0x224b3b0, L_0x224b2c0, C4<0>, C4<0>; -L_0x224b510 .delay (50000,50000,50000) L_0x224b510/d; -L_0x224b670/d .functor OR 1, L_0x224c0c0, L_0x224c1b0, C4<0>, C4<0>; -L_0x224b670 .delay (50000,50000,50000) L_0x224b670/d; -L_0x224b770/d .functor OR 1, L_0x224b670, L_0x224a5c0, C4<0>, C4<0>; -L_0x224b770 .delay (50000,50000,50000) L_0x224b770/d; -L_0x224b880/d .functor NOT 1, L_0x224b510, C4<0>, C4<0>, C4<0>; -L_0x224b880 .delay (50000,50000,50000) L_0x224b880/d; -L_0x224b9d0/d .functor AND 1, L_0x224b880, L_0x224b770, C4<1>, C4<1>; -L_0x224b9d0 .delay (50000,50000,50000) L_0x224b9d0/d; -L_0x224baf0/d .functor AND 1, L_0x224c0c0, L_0x224c1b0, C4<1>, C4<1>; -L_0x224baf0 .delay (50000,50000,50000) L_0x224baf0/d; -L_0x224bd30/d .functor AND 1, L_0x224baf0, L_0x224a5c0, C4<1>, C4<1>; -L_0x224bd30 .delay (50000,50000,50000) L_0x224bd30/d; -L_0x224bec0/d .functor OR 1, L_0x224b9d0, L_0x224bd30, C4<0>, C4<0>; -L_0x224bec0 .delay (50000,50000,50000) L_0x224bec0/d; -v0x2200130_0 .net "a", 0 0, L_0x224c0c0; 1 drivers -v0x22001f0_0 .net "ab", 0 0, L_0x224ad60; 1 drivers -v0x2200290_0 .net "acarryin", 0 0, L_0x224b1d0; 1 drivers -v0x2200330_0 .net "andall", 0 0, L_0x224bd30; 1 drivers -v0x22003b0_0 .net "andsingleintermediate", 0 0, L_0x224baf0; 1 drivers -v0x2200450_0 .net "andsumintermediate", 0 0, L_0x224b9d0; 1 drivers -v0x22004f0_0 .net "b", 0 0, L_0x224c1b0; 1 drivers -v0x2200590_0 .net "bcarryin", 0 0, L_0x224b2c0; 1 drivers -v0x2200630_0 .alias "carryin", 0 0, v0x2201fc0_0; -v0x22006d0_0 .alias "carryout", 0 0, v0x2202190_0; -v0x2200750_0 .net "invcarryout", 0 0, L_0x224b880; 1 drivers -v0x22007d0_0 .net "orall", 0 0, L_0x224b770; 1 drivers -v0x2200870_0 .net "orpairintermediate", 0 0, L_0x224b3b0; 1 drivers -v0x2200910_0 .net "orsingleintermediate", 0 0, L_0x224b670; 1 drivers -v0x2200a30_0 .net "sum", 0 0, L_0x224bec0; 1 drivers -S_0x21ff560 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x21fe970; - .timescale -9 -12; -L_0x224bcd0/d .functor AND 1, L_0x224d210, L_0x224d300, C4<1>, C4<1>; -L_0x224bcd0 .delay (50000,50000,50000) L_0x224bcd0/d; -L_0x224c370/d .functor AND 1, L_0x224d210, L_0x224b510, C4<1>, C4<1>; -L_0x224c370 .delay (50000,50000,50000) L_0x224c370/d; -L_0x224c460/d .functor AND 1, L_0x224d300, L_0x224b510, C4<1>, C4<1>; -L_0x224c460 .delay (50000,50000,50000) L_0x224c460/d; -L_0x224c550/d .functor OR 1, L_0x224bcd0, L_0x224c370, C4<0>, C4<0>; -L_0x224c550 .delay (50000,50000,50000) L_0x224c550/d; -L_0x224c6b0/d .functor OR 1, L_0x224c550, L_0x224c460, C4<0>, C4<0>; -L_0x224c6b0 .delay (50000,50000,50000) L_0x224c6b0/d; -L_0x224c810/d .functor OR 1, L_0x224d210, L_0x224d300, C4<0>, C4<0>; -L_0x224c810 .delay (50000,50000,50000) L_0x224c810/d; -L_0x224c910/d .functor OR 1, L_0x224c810, L_0x224b510, C4<0>, C4<0>; -L_0x224c910 .delay (50000,50000,50000) L_0x224c910/d; -L_0x224ca20/d .functor NOT 1, L_0x224c6b0, C4<0>, C4<0>, C4<0>; -L_0x224ca20 .delay (50000,50000,50000) L_0x224ca20/d; -L_0x224cb70/d .functor AND 1, L_0x224ca20, L_0x224c910, C4<1>, C4<1>; -L_0x224cb70 .delay (50000,50000,50000) L_0x224cb70/d; -L_0x224cc90/d .functor AND 1, L_0x224d210, L_0x224d300, C4<1>, C4<1>; -L_0x224cc90 .delay (50000,50000,50000) L_0x224cc90/d; -L_0x224ced0/d .functor AND 1, L_0x224cc90, L_0x224b510, C4<1>, C4<1>; -L_0x224ced0 .delay (50000,50000,50000) L_0x224ced0/d; -L_0x224d060/d .functor OR 1, L_0x224cb70, L_0x224ced0, C4<0>, C4<0>; -L_0x224d060 .delay (50000,50000,50000) L_0x224d060/d; -v0x21ff650_0 .net "a", 0 0, L_0x224d210; 1 drivers -v0x21ff710_0 .net "ab", 0 0, L_0x224bcd0; 1 drivers -v0x21ff7b0_0 .net "acarryin", 0 0, L_0x224c370; 1 drivers -v0x21ff850_0 .net "andall", 0 0, L_0x224ced0; 1 drivers -v0x21ff8d0_0 .net "andsingleintermediate", 0 0, L_0x224cc90; 1 drivers -v0x21ff970_0 .net "andsumintermediate", 0 0, L_0x224cb70; 1 drivers -v0x21ffa10_0 .net "b", 0 0, L_0x224d300; 1 drivers -v0x21ffab0_0 .net "bcarryin", 0 0, L_0x224c460; 1 drivers -v0x21ffba0_0 .alias "carryin", 0 0, v0x2202190_0; -v0x21ffc40_0 .alias "carryout", 0 0, v0x22022c0_0; -v0x21ffcc0_0 .net "invcarryout", 0 0, L_0x224ca20; 1 drivers -v0x21ffd40_0 .net "orall", 0 0, L_0x224c910; 1 drivers -v0x21ffde0_0 .net "orpairintermediate", 0 0, L_0x224c550; 1 drivers -v0x21ffe80_0 .net "orsingleintermediate", 0 0, L_0x224c810; 1 drivers -v0x21fffa0_0 .net "sum", 0 0, L_0x224d060; 1 drivers -S_0x21fea60 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x21fe970; - .timescale -9 -12; -L_0x224ce70/d .functor AND 1, L_0x224e300, L_0x224e430, C4<1>, C4<1>; -L_0x224ce70 .delay (50000,50000,50000) L_0x224ce70/d; -L_0x224d3f0/d .functor AND 1, L_0x224e300, L_0x224c6b0, C4<1>, C4<1>; -L_0x224d3f0 .delay (50000,50000,50000) L_0x224d3f0/d; -L_0x224d4e0/d .functor AND 1, L_0x224e430, L_0x224c6b0, C4<1>, C4<1>; -L_0x224d4e0 .delay (50000,50000,50000) L_0x224d4e0/d; -L_0x224d5f0/d .functor OR 1, L_0x224ce70, L_0x224d3f0, C4<0>, C4<0>; -L_0x224d5f0 .delay (50000,50000,50000) L_0x224d5f0/d; -L_0x224d750/d .functor OR 1, L_0x224d5f0, L_0x224d4e0, C4<0>, C4<0>; -L_0x224d750 .delay (50000,50000,50000) L_0x224d750/d; -L_0x224d8b0/d .functor OR 1, L_0x224e300, L_0x224e430, C4<0>, C4<0>; -L_0x224d8b0 .delay (50000,50000,50000) L_0x224d8b0/d; -L_0x224d9b0/d .functor OR 1, L_0x224d8b0, L_0x224c6b0, C4<0>, C4<0>; -L_0x224d9b0 .delay (50000,50000,50000) L_0x224d9b0/d; -L_0x224dac0/d .functor NOT 1, L_0x224d750, C4<0>, C4<0>, C4<0>; -L_0x224dac0 .delay (50000,50000,50000) L_0x224dac0/d; -L_0x224db80/d .functor AND 1, L_0x224dac0, L_0x224d9b0, C4<1>, C4<1>; -L_0x224db80 .delay (50000,50000,50000) L_0x224db80/d; -L_0x224dcf0/d .functor AND 1, L_0x224e300, L_0x224e430, C4<1>, C4<1>; -L_0x224dcf0 .delay (50000,50000,50000) L_0x224dcf0/d; -L_0x224df30/d .functor AND 1, L_0x224dcf0, L_0x224c6b0, C4<1>, C4<1>; -L_0x224df30 .delay (50000,50000,50000) L_0x224df30/d; -L_0x224e0c0/d .functor OR 1, L_0x224db80, L_0x224df30, C4<0>, C4<0>; -L_0x224e0c0 .delay (50000,50000,50000) L_0x224e0c0/d; -v0x21feb50_0 .net "a", 0 0, L_0x224e300; 1 drivers -v0x21fec10_0 .net "ab", 0 0, L_0x224ce70; 1 drivers -v0x21fecb0_0 .net "acarryin", 0 0, L_0x224d3f0; 1 drivers -v0x21fed50_0 .net "andall", 0 0, L_0x224df30; 1 drivers -v0x21fedd0_0 .net "andsingleintermediate", 0 0, L_0x224dcf0; 1 drivers -v0x21fee70_0 .net "andsumintermediate", 0 0, L_0x224db80; 1 drivers -v0x21fef10_0 .net "b", 0 0, L_0x224e430; 1 drivers -v0x21fefb0_0 .net "bcarryin", 0 0, L_0x224d4e0; 1 drivers -v0x21ff0a0_0 .alias "carryin", 0 0, v0x22022c0_0; -v0x21ff140_0 .alias "carryout", 0 0, v0x221f010_0; -v0x21ff1c0_0 .net "invcarryout", 0 0, L_0x224dac0; 1 drivers -v0x21ff260_0 .net "orall", 0 0, L_0x224d9b0; 1 drivers -v0x21ff300_0 .net "orpairintermediate", 0 0, L_0x224d5f0; 1 drivers -v0x21ff3a0_0 .net "orsingleintermediate", 0 0, L_0x224d8b0; 1 drivers -v0x21ff4c0_0 .net "sum", 0 0, L_0x224e0c0; 1 drivers -S_0x21faea0 .scope module, "adder6" "FullAdder4bit" 4 245, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x22533f0/d .functor AND 1, L_0x2253b30, L_0x2253bd0, C4<1>, C4<1>; -L_0x22533f0 .delay (50000,50000,50000) L_0x22533f0/d; -L_0x2253c70/d .functor NOR 1, L_0x2253d10, L_0x2253db0, C4<0>, C4<0>; -L_0x2253c70 .delay (50000,50000,50000) L_0x2253c70/d; -L_0x2253ee0/d .functor AND 1, L_0x2253fd0, L_0x2254070, C4<1>, C4<1>; -L_0x2253ee0 .delay (50000,50000,50000) L_0x2253ee0/d; -L_0x2253e50/d .functor NOR 1, L_0x2254290, L_0x2254440, C4<0>, C4<0>; -L_0x2253e50 .delay (50000,50000,50000) L_0x2253e50/d; -L_0x2254160/d .functor OR 1, L_0x22533f0, L_0x2253c70, C4<0>, C4<0>; -L_0x2254160 .delay (50000,50000,50000) L_0x2254160/d; -L_0x2254680/d .functor NOR 1, L_0x2253ee0, L_0x2253e50, C4<0>, C4<0>; -L_0x2254680 .delay (50000,50000,50000) L_0x2254680/d; -L_0x22547c0/d .functor AND 1, L_0x2254160, L_0x2254680, C4<1>, C4<1>; -L_0x22547c0 .delay (50000,50000,50000) L_0x22547c0/d; -v0x21fda50_0 .net *"_s25", 0 0, L_0x2253b30; 1 drivers -v0x21fdb10_0 .net *"_s27", 0 0, L_0x2253bd0; 1 drivers -v0x21fdbb0_0 .net *"_s29", 0 0, L_0x2253d10; 1 drivers -v0x21fdc50_0 .net *"_s31", 0 0, L_0x2253db0; 1 drivers -v0x21fdcd0_0 .net *"_s33", 0 0, L_0x2253fd0; 1 drivers -v0x21fdd70_0 .net *"_s35", 0 0, L_0x2254070; 1 drivers -v0x21fde10_0 .net *"_s37", 0 0, L_0x2254290; 1 drivers -v0x21fdeb0_0 .net *"_s39", 0 0, L_0x2254440; 1 drivers -v0x21fdf50_0 .net "a", 3 0, L_0x2254b00; 1 drivers -v0x21fdff0_0 .net "aandb", 0 0, L_0x22533f0; 1 drivers -v0x21fe090_0 .net "abandnoror", 0 0, L_0x2254160; 1 drivers -v0x21fe130_0 .net "anorb", 0 0, L_0x2253c70; 1 drivers -v0x21fe1d0_0 .net "b", 3 0, L_0x224f4d0; 1 drivers -v0x21fe270_0 .net "bandsum", 0 0, L_0x2253ee0; 1 drivers -v0x21fe390_0 .net "bnorsum", 0 0, L_0x2253e50; 1 drivers -v0x21fe430_0 .net "bsumandnornor", 0 0, L_0x2254680; 1 drivers -v0x21fe2f0_0 .alias "carryin", 0 0, v0x221f010_0; -v0x21fe560_0 .alias "carryout", 0 0, v0x221ec80_0; -v0x21fe4b0_0 .net "carryout1", 0 0, L_0x224faa0; 1 drivers -v0x21fe680_0 .net "carryout2", 0 0, L_0x2250a10; 1 drivers -v0x21fe7b0_0 .net "carryout3", 0 0, L_0x2251bb0; 1 drivers -v0x21fe830_0 .alias "overflow", 0 0, v0x221bcf0_0; -v0x21fe700_0 .net8 "sum", 3 0, RS_0x7f8758e2ce48; 4 drivers -L_0x2250440 .part/pv L_0x2250380, 0, 1, 4; -L_0x2250500 .part L_0x2254b00, 0, 1; -L_0x22505a0 .part L_0x224f4d0, 0, 1; -L_0x22514d0 .part/pv L_0x22513c0, 1, 1, 4; -L_0x22515c0 .part L_0x2254b00, 1, 1; -L_0x22516b0 .part L_0x224f4d0, 1, 1; -L_0x2252670 .part/pv L_0x2252560, 2, 1, 4; -L_0x2252710 .part L_0x2254b00, 2, 1; -L_0x2252800 .part L_0x224f4d0, 2, 1; -L_0x22536f0 .part/pv L_0x22535e0, 3, 1, 4; -L_0x2253820 .part L_0x2254b00, 3, 1; -L_0x2253950 .part L_0x224f4d0, 3, 1; -L_0x2253b30 .part L_0x2254b00, 3, 1; -L_0x2253bd0 .part L_0x224f4d0, 3, 1; -L_0x2253d10 .part L_0x2254b00, 3, 1; -L_0x2253db0 .part L_0x224f4d0, 3, 1; -L_0x2253fd0 .part L_0x224f4d0, 3, 1; -L_0x2254070 .part RS_0x7f8758e2ce48, 3, 1; -L_0x2254290 .part L_0x224f4d0, 3, 1; -L_0x2254440 .part RS_0x7f8758e2ce48, 3, 1; -S_0x21fcfc0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x21faea0; - .timescale -9 -12; -L_0x224a1c0/d .functor AND 1, L_0x2250500, L_0x22505a0, C4<1>, C4<1>; -L_0x224a1c0 .delay (50000,50000,50000) L_0x224a1c0/d; -L_0x224a260/d .functor AND 1, L_0x2250500, L_0x224d750, C4<1>, C4<1>; -L_0x224a260 .delay (50000,50000,50000) L_0x224a260/d; -L_0x224f7d0/d .functor AND 1, L_0x22505a0, L_0x224d750, C4<1>, C4<1>; -L_0x224f7d0 .delay (50000,50000,50000) L_0x224f7d0/d; -L_0x224f940/d .functor OR 1, L_0x224a1c0, L_0x224a260, C4<0>, C4<0>; -L_0x224f940 .delay (50000,50000,50000) L_0x224f940/d; -L_0x224faa0/d .functor OR 1, L_0x224f940, L_0x224f7d0, C4<0>, C4<0>; -L_0x224faa0 .delay (50000,50000,50000) L_0x224faa0/d; -L_0x224fc00/d .functor OR 1, L_0x2250500, L_0x22505a0, C4<0>, C4<0>; -L_0x224fc00 .delay (50000,50000,50000) L_0x224fc00/d; -L_0x224fd00/d .functor OR 1, L_0x224fc00, L_0x224d750, C4<0>, C4<0>; -L_0x224fd00 .delay (50000,50000,50000) L_0x224fd00/d; -L_0x224fe10/d .functor NOT 1, L_0x224faa0, C4<0>, C4<0>, C4<0>; -L_0x224fe10 .delay (50000,50000,50000) L_0x224fe10/d; -L_0x224ff60/d .functor AND 1, L_0x224fe10, L_0x224fd00, C4<1>, C4<1>; -L_0x224ff60 .delay (50000,50000,50000) L_0x224ff60/d; -L_0x2250080/d .functor AND 1, L_0x2250500, L_0x22505a0, C4<1>, C4<1>; -L_0x2250080 .delay (50000,50000,50000) L_0x2250080/d; -L_0x22502c0/d .functor AND 1, L_0x2250080, L_0x224d750, C4<1>, C4<1>; -L_0x22502c0 .delay (50000,50000,50000) L_0x22502c0/d; -L_0x2250380/d .functor OR 1, L_0x224ff60, L_0x22502c0, C4<0>, C4<0>; -L_0x2250380 .delay (50000,50000,50000) L_0x2250380/d; -v0x21fd0b0_0 .net "a", 0 0, L_0x2250500; 1 drivers -v0x21fd170_0 .net "ab", 0 0, L_0x224a1c0; 1 drivers -v0x21fd210_0 .net "acarryin", 0 0, L_0x224a260; 1 drivers -v0x21fd2b0_0 .net "andall", 0 0, L_0x22502c0; 1 drivers -v0x21fd330_0 .net "andsingleintermediate", 0 0, L_0x2250080; 1 drivers -v0x21fd3d0_0 .net "andsumintermediate", 0 0, L_0x224ff60; 1 drivers -v0x21fd470_0 .net "b", 0 0, L_0x22505a0; 1 drivers -v0x21fd510_0 .net "bcarryin", 0 0, L_0x224f7d0; 1 drivers -v0x21fd5b0_0 .alias "carryin", 0 0, v0x221f010_0; -v0x21fd650_0 .alias "carryout", 0 0, v0x21fe4b0_0; -v0x21fd6d0_0 .net "invcarryout", 0 0, L_0x224fe10; 1 drivers -v0x21fd750_0 .net "orall", 0 0, L_0x224fd00; 1 drivers -v0x21fd7f0_0 .net "orpairintermediate", 0 0, L_0x224f940; 1 drivers -v0x21fd890_0 .net "orsingleintermediate", 0 0, L_0x224fc00; 1 drivers -v0x21fd9b0_0 .net "sum", 0 0, L_0x2250380; 1 drivers -S_0x21fc530 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x21faea0; - .timescale -9 -12; -L_0x2250260/d .functor AND 1, L_0x22515c0, L_0x22516b0, C4<1>, C4<1>; -L_0x2250260 .delay (50000,50000,50000) L_0x2250260/d; -L_0x22506d0/d .functor AND 1, L_0x22515c0, L_0x224faa0, C4<1>, C4<1>; -L_0x22506d0 .delay (50000,50000,50000) L_0x22506d0/d; -L_0x22507c0/d .functor AND 1, L_0x22516b0, L_0x224faa0, C4<1>, C4<1>; -L_0x22507c0 .delay (50000,50000,50000) L_0x22507c0/d; -L_0x22508b0/d .functor OR 1, L_0x2250260, L_0x22506d0, C4<0>, C4<0>; -L_0x22508b0 .delay (50000,50000,50000) L_0x22508b0/d; -L_0x2250a10/d .functor OR 1, L_0x22508b0, L_0x22507c0, C4<0>, C4<0>; -L_0x2250a10 .delay (50000,50000,50000) L_0x2250a10/d; -L_0x2250b70/d .functor OR 1, L_0x22515c0, L_0x22516b0, C4<0>, C4<0>; -L_0x2250b70 .delay (50000,50000,50000) L_0x2250b70/d; -L_0x2250c70/d .functor OR 1, L_0x2250b70, L_0x224faa0, C4<0>, C4<0>; -L_0x2250c70 .delay (50000,50000,50000) L_0x2250c70/d; -L_0x2250d80/d .functor NOT 1, L_0x2250a10, C4<0>, C4<0>, C4<0>; -L_0x2250d80 .delay (50000,50000,50000) L_0x2250d80/d; -L_0x2250ed0/d .functor AND 1, L_0x2250d80, L_0x2250c70, C4<1>, C4<1>; -L_0x2250ed0 .delay (50000,50000,50000) L_0x2250ed0/d; -L_0x2250ff0/d .functor AND 1, L_0x22515c0, L_0x22516b0, C4<1>, C4<1>; -L_0x2250ff0 .delay (50000,50000,50000) L_0x2250ff0/d; -L_0x2251230/d .functor AND 1, L_0x2250ff0, L_0x224faa0, C4<1>, C4<1>; -L_0x2251230 .delay (50000,50000,50000) L_0x2251230/d; -L_0x22513c0/d .functor OR 1, L_0x2250ed0, L_0x2251230, C4<0>, C4<0>; -L_0x22513c0 .delay (50000,50000,50000) L_0x22513c0/d; -v0x21fc620_0 .net "a", 0 0, L_0x22515c0; 1 drivers -v0x21fc6e0_0 .net "ab", 0 0, L_0x2250260; 1 drivers -v0x21fc780_0 .net "acarryin", 0 0, L_0x22506d0; 1 drivers -v0x21fc820_0 .net "andall", 0 0, L_0x2251230; 1 drivers -v0x21fc8a0_0 .net "andsingleintermediate", 0 0, L_0x2250ff0; 1 drivers -v0x21fc940_0 .net "andsumintermediate", 0 0, L_0x2250ed0; 1 drivers -v0x21fc9e0_0 .net "b", 0 0, L_0x22516b0; 1 drivers -v0x21fca80_0 .net "bcarryin", 0 0, L_0x22507c0; 1 drivers -v0x21fcb20_0 .alias "carryin", 0 0, v0x21fe4b0_0; -v0x21fcbc0_0 .alias "carryout", 0 0, v0x21fe680_0; -v0x21fcc40_0 .net "invcarryout", 0 0, L_0x2250d80; 1 drivers -v0x21fccc0_0 .net "orall", 0 0, L_0x2250c70; 1 drivers -v0x21fcd60_0 .net "orpairintermediate", 0 0, L_0x22508b0; 1 drivers -v0x21fce00_0 .net "orsingleintermediate", 0 0, L_0x2250b70; 1 drivers -v0x21fcf20_0 .net "sum", 0 0, L_0x22513c0; 1 drivers -S_0x21fba50 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x21faea0; - .timescale -9 -12; -L_0x22511d0/d .functor AND 1, L_0x2252710, L_0x2252800, C4<1>, C4<1>; -L_0x22511d0 .delay (50000,50000,50000) L_0x22511d0/d; -L_0x2251870/d .functor AND 1, L_0x2252710, L_0x2250a10, C4<1>, C4<1>; -L_0x2251870 .delay (50000,50000,50000) L_0x2251870/d; -L_0x2251960/d .functor AND 1, L_0x2252800, L_0x2250a10, C4<1>, C4<1>; -L_0x2251960 .delay (50000,50000,50000) L_0x2251960/d; -L_0x2251a50/d .functor OR 1, L_0x22511d0, L_0x2251870, C4<0>, C4<0>; -L_0x2251a50 .delay (50000,50000,50000) L_0x2251a50/d; -L_0x2251bb0/d .functor OR 1, L_0x2251a50, L_0x2251960, C4<0>, C4<0>; -L_0x2251bb0 .delay (50000,50000,50000) L_0x2251bb0/d; -L_0x2251d10/d .functor OR 1, L_0x2252710, L_0x2252800, C4<0>, C4<0>; -L_0x2251d10 .delay (50000,50000,50000) L_0x2251d10/d; -L_0x2251e10/d .functor OR 1, L_0x2251d10, L_0x2250a10, C4<0>, C4<0>; -L_0x2251e10 .delay (50000,50000,50000) L_0x2251e10/d; -L_0x2251f20/d .functor NOT 1, L_0x2251bb0, C4<0>, C4<0>, C4<0>; -L_0x2251f20 .delay (50000,50000,50000) L_0x2251f20/d; -L_0x2252070/d .functor AND 1, L_0x2251f20, L_0x2251e10, C4<1>, C4<1>; -L_0x2252070 .delay (50000,50000,50000) L_0x2252070/d; -L_0x2252190/d .functor AND 1, L_0x2252710, L_0x2252800, C4<1>, C4<1>; -L_0x2252190 .delay (50000,50000,50000) L_0x2252190/d; -L_0x22523d0/d .functor AND 1, L_0x2252190, L_0x2250a10, C4<1>, C4<1>; -L_0x22523d0 .delay (50000,50000,50000) L_0x22523d0/d; -L_0x2252560/d .functor OR 1, L_0x2252070, L_0x22523d0, C4<0>, C4<0>; -L_0x2252560 .delay (50000,50000,50000) L_0x2252560/d; -v0x21fbb40_0 .net "a", 0 0, L_0x2252710; 1 drivers -v0x21fbc00_0 .net "ab", 0 0, L_0x22511d0; 1 drivers -v0x21fbca0_0 .net "acarryin", 0 0, L_0x2251870; 1 drivers -v0x21fbd40_0 .net "andall", 0 0, L_0x22523d0; 1 drivers -v0x21fbdc0_0 .net "andsingleintermediate", 0 0, L_0x2252190; 1 drivers -v0x21fbe60_0 .net "andsumintermediate", 0 0, L_0x2252070; 1 drivers -v0x21fbf00_0 .net "b", 0 0, L_0x2252800; 1 drivers -v0x21fbfa0_0 .net "bcarryin", 0 0, L_0x2251960; 1 drivers -v0x21fc090_0 .alias "carryin", 0 0, v0x21fe680_0; -v0x21fc130_0 .alias "carryout", 0 0, v0x21fe7b0_0; -v0x21fc1b0_0 .net "invcarryout", 0 0, L_0x2251f20; 1 drivers -v0x21fc230_0 .net "orall", 0 0, L_0x2251e10; 1 drivers -v0x21fc2d0_0 .net "orpairintermediate", 0 0, L_0x2251a50; 1 drivers -v0x21fc370_0 .net "orsingleintermediate", 0 0, L_0x2251d10; 1 drivers -v0x21fc490_0 .net "sum", 0 0, L_0x2252560; 1 drivers -S_0x21faf90 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x21faea0; - .timescale -9 -12; -L_0x2252370/d .functor AND 1, L_0x2253820, L_0x2253950, C4<1>, C4<1>; -L_0x2252370 .delay (50000,50000,50000) L_0x2252370/d; -L_0x22528f0/d .functor AND 1, L_0x2253820, L_0x2251bb0, C4<1>, C4<1>; -L_0x22528f0 .delay (50000,50000,50000) L_0x22528f0/d; -L_0x2252a00/d .functor AND 1, L_0x2253950, L_0x2251bb0, C4<1>, C4<1>; -L_0x2252a00 .delay (50000,50000,50000) L_0x2252a00/d; -L_0x2252b10/d .functor OR 1, L_0x2252370, L_0x22528f0, C4<0>, C4<0>; -L_0x2252b10 .delay (50000,50000,50000) L_0x2252b10/d; -L_0x2252c70/d .functor OR 1, L_0x2252b10, L_0x2252a00, C4<0>, C4<0>; -L_0x2252c70 .delay (50000,50000,50000) L_0x2252c70/d; -L_0x2252dd0/d .functor OR 1, L_0x2253820, L_0x2253950, C4<0>, C4<0>; -L_0x2252dd0 .delay (50000,50000,50000) L_0x2252dd0/d; -L_0x2252ed0/d .functor OR 1, L_0x2252dd0, L_0x2251bb0, C4<0>, C4<0>; -L_0x2252ed0 .delay (50000,50000,50000) L_0x2252ed0/d; -L_0x2252fe0/d .functor NOT 1, L_0x2252c70, C4<0>, C4<0>, C4<0>; -L_0x2252fe0 .delay (50000,50000,50000) L_0x2252fe0/d; -L_0x22530a0/d .functor AND 1, L_0x2252fe0, L_0x2252ed0, C4<1>, C4<1>; -L_0x22530a0 .delay (50000,50000,50000) L_0x22530a0/d; -L_0x2253210/d .functor AND 1, L_0x2253820, L_0x2253950, C4<1>, C4<1>; -L_0x2253210 .delay (50000,50000,50000) L_0x2253210/d; -L_0x2253450/d .functor AND 1, L_0x2253210, L_0x2251bb0, C4<1>, C4<1>; -L_0x2253450 .delay (50000,50000,50000) L_0x2253450/d; -L_0x22535e0/d .functor OR 1, L_0x22530a0, L_0x2253450, C4<0>, C4<0>; -L_0x22535e0 .delay (50000,50000,50000) L_0x22535e0/d; -v0x21fb080_0 .net "a", 0 0, L_0x2253820; 1 drivers -v0x21fb100_0 .net "ab", 0 0, L_0x2252370; 1 drivers -v0x21fb1a0_0 .net "acarryin", 0 0, L_0x22528f0; 1 drivers -v0x21fb240_0 .net "andall", 0 0, L_0x2253450; 1 drivers -v0x21fb2c0_0 .net "andsingleintermediate", 0 0, L_0x2253210; 1 drivers -v0x21fb360_0 .net "andsumintermediate", 0 0, L_0x22530a0; 1 drivers -v0x21fb400_0 .net "b", 0 0, L_0x2253950; 1 drivers -v0x21fb4a0_0 .net "bcarryin", 0 0, L_0x2252a00; 1 drivers -v0x21fb590_0 .alias "carryin", 0 0, v0x21fe7b0_0; -v0x21fb630_0 .alias "carryout", 0 0, v0x221ec80_0; -v0x21fb6b0_0 .net "invcarryout", 0 0, L_0x2252fe0; 1 drivers -v0x21fb750_0 .net "orall", 0 0, L_0x2252ed0; 1 drivers -v0x21fb7f0_0 .net "orpairintermediate", 0 0, L_0x2252b10; 1 drivers -v0x21fb890_0 .net "orsingleintermediate", 0 0, L_0x2252dd0; 1 drivers -v0x21fb9b0_0 .net "sum", 0 0, L_0x22535e0; 1 drivers -S_0x21f72c0 .scope module, "adder7" "FullAdder4bit" 4 246, 2 47, S_0x21f71d0; - .timescale -9 -12; -L_0x22589f0/d .functor AND 1, L_0x2259080, L_0x2259120, C4<1>, C4<1>; -L_0x22589f0 .delay (50000,50000,50000) L_0x22589f0/d; -L_0x22591c0/d .functor NOR 1, L_0x2259270, L_0x2259310, C4<0>, C4<0>; -L_0x22591c0 .delay (50000,50000,50000) L_0x22591c0/d; -L_0x2259490/d .functor AND 1, L_0x2259580, L_0x2259620, C4<1>, C4<1>; -L_0x2259490 .delay (50000,50000,50000) L_0x2259490/d; -L_0x2259400/d .functor NOR 1, L_0x2259840, L_0x22599f0, C4<0>, C4<0>; -L_0x2259400 .delay (50000,50000,50000) L_0x2259400/d; -L_0x2259710/d .functor OR 1, L_0x22589f0, L_0x22591c0, C4<0>, C4<0>; -L_0x2259710 .delay (50000,50000,50000) L_0x2259710/d; -L_0x2259c30/d .functor NOR 1, L_0x2259490, L_0x2259400, C4<0>, C4<0>; -L_0x2259c30 .delay (50000,50000,50000) L_0x2259c30/d; -L_0x2259d70/d .functor AND 1, L_0x2259710, L_0x2259c30, C4<1>, C4<1>; -L_0x2259d70 .delay (50000,50000,50000) L_0x2259d70/d; -v0x21f9f00_0 .net *"_s25", 0 0, L_0x2259080; 1 drivers -v0x21f9fc0_0 .net *"_s27", 0 0, L_0x2259120; 1 drivers -v0x21fa060_0 .net *"_s29", 0 0, L_0x2259270; 1 drivers -v0x21fa100_0 .net *"_s31", 0 0, L_0x2259310; 1 drivers -v0x21fa1b0_0 .net *"_s33", 0 0, L_0x2259580; 1 drivers -v0x21fa250_0 .net *"_s35", 0 0, L_0x2259620; 1 drivers -v0x21fa2f0_0 .net *"_s37", 0 0, L_0x2259840; 1 drivers -v0x21fa390_0 .net *"_s39", 0 0, L_0x22599f0; 1 drivers -v0x21fa430_0 .net "a", 3 0, L_0x2254cb0; 1 drivers -v0x21fa4d0_0 .net "aandb", 0 0, L_0x22589f0; 1 drivers -v0x21fa570_0 .net "abandnoror", 0 0, L_0x2259710; 1 drivers -v0x21fa610_0 .net "anorb", 0 0, L_0x22591c0; 1 drivers -v0x21fa6b0_0 .net "b", 3 0, L_0x2254d50; 1 drivers -v0x21fa750_0 .net "bandsum", 0 0, L_0x2259490; 1 drivers -v0x21fa870_0 .net "bnorsum", 0 0, L_0x2259400; 1 drivers -v0x21fa910_0 .net "bsumandnornor", 0 0, L_0x2259c30; 1 drivers -v0x21fa7d0_0 .alias "carryin", 0 0, v0x221ec80_0; -v0x21faa40_0 .alias "carryout", 0 0, v0x221f7f0_0; -v0x21fab60_0 .net "carryout1", 0 0, L_0x22550d0; 1 drivers -v0x21fabe0_0 .net "carryout2", 0 0, L_0x2256000; 1 drivers -v0x21faac0_0 .net "carryout3", 0 0, L_0x2257190; 1 drivers -v0x21fad60_0 .alias "overflow", 0 0, v0x221f8f0_0; -v0x21fac60_0 .net8 "sum", 3 0, RS_0x7f8758e2c068; 4 drivers -L_0x2255a50 .part/pv L_0x2255990, 0, 1, 4; -L_0x2255af0 .part L_0x2254cb0, 0, 1; -L_0x2255b90 .part L_0x2254d50, 0, 1; -L_0x2256ab0 .part/pv L_0x22569a0, 1, 1, 4; -L_0x2256ba0 .part L_0x2254cb0, 1, 1; -L_0x2256c90 .part L_0x2254d50, 1, 1; -L_0x2257c50 .part/pv L_0x2257b40, 2, 1, 4; -L_0x2257cf0 .part L_0x2254cb0, 2, 1; -L_0x2257de0 .part L_0x2254d50, 2, 1; -L_0x2258cf0 .part/pv L_0x2258be0, 3, 1, 4; -L_0x2258e20 .part L_0x2254cb0, 3, 1; -L_0x2258f50 .part L_0x2254d50, 3, 1; -L_0x2259080 .part L_0x2254cb0, 3, 1; -L_0x2259120 .part L_0x2254d50, 3, 1; -L_0x2259270 .part L_0x2254cb0, 3, 1; -L_0x2259310 .part L_0x2254d50, 3, 1; -L_0x2259580 .part L_0x2254d50, 3, 1; -L_0x2259620 .part RS_0x7f8758e2c068, 3, 1; -L_0x2259840 .part L_0x2254d50, 3, 1; -L_0x22599f0 .part RS_0x7f8758e2c068, 3, 1; -S_0x21f9440 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x21f72c0; - .timescale -9 -12; -L_0x224f570/d .functor AND 1, L_0x2255af0, L_0x2255b90, C4<1>, C4<1>; -L_0x224f570 .delay (50000,50000,50000) L_0x224f570/d; -L_0x224f610/d .functor AND 1, L_0x2255af0, L_0x2252c70, C4<1>, C4<1>; -L_0x224f610 .delay (50000,50000,50000) L_0x224f610/d; -L_0x224f700/d .functor AND 1, L_0x2255b90, L_0x2252c70, C4<1>, C4<1>; -L_0x224f700 .delay (50000,50000,50000) L_0x224f700/d; -L_0x223f870/d .functor OR 1, L_0x224f570, L_0x224f610, C4<0>, C4<0>; -L_0x223f870 .delay (50000,50000,50000) L_0x223f870/d; -L_0x22550d0/d .functor OR 1, L_0x223f870, L_0x224f700, C4<0>, C4<0>; -L_0x22550d0 .delay (50000,50000,50000) L_0x22550d0/d; -L_0x2255210/d .functor OR 1, L_0x2255af0, L_0x2255b90, C4<0>, C4<0>; -L_0x2255210 .delay (50000,50000,50000) L_0x2255210/d; -L_0x2255310/d .functor OR 1, L_0x2255210, L_0x2252c70, C4<0>, C4<0>; -L_0x2255310 .delay (50000,50000,50000) L_0x2255310/d; -L_0x2255420/d .functor NOT 1, L_0x22550d0, C4<0>, C4<0>, C4<0>; -L_0x2255420 .delay (50000,50000,50000) L_0x2255420/d; -L_0x2255570/d .functor AND 1, L_0x2255420, L_0x2255310, C4<1>, C4<1>; -L_0x2255570 .delay (50000,50000,50000) L_0x2255570/d; -L_0x2255690/d .functor AND 1, L_0x2255af0, L_0x2255b90, C4<1>, C4<1>; -L_0x2255690 .delay (50000,50000,50000) L_0x2255690/d; -L_0x22558d0/d .functor AND 1, L_0x2255690, L_0x2252c70, C4<1>, C4<1>; -L_0x22558d0 .delay (50000,50000,50000) L_0x22558d0/d; -L_0x2255990/d .functor OR 1, L_0x2255570, L_0x22558d0, C4<0>, C4<0>; -L_0x2255990 .delay (50000,50000,50000) L_0x2255990/d; -v0x21f9530_0 .net "a", 0 0, L_0x2255af0; 1 drivers -v0x21f95f0_0 .net "ab", 0 0, L_0x224f570; 1 drivers -v0x21f9690_0 .net "acarryin", 0 0, L_0x224f610; 1 drivers -v0x21f9730_0 .net "andall", 0 0, L_0x22558d0; 1 drivers -v0x21f97e0_0 .net "andsingleintermediate", 0 0, L_0x2255690; 1 drivers -v0x21f9880_0 .net "andsumintermediate", 0 0, L_0x2255570; 1 drivers -v0x21f9920_0 .net "b", 0 0, L_0x2255b90; 1 drivers -v0x21f99c0_0 .net "bcarryin", 0 0, L_0x224f700; 1 drivers -v0x21f9a60_0 .alias "carryin", 0 0, v0x221ec80_0; -v0x21f9b00_0 .alias "carryout", 0 0, v0x21fab60_0; -v0x21f9b80_0 .net "invcarryout", 0 0, L_0x2255420; 1 drivers -v0x21f9c00_0 .net "orall", 0 0, L_0x2255310; 1 drivers -v0x21f9ca0_0 .net "orpairintermediate", 0 0, L_0x223f870; 1 drivers -v0x21f9d40_0 .net "orsingleintermediate", 0 0, L_0x2255210; 1 drivers -v0x21f9e60_0 .net "sum", 0 0, L_0x2255990; 1 drivers -S_0x21f8980 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x21f72c0; - .timescale -9 -12; -L_0x2255870/d .functor AND 1, L_0x2256ba0, L_0x2256c90, C4<1>, C4<1>; -L_0x2255870 .delay (50000,50000,50000) L_0x2255870/d; -L_0x2255cc0/d .functor AND 1, L_0x2256ba0, L_0x22550d0, C4<1>, C4<1>; -L_0x2255cc0 .delay (50000,50000,50000) L_0x2255cc0/d; -L_0x2255db0/d .functor AND 1, L_0x2256c90, L_0x22550d0, C4<1>, C4<1>; -L_0x2255db0 .delay (50000,50000,50000) L_0x2255db0/d; -L_0x2255ea0/d .functor OR 1, L_0x2255870, L_0x2255cc0, C4<0>, C4<0>; -L_0x2255ea0 .delay (50000,50000,50000) L_0x2255ea0/d; -L_0x2256000/d .functor OR 1, L_0x2255ea0, L_0x2255db0, C4<0>, C4<0>; -L_0x2256000 .delay (50000,50000,50000) L_0x2256000/d; -L_0x2256160/d .functor OR 1, L_0x2256ba0, L_0x2256c90, C4<0>, C4<0>; -L_0x2256160 .delay (50000,50000,50000) L_0x2256160/d; -L_0x2256260/d .functor OR 1, L_0x2256160, L_0x22550d0, C4<0>, C4<0>; -L_0x2256260 .delay (50000,50000,50000) L_0x2256260/d; -L_0x2256370/d .functor NOT 1, L_0x2256000, C4<0>, C4<0>, C4<0>; -L_0x2256370 .delay (50000,50000,50000) L_0x2256370/d; -L_0x21fa9c0/d .functor AND 1, L_0x2256370, L_0x2256260, C4<1>, C4<1>; -L_0x21fa9c0 .delay (50000,50000,50000) L_0x21fa9c0/d; -L_0x22565d0/d .functor AND 1, L_0x2256ba0, L_0x2256c90, C4<1>, C4<1>; -L_0x22565d0 .delay (50000,50000,50000) L_0x22565d0/d; -L_0x2256810/d .functor AND 1, L_0x22565d0, L_0x22550d0, C4<1>, C4<1>; -L_0x2256810 .delay (50000,50000,50000) L_0x2256810/d; -L_0x22569a0/d .functor OR 1, L_0x21fa9c0, L_0x2256810, C4<0>, C4<0>; -L_0x22569a0 .delay (50000,50000,50000) L_0x22569a0/d; -v0x21f8a70_0 .net "a", 0 0, L_0x2256ba0; 1 drivers -v0x21f8b30_0 .net "ab", 0 0, L_0x2255870; 1 drivers -v0x21f8bd0_0 .net "acarryin", 0 0, L_0x2255cc0; 1 drivers -v0x21f8c70_0 .net "andall", 0 0, L_0x2256810; 1 drivers -v0x21f8d20_0 .net "andsingleintermediate", 0 0, L_0x22565d0; 1 drivers -v0x21f8dc0_0 .net "andsumintermediate", 0 0, L_0x21fa9c0; 1 drivers -v0x21f8e60_0 .net "b", 0 0, L_0x2256c90; 1 drivers -v0x21f8f00_0 .net "bcarryin", 0 0, L_0x2255db0; 1 drivers -v0x21f8fa0_0 .alias "carryin", 0 0, v0x21fab60_0; -v0x21f9040_0 .alias "carryout", 0 0, v0x21fabe0_0; -v0x21f90c0_0 .net "invcarryout", 0 0, L_0x2256370; 1 drivers -v0x21f9140_0 .net "orall", 0 0, L_0x2256260; 1 drivers -v0x21f91e0_0 .net "orpairintermediate", 0 0, L_0x2255ea0; 1 drivers -v0x21f9280_0 .net "orsingleintermediate", 0 0, L_0x2256160; 1 drivers -v0x21f93a0_0 .net "sum", 0 0, L_0x22569a0; 1 drivers -S_0x21f7ef0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x21f72c0; - .timescale -9 -12; -L_0x22567b0/d .functor AND 1, L_0x2257cf0, L_0x2257de0, C4<1>, C4<1>; -L_0x22567b0 .delay (50000,50000,50000) L_0x22567b0/d; -L_0x2256e50/d .functor AND 1, L_0x2257cf0, L_0x2256000, C4<1>, C4<1>; -L_0x2256e50 .delay (50000,50000,50000) L_0x2256e50/d; -L_0x2256f40/d .functor AND 1, L_0x2257de0, L_0x2256000, C4<1>, C4<1>; -L_0x2256f40 .delay (50000,50000,50000) L_0x2256f40/d; -L_0x2257030/d .functor OR 1, L_0x22567b0, L_0x2256e50, C4<0>, C4<0>; -L_0x2257030 .delay (50000,50000,50000) L_0x2257030/d; -L_0x2257190/d .functor OR 1, L_0x2257030, L_0x2256f40, C4<0>, C4<0>; -L_0x2257190 .delay (50000,50000,50000) L_0x2257190/d; -L_0x22572f0/d .functor OR 1, L_0x2257cf0, L_0x2257de0, C4<0>, C4<0>; -L_0x22572f0 .delay (50000,50000,50000) L_0x22572f0/d; -L_0x22573f0/d .functor OR 1, L_0x22572f0, L_0x2256000, C4<0>, C4<0>; -L_0x22573f0 .delay (50000,50000,50000) L_0x22573f0/d; -L_0x2257500/d .functor NOT 1, L_0x2257190, C4<0>, C4<0>, C4<0>; -L_0x2257500 .delay (50000,50000,50000) L_0x2257500/d; -L_0x2257650/d .functor AND 1, L_0x2257500, L_0x22573f0, C4<1>, C4<1>; -L_0x2257650 .delay (50000,50000,50000) L_0x2257650/d; -L_0x2257770/d .functor AND 1, L_0x2257cf0, L_0x2257de0, C4<1>, C4<1>; -L_0x2257770 .delay (50000,50000,50000) L_0x2257770/d; -L_0x22579b0/d .functor AND 1, L_0x2257770, L_0x2256000, C4<1>, C4<1>; -L_0x22579b0 .delay (50000,50000,50000) L_0x22579b0/d; -L_0x2257b40/d .functor OR 1, L_0x2257650, L_0x22579b0, C4<0>, C4<0>; -L_0x2257b40 .delay (50000,50000,50000) L_0x2257b40/d; -v0x21f7fe0_0 .net "a", 0 0, L_0x2257cf0; 1 drivers -v0x21f80a0_0 .net "ab", 0 0, L_0x22567b0; 1 drivers -v0x21f8140_0 .net "acarryin", 0 0, L_0x2256e50; 1 drivers -v0x21f81e0_0 .net "andall", 0 0, L_0x22579b0; 1 drivers -v0x21f8260_0 .net "andsingleintermediate", 0 0, L_0x2257770; 1 drivers -v0x21f8300_0 .net "andsumintermediate", 0 0, L_0x2257650; 1 drivers -v0x21f83a0_0 .net "b", 0 0, L_0x2257de0; 1 drivers -v0x21f8440_0 .net "bcarryin", 0 0, L_0x2256f40; 1 drivers -v0x21f84e0_0 .alias "carryin", 0 0, v0x21fabe0_0; -v0x21f8580_0 .alias "carryout", 0 0, v0x21faac0_0; -v0x21f8600_0 .net "invcarryout", 0 0, L_0x2257500; 1 drivers -v0x21f8680_0 .net "orall", 0 0, L_0x22573f0; 1 drivers -v0x21f8720_0 .net "orpairintermediate", 0 0, L_0x2257030; 1 drivers -v0x21f87c0_0 .net "orsingleintermediate", 0 0, L_0x22572f0; 1 drivers -v0x21f88e0_0 .net "sum", 0 0, L_0x2257b40; 1 drivers -S_0x21f73b0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x21f72c0; - .timescale -9 -12; -L_0x2257950/d .functor AND 1, L_0x2258e20, L_0x2258f50, C4<1>, C4<1>; -L_0x2257950 .delay (50000,50000,50000) L_0x2257950/d; -L_0x2257ed0/d .functor AND 1, L_0x2258e20, L_0x2257190, C4<1>, C4<1>; -L_0x2257ed0 .delay (50000,50000,50000) L_0x2257ed0/d; -L_0x2257fc0/d .functor AND 1, L_0x2258f50, L_0x2257190, C4<1>, C4<1>; -L_0x2257fc0 .delay (50000,50000,50000) L_0x2257fc0/d; -L_0x22580d0/d .functor OR 1, L_0x2257950, L_0x2257ed0, C4<0>, C4<0>; -L_0x22580d0 .delay (50000,50000,50000) L_0x22580d0/d; -L_0x2258230/d .functor OR 1, L_0x22580d0, L_0x2257fc0, C4<0>, C4<0>; -L_0x2258230 .delay (50000,50000,50000) L_0x2258230/d; -L_0x22583d0/d .functor OR 1, L_0x2258e20, L_0x2258f50, C4<0>, C4<0>; -L_0x22583d0 .delay (50000,50000,50000) L_0x22583d0/d; -L_0x22584d0/d .functor OR 1, L_0x22583d0, L_0x2257190, C4<0>, C4<0>; -L_0x22584d0 .delay (50000,50000,50000) L_0x22584d0/d; -L_0x22585e0/d .functor NOT 1, L_0x2258230, C4<0>, C4<0>, C4<0>; -L_0x22585e0 .delay (50000,50000,50000) L_0x22585e0/d; -L_0x22586a0/d .functor AND 1, L_0x22585e0, L_0x22584d0, C4<1>, C4<1>; -L_0x22586a0 .delay (50000,50000,50000) L_0x22586a0/d; -L_0x2258810/d .functor AND 1, L_0x2258e20, L_0x2258f50, C4<1>, C4<1>; -L_0x2258810 .delay (50000,50000,50000) L_0x2258810/d; -L_0x2258a50/d .functor AND 1, L_0x2258810, L_0x2257190, C4<1>, C4<1>; -L_0x2258a50 .delay (50000,50000,50000) L_0x2258a50/d; -L_0x2258be0/d .functor OR 1, L_0x22586a0, L_0x2258a50, C4<0>, C4<0>; -L_0x2258be0 .delay (50000,50000,50000) L_0x2258be0/d; -v0x21f74a0_0 .net "a", 0 0, L_0x2258e20; 1 drivers -v0x21f7560_0 .net "ab", 0 0, L_0x2257950; 1 drivers -v0x21f7600_0 .net "acarryin", 0 0, L_0x2257ed0; 1 drivers -v0x21f76a0_0 .net "andall", 0 0, L_0x2258a50; 1 drivers -v0x21f7720_0 .net "andsingleintermediate", 0 0, L_0x2258810; 1 drivers -v0x21f77c0_0 .net "andsumintermediate", 0 0, L_0x22586a0; 1 drivers -v0x21f7860_0 .net "b", 0 0, L_0x2258f50; 1 drivers -v0x21f7900_0 .net "bcarryin", 0 0, L_0x2257fc0; 1 drivers -v0x21f79a0_0 .alias "carryin", 0 0, v0x21faac0_0; -v0x21f7a40_0 .alias "carryout", 0 0, v0x221f7f0_0; -v0x21f7ae0_0 .net "invcarryout", 0 0, L_0x22585e0; 1 drivers -v0x21f7b80_0 .net "orall", 0 0, L_0x22584d0; 1 drivers -v0x21f7c90_0 .net "orpairintermediate", 0 0, L_0x22580d0; 1 drivers -v0x21f7d30_0 .net "orsingleintermediate", 0 0, L_0x22583d0; 1 drivers -v0x21f7e50_0 .net "sum", 0 0, L_0x2258be0; 1 drivers - .scope S_0x21afb70; -T_0 ; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 19 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 22 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 25 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 28 "$display", "%b %b %b | %b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 31 "$display", "%b %b %b | %b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 1, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 34 "$display", "%b %b %b | \011%b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %ix/load 0, 31, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f1f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f1f0_0, 1, 1; - %ix/load 0, 31, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 30, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 29, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 28, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 27, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 26, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 25, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 24, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 23, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 22, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 21, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 20, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 19, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 18, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 17, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 16, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 15, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 14, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 13, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 12, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 11, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 10, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 9, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 8, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 7, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 6, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 5, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 4, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 3, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f6f0_0, 0, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f6f0_0, 1, 1; - %ix/load 0, 0, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 1, 0; - %set/x0 v0x221f770_0, 0, 1; - %ix/load 0, 2, 0; - %set/x0 v0x221f770_0, 0, 1; - %delay 5000000, 0; - %vpi_call 3 37 "$display", "%b %b %b | %b %b %b | ", v0x221f1f0_0, v0x221f6f0_0, v0x221f770_0, v0x221f2a0_0, v0x221f7f0_0, v0x221f8f0_0; - %end; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 5; - "N/A"; - ""; - "./adder.v"; - "adder_subtracter.t.v"; - "./adder_subtracter.v"; From ae45cbec1fc80bd3723ac867130c6d5b34d124a5 Mon Sep 17 00:00:00 2001 From: apan64 Date: Tue, 10 Oct 2017 22:10:29 -0400 Subject: [PATCH 20/38] pls work gitignore --- .gitignore | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/.gitignore b/.gitignore index a1d35d9..13aa783 100644 --- a/.gitignore +++ b/.gitignore @@ -1 +1,5 @@ -!*.* +# Ignore all +* + +# Unignore all with extensions +!*.* \ No newline at end of file From 4c18e2463cafa41f2bd301920b125ee438b7e184 Mon Sep 17 00:00:00 2001 From: Kimber Date: Tue, 10 Oct 2017 22:13:20 -0400 Subject: [PATCH 21/38] slightly better ALU --- ALU32bit.v | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/ALU32bit.v b/ALU32bit.v index 6d83f28..65e9b3e 100644 --- a/ALU32bit.v +++ b/ALU32bit.v @@ -8,22 +8,25 @@ `include "nor_32bit.v" `include "or_32bit.v" -module ALUcontrolLUT //Ben Hill's code +module ALUcontrolLUT ( - output reg [31:0]controlsignal, //final 32-bit output output cout, //addsub only output flag, //addsub only output reg[31:0] finalsignal, input [2:0]ALUcommand, input [31:0]a, - input [31:0]b, - input [31:0]xorin, //placeholders - input [31:0]andin, - input [31:0]nandin, - input [31:0]norin, - input [31:0]orin + input [31:0]b + ); +//everything going through the different parts +wire [31:0]addsub; +wire [31:0]xorin; +wire [31:0]slt; +wire [31:0]andin; +wire [31:0]nandin; +wire [31:0]norin; +wire [31:0]orin; adder_subtracter addsub0(addsub[31:0],cout,flag,a[31:0],b[31:0],ALUcommand[2:0]); xor_32bit xor0(xorin[31:0],a[31:0],b[31:0]); From 04bd1a7b5bd7f3a8733853bd36a9399da038fe02 Mon Sep 17 00:00:00 2001 From: Kimber Date: Tue, 10 Oct 2017 22:16:15 -0400 Subject: [PATCH 22/38] proper naming --- alu.v | 59 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 alu.v diff --git a/alu.v b/alu.v new file mode 100644 index 0000000..65e9b3e --- /dev/null +++ b/alu.v @@ -0,0 +1,59 @@ +//final 32-bit ALU + +`include "adder_subtracter.v" +`include "slt.v" +`include "and_32bit.v" +`include "nand_32bit.v" +`include "xor_32bit.v" +`include "nor_32bit.v" +`include "or_32bit.v" + +module ALUcontrolLUT +( + output cout, //addsub only + output flag, //addsub only + output reg[31:0] finalsignal, + input [2:0]ALUcommand, + input [31:0]a, + input [31:0]b + + +); +//everything going through the different parts +wire [31:0]addsub; +wire [31:0]xorin; +wire [31:0]slt; +wire [31:0]andin; +wire [31:0]nandin; +wire [31:0]norin; +wire [31:0]orin; + +adder_subtracter addsub0(addsub[31:0],cout,flag,a[31:0],b[31:0],ALUcommand[2:0]); +xor_32bit xor0(xorin[31:0],a[31:0],b[31:0]); +full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); +and_32bit and0(andin[31:0],a[31:0],b[31:0]); +nand_32bit nand0(nandin[31:0],a[31:0],b[31:0]); +nor_32bit nor0(norin[31:0],a[31:0],b[31:0]); +or_32bit or0(orin[31:0],a[31:0],b[31:0]); + + + always @(ALUcommand) + begin + if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) + finalsignal[31:0]=addsub[31:0]; + if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) + finalsignal[31:0]=addsub[31:0]; + if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==0) + finalsignal[31:0]=xorin[31:0]; + if(ALUcommand[0]==1 && ALUcommand[1]==1 && ALUcommand[2]==0) + finalsignal[31:0]=slt[31:0]; + if(ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==1) + finalsignal[31:0]=andin[31:0]; + if(ALUcommand[0]==1 && ALUcommand[1]==0 && ALUcommand[2]==1) + finalsignal[31:0]=nandin[31:0]; + if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==1) + finalsignal[31:0]=norin[31:0]; + else + finalsignal[31:0]=orin[31:0]; + end +endmodule From c3642636832672faf611ab4628e5c5500101558a Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Tue, 10 Oct 2017 22:21:01 -0400 Subject: [PATCH 23/38] Delay added --- or_32bit.v | 64 ++++++++++++++++++++++++++--------------------------- xor_32bit.v | 64 ++++++++++++++++++++++++++--------------------------- 2 files changed, 64 insertions(+), 64 deletions(-) diff --git a/or_32bit.v b/or_32bit.v index 83a217b..32a0ce2 100644 --- a/or_32bit.v +++ b/or_32bit.v @@ -3,36 +3,36 @@ module or_32bit input[31:0] a, input[31:0] b ); - or bit0(out[0], a[0], b[0]); - or bit1(out[1], a[1], b[1]); - or bit2(out[2], a[2], b[2]); - or bit3(out[3], a[3], b[3]); - or bit4(out[4], a[4], b[4]); - or bit5(out[5], a[5], b[5]); - or bit6(out[6], a[6], b[6]); - or bit7(out[7], a[7], b[7]); - or bit8(out[8], a[8], b[8]); - or bit9(out[9], a[9], b[9]); - or bit10(out[10], a[10], b[10]); - or bit11(out[11], a[11], b[11]); - or bit12(out[12], a[12], b[12]); - or bit13(out[13], a[13], b[13]); - or bit14(out[14], a[14], b[14]); - or bit15(out[15], a[15], b[15]); - or bit16(out[16], a[16], b[16]); - or bit17(out[17], a[17], b[17]); - or bit18(out[18], a[18], b[18]); - or bit19(out[19], a[19], b[19]); - or bit20(out[20], a[20], b[20]); - or bit21(out[21], a[21], b[21]); - or bit22(out[22], a[22], b[22]); - or bit23(out[23], a[23], b[23]); - or bit24(out[24], a[24], b[24]); - or bit25(out[25], a[25], b[25]); - or bit26(out[26], a[26], b[26]); - or bit27(out[27], a[27], b[27]); - or bit28(out[28], a[28], b[28]); - or bit29(out[29], a[29], b[29]); - or bit30(out[30], a[30], b[30]); - or bit31(out[31], a[31], b[31]); + or #10 bit0(out[0], a[0], b[0]); + or #10 bit1(out[1], a[1], b[1]); + or #10 bit2(out[2], a[2], b[2]); + or #10 bit3(out[3], a[3], b[3]); + or #10 bit4(out[4], a[4], b[4]); + or #10 bit5(out[5], a[5], b[5]); + or #10 bit6(out[6], a[6], b[6]); + or #10 bit7(out[7], a[7], b[7]); + or #10 bit8(out[8], a[8], b[8]); + or #10 bit9(out[9], a[9], b[9]); + or #10 bit10(out[10], a[10], b[10]); + or #10 bit11(out[11], a[11], b[11]); + or #10 bit12(out[12], a[12], b[12]); + or #10 bit13(out[13], a[13], b[13]); + or #10 bit14(out[14], a[14], b[14]); + or #10 bit15(out[15], a[15], b[15]); + or #10 bit16(out[16], a[16], b[16]); + or #10 bit17(out[17], a[17], b[17]); + or #10 bit18(out[18], a[18], b[18]); + or #10 bit19(out[19], a[19], b[19]); + or #10 bit20(out[20], a[20], b[20]); + or #10 bit21(out[21], a[21], b[21]); + or #10 bit22(out[22], a[22], b[22]); + or #10 bit23(out[23], a[23], b[23]); + or #10 bit24(out[24], a[24], b[24]); + or #10 bit25(out[25], a[25], b[25]); + or #10 bit26(out[26], a[26], b[26]); + or #10 bit27(out[27], a[27], b[27]); + or #10 bit28(out[28], a[28], b[28]); + or #10 bit29(out[29], a[29], b[29]); + or #10 bit30(out[30], a[30], b[30]); + or #10 bit31(out[31], a[31], b[31]); endmodule \ No newline at end of file diff --git a/xor_32bit.v b/xor_32bit.v index 65db6b1..744b5f2 100644 --- a/xor_32bit.v +++ b/xor_32bit.v @@ -3,36 +3,36 @@ module xor_32bit input[31:0] a, input[31:0] b ); - xor bit0(out[0], a[0], b[0]); - xor bit1(out[1], a[1], b[1]); - xor bit2(out[2], a[2], b[2]); - xor bit3(out[3], a[3], b[3]); - xor bit4(out[4], a[4], b[4]); - xor bit5(out[5], a[5], b[5]); - xor bit6(out[6], a[6], b[6]); - xor bit7(out[7], a[7], b[7]); - xor bit8(out[8], a[8], b[8]); - xor bit9(out[9], a[9], b[9]); - xor bit10(out[10], a[10], b[10]); - xor bit11(out[11], a[11], b[11]); - xor bit12(out[12], a[12], b[12]); - xor bit13(out[13], a[13], b[13]); - xor bit14(out[14], a[14], b[14]); - xor bit15(out[15], a[15], b[15]); - xor bit16(out[16], a[16], b[16]); - xor bit17(out[17], a[17], b[17]); - xor bit18(out[18], a[18], b[18]); - xor bit19(out[19], a[19], b[19]); - xor bit20(out[20], a[20], b[20]); - xor bit21(out[21], a[21], b[21]); - xor bit22(out[22], a[22], b[22]); - xor bit23(out[23], a[23], b[23]); - xor bit24(out[24], a[24], b[24]); - xor bit25(out[25], a[25], b[25]); - xor bit26(out[26], a[26], b[26]); - xor bit27(out[27], a[27], b[27]); - xor bit28(out[28], a[28], b[28]); - xor bit29(out[29], a[29], b[29]); - xor bit30(out[30], a[30], b[30]); - xor bit31(out[31], a[31], b[31]); + xor #10 bit0(out[0], a[0], b[0]); + xor #10 bit1(out[1], a[1], b[1]); + xor #10 bit2(out[2], a[2], b[2]); + xor #10 bit3(out[3], a[3], b[3]); + xor #10 bit4(out[4], a[4], b[4]); + xor #10 bit5(out[5], a[5], b[5]); + xor #10 bit6(out[6], a[6], b[6]); + xor #10 bit7(out[7], a[7], b[7]); + xor #10 bit8(out[8], a[8], b[8]); + xor #10 bit9(out[9], a[9], b[9]); + xor #10 bit10(out[10], a[10], b[10]); + xor #10 bit11(out[11], a[11], b[11]); + xor #10 bit12(out[12], a[12], b[12]); + xor #10 bit13(out[13], a[13], b[13]); + xor #10 bit14(out[14], a[14], b[14]); + xor #10 bit15(out[15], a[15], b[15]); + xor #10 bit16(out[16], a[16], b[16]); + xor #10 bit17(out[17], a[17], b[17]); + xor #10 bit18(out[18], a[18], b[18]); + xor #10 bit19(out[19], a[19], b[19]); + xor #10 bit20(out[20], a[20], b[20]); + xor #10 bit21(out[21], a[21], b[21]); + xor #10 bit22(out[22], a[22], b[22]); + xor #10 bit23(out[23], a[23], b[23]); + xor #10 bit24(out[24], a[24], b[24]); + xor #10 bit25(out[25], a[25], b[25]); + xor #10 bit26(out[26], a[26], b[26]); + xor #10 bit27(out[27], a[27], b[27]); + xor #10 bit28(out[28], a[28], b[28]); + xor #10 bit29(out[29], a[29], b[29]); + xor #10 bit30(out[30], a[30], b[30]); + xor #10 bit31(out[31], a[31], b[31]); endmodule From 42fb7e5d9cc808fe0f0295d0c6b8db34dd80a758 Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Tue, 10 Oct 2017 22:47:06 -0400 Subject: [PATCH 24/38] Reconfigured test definitions --- or_32bit.t.v | 30 ++++++++++++------------------ 1 file changed, 12 insertions(+), 18 deletions(-) diff --git a/or_32bit.t.v b/or_32bit.t.v index 5371849..bb19ef6 100644 --- a/or_32bit.t.v +++ b/or_32bit.t.v @@ -9,28 +9,22 @@ module test32bitor(); or_32bit or32(ans, a[31:0], b[31:0]); initial begin - // 00000000000000000000000000000000 00000000000000000000000000000000 - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + a=32'b00000000000000000000000000000000; b=32'b00000000000000000000000000000000; #5000 + $display("%b %b | %b", a, b, ans); - // 00000000000000000000000000000001 00000000000000000000000000000001 - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + a=32'b00000000000000000000000000000001; b=32'b00000000000000000000000000000001; #5000 + $display("%b %b | %b", a, b, ans); - // 00000000000000000000000000000010 00000000000000000000000000000001 - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=1;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + a=32'b00000000000000000000000000000010; b=32'b00000000000000000000000000000001; #5000 + $display("%b %b | %b", a, b, ans); - // 00000000000000000000000000000000 00000000000000000000000000000001 - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + a=32'b00000000000000000000000000000000; b=32'b00000000000000000000000000000001; #5000 + $display("%b %b | %b", a, b, ans); - // 11000000000000000000000000000000 10000000000000000000000000000001 - a[31]=1;a[30]=1;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + a=32'b11000000000000000000000000000000; b=32'b10000000000000000000000000000001; #5000 + $display("%b %b | %b", a, b, ans); - // 10000000000000000000000000000000 11000000000000000000000000000001 - a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 - $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + a=32'b10000000000000000000000000000000; b=32'b11000000000000000000000000000001; #5000 + $display("%b %b | %b", a, b, ans); end endmodule \ No newline at end of file From 8b1bf8d791b7f0889e140f05cb6292b007f5395c Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Tue, 10 Oct 2017 23:14:17 -0400 Subject: [PATCH 25/38] initial alu test file --- alu.t.v | 223 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 223 insertions(+) create mode 100644 alu.t.v diff --git a/alu.t.v b/alu.t.v new file mode 100644 index 0000000..4fb065d --- /dev/null +++ b/alu.t.v @@ -0,0 +1,223 @@ +`timescale 1 ns / 1 ps +`include "alu.v" + +module testALU32bit(); + reg[31:0] a; + reg[31:0] b; + reg[2:0] ALUcommand; + wire[31:0] finalALUsig; + wire flag; + wire cout; + + ALUcontrolLUT alu(cout, flag, finalALUsig, ALUcommand, a, b); + initial begin + $display("ALU Command Input A Input B | Output Flag Carryout"; + //Test cases add + ALUcommand = 3'b000; + + // 0 + 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 1 + 1 + a = 32'b00000000000000000000000000000001; + b = 32'b00000000000000000000000000000001; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // positive overflow + a = 32'b01111111111111111111111111111111; + b = 32'b01111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // negative overflow + a = 32'b10000000000000000000000000000001; + b = 32'b10000000000000000000000000000001; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // carryout + a = 32'b11111111111111111111111111111111; + b = 32'b00000000000000000000000000000001; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //Test cases sub + ALUcommand = 3'b001; + + // a=b=0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a=b + a = 32'b00000000000000000000000000000001; + b = 32'b00000000000000000000000000000001; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a>b, both positive + a = 32'b00000000000000000000000000000111; + b = 32'b00000000000000000000000000000101; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a|b|, both negative + a = 32'b11111111111111111111111111111101; + b = 32'b11111111111111111111111111111110; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // |a|<|b|, both negative + a = 32'b111111111111111111111111111111110; + b = 32'b111111111111111111111111111111000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a negative, b positive, no overflow + a = 32'b11111111111111111111111111111101; + b = 32'b00000000000000000000000000000101; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a negative, b positive, overflow + a = 32'b10000000000000000000000000000101; + b = 32'b01111100000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a positive, b negative, no overflow + a = 32'b00000000000000000000000000000101; + b = 32'b11111111111111111111111111110111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a positive, b negative, overflow + a = 32'b01111111111111111111101111111111; + b = 32'b10000000000000001100000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //Test cases xor + ALUcommand = 3'b010; + + //a is all 0's + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + + //b is all 0's + b = 32'b00000000000000000000000000000000; + a = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //a and b are all 0's + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //a and b are all 1's + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + + //Test cases slt + ALUcommand = 3'b011; + + //a>b, all positive + a = 32'b00000000000000000000000000000010; + b = 32'b00000000000000000000000000000001; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //ab, all negative + a = 32'b10000000000000000000000000000001; + b = 32'b10000000000000000000000000000010; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //ab, a positive, b negative + a = 32'b00000000000000000000000000000001; + b = 32'b10000000000000000000000000000010; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //a>b, a positive, b negative + a = 32'b00000000000000000000000000000001; + b = 32'b10000000000000000000000000000001; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + + //Test cases and + ALUcommand = 3'b100; + // 0 and 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 0 and 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 1 and 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //Test cases nand + ALUcommand = 3'b101; + // 0 nand 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 0 nand 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 1 nand 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //Test cases nor + ALUcommand = 3'b110; + // 0 nor 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 0 nor 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 1 nor 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //Test cases or + ALUcommand = 3'b111; + // 0 or 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 0 or 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // 1 or 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + end + end module \ No newline at end of file From 52997303302b1313a6b2a4e3bff16808b398a7e4 Mon Sep 17 00:00:00 2001 From: apan64 Date: Wed, 11 Oct 2017 17:58:48 -0400 Subject: [PATCH 26/38] delays and stuff --- alu.t.v | 117 +++++++++++++++++++++++++++++++++++++------------------- 1 file changed, 77 insertions(+), 40 deletions(-) diff --git a/alu.t.v b/alu.t.v index 4fb065d..9060c3e 100644 --- a/alu.t.v +++ b/alu.t.v @@ -11,34 +11,39 @@ module testALU32bit(); ALUcontrolLUT alu(cout, flag, finalALUsig, ALUcommand, a, b); initial begin - $display("ALU Command Input A Input B | Output Flag Carryout"; + $display("ALU Command Input A Input B | Output Flag Carryout"); //Test cases add ALUcommand = 3'b000; // 0 + 0 a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 1 + 1 a = 32'b00000000000000000000000000000001; b = 32'b00000000000000000000000000000001; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // positive overflow a = 32'b01111111111111111111111111111111; b = 32'b01111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // negative overflow a = 32'b10000000000000000000000000000001; b = 32'b10000000000000000000000000000001; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // carryout a = 32'b11111111111111111111111111111111; b = 32'b00000000000000000000000000000001; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases sub ALUcommand = 3'b001; @@ -46,52 +51,62 @@ module testALU32bit(); // a=b=0 a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a=b a = 32'b00000000000000000000000000000001; b = 32'b00000000000000000000000000000001; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a>b, both positive a = 32'b00000000000000000000000000000111; b = 32'b00000000000000000000000000000101; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a|b|, both negative a = 32'b11111111111111111111111111111101; b = 32'b11111111111111111111111111111110; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // |a|<|b|, both negative a = 32'b111111111111111111111111111111110; b = 32'b111111111111111111111111111111000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a negative, b positive, no overflow a = 32'b11111111111111111111111111111101; b = 32'b00000000000000000000000000000101; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a negative, b positive, overflow a = 32'b10000000000000000000000000000101; b = 32'b01111100000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a positive, b negative, no overflow a = 32'b00000000000000000000000000000101; b = 32'b11111111111111111111111111110111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // a positive, b negative, overflow a = 32'b01111111111111111111101111111111; b = 32'b10000000000000001100000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases xor ALUcommand = 3'b010; @@ -99,23 +114,27 @@ module testALU32bit(); //a is all 0's a = 32'b00000000000000000000000000000000; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //b is all 0's b = 32'b00000000000000000000000000000000; a = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //a and b are all 0's a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //a and b are all 1's a = 32'b11111111111111111111111111111111; - b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases slt @@ -124,32 +143,38 @@ module testALU32bit(); //a>b, all positive a = 32'b00000000000000000000000000000010; b = 32'b00000000000000000000000000000001; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //ab, all negative a = 32'b10000000000000000000000000000001; b = 32'b10000000000000000000000000000010; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //ab, a positive, b negative a = 32'b00000000000000000000000000000001; b = 32'b10000000000000000000000000000010; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //a>b, a positive, b negative a = 32'b00000000000000000000000000000001; b = 32'b10000000000000000000000000000001; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases and @@ -157,67 +182,79 @@ module testALU32bit(); // 0 and 0 a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 0 and 1 a = 32'b00000000000000000000000000000000; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 1 and 1 a = 32'b11111111111111111111111111111111; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases nand ALUcommand = 3'b101; // 0 nand 0 a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 0 nand 1 a = 32'b00000000000000000000000000000000; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 1 nand 1 a = 32'b11111111111111111111111111111111; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases nor ALUcommand = 3'b110; // 0 nor 0 a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 0 nor 1 a = 32'b00000000000000000000000000000000; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 1 nor 1 a = 32'b11111111111111111111111111111111; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); //Test cases or ALUcommand = 3'b111; // 0 or 0 a = 32'b00000000000000000000000000000000; b = 32'b00000000000000000000000000000000; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 0 or 1 a = 32'b00000000000000000000000000000000; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // 1 or 1 a = 32'b11111111111111111111111111111111; b = 32'b11111111111111111111111111111111; - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); end - end module \ No newline at end of file + endmodule \ No newline at end of file From b2f0059d15c68c95d3c7dadc77f795cc8435d2fd Mon Sep 17 00:00:00 2001 From: apan64 Date: Wed, 11 Oct 2017 18:11:00 -0400 Subject: [PATCH 27/38] fixed slt --- slt.t.v | 10 ++++++++++ slt.v | 26 ++++++++++++++++++++++---- 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/slt.t.v b/slt.t.v index 827c24a..b5415f9 100644 --- a/slt.t.v +++ b/slt.t.v @@ -26,5 +26,15 @@ module test32bitslt(); a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=1;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; #5000 $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + a = 32'b00000000000000000000000000001111; + b = 32'b11111111111111111111111111110000; + #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); + + a = 32'b11111111111111111111111111110000; + b = 32'b00000000000000000000000000001111; + #5000 + $display("%b %b | %b", a[31:0], b[31:0], ans[31:0]); end endmodule \ No newline at end of file diff --git a/slt.v b/slt.v index 8d5c670..8fc6fc3 100644 --- a/slt.v +++ b/slt.v @@ -6,14 +6,32 @@ module single_slt input defaultCompare ); wire abxor; - wire axorand; + wire bxorand; wire xornot; wire xornotand; xor #10 axb(abxor, a, b); - and #10 aaxb(axorand, a, abxor); + and #10 baxb(bxorand, b, abxor); not #10 invxor(xornot, abxor); and #10 xorandinput(xornotand, xornot, defaultCompare); - or #10 compare(out, axorand, xornotand); + or #10 compare(out, bxorand, xornotand); +endmodule + +module single_slt_reversed + ( + output out, + input a, + input b, + input defaultCompare + ); + wire abxor; + wire axorand; + wire xornot; + wire xornotand; + xor #10 axb(abxor, a, b); + and #10 aaxb(axorand, a, abxor); + not #10 invxor(xornot, abxor); + and #10 xorandinput(xornotand, xornot, defaultCompare); + or #10 compare(out, axorand, xornotand); endmodule module full_slt_32bit @@ -84,5 +102,5 @@ module full_slt_32bit single_slt bit28(slt28, a[28], b[28], slt27); single_slt bit29(slt29, a[29], b[29], slt28); single_slt bit30(slt30, a[30], b[30], slt29); - single_slt bit31(out, a[31], b[31], slt30); + single_slt_reversed bit31(out, a[31], b[31], slt30); endmodule \ No newline at end of file From 54fc47af777f567787c552bf1317c9e2d05e3fd4 Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Wed, 11 Oct 2017 18:13:47 -0400 Subject: [PATCH 28/38] Cleaned up test file --- adder_subtracter.t.v | 37 +++++++++++++++++++++++++------------ 1 file changed, 25 insertions(+), 12 deletions(-) diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v index 6e955df..c409717 100644 --- a/adder_subtracter.t.v +++ b/adder_subtracter.t.v @@ -13,26 +13,39 @@ module test32bitAdder(); adder_subtracter adder0(ans[31:0], carryout, overflow, a[31:0], b[31:0], carryin[2:0]); initial begin - - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + a=32'b00000000000000000000000000000001; + b=32'b00000000000000000000000000000001; + carryin=3'b001; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=1;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + a=32'b00000000000000000000000000000001; + b=32'b00000000000000000000000000000001; + carryin=3'b100; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=1;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=0;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=1;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + a=32'b00000000001000000000000000000000; + b=32'b00000000000000000000000010000000; + carryin=3'b001; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=1;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=1;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=1;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=1;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=0; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + a=32'b10000000001000010000000000000000; + b=32'b10000000000000010000000010000000; + carryin=3'b001; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 + a=32'b10000000000000000000000000000001; + b=32'b10000000000000000000000000000001; + carryin=3'b001; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - a[31]=0;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=0; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=1;carryin[1]=0;carryin[2]=0; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + a=32'b00000000000000000000000000000000; + b=32'b10000000000000000000000000000001; + carryin=3'b001; #5000 + $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); - a[31]=1;a[30]=0;a[29]=0;a[28]=0;a[27]=0;a[26]=0;a[25]=0;a[24]=0;a[23]=0;a[22]=0;a[21]=0;a[20]=0;a[19]=0;a[18]=0;a[17]=0;a[16]=0;a[15]=0;a[14]=0;a[13]=0;a[12]=0;a[11]=0;a[10]=0;a[9]=0;a[8]=0;a[7]=0;a[6]=0;a[5]=0;a[4]=0;a[3]=0;a[2]=0;a[1]=0;a[0]=1; b[31]=1;b[30]=0;b[29]=0;b[28]=0;b[27]=0;b[26]=0;b[25]=0;b[24]=0;b[23]=0;b[22]=0;b[21]=0;b[20]=0;b[19]=0;b[18]=0;b[17]=0;b[16]=0;b[15]=0;b[14]=0;b[13]=0;b[12]=0;b[11]=0;b[10]=0;b[9]=0;b[8]=0;b[7]=0;b[6]=0;b[5]=0;b[4]=0;b[3]=0;b[2]=0;b[1]=0;b[0]=1; carryin[0]=0;carryin[1]=0;carryin[2]=0; #5000 + a=32'b10000000000000000000000000000001; + b=32'b10000000000000000000000000000001; + carryin=3'b000; #5000 $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); end endmodule \ No newline at end of file From 717565a775307570cc8ef695ac332eadd4348111 Mon Sep 17 00:00:00 2001 From: apan64 Date: Wed, 11 Oct 2017 18:23:03 -0400 Subject: [PATCH 29/38] switched to switch statement in alu.t.v --- alu.v | 26 ++++++++++---------------- 1 file changed, 10 insertions(+), 16 deletions(-) diff --git a/alu.v b/alu.v index 65e9b3e..7e004b6 100644 --- a/alu.v +++ b/alu.v @@ -39,21 +39,15 @@ or_32bit or0(orin[31:0],a[31:0],b[31:0]); always @(ALUcommand) begin - if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) - finalsignal[31:0]=addsub[31:0]; - if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) - finalsignal[31:0]=addsub[31:0]; - if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==0) - finalsignal[31:0]=xorin[31:0]; - if(ALUcommand[0]==1 && ALUcommand[1]==1 && ALUcommand[2]==0) - finalsignal[31:0]=slt[31:0]; - if(ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==1) - finalsignal[31:0]=andin[31:0]; - if(ALUcommand[0]==1 && ALUcommand[1]==0 && ALUcommand[2]==1) - finalsignal[31:0]=nandin[31:0]; - if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==1) - finalsignal[31:0]=norin[31:0]; - else - finalsignal[31:0]=orin[31:0]; + case (ALUcommand) + 3'b000: begin finalsignal[31:0] = addsub[31:0]; end + 3'b001: begin finalsignal[31:0] = addsub[31:0]; end + 3'b010: begin finalsignal[31:0] = xorin[31:0]; end + 3'b011: begin finalsignal[31:0] = slt[31:0]; end + 3'b100: begin finalsignal[31:0] = andin[31:0]; end + 3'b101: begin finalsignal[31:0] = nandin[31:0]; end + 3'b110: begin finalsignal[31:0] = norin[31:0]; end + 3'b111: begin finalsignal[31:0] = orin[31:0]; end + endcase end endmodule From 531eb87471ca16a887db74dab08b94e35f79dbee Mon Sep 17 00:00:00 2001 From: apan64 Date: Wed, 11 Oct 2017 18:30:22 -0400 Subject: [PATCH 30/38] cout and flag only nonzero for adder_subtracter --- alu.v | 24 +++++++++++++----------- 1 file changed, 13 insertions(+), 11 deletions(-) diff --git a/alu.v b/alu.v index 7e004b6..65dc490 100644 --- a/alu.v +++ b/alu.v @@ -10,8 +10,8 @@ module ALUcontrolLUT ( - output cout, //addsub only - output flag, //addsub only + output reg cout, //addsub only + output reg flag, //addsub only output reg[31:0] finalsignal, input [2:0]ALUcommand, input [31:0]a, @@ -27,8 +27,10 @@ wire [31:0]andin; wire [31:0]nandin; wire [31:0]norin; wire [31:0]orin; +wire adder_cout; +wire adder_flag; -adder_subtracter addsub0(addsub[31:0],cout,flag,a[31:0],b[31:0],ALUcommand[2:0]); +adder_subtracter addsub0(addsub[31:0],adder_cout,adder_flag,a[31:0],b[31:0],ALUcommand[2:0]); xor_32bit xor0(xorin[31:0],a[31:0],b[31:0]); full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); and_32bit and0(andin[31:0],a[31:0],b[31:0]); @@ -40,14 +42,14 @@ or_32bit or0(orin[31:0],a[31:0],b[31:0]); always @(ALUcommand) begin case (ALUcommand) - 3'b000: begin finalsignal[31:0] = addsub[31:0]; end - 3'b001: begin finalsignal[31:0] = addsub[31:0]; end - 3'b010: begin finalsignal[31:0] = xorin[31:0]; end - 3'b011: begin finalsignal[31:0] = slt[31:0]; end - 3'b100: begin finalsignal[31:0] = andin[31:0]; end - 3'b101: begin finalsignal[31:0] = nandin[31:0]; end - 3'b110: begin finalsignal[31:0] = norin[31:0]; end - 3'b111: begin finalsignal[31:0] = orin[31:0]; end + 3'b000: begin finalsignal[31:0] = addsub[31:0]; cout = adder_cout; flag = adder_flag; end + 3'b001: begin finalsignal[31:0] = addsub[31:0]; cout = adder_cout; flag = adder_flag; end + 3'b010: begin finalsignal[31:0] = xorin[31:0]; cout = 0; flag = 0; end + 3'b011: begin finalsignal[31:0] = slt[31:0]; cout = 0; flag = 0; end + 3'b100: begin finalsignal[31:0] = andin[31:0]; cout = 0; flag = 0; end + 3'b101: begin finalsignal[31:0] = nandin[31:0]; cout = 0; flag = 0; end + 3'b110: begin finalsignal[31:0] = norin[31:0]; cout = 0; flag = 0; end + 3'b111: begin finalsignal[31:0] = orin[31:0]; cout = 0; flag = 0; end endcase end endmodule From 24f38442149ed64110954db80ce54d5df66c3ac9 Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Wed, 11 Oct 2017 19:53:02 -0400 Subject: [PATCH 31/38] ALU test cases --- adder_subtracter.t.v | 27 +- alu.t.v | 595 ++++++++++++++++++++++++++----------------- alu.v | 3 +- 3 files changed, 377 insertions(+), 248 deletions(-) diff --git a/adder_subtracter.t.v b/adder_subtracter.t.v index c409717..e2c0aa1 100644 --- a/adder_subtracter.t.v +++ b/adder_subtracter.t.v @@ -13,39 +13,48 @@ module test32bitAdder(); adder_subtracter adder0(ans[31:0], carryout, overflow, a[31:0], b[31:0], carryin[2:0]); initial begin + $display("Input A Input B Command | Output Flag Carryout"); + + // Addition tests a=32'b00000000000000000000000000000001; b=32'b00000000000000000000000000000001; - carryin=3'b001; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + carryin=3'b100; #5000 + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + a=32'b10000000000000000000000000000001; + b=32'b10000000000000000000000000000001; + carryin=3'b000; #5000 + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + + // Subtraction Tests a=32'b00000000000000000000000000000001; b=32'b00000000000000000000000000000001; - carryin=3'b100; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + carryin=3'b001; #5000 + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); a=32'b00000000001000000000000000000000; b=32'b00000000000000000000000010000000; carryin=3'b001; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); a=32'b10000000001000010000000000000000; b=32'b10000000000000010000000010000000; carryin=3'b001; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); a=32'b10000000000000000000000000000001; b=32'b10000000000000000000000000000001; carryin=3'b001; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); a=32'b00000000000000000000000000000000; b=32'b10000000000000000000000000000001; carryin=3'b001; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); a=32'b10000000000000000000000000000001; b=32'b10000000000000000000000000000001; carryin=3'b000; #5000 - $display("%b %b %b | %b %b %b | ", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); + $display("%b %b %b | %b %b %b", a[31:0],b[31:0],carryin,ans[31:0],carryout, overflow); end endmodule \ No newline at end of file diff --git a/alu.t.v b/alu.t.v index 9060c3e..58755b3 100644 --- a/alu.t.v +++ b/alu.t.v @@ -8,253 +8,372 @@ module testALU32bit(); wire[31:0] finalALUsig; wire flag; wire cout; - + ALUcontrolLUT alu(cout, flag, finalALUsig, ALUcommand, a, b); initial begin - $display("ALU Command Input A Input B | Output Flag Carryout"); - //Test cases add - ALUcommand = 3'b000; - - // 0 + 0 - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 1 + 1 - a = 32'b00000000000000000000000000000001; - b = 32'b00000000000000000000000000000001; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // positive overflow - a = 32'b01111111111111111111111111111111; - b = 32'b01111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // negative overflow - a = 32'b10000000000000000000000000000001; - b = 32'b10000000000000000000000000000001; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // carryout - a = 32'b11111111111111111111111111111111; - b = 32'b00000000000000000000000000000001; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //Test cases sub - ALUcommand = 3'b001; - - // a=b=0 - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // a=b - a = 32'b00000000000000000000000000000001; - b = 32'b00000000000000000000000000000001; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + $display("ALU Command Input A Input B | Output Flag Carryout"); + //Test cases add + ALUcommand = 3'b000; + + // 0 + 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - // a>b, both positive - a = 32'b00000000000000000000000000000111; - b = 32'b00000000000000000000000000000101; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // a|b|, both negative - a = 32'b11111111111111111111111111111101; - b = 32'b11111111111111111111111111111110; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // 1 + 1 + a = 32'b00000000000000000000000000000001; + b = 32'b00000000000000000000000000000001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // positive overflow + a = 32'b01111111111111111111111111111111; + b = 32'b01111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // negative overflow + a = 32'b10000000000000000000000000000001; + b = 32'b10000000000000000000000000000001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - // |a|<|b|, both negative - a = 32'b111111111111111111111111111111110; - b = 32'b111111111111111111111111111111000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // a negative, b positive, no overflow - a = 32'b11111111111111111111111111111101; - b = 32'b00000000000000000000000000000101; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // carryout + a = 32'b11111111111111111111111111111111; + b = 32'b00000000000000000000000000000001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + //Test cases sub + ALUcommand = 3'b001; + + // a=b=0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a=b + a = 32'b00000000000000000000000000000001; + b = 32'b00000000000000000000000000000001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - // a negative, b positive, overflow - a = 32'b10000000000000000000000000000101; - b = 32'b01111100000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // a>b, both positive + a = 32'b00000000000000000000000000000111; + b = 32'b00000000000000000000000000000101; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - // a positive, b negative, no overflow - a = 32'b00000000000000000000000000000101; - b = 32'b11111111111111111111111111110111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // a positive, b negative, overflow - a = 32'b01111111111111111111101111111111; - b = 32'b10000000000000001100000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // a|b|, both negative + a = 32'b11111111111111111111111111111101; + b = 32'b11111111111111111111111111111110; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // |a|<|b|, both negative + a = 32'b111111111111111111111111111111110; + b = 32'b111111111111111111111111111111000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a negative, b positive, no overflow + a = 32'b11111111111111111111111111111101; + b = 32'b00000000000000000000000000000101; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - //Test cases xor - ALUcommand = 3'b010; - - //a is all 0's - a = 32'b00000000000000000000000000000000; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - - //b is all 0's - b = 32'b00000000000000000000000000000000; - a = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //a and b are all 0's - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // a negative, b positive, overflow + a = 32'b10000000000000000000000000000101; + b = 32'b01111100000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // a positive, b negative, no overflow + a = 32'b00000000000000000000000000000101; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000110) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end - //a and b are all 1's - a = 32'b11111111111111111111111111111111; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // a positive, b negative, overflow + a = 32'b01111111111111111111101111111111; + b = 32'b10000000000000001100000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((flag != 1)) begin + $display("Test Case Failed"); + end - - //Test cases slt - ALUcommand = 3'b011; - - //a>b, all positive - a = 32'b00000000000000000000000000000010; - b = 32'b00000000000000000000000000000001; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //ab, all negative - a = 32'b10000000000000000000000000000001; - b = 32'b10000000000000000000000000000010; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //ab, a positive, b negative - a = 32'b00000000000000000000000000000001; - b = 32'b10000000000000000000000000000010; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //b is all 0's + b = 32'b00000000000000000000000000000000; + a = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //a and b are all 0's + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end - //a>b, a positive, b negative - a = 32'b00000000000000000000000000000001; - b = 32'b10000000000000000000000000000001; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - - //Test cases and - ALUcommand = 3'b100; - // 0 and 0 - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 0 and 1 - a = 32'b00000000000000000000000000000000; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 1 and 1 - a = 32'b11111111111111111111111111111111; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //Test cases nand - ALUcommand = 3'b101; - // 0 nand 0 - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 0 nand 1 - a = 32'b00000000000000000000000000000000; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 1 nand 1 - a = 32'b11111111111111111111111111111111; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //Test cases nor - ALUcommand = 3'b110; - // 0 nor 0 - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 0 nor 1 - a = 32'b00000000000000000000000000000000; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 1 nor 1 - a = 32'b11111111111111111111111111111111; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - //Test cases or - ALUcommand = 3'b111; - // 0 or 0 - a = 32'b00000000000000000000000000000000; - b = 32'b00000000000000000000000000000000; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - - // 0 or 1 - a = 32'b00000000000000000000000000000000; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + //a and b are all 1's + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + + //Test cases slt + ALUcommand = 3'b011; + + //a>b, all positive + a = 32'b00000000000000000000000000000010; + b = 32'b00000000000000000000000000000001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end - // 1 or 1 - a = 32'b11111111111111111111111111111111; - b = 32'b11111111111111111111111111111111; - #25000 - $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - end - endmodule \ No newline at end of file + //ab, all negative + a = 32'b10000000000000000000000000000001; + b = 32'b10000000000000000000000000000010; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //ab, a positive, b negative + a = 32'b00000000000000000000000000000001; + b = 32'b10000000000000000000000000000010; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //a>b, a positive, b negative + a = 32'b00000000000000000000000000000001; + b = 32'b10000000000000000000000000000001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //Test cases and + ALUcommand = 3'b100; + // 0 and 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 0 and 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 1 and 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //Test cases nand + ALUcommand = 3'b101; + // 0 nand 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 0 nand 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 1 nand 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //Test cases nor + ALUcommand = 3'b110; + // 0 nor 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 0 nor 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 1 nor 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + //Test cases or + ALUcommand = 3'b111; + // 0 or 0 + a = 32'b00000000000000000000000000000000; + b = 32'b00000000000000000000000000000000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 0 or 1 + a = 32'b00000000000000000000000000000000; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // 1 or 1 + a = 32'b11111111111111111111111111111111; + b = 32'b11111111111111111111111111111111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + end +endmodule \ No newline at end of file diff --git a/alu.v b/alu.v index 65dc490..0e4754a 100644 --- a/alu.v +++ b/alu.v @@ -39,8 +39,9 @@ nor_32bit nor0(norin[31:0],a[31:0],b[31:0]); or_32bit or0(orin[31:0],a[31:0],b[31:0]); - always @(ALUcommand) + always @(ALUcommand or a or b) begin + #5000 case (ALUcommand) 3'b000: begin finalsignal[31:0] = addsub[31:0]; cout = adder_cout; flag = adder_flag; end 3'b001: begin finalsignal[31:0] = addsub[31:0]; cout = adder_cout; flag = adder_flag; end From ec2358bb340d792a256cac6508788d52636951ed Mon Sep 17 00:00:00 2001 From: apan64 Date: Wed, 11 Oct 2017 19:53:25 -0400 Subject: [PATCH 32/38] fixed alu, changed some test cases --- alu.t.v | 12 ++++++------ alu.v | 3 ++- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/alu.t.v b/alu.t.v index 9060c3e..ec8676d 100644 --- a/alu.t.v +++ b/alu.t.v @@ -9,7 +9,7 @@ module testALU32bit(); wire flag; wire cout; - ALUcontrolLUT alu(cout, flag, finalALUsig, ALUcommand, a, b); + ALUcontrolLUT alu(cout, flag, finalALUsig[31:0], ALUcommand[2:0], a[31:0], b[31:0]); initial begin $display("ALU Command Input A Input B | Output Flag Carryout"); //Test cases add @@ -152,13 +152,13 @@ module testALU32bit(); #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - //a>b, all negative + //ab, all negative a = 32'b10000000000000000000000000000010; b = 32'b10000000000000000000000000000001; #25000 @@ -170,9 +170,9 @@ module testALU32bit(); #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - //a>b, a positive, b negative - a = 32'b00000000000000000000000000000001; - b = 32'b10000000000000000000000000000001; + //a Date: Wed, 11 Oct 2017 19:58:31 -0400 Subject: [PATCH 33/38] Delays Fixed --- adder_subtracter.v | 192 ++++++++++++++++++++++----------------------- and_32bit.v | 64 +++++++-------- or_32bit.v | 64 +++++++-------- slt.v | 12 +-- 4 files changed, 166 insertions(+), 166 deletions(-) diff --git a/adder_subtracter.v b/adder_subtracter.v index 44aaf35..694bddc 100644 --- a/adder_subtracter.v +++ b/adder_subtracter.v @@ -74,103 +74,103 @@ module mux wire in131addr; not #10 inv(invaddr, address); - and #10 and00(in00addr, in0[0], invaddr); - and #10 and01(in01addr, in0[1], invaddr); - and #10 and02(in02addr, in0[2], invaddr); - and #10 and03(in03addr, in0[3], invaddr); - and #10 and04(in04addr, in0[4], invaddr); - and #10 and05(in05addr, in0[5], invaddr); - and #10 and06(in06addr, in0[6], invaddr); - and #10 and07(in07addr, in0[7], invaddr); - and #10 and08(in08addr, in0[8], invaddr); - and #10 and09(in09addr, in0[9], invaddr); - and #10 and010(in010addr, in0[10], invaddr); - and #10 and011(in011addr, in0[11], invaddr); - and #10 and012(in012addr, in0[12], invaddr); - and #10 and013(in013addr, in0[13], invaddr); - and #10 and014(in014addr, in0[14], invaddr); - and #10 and015(in015addr, in0[15], invaddr); - and #10 and016(in016addr, in0[16], invaddr); - and #10 and017(in017addr, in0[17], invaddr); - and #10 and018(in018addr, in0[18], invaddr); - and #10 and019(in019addr, in0[19], invaddr); - and #10 and020(in020addr, in0[20], invaddr); - and #10 and021(in021addr, in0[21], invaddr); - and #10 and022(in022addr, in0[22], invaddr); - and #10 and023(in023addr, in0[23], invaddr); - and #10 and024(in024addr, in0[24], invaddr); - and #10 and025(in025addr, in0[25], invaddr); - and #10 and026(in026addr, in0[26], invaddr); - and #10 and027(in027addr, in0[27], invaddr); - and #10 and028(in028addr, in0[28], invaddr); - and #10 and029(in029addr, in0[29], invaddr); - and #10 and030(in030addr, in0[30], invaddr); - and #10 and031(in031addr, in0[31], invaddr); - and #10 and10(in10addr, in1[0], address); - and #10 and11(in11addr, in1[1], address); - and #10 and12(in12addr, in1[2], address); - and #10 and13(in13addr, in1[3], address); - and #10 and14(in14addr, in1[4], address); - and #10 and15(in15addr, in1[5], address); - and #10 and16(in16addr, in1[6], address); - and #10 and17(in17addr, in1[7], address); - and #10 and18(in18addr, in1[8], address); - and #10 and19(in19addr, in1[9], address); - and #10 and110(in110addr, in1[10], address); - and #10 and111(in111addr, in1[11], address); - and #10 and112(in112addr, in1[12], address); - and #10 and113(in113addr, in1[13], address); - and #10 and114(in114addr, in1[14], address); - and #10 and115(in115addr, in1[15], address); - and #10 and116(in116addr, in1[16], address); - and #10 and117(in117addr, in1[17], address); - and #10 and118(in118addr, in1[18], address); - and #10 and119(in119addr, in1[19], address); - and #10 and120(in120addr, in1[20], address); - and #10 and121(in121addr, in1[21], address); - and #10 and122(in122addr, in1[22], address); - and #10 and123(in123addr, in1[23], address); - and #10 and124(in124addr, in1[24], address); - and #10 and125(in125addr, in1[25], address); - and #10 and126(in126addr, in1[26], address); - and #10 and127(in127addr, in1[27], address); - and #10 and128(in128addr, in1[28], address); - and #10 and129(in129addr, in1[29], address); - and #10 and130(in130addr, in1[30], address); - and #10 and131(in131addr, in1[31], address); + and #20 and00(in00addr, in0[0], invaddr); + and #20 and01(in01addr, in0[1], invaddr); + and #20 and02(in02addr, in0[2], invaddr); + and #20 and03(in03addr, in0[3], invaddr); + and #20 and04(in04addr, in0[4], invaddr); + and #20 and05(in05addr, in0[5], invaddr); + and #20 and06(in06addr, in0[6], invaddr); + and #20 and07(in07addr, in0[7], invaddr); + and #20 and08(in08addr, in0[8], invaddr); + and #20 and09(in09addr, in0[9], invaddr); + and #20 and010(in010addr, in0[10], invaddr); + and #20 and011(in011addr, in0[11], invaddr); + and #20 and012(in012addr, in0[12], invaddr); + and #20 and013(in013addr, in0[13], invaddr); + and #20 and014(in014addr, in0[14], invaddr); + and #20 and015(in015addr, in0[15], invaddr); + and #20 and016(in016addr, in0[16], invaddr); + and #20 and017(in017addr, in0[17], invaddr); + and #20 and018(in018addr, in0[18], invaddr); + and #20 and019(in019addr, in0[19], invaddr); + and #20 and020(in020addr, in0[20], invaddr); + and #20 and021(in021addr, in0[21], invaddr); + and #20 and022(in022addr, in0[22], invaddr); + and #20 and023(in023addr, in0[23], invaddr); + and #20 and024(in024addr, in0[24], invaddr); + and #20 and025(in025addr, in0[25], invaddr); + and #20 and026(in026addr, in0[26], invaddr); + and #20 and027(in027addr, in0[27], invaddr); + and #20 and028(in028addr, in0[28], invaddr); + and #20 and029(in029addr, in0[29], invaddr); + and #20 and030(in030addr, in0[30], invaddr); + and #20 and031(in031addr, in0[31], invaddr); + and #20 and10(in10addr, in1[0], address); + and #20 and11(in11addr, in1[1], address); + and #20 and12(in12addr, in1[2], address); + and #20 and13(in13addr, in1[3], address); + and #20 and14(in14addr, in1[4], address); + and #20 and15(in15addr, in1[5], address); + and #20 and16(in16addr, in1[6], address); + and #20 and17(in17addr, in1[7], address); + and #20 and18(in18addr, in1[8], address); + and #20 and19(in19addr, in1[9], address); + and #20 and110(in110addr, in1[10], address); + and #20 and111(in111addr, in1[11], address); + and #20 and112(in112addr, in1[12], address); + and #20 and113(in113addr, in1[13], address); + and #20 and114(in114addr, in1[14], address); + and #20 and115(in115addr, in1[15], address); + and #20 and116(in116addr, in1[16], address); + and #20 and117(in117addr, in1[17], address); + and #20 and118(in118addr, in1[18], address); + and #20 and119(in119addr, in1[19], address); + and #20 and120(in120addr, in1[20], address); + and #20 and121(in121addr, in1[21], address); + and #20 and122(in122addr, in1[22], address); + and #20 and123(in123addr, in1[23], address); + and #20 and124(in124addr, in1[24], address); + and #20 and125(in125addr, in1[25], address); + and #20 and126(in126addr, in1[26], address); + and #20 and127(in127addr, in1[27], address); + and #20 and128(in128addr, in1[28], address); + and #20 and129(in129addr, in1[29], address); + and #20 and130(in130addr, in1[30], address); + and #20 and131(in131addr, in1[31], address); - or #10 or0(out[0], in00addr, in10addr); - or #10 or1(out[1], in01addr, in11addr); - or #10 or2(out[2], in02addr, in12addr); - or #10 or3(out[3], in03addr, in13addr); - or #10 or4(out[4], in04addr, in14addr); - or #10 or5(out[5], in05addr, in15addr); - or #10 or6(out[6], in06addr, in16addr); - or #10 or7(out[7], in07addr, in17addr); - or #10 or8(out[8], in08addr, in18addr); - or #10 or9(out[9], in09addr, in19addr); - or #10 or10(out[10], in010addr, in110addr); - or #10 or11(out[11], in011addr, in111addr); - or #10 or12(out[12], in012addr, in112addr); - or #10 or13(out[13], in013addr, in113addr); - or #10 or14(out[14], in014addr, in114addr); - or #10 or15(out[15], in015addr, in115addr); - or #10 or16(out[16], in016addr, in116addr); - or #10 or17(out[17], in017addr, in117addr); - or #10 or18(out[18], in018addr, in118addr); - or #10 or19(out[19], in019addr, in119addr); - or #10 or20(out[20], in020addr, in120addr); - or #10 or21(out[21], in021addr, in121addr); - or #10 or22(out[22], in022addr, in122addr); - or #10 or23(out[23], in023addr, in123addr); - or #10 or24(out[24], in024addr, in124addr); - or #10 or25(out[25], in025addr, in125addr); - or #10 or26(out[26], in026addr, in126addr); - or #10 or27(out[27], in027addr, in127addr); - or #10 or28(out[28], in028addr, in128addr); - or #10 or29(out[29], in029addr, in129addr); - or #10 or30(out[30], in030addr, in130addr); - or #10 or31(out[31], in031addr, in131addr); + or #20 or0(out[0], in00addr, in10addr); + or #20 or1(out[1], in01addr, in11addr); + or #20 or2(out[2], in02addr, in12addr); + or #20 or3(out[3], in03addr, in13addr); + or #20 or4(out[4], in04addr, in14addr); + or #20 or5(out[5], in05addr, in15addr); + or #20 or6(out[6], in06addr, in16addr); + or #20 or7(out[7], in07addr, in17addr); + or #20 or8(out[8], in08addr, in18addr); + or #20 or9(out[9], in09addr, in19addr); + or #20 or10(out[10], in010addr, in110addr); + or #20 or11(out[11], in011addr, in111addr); + or #20 or12(out[12], in012addr, in112addr); + or #20 or13(out[13], in013addr, in113addr); + or #20 or14(out[14], in014addr, in114addr); + or #20 or15(out[15], in015addr, in115addr); + or #20 or16(out[16], in016addr, in116addr); + or #20 or17(out[17], in017addr, in117addr); + or #20 or18(out[18], in018addr, in118addr); + or #20 or19(out[19], in019addr, in119addr); + or #20 or20(out[20], in020addr, in120addr); + or #20 or21(out[21], in021addr, in121addr); + or #20 or22(out[22], in022addr, in122addr); + or #20 or23(out[23], in023addr, in123addr); + or #20 or24(out[24], in024addr, in124addr); + or #20 or25(out[25], in025addr, in125addr); + or #20 or26(out[26], in026addr, in126addr); + or #20 or27(out[27], in027addr, in127addr); + or #20 or28(out[28], in028addr, in128addr); + or #20 or29(out[29], in029addr, in129addr); + or #20 or30(out[30], in030addr, in130addr); + or #20 or31(out[31], in031addr, in131addr); endmodule module adder_subtracter diff --git a/and_32bit.v b/and_32bit.v index c321a78..1ec5c74 100644 --- a/and_32bit.v +++ b/and_32bit.v @@ -3,36 +3,36 @@ module and_32bit input[31:0] a, input[31:0] b ); - and #10 bit0(out[0], a[0], b[0]); - and #10 bit1(out[1], a[1], b[1]); - and #10 bit2(out[2], a[2], b[2]); - and #10 bit3(out[3], a[3], b[3]); - and #10 bit4(out[4], a[4], b[4]); - and #10 bit5(out[5], a[5], b[5]); - and #10 bit6(out[6], a[6], b[6]); - and #10 bit7(out[7], a[7], b[7]); - and #10 bit8(out[8], a[8], b[8]); - and #10 bit9(out[9], a[9], b[9]); - and #10 bit10(out[10], a[10], b[10]); - and #10 bit11(out[11], a[11], b[11]); - and #10 bit12(out[12], a[12], b[12]); - and #10 bit13(out[13], a[13], b[13]); - and #10 bit14(out[14], a[14], b[14]); - and #10 bit15(out[15], a[15], b[15]); - and #10 bit16(out[16], a[16], b[16]); - and #10 bit17(out[17], a[17], b[17]); - and #10 bit18(out[18], a[18], b[18]); - and #10 bit19(out[19], a[19], b[19]); - and #10 bit20(out[20], a[20], b[20]); - and #10 bit21(out[21], a[21], b[21]); - and #10 bit22(out[22], a[22], b[22]); - and #10 bit23(out[23], a[23], b[23]); - and #10 bit24(out[24], a[24], b[24]); - and #10 bit25(out[25], a[25], b[25]); - and #10 bit26(out[26], a[26], b[26]); - and #10 bit27(out[27], a[27], b[27]); - and #10 bit28(out[28], a[28], b[28]); - and #10 bit29(out[29], a[29], b[29]); - and #10 bit30(out[30], a[30], b[30]); - and #10 bit31(out[31], a[31], b[31]); + and #20 bit0(out[0], a[0], b[0]); + and #20 bit1(out[1], a[1], b[1]); + and #20 bit2(out[2], a[2], b[2]); + and #20 bit3(out[3], a[3], b[3]); + and #20 bit4(out[4], a[4], b[4]); + and #20 bit5(out[5], a[5], b[5]); + and #20 bit6(out[6], a[6], b[6]); + and #20 bit7(out[7], a[7], b[7]); + and #20 bit8(out[8], a[8], b[8]); + and #20 bit9(out[9], a[9], b[9]); + and #20 bit10(out[10], a[10], b[10]); + and #20 bit11(out[11], a[11], b[11]); + and #20 bit12(out[12], a[12], b[12]); + and #20 bit13(out[13], a[13], b[13]); + and #20 bit14(out[14], a[14], b[14]); + and #20 bit15(out[15], a[15], b[15]); + and #20 bit16(out[16], a[16], b[16]); + and #20 bit17(out[17], a[17], b[17]); + and #20 bit18(out[18], a[18], b[18]); + and #20 bit19(out[19], a[19], b[19]); + and #20 bit20(out[20], a[20], b[20]); + and #20 bit21(out[21], a[21], b[21]); + and #20 bit22(out[22], a[22], b[22]); + and #20 bit23(out[23], a[23], b[23]); + and #20 bit24(out[24], a[24], b[24]); + and #20 bit25(out[25], a[25], b[25]); + and #20 bit26(out[26], a[26], b[26]); + and #20 bit27(out[27], a[27], b[27]); + and #20 bit28(out[28], a[28], b[28]); + and #20 bit29(out[29], a[29], b[29]); + and #20 bit30(out[30], a[30], b[30]); + and #20 bit31(out[31], a[31], b[31]); endmodule diff --git a/or_32bit.v b/or_32bit.v index 32a0ce2..e3d6826 100644 --- a/or_32bit.v +++ b/or_32bit.v @@ -3,36 +3,36 @@ module or_32bit input[31:0] a, input[31:0] b ); - or #10 bit0(out[0], a[0], b[0]); - or #10 bit1(out[1], a[1], b[1]); - or #10 bit2(out[2], a[2], b[2]); - or #10 bit3(out[3], a[3], b[3]); - or #10 bit4(out[4], a[4], b[4]); - or #10 bit5(out[5], a[5], b[5]); - or #10 bit6(out[6], a[6], b[6]); - or #10 bit7(out[7], a[7], b[7]); - or #10 bit8(out[8], a[8], b[8]); - or #10 bit9(out[9], a[9], b[9]); - or #10 bit10(out[10], a[10], b[10]); - or #10 bit11(out[11], a[11], b[11]); - or #10 bit12(out[12], a[12], b[12]); - or #10 bit13(out[13], a[13], b[13]); - or #10 bit14(out[14], a[14], b[14]); - or #10 bit15(out[15], a[15], b[15]); - or #10 bit16(out[16], a[16], b[16]); - or #10 bit17(out[17], a[17], b[17]); - or #10 bit18(out[18], a[18], b[18]); - or #10 bit19(out[19], a[19], b[19]); - or #10 bit20(out[20], a[20], b[20]); - or #10 bit21(out[21], a[21], b[21]); - or #10 bit22(out[22], a[22], b[22]); - or #10 bit23(out[23], a[23], b[23]); - or #10 bit24(out[24], a[24], b[24]); - or #10 bit25(out[25], a[25], b[25]); - or #10 bit26(out[26], a[26], b[26]); - or #10 bit27(out[27], a[27], b[27]); - or #10 bit28(out[28], a[28], b[28]); - or #10 bit29(out[29], a[29], b[29]); - or #10 bit30(out[30], a[30], b[30]); - or #10 bit31(out[31], a[31], b[31]); + or #20 bit0(out[0], a[0], b[0]); + or #20 bit1(out[1], a[1], b[1]); + or #20 bit2(out[2], a[2], b[2]); + or #20 bit3(out[3], a[3], b[3]); + or #20 bit4(out[4], a[4], b[4]); + or #20 bit5(out[5], a[5], b[5]); + or #20 bit6(out[6], a[6], b[6]); + or #20 bit7(out[7], a[7], b[7]); + or #20 bit8(out[8], a[8], b[8]); + or #20 bit9(out[9], a[9], b[9]); + or #20 bit10(out[10], a[10], b[10]); + or #20 bit11(out[11], a[11], b[11]); + or #20 bit12(out[12], a[12], b[12]); + or #20 bit13(out[13], a[13], b[13]); + or #20 bit14(out[14], a[14], b[14]); + or #20 bit15(out[15], a[15], b[15]); + or #20 bit16(out[16], a[16], b[16]); + or #20 bit17(out[17], a[17], b[17]); + or #20 bit18(out[18], a[18], b[18]); + or #20 bit19(out[19], a[19], b[19]); + or #20 bit20(out[20], a[20], b[20]); + or #20 bit21(out[21], a[21], b[21]); + or #20 bit22(out[22], a[22], b[22]); + or #20 bit23(out[23], a[23], b[23]); + or #20 bit24(out[24], a[24], b[24]); + or #20 bit25(out[25], a[25], b[25]); + or #20 bit26(out[26], a[26], b[26]); + or #20 bit27(out[27], a[27], b[27]); + or #20 bit28(out[28], a[28], b[28]); + or #20 bit29(out[29], a[29], b[29]); + or #20 bit30(out[30], a[30], b[30]); + or #20 bit31(out[31], a[31], b[31]); endmodule \ No newline at end of file diff --git a/slt.v b/slt.v index 8fc6fc3..2a6c35c 100644 --- a/slt.v +++ b/slt.v @@ -10,10 +10,10 @@ module single_slt wire xornot; wire xornotand; xor #10 axb(abxor, a, b); - and #10 baxb(bxorand, b, abxor); + and #20 baxb(bxorand, b, abxor); not #10 invxor(xornot, abxor); - and #10 xorandinput(xornotand, xornot, defaultCompare); - or #10 compare(out, bxorand, xornotand); + and #20 xorandinput(xornotand, xornot, defaultCompare); + or #20 compare(out, bxorand, xornotand); endmodule module single_slt_reversed @@ -28,10 +28,10 @@ module single_slt_reversed wire xornot; wire xornotand; xor #10 axb(abxor, a, b); - and #10 aaxb(axorand, a, abxor); + and #20 aaxb(axorand, a, abxor); not #10 invxor(xornot, abxor); - and #10 xorandinput(xornotand, xornot, defaultCompare); - or #10 compare(out, axorand, xornotand); + and #20 xorandinput(xornotand, xornot, defaultCompare); + or #20 compare(out, axorand, xornotand); endmodule module full_slt_32bit From 803cc3e68dcfea34f87596b098440ac7b4dfe666 Mon Sep 17 00:00:00 2001 From: apan64 Date: Thu, 12 Oct 2017 17:01:25 -0400 Subject: [PATCH 34/38] added comments, deleted ALU32bit --- ALU32bit.v | 59 ---------------------------------------------- adder_subtracter.v | 10 +++++++- alu.v | 3 ++- and_32bit.v | 1 + nand_32bit.v | 1 + nor_32bit.v | 1 + or_32bit.v | 1 + slt.v | 4 ++++ xor_32bit.v | 1 + 9 files changed, 20 insertions(+), 61 deletions(-) delete mode 100644 ALU32bit.v diff --git a/ALU32bit.v b/ALU32bit.v deleted file mode 100644 index 65e9b3e..0000000 --- a/ALU32bit.v +++ /dev/null @@ -1,59 +0,0 @@ -//final 32-bit ALU - -`include "adder_subtracter.v" -`include "slt.v" -`include "and_32bit.v" -`include "nand_32bit.v" -`include "xor_32bit.v" -`include "nor_32bit.v" -`include "or_32bit.v" - -module ALUcontrolLUT -( - output cout, //addsub only - output flag, //addsub only - output reg[31:0] finalsignal, - input [2:0]ALUcommand, - input [31:0]a, - input [31:0]b - - -); -//everything going through the different parts -wire [31:0]addsub; -wire [31:0]xorin; -wire [31:0]slt; -wire [31:0]andin; -wire [31:0]nandin; -wire [31:0]norin; -wire [31:0]orin; - -adder_subtracter addsub0(addsub[31:0],cout,flag,a[31:0],b[31:0],ALUcommand[2:0]); -xor_32bit xor0(xorin[31:0],a[31:0],b[31:0]); -full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); -and_32bit and0(andin[31:0],a[31:0],b[31:0]); -nand_32bit nand0(nandin[31:0],a[31:0],b[31:0]); -nor_32bit nor0(norin[31:0],a[31:0],b[31:0]); -or_32bit or0(orin[31:0],a[31:0],b[31:0]); - - - always @(ALUcommand) - begin - if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) - finalsignal[31:0]=addsub[31:0]; - if (ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==0) - finalsignal[31:0]=addsub[31:0]; - if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==0) - finalsignal[31:0]=xorin[31:0]; - if(ALUcommand[0]==1 && ALUcommand[1]==1 && ALUcommand[2]==0) - finalsignal[31:0]=slt[31:0]; - if(ALUcommand[0]==0 && ALUcommand[1]==0 && ALUcommand[2]==1) - finalsignal[31:0]=andin[31:0]; - if(ALUcommand[0]==1 && ALUcommand[1]==0 && ALUcommand[2]==1) - finalsignal[31:0]=nandin[31:0]; - if(ALUcommand[0]==0 && ALUcommand[1]==1 && ALUcommand[2]==1) - finalsignal[31:0]=norin[31:0]; - else - finalsignal[31:0]=orin[31:0]; - end -endmodule diff --git a/adder_subtracter.v b/adder_subtracter.v index 694bddc..309c3ab 100644 --- a/adder_subtracter.v +++ b/adder_subtracter.v @@ -1,5 +1,6 @@ `include "adder.v" +// 32 bit mux module mux ( output[31:0] out, @@ -73,7 +74,9 @@ module mux wire in130addr; wire in131addr; + // inverting address not #10 inv(invaddr, address); + // and all bits in input 0 with inverted address and #20 and00(in00addr, in0[0], invaddr); and #20 and01(in01addr, in0[1], invaddr); and #20 and02(in02addr, in0[2], invaddr); @@ -106,6 +109,7 @@ module mux and #20 and029(in029addr, in0[29], invaddr); and #20 and030(in030addr, in0[30], invaddr); and #20 and031(in031addr, in0[31], invaddr); + // and all bits in input 1 with address and #20 and10(in10addr, in1[0], address); and #20 and11(in11addr, in1[1], address); and #20 and12(in12addr, in1[2], address); @@ -139,6 +143,7 @@ module mux and #20 and130(in130addr, in1[30], address); and #20 and131(in131addr, in1[31], address); + // or the and gates or #20 or0(out[0], in00addr, in10addr); or #20 or1(out[1], in01addr, in11addr); or #20 or2(out[2], in02addr, in12addr); @@ -200,6 +205,7 @@ module adder_subtracter wire _5; wire _6; + // invert B in the case of two's complement not #10 invertB0(invertedB[0], opB[0]); not #10 invertB1(invertedB[1], opB[1]); not #10 invertB2(invertedB[2], opB[2]); @@ -233,9 +239,11 @@ module adder_subtracter not #10 invertB30(invertedB[30], opB[30]); not #10 invertB31(invertedB[31], opB[31]); + // mux chooses between inverted B or normal B based on addition or subtraction mux addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); - FullAdder4bit #50 adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], command[0]); //coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one + // coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one + FullAdder4bit #50 adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], command[0]); // put least significant command bit into the adder carryin since it adds 1 for when subtracting, and 0 when adding FullAdder4bit #50 adder1(ans[7:4], cout1, _1, opA[7:4], finalB[7:4], cout0); FullAdder4bit #50 adder2(ans[11:8], cout2, _2, opA[11:8], finalB[11:8], cout1); FullAdder4bit #50 adder3(ans[15:12], cout3, _3, opA[15:12], finalB[15:12], cout2); diff --git a/alu.v b/alu.v index 0e4754a..8ee1ec0 100644 --- a/alu.v +++ b/alu.v @@ -39,13 +39,14 @@ nor_32bit nor0(norin[31:0],a[31:0],b[31:0]); or_32bit or0(orin[31:0],a[31:0],b[31:0]); + // update on changes to ALUcommand, a, or b always @(ALUcommand or a or b) begin #5000 case (ALUcommand) 3'b000: begin finalsignal[31:0] = addsub[31:0]; cout = adder_cout; flag = adder_flag; end 3'b001: begin finalsignal[31:0] = addsub[31:0]; cout = adder_cout; flag = adder_flag; end - 3'b010: begin finalsignal[31:0] = xorin[31:0]; cout = 0; flag = 0; end + 3'b010: begin finalsignal[31:0] = xorin[31:0]; cout = 0; flag = 0; end // carryout and flag should be 0 for all non-add/sub operations 3'b011: begin finalsignal[31:0] = slt[31:0]; cout = 0; flag = 0; end 3'b100: begin finalsignal[31:0] = andin[31:0]; cout = 0; flag = 0; end 3'b101: begin finalsignal[31:0] = nandin[31:0]; cout = 0; flag = 0; end diff --git a/and_32bit.v b/and_32bit.v index 1ec5c74..96d08d7 100644 --- a/and_32bit.v +++ b/and_32bit.v @@ -3,6 +3,7 @@ module and_32bit input[31:0] a, input[31:0] b ); + // and each bit and #20 bit0(out[0], a[0], b[0]); and #20 bit1(out[1], a[1], b[1]); and #20 bit2(out[2], a[2], b[2]); diff --git a/nand_32bit.v b/nand_32bit.v index 0ab6109..b863e1e 100644 --- a/nand_32bit.v +++ b/nand_32bit.v @@ -3,6 +3,7 @@ module nand_32bit input[31:0] a, input[31:0] b ); + // nand each bit nand #10 bit0(out[0], a[0], b[0]); nand #10 bit1(out[1], a[1], b[1]); nand #10 bit2(out[2], a[2], b[2]); diff --git a/nor_32bit.v b/nor_32bit.v index b14a9ce..ca67012 100644 --- a/nor_32bit.v +++ b/nor_32bit.v @@ -3,6 +3,7 @@ module nor_32bit input[31:0] a, input[31:0] b ); + // nor each bit nor #10 bit0(out[0], a[0], b[0]); nor #10 bit1(out[1], a[1], b[1]); nor #10 bit2(out[2], a[2], b[2]); diff --git a/or_32bit.v b/or_32bit.v index e3d6826..70463a1 100644 --- a/or_32bit.v +++ b/or_32bit.v @@ -3,6 +3,7 @@ module or_32bit input[31:0] a, input[31:0] b ); + // or each bit or #20 bit0(out[0], a[0], b[0]); or #20 bit1(out[1], a[1], b[1]); or #20 bit2(out[2], a[2], b[2]); diff --git a/slt.v b/slt.v index 2a6c35c..a8fc62d 100644 --- a/slt.v +++ b/slt.v @@ -1,3 +1,4 @@ +// single bit slt that performs (a Date: Thu, 12 Oct 2017 17:03:48 -0400 Subject: [PATCH 35/38] added module level comments --- adder_subtracter.v | 1 + and_32bit.v | 1 + nand_32bit.v | 1 + nor_32bit.v | 1 + or_32bit.v | 1 + slt.v | 2 +- xor_32bit.v | 1 + 7 files changed, 7 insertions(+), 1 deletion(-) diff --git a/adder_subtracter.v b/adder_subtracter.v index 309c3ab..f59fd57 100644 --- a/adder_subtracter.v +++ b/adder_subtracter.v @@ -178,6 +178,7 @@ module mux or #20 or31(out[31], in031addr, in131addr); endmodule +// 32 bit adder/subtracter that determines what operation to conduct based on the input command module adder_subtracter ( output[31:0] ans, diff --git a/and_32bit.v b/and_32bit.v index 96d08d7..2657eb5 100644 --- a/and_32bit.v +++ b/and_32bit.v @@ -1,3 +1,4 @@ +// 32 bit and module module and_32bit ( output[31:0] out, input[31:0] a, diff --git a/nand_32bit.v b/nand_32bit.v index b863e1e..80eb02d 100644 --- a/nand_32bit.v +++ b/nand_32bit.v @@ -1,3 +1,4 @@ +// 32 bit nand module module nand_32bit ( output[31:0] out, input[31:0] a, diff --git a/nor_32bit.v b/nor_32bit.v index ca67012..74e3787 100644 --- a/nor_32bit.v +++ b/nor_32bit.v @@ -1,3 +1,4 @@ +// 32 bit nor module module nor_32bit ( output[31:0] out, input[31:0] a, diff --git a/or_32bit.v b/or_32bit.v index 70463a1..58abb22 100644 --- a/or_32bit.v +++ b/or_32bit.v @@ -1,3 +1,4 @@ +// 32 bit or module module or_32bit ( output[31:0] out, input[31:0] a, diff --git a/slt.v b/slt.v index a8fc62d..ba7127f 100644 --- a/slt.v +++ b/slt.v @@ -36,7 +36,7 @@ module single_slt_reversed or #20 compare(out, axorand, xornotand); endmodule -// 32bit slt that handles two's complement +// 32 bit slt that handles two's complement module full_slt_32bit ( output[31:0] out, diff --git a/xor_32bit.v b/xor_32bit.v index e6d56a5..8f749b3 100644 --- a/xor_32bit.v +++ b/xor_32bit.v @@ -1,3 +1,4 @@ +// 32 bit xor module module xor_32bit ( output[31:0] out, input[31:0] a, From 3f546c1ab266ead7d3f684a308a2cda9fd8818dd Mon Sep 17 00:00:00 2001 From: Your Name Goes Here Date: Thu, 12 Oct 2017 17:13:07 -0400 Subject: [PATCH 36/38] test case error detection --- alu.t.v | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 63 insertions(+), 7 deletions(-) diff --git a/alu.t.v b/alu.t.v index f330fe8..cd4514b 100644 --- a/alu.t.v +++ b/alu.t.v @@ -22,30 +22,53 @@ module testALU32bit(); #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + // 1 + 1 a = 32'b00000000000000000000000000000001; b = 32'b00000000000000000000000000000001; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000010) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + // positive overflow a = 32'b01111111111111111111111111111111; b = 32'b01111111111111111111111111111111; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - + + if((finalALUsig != 32'b11111111111111111111111111111110) || (flag != 1) || (cout != 0)) begin + $display("Test Case Failed"); + end + // negative overflow a = 32'b10000000000000000000000000000001; b = 32'b10000000000000000000000000000001; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - + + if((finalALUsig != 32'b00000000000000000000000000000010) || (flag != 1) || (cout != 1)) begin + $display("Test Case Failed"); + end + // carryout a = 32'b11111111111111111111111111111111; b = 32'b00000000000000000000000000000001; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + + //Test cases sub ALUcommand = 3'b001; @@ -55,54 +78,87 @@ module testALU32bit(); #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + // a=b a = 32'b00000000000000000000000000000001; b = 32'b00000000000000000000000000000001; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + // a>b, both positive a = 32'b00000000000000000000000000000111; b = 32'b00000000000000000000000000000101; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - + if((finalALUsig != 32'b00000000000000000000000000000010) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + // a|b|, both negative a = 32'b11111111111111111111111111111101; b = 32'b11111111111111111111111111111110; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - + + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + // |a|<|b|, both negative a = 32'b111111111111111111111111111111110; b = 32'b111111111111111111111111111111000; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + if((finalALUsig != 32'b00000000000000000000000000000110) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + // a negative, b positive, no overflow a = 32'b11111111111111111111111111111101; b = 32'b00000000000000000000000000000101; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + if((finalALUsig != 32'b11111111111111111111111111111000) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + // a negative, b positive, overflow a = 32'b10000000000000000000000000000101; b = 32'b01111100000000000000000000000000; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + + if((finalALUsig != 32'b00000100000000000000000000000101) || (flag != 1) || (cout != 1)) begin + $display("Test Case Failed"); + end // a positive, b negative, no overflow a = 32'b00000000000000000000000000000101; b = 32'b11111111111111111111111111111111; #25000 $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); - + + //Here + // Verify expectations and report test result if((finalALUsig != 32'b00000000000000000000000000000110) || (flag != 0) || (cout != 0)) begin $display("Test Case Failed"); @@ -115,7 +171,7 @@ module testALU32bit(); $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); // Verify expectations and report test result - if((flag != 1)) begin + if((finalALUsig != 32'b11111111111111110011101111111111) || (flag != 1) || (cout != 0)) begin $display("Test Case Failed"); end From 1f6b0cb2a08ed9eb144f9a1d5f1be49a7af442a5 Mon Sep 17 00:00:00 2001 From: apan64 Date: Thu, 12 Oct 2017 19:08:15 -0400 Subject: [PATCH 37/38] added more test cases --- alu.t.v | 71 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/alu.t.v b/alu.t.v index f330fe8..a840563 100644 --- a/alu.t.v +++ b/alu.t.v @@ -376,5 +376,76 @@ module testALU32bit(); $display("Test Case Failed"); end + // add + ALUcommand = 3'b000; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111110) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + + // sub + ALUcommand = 3'b001; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 1)) begin + $display("Test Case Failed"); + end + + // xor + ALUcommand = 3'b010; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // slt + ALUcommand = 3'b011; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // and + ALUcommand = 3'b100; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // nand + ALUcommand = 3'b101; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // nor + ALUcommand = 3'b110; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b00000000000000000000000000000000) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end + + // or + ALUcommand = 3'b111; + #25000 + $display("%b %b %b | %b %b %b", ALUcommand, a, b, finalALUsig, flag, cout); + // Verify expectations and report test result + if((finalALUsig != 32'b11111111111111111111111111111111) || (flag != 0) || (cout != 0)) begin + $display("Test Case Failed"); + end end endmodule \ No newline at end of file From e91c9e6eaa705c00e1b825ee2576d95a34d6f7eb Mon Sep 17 00:00:00 2001 From: apan64 Date: Thu, 12 Oct 2017 19:10:05 -0400 Subject: [PATCH 38/38] added report --- report.pdf | Bin 0 -> 187225 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 report.pdf diff --git a/report.pdf b/report.pdf new file mode 100644 index 0000000000000000000000000000000000000000..3ca263060e203ce87f886b983fadf987023c63db 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