diff --git a/CompArch_Lab_III.pdf b/CompArch_Lab_III.pdf new file mode 100644 index 0000000..c51504e Binary files /dev/null and b/CompArch_Lab_III.pdf differ diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..839197d --- /dev/null +++ b/Makefile @@ -0,0 +1,31 @@ +# Assembly simulation in Verilog unified Makefile example + +include settings.mk + +GTKWAVE := gtkwave +SIM := vvp + +# Final waveform to produce is the combination of machine and program +WAVEFORM := $(TOPLEVEL)-$(PROGRAM).vcd +WAVEOPTS := filters/$(WAVEFORM:vcd=gtkw) + + +# Build memory image, compile Verilog, run simulation to produce VCD trace +$(WAVEFORM): settings.mk + $(MAKE) -C asm $(MEMDUMP) + $(MAKE) -C verilog $(TOPLEVEL).vvp + $(SIM) verilog/$(TOPLEVEL).vvp +mem_fn=asm/$(MEMDUMP) +dump_fn=$@ + + +# Open waveform with saved formatting and filter options +scope: $(WAVEFORM) $(WAVEOPTS) + $(GTKWAVE) $(WAVEOPTS) + + +# Remove generated files, including from subdirectories +clean: + $(MAKE) -C asm clean + $(MAKE) -C verilog clean + rm -f $(WAVEFORM) + +.PHONY: scope clean diff --git a/add32bit.t.v b/add32bit.t.v new file mode 100644 index 0000000..bd437d7 --- /dev/null +++ b/add32bit.t.v @@ -0,0 +1,50 @@ +// Test bench for 32 bit adder + +`timescale 1 ns / 1 ps +`include "add32bit.v" + +module test32bitAdder(); + +reg[31:0] a; +reg[31:0] b; +wire[31:0] c; +wire overflow; + +add32bit test(a, b, c, overflow); + +initial begin + // Add some numbers with no overflow + a = 32'd7; + b = 32'd6; + #50; + $display("6 + 7 = %d", c); + $display("overlow: %b", overflow); + a = 32'd657; + b = 32'd912; + #50; + $display("657 + 912 = %d", c); + $display("overlow: %b", overflow); + a = 32'd700; + b = 32'd900; + #50; + $display("700 + 900 = %d", c); + $display("overlow: %b", overflow); + // Add some numbers with overflow + a = 32'd2**31-5; + b = 32'd2**31-10; + #50; + $display("overflow: %d", c); + $display("overlow: %b", overflow); + a = -32'sd2**31-5; + b = -32'sd2**31-10; + #50; + $display("overflow %d", c); + $display("overlow: %b", overflow); + // add a positive and a negative + a = -32'sd700; + b = 32'd900; + #50; + $display("-700 + 900 = %d", c); + $display("overlow: %b", overflow); +end +endmodule \ No newline at end of file diff --git a/add32bit.v b/add32bit.v new file mode 100644 index 0000000..b462931 --- /dev/null +++ b/add32bit.v @@ -0,0 +1,21 @@ +// 32 bit adder + +module add32bit ( + input[31:0] a, + input[31:0] b, + output reg[31:0] c, + output overflow +); + +reg carry; +wire carryXorSign; +wire sameSign; + + xnor signTest(sameSign, a[31], b[31]); + xor adder(carryXorSign, carry, c[31]); + and ovrflTest(overflow, carryXorSign, sameSign); + +always @(a or b) begin + {carry, c} = a + b; +end +endmodule diff --git a/adder.v b/adder.v new file mode 100644 index 0000000..927167c --- /dev/null +++ b/adder.v @@ -0,0 +1,76 @@ +// Adder circuit + +module behavioralFullAdder +( + output sum, + output carryout, + input a, + input b, + input carryin +); + // Uses concatenation operator and built-in '+' + assign {carryout, sum}=a+b+carryin; +endmodule + +module structuralFullAdder +( + output sum, + output carryout, + input a, + input b, + input carryin +); + wire ab; //setting up wires + wire acarryin; + wire bcarryin; + wire orpairintermediate; + wire orsingleintermediate; + wire orall; + wire andsumintermediate; + wire andsingleintermediate; + wire andall; + wire invcarryout; + and andab(ab, a, b); // a and b + and andacarryin(acarryin, a, carryin); // a and carryin + and andbcarryin(bcarryin, b, carryin); // b and carryin + or orpair(orpairintermediate, ab, acarryin); // (a and b) or (a and carryin) + or orcarryout(carryout, orpairintermediate, bcarryin); // ((a and b) or (a and carryin)) or (b and carryin) + or orintermediate(orsingleintermediate, a, b); // a or b + or orallinputs(orall, orsingleintermediate, carryin); // (a or b) or carryin + not inv(invcarryout, carryout); // not carryout + and sumintermediate(andsumintermediate, invcarryout, orall); // (a or b or carryin) and not carryout + and andintermediate(andsingleintermediate, a, b); // a and b + and andallinputs(andall, andsingleintermediate, carryin); // (a and b) and carryin + or adder(sum, andsumintermediate, andall); // ((a or b or carryin) and not carryout) or (a and b and c) +endmodule + +module FullAdder4bit +( + output[3:0] sum, // 2's complement sum of a and b + output carryout, // Carry out of the summation of a and b + output overflow, // True if the calculation resulted in an overflow + input[3:0] a, // First operand in 2's complement format + input[3:0] b, // Second operand in 2's complement format + input carryin +); + wire carryout1; // wire setup for carryouts from each adder + wire carryout2; + wire carryout3; + wire aandb; + wire anorb; + wire bandsum; + wire bnorsum; + wire abandnoror; + wire bsumandnornor; + structuralFullAdder adder1(sum[0], carryout1, a[0], b[0], carryin); // first adder to handle the first added bits + structuralFullAdder adder2(sum[1], carryout2, a[1], b[1], carryout1); // second adder to take the carryout from the first adder and the next added bits + structuralFullAdder adder3(sum[2], carryout3, a[2], b[2], carryout2); // third adder to take the second carryout and the third added bits + structuralFullAdder adder4(sum[3], carryout, a[3], b[3], carryout3); // fourth adder to take the third carryout and the fourth bits + and andinputs(aandb, a[3], b[3]); // logic to determine overflow (overflow occurs when two positives result in a negative or two negatives result in a positive, the larges bit in both inputs are equal and the largest bit in the output is not the same) + nor norinputs(anorb, a[3], b[3]); + and andsum(bandsum, b[3], sum[3]); + nor norsum(bnorsum, b[3], sum[3]); + or orinputcombs(abandnoror, aandb, anorb); + nor norsumcombs(bsumandnornor, bandsum, bnorsum); + and finaland(overflow, abandnoror, bsumandnornor); +endmodule \ No newline at end of file diff --git a/adder1bit.v b/adder1bit.v new file mode 100644 index 0000000..d8cad02 --- /dev/null +++ b/adder1bit.v @@ -0,0 +1,27 @@ +`define AND and #30 +`define OR or #30 +`define NOT not #10 +`define XOR xor #30 +`define NOR nor #20 +`define NAND nand #20 + +module Adder1bit +( + output sum, + output carryout, + input a, + input b, + input carryin +); + wire aandb, aorb; + wire s, _carryin; + wire outputIfCarryin, outputIf_Carryin; + `XOR(s, a, b); + `XOR(sum, s, carryin); + `AND(aandb, a, b); + `OR(aorb, a, b); + `NOT(_carryin, carryin); + `AND(outputIfCarryin, aandb, _carryin); + `AND(outputIf_Carryin, aorb, carryin); + `OR(carryout, outputIfCarryin, outputIf_Carryin); +endmodule diff --git a/adder_subtracter.v b/adder_subtracter.v new file mode 100644 index 0000000..71274e8 --- /dev/null +++ b/adder_subtracter.v @@ -0,0 +1,247 @@ +`include "adder.v" + +module muxtype1 + ( + output[31:0] out, + input address, + input[31:0] in0, + input[31:0] in1 + ); + wire invaddr; + wire in00addr; // input 0 bit 0 andded with address + wire in01addr; + wire in02addr; + wire in03addr; + wire in04addr; + wire in05addr; + wire in06addr; + wire in07addr; + wire in08addr; + wire in09addr; + wire in010addr; + wire in011addr; + wire in012addr; + wire in013addr; + wire in014addr; + wire in015addr; + wire in016addr; + wire in017addr; + wire in018addr; + wire in019addr; + wire in020addr; + wire in021addr; + wire in022addr; + wire in023addr; + wire in024addr; + wire in025addr; + wire in026addr; + wire in027addr; + wire in028addr; + wire in029addr; + wire in030addr; + wire in031addr; + wire in10addr; + wire in11addr; + wire in12addr; + wire in13addr; + wire in14addr; + wire in15addr; + wire in16addr; + wire in17addr; + wire in18addr; + wire in19addr; + wire in110addr; + wire in111addr; + wire in112addr; + wire in113addr; + wire in114addr; + wire in115addr; + wire in116addr; + wire in117addr; + wire in118addr; + wire in119addr; + wire in120addr; + wire in121addr; + wire in122addr; + wire in123addr; + wire in124addr; + wire in125addr; + wire in126addr; + wire in127addr; + wire in128addr; + wire in129addr; + wire in130addr; + wire in131add; + not inv(invaddr, address); + and and00(in00addr, in0[0], invaddr); + and and01(in01addr, in0[1], invaddr); + and and02(in02addr, in0[2], invaddr); + and and03(in03addr, in0[3], invaddr); + and and04(in04addr, in0[4], invaddr); + and and05(in05addr, in0[5], invaddr); + and and06(in06addr, in0[6], invaddr); + and and07(in07addr, in0[7], invaddr); + and and08(in08addr, in0[8], invaddr); + and and09(in09addr, in0[9], invaddr); + and and010(in010addr, in0[10], invaddr); + and and011(in011addr, in0[11], invaddr); + and and012(in012addr, in0[12], invaddr); + and and013(in013addr, in0[13], invaddr); + and and014(in014addr, in0[14], invaddr); + and and015(in015addr, in0[15], invaddr); + and and016(in016addr, in0[16], invaddr); + and and017(in017addr, in0[17], invaddr); + and and018(in018addr, in0[18], invaddr); + and and019(in019addr, in0[19], invaddr); + and and020(in020addr, in0[20], invaddr); + and and021(in021addr, in0[21], invaddr); + and and022(in022addr, in0[22], invaddr); + and and023(in023addr, in0[23], invaddr); + and and024(in024addr, in0[24], invaddr); + and and025(in025addr, in0[25], invaddr); + and and026(in026addr, in0[26], invaddr); + and and027(in027addr, in0[27], invaddr); + and and028(in028addr, in0[28], invaddr); + and and029(in029addr, in0[29], invaddr); + and and030(in030addr, in0[30], invaddr); + and and031(in031addr, in0[31], invaddr); + and and10(in10addr, in1[0], address); + and and11(in11addr, in1[1], address); + and and12(in12addr, in1[2], address); + and and13(in13addr, in1[3], address); + and and14(in14addr, in1[4], address); + and and15(in15addr, in1[5], address); + and and16(in16addr, in1[6], address); + and and17(in17addr, in1[7], address); + and and18(in18addr, in1[8], address); + and and19(in19addr, in1[9], address); + and and110(in110addr, in1[10], address); + and and111(in111addr, in1[11], address); + and and112(in112addr, in1[12], address); + and and113(in113addr, in1[13], address); + and and114(in114addr, in1[14], address); + and and115(in115addr, in1[15], address); + and and116(in116addr, in1[16], address); + and and117(in117addr, in1[17], address); + and and118(in118addr, in1[18], address); + and and119(in119addr, in1[19], address); + and and120(in120addr, in1[20], address); + and and121(in121addr, in1[21], address); + and and122(in122addr, in1[22], address); + and and123(in123addr, in1[23], address); + and and124(in124addr, in1[24], address); + and and125(in125addr, in1[25], address); + and and126(in126addr, in1[26], address); + and and127(in127addr, in1[27], address); + and and128(in128addr, in1[28], address); + and and129(in129addr, in1[29], address); + and and130(in130addr, in1[30], address); + and and131(in131addr, in1[31], address); + + or or0(out[0], in00addr, in10addr); + or or1(out[1], in01addr, in11addr); + or or2(out[2], in02addr, in12addr); + or or3(out[3], in03addr, in13addr); + or or4(out[4], in04addr, in14addr); + or or5(out[5], in05addr, in15addr); + or or6(out[6], in06addr, in16addr); + or or7(out[7], in07addr, in17addr); + or or8(out[8], in08addr, in18addr); + or or9(out[9], in09addr, in19addr); + or or10(out[10], in010addr, in110addr); + or or11(out[11], in011addr, in111addr); + or or12(out[12], in012addr, in112addr); + or or13(out[13], in013addr, in113addr); + or or14(out[14], in014addr, in114addr); + or or15(out[15], in015addr, in115addr); + or or16(out[16], in016addr, in116addr); + or or17(out[17], in017addr, in117addr); + or or18(out[18], in018addr, in118addr); + or or19(out[19], in019addr, in119addr); + or or20(out[20], in020addr, in120addr); + or or21(out[21], in021addr, in121addr); + or or22(out[22], in022addr, in122addr); + or or23(out[23], in023addr, in123addr); + or or24(out[24], in024addr, in124addr); + or or25(out[25], in025addr, in125addr); + or or26(out[26], in026addr, in126addr); + or or27(out[27], in027addr, in127addr); + or or28(out[28], in028addr, in128addr); + or or29(out[29], in029addr, in129addr); + or or30(out[30], in030addr, in130addr); + or or31(out[31], in031addr, in131addr); +endmodule + +module adder_subtracter + ( + output[31:0] ans, + output carryout, + output overflow, + input[31:0] opA, + input[31:0] opB, + input[2:0] command + ); + wire[31:0] invertedB; //wire to invert b in the event of a subtraction + wire[31:0] finalB; + wire normalB; //added b + wire cout0; + wire cout1; + wire cout2; + wire cout3; + wire cout4; + wire cout5; + wire cout6; + wire _; + wire _1; + wire _2; + wire _3; + wire _4; + wire _5; + wire _6; + + not invertB0(invertedB[0], opB[0]); + not invertB1(invertedB[1], opB[1]); + not invertB2(invertedB[2], opB[2]); + not invertB3(invertedB[3], opB[3]); + not invertB4(invertedB[4], opB[4]); + not invertB5(invertedB[5], opB[5]); + not invertB6(invertedB[6], opB[6]); + not invertB7(invertedB[7], opB[7]); + not invertB8(invertedB[8], opB[8]); + not invertB9(invertedB[9], opB[9]); + not invertB10(invertedB[10], opB[10]); + not invertB11(invertedB[11], opB[11]); + not invertB12(invertedB[12], opB[12]); + not invertB13(invertedB[13], opB[13]); + not invertB14(invertedB[14], opB[14]); + not invertB15(invertedB[15], opB[15]); + not invertB16(invertedB[16], opB[16]); + not invertB17(invertedB[17], opB[17]); + not invertB18(invertedB[18], opB[18]); + not invertB19(invertedB[19], opB[19]); + not invertB20(invertedB[20], opB[20]); + not invertB21(invertedB[21], opB[21]); + not invertB22(invertedB[22], opB[22]); + not invertB23(invertedB[23], opB[23]); + not invertB24(invertedB[24], opB[24]); + not invertB25(invertedB[25], opB[25]); + not invertB26(invertedB[26], opB[26]); + not invertB27(invertedB[27], opB[27]); + not invertB28(invertedB[28], opB[28]); + not invertB29(invertedB[29], opB[29]); + not invertB30(invertedB[30], opB[30]); + not invertB31(invertedB[31], opB[31]); + + muxtype1 addsubmux(finalB[31:0],command[0],opB[31:0], invertedB[31:0]); + + FullAdder4bit adder0(ans[3:0], cout0, _, opA[3:0], finalB[3:0], command[0]); //coupling 4 adders makes a 32-bit adder, note that overflow flags do not matter except for the last one + FullAdder4bit adder1(ans[7:4], cout1, _1, opA[7:4], finalB[7:4], cout0); + FullAdder4bit adder2(ans[11:8], cout2, _2, opA[11:8], finalB[11:8], cout1); + FullAdder4bit adder3(ans[15:12], cout3, _3, opA[15:12], finalB[15:12], cout2); + FullAdder4bit adder4(ans[19:16], cout4, _4, opA[19:16], finalB[19:16], cout3); + FullAdder4bit adder5(ans[23:20], cout5, _5, opA[23:20], finalB[23:20], cout4); + FullAdder4bit adder6(ans[27:24], cout6, _6, opA[27:24], finalB[27:24], cout5); + FullAdder4bit adder7(ans[31:28], carryout, overflow, opA[31:28], finalB[31:28], cout6); + + +endmodule \ No newline at end of file diff --git a/alu.out b/alu.out new file mode 100755 index 0000000..076e6de --- /dev/null +++ b/alu.out @@ -0,0 +1,5377 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0xbb06d0 .scope module, "ALU" "ALU" 2 20; + .timescale 0 0; +L_0xb75390/d .functor XOR 1, L_0xd43340, L_0xd1a5f0, C4<0>, C4<0>; +L_0xb75390 .delay (30,30,30) L_0xb75390/d; +L_0xb7dd60/d .functor XOR 1, L_0xd1a6b0, L_0xb75390, C4<0>, C4<0>; +L_0xb7dd60 .delay (30,30,30) L_0xb7dd60/d; +v0xce1630_0 .net *"_s320", 0 0, L_0xd1a5f0; 1 drivers +v0xce1870_0 .net *"_s323", 0 0, L_0xd1a6b0; 1 drivers +v0xce18f0_0 .net *"_s325", 0 0, L_0xd1b000; 1 drivers +v0xce1970_0 .net *"_s327", 0 0, L_0xd1b0a0; 1 drivers +v0xce19f0_0 .net *"_s329", 0 0, L_0xd1b140; 1 drivers +v0xce1a70_0 .net *"_s331", 0 0, L_0xd470a0; 1 drivers +v0xce1af0_0 .net *"_s333", 0 0, L_0xd46b80; 1 drivers +v0xce1b90_0 .net *"_s335", 0 0, L_0xd46c20; 1 drivers +v0xce1c30_0 .net *"_s337", 0 0, L_0xd46cc0; 1 drivers +v0xce1cd0_0 .net *"_s343", 0 0, L_0xd472d0; 1 drivers +v0xce1d70_0 .net *"_s345", 0 0, L_0xd47370; 1 drivers +v0xce1e10_0 .net *"_s347", 0 0, L_0xd47410; 1 drivers +v0xce1eb0_0 .net *"_s349", 0 0, L_0xd474b0; 1 drivers +v0xce1f50_0 .net *"_s350", 0 0, C4<0>; 1 drivers +v0xce2070_0 .net *"_s353", 0 0, L_0xd47590; 1 drivers +v0xce2110_0 .net *"_s355", 0 0, L_0xd45ba0; 1 drivers +v0xce1fd0_0 .net *"_s357", 0 0, L_0xd45c40; 1 drivers +v0xce2260_0 .net *"_s363", 0 0, L_0xd47900; 1 drivers +v0xce2380_0 .net *"_s365", 0 0, L_0xd479a0; 1 drivers +v0xce2400_0 .net *"_s367", 0 0, L_0xd47a40; 1 drivers +v0xce22e0_0 .net *"_s369", 0 0, L_0xd47ae0; 1 drivers +v0xce2530_0 .net *"_s370", 0 0, C4<0>; 1 drivers +v0xce2480_0 .net *"_s373", 0 0, L_0xce2190; 1 drivers +v0xce2670_0 .net *"_s375", 0 0, L_0xd480e0; 1 drivers +v0xce25d0_0 .net *"_s377", 0 0, L_0xd48780; 1 drivers +v0xce27c0_0 .net *"_s383", 0 0, L_0xd48310; 1 drivers +v0xce2710_0 .net *"_s385", 0 0, L_0xd483b0; 1 drivers +v0xce2920_0 .net *"_s387", 0 0, L_0xd48450; 1 drivers +v0xce2860_0 .net *"_s389", 0 0, L_0xd484f0; 1 drivers +v0xce2a90_0 .net *"_s390", 0 0, C4<0>; 1 drivers +v0xce29a0_0 .net *"_s393", 0 0, L_0xd485d0; 1 drivers +v0xce2c10_0 .net *"_s395", 0 0, L_0xd48670; 1 drivers +v0xce2b10_0 .net *"_s397", 0 0, L_0xd47bc0; 1 drivers +v0xce2da0_0 .net *"_s403", 0 0, L_0xd48cc0; 1 drivers +v0xce2c90_0 .net *"_s405", 0 0, L_0xd48d60; 1 drivers +v0xce2f40_0 .net *"_s407", 0 0, L_0xd48e00; 1 drivers +v0xce2e20_0 .net *"_s409", 0 0, L_0xd48ea0; 1 drivers +v0xce2ec0_0 .net *"_s410", 0 0, C4<0>; 1 drivers +v0xce3100_0 .net *"_s413", 0 0, L_0xd46150; 1 drivers +v0xce3180_0 .net *"_s415", 0 0, L_0xd461f0; 1 drivers +v0xce2fc0_0 .net *"_s417", 0 0, L_0xd46290; 1 drivers +v0xce3060_0 .net *"_s423", 0 0, L_0xd496f0; 1 drivers +v0xce3360_0 .net *"_s425", 0 0, L_0xd49790; 1 drivers +v0xce33e0_0 .net *"_s427", 0 0, L_0xd49830; 1 drivers +v0xce3200_0 .net *"_s429", 0 0, L_0xd498d0; 1 drivers +v0xce32a0_0 .net *"_s430", 0 0, C4<0>; 1 drivers +v0xce35e0_0 .net *"_s433", 0 0, L_0xd49970; 1 drivers +v0xce3660_0 .net *"_s435", 0 0, L_0xd49a10; 1 drivers +v0xce3480_0 .net *"_s437", 0 0, L_0xd49ab0; 1 drivers +v0xce3520_0 .net *"_s443", 0 0, L_0xd492b0; 1 drivers +v0xce3880_0 .net *"_s445", 0 0, L_0xd49350; 1 drivers +v0xce3900_0 .net *"_s447", 0 0, L_0xd4a510; 1 drivers +v0xce3700_0 .net *"_s449", 0 0, L_0xd4a5b0; 1 drivers +v0xce37a0_0 .net *"_s450", 0 0, C4<0>; 1 drivers +v0xce3b40_0 .net *"_s453", 0 0, L_0xd4ab90; 1 drivers +v0xce3bc0_0 .net *"_s455", 0 0, L_0xd4ac30; 1 drivers +v0xce3980_0 .net *"_s457", 0 0, L_0xd4acd0; 1 drivers +v0xce3a20_0 .net *"_s463", 0 0, L_0xd4b970; 1 drivers +v0xce3ac0_0 .net *"_s465", 0 0, L_0xd4b0e0; 1 drivers +v0xce3e40_0 .net *"_s467", 0 0, L_0xd4b180; 1 drivers +v0xce3c60_0 .net *"_s469", 0 0, L_0xd4b220; 1 drivers +v0xce3d00_0 .net *"_s470", 0 0, C4<0>; 1 drivers +v0xce3da0_0 .net *"_s473", 0 0, L_0xd4b2c0; 1 drivers +v0xce40e0_0 .net *"_s475", 0 0, L_0xd4b360; 1 drivers +v0xce3ee0_0 .net *"_s477", 0 0, L_0xd4b400; 1 drivers +v0xce3f80_0 .net *"_s483", 0 0, L_0xd4a8f0; 1 drivers +v0xce4020_0 .net *"_s485", 0 0, L_0xd4a990; 1 drivers +v0xce4380_0 .net *"_s487", 0 0, L_0xd4aa30; 1 drivers +v0xce4180_0 .net *"_s489", 0 0, L_0xd4aad0; 1 drivers +v0xce4220_0 .net *"_s490", 0 0, C4<0>; 1 drivers +v0xce42c0_0 .net *"_s493", 0 0, L_0xd4bf60; 1 drivers +v0xce4640_0 .net *"_s495", 0 0, L_0xd4c000; 1 drivers +v0xce4400_0 .net *"_s497", 0 0, L_0xd4c0a0; 1 drivers +v0xce44a0_0 .net *"_s503", 0 0, L_0xd4ce60; 1 drivers +v0xce4540_0 .net *"_s505", 0 0, L_0xd4c640; 1 drivers +v0xce4920_0 .net *"_s507", 0 0, L_0xd4c6e0; 1 drivers +v0xce46c0_0 .net *"_s509", 0 0, L_0xd4c780; 1 drivers +v0xce4760_0 .net *"_s510", 0 0, C4<0>; 1 drivers +v0xce4800_0 .net *"_s513", 0 0, L_0xd4ba10; 1 drivers +v0xce48a0_0 .net *"_s515", 0 0, L_0xd4bab0; 1 drivers +v0xce4c30_0 .net *"_s517", 0 0, L_0xd4bb50; 1 drivers +v0xce4cb0_0 .net *"_s523", 0 0, L_0xd4cf00; 1 drivers +v0xce49c0_0 .net *"_s525", 0 0, L_0xd4cfa0; 1 drivers +v0xce4a60_0 .net *"_s527", 0 0, L_0xd4d040; 1 drivers +v0xce4b00_0 .net *"_s529", 0 0, L_0xd4d0e0; 1 drivers +v0xce4ba0_0 .net *"_s530", 0 0, C4<0>; 1 drivers +v0xce5010_0 .net *"_s533", 0 0, L_0xd4d180; 1 drivers +v0xce50b0_0 .net *"_s535", 0 0, L_0xd4d220; 1 drivers +v0xce4d50_0 .net *"_s537", 0 0, L_0xd4d2c0; 1 drivers +v0xce4df0_0 .net *"_s543", 0 0, L_0xd4e210; 1 drivers +v0xce4e90_0 .net *"_s545", 0 0, L_0xd4d860; 1 drivers +v0xce4f30_0 .net *"_s547", 0 0, L_0xd4d900; 1 drivers +v0xce5420_0 .net *"_s549", 0 0, L_0xd4d9a0; 1 drivers +v0xce54a0_0 .net *"_s550", 0 0, C4<0>; 1 drivers +v0xce5150_0 .net *"_s553", 0 0, L_0xd4dfb0; 1 drivers +v0xce51f0_0 .net *"_s555", 0 0, L_0xd4c820; 1 drivers +v0xce5290_0 .net *"_s557", 0 0, L_0xd4c8c0; 1 drivers +v0xce5330_0 .net *"_s563", 0 0, L_0xd4e2b0; 1 drivers +v0xce5840_0 .net *"_s565", 0 0, L_0xd4e350; 1 drivers +v0xce58c0_0 .net *"_s567", 0 0, L_0xd4e3f0; 1 drivers +v0xce5520_0 .net *"_s569", 0 0, L_0xd4e490; 1 drivers +v0xce55c0_0 .net *"_s570", 0 0, C4<0>; 1 drivers +v0xce5660_0 .net *"_s573", 0 0, L_0xd4e570; 1 drivers +v0xce5700_0 .net *"_s575", 0 0, L_0xd4e610; 1 drivers +v0xce57a0_0 .net *"_s577", 0 0, L_0xd4e6b0; 1 drivers +v0xce5c90_0 .net *"_s583", 0 0, L_0xd4f640; 1 drivers +v0xce5960_0 .net *"_s585", 0 0, L_0xd4ec50; 1 drivers +v0xce5a00_0 .net *"_s587", 0 0, L_0xd4ecf0; 1 drivers +v0xce5aa0_0 .net *"_s589", 0 0, L_0xd4ed90; 1 drivers +v0xce5b40_0 .net *"_s590", 0 0, C4<0>; 1 drivers +v0xce5be0_0 .net *"_s593", 0 0, L_0xd4f3b0; 1 drivers +v0xce6090_0 .net *"_s595", 0 0, L_0xd4f450; 1 drivers +v0xce5d30_0 .net *"_s597", 0 0, L_0xd4da40; 1 drivers +v0xce5dd0_0 .net *"_s603", 0 0, L_0xd49dd0; 1 drivers +v0xce5e70_0 .net *"_s605", 0 0, L_0xd49e70; 1 drivers +v0xce5f10_0 .net *"_s607", 0 0, L_0xd49f10; 1 drivers +v0xce5fb0_0 .net *"_s609", 0 0, L_0xd49fb0; 1 drivers +v0xce64c0_0 .net *"_s610", 0 0, C4<0>; 1 drivers +v0xce6110_0 .net *"_s613", 0 0, L_0xd4a090; 1 drivers +v0xce6190_0 .net *"_s615", 0 0, L_0xd4a130; 1 drivers +v0xce6230_0 .net *"_s617", 0 0, L_0xd4a1d0; 1 drivers +v0xce62d0_0 .net *"_s623", 0 0, L_0xd4f960; 1 drivers +v0xce6370_0 .net *"_s625", 0 0, L_0xd4fa00; 1 drivers +v0xce6410_0 .net *"_s627", 0 0, L_0xd4faa0; 1 drivers +v0xce6930_0 .net *"_s629", 0 0, L_0xd4fb40; 1 drivers +v0xce69d0_0 .net *"_s630", 0 0, C4<0>; 1 drivers +v0xce6540_0 .net *"_s633", 0 0, L_0xd4fbe0; 1 drivers +v0xce65c0_0 .net *"_s635", 0 0, L_0xd4fc80; 1 drivers +v0xce6660_0 .net *"_s637", 0 0, L_0xd4fd20; 1 drivers +v0xce6700_0 .net *"_s643", 0 0, L_0xd4a7e0; 1 drivers +v0xce67a0_0 .net *"_s645", 0 0, L_0xd50fc0; 1 drivers +v0xce6840_0 .net *"_s647", 0 0, L_0xd51060; 1 drivers +v0xce6e80_0 .net *"_s649", 0 0, L_0xd51100; 1 drivers +v0xce6f00_0 .net *"_s650", 0 0, C4<0>; 1 drivers +v0xce6a50_0 .net *"_s653", 0 0, L_0xd51730; 1 drivers +v0xce6af0_0 .net *"_s655", 0 0, L_0xd517d0; 1 drivers +v0xce6b90_0 .net *"_s657", 0 0, L_0xd51870; 1 drivers +v0xce6c30_0 .net *"_s663", 0 0, L_0xd52880; 1 drivers +v0xce6cd0_0 .net *"_s665", 0 0, L_0xd51e60; 1 drivers +v0xce6d70_0 .net *"_s667", 0 0, L_0xd51f00; 1 drivers +v0xce73f0_0 .net *"_s669", 0 0, L_0xd51fa0; 1 drivers +v0xce7470_0 .net *"_s670", 0 0, C4<0>; 1 drivers +v0xce6f80_0 .net *"_s673", 0 0, L_0xd525e0; 1 drivers +v0xce7020_0 .net *"_s675", 0 0, L_0xd52680; 1 drivers +v0xce70c0_0 .net *"_s677", 0 0, L_0xd52720; 1 drivers +v0xce7160_0 .net *"_s683", 0 0, L_0xd51560; 1 drivers +v0xce7200_0 .net *"_s685", 0 0, L_0xd51600; 1 drivers +v0xce72a0_0 .net *"_s687", 0 0, L_0xd53350; 1 drivers +v0xce7340_0 .net *"_s689", 0 0, L_0xd533f0; 1 drivers +v0xce79a0_0 .net *"_s690", 0 0, C4<0>; 1 drivers +v0xce74f0_0 .net *"_s693", 0 0, L_0xd52920; 1 drivers +v0xce7590_0 .net *"_s695", 0 0, L_0xd529c0; 1 drivers +v0xce7630_0 .net *"_s697", 0 0, L_0xd52a60; 1 drivers +v0xce76d0_0 .net *"_s703", 0 0, L_0xd53000; 1 drivers +v0xce7770_0 .net *"_s705", 0 0, L_0xd530a0; 1 drivers +v0xce7810_0 .net *"_s707", 0 0, L_0xd53140; 1 drivers +v0xce78b0_0 .net *"_s709", 0 0, L_0xd531e0; 1 drivers +v0xce7f10_0 .net *"_s710", 0 0, C4<0>; 1 drivers +v0xce7a20_0 .net *"_s713", 0 0, L_0xd53280; 1 drivers +v0xce7ac0_0 .net *"_s715", 0 0, L_0xd52040; 1 drivers +v0xce7b60_0 .net *"_s717", 0 0, L_0xd520e0; 1 drivers +v0xce7c00_0 .net *"_s723", 0 0, L_0xd53580; 1 drivers +v0xce7ca0_0 .net *"_s725", 0 0, L_0xd53620; 1 drivers +v0xce7d40_0 .net *"_s727", 0 0, L_0xd536c0; 1 drivers +v0xce7de0_0 .net *"_s729", 0 0, L_0xd53760; 1 drivers +v0xce7e80_0 .net *"_s730", 0 0, C4<0>; 1 drivers +v0xce84d0_0 .net *"_s733", 0 0, L_0xd53df0; 1 drivers +v0xce8550_0 .net *"_s735", 0 0, L_0xd53e90; 1 drivers +v0xce7f90_0 .net *"_s737", 0 0, L_0xd53f30; 1 drivers +v0xce8030_0 .net *"_s743", 0 0, L_0xd55050; 1 drivers +v0xce80d0_0 .net *"_s745", 0 0, L_0xd54480; 1 drivers +v0xce8170_0 .net *"_s747", 0 0, L_0xd54520; 1 drivers +v0xce8210_0 .net *"_s749", 0 0, L_0xd545c0; 1 drivers +v0xce82b0_0 .net *"_s750", 0 0, C4<0>; 1 drivers +v0xce8350_0 .net *"_s753", 0 0, L_0xd54c60; 1 drivers +v0xce83f0_0 .net *"_s755", 0 0, L_0xd54d00; 1 drivers +v0xce8b60_0 .net *"_s757", 0 0, L_0xd54da0; 1 drivers +v0xce8be0_0 .net *"_s763", 0 0, L_0xd53c00; 1 drivers +v0xce85d0_0 .net *"_s765", 0 0, L_0xd53ca0; 1 drivers +v0xce8670_0 .net *"_s767", 0 0, L_0xd53d40; 1 drivers +v0xce8710_0 .net *"_s769", 0 0, L_0xd55c40; 1 drivers +v0xce87b0_0 .net *"_s770", 0 0, C4<0>; 1 drivers +v0xce8850_0 .net *"_s773", 0 0, L_0xd55130; 1 drivers +v0xce88f0_0 .net *"_s775", 0 0, L_0xd551d0; 1 drivers +v0xce8990_0 .net *"_s777", 0 0, L_0xd55270; 1 drivers +v0xce8a30_0 .net *"_s783", 0 0, L_0xd55860; 1 drivers +v0xce8ad0_0 .net *"_s785", 0 0, L_0xd55900; 1 drivers +v0xce9240_0 .net *"_s787", 0 0, L_0xd559a0; 1 drivers +v0xce8c60_0 .net *"_s789", 0 0, L_0xd55a40; 1 drivers +v0xce8d00_0 .net *"_s790", 0 0, C4<0>; 1 drivers +v0xce8da0_0 .net *"_s793", 0 0, L_0xd55b20; 1 drivers +v0xce8e40_0 .net *"_s795", 0 0, L_0xd546a0; 1 drivers +v0xce8ee0_0 .net *"_s797", 0 0, L_0xd54740; 1 drivers +v0xce8f80_0 .net *"_s803", 0 0, L_0xd55dd0; 1 drivers +v0xce9020_0 .net *"_s805", 0 0, L_0xd55e70; 1 drivers +v0xce90c0_0 .net *"_s807", 0 0, L_0xd55f10; 1 drivers +v0xce9160_0 .net *"_s809", 0 0, L_0xd55fb0; 1 drivers +v0xce98f0_0 .net *"_s810", 0 0, C4<0>; 1 drivers +v0xce92c0_0 .net *"_s813", 0 0, L_0xd56660; 1 drivers +v0xce9340_0 .net *"_s815", 0 0, L_0xd56700; 1 drivers +v0xce93e0_0 .net *"_s817", 0 0, L_0xd567a0; 1 drivers +v0xce9480_0 .net *"_s823", 0 0, L_0xd56d90; 1 drivers +v0xce9520_0 .net *"_s825", 0 0, L_0xd57a70; 1 drivers +v0xce95c0_0 .net *"_s827", 0 0, L_0xd57b10; 1 drivers +v0xce9660_0 .net *"_s829", 0 0, L_0xd56e30; 1 drivers +v0xce9700_0 .net *"_s830", 0 0, C4<0>; 1 drivers +v0xce97a0_0 .net *"_s833", 0 0, L_0xd574f0; 1 drivers +v0xce9840_0 .net *"_s835", 0 0, L_0xd57590; 1 drivers +v0xcea000_0 .net *"_s837", 0 0, L_0xd57630; 1 drivers +v0xcea080_0 .net *"_s843", 0 0, L_0xd56220; 1 drivers +v0xce9970_0 .net *"_s845", 0 0, L_0xd562c0; 1 drivers +v0xce9a10_0 .net *"_s847", 0 0, L_0xd56360; 1 drivers +v0xce9ab0_0 .net *"_s849", 0 0, L_0xd56400; 1 drivers +v0xce9b50_0 .net *"_s850", 0 0, C4<0>; 1 drivers +v0xce9bf0_0 .net *"_s853", 0 0, L_0xd564e0; 1 drivers +v0xce9c90_0 .net *"_s855", 0 0, L_0xd56580; 1 drivers +v0xce9d30_0 .net *"_s857", 0 0, L_0xd58840; 1 drivers +v0xce9dd0_0 .net *"_s863", 0 0, L_0xd57d40; 1 drivers +v0xce9e70_0 .net *"_s865", 0 0, L_0xd57de0; 1 drivers +v0xce9f10_0 .net *"_s867", 0 0, L_0xd57e80; 1 drivers +v0xcea7f0_0 .net *"_s869", 0 0, L_0xd57f20; 1 drivers +v0xcea870_0 .net *"_s870", 0 0, C4<0>; 1 drivers +v0xcea100_0 .net *"_s873", 0 0, L_0xd585b0; 1 drivers +v0xcea1a0_0 .net *"_s875", 0 0, L_0xd58650; 1 drivers +v0xcea240_0 .net *"_s877", 0 0, L_0xd586f0; 1 drivers +v0xcea2e0_0 .net *"_s883", 0 0, L_0xd573c0; 1 drivers +v0xcea380_0 .net *"_s885", 0 0, L_0xd598f0; 1 drivers +v0xcea420_0 .net *"_s887", 0 0, L_0xd58c00; 1 drivers +v0xcea4c0_0 .net *"_s889", 0 0, L_0xd58ca0; 1 drivers +v0xcea560_0 .net *"_s890", 0 0, C4<0>; 1 drivers +v0xcea600_0 .net *"_s893", 0 0, L_0xd58d40; 1 drivers +v0xcea6a0_0 .net *"_s895", 0 0, L_0xd58de0; 1 drivers +v0xcea740_0 .net *"_s897", 0 0, L_0xd58e80; 1 drivers +v0xceb040_0 .net *"_s903", 0 0, L_0xd59470; 1 drivers +v0xcea8f0_0 .net *"_s905", 0 0, L_0xd59510; 1 drivers +v0xcea990_0 .net *"_s907", 0 0, L_0xd595b0; 1 drivers +v0xceaa30_0 .net *"_s909", 0 0, L_0xd59650; 1 drivers +v0xceaad0_0 .net *"_s910", 0 0, C4<0>; 1 drivers +v0xceab70_0 .net *"_s913", 0 0, L_0xd596f0; 1 drivers +v0xceac10_0 .net *"_s915", 0 0, L_0xd59790; 1 drivers +v0xceacb0_0 .net *"_s917", 0 0, L_0xd59830; 1 drivers +v0xcead50_0 .net *"_s923", 0 0, L_0xd58510; 1 drivers +v0xceadf0_0 .net *"_s925", 0 0, L_0xd59990; 1 drivers +v0xceae90_0 .net *"_s927", 0 0, L_0xd59a30; 1 drivers +v0xceaf30_0 .net *"_s929", 0 0, L_0xd59ad0; 1 drivers +v0xceb870_0 .net *"_s930", 0 0, C4<0>; 1 drivers +v0xceb0c0_0 .net *"_s933", 0 0, L_0xd5a1b0; 1 drivers +v0xceb160_0 .net *"_s935", 0 0, L_0xd5a250; 1 drivers +v0xceb200_0 .net *"_s937", 0 0, L_0xd5a2f0; 1 drivers +v0xceb2a0_0 .net *"_s943", 0 0, L_0xd5a8e0; 1 drivers +v0xceb340_0 .net *"_s945", 0 0, L_0xd5a980; 1 drivers +v0xceb3e0_0 .net *"_s947", 0 0, L_0xd5aa20; 1 drivers +v0xceb480_0 .net *"_s949", 0 0, L_0xd5aac0; 1 drivers +v0xceb520_0 .net *"_s950", 0 0, C4<0>; 1 drivers +v0xceb5c0_0 .net *"_s953", 0 0, L_0xd5ab60; 1 drivers +v0xceb660_0 .net *"_s955", 0 0, L_0xd5ac00; 1 drivers +v0xceb700_0 .net *"_s957", 0 0, L_0xd59bb0; 1 drivers +v0xceb7a0_0 .net "carryout", 0 0, L_0xd43340; 1 drivers +v0xcec110_0 .net "command", 2 0, C4; 0 drivers +RS_0x7fe6cc2f6678/0/0 .resolv tri, L_0xcf09e0, L_0xcf36b0, L_0xcf6640, L_0xcf9390; +RS_0x7fe6cc2f6678/0/4 .resolv tri, L_0xcf9a20, L_0xcfefa0, L_0xcfd510, L_0xd04030; +RS_0x7fe6cc2f6678/0/8 .resolv tri, L_0xd046c0, L_0xd09930, L_0xd09f70, L_0xd0f120; +RS_0x7fe6cc2f6678/0/12 .resolv tri, L_0xd0f7b0, L_0xd14ae0, L_0xd151c0, L_0xd03f20; +RS_0x7fe6cc2f6678/0/16 .resolv tri, L_0xd1b210, L_0xd1fe50, L_0xd203c0, L_0xd254e0; +RS_0x7fe6cc2f6678/0/20 .resolv tri, L_0xd25aa0, L_0xd2ac80, L_0xd2b290, L_0xd30410; +RS_0x7fe6cc2f6678/0/24 .resolv tri, L_0xd30a70, L_0xd35c20, L_0xd362d0, L_0xd3b310; +RS_0x7fe6cc2f6678/0/28 .resolv tri, L_0xd3ba10, L_0xd40aa0, L_0xd411f0, C4; +RS_0x7fe6cc2f6678/1/0 .resolv tri, RS_0x7fe6cc2f6678/0/0, RS_0x7fe6cc2f6678/0/4, RS_0x7fe6cc2f6678/0/8, RS_0x7fe6cc2f6678/0/12; +RS_0x7fe6cc2f6678/1/4 .resolv tri, RS_0x7fe6cc2f6678/0/16, RS_0x7fe6cc2f6678/0/20, RS_0x7fe6cc2f6678/0/24, RS_0x7fe6cc2f6678/0/28; +RS_0x7fe6cc2f6678 .resolv tri, RS_0x7fe6cc2f6678/1/0, RS_0x7fe6cc2f6678/1/4, C4, C4; +v0xca6890_0 .net8 "cout", 31 0, RS_0x7fe6cc2f6678; 31 drivers +v0xca6910_0 .net "operandA", 31 0, C4; 0 drivers +v0xca69b0_0 .net "operandB", 31 0, C4; 0 drivers +v0xca6a50_0 .net "overflow", 0 0, L_0xb75390; 1 drivers +v0xca6af0_0 .net "resMux0", 7 0, L_0xd46d60; 1 drivers +v0xca6ba0_0 .net "resMux1", 7 0, L_0xd45ce0; 1 drivers +v0xca6c50_0 .net "resMux10", 7 0, L_0xd4d360; 1 drivers +v0xca6d00_0 .net "resMux11", 7 0, L_0xd4c960; 1 drivers +v0xca6d80_0 .net "resMux12", 7 0, L_0xd4e750; 1 drivers +v0xca6e30_0 .net "resMux13", 7 0, L_0xd4dae0; 1 drivers +v0xca6eb0_0 .net "resMux14", 7 0, L_0xd4a270; 1 drivers +v0xca6f60_0 .net "resMux15", 7 0, L_0xd4fdc0; 1 drivers +v0xca6fe0_0 .net "resMux16", 7 0, L_0xd51910; 1 drivers +v0xceb8f0_0 .net "resMux17", 7 0, L_0xd527c0; 1 drivers +v0xceb970_0 .net "resMux18", 7 0, L_0xd52b00; 1 drivers +v0xceba20_0 .net "resMux19", 7 0, L_0xd52180; 1 drivers +v0xcebaa0_0 .net "resMux2", 7 0, L_0xd48820; 1 drivers +v0xcebb50_0 .net "resMux20", 7 0, L_0xd53fd0; 1 drivers +v0xcebc00_0 .net "resMux21", 7 0, L_0xd54e40; 1 drivers +v0xcebc80_0 .net "resMux22", 7 0, L_0xd55310; 1 drivers +v0xcebd30_0 .net "resMux23", 7 0, L_0xd547e0; 1 drivers +v0xcebdb0_0 .net "resMux24", 7 0, L_0xd56840; 1 drivers +v0xcebe60_0 .net "resMux25", 7 0, L_0xd576d0; 1 drivers +v0xcebf10_0 .net "resMux26", 7 0, L_0xd588e0; 1 drivers +v0xcebf90_0 .net "resMux27", 7 0, L_0xd58790; 1 drivers +v0xcec040_0 .net "resMux28", 7 0, L_0xd58f20; 1 drivers +v0xceda90_0 .net "resMux29", 7 0, L_0xd57fc0; 1 drivers +v0xced1a0_0 .net "resMux3", 7 0, L_0xd47c60; 1 drivers +v0xced250_0 .net "resMux30", 7 0, L_0xd5a390; 1 drivers +v0xced300_0 .net "resMux31", 7 0, L_0xd59c50; 1 drivers +v0xced3b0_0 .net "resMux4", 7 0, L_0xd46330; 1 drivers +v0xced460_0 .net "resMux5", 7 0, L_0xd49b50; 1 drivers +v0xced510_0 .net "resMux6", 7 0, L_0xd4ad70; 1 drivers +v0xced5c0_0 .net "resMux7", 7 0, L_0xd4b4a0; 1 drivers +v0xced670_0 .net "resMux8", 7 0, L_0xd4c140; 1 drivers +v0xced720_0 .net "resMux9", 7 0, L_0xd4bbf0; 1 drivers +RS_0x7fe6cc2f6738/0/0 .resolv tri, L_0xcf0940, L_0xcf35c0, L_0xcf65a0, L_0xcf9260; +RS_0x7fe6cc2f6738/0/4 .resolv tri, L_0xcfc130, L_0xcfef00, L_0xd014b0, L_0xd03e80; +RS_0x7fe6cc2f6738/0/8 .resolv tri, L_0xd06bb0, L_0xd09890, L_0xd0c4c0, L_0xd0f080; +RS_0x7fe6cc2f6738/0/12 .resolv tri, L_0xd11cb0, L_0xd14a40, L_0xd17770, L_0xd1a4b0; +RS_0x7fe6cc2f6738/0/16 .resolv tri, L_0xd1d510, L_0xd1fdb0, L_0xd227a0, L_0xd25440; +RS_0x7fe6cc2f6738/0/20 .resolv tri, L_0xd28070, L_0xd2abe0, L_0xd2d820, L_0xd30370; +RS_0x7fe6cc2f6738/0/24 .resolv tri, L_0xd32fa0, L_0xd35b80, L_0xd386e0, L_0xd3b270; +RS_0x7fe6cc2f6738/0/28 .resolv tri, L_0xd3de70, L_0xd40a00, L_0xd43520, L_0xd460b0; +RS_0x7fe6cc2f6738/1/0 .resolv tri, RS_0x7fe6cc2f6738/0/0, RS_0x7fe6cc2f6738/0/4, RS_0x7fe6cc2f6738/0/8, RS_0x7fe6cc2f6738/0/12; +RS_0x7fe6cc2f6738/1/4 .resolv tri, RS_0x7fe6cc2f6738/0/16, RS_0x7fe6cc2f6738/0/20, RS_0x7fe6cc2f6738/0/24, RS_0x7fe6cc2f6738/0/28; +RS_0x7fe6cc2f6738 .resolv tri, RS_0x7fe6cc2f6738/1/0, RS_0x7fe6cc2f6738/1/4, C4, C4; +v0xced7d0_0 .net8 "res_premux", 31 0, RS_0x7fe6cc2f6738; 32 drivers +RS_0x7fe6cc2f6768/0/0 .resolv tri, L_0xd471e0, L_0xd477c0, L_0xd48220, L_0xd48b90; +RS_0x7fe6cc2f6768/0/4 .resolv tri, L_0xd49600, L_0xd491c0, L_0xd4b880, L_0xd4a740; +RS_0x7fe6cc2f6768/0/8 .resolv tri, L_0xd4c5a0, L_0xd4d770, L_0xd4e120, L_0xd4ebb0; +RS_0x7fe6cc2f6768/0/12 .resolv tri, L_0xd4f5a0, L_0xd49ce0, L_0xd4f870, L_0xd4f0b0; +RS_0x7fe6cc2f6768/0/16 .resolv tri, L_0xd51d70, L_0xd51470, L_0xd52f10, L_0xd53490; +RS_0x7fe6cc2f6768/0/20 .resolv tri, L_0xd54fb0, L_0xd53b10, L_0xd55770, L_0xd55ce0; +RS_0x7fe6cc2f6768/0/24 .resolv tri, L_0xd56ca0, L_0xd56130, L_0xd57c50, L_0xd572d0; +RS_0x7fe6cc2f6768/0/28 .resolv tri, L_0xd59380, L_0xd58420, L_0xd5a7f0, L_0xd5a0b0; +RS_0x7fe6cc2f6768/1/0 .resolv tri, RS_0x7fe6cc2f6768/0/0, RS_0x7fe6cc2f6768/0/4, RS_0x7fe6cc2f6768/0/8, RS_0x7fe6cc2f6768/0/12; +RS_0x7fe6cc2f6768/1/4 .resolv tri, RS_0x7fe6cc2f6768/0/16, RS_0x7fe6cc2f6768/0/20, RS_0x7fe6cc2f6768/0/24, RS_0x7fe6cc2f6768/0/28; +RS_0x7fe6cc2f6768 .resolv tri, RS_0x7fe6cc2f6768/1/0, RS_0x7fe6cc2f6768/1/4, C4, C4; +v0xced850_0 .net8 "result", 31 0, RS_0x7fe6cc2f6768; 32 drivers +v0xced8d0_0 .net "temp", 0 0, L_0xb7dd60; 1 drivers +v0xced950_0 .net "zero", 0 0, C4; 0 drivers +L_0xcf0940 .part/pv L_0xcf0760, 0, 1, 32; +L_0xcf09e0 .part/pv L_0xcf0850, 0, 1, 32; +L_0xcf0a80 .part C4, 0, 1; +L_0xceee60 .part C4, 0, 1; +L_0xcf35c0 .part/pv L_0xcf33e0, 1, 1, 32; +L_0xcf36b0 .part/pv L_0xcf34d0, 1, 1, 32; +L_0xcf37e0 .part C4, 1, 1; +L_0xcf1aa0 .part C4, 1, 1; +L_0xcf3ca0 .part RS_0x7fe6cc2f6678, 0, 1; +L_0xcf65a0 .part/pv L_0xcf63c0, 2, 1, 32; +L_0xcf6640 .part/pv L_0xcf64b0, 2, 1, 32; +L_0xcf6770 .part C4, 2, 1; +L_0xcf48d0 .part C4, 2, 1; +L_0xcf4a90 .part RS_0x7fe6cc2f6678, 1, 1; +L_0xcf9260 .part/pv L_0xcf9080, 3, 1, 32; +L_0xcf9390 .part/pv L_0xcf9170, 3, 1, 32; +L_0xcf94c0 .part C4, 3, 1; +L_0xcf9770 .part C4, 3, 1; +L_0xcf9ac0 .part RS_0x7fe6cc2f6678, 2, 1; +L_0xcfc130 .part/pv L_0xcfbf50, 4, 1, 32; +L_0xcf9a20 .part/pv L_0xcfc040, 4, 1, 32; +L_0xcfc390 .part C4, 4, 1; +L_0xcfc1d0 .part C4, 4, 1; +L_0xcfa6f0 .part RS_0x7fe6cc2f6678, 3, 1; +L_0xcfef00 .part/pv L_0xcfed20, 5, 1, 32; +L_0xcfefa0 .part/pv L_0xcfee10, 5, 1, 32; +L_0xcfa530 .part C4, 5, 1; +L_0xcfd350 .part C4, 5, 1; +L_0xcff040 .part RS_0x7fe6cc2f6678, 4, 1; +L_0xd014b0 .part/pv L_0xd012d0, 6, 1, 32; +L_0xcfd510 .part/pv L_0xd013c0, 6, 1, 32; +L_0xd01650 .part C4, 6, 1; +L_0xd01550 .part C4, 6, 1; +L_0xd00100 .part RS_0x7fe6cc2f6678, 5, 1; +L_0xd03e80 .part/pv L_0xd03ca0, 7, 1, 32; +L_0xd04030 .part/pv L_0xd03d90, 7, 1, 32; +L_0xd01b10 .part C4, 7, 1; +L_0xd04410 .part C4, 7, 1; +L_0xd040d0 .part RS_0x7fe6cc2f6678, 6, 1; +L_0xd06bb0 .part/pv L_0xd069d0, 8, 1, 32; +L_0xd046c0 .part/pv L_0xd06ac0, 8, 1, 32; +L_0xd04760 .part C4, 8, 1; +L_0xcfc280 .part C4, 8, 1; +L_0xd050b0 .part RS_0x7fe6cc2f6678, 7, 1; +L_0xd09890 .part/pv L_0xd096b0, 9, 1, 32; +L_0xd09930 .part/pv L_0xd097a0, 9, 1, 32; +L_0xd07530 .part C4, 9, 1; +L_0xd075d0 .part C4, 9, 1; +L_0xd07d80 .part RS_0x7fe6cc2f6678, 8, 1; +L_0xd0c4c0 .part/pv L_0xd0c2e0, 10, 1, 32; +L_0xd09f70 .part/pv L_0xd0c3d0, 10, 1, 32; +L_0xd0a010 .part C4, 10, 1; +L_0xd0a970 .part C4, 10, 1; +L_0xd0ab30 .part RS_0x7fe6cc2f6678, 9, 1; +L_0xd0f080 .part/pv L_0xd0eea0, 11, 1, 32; +L_0xd0f120 .part/pv L_0xd0ef90, 11, 1, 32; +L_0xd0ccd0 .part C4, 11, 1; +L_0xd0d590 .part C4, 11, 1; +L_0xd0d750 .part RS_0x7fe6cc2f6678, 10, 1; +L_0xd11cb0 .part/pv L_0xd11ad0, 12, 1, 32; +L_0xd0f7b0 .part/pv L_0xd11bc0, 12, 1, 32; +L_0xd0f850 .part C4, 12, 1; +L_0xd0f8f0 .part C4, 12, 1; +L_0xd10110 .part RS_0x7fe6cc2f6678, 11, 1; +L_0xd14a40 .part/pv L_0xd14860, 13, 1, 32; +L_0xd14ae0 .part/pv L_0xd14950, 13, 1, 32; +L_0xd12560 .part C4, 13, 1; +L_0xd12e90 .part C4, 13, 1; +L_0xd13050 .part RS_0x7fe6cc2f6678, 12, 1; +L_0xd17770 .part/pv L_0xd17590, 14, 1, 32; +L_0xd151c0 .part/pv L_0xd17680, 14, 1, 32; +L_0xd15260 .part C4, 14, 1; +L_0xd15300 .part C4, 14, 1; +L_0xd15bf0 .part RS_0x7fe6cc2f6678, 13, 1; +L_0xd1a4b0 .part/pv L_0xd1a2d0, 15, 1, 32; +L_0xd03f20 .part/pv L_0xd1a3c0, 15, 1, 32; +L_0xd17c60 .part C4, 15, 1; +L_0xd18940 .part C4, 15, 1; +L_0xd024d0 .part RS_0x7fe6cc2f6678, 14, 1; +L_0xd1d510 .part/pv L_0xd1d330, 16, 1, 32; +L_0xd1b210 .part/pv L_0xd1d420, 16, 1, 32; +L_0xd1b2b0 .part C4, 16, 1; +L_0xd1b970 .part C4, 16, 1; +L_0xd1bb30 .part RS_0x7fe6cc2f6678, 15, 1; +L_0xd1fdb0 .part/pv L_0xd1fbd0, 17, 1, 32; +L_0xd1fe50 .part/pv L_0xd1fcc0, 17, 1, 32; +L_0xd1dc50 .part C4, 17, 1; +L_0xd1e420 .part C4, 17, 1; +L_0xd1e5e0 .part RS_0x7fe6cc2f6678, 16, 1; +L_0xd227a0 .part/pv L_0xd225c0, 18, 1, 32; +L_0xd203c0 .part/pv L_0xd226b0, 18, 1, 32; +L_0xd20460 .part C4, 18, 1; +L_0xd20e50 .part C4, 18, 1; +L_0xd22a50 .part RS_0x7fe6cc2f6678, 17, 1; +L_0xd25440 .part/pv L_0xd25260, 19, 1, 32; +L_0xd254e0 .part/pv L_0xd25350, 19, 1, 32; +L_0xd22d30 .part C4, 19, 1; +L_0xd238e0 .part C4, 19, 1; +L_0xd23aa0 .part RS_0x7fe6cc2f6678, 18, 1; +L_0xd28070 .part/pv L_0xd27e90, 20, 1, 32; +L_0xd25aa0 .part/pv L_0xd27f80, 20, 1, 32; +L_0xd25b40 .part C4, 20, 1; +L_0xd26520 .part C4, 20, 1; +L_0xd266e0 .part RS_0x7fe6cc2f6678, 19, 1; +L_0xd2abe0 .part/pv L_0xd2aa00, 21, 1, 32; +L_0xd2ac80 .part/pv L_0xd2aaf0, 21, 1, 32; +L_0xd28650 .part C4, 21, 1; +L_0xd28900 .part C4, 21, 1; +L_0xd29100 .part RS_0x7fe6cc2f6678, 20, 1; +L_0xd2d820 .part/pv L_0xd2d640, 22, 1, 32; +L_0xd2b290 .part/pv L_0xd2d730, 22, 1, 32; +L_0xd2b330 .part C4, 22, 1; +L_0xd2bc80 .part C4, 22, 1; +L_0xd2be40 .part RS_0x7fe6cc2f6678, 21, 1; +L_0xd30370 .part/pv L_0xd2d550, 23, 1, 32; +L_0xd30410 .part/pv L_0xd30280, 23, 1, 32; +L_0xd2de60 .part C4, 23, 1; +L_0xd2e110 .part C4, 23, 1; +L_0xd2e880 .part RS_0x7fe6cc2f6678, 22, 1; +L_0xd32fa0 .part/pv L_0xd32e10, 24, 1, 32; +L_0xd30a70 .part/pv L_0xd32eb0, 24, 1, 32; +L_0xd30b10 .part C4, 24, 1; +L_0xd31430 .part C4, 24, 1; +L_0xd315f0 .part RS_0x7fe6cc2f6678, 23, 1; +L_0xd35b80 .part/pv L_0xd32d60, 25, 1, 32; +L_0xd35c20 .part/pv L_0xd35a90, 25, 1, 32; +L_0xd33630 .part C4, 25, 1; +L_0xd34040 .part C4, 25, 1; +L_0xd34200 .part RS_0x7fe6cc2f6678, 24, 1; +L_0xd386e0 .part/pv L_0xd38550, 26, 1, 32; +L_0xd362d0 .part/pv L_0xd385f0, 26, 1, 32; +L_0xd36370 .part C4, 26, 1; +L_0xd36620 .part C4, 26, 1; +L_0xd36ba0 .part RS_0x7fe6cc2f6678, 25, 1; +L_0xd3b270 .part/pv L_0xd38450, 27, 1, 32; +L_0xd3b310 .part/pv L_0xd3b180, 27, 1, 32; +L_0xd38dc0 .part C4, 27, 1; +L_0xd39710 .part C4, 27, 1; +L_0xd398d0 .part RS_0x7fe6cc2f6678, 26, 1; +L_0xd3de70 .part/pv L_0xd3b0a0, 28, 1, 32; +L_0xd3ba10 .part/pv L_0xd3dd80, 28, 1, 32; +L_0xd3bab0 .part C4, 28, 1; +L_0xd3bd60 .part C4, 28, 1; +L_0xd3c2f0 .part RS_0x7fe6cc2f6678, 27, 1; +L_0xd40a00 .part/pv L_0xd3dbe0, 29, 1, 32; +L_0xd40aa0 .part/pv L_0xd40960, 29, 1, 32; +L_0xd3e5a0 .part C4, 29, 1; +L_0xd3eea0 .part C4, 29, 1; +L_0xd3f060 .part RS_0x7fe6cc2f6678, 28, 1; +L_0xd43520 .part/pv L_0xd40830, 30, 1, 32; +L_0xd411f0 .part/pv L_0xd43430, 30, 1, 32; +L_0xd41290 .part C4, 30, 1; +L_0xd41a80 .part C4, 30, 1; +L_0xd41c40 .part RS_0x7fe6cc2f6678, 29, 1; +L_0xd460b0 .part/pv L_0xd43250, 31, 1, 32; +L_0xd1a550 .part C4, 31, 1; +L_0xd445e0 .part C4, 31, 1; +L_0xd440b0 .part RS_0x7fe6cc2f6678, 30, 1; +L_0xd1a5f0 .part RS_0x7fe6cc2f6678, 30, 1; +L_0xd1a6b0 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd1b000 .part RS_0x7fe6cc2f6738, 0, 1; +L_0xd1b0a0 .part RS_0x7fe6cc2f6738, 0, 1; +L_0xd1b140 .part RS_0x7fe6cc2f6738, 0, 1; +L_0xd470a0 .part RS_0x7fe6cc2f6738, 0, 1; +L_0xd46b80 .part RS_0x7fe6cc2f6738, 0, 1; +L_0xd46c20 .part RS_0x7fe6cc2f6738, 0, 1; +L_0xd46cc0 .part RS_0x7fe6cc2f6738, 0, 1; +LS_0xd46d60_0_0 .concat [ 1 1 1 1], L_0xd46cc0, L_0xd46c20, L_0xd46b80, L_0xb7dd60; +LS_0xd46d60_0_4 .concat [ 1 1 1 1], L_0xd470a0, L_0xd1b140, L_0xd1b0a0, L_0xd1b000; +L_0xd46d60 .concat [ 4 4 0 0], LS_0xd46d60_0_0, LS_0xd46d60_0_4; +L_0xd471e0 .part/pv L_0xd47140, 0, 1, 32; +L_0xd472d0 .part RS_0x7fe6cc2f6738, 1, 1; +L_0xd47370 .part RS_0x7fe6cc2f6738, 1, 1; +L_0xd47410 .part RS_0x7fe6cc2f6738, 1, 1; +L_0xd474b0 .part RS_0x7fe6cc2f6738, 1, 1; +L_0xd47590 .part RS_0x7fe6cc2f6738, 1, 1; +L_0xd45ba0 .part RS_0x7fe6cc2f6738, 1, 1; +L_0xd45c40 .part RS_0x7fe6cc2f6738, 1, 1; +LS_0xd45ce0_0_0 .concat [ 1 1 1 1], L_0xd45c40, L_0xd45ba0, L_0xd47590, C4<0>; +LS_0xd45ce0_0_4 .concat [ 1 1 1 1], L_0xd474b0, L_0xd47410, L_0xd47370, L_0xd472d0; +L_0xd45ce0 .concat [ 4 4 0 0], LS_0xd45ce0_0_0, LS_0xd45ce0_0_4; +L_0xd477c0 .part/pv L_0xd47720, 1, 1, 32; +L_0xd47900 .part RS_0x7fe6cc2f6738, 2, 1; +L_0xd479a0 .part RS_0x7fe6cc2f6738, 2, 1; +L_0xd47a40 .part RS_0x7fe6cc2f6738, 2, 1; +L_0xd47ae0 .part RS_0x7fe6cc2f6738, 2, 1; +L_0xce2190 .part RS_0x7fe6cc2f6738, 2, 1; +L_0xd480e0 .part RS_0x7fe6cc2f6738, 2, 1; +L_0xd48780 .part RS_0x7fe6cc2f6738, 2, 1; +LS_0xd48820_0_0 .concat [ 1 1 1 1], L_0xd48780, L_0xd480e0, L_0xce2190, C4<0>; +LS_0xd48820_0_4 .concat [ 1 1 1 1], L_0xd47ae0, L_0xd47a40, L_0xd479a0, L_0xd47900; +L_0xd48820 .concat [ 4 4 0 0], LS_0xd48820_0_0, LS_0xd48820_0_4; +L_0xd48220 .part/pv L_0xd48180, 2, 1, 32; +L_0xd48310 .part RS_0x7fe6cc2f6738, 3, 1; +L_0xd483b0 .part RS_0x7fe6cc2f6738, 3, 1; +L_0xd48450 .part RS_0x7fe6cc2f6738, 3, 1; +L_0xd484f0 .part RS_0x7fe6cc2f6738, 3, 1; +L_0xd485d0 .part RS_0x7fe6cc2f6738, 3, 1; +L_0xd48670 .part RS_0x7fe6cc2f6738, 3, 1; +L_0xd47bc0 .part RS_0x7fe6cc2f6738, 3, 1; +LS_0xd47c60_0_0 .concat [ 1 1 1 1], L_0xd47bc0, L_0xd48670, L_0xd485d0, C4<0>; +LS_0xd47c60_0_4 .concat [ 1 1 1 1], L_0xd484f0, L_0xd48450, L_0xd483b0, L_0xd48310; +L_0xd47c60 .concat [ 4 4 0 0], LS_0xd47c60_0_0, LS_0xd47c60_0_4; +L_0xd48b90 .part/pv L_0xd48020, 3, 1, 32; +L_0xd48cc0 .part RS_0x7fe6cc2f6738, 4, 1; +L_0xd48d60 .part RS_0x7fe6cc2f6738, 4, 1; +L_0xd48e00 .part RS_0x7fe6cc2f6738, 4, 1; +L_0xd48ea0 .part RS_0x7fe6cc2f6738, 4, 1; +L_0xd46150 .part RS_0x7fe6cc2f6738, 4, 1; +L_0xd461f0 .part RS_0x7fe6cc2f6738, 4, 1; +L_0xd46290 .part RS_0x7fe6cc2f6738, 4, 1; +LS_0xd46330_0_0 .concat [ 1 1 1 1], L_0xd46290, L_0xd461f0, L_0xd46150, C4<0>; +LS_0xd46330_0_4 .concat [ 1 1 1 1], L_0xd48ea0, L_0xd48e00, L_0xd48d60, L_0xd48cc0; +L_0xd46330 .concat [ 4 4 0 0], LS_0xd46330_0_0, LS_0xd46330_0_4; +L_0xd49600 .part/pv L_0xd49560, 4, 1, 32; +L_0xd496f0 .part RS_0x7fe6cc2f6738, 5, 1; +L_0xd49790 .part RS_0x7fe6cc2f6738, 5, 1; +L_0xd49830 .part RS_0x7fe6cc2f6738, 5, 1; +L_0xd498d0 .part RS_0x7fe6cc2f6738, 5, 1; +L_0xd49970 .part RS_0x7fe6cc2f6738, 5, 1; +L_0xd49a10 .part RS_0x7fe6cc2f6738, 5, 1; +L_0xd49ab0 .part RS_0x7fe6cc2f6738, 5, 1; +LS_0xd49b50_0_0 .concat [ 1 1 1 1], L_0xd49ab0, L_0xd49a10, L_0xd49970, C4<0>; +LS_0xd49b50_0_4 .concat [ 1 1 1 1], L_0xd498d0, L_0xd49830, L_0xd49790, L_0xd496f0; +L_0xd49b50 .concat [ 4 4 0 0], LS_0xd49b50_0_0, LS_0xd49b50_0_4; +L_0xd491c0 .part/pv L_0xd49120, 5, 1, 32; +L_0xd492b0 .part RS_0x7fe6cc2f6738, 6, 1; +L_0xd49350 .part RS_0x7fe6cc2f6738, 6, 1; +L_0xd4a510 .part RS_0x7fe6cc2f6738, 6, 1; +L_0xd4a5b0 .part RS_0x7fe6cc2f6738, 6, 1; +L_0xd4ab90 .part RS_0x7fe6cc2f6738, 6, 1; +L_0xd4ac30 .part RS_0x7fe6cc2f6738, 6, 1; +L_0xd4acd0 .part RS_0x7fe6cc2f6738, 6, 1; +LS_0xd4ad70_0_0 .concat [ 1 1 1 1], L_0xd4acd0, L_0xd4ac30, L_0xd4ab90, C4<0>; +LS_0xd4ad70_0_4 .concat [ 1 1 1 1], L_0xd4a5b0, L_0xd4a510, L_0xd49350, L_0xd492b0; +L_0xd4ad70 .concat [ 4 4 0 0], LS_0xd4ad70_0_0, LS_0xd4ad70_0_4; +L_0xd4b880 .part/pv L_0xd4b7e0, 6, 1, 32; +L_0xd4b970 .part RS_0x7fe6cc2f6738, 7, 1; +L_0xd4b0e0 .part RS_0x7fe6cc2f6738, 7, 1; +L_0xd4b180 .part RS_0x7fe6cc2f6738, 7, 1; +L_0xd4b220 .part RS_0x7fe6cc2f6738, 7, 1; +L_0xd4b2c0 .part RS_0x7fe6cc2f6738, 7, 1; +L_0xd4b360 .part RS_0x7fe6cc2f6738, 7, 1; +L_0xd4b400 .part RS_0x7fe6cc2f6738, 7, 1; +LS_0xd4b4a0_0_0 .concat [ 1 1 1 1], L_0xd4b400, L_0xd4b360, L_0xd4b2c0, C4<0>; +LS_0xd4b4a0_0_4 .concat [ 1 1 1 1], L_0xd4b220, L_0xd4b180, L_0xd4b0e0, L_0xd4b970; +L_0xd4b4a0 .concat [ 4 4 0 0], LS_0xd4b4a0_0_0, LS_0xd4b4a0_0_4; +L_0xd4a740 .part/pv L_0xd4a6a0, 7, 1, 32; +L_0xd4a8f0 .part RS_0x7fe6cc2f6738, 8, 1; +L_0xd4a990 .part RS_0x7fe6cc2f6738, 8, 1; +L_0xd4aa30 .part RS_0x7fe6cc2f6738, 8, 1; +L_0xd4aad0 .part RS_0x7fe6cc2f6738, 8, 1; +L_0xd4bf60 .part RS_0x7fe6cc2f6738, 8, 1; +L_0xd4c000 .part RS_0x7fe6cc2f6738, 8, 1; +L_0xd4c0a0 .part RS_0x7fe6cc2f6738, 8, 1; +LS_0xd4c140_0_0 .concat [ 1 1 1 1], L_0xd4c0a0, L_0xd4c000, L_0xd4bf60, C4<0>; +LS_0xd4c140_0_4 .concat [ 1 1 1 1], L_0xd4aad0, L_0xd4aa30, L_0xd4a990, L_0xd4a8f0; +L_0xd4c140 .concat [ 4 4 0 0], LS_0xd4c140_0_0, LS_0xd4c140_0_4; +L_0xd4c5a0 .part/pv L_0xd4c500, 8, 1, 32; +L_0xd4ce60 .part RS_0x7fe6cc2f6738, 9, 1; +L_0xd4c640 .part RS_0x7fe6cc2f6738, 9, 1; +L_0xd4c6e0 .part RS_0x7fe6cc2f6738, 9, 1; +L_0xd4c780 .part RS_0x7fe6cc2f6738, 9, 1; +L_0xd4ba10 .part RS_0x7fe6cc2f6738, 9, 1; +L_0xd4bab0 .part RS_0x7fe6cc2f6738, 9, 1; +L_0xd4bb50 .part RS_0x7fe6cc2f6738, 9, 1; +LS_0xd4bbf0_0_0 .concat [ 1 1 1 1], L_0xd4bb50, L_0xd4bab0, L_0xd4ba10, C4<0>; +LS_0xd4bbf0_0_4 .concat [ 1 1 1 1], L_0xd4c780, L_0xd4c6e0, L_0xd4c640, L_0xd4ce60; +L_0xd4bbf0 .concat [ 4 4 0 0], LS_0xd4bbf0_0_0, LS_0xd4bbf0_0_4; +L_0xd4d770 .part/pv L_0xd4d6d0, 9, 1, 32; +L_0xd4cf00 .part RS_0x7fe6cc2f6738, 10, 1; +L_0xd4cfa0 .part RS_0x7fe6cc2f6738, 10, 1; +L_0xd4d040 .part RS_0x7fe6cc2f6738, 10, 1; +L_0xd4d0e0 .part RS_0x7fe6cc2f6738, 10, 1; +L_0xd4d180 .part RS_0x7fe6cc2f6738, 10, 1; +L_0xd4d220 .part RS_0x7fe6cc2f6738, 10, 1; +L_0xd4d2c0 .part RS_0x7fe6cc2f6738, 10, 1; +LS_0xd4d360_0_0 .concat [ 1 1 1 1], L_0xd4d2c0, L_0xd4d220, L_0xd4d180, C4<0>; +LS_0xd4d360_0_4 .concat [ 1 1 1 1], L_0xd4d0e0, L_0xd4d040, L_0xd4cfa0, L_0xd4cf00; +L_0xd4d360 .concat [ 4 4 0 0], LS_0xd4d360_0_0, LS_0xd4d360_0_4; +L_0xd4e120 .part/pv L_0xd4e080, 10, 1, 32; +L_0xd4e210 .part RS_0x7fe6cc2f6738, 11, 1; +L_0xd4d860 .part RS_0x7fe6cc2f6738, 11, 1; +L_0xd4d900 .part RS_0x7fe6cc2f6738, 11, 1; +L_0xd4d9a0 .part RS_0x7fe6cc2f6738, 11, 1; +L_0xd4dfb0 .part RS_0x7fe6cc2f6738, 11, 1; +L_0xd4c820 .part RS_0x7fe6cc2f6738, 11, 1; +L_0xd4c8c0 .part RS_0x7fe6cc2f6738, 11, 1; +LS_0xd4c960_0_0 .concat [ 1 1 1 1], L_0xd4c8c0, L_0xd4c820, L_0xd4dfb0, C4<0>; +LS_0xd4c960_0_4 .concat [ 1 1 1 1], L_0xd4d9a0, L_0xd4d900, L_0xd4d860, L_0xd4e210; +L_0xd4c960 .concat [ 4 4 0 0], LS_0xd4c960_0_0, LS_0xd4c960_0_4; +L_0xd4ebb0 .part/pv L_0xd4eb10, 11, 1, 32; +L_0xd4e2b0 .part RS_0x7fe6cc2f6738, 12, 1; +L_0xd4e350 .part RS_0x7fe6cc2f6738, 12, 1; +L_0xd4e3f0 .part RS_0x7fe6cc2f6738, 12, 1; +L_0xd4e490 .part RS_0x7fe6cc2f6738, 12, 1; +L_0xd4e570 .part RS_0x7fe6cc2f6738, 12, 1; +L_0xd4e610 .part RS_0x7fe6cc2f6738, 12, 1; +L_0xd4e6b0 .part RS_0x7fe6cc2f6738, 12, 1; +LS_0xd4e750_0_0 .concat [ 1 1 1 1], L_0xd4e6b0, L_0xd4e610, L_0xd4e570, C4<0>; +LS_0xd4e750_0_4 .concat [ 1 1 1 1], L_0xd4e490, L_0xd4e3f0, L_0xd4e350, L_0xd4e2b0; +L_0xd4e750 .concat [ 4 4 0 0], LS_0xd4e750_0_0, LS_0xd4e750_0_4; +L_0xd4f5a0 .part/pv L_0xd4f500, 12, 1, 32; +L_0xd4f640 .part RS_0x7fe6cc2f6738, 13, 1; +L_0xd4ec50 .part RS_0x7fe6cc2f6738, 13, 1; +L_0xd4ecf0 .part RS_0x7fe6cc2f6738, 13, 1; +L_0xd4ed90 .part RS_0x7fe6cc2f6738, 13, 1; +L_0xd4f3b0 .part RS_0x7fe6cc2f6738, 13, 1; +L_0xd4f450 .part RS_0x7fe6cc2f6738, 13, 1; +L_0xd4da40 .part RS_0x7fe6cc2f6738, 13, 1; +LS_0xd4dae0_0_0 .concat [ 1 1 1 1], L_0xd4da40, L_0xd4f450, L_0xd4f3b0, C4<0>; +LS_0xd4dae0_0_4 .concat [ 1 1 1 1], L_0xd4ed90, L_0xd4ecf0, L_0xd4ec50, L_0xd4f640; +L_0xd4dae0 .concat [ 4 4 0 0], LS_0xd4dae0_0_0, LS_0xd4dae0_0_4; +L_0xd49ce0 .part/pv L_0xd4dea0, 13, 1, 32; +L_0xd49dd0 .part RS_0x7fe6cc2f6738, 14, 1; +L_0xd49e70 .part RS_0x7fe6cc2f6738, 14, 1; +L_0xd49f10 .part RS_0x7fe6cc2f6738, 14, 1; +L_0xd49fb0 .part RS_0x7fe6cc2f6738, 14, 1; +L_0xd4a090 .part RS_0x7fe6cc2f6738, 14, 1; +L_0xd4a130 .part RS_0x7fe6cc2f6738, 14, 1; +L_0xd4a1d0 .part RS_0x7fe6cc2f6738, 14, 1; +LS_0xd4a270_0_0 .concat [ 1 1 1 1], L_0xd4a1d0, L_0xd4a130, L_0xd4a090, C4<0>; +LS_0xd4a270_0_4 .concat [ 1 1 1 1], L_0xd49fb0, L_0xd49f10, L_0xd49e70, L_0xd49dd0; +L_0xd4a270 .concat [ 4 4 0 0], LS_0xd4a270_0_0, LS_0xd4a270_0_4; +L_0xd4f870 .part/pv L_0xd4f7d0, 14, 1, 32; +L_0xd4f960 .part RS_0x7fe6cc2f6738, 15, 1; +L_0xd4fa00 .part RS_0x7fe6cc2f6738, 15, 1; +L_0xd4faa0 .part RS_0x7fe6cc2f6738, 15, 1; +L_0xd4fb40 .part RS_0x7fe6cc2f6738, 15, 1; +L_0xd4fbe0 .part RS_0x7fe6cc2f6738, 15, 1; +L_0xd4fc80 .part RS_0x7fe6cc2f6738, 15, 1; +L_0xd4fd20 .part RS_0x7fe6cc2f6738, 15, 1; +LS_0xd4fdc0_0_0 .concat [ 1 1 1 1], L_0xd4fd20, L_0xd4fc80, L_0xd4fbe0, C4<0>; +LS_0xd4fdc0_0_4 .concat [ 1 1 1 1], L_0xd4fb40, L_0xd4faa0, L_0xd4fa00, L_0xd4f960; +L_0xd4fdc0 .concat [ 4 4 0 0], LS_0xd4fdc0_0_0, LS_0xd4fdc0_0_4; +L_0xd4f0b0 .part/pv L_0xd4f010, 15, 1, 32; +L_0xd4a7e0 .part RS_0x7fe6cc2f6738, 16, 1; +L_0xd50fc0 .part RS_0x7fe6cc2f6738, 16, 1; +L_0xd51060 .part RS_0x7fe6cc2f6738, 16, 1; +L_0xd51100 .part RS_0x7fe6cc2f6738, 16, 1; +L_0xd51730 .part RS_0x7fe6cc2f6738, 16, 1; +L_0xd517d0 .part RS_0x7fe6cc2f6738, 16, 1; +L_0xd51870 .part RS_0x7fe6cc2f6738, 16, 1; +LS_0xd51910_0_0 .concat [ 1 1 1 1], L_0xd51870, L_0xd517d0, L_0xd51730, C4<0>; +LS_0xd51910_0_4 .concat [ 1 1 1 1], L_0xd51100, L_0xd51060, L_0xd50fc0, L_0xd4a7e0; +L_0xd51910 .concat [ 4 4 0 0], LS_0xd51910_0_0, LS_0xd51910_0_4; +L_0xd51d70 .part/pv L_0xd51cd0, 16, 1, 32; +L_0xd52880 .part RS_0x7fe6cc2f6738, 17, 1; +L_0xd51e60 .part RS_0x7fe6cc2f6738, 17, 1; +L_0xd51f00 .part RS_0x7fe6cc2f6738, 17, 1; +L_0xd51fa0 .part RS_0x7fe6cc2f6738, 17, 1; +L_0xd525e0 .part RS_0x7fe6cc2f6738, 17, 1; +L_0xd52680 .part RS_0x7fe6cc2f6738, 17, 1; +L_0xd52720 .part RS_0x7fe6cc2f6738, 17, 1; +LS_0xd527c0_0_0 .concat [ 1 1 1 1], L_0xd52720, L_0xd52680, L_0xd525e0, C4<0>; +LS_0xd527c0_0_4 .concat [ 1 1 1 1], L_0xd51fa0, L_0xd51f00, L_0xd51e60, L_0xd52880; +L_0xd527c0 .concat [ 4 4 0 0], LS_0xd527c0_0_0, LS_0xd527c0_0_4; +L_0xd51470 .part/pv L_0xd513d0, 17, 1, 32; +L_0xd51560 .part RS_0x7fe6cc2f6738, 18, 1; +L_0xd51600 .part RS_0x7fe6cc2f6738, 18, 1; +L_0xd53350 .part RS_0x7fe6cc2f6738, 18, 1; +L_0xd533f0 .part RS_0x7fe6cc2f6738, 18, 1; +L_0xd52920 .part RS_0x7fe6cc2f6738, 18, 1; +L_0xd529c0 .part RS_0x7fe6cc2f6738, 18, 1; +L_0xd52a60 .part RS_0x7fe6cc2f6738, 18, 1; +LS_0xd52b00_0_0 .concat [ 1 1 1 1], L_0xd52a60, L_0xd529c0, L_0xd52920, C4<0>; +LS_0xd52b00_0_4 .concat [ 1 1 1 1], L_0xd533f0, L_0xd53350, L_0xd51600, L_0xd51560; +L_0xd52b00 .concat [ 4 4 0 0], LS_0xd52b00_0_0, LS_0xd52b00_0_4; +L_0xd52f10 .part/pv L_0xd52e70, 18, 1, 32; +L_0xd53000 .part RS_0x7fe6cc2f6738, 19, 1; +L_0xd530a0 .part RS_0x7fe6cc2f6738, 19, 1; +L_0xd53140 .part RS_0x7fe6cc2f6738, 19, 1; +L_0xd531e0 .part RS_0x7fe6cc2f6738, 19, 1; +L_0xd53280 .part RS_0x7fe6cc2f6738, 19, 1; +L_0xd52040 .part RS_0x7fe6cc2f6738, 19, 1; +L_0xd520e0 .part RS_0x7fe6cc2f6738, 19, 1; +LS_0xd52180_0_0 .concat [ 1 1 1 1], L_0xd520e0, L_0xd52040, L_0xd53280, C4<0>; +LS_0xd52180_0_4 .concat [ 1 1 1 1], L_0xd531e0, L_0xd53140, L_0xd530a0, L_0xd53000; +L_0xd52180 .concat [ 4 4 0 0], LS_0xd52180_0_0, LS_0xd52180_0_4; +L_0xd53490 .part/pv L_0xd52540, 19, 1, 32; +L_0xd53580 .part RS_0x7fe6cc2f6738, 20, 1; +L_0xd53620 .part RS_0x7fe6cc2f6738, 20, 1; +L_0xd536c0 .part RS_0x7fe6cc2f6738, 20, 1; +L_0xd53760 .part RS_0x7fe6cc2f6738, 20, 1; +L_0xd53df0 .part RS_0x7fe6cc2f6738, 20, 1; +L_0xd53e90 .part RS_0x7fe6cc2f6738, 20, 1; +L_0xd53f30 .part RS_0x7fe6cc2f6738, 20, 1; +LS_0xd53fd0_0_0 .concat [ 1 1 1 1], L_0xd53f30, L_0xd53e90, L_0xd53df0, C4<0>; +LS_0xd53fd0_0_4 .concat [ 1 1 1 1], L_0xd53760, L_0xd536c0, L_0xd53620, L_0xd53580; +L_0xd53fd0 .concat [ 4 4 0 0], LS_0xd53fd0_0_0, LS_0xd53fd0_0_4; +L_0xd54fb0 .part/pv L_0xd54390, 20, 1, 32; +L_0xd55050 .part RS_0x7fe6cc2f6738, 21, 1; +L_0xd54480 .part RS_0x7fe6cc2f6738, 21, 1; +L_0xd54520 .part RS_0x7fe6cc2f6738, 21, 1; +L_0xd545c0 .part RS_0x7fe6cc2f6738, 21, 1; +L_0xd54c60 .part RS_0x7fe6cc2f6738, 21, 1; +L_0xd54d00 .part RS_0x7fe6cc2f6738, 21, 1; +L_0xd54da0 .part RS_0x7fe6cc2f6738, 21, 1; +LS_0xd54e40_0_0 .concat [ 1 1 1 1], L_0xd54da0, L_0xd54d00, L_0xd54c60, C4<0>; +LS_0xd54e40_0_4 .concat [ 1 1 1 1], L_0xd545c0, L_0xd54520, L_0xd54480, L_0xd55050; +L_0xd54e40 .concat [ 4 4 0 0], LS_0xd54e40_0_0, LS_0xd54e40_0_4; +L_0xd53b10 .part/pv L_0xd53a70, 21, 1, 32; +L_0xd53c00 .part RS_0x7fe6cc2f6738, 22, 1; +L_0xd53ca0 .part RS_0x7fe6cc2f6738, 22, 1; +L_0xd53d40 .part RS_0x7fe6cc2f6738, 22, 1; +L_0xd55c40 .part RS_0x7fe6cc2f6738, 22, 1; +L_0xd55130 .part RS_0x7fe6cc2f6738, 22, 1; +L_0xd551d0 .part RS_0x7fe6cc2f6738, 22, 1; +L_0xd55270 .part RS_0x7fe6cc2f6738, 22, 1; +LS_0xd55310_0_0 .concat [ 1 1 1 1], L_0xd55270, L_0xd551d0, L_0xd55130, C4<0>; +LS_0xd55310_0_4 .concat [ 1 1 1 1], L_0xd55c40, L_0xd53d40, L_0xd53ca0, L_0xd53c00; +L_0xd55310 .concat [ 4 4 0 0], LS_0xd55310_0_0, LS_0xd55310_0_4; +L_0xd55770 .part/pv L_0xd556d0, 22, 1, 32; +L_0xd55860 .part RS_0x7fe6cc2f6738, 23, 1; +L_0xd55900 .part RS_0x7fe6cc2f6738, 23, 1; +L_0xd559a0 .part RS_0x7fe6cc2f6738, 23, 1; +L_0xd55a40 .part RS_0x7fe6cc2f6738, 23, 1; +L_0xd55b20 .part RS_0x7fe6cc2f6738, 23, 1; +L_0xd546a0 .part RS_0x7fe6cc2f6738, 23, 1; +L_0xd54740 .part RS_0x7fe6cc2f6738, 23, 1; +LS_0xd547e0_0_0 .concat [ 1 1 1 1], L_0xd54740, L_0xd546a0, L_0xd55b20, C4<0>; +LS_0xd547e0_0_4 .concat [ 1 1 1 1], L_0xd55a40, L_0xd559a0, L_0xd55900, L_0xd55860; +L_0xd547e0 .concat [ 4 4 0 0], LS_0xd547e0_0_0, LS_0xd547e0_0_4; +L_0xd55ce0 .part/pv L_0xd54ba0, 23, 1, 32; +L_0xd55dd0 .part RS_0x7fe6cc2f6738, 24, 1; +L_0xd55e70 .part RS_0x7fe6cc2f6738, 24, 1; +L_0xd55f10 .part RS_0x7fe6cc2f6738, 24, 1; +L_0xd55fb0 .part RS_0x7fe6cc2f6738, 24, 1; +L_0xd56660 .part RS_0x7fe6cc2f6738, 24, 1; +L_0xd56700 .part RS_0x7fe6cc2f6738, 24, 1; +L_0xd567a0 .part RS_0x7fe6cc2f6738, 24, 1; +LS_0xd56840_0_0 .concat [ 1 1 1 1], L_0xd567a0, L_0xd56700, L_0xd56660, C4<0>; +LS_0xd56840_0_4 .concat [ 1 1 1 1], L_0xd55fb0, L_0xd55f10, L_0xd55e70, L_0xd55dd0; +L_0xd56840 .concat [ 4 4 0 0], LS_0xd56840_0_0, LS_0xd56840_0_4; +L_0xd56ca0 .part/pv L_0xd56c00, 24, 1, 32; +L_0xd56d90 .part RS_0x7fe6cc2f6738, 25, 1; +L_0xd57a70 .part RS_0x7fe6cc2f6738, 25, 1; +L_0xd57b10 .part RS_0x7fe6cc2f6738, 25, 1; +L_0xd56e30 .part RS_0x7fe6cc2f6738, 25, 1; +L_0xd574f0 .part RS_0x7fe6cc2f6738, 25, 1; +L_0xd57590 .part RS_0x7fe6cc2f6738, 25, 1; +L_0xd57630 .part RS_0x7fe6cc2f6738, 25, 1; +LS_0xd576d0_0_0 .concat [ 1 1 1 1], L_0xd57630, L_0xd57590, L_0xd574f0, C4<0>; +LS_0xd576d0_0_4 .concat [ 1 1 1 1], L_0xd56e30, L_0xd57b10, L_0xd57a70, L_0xd56d90; +L_0xd576d0 .concat [ 4 4 0 0], LS_0xd576d0_0_0, LS_0xd576d0_0_4; +L_0xd56130 .part/pv L_0xd56090, 25, 1, 32; +L_0xd56220 .part RS_0x7fe6cc2f6738, 26, 1; +L_0xd562c0 .part RS_0x7fe6cc2f6738, 26, 1; +L_0xd56360 .part RS_0x7fe6cc2f6738, 26, 1; +L_0xd56400 .part RS_0x7fe6cc2f6738, 26, 1; +L_0xd564e0 .part RS_0x7fe6cc2f6738, 26, 1; +L_0xd56580 .part RS_0x7fe6cc2f6738, 26, 1; +L_0xd58840 .part RS_0x7fe6cc2f6738, 26, 1; +LS_0xd588e0_0_0 .concat [ 1 1 1 1], L_0xd58840, L_0xd56580, L_0xd564e0, C4<0>; +LS_0xd588e0_0_4 .concat [ 1 1 1 1], L_0xd56400, L_0xd56360, L_0xd562c0, L_0xd56220; +L_0xd588e0 .concat [ 4 4 0 0], LS_0xd588e0_0_0, LS_0xd588e0_0_4; +L_0xd57c50 .part/pv L_0xd57bb0, 26, 1, 32; +L_0xd57d40 .part RS_0x7fe6cc2f6738, 27, 1; +L_0xd57de0 .part RS_0x7fe6cc2f6738, 27, 1; +L_0xd57e80 .part RS_0x7fe6cc2f6738, 27, 1; +L_0xd57f20 .part RS_0x7fe6cc2f6738, 27, 1; +L_0xd585b0 .part RS_0x7fe6cc2f6738, 27, 1; +L_0xd58650 .part RS_0x7fe6cc2f6738, 27, 1; +L_0xd586f0 .part RS_0x7fe6cc2f6738, 27, 1; +LS_0xd58790_0_0 .concat [ 1 1 1 1], L_0xd586f0, L_0xd58650, L_0xd585b0, C4<0>; +LS_0xd58790_0_4 .concat [ 1 1 1 1], L_0xd57f20, L_0xd57e80, L_0xd57de0, L_0xd57d40; +L_0xd58790 .concat [ 4 4 0 0], LS_0xd58790_0_0, LS_0xd58790_0_4; +L_0xd572d0 .part/pv L_0xd57230, 27, 1, 32; +L_0xd573c0 .part RS_0x7fe6cc2f6738, 28, 1; +L_0xd598f0 .part RS_0x7fe6cc2f6738, 28, 1; +L_0xd58c00 .part RS_0x7fe6cc2f6738, 28, 1; +L_0xd58ca0 .part RS_0x7fe6cc2f6738, 28, 1; +L_0xd58d40 .part RS_0x7fe6cc2f6738, 28, 1; +L_0xd58de0 .part RS_0x7fe6cc2f6738, 28, 1; +L_0xd58e80 .part RS_0x7fe6cc2f6738, 28, 1; +LS_0xd58f20_0_0 .concat [ 1 1 1 1], L_0xd58e80, L_0xd58de0, L_0xd58d40, C4<0>; +LS_0xd58f20_0_4 .concat [ 1 1 1 1], L_0xd58ca0, L_0xd58c00, L_0xd598f0, L_0xd573c0; +L_0xd58f20 .concat [ 4 4 0 0], LS_0xd58f20_0_0, LS_0xd58f20_0_4; +L_0xd59380 .part/pv L_0xd592e0, 28, 1, 32; +L_0xd59470 .part RS_0x7fe6cc2f6738, 29, 1; +L_0xd59510 .part RS_0x7fe6cc2f6738, 29, 1; +L_0xd595b0 .part RS_0x7fe6cc2f6738, 29, 1; +L_0xd59650 .part RS_0x7fe6cc2f6738, 29, 1; +L_0xd596f0 .part RS_0x7fe6cc2f6738, 29, 1; +L_0xd59790 .part RS_0x7fe6cc2f6738, 29, 1; +L_0xd59830 .part RS_0x7fe6cc2f6738, 29, 1; +LS_0xd57fc0_0_0 .concat [ 1 1 1 1], L_0xd59830, L_0xd59790, L_0xd596f0, C4<0>; +LS_0xd57fc0_0_4 .concat [ 1 1 1 1], L_0xd59650, L_0xd595b0, L_0xd59510, L_0xd59470; +L_0xd57fc0 .concat [ 4 4 0 0], LS_0xd57fc0_0_0, LS_0xd57fc0_0_4; +L_0xd58420 .part/pv L_0xd58380, 29, 1, 32; +L_0xd58510 .part RS_0x7fe6cc2f6738, 30, 1; +L_0xd59990 .part RS_0x7fe6cc2f6738, 30, 1; +L_0xd59a30 .part RS_0x7fe6cc2f6738, 30, 1; +L_0xd59ad0 .part RS_0x7fe6cc2f6738, 30, 1; +L_0xd5a1b0 .part RS_0x7fe6cc2f6738, 30, 1; +L_0xd5a250 .part RS_0x7fe6cc2f6738, 30, 1; +L_0xd5a2f0 .part RS_0x7fe6cc2f6738, 30, 1; +LS_0xd5a390_0_0 .concat [ 1 1 1 1], L_0xd5a2f0, L_0xd5a250, L_0xd5a1b0, C4<0>; +LS_0xd5a390_0_4 .concat [ 1 1 1 1], L_0xd59ad0, L_0xd59a30, L_0xd59990, L_0xd58510; +L_0xd5a390 .concat [ 4 4 0 0], LS_0xd5a390_0_0, LS_0xd5a390_0_4; +L_0xd5a7f0 .part/pv L_0xd5a750, 30, 1, 32; +L_0xd5a8e0 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd5a980 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd5aa20 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd5aac0 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd5ab60 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd5ac00 .part RS_0x7fe6cc2f6738, 31, 1; +L_0xd59bb0 .part RS_0x7fe6cc2f6738, 31, 1; +LS_0xd59c50_0_0 .concat [ 1 1 1 1], L_0xd59bb0, L_0xd5ac00, L_0xd5ab60, C4<0>; +LS_0xd59c50_0_4 .concat [ 1 1 1 1], L_0xd5aac0, L_0xd5aa20, L_0xd5a980, L_0xd5a8e0; +L_0xd59c50 .concat [ 4 4 0 0], LS_0xd59c50_0_0, LS_0xd59c50_0_4; +L_0xd5a0b0 .part/pv L_0xd5a010, 31, 1, 32; +S_0xcdec00 .scope module, "a1" "ALU1bit" 2 33, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xcef4d0/d .functor XOR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xcef4d0 .delay (30,30,30) L_0xcef4d0/d; +L_0xcefda0/d .functor AND 1, L_0xcf0a80, L_0xceee60, C4<1>, C4<1>; +L_0xcefda0 .delay (30,30,30) L_0xcefda0/d; +L_0xcefe60/d .functor NAND 1, L_0xcf0a80, L_0xceee60, C4<1>, C4<1>; +L_0xcefe60 .delay (20,20,20) L_0xcefe60/d; +L_0xceff20/d .functor NOR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xceff20 .delay (20,20,20) L_0xceff20/d; +L_0xceffe0/d .functor OR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xceffe0 .delay (30,30,30) L_0xceffe0/d; +v0xce0820_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xce08e0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xce0980_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xce0a20_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xce0aa0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xce0b40_0 .net "a", 0 0, L_0xcf0a80; 1 drivers +v0xce0bc0_0 .net "b", 0 0, L_0xceee60; 1 drivers +v0xce0c40_0 .net "cin", 0 0, C4<0>; 1 drivers +v0xce0cc0_0 .net "cout", 0 0, L_0xcf0850; 1 drivers +v0xce0d40_0 .net "cout_ADD", 0 0, L_0xceea80; 1 drivers +v0xce0e20_0 .net "cout_SLT", 0 0, L_0xcefbd0; 1 drivers +v0xce0ea0_0 .net "cout_SUB", 0 0, L_0xcef300; 1 drivers +v0xce0f90_0 .net "muxCout", 7 0, L_0xcf0490; 1 drivers +v0xce1040_0 .net "muxRes", 7 0, L_0xcf0080; 1 drivers +v0xce1170_0 .alias "op", 2 0, v0xcec110_0; +v0xce11f0_0 .net "out", 0 0, L_0xcf0760; 1 drivers +v0xce10c0_0 .net "res_ADD", 0 0, L_0xceafd0; 1 drivers +v0xce1360_0 .net "res_AND", 0 0, L_0xcefda0; 1 drivers +v0xce1270_0 .net "res_NAND", 0 0, L_0xcefe60; 1 drivers +v0xce1480_0 .net "res_NOR", 0 0, L_0xceff20; 1 drivers +v0xce13e0_0 .net "res_OR", 0 0, L_0xceffe0; 1 drivers +v0xce15b0_0 .net "res_SLT", 0 0, L_0xcef670; 1 drivers +v0xce1530_0 .net "res_SUB", 0 0, L_0xceecc0; 1 drivers +v0xce1720_0 .net "res_XOR", 0 0, L_0xcef4d0; 1 drivers +LS_0xcf0080_0_0 .concat [ 1 1 1 1], L_0xceafd0, L_0xceecc0, L_0xcef4d0, L_0xcef670; +LS_0xcf0080_0_4 .concat [ 1 1 1 1], L_0xcefda0, L_0xcefe60, L_0xceff20, L_0xceffe0; +L_0xcf0080 .concat [ 4 4 0 0], LS_0xcf0080_0_0, LS_0xcf0080_0_4; +LS_0xcf0490_0_0 .concat [ 1 1 1 1], L_0xceea80, L_0xcef300, C4<0>, L_0xcefbd0; +LS_0xcf0490_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcf0490 .concat [ 4 4 0 0], LS_0xcf0490_0_0, LS_0xcf0490_0_4; +S_0xcdff60 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcdec00; + .timescale 0 0; +L_0xced9d0/d .functor XOR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xced9d0 .delay (30,30,30) L_0xced9d0/d; +L_0xceafd0/d .functor XOR 1, L_0xced9d0, C4<0>, C4<0>, C4<0>; +L_0xceafd0 .delay (30,30,30) L_0xceafd0/d; +L_0xcee620/d .functor AND 1, L_0xcf0a80, L_0xceee60, C4<1>, C4<1>; +L_0xcee620 .delay (30,30,30) L_0xcee620/d; +L_0xcee6c0/d .functor OR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xcee6c0 .delay (30,30,30) L_0xcee6c0/d; +L_0xcee760/d .functor NOT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcee760 .delay (10,10,10) L_0xcee760/d; +L_0xcee830/d .functor AND 1, L_0xcee620, L_0xcee760, C4<1>, C4<1>; +L_0xcee830 .delay (30,30,30) L_0xcee830/d; +L_0xcee990/d .functor AND 1, L_0xcee6c0, C4<0>, C4<1>, C4<1>; +L_0xcee990 .delay (30,30,30) L_0xcee990/d; +L_0xceea80/d .functor OR 1, L_0xcee830, L_0xcee990, C4<0>, C4<0>; +L_0xceea80 .delay (30,30,30) L_0xceea80/d; +v0xce0050_0 .net "_carryin", 0 0, L_0xcee760; 1 drivers +v0xce0110_0 .alias "a", 0 0, v0xce0b40_0; +v0xce0190_0 .net "aandb", 0 0, L_0xcee620; 1 drivers +v0xce0230_0 .net "aorb", 0 0, L_0xcee6c0; 1 drivers +v0xce02b0_0 .alias "b", 0 0, v0xce0bc0_0; +v0xce0380_0 .alias "carryin", 0 0, v0xce0c40_0; +v0xce0450_0 .alias "carryout", 0 0, v0xce0d40_0; +v0xce04f0_0 .net "outputIfCarryin", 0 0, L_0xcee830; 1 drivers +v0xce05e0_0 .net "outputIf_Carryin", 0 0, L_0xcee990; 1 drivers +v0xce0680_0 .net "s", 0 0, L_0xced9d0; 1 drivers +v0xce0780_0 .alias "sum", 0 0, v0xce10c0_0; +S_0xcdf800 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcdec00; + .timescale 0 0; +L_0xceec60/d .functor XOR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xceec60 .delay (30,30,30) L_0xceec60/d; +L_0xceecc0/d .functor XOR 1, L_0xceec60, C4<0>, C4<0>, C4<0>; +L_0xceecc0 .delay (30,30,30) L_0xceecc0/d; +L_0xceee00/d .functor NOT 1, L_0xcf0a80, C4<0>, C4<0>, C4<0>; +L_0xceee00 .delay (10,10,10) L_0xceee00/d; +L_0xceef70/d .functor AND 1, L_0xceee00, L_0xceee60, C4<1>, C4<1>; +L_0xceef70 .delay (30,30,30) L_0xceef70/d; +L_0xcef0e0/d .functor NOT 1, L_0xceec60, C4<0>, C4<0>, C4<0>; +L_0xcef0e0 .delay (10,10,10) L_0xcef0e0/d; +L_0xcef140/d .functor AND 1, L_0xcef0e0, C4<0>, C4<1>, C4<1>; +L_0xcef140 .delay (30,30,30) L_0xcef140/d; +L_0xcef300/d .functor OR 1, L_0xceef70, L_0xcef140, C4<0>, C4<0>; +L_0xcef300 .delay (30,30,30) L_0xcef300/d; +v0xcdf8f0_0 .alias "a", 0 0, v0xce0b40_0; +v0xcdf990_0 .net "axorb", 0 0, L_0xceec60; 1 drivers +v0xcdfa10_0 .alias "b", 0 0, v0xce0bc0_0; +v0xcdfac0_0 .alias "borrowin", 0 0, v0xce0c40_0; +v0xcdfba0_0 .alias "borrowout", 0 0, v0xce0ea0_0; +v0xcdfc20_0 .alias "diff", 0 0, v0xce1530_0; +v0xcdfca0_0 .net "nota", 0 0, L_0xceee00; 1 drivers +v0xcdfd20_0 .net "notaandb", 0 0, L_0xceef70; 1 drivers +v0xcdfdc0_0 .net "notaxorb", 0 0, L_0xcef0e0; 1 drivers +v0xcdfe60_0 .net "notaxorbandborrowin", 0 0, L_0xcef140; 1 drivers +S_0xcdf150 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcdec00; + .timescale 0 0; +L_0xcef590/d .functor XOR 1, L_0xcf0a80, L_0xceee60, C4<0>, C4<0>; +L_0xcef590 .delay (30,30,30) L_0xcef590/d; +L_0xcef670/d .functor XOR 1, L_0xcef590, C4<0>, C4<0>, C4<0>; +L_0xcef670 .delay (30,30,30) L_0xcef670/d; +L_0xcef810/d .functor NOT 1, L_0xcf0a80, C4<0>, C4<0>, C4<0>; +L_0xcef810 .delay (10,10,10) L_0xcef810/d; +L_0xcef8d0/d .functor AND 1, L_0xcef810, L_0xceee60, C4<1>, C4<1>; +L_0xcef8d0 .delay (30,30,30) L_0xcef8d0/d; +L_0xcef9e0/d .functor NOT 1, L_0xcef590, C4<0>, C4<0>, C4<0>; +L_0xcef9e0 .delay (10,10,10) L_0xcef9e0/d; +L_0xcefa80/d .functor AND 1, L_0xcef9e0, C4<0>, C4<1>, C4<1>; +L_0xcefa80 .delay (30,30,30) L_0xcefa80/d; +L_0xcefbd0/d .functor OR 1, L_0xcef8d0, L_0xcefa80, C4<0>, C4<0>; +L_0xcefbd0 .delay (30,30,30) L_0xcefbd0/d; +v0xcdf240_0 .alias "a", 0 0, v0xce0b40_0; +v0xcdf2c0_0 .net "axorb", 0 0, L_0xcef590; 1 drivers +v0xcdf340_0 .alias "b", 0 0, v0xce0bc0_0; +v0xcdf3c0_0 .alias "borrowin", 0 0, v0xce0c40_0; +v0xcdf440_0 .alias "borrowout", 0 0, v0xce0e20_0; +v0xcdf4c0_0 .alias "diff", 0 0, v0xce15b0_0; +v0xcdf540_0 .net "nota", 0 0, L_0xcef810; 1 drivers +v0xcdf5c0_0 .net "notaandb", 0 0, L_0xcef8d0; 1 drivers +v0xcdf660_0 .net "notaxorb", 0 0, L_0xcef9e0; 1 drivers +v0xcdf700_0 .net "notaxorbandborrowin", 0 0, L_0xcefa80; 1 drivers +S_0xcdeee0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcdec00; + .timescale 0 0; +v0xcdefd0_0 .alias "address", 2 0, v0xcec110_0; +v0xcdf050_0 .alias "inputs", 7 0, v0xce1040_0; +v0xcdf0d0_0 .alias "out", 0 0, v0xce11f0_0; +L_0xcf0760 .part/v L_0xcf0080, C4, 1; +S_0xcdecf0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcdec00; + .timescale 0 0; +v0xcde9c0_0 .alias "address", 2 0, v0xcec110_0; +v0xcdede0_0 .alias "inputs", 7 0, v0xce0f90_0; +v0xcdee60_0 .alias "out", 0 0, v0xce0cc0_0; +L_0xcf0850 .part/v L_0xcf0490, C4, 1; +S_0xcdbf90 .scope module, "a2" "ALU1bit" 2 34, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xcf2110/d .functor XOR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcf2110 .delay (30,30,30) L_0xcf2110/d; +L_0xcf2a00/d .functor AND 1, L_0xcf37e0, L_0xcf1aa0, C4<1>, C4<1>; +L_0xcf2a00 .delay (30,30,30) L_0xcf2a00/d; +L_0xcf2ac0/d .functor NAND 1, L_0xcf37e0, L_0xcf1aa0, C4<1>, C4<1>; +L_0xcf2ac0 .delay (20,20,20) L_0xcf2ac0/d; +L_0xcf2b80/d .functor NOR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcf2b80 .delay (20,20,20) L_0xcf2b80/d; +L_0xcf2c40/d .functor OR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcf2c40 .delay (30,30,30) L_0xcf2c40/d; +v0xcddc20_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcddce0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcddd80_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcdde20_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcddea0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcddf40_0 .net "a", 0 0, L_0xcf37e0; 1 drivers +v0xcddfc0_0 .net "b", 0 0, L_0xcf1aa0; 1 drivers +v0xcde040_0 .net "cin", 0 0, L_0xcf3ca0; 1 drivers +v0xcde0c0_0 .net "cout", 0 0, L_0xcf34d0; 1 drivers +v0xcde140_0 .net "cout_ADD", 0 0, L_0xcf15b0; 1 drivers +v0xcde220_0 .net "cout_SLT", 0 0, L_0xcf2830; 1 drivers +v0xcde2a0_0 .net "cout_SUB", 0 0, L_0xcf1f60; 1 drivers +v0xcde320_0 .net "muxCout", 7 0, L_0xcf3160; 1 drivers +v0xcde3d0_0 .net "muxRes", 7 0, L_0xcf2ce0; 1 drivers +v0xcde500_0 .alias "op", 2 0, v0xcec110_0; +v0xcde580_0 .net "out", 0 0, L_0xcf33e0; 1 drivers +v0xcde450_0 .net "res_ADD", 0 0, L_0xcf1060; 1 drivers +v0xcde6f0_0 .net "res_AND", 0 0, L_0xcf2a00; 1 drivers +v0xcde600_0 .net "res_NAND", 0 0, L_0xcf2ac0; 1 drivers +v0xcde810_0 .net "res_NOR", 0 0, L_0xcf2b80; 1 drivers +v0xcde770_0 .net "res_OR", 0 0, L_0xcf2c40; 1 drivers +v0xcde940_0 .net "res_SLT", 0 0, L_0xcf22d0; 1 drivers +v0xcde8c0_0 .net "res_SUB", 0 0, L_0xcf1850; 1 drivers +v0xcdeab0_0 .net "res_XOR", 0 0, L_0xcf2110; 1 drivers +LS_0xcf2ce0_0_0 .concat [ 1 1 1 1], L_0xcf1060, L_0xcf1850, L_0xcf2110, L_0xcf22d0; +LS_0xcf2ce0_0_4 .concat [ 1 1 1 1], L_0xcf2a00, L_0xcf2ac0, L_0xcf2b80, L_0xcf2c40; +L_0xcf2ce0 .concat [ 4 4 0 0], LS_0xcf2ce0_0_0, LS_0xcf2ce0_0_4; +LS_0xcf3160_0_0 .concat [ 1 1 1 1], L_0xcf15b0, L_0xcf1f60, C4<0>, L_0xcf2830; +LS_0xcf3160_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcf3160 .concat [ 4 4 0 0], LS_0xcf3160_0_0, LS_0xcf3160_0_4; +S_0xcdd360 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcdbf90; + .timescale 0 0; +L_0xcef010/d .functor XOR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcef010 .delay (30,30,30) L_0xcef010/d; +L_0xcf1060/d .functor XOR 1, L_0xcef010, L_0xcf3ca0, C4<0>, C4<0>; +L_0xcf1060 .delay (30,30,30) L_0xcf1060/d; +L_0xcf1190/d .functor AND 1, L_0xcf37e0, L_0xcf1aa0, C4<1>, C4<1>; +L_0xcf1190 .delay (30,30,30) L_0xcf1190/d; +L_0xcf1230/d .functor OR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcf1230 .delay (30,30,30) L_0xcf1230/d; +L_0xcf12d0/d .functor NOT 1, L_0xcf3ca0, C4<0>, C4<0>, C4<0>; +L_0xcf12d0 .delay (10,10,10) L_0xcf12d0/d; +L_0xcf1370/d .functor AND 1, L_0xcf1190, L_0xcf12d0, C4<1>, C4<1>; +L_0xcf1370 .delay (30,30,30) L_0xcf1370/d; +L_0xcf14a0/d .functor AND 1, L_0xcf1230, L_0xcf3ca0, C4<1>, C4<1>; +L_0xcf14a0 .delay (30,30,30) L_0xcf14a0/d; +L_0xcf15b0/d .functor OR 1, L_0xcf1370, L_0xcf14a0, C4<0>, C4<0>; +L_0xcf15b0 .delay (30,30,30) L_0xcf15b0/d; +v0xcdd450_0 .net "_carryin", 0 0, L_0xcf12d0; 1 drivers +v0xcdd510_0 .alias "a", 0 0, v0xcddf40_0; +v0xcdd590_0 .net "aandb", 0 0, L_0xcf1190; 1 drivers +v0xcdd630_0 .net "aorb", 0 0, L_0xcf1230; 1 drivers +v0xcdd6b0_0 .alias "b", 0 0, v0xcddfc0_0; +v0xcdd780_0 .alias "carryin", 0 0, v0xcde040_0; +v0xcdd850_0 .alias "carryout", 0 0, v0xcde140_0; +v0xcdd8f0_0 .net "outputIfCarryin", 0 0, L_0xcf1370; 1 drivers +v0xcdd9e0_0 .net "outputIf_Carryin", 0 0, L_0xcf14a0; 1 drivers +v0xcdda80_0 .net "s", 0 0, L_0xcef010; 1 drivers +v0xcddb80_0 .alias "sum", 0 0, v0xcde450_0; +S_0xcdcc00 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcdbf90; + .timescale 0 0; +L_0xcf17d0/d .functor XOR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcf17d0 .delay (30,30,30) L_0xcf17d0/d; +L_0xcf1850/d .functor XOR 1, L_0xcf17d0, L_0xcf3ca0, C4<0>, C4<0>; +L_0xcf1850 .delay (30,30,30) L_0xcf1850/d; +L_0xcf19f0/d .functor NOT 1, L_0xcf37e0, C4<0>, C4<0>, C4<0>; +L_0xcf19f0 .delay (10,10,10) L_0xcf19f0/d; +L_0xcf1b60/d .functor AND 1, L_0xcf19f0, L_0xcf1aa0, C4<1>, C4<1>; +L_0xcf1b60 .delay (30,30,30) L_0xcf1b60/d; +L_0xcf1000/d .functor NOT 1, L_0xcf17d0, C4<0>, C4<0>, C4<0>; +L_0xcf1000 .delay (10,10,10) L_0xcf1000/d; +L_0xcf1d60/d .functor AND 1, L_0xcf1000, L_0xcf3ca0, C4<1>, C4<1>; +L_0xcf1d60 .delay (30,30,30) L_0xcf1d60/d; +L_0xcf1f60/d .functor OR 1, L_0xcf1b60, L_0xcf1d60, C4<0>, C4<0>; +L_0xcf1f60 .delay (30,30,30) L_0xcf1f60/d; +v0xcdccf0_0 .alias "a", 0 0, v0xcddf40_0; +v0xcdcd90_0 .net "axorb", 0 0, L_0xcf17d0; 1 drivers +v0xcdce10_0 .alias "b", 0 0, v0xcddfc0_0; +v0xcdcec0_0 .alias "borrowin", 0 0, v0xcde040_0; +v0xcdcfa0_0 .alias "borrowout", 0 0, v0xcde2a0_0; +v0xcdd020_0 .alias "diff", 0 0, v0xcde8c0_0; +v0xcdd0a0_0 .net "nota", 0 0, L_0xcf19f0; 1 drivers +v0xcdd120_0 .net "notaandb", 0 0, L_0xcf1b60; 1 drivers +v0xcdd1c0_0 .net "notaxorb", 0 0, L_0xcf1000; 1 drivers +v0xcdd260_0 .net "notaxorbandborrowin", 0 0, L_0xcf1d60; 1 drivers +S_0xcdc4e0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcdbf90; + .timescale 0 0; +L_0xcf21f0/d .functor XOR 1, L_0xcf37e0, L_0xcf1aa0, C4<0>, C4<0>; +L_0xcf21f0 .delay (30,30,30) L_0xcf21f0/d; +L_0xcf22d0/d .functor XOR 1, L_0xcf21f0, L_0xcf3ca0, C4<0>, C4<0>; +L_0xcf22d0 .delay (30,30,30) L_0xcf22d0/d; +L_0xcf2470/d .functor NOT 1, L_0xcf37e0, C4<0>, C4<0>, C4<0>; +L_0xcf2470 .delay (10,10,10) L_0xcf2470/d; +L_0xcf2530/d .functor AND 1, L_0xcf2470, L_0xcf1aa0, C4<1>, C4<1>; +L_0xcf2530 .delay (30,30,30) L_0xcf2530/d; +L_0xcf2640/d .functor NOT 1, L_0xcf21f0, C4<0>, C4<0>, C4<0>; +L_0xcf2640 .delay (10,10,10) L_0xcf2640/d; +L_0xcf26e0/d .functor AND 1, L_0xcf2640, L_0xcf3ca0, C4<1>, C4<1>; +L_0xcf26e0 .delay (30,30,30) L_0xcf26e0/d; +L_0xcf2830/d .functor OR 1, L_0xcf2530, L_0xcf26e0, C4<0>, C4<0>; +L_0xcf2830 .delay (30,30,30) L_0xcf2830/d; +v0xcdc5d0_0 .alias "a", 0 0, v0xcddf40_0; +v0xcdc650_0 .net "axorb", 0 0, L_0xcf21f0; 1 drivers +v0xcdc6f0_0 .alias "b", 0 0, v0xcddfc0_0; +v0xcdc790_0 .alias "borrowin", 0 0, v0xcde040_0; +v0xcdc840_0 .alias "borrowout", 0 0, v0xcde220_0; +v0xcdc8e0_0 .alias "diff", 0 0, v0xcde940_0; +v0xcdc980_0 .net "nota", 0 0, L_0xcf2470; 1 drivers +v0xcdca20_0 .net "notaandb", 0 0, L_0xcf2530; 1 drivers +v0xcdcac0_0 .net "notaxorb", 0 0, L_0xcf2640; 1 drivers +v0xcdcb60_0 .net "notaxorbandborrowin", 0 0, L_0xcf26e0; 1 drivers +S_0xcdc270 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcdbf90; + .timescale 0 0; +v0xcdc360_0 .alias "address", 2 0, v0xcec110_0; +v0xcdc3e0_0 .alias "inputs", 7 0, v0xcde3d0_0; +v0xcdc460_0 .alias "out", 0 0, v0xcde580_0; +L_0xcf33e0 .part/v L_0xcf2ce0, C4, 1; +S_0xcdc080 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcdbf90; + .timescale 0 0; +v0xcdbd50_0 .alias "address", 2 0, v0xcec110_0; +v0xcdc170_0 .alias "inputs", 7 0, v0xcde320_0; +v0xcdc1f0_0 .alias "out", 0 0, v0xcde0c0_0; +L_0xcf34d0 .part/v L_0xcf3160, C4, 1; +S_0xcd9320 .scope module, "a3" "ALU1bit" 2 35, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xcf4f90/d .functor XOR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf4f90 .delay (30,30,30) L_0xcf4f90/d; +L_0xcf5880/d .functor AND 1, L_0xcf6770, L_0xcf48d0, C4<1>, C4<1>; +L_0xcf5880 .delay (30,30,30) L_0xcf5880/d; +L_0xcf5940/d .functor NAND 1, L_0xcf6770, L_0xcf48d0, C4<1>, C4<1>; +L_0xcf5940 .delay (20,20,20) L_0xcf5940/d; +L_0xcf5a00/d .functor NOR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf5a00 .delay (20,20,20) L_0xcf5a00/d; +L_0xcf5ac0/d .functor OR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf5ac0 .delay (30,30,30) L_0xcf5ac0/d; +v0xcdafb0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcdb070_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcdb110_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcdb1b0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcdb230_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcdb2d0_0 .net "a", 0 0, L_0xcf6770; 1 drivers +v0xcdb350_0 .net "b", 0 0, L_0xcf48d0; 1 drivers +v0xcdb3d0_0 .net "cin", 0 0, L_0xcf4a90; 1 drivers +v0xcdb450_0 .net "cout", 0 0, L_0xcf64b0; 1 drivers +v0xcdb4d0_0 .net "cout_ADD", 0 0, L_0xcf4430; 1 drivers +v0xcdb5b0_0 .net "cout_SLT", 0 0, L_0xcf56b0; 1 drivers +v0xcdb630_0 .net "cout_SUB", 0 0, L_0xcf4de0; 1 drivers +v0xcdb6b0_0 .net "muxCout", 7 0, L_0xcf60f0; 1 drivers +v0xcdb760_0 .net "muxRes", 7 0, L_0xcf5b60; 1 drivers +v0xcdb890_0 .alias "op", 2 0, v0xcec110_0; +v0xcdb910_0 .net "out", 0 0, L_0xcf63c0; 1 drivers +v0xcdb7e0_0 .net "res_ADD", 0 0, L_0xcf3e60; 1 drivers +v0xcdba80_0 .net "res_AND", 0 0, L_0xcf5880; 1 drivers +v0xcdb990_0 .net "res_NAND", 0 0, L_0xcf5940; 1 drivers +v0xcdbba0_0 .net "res_NOR", 0 0, L_0xcf5a00; 1 drivers +v0xcdbb00_0 .net "res_OR", 0 0, L_0xcf5ac0; 1 drivers +v0xcdbcd0_0 .net "res_SLT", 0 0, L_0xcf5150; 1 drivers +v0xcdbc50_0 .net "res_SUB", 0 0, L_0xcf46d0; 1 drivers +v0xcdbe40_0 .net "res_XOR", 0 0, L_0xcf4f90; 1 drivers +LS_0xcf5b60_0_0 .concat [ 1 1 1 1], L_0xcf3e60, L_0xcf46d0, L_0xcf4f90, L_0xcf5150; +LS_0xcf5b60_0_4 .concat [ 1 1 1 1], L_0xcf5880, L_0xcf5940, L_0xcf5a00, L_0xcf5ac0; +L_0xcf5b60 .concat [ 4 4 0 0], LS_0xcf5b60_0_0, LS_0xcf5b60_0_4; +LS_0xcf60f0_0_0 .concat [ 1 1 1 1], L_0xcf4430, L_0xcf4de0, C4<0>, L_0xcf56b0; +LS_0xcf60f0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcf60f0 .concat [ 4 4 0 0], LS_0xcf60f0_0_0, LS_0xcf60f0_0_4; +S_0xcda6f0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcd9320; + .timescale 0 0; +L_0xcf1cb0/d .functor XOR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf1cb0 .delay (30,30,30) L_0xcf1cb0/d; +L_0xcf3e60/d .functor XOR 1, L_0xcf1cb0, L_0xcf4a90, C4<0>, C4<0>; +L_0xcf3e60 .delay (30,30,30) L_0xcf3e60/d; +L_0xcf3fb0/d .functor AND 1, L_0xcf6770, L_0xcf48d0, C4<1>, C4<1>; +L_0xcf3fb0 .delay (30,30,30) L_0xcf3fb0/d; +L_0xcf4070/d .functor OR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf4070 .delay (30,30,30) L_0xcf4070/d; +L_0xcf4130/d .functor NOT 1, L_0xcf4a90, C4<0>, C4<0>, C4<0>; +L_0xcf4130 .delay (10,10,10) L_0xcf4130/d; +L_0xcf41d0/d .functor AND 1, L_0xcf3fb0, L_0xcf4130, C4<1>, C4<1>; +L_0xcf41d0 .delay (30,30,30) L_0xcf41d0/d; +L_0xcf4320/d .functor AND 1, L_0xcf4070, L_0xcf4a90, C4<1>, C4<1>; +L_0xcf4320 .delay (30,30,30) L_0xcf4320/d; +L_0xcf4430/d .functor OR 1, L_0xcf41d0, L_0xcf4320, C4<0>, C4<0>; +L_0xcf4430 .delay (30,30,30) L_0xcf4430/d; +v0xcda7e0_0 .net "_carryin", 0 0, L_0xcf4130; 1 drivers +v0xcda8a0_0 .alias "a", 0 0, v0xcdb2d0_0; +v0xcda920_0 .net "aandb", 0 0, L_0xcf3fb0; 1 drivers +v0xcda9c0_0 .net "aorb", 0 0, L_0xcf4070; 1 drivers +v0xcdaa40_0 .alias "b", 0 0, v0xcdb350_0; +v0xcdab10_0 .alias "carryin", 0 0, v0xcdb3d0_0; +v0xcdabe0_0 .alias "carryout", 0 0, v0xcdb4d0_0; +v0xcdac80_0 .net "outputIfCarryin", 0 0, L_0xcf41d0; 1 drivers +v0xcdad70_0 .net "outputIf_Carryin", 0 0, L_0xcf4320; 1 drivers +v0xcdae10_0 .net "s", 0 0, L_0xcf1cb0; 1 drivers +v0xcdaf10_0 .alias "sum", 0 0, v0xcdb7e0_0; +S_0xcd9f90 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcd9320; + .timescale 0 0; +L_0xcf4650/d .functor XOR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf4650 .delay (30,30,30) L_0xcf4650/d; +L_0xcf46d0/d .functor XOR 1, L_0xcf4650, L_0xcf4a90, C4<0>, C4<0>; +L_0xcf46d0 .delay (30,30,30) L_0xcf46d0/d; +L_0xcf4870/d .functor NOT 1, L_0xcf6770, C4<0>, C4<0>, C4<0>; +L_0xcf4870 .delay (10,10,10) L_0xcf4870/d; +L_0xcf49e0/d .functor AND 1, L_0xcf4870, L_0xcf48d0, C4<1>, C4<1>; +L_0xcf49e0 .delay (30,30,30) L_0xcf49e0/d; +L_0xcf3e00/d .functor NOT 1, L_0xcf4650, C4<0>, C4<0>, C4<0>; +L_0xcf3e00 .delay (10,10,10) L_0xcf3e00/d; +L_0xcf4be0/d .functor AND 1, L_0xcf3e00, L_0xcf4a90, C4<1>, C4<1>; +L_0xcf4be0 .delay (30,30,30) L_0xcf4be0/d; +L_0xcf4de0/d .functor OR 1, L_0xcf49e0, L_0xcf4be0, C4<0>, C4<0>; +L_0xcf4de0 .delay (30,30,30) L_0xcf4de0/d; +v0xcda080_0 .alias "a", 0 0, v0xcdb2d0_0; +v0xcda120_0 .net "axorb", 0 0, L_0xcf4650; 1 drivers +v0xcda1a0_0 .alias "b", 0 0, v0xcdb350_0; +v0xcda250_0 .alias "borrowin", 0 0, v0xcdb3d0_0; +v0xcda330_0 .alias "borrowout", 0 0, v0xcdb630_0; +v0xcda3b0_0 .alias "diff", 0 0, v0xcdbc50_0; +v0xcda430_0 .net "nota", 0 0, L_0xcf4870; 1 drivers +v0xcda4b0_0 .net "notaandb", 0 0, L_0xcf49e0; 1 drivers +v0xcda550_0 .net "notaxorb", 0 0, L_0xcf3e00; 1 drivers +v0xcda5f0_0 .net "notaxorbandborrowin", 0 0, L_0xcf4be0; 1 drivers +S_0xcd9870 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcd9320; + .timescale 0 0; +L_0xcf5070/d .functor XOR 1, L_0xcf6770, L_0xcf48d0, C4<0>, C4<0>; +L_0xcf5070 .delay (30,30,30) L_0xcf5070/d; +L_0xcf5150/d .functor XOR 1, L_0xcf5070, L_0xcf4a90, C4<0>, C4<0>; +L_0xcf5150 .delay (30,30,30) L_0xcf5150/d; +L_0xcf52f0/d .functor NOT 1, L_0xcf6770, C4<0>, C4<0>, C4<0>; +L_0xcf52f0 .delay (10,10,10) L_0xcf52f0/d; +L_0xcf53b0/d .functor AND 1, L_0xcf52f0, L_0xcf48d0, C4<1>, C4<1>; +L_0xcf53b0 .delay (30,30,30) L_0xcf53b0/d; +L_0xcf54c0/d .functor NOT 1, L_0xcf5070, C4<0>, C4<0>, C4<0>; +L_0xcf54c0 .delay (10,10,10) L_0xcf54c0/d; +L_0xcf5560/d .functor AND 1, L_0xcf54c0, L_0xcf4a90, C4<1>, C4<1>; +L_0xcf5560 .delay (30,30,30) L_0xcf5560/d; +L_0xcf56b0/d .functor OR 1, L_0xcf53b0, L_0xcf5560, C4<0>, C4<0>; +L_0xcf56b0 .delay (30,30,30) L_0xcf56b0/d; +v0xcd9960_0 .alias "a", 0 0, v0xcdb2d0_0; +v0xcd99e0_0 .net "axorb", 0 0, L_0xcf5070; 1 drivers +v0xcd9a80_0 .alias "b", 0 0, v0xcdb350_0; +v0xcd9b20_0 .alias "borrowin", 0 0, v0xcdb3d0_0; +v0xcd9bd0_0 .alias "borrowout", 0 0, v0xcdb5b0_0; +v0xcd9c70_0 .alias "diff", 0 0, v0xcdbcd0_0; +v0xcd9d10_0 .net "nota", 0 0, L_0xcf52f0; 1 drivers +v0xcd9db0_0 .net "notaandb", 0 0, L_0xcf53b0; 1 drivers +v0xcd9e50_0 .net "notaxorb", 0 0, L_0xcf54c0; 1 drivers +v0xcd9ef0_0 .net "notaxorbandborrowin", 0 0, L_0xcf5560; 1 drivers +S_0xcd9600 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcd9320; + .timescale 0 0; +v0xcd96f0_0 .alias "address", 2 0, v0xcec110_0; +v0xcd9770_0 .alias "inputs", 7 0, v0xcdb760_0; +v0xcd97f0_0 .alias "out", 0 0, v0xcdb910_0; +L_0xcf63c0 .part/v L_0xcf5b60, C4, 1; +S_0xcd9410 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcd9320; + .timescale 0 0; +v0xcd90e0_0 .alias "address", 2 0, v0xcec110_0; +v0xcd9500_0 .alias "inputs", 7 0, v0xcdb6b0_0; +v0xcd9580_0 .alias "out", 0 0, v0xcdb450_0; +L_0xcf64b0 .part/v L_0xcf60f0, C4, 1; +S_0xcd66b0 .scope module, "a4" "ALU1bit" 2 36, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xcf7da0/d .functor XOR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf7da0 .delay (30,30,30) L_0xcf7da0/d; +L_0xcf8690/d .functor AND 1, L_0xcf94c0, L_0xcf9770, C4<1>, C4<1>; +L_0xcf8690 .delay (30,30,30) L_0xcf8690/d; +L_0xcf8750/d .functor NAND 1, L_0xcf94c0, L_0xcf9770, C4<1>, C4<1>; +L_0xcf8750 .delay (20,20,20) L_0xcf8750/d; +L_0xcf8810/d .functor NOR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf8810 .delay (20,20,20) L_0xcf8810/d; +L_0xcf88d0/d .functor OR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf88d0 .delay (30,30,30) L_0xcf88d0/d; +v0xcd8340_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcd8400_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcd84a0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcd8540_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcd85c0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcd8660_0 .net "a", 0 0, L_0xcf94c0; 1 drivers +v0xcd86e0_0 .net "b", 0 0, L_0xcf9770; 1 drivers +v0xcd8760_0 .net "cin", 0 0, L_0xcf9ac0; 1 drivers +v0xcd87e0_0 .net "cout", 0 0, L_0xcf9170; 1 drivers +v0xcd8860_0 .net "cout_ADD", 0 0, L_0xcf7240; 1 drivers +v0xcd8940_0 .net "cout_SLT", 0 0, L_0xcf84c0; 1 drivers +v0xcd89c0_0 .net "cout_SUB", 0 0, L_0xcf7bf0; 1 drivers +v0xcd8a40_0 .net "muxCout", 7 0, L_0xcf8db0; 1 drivers +v0xcd8af0_0 .net "muxRes", 7 0, L_0xcf8970; 1 drivers +v0xcd8c20_0 .alias "op", 2 0, v0xcec110_0; +v0xcd8ca0_0 .net "out", 0 0, L_0xcf9080; 1 drivers +v0xcd8b70_0 .net "res_ADD", 0 0, L_0xcf4b30; 1 drivers +v0xcd8e10_0 .net "res_AND", 0 0, L_0xcf8690; 1 drivers +v0xcd8d20_0 .net "res_NAND", 0 0, L_0xcf8750; 1 drivers +v0xcd8f30_0 .net "res_NOR", 0 0, L_0xcf8810; 1 drivers +v0xcd8e90_0 .net "res_OR", 0 0, L_0xcf88d0; 1 drivers +v0xcd9060_0 .net "res_SLT", 0 0, L_0xcf7f60; 1 drivers +v0xcd8fe0_0 .net "res_SUB", 0 0, L_0xcf74e0; 1 drivers +v0xcd91d0_0 .net "res_XOR", 0 0, L_0xcf7da0; 1 drivers +LS_0xcf8970_0_0 .concat [ 1 1 1 1], L_0xcf4b30, L_0xcf74e0, L_0xcf7da0, L_0xcf7f60; +LS_0xcf8970_0_4 .concat [ 1 1 1 1], L_0xcf8690, L_0xcf8750, L_0xcf8810, L_0xcf88d0; +L_0xcf8970 .concat [ 4 4 0 0], LS_0xcf8970_0_0, LS_0xcf8970_0_4; +LS_0xcf8db0_0_0 .concat [ 1 1 1 1], L_0xcf7240, L_0xcf7bf0, C4<0>, L_0xcf84c0; +LS_0xcf8db0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcf8db0 .concat [ 4 4 0 0], LS_0xcf8db0_0_0, LS_0xcf8db0_0_4; +S_0xcd7a80 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcd66b0; + .timescale 0 0; +L_0xcf30c0/d .functor XOR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf30c0 .delay (30,30,30) L_0xcf30c0/d; +L_0xcf4b30/d .functor XOR 1, L_0xcf30c0, L_0xcf9ac0, C4<0>, C4<0>; +L_0xcf4b30 .delay (30,30,30) L_0xcf4b30/d; +L_0xcf6e40/d .functor AND 1, L_0xcf94c0, L_0xcf9770, C4<1>, C4<1>; +L_0xcf6e40 .delay (30,30,30) L_0xcf6e40/d; +L_0xcf6f20/d .functor OR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf6f20 .delay (30,30,30) L_0xcf6f20/d; +L_0xcf6fe0/d .functor NOT 1, L_0xcf9ac0, C4<0>, C4<0>, C4<0>; +L_0xcf6fe0 .delay (10,10,10) L_0xcf6fe0/d; +L_0xcf7080/d .functor AND 1, L_0xcf6e40, L_0xcf6fe0, C4<1>, C4<1>; +L_0xcf7080 .delay (30,30,30) L_0xcf7080/d; +L_0xcf7180/d .functor AND 1, L_0xcf6f20, L_0xcf9ac0, C4<1>, C4<1>; +L_0xcf7180 .delay (30,30,30) L_0xcf7180/d; +L_0xcf7240/d .functor OR 1, L_0xcf7080, L_0xcf7180, C4<0>, C4<0>; +L_0xcf7240 .delay (30,30,30) L_0xcf7240/d; +v0xcd7b70_0 .net "_carryin", 0 0, L_0xcf6fe0; 1 drivers +v0xcd7c30_0 .alias "a", 0 0, v0xcd8660_0; +v0xcd7cb0_0 .net "aandb", 0 0, L_0xcf6e40; 1 drivers +v0xcd7d50_0 .net "aorb", 0 0, L_0xcf6f20; 1 drivers +v0xcd7dd0_0 .alias "b", 0 0, v0xcd86e0_0; +v0xcd7ea0_0 .alias "carryin", 0 0, v0xcd8760_0; +v0xcd7f70_0 .alias "carryout", 0 0, v0xcd8860_0; +v0xcd8010_0 .net "outputIfCarryin", 0 0, L_0xcf7080; 1 drivers +v0xcd8100_0 .net "outputIf_Carryin", 0 0, L_0xcf7180; 1 drivers +v0xcd81a0_0 .net "s", 0 0, L_0xcf30c0; 1 drivers +v0xcd82a0_0 .alias "sum", 0 0, v0xcd8b70_0; +S_0xcd7320 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcd66b0; + .timescale 0 0; +L_0xcf7460/d .functor XOR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf7460 .delay (30,30,30) L_0xcf7460/d; +L_0xcf74e0/d .functor XOR 1, L_0xcf7460, L_0xcf9ac0, C4<0>, C4<0>; +L_0xcf74e0 .delay (30,30,30) L_0xcf74e0/d; +L_0xcf7680/d .functor NOT 1, L_0xcf94c0, C4<0>, C4<0>, C4<0>; +L_0xcf7680 .delay (10,10,10) L_0xcf7680/d; +L_0xcf77f0/d .functor AND 1, L_0xcf7680, L_0xcf9770, C4<1>, C4<1>; +L_0xcf77f0 .delay (30,30,30) L_0xcf77f0/d; +L_0xcf6cf0/d .functor NOT 1, L_0xcf7460, C4<0>, C4<0>, C4<0>; +L_0xcf6cf0 .delay (10,10,10) L_0xcf6cf0/d; +L_0xcf79f0/d .functor AND 1, L_0xcf6cf0, L_0xcf9ac0, C4<1>, C4<1>; +L_0xcf79f0 .delay (30,30,30) L_0xcf79f0/d; +L_0xcf7bf0/d .functor OR 1, L_0xcf77f0, L_0xcf79f0, C4<0>, C4<0>; +L_0xcf7bf0 .delay (30,30,30) L_0xcf7bf0/d; +v0xcd7410_0 .alias "a", 0 0, v0xcd8660_0; +v0xcd74b0_0 .net "axorb", 0 0, L_0xcf7460; 1 drivers +v0xcd7530_0 .alias "b", 0 0, v0xcd86e0_0; +v0xcd75e0_0 .alias "borrowin", 0 0, v0xcd8760_0; +v0xcd76c0_0 .alias "borrowout", 0 0, v0xcd89c0_0; +v0xcd7740_0 .alias "diff", 0 0, v0xcd8fe0_0; +v0xcd77c0_0 .net "nota", 0 0, L_0xcf7680; 1 drivers +v0xcd7840_0 .net "notaandb", 0 0, L_0xcf77f0; 1 drivers +v0xcd78e0_0 .net "notaxorb", 0 0, L_0xcf6cf0; 1 drivers +v0xcd7980_0 .net "notaxorbandborrowin", 0 0, L_0xcf79f0; 1 drivers +S_0xcd6c00 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcd66b0; + .timescale 0 0; +L_0xcf7e80/d .functor XOR 1, L_0xcf94c0, L_0xcf9770, C4<0>, C4<0>; +L_0xcf7e80 .delay (30,30,30) L_0xcf7e80/d; +L_0xcf7f60/d .functor XOR 1, L_0xcf7e80, L_0xcf9ac0, C4<0>, C4<0>; +L_0xcf7f60 .delay (30,30,30) L_0xcf7f60/d; +L_0xcf8100/d .functor NOT 1, L_0xcf94c0, C4<0>, C4<0>, C4<0>; +L_0xcf8100 .delay (10,10,10) L_0xcf8100/d; +L_0xcf81c0/d .functor AND 1, L_0xcf8100, L_0xcf9770, C4<1>, C4<1>; +L_0xcf81c0 .delay (30,30,30) L_0xcf81c0/d; +L_0xcf82d0/d .functor NOT 1, L_0xcf7e80, C4<0>, C4<0>, C4<0>; +L_0xcf82d0 .delay (10,10,10) L_0xcf82d0/d; +L_0xcf8370/d .functor AND 1, L_0xcf82d0, L_0xcf9ac0, C4<1>, C4<1>; +L_0xcf8370 .delay (30,30,30) L_0xcf8370/d; +L_0xcf84c0/d .functor OR 1, L_0xcf81c0, L_0xcf8370, C4<0>, C4<0>; +L_0xcf84c0 .delay (30,30,30) L_0xcf84c0/d; +v0xcd6cf0_0 .alias "a", 0 0, v0xcd8660_0; +v0xcd6d70_0 .net "axorb", 0 0, L_0xcf7e80; 1 drivers +v0xcd6e10_0 .alias "b", 0 0, v0xcd86e0_0; +v0xcd6eb0_0 .alias "borrowin", 0 0, v0xcd8760_0; +v0xcd6f60_0 .alias "borrowout", 0 0, v0xcd8940_0; +v0xcd7000_0 .alias "diff", 0 0, v0xcd9060_0; +v0xcd70a0_0 .net "nota", 0 0, L_0xcf8100; 1 drivers +v0xcd7140_0 .net "notaandb", 0 0, L_0xcf81c0; 1 drivers +v0xcd71e0_0 .net "notaxorb", 0 0, L_0xcf82d0; 1 drivers +v0xcd7280_0 .net "notaxorbandborrowin", 0 0, L_0xcf8370; 1 drivers +S_0xcd6990 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcd66b0; + .timescale 0 0; +v0xcd6a80_0 .alias "address", 2 0, v0xcec110_0; +v0xcd6b00_0 .alias "inputs", 7 0, v0xcd8af0_0; +v0xcd6b80_0 .alias "out", 0 0, v0xcd8ca0_0; +L_0xcf9080 .part/v L_0xcf8970, C4, 1; +S_0xcd67a0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcd66b0; + .timescale 0 0; +v0xcd6470_0 .alias "address", 2 0, v0xcec110_0; +v0xcd6890_0 .alias "inputs", 7 0, v0xcd8a40_0; +v0xcd6910_0 .alias "out", 0 0, v0xcd87e0_0; +L_0xcf9170 .part/v L_0xcf8db0, C4, 1; +S_0xcd3a40 .scope module, "a5" "ALU1bit" 2 37, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xcfac30/d .functor XOR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcfac30 .delay (30,30,30) L_0xcfac30/d; +L_0xcfb500/d .functor AND 1, L_0xcfc390, L_0xcfc1d0, C4<1>, C4<1>; +L_0xcfb500 .delay (30,30,30) L_0xcfb500/d; +L_0xcfb5c0/d .functor NAND 1, L_0xcfc390, L_0xcfc1d0, C4<1>, C4<1>; +L_0xcfb5c0 .delay (20,20,20) L_0xcfb5c0/d; +L_0xcfb680/d .functor NOR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcfb680 .delay (20,20,20) L_0xcfb680/d; +L_0xcfb740/d .functor OR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcfb740 .delay (30,30,30) L_0xcfb740/d; +v0xcd56d0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcd5790_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcd5830_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcd58d0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcd5950_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcd59f0_0 .net "a", 0 0, L_0xcfc390; 1 drivers +v0xcd5a70_0 .net "b", 0 0, L_0xcfc1d0; 1 drivers +v0xcd5af0_0 .net "cin", 0 0, L_0xcfa6f0; 1 drivers +v0xcd5b70_0 .net "cout", 0 0, L_0xcfc040; 1 drivers +v0xcd5bf0_0 .net "cout_ADD", 0 0, L_0xcfa0e0; 1 drivers +v0xcd5cd0_0 .net "cout_SLT", 0 0, L_0xcfb330; 1 drivers +v0xcd5d50_0 .net "cout_SUB", 0 0, L_0xcfaaa0; 1 drivers +v0xcd5dd0_0 .net "muxCout", 7 0, L_0xcfbaf0; 1 drivers +v0xcd5e80_0 .net "muxRes", 7 0, L_0xcfb7e0; 1 drivers +v0xcd5fb0_0 .alias "op", 2 0, v0xcec110_0; +v0xcd6030_0 .net "out", 0 0, L_0xcfbf50; 1 drivers +v0xcd5f00_0 .net "res_ADD", 0 0, L_0xcf9bf0; 1 drivers +v0xcd61a0_0 .net "res_AND", 0 0, L_0xcfb500; 1 drivers +v0xcd60b0_0 .net "res_NAND", 0 0, L_0xcfb5c0; 1 drivers +v0xcd62c0_0 .net "res_NOR", 0 0, L_0xcfb680; 1 drivers +v0xcd6220_0 .net "res_OR", 0 0, L_0xcfb740; 1 drivers +v0xcd63f0_0 .net "res_SLT", 0 0, L_0xcfadd0; 1 drivers +v0xcd6370_0 .net "res_SUB", 0 0, L_0xcfa330; 1 drivers +v0xcd6560_0 .net "res_XOR", 0 0, L_0xcfac30; 1 drivers +LS_0xcfb7e0_0_0 .concat [ 1 1 1 1], L_0xcf9bf0, L_0xcfa330, L_0xcfac30, L_0xcfadd0; +LS_0xcfb7e0_0_4 .concat [ 1 1 1 1], L_0xcfb500, L_0xcfb5c0, L_0xcfb680, L_0xcfb740; +L_0xcfb7e0 .concat [ 4 4 0 0], LS_0xcfb7e0_0_0, LS_0xcfb7e0_0_4; +LS_0xcfbaf0_0_0 .concat [ 1 1 1 1], L_0xcfa0e0, L_0xcfaaa0, C4<0>, L_0xcfb330; +LS_0xcfbaf0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcfbaf0 .concat [ 4 4 0 0], LS_0xcfbaf0_0_0, LS_0xcfbaf0_0_4; +S_0xcd4e10 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcd3a40; + .timescale 0 0; +L_0xcf7770/d .functor XOR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcf7770 .delay (30,30,30) L_0xcf7770/d; +L_0xcf9bf0/d .functor XOR 1, L_0xcf7770, L_0xcfa6f0, C4<0>, C4<0>; +L_0xcf9bf0 .delay (30,30,30) L_0xcf9bf0/d; +L_0xcf9d00/d .functor AND 1, L_0xcfc390, L_0xcfc1d0, C4<1>, C4<1>; +L_0xcf9d00 .delay (30,30,30) L_0xcf9d00/d; +L_0xcf9dc0/d .functor OR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcf9dc0 .delay (30,30,30) L_0xcf9dc0/d; +L_0xcf9e80/d .functor NOT 1, L_0xcfa6f0, C4<0>, C4<0>, C4<0>; +L_0xcf9e80 .delay (10,10,10) L_0xcf9e80/d; +L_0xcf9f20/d .functor AND 1, L_0xcf9d00, L_0xcf9e80, C4<1>, C4<1>; +L_0xcf9f20 .delay (30,30,30) L_0xcf9f20/d; +L_0xcfa020/d .functor AND 1, L_0xcf9dc0, L_0xcfa6f0, C4<1>, C4<1>; +L_0xcfa020 .delay (30,30,30) L_0xcfa020/d; +L_0xcfa0e0/d .functor OR 1, L_0xcf9f20, L_0xcfa020, C4<0>, C4<0>; +L_0xcfa0e0 .delay (30,30,30) L_0xcfa0e0/d; +v0xcd4f00_0 .net "_carryin", 0 0, L_0xcf9e80; 1 drivers +v0xcd4fc0_0 .alias "a", 0 0, v0xcd59f0_0; +v0xcd5040_0 .net "aandb", 0 0, L_0xcf9d00; 1 drivers +v0xcd50e0_0 .net "aorb", 0 0, L_0xcf9dc0; 1 drivers +v0xcd5160_0 .alias "b", 0 0, v0xcd5a70_0; +v0xcd5230_0 .alias "carryin", 0 0, v0xcd5af0_0; +v0xcd5300_0 .alias "carryout", 0 0, v0xcd5bf0_0; +v0xcd53a0_0 .net "outputIfCarryin", 0 0, L_0xcf9f20; 1 drivers +v0xcd5490_0 .net "outputIf_Carryin", 0 0, L_0xcfa020; 1 drivers +v0xcd5530_0 .net "s", 0 0, L_0xcf7770; 1 drivers +v0xcd5630_0 .alias "sum", 0 0, v0xcd5f00_0; +S_0xcd46b0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcd3a40; + .timescale 0 0; +L_0xcfa2b0/d .functor XOR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcfa2b0 .delay (30,30,30) L_0xcfa2b0/d; +L_0xcfa330/d .functor XOR 1, L_0xcfa2b0, L_0xcfa6f0, C4<0>, C4<0>; +L_0xcfa330 .delay (30,30,30) L_0xcfa330/d; +L_0xcfa4d0/d .functor NOT 1, L_0xcfc390, C4<0>, C4<0>, C4<0>; +L_0xcfa4d0 .delay (10,10,10) L_0xcfa4d0/d; +L_0xcfa640/d .functor AND 1, L_0xcfa4d0, L_0xcfc1d0, C4<1>, C4<1>; +L_0xcfa640 .delay (30,30,30) L_0xcfa640/d; +L_0xcfa800/d .functor NOT 1, L_0xcfa2b0, C4<0>, C4<0>, C4<0>; +L_0xcfa800 .delay (10,10,10) L_0xcfa800/d; +L_0xcfa8a0/d .functor AND 1, L_0xcfa800, L_0xcfa6f0, C4<1>, C4<1>; +L_0xcfa8a0 .delay (30,30,30) L_0xcfa8a0/d; +L_0xcfaaa0/d .functor OR 1, L_0xcfa640, L_0xcfa8a0, C4<0>, C4<0>; +L_0xcfaaa0 .delay (30,30,30) L_0xcfaaa0/d; +v0xcd47a0_0 .alias "a", 0 0, v0xcd59f0_0; +v0xcd4840_0 .net "axorb", 0 0, L_0xcfa2b0; 1 drivers +v0xcd48c0_0 .alias "b", 0 0, v0xcd5a70_0; +v0xcd4970_0 .alias "borrowin", 0 0, v0xcd5af0_0; +v0xcd4a50_0 .alias "borrowout", 0 0, v0xcd5d50_0; +v0xcd4ad0_0 .alias "diff", 0 0, v0xcd6370_0; +v0xcd4b50_0 .net "nota", 0 0, L_0xcfa4d0; 1 drivers +v0xcd4bd0_0 .net "notaandb", 0 0, L_0xcfa640; 1 drivers +v0xcd4c70_0 .net "notaxorb", 0 0, L_0xcfa800; 1 drivers +v0xcd4d10_0 .net "notaxorbandborrowin", 0 0, L_0xcfa8a0; 1 drivers +S_0xcd3f90 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcd3a40; + .timescale 0 0; +L_0xcfacf0/d .functor XOR 1, L_0xcfc390, L_0xcfc1d0, C4<0>, C4<0>; +L_0xcfacf0 .delay (30,30,30) L_0xcfacf0/d; +L_0xcfadd0/d .functor XOR 1, L_0xcfacf0, L_0xcfa6f0, C4<0>, C4<0>; +L_0xcfadd0 .delay (30,30,30) L_0xcfadd0/d; +L_0xcfaf70/d .functor NOT 1, L_0xcfc390, C4<0>, C4<0>, C4<0>; +L_0xcfaf70 .delay (10,10,10) L_0xcfaf70/d; +L_0xcfb030/d .functor AND 1, L_0xcfaf70, L_0xcfc1d0, C4<1>, C4<1>; +L_0xcfb030 .delay (30,30,30) L_0xcfb030/d; +L_0xcfb140/d .functor NOT 1, L_0xcfacf0, C4<0>, C4<0>, C4<0>; +L_0xcfb140 .delay (10,10,10) L_0xcfb140/d; +L_0xcfb1e0/d .functor AND 1, L_0xcfb140, L_0xcfa6f0, C4<1>, C4<1>; +L_0xcfb1e0 .delay (30,30,30) L_0xcfb1e0/d; +L_0xcfb330/d .functor OR 1, L_0xcfb030, L_0xcfb1e0, C4<0>, C4<0>; +L_0xcfb330 .delay (30,30,30) L_0xcfb330/d; +v0xcd4080_0 .alias "a", 0 0, v0xcd59f0_0; +v0xcd4100_0 .net "axorb", 0 0, L_0xcfacf0; 1 drivers +v0xcd41a0_0 .alias "b", 0 0, v0xcd5a70_0; +v0xcd4240_0 .alias "borrowin", 0 0, v0xcd5af0_0; +v0xcd42f0_0 .alias "borrowout", 0 0, v0xcd5cd0_0; +v0xcd4390_0 .alias "diff", 0 0, v0xcd63f0_0; +v0xcd4430_0 .net "nota", 0 0, L_0xcfaf70; 1 drivers +v0xcd44d0_0 .net "notaandb", 0 0, L_0xcfb030; 1 drivers +v0xcd4570_0 .net "notaxorb", 0 0, L_0xcfb140; 1 drivers +v0xcd4610_0 .net "notaxorbandborrowin", 0 0, L_0xcfb1e0; 1 drivers +S_0xcd3d20 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcd3a40; + .timescale 0 0; +v0xcd3e10_0 .alias "address", 2 0, v0xcec110_0; +v0xcd3e90_0 .alias "inputs", 7 0, v0xcd5e80_0; +v0xcd3f10_0 .alias "out", 0 0, v0xcd6030_0; +L_0xcfbf50 .part/v L_0xcfb7e0, C4, 1; +S_0xcd3b30 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcd3a40; + .timescale 0 0; +v0xcd3800_0 .alias "address", 2 0, v0xcec110_0; +v0xcd3c20_0 .alias "inputs", 7 0, v0xcd5dd0_0; +v0xcd3ca0_0 .alias "out", 0 0, v0xcd5b70_0; +L_0xcfc040 .part/v L_0xcfbaf0, C4, 1; +S_0xcd0dd0 .scope module, "a6" "ALU1bit" 2 38, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xcfda50/d .functor XOR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfda50 .delay (30,30,30) L_0xcfda50/d; +L_0xcfe320/d .functor AND 1, L_0xcfa530, L_0xcfd350, C4<1>, C4<1>; +L_0xcfe320 .delay (30,30,30) L_0xcfe320/d; +L_0xcfe3e0/d .functor NAND 1, L_0xcfa530, L_0xcfd350, C4<1>, C4<1>; +L_0xcfe3e0 .delay (20,20,20) L_0xcfe3e0/d; +L_0xcfe4a0/d .functor NOR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfe4a0 .delay (20,20,20) L_0xcfe4a0/d; +L_0xcfe560/d .functor OR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfe560 .delay (30,30,30) L_0xcfe560/d; +v0xcd2a60_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcd2b20_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcd2bc0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcd2c60_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcd2ce0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcd2d80_0 .net "a", 0 0, L_0xcfa530; 1 drivers +v0xcd2e00_0 .net "b", 0 0, L_0xcfd350; 1 drivers +v0xcd2e80_0 .net "cin", 0 0, L_0xcff040; 1 drivers +v0xcd2f00_0 .net "cout", 0 0, L_0xcfee10; 1 drivers +v0xcd2f80_0 .net "cout_ADD", 0 0, L_0xcfceb0; 1 drivers +v0xcd3060_0 .net "cout_SLT", 0 0, L_0xcfe150; 1 drivers +v0xcd30e0_0 .net "cout_SUB", 0 0, L_0xcfd8c0; 1 drivers +v0xcd3160_0 .net "muxCout", 7 0, L_0xcfea50; 1 drivers +v0xcd3210_0 .net "muxRes", 7 0, L_0xcfe600; 1 drivers +v0xcd3340_0 .alias "op", 2 0, v0xcec110_0; +v0xcd33c0_0 .net "out", 0 0, L_0xcfed20; 1 drivers +v0xcd3290_0 .net "res_ADD", 0 0, L_0xcfc8e0; 1 drivers +v0xcd3530_0 .net "res_AND", 0 0, L_0xcfe320; 1 drivers +v0xcd3440_0 .net "res_NAND", 0 0, L_0xcfe3e0; 1 drivers +v0xcd3650_0 .net "res_NOR", 0 0, L_0xcfe4a0; 1 drivers +v0xcd35b0_0 .net "res_OR", 0 0, L_0xcfe560; 1 drivers +v0xcd3780_0 .net "res_SLT", 0 0, L_0xcfdbf0; 1 drivers +v0xcd3700_0 .net "res_SUB", 0 0, L_0xcfd150; 1 drivers +v0xcd38f0_0 .net "res_XOR", 0 0, L_0xcfda50; 1 drivers +LS_0xcfe600_0_0 .concat [ 1 1 1 1], L_0xcfc8e0, L_0xcfd150, L_0xcfda50, L_0xcfdbf0; +LS_0xcfe600_0_4 .concat [ 1 1 1 1], L_0xcfe320, L_0xcfe3e0, L_0xcfe4a0, L_0xcfe560; +L_0xcfe600 .concat [ 4 4 0 0], LS_0xcfe600_0_0, LS_0xcfe600_0_4; +LS_0xcfea50_0_0 .concat [ 1 1 1 1], L_0xcfceb0, L_0xcfd8c0, C4<0>, L_0xcfe150; +LS_0xcfea50_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xcfea50 .concat [ 4 4 0 0], LS_0xcfea50_0_0, LS_0xcfea50_0_4; +S_0xcd21a0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcd0dd0; + .timescale 0 0; +L_0xcfa790/d .functor XOR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfa790 .delay (30,30,30) L_0xcfa790/d; +L_0xcfc8e0/d .functor XOR 1, L_0xcfa790, L_0xcff040, C4<0>, C4<0>; +L_0xcfc8e0 .delay (30,30,30) L_0xcfc8e0/d; +L_0xcfca10/d .functor AND 1, L_0xcfa530, L_0xcfd350, C4<1>, C4<1>; +L_0xcfca10 .delay (30,30,30) L_0xcfca10/d; +L_0xcfcaf0/d .functor OR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfcaf0 .delay (30,30,30) L_0xcfcaf0/d; +L_0xcfcbb0/d .functor NOT 1, L_0xcff040, C4<0>, C4<0>, C4<0>; +L_0xcfcbb0 .delay (10,10,10) L_0xcfcbb0/d; +L_0xcfcc50/d .functor AND 1, L_0xcfca10, L_0xcfcbb0, C4<1>, C4<1>; +L_0xcfcc50 .delay (30,30,30) L_0xcfcc50/d; +L_0xcfcda0/d .functor AND 1, L_0xcfcaf0, L_0xcff040, C4<1>, C4<1>; +L_0xcfcda0 .delay (30,30,30) L_0xcfcda0/d; +L_0xcfceb0/d .functor OR 1, L_0xcfcc50, L_0xcfcda0, C4<0>, C4<0>; +L_0xcfceb0 .delay (30,30,30) L_0xcfceb0/d; +v0xcd2290_0 .net "_carryin", 0 0, L_0xcfcbb0; 1 drivers +v0xcd2350_0 .alias "a", 0 0, v0xcd2d80_0; +v0xcd23d0_0 .net "aandb", 0 0, L_0xcfca10; 1 drivers +v0xcd2470_0 .net "aorb", 0 0, L_0xcfcaf0; 1 drivers +v0xcd24f0_0 .alias "b", 0 0, v0xcd2e00_0; +v0xcd25c0_0 .alias "carryin", 0 0, v0xcd2e80_0; +v0xcd2690_0 .alias "carryout", 0 0, v0xcd2f80_0; +v0xcd2730_0 .net "outputIfCarryin", 0 0, L_0xcfcc50; 1 drivers +v0xcd2820_0 .net "outputIf_Carryin", 0 0, L_0xcfcda0; 1 drivers +v0xcd28c0_0 .net "s", 0 0, L_0xcfa790; 1 drivers +v0xcd29c0_0 .alias "sum", 0 0, v0xcd3290_0; +S_0xcd1a40 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcd0dd0; + .timescale 0 0; +L_0xcfd0d0/d .functor XOR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfd0d0 .delay (30,30,30) L_0xcfd0d0/d; +L_0xcfd150/d .functor XOR 1, L_0xcfd0d0, L_0xcff040, C4<0>, C4<0>; +L_0xcfd150 .delay (30,30,30) L_0xcfd150/d; +L_0xcfd2f0/d .functor NOT 1, L_0xcfa530, C4<0>, C4<0>, C4<0>; +L_0xcfd2f0 .delay (10,10,10) L_0xcfd2f0/d; +L_0xcfd460/d .functor AND 1, L_0xcfd2f0, L_0xcfd350, C4<1>, C4<1>; +L_0xcfd460 .delay (30,30,30) L_0xcfd460/d; +L_0xcfd620/d .functor NOT 1, L_0xcfd0d0, C4<0>, C4<0>, C4<0>; +L_0xcfd620 .delay (10,10,10) L_0xcfd620/d; +L_0xcfd6c0/d .functor AND 1, L_0xcfd620, L_0xcff040, C4<1>, C4<1>; +L_0xcfd6c0 .delay (30,30,30) L_0xcfd6c0/d; +L_0xcfd8c0/d .functor OR 1, L_0xcfd460, L_0xcfd6c0, C4<0>, C4<0>; +L_0xcfd8c0 .delay (30,30,30) L_0xcfd8c0/d; +v0xcd1b30_0 .alias "a", 0 0, v0xcd2d80_0; +v0xcd1bd0_0 .net "axorb", 0 0, L_0xcfd0d0; 1 drivers +v0xcd1c50_0 .alias "b", 0 0, v0xcd2e00_0; +v0xcd1d00_0 .alias "borrowin", 0 0, v0xcd2e80_0; +v0xcd1de0_0 .alias "borrowout", 0 0, v0xcd30e0_0; +v0xcd1e60_0 .alias "diff", 0 0, v0xcd3700_0; +v0xcd1ee0_0 .net "nota", 0 0, L_0xcfd2f0; 1 drivers +v0xcd1f60_0 .net "notaandb", 0 0, L_0xcfd460; 1 drivers +v0xcd2000_0 .net "notaxorb", 0 0, L_0xcfd620; 1 drivers +v0xcd20a0_0 .net "notaxorbandborrowin", 0 0, L_0xcfd6c0; 1 drivers +S_0xcd1320 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcd0dd0; + .timescale 0 0; +L_0xcfdb10/d .functor XOR 1, L_0xcfa530, L_0xcfd350, C4<0>, C4<0>; +L_0xcfdb10 .delay (30,30,30) L_0xcfdb10/d; +L_0xcfdbf0/d .functor XOR 1, L_0xcfdb10, L_0xcff040, C4<0>, C4<0>; +L_0xcfdbf0 .delay (30,30,30) L_0xcfdbf0/d; +L_0xcfdd90/d .functor NOT 1, L_0xcfa530, C4<0>, C4<0>, C4<0>; +L_0xcfdd90 .delay (10,10,10) L_0xcfdd90/d; +L_0xcfde50/d .functor AND 1, L_0xcfdd90, L_0xcfd350, C4<1>, C4<1>; +L_0xcfde50 .delay (30,30,30) L_0xcfde50/d; +L_0xcfdf60/d .functor NOT 1, L_0xcfdb10, C4<0>, C4<0>, C4<0>; +L_0xcfdf60 .delay (10,10,10) L_0xcfdf60/d; +L_0xcfe000/d .functor AND 1, L_0xcfdf60, L_0xcff040, C4<1>, C4<1>; +L_0xcfe000 .delay (30,30,30) L_0xcfe000/d; +L_0xcfe150/d .functor OR 1, L_0xcfde50, L_0xcfe000, C4<0>, C4<0>; +L_0xcfe150 .delay (30,30,30) L_0xcfe150/d; +v0xcd1410_0 .alias "a", 0 0, v0xcd2d80_0; +v0xcd1490_0 .net "axorb", 0 0, L_0xcfdb10; 1 drivers +v0xcd1530_0 .alias "b", 0 0, v0xcd2e00_0; +v0xcd15d0_0 .alias "borrowin", 0 0, v0xcd2e80_0; +v0xcd1680_0 .alias "borrowout", 0 0, v0xcd3060_0; +v0xcd1720_0 .alias "diff", 0 0, v0xcd3780_0; +v0xcd17c0_0 .net "nota", 0 0, L_0xcfdd90; 1 drivers +v0xcd1860_0 .net "notaandb", 0 0, L_0xcfde50; 1 drivers +v0xcd1900_0 .net "notaxorb", 0 0, L_0xcfdf60; 1 drivers +v0xcd19a0_0 .net "notaxorbandborrowin", 0 0, L_0xcfe000; 1 drivers +S_0xcd10b0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcd0dd0; + .timescale 0 0; +v0xcd11a0_0 .alias "address", 2 0, v0xcec110_0; +v0xcd1220_0 .alias "inputs", 7 0, v0xcd3210_0; +v0xcd12a0_0 .alias "out", 0 0, v0xcd33c0_0; +L_0xcfed20 .part/v L_0xcfe600, C4, 1; +S_0xcd0ec0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcd0dd0; + .timescale 0 0; +v0xcd0b90_0 .alias "address", 2 0, v0xcec110_0; +v0xcd0fb0_0 .alias "inputs", 7 0, v0xcd3160_0; +v0xcd1030_0 .alias "out", 0 0, v0xcd2f00_0; +L_0xcfee10 .part/v L_0xcfea50, C4, 1; +S_0xcce160 .scope module, "a7" "ALU1bit" 2 39, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd00210/d .functor XOR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xd00210 .delay (30,30,30) L_0xd00210/d; +L_0xd00940/d .functor AND 1, L_0xd01650, L_0xd01550, C4<1>, C4<1>; +L_0xd00940 .delay (30,30,30) L_0xd00940/d; +L_0xd009e0/d .functor NAND 1, L_0xd01650, L_0xd01550, C4<1>, C4<1>; +L_0xd009e0 .delay (20,20,20) L_0xd009e0/d; +L_0xd00a80/d .functor NOR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xd00a80 .delay (20,20,20) L_0xd00a80/d; +L_0xd00b20/d .functor OR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xd00b20 .delay (30,30,30) L_0xd00b20/d; +v0xccfdf0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xccfeb0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xccff50_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xccfff0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcd0070_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcd0110_0 .net "a", 0 0, L_0xd01650; 1 drivers +v0xcd0190_0 .net "b", 0 0, L_0xd01550; 1 drivers +v0xcd0210_0 .net "cin", 0 0, L_0xd00100; 1 drivers +v0xcd0290_0 .net "cout", 0 0, L_0xd013c0; 1 drivers +v0xcd0310_0 .net "cout_ADD", 0 0, L_0xcffbf0; 1 drivers +v0xcd03f0_0 .net "cout_SLT", 0 0, L_0xd007b0; 1 drivers +v0xcd0470_0 .net "cout_SUB", 0 0, L_0xce1300; 1 drivers +v0xcd04f0_0 .net "muxCout", 7 0, L_0xd01000; 1 drivers +v0xcd05a0_0 .net "muxRes", 7 0, L_0xd00bc0; 1 drivers +v0xcd06d0_0 .alias "op", 2 0, v0xcec110_0; +v0xcd0750_0 .net "out", 0 0, L_0xd012d0; 1 drivers +v0xcd0620_0 .net "res_ADD", 0 0, L_0xcff660; 1 drivers +v0xcd08c0_0 .net "res_AND", 0 0, L_0xd00940; 1 drivers +v0xcd07d0_0 .net "res_NAND", 0 0, L_0xd009e0; 1 drivers +v0xcd09e0_0 .net "res_NOR", 0 0, L_0xd00a80; 1 drivers +v0xcd0940_0 .net "res_OR", 0 0, L_0xd00b20; 1 drivers +v0xcd0b10_0 .net "res_SLT", 0 0, L_0xd00310; 1 drivers +v0xcd0a90_0 .net "res_SUB", 0 0, L_0xcffe90; 1 drivers +v0xcd0c80_0 .net "res_XOR", 0 0, L_0xd00210; 1 drivers +LS_0xd00bc0_0_0 .concat [ 1 1 1 1], L_0xcff660, L_0xcffe90, L_0xd00210, L_0xd00310; +LS_0xd00bc0_0_4 .concat [ 1 1 1 1], L_0xd00940, L_0xd009e0, L_0xd00a80, L_0xd00b20; +L_0xd00bc0 .concat [ 4 4 0 0], LS_0xd00bc0_0_0, LS_0xd00bc0_0_4; +LS_0xd01000_0_0 .concat [ 1 1 1 1], L_0xcffbf0, L_0xce1300, C4<0>, L_0xd007b0; +LS_0xd01000_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd01000 .concat [ 4 4 0 0], LS_0xd01000_0_0, LS_0xd01000_0_4; +S_0xccf530 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcce160; + .timescale 0 0; +L_0xcfd3f0/d .functor XOR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xcfd3f0 .delay (30,30,30) L_0xcfd3f0/d; +L_0xcff660/d .functor XOR 1, L_0xcfd3f0, L_0xd00100, C4<0>, C4<0>; +L_0xcff660 .delay (30,30,30) L_0xcff660/d; +L_0xcff790/d .functor AND 1, L_0xd01650, L_0xd01550, C4<1>, C4<1>; +L_0xcff790 .delay (30,30,30) L_0xcff790/d; +L_0xcff830/d .functor OR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xcff830 .delay (30,30,30) L_0xcff830/d; +L_0xcff8f0/d .functor NOT 1, L_0xd00100, C4<0>, C4<0>, C4<0>; +L_0xcff8f0 .delay (10,10,10) L_0xcff8f0/d; +L_0xcff990/d .functor AND 1, L_0xcff790, L_0xcff8f0, C4<1>, C4<1>; +L_0xcff990 .delay (30,30,30) L_0xcff990/d; +L_0xcffae0/d .functor AND 1, L_0xcff830, L_0xd00100, C4<1>, C4<1>; +L_0xcffae0 .delay (30,30,30) L_0xcffae0/d; +L_0xcffbf0/d .functor OR 1, L_0xcff990, L_0xcffae0, C4<0>, C4<0>; +L_0xcffbf0 .delay (30,30,30) L_0xcffbf0/d; +v0xccf620_0 .net "_carryin", 0 0, L_0xcff8f0; 1 drivers +v0xccf6e0_0 .alias "a", 0 0, v0xcd0110_0; +v0xccf760_0 .net "aandb", 0 0, L_0xcff790; 1 drivers +v0xccf800_0 .net "aorb", 0 0, L_0xcff830; 1 drivers +v0xccf880_0 .alias "b", 0 0, v0xcd0190_0; +v0xccf950_0 .alias "carryin", 0 0, v0xcd0210_0; +v0xccfa20_0 .alias "carryout", 0 0, v0xcd0310_0; +v0xccfac0_0 .net "outputIfCarryin", 0 0, L_0xcff990; 1 drivers +v0xccfbb0_0 .net "outputIf_Carryin", 0 0, L_0xcffae0; 1 drivers +v0xccfc50_0 .net "s", 0 0, L_0xcfd3f0; 1 drivers +v0xccfd50_0 .alias "sum", 0 0, v0xcd0620_0; +S_0xccedd0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcce160; + .timescale 0 0; +L_0xcffe10/d .functor XOR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xcffe10 .delay (30,30,30) L_0xcffe10/d; +L_0xcffe90/d .functor XOR 1, L_0xcffe10, L_0xd00100, C4<0>, C4<0>; +L_0xcffe90 .delay (30,30,30) L_0xcffe90/d; +L_0xcd1d80/d .functor NOT 1, L_0xd01650, C4<0>, C4<0>, C4<0>; +L_0xcd1d80 .delay (10,10,10) L_0xcd1d80/d; +L_0xcd49f0/d .functor AND 1, L_0xcd1d80, L_0xd01550, C4<1>, C4<1>; +L_0xcd49f0 .delay (30,30,30) L_0xcd49f0/d; +L_0xcd8db0/d .functor NOT 1, L_0xcffe10, C4<0>, C4<0>, C4<0>; +L_0xcd8db0 .delay (10,10,10) L_0xcd8db0/d; +L_0xcdba20/d .functor AND 1, L_0xcd8db0, L_0xd00100, C4<1>, C4<1>; +L_0xcdba20 .delay (30,30,30) L_0xcdba20/d; +L_0xce1300/d .functor OR 1, L_0xcd49f0, L_0xcdba20, C4<0>, C4<0>; +L_0xce1300 .delay (30,30,30) L_0xce1300/d; +v0xcceec0_0 .alias "a", 0 0, v0xcd0110_0; +v0xccef60_0 .net "axorb", 0 0, L_0xcffe10; 1 drivers +v0xccefe0_0 .alias "b", 0 0, v0xcd0190_0; +v0xccf090_0 .alias "borrowin", 0 0, v0xcd0210_0; +v0xccf170_0 .alias "borrowout", 0 0, v0xcd0470_0; +v0xccf1f0_0 .alias "diff", 0 0, v0xcd0a90_0; +v0xccf270_0 .net "nota", 0 0, L_0xcd1d80; 1 drivers +v0xccf2f0_0 .net "notaandb", 0 0, L_0xcd49f0; 1 drivers +v0xccf390_0 .net "notaxorb", 0 0, L_0xcd8db0; 1 drivers +v0xccf430_0 .net "notaxorbandborrowin", 0 0, L_0xcdba20; 1 drivers +S_0xcce6b0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcce160; + .timescale 0 0; +L_0xd00270/d .functor XOR 1, L_0xd01650, L_0xd01550, C4<0>, C4<0>; +L_0xd00270 .delay (30,30,30) L_0xd00270/d; +L_0xd00310/d .functor XOR 1, L_0xd00270, L_0xd00100, C4<0>, C4<0>; +L_0xd00310 .delay (30,30,30) L_0xd00310/d; +L_0xd00450/d .functor NOT 1, L_0xd01650, C4<0>, C4<0>, C4<0>; +L_0xd00450 .delay (10,10,10) L_0xd00450/d; +L_0xd004f0/d .functor AND 1, L_0xd00450, L_0xd01550, C4<1>, C4<1>; +L_0xd004f0 .delay (30,30,30) L_0xd004f0/d; +L_0xd005e0/d .functor NOT 1, L_0xd00270, C4<0>, C4<0>, C4<0>; +L_0xd005e0 .delay (10,10,10) L_0xd005e0/d; +L_0xd00680/d .functor AND 1, L_0xd005e0, L_0xd00100, C4<1>, C4<1>; +L_0xd00680 .delay (30,30,30) L_0xd00680/d; +L_0xd007b0/d .functor OR 1, L_0xd004f0, L_0xd00680, C4<0>, C4<0>; +L_0xd007b0 .delay (30,30,30) L_0xd007b0/d; +v0xcce7a0_0 .alias "a", 0 0, v0xcd0110_0; +v0xcce820_0 .net "axorb", 0 0, L_0xd00270; 1 drivers +v0xcce8c0_0 .alias "b", 0 0, v0xcd0190_0; +v0xcce960_0 .alias "borrowin", 0 0, v0xcd0210_0; +v0xccea10_0 .alias "borrowout", 0 0, v0xcd03f0_0; +v0xcceab0_0 .alias "diff", 0 0, v0xcd0b10_0; +v0xcceb50_0 .net "nota", 0 0, L_0xd00450; 1 drivers +v0xccebf0_0 .net "notaandb", 0 0, L_0xd004f0; 1 drivers +v0xccec90_0 .net "notaxorb", 0 0, L_0xd005e0; 1 drivers +v0xcced30_0 .net "notaxorbandborrowin", 0 0, L_0xd00680; 1 drivers +S_0xcce440 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcce160; + .timescale 0 0; +v0xcce530_0 .alias "address", 2 0, v0xcec110_0; +v0xcce5b0_0 .alias "inputs", 7 0, v0xcd05a0_0; +v0xcce630_0 .alias "out", 0 0, v0xcd0750_0; +L_0xd012d0 .part/v L_0xd00bc0, C4, 1; +S_0xcce250 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcce160; + .timescale 0 0; +v0xccdf20_0 .alias "address", 2 0, v0xcec110_0; +v0xcce340_0 .alias "inputs", 7 0, v0xcd04f0_0; +v0xcce3c0_0 .alias "out", 0 0, v0xcd0290_0; +L_0xd013c0 .part/v L_0xd01000, C4, 1; +S_0xccb4f0 .scope module, "a8" "ALU1bit" 2 40, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd02b90/d .functor XOR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd02b90 .delay (30,30,30) L_0xd02b90/d; +L_0xd03320/d .functor AND 1, L_0xd01b10, L_0xd04410, C4<1>, C4<1>; +L_0xd03320 .delay (30,30,30) L_0xd03320/d; +L_0xd03400/d .functor NAND 1, L_0xd01b10, L_0xd04410, C4<1>, C4<1>; +L_0xd03400 .delay (20,20,20) L_0xd03400/d; +L_0xd034c0/d .functor NOR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd034c0 .delay (20,20,20) L_0xd034c0/d; +L_0xd03580/d .functor OR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd03580 .delay (30,30,30) L_0xd03580/d; +v0xccd180_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xccd240_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xccd2e0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xccd380_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xccd400_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xccd4a0_0 .net "a", 0 0, L_0xd01b10; 1 drivers +v0xccd520_0 .net "b", 0 0, L_0xd04410; 1 drivers +v0xccd5a0_0 .net "cin", 0 0, L_0xd040d0; 1 drivers +v0xccd620_0 .net "cout", 0 0, L_0xd03d90; 1 drivers +v0xccd6a0_0 .net "cout_ADD", 0 0, L_0xd020f0; 1 drivers +v0xccd780_0 .net "cout_SLT", 0 0, L_0xd03170; 1 drivers +v0xccd800_0 .net "cout_SUB", 0 0, L_0xd02a00; 1 drivers +v0xccd880_0 .net "muxCout", 7 0, L_0xd00f10; 1 drivers +v0xccd930_0 .net "muxRes", 7 0, L_0xd03620; 1 drivers +v0xccda60_0 .alias "op", 2 0, v0xcec110_0; +v0xccdae0_0 .net "out", 0 0, L_0xd03ca0; 1 drivers +v0xccd9b0_0 .net "res_ADD", 0 0, L_0xd001a0; 1 drivers +v0xccdc50_0 .net "res_AND", 0 0, L_0xd03320; 1 drivers +v0xccdb60_0 .net "res_NAND", 0 0, L_0xd03400; 1 drivers +v0xccdd70_0 .net "res_NOR", 0 0, L_0xd034c0; 1 drivers +v0xccdcd0_0 .net "res_OR", 0 0, L_0xd03580; 1 drivers +v0xccdea0_0 .net "res_SLT", 0 0, L_0xd02cd0; 1 drivers +v0xccde20_0 .net "res_SUB", 0 0, L_0xd02330; 1 drivers +v0xcce010_0 .net "res_XOR", 0 0, L_0xd02b90; 1 drivers +LS_0xd03620_0_0 .concat [ 1 1 1 1], L_0xd001a0, L_0xd02330, L_0xd02b90, L_0xd02cd0; +LS_0xd03620_0_4 .concat [ 1 1 1 1], L_0xd03320, L_0xd03400, L_0xd034c0, L_0xd03580; +L_0xd03620 .concat [ 4 4 0 0], LS_0xd03620_0_0, LS_0xd03620_0_4; +LS_0xd00f10_0_0 .concat [ 1 1 1 1], L_0xd020f0, L_0xd02a00, C4<0>, L_0xd03170; +LS_0xd00f10_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd00f10 .concat [ 4 4 0 0], LS_0xd00f10_0_0, LS_0xd00f10_0_4; +S_0xccc8c0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xccb4f0; + .timescale 0 0; +L_0xd015f0/d .functor XOR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd015f0 .delay (30,30,30) L_0xd015f0/d; +L_0xd001a0/d .functor XOR 1, L_0xd015f0, L_0xd040d0, C4<0>, C4<0>; +L_0xd001a0 .delay (30,30,30) L_0xd001a0/d; +L_0xd00080/d .functor AND 1, L_0xd01b10, L_0xd04410, C4<1>, C4<1>; +L_0xd00080 .delay (30,30,30) L_0xd00080/d; +L_0xd01d90/d .functor OR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd01d90 .delay (30,30,30) L_0xd01d90/d; +L_0xd01e30/d .functor NOT 1, L_0xd040d0, C4<0>, C4<0>, C4<0>; +L_0xd01e30 .delay (10,10,10) L_0xd01e30/d; +L_0xd01ed0/d .functor AND 1, L_0xd00080, L_0xd01e30, C4<1>, C4<1>; +L_0xd01ed0 .delay (30,30,30) L_0xd01ed0/d; +L_0xd02000/d .functor AND 1, L_0xd01d90, L_0xd040d0, C4<1>, C4<1>; +L_0xd02000 .delay (30,30,30) L_0xd02000/d; +L_0xd020f0/d .functor OR 1, L_0xd01ed0, L_0xd02000, C4<0>, C4<0>; +L_0xd020f0 .delay (30,30,30) L_0xd020f0/d; +v0xccc9b0_0 .net "_carryin", 0 0, L_0xd01e30; 1 drivers +v0xccca70_0 .alias "a", 0 0, v0xccd4a0_0; +v0xcccaf0_0 .net "aandb", 0 0, L_0xd00080; 1 drivers +v0xcccb90_0 .net "aorb", 0 0, L_0xd01d90; 1 drivers +v0xcccc10_0 .alias "b", 0 0, v0xccd520_0; +v0xcccce0_0 .alias "carryin", 0 0, v0xccd5a0_0; +v0xcccdb0_0 .alias "carryout", 0 0, v0xccd6a0_0; +v0xccce50_0 .net "outputIfCarryin", 0 0, L_0xd01ed0; 1 drivers +v0xcccf40_0 .net "outputIf_Carryin", 0 0, L_0xd02000; 1 drivers +v0xcccfe0_0 .net "s", 0 0, L_0xd015f0; 1 drivers +v0xccd0e0_0 .alias "sum", 0 0, v0xccd9b0_0; +S_0xccc160 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xccb4f0; + .timescale 0 0; +L_0xd022d0/d .functor XOR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd022d0 .delay (30,30,30) L_0xd022d0/d; +L_0xd02330/d .functor XOR 1, L_0xd022d0, L_0xd040d0, C4<0>, C4<0>; +L_0xd02330 .delay (30,30,30) L_0xd02330/d; +L_0xd02470/d .functor NOT 1, L_0xd01b10, C4<0>, C4<0>, C4<0>; +L_0xd02470 .delay (10,10,10) L_0xd02470/d; +L_0xd025e0/d .functor AND 1, L_0xd02470, L_0xd04410, C4<1>, C4<1>; +L_0xd025e0 .delay (30,30,30) L_0xd025e0/d; +L_0xd027a0/d .functor NOT 1, L_0xd022d0, C4<0>, C4<0>, C4<0>; +L_0xd027a0 .delay (10,10,10) L_0xd027a0/d; +L_0xd02840/d .functor AND 1, L_0xd027a0, L_0xd040d0, C4<1>, C4<1>; +L_0xd02840 .delay (30,30,30) L_0xd02840/d; +L_0xd02a00/d .functor OR 1, L_0xd025e0, L_0xd02840, C4<0>, C4<0>; +L_0xd02a00 .delay (30,30,30) L_0xd02a00/d; +v0xccc250_0 .alias "a", 0 0, v0xccd4a0_0; +v0xccc2f0_0 .net "axorb", 0 0, L_0xd022d0; 1 drivers +v0xccc370_0 .alias "b", 0 0, v0xccd520_0; +v0xccc420_0 .alias "borrowin", 0 0, v0xccd5a0_0; +v0xccc500_0 .alias "borrowout", 0 0, v0xccd800_0; +v0xccc580_0 .alias "diff", 0 0, v0xccde20_0; +v0xccc600_0 .net "nota", 0 0, L_0xd02470; 1 drivers +v0xccc680_0 .net "notaandb", 0 0, L_0xd025e0; 1 drivers +v0xccc720_0 .net "notaxorb", 0 0, L_0xd027a0; 1 drivers +v0xccc7c0_0 .net "notaxorbandborrowin", 0 0, L_0xd02840; 1 drivers +S_0xccba40 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xccb4f0; + .timescale 0 0; +L_0xd02c30/d .functor XOR 1, L_0xd01b10, L_0xd04410, C4<0>, C4<0>; +L_0xd02c30 .delay (30,30,30) L_0xd02c30/d; +L_0xd02cd0/d .functor XOR 1, L_0xd02c30, L_0xd040d0, C4<0>, C4<0>; +L_0xd02cd0 .delay (30,30,30) L_0xd02cd0/d; +L_0xd02e10/d .functor NOT 1, L_0xd01b10, C4<0>, C4<0>, C4<0>; +L_0xd02e10 .delay (10,10,10) L_0xd02e10/d; +L_0xd02eb0/d .functor AND 1, L_0xd02e10, L_0xd04410, C4<1>, C4<1>; +L_0xd02eb0 .delay (30,30,30) L_0xd02eb0/d; +L_0xd02fa0/d .functor NOT 1, L_0xd02c30, C4<0>, C4<0>, C4<0>; +L_0xd02fa0 .delay (10,10,10) L_0xd02fa0/d; +L_0xd03040/d .functor AND 1, L_0xd02fa0, L_0xd040d0, C4<1>, C4<1>; +L_0xd03040 .delay (30,30,30) L_0xd03040/d; +L_0xd03170/d .functor OR 1, L_0xd02eb0, L_0xd03040, C4<0>, C4<0>; +L_0xd03170 .delay (30,30,30) L_0xd03170/d; +v0xccbb30_0 .alias "a", 0 0, v0xccd4a0_0; +v0xccbbb0_0 .net "axorb", 0 0, L_0xd02c30; 1 drivers +v0xccbc50_0 .alias "b", 0 0, v0xccd520_0; +v0xccbcf0_0 .alias "borrowin", 0 0, v0xccd5a0_0; +v0xccbda0_0 .alias "borrowout", 0 0, v0xccd780_0; +v0xccbe40_0 .alias "diff", 0 0, v0xccdea0_0; +v0xccbee0_0 .net "nota", 0 0, L_0xd02e10; 1 drivers +v0xccbf80_0 .net "notaandb", 0 0, L_0xd02eb0; 1 drivers +v0xccc020_0 .net "notaxorb", 0 0, L_0xd02fa0; 1 drivers +v0xccc0c0_0 .net "notaxorbandborrowin", 0 0, L_0xd03040; 1 drivers +S_0xccb7d0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xccb4f0; + .timescale 0 0; +v0xccb8c0_0 .alias "address", 2 0, v0xcec110_0; +v0xccb940_0 .alias "inputs", 7 0, v0xccd930_0; +v0xccb9c0_0 .alias "out", 0 0, v0xccdae0_0; +L_0xd03ca0 .part/v L_0xd03620, C4, 1; +S_0xccb5e0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xccb4f0; + .timescale 0 0; +v0xccb2b0_0 .alias "address", 2 0, v0xcec110_0; +v0xccb6d0_0 .alias "inputs", 7 0, v0xccd880_0; +v0xccb750_0 .alias "out", 0 0, v0xccd620_0; +L_0xd03d90 .part/v L_0xd00f10, C4, 1; +S_0xcc8880 .scope module, "a9" "ALU1bit" 2 41, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd057b0/d .functor XOR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd057b0 .delay (30,30,30) L_0xd057b0/d; +L_0xd06080/d .functor AND 1, L_0xd04760, L_0xcfc280, C4<1>, C4<1>; +L_0xd06080 .delay (30,30,30) L_0xd06080/d; +L_0xd06140/d .functor NAND 1, L_0xd04760, L_0xcfc280, C4<1>, C4<1>; +L_0xd06140 .delay (20,20,20) L_0xd06140/d; +L_0xd06200/d .functor NOR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd06200 .delay (20,20,20) L_0xd06200/d; +L_0xd062c0/d .functor OR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd062c0 .delay (30,30,30) L_0xd062c0/d; +v0xcca510_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcca5d0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcca670_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcca710_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcca790_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcca830_0 .net "a", 0 0, L_0xd04760; 1 drivers +v0xcca8b0_0 .net "b", 0 0, L_0xcfc280; 1 drivers +v0xcca930_0 .net "cin", 0 0, L_0xd050b0; 1 drivers +v0xcca9b0_0 .net "cout", 0 0, L_0xd06ac0; 1 drivers +v0xccaa30_0 .net "cout_ADD", 0 0, L_0xd04c90; 1 drivers +v0xccab10_0 .net "cout_SLT", 0 0, L_0xd05eb0; 1 drivers +v0xccab90_0 .net "cout_SUB", 0 0, L_0xd05620; 1 drivers +v0xccac10_0 .net "muxCout", 7 0, L_0xd039b0; 1 drivers +v0xccacc0_0 .net "muxRes", 7 0, L_0xd06360; 1 drivers +v0xccadf0_0 .alias "op", 2 0, v0xcec110_0; +v0xccae70_0 .net "out", 0 0, L_0xd069d0; 1 drivers +v0xccad40_0 .net "res_ADD", 0 0, L_0xcf78a0; 1 drivers +v0xccafe0_0 .net "res_AND", 0 0, L_0xd06080; 1 drivers +v0xccaef0_0 .net "res_NAND", 0 0, L_0xd06140; 1 drivers +v0xccb100_0 .net "res_NOR", 0 0, L_0xd06200; 1 drivers +v0xccb060_0 .net "res_OR", 0 0, L_0xd062c0; 1 drivers +v0xccb230_0 .net "res_SLT", 0 0, L_0xd05950; 1 drivers +v0xccb1b0_0 .net "res_SUB", 0 0, L_0xd04ed0; 1 drivers +v0xccb3a0_0 .net "res_XOR", 0 0, L_0xd057b0; 1 drivers +LS_0xd06360_0_0 .concat [ 1 1 1 1], L_0xcf78a0, L_0xd04ed0, L_0xd057b0, L_0xd05950; +LS_0xd06360_0_4 .concat [ 1 1 1 1], L_0xd06080, L_0xd06140, L_0xd06200, L_0xd062c0; +L_0xd06360 .concat [ 4 4 0 0], LS_0xd06360_0_0, LS_0xd06360_0_4; +LS_0xd039b0_0_0 .concat [ 1 1 1 1], L_0xd04c90, L_0xd05620, C4<0>, L_0xd05eb0; +LS_0xd039b0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd039b0 .concat [ 4 4 0 0], LS_0xd039b0_0_0, LS_0xd039b0_0_4; +S_0xcc9c50 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcc8880; + .timescale 0 0; +L_0xd04170/d .functor XOR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd04170 .delay (30,30,30) L_0xd04170/d; +L_0xcf78a0/d .functor XOR 1, L_0xd04170, L_0xd050b0, C4<0>, C4<0>; +L_0xcf78a0 .delay (30,30,30) L_0xcf78a0/d; +L_0xd04890/d .functor AND 1, L_0xd04760, L_0xcfc280, C4<1>, C4<1>; +L_0xd04890 .delay (30,30,30) L_0xd04890/d; +L_0xd04930/d .functor OR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd04930 .delay (30,30,30) L_0xd04930/d; +L_0xd049d0/d .functor NOT 1, L_0xd050b0, C4<0>, C4<0>, C4<0>; +L_0xd049d0 .delay (10,10,10) L_0xd049d0/d; +L_0xd04a70/d .functor AND 1, L_0xd04890, L_0xd049d0, C4<1>, C4<1>; +L_0xd04a70 .delay (30,30,30) L_0xd04a70/d; +L_0xd04ba0/d .functor AND 1, L_0xd04930, L_0xd050b0, C4<1>, C4<1>; +L_0xd04ba0 .delay (30,30,30) L_0xd04ba0/d; +L_0xd04c90/d .functor OR 1, L_0xd04a70, L_0xd04ba0, C4<0>, C4<0>; +L_0xd04c90 .delay (30,30,30) L_0xd04c90/d; +v0xcc9d40_0 .net "_carryin", 0 0, L_0xd049d0; 1 drivers +v0xcc9e00_0 .alias "a", 0 0, v0xcca830_0; +v0xcc9e80_0 .net "aandb", 0 0, L_0xd04890; 1 drivers +v0xcc9f20_0 .net "aorb", 0 0, L_0xd04930; 1 drivers +v0xcc9fa0_0 .alias "b", 0 0, v0xcca8b0_0; +v0xcca070_0 .alias "carryin", 0 0, v0xcca930_0; +v0xcca140_0 .alias "carryout", 0 0, v0xccaa30_0; +v0xcca1e0_0 .net "outputIfCarryin", 0 0, L_0xd04a70; 1 drivers +v0xcca2d0_0 .net "outputIf_Carryin", 0 0, L_0xd04ba0; 1 drivers +v0xcca370_0 .net "s", 0 0, L_0xd04170; 1 drivers +v0xcca470_0 .alias "sum", 0 0, v0xccad40_0; +S_0xcc94f0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcc8880; + .timescale 0 0; +L_0xd04e70/d .functor XOR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd04e70 .delay (30,30,30) L_0xd04e70/d; +L_0xd04ed0/d .functor XOR 1, L_0xd04e70, L_0xd050b0, C4<0>, C4<0>; +L_0xd04ed0 .delay (30,30,30) L_0xd04ed0/d; +L_0xd05030/d .functor NOT 1, L_0xd04760, C4<0>, C4<0>, C4<0>; +L_0xd05030 .delay (10,10,10) L_0xd05030/d; +L_0xd051c0/d .functor AND 1, L_0xd05030, L_0xcfc280, C4<1>, C4<1>; +L_0xd051c0 .delay (30,30,30) L_0xd051c0/d; +L_0xd05380/d .functor NOT 1, L_0xd04e70, C4<0>, C4<0>, C4<0>; +L_0xd05380 .delay (10,10,10) L_0xd05380/d; +L_0xd05420/d .functor AND 1, L_0xd05380, L_0xd050b0, C4<1>, C4<1>; +L_0xd05420 .delay (30,30,30) L_0xd05420/d; +L_0xd05620/d .functor OR 1, L_0xd051c0, L_0xd05420, C4<0>, C4<0>; +L_0xd05620 .delay (30,30,30) L_0xd05620/d; +v0xcc95e0_0 .alias "a", 0 0, v0xcca830_0; +v0xcc9680_0 .net "axorb", 0 0, L_0xd04e70; 1 drivers +v0xcc9700_0 .alias "b", 0 0, v0xcca8b0_0; +v0xcc97b0_0 .alias "borrowin", 0 0, v0xcca930_0; +v0xcc9890_0 .alias "borrowout", 0 0, v0xccab90_0; +v0xcc9910_0 .alias "diff", 0 0, v0xccb1b0_0; +v0xcc9990_0 .net "nota", 0 0, L_0xd05030; 1 drivers +v0xcc9a10_0 .net "notaandb", 0 0, L_0xd051c0; 1 drivers +v0xcc9ab0_0 .net "notaxorb", 0 0, L_0xd05380; 1 drivers +v0xcc9b50_0 .net "notaxorbandborrowin", 0 0, L_0xd05420; 1 drivers +S_0xcc8dd0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcc8880; + .timescale 0 0; +L_0xd05870/d .functor XOR 1, L_0xd04760, L_0xcfc280, C4<0>, C4<0>; +L_0xd05870 .delay (30,30,30) L_0xd05870/d; +L_0xd05950/d .functor XOR 1, L_0xd05870, L_0xd050b0, C4<0>, C4<0>; +L_0xd05950 .delay (30,30,30) L_0xd05950/d; +L_0xd05af0/d .functor NOT 1, L_0xd04760, C4<0>, C4<0>, C4<0>; +L_0xd05af0 .delay (10,10,10) L_0xd05af0/d; +L_0xd05bb0/d .functor AND 1, L_0xd05af0, L_0xcfc280, C4<1>, C4<1>; +L_0xd05bb0 .delay (30,30,30) L_0xd05bb0/d; +L_0xd05cc0/d .functor NOT 1, L_0xd05870, C4<0>, C4<0>, C4<0>; +L_0xd05cc0 .delay (10,10,10) L_0xd05cc0/d; +L_0xd05d60/d .functor AND 1, L_0xd05cc0, L_0xd050b0, C4<1>, C4<1>; +L_0xd05d60 .delay (30,30,30) L_0xd05d60/d; +L_0xd05eb0/d .functor OR 1, L_0xd05bb0, L_0xd05d60, C4<0>, C4<0>; +L_0xd05eb0 .delay (30,30,30) L_0xd05eb0/d; +v0xcc8ec0_0 .alias "a", 0 0, v0xcca830_0; +v0xcc8f40_0 .net "axorb", 0 0, L_0xd05870; 1 drivers +v0xcc8fe0_0 .alias "b", 0 0, v0xcca8b0_0; +v0xcc9080_0 .alias "borrowin", 0 0, v0xcca930_0; +v0xcc9130_0 .alias "borrowout", 0 0, v0xccab10_0; +v0xcc91d0_0 .alias "diff", 0 0, v0xccb230_0; +v0xcc9270_0 .net "nota", 0 0, L_0xd05af0; 1 drivers +v0xcc9310_0 .net "notaandb", 0 0, L_0xd05bb0; 1 drivers +v0xcc93b0_0 .net "notaxorb", 0 0, L_0xd05cc0; 1 drivers +v0xcc9450_0 .net "notaxorbandborrowin", 0 0, L_0xd05d60; 1 drivers +S_0xcc8b60 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcc8880; + .timescale 0 0; +v0xcc8c50_0 .alias "address", 2 0, v0xcec110_0; +v0xcc8cd0_0 .alias "inputs", 7 0, v0xccacc0_0; +v0xcc8d50_0 .alias "out", 0 0, v0xccae70_0; +L_0xd069d0 .part/v L_0xd06360, C4, 1; +S_0xcc8970 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcc8880; + .timescale 0 0; +v0xcc8640_0 .alias "address", 2 0, v0xcec110_0; +v0xcc8a60_0 .alias "inputs", 7 0, v0xccac10_0; +v0xcc8ae0_0 .alias "out", 0 0, v0xcca9b0_0; +L_0xd06ac0 .part/v L_0xd039b0, C4, 1; +S_0xcc5c10 .scope module, "a10" "ALU1bit" 2 42, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd08480/d .functor XOR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xd08480 .delay (30,30,30) L_0xd08480/d; +L_0xd08d50/d .functor AND 1, L_0xd07530, L_0xd075d0, C4<1>, C4<1>; +L_0xd08d50 .delay (30,30,30) L_0xd08d50/d; +L_0xd08e10/d .functor NAND 1, L_0xd07530, L_0xd075d0, C4<1>, C4<1>; +L_0xd08e10 .delay (20,20,20) L_0xd08e10/d; +L_0xd08ed0/d .functor NOR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xd08ed0 .delay (20,20,20) L_0xd08ed0/d; +L_0xd08f90/d .functor OR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xd08f90 .delay (30,30,30) L_0xd08f90/d; +v0xcc78a0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcc7960_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcc7a00_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcc7aa0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcc7b20_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcc7bc0_0 .net "a", 0 0, L_0xd07530; 1 drivers +v0xcc7c40_0 .net "b", 0 0, L_0xd075d0; 1 drivers +v0xcc7cc0_0 .net "cin", 0 0, L_0xd07d80; 1 drivers +v0xcc7d40_0 .net "cout", 0 0, L_0xd097a0; 1 drivers +v0xcc7dc0_0 .net "cout_ADD", 0 0, L_0xd07960; 1 drivers +v0xcc7ea0_0 .net "cout_SLT", 0 0, L_0xd08b80; 1 drivers +v0xcc7f20_0 .net "cout_SUB", 0 0, L_0xd082f0; 1 drivers +v0xcc7fa0_0 .net "muxCout", 7 0, L_0xd066b0; 1 drivers +v0xcc8050_0 .net "muxRes", 7 0, L_0xd09030; 1 drivers +v0xcc8180_0 .alias "op", 2 0, v0xcec110_0; +v0xcc8200_0 .net "out", 0 0, L_0xd096b0; 1 drivers +v0xcc80d0_0 .net "res_ADD", 0 0, L_0xd05150; 1 drivers +v0xcc8370_0 .net "res_AND", 0 0, L_0xd08d50; 1 drivers +v0xcc8280_0 .net "res_NAND", 0 0, L_0xd08e10; 1 drivers +v0xcc8490_0 .net "res_NOR", 0 0, L_0xd08ed0; 1 drivers +v0xcc83f0_0 .net "res_OR", 0 0, L_0xd08f90; 1 drivers +v0xcc85c0_0 .net "res_SLT", 0 0, L_0xd08620; 1 drivers +v0xcc8540_0 .net "res_SUB", 0 0, L_0xd07ba0; 1 drivers +v0xcc8730_0 .net "res_XOR", 0 0, L_0xd08480; 1 drivers +LS_0xd09030_0_0 .concat [ 1 1 1 1], L_0xd05150, L_0xd07ba0, L_0xd08480, L_0xd08620; +LS_0xd09030_0_4 .concat [ 1 1 1 1], L_0xd08d50, L_0xd08e10, L_0xd08ed0, L_0xd08f90; +L_0xd09030 .concat [ 4 4 0 0], LS_0xd09030_0_0, LS_0xd09030_0_4; +LS_0xd066b0_0_0 .concat [ 1 1 1 1], L_0xd07960, L_0xd082f0, C4<0>, L_0xd08b80; +LS_0xd066b0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd066b0 .concat [ 4 4 0 0], LS_0xd066b0_0_0, LS_0xd066b0_0_4; +S_0xcc6fe0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcc5c10; + .timescale 0 0; +L_0xcfc320/d .functor XOR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xcfc320 .delay (30,30,30) L_0xcfc320/d; +L_0xd05150/d .functor XOR 1, L_0xcfc320, L_0xd07d80, C4<0>, C4<0>; +L_0xd05150 .delay (30,30,30) L_0xd05150/d; +L_0xd072b0/d .functor AND 1, L_0xd07530, L_0xd075d0, C4<1>, C4<1>; +L_0xd072b0 .delay (30,30,30) L_0xd072b0/d; +L_0xd06d20/d .functor OR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xd06d20 .delay (30,30,30) L_0xd06d20/d; +L_0xd076a0/d .functor NOT 1, L_0xd07d80, C4<0>, C4<0>, C4<0>; +L_0xd076a0 .delay (10,10,10) L_0xd076a0/d; +L_0xd07740/d .functor AND 1, L_0xd072b0, L_0xd076a0, C4<1>, C4<1>; +L_0xd07740 .delay (30,30,30) L_0xd07740/d; +L_0xd07870/d .functor AND 1, L_0xd06d20, L_0xd07d80, C4<1>, C4<1>; +L_0xd07870 .delay (30,30,30) L_0xd07870/d; +L_0xd07960/d .functor OR 1, L_0xd07740, L_0xd07870, C4<0>, C4<0>; +L_0xd07960 .delay (30,30,30) L_0xd07960/d; +v0xcc70d0_0 .net "_carryin", 0 0, L_0xd076a0; 1 drivers +v0xcc7190_0 .alias "a", 0 0, v0xcc7bc0_0; +v0xcc7210_0 .net "aandb", 0 0, L_0xd072b0; 1 drivers +v0xcc72b0_0 .net "aorb", 0 0, L_0xd06d20; 1 drivers +v0xcc7330_0 .alias "b", 0 0, v0xcc7c40_0; +v0xcc7400_0 .alias "carryin", 0 0, v0xcc7cc0_0; +v0xcc74d0_0 .alias "carryout", 0 0, v0xcc7dc0_0; +v0xcc7570_0 .net "outputIfCarryin", 0 0, L_0xd07740; 1 drivers +v0xcc7660_0 .net "outputIf_Carryin", 0 0, L_0xd07870; 1 drivers +v0xcc7700_0 .net "s", 0 0, L_0xcfc320; 1 drivers +v0xcc7800_0 .alias "sum", 0 0, v0xcc80d0_0; +S_0xcc6880 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcc5c10; + .timescale 0 0; +L_0xd07b40/d .functor XOR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xd07b40 .delay (30,30,30) L_0xd07b40/d; +L_0xd07ba0/d .functor XOR 1, L_0xd07b40, L_0xd07d80, C4<0>, C4<0>; +L_0xd07ba0 .delay (30,30,30) L_0xd07ba0/d; +L_0xd07d00/d .functor NOT 1, L_0xd07530, C4<0>, C4<0>, C4<0>; +L_0xd07d00 .delay (10,10,10) L_0xd07d00/d; +L_0xd07e90/d .functor AND 1, L_0xd07d00, L_0xd075d0, C4<1>, C4<1>; +L_0xd07e90 .delay (30,30,30) L_0xd07e90/d; +L_0xd08050/d .functor NOT 1, L_0xd07b40, C4<0>, C4<0>, C4<0>; +L_0xd08050 .delay (10,10,10) L_0xd08050/d; +L_0xd080f0/d .functor AND 1, L_0xd08050, L_0xd07d80, C4<1>, C4<1>; +L_0xd080f0 .delay (30,30,30) L_0xd080f0/d; +L_0xd082f0/d .functor OR 1, L_0xd07e90, L_0xd080f0, C4<0>, C4<0>; +L_0xd082f0 .delay (30,30,30) L_0xd082f0/d; +v0xcc6970_0 .alias "a", 0 0, v0xcc7bc0_0; +v0xcc6a10_0 .net "axorb", 0 0, L_0xd07b40; 1 drivers +v0xcc6a90_0 .alias "b", 0 0, v0xcc7c40_0; +v0xcc6b40_0 .alias "borrowin", 0 0, v0xcc7cc0_0; +v0xcc6c20_0 .alias "borrowout", 0 0, v0xcc7f20_0; +v0xcc6ca0_0 .alias "diff", 0 0, v0xcc8540_0; +v0xcc6d20_0 .net "nota", 0 0, L_0xd07d00; 1 drivers +v0xcc6da0_0 .net "notaandb", 0 0, L_0xd07e90; 1 drivers +v0xcc6e40_0 .net "notaxorb", 0 0, L_0xd08050; 1 drivers +v0xcc6ee0_0 .net "notaxorbandborrowin", 0 0, L_0xd080f0; 1 drivers +S_0xcc6160 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcc5c10; + .timescale 0 0; +L_0xd08540/d .functor XOR 1, L_0xd07530, L_0xd075d0, C4<0>, C4<0>; +L_0xd08540 .delay (30,30,30) L_0xd08540/d; +L_0xd08620/d .functor XOR 1, L_0xd08540, L_0xd07d80, C4<0>, C4<0>; +L_0xd08620 .delay (30,30,30) L_0xd08620/d; +L_0xd087c0/d .functor NOT 1, L_0xd07530, C4<0>, C4<0>, C4<0>; +L_0xd087c0 .delay (10,10,10) L_0xd087c0/d; +L_0xd08880/d .functor AND 1, L_0xd087c0, L_0xd075d0, C4<1>, C4<1>; +L_0xd08880 .delay (30,30,30) L_0xd08880/d; +L_0xd08990/d .functor NOT 1, L_0xd08540, C4<0>, C4<0>, C4<0>; +L_0xd08990 .delay (10,10,10) L_0xd08990/d; +L_0xd08a30/d .functor AND 1, L_0xd08990, L_0xd07d80, C4<1>, C4<1>; +L_0xd08a30 .delay (30,30,30) L_0xd08a30/d; +L_0xd08b80/d .functor OR 1, L_0xd08880, L_0xd08a30, C4<0>, C4<0>; +L_0xd08b80 .delay (30,30,30) L_0xd08b80/d; +v0xcc6250_0 .alias "a", 0 0, v0xcc7bc0_0; +v0xcc62d0_0 .net "axorb", 0 0, L_0xd08540; 1 drivers +v0xcc6370_0 .alias "b", 0 0, v0xcc7c40_0; +v0xcc6410_0 .alias "borrowin", 0 0, v0xcc7cc0_0; +v0xcc64c0_0 .alias "borrowout", 0 0, v0xcc7ea0_0; +v0xcc6560_0 .alias "diff", 0 0, v0xcc85c0_0; +v0xcc6600_0 .net "nota", 0 0, L_0xd087c0; 1 drivers +v0xcc66a0_0 .net "notaandb", 0 0, L_0xd08880; 1 drivers +v0xcc6740_0 .net "notaxorb", 0 0, L_0xd08990; 1 drivers +v0xcc67e0_0 .net "notaxorbandborrowin", 0 0, L_0xd08a30; 1 drivers +S_0xcc5ef0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcc5c10; + .timescale 0 0; +v0xcc5fe0_0 .alias "address", 2 0, v0xcec110_0; +v0xcc6060_0 .alias "inputs", 7 0, v0xcc8050_0; +v0xcc60e0_0 .alias "out", 0 0, v0xcc8200_0; +L_0xd096b0 .part/v L_0xd09030, C4, 1; +S_0xcc5d00 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcc5c10; + .timescale 0 0; +v0xcc59d0_0 .alias "address", 2 0, v0xcec110_0; +v0xcc5df0_0 .alias "inputs", 7 0, v0xcc7fa0_0; +v0xcc5e70_0 .alias "out", 0 0, v0xcc7d40_0; +L_0xd097a0 .part/v L_0xd066b0, C4, 1; +S_0xcc2fa0 .scope module, "a11" "ALU1bit" 2 43, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd0b070/d .functor XOR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd0b070 .delay (30,30,30) L_0xd0b070/d; +L_0xd0b940/d .functor AND 1, L_0xd0a010, L_0xd0a970, C4<1>, C4<1>; +L_0xd0b940 .delay (30,30,30) L_0xd0b940/d; +L_0xd0ba00/d .functor NAND 1, L_0xd0a010, L_0xd0a970, C4<1>, C4<1>; +L_0xd0ba00 .delay (20,20,20) L_0xd0ba00/d; +L_0xd0bac0/d .functor NOR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd0bac0 .delay (20,20,20) L_0xd0bac0/d; +L_0xd0bb80/d .functor OR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd0bb80 .delay (30,30,30) L_0xd0bb80/d; +v0xcc4c30_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcc4cf0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcc4d90_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcc4e30_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcc4eb0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcc4f50_0 .net "a", 0 0, L_0xd0a010; 1 drivers +v0xcc4fd0_0 .net "b", 0 0, L_0xd0a970; 1 drivers +v0xcc5050_0 .net "cin", 0 0, L_0xd0ab30; 1 drivers +v0xcc50d0_0 .net "cout", 0 0, L_0xd0c3d0; 1 drivers +v0xcc5150_0 .net "cout_ADD", 0 0, L_0xd0a550; 1 drivers +v0xcc5230_0 .net "cout_SLT", 0 0, L_0xd0b770; 1 drivers +v0xcc52b0_0 .net "cout_SUB", 0 0, L_0xd0aee0; 1 drivers +v0xcc5330_0 .net "muxCout", 7 0, L_0xd09400; 1 drivers +v0xcc53e0_0 .net "muxRes", 7 0, L_0xd0bc20; 1 drivers +v0xcc5510_0 .alias "op", 2 0, v0xcec110_0; +v0xcc5590_0 .net "out", 0 0, L_0xd0c2e0; 1 drivers +v0xcc5460_0 .net "res_ADD", 0 0, L_0xd09aa0; 1 drivers +v0xcc5700_0 .net "res_AND", 0 0, L_0xd0b940; 1 drivers +v0xcc5610_0 .net "res_NAND", 0 0, L_0xd0ba00; 1 drivers +v0xcc5820_0 .net "res_NOR", 0 0, L_0xd0bac0; 1 drivers +v0xcc5780_0 .net "res_OR", 0 0, L_0xd0bb80; 1 drivers +v0xcc5950_0 .net "res_SLT", 0 0, L_0xd0b210; 1 drivers +v0xcc58d0_0 .net "res_SUB", 0 0, L_0xd0a790; 1 drivers +v0xcc5ac0_0 .net "res_XOR", 0 0, L_0xd0b070; 1 drivers +LS_0xd0bc20_0_0 .concat [ 1 1 1 1], L_0xd09aa0, L_0xd0a790, L_0xd0b070, L_0xd0b210; +LS_0xd0bc20_0_4 .concat [ 1 1 1 1], L_0xd0b940, L_0xd0ba00, L_0xd0bac0, L_0xd0bb80; +L_0xd0bc20 .concat [ 4 4 0 0], LS_0xd0bc20_0_0, LS_0xd0bc20_0_4; +LS_0xd09400_0_0 .concat [ 1 1 1 1], L_0xd0a550, L_0xd0aee0, C4<0>, L_0xd0b770; +LS_0xd09400_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd09400 .concat [ 4 4 0 0], LS_0xd09400_0_0, LS_0xd09400_0_4; +S_0xcc4370 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcc2fa0; + .timescale 0 0; +L_0xd07e20/d .functor XOR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd07e20 .delay (30,30,30) L_0xd07e20/d; +L_0xd09aa0/d .functor XOR 1, L_0xd07e20, L_0xd0ab30, C4<0>, C4<0>; +L_0xd09aa0 .delay (30,30,30) L_0xd09aa0/d; +L_0xd0a190/d .functor AND 1, L_0xd0a010, L_0xd0a970, C4<1>, C4<1>; +L_0xd0a190 .delay (30,30,30) L_0xd0a190/d; +L_0xd0a1f0/d .functor OR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd0a1f0 .delay (30,30,30) L_0xd0a1f0/d; +L_0xd0a290/d .functor NOT 1, L_0xd0ab30, C4<0>, C4<0>, C4<0>; +L_0xd0a290 .delay (10,10,10) L_0xd0a290/d; +L_0xd0a330/d .functor AND 1, L_0xd0a190, L_0xd0a290, C4<1>, C4<1>; +L_0xd0a330 .delay (30,30,30) L_0xd0a330/d; +L_0xd0a460/d .functor AND 1, L_0xd0a1f0, L_0xd0ab30, C4<1>, C4<1>; +L_0xd0a460 .delay (30,30,30) L_0xd0a460/d; +L_0xd0a550/d .functor OR 1, L_0xd0a330, L_0xd0a460, C4<0>, C4<0>; +L_0xd0a550 .delay (30,30,30) L_0xd0a550/d; +v0xcc4460_0 .net "_carryin", 0 0, L_0xd0a290; 1 drivers +v0xcc4520_0 .alias "a", 0 0, v0xcc4f50_0; +v0xcc45a0_0 .net "aandb", 0 0, L_0xd0a190; 1 drivers +v0xcc4640_0 .net "aorb", 0 0, L_0xd0a1f0; 1 drivers +v0xcc46c0_0 .alias "b", 0 0, v0xcc4fd0_0; +v0xcc4790_0 .alias "carryin", 0 0, v0xcc5050_0; +v0xcc4860_0 .alias "carryout", 0 0, v0xcc5150_0; +v0xcc4900_0 .net "outputIfCarryin", 0 0, L_0xd0a330; 1 drivers +v0xcc49f0_0 .net "outputIf_Carryin", 0 0, L_0xd0a460; 1 drivers +v0xcc4a90_0 .net "s", 0 0, L_0xd07e20; 1 drivers +v0xcc4b90_0 .alias "sum", 0 0, v0xcc5460_0; +S_0xcc3c10 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcc2fa0; + .timescale 0 0; +L_0xd0a730/d .functor XOR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd0a730 .delay (30,30,30) L_0xd0a730/d; +L_0xd0a790/d .functor XOR 1, L_0xd0a730, L_0xd0ab30, C4<0>, C4<0>; +L_0xd0a790 .delay (30,30,30) L_0xd0a790/d; +L_0xd0a910/d .functor NOT 1, L_0xd0a010, C4<0>, C4<0>, C4<0>; +L_0xd0a910 .delay (10,10,10) L_0xd0a910/d; +L_0xd0aa80/d .functor AND 1, L_0xd0a910, L_0xd0a970, C4<1>, C4<1>; +L_0xd0aa80 .delay (30,30,30) L_0xd0aa80/d; +L_0xd0ac40/d .functor NOT 1, L_0xd0a730, C4<0>, C4<0>, C4<0>; +L_0xd0ac40 .delay (10,10,10) L_0xd0ac40/d; +L_0xd0ace0/d .functor AND 1, L_0xd0ac40, L_0xd0ab30, C4<1>, C4<1>; +L_0xd0ace0 .delay (30,30,30) L_0xd0ace0/d; +L_0xd0aee0/d .functor OR 1, L_0xd0aa80, L_0xd0ace0, C4<0>, C4<0>; +L_0xd0aee0 .delay (30,30,30) L_0xd0aee0/d; +v0xcc3d00_0 .alias "a", 0 0, v0xcc4f50_0; +v0xcc3da0_0 .net "axorb", 0 0, L_0xd0a730; 1 drivers +v0xcc3e20_0 .alias "b", 0 0, v0xcc4fd0_0; +v0xcc3ed0_0 .alias "borrowin", 0 0, v0xcc5050_0; +v0xcc3fb0_0 .alias "borrowout", 0 0, v0xcc52b0_0; +v0xcc4030_0 .alias "diff", 0 0, v0xcc58d0_0; +v0xcc40b0_0 .net "nota", 0 0, L_0xd0a910; 1 drivers +v0xcc4130_0 .net "notaandb", 0 0, L_0xd0aa80; 1 drivers +v0xcc41d0_0 .net "notaxorb", 0 0, L_0xd0ac40; 1 drivers +v0xcc4270_0 .net "notaxorbandborrowin", 0 0, L_0xd0ace0; 1 drivers +S_0xcc34f0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcc2fa0; + .timescale 0 0; +L_0xd0b130/d .functor XOR 1, L_0xd0a010, L_0xd0a970, C4<0>, C4<0>; +L_0xd0b130 .delay (30,30,30) L_0xd0b130/d; +L_0xd0b210/d .functor XOR 1, L_0xd0b130, L_0xd0ab30, C4<0>, C4<0>; +L_0xd0b210 .delay (30,30,30) L_0xd0b210/d; +L_0xd0b3b0/d .functor NOT 1, L_0xd0a010, C4<0>, C4<0>, C4<0>; +L_0xd0b3b0 .delay (10,10,10) L_0xd0b3b0/d; +L_0xd0b470/d .functor AND 1, L_0xd0b3b0, L_0xd0a970, C4<1>, C4<1>; +L_0xd0b470 .delay (30,30,30) L_0xd0b470/d; +L_0xd0b580/d .functor NOT 1, L_0xd0b130, C4<0>, C4<0>, C4<0>; +L_0xd0b580 .delay (10,10,10) L_0xd0b580/d; +L_0xd0b620/d .functor AND 1, L_0xd0b580, L_0xd0ab30, C4<1>, C4<1>; +L_0xd0b620 .delay (30,30,30) L_0xd0b620/d; +L_0xd0b770/d .functor OR 1, L_0xd0b470, L_0xd0b620, C4<0>, C4<0>; +L_0xd0b770 .delay (30,30,30) L_0xd0b770/d; +v0xcc35e0_0 .alias "a", 0 0, v0xcc4f50_0; +v0xcc3660_0 .net "axorb", 0 0, L_0xd0b130; 1 drivers +v0xcc3700_0 .alias "b", 0 0, v0xcc4fd0_0; +v0xcc37a0_0 .alias "borrowin", 0 0, v0xcc5050_0; +v0xcc3850_0 .alias "borrowout", 0 0, v0xcc5230_0; +v0xcc38f0_0 .alias "diff", 0 0, v0xcc5950_0; +v0xcc3990_0 .net "nota", 0 0, L_0xd0b3b0; 1 drivers +v0xcc3a30_0 .net "notaandb", 0 0, L_0xd0b470; 1 drivers +v0xcc3ad0_0 .net "notaxorb", 0 0, L_0xd0b580; 1 drivers +v0xcc3b70_0 .net "notaxorbandborrowin", 0 0, L_0xd0b620; 1 drivers +S_0xcc3280 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcc2fa0; + .timescale 0 0; +v0xcc3370_0 .alias "address", 2 0, v0xcec110_0; +v0xcc33f0_0 .alias "inputs", 7 0, v0xcc53e0_0; +v0xcc3470_0 .alias "out", 0 0, v0xcc5590_0; +L_0xd0c2e0 .part/v L_0xd0bc20, C4, 1; +S_0xcc3090 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcc2fa0; + .timescale 0 0; +v0xcc2d60_0 .alias "address", 2 0, v0xcec110_0; +v0xcc3180_0 .alias "inputs", 7 0, v0xcc5330_0; +v0xcc3200_0 .alias "out", 0 0, v0xcc50d0_0; +L_0xd0c3d0 .part/v L_0xd09400, C4, 1; +S_0xcc0330 .scope module, "a12" "ALU1bit" 2 44, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd0dc50/d .functor XOR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0dc50 .delay (30,30,30) L_0xd0dc50/d; +L_0xd0e540/d .functor AND 1, L_0xd0ccd0, L_0xd0d590, C4<1>, C4<1>; +L_0xd0e540 .delay (30,30,30) L_0xd0e540/d; +L_0xd0e600/d .functor NAND 1, L_0xd0ccd0, L_0xd0d590, C4<1>, C4<1>; +L_0xd0e600 .delay (20,20,20) L_0xd0e600/d; +L_0xd0e6c0/d .functor NOR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0e6c0 .delay (20,20,20) L_0xd0e6c0/d; +L_0xd0e780/d .functor OR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0e780 .delay (30,30,30) L_0xd0e780/d; +v0xcc1fc0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcc2080_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcc2120_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcc21c0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcc2240_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcc22e0_0 .net "a", 0 0, L_0xd0ccd0; 1 drivers +v0xcc2360_0 .net "b", 0 0, L_0xd0d590; 1 drivers +v0xcc23e0_0 .net "cin", 0 0, L_0xd0d750; 1 drivers +v0xcc2460_0 .net "cout", 0 0, L_0xd0ef90; 1 drivers +v0xcc24e0_0 .net "cout_ADD", 0 0, L_0xd0d170; 1 drivers +v0xcc25c0_0 .net "cout_SLT", 0 0, L_0xd0e370; 1 drivers +v0xcc2640_0 .net "cout_SUB", 0 0, L_0xd0daa0; 1 drivers +v0xcc26c0_0 .net "muxCout", 7 0, L_0xd0bf70; 1 drivers +v0xcc2770_0 .net "muxRes", 7 0, L_0xd0e820; 1 drivers +v0xcc28a0_0 .alias "op", 2 0, v0xcec110_0; +v0xcc2920_0 .net "out", 0 0, L_0xd0eea0; 1 drivers +v0xcc27f0_0 .net "res_ADD", 0 0, L_0xd0abd0; 1 drivers +v0xcc2a90_0 .net "res_AND", 0 0, L_0xd0e540; 1 drivers +v0xcc29a0_0 .net "res_NAND", 0 0, L_0xd0e600; 1 drivers +v0xcc2bb0_0 .net "res_NOR", 0 0, L_0xd0e6c0; 1 drivers +v0xcc2b10_0 .net "res_OR", 0 0, L_0xd0e780; 1 drivers +v0xcc2ce0_0 .net "res_SLT", 0 0, L_0xd0de10; 1 drivers +v0xcc2c60_0 .net "res_SUB", 0 0, L_0xd0d3b0; 1 drivers +v0xcc2e50_0 .net "res_XOR", 0 0, L_0xd0dc50; 1 drivers +LS_0xd0e820_0_0 .concat [ 1 1 1 1], L_0xd0abd0, L_0xd0d3b0, L_0xd0dc50, L_0xd0de10; +LS_0xd0e820_0_4 .concat [ 1 1 1 1], L_0xd0e540, L_0xd0e600, L_0xd0e6c0, L_0xd0e780; +L_0xd0e820 .concat [ 4 4 0 0], LS_0xd0e820_0_0, LS_0xd0e820_0_4; +LS_0xd0bf70_0_0 .concat [ 1 1 1 1], L_0xd0d170, L_0xd0daa0, C4<0>, L_0xd0e370; +LS_0xd0bf70_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd0bf70 .concat [ 4 4 0 0], LS_0xd0bf70_0_0, LS_0xd0bf70_0_4; +S_0xcc1700 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcc0330; + .timescale 0 0; +L_0xd0aa10/d .functor XOR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0aa10 .delay (30,30,30) L_0xd0aa10/d; +L_0xd0abd0/d .functor XOR 1, L_0xd0aa10, L_0xd0d750, C4<0>, C4<0>; +L_0xd0abd0 .delay (30,30,30) L_0xd0abd0/d; +L_0xd0c9e0/d .functor AND 1, L_0xd0ccd0, L_0xd0d590, C4<1>, C4<1>; +L_0xd0c9e0 .delay (30,30,30) L_0xd0c9e0/d; +L_0xd0ce90/d .functor OR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0ce90 .delay (30,30,30) L_0xd0ce90/d; +L_0xd0cef0/d .functor NOT 1, L_0xd0d750, C4<0>, C4<0>, C4<0>; +L_0xd0cef0 .delay (10,10,10) L_0xd0cef0/d; +L_0xd0cf50/d .functor AND 1, L_0xd0c9e0, L_0xd0cef0, C4<1>, C4<1>; +L_0xd0cf50 .delay (30,30,30) L_0xd0cf50/d; +L_0xd0d080/d .functor AND 1, L_0xd0ce90, L_0xd0d750, C4<1>, C4<1>; +L_0xd0d080 .delay (30,30,30) L_0xd0d080/d; +L_0xd0d170/d .functor OR 1, L_0xd0cf50, L_0xd0d080, C4<0>, C4<0>; +L_0xd0d170 .delay (30,30,30) L_0xd0d170/d; +v0xcc17f0_0 .net "_carryin", 0 0, L_0xd0cef0; 1 drivers +v0xcc18b0_0 .alias "a", 0 0, v0xcc22e0_0; +v0xcc1930_0 .net "aandb", 0 0, L_0xd0c9e0; 1 drivers +v0xcc19d0_0 .net "aorb", 0 0, L_0xd0ce90; 1 drivers +v0xcc1a50_0 .alias "b", 0 0, v0xcc2360_0; +v0xcc1b20_0 .alias "carryin", 0 0, v0xcc23e0_0; +v0xcc1bf0_0 .alias "carryout", 0 0, v0xcc24e0_0; +v0xcc1c90_0 .net "outputIfCarryin", 0 0, L_0xd0cf50; 1 drivers +v0xcc1d80_0 .net "outputIf_Carryin", 0 0, L_0xd0d080; 1 drivers +v0xcc1e20_0 .net "s", 0 0, L_0xd0aa10; 1 drivers +v0xcc1f20_0 .alias "sum", 0 0, v0xcc27f0_0; +S_0xcc0fa0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcc0330; + .timescale 0 0; +L_0xd0d350/d .functor XOR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0d350 .delay (30,30,30) L_0xd0d350/d; +L_0xd0d3b0/d .functor XOR 1, L_0xd0d350, L_0xd0d750, C4<0>, C4<0>; +L_0xd0d3b0 .delay (30,30,30) L_0xd0d3b0/d; +L_0xd0d510/d .functor NOT 1, L_0xd0ccd0, C4<0>, C4<0>, C4<0>; +L_0xd0d510 .delay (10,10,10) L_0xd0d510/d; +L_0xd0d6a0/d .functor AND 1, L_0xd0d510, L_0xd0d590, C4<1>, C4<1>; +L_0xd0d6a0 .delay (30,30,30) L_0xd0d6a0/d; +L_0xd0c620/d .functor NOT 1, L_0xd0d350, C4<0>, C4<0>, C4<0>; +L_0xd0c620 .delay (10,10,10) L_0xd0c620/d; +L_0xd0d8a0/d .functor AND 1, L_0xd0c620, L_0xd0d750, C4<1>, C4<1>; +L_0xd0d8a0 .delay (30,30,30) L_0xd0d8a0/d; +L_0xd0daa0/d .functor OR 1, L_0xd0d6a0, L_0xd0d8a0, C4<0>, C4<0>; +L_0xd0daa0 .delay (30,30,30) L_0xd0daa0/d; +v0xcc1090_0 .alias "a", 0 0, v0xcc22e0_0; +v0xcc1130_0 .net "axorb", 0 0, L_0xd0d350; 1 drivers +v0xcc11b0_0 .alias "b", 0 0, v0xcc2360_0; +v0xcc1260_0 .alias "borrowin", 0 0, v0xcc23e0_0; +v0xcc1340_0 .alias "borrowout", 0 0, v0xcc2640_0; +v0xcc13c0_0 .alias "diff", 0 0, v0xcc2c60_0; +v0xcc1440_0 .net "nota", 0 0, L_0xd0d510; 1 drivers +v0xcc14c0_0 .net "notaandb", 0 0, L_0xd0d6a0; 1 drivers +v0xcc1560_0 .net "notaxorb", 0 0, L_0xd0c620; 1 drivers +v0xcc1600_0 .net "notaxorbandborrowin", 0 0, L_0xd0d8a0; 1 drivers +S_0xcc0880 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcc0330; + .timescale 0 0; +L_0xd0dd30/d .functor XOR 1, L_0xd0ccd0, L_0xd0d590, C4<0>, C4<0>; +L_0xd0dd30 .delay (30,30,30) L_0xd0dd30/d; +L_0xd0de10/d .functor XOR 1, L_0xd0dd30, L_0xd0d750, C4<0>, C4<0>; +L_0xd0de10 .delay (30,30,30) L_0xd0de10/d; +L_0xd0dfb0/d .functor NOT 1, L_0xd0ccd0, C4<0>, C4<0>, C4<0>; +L_0xd0dfb0 .delay (10,10,10) L_0xd0dfb0/d; +L_0xd0e070/d .functor AND 1, L_0xd0dfb0, L_0xd0d590, C4<1>, C4<1>; +L_0xd0e070 .delay (30,30,30) L_0xd0e070/d; +L_0xd0e180/d .functor NOT 1, L_0xd0dd30, C4<0>, C4<0>, C4<0>; +L_0xd0e180 .delay (10,10,10) L_0xd0e180/d; +L_0xd0e220/d .functor AND 1, L_0xd0e180, L_0xd0d750, C4<1>, C4<1>; +L_0xd0e220 .delay (30,30,30) L_0xd0e220/d; +L_0xd0e370/d .functor OR 1, L_0xd0e070, L_0xd0e220, C4<0>, C4<0>; +L_0xd0e370 .delay (30,30,30) L_0xd0e370/d; +v0xcc0970_0 .alias "a", 0 0, v0xcc22e0_0; +v0xcc09f0_0 .net "axorb", 0 0, L_0xd0dd30; 1 drivers +v0xcc0a90_0 .alias "b", 0 0, v0xcc2360_0; +v0xcc0b30_0 .alias "borrowin", 0 0, v0xcc23e0_0; +v0xcc0be0_0 .alias "borrowout", 0 0, v0xcc25c0_0; +v0xcc0c80_0 .alias "diff", 0 0, v0xcc2ce0_0; +v0xcc0d20_0 .net "nota", 0 0, L_0xd0dfb0; 1 drivers +v0xcc0dc0_0 .net "notaandb", 0 0, L_0xd0e070; 1 drivers +v0xcc0e60_0 .net "notaxorb", 0 0, L_0xd0e180; 1 drivers +v0xcc0f00_0 .net "notaxorbandborrowin", 0 0, L_0xd0e220; 1 drivers +S_0xcc0610 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcc0330; + .timescale 0 0; +v0xcc0700_0 .alias "address", 2 0, v0xcec110_0; +v0xcc0780_0 .alias "inputs", 7 0, v0xcc2770_0; +v0xcc0800_0 .alias "out", 0 0, v0xcc2920_0; +L_0xd0eea0 .part/v L_0xd0e820, C4, 1; +S_0xcc0420 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcc0330; + .timescale 0 0; +v0xcc00f0_0 .alias "address", 2 0, v0xcec110_0; +v0xcc0510_0 .alias "inputs", 7 0, v0xcc26c0_0; +v0xcc0590_0 .alias "out", 0 0, v0xcc2460_0; +L_0xd0ef90 .part/v L_0xd0bf70, C4, 1; +S_0xcbd6f0 .scope module, "a13" "ALU1bit" 2 45, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd107d0/d .functor XOR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd107d0 .delay (30,30,30) L_0xd107d0/d; +L_0xd110e0/d .functor AND 1, L_0xd0f850, L_0xd0f8f0, C4<1>, C4<1>; +L_0xd110e0 .delay (30,30,30) L_0xd110e0/d; +L_0xd111a0/d .functor NAND 1, L_0xd0f850, L_0xd0f8f0, C4<1>, C4<1>; +L_0xd111a0 .delay (20,20,20) L_0xd111a0/d; +L_0xd11260/d .functor NOR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd11260 .delay (20,20,20) L_0xd11260/d; +L_0xd11320/d .functor OR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd11320 .delay (30,30,30) L_0xd11320/d; +v0xcbf2e0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcbf3a0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcbf440_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcbf4e0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcbf560_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcbf600_0 .net "a", 0 0, L_0xd0f850; 1 drivers +v0xcbf680_0 .net "b", 0 0, L_0xd0f8f0; 1 drivers +v0xcbf700_0 .net "cin", 0 0, L_0xd10110; 1 drivers +v0xcbf780_0 .net "cout", 0 0, L_0xd11bc0; 1 drivers +v0xcbf800_0 .net "cout_ADD", 0 0, L_0xd0fd10; 1 drivers +v0xcbf8e0_0 .net "cout_SLT", 0 0, L_0xd10f10; 1 drivers +v0xcbf960_0 .net "cout_SUB", 0 0, L_0xd10620; 1 drivers +v0xcbfa50_0 .net "muxCout", 7 0, L_0xd0ec70; 1 drivers +v0xcbfb00_0 .net "muxRes", 7 0, L_0xd113c0; 1 drivers +v0xcbfc30_0 .alias "op", 2 0, v0xcec110_0; +v0xcbfcb0_0 .net "out", 0 0, L_0xd11ad0; 1 drivers +v0xcbfb80_0 .net "res_ADD", 0 0, L_0xd0f1c0; 1 drivers +v0xcbfe20_0 .net "res_AND", 0 0, L_0xd110e0; 1 drivers +v0xcbfd30_0 .net "res_NAND", 0 0, L_0xd111a0; 1 drivers +v0xcbff40_0 .net "res_NOR", 0 0, L_0xd11260; 1 drivers +v0xcbfea0_0 .net "res_OR", 0 0, L_0xd11320; 1 drivers +v0xcc0070_0 .net "res_SLT", 0 0, L_0xd10990; 1 drivers +v0xcbfff0_0 .net "res_SUB", 0 0, L_0xd0ff50; 1 drivers +v0xcc01e0_0 .net "res_XOR", 0 0, L_0xd107d0; 1 drivers +LS_0xd113c0_0_0 .concat [ 1 1 1 1], L_0xd0f1c0, L_0xd0ff50, L_0xd107d0, L_0xd10990; +LS_0xd113c0_0_4 .concat [ 1 1 1 1], L_0xd110e0, L_0xd111a0, L_0xd11260, L_0xd11320; +L_0xd113c0 .concat [ 4 4 0 0], LS_0xd113c0_0_0, LS_0xd113c0_0_4; +LS_0xd0ec70_0_0 .concat [ 1 1 1 1], L_0xd0fd10, L_0xd10620, C4<0>, L_0xd10f10; +LS_0xd0ec70_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd0ec70 .concat [ 4 4 0 0], LS_0xd0ec70_0_0, LS_0xd0ec70_0_4; +S_0xcbea20 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcbd6f0; + .timescale 0 0; +L_0xd0d630/d .functor XOR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd0d630 .delay (30,30,30) L_0xd0d630/d; +L_0xd0f1c0/d .functor XOR 1, L_0xd0d630, L_0xd10110, C4<0>, C4<0>; +L_0xd0f1c0 .delay (30,30,30) L_0xd0f1c0/d; +L_0xd0f990/d .functor AND 1, L_0xd0f850, L_0xd0f8f0, C4<1>, C4<1>; +L_0xd0f990 .delay (30,30,30) L_0xd0f990/d; +L_0xd0f9f0/d .functor OR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd0f9f0 .delay (30,30,30) L_0xd0f9f0/d; +L_0xd0fa90/d .functor NOT 1, L_0xd10110, C4<0>, C4<0>, C4<0>; +L_0xd0fa90 .delay (10,10,10) L_0xd0fa90/d; +L_0xd0fb30/d .functor AND 1, L_0xd0f990, L_0xd0fa90, C4<1>, C4<1>; +L_0xd0fb30 .delay (30,30,30) L_0xd0fb30/d; +L_0xd0fc20/d .functor AND 1, L_0xd0f9f0, L_0xd10110, C4<1>, C4<1>; +L_0xd0fc20 .delay (30,30,30) L_0xd0fc20/d; +L_0xd0fd10/d .functor OR 1, L_0xd0fb30, L_0xd0fc20, C4<0>, C4<0>; +L_0xd0fd10 .delay (30,30,30) L_0xd0fd10/d; +v0xcbeb10_0 .net "_carryin", 0 0, L_0xd0fa90; 1 drivers +v0xcbebd0_0 .alias "a", 0 0, v0xcbf600_0; +v0xcbec50_0 .net "aandb", 0 0, L_0xd0f990; 1 drivers +v0xcbecf0_0 .net "aorb", 0 0, L_0xd0f9f0; 1 drivers +v0xcbed70_0 .alias "b", 0 0, v0xcbf680_0; +v0xcbee40_0 .alias "carryin", 0 0, v0xcbf700_0; +v0xcbef10_0 .alias "carryout", 0 0, v0xcbf800_0; +v0xcbefb0_0 .net "outputIfCarryin", 0 0, L_0xd0fb30; 1 drivers +v0xcbf0a0_0 .net "outputIf_Carryin", 0 0, L_0xd0fc20; 1 drivers +v0xcbf140_0 .net "s", 0 0, L_0xd0d630; 1 drivers +v0xcbf240_0 .alias "sum", 0 0, v0xcbfb80_0; +S_0xcbe2a0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcbd6f0; + .timescale 0 0; +L_0xd0fef0/d .functor XOR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd0fef0 .delay (30,30,30) L_0xd0fef0/d; +L_0xd0ff50/d .functor XOR 1, L_0xd0fef0, L_0xd10110, C4<0>, C4<0>; +L_0xd0ff50 .delay (30,30,30) L_0xd0ff50/d; +L_0xd10090/d .functor NOT 1, L_0xd0f850, C4<0>, C4<0>, C4<0>; +L_0xd10090 .delay (10,10,10) L_0xd10090/d; +L_0xd10220/d .functor AND 1, L_0xd10090, L_0xd0f8f0, C4<1>, C4<1>; +L_0xd10220 .delay (30,30,30) L_0xd10220/d; +L_0xd0ce30/d .functor NOT 1, L_0xd0fef0, C4<0>, C4<0>, C4<0>; +L_0xd0ce30 .delay (10,10,10) L_0xd0ce30/d; +L_0xd10420/d .functor AND 1, L_0xd0ce30, L_0xd10110, C4<1>, C4<1>; +L_0xd10420 .delay (30,30,30) L_0xd10420/d; +L_0xd10620/d .functor OR 1, L_0xd10220, L_0xd10420, C4<0>, C4<0>; +L_0xd10620 .delay (30,30,30) L_0xd10620/d; +v0xcbe390_0 .alias "a", 0 0, v0xcbf600_0; +v0xcbe410_0 .net "axorb", 0 0, L_0xd0fef0; 1 drivers +v0xcbe490_0 .alias "b", 0 0, v0xcbf680_0; +v0xcbe540_0 .alias "borrowin", 0 0, v0xcbf700_0; +v0xcbe5f0_0 .alias "borrowout", 0 0, v0xcbf960_0; +v0xcbe670_0 .alias "diff", 0 0, v0xcbfff0_0; +v0xcbe6f0_0 .net "nota", 0 0, L_0xd10090; 1 drivers +v0xcbe790_0 .net "notaandb", 0 0, L_0xd10220; 1 drivers +v0xcbe880_0 .net "notaxorb", 0 0, L_0xd0ce30; 1 drivers +v0xcbe920_0 .net "notaxorbandborrowin", 0 0, L_0xd10420; 1 drivers +S_0xcbdc40 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcbd6f0; + .timescale 0 0; +L_0xd108b0/d .functor XOR 1, L_0xd0f850, L_0xd0f8f0, C4<0>, C4<0>; +L_0xd108b0 .delay (30,30,30) L_0xd108b0/d; +L_0xd10990/d .functor XOR 1, L_0xd108b0, L_0xd10110, C4<0>, C4<0>; +L_0xd10990 .delay (30,30,30) L_0xd10990/d; +L_0xd10b30/d .functor NOT 1, L_0xd0f850, C4<0>, C4<0>, C4<0>; +L_0xd10b30 .delay (10,10,10) L_0xd10b30/d; +L_0xd10bf0/d .functor AND 1, L_0xd10b30, L_0xd0f8f0, C4<1>, C4<1>; +L_0xd10bf0 .delay (30,30,30) L_0xd10bf0/d; +L_0xd10d20/d .functor NOT 1, L_0xd108b0, C4<0>, C4<0>, C4<0>; +L_0xd10d20 .delay (10,10,10) L_0xd10d20/d; +L_0xd10dc0/d .functor AND 1, L_0xd10d20, L_0xd10110, C4<1>, C4<1>; +L_0xd10dc0 .delay (30,30,30) L_0xd10dc0/d; +L_0xd10f10/d .functor OR 1, L_0xd10bf0, L_0xd10dc0, C4<0>, C4<0>; +L_0xd10f10 .delay (30,30,30) L_0xd10f10/d; +v0xcbdd30_0 .alias "a", 0 0, v0xcbf600_0; +v0xcbddb0_0 .net "axorb", 0 0, L_0xd108b0; 1 drivers +v0xcbde50_0 .alias "b", 0 0, v0xcbf680_0; +v0xcbdef0_0 .alias "borrowin", 0 0, v0xcbf700_0; +v0xcbdfa0_0 .alias "borrowout", 0 0, v0xcbf8e0_0; +v0xcbe020_0 .alias "diff", 0 0, v0xcc0070_0; +v0xcbe0a0_0 .net "nota", 0 0, L_0xd10b30; 1 drivers +v0xcbe120_0 .net "notaandb", 0 0, L_0xd10bf0; 1 drivers +v0xcbe1a0_0 .net "notaxorb", 0 0, L_0xd10d20; 1 drivers +v0xcbe220_0 .net "notaxorbandborrowin", 0 0, L_0xd10dc0; 1 drivers +S_0xcbd9d0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcbd6f0; + .timescale 0 0; +v0xcbdac0_0 .alias "address", 2 0, v0xcec110_0; +v0xcbdb40_0 .alias "inputs", 7 0, v0xcbfb00_0; +v0xcbdbc0_0 .alias "out", 0 0, v0xcbfcb0_0; +L_0xd11ad0 .part/v L_0xd113c0, C4, 1; +S_0xcbd7e0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcbd6f0; + .timescale 0 0; +v0xcbd4b0_0 .alias "address", 2 0, v0xcec110_0; +v0xcbd8d0_0 .alias "inputs", 7 0, v0xcbfa50_0; +v0xcbd950_0 .alias "out", 0 0, v0xcbf780_0; +L_0xd11bc0 .part/v L_0xd0ec70, C4, 1; +S_0xcbaa80 .scope module, "a14" "ALU1bit" 2 46, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd13590/d .functor XOR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd13590 .delay (30,30,30) L_0xd13590/d; +L_0xd13e60/d .functor AND 1, L_0xd12560, L_0xd12e90, C4<1>, C4<1>; +L_0xd13e60 .delay (30,30,30) L_0xd13e60/d; +L_0xd13f20/d .functor NAND 1, L_0xd12560, L_0xd12e90, C4<1>, C4<1>; +L_0xd13f20 .delay (20,20,20) L_0xd13f20/d; +L_0xd13fe0/d .functor NOR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd13fe0 .delay (20,20,20) L_0xd13fe0/d; +L_0xd140a0/d .functor OR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd140a0 .delay (30,30,30) L_0xd140a0/d; +v0xcbc710_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcbc7d0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcbc870_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcbc910_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcbc990_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcbca30_0 .net "a", 0 0, L_0xd12560; 1 drivers +v0xcbcab0_0 .net "b", 0 0, L_0xd12e90; 1 drivers +v0xcbcb30_0 .net "cin", 0 0, L_0xd13050; 1 drivers +v0xcbcbb0_0 .net "cout", 0 0, L_0xd14950; 1 drivers +v0xcbcc30_0 .net "cout_ADD", 0 0, L_0xd129f0; 1 drivers +v0xcbcd10_0 .net "cout_SLT", 0 0, L_0xd13c90; 1 drivers +v0xcbcd90_0 .net "cout_SUB", 0 0, L_0xd13400; 1 drivers +v0xcbce10_0 .net "muxCout", 7 0, L_0xd11790; 1 drivers +v0xcbcec0_0 .net "muxRes", 7 0, L_0xd14140; 1 drivers +v0xcbcff0_0 .alias "op", 2 0, v0xcec110_0; +v0xcbd070_0 .net "out", 0 0, L_0xd14860; 1 drivers +v0xcbcf40_0 .net "res_ADD", 0 0, L_0xd11e20; 1 drivers +v0xcbd1e0_0 .net "res_AND", 0 0, L_0xd13e60; 1 drivers +v0xcbd0f0_0 .net "res_NAND", 0 0, L_0xd13f20; 1 drivers +v0xcbd300_0 .net "res_NOR", 0 0, L_0xd13fe0; 1 drivers +v0xcbd260_0 .net "res_OR", 0 0, L_0xd140a0; 1 drivers +v0xcbd430_0 .net "res_SLT", 0 0, L_0xd13730; 1 drivers +v0xcbd3b0_0 .net "res_SUB", 0 0, L_0xd12c90; 1 drivers +v0xcbd5a0_0 .net "res_XOR", 0 0, L_0xd13590; 1 drivers +LS_0xd14140_0_0 .concat [ 1 1 1 1], L_0xd11e20, L_0xd12c90, L_0xd13590, L_0xd13730; +LS_0xd14140_0_4 .concat [ 1 1 1 1], L_0xd13e60, L_0xd13f20, L_0xd13fe0, L_0xd140a0; +L_0xd14140 .concat [ 4 4 0 0], LS_0xd14140_0_0, LS_0xd14140_0_4; +LS_0xd11790_0_0 .concat [ 1 1 1 1], L_0xd129f0, L_0xd13400, C4<0>, L_0xd13c90; +LS_0xd11790_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd11790 .concat [ 4 4 0 0], LS_0xd11790_0_0, LS_0xd11790_0_4; +S_0xcbbe50 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcbaa80; + .timescale 0 0; +L_0xd101b0/d .functor XOR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd101b0 .delay (30,30,30) L_0xd101b0/d; +L_0xd11e20/d .functor XOR 1, L_0xd101b0, L_0xd13050, C4<0>, C4<0>; +L_0xd11e20 .delay (30,30,30) L_0xd11e20/d; +L_0xd12150/d .functor AND 1, L_0xd12560, L_0xd12e90, C4<1>, C4<1>; +L_0xd12150 .delay (30,30,30) L_0xd12150/d; +L_0xd12210/d .functor OR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd12210 .delay (30,30,30) L_0xd12210/d; +L_0xd122d0/d .functor NOT 1, L_0xd13050, C4<0>, C4<0>, C4<0>; +L_0xd122d0 .delay (10,10,10) L_0xd122d0/d; +L_0xd127b0/d .functor AND 1, L_0xd12150, L_0xd122d0, C4<1>, C4<1>; +L_0xd127b0 .delay (30,30,30) L_0xd127b0/d; +L_0xd128e0/d .functor AND 1, L_0xd12210, L_0xd13050, C4<1>, C4<1>; +L_0xd128e0 .delay (30,30,30) L_0xd128e0/d; +L_0xd129f0/d .functor OR 1, L_0xd127b0, L_0xd128e0, C4<0>, C4<0>; +L_0xd129f0 .delay (30,30,30) L_0xd129f0/d; +v0xcbbf40_0 .net "_carryin", 0 0, L_0xd122d0; 1 drivers +v0xcbc000_0 .alias "a", 0 0, v0xcbca30_0; +v0xcbc080_0 .net "aandb", 0 0, L_0xd12150; 1 drivers +v0xcbc120_0 .net "aorb", 0 0, L_0xd12210; 1 drivers +v0xcbc1a0_0 .alias "b", 0 0, v0xcbcab0_0; +v0xcbc270_0 .alias "carryin", 0 0, v0xcbcb30_0; +v0xcbc340_0 .alias "carryout", 0 0, v0xcbcc30_0; +v0xcbc3e0_0 .net "outputIfCarryin", 0 0, L_0xd127b0; 1 drivers +v0xcbc4d0_0 .net "outputIf_Carryin", 0 0, L_0xd128e0; 1 drivers +v0xcbc570_0 .net "s", 0 0, L_0xd101b0; 1 drivers +v0xcbc670_0 .alias "sum", 0 0, v0xcbcf40_0; +S_0xcbb6f0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcbaa80; + .timescale 0 0; +L_0xd12c10/d .functor XOR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd12c10 .delay (30,30,30) L_0xd12c10/d; +L_0xd12c90/d .functor XOR 1, L_0xd12c10, L_0xd13050, C4<0>, C4<0>; +L_0xd12c90 .delay (30,30,30) L_0xd12c90/d; +L_0xd12e30/d .functor NOT 1, L_0xd12560, C4<0>, C4<0>, C4<0>; +L_0xd12e30 .delay (10,10,10) L_0xd12e30/d; +L_0xd12fa0/d .functor AND 1, L_0xd12e30, L_0xd12e90, C4<1>, C4<1>; +L_0xd12fa0 .delay (30,30,30) L_0xd12fa0/d; +L_0xd13160/d .functor NOT 1, L_0xd12c10, C4<0>, C4<0>, C4<0>; +L_0xd13160 .delay (10,10,10) L_0xd13160/d; +L_0xd13200/d .functor AND 1, L_0xd13160, L_0xd13050, C4<1>, C4<1>; +L_0xd13200 .delay (30,30,30) L_0xd13200/d; +L_0xd13400/d .functor OR 1, L_0xd12fa0, L_0xd13200, C4<0>, C4<0>; +L_0xd13400 .delay (30,30,30) L_0xd13400/d; +v0xcbb7e0_0 .alias "a", 0 0, v0xcbca30_0; +v0xcbb880_0 .net "axorb", 0 0, L_0xd12c10; 1 drivers +v0xcbb900_0 .alias "b", 0 0, v0xcbcab0_0; +v0xcbb9b0_0 .alias "borrowin", 0 0, v0xcbcb30_0; +v0xcbba90_0 .alias "borrowout", 0 0, v0xcbcd90_0; +v0xcbbb10_0 .alias "diff", 0 0, v0xcbd3b0_0; +v0xcbbb90_0 .net "nota", 0 0, L_0xd12e30; 1 drivers +v0xcbbc10_0 .net "notaandb", 0 0, L_0xd12fa0; 1 drivers +v0xcbbcb0_0 .net "notaxorb", 0 0, L_0xd13160; 1 drivers +v0xcbbd50_0 .net "notaxorbandborrowin", 0 0, L_0xd13200; 1 drivers +S_0xcbafd0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcbaa80; + .timescale 0 0; +L_0xd13650/d .functor XOR 1, L_0xd12560, L_0xd12e90, C4<0>, C4<0>; +L_0xd13650 .delay (30,30,30) L_0xd13650/d; +L_0xd13730/d .functor XOR 1, L_0xd13650, L_0xd13050, C4<0>, C4<0>; +L_0xd13730 .delay (30,30,30) L_0xd13730/d; +L_0xd138d0/d .functor NOT 1, L_0xd12560, C4<0>, C4<0>, C4<0>; +L_0xd138d0 .delay (10,10,10) L_0xd138d0/d; +L_0xd13990/d .functor AND 1, L_0xd138d0, L_0xd12e90, C4<1>, C4<1>; +L_0xd13990 .delay (30,30,30) L_0xd13990/d; +L_0xd13aa0/d .functor NOT 1, L_0xd13650, C4<0>, C4<0>, C4<0>; +L_0xd13aa0 .delay (10,10,10) L_0xd13aa0/d; +L_0xd13b40/d .functor AND 1, L_0xd13aa0, L_0xd13050, C4<1>, C4<1>; +L_0xd13b40 .delay (30,30,30) L_0xd13b40/d; +L_0xd13c90/d .functor OR 1, L_0xd13990, L_0xd13b40, C4<0>, C4<0>; +L_0xd13c90 .delay (30,30,30) L_0xd13c90/d; +v0xcbb0c0_0 .alias "a", 0 0, v0xcbca30_0; +v0xcbb140_0 .net "axorb", 0 0, L_0xd13650; 1 drivers +v0xcbb1e0_0 .alias "b", 0 0, v0xcbcab0_0; +v0xcbb280_0 .alias "borrowin", 0 0, v0xcbcb30_0; +v0xcbb330_0 .alias "borrowout", 0 0, v0xcbcd10_0; +v0xcbb3d0_0 .alias "diff", 0 0, v0xcbd430_0; +v0xcbb470_0 .net "nota", 0 0, L_0xd138d0; 1 drivers +v0xcbb510_0 .net "notaandb", 0 0, L_0xd13990; 1 drivers +v0xcbb5b0_0 .net "notaxorb", 0 0, L_0xd13aa0; 1 drivers +v0xcbb650_0 .net "notaxorbandborrowin", 0 0, L_0xd13b40; 1 drivers +S_0xcbad60 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcbaa80; + .timescale 0 0; +v0xcbae50_0 .alias "address", 2 0, v0xcec110_0; +v0xcbaed0_0 .alias "inputs", 7 0, v0xcbcec0_0; +v0xcbaf50_0 .alias "out", 0 0, v0xcbd070_0; +L_0xd14860 .part/v L_0xd14140, C4, 1; +S_0xcbab70 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcbaa80; + .timescale 0 0; +v0xcba840_0 .alias "address", 2 0, v0xcec110_0; +v0xcbac60_0 .alias "inputs", 7 0, v0xcbce10_0; +v0xcbace0_0 .alias "out", 0 0, v0xcbcbb0_0; +L_0xd14950 .part/v L_0xd11790, C4, 1; +S_0xcb7e10 .scope module, "a15" "ALU1bit" 2 47, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd162b0/d .functor XOR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd162b0 .delay (30,30,30) L_0xd162b0/d; +L_0xd16ba0/d .functor AND 1, L_0xd15260, L_0xd15300, C4<1>, C4<1>; +L_0xd16ba0 .delay (30,30,30) L_0xd16ba0/d; +L_0xd16c60/d .functor NAND 1, L_0xd15260, L_0xd15300, C4<1>, C4<1>; +L_0xd16c60 .delay (20,20,20) L_0xd16c60/d; +L_0xd16d20/d .functor NOR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd16d20 .delay (20,20,20) L_0xd16d20/d; +L_0xd16de0/d .functor OR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd16de0 .delay (30,30,30) L_0xd16de0/d; +v0xcb9aa0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcb9b60_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcb9c00_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcb9ca0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcb9d20_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcb9dc0_0 .net "a", 0 0, L_0xd15260; 1 drivers +v0xcb9e40_0 .net "b", 0 0, L_0xd15300; 1 drivers +v0xcb9ec0_0 .net "cin", 0 0, L_0xd15bf0; 1 drivers +v0xcb9f40_0 .net "cout", 0 0, L_0xd17680; 1 drivers +v0xcb9fc0_0 .net "cout_ADD", 0 0, L_0xd15750; 1 drivers +v0xcba0a0_0 .net "cout_SLT", 0 0, L_0xd169d0; 1 drivers +v0xcba120_0 .net "cout_SUB", 0 0, L_0xd16100; 1 drivers +v0xcba1a0_0 .net "muxCout", 7 0, L_0xd14590; 1 drivers +v0xcba250_0 .net "muxRes", 7 0, L_0xd16e80; 1 drivers +v0xcba380_0 .alias "op", 2 0, v0xcec110_0; +v0xcba400_0 .net "out", 0 0, L_0xd17590; 1 drivers +v0xcba2d0_0 .net "res_ADD", 0 0, L_0xd130f0; 1 drivers +v0xcba570_0 .net "res_AND", 0 0, L_0xd16ba0; 1 drivers +v0xcba480_0 .net "res_NAND", 0 0, L_0xd16c60; 1 drivers +v0xcba690_0 .net "res_NOR", 0 0, L_0xd16d20; 1 drivers +v0xcba5f0_0 .net "res_OR", 0 0, L_0xd16de0; 1 drivers +v0xcba7c0_0 .net "res_SLT", 0 0, L_0xd16470; 1 drivers +v0xcba740_0 .net "res_SUB", 0 0, L_0xd159f0; 1 drivers +v0xcba930_0 .net "res_XOR", 0 0, L_0xd162b0; 1 drivers +LS_0xd16e80_0_0 .concat [ 1 1 1 1], L_0xd130f0, L_0xd159f0, L_0xd162b0, L_0xd16470; +LS_0xd16e80_0_4 .concat [ 1 1 1 1], L_0xd16ba0, L_0xd16c60, L_0xd16d20, L_0xd16de0; +L_0xd16e80 .concat [ 4 4 0 0], LS_0xd16e80_0_0, LS_0xd16e80_0_4; +LS_0xd14590_0_0 .concat [ 1 1 1 1], L_0xd15750, L_0xd16100, C4<0>, L_0xd169d0; +LS_0xd14590_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd14590 .concat [ 4 4 0 0], LS_0xd14590_0_0, LS_0xd14590_0_4; +S_0xcb91e0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcb7e10; + .timescale 0 0; +L_0xd12f30/d .functor XOR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd12f30 .delay (30,30,30) L_0xd12f30/d; +L_0xd130f0/d .functor XOR 1, L_0xd12f30, L_0xd15bf0, C4<0>, C4<0>; +L_0xd130f0 .delay (30,30,30) L_0xd130f0/d; +L_0xd14c70/d .functor AND 1, L_0xd15260, L_0xd15300, C4<1>, C4<1>; +L_0xd14c70 .delay (30,30,30) L_0xd14c70/d; +L_0xd14d30/d .functor OR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd14d30 .delay (30,30,30) L_0xd14d30/d; +L_0xd15450/d .functor NOT 1, L_0xd15bf0, C4<0>, C4<0>, C4<0>; +L_0xd15450 .delay (10,10,10) L_0xd15450/d; +L_0xd154f0/d .functor AND 1, L_0xd14c70, L_0xd15450, C4<1>, C4<1>; +L_0xd154f0 .delay (30,30,30) L_0xd154f0/d; +L_0xd15640/d .functor AND 1, L_0xd14d30, L_0xd15bf0, C4<1>, C4<1>; +L_0xd15640 .delay (30,30,30) L_0xd15640/d; +L_0xd15750/d .functor OR 1, L_0xd154f0, L_0xd15640, C4<0>, C4<0>; +L_0xd15750 .delay (30,30,30) L_0xd15750/d; +v0xcb92d0_0 .net "_carryin", 0 0, L_0xd15450; 1 drivers +v0xcb9390_0 .alias "a", 0 0, v0xcb9dc0_0; +v0xcb9410_0 .net "aandb", 0 0, L_0xd14c70; 1 drivers +v0xcb94b0_0 .net "aorb", 0 0, L_0xd14d30; 1 drivers +v0xcb9530_0 .alias "b", 0 0, v0xcb9e40_0; +v0xcb9600_0 .alias "carryin", 0 0, v0xcb9ec0_0; +v0xcb96d0_0 .alias "carryout", 0 0, v0xcb9fc0_0; +v0xcb9770_0 .net "outputIfCarryin", 0 0, L_0xd154f0; 1 drivers +v0xcb9860_0 .net "outputIf_Carryin", 0 0, L_0xd15640; 1 drivers +v0xcb9900_0 .net "s", 0 0, L_0xd12f30; 1 drivers +v0xcb9a00_0 .alias "sum", 0 0, v0xcba2d0_0; +S_0xcb8a80 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcb7e10; + .timescale 0 0; +L_0xd15970/d .functor XOR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd15970 .delay (30,30,30) L_0xd15970/d; +L_0xd159f0/d .functor XOR 1, L_0xd15970, L_0xd15bf0, C4<0>, C4<0>; +L_0xd159f0 .delay (30,30,30) L_0xd159f0/d; +L_0xd15b90/d .functor NOT 1, L_0xd15260, C4<0>, C4<0>, C4<0>; +L_0xd15b90 .delay (10,10,10) L_0xd15b90/d; +L_0xd15d00/d .functor AND 1, L_0xd15b90, L_0xd15300, C4<1>, C4<1>; +L_0xd15d00 .delay (30,30,30) L_0xd15d00/d; +L_0xd126c0/d .functor NOT 1, L_0xd15970, C4<0>, C4<0>, C4<0>; +L_0xd126c0 .delay (10,10,10) L_0xd126c0/d; +L_0xd15f00/d .functor AND 1, L_0xd126c0, L_0xd15bf0, C4<1>, C4<1>; +L_0xd15f00 .delay (30,30,30) L_0xd15f00/d; +L_0xd16100/d .functor OR 1, L_0xd15d00, L_0xd15f00, C4<0>, C4<0>; +L_0xd16100 .delay (30,30,30) L_0xd16100/d; +v0xcb8b70_0 .alias "a", 0 0, v0xcb9dc0_0; +v0xcb8c10_0 .net "axorb", 0 0, L_0xd15970; 1 drivers +v0xcb8c90_0 .alias "b", 0 0, v0xcb9e40_0; +v0xcb8d40_0 .alias "borrowin", 0 0, v0xcb9ec0_0; +v0xcb8e20_0 .alias "borrowout", 0 0, v0xcba120_0; +v0xcb8ea0_0 .alias "diff", 0 0, v0xcba740_0; +v0xcb8f20_0 .net "nota", 0 0, L_0xd15b90; 1 drivers +v0xcb8fa0_0 .net "notaandb", 0 0, L_0xd15d00; 1 drivers +v0xcb9040_0 .net "notaxorb", 0 0, L_0xd126c0; 1 drivers +v0xcb90e0_0 .net "notaxorbandborrowin", 0 0, L_0xd15f00; 1 drivers +S_0xcb8360 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcb7e10; + .timescale 0 0; +L_0xd16390/d .functor XOR 1, L_0xd15260, L_0xd15300, C4<0>, C4<0>; +L_0xd16390 .delay (30,30,30) L_0xd16390/d; +L_0xd16470/d .functor XOR 1, L_0xd16390, L_0xd15bf0, C4<0>, C4<0>; +L_0xd16470 .delay (30,30,30) L_0xd16470/d; +L_0xd16610/d .functor NOT 1, L_0xd15260, C4<0>, C4<0>, C4<0>; +L_0xd16610 .delay (10,10,10) L_0xd16610/d; +L_0xd166d0/d .functor AND 1, L_0xd16610, L_0xd15300, C4<1>, C4<1>; +L_0xd166d0 .delay (30,30,30) L_0xd166d0/d; +L_0xd167e0/d .functor NOT 1, L_0xd16390, C4<0>, C4<0>, C4<0>; +L_0xd167e0 .delay (10,10,10) L_0xd167e0/d; +L_0xd16880/d .functor AND 1, L_0xd167e0, L_0xd15bf0, C4<1>, C4<1>; +L_0xd16880 .delay (30,30,30) L_0xd16880/d; +L_0xd169d0/d .functor OR 1, L_0xd166d0, L_0xd16880, C4<0>, C4<0>; +L_0xd169d0 .delay (30,30,30) L_0xd169d0/d; +v0xcb8450_0 .alias "a", 0 0, v0xcb9dc0_0; +v0xcb84d0_0 .net "axorb", 0 0, L_0xd16390; 1 drivers +v0xcb8570_0 .alias "b", 0 0, v0xcb9e40_0; +v0xcb8610_0 .alias "borrowin", 0 0, v0xcb9ec0_0; +v0xcb86c0_0 .alias "borrowout", 0 0, v0xcba0a0_0; +v0xcb8760_0 .alias "diff", 0 0, v0xcba7c0_0; +v0xcb8800_0 .net "nota", 0 0, L_0xd16610; 1 drivers +v0xcb88a0_0 .net "notaandb", 0 0, L_0xd166d0; 1 drivers +v0xcb8940_0 .net "notaxorb", 0 0, L_0xd167e0; 1 drivers +v0xcb89e0_0 .net "notaxorbandborrowin", 0 0, L_0xd16880; 1 drivers +S_0xcb80f0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcb7e10; + .timescale 0 0; +v0xcb81e0_0 .alias "address", 2 0, v0xcec110_0; +v0xcb8260_0 .alias "inputs", 7 0, v0xcba250_0; +v0xcb82e0_0 .alias "out", 0 0, v0xcba400_0; +L_0xd17590 .part/v L_0xd16e80, C4, 1; +S_0xcb7f00 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcb7e10; + .timescale 0 0; +v0xcb7bd0_0 .alias "address", 2 0, v0xcec110_0; +v0xcb7ff0_0 .alias "inputs", 7 0, v0xcba1a0_0; +v0xcb8070_0 .alias "out", 0 0, v0xcb9f40_0; +L_0xd17680 .part/v L_0xd14590, C4, 1; +S_0xcb51a0 .scope module, "a16" "ALU1bit" 2 48, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd19000/d .functor XOR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd19000 .delay (30,30,30) L_0xd19000/d; +L_0xd198d0/d .functor AND 1, L_0xd17c60, L_0xd18940, C4<1>, C4<1>; +L_0xd198d0 .delay (30,30,30) L_0xd198d0/d; +L_0xd19990/d .functor NAND 1, L_0xd17c60, L_0xd18940, C4<1>, C4<1>; +L_0xd19990 .delay (20,20,20) L_0xd19990/d; +L_0xd19a50/d .functor NOR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd19a50 .delay (20,20,20) L_0xd19a50/d; +L_0xd19b10/d .functor OR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd19b10 .delay (30,30,30) L_0xd19b10/d; +v0xcb6e30_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcb6ef0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcb6f90_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcb7030_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcb70b0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcb7150_0 .net "a", 0 0, L_0xd17c60; 1 drivers +v0xcb71d0_0 .net "b", 0 0, L_0xd18940; 1 drivers +v0xcb7250_0 .net "cin", 0 0, L_0xd024d0; 1 drivers +v0xcb72d0_0 .net "cout", 0 0, L_0xd1a3c0; 1 drivers +v0xcb7350_0 .net "cout_ADD", 0 0, L_0xd184a0; 1 drivers +v0xcb7430_0 .net "cout_SLT", 0 0, L_0xd19700; 1 drivers +v0xcb74b0_0 .net "cout_SUB", 0 0, L_0xd18e70; 1 drivers +v0xcb7530_0 .net "muxCout", 7 0, L_0xd17250; 1 drivers +v0xcb75e0_0 .net "muxRes", 7 0, L_0xd19bb0; 1 drivers +v0xcb7710_0 .alias "op", 2 0, v0xcec110_0; +v0xcb7790_0 .net "out", 0 0, L_0xd1a2d0; 1 drivers +v0xcb7660_0 .net "res_ADD", 0 0, L_0xd15e40; 1 drivers +v0xcb7900_0 .net "res_AND", 0 0, L_0xd198d0; 1 drivers +v0xcb7810_0 .net "res_NAND", 0 0, L_0xd19990; 1 drivers +v0xcb7a20_0 .net "res_NOR", 0 0, L_0xd19a50; 1 drivers +v0xcb7980_0 .net "res_OR", 0 0, L_0xd19b10; 1 drivers +v0xcb7b50_0 .net "res_SLT", 0 0, L_0xd191a0; 1 drivers +v0xcb7ad0_0 .net "res_SUB", 0 0, L_0xd18740; 1 drivers +v0xcb7cc0_0 .net "res_XOR", 0 0, L_0xd19000; 1 drivers +LS_0xd19bb0_0_0 .concat [ 1 1 1 1], L_0xd15e40, L_0xd18740, L_0xd19000, L_0xd191a0; +LS_0xd19bb0_0_4 .concat [ 1 1 1 1], L_0xd198d0, L_0xd19990, L_0xd19a50, L_0xd19b10; +L_0xd19bb0 .concat [ 4 4 0 0], LS_0xd19bb0_0_0, LS_0xd19bb0_0_4; +LS_0xd17250_0_0 .concat [ 1 1 1 1], L_0xd184a0, L_0xd18e70, C4<0>, L_0xd19700; +LS_0xd17250_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd17250 .concat [ 4 4 0 0], LS_0xd17250_0_0, LS_0xd17250_0_4; +S_0xcb6570 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcb51a0; + .timescale 0 0; +L_0xd15c90/d .functor XOR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd15c90 .delay (30,30,30) L_0xd15c90/d; +L_0xd15e40/d .functor XOR 1, L_0xd15c90, L_0xd024d0, C4<0>, C4<0>; +L_0xd15e40 .delay (30,30,30) L_0xd15e40/d; +L_0xd18020/d .functor AND 1, L_0xd17c60, L_0xd18940, C4<1>, C4<1>; +L_0xd18020 .delay (30,30,30) L_0xd18020/d; +L_0xd180e0/d .functor OR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd180e0 .delay (30,30,30) L_0xd180e0/d; +L_0xd181a0/d .functor NOT 1, L_0xd024d0, C4<0>, C4<0>, C4<0>; +L_0xd181a0 .delay (10,10,10) L_0xd181a0/d; +L_0xd18240/d .functor AND 1, L_0xd18020, L_0xd181a0, C4<1>, C4<1>; +L_0xd18240 .delay (30,30,30) L_0xd18240/d; +L_0xd18390/d .functor AND 1, L_0xd180e0, L_0xd024d0, C4<1>, C4<1>; +L_0xd18390 .delay (30,30,30) L_0xd18390/d; +L_0xd184a0/d .functor OR 1, L_0xd18240, L_0xd18390, C4<0>, C4<0>; +L_0xd184a0 .delay (30,30,30) L_0xd184a0/d; +v0xcb6660_0 .net "_carryin", 0 0, L_0xd181a0; 1 drivers +v0xcb6720_0 .alias "a", 0 0, v0xcb7150_0; +v0xcb67a0_0 .net "aandb", 0 0, L_0xd18020; 1 drivers +v0xcb6840_0 .net "aorb", 0 0, L_0xd180e0; 1 drivers +v0xcb68c0_0 .alias "b", 0 0, v0xcb71d0_0; +v0xcb6990_0 .alias "carryin", 0 0, v0xcb7250_0; +v0xcb6a60_0 .alias "carryout", 0 0, v0xcb7350_0; +v0xcb6b00_0 .net "outputIfCarryin", 0 0, L_0xd18240; 1 drivers +v0xcb6bf0_0 .net "outputIf_Carryin", 0 0, L_0xd18390; 1 drivers +v0xcb6c90_0 .net "s", 0 0, L_0xd15c90; 1 drivers +v0xcb6d90_0 .alias "sum", 0 0, v0xcb7660_0; +S_0xcb5e10 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcb51a0; + .timescale 0 0; +L_0xd186c0/d .functor XOR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd186c0 .delay (30,30,30) L_0xd186c0/d; +L_0xd18740/d .functor XOR 1, L_0xd186c0, L_0xd024d0, C4<0>, C4<0>; +L_0xd18740 .delay (30,30,30) L_0xd18740/d; +L_0xd188e0/d .functor NOT 1, L_0xd17c60, C4<0>, C4<0>, C4<0>; +L_0xd188e0 .delay (10,10,10) L_0xd188e0/d; +L_0xd18a50/d .functor AND 1, L_0xd188e0, L_0xd18940, C4<1>, C4<1>; +L_0xd18a50 .delay (30,30,30) L_0xd18a50/d; +L_0xd18c10/d .functor NOT 1, L_0xd186c0, C4<0>, C4<0>, C4<0>; +L_0xd18c10 .delay (10,10,10) L_0xd18c10/d; +L_0xd18cb0/d .functor AND 1, L_0xd18c10, L_0xd024d0, C4<1>, C4<1>; +L_0xd18cb0 .delay (30,30,30) L_0xd18cb0/d; +L_0xd18e70/d .functor OR 1, L_0xd18a50, L_0xd18cb0, C4<0>, C4<0>; +L_0xd18e70 .delay (30,30,30) L_0xd18e70/d; +v0xcb5f00_0 .alias "a", 0 0, v0xcb7150_0; +v0xcb5fa0_0 .net "axorb", 0 0, L_0xd186c0; 1 drivers +v0xcb6020_0 .alias "b", 0 0, v0xcb71d0_0; +v0xcb60d0_0 .alias "borrowin", 0 0, v0xcb7250_0; +v0xcb61b0_0 .alias "borrowout", 0 0, v0xcb74b0_0; +v0xcb6230_0 .alias "diff", 0 0, v0xcb7ad0_0; +v0xcb62b0_0 .net "nota", 0 0, L_0xd188e0; 1 drivers +v0xcb6330_0 .net "notaandb", 0 0, L_0xd18a50; 1 drivers +v0xcb63d0_0 .net "notaxorb", 0 0, L_0xd18c10; 1 drivers +v0xcb6470_0 .net "notaxorbandborrowin", 0 0, L_0xd18cb0; 1 drivers +S_0xcb56f0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcb51a0; + .timescale 0 0; +L_0xd190c0/d .functor XOR 1, L_0xd17c60, L_0xd18940, C4<0>, C4<0>; +L_0xd190c0 .delay (30,30,30) L_0xd190c0/d; +L_0xd191a0/d .functor XOR 1, L_0xd190c0, L_0xd024d0, C4<0>, C4<0>; +L_0xd191a0 .delay (30,30,30) L_0xd191a0/d; +L_0xd19340/d .functor NOT 1, L_0xd17c60, C4<0>, C4<0>, C4<0>; +L_0xd19340 .delay (10,10,10) L_0xd19340/d; +L_0xd19400/d .functor AND 1, L_0xd19340, L_0xd18940, C4<1>, C4<1>; +L_0xd19400 .delay (30,30,30) L_0xd19400/d; +L_0xd19510/d .functor NOT 1, L_0xd190c0, C4<0>, C4<0>, C4<0>; +L_0xd19510 .delay (10,10,10) L_0xd19510/d; +L_0xd195b0/d .functor AND 1, L_0xd19510, L_0xd024d0, C4<1>, C4<1>; +L_0xd195b0 .delay (30,30,30) L_0xd195b0/d; +L_0xd19700/d .functor OR 1, L_0xd19400, L_0xd195b0, C4<0>, C4<0>; +L_0xd19700 .delay (30,30,30) L_0xd19700/d; +v0xcb57e0_0 .alias "a", 0 0, v0xcb7150_0; +v0xcb5860_0 .net "axorb", 0 0, L_0xd190c0; 1 drivers +v0xcb5900_0 .alias "b", 0 0, v0xcb71d0_0; +v0xcb59a0_0 .alias "borrowin", 0 0, v0xcb7250_0; +v0xcb5a50_0 .alias "borrowout", 0 0, v0xcb7430_0; +v0xcb5af0_0 .alias "diff", 0 0, v0xcb7b50_0; +v0xcb5b90_0 .net "nota", 0 0, L_0xd19340; 1 drivers +v0xcb5c30_0 .net "notaandb", 0 0, L_0xd19400; 1 drivers +v0xcb5cd0_0 .net "notaxorb", 0 0, L_0xd19510; 1 drivers +v0xcb5d70_0 .net "notaxorbandborrowin", 0 0, L_0xd195b0; 1 drivers +S_0xcb5480 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcb51a0; + .timescale 0 0; +v0xcb5570_0 .alias "address", 2 0, v0xcec110_0; +v0xcb55f0_0 .alias "inputs", 7 0, v0xcb75e0_0; +v0xcb5670_0 .alias "out", 0 0, v0xcb7790_0; +L_0xd1a2d0 .part/v L_0xd19bb0, C4, 1; +S_0xcb5290 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcb51a0; + .timescale 0 0; +v0xcb4f60_0 .alias "address", 2 0, v0xcec110_0; +v0xcb5380_0 .alias "inputs", 7 0, v0xcb7530_0; +v0xcb5400_0 .alias "out", 0 0, v0xcb72d0_0; +L_0xd1a3c0 .part/v L_0xd17250, C4, 1; +S_0xcb2530 .scope module, "a17" "ALU1bit" 2 49, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd1c070/d .functor XOR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd1c070 .delay (30,30,30) L_0xd1c070/d; +L_0xd1c940/d .functor AND 1, L_0xd1b2b0, L_0xd1b970, C4<1>, C4<1>; +L_0xd1c940 .delay (30,30,30) L_0xd1c940/d; +L_0xd1ca00/d .functor NAND 1, L_0xd1b2b0, L_0xd1b970, C4<1>, C4<1>; +L_0xd1ca00 .delay (20,20,20) L_0xd1ca00/d; +L_0xd1cac0/d .functor NOR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd1cac0 .delay (20,20,20) L_0xd1cac0/d; +L_0xd1cb80/d .functor OR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd1cb80 .delay (30,30,30) L_0xd1cb80/d; +v0xcb41c0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcb4280_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcb4320_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcb43c0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcb4440_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcb44e0_0 .net "a", 0 0, L_0xd1b2b0; 1 drivers +v0xcb4560_0 .net "b", 0 0, L_0xd1b970; 1 drivers +v0xcb45e0_0 .net "cin", 0 0, L_0xd1bb30; 1 drivers +v0xcb4660_0 .net "cout", 0 0, L_0xd1d420; 1 drivers +v0xcb46e0_0 .net "cout_ADD", 0 0, L_0xd1b4d0; 1 drivers +v0xcb47c0_0 .net "cout_SLT", 0 0, L_0xd1c770; 1 drivers +v0xcb4840_0 .net "cout_SUB", 0 0, L_0xd1bee0; 1 drivers +v0xcb48c0_0 .net "muxCout", 7 0, L_0xd1a000; 1 drivers +v0xcb4970_0 .net "muxRes", 7 0, L_0xd1cc20; 1 drivers +v0xcb4aa0_0 .alias "op", 2 0, v0xcec110_0; +v0xcb4b20_0 .net "out", 0 0, L_0xd1d330; 1 drivers +v0xcb49f0_0 .net "res_ADD", 0 0, L_0xd189e0; 1 drivers +v0xcb4c90_0 .net "res_AND", 0 0, L_0xd1c940; 1 drivers +v0xcb4ba0_0 .net "res_NAND", 0 0, L_0xd1ca00; 1 drivers +v0xcb4db0_0 .net "res_NOR", 0 0, L_0xd1cac0; 1 drivers +v0xcb4d10_0 .net "res_OR", 0 0, L_0xd1cb80; 1 drivers +v0xcb4ee0_0 .net "res_SLT", 0 0, L_0xd1c210; 1 drivers +v0xcb4e60_0 .net "res_SUB", 0 0, L_0xd1b770; 1 drivers +v0xcb5050_0 .net "res_XOR", 0 0, L_0xd1c070; 1 drivers +LS_0xd1cc20_0_0 .concat [ 1 1 1 1], L_0xd189e0, L_0xd1b770, L_0xd1c070, L_0xd1c210; +LS_0xd1cc20_0_4 .concat [ 1 1 1 1], L_0xd1c940, L_0xd1ca00, L_0xd1cac0, L_0xd1cb80; +L_0xd1cc20 .concat [ 4 4 0 0], LS_0xd1cc20_0_0, LS_0xd1cc20_0_4; +LS_0xd1a000_0_0 .concat [ 1 1 1 1], L_0xd1b4d0, L_0xd1bee0, C4<0>, L_0xd1c770; +LS_0xd1a000_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd1a000 .concat [ 4 4 0 0], LS_0xd1a000_0_0, LS_0xd1a000_0_4; +S_0xcb3900 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcb2530; + .timescale 0 0; +L_0xd03fc0/d .functor XOR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd03fc0 .delay (30,30,30) L_0xd03fc0/d; +L_0xd189e0/d .functor XOR 1, L_0xd03fc0, L_0xd1bb30, C4<0>, C4<0>; +L_0xd189e0 .delay (30,30,30) L_0xd189e0/d; +L_0xd17db0/d .functor AND 1, L_0xd1b2b0, L_0xd1b970, C4<1>, C4<1>; +L_0xd17db0 .delay (30,30,30) L_0xd17db0/d; +L_0xd02570/d .functor OR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd02570 .delay (30,30,30) L_0xd02570/d; +L_0xd18bb0/d .functor NOT 1, L_0xd1bb30, C4<0>, C4<0>, C4<0>; +L_0xd18bb0 .delay (10,10,10) L_0xd18bb0/d; +L_0xd1a7a0/d .functor AND 1, L_0xd17db0, L_0xd18bb0, C4<1>, C4<1>; +L_0xd1a7a0 .delay (30,30,30) L_0xd1a7a0/d; +L_0xd1a8f0/d .functor AND 1, L_0xd02570, L_0xd1bb30, C4<1>, C4<1>; +L_0xd1a8f0 .delay (30,30,30) L_0xd1a8f0/d; +L_0xd1b4d0/d .functor OR 1, L_0xd1a7a0, L_0xd1a8f0, C4<0>, C4<0>; +L_0xd1b4d0 .delay (30,30,30) L_0xd1b4d0/d; +v0xcb39f0_0 .net "_carryin", 0 0, L_0xd18bb0; 1 drivers +v0xcb3ab0_0 .alias "a", 0 0, v0xcb44e0_0; +v0xcb3b30_0 .net "aandb", 0 0, L_0xd17db0; 1 drivers +v0xcb3bd0_0 .net "aorb", 0 0, L_0xd02570; 1 drivers +v0xcb3c50_0 .alias "b", 0 0, v0xcb4560_0; +v0xcb3d20_0 .alias "carryin", 0 0, v0xcb45e0_0; +v0xcb3df0_0 .alias "carryout", 0 0, v0xcb46e0_0; +v0xcb3e90_0 .net "outputIfCarryin", 0 0, L_0xd1a7a0; 1 drivers +v0xcb3f80_0 .net "outputIf_Carryin", 0 0, L_0xd1a8f0; 1 drivers +v0xcb4020_0 .net "s", 0 0, L_0xd03fc0; 1 drivers +v0xcb4120_0 .alias "sum", 0 0, v0xcb49f0_0; +S_0xcb31a0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcb2530; + .timescale 0 0; +L_0xd1b6f0/d .functor XOR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd1b6f0 .delay (30,30,30) L_0xd1b6f0/d; +L_0xd1b770/d .functor XOR 1, L_0xd1b6f0, L_0xd1bb30, C4<0>, C4<0>; +L_0xd1b770 .delay (30,30,30) L_0xd1b770/d; +L_0xd1b910/d .functor NOT 1, L_0xd1b2b0, C4<0>, C4<0>, C4<0>; +L_0xd1b910 .delay (10,10,10) L_0xd1b910/d; +L_0xd1ba80/d .functor AND 1, L_0xd1b910, L_0xd1b970, C4<1>, C4<1>; +L_0xd1ba80 .delay (30,30,30) L_0xd1ba80/d; +L_0xd1bc40/d .functor NOT 1, L_0xd1b6f0, C4<0>, C4<0>, C4<0>; +L_0xd1bc40 .delay (10,10,10) L_0xd1bc40/d; +L_0xd1bce0/d .functor AND 1, L_0xd1bc40, L_0xd1bb30, C4<1>, C4<1>; +L_0xd1bce0 .delay (30,30,30) L_0xd1bce0/d; +L_0xd1bee0/d .functor OR 1, L_0xd1ba80, L_0xd1bce0, C4<0>, C4<0>; +L_0xd1bee0 .delay (30,30,30) L_0xd1bee0/d; +v0xcb3290_0 .alias "a", 0 0, v0xcb44e0_0; +v0xcb3330_0 .net "axorb", 0 0, L_0xd1b6f0; 1 drivers +v0xcb33b0_0 .alias "b", 0 0, v0xcb4560_0; +v0xcb3460_0 .alias "borrowin", 0 0, v0xcb45e0_0; +v0xcb3540_0 .alias "borrowout", 0 0, v0xcb4840_0; +v0xcb35c0_0 .alias "diff", 0 0, v0xcb4e60_0; +v0xcb3640_0 .net "nota", 0 0, L_0xd1b910; 1 drivers +v0xcb36c0_0 .net "notaandb", 0 0, L_0xd1ba80; 1 drivers +v0xcb3760_0 .net "notaxorb", 0 0, L_0xd1bc40; 1 drivers +v0xcb3800_0 .net "notaxorbandborrowin", 0 0, L_0xd1bce0; 1 drivers +S_0xcb2a80 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcb2530; + .timescale 0 0; +L_0xd1c130/d .functor XOR 1, L_0xd1b2b0, L_0xd1b970, C4<0>, C4<0>; +L_0xd1c130 .delay (30,30,30) L_0xd1c130/d; +L_0xd1c210/d .functor XOR 1, L_0xd1c130, L_0xd1bb30, C4<0>, C4<0>; +L_0xd1c210 .delay (30,30,30) L_0xd1c210/d; +L_0xd1c3b0/d .functor NOT 1, L_0xd1b2b0, C4<0>, C4<0>, C4<0>; +L_0xd1c3b0 .delay (10,10,10) L_0xd1c3b0/d; +L_0xd1c470/d .functor AND 1, L_0xd1c3b0, L_0xd1b970, C4<1>, C4<1>; +L_0xd1c470 .delay (30,30,30) L_0xd1c470/d; +L_0xd1c580/d .functor NOT 1, L_0xd1c130, C4<0>, C4<0>, C4<0>; +L_0xd1c580 .delay (10,10,10) L_0xd1c580/d; +L_0xd1c620/d .functor AND 1, L_0xd1c580, L_0xd1bb30, C4<1>, C4<1>; +L_0xd1c620 .delay (30,30,30) L_0xd1c620/d; +L_0xd1c770/d .functor OR 1, L_0xd1c470, L_0xd1c620, C4<0>, C4<0>; +L_0xd1c770 .delay (30,30,30) L_0xd1c770/d; +v0xcb2b70_0 .alias "a", 0 0, v0xcb44e0_0; +v0xcb2bf0_0 .net "axorb", 0 0, L_0xd1c130; 1 drivers +v0xcb2c90_0 .alias "b", 0 0, v0xcb4560_0; +v0xcb2d30_0 .alias "borrowin", 0 0, v0xcb45e0_0; +v0xcb2de0_0 .alias "borrowout", 0 0, v0xcb47c0_0; +v0xcb2e80_0 .alias "diff", 0 0, v0xcb4ee0_0; +v0xcb2f20_0 .net "nota", 0 0, L_0xd1c3b0; 1 drivers +v0xcb2fc0_0 .net "notaandb", 0 0, L_0xd1c470; 1 drivers +v0xcb3060_0 .net "notaxorb", 0 0, L_0xd1c580; 1 drivers +v0xcb3100_0 .net "notaxorbandborrowin", 0 0, L_0xd1c620; 1 drivers +S_0xcb2810 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcb2530; + .timescale 0 0; +v0xcb2900_0 .alias "address", 2 0, v0xcec110_0; +v0xcb2980_0 .alias "inputs", 7 0, v0xcb4970_0; +v0xcb2a00_0 .alias "out", 0 0, v0xcb4b20_0; +L_0xd1d330 .part/v L_0xd1cc20, C4, 1; +S_0xcb2620 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcb2530; + .timescale 0 0; +v0xcb22f0_0 .alias "address", 2 0, v0xcec110_0; +v0xcb2710_0 .alias "inputs", 7 0, v0xcb48c0_0; +v0xcb2790_0 .alias "out", 0 0, v0xcb4660_0; +L_0xd1d420 .part/v L_0xd1a000, C4, 1; +S_0xcaf8c0 .scope module, "a18" "ALU1bit" 2 50, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd1eac0/d .functor XOR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xd1eac0 .delay (30,30,30) L_0xd1eac0/d; +L_0xd1f230/d .functor AND 1, L_0xd1dc50, L_0xd1e420, C4<1>, C4<1>; +L_0xd1f230 .delay (30,30,30) L_0xd1f230/d; +L_0xd1f2d0/d .functor NAND 1, L_0xd1dc50, L_0xd1e420, C4<1>, C4<1>; +L_0xd1f2d0 .delay (20,20,20) L_0xd1f2d0/d; +L_0xd1f370/d .functor NOR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xd1f370 .delay (20,20,20) L_0xd1f370/d; +L_0xd1f410/d .functor OR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xd1f410 .delay (30,30,30) L_0xd1f410/d; +v0xcb1550_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcb1610_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcb16b0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcb1750_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcb17d0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcb1870_0 .net "a", 0 0, L_0xd1dc50; 1 drivers +v0xcb18f0_0 .net "b", 0 0, L_0xd1e420; 1 drivers +v0xcb1970_0 .net "cin", 0 0, L_0xd1e5e0; 1 drivers +v0xcb19f0_0 .net "cout", 0 0, L_0xd1fcc0; 1 drivers +v0xcb1a70_0 .net "cout_ADD", 0 0, L_0xd1e040; 1 drivers +v0xcb1b50_0 .net "cout_SLT", 0 0, L_0xd1f0a0; 1 drivers +v0xcb1bd0_0 .net "cout_SUB", 0 0, L_0xd1e930; 1 drivers +v0xcb1c50_0 .net "muxCout", 7 0, L_0xd1cff0; 1 drivers +v0xcb1d00_0 .net "muxRes", 7 0, L_0xd1f4b0; 1 drivers +v0xcb1e30_0 .alias "op", 2 0, v0xcec110_0; +v0xcb1eb0_0 .net "out", 0 0, L_0xd1fbd0; 1 drivers +v0xcb1d80_0 .net "res_ADD", 0 0, L_0xcb4c30; 1 drivers +v0xcb2020_0 .net "res_AND", 0 0, L_0xd1f230; 1 drivers +v0xcb1f30_0 .net "res_NAND", 0 0, L_0xd1f2d0; 1 drivers +v0xcb2140_0 .net "res_NOR", 0 0, L_0xd1f370; 1 drivers +v0xcb20a0_0 .net "res_OR", 0 0, L_0xd1f410; 1 drivers +v0xcb2270_0 .net "res_SLT", 0 0, L_0xd1ec00; 1 drivers +v0xcb21f0_0 .net "res_SUB", 0 0, L_0xd1e280; 1 drivers +v0xcb23e0_0 .net "res_XOR", 0 0, L_0xd1eac0; 1 drivers +LS_0xd1f4b0_0_0 .concat [ 1 1 1 1], L_0xcb4c30, L_0xd1e280, L_0xd1eac0, L_0xd1ec00; +LS_0xd1f4b0_0_4 .concat [ 1 1 1 1], L_0xd1f230, L_0xd1f2d0, L_0xd1f370, L_0xd1f410; +L_0xd1f4b0 .concat [ 4 4 0 0], LS_0xd1f4b0_0_0, LS_0xd1f4b0_0_4; +LS_0xd1cff0_0_0 .concat [ 1 1 1 1], L_0xd1e040, L_0xd1e930, C4<0>, L_0xd1f0a0; +LS_0xd1cff0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd1cff0 .concat [ 4 4 0 0], LS_0xd1cff0_0_0, LS_0xd1cff0_0_4; +S_0xcb0c90 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcaf8c0; + .timescale 0 0; +L_0xcb34e0/d .functor XOR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xcb34e0 .delay (30,30,30) L_0xcb34e0/d; +L_0xcb4c30/d .functor XOR 1, L_0xcb34e0, L_0xd1e5e0, C4<0>, C4<0>; +L_0xcb4c30 .delay (30,30,30) L_0xcb4c30/d; +L_0xcb78a0/d .functor AND 1, L_0xd1dc50, L_0xd1e420, C4<1>, C4<1>; +L_0xcb78a0 .delay (30,30,30) L_0xcb78a0/d; +L_0xcba510/d .functor OR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xcba510 .delay (30,30,30) L_0xcba510/d; +L_0xcbd180/d .functor NOT 1, L_0xd1e5e0, C4<0>, C4<0>, C4<0>; +L_0xcbd180 .delay (10,10,10) L_0xcbd180/d; +L_0xcc12e0/d .functor AND 1, L_0xcb78a0, L_0xcbd180, C4<1>, C4<1>; +L_0xcc12e0 .delay (30,30,30) L_0xcc12e0/d; +L_0xd1df90/d .functor AND 1, L_0xcba510, L_0xd1e5e0, C4<1>, C4<1>; +L_0xd1df90 .delay (30,30,30) L_0xd1df90/d; +L_0xd1e040/d .functor OR 1, L_0xcc12e0, L_0xd1df90, C4<0>, C4<0>; +L_0xd1e040 .delay (30,30,30) L_0xd1e040/d; +v0xcb0d80_0 .net "_carryin", 0 0, L_0xcbd180; 1 drivers +v0xcb0e40_0 .alias "a", 0 0, v0xcb1870_0; +v0xcb0ec0_0 .net "aandb", 0 0, L_0xcb78a0; 1 drivers +v0xcb0f60_0 .net "aorb", 0 0, L_0xcba510; 1 drivers +v0xcb0fe0_0 .alias "b", 0 0, v0xcb18f0_0; +v0xcb10b0_0 .alias "carryin", 0 0, v0xcb1970_0; +v0xcb1180_0 .alias "carryout", 0 0, v0xcb1a70_0; +v0xcb1220_0 .net "outputIfCarryin", 0 0, L_0xcc12e0; 1 drivers +v0xcb1310_0 .net "outputIf_Carryin", 0 0, L_0xd1df90; 1 drivers +v0xcb13b0_0 .net "s", 0 0, L_0xcb34e0; 1 drivers +v0xcb14b0_0 .alias "sum", 0 0, v0xcb1d80_0; +S_0xcb0530 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcaf8c0; + .timescale 0 0; +L_0xd1e220/d .functor XOR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xd1e220 .delay (30,30,30) L_0xd1e220/d; +L_0xd1e280/d .functor XOR 1, L_0xd1e220, L_0xd1e5e0, C4<0>, C4<0>; +L_0xd1e280 .delay (30,30,30) L_0xd1e280/d; +L_0xd1e3c0/d .functor NOT 1, L_0xd1dc50, C4<0>, C4<0>, C4<0>; +L_0xd1e3c0 .delay (10,10,10) L_0xd1e3c0/d; +L_0xd1e530/d .functor AND 1, L_0xd1e3c0, L_0xd1e420, C4<1>, C4<1>; +L_0xd1e530 .delay (30,30,30) L_0xd1e530/d; +L_0xd1b410/d .functor NOT 1, L_0xd1e220, C4<0>, C4<0>, C4<0>; +L_0xd1b410 .delay (10,10,10) L_0xd1b410/d; +L_0xd1e730/d .functor AND 1, L_0xd1b410, L_0xd1e5e0, C4<1>, C4<1>; +L_0xd1e730 .delay (30,30,30) L_0xd1e730/d; +L_0xd1e930/d .functor OR 1, L_0xd1e530, L_0xd1e730, C4<0>, C4<0>; +L_0xd1e930 .delay (30,30,30) L_0xd1e930/d; +v0xcb0620_0 .alias "a", 0 0, v0xcb1870_0; +v0xcb06c0_0 .net "axorb", 0 0, L_0xd1e220; 1 drivers +v0xcb0740_0 .alias "b", 0 0, v0xcb18f0_0; +v0xcb07f0_0 .alias "borrowin", 0 0, v0xcb1970_0; +v0xcb08d0_0 .alias "borrowout", 0 0, v0xcb1bd0_0; +v0xcb0950_0 .alias "diff", 0 0, v0xcb21f0_0; +v0xcb09d0_0 .net "nota", 0 0, L_0xd1e3c0; 1 drivers +v0xcb0a50_0 .net "notaandb", 0 0, L_0xd1e530; 1 drivers +v0xcb0af0_0 .net "notaxorb", 0 0, L_0xd1b410; 1 drivers +v0xcb0b90_0 .net "notaxorbandborrowin", 0 0, L_0xd1e730; 1 drivers +S_0xcafe10 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcaf8c0; + .timescale 0 0; +L_0xd1eb60/d .functor XOR 1, L_0xd1dc50, L_0xd1e420, C4<0>, C4<0>; +L_0xd1eb60 .delay (30,30,30) L_0xd1eb60/d; +L_0xd1ec00/d .functor XOR 1, L_0xd1eb60, L_0xd1e5e0, C4<0>, C4<0>; +L_0xd1ec00 .delay (30,30,30) L_0xd1ec00/d; +L_0xd1ed40/d .functor NOT 1, L_0xd1dc50, C4<0>, C4<0>, C4<0>; +L_0xd1ed40 .delay (10,10,10) L_0xd1ed40/d; +L_0xd1ede0/d .functor AND 1, L_0xd1ed40, L_0xd1e420, C4<1>, C4<1>; +L_0xd1ede0 .delay (30,30,30) L_0xd1ede0/d; +L_0xd1eed0/d .functor NOT 1, L_0xd1eb60, C4<0>, C4<0>, C4<0>; +L_0xd1eed0 .delay (10,10,10) L_0xd1eed0/d; +L_0xd1ef70/d .functor AND 1, L_0xd1eed0, L_0xd1e5e0, C4<1>, C4<1>; +L_0xd1ef70 .delay (30,30,30) L_0xd1ef70/d; +L_0xd1f0a0/d .functor OR 1, L_0xd1ede0, L_0xd1ef70, C4<0>, C4<0>; +L_0xd1f0a0 .delay (30,30,30) L_0xd1f0a0/d; +v0xcaff00_0 .alias "a", 0 0, v0xcb1870_0; +v0xcaff80_0 .net "axorb", 0 0, L_0xd1eb60; 1 drivers +v0xcb0020_0 .alias "b", 0 0, v0xcb18f0_0; +v0xcb00c0_0 .alias "borrowin", 0 0, v0xcb1970_0; +v0xcb0170_0 .alias "borrowout", 0 0, v0xcb1b50_0; +v0xcb0210_0 .alias "diff", 0 0, v0xcb2270_0; +v0xcb02b0_0 .net "nota", 0 0, L_0xd1ed40; 1 drivers +v0xcb0350_0 .net "notaandb", 0 0, L_0xd1ede0; 1 drivers +v0xcb03f0_0 .net "notaxorb", 0 0, L_0xd1eed0; 1 drivers +v0xcb0490_0 .net "notaxorbandborrowin", 0 0, L_0xd1ef70; 1 drivers +S_0xcafba0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcaf8c0; + .timescale 0 0; +v0xcafc90_0 .alias "address", 2 0, v0xcec110_0; +v0xcafd10_0 .alias "inputs", 7 0, v0xcb1d00_0; +v0xcafd90_0 .alias "out", 0 0, v0xcb1eb0_0; +L_0xd1fbd0 .part/v L_0xd1f4b0, C4, 1; +S_0xcaf9b0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcaf8c0; + .timescale 0 0; +v0xcaf680_0 .alias "address", 2 0, v0xcec110_0; +v0xcafaa0_0 .alias "inputs", 7 0, v0xcb1c50_0; +v0xcafb20_0 .alias "out", 0 0, v0xcb19f0_0; +L_0xd1fcc0 .part/v L_0xd1cff0, C4, 1; +S_0xcacc50 .scope module, "a19" "ALU1bit" 2 51, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd21420/d .functor XOR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd21420 .delay (30,30,30) L_0xd21420/d; +L_0xd21bb0/d .functor AND 1, L_0xd20460, L_0xd20e50, C4<1>, C4<1>; +L_0xd21bb0 .delay (30,30,30) L_0xd21bb0/d; +L_0xd21c90/d .functor NAND 1, L_0xd20460, L_0xd20e50, C4<1>, C4<1>; +L_0xd21c90 .delay (20,20,20) L_0xd21c90/d; +L_0xd21d50/d .functor NOR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd21d50 .delay (20,20,20) L_0xd21d50/d; +L_0xd21e10/d .functor OR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd21e10 .delay (30,30,30) L_0xd21e10/d; +v0xcae8e0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcae9a0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcaea40_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcaeae0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcaeb60_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcaec00_0 .net "a", 0 0, L_0xd20460; 1 drivers +v0xcaec80_0 .net "b", 0 0, L_0xd20e50; 1 drivers +v0xcaed00_0 .net "cin", 0 0, L_0xd22a50; 1 drivers +v0xcaed80_0 .net "cout", 0 0, L_0xd226b0; 1 drivers +v0xcaee00_0 .net "cout_ADD", 0 0, L_0xd20a30; 1 drivers +v0xcaeee0_0 .net "cout_SLT", 0 0, L_0xd21a00; 1 drivers +v0xcaef60_0 .net "cout_SUB", 0 0, L_0xd21290; 1 drivers +v0xcaefe0_0 .net "muxCout", 7 0, L_0xd1f8c0; 1 drivers +v0xcaf090_0 .net "muxRes", 7 0, L_0xd21eb0; 1 drivers +v0xcaf1c0_0 .alias "op", 2 0, v0xcec110_0; +v0xcaf240_0 .net "out", 0 0, L_0xd225c0; 1 drivers +v0xcaf110_0 .net "res_ADD", 0 0, L_0xd20050; 1 drivers +v0xcaf3b0_0 .net "res_AND", 0 0, L_0xd21bb0; 1 drivers +v0xcaf2c0_0 .net "res_NAND", 0 0, L_0xd21c90; 1 drivers +v0xcaf4d0_0 .net "res_NOR", 0 0, L_0xd21d50; 1 drivers +v0xcaf430_0 .net "res_OR", 0 0, L_0xd21e10; 1 drivers +v0xcaf600_0 .net "res_SLT", 0 0, L_0xd21560; 1 drivers +v0xcaf580_0 .net "res_SUB", 0 0, L_0xd20c70; 1 drivers +v0xcaf770_0 .net "res_XOR", 0 0, L_0xd21420; 1 drivers +LS_0xd21eb0_0_0 .concat [ 1 1 1 1], L_0xd20050, L_0xd20c70, L_0xd21420, L_0xd21560; +LS_0xd21eb0_0_4 .concat [ 1 1 1 1], L_0xd21bb0, L_0xd21c90, L_0xd21d50, L_0xd21e10; +L_0xd21eb0 .concat [ 4 4 0 0], LS_0xd21eb0_0_0, LS_0xd21eb0_0_4; +LS_0xd1f8c0_0_0 .concat [ 1 1 1 1], L_0xd20a30, L_0xd21290, C4<0>, L_0xd21a00; +LS_0xd1f8c0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd1f8c0 .concat [ 4 4 0 0], LS_0xd1f8c0_0_0, LS_0xd1f8c0_0_4; +S_0xcae020 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xcacc50; + .timescale 0 0; +L_0xd1e4c0/d .functor XOR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd1e4c0 .delay (30,30,30) L_0xd1e4c0/d; +L_0xd20050/d .functor XOR 1, L_0xd1e4c0, L_0xd22a50, C4<0>, C4<0>; +L_0xd20050 .delay (30,30,30) L_0xd20050/d; +L_0xd1e680/d .functor AND 1, L_0xd20460, L_0xd20e50, C4<1>, C4<1>; +L_0xd1e680 .delay (30,30,30) L_0xd1e680/d; +L_0xd206d0/d .functor OR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd206d0 .delay (30,30,30) L_0xd206d0/d; +L_0xd20770/d .functor NOT 1, L_0xd22a50, C4<0>, C4<0>, C4<0>; +L_0xd20770 .delay (10,10,10) L_0xd20770/d; +L_0xd20810/d .functor AND 1, L_0xd1e680, L_0xd20770, C4<1>, C4<1>; +L_0xd20810 .delay (30,30,30) L_0xd20810/d; +L_0xd20940/d .functor AND 1, L_0xd206d0, L_0xd22a50, C4<1>, C4<1>; +L_0xd20940 .delay (30,30,30) L_0xd20940/d; +L_0xd20a30/d .functor OR 1, L_0xd20810, L_0xd20940, C4<0>, C4<0>; +L_0xd20a30 .delay (30,30,30) L_0xd20a30/d; +v0xcae110_0 .net "_carryin", 0 0, L_0xd20770; 1 drivers +v0xcae1d0_0 .alias "a", 0 0, v0xcaec00_0; +v0xcae250_0 .net "aandb", 0 0, L_0xd1e680; 1 drivers +v0xcae2f0_0 .net "aorb", 0 0, L_0xd206d0; 1 drivers +v0xcae370_0 .alias "b", 0 0, v0xcaec80_0; +v0xcae440_0 .alias "carryin", 0 0, v0xcaed00_0; +v0xcae510_0 .alias "carryout", 0 0, v0xcaee00_0; +v0xcae5b0_0 .net "outputIfCarryin", 0 0, L_0xd20810; 1 drivers +v0xcae6a0_0 .net "outputIf_Carryin", 0 0, L_0xd20940; 1 drivers +v0xcae740_0 .net "s", 0 0, L_0xd1e4c0; 1 drivers +v0xcae840_0 .alias "sum", 0 0, v0xcaf110_0; +S_0xcad8c0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xcacc50; + .timescale 0 0; +L_0xd20c10/d .functor XOR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd20c10 .delay (30,30,30) L_0xd20c10/d; +L_0xd20c70/d .functor XOR 1, L_0xd20c10, L_0xd22a50, C4<0>, C4<0>; +L_0xd20c70 .delay (30,30,30) L_0xd20c70/d; +L_0xd20df0/d .functor NOT 1, L_0xd20460, C4<0>, C4<0>, C4<0>; +L_0xd20df0 .delay (10,10,10) L_0xd20df0/d; +L_0xd20f60/d .functor AND 1, L_0xd20df0, L_0xd20e50, C4<1>, C4<1>; +L_0xd20f60 .delay (30,30,30) L_0xd20f60/d; +L_0xcb1fc0/d .functor NOT 1, L_0xd20c10, C4<0>, C4<0>, C4<0>; +L_0xcb1fc0 .delay (10,10,10) L_0xcb1fc0/d; +L_0xd210d0/d .functor AND 1, L_0xcb1fc0, L_0xd22a50, C4<1>, C4<1>; +L_0xd210d0 .delay (30,30,30) L_0xd210d0/d; +L_0xd21290/d .functor OR 1, L_0xd20f60, L_0xd210d0, C4<0>, C4<0>; +L_0xd21290 .delay (30,30,30) L_0xd21290/d; +v0xcad9b0_0 .alias "a", 0 0, v0xcaec00_0; +v0xcada50_0 .net "axorb", 0 0, L_0xd20c10; 1 drivers +v0xcadad0_0 .alias "b", 0 0, v0xcaec80_0; +v0xcadb80_0 .alias "borrowin", 0 0, v0xcaed00_0; +v0xcadc60_0 .alias "borrowout", 0 0, v0xcaef60_0; +v0xcadce0_0 .alias "diff", 0 0, v0xcaf580_0; +v0xcadd60_0 .net "nota", 0 0, L_0xd20df0; 1 drivers +v0xcadde0_0 .net "notaandb", 0 0, L_0xd20f60; 1 drivers +v0xcade80_0 .net "notaxorb", 0 0, L_0xcb1fc0; 1 drivers +v0xcadf20_0 .net "notaxorbandborrowin", 0 0, L_0xd210d0; 1 drivers +S_0xcad1a0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xcacc50; + .timescale 0 0; +L_0xd214c0/d .functor XOR 1, L_0xd20460, L_0xd20e50, C4<0>, C4<0>; +L_0xd214c0 .delay (30,30,30) L_0xd214c0/d; +L_0xd21560/d .functor XOR 1, L_0xd214c0, L_0xd22a50, C4<0>, C4<0>; +L_0xd21560 .delay (30,30,30) L_0xd21560/d; +L_0xd216a0/d .functor NOT 1, L_0xd20460, C4<0>, C4<0>, C4<0>; +L_0xd216a0 .delay (10,10,10) L_0xd216a0/d; +L_0xd21740/d .functor AND 1, L_0xd216a0, L_0xd20e50, C4<1>, C4<1>; +L_0xd21740 .delay (30,30,30) L_0xd21740/d; +L_0xd21830/d .functor NOT 1, L_0xd214c0, C4<0>, C4<0>, C4<0>; +L_0xd21830 .delay (10,10,10) L_0xd21830/d; +L_0xd218d0/d .functor AND 1, L_0xd21830, L_0xd22a50, C4<1>, C4<1>; +L_0xd218d0 .delay (30,30,30) L_0xd218d0/d; +L_0xd21a00/d .functor OR 1, L_0xd21740, L_0xd218d0, C4<0>, C4<0>; +L_0xd21a00 .delay (30,30,30) L_0xd21a00/d; +v0xcad290_0 .alias "a", 0 0, v0xcaec00_0; +v0xcad310_0 .net "axorb", 0 0, L_0xd214c0; 1 drivers +v0xcad3b0_0 .alias "b", 0 0, v0xcaec80_0; +v0xcad450_0 .alias "borrowin", 0 0, v0xcaed00_0; +v0xcad500_0 .alias "borrowout", 0 0, v0xcaeee0_0; +v0xcad5a0_0 .alias "diff", 0 0, v0xcaf600_0; +v0xcad640_0 .net "nota", 0 0, L_0xd216a0; 1 drivers +v0xcad6e0_0 .net "notaandb", 0 0, L_0xd21740; 1 drivers +v0xcad780_0 .net "notaxorb", 0 0, L_0xd21830; 1 drivers +v0xcad820_0 .net "notaxorbandborrowin", 0 0, L_0xd218d0; 1 drivers +S_0xcacf30 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xcacc50; + .timescale 0 0; +v0xcad020_0 .alias "address", 2 0, v0xcec110_0; +v0xcad0a0_0 .alias "inputs", 7 0, v0xcaf090_0; +v0xcad120_0 .alias "out", 0 0, v0xcaf240_0; +L_0xd225c0 .part/v L_0xd21eb0, C4, 1; +S_0xcacd40 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xcacc50; + .timescale 0 0; +v0xcaca10_0 .alias "address", 2 0, v0xcec110_0; +v0xcace30_0 .alias "inputs", 7 0, v0xcaefe0_0; +v0xcaceb0_0 .alias "out", 0 0, v0xcaed80_0; +L_0xd226b0 .part/v L_0xd1f8c0, C4, 1; +S_0xca9fe0 .scope module, "a20" "ALU1bit" 2 52, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd23fe0/d .functor XOR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd23fe0 .delay (30,30,30) L_0xd23fe0/d; +L_0xd248b0/d .functor AND 1, L_0xd22d30, L_0xd238e0, C4<1>, C4<1>; +L_0xd248b0 .delay (30,30,30) L_0xd248b0/d; +L_0xd24970/d .functor NAND 1, L_0xd22d30, L_0xd238e0, C4<1>, C4<1>; +L_0xd24970 .delay (20,20,20) L_0xd24970/d; +L_0xd24a30/d .functor NOR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd24a30 .delay (20,20,20) L_0xd24a30/d; +L_0xd24af0/d .functor OR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd24af0 .delay (30,30,30) L_0xd24af0/d; +v0xcabc70_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xcabd30_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xcabdd0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xcabe70_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xcabef0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xcabf90_0 .net "a", 0 0, L_0xd22d30; 1 drivers +v0xcac010_0 .net "b", 0 0, L_0xd238e0; 1 drivers +v0xcac090_0 .net "cin", 0 0, L_0xd23aa0; 1 drivers +v0xcac110_0 .net "cout", 0 0, L_0xd25350; 1 drivers +v0xcac190_0 .net "cout_ADD", 0 0, L_0xd23460; 1 drivers +v0xcac270_0 .net "cout_SLT", 0 0, L_0xd246e0; 1 drivers +v0xcac2f0_0 .net "cout_SUB", 0 0, L_0xd23e50; 1 drivers +v0xcac370_0 .net "muxCout", 7 0, L_0xd22240; 1 drivers +v0xcac420_0 .net "muxRes", 7 0, L_0xd24b90; 1 drivers +v0xcac550_0 .alias "op", 2 0, v0xcec110_0; +v0xcac5d0_0 .net "out", 0 0, L_0xd25260; 1 drivers +v0xcac4a0_0 .net "res_ADD", 0 0, L_0xd205b0; 1 drivers +v0xcac740_0 .net "res_AND", 0 0, L_0xd248b0; 1 drivers +v0xcac650_0 .net "res_NAND", 0 0, L_0xd24970; 1 drivers +v0xcac860_0 .net "res_NOR", 0 0, L_0xd24a30; 1 drivers +v0xcac7c0_0 .net "res_OR", 0 0, L_0xd24af0; 1 drivers +v0xcac990_0 .net "res_SLT", 0 0, L_0xd24180; 1 drivers +v0xcac910_0 .net "res_SUB", 0 0, L_0xd236e0; 1 drivers +v0xcacb00_0 .net "res_XOR", 0 0, L_0xd23fe0; 1 drivers +LS_0xd24b90_0_0 .concat [ 1 1 1 1], L_0xd205b0, L_0xd236e0, L_0xd23fe0, L_0xd24180; +LS_0xd24b90_0_4 .concat [ 1 1 1 1], L_0xd248b0, L_0xd24970, L_0xd24a30, L_0xd24af0; +L_0xd24b90 .concat [ 4 4 0 0], LS_0xd24b90_0_0, LS_0xd24b90_0_4; +LS_0xd22240_0_0 .concat [ 1 1 1 1], L_0xd23460, L_0xd23e50, C4<0>, L_0xd246e0; +LS_0xd22240_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd22240 .concat [ 4 4 0 0], LS_0xd22240_0_0, LS_0xd22240_0_4; +S_0xcab3b0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xca9fe0; + .timescale 0 0; +L_0xd20ef0/d .functor XOR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd20ef0 .delay (30,30,30) L_0xd20ef0/d; +L_0xd205b0/d .functor XOR 1, L_0xd20ef0, L_0xd23aa0, C4<0>, C4<0>; +L_0xd205b0 .delay (30,30,30) L_0xd205b0/d; +L_0xd21050/d .functor AND 1, L_0xd22d30, L_0xd238e0, C4<1>, C4<1>; +L_0xd21050 .delay (30,30,30) L_0xd21050/d; +L_0xd23100/d .functor OR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd23100 .delay (30,30,30) L_0xd23100/d; +L_0xd231a0/d .functor NOT 1, L_0xd23aa0, C4<0>, C4<0>, C4<0>; +L_0xd231a0 .delay (10,10,10) L_0xd231a0/d; +L_0xd23240/d .functor AND 1, L_0xd21050, L_0xd231a0, C4<1>, C4<1>; +L_0xd23240 .delay (30,30,30) L_0xd23240/d; +L_0xd23370/d .functor AND 1, L_0xd23100, L_0xd23aa0, C4<1>, C4<1>; +L_0xd23370 .delay (30,30,30) L_0xd23370/d; +L_0xd23460/d .functor OR 1, L_0xd23240, L_0xd23370, C4<0>, C4<0>; +L_0xd23460 .delay (30,30,30) L_0xd23460/d; +v0xcab4a0_0 .net "_carryin", 0 0, L_0xd231a0; 1 drivers +v0xcab560_0 .alias "a", 0 0, v0xcabf90_0; +v0xcab5e0_0 .net "aandb", 0 0, L_0xd21050; 1 drivers +v0xcab680_0 .net "aorb", 0 0, L_0xd23100; 1 drivers +v0xcab700_0 .alias "b", 0 0, v0xcac010_0; +v0xcab7d0_0 .alias "carryin", 0 0, v0xcac090_0; +v0xcab8a0_0 .alias "carryout", 0 0, v0xcac190_0; +v0xcab940_0 .net "outputIfCarryin", 0 0, L_0xd23240; 1 drivers +v0xcaba30_0 .net "outputIf_Carryin", 0 0, L_0xd23370; 1 drivers +v0xcabad0_0 .net "s", 0 0, L_0xd20ef0; 1 drivers +v0xcabbd0_0 .alias "sum", 0 0, v0xcac4a0_0; +S_0xcaac50 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xca9fe0; + .timescale 0 0; +L_0xd23640/d .functor XOR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd23640 .delay (30,30,30) L_0xd23640/d; +L_0xd236e0/d .functor XOR 1, L_0xd23640, L_0xd23aa0, C4<0>, C4<0>; +L_0xd236e0 .delay (30,30,30) L_0xd236e0/d; +L_0xd23880/d .functor NOT 1, L_0xd22d30, C4<0>, C4<0>, C4<0>; +L_0xd23880 .delay (10,10,10) L_0xd23880/d; +L_0xd239f0/d .functor AND 1, L_0xd23880, L_0xd238e0, C4<1>, C4<1>; +L_0xd239f0 .delay (30,30,30) L_0xd239f0/d; +L_0xd23bb0/d .functor NOT 1, L_0xd23640, C4<0>, C4<0>, C4<0>; +L_0xd23bb0 .delay (10,10,10) L_0xd23bb0/d; +L_0xd23c50/d .functor AND 1, L_0xd23bb0, L_0xd23aa0, C4<1>, C4<1>; +L_0xd23c50 .delay (30,30,30) L_0xd23c50/d; +L_0xd23e50/d .functor OR 1, L_0xd239f0, L_0xd23c50, C4<0>, C4<0>; +L_0xd23e50 .delay (30,30,30) L_0xd23e50/d; +v0xcaad40_0 .alias "a", 0 0, v0xcabf90_0; +v0xcaade0_0 .net "axorb", 0 0, L_0xd23640; 1 drivers +v0xcaae60_0 .alias "b", 0 0, v0xcac010_0; +v0xcaaf10_0 .alias "borrowin", 0 0, v0xcac090_0; +v0xcaaff0_0 .alias "borrowout", 0 0, v0xcac2f0_0; +v0xcab070_0 .alias "diff", 0 0, v0xcac910_0; +v0xcab0f0_0 .net "nota", 0 0, L_0xd23880; 1 drivers +v0xcab170_0 .net "notaandb", 0 0, L_0xd239f0; 1 drivers +v0xcab210_0 .net "notaxorb", 0 0, L_0xd23bb0; 1 drivers +v0xcab2b0_0 .net "notaxorbandborrowin", 0 0, L_0xd23c50; 1 drivers +S_0xcaa530 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xca9fe0; + .timescale 0 0; +L_0xd240a0/d .functor XOR 1, L_0xd22d30, L_0xd238e0, C4<0>, C4<0>; +L_0xd240a0 .delay (30,30,30) L_0xd240a0/d; +L_0xd24180/d .functor XOR 1, L_0xd240a0, L_0xd23aa0, C4<0>, C4<0>; +L_0xd24180 .delay (30,30,30) L_0xd24180/d; +L_0xd24320/d .functor NOT 1, L_0xd22d30, C4<0>, C4<0>, C4<0>; +L_0xd24320 .delay (10,10,10) L_0xd24320/d; +L_0xd243e0/d .functor AND 1, L_0xd24320, L_0xd238e0, C4<1>, C4<1>; +L_0xd243e0 .delay (30,30,30) L_0xd243e0/d; +L_0xd244f0/d .functor NOT 1, L_0xd240a0, C4<0>, C4<0>, C4<0>; +L_0xd244f0 .delay (10,10,10) L_0xd244f0/d; +L_0xd24590/d .functor AND 1, L_0xd244f0, L_0xd23aa0, C4<1>, C4<1>; +L_0xd24590 .delay (30,30,30) L_0xd24590/d; +L_0xd246e0/d .functor OR 1, L_0xd243e0, L_0xd24590, C4<0>, C4<0>; +L_0xd246e0 .delay (30,30,30) L_0xd246e0/d; +v0xcaa620_0 .alias "a", 0 0, v0xcabf90_0; +v0xcaa6a0_0 .net "axorb", 0 0, L_0xd240a0; 1 drivers +v0xcaa740_0 .alias "b", 0 0, v0xcac010_0; +v0xcaa7e0_0 .alias "borrowin", 0 0, v0xcac090_0; +v0xcaa890_0 .alias "borrowout", 0 0, v0xcac270_0; +v0xcaa930_0 .alias "diff", 0 0, v0xcac990_0; +v0xcaa9d0_0 .net "nota", 0 0, L_0xd24320; 1 drivers +v0xcaaa70_0 .net "notaandb", 0 0, L_0xd243e0; 1 drivers +v0xcaab10_0 .net "notaxorb", 0 0, L_0xd244f0; 1 drivers +v0xcaabb0_0 .net "notaxorbandborrowin", 0 0, L_0xd24590; 1 drivers +S_0xcaa2c0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xca9fe0; + .timescale 0 0; +v0xcaa3b0_0 .alias "address", 2 0, v0xcec110_0; +v0xcaa430_0 .alias "inputs", 7 0, v0xcac420_0; +v0xcaa4b0_0 .alias "out", 0 0, v0xcac5d0_0; +L_0xd25260 .part/v L_0xd24b90, C4, 1; +S_0xcaa0d0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xca9fe0; + .timescale 0 0; +v0xca9da0_0 .alias "address", 2 0, v0xcec110_0; +v0xcaa1c0_0 .alias "inputs", 7 0, v0xcac370_0; +v0xcaa240_0 .alias "out", 0 0, v0xcac110_0; +L_0xd25350 .part/v L_0xd22240, C4, 1; +S_0xca72f0 .scope module, "a21" "ALU1bit" 2 53, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd26be0/d .functor XOR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd26be0 .delay (30,30,30) L_0xd26be0/d; +L_0xd274f0/d .functor AND 1, L_0xd25b40, L_0xd26520, C4<1>, C4<1>; +L_0xd274f0 .delay (30,30,30) L_0xd274f0/d; +L_0xd275b0/d .functor NAND 1, L_0xd25b40, L_0xd26520, C4<1>, C4<1>; +L_0xd275b0 .delay (20,20,20) L_0xd275b0/d; +L_0xd27670/d .functor NOR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd27670 .delay (20,20,20) L_0xd27670/d; +L_0xd27730/d .functor OR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd27730 .delay (30,30,30) L_0xd27730/d; +v0xca8f90_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xca9050_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xca90f0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xca9190_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xca9210_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xca92b0_0 .net "a", 0 0, L_0xd25b40; 1 drivers +v0xca9330_0 .net "b", 0 0, L_0xd26520; 1 drivers +v0xca93b0_0 .net "cin", 0 0, L_0xd266e0; 1 drivers +v0xca9430_0 .net "cout", 0 0, L_0xd27f80; 1 drivers +v0xca94b0_0 .net "cout_ADD", 0 0, L_0xd260e0; 1 drivers +v0xca9590_0 .net "cout_SLT", 0 0, L_0xd27320; 1 drivers +v0xca9610_0 .net "cout_SUB", 0 0, L_0xd26a30; 1 drivers +v0xca9700_0 .net "muxCout", 7 0, L_0xd24f60; 1 drivers +v0xca97b0_0 .net "muxRes", 7 0, L_0xd277d0; 1 drivers +v0xca98e0_0 .alias "op", 2 0, v0xcec110_0; +v0xca9960_0 .net "out", 0 0, L_0xd27e90; 1 drivers +v0xca9830_0 .net "res_ADD", 0 0, L_0xd25700; 1 drivers +v0xca9ad0_0 .net "res_AND", 0 0, L_0xd274f0; 1 drivers +v0xca99e0_0 .net "res_NAND", 0 0, L_0xd275b0; 1 drivers +v0xca9bf0_0 .net "res_NOR", 0 0, L_0xd27670; 1 drivers +v0xca9b50_0 .net "res_OR", 0 0, L_0xd27730; 1 drivers +v0xca9d20_0 .net "res_SLT", 0 0, L_0xd26da0; 1 drivers +v0xca9ca0_0 .net "res_SUB", 0 0, L_0xd26320; 1 drivers +v0xca9e90_0 .net "res_XOR", 0 0, L_0xd26be0; 1 drivers +LS_0xd277d0_0_0 .concat [ 1 1 1 1], L_0xd25700, L_0xd26320, L_0xd26be0, L_0xd26da0; +LS_0xd277d0_0_4 .concat [ 1 1 1 1], L_0xd274f0, L_0xd275b0, L_0xd27670, L_0xd27730; +L_0xd277d0 .concat [ 4 4 0 0], LS_0xd277d0_0_0, LS_0xd277d0_0_4; +LS_0xd24f60_0_0 .concat [ 1 1 1 1], L_0xd260e0, L_0xd26a30, C4<0>, L_0xd27320; +LS_0xd24f60_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd24f60 .concat [ 4 4 0 0], LS_0xd24f60_0_0, LS_0xd24f60_0_4; +S_0xca86d0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xca72f0; + .timescale 0 0; +L_0xd23980/d .functor XOR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd23980 .delay (30,30,30) L_0xd23980/d; +L_0xd25700/d .functor XOR 1, L_0xd23980, L_0xd266e0, C4<0>, C4<0>; +L_0xd25700 .delay (30,30,30) L_0xd25700/d; +L_0xd23b40/d .functor AND 1, L_0xd25b40, L_0xd26520, C4<1>, C4<1>; +L_0xd23b40 .delay (30,30,30) L_0xd23b40/d; +L_0xd25dc0/d .functor OR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd25dc0 .delay (30,30,30) L_0xd25dc0/d; +L_0xd25e20/d .functor NOT 1, L_0xd266e0, C4<0>, C4<0>, C4<0>; +L_0xd25e20 .delay (10,10,10) L_0xd25e20/d; +L_0xd25ec0/d .functor AND 1, L_0xd23b40, L_0xd25e20, C4<1>, C4<1>; +L_0xd25ec0 .delay (30,30,30) L_0xd25ec0/d; +L_0xd25ff0/d .functor AND 1, L_0xd25dc0, L_0xd266e0, C4<1>, C4<1>; +L_0xd25ff0 .delay (30,30,30) L_0xd25ff0/d; +L_0xd260e0/d .functor OR 1, L_0xd25ec0, L_0xd25ff0, C4<0>, C4<0>; +L_0xd260e0 .delay (30,30,30) L_0xd260e0/d; +v0xca87c0_0 .net "_carryin", 0 0, L_0xd25e20; 1 drivers +v0xca8880_0 .alias "a", 0 0, v0xca92b0_0; +v0xca8900_0 .net "aandb", 0 0, L_0xd23b40; 1 drivers +v0xca89a0_0 .net "aorb", 0 0, L_0xd25dc0; 1 drivers +v0xca8a20_0 .alias "b", 0 0, v0xca9330_0; +v0xca8af0_0 .alias "carryin", 0 0, v0xca93b0_0; +v0xca8bc0_0 .alias "carryout", 0 0, v0xca94b0_0; +v0xca8c60_0 .net "outputIfCarryin", 0 0, L_0xd25ec0; 1 drivers +v0xca8d50_0 .net "outputIf_Carryin", 0 0, L_0xd25ff0; 1 drivers +v0xca8df0_0 .net "s", 0 0, L_0xd23980; 1 drivers +v0xca8ef0_0 .alias "sum", 0 0, v0xca9830_0; +S_0xca7f40 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xca72f0; + .timescale 0 0; +L_0xd262c0/d .functor XOR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd262c0 .delay (30,30,30) L_0xd262c0/d; +L_0xd26320/d .functor XOR 1, L_0xd262c0, L_0xd266e0, C4<0>, C4<0>; +L_0xd26320 .delay (30,30,30) L_0xd26320/d; +L_0xd264c0/d .functor NOT 1, L_0xd25b40, C4<0>, C4<0>, C4<0>; +L_0xd264c0 .delay (10,10,10) L_0xd264c0/d; +L_0xd26630/d .functor AND 1, L_0xd264c0, L_0xd26520, C4<1>, C4<1>; +L_0xd26630 .delay (30,30,30) L_0xd26630/d; +L_0xd25640/d .functor NOT 1, L_0xd262c0, C4<0>, C4<0>, C4<0>; +L_0xd25640 .delay (10,10,10) L_0xd25640/d; +L_0xd26830/d .functor AND 1, L_0xd25640, L_0xd266e0, C4<1>, C4<1>; +L_0xd26830 .delay (30,30,30) L_0xd26830/d; +L_0xd26a30/d .functor OR 1, L_0xd26630, L_0xd26830, C4<0>, C4<0>; +L_0xd26a30 .delay (30,30,30) L_0xd26a30/d; +v0xca8030_0 .alias "a", 0 0, v0xca92b0_0; +v0xca8100_0 .net "axorb", 0 0, L_0xd262c0; 1 drivers +v0xca8180_0 .alias "b", 0 0, v0xca9330_0; +v0xca8230_0 .alias "borrowin", 0 0, v0xca93b0_0; +v0xca8310_0 .alias "borrowout", 0 0, v0xca9610_0; +v0xca8390_0 .alias "diff", 0 0, v0xca9ca0_0; +v0xca8410_0 .net "nota", 0 0, L_0xd264c0; 1 drivers +v0xca8490_0 .net "notaandb", 0 0, L_0xd26630; 1 drivers +v0xca8530_0 .net "notaxorb", 0 0, L_0xd25640; 1 drivers +v0xca85d0_0 .net "notaxorbandborrowin", 0 0, L_0xd26830; 1 drivers +S_0xca7840 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xca72f0; + .timescale 0 0; +L_0xd26cc0/d .functor XOR 1, L_0xd25b40, L_0xd26520, C4<0>, C4<0>; +L_0xd26cc0 .delay (30,30,30) L_0xd26cc0/d; +L_0xd26da0/d .functor XOR 1, L_0xd26cc0, L_0xd266e0, C4<0>, C4<0>; +L_0xd26da0 .delay (30,30,30) L_0xd26da0/d; +L_0xd26f40/d .functor NOT 1, L_0xd25b40, C4<0>, C4<0>, C4<0>; +L_0xd26f40 .delay (10,10,10) L_0xd26f40/d; +L_0xd27020/d .functor AND 1, L_0xd26f40, L_0xd26520, C4<1>, C4<1>; +L_0xd27020 .delay (30,30,30) L_0xd27020/d; +L_0xd27130/d .functor NOT 1, L_0xd26cc0, C4<0>, C4<0>, C4<0>; +L_0xd27130 .delay (10,10,10) L_0xd27130/d; +L_0xd271d0/d .functor AND 1, L_0xd27130, L_0xd266e0, C4<1>, C4<1>; +L_0xd271d0 .delay (30,30,30) L_0xd271d0/d; +L_0xd27320/d .functor OR 1, L_0xd27020, L_0xd271d0, C4<0>, C4<0>; +L_0xd27320 .delay (30,30,30) L_0xd27320/d; +v0xca7930_0 .alias "a", 0 0, v0xca92b0_0; +v0xca79b0_0 .net "axorb", 0 0, L_0xd26cc0; 1 drivers +v0xca7a30_0 .alias "b", 0 0, v0xca9330_0; +v0xca7ab0_0 .alias "borrowin", 0 0, v0xca93b0_0; +v0xca7b30_0 .alias "borrowout", 0 0, v0xca9590_0; +v0xca7bb0_0 .alias "diff", 0 0, v0xca9d20_0; +v0xca7c30_0 .net "nota", 0 0, L_0xd26f40; 1 drivers +v0xca7cb0_0 .net "notaandb", 0 0, L_0xd27020; 1 drivers +v0xca7da0_0 .net "notaxorb", 0 0, L_0xd27130; 1 drivers +v0xca7e40_0 .net "notaxorbandborrowin", 0 0, L_0xd271d0; 1 drivers +S_0xca75d0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xca72f0; + .timescale 0 0; +v0xca76c0_0 .alias "address", 2 0, v0xcec110_0; +v0xca7740_0 .alias "inputs", 7 0, v0xca97b0_0; +v0xca77c0_0 .alias "out", 0 0, v0xca9960_0; +L_0xd27e90 .part/v L_0xd277d0, C4, 1; +S_0xca73e0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xca72f0; + .timescale 0 0; +v0xc89300_0 .alias "address", 2 0, v0xcec110_0; +v0xca74d0_0 .alias "inputs", 7 0, v0xca9700_0; +v0xca7550_0 .alias "out", 0 0, v0xca9430_0; +L_0xd27f80 .part/v L_0xd24f60, C4, 1; +S_0xca42a0 .scope module, "a22" "ALU1bit" 2 54, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd297a0/d .functor XOR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd297a0 .delay (30,30,30) L_0xd297a0/d; +L_0xd2a050/d .functor AND 1, L_0xd28650, L_0xd28900, C4<1>, C4<1>; +L_0xd2a050 .delay (30,30,30) L_0xd2a050/d; +L_0xd2a110/d .functor NAND 1, L_0xd28650, L_0xd28900, C4<1>, C4<1>; +L_0xd2a110 .delay (20,20,20) L_0xd2a110/d; +L_0xd2a1d0/d .functor NOR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd2a1d0 .delay (20,20,20) L_0xd2a1d0/d; +L_0xd2a290/d .functor OR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd2a290 .delay (30,30,30) L_0xd2a290/d; +v0xca5f30_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xca5ff0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xca6090_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xca6130_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xca61b0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xca6250_0 .net "a", 0 0, L_0xd28650; 1 drivers +v0xca62d0_0 .net "b", 0 0, L_0xd28900; 1 drivers +v0xca6350_0 .net "cin", 0 0, L_0xd29100; 1 drivers +v0xca63d0_0 .net "cout", 0 0, L_0xd2aaf0; 1 drivers +v0xca6450_0 .net "cout_ADD", 0 0, L_0xd28d20; 1 drivers +v0xca6530_0 .net "cout_SLT", 0 0, L_0xd29e80; 1 drivers +v0xca65b0_0 .net "cout_SUB", 0 0, L_0xd29610; 1 drivers +v0xca6630_0 .net "muxCout", 7 0, L_0xd27b60; 1 drivers +v0xca66e0_0 .net "muxRes", 7 0, L_0xd2a330; 1 drivers +v0xca6810_0 .alias "op", 2 0, v0xcec110_0; +v0xc88ff0_0 .net "out", 0 0, L_0xd2aa00; 1 drivers +v0xca6760_0 .net "res_ADD", 0 0, L_0xd25be0; 1 drivers +v0xc89160_0 .net "res_AND", 0 0, L_0xd2a050; 1 drivers +v0xc89070_0 .net "res_NAND", 0 0, L_0xd2a110; 1 drivers +v0xc89280_0 .net "res_NOR", 0 0, L_0xd2a1d0; 1 drivers +v0xc891e0_0 .net "res_OR", 0 0, L_0xd2a290; 1 drivers +v0xca70a0_0 .net "res_SLT", 0 0, L_0xd29960; 1 drivers +v0xca7120_0 .net "res_SUB", 0 0, L_0xd28f60; 1 drivers +v0xca71a0_0 .net "res_XOR", 0 0, L_0xd297a0; 1 drivers +LS_0xd2a330_0_0 .concat [ 1 1 1 1], L_0xd25be0, L_0xd28f60, L_0xd297a0, L_0xd29960; +LS_0xd2a330_0_4 .concat [ 1 1 1 1], L_0xd2a050, L_0xd2a110, L_0xd2a1d0, L_0xd2a290; +L_0xd2a330 .concat [ 4 4 0 0], LS_0xd2a330_0_0, LS_0xd2a330_0_4; +LS_0xd27b60_0_0 .concat [ 1 1 1 1], L_0xd28d20, L_0xd29610, C4<0>, L_0xd29e80; +LS_0xd27b60_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd27b60 .concat [ 4 4 0 0], LS_0xd27b60_0_0, LS_0xd27b60_0_4; +S_0xca5670 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xca42a0; + .timescale 0 0; +L_0xd265c0/d .functor XOR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd265c0 .delay (30,30,30) L_0xd265c0/d; +L_0xd25be0/d .functor XOR 1, L_0xd265c0, L_0xd29100, C4<0>, C4<0>; +L_0xd25be0 .delay (30,30,30) L_0xd25be0/d; +L_0xd289a0/d .functor AND 1, L_0xd28650, L_0xd28900, C4<1>, C4<1>; +L_0xd289a0 .delay (30,30,30) L_0xd289a0/d; +L_0xd28a00/d .functor OR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd28a00 .delay (30,30,30) L_0xd28a00/d; +L_0xd28aa0/d .functor NOT 1, L_0xd29100, C4<0>, C4<0>, C4<0>; +L_0xd28aa0 .delay (10,10,10) L_0xd28aa0/d; +L_0xd28b40/d .functor AND 1, L_0xd289a0, L_0xd28aa0, C4<1>, C4<1>; +L_0xd28b40 .delay (30,30,30) L_0xd28b40/d; +L_0xd28c30/d .functor AND 1, L_0xd28a00, L_0xd29100, C4<1>, C4<1>; +L_0xd28c30 .delay (30,30,30) L_0xd28c30/d; +L_0xd28d20/d .functor OR 1, L_0xd28b40, L_0xd28c30, C4<0>, C4<0>; +L_0xd28d20 .delay (30,30,30) L_0xd28d20/d; +v0xca5760_0 .net "_carryin", 0 0, L_0xd28aa0; 1 drivers +v0xca5820_0 .alias "a", 0 0, v0xca6250_0; +v0xca58a0_0 .net "aandb", 0 0, L_0xd289a0; 1 drivers +v0xca5940_0 .net "aorb", 0 0, L_0xd28a00; 1 drivers +v0xca59c0_0 .alias "b", 0 0, v0xca62d0_0; +v0xca5a90_0 .alias "carryin", 0 0, v0xca6350_0; +v0xca5b60_0 .alias "carryout", 0 0, v0xca6450_0; +v0xca5c00_0 .net "outputIfCarryin", 0 0, L_0xd28b40; 1 drivers +v0xca5cf0_0 .net "outputIf_Carryin", 0 0, L_0xd28c30; 1 drivers +v0xca5d90_0 .net "s", 0 0, L_0xd265c0; 1 drivers +v0xca5e90_0 .alias "sum", 0 0, v0xca6760_0; +S_0xca4f10 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xca42a0; + .timescale 0 0; +L_0xd28f00/d .functor XOR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd28f00 .delay (30,30,30) L_0xd28f00/d; +L_0xd28f60/d .functor XOR 1, L_0xd28f00, L_0xd29100, C4<0>, C4<0>; +L_0xd28f60 .delay (30,30,30) L_0xd28f60/d; +L_0xd290a0/d .functor NOT 1, L_0xd28650, C4<0>, C4<0>, C4<0>; +L_0xd290a0 .delay (10,10,10) L_0xd290a0/d; +L_0xd29210/d .functor AND 1, L_0xd290a0, L_0xd28900, C4<1>, C4<1>; +L_0xd29210 .delay (30,30,30) L_0xd29210/d; +L_0xd283e0/d .functor NOT 1, L_0xd28f00, C4<0>, C4<0>, C4<0>; +L_0xd283e0 .delay (10,10,10) L_0xd283e0/d; +L_0xd29410/d .functor AND 1, L_0xd283e0, L_0xd29100, C4<1>, C4<1>; +L_0xd29410 .delay (30,30,30) L_0xd29410/d; +L_0xd29610/d .functor OR 1, L_0xd29210, L_0xd29410, C4<0>, C4<0>; +L_0xd29610 .delay (30,30,30) L_0xd29610/d; +v0xca5000_0 .alias "a", 0 0, v0xca6250_0; +v0xca50a0_0 .net "axorb", 0 0, L_0xd28f00; 1 drivers +v0xca5120_0 .alias "b", 0 0, v0xca62d0_0; +v0xca51d0_0 .alias "borrowin", 0 0, v0xca6350_0; +v0xca52b0_0 .alias "borrowout", 0 0, v0xca65b0_0; +v0xca5330_0 .alias "diff", 0 0, v0xca7120_0; +v0xca53b0_0 .net "nota", 0 0, L_0xd290a0; 1 drivers +v0xca5430_0 .net "notaandb", 0 0, L_0xd29210; 1 drivers +v0xca54d0_0 .net "notaxorb", 0 0, L_0xd283e0; 1 drivers +v0xca5570_0 .net "notaxorbandborrowin", 0 0, L_0xd29410; 1 drivers +S_0xca47f0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xca42a0; + .timescale 0 0; +L_0xd29880/d .functor XOR 1, L_0xd28650, L_0xd28900, C4<0>, C4<0>; +L_0xd29880 .delay (30,30,30) L_0xd29880/d; +L_0xd29960/d .functor XOR 1, L_0xd29880, L_0xd29100, C4<0>, C4<0>; +L_0xd29960 .delay (30,30,30) L_0xd29960/d; +L_0xd29ac0/d .functor NOT 1, L_0xd28650, C4<0>, C4<0>, C4<0>; +L_0xd29ac0 .delay (10,10,10) L_0xd29ac0/d; +L_0xd29b80/d .functor AND 1, L_0xd29ac0, L_0xd28900, C4<1>, C4<1>; +L_0xd29b80 .delay (30,30,30) L_0xd29b80/d; +L_0xd29c90/d .functor NOT 1, L_0xd29880, C4<0>, C4<0>, C4<0>; +L_0xd29c90 .delay (10,10,10) L_0xd29c90/d; +L_0xd29d30/d .functor AND 1, L_0xd29c90, L_0xd29100, C4<1>, C4<1>; +L_0xd29d30 .delay (30,30,30) L_0xd29d30/d; +L_0xd29e80/d .functor OR 1, L_0xd29b80, L_0xd29d30, C4<0>, C4<0>; +L_0xd29e80 .delay (30,30,30) L_0xd29e80/d; +v0xca48e0_0 .alias "a", 0 0, v0xca6250_0; +v0xca4960_0 .net "axorb", 0 0, L_0xd29880; 1 drivers +v0xca4a00_0 .alias "b", 0 0, v0xca62d0_0; +v0xca4aa0_0 .alias "borrowin", 0 0, v0xca6350_0; +v0xca4b50_0 .alias "borrowout", 0 0, v0xca6530_0; +v0xca4bf0_0 .alias "diff", 0 0, v0xca70a0_0; +v0xca4c90_0 .net "nota", 0 0, L_0xd29ac0; 1 drivers +v0xca4d30_0 .net "notaandb", 0 0, L_0xd29b80; 1 drivers +v0xca4dd0_0 .net "notaxorb", 0 0, L_0xd29c90; 1 drivers +v0xca4e70_0 .net "notaxorbandborrowin", 0 0, L_0xd29d30; 1 drivers +S_0xca4580 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xca42a0; + .timescale 0 0; +v0xca4670_0 .alias "address", 2 0, v0xcec110_0; +v0xca46f0_0 .alias "inputs", 7 0, v0xca66e0_0; +v0xca4770_0 .alias "out", 0 0, v0xc88ff0_0; +L_0xd2aa00 .part/v L_0xd2a330, C4, 1; +S_0xca4390 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xca42a0; + .timescale 0 0; +v0xca4060_0 .alias "address", 2 0, v0xcec110_0; +v0xca4480_0 .alias "inputs", 7 0, v0xca6630_0; +v0xca4500_0 .alias "out", 0 0, v0xca63d0_0; +L_0xd2aaf0 .part/v L_0xd27b60, C4, 1; +S_0xca1630 .scope module, "a23" "ALU1bit" 2 55, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd2c380/d .functor XOR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd2c380 .delay (30,30,30) L_0xd2c380/d; +L_0xd2cc50/d .functor AND 1, L_0xd2b330, L_0xd2bc80, C4<1>, C4<1>; +L_0xd2cc50 .delay (30,30,30) L_0xd2cc50/d; +L_0xd2cd10/d .functor NAND 1, L_0xd2b330, L_0xd2bc80, C4<1>, C4<1>; +L_0xd2cd10 .delay (20,20,20) L_0xd2cd10/d; +L_0xd2cdd0/d .functor NOR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd2cdd0 .delay (20,20,20) L_0xd2cdd0/d; +L_0xd2ce90/d .functor OR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd2ce90 .delay (30,30,30) L_0xd2ce90/d; +v0xca32c0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xca3380_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xca3420_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xca34c0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xca3540_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xca35e0_0 .net "a", 0 0, L_0xd2b330; 1 drivers +v0xca3660_0 .net "b", 0 0, L_0xd2bc80; 1 drivers +v0xca36e0_0 .net "cin", 0 0, L_0xd2be40; 1 drivers +v0xca3760_0 .net "cout", 0 0, L_0xd2d730; 1 drivers +v0xca37e0_0 .net "cout_ADD", 0 0, L_0xd2b880; 1 drivers +v0xca38c0_0 .net "cout_SLT", 0 0, L_0xd2ca80; 1 drivers +v0xca3940_0 .net "cout_SUB", 0 0, L_0xd2c1f0; 1 drivers +v0xca39c0_0 .net "muxCout", 7 0, L_0xd2a740; 1 drivers +v0xca3a70_0 .net "muxRes", 7 0, L_0xd2cf30; 1 drivers +v0xca3ba0_0 .alias "op", 2 0, v0xcec110_0; +v0xca3c20_0 .net "out", 0 0, L_0xd2d640; 1 drivers +v0xca3af0_0 .net "res_ADD", 0 0, L_0xd2ae10; 1 drivers +v0xca3d90_0 .net "res_AND", 0 0, L_0xd2cc50; 1 drivers +v0xca3ca0_0 .net "res_NAND", 0 0, L_0xd2cd10; 1 drivers +v0xca3eb0_0 .net "res_NOR", 0 0, L_0xd2cdd0; 1 drivers +v0xca3e10_0 .net "res_OR", 0 0, L_0xd2ce90; 1 drivers +v0xca3fe0_0 .net "res_SLT", 0 0, L_0xd2c520; 1 drivers +v0xca3f60_0 .net "res_SUB", 0 0, L_0xd2bac0; 1 drivers +v0xca4150_0 .net "res_XOR", 0 0, L_0xd2c380; 1 drivers +LS_0xd2cf30_0_0 .concat [ 1 1 1 1], L_0xd2ae10, L_0xd2bac0, L_0xd2c380, L_0xd2c520; +LS_0xd2cf30_0_4 .concat [ 1 1 1 1], L_0xd2cc50, L_0xd2cd10, L_0xd2cdd0, L_0xd2ce90; +L_0xd2cf30 .concat [ 4 4 0 0], LS_0xd2cf30_0_0, LS_0xd2cf30_0_4; +LS_0xd2a740_0_0 .concat [ 1 1 1 1], L_0xd2b880, L_0xd2c1f0, C4<0>, L_0xd2ca80; +LS_0xd2a740_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd2a740 .concat [ 4 4 0 0], LS_0xd2a740_0_0, LS_0xd2a740_0_4; +S_0xca2a00 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xca1630; + .timescale 0 0; +L_0xd291a0/d .functor XOR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd291a0 .delay (30,30,30) L_0xd291a0/d; +L_0xd2ae10/d .functor XOR 1, L_0xd291a0, L_0xd2be40, C4<0>, C4<0>; +L_0xd2ae10 .delay (30,30,30) L_0xd2ae10/d; +L_0xd2afa0/d .functor AND 1, L_0xd2b330, L_0xd2bc80, C4<1>, C4<1>; +L_0xd2afa0 .delay (30,30,30) L_0xd2afa0/d; +L_0xd29350/d .functor OR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd29350 .delay (30,30,30) L_0xd29350/d; +L_0xd2b600/d .functor NOT 1, L_0xd2be40, C4<0>, C4<0>, C4<0>; +L_0xd2b600 .delay (10,10,10) L_0xd2b600/d; +L_0xd2b6a0/d .functor AND 1, L_0xd2afa0, L_0xd2b600, C4<1>, C4<1>; +L_0xd2b6a0 .delay (30,30,30) L_0xd2b6a0/d; +L_0xd2b790/d .functor AND 1, L_0xd29350, L_0xd2be40, C4<1>, C4<1>; +L_0xd2b790 .delay (30,30,30) L_0xd2b790/d; +L_0xd2b880/d .functor OR 1, L_0xd2b6a0, L_0xd2b790, C4<0>, C4<0>; +L_0xd2b880 .delay (30,30,30) L_0xd2b880/d; +v0xca2af0_0 .net "_carryin", 0 0, L_0xd2b600; 1 drivers +v0xca2bb0_0 .alias "a", 0 0, v0xca35e0_0; +v0xca2c30_0 .net "aandb", 0 0, L_0xd2afa0; 1 drivers +v0xca2cd0_0 .net "aorb", 0 0, L_0xd29350; 1 drivers +v0xca2d50_0 .alias "b", 0 0, v0xca3660_0; +v0xca2e20_0 .alias "carryin", 0 0, v0xca36e0_0; +v0xca2ef0_0 .alias "carryout", 0 0, v0xca37e0_0; +v0xca2f90_0 .net "outputIfCarryin", 0 0, L_0xd2b6a0; 1 drivers +v0xca3080_0 .net "outputIf_Carryin", 0 0, L_0xd2b790; 1 drivers +v0xca3120_0 .net "s", 0 0, L_0xd291a0; 1 drivers +v0xca3220_0 .alias "sum", 0 0, v0xca3af0_0; +S_0xca22a0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xca1630; + .timescale 0 0; +L_0xd2ba60/d .functor XOR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd2ba60 .delay (30,30,30) L_0xd2ba60/d; +L_0xd2bac0/d .functor XOR 1, L_0xd2ba60, L_0xd2be40, C4<0>, C4<0>; +L_0xd2bac0 .delay (30,30,30) L_0xd2bac0/d; +L_0xd2bc00/d .functor NOT 1, L_0xd2b330, C4<0>, C4<0>, C4<0>; +L_0xd2bc00 .delay (10,10,10) L_0xd2bc00/d; +L_0xd2bd90/d .functor AND 1, L_0xd2bc00, L_0xd2bc80, C4<1>, C4<1>; +L_0xd2bd90 .delay (30,30,30) L_0xd2bd90/d; +L_0xd2bf50/d .functor NOT 1, L_0xd2ba60, C4<0>, C4<0>, C4<0>; +L_0xd2bf50 .delay (10,10,10) L_0xd2bf50/d; +L_0xd2bff0/d .functor AND 1, L_0xd2bf50, L_0xd2be40, C4<1>, C4<1>; +L_0xd2bff0 .delay (30,30,30) L_0xd2bff0/d; +L_0xd2c1f0/d .functor OR 1, L_0xd2bd90, L_0xd2bff0, C4<0>, C4<0>; +L_0xd2c1f0 .delay (30,30,30) L_0xd2c1f0/d; +v0xca2390_0 .alias "a", 0 0, v0xca35e0_0; +v0xca2430_0 .net "axorb", 0 0, L_0xd2ba60; 1 drivers +v0xca24b0_0 .alias "b", 0 0, v0xca3660_0; +v0xca2560_0 .alias "borrowin", 0 0, v0xca36e0_0; +v0xca2640_0 .alias "borrowout", 0 0, v0xca3940_0; +v0xca26c0_0 .alias "diff", 0 0, v0xca3f60_0; +v0xca2740_0 .net "nota", 0 0, L_0xd2bc00; 1 drivers +v0xca27c0_0 .net "notaandb", 0 0, L_0xd2bd90; 1 drivers +v0xca2860_0 .net "notaxorb", 0 0, L_0xd2bf50; 1 drivers +v0xca2900_0 .net "notaxorbandborrowin", 0 0, L_0xd2bff0; 1 drivers +S_0xca1b80 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xca1630; + .timescale 0 0; +L_0xd2c440/d .functor XOR 1, L_0xd2b330, L_0xd2bc80, C4<0>, C4<0>; +L_0xd2c440 .delay (30,30,30) L_0xd2c440/d; +L_0xd2c520/d .functor XOR 1, L_0xd2c440, L_0xd2be40, C4<0>, C4<0>; +L_0xd2c520 .delay (30,30,30) L_0xd2c520/d; +L_0xd2c6c0/d .functor NOT 1, L_0xd2b330, C4<0>, C4<0>, C4<0>; +L_0xd2c6c0 .delay (10,10,10) L_0xd2c6c0/d; +L_0xd2c780/d .functor AND 1, L_0xd2c6c0, L_0xd2bc80, C4<1>, C4<1>; +L_0xd2c780 .delay (30,30,30) L_0xd2c780/d; +L_0xd2c890/d .functor NOT 1, L_0xd2c440, C4<0>, C4<0>, C4<0>; +L_0xd2c890 .delay (10,10,10) L_0xd2c890/d; +L_0xd2c930/d .functor AND 1, L_0xd2c890, L_0xd2be40, C4<1>, C4<1>; +L_0xd2c930 .delay (30,30,30) L_0xd2c930/d; +L_0xd2ca80/d .functor OR 1, L_0xd2c780, L_0xd2c930, C4<0>, C4<0>; +L_0xd2ca80 .delay (30,30,30) L_0xd2ca80/d; +v0xca1c70_0 .alias "a", 0 0, v0xca35e0_0; +v0xca1cf0_0 .net "axorb", 0 0, L_0xd2c440; 1 drivers +v0xca1d90_0 .alias "b", 0 0, v0xca3660_0; +v0xca1e30_0 .alias "borrowin", 0 0, v0xca36e0_0; +v0xca1ee0_0 .alias "borrowout", 0 0, v0xca38c0_0; +v0xca1f80_0 .alias "diff", 0 0, v0xca3fe0_0; +v0xca2020_0 .net "nota", 0 0, L_0xd2c6c0; 1 drivers +v0xca20c0_0 .net "notaandb", 0 0, L_0xd2c780; 1 drivers +v0xca2160_0 .net "notaxorb", 0 0, L_0xd2c890; 1 drivers +v0xca2200_0 .net "notaxorbandborrowin", 0 0, L_0xd2c930; 1 drivers +S_0xca1910 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xca1630; + .timescale 0 0; +v0xca1a00_0 .alias "address", 2 0, v0xcec110_0; +v0xca1a80_0 .alias "inputs", 7 0, v0xca3a70_0; +v0xca1b00_0 .alias "out", 0 0, v0xca3c20_0; +L_0xd2d640 .part/v L_0xd2cf30, C4, 1; +S_0xca1720 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xca1630; + .timescale 0 0; +v0xca13f0_0 .alias "address", 2 0, v0xcec110_0; +v0xca1810_0 .alias "inputs", 7 0, v0xca39c0_0; +v0xca1890_0 .alias "out", 0 0, v0xca3760_0; +L_0xd2d730 .part/v L_0xd2a740, C4, 1; +S_0xc9e9c0 .scope module, "a24" "ALU1bit" 2 56, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd2ef40/d .functor XOR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2ef40 .delay (30,30,30) L_0xd2ef40/d; +L_0xd2f830/d .functor AND 1, L_0xd2de60, L_0xd2e110, C4<1>, C4<1>; +L_0xd2f830 .delay (30,30,30) L_0xd2f830/d; +L_0xd2f8f0/d .functor NAND 1, L_0xd2de60, L_0xd2e110, C4<1>, C4<1>; +L_0xd2f8f0 .delay (20,20,20) L_0xd2f8f0/d; +L_0xd2f9b0/d .functor NOR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2f9b0 .delay (20,20,20) L_0xd2f9b0/d; +L_0xd2fa70/d .functor OR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2fa70 .delay (30,30,30) L_0xd2fa70/d; +v0xca0650_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xca0710_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xca07b0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xca0850_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xca08d0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xca0970_0 .net "a", 0 0, L_0xd2de60; 1 drivers +v0xca09f0_0 .net "b", 0 0, L_0xd2e110; 1 drivers +v0xca0a70_0 .net "cin", 0 0, L_0xd2e880; 1 drivers +v0xca0af0_0 .net "cout", 0 0, L_0xd30280; 1 drivers +v0xca0b70_0 .net "cout_ADD", 0 0, L_0xd2e480; 1 drivers +v0xca0c50_0 .net "cout_SLT", 0 0, L_0xd2f660; 1 drivers +v0xca0cd0_0 .net "cout_SUB", 0 0, L_0xd2ed90; 1 drivers +v0xca0d50_0 .net "muxCout", 7 0, L_0xd2d280; 1 drivers +v0xca0e00_0 .net "muxRes", 7 0, L_0xd2fb10; 1 drivers +v0xca0f30_0 .alias "op", 2 0, v0xcec110_0; +v0xca0fb0_0 .net "out", 0 0, L_0xd2d550; 1 drivers +v0xca0e80_0 .net "res_ADD", 0 0, L_0xd2d9e0; 1 drivers +v0xca1120_0 .net "res_AND", 0 0, L_0xd2f830; 1 drivers +v0xca1030_0 .net "res_NAND", 0 0, L_0xd2f8f0; 1 drivers +v0xca1240_0 .net "res_NOR", 0 0, L_0xd2f9b0; 1 drivers +v0xca11a0_0 .net "res_OR", 0 0, L_0xd2fa70; 1 drivers +v0xca1370_0 .net "res_SLT", 0 0, L_0xd2f100; 1 drivers +v0xca12f0_0 .net "res_SUB", 0 0, L_0xd2e6c0; 1 drivers +v0xca14e0_0 .net "res_XOR", 0 0, L_0xd2ef40; 1 drivers +LS_0xd2fb10_0_0 .concat [ 1 1 1 1], L_0xd2d9e0, L_0xd2e6c0, L_0xd2ef40, L_0xd2f100; +LS_0xd2fb10_0_4 .concat [ 1 1 1 1], L_0xd2f830, L_0xd2f8f0, L_0xd2f9b0, L_0xd2fa70; +L_0xd2fb10 .concat [ 4 4 0 0], LS_0xd2fb10_0_0, LS_0xd2fb10_0_4; +LS_0xd2d280_0_0 .concat [ 1 1 1 1], L_0xd2e480, L_0xd2ed90, C4<0>, L_0xd2f660; +LS_0xd2d280_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd2d280 .concat [ 4 4 0 0], LS_0xd2d280_0_0, LS_0xd2d280_0_4; +S_0xc9fd90 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc9e9c0; + .timescale 0 0; +L_0xd2bd20/d .functor XOR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2bd20 .delay (30,30,30) L_0xd2bd20/d; +L_0xd2d9e0/d .functor XOR 1, L_0xd2bd20, L_0xd2e880, C4<0>, C4<0>; +L_0xd2d9e0 .delay (30,30,30) L_0xd2d9e0/d; +L_0xd2db70/d .functor AND 1, L_0xd2de60, L_0xd2e110, C4<1>, C4<1>; +L_0xd2db70 .delay (30,30,30) L_0xd2db70/d; +L_0xd2bee0/d .functor OR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2bee0 .delay (30,30,30) L_0xd2bee0/d; +L_0xd2e200/d .functor NOT 1, L_0xd2e880, C4<0>, C4<0>, C4<0>; +L_0xd2e200 .delay (10,10,10) L_0xd2e200/d; +L_0xd2e2a0/d .functor AND 1, L_0xd2db70, L_0xd2e200, C4<1>, C4<1>; +L_0xd2e2a0 .delay (30,30,30) L_0xd2e2a0/d; +L_0xd2e390/d .functor AND 1, L_0xd2bee0, L_0xd2e880, C4<1>, C4<1>; +L_0xd2e390 .delay (30,30,30) L_0xd2e390/d; +L_0xd2e480/d .functor OR 1, L_0xd2e2a0, L_0xd2e390, C4<0>, C4<0>; +L_0xd2e480 .delay (30,30,30) L_0xd2e480/d; +v0xc9fe80_0 .net "_carryin", 0 0, L_0xd2e200; 1 drivers +v0xc9ff40_0 .alias "a", 0 0, v0xca0970_0; +v0xc9ffc0_0 .net "aandb", 0 0, L_0xd2db70; 1 drivers +v0xca0060_0 .net "aorb", 0 0, L_0xd2bee0; 1 drivers +v0xca00e0_0 .alias "b", 0 0, v0xca09f0_0; +v0xca01b0_0 .alias "carryin", 0 0, v0xca0a70_0; +v0xca0280_0 .alias "carryout", 0 0, v0xca0b70_0; +v0xca0320_0 .net "outputIfCarryin", 0 0, L_0xd2e2a0; 1 drivers +v0xca0410_0 .net "outputIf_Carryin", 0 0, L_0xd2e390; 1 drivers +v0xca04b0_0 .net "s", 0 0, L_0xd2bd20; 1 drivers +v0xca05b0_0 .alias "sum", 0 0, v0xca0e80_0; +S_0xc9f630 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc9e9c0; + .timescale 0 0; +L_0xd2e660/d .functor XOR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2e660 .delay (30,30,30) L_0xd2e660/d; +L_0xd2e6c0/d .functor XOR 1, L_0xd2e660, L_0xd2e880, C4<0>, C4<0>; +L_0xd2e6c0 .delay (30,30,30) L_0xd2e6c0/d; +L_0xd2e800/d .functor NOT 1, L_0xd2de60, C4<0>, C4<0>, C4<0>; +L_0xd2e800 .delay (10,10,10) L_0xd2e800/d; +L_0xd2e990/d .functor AND 1, L_0xd2e800, L_0xd2e110, C4<1>, C4<1>; +L_0xd2e990 .delay (30,30,30) L_0xd2e990/d; +L_0xd2d980/d .functor NOT 1, L_0xd2e660, C4<0>, C4<0>, C4<0>; +L_0xd2d980 .delay (10,10,10) L_0xd2d980/d; +L_0xd2eb90/d .functor AND 1, L_0xd2d980, L_0xd2e880, C4<1>, C4<1>; +L_0xd2eb90 .delay (30,30,30) L_0xd2eb90/d; +L_0xd2ed90/d .functor OR 1, L_0xd2e990, L_0xd2eb90, C4<0>, C4<0>; +L_0xd2ed90 .delay (30,30,30) L_0xd2ed90/d; +v0xc9f720_0 .alias "a", 0 0, v0xca0970_0; +v0xc9f7c0_0 .net "axorb", 0 0, L_0xd2e660; 1 drivers +v0xc9f840_0 .alias "b", 0 0, v0xca09f0_0; +v0xc9f8f0_0 .alias "borrowin", 0 0, v0xca0a70_0; +v0xc9f9d0_0 .alias "borrowout", 0 0, v0xca0cd0_0; +v0xc9fa50_0 .alias "diff", 0 0, v0xca12f0_0; +v0xc9fad0_0 .net "nota", 0 0, L_0xd2e800; 1 drivers +v0xc9fb50_0 .net "notaandb", 0 0, L_0xd2e990; 1 drivers +v0xc9fbf0_0 .net "notaxorb", 0 0, L_0xd2d980; 1 drivers +v0xc9fc90_0 .net "notaxorbandborrowin", 0 0, L_0xd2eb90; 1 drivers +S_0xc9ef10 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc9e9c0; + .timescale 0 0; +L_0xd2f020/d .functor XOR 1, L_0xd2de60, L_0xd2e110, C4<0>, C4<0>; +L_0xd2f020 .delay (30,30,30) L_0xd2f020/d; +L_0xd2f100/d .functor XOR 1, L_0xd2f020, L_0xd2e880, C4<0>, C4<0>; +L_0xd2f100 .delay (30,30,30) L_0xd2f100/d; +L_0xd2f2a0/d .functor NOT 1, L_0xd2de60, C4<0>, C4<0>, C4<0>; +L_0xd2f2a0 .delay (10,10,10) L_0xd2f2a0/d; +L_0xd2f360/d .functor AND 1, L_0xd2f2a0, L_0xd2e110, C4<1>, C4<1>; +L_0xd2f360 .delay (30,30,30) L_0xd2f360/d; +L_0xd2f470/d .functor NOT 1, L_0xd2f020, C4<0>, C4<0>, C4<0>; +L_0xd2f470 .delay (10,10,10) L_0xd2f470/d; +L_0xd2f510/d .functor AND 1, L_0xd2f470, L_0xd2e880, C4<1>, C4<1>; +L_0xd2f510 .delay (30,30,30) L_0xd2f510/d; +L_0xd2f660/d .functor OR 1, L_0xd2f360, L_0xd2f510, C4<0>, C4<0>; +L_0xd2f660 .delay (30,30,30) L_0xd2f660/d; +v0xc9f000_0 .alias "a", 0 0, v0xca0970_0; +v0xc9f080_0 .net "axorb", 0 0, L_0xd2f020; 1 drivers +v0xc9f120_0 .alias "b", 0 0, v0xca09f0_0; +v0xc9f1c0_0 .alias "borrowin", 0 0, v0xca0a70_0; +v0xc9f270_0 .alias "borrowout", 0 0, v0xca0c50_0; +v0xc9f310_0 .alias "diff", 0 0, v0xca1370_0; +v0xc9f3b0_0 .net "nota", 0 0, L_0xd2f2a0; 1 drivers +v0xc9f450_0 .net "notaandb", 0 0, L_0xd2f360; 1 drivers +v0xc9f4f0_0 .net "notaxorb", 0 0, L_0xd2f470; 1 drivers +v0xc9f590_0 .net "notaxorbandborrowin", 0 0, L_0xd2f510; 1 drivers +S_0xc9eca0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc9e9c0; + .timescale 0 0; +v0xc9ed90_0 .alias "address", 2 0, v0xcec110_0; +v0xc9ee10_0 .alias "inputs", 7 0, v0xca0e00_0; +v0xc9ee90_0 .alias "out", 0 0, v0xca0fb0_0; +L_0xd2d550 .part/v L_0xd2fb10, C4, 1; +S_0xc9eab0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc9e9c0; + .timescale 0 0; +v0xc9e780_0 .alias "address", 2 0, v0xcec110_0; +v0xc9eba0_0 .alias "inputs", 7 0, v0xca0d50_0; +v0xc9ec20_0 .alias "out", 0 0, v0xca0af0_0; +L_0xd30280 .part/v L_0xd2d280, C4, 1; +S_0xc9be30 .scope module, "a25" "ALU1bit" 2 57, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd31b30/d .functor XOR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd31b30 .delay (30,30,30) L_0xd31b30/d; +L_0xd32420/d .functor AND 1, L_0xd30b10, L_0xd31430, C4<1>, C4<1>; +L_0xd32420 .delay (30,30,30) L_0xd32420/d; +L_0xd324e0/d .functor NAND 1, L_0xd30b10, L_0xd31430, C4<1>, C4<1>; +L_0xd324e0 .delay (20,20,20) L_0xd324e0/d; +L_0xd325a0/d .functor NOR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd325a0 .delay (20,20,20) L_0xd325a0/d; +L_0xd32660/d .functor OR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd32660 .delay (30,30,30) L_0xd32660/d; +v0xc9d940_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc9da00_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc9daa0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc9db40_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc9dbc0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc9dc60_0 .net "a", 0 0, L_0xd30b10; 1 drivers +v0xc9dce0_0 .net "b", 0 0, L_0xd31430; 1 drivers +v0xc9dd60_0 .net "cin", 0 0, L_0xd315f0; 1 drivers +v0xc9dde0_0 .net "cout", 0 0, L_0xd32eb0; 1 drivers +v0xc9de60_0 .net "cout_ADD", 0 0, L_0xd31050; 1 drivers +v0xc9df40_0 .net "cout_SLT", 0 0, L_0xd32250; 1 drivers +v0xc9dfc0_0 .net "cout_SUB", 0 0, L_0xd319a0; 1 drivers +v0xc9e0e0_0 .net "muxCout", 7 0, L_0xd2ff60; 1 drivers +v0xc9e190_0 .net "muxRes", 7 0, L_0xd32700; 1 drivers +v0xc9e2c0_0 .alias "op", 2 0, v0xcec110_0; +v0xc9e340_0 .net "out", 0 0, L_0xd32e10; 1 drivers +v0xc9e210_0 .net "res_ADD", 0 0, L_0xd30580; 1 drivers +v0xc9e4b0_0 .net "res_AND", 0 0, L_0xd32420; 1 drivers +v0xc9e3c0_0 .net "res_NAND", 0 0, L_0xd324e0; 1 drivers +v0xc9e5d0_0 .net "res_NOR", 0 0, L_0xd325a0; 1 drivers +v0xc9e530_0 .net "res_OR", 0 0, L_0xd32660; 1 drivers +v0xc9e700_0 .net "res_SLT", 0 0, L_0xd31cf0; 1 drivers +v0xc9e680_0 .net "res_SUB", 0 0, L_0xd31290; 1 drivers +v0xc9e870_0 .net "res_XOR", 0 0, L_0xd31b30; 1 drivers +LS_0xd32700_0_0 .concat [ 1 1 1 1], L_0xd30580, L_0xd31290, L_0xd31b30, L_0xd31cf0; +LS_0xd32700_0_4 .concat [ 1 1 1 1], L_0xd32420, L_0xd324e0, L_0xd325a0, L_0xd32660; +L_0xd32700 .concat [ 4 4 0 0], LS_0xd32700_0_0, LS_0xd32700_0_4; +LS_0xd2ff60_0_0 .concat [ 1 1 1 1], L_0xd31050, L_0xd319a0, C4<0>, L_0xd32250; +LS_0xd2ff60_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd2ff60 .concat [ 4 4 0 0], LS_0xd2ff60_0_0, LS_0xd2ff60_0_4; +S_0xc9d140 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc9be30; + .timescale 0 0; +L_0xd2e920/d .functor XOR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd2e920 .delay (30,30,30) L_0xd2e920/d; +L_0xd30580/d .functor XOR 1, L_0xd2e920, L_0xd315f0, C4<0>, C4<0>; +L_0xd30580 .delay (30,30,30) L_0xd30580/d; +L_0xd30710/d .functor AND 1, L_0xd30b10, L_0xd31430, C4<1>, C4<1>; +L_0xd30710 .delay (30,30,30) L_0xd30710/d; +L_0xd307d0/d .functor OR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd307d0 .delay (30,30,30) L_0xd307d0/d; +L_0xd2ead0/d .functor NOT 1, L_0xd315f0, C4<0>, C4<0>, C4<0>; +L_0xd2ead0 .delay (10,10,10) L_0xd2ead0/d; +L_0xd30e70/d .functor AND 1, L_0xd30710, L_0xd2ead0, C4<1>, C4<1>; +L_0xd30e70 .delay (30,30,30) L_0xd30e70/d; +L_0xd30f60/d .functor AND 1, L_0xd307d0, L_0xd315f0, C4<1>, C4<1>; +L_0xd30f60 .delay (30,30,30) L_0xd30f60/d; +L_0xd31050/d .functor OR 1, L_0xd30e70, L_0xd30f60, C4<0>, C4<0>; +L_0xd31050 .delay (30,30,30) L_0xd31050/d; +v0xc9d230_0 .net "_carryin", 0 0, L_0xd2ead0; 1 drivers +v0xc9d2b0_0 .alias "a", 0 0, v0xc9dc60_0; +v0xc9d330_0 .net "aandb", 0 0, L_0xd30710; 1 drivers +v0xc9d3b0_0 .net "aorb", 0 0, L_0xd307d0; 1 drivers +v0xc9d430_0 .alias "b", 0 0, v0xc9dce0_0; +v0xc9d500_0 .alias "carryin", 0 0, v0xc9dd60_0; +v0xc9d5d0_0 .alias "carryout", 0 0, v0xc9de60_0; +v0xc9d650_0 .net "outputIfCarryin", 0 0, L_0xd30e70; 1 drivers +v0xc9d720_0 .net "outputIf_Carryin", 0 0, L_0xd30f60; 1 drivers +v0xc9d7a0_0 .net "s", 0 0, L_0xd2e920; 1 drivers +v0xc9d8a0_0 .alias "sum", 0 0, v0xc9e210_0; +S_0xc9caa0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc9be30; + .timescale 0 0; +L_0xd31230/d .functor XOR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd31230 .delay (30,30,30) L_0xd31230/d; +L_0xd31290/d .functor XOR 1, L_0xd31230, L_0xd315f0, C4<0>, C4<0>; +L_0xd31290 .delay (30,30,30) L_0xd31290/d; +L_0xd313d0/d .functor NOT 1, L_0xd30b10, C4<0>, C4<0>, C4<0>; +L_0xd313d0 .delay (10,10,10) L_0xd313d0/d; +L_0xd31540/d .functor AND 1, L_0xd313d0, L_0xd31430, C4<1>, C4<1>; +L_0xd31540 .delay (30,30,30) L_0xd31540/d; +L_0xd31700/d .functor NOT 1, L_0xd31230, C4<0>, C4<0>, C4<0>; +L_0xd31700 .delay (10,10,10) L_0xd31700/d; +L_0xd317a0/d .functor AND 1, L_0xd31700, L_0xd315f0, C4<1>, C4<1>; +L_0xd317a0 .delay (30,30,30) L_0xd317a0/d; +L_0xd319a0/d .functor OR 1, L_0xd31540, L_0xd317a0, C4<0>, C4<0>; +L_0xd319a0 .delay (30,30,30) L_0xd319a0/d; +v0xc9cb90_0 .alias "a", 0 0, v0xc9dc60_0; +v0xc9cc30_0 .net "axorb", 0 0, L_0xd31230; 1 drivers +v0xc9ccb0_0 .alias "b", 0 0, v0xc9dce0_0; +v0xc9cd60_0 .alias "borrowin", 0 0, v0xc9dd60_0; +v0xc9ce40_0 .alias "borrowout", 0 0, v0xc9dfc0_0; +v0xc9cec0_0 .alias "diff", 0 0, v0xc9e680_0; +v0xc9cf40_0 .net "nota", 0 0, L_0xd313d0; 1 drivers +v0xc9cfc0_0 .net "notaandb", 0 0, L_0xd31540; 1 drivers +v0xc9d040_0 .net "notaxorb", 0 0, L_0xd31700; 1 drivers +v0xc9d0c0_0 .net "notaxorbandborrowin", 0 0, L_0xd317a0; 1 drivers +S_0xc9c380 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc9be30; + .timescale 0 0; +L_0xd31c10/d .functor XOR 1, L_0xd30b10, L_0xd31430, C4<0>, C4<0>; +L_0xd31c10 .delay (30,30,30) L_0xd31c10/d; +L_0xd31cf0/d .functor XOR 1, L_0xd31c10, L_0xd315f0, C4<0>, C4<0>; +L_0xd31cf0 .delay (30,30,30) L_0xd31cf0/d; +L_0xd31e90/d .functor NOT 1, L_0xd30b10, C4<0>, C4<0>, C4<0>; +L_0xd31e90 .delay (10,10,10) L_0xd31e90/d; +L_0xd31f50/d .functor AND 1, L_0xd31e90, L_0xd31430, C4<1>, C4<1>; +L_0xd31f50 .delay (30,30,30) L_0xd31f50/d; +L_0xd32060/d .functor NOT 1, L_0xd31c10, C4<0>, C4<0>, C4<0>; +L_0xd32060 .delay (10,10,10) L_0xd32060/d; +L_0xd32100/d .functor AND 1, L_0xd32060, L_0xd315f0, C4<1>, C4<1>; +L_0xd32100 .delay (30,30,30) L_0xd32100/d; +L_0xd32250/d .functor OR 1, L_0xd31f50, L_0xd32100, C4<0>, C4<0>; +L_0xd32250 .delay (30,30,30) L_0xd32250/d; +v0xc9c470_0 .alias "a", 0 0, v0xc9dc60_0; +v0xc9c4f0_0 .net "axorb", 0 0, L_0xd31c10; 1 drivers +v0xc9c590_0 .alias "b", 0 0, v0xc9dce0_0; +v0xc9c630_0 .alias "borrowin", 0 0, v0xc9dd60_0; +v0xc9c6e0_0 .alias "borrowout", 0 0, v0xc9df40_0; +v0xc9c780_0 .alias "diff", 0 0, v0xc9e700_0; +v0xc9c820_0 .net "nota", 0 0, L_0xd31e90; 1 drivers +v0xc9c8c0_0 .net "notaandb", 0 0, L_0xd31f50; 1 drivers +v0xc9c960_0 .net "notaxorb", 0 0, L_0xd32060; 1 drivers +v0xc9ca00_0 .net "notaxorbandborrowin", 0 0, L_0xd32100; 1 drivers +S_0xc9c110 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc9be30; + .timescale 0 0; +v0xc9c200_0 .alias "address", 2 0, v0xcec110_0; +v0xc9c280_0 .alias "inputs", 7 0, v0xc9e190_0; +v0xc9c300_0 .alias "out", 0 0, v0xc9e340_0; +L_0xd32e10 .part/v L_0xd32700, C4, 1; +S_0xc9bf20 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc9be30; + .timescale 0 0; +v0xc9bbf0_0 .alias "address", 2 0, v0xcec110_0; +v0xc9c010_0 .alias "inputs", 7 0, v0xc9e0e0_0; +v0xc9c090_0 .alias "out", 0 0, v0xc9dde0_0; +L_0xd32eb0 .part/v L_0xd2ff60, C4, 1; +S_0xc991c0 .scope module, "a26" "ALU1bit" 2 58, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd34700/d .functor XOR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd34700 .delay (30,30,30) L_0xd34700/d; +L_0xd34ff0/d .functor AND 1, L_0xd33630, L_0xd34040, C4<1>, C4<1>; +L_0xd34ff0 .delay (30,30,30) L_0xd34ff0/d; +L_0xd350b0/d .functor NAND 1, L_0xd33630, L_0xd34040, C4<1>, C4<1>; +L_0xd350b0 .delay (20,20,20) L_0xd350b0/d; +L_0xd35170/d .functor NOR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd35170 .delay (20,20,20) L_0xd35170/d; +L_0xd35230/d .functor OR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd35230 .delay (30,30,30) L_0xd35230/d; +v0xc9ae50_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc9af10_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc9afb0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc9b050_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc9b0d0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc9b170_0 .net "a", 0 0, L_0xd33630; 1 drivers +v0xc9b1f0_0 .net "b", 0 0, L_0xd34040; 1 drivers +v0xc9b270_0 .net "cin", 0 0, L_0xd34200; 1 drivers +v0xc9b2f0_0 .net "cout", 0 0, L_0xd35a90; 1 drivers +v0xc9b370_0 .net "cout_ADD", 0 0, L_0xd33c40; 1 drivers +v0xc9b450_0 .net "cout_SLT", 0 0, L_0xd34e20; 1 drivers +v0xc9b4d0_0 .net "cout_SUB", 0 0, L_0xd34550; 1 drivers +v0xc9b550_0 .net "muxCout", 7 0, L_0xd32a90; 1 drivers +v0xc9b600_0 .net "muxRes", 7 0, L_0xd352d0; 1 drivers +v0xc9b730_0 .alias "op", 2 0, v0xcec110_0; +v0xc9b7b0_0 .net "out", 0 0, L_0xd32d60; 1 drivers +v0xc9b680_0 .net "res_ADD", 0 0, L_0xd33180; 1 drivers +v0xc9b920_0 .net "res_AND", 0 0, L_0xd34ff0; 1 drivers +v0xc9b830_0 .net "res_NAND", 0 0, L_0xd350b0; 1 drivers +v0xc9ba40_0 .net "res_NOR", 0 0, L_0xd35170; 1 drivers +v0xc9b9a0_0 .net "res_OR", 0 0, L_0xd35230; 1 drivers +v0xc9bb70_0 .net "res_SLT", 0 0, L_0xd348c0; 1 drivers +v0xc9baf0_0 .net "res_SUB", 0 0, L_0xd33e80; 1 drivers +v0xc9bce0_0 .net "res_XOR", 0 0, L_0xd34700; 1 drivers +LS_0xd352d0_0_0 .concat [ 1 1 1 1], L_0xd33180, L_0xd33e80, L_0xd34700, L_0xd348c0; +LS_0xd352d0_0_4 .concat [ 1 1 1 1], L_0xd34ff0, L_0xd350b0, L_0xd35170, L_0xd35230; +L_0xd352d0 .concat [ 4 4 0 0], LS_0xd352d0_0_0, LS_0xd352d0_0_4; +LS_0xd32a90_0_0 .concat [ 1 1 1 1], L_0xd33c40, L_0xd34550, C4<0>, L_0xd34e20; +LS_0xd32a90_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd32a90 .concat [ 4 4 0 0], LS_0xd32a90_0_0, LS_0xd32a90_0_4; +S_0xc9a590 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc991c0; + .timescale 0 0; +L_0xd30dc0/d .functor XOR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd30dc0 .delay (30,30,30) L_0xd30dc0/d; +L_0xd33180/d .functor XOR 1, L_0xd30dc0, L_0xd34200, C4<0>, C4<0>; +L_0xd33180 .delay (30,30,30) L_0xd33180/d; +L_0xd33310/d .functor AND 1, L_0xd33630, L_0xd34040, C4<1>, C4<1>; +L_0xd33310 .delay (30,30,30) L_0xd33310/d; +L_0xd314d0/d .functor OR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd314d0 .delay (30,30,30) L_0xd314d0/d; +L_0xd31690/d .functor NOT 1, L_0xd34200, C4<0>, C4<0>, C4<0>; +L_0xd31690 .delay (10,10,10) L_0xd31690/d; +L_0xd33a60/d .functor AND 1, L_0xd33310, L_0xd31690, C4<1>, C4<1>; +L_0xd33a60 .delay (30,30,30) L_0xd33a60/d; +L_0xd33b50/d .functor AND 1, L_0xd314d0, L_0xd34200, C4<1>, C4<1>; +L_0xd33b50 .delay (30,30,30) L_0xd33b50/d; +L_0xd33c40/d .functor OR 1, L_0xd33a60, L_0xd33b50, C4<0>, C4<0>; +L_0xd33c40 .delay (30,30,30) L_0xd33c40/d; +v0xc9a680_0 .net "_carryin", 0 0, L_0xd31690; 1 drivers +v0xc9a740_0 .alias "a", 0 0, v0xc9b170_0; +v0xc9a7c0_0 .net "aandb", 0 0, L_0xd33310; 1 drivers +v0xc9a860_0 .net "aorb", 0 0, L_0xd314d0; 1 drivers +v0xc9a8e0_0 .alias "b", 0 0, v0xc9b1f0_0; +v0xc9a9b0_0 .alias "carryin", 0 0, v0xc9b270_0; +v0xc9aa80_0 .alias "carryout", 0 0, v0xc9b370_0; +v0xc9ab20_0 .net "outputIfCarryin", 0 0, L_0xd33a60; 1 drivers +v0xc9ac10_0 .net "outputIf_Carryin", 0 0, L_0xd33b50; 1 drivers +v0xc9acb0_0 .net "s", 0 0, L_0xd30dc0; 1 drivers +v0xc9adb0_0 .alias "sum", 0 0, v0xc9b680_0; +S_0xc99e30 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc991c0; + .timescale 0 0; +L_0xd33e20/d .functor XOR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd33e20 .delay (30,30,30) L_0xd33e20/d; +L_0xd33e80/d .functor XOR 1, L_0xd33e20, L_0xd34200, C4<0>, C4<0>; +L_0xd33e80 .delay (30,30,30) L_0xd33e80/d; +L_0xd33fc0/d .functor NOT 1, L_0xd33630, C4<0>, C4<0>, C4<0>; +L_0xd33fc0 .delay (10,10,10) L_0xd33fc0/d; +L_0xd34150/d .functor AND 1, L_0xd33fc0, L_0xd34040, C4<1>, C4<1>; +L_0xd34150 .delay (30,30,30) L_0xd34150/d; +L_0xd33100/d .functor NOT 1, L_0xd33e20, C4<0>, C4<0>, C4<0>; +L_0xd33100 .delay (10,10,10) L_0xd33100/d; +L_0xd34350/d .functor AND 1, L_0xd33100, L_0xd34200, C4<1>, C4<1>; +L_0xd34350 .delay (30,30,30) L_0xd34350/d; +L_0xd34550/d .functor OR 1, L_0xd34150, L_0xd34350, C4<0>, C4<0>; +L_0xd34550 .delay (30,30,30) L_0xd34550/d; +v0xc99f20_0 .alias "a", 0 0, v0xc9b170_0; +v0xc99fc0_0 .net "axorb", 0 0, L_0xd33e20; 1 drivers +v0xc9a040_0 .alias "b", 0 0, v0xc9b1f0_0; +v0xc9a0f0_0 .alias "borrowin", 0 0, v0xc9b270_0; +v0xc9a1d0_0 .alias "borrowout", 0 0, v0xc9b4d0_0; +v0xc9a250_0 .alias "diff", 0 0, v0xc9baf0_0; +v0xc9a2d0_0 .net "nota", 0 0, L_0xd33fc0; 1 drivers +v0xc9a350_0 .net "notaandb", 0 0, L_0xd34150; 1 drivers +v0xc9a3f0_0 .net "notaxorb", 0 0, L_0xd33100; 1 drivers +v0xc9a490_0 .net "notaxorbandborrowin", 0 0, L_0xd34350; 1 drivers +S_0xc99710 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc991c0; + .timescale 0 0; +L_0xd347e0/d .functor XOR 1, L_0xd33630, L_0xd34040, C4<0>, C4<0>; +L_0xd347e0 .delay (30,30,30) L_0xd347e0/d; +L_0xd348c0/d .functor XOR 1, L_0xd347e0, L_0xd34200, C4<0>, C4<0>; +L_0xd348c0 .delay (30,30,30) L_0xd348c0/d; +L_0xd34a60/d .functor NOT 1, L_0xd33630, C4<0>, C4<0>, C4<0>; +L_0xd34a60 .delay (10,10,10) L_0xd34a60/d; +L_0xd34b20/d .functor AND 1, L_0xd34a60, L_0xd34040, C4<1>, C4<1>; +L_0xd34b20 .delay (30,30,30) L_0xd34b20/d; +L_0xd34c30/d .functor NOT 1, L_0xd347e0, C4<0>, C4<0>, C4<0>; +L_0xd34c30 .delay (10,10,10) L_0xd34c30/d; +L_0xd34cd0/d .functor AND 1, L_0xd34c30, L_0xd34200, C4<1>, C4<1>; +L_0xd34cd0 .delay (30,30,30) L_0xd34cd0/d; +L_0xd34e20/d .functor OR 1, L_0xd34b20, L_0xd34cd0, C4<0>, C4<0>; +L_0xd34e20 .delay (30,30,30) L_0xd34e20/d; +v0xc99800_0 .alias "a", 0 0, v0xc9b170_0; +v0xc99880_0 .net "axorb", 0 0, L_0xd347e0; 1 drivers +v0xc99920_0 .alias "b", 0 0, v0xc9b1f0_0; +v0xc999c0_0 .alias "borrowin", 0 0, v0xc9b270_0; +v0xc99a70_0 .alias "borrowout", 0 0, v0xc9b450_0; +v0xc99b10_0 .alias "diff", 0 0, v0xc9bb70_0; +v0xc99bb0_0 .net "nota", 0 0, L_0xd34a60; 1 drivers +v0xc99c50_0 .net "notaandb", 0 0, L_0xd34b20; 1 drivers +v0xc99cf0_0 .net "notaxorb", 0 0, L_0xd34c30; 1 drivers +v0xc99d90_0 .net "notaxorbandborrowin", 0 0, L_0xd34cd0; 1 drivers +S_0xc994a0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc991c0; + .timescale 0 0; +v0xc99590_0 .alias "address", 2 0, v0xcec110_0; +v0xc99610_0 .alias "inputs", 7 0, v0xc9b600_0; +v0xc99690_0 .alias "out", 0 0, v0xc9b7b0_0; +L_0xd32d60 .part/v L_0xd352d0, C4, 1; +S_0xc992b0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc991c0; + .timescale 0 0; +v0xc98f80_0 .alias "address", 2 0, v0xcec110_0; +v0xc993a0_0 .alias "inputs", 7 0, v0xc9b550_0; +v0xc99420_0 .alias "out", 0 0, v0xc9b2f0_0; +L_0xd35a90 .part/v L_0xd32a90, C4, 1; +S_0xc96550 .scope module, "a27" "ALU1bit" 2 59, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd37240/d .functor XOR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xd37240 .delay (30,30,30) L_0xd37240/d; +L_0xd37b10/d .functor AND 1, L_0xd36370, L_0xd36620, C4<1>, C4<1>; +L_0xd37b10 .delay (30,30,30) L_0xd37b10/d; +L_0xd37bd0/d .functor NAND 1, L_0xd36370, L_0xd36620, C4<1>, C4<1>; +L_0xd37bd0 .delay (20,20,20) L_0xd37bd0/d; +L_0xd37c90/d .functor NOR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xd37c90 .delay (20,20,20) L_0xd37c90/d; +L_0xd37d50/d .functor OR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xd37d50 .delay (30,30,30) L_0xd37d50/d; +v0xc981e0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc982a0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc98340_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc983e0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc98460_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc98500_0 .net "a", 0 0, L_0xd36370; 1 drivers +v0xc98580_0 .net "b", 0 0, L_0xd36620; 1 drivers +v0xc98600_0 .net "cin", 0 0, L_0xd36ba0; 1 drivers +v0xc98680_0 .net "cout", 0 0, L_0xd385f0; 1 drivers +v0xc98700_0 .net "cout_ADD", 0 0, L_0xd367d0; 1 drivers +v0xc987e0_0 .net "cout_SLT", 0 0, L_0xd37940; 1 drivers +v0xc98860_0 .net "cout_SUB", 0 0, L_0xd370b0; 1 drivers +v0xc988e0_0 .net "muxCout", 7 0, L_0xd356e0; 1 drivers +v0xc98990_0 .net "muxRes", 7 0, L_0xd37df0; 1 drivers +v0xc98ac0_0 .alias "op", 2 0, v0xcec110_0; +v0xc98b40_0 .net "out", 0 0, L_0xd38550; 1 drivers +v0xc98a10_0 .net "res_ADD", 0 0, L_0xc9a170; 1 drivers +v0xc98cb0_0 .net "res_AND", 0 0, L_0xd37b10; 1 drivers +v0xc98bc0_0 .net "res_NAND", 0 0, L_0xd37bd0; 1 drivers +v0xc98dd0_0 .net "res_NOR", 0 0, L_0xd37c90; 1 drivers +v0xc98d30_0 .net "res_OR", 0 0, L_0xd37d50; 1 drivers +v0xc98f00_0 .net "res_SLT", 0 0, L_0xd373e0; 1 drivers +v0xc98e80_0 .net "res_SUB", 0 0, L_0xd36a00; 1 drivers +v0xc99070_0 .net "res_XOR", 0 0, L_0xd37240; 1 drivers +LS_0xd37df0_0_0 .concat [ 1 1 1 1], L_0xc9a170, L_0xd36a00, L_0xd37240, L_0xd373e0; +LS_0xd37df0_0_4 .concat [ 1 1 1 1], L_0xd37b10, L_0xd37bd0, L_0xd37c90, L_0xd37d50; +L_0xd37df0 .concat [ 4 4 0 0], LS_0xd37df0_0_0, LS_0xd37df0_0_4; +LS_0xd356e0_0_0 .concat [ 1 1 1 1], L_0xd367d0, L_0xd370b0, C4<0>, L_0xd37940; +LS_0xd356e0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd356e0 .concat [ 4 4 0 0], LS_0xd356e0_0_0, LS_0xd356e0_0_4; +S_0xc97920 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc96550; + .timescale 0 0; +L_0xc9b8c0/d .functor XOR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xc9b8c0 .delay (30,30,30) L_0xc9b8c0/d; +L_0xc9a170/d .functor XOR 1, L_0xc9b8c0, L_0xd36ba0, C4<0>, C4<0>; +L_0xc9a170 .delay (30,30,30) L_0xc9a170/d; +L_0xd35dd0/d .functor AND 1, L_0xd36370, L_0xd36620, C4<1>, C4<1>; +L_0xd35dd0 .delay (30,30,30) L_0xd35dd0/d; +L_0xd35e90/d .functor OR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xd35e90 .delay (30,30,30) L_0xd35e90/d; +L_0xd35f50/d .functor NOT 1, L_0xd36ba0, C4<0>, C4<0>, C4<0>; +L_0xd35f50 .delay (10,10,10) L_0xd35f50/d; +L_0xd35ff0/d .functor AND 1, L_0xd35dd0, L_0xd35f50, C4<1>, C4<1>; +L_0xd35ff0 .delay (30,30,30) L_0xd35ff0/d; +L_0xd366e0/d .functor AND 1, L_0xd35e90, L_0xd36ba0, C4<1>, C4<1>; +L_0xd366e0 .delay (30,30,30) L_0xd366e0/d; +L_0xd367d0/d .functor OR 1, L_0xd35ff0, L_0xd366e0, C4<0>, C4<0>; +L_0xd367d0 .delay (30,30,30) L_0xd367d0/d; +v0xc97a10_0 .net "_carryin", 0 0, L_0xd35f50; 1 drivers +v0xc97ad0_0 .alias "a", 0 0, v0xc98500_0; +v0xc97b50_0 .net "aandb", 0 0, L_0xd35dd0; 1 drivers +v0xc97bf0_0 .net "aorb", 0 0, L_0xd35e90; 1 drivers +v0xc97c70_0 .alias "b", 0 0, v0xc98580_0; +v0xc97d40_0 .alias "carryin", 0 0, v0xc98600_0; +v0xc97e10_0 .alias "carryout", 0 0, v0xc98700_0; +v0xc97eb0_0 .net "outputIfCarryin", 0 0, L_0xd35ff0; 1 drivers +v0xc97fa0_0 .net "outputIf_Carryin", 0 0, L_0xd366e0; 1 drivers +v0xc98040_0 .net "s", 0 0, L_0xc9b8c0; 1 drivers +v0xc98140_0 .alias "sum", 0 0, v0xc98a10_0; +S_0xc971c0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc96550; + .timescale 0 0; +L_0xd36960/d .functor XOR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xd36960 .delay (30,30,30) L_0xd36960/d; +L_0xd36a00/d .functor XOR 1, L_0xd36960, L_0xd36ba0, C4<0>, C4<0>; +L_0xd36a00 .delay (30,30,30) L_0xd36a00/d; +L_0xd36b40/d .functor NOT 1, L_0xd36370, C4<0>, C4<0>, C4<0>; +L_0xd36b40 .delay (10,10,10) L_0xd36b40/d; +L_0xd36cb0/d .functor AND 1, L_0xd36b40, L_0xd36620, C4<1>, C4<1>; +L_0xd36cb0 .delay (30,30,30) L_0xd36cb0/d; +L_0xd339a0/d .functor NOT 1, L_0xd36960, C4<0>, C4<0>, C4<0>; +L_0xd339a0 .delay (10,10,10) L_0xd339a0/d; +L_0xd36eb0/d .functor AND 1, L_0xd339a0, L_0xd36ba0, C4<1>, C4<1>; +L_0xd36eb0 .delay (30,30,30) L_0xd36eb0/d; +L_0xd370b0/d .functor OR 1, L_0xd36cb0, L_0xd36eb0, C4<0>, C4<0>; +L_0xd370b0 .delay (30,30,30) L_0xd370b0/d; +v0xc972b0_0 .alias "a", 0 0, v0xc98500_0; +v0xc97350_0 .net "axorb", 0 0, L_0xd36960; 1 drivers +v0xc973d0_0 .alias "b", 0 0, v0xc98580_0; +v0xc97480_0 .alias "borrowin", 0 0, v0xc98600_0; +v0xc97560_0 .alias "borrowout", 0 0, v0xc98860_0; +v0xc975e0_0 .alias "diff", 0 0, v0xc98e80_0; +v0xc97660_0 .net "nota", 0 0, L_0xd36b40; 1 drivers +v0xc976e0_0 .net "notaandb", 0 0, L_0xd36cb0; 1 drivers +v0xc97780_0 .net "notaxorb", 0 0, L_0xd339a0; 1 drivers +v0xc97820_0 .net "notaxorbandborrowin", 0 0, L_0xd36eb0; 1 drivers +S_0xc96aa0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc96550; + .timescale 0 0; +L_0xd37300/d .functor XOR 1, L_0xd36370, L_0xd36620, C4<0>, C4<0>; +L_0xd37300 .delay (30,30,30) L_0xd37300/d; +L_0xd373e0/d .functor XOR 1, L_0xd37300, L_0xd36ba0, C4<0>, C4<0>; +L_0xd373e0 .delay (30,30,30) L_0xd373e0/d; +L_0xd37580/d .functor NOT 1, L_0xd36370, C4<0>, C4<0>, C4<0>; +L_0xd37580 .delay (10,10,10) L_0xd37580/d; +L_0xd37640/d .functor AND 1, L_0xd37580, L_0xd36620, C4<1>, C4<1>; +L_0xd37640 .delay (30,30,30) L_0xd37640/d; +L_0xd37750/d .functor NOT 1, L_0xd37300, C4<0>, C4<0>, C4<0>; +L_0xd37750 .delay (10,10,10) L_0xd37750/d; +L_0xd377f0/d .functor AND 1, L_0xd37750, L_0xd36ba0, C4<1>, C4<1>; +L_0xd377f0 .delay (30,30,30) L_0xd377f0/d; +L_0xd37940/d .functor OR 1, L_0xd37640, L_0xd377f0, C4<0>, C4<0>; +L_0xd37940 .delay (30,30,30) L_0xd37940/d; +v0xc96b90_0 .alias "a", 0 0, v0xc98500_0; +v0xc96c10_0 .net "axorb", 0 0, L_0xd37300; 1 drivers +v0xc96cb0_0 .alias "b", 0 0, v0xc98580_0; +v0xc96d50_0 .alias "borrowin", 0 0, v0xc98600_0; +v0xc96e00_0 .alias "borrowout", 0 0, v0xc987e0_0; +v0xc96ea0_0 .alias "diff", 0 0, v0xc98f00_0; +v0xc96f40_0 .net "nota", 0 0, L_0xd37580; 1 drivers +v0xc96fe0_0 .net "notaandb", 0 0, L_0xd37640; 1 drivers +v0xc97080_0 .net "notaxorb", 0 0, L_0xd37750; 1 drivers +v0xc97120_0 .net "notaxorbandborrowin", 0 0, L_0xd377f0; 1 drivers +S_0xc96830 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc96550; + .timescale 0 0; +v0xc96920_0 .alias "address", 2 0, v0xcec110_0; +v0xc969a0_0 .alias "inputs", 7 0, v0xc98990_0; +v0xc96a20_0 .alias "out", 0 0, v0xc98b40_0; +L_0xd38550 .part/v L_0xd37df0, C4, 1; +S_0xc96640 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc96550; + .timescale 0 0; +v0xc96310_0 .alias "address", 2 0, v0xcec110_0; +v0xc96730_0 .alias "inputs", 7 0, v0xc988e0_0; +v0xc967b0_0 .alias "out", 0 0, v0xc98680_0; +L_0xd385f0 .part/v L_0xd356e0, C4, 1; +S_0xc938e0 .scope module, "a28" "ALU1bit" 2 60, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd39e10/d .functor XOR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xd39e10 .delay (30,30,30) L_0xd39e10/d; +L_0xd3a6e0/d .functor AND 1, L_0xd38dc0, L_0xd39710, C4<1>, C4<1>; +L_0xd3a6e0 .delay (30,30,30) L_0xd3a6e0/d; +L_0xd3a7a0/d .functor NAND 1, L_0xd38dc0, L_0xd39710, C4<1>, C4<1>; +L_0xd3a7a0 .delay (20,20,20) L_0xd3a7a0/d; +L_0xd3a860/d .functor NOR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xd3a860 .delay (20,20,20) L_0xd3a860/d; +L_0xd3a920/d .functor OR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xd3a920 .delay (30,30,30) L_0xd3a920/d; +v0xc95570_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc95630_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc956d0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc95770_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc957f0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc95890_0 .net "a", 0 0, L_0xd38dc0; 1 drivers +v0xc95910_0 .net "b", 0 0, L_0xd39710; 1 drivers +v0xc95990_0 .net "cin", 0 0, L_0xd398d0; 1 drivers +v0xc95a10_0 .net "cout", 0 0, L_0xd3b180; 1 drivers +v0xc95a90_0 .net "cout_ADD", 0 0, L_0xd392f0; 1 drivers +v0xc95b70_0 .net "cout_SLT", 0 0, L_0xd3a510; 1 drivers +v0xc95bf0_0 .net "cout_SUB", 0 0, L_0xd39c80; 1 drivers +v0xc95c70_0 .net "muxCout", 7 0, L_0xd38180; 1 drivers +v0xc95d20_0 .net "muxRes", 7 0, L_0xd3a9c0; 1 drivers +v0xc95e50_0 .alias "op", 2 0, v0xcec110_0; +v0xc95ed0_0 .net "out", 0 0, L_0xd38450; 1 drivers +v0xc95da0_0 .net "res_ADD", 0 0, L_0xc97500; 1 drivers +v0xc96040_0 .net "res_AND", 0 0, L_0xd3a6e0; 1 drivers +v0xc95f50_0 .net "res_NAND", 0 0, L_0xd3a7a0; 1 drivers +v0xc96160_0 .net "res_NOR", 0 0, L_0xd3a860; 1 drivers +v0xc960c0_0 .net "res_OR", 0 0, L_0xd3a920; 1 drivers +v0xc96290_0 .net "res_SLT", 0 0, L_0xd39fb0; 1 drivers +v0xc96210_0 .net "res_SUB", 0 0, L_0xd39530; 1 drivers +v0xc96400_0 .net "res_XOR", 0 0, L_0xd39e10; 1 drivers +LS_0xd3a9c0_0_0 .concat [ 1 1 1 1], L_0xc97500, L_0xd39530, L_0xd39e10, L_0xd39fb0; +LS_0xd3a9c0_0_4 .concat [ 1 1 1 1], L_0xd3a6e0, L_0xd3a7a0, L_0xd3a860, L_0xd3a920; +L_0xd3a9c0 .concat [ 4 4 0 0], LS_0xd3a9c0_0_0, LS_0xd3a9c0_0_4; +LS_0xd38180_0_0 .concat [ 1 1 1 1], L_0xd392f0, L_0xd39c80, C4<0>, L_0xd3a510; +LS_0xd38180_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd38180 .concat [ 4 4 0 0], LS_0xd38180_0_0, LS_0xd38180_0_4; +S_0xc94cb0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc938e0; + .timescale 0 0; +L_0xc98c50/d .functor XOR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xc98c50 .delay (30,30,30) L_0xc98c50/d; +L_0xc97500/d .functor XOR 1, L_0xc98c50, L_0xd398d0, C4<0>, C4<0>; +L_0xc97500 .delay (30,30,30) L_0xc97500/d; +L_0xd38940/d .functor AND 1, L_0xd38dc0, L_0xd39710, C4<1>, C4<1>; +L_0xd38940 .delay (30,30,30) L_0xd38940/d; +L_0xd38a00/d .functor OR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xd38a00 .delay (30,30,30) L_0xd38a00/d; +L_0xd38ac0/d .functor NOT 1, L_0xd398d0, C4<0>, C4<0>, C4<0>; +L_0xd38ac0 .delay (10,10,10) L_0xd38ac0/d; +L_0xd36c40/d .functor AND 1, L_0xd38940, L_0xd38ac0, C4<1>, C4<1>; +L_0xd36c40 .delay (30,30,30) L_0xd36c40/d; +L_0xd39200/d .functor AND 1, L_0xd38a00, L_0xd398d0, C4<1>, C4<1>; +L_0xd39200 .delay (30,30,30) L_0xd39200/d; +L_0xd392f0/d .functor OR 1, L_0xd36c40, L_0xd39200, C4<0>, C4<0>; +L_0xd392f0 .delay (30,30,30) L_0xd392f0/d; +v0xc94da0_0 .net "_carryin", 0 0, L_0xd38ac0; 1 drivers +v0xc94e60_0 .alias "a", 0 0, v0xc95890_0; +v0xc94ee0_0 .net "aandb", 0 0, L_0xd38940; 1 drivers +v0xc94f80_0 .net "aorb", 0 0, L_0xd38a00; 1 drivers +v0xc95000_0 .alias "b", 0 0, v0xc95910_0; +v0xc950d0_0 .alias "carryin", 0 0, v0xc95990_0; +v0xc951a0_0 .alias "carryout", 0 0, v0xc95a90_0; +v0xc95240_0 .net "outputIfCarryin", 0 0, L_0xd36c40; 1 drivers +v0xc95330_0 .net "outputIf_Carryin", 0 0, L_0xd39200; 1 drivers +v0xc953d0_0 .net "s", 0 0, L_0xc98c50; 1 drivers +v0xc954d0_0 .alias "sum", 0 0, v0xc95da0_0; +S_0xc94550 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc938e0; + .timescale 0 0; +L_0xd394d0/d .functor XOR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xd394d0 .delay (30,30,30) L_0xd394d0/d; +L_0xd39530/d .functor XOR 1, L_0xd394d0, L_0xd398d0, C4<0>, C4<0>; +L_0xd39530 .delay (30,30,30) L_0xd39530/d; +L_0xd39690/d .functor NOT 1, L_0xd38dc0, C4<0>, C4<0>, C4<0>; +L_0xd39690 .delay (10,10,10) L_0xd39690/d; +L_0xd39820/d .functor AND 1, L_0xd39690, L_0xd39710, C4<1>, C4<1>; +L_0xd39820 .delay (30,30,30) L_0xd39820/d; +L_0xd399e0/d .functor NOT 1, L_0xd394d0, C4<0>, C4<0>, C4<0>; +L_0xd399e0 .delay (10,10,10) L_0xd399e0/d; +L_0xd39a80/d .functor AND 1, L_0xd399e0, L_0xd398d0, C4<1>, C4<1>; +L_0xd39a80 .delay (30,30,30) L_0xd39a80/d; +L_0xd39c80/d .functor OR 1, L_0xd39820, L_0xd39a80, C4<0>, C4<0>; +L_0xd39c80 .delay (30,30,30) L_0xd39c80/d; +v0xc94640_0 .alias "a", 0 0, v0xc95890_0; +v0xc946e0_0 .net "axorb", 0 0, L_0xd394d0; 1 drivers +v0xc94760_0 .alias "b", 0 0, v0xc95910_0; +v0xc94810_0 .alias "borrowin", 0 0, v0xc95990_0; +v0xc948f0_0 .alias "borrowout", 0 0, v0xc95bf0_0; +v0xc94970_0 .alias "diff", 0 0, v0xc96210_0; +v0xc949f0_0 .net "nota", 0 0, L_0xd39690; 1 drivers +v0xc94a70_0 .net "notaandb", 0 0, L_0xd39820; 1 drivers +v0xc94b10_0 .net "notaxorb", 0 0, L_0xd399e0; 1 drivers +v0xc94bb0_0 .net "notaxorbandborrowin", 0 0, L_0xd39a80; 1 drivers +S_0xc93e30 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc938e0; + .timescale 0 0; +L_0xd39ed0/d .functor XOR 1, L_0xd38dc0, L_0xd39710, C4<0>, C4<0>; +L_0xd39ed0 .delay (30,30,30) L_0xd39ed0/d; +L_0xd39fb0/d .functor XOR 1, L_0xd39ed0, L_0xd398d0, C4<0>, C4<0>; +L_0xd39fb0 .delay (30,30,30) L_0xd39fb0/d; +L_0xd3a150/d .functor NOT 1, L_0xd38dc0, C4<0>, C4<0>, C4<0>; +L_0xd3a150 .delay (10,10,10) L_0xd3a150/d; +L_0xd3a210/d .functor AND 1, L_0xd3a150, L_0xd39710, C4<1>, C4<1>; +L_0xd3a210 .delay (30,30,30) L_0xd3a210/d; +L_0xd3a320/d .functor NOT 1, L_0xd39ed0, C4<0>, C4<0>, C4<0>; +L_0xd3a320 .delay (10,10,10) L_0xd3a320/d; +L_0xd3a3c0/d .functor AND 1, L_0xd3a320, L_0xd398d0, C4<1>, C4<1>; +L_0xd3a3c0 .delay (30,30,30) L_0xd3a3c0/d; +L_0xd3a510/d .functor OR 1, L_0xd3a210, L_0xd3a3c0, C4<0>, C4<0>; +L_0xd3a510 .delay (30,30,30) L_0xd3a510/d; +v0xc93f20_0 .alias "a", 0 0, v0xc95890_0; +v0xc93fa0_0 .net "axorb", 0 0, L_0xd39ed0; 1 drivers +v0xc94040_0 .alias "b", 0 0, v0xc95910_0; +v0xc940e0_0 .alias "borrowin", 0 0, v0xc95990_0; +v0xc94190_0 .alias "borrowout", 0 0, v0xc95b70_0; +v0xc94230_0 .alias "diff", 0 0, v0xc96290_0; +v0xc942d0_0 .net "nota", 0 0, L_0xd3a150; 1 drivers +v0xc94370_0 .net "notaandb", 0 0, L_0xd3a210; 1 drivers +v0xc94410_0 .net "notaxorb", 0 0, L_0xd3a320; 1 drivers +v0xc944b0_0 .net "notaxorbandborrowin", 0 0, L_0xd3a3c0; 1 drivers +S_0xc93bc0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc938e0; + .timescale 0 0; +v0xc93cb0_0 .alias "address", 2 0, v0xcec110_0; +v0xc93d30_0 .alias "inputs", 7 0, v0xc95d20_0; +v0xc93db0_0 .alias "out", 0 0, v0xc95ed0_0; +L_0xd38450 .part/v L_0xd3a9c0, C4, 1; +S_0xc939d0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc938e0; + .timescale 0 0; +v0xc936a0_0 .alias "address", 2 0, v0xcec110_0; +v0xc93ac0_0 .alias "inputs", 7 0, v0xc95c70_0; +v0xc93b40_0 .alias "out", 0 0, v0xc95a10_0; +L_0xd3b180 .part/v L_0xd38180, C4, 1; +S_0xc90c70 .scope module, "a29" "ALU1bit" 2 61, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd3c9b0/d .functor XOR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xd3c9b0 .delay (30,30,30) L_0xd3c9b0/d; +L_0xd3d2a0/d .functor AND 1, L_0xd3bab0, L_0xd3bd60, C4<1>, C4<1>; +L_0xd3d2a0 .delay (30,30,30) L_0xd3d2a0/d; +L_0xd3d360/d .functor NAND 1, L_0xd3bab0, L_0xd3bd60, C4<1>, C4<1>; +L_0xd3d360 .delay (20,20,20) L_0xd3d360/d; +L_0xd3d420/d .functor NOR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xd3d420 .delay (20,20,20) L_0xd3d420/d; +L_0xd3d4e0/d .functor OR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xd3d4e0 .delay (30,30,30) L_0xd3d4e0/d; +v0xc92900_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc929c0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc92a60_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc92b00_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc92b80_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc92c20_0 .net "a", 0 0, L_0xd3bab0; 1 drivers +v0xc92ca0_0 .net "b", 0 0, L_0xd3bd60; 1 drivers +v0xc92d20_0 .net "cin", 0 0, L_0xd3c2f0; 1 drivers +v0xc92da0_0 .net "cout", 0 0, L_0xd3dd80; 1 drivers +v0xc92e20_0 .net "cout_ADD", 0 0, L_0xd3bf00; 1 drivers +v0xc92f00_0 .net "cout_SLT", 0 0, L_0xd3d0d0; 1 drivers +v0xc92f80_0 .net "cout_SUB", 0 0, L_0xd3c800; 1 drivers +v0xc93000_0 .net "muxCout", 7 0, L_0xd3add0; 1 drivers +v0xc930b0_0 .net "muxRes", 7 0, L_0xd3d580; 1 drivers +v0xc931e0_0 .alias "op", 2 0, v0xcec110_0; +v0xc93260_0 .net "out", 0 0, L_0xd3b0a0; 1 drivers +v0xc93130_0 .net "res_ADD", 0 0, L_0xc94890; 1 drivers +v0xc933d0_0 .net "res_AND", 0 0, L_0xd3d2a0; 1 drivers +v0xc932e0_0 .net "res_NAND", 0 0, L_0xd3d360; 1 drivers +v0xc934f0_0 .net "res_NOR", 0 0, L_0xd3d420; 1 drivers +v0xc93450_0 .net "res_OR", 0 0, L_0xd3d4e0; 1 drivers +v0xc93620_0 .net "res_SLT", 0 0, L_0xd3cb70; 1 drivers +v0xc935a0_0 .net "res_SUB", 0 0, L_0xd3c130; 1 drivers +v0xc93790_0 .net "res_XOR", 0 0, L_0xd3c9b0; 1 drivers +LS_0xd3d580_0_0 .concat [ 1 1 1 1], L_0xc94890, L_0xd3c130, L_0xd3c9b0, L_0xd3cb70; +LS_0xd3d580_0_4 .concat [ 1 1 1 1], L_0xd3d2a0, L_0xd3d360, L_0xd3d420, L_0xd3d4e0; +L_0xd3d580 .concat [ 4 4 0 0], LS_0xd3d580_0_0, LS_0xd3d580_0_4; +LS_0xd3add0_0_0 .concat [ 1 1 1 1], L_0xd3bf00, L_0xd3c800, C4<0>, L_0xd3d0d0; +LS_0xd3add0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd3add0 .concat [ 4 4 0 0], LS_0xd3add0_0_0, LS_0xd3add0_0_4; +S_0xc92040 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc90c70; + .timescale 0 0; +L_0xc95fe0/d .functor XOR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xc95fe0 .delay (30,30,30) L_0xc95fe0/d; +L_0xc94890/d .functor XOR 1, L_0xc95fe0, L_0xd3c2f0, C4<0>, C4<0>; +L_0xc94890 .delay (30,30,30) L_0xc94890/d; +L_0xd3b4c0/d .functor AND 1, L_0xd3bab0, L_0xd3bd60, C4<1>, C4<1>; +L_0xd3b4c0 .delay (30,30,30) L_0xd3b4c0/d; +L_0xd3b580/d .functor OR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xd3b580 .delay (30,30,30) L_0xd3b580/d; +L_0xd3b640/d .functor NOT 1, L_0xd3c2f0, C4<0>, C4<0>, C4<0>; +L_0xd3b640 .delay (10,10,10) L_0xd3b640/d; +L_0xd3b6e0/d .functor AND 1, L_0xd3b4c0, L_0xd3b640, C4<1>, C4<1>; +L_0xd3b6e0 .delay (30,30,30) L_0xd3b6e0/d; +L_0xd39970/d .functor AND 1, L_0xd3b580, L_0xd3c2f0, C4<1>, C4<1>; +L_0xd39970 .delay (30,30,30) L_0xd39970/d; +L_0xd3bf00/d .functor OR 1, L_0xd3b6e0, L_0xd39970, C4<0>, C4<0>; +L_0xd3bf00 .delay (30,30,30) L_0xd3bf00/d; +v0xc92130_0 .net "_carryin", 0 0, L_0xd3b640; 1 drivers +v0xc921f0_0 .alias "a", 0 0, v0xc92c20_0; +v0xc92270_0 .net "aandb", 0 0, L_0xd3b4c0; 1 drivers +v0xc92310_0 .net "aorb", 0 0, L_0xd3b580; 1 drivers +v0xc92390_0 .alias "b", 0 0, v0xc92ca0_0; +v0xc92460_0 .alias "carryin", 0 0, v0xc92d20_0; +v0xc92530_0 .alias "carryout", 0 0, v0xc92e20_0; +v0xc925d0_0 .net "outputIfCarryin", 0 0, L_0xd3b6e0; 1 drivers +v0xc926c0_0 .net "outputIf_Carryin", 0 0, L_0xd39970; 1 drivers +v0xc92760_0 .net "s", 0 0, L_0xc95fe0; 1 drivers +v0xc92860_0 .alias "sum", 0 0, v0xc93130_0; +S_0xc918e0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc90c70; + .timescale 0 0; +L_0xd3c090/d .functor XOR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xd3c090 .delay (30,30,30) L_0xd3c090/d; +L_0xd3c130/d .functor XOR 1, L_0xd3c090, L_0xd3c2f0, C4<0>, C4<0>; +L_0xd3c130 .delay (30,30,30) L_0xd3c130/d; +L_0xd3c270/d .functor NOT 1, L_0xd3bab0, C4<0>, C4<0>, C4<0>; +L_0xd3c270 .delay (10,10,10) L_0xd3c270/d; +L_0xd3c400/d .functor AND 1, L_0xd3c270, L_0xd3bd60, C4<1>, C4<1>; +L_0xd3c400 .delay (30,30,30) L_0xd3c400/d; +L_0xd39130/d .functor NOT 1, L_0xd3c090, C4<0>, C4<0>, C4<0>; +L_0xd39130 .delay (10,10,10) L_0xd39130/d; +L_0xd3c600/d .functor AND 1, L_0xd39130, L_0xd3c2f0, C4<1>, C4<1>; +L_0xd3c600 .delay (30,30,30) L_0xd3c600/d; +L_0xd3c800/d .functor OR 1, L_0xd3c400, L_0xd3c600, C4<0>, C4<0>; +L_0xd3c800 .delay (30,30,30) L_0xd3c800/d; +v0xc919d0_0 .alias "a", 0 0, v0xc92c20_0; +v0xc91a70_0 .net "axorb", 0 0, L_0xd3c090; 1 drivers +v0xc91af0_0 .alias "b", 0 0, v0xc92ca0_0; +v0xc91ba0_0 .alias "borrowin", 0 0, v0xc92d20_0; +v0xc91c80_0 .alias "borrowout", 0 0, v0xc92f80_0; +v0xc91d00_0 .alias "diff", 0 0, v0xc935a0_0; +v0xc91d80_0 .net "nota", 0 0, L_0xd3c270; 1 drivers +v0xc91e00_0 .net "notaandb", 0 0, L_0xd3c400; 1 drivers +v0xc91ea0_0 .net "notaxorb", 0 0, L_0xd39130; 1 drivers +v0xc91f40_0 .net "notaxorbandborrowin", 0 0, L_0xd3c600; 1 drivers +S_0xc911c0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc90c70; + .timescale 0 0; +L_0xd3ca90/d .functor XOR 1, L_0xd3bab0, L_0xd3bd60, C4<0>, C4<0>; +L_0xd3ca90 .delay (30,30,30) L_0xd3ca90/d; +L_0xd3cb70/d .functor XOR 1, L_0xd3ca90, L_0xd3c2f0, C4<0>, C4<0>; +L_0xd3cb70 .delay (30,30,30) L_0xd3cb70/d; +L_0xd3cd10/d .functor NOT 1, L_0xd3bab0, C4<0>, C4<0>, C4<0>; +L_0xd3cd10 .delay (10,10,10) L_0xd3cd10/d; +L_0xd3cdd0/d .functor AND 1, L_0xd3cd10, L_0xd3bd60, C4<1>, C4<1>; +L_0xd3cdd0 .delay (30,30,30) L_0xd3cdd0/d; +L_0xd3cee0/d .functor NOT 1, L_0xd3ca90, C4<0>, C4<0>, C4<0>; +L_0xd3cee0 .delay (10,10,10) L_0xd3cee0/d; +L_0xd3cf80/d .functor AND 1, L_0xd3cee0, L_0xd3c2f0, C4<1>, C4<1>; +L_0xd3cf80 .delay (30,30,30) L_0xd3cf80/d; +L_0xd3d0d0/d .functor OR 1, L_0xd3cdd0, L_0xd3cf80, C4<0>, C4<0>; +L_0xd3d0d0 .delay (30,30,30) L_0xd3d0d0/d; +v0xc912b0_0 .alias "a", 0 0, v0xc92c20_0; +v0xc91330_0 .net "axorb", 0 0, L_0xd3ca90; 1 drivers +v0xc913d0_0 .alias "b", 0 0, v0xc92ca0_0; +v0xc91470_0 .alias "borrowin", 0 0, v0xc92d20_0; +v0xc91520_0 .alias "borrowout", 0 0, v0xc92f00_0; +v0xc915c0_0 .alias "diff", 0 0, v0xc93620_0; +v0xc91660_0 .net "nota", 0 0, L_0xd3cd10; 1 drivers +v0xc91700_0 .net "notaandb", 0 0, L_0xd3cdd0; 1 drivers +v0xc917a0_0 .net "notaxorb", 0 0, L_0xd3cee0; 1 drivers +v0xc91840_0 .net "notaxorbandborrowin", 0 0, L_0xd3cf80; 1 drivers +S_0xc90f50 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc90c70; + .timescale 0 0; +v0xc91040_0 .alias "address", 2 0, v0xcec110_0; +v0xc910c0_0 .alias "inputs", 7 0, v0xc930b0_0; +v0xc91140_0 .alias "out", 0 0, v0xc93260_0; +L_0xd3b0a0 .part/v L_0xd3d580, C4, 1; +S_0xc90d60 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc90c70; + .timescale 0 0; +v0xc90a30_0 .alias "address", 2 0, v0xcec110_0; +v0xc90e50_0 .alias "inputs", 7 0, v0xc93000_0; +v0xc90ed0_0 .alias "out", 0 0, v0xc92da0_0; +L_0xd3dd80 .part/v L_0xd3add0, C4, 1; +S_0xc8e000 .scope module, "a30" "ALU1bit" 2 62, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd3f5a0/d .functor XOR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xd3f5a0 .delay (30,30,30) L_0xd3f5a0/d; +L_0xd3fe70/d .functor AND 1, L_0xd3e5a0, L_0xd3eea0, C4<1>, C4<1>; +L_0xd3fe70 .delay (30,30,30) L_0xd3fe70/d; +L_0xd3ff30/d .functor NAND 1, L_0xd3e5a0, L_0xd3eea0, C4<1>, C4<1>; +L_0xd3ff30 .delay (20,20,20) L_0xd3ff30/d; +L_0xd3fff0/d .functor NOR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xd3fff0 .delay (20,20,20) L_0xd3fff0/d; +L_0xd400b0/d .functor OR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xd400b0 .delay (30,30,30) L_0xd400b0/d; +v0xc8fc90_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc8fd50_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc8fdf0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc8fe90_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc8ff10_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc8ffb0_0 .net "a", 0 0, L_0xd3e5a0; 1 drivers +v0xc90030_0 .net "b", 0 0, L_0xd3eea0; 1 drivers +v0xc900b0_0 .net "cin", 0 0, L_0xd3f060; 1 drivers +v0xc90130_0 .net "cout", 0 0, L_0xd40960; 1 drivers +v0xc901b0_0 .net "cout_ADD", 0 0, L_0xd3eac0; 1 drivers +v0xc90290_0 .net "cout_SLT", 0 0, L_0xd3fca0; 1 drivers +v0xc90310_0 .net "cout_SUB", 0 0, L_0xd3f410; 1 drivers +v0xc90390_0 .net "muxCout", 7 0, L_0xd3d910; 1 drivers +v0xc90440_0 .net "muxRes", 7 0, L_0xd40150; 1 drivers +v0xc90570_0 .alias "op", 2 0, v0xcec110_0; +v0xc905f0_0 .net "out", 0 0, L_0xd3dbe0; 1 drivers +v0xc904c0_0 .net "res_ADD", 0 0, L_0xc91c20; 1 drivers +v0xc90760_0 .net "res_AND", 0 0, L_0xd3fe70; 1 drivers +v0xc90670_0 .net "res_NAND", 0 0, L_0xd3ff30; 1 drivers +v0xc90880_0 .net "res_NOR", 0 0, L_0xd3fff0; 1 drivers +v0xc907e0_0 .net "res_OR", 0 0, L_0xd400b0; 1 drivers +v0xc909b0_0 .net "res_SLT", 0 0, L_0xd3f740; 1 drivers +v0xc90930_0 .net "res_SUB", 0 0, L_0xd3ed00; 1 drivers +v0xc90b20_0 .net "res_XOR", 0 0, L_0xd3f5a0; 1 drivers +LS_0xd40150_0_0 .concat [ 1 1 1 1], L_0xc91c20, L_0xd3ed00, L_0xd3f5a0, L_0xd3f740; +LS_0xd40150_0_4 .concat [ 1 1 1 1], L_0xd3fe70, L_0xd3ff30, L_0xd3fff0, L_0xd400b0; +L_0xd40150 .concat [ 4 4 0 0], LS_0xd40150_0_0, LS_0xd40150_0_4; +LS_0xd3d910_0_0 .concat [ 1 1 1 1], L_0xd3eac0, L_0xd3f410, C4<0>, L_0xd3fca0; +LS_0xd3d910_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd3d910 .concat [ 4 4 0 0], LS_0xd3d910_0_0, LS_0xd3d910_0_4; +S_0xc8f3d0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc8e000; + .timescale 0 0; +L_0xc93370/d .functor XOR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xc93370 .delay (30,30,30) L_0xc93370/d; +L_0xc91c20/d .functor XOR 1, L_0xc93370, L_0xd3f060, C4<0>, C4<0>; +L_0xc91c20 .delay (30,30,30) L_0xc91c20/d; +L_0xd3e0f0/d .functor AND 1, L_0xd3e5a0, L_0xd3eea0, C4<1>, C4<1>; +L_0xd3e0f0 .delay (30,30,30) L_0xd3e0f0/d; +L_0xd3e1b0/d .functor OR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xd3e1b0 .delay (30,30,30) L_0xd3e1b0/d; +L_0xd3e270/d .functor NOT 1, L_0xd3f060, C4<0>, C4<0>, C4<0>; +L_0xd3e270 .delay (10,10,10) L_0xd3e270/d; +L_0xd3be00/d .functor AND 1, L_0xd3e0f0, L_0xd3e270, C4<1>, C4<1>; +L_0xd3be00 .delay (30,30,30) L_0xd3be00/d; +L_0xd3e310/d .functor AND 1, L_0xd3e1b0, L_0xd3f060, C4<1>, C4<1>; +L_0xd3e310 .delay (30,30,30) L_0xd3e310/d; +L_0xd3eac0/d .functor OR 1, L_0xd3be00, L_0xd3e310, C4<0>, C4<0>; +L_0xd3eac0 .delay (30,30,30) L_0xd3eac0/d; +v0xc8f4c0_0 .net "_carryin", 0 0, L_0xd3e270; 1 drivers +v0xc8f580_0 .alias "a", 0 0, v0xc8ffb0_0; +v0xc8f600_0 .net "aandb", 0 0, L_0xd3e0f0; 1 drivers +v0xc8f6a0_0 .net "aorb", 0 0, L_0xd3e1b0; 1 drivers +v0xc8f720_0 .alias "b", 0 0, v0xc90030_0; +v0xc8f7f0_0 .alias "carryin", 0 0, v0xc900b0_0; +v0xc8f8c0_0 .alias "carryout", 0 0, v0xc901b0_0; +v0xc8f960_0 .net "outputIfCarryin", 0 0, L_0xd3be00; 1 drivers +v0xc8fa50_0 .net "outputIf_Carryin", 0 0, L_0xd3e310; 1 drivers +v0xc8faf0_0 .net "s", 0 0, L_0xc93370; 1 drivers +v0xc8fbf0_0 .alias "sum", 0 0, v0xc904c0_0; +S_0xc8ec70 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc8e000; + .timescale 0 0; +L_0xd3eca0/d .functor XOR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xd3eca0 .delay (30,30,30) L_0xd3eca0/d; +L_0xd3ed00/d .functor XOR 1, L_0xd3eca0, L_0xd3f060, C4<0>, C4<0>; +L_0xd3ed00 .delay (30,30,30) L_0xd3ed00/d; +L_0xd3ee40/d .functor NOT 1, L_0xd3e5a0, C4<0>, C4<0>, C4<0>; +L_0xd3ee40 .delay (10,10,10) L_0xd3ee40/d; +L_0xd3efb0/d .functor AND 1, L_0xd3ee40, L_0xd3eea0, C4<1>, C4<1>; +L_0xd3efb0 .delay (30,30,30) L_0xd3efb0/d; +L_0xd3f170/d .functor NOT 1, L_0xd3eca0, C4<0>, C4<0>, C4<0>; +L_0xd3f170 .delay (10,10,10) L_0xd3f170/d; +L_0xd3f210/d .functor AND 1, L_0xd3f170, L_0xd3f060, C4<1>, C4<1>; +L_0xd3f210 .delay (30,30,30) L_0xd3f210/d; +L_0xd3f410/d .functor OR 1, L_0xd3efb0, L_0xd3f210, C4<0>, C4<0>; +L_0xd3f410 .delay (30,30,30) L_0xd3f410/d; +v0xc8ed60_0 .alias "a", 0 0, v0xc8ffb0_0; +v0xc8ee00_0 .net "axorb", 0 0, L_0xd3eca0; 1 drivers +v0xc8ee80_0 .alias "b", 0 0, v0xc90030_0; +v0xc8ef30_0 .alias "borrowin", 0 0, v0xc900b0_0; +v0xc8f010_0 .alias "borrowout", 0 0, v0xc90310_0; +v0xc8f090_0 .alias "diff", 0 0, v0xc90930_0; +v0xc8f110_0 .net "nota", 0 0, L_0xd3ee40; 1 drivers +v0xc8f190_0 .net "notaandb", 0 0, L_0xd3efb0; 1 drivers +v0xc8f230_0 .net "notaxorb", 0 0, L_0xd3f170; 1 drivers +v0xc8f2d0_0 .net "notaxorbandborrowin", 0 0, L_0xd3f210; 1 drivers +S_0xc8e550 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc8e000; + .timescale 0 0; +L_0xd3f660/d .functor XOR 1, L_0xd3e5a0, L_0xd3eea0, C4<0>, C4<0>; +L_0xd3f660 .delay (30,30,30) L_0xd3f660/d; +L_0xd3f740/d .functor XOR 1, L_0xd3f660, L_0xd3f060, C4<0>, C4<0>; +L_0xd3f740 .delay (30,30,30) L_0xd3f740/d; +L_0xd3f8e0/d .functor NOT 1, L_0xd3e5a0, C4<0>, C4<0>, C4<0>; +L_0xd3f8e0 .delay (10,10,10) L_0xd3f8e0/d; +L_0xd3f9a0/d .functor AND 1, L_0xd3f8e0, L_0xd3eea0, C4<1>, C4<1>; +L_0xd3f9a0 .delay (30,30,30) L_0xd3f9a0/d; +L_0xd3fab0/d .functor NOT 1, L_0xd3f660, C4<0>, C4<0>, C4<0>; +L_0xd3fab0 .delay (10,10,10) L_0xd3fab0/d; +L_0xd3fb50/d .functor AND 1, L_0xd3fab0, L_0xd3f060, C4<1>, C4<1>; +L_0xd3fb50 .delay (30,30,30) L_0xd3fb50/d; +L_0xd3fca0/d .functor OR 1, L_0xd3f9a0, L_0xd3fb50, C4<0>, C4<0>; +L_0xd3fca0 .delay (30,30,30) L_0xd3fca0/d; +v0xc8e640_0 .alias "a", 0 0, v0xc8ffb0_0; +v0xc8e6c0_0 .net "axorb", 0 0, L_0xd3f660; 1 drivers +v0xc8e760_0 .alias "b", 0 0, v0xc90030_0; +v0xc8e800_0 .alias "borrowin", 0 0, v0xc900b0_0; +v0xc8e8b0_0 .alias "borrowout", 0 0, v0xc90290_0; +v0xc8e950_0 .alias "diff", 0 0, v0xc909b0_0; +v0xc8e9f0_0 .net "nota", 0 0, L_0xd3f8e0; 1 drivers +v0xc8ea90_0 .net "notaandb", 0 0, L_0xd3f9a0; 1 drivers +v0xc8eb30_0 .net "notaxorb", 0 0, L_0xd3fab0; 1 drivers +v0xc8ebd0_0 .net "notaxorbandborrowin", 0 0, L_0xd3fb50; 1 drivers +S_0xc8e2e0 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc8e000; + .timescale 0 0; +v0xc8e3d0_0 .alias "address", 2 0, v0xcec110_0; +v0xc8e450_0 .alias "inputs", 7 0, v0xc90440_0; +v0xc8e4d0_0 .alias "out", 0 0, v0xc905f0_0; +L_0xd3dbe0 .part/v L_0xd40150, C4, 1; +S_0xc8e0f0 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc8e000; + .timescale 0 0; +v0xc8ddc0_0 .alias "address", 2 0, v0xcec110_0; +v0xc8e1e0_0 .alias "inputs", 7 0, v0xc90390_0; +v0xc8e260_0 .alias "out", 0 0, v0xc90130_0; +L_0xd40960 .part/v L_0xd3d910, C4, 1; +S_0xc8b630 .scope module, "a31" "ALU1bit" 2 63, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd42120/d .functor XOR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xd42120 .delay (30,30,30) L_0xd42120/d; +L_0xd42950/d .functor AND 1, L_0xd41290, L_0xd41a80, C4<1>, C4<1>; +L_0xd42950 .delay (30,30,30) L_0xd42950/d; +L_0xd42a10/d .functor NAND 1, L_0xd41290, L_0xd41a80, C4<1>, C4<1>; +L_0xd42a10 .delay (20,20,20) L_0xd42a10/d; +L_0xd42ad0/d .functor NOR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xd42ad0 .delay (20,20,20) L_0xd42ad0/d; +L_0xd42b90/d .functor OR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xd42b90 .delay (30,30,30) L_0xd42b90/d; +v0xc8cff0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc8d0b0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc8d150_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc8d1f0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc8d270_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc8d310_0 .net "a", 0 0, L_0xd41290; 1 drivers +v0xc8d390_0 .net "b", 0 0, L_0xd41a80; 1 drivers +v0xc8d410_0 .net "cin", 0 0, L_0xd41c40; 1 drivers +v0xc8d490_0 .net "cout", 0 0, L_0xd43430; 1 drivers +v0xc8d510_0 .net "cout_ADD", 0 0, L_0xd416a0; 1 drivers +v0xc8d5f0_0 .net "cout_SLT", 0 0, L_0xd42780; 1 drivers +v0xc8d670_0 .net "cout_SUB", 0 0, L_0xd41f90; 1 drivers +v0xc8d720_0 .net "muxCout", 7 0, L_0xd40560; 1 drivers +v0xc8d7d0_0 .net "muxRes", 7 0, L_0xd42c30; 1 drivers +v0xc8d900_0 .alias "op", 2 0, v0xcec110_0; +v0xc8d980_0 .net "out", 0 0, L_0xd40830; 1 drivers +v0xc8d850_0 .net "res_ADD", 0 0, L_0xc8efb0; 1 drivers +v0xc8daf0_0 .net "res_AND", 0 0, L_0xd42950; 1 drivers +v0xc8da00_0 .net "res_NAND", 0 0, L_0xd42a10; 1 drivers +v0xc8dc10_0 .net "res_NOR", 0 0, L_0xd42ad0; 1 drivers +v0xc8db70_0 .net "res_OR", 0 0, L_0xd42b90; 1 drivers +v0xc8dd40_0 .net "res_SLT", 0 0, L_0xd42260; 1 drivers +v0xc8dcc0_0 .net "res_SUB", 0 0, L_0xd418e0; 1 drivers +v0xc8deb0_0 .net "res_XOR", 0 0, L_0xd42120; 1 drivers +LS_0xd42c30_0_0 .concat [ 1 1 1 1], L_0xc8efb0, L_0xd418e0, L_0xd42120, L_0xd42260; +LS_0xd42c30_0_4 .concat [ 1 1 1 1], L_0xd42950, L_0xd42a10, L_0xd42ad0, L_0xd42b90; +L_0xd42c30 .concat [ 4 4 0 0], LS_0xd42c30_0_0, LS_0xd42c30_0_4; +LS_0xd40560_0_0 .concat [ 1 1 1 1], L_0xd416a0, L_0xd41f90, C4<0>, L_0xd42780; +LS_0xd40560_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd40560 .concat [ 4 4 0 0], LS_0xd40560_0_0, LS_0xd40560_0_4; +S_0xc8c760 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc8b630; + .timescale 0 0; +L_0xc90700/d .functor XOR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xc90700 .delay (30,30,30) L_0xc90700/d; +L_0xc8efb0/d .functor XOR 1, L_0xc90700, L_0xd41c40, C4<0>, C4<0>; +L_0xc8efb0 .delay (30,30,30) L_0xc8efb0/d; +L_0xd40c10/d .functor AND 1, L_0xd41290, L_0xd41a80, C4<1>, C4<1>; +L_0xd40c10 .delay (30,30,30) L_0xd40c10/d; +L_0xd40cf0/d .functor OR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xd40cf0 .delay (30,30,30) L_0xd40cf0/d; +L_0xd40db0/d .functor NOT 1, L_0xd41c40, C4<0>, C4<0>, C4<0>; +L_0xd40db0 .delay (10,10,10) L_0xd40db0/d; +L_0xd40e50/d .functor AND 1, L_0xd40c10, L_0xd40db0, C4<1>, C4<1>; +L_0xd40e50 .delay (30,30,30) L_0xd40e50/d; +L_0xd3ef40/d .functor AND 1, L_0xd40cf0, L_0xd41c40, C4<1>, C4<1>; +L_0xd3ef40 .delay (30,30,30) L_0xd3ef40/d; +L_0xd416a0/d .functor OR 1, L_0xd40e50, L_0xd3ef40, C4<0>, C4<0>; +L_0xd416a0 .delay (30,30,30) L_0xd416a0/d; +v0xc8c850_0 .net "_carryin", 0 0, L_0xd40db0; 1 drivers +v0xc8c8d0_0 .alias "a", 0 0, v0xc8d310_0; +v0xc8c950_0 .net "aandb", 0 0, L_0xd40c10; 1 drivers +v0xc8c9d0_0 .net "aorb", 0 0, L_0xd40cf0; 1 drivers +v0xc8ca80_0 .alias "b", 0 0, v0xc8d390_0; +v0xc8cb50_0 .alias "carryin", 0 0, v0xc8d410_0; +v0xc8cc20_0 .alias "carryout", 0 0, v0xc8d510_0; +v0xc8ccc0_0 .net "outputIfCarryin", 0 0, L_0xd40e50; 1 drivers +v0xc8cdb0_0 .net "outputIf_Carryin", 0 0, L_0xd3ef40; 1 drivers +v0xc8ce50_0 .net "s", 0 0, L_0xc90700; 1 drivers +v0xc8cf50_0 .alias "sum", 0 0, v0xc8d850_0; +S_0xc8c170 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc8b630; + .timescale 0 0; +L_0xd41880/d .functor XOR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xd41880 .delay (30,30,30) L_0xd41880/d; +L_0xd418e0/d .functor XOR 1, L_0xd41880, L_0xd41c40, C4<0>, C4<0>; +L_0xd418e0 .delay (30,30,30) L_0xd418e0/d; +L_0xd41a20/d .functor NOT 1, L_0xd41290, C4<0>, C4<0>, C4<0>; +L_0xd41a20 .delay (10,10,10) L_0xd41a20/d; +L_0xd41b90/d .functor AND 1, L_0xd41a20, L_0xd41a80, C4<1>, C4<1>; +L_0xd41b90 .delay (30,30,30) L_0xd41b90/d; +L_0xd3e910/d .functor NOT 1, L_0xd41880, C4<0>, C4<0>, C4<0>; +L_0xd3e910 .delay (10,10,10) L_0xd3e910/d; +L_0xd41d90/d .functor AND 1, L_0xd3e910, L_0xd41c40, C4<1>, C4<1>; +L_0xd41d90 .delay (30,30,30) L_0xd41d90/d; +L_0xd41f90/d .functor OR 1, L_0xd41b90, L_0xd41d90, C4<0>, C4<0>; +L_0xd41f90 .delay (30,30,30) L_0xd41f90/d; +v0xc8c260_0 .alias "a", 0 0, v0xc8d310_0; +v0xc8c2e0_0 .net "axorb", 0 0, L_0xd41880; 1 drivers +v0xc8c360_0 .alias "b", 0 0, v0xc8d390_0; +v0xc8c3e0_0 .alias "borrowin", 0 0, v0xc8d410_0; +v0xc8c460_0 .alias "borrowout", 0 0, v0xc8d670_0; +v0xc8c4e0_0 .alias "diff", 0 0, v0xc8dcc0_0; +v0xc8c560_0 .net "nota", 0 0, L_0xd41a20; 1 drivers +v0xc8c5e0_0 .net "notaandb", 0 0, L_0xd41b90; 1 drivers +v0xc8c660_0 .net "notaxorb", 0 0, L_0xd3e910; 1 drivers +v0xc8c6e0_0 .net "notaxorbandborrowin", 0 0, L_0xd41d90; 1 drivers +S_0xc8bb80 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc8b630; + .timescale 0 0; +L_0xd421c0/d .functor XOR 1, L_0xd41290, L_0xd41a80, C4<0>, C4<0>; +L_0xd421c0 .delay (30,30,30) L_0xd421c0/d; +L_0xd42260/d .functor XOR 1, L_0xd421c0, L_0xd41c40, C4<0>, C4<0>; +L_0xd42260 .delay (30,30,30) L_0xd42260/d; +L_0xd423a0/d .functor NOT 1, L_0xd41290, C4<0>, C4<0>, C4<0>; +L_0xd423a0 .delay (10,10,10) L_0xd423a0/d; +L_0xd42480/d .functor AND 1, L_0xd423a0, L_0xd41a80, C4<1>, C4<1>; +L_0xd42480 .delay (30,30,30) L_0xd42480/d; +L_0xd42590/d .functor NOT 1, L_0xd421c0, C4<0>, C4<0>, C4<0>; +L_0xd42590 .delay (10,10,10) L_0xd42590/d; +L_0xd42630/d .functor AND 1, L_0xd42590, L_0xd41c40, C4<1>, C4<1>; +L_0xd42630 .delay (30,30,30) L_0xd42630/d; +L_0xd42780/d .functor OR 1, L_0xd42480, L_0xd42630, C4<0>, C4<0>; +L_0xd42780 .delay (30,30,30) L_0xd42780/d; +v0xc8bc70_0 .alias "a", 0 0, v0xc8d310_0; +v0xc8bcf0_0 .net "axorb", 0 0, L_0xd421c0; 1 drivers +v0xc8bd70_0 .alias "b", 0 0, v0xc8d390_0; +v0xc8bdf0_0 .alias "borrowin", 0 0, v0xc8d410_0; +v0xc8be70_0 .alias "borrowout", 0 0, v0xc8d5f0_0; +v0xc8bef0_0 .alias "diff", 0 0, v0xc8dd40_0; +v0xc8bf70_0 .net "nota", 0 0, L_0xd423a0; 1 drivers +v0xc8bff0_0 .net "notaandb", 0 0, L_0xd42480; 1 drivers +v0xc8c070_0 .net "notaxorb", 0 0, L_0xd42590; 1 drivers +v0xc8c0f0_0 .net "notaxorbandborrowin", 0 0, L_0xd42630; 1 drivers +S_0xc8b910 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc8b630; + .timescale 0 0; +v0xc8ba00_0 .alias "address", 2 0, v0xcec110_0; +v0xc8ba80_0 .alias "inputs", 7 0, v0xc8d7d0_0; +v0xc8bb00_0 .alias "out", 0 0, v0xc8d980_0; +L_0xd40830 .part/v L_0xd42c30, C4, 1; +S_0xc8b720 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc8b630; + .timescale 0 0; +v0xc8b420_0 .alias "address", 2 0, v0xcec110_0; +v0xc8b810_0 .alias "inputs", 7 0, v0xc8d720_0; +v0xc8b890_0 .alias "out", 0 0, v0xc8d490_0; +L_0xd43430 .part/v L_0xd40560, C4, 1; +S_0xc88d90 .scope module, "a32" "ALU1bit" 2 64, 3 23, S_0xbb06d0; + .timescale 0 0; +L_0xd44cc0/d .functor XOR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xd44cc0 .delay (30,30,30) L_0xd44cc0/d; +L_0xd455b0/d .functor AND 1, L_0xd1a550, L_0xd445e0, C4<1>, C4<1>; +L_0xd455b0 .delay (30,30,30) L_0xd455b0/d; +L_0xd45670/d .functor NAND 1, L_0xd1a550, L_0xd445e0, C4<1>, C4<1>; +L_0xd45670 .delay (20,20,20) L_0xd45670/d; +L_0xd45730/d .functor NOR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xd45730 .delay (20,20,20) L_0xd45730/d; +L_0xd457f0/d .functor OR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xd457f0 .delay (30,30,30) L_0xd457f0/d; +v0xc8a840_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xc8a8c0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xc8a940_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xc8a9c0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xc8aa40_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xc8aac0_0 .net "a", 0 0, L_0xd1a550; 1 drivers +v0xc8ab40_0 .net "b", 0 0, L_0xd445e0; 1 drivers +v0xc8abc0_0 .net "cin", 0 0, L_0xd440b0; 1 drivers +v0xc8ac40_0 .alias "cout", 0 0, v0xceb7a0_0; +v0xc8acc0_0 .net "cout_ADD", 0 0, L_0xd44180; 1 drivers +v0xc8ad40_0 .net "cout_SLT", 0 0, L_0xd453e0; 1 drivers +v0xc8adc0_0 .net "cout_SUB", 0 0, L_0xd44b10; 1 drivers +v0xc8ae40_0 .net "muxCout", 7 0, L_0xd42f80; 1 drivers +v0xc8aec0_0 .net "muxRes", 7 0, L_0xd45890; 1 drivers +v0xc8afc0_0 .alias "op", 2 0, v0xcec110_0; +v0xc8b040_0 .net "out", 0 0, L_0xd43250; 1 drivers +v0xc8af40_0 .net "res_ADD", 0 0, L_0xb5d6f0; 1 drivers +v0xc8b150_0 .net "res_AND", 0 0, L_0xd455b0; 1 drivers +v0xc8b0c0_0 .net "res_NAND", 0 0, L_0xd45670; 1 drivers +v0xc8b270_0 .net "res_NOR", 0 0, L_0xd45730; 1 drivers +v0xc8b1d0_0 .net "res_OR", 0 0, L_0xd457f0; 1 drivers +v0xc8b3a0_0 .net "res_SLT", 0 0, L_0xd44e80; 1 drivers +v0xc8b2f0_0 .net "res_SUB", 0 0, L_0xd443e0; 1 drivers +v0xc8b4e0_0 .net "res_XOR", 0 0, L_0xd44cc0; 1 drivers +LS_0xd45890_0_0 .concat [ 1 1 1 1], L_0xb5d6f0, L_0xd443e0, L_0xd44cc0, L_0xd44e80; +LS_0xd45890_0_4 .concat [ 1 1 1 1], L_0xd455b0, L_0xd45670, L_0xd45730, L_0xd457f0; +L_0xd45890 .concat [ 4 4 0 0], LS_0xd45890_0_0, LS_0xd45890_0_4; +LS_0xd42f80_0_0 .concat [ 1 1 1 1], L_0xd44180, L_0xd44b10, C4<0>, L_0xd453e0; +LS_0xd42f80_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xd42f80 .concat [ 4 4 0 0], LS_0xd42f80_0_0, LS_0xd42f80_0_4; +S_0xc8a1d0 .scope module, "adder" "Adder1bit" 3 35, 4 8, S_0xc88d90; + .timescale 0 0; +L_0xc8da90/d .functor XOR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xc8da90 .delay (30,30,30) L_0xc8da90/d; +L_0xb5d6f0/d .functor XOR 1, L_0xc8da90, L_0xd440b0, C4<0>, C4<0>; +L_0xb5d6f0 .delay (30,30,30) L_0xb5d6f0/d; +L_0xb614a0/d .functor AND 1, L_0xd1a550, L_0xd445e0, C4<1>, C4<1>; +L_0xb614a0 .delay (30,30,30) L_0xb614a0/d; +L_0xb58ad0/d .functor OR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xb58ad0 .delay (30,30,30) L_0xb58ad0/d; +L_0xd43710/d .functor NOT 1, L_0xd440b0, C4<0>, C4<0>, C4<0>; +L_0xd43710 .delay (10,10,10) L_0xd43710/d; +L_0xd437b0/d .functor AND 1, L_0xb614a0, L_0xd43710, C4<1>, C4<1>; +L_0xd437b0 .delay (30,30,30) L_0xd437b0/d; +L_0xd43950/d .functor AND 1, L_0xb58ad0, L_0xd440b0, C4<1>, C4<1>; +L_0xd43950 .delay (30,30,30) L_0xd43950/d; +L_0xd44180/d .functor OR 1, L_0xd437b0, L_0xd43950, C4<0>, C4<0>; +L_0xd44180 .delay (30,30,30) L_0xd44180/d; +v0xc8a2c0_0 .net "_carryin", 0 0, L_0xd43710; 1 drivers +v0xc8a340_0 .alias "a", 0 0, v0xc8aac0_0; +v0xc8a3c0_0 .net "aandb", 0 0, L_0xb614a0; 1 drivers +v0xc8a440_0 .net "aorb", 0 0, L_0xb58ad0; 1 drivers +v0xc8a4c0_0 .alias "b", 0 0, v0xc8ab40_0; +v0xc8a540_0 .alias "carryin", 0 0, v0xc8abc0_0; +v0xc8a5c0_0 .alias "carryout", 0 0, v0xc8acc0_0; +v0xc8a640_0 .net "outputIfCarryin", 0 0, L_0xd437b0; 1 drivers +v0xc8a6c0_0 .net "outputIf_Carryin", 0 0, L_0xd43950; 1 drivers +v0xc8a740_0 .net "s", 0 0, L_0xc8da90; 1 drivers +v0xc8a7c0_0 .alias "sum", 0 0, v0xc8af40_0; +S_0xc89be0 .scope module, "subtractor" "Subtractor1bit" 3 40, 5 8, S_0xc88d90; + .timescale 0 0; +L_0xd44360/d .functor XOR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xd44360 .delay (30,30,30) L_0xd44360/d; +L_0xd443e0/d .functor XOR 1, L_0xd44360, L_0xd440b0, C4<0>, C4<0>; +L_0xd443e0 .delay (30,30,30) L_0xd443e0/d; +L_0xd44580/d .functor NOT 1, L_0xd1a550, C4<0>, C4<0>, C4<0>; +L_0xd44580 .delay (10,10,10) L_0xd44580/d; +L_0xd446f0/d .functor AND 1, L_0xd44580, L_0xd445e0, C4<1>, C4<1>; +L_0xd446f0 .delay (30,30,30) L_0xd446f0/d; +L_0xd448b0/d .functor NOT 1, L_0xd44360, C4<0>, C4<0>, C4<0>; +L_0xd448b0 .delay (10,10,10) L_0xd448b0/d; +L_0xd44910/d .functor AND 1, L_0xd448b0, L_0xd440b0, C4<1>, C4<1>; +L_0xd44910 .delay (30,30,30) L_0xd44910/d; +L_0xd44b10/d .functor OR 1, L_0xd446f0, L_0xd44910, C4<0>, C4<0>; +L_0xd44b10 .delay (30,30,30) L_0xd44b10/d; +v0xc89cd0_0 .alias "a", 0 0, v0xc8aac0_0; +v0xc89d50_0 .net "axorb", 0 0, L_0xd44360; 1 drivers +v0xc89dd0_0 .alias "b", 0 0, v0xc8ab40_0; +v0xc89e50_0 .alias "borrowin", 0 0, v0xc8abc0_0; +v0xc89ed0_0 .alias "borrowout", 0 0, v0xc8adc0_0; +v0xc89f50_0 .alias "diff", 0 0, v0xc8b2f0_0; +v0xc89fd0_0 .net "nota", 0 0, L_0xd44580; 1 drivers +v0xc8a050_0 .net "notaandb", 0 0, L_0xd446f0; 1 drivers +v0xc8a0d0_0 .net "notaxorb", 0 0, L_0xd448b0; 1 drivers +v0xc8a150_0 .net "notaxorbandborrowin", 0 0, L_0xd44910; 1 drivers +S_0xc895f0 .scope module, "slt" "Subtractor1bit" 3 49, 5 8, S_0xc88d90; + .timescale 0 0; +L_0xd44da0/d .functor XOR 1, L_0xd1a550, L_0xd445e0, C4<0>, C4<0>; +L_0xd44da0 .delay (30,30,30) L_0xd44da0/d; +L_0xd44e80/d .functor XOR 1, L_0xd44da0, L_0xd440b0, C4<0>, C4<0>; +L_0xd44e80 .delay (30,30,30) L_0xd44e80/d; +L_0xd45020/d .functor NOT 1, L_0xd1a550, C4<0>, C4<0>, C4<0>; +L_0xd45020 .delay (10,10,10) L_0xd45020/d; +L_0xd450e0/d .functor AND 1, L_0xd45020, L_0xd445e0, C4<1>, C4<1>; +L_0xd450e0 .delay (30,30,30) L_0xd450e0/d; +L_0xd451f0/d .functor NOT 1, L_0xd44da0, C4<0>, C4<0>, C4<0>; +L_0xd451f0 .delay (10,10,10) L_0xd451f0/d; +L_0xd45290/d .functor AND 1, L_0xd451f0, L_0xd440b0, C4<1>, C4<1>; +L_0xd45290 .delay (30,30,30) L_0xd45290/d; +L_0xd453e0/d .functor OR 1, L_0xd450e0, L_0xd45290, C4<0>, C4<0>; +L_0xd453e0 .delay (30,30,30) L_0xd453e0/d; +v0xc896e0_0 .alias "a", 0 0, v0xc8aac0_0; +v0xc89760_0 .net "axorb", 0 0, L_0xd44da0; 1 drivers +v0xc897e0_0 .alias "b", 0 0, v0xc8ab40_0; +v0xc89860_0 .alias "borrowin", 0 0, v0xc8abc0_0; +v0xc898e0_0 .alias "borrowout", 0 0, v0xc8ad40_0; +v0xc89960_0 .alias "diff", 0 0, v0xc8b3a0_0; +v0xc899e0_0 .net "nota", 0 0, L_0xd45020; 1 drivers +v0xc89a60_0 .net "notaandb", 0 0, L_0xd450e0; 1 drivers +v0xc89ae0_0 .net "notaxorb", 0 0, L_0xd451f0; 1 drivers +v0xc89b60_0 .net "notaxorbandborrowin", 0 0, L_0xd45290; 1 drivers +S_0xc89400 .scope module, "mux1" "MUX3bit" 3 70, 6 1, S_0xc88d90; + .timescale 0 0; +v0xb91270_0 .alias "address", 2 0, v0xcec110_0; +v0xc894f0_0 .alias "inputs", 7 0, v0xc8aec0_0; +v0xc89570_0 .alias "out", 0 0, v0xc8b040_0; +L_0xd43250 .part/v L_0xd45890, C4, 1; +S_0xc88e80 .scope module, "mux2" "MUX3bit" 3 71, 6 1, S_0xc88d90; + .timescale 0 0; +v0xc88f70_0 .alias "address", 2 0, v0xcec110_0; +v0xb91130_0 .alias "inputs", 7 0, v0xc8ae40_0; +v0xb911d0_0 .alias "out", 0 0, v0xceb7a0_0; +L_0xd43340 .part/v L_0xd42f80, C4, 1; +S_0xc88b20 .scope module, "mux0" "MUX3bit" 2 77, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc88c10_0 .alias "address", 2 0, v0xcec110_0; +v0xc88c90_0 .alias "inputs", 7 0, v0xca6af0_0; +v0xc88d10_0 .net "out", 0 0, L_0xd47140; 1 drivers +L_0xd47140 .part/v L_0xd46d60, C4, 1; +S_0xaa61c0 .scope module, "mux1" "MUX3bit" 2 79, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xaa62b0_0 .alias "address", 2 0, v0xcec110_0; +v0xaa6350_0 .alias "inputs", 7 0, v0xca6ba0_0; +v0xa6e870_0 .net "out", 0 0, L_0xd47720; 1 drivers +L_0xd47720 .part/v L_0xd45ce0, C4, 1; +S_0xaa3bf0 .scope module, "mux2" "MUX3bit" 2 81, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xa6e690_0 .alias "address", 2 0, v0xcec110_0; +v0xa6e730_0 .alias "inputs", 7 0, v0xcebaa0_0; +v0xa6e7d0_0 .net "out", 0 0, L_0xd48180; 1 drivers +L_0xd48180 .part/v L_0xd48820, C4, 1; +S_0xaa86a0 .scope module, "mux3" "MUX3bit" 2 83, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xaa8790_0 .alias "address", 2 0, v0xcec110_0; +v0xaa3ab0_0 .alias "inputs", 7 0, v0xced1a0_0; +v0xaa3b50_0 .net "out", 0 0, L_0xd48020; 1 drivers +L_0xd48020 .part/v L_0xd47c60, C4, 1; +S_0xaaccb0 .scope module, "mux4" "MUX3bit" 2 85, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xaacda0_0 .alias "address", 2 0, v0xcec110_0; +v0xaace40_0 .alias "inputs", 7 0, v0xced3b0_0; +v0xaa8600_0 .net "out", 0 0, L_0xd49560; 1 drivers +L_0xd49560 .part/v L_0xd46330, C4, 1; +S_0xbdc820 .scope module, "mux5" "MUX3bit" 2 87, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xbe2100_0 .alias "address", 2 0, v0xcec110_0; +v0xbc6720_0 .alias "inputs", 7 0, v0xced460_0; +v0xbc67a0_0 .net "out", 0 0, L_0xd49120; 1 drivers +L_0xd49120 .part/v L_0xd49b50, C4, 1; +S_0xbfd9a0 .scope module, "mux6" "MUX3bit" 2 89, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xbe78a0_0 .alias "address", 2 0, v0xcec110_0; +v0xbe7920_0 .alias "inputs", 7 0, v0xced510_0; +v0xbe2060_0 .net "out", 0 0, L_0xd4b7e0; 1 drivers +L_0xd4b7e0 .part/v L_0xd4ad70, C4, 1; +S_0xc08a20 .scope module, "mux7" "MUX3bit" 2 91, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc1eba0_0 .alias "address", 2 0, v0xcec110_0; +v0xc031e0_0 .alias "inputs", 7 0, v0xced5c0_0; +v0xc03280_0 .net "out", 0 0, L_0xd4a6a0; 1 drivers +L_0xd4a6a0 .part/v L_0xd4b4a0, C4, 1; +S_0xc29ba0 .scope module, "mux8" "MUX3bit" 2 93, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc24360_0 .alias "address", 2 0, v0xcec110_0; +v0xc24400_0 .alias "inputs", 7 0, v0xced670_0; +v0xc1eb20_0 .net "out", 0 0, L_0xd4c500; 1 drivers +L_0xd4c500 .part/v L_0xd4c140, C4, 1; +S_0xbbb6a0 .scope module, "mux9" "MUX3bit" 2 95, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xbc0f80_0 .alias "address", 2 0, v0xcec110_0; +v0xbaadf0_0 .alias "inputs", 7 0, v0xced720_0; +v0xbaae90_0 .net "out", 0 0, L_0xd4d6d0; 1 drivers +L_0xd4d6d0 .part/v L_0xd4bbf0, C4, 1; +S_0xbc15c0 .scope module, "mux10" "MUX3bit" 2 97, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb4a580_0 .alias "address", 2 0, v0xcec110_0; +v0xb4a620_0 .alias "inputs", 7 0, v0xca6c50_0; +v0xbc0ee0_0 .net "out", 0 0, L_0xd4e080; 1 drivers +L_0xd4e080 .part/v L_0xd4d360, C4, 1; +S_0xb82890 .scope module, "mux11" "MUX3bit" 2 99, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc39a20_0 .alias "address", 2 0, v0xcec110_0; +v0xb83700_0 .alias "inputs", 7 0, v0xca6d00_0; +v0xb837a0_0 .net "out", 0 0, L_0xd4eb10; 1 drivers +L_0xd4eb10 .part/v L_0xd4c960, C4, 1; +S_0xb7dc70 .scope module, "mux12" "MUX3bit" 2 101, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb7eae0_0 .alias "address", 2 0, v0xcec110_0; +v0xb7eb80_0 .alias "inputs", 7 0, v0xca6d80_0; +v0xc39980_0 .net "out", 0 0, L_0xd4f500; 1 drivers +L_0xd4f500 .part/v L_0xd4e750, C4, 1; +S_0xb79ec0 .scope module, "mux13" "MUX3bit" 2 103, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb790f0_0 .alias "address", 2 0, v0xcec110_0; +v0xc34140_0 .alias "inputs", 7 0, v0xca6e30_0; +v0xc341e0_0 .net "out", 0 0, L_0xd4dea0; 1 drivers +L_0xd4dea0 .part/v L_0xd4dae0, C4, 1; +S_0xb752a0 .scope module, "mux14" "MUX3bit" 2 105, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc2e900_0 .alias "address", 2 0, v0xcec110_0; +v0xc2e9a0_0 .alias "inputs", 7 0, v0xca6eb0_0; +v0xb79050_0 .net "out", 0 0, L_0xd4f7d0; 1 drivers +L_0xd4f7d0 .part/v L_0xd4a270, C4, 1; +S_0xb70680 .scope module, "mux15" "MUX3bit" 2 107, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb6f8b0_0 .alias "address", 2 0, v0xcec110_0; +v0xb74430_0 .alias "inputs", 7 0, v0xca6f60_0; +v0xb744b0_0 .net "out", 0 0, L_0xd4f010; 1 drivers +L_0xd4f010 .part/v L_0xd4fdc0, C4, 1; +S_0xb6abf0 .scope module, "mux16" "MUX3bit" 2 109, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb6ba60_0 .alias "address", 2 0, v0xcec110_0; +v0xb6bb00_0 .alias "inputs", 7 0, v0xca6fe0_0; +v0xb6f810_0 .net "out", 0 0, L_0xd51cd0; 1 drivers +L_0xd51cd0 .part/v L_0xd51910, C4, 1; +S_0xb65fd0 .scope module, "mux17" "MUX3bit" 2 111, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc18890_0 .alias "address", 2 0, v0xcec110_0; +v0xb66e40_0 .alias "inputs", 7 0, v0xceb8f0_0; +v0xb66ee0_0 .net "out", 0 0, L_0xd513d0; 1 drivers +L_0xd513d0 .part/v L_0xd527c0, C4, 1; +S_0xb613b0 .scope module, "mux18" "MUX3bit" 2 113, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb62220_0 .alias "address", 2 0, v0xcec110_0; +v0xb622c0_0 .alias "inputs", 7 0, v0xceb970_0; +v0xc187f0_0 .net "out", 0 0, L_0xd52e70; 1 drivers +L_0xd52e70 .part/v L_0xd52b00, C4, 1; +S_0xb5d600 .scope module, "mux19" "MUX3bit" 2 115, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb5c830_0 .alias "address", 2 0, v0xcec110_0; +v0xc12fb0_0 .alias "inputs", 7 0, v0xceba20_0; +v0xc13050_0 .net "out", 0 0, L_0xd52540; 1 drivers +L_0xd52540 .part/v L_0xd52180, C4, 1; +S_0xb589e0 .scope module, "mux20" "MUX3bit" 2 117, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc0d770_0 .alias "address", 2 0, v0xcec110_0; +v0xc0d810_0 .alias "inputs", 7 0, v0xcebb50_0; +v0xb5c790_0 .net "out", 0 0, L_0xd54390; 1 drivers +L_0xd54390 .part/v L_0xd53fd0, C4, 1; +S_0xb53dc0 .scope module, "mux21" "MUX3bit" 2 119, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb52ff0_0 .alias "address", 2 0, v0xcec110_0; +v0xb57b70_0 .alias "inputs", 7 0, v0xcebc00_0; +v0xb57c10_0 .net "out", 0 0, L_0xd53a70; 1 drivers +L_0xd53a70 .part/v L_0xd54e40, C4, 1; +S_0xb4e330 .scope module, "mux22" "MUX3bit" 2 121, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb4f1a0_0 .alias "address", 2 0, v0xcec110_0; +v0xb4f240_0 .alias "inputs", 7 0, v0xcebc80_0; +v0xb52f50_0 .net "out", 0 0, L_0xd556d0; 1 drivers +L_0xd556d0 .part/v L_0xd55310, C4, 1; +S_0xbf7670 .scope module, "mux23" "MUX3bit" 2 123, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb49710_0 .alias "address", 2 0, v0xcec110_0; +v0xb37500_0 .alias "inputs", 7 0, v0xcebd30_0; +v0xb497b0_0 .net "out", 0 0, L_0xd54ba0; 1 drivers +L_0xd54ba0 .part/v L_0xd547e0, C4, 1; +S_0xb44af0 .scope module, "mux24" "MUX3bit" 2 125, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xbf1ed0_0 .alias "address", 2 0, v0xcec110_0; +v0xb45960_0 .alias "inputs", 7 0, v0xcebdb0_0; +v0xb45a00_0 .net "out", 0 0, L_0xd56c00; 1 drivers +L_0xd56c00 .part/v L_0xd56840, C4, 1; +S_0xb3fed0 .scope module, "mux25" "MUX3bit" 2 127, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb40d40_0 .alias "address", 2 0, v0xcec110_0; +v0xb40de0_0 .alias "inputs", 7 0, v0xcebe60_0; +v0xbf1e30_0 .net "out", 0 0, L_0xd56090; 1 drivers +L_0xd56090 .part/v L_0xd576d0, C4, 1; +S_0xb3c120 .scope module, "mux26" "MUX3bit" 2 129, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb3b350_0 .alias "address", 2 0, v0xcec110_0; +v0xbec5f0_0 .alias "inputs", 7 0, v0xcebf10_0; +v0xbec690_0 .net "out", 0 0, L_0xd57bb0; 1 drivers +L_0xd57bb0 .part/v L_0xd588e0, C4, 1; +S_0xb36690 .scope module, "mux27" "MUX3bit" 2 131, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb32980_0 .alias "address", 2 0, v0xcec110_0; +v0xb37590_0 .alias "inputs", 7 0, v0xcebf90_0; +v0xb3b2b0_0 .net "out", 0 0, L_0xd57230; 1 drivers +L_0xd57230 .part/v L_0xd58790, C4, 1; +S_0xb2dcc0 .scope module, "mux28" "MUX3bit" 2 133, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb31a70_0 .alias "address", 2 0, v0xcec110_0; +v0xb31b10_0 .alias "inputs", 7 0, v0xcec040_0; +v0xb328e0_0 .net "out", 0 0, L_0xd592e0; 1 drivers +L_0xd592e0 .part/v L_0xd58f20, C4, 1; +S_0xbd64f0 .scope module, "mux29" "MUX3bit" 2 135, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb29140_0 .alias "address", 2 0, v0xcec110_0; +v0xb2ce50_0 .alias "inputs", 7 0, v0xceda90_0; +v0xb2cef0_0 .net "out", 0 0, L_0xd58380; 1 drivers +L_0xd58380 .part/v L_0xd57fc0, C4, 1; +S_0xbd0cb0 .scope module, "mux30" "MUX3bit" 2 137, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xb28230_0 .alias "address", 2 0, v0xcec110_0; +v0xb282d0_0 .alias "inputs", 7 0, v0xced250_0; +v0xb290a0_0 .net "out", 0 0, L_0xd5a750; 1 drivers +L_0xd5a750 .part/v L_0xd5a390, C4, 1; +S_0xbb5f10 .scope module, "mux31" "MUX3bit" 2 139, 6 1, S_0xbb06d0; + .timescale 0 0; +v0xc881d0_0 .alias "address", 2 0, v0xcec110_0; +v0xb24480_0 .alias "inputs", 7 0, v0xced300_0; +v0xb24520_0 .net "out", 0 0, L_0xd5a010; 1 drivers +L_0xd5a010 .part/v L_0xd59c50, C4, 1; +# The file index is used to find the file name in the following table. +:file_names 7; + "N/A"; + ""; + "alu.v"; + "./alu1bit.v"; + "./adder1bit.v"; + "./subtractor1bit.v"; + "./mux3bit.v"; diff --git a/alu.t.out b/alu.t.out new file mode 100755 index 0000000..f616966 --- /dev/null +++ b/alu.t.out @@ -0,0 +1,4798 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision - 12; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2704490 .scope module, "behavioralFullAdder" "behavioralFullAdder" 2 3; + .timescale -9 -12; +v0x25e48a0_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x27a08b0_0 .net *"_s11", 1 0, L_0x27ed890; 1 drivers +v0x27a0950_0 .net *"_s13", 1 0, L_0x27ed9e0; 1 drivers +v0x27a09f0_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x27a0aa0_0 .net *"_s17", 1 0, L_0x27edb50; 1 drivers +v0x27a0b40_0 .net *"_s3", 1 0, L_0x27ed660; 1 drivers +v0x27a0c20_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x27a0cc0_0 .net *"_s7", 1 0, L_0x27ed760; 1 drivers +v0x27a0db0_0 .net "a", 0 0, C4; 0 drivers +v0x27a0e50_0 .net "b", 0 0, C4; 0 drivers +v0x27a0f50_0 .net "carryin", 0 0, C4; 0 drivers +v0x27a0ff0_0 .net "carryout", 0 0, L_0x27ed490; 1 drivers +v0x27a1100_0 .net "sum", 0 0, L_0x27ed590; 1 drivers +L_0x27ed490 .part L_0x27edb50, 1, 1; +L_0x27ed590 .part L_0x27edb50, 0, 1; +L_0x27ed660 .concat [ 1 1 0 0], C4, C4<0>; +L_0x27ed760 .concat [ 1 1 0 0], C4, C4<0>; +L_0x27ed890 .arith/sum 2, L_0x27ed660, L_0x27ed760; +L_0x27ed9e0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x27edb50 .arith/sum 2, L_0x27ed890, L_0x27ed9e0; +S_0x26fbeb0 .scope module, "testALU" "testALU" 3 5; + .timescale -9 -12; +v0x27ecef0_0 .var "a", 31 0; +v0x27be3e0_0 .var "b", 31 0; +v0x27ed080_0 .net "cout", 0 0, v0x27be4f0_0; 1 drivers +v0x27ed130_0 .var "op", 2 0; +v0x27ed1e0_0 .net "out", 31 0, v0x27ec730_0; 1 drivers +v0x27ed260_0 .net "overflow", 0 0, v0x27ec7b0_0; 1 drivers +v0x27ed2e0_0 .var/i "passed_tests", 31 0; +v0x27ed360_0 .var/i "tests", 31 0; +v0x27ed3e0_0 .net "zero", 0 0, v0x27ecbf0_0; 1 drivers +S_0x27ecd00 .scope function, "test" "test" 3 16, 3 16, S_0x26fbeb0; + .timescale -9 -12; +v0x27eca90_0 .var "show_extras", 0 0; +v0x27ecdf0_0 .var/i "test", 31 0; +v0x27ece70_0 .var/i "test_case", 31 0; +TD_testALU.test ; + %load/v 8, v0x27ece70_0, 32; + %cmpi/u 8, 0, 32; + %inv 4, 1; + %jmp/0xz T_0.0, 4; + %movi 8, 1, 32; + %set/v v0x27ecdf0_0, 8, 32; + %vpi_call 3 23 "$display", "Passed test with:"; + %jmp T_0.1; +T_0.0 ; + %set/v v0x27ecdf0_0, 0, 32; + %vpi_call 3 27 "$display", "Failed test with:"; +T_0.1 ; + %vpi_call 3 29 "$display", "a: %b", v0x27ecef0_0; + %vpi_call 3 30 "$display", "b: %b", v0x27be3e0_0; + %vpi_call 3 31 "$display", "out: %b", v0x27ed1e0_0; + %load/v 8, v0x27eca90_0, 1; + %jmp/0xz T_0.2, 8; + %vpi_call 3 33 "$display", "Cout: %b, Overflow: %b, Zero: %b", v0x27ed080_0, v0x27ed260_0, v0x27ed3e0_0; +T_0.2 ; + %end; +S_0x27a11a0 .scope module, "alu" "ALUcontrolLUT" 3 14, 4 11, S_0x26fbeb0; + .timescale -9 -12; +v0x27ebe70_0 .net "ALUcommand", 2 0, v0x27ed130_0; 1 drivers +v0x27ebf20_0 .net "a", 31 0, v0x27ecef0_0; 1 drivers +v0x27ec3a0_0 .net "adder_cout", 0 0, L_0x281e6a0; 1 drivers +v0x27ec420_0 .net "adder_flag", 0 0, L_0x281fdf0; 1 drivers +RS_0x7f6901db0258/0/0 .resolv tri, L_0x28027e0, L_0x2806c20, L_0x280af30, L_0x280f280; +RS_0x7f6901db0258/0/4 .resolv tri, L_0x2813560, L_0x2817850, L_0x281bb70, L_0x281fef0; +RS_0x7f6901db0258 .resolv tri, RS_0x7f6901db0258/0/0, RS_0x7f6901db0258/0/4, C4, C4; +v0x27ec4a0_0 .net8 "addsub", 31 0, RS_0x7f6901db0258; 8 drivers +RS_0x7f6901da2b78/0/0 .resolv tri, L_0x2832fe0, L_0x2833310, L_0x2833640, L_0x2833a00; +RS_0x7f6901da2b78/0/4 .resolv tri, L_0x2833db0, L_0x2834100, L_0x2834560, L_0x2834900; +RS_0x7f6901da2b78/0/8 .resolv tri, L_0x28349a0, L_0x2835030, L_0x28350d0, L_0x2835710; +RS_0x7f6901da2b78/0/12 .resolv tri, L_0x28357b0, L_0x2835dc0, L_0x2835e60, L_0x2836620; +RS_0x7f6901da2b78/0/16 .resolv tri, L_0x28366c0, L_0x2836ac0, L_0x2836c50, L_0x28371d0; +RS_0x7f6901da2b78/0/20 .resolv tri, L_0x2837340, L_0x28378b0, L_0x2837a50, L_0x2837fa0; +RS_0x7f6901da2b78/0/24 .resolv tri, L_0x2838120, L_0x2838910, L_0x28389b0, L_0x2839040; +RS_0x7f6901da2b78/0/28 .resolv tri, L_0x28390e0, L_0x2839730, L_0x2839ab0, L_0x28397d0; +RS_0x7f6901da2b78/1/0 .resolv tri, RS_0x7f6901da2b78/0/0, RS_0x7f6901da2b78/0/4, RS_0x7f6901da2b78/0/8, RS_0x7f6901da2b78/0/12; +RS_0x7f6901da2b78/1/4 .resolv tri, RS_0x7f6901da2b78/0/16, RS_0x7f6901da2b78/0/20, RS_0x7f6901da2b78/0/24, RS_0x7f6901da2b78/0/28; +RS_0x7f6901da2b78 .resolv tri, RS_0x7f6901da2b78/1/0, RS_0x7f6901da2b78/1/4, C4, C4; +v0x27ec520_0 .net8 "andin", 31 0, RS_0x7f6901da2b78; 32 drivers +v0x27ec5a0_0 .net "b", 31 0, v0x27be3e0_0; 1 drivers +v0x27be4f0_0 .var "cout", 0 0; +v0x27ec730_0 .var "finalsignal", 31 0; +v0x27ec7b0_0 .var "flag", 0 0; +RS_0x7f6901da1948/0/0 .resolv tri, L_0x2839f60, L_0x283a6b0, L_0x283a930, L_0x283acf0; +RS_0x7f6901da1948/0/4 .resolv tri, L_0x283b0a0, L_0x283b3f0, L_0x283b850, L_0x283bbf0; +RS_0x7f6901da1948/0/8 .resolv tri, L_0x283bc90, L_0x283c320, L_0x283c3c0, L_0x283ca00; +RS_0x7f6901da1948/0/12 .resolv tri, L_0x283caa0, L_0x283d0b0, L_0x283d150, L_0x283d910; +RS_0x7f6901da1948/0/16 .resolv tri, L_0x283d9b0, L_0x282cce0, L_0x282ce70, L_0x283ecd0; +RS_0x7f6901da1948/0/20 .resolv tri, L_0x283ee40, L_0x283f300, L_0x283f4a0, L_0x283f9a0; +RS_0x7f6901da1948/0/24 .resolv tri, L_0x283fb20, L_0x2840310, L_0x28403b0, L_0x2840a40; +RS_0x7f6901da1948/0/28 .resolv tri, L_0x2840ae0, L_0x2841130, L_0x28414b0, L_0x28411d0; +RS_0x7f6901da1948/1/0 .resolv tri, RS_0x7f6901da1948/0/0, RS_0x7f6901da1948/0/4, RS_0x7f6901da1948/0/8, RS_0x7f6901da1948/0/12; +RS_0x7f6901da1948/1/4 .resolv tri, RS_0x7f6901da1948/0/16, RS_0x7f6901da1948/0/20, RS_0x7f6901da1948/0/24, RS_0x7f6901da1948/0/28; +RS_0x7f6901da1948 .resolv tri, RS_0x7f6901da1948/1/0, RS_0x7f6901da1948/1/4, C4, C4; +v0x27ec830_0 .net8 "nandin", 31 0, RS_0x7f6901da1948; 32 drivers +RS_0x7f6901da0718/0/0 .resolv tri, L_0x2841960, L_0x28420b0, L_0x2842380, L_0x2842740; +RS_0x7f6901da0718/0/4 .resolv tri, L_0x2842af0, L_0x2842e40, L_0x28432a0, L_0x2843640; +RS_0x7f6901da0718/0/8 .resolv tri, L_0x28436e0, L_0x2843d70, L_0x2843e10, L_0x2844450; +RS_0x7f6901da0718/0/12 .resolv tri, L_0x28444f0, L_0x2844b00, L_0x2844ba0, L_0x2845360; +RS_0x7f6901da0718/0/16 .resolv tri, L_0x2845400, L_0x2845800, L_0x2845990, L_0x2845f10; +RS_0x7f6901da0718/0/20 .resolv tri, L_0x2846080, L_0x28465f0, L_0x2846790, L_0x2846ce0; +RS_0x7f6901da0718/0/24 .resolv tri, L_0x2846e60, L_0x2847650, L_0x28476f0, L_0x2847d80; +RS_0x7f6901da0718/0/28 .resolv tri, L_0x2847e20, L_0x2848470, L_0x28487f0, L_0x2848510; +RS_0x7f6901da0718/1/0 .resolv tri, RS_0x7f6901da0718/0/0, RS_0x7f6901da0718/0/4, RS_0x7f6901da0718/0/8, RS_0x7f6901da0718/0/12; +RS_0x7f6901da0718/1/4 .resolv tri, RS_0x7f6901da0718/0/16, RS_0x7f6901da0718/0/20, RS_0x7f6901da0718/0/24, RS_0x7f6901da0718/0/28; +RS_0x7f6901da0718 .resolv tri, RS_0x7f6901da0718/1/0, RS_0x7f6901da0718/1/4, C4, C4; +v0x27ec8b0_0 .net8 "norin", 31 0, RS_0x7f6901da0718; 32 drivers +RS_0x7f6901d9f4e8/0/0 .resolv tri, L_0x2848ca0, L_0x28493f0, L_0x2849670, L_0x2849a30; +RS_0x7f6901d9f4e8/0/4 .resolv tri, L_0x2849de0, L_0x284a130, L_0x284a590, L_0x284a930; +RS_0x7f6901d9f4e8/0/8 .resolv tri, L_0x284a9d0, L_0x284b060, L_0x284b100, L_0x284b740; +RS_0x7f6901d9f4e8/0/12 .resolv tri, L_0x284b7e0, L_0x284bdf0, L_0x284be90, L_0x284c650; +RS_0x7f6901d9f4e8/0/16 .resolv tri, L_0x284c6f0, L_0x284caf0, L_0x284cc80, L_0x284d200; +RS_0x7f6901d9f4e8/0/20 .resolv tri, L_0x284d370, L_0x284d8e0, L_0x284da80, L_0x284dfd0; +RS_0x7f6901d9f4e8/0/24 .resolv tri, L_0x282f6d0, L_0x282f570, L_0x282f910, L_0x28300d0; +RS_0x7f6901d9f4e8/0/28 .resolv tri, L_0x282ff30, L_0x2850650, L_0x28509d0, L_0x2850740; +RS_0x7f6901d9f4e8/1/0 .resolv tri, RS_0x7f6901d9f4e8/0/0, RS_0x7f6901d9f4e8/0/4, RS_0x7f6901d9f4e8/0/8, RS_0x7f6901d9f4e8/0/12; +RS_0x7f6901d9f4e8/1/4 .resolv tri, RS_0x7f6901d9f4e8/0/16, RS_0x7f6901d9f4e8/0/20, RS_0x7f6901d9f4e8/0/24, RS_0x7f6901d9f4e8/0/28; +RS_0x7f6901d9f4e8 .resolv tri, RS_0x7f6901d9f4e8/1/0, RS_0x7f6901d9f4e8/1/4, C4, C4; +v0x27ec960_0 .net8 "orin", 31 0, RS_0x7f6901d9f4e8; 32 drivers +RS_0x7f6901da5608 .resolv tri, L_0x2832260, L_0x2832cd0, C4, C4; +v0x27eca10_0 .net8 "slt", 31 0, RS_0x7f6901da5608; 2 drivers +RS_0x7f6901da6838/0/0 .resolv tri, L_0x2820270, L_0x28205a0, L_0x28208d0, L_0x2820c90; +RS_0x7f6901da6838/0/4 .resolv tri, L_0x2820fd0, L_0x28211b0, L_0x2821610, L_0x28219b0; +RS_0x7f6901da6838/0/8 .resolv tri, L_0x2821a50, L_0x28220e0, L_0x2822180, L_0x28227c0; +RS_0x7f6901da6838/0/12 .resolv tri, L_0x2822860, L_0x2822e70, L_0x2822f10, L_0x28236d0; +RS_0x7f6901da6838/0/16 .resolv tri, L_0x2823770, L_0x2823f30, L_0x2823fd0, L_0x28243b0; +RS_0x7f6901da6838/0/20 .resolv tri, L_0x2824520, L_0x2824a90, L_0x2824c30, L_0x2825180; +RS_0x7f6901da6838/0/24 .resolv tri, L_0x2825300, L_0x2825af0, L_0x2825b90, L_0x2826220; +RS_0x7f6901da6838/0/28 .resolv tri, L_0x28262c0, L_0x2826910, L_0x2826c90, L_0x28269b0; +RS_0x7f6901da6838/1/0 .resolv tri, RS_0x7f6901da6838/0/0, RS_0x7f6901da6838/0/4, RS_0x7f6901da6838/0/8, RS_0x7f6901da6838/0/12; +RS_0x7f6901da6838/1/4 .resolv tri, RS_0x7f6901da6838/0/16, RS_0x7f6901da6838/0/20, RS_0x7f6901da6838/0/24, RS_0x7f6901da6838/0/28; +RS_0x7f6901da6838 .resolv tri, RS_0x7f6901da6838/1/0, RS_0x7f6901da6838/1/4, C4, C4; +v0x27ecb40_0 .net8 "xorin", 31 0, RS_0x7f6901da6838; 32 drivers +v0x27ecbf0_0 .var "zeroflag", 0 0; +E_0x27a0a70 .event edge, v0x27ec730_0; +E_0x27a12d0/0 .event edge, v0x27a55f0_0, v0x27c3e80_0, v0x27a93c0_0, v0x27ada80_0; +E_0x27a12d0/1 .event edge, v0x27b1880_0, v0x27be580_0, v0x27eb540_0, v0x27eb380_0; +E_0x27a12d0 .event/or E_0x27a12d0/0, E_0x27a12d0/1; +S_0x27c4350 .scope module, "addsub0" "adder_subtracter" 4 34, 5 175, S_0x27a11a0; + .timescale -9 -12; +L_0x27e8c60 .functor NOT 1, L_0x27eddd0, C4<0>, C4<0>, C4<0>; +L_0x27edf60 .functor NOT 1, L_0x27ee010, C4<0>, C4<0>, C4<0>; +L_0x27ee230 .functor NOT 1, L_0x27ee290, C4<0>, C4<0>, C4<0>; +L_0x27ee420 .functor NOT 1, L_0x27ee4d0, C4<0>, C4<0>, C4<0>; +L_0x27ee6b0 .functor NOT 1, L_0x27ee760, C4<0>, C4<0>, C4<0>; +L_0x27ee950 .functor NOT 1, L_0x27ee9b0, C4<0>, C4<0>, C4<0>; +L_0x27ee850 .functor NOT 1, L_0x27eec50, C4<0>, C4<0>, C4<0>; +L_0x27ec6a0 .functor NOT 1, L_0x27ef090, C4<0>, C4<0>, C4<0>; +L_0x27ef2b0 .functor NOT 1, L_0x27ef360, C4<0>, C4<0>, C4<0>; +L_0x27ef180 .functor NOT 1, L_0x27ef640, C4<0>, C4<0>, C4<0>; +L_0x27ef790 .functor NOT 1, L_0x27ef840, C4<0>, C4<0>, C4<0>; +L_0x27ef9f0 .functor NOT 1, L_0x27efaa0, C4<0>, C4<0>, C4<0>; +L_0x27ef5e0 .functor NOT 1, L_0x27efcb0, C4<0>, C4<0>, C4<0>; +L_0x27efe80 .functor NOT 1, L_0x27eff30, C4<0>, C4<0>, C4<0>; +L_0x27eeb40 .functor NOT 1, L_0x27f0320, C4<0>, C4<0>, C4<0>; +L_0x27f04c0 .functor NOT 1, L_0x27f05b0, C4<0>, C4<0>, C4<0>; +L_0x27f0460 .functor NOT 1, L_0x27f0800, C4<0>, C4<0>, C4<0>; +L_0x27f0740 .functor NOT 1, L_0x27f0b00, C4<0>, C4<0>, C4<0>; +L_0x27f0990 .functor NOT 1, L_0x27f0d20, C4<0>, C4<0>, C4<0>; +L_0x27f0c40 .functor NOT 1, L_0x27f0a60, C4<0>, C4<0>, C4<0>; +L_0x27f0eb0 .functor NOT 1, L_0x27f1240, C4<0>, C4<0>, C4<0>; +L_0x27f1140 .functor NOT 1, L_0x27f0fa0, C4<0>, C4<0>, C4<0>; +L_0x27f13d0 .functor NOT 1, L_0x27f1710, C4<0>, C4<0>, C4<0>; +L_0x27e9a90 .functor NOT 1, L_0x27f1490, C4<0>, C4<0>, C4<0>; +L_0x27ed930 .functor NOT 1, L_0x27f1d80, C4<0>, C4<0>, C4<0>; +L_0x27eede0 .functor NOT 1, L_0x27f1c10, C4<0>, C4<0>, C4<0>; +L_0x27f1ec0 .functor NOT 1, L_0x27f2250, C4<0>, C4<0>, C4<0>; +L_0x27f2140 .functor NOT 1, L_0x27f1fc0, C4<0>, C4<0>, C4<0>; +L_0x27f2390 .functor NOT 1, L_0x27f2770, C4<0>, C4<0>, C4<0>; +L_0x27f2640 .functor NOT 1, L_0x27f2490, C4<0>, C4<0>, C4<0>; +L_0x27f26f0 .functor NOT 1, L_0x27f28b0, C4<0>, C4<0>, C4<0>; +L_0x27f2b90 .functor NOT 1, L_0x27f2bf0, C4<0>, C4<0>, C4<0>; +v0x27e8150_0 .net "_", 0 0, L_0x2802690; 1 drivers +v0x27e8790_0 .net "_1", 0 0, L_0x2806ad0; 1 drivers +v0x27e8810_0 .net "_2", 0 0, L_0x280ade0; 1 drivers +v0x27e8890_0 .net "_3", 0 0, L_0x280f130; 1 drivers +v0x27e8910_0 .net "_4", 0 0, L_0x2813410; 1 drivers +v0x27e8990_0 .net "_5", 0 0, L_0x2817700; 1 drivers +v0x27e8a10_0 .net "_6", 0 0, L_0x281ba20; 1 drivers +v0x27e8a90_0 .net *"_s0", 0 0, L_0x27e8c60; 1 drivers +v0x27e8b60_0 .net *"_s100", 0 0, L_0x27eede0; 1 drivers +v0x27e8be0_0 .net *"_s103", 0 0, L_0x27f1c10; 1 drivers +v0x27e8cc0_0 .net *"_s104", 0 0, L_0x27f1ec0; 1 drivers +v0x27e8d40_0 .net *"_s107", 0 0, L_0x27f2250; 1 drivers +v0x27e8e30_0 .net *"_s108", 0 0, L_0x27f2140; 1 drivers +v0x27e8eb0_0 .net *"_s11", 0 0, L_0x27ee290; 1 drivers +v0x27e8fb0_0 .net *"_s111", 0 0, L_0x27f1fc0; 1 drivers +v0x27e9030_0 .net *"_s112", 0 0, L_0x27f2390; 1 drivers +v0x27e8f30_0 .net *"_s115", 0 0, L_0x27f2770; 1 drivers +v0x27e9160_0 .net *"_s116", 0 0, L_0x27f2640; 1 drivers +v0x27e9280_0 .net *"_s119", 0 0, L_0x27f2490; 1 drivers +v0x27e9300_0 .net *"_s12", 0 0, L_0x27ee420; 1 drivers +v0x27e91e0_0 .net *"_s120", 0 0, L_0x27f26f0; 1 drivers +v0x27e9430_0 .net *"_s123", 0 0, L_0x27f28b0; 1 drivers +v0x27e9380_0 .net *"_s124", 0 0, L_0x27f2b90; 1 drivers +v0x27e9570_0 .net *"_s127", 0 0, L_0x27f2bf0; 1 drivers +v0x27e94d0_0 .net *"_s15", 0 0, L_0x27ee4d0; 1 drivers +v0x27e96c0_0 .net *"_s16", 0 0, L_0x27ee6b0; 1 drivers +v0x27e9610_0 .net *"_s19", 0 0, L_0x27ee760; 1 drivers +v0x27e9820_0 .net *"_s20", 0 0, L_0x27ee950; 1 drivers +v0x27e9760_0 .net *"_s23", 0 0, L_0x27ee9b0; 1 drivers +v0x27e9990_0 .net *"_s24", 0 0, L_0x27ee850; 1 drivers +v0x27e98a0_0 .net *"_s27", 0 0, L_0x27eec50; 1 drivers +v0x27e9b10_0 .net *"_s28", 0 0, L_0x27ec6a0; 1 drivers +v0x27e9a10_0 .net *"_s3", 0 0, L_0x27eddd0; 1 drivers +v0x27e9ca0_0 .net *"_s31", 0 0, L_0x27ef090; 1 drivers +v0x27e9b90_0 .net *"_s32", 0 0, L_0x27ef2b0; 1 drivers +v0x27e9e40_0 .net *"_s35", 0 0, L_0x27ef360; 1 drivers +v0x27e9d20_0 .net *"_s36", 0 0, L_0x27ef180; 1 drivers +v0x27e9dc0_0 .net *"_s39", 0 0, L_0x27ef640; 1 drivers +v0x27ea000_0 .net *"_s4", 0 0, L_0x27edf60; 1 drivers +v0x27ea080_0 .net *"_s40", 0 0, L_0x27ef790; 1 drivers +v0x27e9ec0_0 .net *"_s43", 0 0, L_0x27ef840; 1 drivers +v0x27e9f60_0 .net *"_s44", 0 0, L_0x27ef9f0; 1 drivers +v0x27ea260_0 .net *"_s47", 0 0, L_0x27efaa0; 1 drivers +v0x27ea2e0_0 .net *"_s48", 0 0, L_0x27ef5e0; 1 drivers +v0x27ea100_0 .net *"_s51", 0 0, L_0x27efcb0; 1 drivers +v0x27ea1a0_0 .net *"_s52", 0 0, L_0x27efe80; 1 drivers +v0x27ea4e0_0 .net *"_s55", 0 0, L_0x27eff30; 1 drivers +v0x27ea560_0 .net *"_s56", 0 0, L_0x27eeb40; 1 drivers +v0x27ea380_0 .net *"_s59", 0 0, L_0x27f0320; 1 drivers +v0x27ea420_0 .net *"_s60", 0 0, L_0x27f04c0; 1 drivers +v0x27ea780_0 .net *"_s63", 0 0, L_0x27f05b0; 1 drivers +v0x27ea800_0 .net *"_s64", 0 0, L_0x27f0460; 1 drivers +v0x27ea600_0 .net *"_s67", 0 0, L_0x27f0800; 1 drivers +v0x27ea6a0_0 .net *"_s68", 0 0, L_0x27f0740; 1 drivers +v0x27eaa40_0 .net *"_s7", 0 0, L_0x27ee010; 1 drivers +v0x27eaac0_0 .net *"_s71", 0 0, L_0x27f0b00; 1 drivers +v0x27ea880_0 .net *"_s72", 0 0, L_0x27f0990; 1 drivers +v0x27ea920_0 .net *"_s75", 0 0, L_0x27f0d20; 1 drivers +v0x27ea9c0_0 .net *"_s76", 0 0, L_0x27f0c40; 1 drivers +v0x27ead40_0 .net *"_s79", 0 0, L_0x27f0a60; 1 drivers +v0x27eab60_0 .net *"_s8", 0 0, L_0x27ee230; 1 drivers +v0x27eac00_0 .net *"_s80", 0 0, L_0x27f0eb0; 1 drivers +v0x27eaca0_0 .net *"_s83", 0 0, L_0x27f1240; 1 drivers +v0x27eafe0_0 .net *"_s84", 0 0, L_0x27f1140; 1 drivers +v0x27eade0_0 .net *"_s87", 0 0, L_0x27f0fa0; 1 drivers +v0x27eae80_0 .net *"_s88", 0 0, L_0x27f13d0; 1 drivers +v0x27eaf20_0 .net *"_s91", 0 0, L_0x27f1710; 1 drivers +v0x27eb280_0 .net *"_s92", 0 0, L_0x27e9a90; 1 drivers +v0x27eb080_0 .net *"_s95", 0 0, L_0x27f1490; 1 drivers +v0x27eb120_0 .net *"_s96", 0 0, L_0x27ed930; 1 drivers +v0x27eb1c0_0 .net *"_s99", 0 0, L_0x27f1d80; 1 drivers +v0x27eb540_0 .alias "ans", 31 0, v0x27ec4a0_0; +v0x27eb300_0 .alias "carryout", 0 0, v0x27ec3a0_0; +v0x27eb380_0 .alias "command", 2 0, v0x27ebe70_0; +v0x27eb420_0 .net "cout0", 0 0, L_0x2800f10; 1 drivers +v0x27eb820_0 .net "cout1", 0 0, L_0x28053c0; 1 drivers +v0x27eb650_0 .net "cout2", 0 0, L_0x28096d0; 1 drivers +v0x27eb760_0 .net "cout3", 0 0, L_0x280da20; 1 drivers +v0x27ebbb0_0 .net "cout4", 0 0, L_0x2811d00; 1 drivers +v0x27ebcc0_0 .net "cout5", 0 0, L_0x2815ff0; 1 drivers +v0x27eb930_0 .net "cout6", 0 0, L_0x281a310; 1 drivers +RS_0x7f6901daf628/0/0 .resolv tri, L_0x27f9b70, L_0x27f2f00, L_0x27f81f0, L_0x27f99b0; +RS_0x7f6901daf628/0/4 .resolv tri, L_0x27f2d30, L_0x27faa50, L_0x27fae80, L_0x27fb080; +RS_0x7f6901daf628/0/8 .resolv tri, L_0x27faaf0, L_0x27fac90, L_0x27fb4b0, L_0x27fb6a0; +RS_0x7f6901daf628/0/12 .resolv tri, L_0x27fbb00, L_0x27fbca0, L_0x27fbe90, L_0x27fbf80; +RS_0x7f6901daf628/0/16 .resolv tri, L_0x27fc170, L_0x27fc360, L_0x27fc7f0, L_0x27fc9a0; +RS_0x7f6901daf628/0/20 .resolv tri, L_0x27fcb90, L_0x27fc550, L_0x27fcd30, L_0x27fd1f0; +RS_0x7f6901daf628/0/24 .resolv tri, L_0x27fd3e0, L_0x27fcf20, L_0x27fd110, L_0x27fd5d0; +RS_0x7f6901daf628/0/28 .resolv tri, L_0x27fd920, L_0x27fde10, L_0x27fe000, L_0x27fe0a0; +RS_0x7f6901daf628/1/0 .resolv tri, RS_0x7f6901daf628/0/0, RS_0x7f6901daf628/0/4, RS_0x7f6901daf628/0/8, RS_0x7f6901daf628/0/12; +RS_0x7f6901daf628/1/4 .resolv tri, RS_0x7f6901daf628/0/16, RS_0x7f6901daf628/0/20, RS_0x7f6901daf628/0/24, RS_0x7f6901daf628/0/28; +RS_0x7f6901daf628 .resolv tri, RS_0x7f6901daf628/1/0, RS_0x7f6901daf628/1/4, C4, C4; +v0x27eba40_0 .net8 "finalB", 31 0, RS_0x7f6901daf628; 32 drivers +RS_0x7f6901daefc8/0/0 .resolv tri, L_0x27edc90, L_0x27edec0, L_0x27ee100, L_0x27ee380; +RS_0x7f6901daefc8/0/4 .resolv tri, L_0x27ee610, L_0x27ee8b0, L_0x27eeaa0, L_0x27eef50; +RS_0x7f6901daefc8/0/8 .resolv tri, L_0x27ef210, L_0x27ef4f0, L_0x27ef450, L_0x27ef6e0; +RS_0x7f6901daefc8/0/12 .resolv tri, L_0x27ef930, L_0x27efb90, L_0x27efda0, L_0x27f0020; +RS_0x7f6901daefc8/0/16 .resolv tri, L_0x27f03c0, L_0x27f06a0, L_0x27f08f0, L_0x27f0ba0; +RS_0x7f6901daefc8/0/20 .resolv tri, L_0x27f0e10, L_0x27f10a0, L_0x27f1330, L_0x27f15a0; +RS_0x7f6901daefc8/0/24 .resolv tri, L_0x27f1ce0, L_0x27eed40, L_0x27f1e20, L_0x27f20a0; +RS_0x7f6901daefc8/0/28 .resolv tri, L_0x27f22f0, L_0x27f25a0, L_0x27f2810, L_0x27f2af0; +RS_0x7f6901daefc8/1/0 .resolv tri, RS_0x7f6901daefc8/0/0, RS_0x7f6901daefc8/0/4, RS_0x7f6901daefc8/0/8, RS_0x7f6901daefc8/0/12; +RS_0x7f6901daefc8/1/4 .resolv tri, RS_0x7f6901daefc8/0/16, RS_0x7f6901daefc8/0/20, RS_0x7f6901daefc8/0/24, RS_0x7f6901daefc8/0/28; +RS_0x7f6901daefc8 .resolv tri, RS_0x7f6901daefc8/1/0, RS_0x7f6901daefc8/1/4, C4, C4; +v0x27ebfe0_0 .net8 "invertedB", 31 0, RS_0x7f6901daefc8; 32 drivers +v0x27ec060_0 .alias "opA", 31 0, v0x27ebf20_0; +v0x27ebd40_0 .alias "opB", 31 0, v0x27ec5a0_0; +v0x27ebdc0_0 .alias "overflow", 0 0, v0x27ec420_0; +L_0x27edc90 .part/pv L_0x27e8c60, 0, 1, 32; +L_0x27eddd0 .part v0x27be3e0_0, 0, 1; +L_0x27edec0 .part/pv L_0x27edf60, 1, 1, 32; +L_0x27ee010 .part v0x27be3e0_0, 1, 1; +L_0x27ee100 .part/pv L_0x27ee230, 2, 1, 32; +L_0x27ee290 .part v0x27be3e0_0, 2, 1; +L_0x27ee380 .part/pv L_0x27ee420, 3, 1, 32; +L_0x27ee4d0 .part v0x27be3e0_0, 3, 1; +L_0x27ee610 .part/pv L_0x27ee6b0, 4, 1, 32; +L_0x27ee760 .part v0x27be3e0_0, 4, 1; +L_0x27ee8b0 .part/pv L_0x27ee950, 5, 1, 32; +L_0x27ee9b0 .part v0x27be3e0_0, 5, 1; +L_0x27eeaa0 .part/pv L_0x27ee850, 6, 1, 32; +L_0x27eec50 .part v0x27be3e0_0, 6, 1; +L_0x27eef50 .part/pv L_0x27ec6a0, 7, 1, 32; +L_0x27ef090 .part v0x27be3e0_0, 7, 1; +L_0x27ef210 .part/pv L_0x27ef2b0, 8, 1, 32; +L_0x27ef360 .part v0x27be3e0_0, 8, 1; +L_0x27ef4f0 .part/pv L_0x27ef180, 9, 1, 32; +L_0x27ef640 .part v0x27be3e0_0, 9, 1; +L_0x27ef450 .part/pv L_0x27ef790, 10, 1, 32; +L_0x27ef840 .part v0x27be3e0_0, 10, 1; +L_0x27ef6e0 .part/pv L_0x27ef9f0, 11, 1, 32; +L_0x27efaa0 .part v0x27be3e0_0, 11, 1; +L_0x27ef930 .part/pv L_0x27ef5e0, 12, 1, 32; +L_0x27efcb0 .part v0x27be3e0_0, 12, 1; +L_0x27efb90 .part/pv L_0x27efe80, 13, 1, 32; +L_0x27eff30 .part v0x27be3e0_0, 13, 1; +L_0x27efda0 .part/pv L_0x27eeb40, 14, 1, 32; +L_0x27f0320 .part v0x27be3e0_0, 14, 1; +L_0x27f0020 .part/pv L_0x27f04c0, 15, 1, 32; +L_0x27f05b0 .part v0x27be3e0_0, 15, 1; +L_0x27f03c0 .part/pv L_0x27f0460, 16, 1, 32; +L_0x27f0800 .part v0x27be3e0_0, 16, 1; +L_0x27f06a0 .part/pv L_0x27f0740, 17, 1, 32; +L_0x27f0b00 .part v0x27be3e0_0, 17, 1; +L_0x27f08f0 .part/pv L_0x27f0990, 18, 1, 32; +L_0x27f0d20 .part v0x27be3e0_0, 18, 1; +L_0x27f0ba0 .part/pv L_0x27f0c40, 19, 1, 32; +L_0x27f0a60 .part v0x27be3e0_0, 19, 1; +L_0x27f0e10 .part/pv L_0x27f0eb0, 20, 1, 32; +L_0x27f1240 .part v0x27be3e0_0, 20, 1; +L_0x27f10a0 .part/pv L_0x27f1140, 21, 1, 32; +L_0x27f0fa0 .part v0x27be3e0_0, 21, 1; +L_0x27f1330 .part/pv L_0x27f13d0, 22, 1, 32; +L_0x27f1710 .part v0x27be3e0_0, 22, 1; +L_0x27f15a0 .part/pv L_0x27e9a90, 23, 1, 32; +L_0x27f1490 .part v0x27be3e0_0, 23, 1; +L_0x27f1ce0 .part/pv L_0x27ed930, 24, 1, 32; +L_0x27f1d80 .part v0x27be3e0_0, 24, 1; +L_0x27eed40 .part/pv L_0x27eede0, 25, 1, 32; +L_0x27f1c10 .part v0x27be3e0_0, 25, 1; +L_0x27f1e20 .part/pv L_0x27f1ec0, 26, 1, 32; +L_0x27f2250 .part v0x27be3e0_0, 26, 1; +L_0x27f20a0 .part/pv L_0x27f2140, 27, 1, 32; +L_0x27f1fc0 .part v0x27be3e0_0, 27, 1; +L_0x27f22f0 .part/pv L_0x27f2390, 28, 1, 32; +L_0x27f2770 .part v0x27be3e0_0, 28, 1; +L_0x27f25a0 .part/pv L_0x27f2640, 29, 1, 32; +L_0x27f2490 .part v0x27be3e0_0, 29, 1; +L_0x27f2810 .part/pv L_0x27f26f0, 30, 1, 32; +L_0x27f28b0 .part v0x27be3e0_0, 30, 1; +L_0x27f2af0 .part/pv L_0x27f2b90, 31, 1, 32; +L_0x27f2bf0 .part v0x27be3e0_0, 31, 1; +L_0x27fe1e0 .part v0x27ed130_0, 0, 1; +RS_0x7f6901dad768 .resolv tri, L_0x27ff090, L_0x27ffd40, L_0x2800a30, L_0x2801690; +L_0x28027e0 .part/pv RS_0x7f6901dad768, 0, 4, 32; +L_0x27f0110 .part v0x27ecef0_0, 0, 4; +L_0x27f01b0 .part RS_0x7f6901daf628, 0, 4; +L_0x27f0250 .part v0x27ed130_0, 0, 1; +RS_0x7f6901dac988 .resolv tri, L_0x2803550, L_0x28041a0, L_0x2804ee0, L_0x2805b40; +L_0x2806c20 .part/pv RS_0x7f6901dac988, 4, 4, 32; +L_0x28028d0 .part v0x27ecef0_0, 4, 4; +L_0x2802970 .part RS_0x7f6901daf628, 4, 4; +RS_0x7f6901dabba8 .resolv tri, L_0x2807860, L_0x28084b0, L_0x28091f0, L_0x2809e50; +L_0x280af30 .part/pv RS_0x7f6901dabba8, 8, 4, 32; +L_0x280b060 .part v0x27ecef0_0, 8, 4; +L_0x2806cc0 .part RS_0x7f6901daf628, 8, 4; +RS_0x7f6901daadc8 .resolv tri, L_0x280bbb0, L_0x280c800, L_0x280d540, L_0x280e1a0; +L_0x280f280 .part/pv RS_0x7f6901daadc8, 12, 4, 32; +L_0x280b100 .part v0x27ecef0_0, 12, 4; +L_0x280b1a0 .part RS_0x7f6901daf628, 12, 4; +RS_0x7f6901da9fe8 .resolv tri, L_0x280fe90, L_0x2810ae0, L_0x2811820, L_0x2812480; +L_0x2813560 .part/pv RS_0x7f6901da9fe8, 16, 4, 32; +L_0x2813600 .part v0x27ecef0_0, 16, 4; +L_0x280f320 .part RS_0x7f6901daf628, 16, 4; +RS_0x7f6901da9208 .resolv tri, L_0x2814180, L_0x2814dd0, L_0x2815b10, L_0x2816770; +L_0x2817850 .part/pv RS_0x7f6901da9208, 20, 4, 32; +L_0x28136a0 .part v0x27ecef0_0, 20, 4; +L_0x2813740 .part RS_0x7f6901daf628, 20, 4; +RS_0x7f6901da8428 .resolv tri, L_0x28184a0, L_0x28190f0, L_0x2819e30, L_0x281aa90; +L_0x281bb70 .part/pv RS_0x7f6901da8428, 24, 4, 32; +L_0x281bd20 .part v0x27ecef0_0, 24, 4; +L_0x28178f0 .part RS_0x7f6901daf628, 24, 4; +RS_0x7f6901da7648 .resolv tri, L_0x281c830, L_0x281d480, L_0x281e1c0, L_0x281ee60; +L_0x281fef0 .part/pv RS_0x7f6901da7648, 28, 4, 32; +L_0x281bdc0 .part v0x27ecef0_0, 28, 4; +L_0x27ecf70 .part RS_0x7f6901daf628, 28, 4; +S_0x27e18e0 .scope module, "addsubmux" "muxtype1" 5 235, 5 3, S_0x27c4350; + .timescale -9 -12; +L_0x27eeee0 .functor NOT 1, L_0x27fe1e0, C4<0>, C4<0>, C4<0>; +L_0x27f29f0 .functor AND 1, L_0x27f3200, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f32a0 .functor AND 1, L_0x27f3300, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f33f0 .functor AND 1, L_0x27f34e0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3580 .functor AND 1, L_0x27f35e0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f36d0 .functor AND 1, L_0x27f3730, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3820 .functor AND 1, L_0x27f3880, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3970 .functor AND 1, L_0x27f3ae0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3bd0 .functor AND 1, L_0x27f3c30, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3d70 .functor AND 1, L_0x27f3dd0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3ec0 .functor AND 1, L_0x27f3f20, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4070 .functor AND 1, L_0x27f4140, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f3450 .functor AND 1, L_0x27f41e0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4010 .functor AND 1, L_0x27f43c0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f44b0 .functor AND 1, L_0x27f4510, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4680 .functor AND 1, L_0x27f48f0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4990 .functor AND 1, L_0x27f49f0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4b70 .functor AND 1, L_0x27f4c70, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4d10 .functor AND 1, L_0x27f4d70, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4ae0 .functor AND 1, L_0x27f4bd0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f5000 .functor AND 1, L_0x27f50c0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4e60 .functor AND 1, L_0x27f4f00, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f5370 .functor AND 1, L_0x27f5400, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f51b0 .functor AND 1, L_0x27f5240, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f40d0 .functor AND 1, L_0x27f42d0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f4600 .functor AND 1, L_0x27f54f0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f55e0 .functor AND 1, L_0x27f19b0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f1b80 .functor AND 1, L_0x27f1800, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f18f0 .functor AND 1, L_0x27f5fd0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f1aa0 .functor AND 1, L_0x27f5ee0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f62b0 .functor AND 1, L_0x27f6310, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f60c0 .functor AND 1, L_0x27f47f0, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f6180 .functor AND 1, L_0x27f6210, L_0x27eeee0, C4<1>, C4<1>; +L_0x27f63b0 .functor AND 1, L_0x27f46e0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f6b40 .functor AND 1, L_0x27f6ba0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f6910 .functor AND 1, L_0x27f69a0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f6a40 .functor AND 1, L_0x27f6f70, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f6c90 .functor AND 1, L_0x27f6e40, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f6d20 .functor AND 1, L_0x27f7280, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7010 .functor AND 1, L_0x27f70a0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7190 .functor AND 1, L_0x27f7710, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f6db0 .functor AND 1, L_0x27f7370, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f75c0 .functor AND 1, L_0x27f7650, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f77b0 .functor AND 1, L_0x27f7810, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7900 .functor AND 1, L_0x27f7960, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7a60 .functor AND 1, L_0x27f7af0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7be0 .functor AND 1, L_0x27f7c70, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7d10 .functor AND 1, L_0x27f7da0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7e90 .functor AND 1, L_0x27f7f20, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f74b0 .functor AND 1, L_0x27f8070, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f8160 .functor AND 1, L_0x27f8400, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f84f0 .functor AND 1, L_0x27f8700, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f87f0 .functor AND 1, L_0x27f8a60, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f88a0 .functor AND 1, L_0x27f8930, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f7540 .functor AND 1, L_0x27f8550, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f8640 .functor AND 1, L_0x27f8b00, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f8bf0 .functor AND 1, L_0x27f8c80, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f8d70 .functor AND 1, L_0x27f8fe0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f90d0 .functor AND 1, L_0x27f9130, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f91d0 .functor AND 1, L_0x27f9260, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f9350 .functor AND 1, L_0x27f8e00, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f8ef0 .functor AND 1, L_0x27f9420, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f9510 .functor AND 1, L_0x27f9570, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f9660 .functor AND 1, L_0x27f96f0, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f97e0 .functor AND 1, L_0x27f9870, L_0x27fe1e0, C4<1>, C4<1>; +L_0x27f9c60 .functor OR 1, L_0x27f29f0, L_0x27f63b0, C4<0>, C4<0>; +L_0x27f2fa0 .functor OR 1, L_0x27f32a0, L_0x27f6b40, C4<0>, C4<0>; +L_0x27f8320 .functor OR 1, L_0x27f33f0, L_0x27f6910, C4<0>, C4<0>; +L_0x27f9a50 .functor OR 1, L_0x27f3580, L_0x27f6a40, C4<0>, C4<0>; +L_0x27f2dd0 .functor OR 1, L_0x27f36d0, L_0x27f6c90, C4<0>, C4<0>; +L_0x27fad30 .functor OR 1, L_0x27f3820, L_0x27f6d20, C4<0>, C4<0>; +L_0x27f8290 .functor OR 1, L_0x27f3970, L_0x27f7010, C4<0>, C4<0>; +L_0x27fb120 .functor OR 1, L_0x27f3bd0, L_0x27f7190, C4<0>, C4<0>; +L_0x27fab90 .functor OR 1, L_0x27f3d70, L_0x27f6db0, C4<0>, C4<0>; +L_0x27fb360 .functor OR 1, L_0x27f3ec0, L_0x27f75c0, C4<0>, C4<0>; +L_0x27fb550 .functor OR 1, L_0x27f4070, L_0x27f77b0, C4<0>, C4<0>; +L_0x27fb9b0 .functor OR 1, L_0x27f3450, L_0x27f7900, C4<0>, C4<0>; +L_0x27fbba0 .functor OR 1, L_0x27f4010, L_0x27f7a60, C4<0>, C4<0>; +L_0x27fbd40 .functor OR 1, L_0x27f44b0, L_0x27f7be0, C4<0>, C4<0>; +L_0x27fb950 .functor OR 1, L_0x27f4680, L_0x27f7d10, C4<0>, C4<0>; +L_0x27fc020 .functor OR 1, L_0x27f4990, L_0x27f7e90, C4<0>, C4<0>; +L_0x27fc210 .functor OR 1, L_0x27f4b70, L_0x27f74b0, C4<0>, C4<0>; +L_0x27fc6a0 .functor OR 1, L_0x27f4d10, L_0x27f8160, C4<0>, C4<0>; +L_0x27fc890 .functor OR 1, L_0x27f4ae0, L_0x27f84f0, C4<0>, C4<0>; +L_0x27fca40 .functor OR 1, L_0x27f5000, L_0x27f87f0, C4<0>, C4<0>; +L_0x27fc400 .functor OR 1, L_0x27f4e60, L_0x27f88a0, C4<0>, C4<0>; +L_0x27fc5f0 .functor OR 1, L_0x27f5370, L_0x27f7540, C4<0>, C4<0>; +L_0x27fcdd0 .functor OR 1, L_0x27f51b0, L_0x27f8640, C4<0>, C4<0>; +L_0x27fd290 .functor OR 1, L_0x27f40d0, L_0x27f8bf0, C4<0>, C4<0>; +L_0x27fd780 .functor OR 1, L_0x27f4600, L_0x27f8d70, C4<0>, C4<0>; +L_0x27fcfc0 .functor OR 1, L_0x27f55e0, L_0x27f90d0, C4<0>, C4<0>; +L_0x27fd480 .functor OR 1, L_0x27f1b80, L_0x27f91d0, C4<0>, C4<0>; +L_0x27fd670 .functor OR 1, L_0x27f18f0, L_0x27f9350, C4<0>, C4<0>; +L_0x27fd9c0 .functor OR 1, L_0x27f1aa0, L_0x27f8ef0, C4<0>, C4<0>; +L_0x27fdeb0 .functor OR 1, L_0x27f62b0, L_0x27f9510, C4<0>, C4<0>; +L_0x27f8f50 .functor OR 1, L_0x27f60c0, L_0x27f9660, C4<0>, C4<0>; +L_0x27f1950 .functor OR 1, L_0x27f6180, L_0x27f97e0, C4<0>, C4<0>; +v0x27e19d0_0 .net *"_s1", 0 0, L_0x27f3200; 1 drivers +v0x27e1a90_0 .net *"_s101", 0 0, L_0x27f8700; 1 drivers +v0x27e1b30_0 .net *"_s103", 0 0, L_0x27f8a60; 1 drivers +v0x27e1bd0_0 .net *"_s105", 0 0, L_0x27f8930; 1 drivers +v0x27e1c50_0 .net *"_s107", 0 0, L_0x27f8550; 1 drivers +v0x27e1cf0_0 .net *"_s109", 0 0, L_0x27f8b00; 1 drivers +v0x27e1d90_0 .net *"_s11", 0 0, L_0x27f3880; 1 drivers +v0x27e1e30_0 .net *"_s111", 0 0, L_0x27f8c80; 1 drivers +v0x27e1f20_0 .net *"_s113", 0 0, L_0x27f8fe0; 1 drivers +v0x27e1fc0_0 .net *"_s115", 0 0, L_0x27f9130; 1 drivers +v0x27e2060_0 .net *"_s117", 0 0, L_0x27f9260; 1 drivers +v0x27e2100_0 .net *"_s119", 0 0, L_0x27f8e00; 1 drivers +v0x27e21a0_0 .net *"_s121", 0 0, L_0x27f9420; 1 drivers +v0x27e2240_0 .net *"_s123", 0 0, L_0x27f9570; 1 drivers +v0x27e2360_0 .net *"_s125", 0 0, L_0x27f96f0; 1 drivers +v0x27e2400_0 .net *"_s127", 0 0, L_0x27f9870; 1 drivers +v0x27e22c0_0 .net *"_s128", 0 0, L_0x27f9c60; 1 drivers +v0x27e2550_0 .net *"_s13", 0 0, L_0x27f3ae0; 1 drivers +v0x27e2670_0 .net *"_s130", 0 0, L_0x27f2fa0; 1 drivers +v0x27e26f0_0 .net *"_s132", 0 0, L_0x27f8320; 1 drivers +v0x27e25d0_0 .net *"_s134", 0 0, L_0x27f9a50; 1 drivers +v0x27e2820_0 .net *"_s136", 0 0, L_0x27f2dd0; 1 drivers +v0x27e2770_0 .net *"_s138", 0 0, L_0x27fad30; 1 drivers +v0x27e2960_0 .net *"_s140", 0 0, L_0x27f8290; 1 drivers +v0x27e28c0_0 .net *"_s142", 0 0, L_0x27fb120; 1 drivers +v0x27e2ab0_0 .net *"_s144", 0 0, L_0x27fab90; 1 drivers +v0x27e2a00_0 .net *"_s146", 0 0, L_0x27fb360; 1 drivers +v0x27e2c10_0 .net *"_s148", 0 0, L_0x27fb550; 1 drivers +v0x27e2b50_0 .net *"_s15", 0 0, L_0x27f3c30; 1 drivers +v0x27e2d80_0 .net *"_s150", 0 0, L_0x27fb9b0; 1 drivers +v0x27e2c90_0 .net *"_s152", 0 0, L_0x27fbba0; 1 drivers +v0x27e2f00_0 .net *"_s154", 0 0, L_0x27fbd40; 1 drivers +v0x27e2e00_0 .net *"_s156", 0 0, L_0x27fb950; 1 drivers +v0x27e3090_0 .net *"_s158", 0 0, L_0x27fc020; 1 drivers +v0x27e2f80_0 .net *"_s160", 0 0, L_0x27fc210; 1 drivers +v0x27e3230_0 .net *"_s162", 0 0, L_0x27fc6a0; 1 drivers +v0x27e3110_0 .net *"_s164", 0 0, L_0x27fc890; 1 drivers +v0x27e31b0_0 .net *"_s166", 0 0, L_0x27fca40; 1 drivers +v0x27e33f0_0 .net *"_s168", 0 0, L_0x27fc400; 1 drivers +v0x27e3470_0 .net *"_s17", 0 0, L_0x27f3dd0; 1 drivers +v0x27e32b0_0 .net *"_s170", 0 0, L_0x27fc5f0; 1 drivers +v0x27e3350_0 .net *"_s172", 0 0, L_0x27fcdd0; 1 drivers +v0x27e3650_0 .net *"_s174", 0 0, L_0x27fd290; 1 drivers +v0x27e36d0_0 .net *"_s176", 0 0, L_0x27fd780; 1 drivers +v0x27e34f0_0 .net *"_s178", 0 0, L_0x27fcfc0; 1 drivers +v0x27e3590_0 .net *"_s180", 0 0, L_0x27fd480; 1 drivers +v0x27e38d0_0 .net *"_s182", 0 0, L_0x27fd670; 1 drivers +v0x27e3950_0 .net *"_s184", 0 0, L_0x27fd9c0; 1 drivers +v0x27e3770_0 .net *"_s186", 0 0, L_0x27fdeb0; 1 drivers +v0x27e3810_0 .net *"_s188", 0 0, L_0x27f8f50; 1 drivers +v0x27e3b70_0 .net *"_s19", 0 0, L_0x27f3f20; 1 drivers +v0x27e3bf0_0 .net *"_s190", 0 0, L_0x27f1950; 1 drivers +v0x27e39f0_0 .net *"_s21", 0 0, L_0x27f4140; 1 drivers +v0x27e3a90_0 .net *"_s23", 0 0, L_0x27f41e0; 1 drivers +v0x27e3e30_0 .net *"_s25", 0 0, L_0x27f43c0; 1 drivers +v0x27e3eb0_0 .net *"_s27", 0 0, L_0x27f4510; 1 drivers +v0x27e3c70_0 .net *"_s29", 0 0, L_0x27f48f0; 1 drivers +v0x27e3d10_0 .net *"_s3", 0 0, L_0x27f3300; 1 drivers +v0x27e3db0_0 .net *"_s31", 0 0, L_0x27f49f0; 1 drivers +v0x27e4130_0 .net *"_s33", 0 0, L_0x27f4c70; 1 drivers +v0x27e3f50_0 .net *"_s35", 0 0, L_0x27f4d70; 1 drivers +v0x27e3ff0_0 .net *"_s37", 0 0, L_0x27f4bd0; 1 drivers +v0x27e4090_0 .net *"_s39", 0 0, L_0x27f50c0; 1 drivers +v0x27e43d0_0 .net *"_s41", 0 0, L_0x27f4f00; 1 drivers +v0x27e41d0_0 .net *"_s43", 0 0, L_0x27f5400; 1 drivers +v0x27e4270_0 .net *"_s45", 0 0, L_0x27f5240; 1 drivers +v0x27e4310_0 .net *"_s47", 0 0, L_0x27f42d0; 1 drivers +v0x27e4670_0 .net *"_s49", 0 0, L_0x27f54f0; 1 drivers +v0x27e4470_0 .net *"_s5", 0 0, L_0x27f34e0; 1 drivers +v0x27e4510_0 .net *"_s51", 0 0, L_0x27f19b0; 1 drivers +v0x27e45b0_0 .net *"_s53", 0 0, L_0x27f1800; 1 drivers +v0x27e4930_0 .net *"_s55", 0 0, L_0x27f5fd0; 1 drivers +v0x27e46f0_0 .net *"_s57", 0 0, L_0x27f5ee0; 1 drivers +v0x27e4790_0 .net *"_s59", 0 0, L_0x27f6310; 1 drivers +v0x27e4830_0 .net *"_s61", 0 0, L_0x27f47f0; 1 drivers +v0x27e4c10_0 .net *"_s63", 0 0, L_0x27f6210; 1 drivers +v0x27e49b0_0 .net *"_s65", 0 0, L_0x27f46e0; 1 drivers +v0x27e4a50_0 .net *"_s67", 0 0, L_0x27f6ba0; 1 drivers +v0x27e4af0_0 .net *"_s69", 0 0, L_0x27f69a0; 1 drivers +v0x27e4b90_0 .net *"_s7", 0 0, L_0x27f35e0; 1 drivers +v0x27e4f20_0 .net *"_s71", 0 0, L_0x27f6f70; 1 drivers +v0x27e4fa0_0 .net *"_s73", 0 0, L_0x27f6e40; 1 drivers +v0x27e4cb0_0 .net *"_s75", 0 0, L_0x27f7280; 1 drivers +v0x27e4d50_0 .net *"_s77", 0 0, L_0x27f70a0; 1 drivers +v0x27e4df0_0 .net *"_s79", 0 0, L_0x27f7710; 1 drivers +v0x27e4e90_0 .net *"_s81", 0 0, L_0x27f7370; 1 drivers +v0x27e5300_0 .net *"_s83", 0 0, L_0x27f7650; 1 drivers +v0x27e53a0_0 .net *"_s85", 0 0, L_0x27f7810; 1 drivers +v0x27e5040_0 .net *"_s87", 0 0, L_0x27f7960; 1 drivers +v0x27e50e0_0 .net *"_s89", 0 0, L_0x27f7af0; 1 drivers +v0x27e5180_0 .net *"_s9", 0 0, L_0x27f3730; 1 drivers +v0x27e5220_0 .net *"_s91", 0 0, L_0x27f7c70; 1 drivers +v0x27e5710_0 .net *"_s93", 0 0, L_0x27f7da0; 1 drivers +v0x27e5790_0 .net *"_s95", 0 0, L_0x27f7f20; 1 drivers +v0x27e5440_0 .net *"_s97", 0 0, L_0x27f8070; 1 drivers +v0x27e54e0_0 .net *"_s99", 0 0, L_0x27f8400; 1 drivers +v0x27e5580_0 .net "address", 0 0, L_0x27fe1e0; 1 drivers +v0x27e5620_0 .alias "in0", 31 0, v0x27ec5a0_0; +v0x27e5b30_0 .net "in00addr", 0 0, L_0x27f29f0; 1 drivers +v0x27e5bb0_0 .net "in010addr", 0 0, L_0x27f4070; 1 drivers +v0x27e5810_0 .net "in011addr", 0 0, L_0x27f3450; 1 drivers +v0x27e58b0_0 .net "in012addr", 0 0, L_0x27f4010; 1 drivers +v0x27e5950_0 .net "in013addr", 0 0, L_0x27f44b0; 1 drivers +v0x27e59f0_0 .net "in014addr", 0 0, L_0x27f4680; 1 drivers +v0x27e5a90_0 .net "in015addr", 0 0, L_0x27f4990; 1 drivers +v0x27e5f80_0 .net "in016addr", 0 0, L_0x27f4b70; 1 drivers +v0x27e5c30_0 .net "in017addr", 0 0, L_0x27f4d10; 1 drivers +v0x27e5cd0_0 .net "in018addr", 0 0, L_0x27f4ae0; 1 drivers +v0x27e5d70_0 .net "in019addr", 0 0, L_0x27f5000; 1 drivers +v0x27e5e10_0 .net "in01addr", 0 0, L_0x27f32a0; 1 drivers +v0x27e5eb0_0 .net "in020addr", 0 0, L_0x27f4e60; 1 drivers +v0x27e6380_0 .net "in021addr", 0 0, L_0x27f5370; 1 drivers +v0x27e6000_0 .net "in022addr", 0 0, L_0x27f51b0; 1 drivers +v0x27e60a0_0 .net "in023addr", 0 0, L_0x27f40d0; 1 drivers +v0x27e6140_0 .net "in024addr", 0 0, L_0x27f4600; 1 drivers +v0x27e61e0_0 .net "in025addr", 0 0, L_0x27f55e0; 1 drivers +v0x27e6280_0 .net "in026addr", 0 0, L_0x27f1b80; 1 drivers +v0x27e67b0_0 .net "in027addr", 0 0, L_0x27f18f0; 1 drivers +v0x27e6400_0 .net "in028addr", 0 0, L_0x27f1aa0; 1 drivers +v0x27e64a0_0 .net "in029addr", 0 0, L_0x27f62b0; 1 drivers +v0x27e6540_0 .net "in02addr", 0 0, L_0x27f33f0; 1 drivers +v0x27e65e0_0 .net "in030addr", 0 0, L_0x27f60c0; 1 drivers +v0x27e6680_0 .net "in031addr", 0 0, L_0x27f6180; 1 drivers +v0x27e6720_0 .net "in03addr", 0 0, L_0x27f3580; 1 drivers +v0x27e6c20_0 .net "in04addr", 0 0, L_0x27f36d0; 1 drivers +v0x27e6ca0_0 .net "in05addr", 0 0, L_0x27f3820; 1 drivers +v0x27e6830_0 .net "in06addr", 0 0, L_0x27f3970; 1 drivers +v0x27e68d0_0 .net "in07addr", 0 0, L_0x27f3bd0; 1 drivers +v0x27e6970_0 .net "in08addr", 0 0, L_0x27f3d70; 1 drivers +v0x27e6a10_0 .net "in09addr", 0 0, L_0x27f3ec0; 1 drivers +v0x27e6ab0_0 .alias "in1", 31 0, v0x27ebfe0_0; +v0x27e6b50_0 .net "in10addr", 0 0, L_0x27f63b0; 1 drivers +v0x27e7150_0 .net "in110addr", 0 0, L_0x27f77b0; 1 drivers +v0x27e71d0_0 .net "in111addr", 0 0, L_0x27f7900; 1 drivers +v0x27e6d20_0 .net "in112addr", 0 0, L_0x27f7a60; 1 drivers +v0x27e6dc0_0 .net "in113addr", 0 0, L_0x27f7be0; 1 drivers +v0x27e6e60_0 .net "in114addr", 0 0, L_0x27f7d10; 1 drivers +v0x27e6f00_0 .net "in115addr", 0 0, L_0x27f7e90; 1 drivers +v0x27e6fa0_0 .net "in116addr", 0 0, L_0x27f74b0; 1 drivers +v0x27e7040_0 .net "in117addr", 0 0, L_0x27f8160; 1 drivers +v0x27e76c0_0 .net "in118addr", 0 0, L_0x27f84f0; 1 drivers +v0x27e7740_0 .net "in119addr", 0 0, L_0x27f87f0; 1 drivers +v0x27e7250_0 .net "in11addr", 0 0, L_0x27f6b40; 1 drivers +v0x27e72f0_0 .net "in120addr", 0 0, L_0x27f88a0; 1 drivers +v0x27e7390_0 .net "in121addr", 0 0, L_0x27f7540; 1 drivers +v0x27e7430_0 .net "in122addr", 0 0, L_0x27f8640; 1 drivers +v0x27e74d0_0 .net "in123addr", 0 0, L_0x27f8bf0; 1 drivers +v0x27e7570_0 .net "in124addr", 0 0, L_0x27f8d70; 1 drivers +v0x27e7610_0 .net "in125addr", 0 0, L_0x27f90d0; 1 drivers +v0x27e7c70_0 .net "in126addr", 0 0, L_0x27f91d0; 1 drivers +v0x27e77c0_0 .net "in127addr", 0 0, L_0x27f9350; 1 drivers +v0x27e7840_0 .net "in128addr", 0 0, L_0x27f8ef0; 1 drivers +v0x27e78e0_0 .net "in129addr", 0 0, L_0x27f9510; 1 drivers +v0x27e7980_0 .net "in12addr", 0 0, L_0x27f6910; 1 drivers +v0x27e7a20_0 .net "in130addr", 0 0, L_0x27f9660; 1 drivers +v0x27e7ac0_0 .net "in131addr", 0 0, L_0x27f97e0; 1 drivers +v0x27e7b60_0 .net "in13addr", 0 0, L_0x27f6a40; 1 drivers +v0x27e81e0_0 .net "in14addr", 0 0, L_0x27f6c90; 1 drivers +v0x27e7cf0_0 .net "in15addr", 0 0, L_0x27f6d20; 1 drivers +v0x27e7d90_0 .net "in16addr", 0 0, L_0x27f7010; 1 drivers +v0x27e7e30_0 .net "in17addr", 0 0, L_0x27f7190; 1 drivers +v0x27e7ed0_0 .net "in18addr", 0 0, L_0x27f6db0; 1 drivers +v0x27e7f70_0 .net "in19addr", 0 0, L_0x27f75c0; 1 drivers +v0x27e8010_0 .net "invaddr", 0 0, L_0x27eeee0; 1 drivers +v0x27e80b0_0 .alias "out", 31 0, v0x27eba40_0; +L_0x27f3200 .part v0x27be3e0_0, 0, 1; +L_0x27f3300 .part v0x27be3e0_0, 1, 1; +L_0x27f34e0 .part v0x27be3e0_0, 2, 1; +L_0x27f35e0 .part v0x27be3e0_0, 3, 1; +L_0x27f3730 .part v0x27be3e0_0, 4, 1; +L_0x27f3880 .part v0x27be3e0_0, 5, 1; +L_0x27f3ae0 .part v0x27be3e0_0, 6, 1; +L_0x27f3c30 .part v0x27be3e0_0, 7, 1; +L_0x27f3dd0 .part v0x27be3e0_0, 8, 1; +L_0x27f3f20 .part v0x27be3e0_0, 9, 1; +L_0x27f4140 .part v0x27be3e0_0, 10, 1; +L_0x27f41e0 .part v0x27be3e0_0, 11, 1; +L_0x27f43c0 .part v0x27be3e0_0, 12, 1; +L_0x27f4510 .part v0x27be3e0_0, 13, 1; +L_0x27f48f0 .part v0x27be3e0_0, 14, 1; +L_0x27f49f0 .part v0x27be3e0_0, 15, 1; +L_0x27f4c70 .part v0x27be3e0_0, 16, 1; +L_0x27f4d70 .part v0x27be3e0_0, 17, 1; +L_0x27f4bd0 .part v0x27be3e0_0, 18, 1; +L_0x27f50c0 .part v0x27be3e0_0, 19, 1; +L_0x27f4f00 .part v0x27be3e0_0, 20, 1; +L_0x27f5400 .part v0x27be3e0_0, 21, 1; +L_0x27f5240 .part v0x27be3e0_0, 22, 1; +L_0x27f42d0 .part v0x27be3e0_0, 23, 1; +L_0x27f54f0 .part v0x27be3e0_0, 24, 1; +L_0x27f19b0 .part v0x27be3e0_0, 25, 1; +L_0x27f1800 .part v0x27be3e0_0, 26, 1; +L_0x27f5fd0 .part v0x27be3e0_0, 27, 1; +L_0x27f5ee0 .part v0x27be3e0_0, 28, 1; +L_0x27f6310 .part v0x27be3e0_0, 29, 1; +L_0x27f47f0 .part v0x27be3e0_0, 30, 1; +L_0x27f6210 .part v0x27be3e0_0, 31, 1; +L_0x27f46e0 .part RS_0x7f6901daefc8, 0, 1; +L_0x27f6ba0 .part RS_0x7f6901daefc8, 1, 1; +L_0x27f69a0 .part RS_0x7f6901daefc8, 2, 1; +L_0x27f6f70 .part RS_0x7f6901daefc8, 3, 1; +L_0x27f6e40 .part RS_0x7f6901daefc8, 4, 1; +L_0x27f7280 .part RS_0x7f6901daefc8, 5, 1; +L_0x27f70a0 .part RS_0x7f6901daefc8, 6, 1; +L_0x27f7710 .part RS_0x7f6901daefc8, 7, 1; +L_0x27f7370 .part RS_0x7f6901daefc8, 8, 1; +L_0x27f7650 .part RS_0x7f6901daefc8, 9, 1; +L_0x27f7810 .part RS_0x7f6901daefc8, 10, 1; +L_0x27f7960 .part RS_0x7f6901daefc8, 11, 1; +L_0x27f7af0 .part RS_0x7f6901daefc8, 12, 1; +L_0x27f7c70 .part RS_0x7f6901daefc8, 13, 1; +L_0x27f7da0 .part RS_0x7f6901daefc8, 14, 1; +L_0x27f7f20 .part RS_0x7f6901daefc8, 15, 1; +L_0x27f8070 .part RS_0x7f6901daefc8, 16, 1; +L_0x27f8400 .part RS_0x7f6901daefc8, 17, 1; +L_0x27f8700 .part RS_0x7f6901daefc8, 18, 1; +L_0x27f8a60 .part RS_0x7f6901daefc8, 19, 1; +L_0x27f8930 .part RS_0x7f6901daefc8, 20, 1; +L_0x27f8550 .part RS_0x7f6901daefc8, 21, 1; +L_0x27f8b00 .part RS_0x7f6901daefc8, 22, 1; +L_0x27f8c80 .part RS_0x7f6901daefc8, 23, 1; +L_0x27f8fe0 .part RS_0x7f6901daefc8, 24, 1; +L_0x27f9130 .part RS_0x7f6901daefc8, 25, 1; +L_0x27f9260 .part RS_0x7f6901daefc8, 26, 1; +L_0x27f8e00 .part RS_0x7f6901daefc8, 27, 1; +L_0x27f9420 .part RS_0x7f6901daefc8, 28, 1; +L_0x27f9570 .part RS_0x7f6901daefc8, 29, 1; +L_0x27f96f0 .part RS_0x7f6901daefc8, 30, 1; +L_0x27f9870 .part RS_0x7f6901daefc8, 31, 1; +L_0x27f9b70 .part/pv L_0x27f9c60, 0, 1, 32; +L_0x27f2f00 .part/pv L_0x27f2fa0, 1, 1, 32; +L_0x27f81f0 .part/pv L_0x27f8320, 2, 1, 32; +L_0x27f99b0 .part/pv L_0x27f9a50, 3, 1, 32; +L_0x27f2d30 .part/pv L_0x27f2dd0, 4, 1, 32; +L_0x27faa50 .part/pv L_0x27fad30, 5, 1, 32; +L_0x27fae80 .part/pv L_0x27f8290, 6, 1, 32; +L_0x27fb080 .part/pv L_0x27fb120, 7, 1, 32; +L_0x27faaf0 .part/pv L_0x27fab90, 8, 1, 32; +L_0x27fac90 .part/pv L_0x27fb360, 9, 1, 32; +L_0x27fb4b0 .part/pv L_0x27fb550, 10, 1, 32; +L_0x27fb6a0 .part/pv L_0x27fb9b0, 11, 1, 32; +L_0x27fbb00 .part/pv L_0x27fbba0, 12, 1, 32; +L_0x27fbca0 .part/pv L_0x27fbd40, 13, 1, 32; +L_0x27fbe90 .part/pv L_0x27fb950, 14, 1, 32; +L_0x27fbf80 .part/pv L_0x27fc020, 15, 1, 32; +L_0x27fc170 .part/pv L_0x27fc210, 16, 1, 32; +L_0x27fc360 .part/pv L_0x27fc6a0, 17, 1, 32; +L_0x27fc7f0 .part/pv L_0x27fc890, 18, 1, 32; +L_0x27fc9a0 .part/pv L_0x27fca40, 19, 1, 32; +L_0x27fcb90 .part/pv L_0x27fc400, 20, 1, 32; +L_0x27fc550 .part/pv L_0x27fc5f0, 21, 1, 32; +L_0x27fcd30 .part/pv L_0x27fcdd0, 22, 1, 32; +L_0x27fd1f0 .part/pv L_0x27fd290, 23, 1, 32; +L_0x27fd3e0 .part/pv L_0x27fd780, 24, 1, 32; +L_0x27fcf20 .part/pv L_0x27fcfc0, 25, 1, 32; +L_0x27fd110 .part/pv L_0x27fd480, 26, 1, 32; +L_0x27fd5d0 .part/pv L_0x27fd670, 27, 1, 32; +L_0x27fd920 .part/pv L_0x27fd9c0, 28, 1, 32; +L_0x27fde10 .part/pv L_0x27fdeb0, 29, 1, 32; +L_0x27fe000 .part/pv L_0x27f8f50, 30, 1, 32; +L_0x27fe0a0 .part/pv L_0x27f1950, 31, 1, 32; +S_0x27de130 .scope module, "adder0" "FullAdder4bit" 5 237, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x2801450 .functor AND 1, L_0x2801a90, L_0x2801b30, C4<1>, C4<1>; +L_0x27f6120 .functor NOR 1, L_0x2801c50, L_0x2801d40, C4<0>, C4<0>; +L_0x2801ec0 .functor AND 1, L_0x2801f20, L_0x2802010, C4<1>, C4<1>; +L_0x2801e30 .functor NOR 1, L_0x28021a0, L_0x28023a0, C4<0>, C4<0>; +L_0x2802100 .functor OR 1, L_0x2801450, L_0x27f6120, C4<0>, C4<0>; +L_0x2802590 .functor NOR 1, L_0x2801ec0, L_0x2801e30, C4<0>, C4<0>; +L_0x2802690 .functor AND 1, L_0x2802100, L_0x2802590, C4<1>, C4<1>; +v0x27e09c0_0 .net *"_s25", 0 0, L_0x2801a90; 1 drivers +v0x27e0a80_0 .net *"_s27", 0 0, L_0x2801b30; 1 drivers +v0x27e0b20_0 .net *"_s29", 0 0, L_0x2801c50; 1 drivers +v0x27e0bc0_0 .net *"_s31", 0 0, L_0x2801d40; 1 drivers +v0x27e0c40_0 .net *"_s33", 0 0, L_0x2801f20; 1 drivers +v0x27e0ce0_0 .net *"_s35", 0 0, L_0x2802010; 1 drivers +v0x27e0d80_0 .net *"_s37", 0 0, L_0x28021a0; 1 drivers +v0x27e0e20_0 .net *"_s39", 0 0, L_0x28023a0; 1 drivers +v0x27e0ec0_0 .net "a", 3 0, L_0x27f0110; 1 drivers +v0x27e0f60_0 .net "aandb", 0 0, L_0x2801450; 1 drivers +v0x27e1000_0 .net "abandnoror", 0 0, L_0x2802100; 1 drivers +v0x27e10a0_0 .net "anorb", 0 0, L_0x27f6120; 1 drivers +v0x27e1140_0 .net "b", 3 0, L_0x27f01b0; 1 drivers +v0x27e11e0_0 .net "bandsum", 0 0, L_0x2801ec0; 1 drivers +v0x27e1300_0 .net "bnorsum", 0 0, L_0x2801e30; 1 drivers +v0x27e13a0_0 .net "bsumandnornor", 0 0, L_0x2802590; 1 drivers +v0x27e1260_0 .net "carryin", 0 0, L_0x27f0250; 1 drivers +v0x27e14d0_0 .alias "carryout", 0 0, v0x27eb420_0; +v0x27e1420_0 .net "carryout1", 0 0, L_0x27fb740; 1 drivers +v0x27e15f0_0 .net "carryout2", 0 0, L_0x27ff580; 1 drivers +v0x27e1720_0 .net "carryout3", 0 0, L_0x2800270; 1 drivers +v0x27e17a0_0 .alias "overflow", 0 0, v0x27e8150_0; +v0x27e1670_0 .net8 "sum", 3 0, RS_0x7f6901dad768; 4 drivers +L_0x27ff090 .part/pv L_0x27ff030, 0, 1, 4; +L_0x27ff180 .part L_0x27f0110, 0, 1; +L_0x27ff220 .part L_0x27f01b0, 0, 1; +L_0x27ffd40 .part/pv L_0x27fdc00, 1, 1, 4; +L_0x27ffe80 .part L_0x27f0110, 1, 1; +L_0x27fff70 .part L_0x27f01b0, 1, 1; +L_0x2800a30 .part/pv L_0x27ff7f0, 2, 1, 4; +L_0x2800b20 .part L_0x27f0110, 2, 1; +L_0x2800c10 .part L_0x27f01b0, 2, 1; +L_0x2801690 .part/pv L_0x28004e0, 3, 1, 4; +L_0x28017c0 .part L_0x27f0110, 3, 1; +L_0x28018f0 .part L_0x27f01b0, 3, 1; +L_0x2801a90 .part L_0x27f0110, 3, 1; +L_0x2801b30 .part L_0x27f01b0, 3, 1; +L_0x2801c50 .part L_0x27f0110, 3, 1; +L_0x2801d40 .part L_0x27f01b0, 3, 1; +L_0x2801f20 .part L_0x27f01b0, 3, 1; +L_0x2802010 .part RS_0x7f6901dad768, 3, 1; +L_0x28021a0 .part L_0x27f01b0, 3, 1; +L_0x28023a0 .part RS_0x7f6901dad768, 3, 1; +S_0x27dffb0 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27de130; + .timescale -9 -12; +L_0x27f86a0 .functor AND 1, L_0x27ff180, L_0x27ff220, C4<1>, C4<1>; +L_0x27f5060 .functor AND 1, L_0x27ff180, L_0x27f0250, C4<1>, C4<1>; +L_0x27fe320 .functor AND 1, L_0x27ff220, L_0x27f0250, C4<1>, C4<1>; +L_0x27fe3d0 .functor OR 1, L_0x27f86a0, L_0x27f5060, C4<0>, C4<0>; +L_0x27fb740 .functor OR 1, L_0x27fe3d0, L_0x27fe320, C4<0>, C4<0>; +L_0x27fb840 .functor OR 1, L_0x27ff180, L_0x27ff220, C4<0>, C4<0>; +L_0x27fb8a0 .functor OR 1, L_0x27fb840, L_0x27f0250, C4<0>, C4<0>; +L_0x27fdba0 .functor NOT 1, L_0x27fb740, C4<0>, C4<0>, C4<0>; +L_0x27fdc90 .functor AND 1, L_0x27fdba0, L_0x27fb8a0, C4<1>, C4<1>; +L_0x27fdd40 .functor AND 1, L_0x27ff180, L_0x27ff220, C4<1>, C4<1>; +L_0x27fefd0 .functor AND 1, L_0x27fdd40, L_0x27f0250, C4<1>, C4<1>; +L_0x27ff030 .functor OR 1, L_0x27fdc90, L_0x27fefd0, C4<0>, C4<0>; +v0x27e00a0_0 .net "a", 0 0, L_0x27ff180; 1 drivers +v0x27e0120_0 .net "ab", 0 0, L_0x27f86a0; 1 drivers +v0x27e01a0_0 .net "acarryin", 0 0, L_0x27f5060; 1 drivers +v0x27e0220_0 .net "andall", 0 0, L_0x27fefd0; 1 drivers +v0x27e02a0_0 .net "andsingleintermediate", 0 0, L_0x27fdd40; 1 drivers +v0x27e0320_0 .net "andsumintermediate", 0 0, L_0x27fdc90; 1 drivers +v0x27e03c0_0 .net "b", 0 0, L_0x27ff220; 1 drivers +v0x27e0460_0 .net "bcarryin", 0 0, L_0x27fe320; 1 drivers +v0x27e0500_0 .alias "carryin", 0 0, v0x27e1260_0; +v0x27e05a0_0 .alias "carryout", 0 0, v0x27e1420_0; +v0x27e0620_0 .net "invcarryout", 0 0, L_0x27fdba0; 1 drivers +v0x27e06c0_0 .net "orall", 0 0, L_0x27fb8a0; 1 drivers +v0x27e0760_0 .net "orpairintermediate", 0 0, L_0x27fe3d0; 1 drivers +v0x27e0800_0 .net "orsingleintermediate", 0 0, L_0x27fb840; 1 drivers +v0x27e0920_0 .net "sum", 0 0, L_0x27ff030; 1 drivers +S_0x27df670 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27de130; + .timescale -9 -12; +L_0x27ff2c0 .functor AND 1, L_0x27ffe80, L_0x27fff70, C4<1>, C4<1>; +L_0x27ff320 .functor AND 1, L_0x27ffe80, L_0x27fb740, C4<1>, C4<1>; +L_0x27ff3d0 .functor AND 1, L_0x27fff70, L_0x27fb740, C4<1>, C4<1>; +L_0x27ff480 .functor OR 1, L_0x27ff2c0, L_0x27ff320, C4<0>, C4<0>; +L_0x27ff580 .functor OR 1, L_0x27ff480, L_0x27ff3d0, C4<0>, C4<0>; +L_0x27ff680 .functor OR 1, L_0x27ffe80, L_0x27fff70, C4<0>, C4<0>; +L_0x27ff6e0 .functor OR 1, L_0x27ff680, L_0x27fb740, C4<0>, C4<0>; +L_0x27ff790 .functor NOT 1, L_0x27ff580, C4<0>, C4<0>, C4<0>; +L_0x27ff880 .functor AND 1, L_0x27ff790, L_0x27ff6e0, C4<1>, C4<1>; +L_0x27ff980 .functor AND 1, L_0x27ffe80, L_0x27fff70, C4<1>, C4<1>; +L_0x27ffb60 .functor AND 1, L_0x27ff980, L_0x27fb740, C4<1>, C4<1>; +L_0x27fdc00 .functor OR 1, L_0x27ff880, L_0x27ffb60, C4<0>, C4<0>; +v0x27df760_0 .net "a", 0 0, L_0x27ffe80; 1 drivers +v0x27df7e0_0 .net "ab", 0 0, L_0x27ff2c0; 1 drivers +v0x27df860_0 .net "acarryin", 0 0, L_0x27ff320; 1 drivers +v0x27df8e0_0 .net "andall", 0 0, L_0x27ffb60; 1 drivers +v0x27df960_0 .net "andsingleintermediate", 0 0, L_0x27ff980; 1 drivers +v0x27df9e0_0 .net "andsumintermediate", 0 0, L_0x27ff880; 1 drivers +v0x27dfa60_0 .net "b", 0 0, L_0x27fff70; 1 drivers +v0x27dfae0_0 .net "bcarryin", 0 0, L_0x27ff3d0; 1 drivers +v0x27dfbb0_0 .alias "carryin", 0 0, v0x27e1420_0; +v0x27dfc30_0 .alias "carryout", 0 0, v0x27e15f0_0; +v0x27dfcb0_0 .net "invcarryout", 0 0, L_0x27ff790; 1 drivers +v0x27dfd30_0 .net "orall", 0 0, L_0x27ff6e0; 1 drivers +v0x27dfdb0_0 .net "orpairintermediate", 0 0, L_0x27ff480; 1 drivers +v0x27dfe30_0 .net "orsingleintermediate", 0 0, L_0x27ff680; 1 drivers +v0x27dff30_0 .net "sum", 0 0, L_0x27fdc00; 1 drivers +S_0x27ded20 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27de130; + .timescale -9 -12; +L_0x27ffb00 .functor AND 1, L_0x2800b20, L_0x2800c10, C4<1>, C4<1>; +L_0x2800010 .functor AND 1, L_0x2800b20, L_0x27ff580, C4<1>, C4<1>; +L_0x28000c0 .functor AND 1, L_0x2800c10, L_0x27ff580, C4<1>, C4<1>; +L_0x2800170 .functor OR 1, L_0x27ffb00, L_0x2800010, C4<0>, C4<0>; +L_0x2800270 .functor OR 1, L_0x2800170, L_0x28000c0, C4<0>, C4<0>; +L_0x2800370 .functor OR 1, L_0x2800b20, L_0x2800c10, C4<0>, C4<0>; +L_0x28003d0 .functor OR 1, L_0x2800370, L_0x27ff580, C4<0>, C4<0>; +L_0x2800480 .functor NOT 1, L_0x2800270, C4<0>, C4<0>, C4<0>; +L_0x2800570 .functor AND 1, L_0x2800480, L_0x28003d0, C4<1>, C4<1>; +L_0x2800670 .functor AND 1, L_0x2800b20, L_0x2800c10, C4<1>, C4<1>; +L_0x2800850 .functor AND 1, L_0x2800670, L_0x27ff580, C4<1>, C4<1>; +L_0x27ff7f0 .functor OR 1, L_0x2800570, L_0x2800850, C4<0>, C4<0>; +v0x27dee10_0 .net "a", 0 0, L_0x2800b20; 1 drivers +v0x27deed0_0 .net "ab", 0 0, L_0x27ffb00; 1 drivers +v0x27def70_0 .net "acarryin", 0 0, L_0x2800010; 1 drivers +v0x27deff0_0 .net "andall", 0 0, L_0x2800850; 1 drivers +v0x27df070_0 .net "andsingleintermediate", 0 0, L_0x2800670; 1 drivers +v0x27df0f0_0 .net "andsumintermediate", 0 0, L_0x2800570; 1 drivers +v0x27df170_0 .net "b", 0 0, L_0x2800c10; 1 drivers +v0x27df1f0_0 .net "bcarryin", 0 0, L_0x28000c0; 1 drivers +v0x27df270_0 .alias "carryin", 0 0, v0x27e15f0_0; +v0x27df2f0_0 .alias "carryout", 0 0, v0x27e1720_0; +v0x27df370_0 .net "invcarryout", 0 0, L_0x2800480; 1 drivers +v0x27df3f0_0 .net "orall", 0 0, L_0x28003d0; 1 drivers +v0x27df470_0 .net "orpairintermediate", 0 0, L_0x2800170; 1 drivers +v0x27df4f0_0 .net "orsingleintermediate", 0 0, L_0x2800370; 1 drivers +v0x27df5f0_0 .net "sum", 0 0, L_0x27ff7f0; 1 drivers +S_0x27de220 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27de130; + .timescale -9 -12; +L_0x28007f0 .functor AND 1, L_0x28017c0, L_0x28018f0, C4<1>, C4<1>; +L_0x2800cb0 .functor AND 1, L_0x28017c0, L_0x2800270, C4<1>, C4<1>; +L_0x2800d60 .functor AND 1, L_0x28018f0, L_0x2800270, C4<1>, C4<1>; +L_0x2800e10 .functor OR 1, L_0x28007f0, L_0x2800cb0, C4<0>, C4<0>; +L_0x2800f10 .functor OR 1, L_0x2800e10, L_0x2800d60, C4<0>, C4<0>; +L_0x2801010 .functor OR 1, L_0x28017c0, L_0x28018f0, C4<0>, C4<0>; +L_0x2801070 .functor OR 1, L_0x2801010, L_0x2800270, C4<0>, C4<0>; +L_0x2801120 .functor NOT 1, L_0x2800f10, C4<0>, C4<0>, C4<0>; +L_0x28011d0 .functor AND 1, L_0x2801120, L_0x2801070, C4<1>, C4<1>; +L_0x28012d0 .functor AND 1, L_0x28017c0, L_0x28018f0, C4<1>, C4<1>; +L_0x28014b0 .functor AND 1, L_0x28012d0, L_0x2800270, C4<1>, C4<1>; +L_0x28004e0 .functor OR 1, L_0x28011d0, L_0x28014b0, C4<0>, C4<0>; +v0x27de310_0 .net "a", 0 0, L_0x28017c0; 1 drivers +v0x27de3d0_0 .net "ab", 0 0, L_0x28007f0; 1 drivers +v0x27de470_0 .net "acarryin", 0 0, L_0x2800cb0; 1 drivers +v0x27de510_0 .net "andall", 0 0, L_0x28014b0; 1 drivers +v0x27de590_0 .net "andsingleintermediate", 0 0, L_0x28012d0; 1 drivers +v0x27de630_0 .net "andsumintermediate", 0 0, L_0x28011d0; 1 drivers +v0x27de6d0_0 .net "b", 0 0, L_0x28018f0; 1 drivers +v0x27de770_0 .net "bcarryin", 0 0, L_0x2800d60; 1 drivers +v0x27de860_0 .alias "carryin", 0 0, v0x27e1720_0; +v0x27de900_0 .alias "carryout", 0 0, v0x27eb420_0; +v0x27de980_0 .net "invcarryout", 0 0, L_0x2801120; 1 drivers +v0x27dea20_0 .net "orall", 0 0, L_0x2801070; 1 drivers +v0x27deac0_0 .net "orpairintermediate", 0 0, L_0x2800e10; 1 drivers +v0x27deb60_0 .net "orsingleintermediate", 0 0, L_0x2801010; 1 drivers +v0x27dec80_0 .net "sum", 0 0, L_0x28004e0; 1 drivers +S_0x27da620 .scope module, "adder1" "FullAdder4bit" 5 238, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x2805900 .functor AND 1, L_0x2805f40, L_0x2805fe0, C4<1>, C4<1>; +L_0x2806080 .functor NOR 1, L_0x28060e0, L_0x2806180, C4<0>, C4<0>; +L_0x2806300 .functor AND 1, L_0x2806360, L_0x2806450, C4<1>, C4<1>; +L_0x2806270 .functor NOR 1, L_0x28065e0, L_0x28067e0, C4<0>, C4<0>; +L_0x2806540 .functor OR 1, L_0x2805900, L_0x2806080, C4<0>, C4<0>; +L_0x28069d0 .functor NOR 1, L_0x2806300, L_0x2806270, C4<0>, C4<0>; +L_0x2806ad0 .functor AND 1, L_0x2806540, L_0x28069d0, C4<1>, C4<1>; +v0x27dd210_0 .net *"_s25", 0 0, L_0x2805f40; 1 drivers +v0x27dd2d0_0 .net *"_s27", 0 0, L_0x2805fe0; 1 drivers +v0x27dd370_0 .net *"_s29", 0 0, L_0x28060e0; 1 drivers +v0x27dd410_0 .net *"_s31", 0 0, L_0x2806180; 1 drivers +v0x27dd490_0 .net *"_s33", 0 0, L_0x2806360; 1 drivers +v0x27dd530_0 .net *"_s35", 0 0, L_0x2806450; 1 drivers +v0x27dd5d0_0 .net *"_s37", 0 0, L_0x28065e0; 1 drivers +v0x27dd670_0 .net *"_s39", 0 0, L_0x28067e0; 1 drivers +v0x27dd710_0 .net "a", 3 0, L_0x28028d0; 1 drivers +v0x27dd7b0_0 .net "aandb", 0 0, L_0x2805900; 1 drivers +v0x27dd850_0 .net "abandnoror", 0 0, L_0x2806540; 1 drivers +v0x27dd8f0_0 .net "anorb", 0 0, L_0x2806080; 1 drivers +v0x27dd990_0 .net "b", 3 0, L_0x2802970; 1 drivers +v0x27dda30_0 .net "bandsum", 0 0, L_0x2806300; 1 drivers +v0x27ddb50_0 .net "bnorsum", 0 0, L_0x2806270; 1 drivers +v0x27ddbf0_0 .net "bsumandnornor", 0 0, L_0x28069d0; 1 drivers +v0x27ddab0_0 .alias "carryin", 0 0, v0x27eb420_0; +v0x27ddd20_0 .alias "carryout", 0 0, v0x27eb820_0; +v0x27ddc70_0 .net "carryout1", 0 0, L_0x2802eb0; 1 drivers +v0x27dde40_0 .net "carryout2", 0 0, L_0x28039e0; 1 drivers +v0x27ddf70_0 .net "carryout3", 0 0, L_0x2804720; 1 drivers +v0x27ddff0_0 .alias "overflow", 0 0, v0x27e8790_0; +v0x27ddec0_0 .net8 "sum", 3 0, RS_0x7f6901dac988; 4 drivers +L_0x2803550 .part/pv L_0x28034f0, 0, 1, 4; +L_0x2803640 .part L_0x28028d0, 0, 1; +L_0x28036e0 .part L_0x2802970, 0, 1; +L_0x28041a0 .part/pv L_0x2803120, 1, 1, 4; +L_0x28042e0 .part L_0x28028d0, 1, 1; +L_0x28043d0 .part L_0x2802970, 1, 1; +L_0x2804ee0 .part/pv L_0x2803c50, 2, 1, 4; +L_0x2804fd0 .part L_0x28028d0, 2, 1; +L_0x28050c0 .part L_0x2802970, 2, 1; +L_0x2805b40 .part/pv L_0x2804990, 3, 1, 4; +L_0x2805c70 .part L_0x28028d0, 3, 1; +L_0x2805da0 .part L_0x2802970, 3, 1; +L_0x2805f40 .part L_0x28028d0, 3, 1; +L_0x2805fe0 .part L_0x2802970, 3, 1; +L_0x28060e0 .part L_0x28028d0, 3, 1; +L_0x2806180 .part L_0x2802970, 3, 1; +L_0x2806360 .part L_0x2802970, 3, 1; +L_0x2806450 .part RS_0x7f6901dac988, 3, 1; +L_0x28065e0 .part L_0x2802970, 3, 1; +L_0x28067e0 .part RS_0x7f6901dac988, 3, 1; +S_0x27dc780 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27da620; + .timescale -9 -12; +L_0x2802b90 .functor AND 1, L_0x2803640, L_0x28036e0, C4<1>, C4<1>; +L_0x2802bf0 .functor AND 1, L_0x2803640, L_0x2800f10, C4<1>, C4<1>; +L_0x2802c50 .functor AND 1, L_0x28036e0, L_0x2800f10, C4<1>, C4<1>; +L_0x27eb4a0 .functor OR 1, L_0x2802b90, L_0x2802bf0, C4<0>, C4<0>; +L_0x2802eb0 .functor OR 1, L_0x27eb4a0, L_0x2802c50, C4<0>, C4<0>; +L_0x2802fb0 .functor OR 1, L_0x2803640, L_0x28036e0, C4<0>, C4<0>; +L_0x2803010 .functor OR 1, L_0x2802fb0, L_0x2800f10, C4<0>, C4<0>; +L_0x28030c0 .functor NOT 1, L_0x2802eb0, C4<0>, C4<0>, C4<0>; +L_0x28031b0 .functor AND 1, L_0x28030c0, L_0x2803010, C4<1>, C4<1>; +L_0x28032b0 .functor AND 1, L_0x2803640, L_0x28036e0, C4<1>, C4<1>; +L_0x2803490 .functor AND 1, L_0x28032b0, L_0x2800f10, C4<1>, C4<1>; +L_0x28034f0 .functor OR 1, L_0x28031b0, L_0x2803490, C4<0>, C4<0>; +v0x27dc870_0 .net "a", 0 0, L_0x2803640; 1 drivers +v0x27dc930_0 .net "ab", 0 0, L_0x2802b90; 1 drivers +v0x27dc9d0_0 .net "acarryin", 0 0, L_0x2802bf0; 1 drivers +v0x27dca70_0 .net "andall", 0 0, L_0x2803490; 1 drivers +v0x27dcaf0_0 .net "andsingleintermediate", 0 0, L_0x28032b0; 1 drivers +v0x27dcb90_0 .net "andsumintermediate", 0 0, L_0x28031b0; 1 drivers +v0x27dcc30_0 .net "b", 0 0, L_0x28036e0; 1 drivers +v0x27dccd0_0 .net "bcarryin", 0 0, L_0x2802c50; 1 drivers +v0x27dcd70_0 .alias "carryin", 0 0, v0x27eb420_0; +v0x27dce10_0 .alias "carryout", 0 0, v0x27ddc70_0; +v0x27dce90_0 .net "invcarryout", 0 0, L_0x28030c0; 1 drivers +v0x27dcf10_0 .net "orall", 0 0, L_0x2803010; 1 drivers +v0x27dcfb0_0 .net "orpairintermediate", 0 0, L_0x27eb4a0; 1 drivers +v0x27dd050_0 .net "orsingleintermediate", 0 0, L_0x2802fb0; 1 drivers +v0x27dd170_0 .net "sum", 0 0, L_0x28034f0; 1 drivers +S_0x27dbcf0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27da620; + .timescale -9 -12; +L_0x2803430 .functor AND 1, L_0x28042e0, L_0x28043d0, C4<1>, C4<1>; +L_0x2803780 .functor AND 1, L_0x28042e0, L_0x2802eb0, C4<1>, C4<1>; +L_0x2803830 .functor AND 1, L_0x28043d0, L_0x2802eb0, C4<1>, C4<1>; +L_0x28038e0 .functor OR 1, L_0x2803430, L_0x2803780, C4<0>, C4<0>; +L_0x28039e0 .functor OR 1, L_0x28038e0, L_0x2803830, C4<0>, C4<0>; +L_0x2803ae0 .functor OR 1, L_0x28042e0, L_0x28043d0, C4<0>, C4<0>; +L_0x2803b40 .functor OR 1, L_0x2803ae0, L_0x2802eb0, C4<0>, C4<0>; +L_0x2803bf0 .functor NOT 1, L_0x28039e0, C4<0>, C4<0>, C4<0>; +L_0x2803ce0 .functor AND 1, L_0x2803bf0, L_0x2803b40, C4<1>, C4<1>; +L_0x2803de0 .functor AND 1, L_0x28042e0, L_0x28043d0, C4<1>, C4<1>; +L_0x2803fc0 .functor AND 1, L_0x2803de0, L_0x2802eb0, C4<1>, C4<1>; +L_0x2803120 .functor OR 1, L_0x2803ce0, L_0x2803fc0, C4<0>, C4<0>; +v0x27dbde0_0 .net "a", 0 0, L_0x28042e0; 1 drivers +v0x27dbea0_0 .net "ab", 0 0, L_0x2803430; 1 drivers +v0x27dbf40_0 .net "acarryin", 0 0, L_0x2803780; 1 drivers +v0x27dbfe0_0 .net "andall", 0 0, L_0x2803fc0; 1 drivers +v0x27dc060_0 .net "andsingleintermediate", 0 0, L_0x2803de0; 1 drivers +v0x27dc100_0 .net "andsumintermediate", 0 0, L_0x2803ce0; 1 drivers +v0x27dc1a0_0 .net "b", 0 0, L_0x28043d0; 1 drivers +v0x27dc240_0 .net "bcarryin", 0 0, L_0x2803830; 1 drivers +v0x27dc2e0_0 .alias "carryin", 0 0, v0x27ddc70_0; +v0x27dc380_0 .alias "carryout", 0 0, v0x27dde40_0; +v0x27dc400_0 .net "invcarryout", 0 0, L_0x2803bf0; 1 drivers +v0x27dc480_0 .net "orall", 0 0, L_0x2803b40; 1 drivers +v0x27dc520_0 .net "orpairintermediate", 0 0, L_0x28038e0; 1 drivers +v0x27dc5c0_0 .net "orsingleintermediate", 0 0, L_0x2803ae0; 1 drivers +v0x27dc6e0_0 .net "sum", 0 0, L_0x2803120; 1 drivers +S_0x27db210 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27da620; + .timescale -9 -12; +L_0x2803f60 .functor AND 1, L_0x2804fd0, L_0x28050c0, C4<1>, C4<1>; +L_0x28044c0 .functor AND 1, L_0x2804fd0, L_0x28039e0, C4<1>, C4<1>; +L_0x2804570 .functor AND 1, L_0x28050c0, L_0x28039e0, C4<1>, C4<1>; +L_0x2804620 .functor OR 1, L_0x2803f60, L_0x28044c0, C4<0>, C4<0>; +L_0x2804720 .functor OR 1, L_0x2804620, L_0x2804570, C4<0>, C4<0>; +L_0x2804820 .functor OR 1, L_0x2804fd0, L_0x28050c0, C4<0>, C4<0>; +L_0x2804880 .functor OR 1, L_0x2804820, L_0x28039e0, C4<0>, C4<0>; +L_0x2804930 .functor NOT 1, L_0x2804720, C4<0>, C4<0>, C4<0>; +L_0x2804a20 .functor AND 1, L_0x2804930, L_0x2804880, C4<1>, C4<1>; +L_0x2804b20 .functor AND 1, L_0x2804fd0, L_0x28050c0, C4<1>, C4<1>; +L_0x2804d00 .functor AND 1, L_0x2804b20, L_0x28039e0, C4<1>, C4<1>; +L_0x2803c50 .functor OR 1, L_0x2804a20, L_0x2804d00, C4<0>, C4<0>; +v0x27db300_0 .net "a", 0 0, L_0x2804fd0; 1 drivers +v0x27db3c0_0 .net "ab", 0 0, L_0x2803f60; 1 drivers +v0x27db460_0 .net "acarryin", 0 0, L_0x28044c0; 1 drivers +v0x27db500_0 .net "andall", 0 0, L_0x2804d00; 1 drivers +v0x27db580_0 .net "andsingleintermediate", 0 0, L_0x2804b20; 1 drivers +v0x27db620_0 .net "andsumintermediate", 0 0, L_0x2804a20; 1 drivers +v0x27db6c0_0 .net "b", 0 0, L_0x28050c0; 1 drivers +v0x27db760_0 .net "bcarryin", 0 0, L_0x2804570; 1 drivers +v0x27db850_0 .alias "carryin", 0 0, v0x27dde40_0; +v0x27db8f0_0 .alias "carryout", 0 0, v0x27ddf70_0; +v0x27db970_0 .net "invcarryout", 0 0, L_0x2804930; 1 drivers +v0x27db9f0_0 .net "orall", 0 0, L_0x2804880; 1 drivers +v0x27dba90_0 .net "orpairintermediate", 0 0, L_0x2804620; 1 drivers +v0x27dbb30_0 .net "orsingleintermediate", 0 0, L_0x2804820; 1 drivers +v0x27dbc50_0 .net "sum", 0 0, L_0x2803c50; 1 drivers +S_0x27da710 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27da620; + .timescale -9 -12; +L_0x2804ca0 .functor AND 1, L_0x2805c70, L_0x2805da0, C4<1>, C4<1>; +L_0x2805160 .functor AND 1, L_0x2805c70, L_0x2804720, C4<1>, C4<1>; +L_0x2805210 .functor AND 1, L_0x2805da0, L_0x2804720, C4<1>, C4<1>; +L_0x28052c0 .functor OR 1, L_0x2804ca0, L_0x2805160, C4<0>, C4<0>; +L_0x28053c0 .functor OR 1, L_0x28052c0, L_0x2805210, C4<0>, C4<0>; +L_0x28054c0 .functor OR 1, L_0x2805c70, L_0x2805da0, C4<0>, C4<0>; +L_0x2805520 .functor OR 1, L_0x28054c0, L_0x2804720, C4<0>, C4<0>; +L_0x28055d0 .functor NOT 1, L_0x28053c0, C4<0>, C4<0>, C4<0>; +L_0x2805680 .functor AND 1, L_0x28055d0, L_0x2805520, C4<1>, C4<1>; +L_0x2805780 .functor AND 1, L_0x2805c70, L_0x2805da0, C4<1>, C4<1>; +L_0x2805960 .functor AND 1, L_0x2805780, L_0x2804720, C4<1>, C4<1>; +L_0x2804990 .functor OR 1, L_0x2805680, L_0x2805960, C4<0>, C4<0>; +v0x27da800_0 .net "a", 0 0, L_0x2805c70; 1 drivers +v0x27da8c0_0 .net "ab", 0 0, L_0x2804ca0; 1 drivers +v0x27da960_0 .net "acarryin", 0 0, L_0x2805160; 1 drivers +v0x27daa00_0 .net "andall", 0 0, L_0x2805960; 1 drivers +v0x27daa80_0 .net "andsingleintermediate", 0 0, L_0x2805780; 1 drivers +v0x27dab20_0 .net "andsumintermediate", 0 0, L_0x2805680; 1 drivers +v0x27dabc0_0 .net "b", 0 0, L_0x2805da0; 1 drivers +v0x27dac60_0 .net "bcarryin", 0 0, L_0x2805210; 1 drivers +v0x27dad50_0 .alias "carryin", 0 0, v0x27ddf70_0; +v0x27dadf0_0 .alias "carryout", 0 0, v0x27eb820_0; +v0x27dae70_0 .net "invcarryout", 0 0, L_0x28055d0; 1 drivers +v0x27daf10_0 .net "orall", 0 0, L_0x2805520; 1 drivers +v0x27dafb0_0 .net "orpairintermediate", 0 0, L_0x28052c0; 1 drivers +v0x27db050_0 .net "orsingleintermediate", 0 0, L_0x28054c0; 1 drivers +v0x27db170_0 .net "sum", 0 0, L_0x2804990; 1 drivers +S_0x27d6b10 .scope module, "adder2" "FullAdder4bit" 5 239, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x2809c10 .functor AND 1, L_0x280a250, L_0x280a2f0, C4<1>, C4<1>; +L_0x280a390 .functor NOR 1, L_0x280a3f0, L_0x280a490, C4<0>, C4<0>; +L_0x280a610 .functor AND 1, L_0x280a670, L_0x280a760, C4<1>, C4<1>; +L_0x280a580 .functor NOR 1, L_0x280a8f0, L_0x280aaf0, C4<0>, C4<0>; +L_0x280a850 .functor OR 1, L_0x2809c10, L_0x280a390, C4<0>, C4<0>; +L_0x280ace0 .functor NOR 1, L_0x280a610, L_0x280a580, C4<0>, C4<0>; +L_0x280ade0 .functor AND 1, L_0x280a850, L_0x280ace0, C4<1>, C4<1>; +v0x27d9700_0 .net *"_s25", 0 0, L_0x280a250; 1 drivers +v0x27d97c0_0 .net *"_s27", 0 0, L_0x280a2f0; 1 drivers +v0x27d9860_0 .net *"_s29", 0 0, L_0x280a3f0; 1 drivers +v0x27d9900_0 .net *"_s31", 0 0, L_0x280a490; 1 drivers +v0x27d9980_0 .net *"_s33", 0 0, L_0x280a670; 1 drivers +v0x27d9a20_0 .net *"_s35", 0 0, L_0x280a760; 1 drivers +v0x27d9ac0_0 .net *"_s37", 0 0, L_0x280a8f0; 1 drivers +v0x27d9b60_0 .net *"_s39", 0 0, L_0x280aaf0; 1 drivers +v0x27d9c00_0 .net "a", 3 0, L_0x280b060; 1 drivers +v0x27d9ca0_0 .net "aandb", 0 0, L_0x2809c10; 1 drivers +v0x27d9d40_0 .net "abandnoror", 0 0, L_0x280a850; 1 drivers +v0x27d9de0_0 .net "anorb", 0 0, L_0x280a390; 1 drivers +v0x27d9e80_0 .net "b", 3 0, L_0x2806cc0; 1 drivers +v0x27d9f20_0 .net "bandsum", 0 0, L_0x280a610; 1 drivers +v0x27da040_0 .net "bnorsum", 0 0, L_0x280a580; 1 drivers +v0x27da0e0_0 .net "bsumandnornor", 0 0, L_0x280ace0; 1 drivers +v0x27d9fa0_0 .alias "carryin", 0 0, v0x27eb820_0; +v0x27da210_0 .alias "carryout", 0 0, v0x27eb650_0; +v0x27da160_0 .net "carryout1", 0 0, L_0x28071c0; 1 drivers +v0x27da330_0 .net "carryout2", 0 0, L_0x2807cf0; 1 drivers +v0x27da460_0 .net "carryout3", 0 0, L_0x2808a30; 1 drivers +v0x27da4e0_0 .alias "overflow", 0 0, v0x27e8810_0; +v0x27da3b0_0 .net8 "sum", 3 0, RS_0x7f6901dabba8; 4 drivers +L_0x2807860 .part/pv L_0x2807800, 0, 1, 4; +L_0x2807950 .part L_0x280b060, 0, 1; +L_0x28079f0 .part L_0x2806cc0, 0, 1; +L_0x28084b0 .part/pv L_0x2807430, 1, 1, 4; +L_0x28085f0 .part L_0x280b060, 1, 1; +L_0x28086e0 .part L_0x2806cc0, 1, 1; +L_0x28091f0 .part/pv L_0x2807f60, 2, 1, 4; +L_0x28092e0 .part L_0x280b060, 2, 1; +L_0x28093d0 .part L_0x2806cc0, 2, 1; +L_0x2809e50 .part/pv L_0x2808ca0, 3, 1, 4; +L_0x2809f80 .part L_0x280b060, 3, 1; +L_0x280a0b0 .part L_0x2806cc0, 3, 1; +L_0x280a250 .part L_0x280b060, 3, 1; +L_0x280a2f0 .part L_0x2806cc0, 3, 1; +L_0x280a3f0 .part L_0x280b060, 3, 1; +L_0x280a490 .part L_0x2806cc0, 3, 1; +L_0x280a670 .part L_0x2806cc0, 3, 1; +L_0x280a760 .part RS_0x7f6901dabba8, 3, 1; +L_0x280a8f0 .part L_0x2806cc0, 3, 1; +L_0x280aaf0 .part RS_0x7f6901dabba8, 3, 1; +S_0x27d8c70 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27d6b10; + .timescale -9 -12; +L_0x2802a10 .functor AND 1, L_0x2807950, L_0x28079f0, C4<1>, C4<1>; +L_0x2802a70 .functor AND 1, L_0x2807950, L_0x28053c0, C4<1>, C4<1>; +L_0x2806f60 .functor AND 1, L_0x28079f0, L_0x28053c0, C4<1>, C4<1>; +L_0x27eb5c0 .functor OR 1, L_0x2802a10, L_0x2802a70, C4<0>, C4<0>; +L_0x28071c0 .functor OR 1, L_0x27eb5c0, L_0x2806f60, C4<0>, C4<0>; +L_0x28072c0 .functor OR 1, L_0x2807950, L_0x28079f0, C4<0>, C4<0>; +L_0x2807320 .functor OR 1, L_0x28072c0, L_0x28053c0, C4<0>, C4<0>; +L_0x28073d0 .functor NOT 1, L_0x28071c0, C4<0>, C4<0>, C4<0>; +L_0x28074c0 .functor AND 1, L_0x28073d0, L_0x2807320, C4<1>, C4<1>; +L_0x28075c0 .functor AND 1, L_0x2807950, L_0x28079f0, C4<1>, C4<1>; +L_0x28077a0 .functor AND 1, L_0x28075c0, L_0x28053c0, C4<1>, C4<1>; +L_0x2807800 .functor OR 1, L_0x28074c0, L_0x28077a0, C4<0>, C4<0>; +v0x27d8d60_0 .net "a", 0 0, L_0x2807950; 1 drivers +v0x27d8e20_0 .net "ab", 0 0, L_0x2802a10; 1 drivers +v0x27d8ec0_0 .net "acarryin", 0 0, L_0x2802a70; 1 drivers +v0x27d8f60_0 .net "andall", 0 0, L_0x28077a0; 1 drivers +v0x27d8fe0_0 .net "andsingleintermediate", 0 0, L_0x28075c0; 1 drivers +v0x27d9080_0 .net "andsumintermediate", 0 0, L_0x28074c0; 1 drivers +v0x27d9120_0 .net "b", 0 0, L_0x28079f0; 1 drivers +v0x27d91c0_0 .net "bcarryin", 0 0, L_0x2806f60; 1 drivers +v0x27d9260_0 .alias "carryin", 0 0, v0x27eb820_0; +v0x27d9300_0 .alias "carryout", 0 0, v0x27da160_0; +v0x27d9380_0 .net "invcarryout", 0 0, L_0x28073d0; 1 drivers +v0x27d9400_0 .net "orall", 0 0, L_0x2807320; 1 drivers +v0x27d94a0_0 .net "orpairintermediate", 0 0, L_0x27eb5c0; 1 drivers +v0x27d9540_0 .net "orsingleintermediate", 0 0, L_0x28072c0; 1 drivers +v0x27d9660_0 .net "sum", 0 0, L_0x2807800; 1 drivers +S_0x27d81e0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27d6b10; + .timescale -9 -12; +L_0x2807740 .functor AND 1, L_0x28085f0, L_0x28086e0, C4<1>, C4<1>; +L_0x2807a90 .functor AND 1, L_0x28085f0, L_0x28071c0, C4<1>, C4<1>; +L_0x2807b40 .functor AND 1, L_0x28086e0, L_0x28071c0, C4<1>, C4<1>; +L_0x2807bf0 .functor OR 1, L_0x2807740, L_0x2807a90, C4<0>, C4<0>; +L_0x2807cf0 .functor OR 1, L_0x2807bf0, L_0x2807b40, C4<0>, C4<0>; +L_0x2807df0 .functor OR 1, L_0x28085f0, L_0x28086e0, C4<0>, C4<0>; +L_0x2807e50 .functor OR 1, L_0x2807df0, L_0x28071c0, C4<0>, C4<0>; +L_0x2807f00 .functor NOT 1, L_0x2807cf0, C4<0>, C4<0>, C4<0>; +L_0x2807ff0 .functor AND 1, L_0x2807f00, L_0x2807e50, C4<1>, C4<1>; +L_0x28080f0 .functor AND 1, L_0x28085f0, L_0x28086e0, C4<1>, C4<1>; +L_0x28082d0 .functor AND 1, L_0x28080f0, L_0x28071c0, C4<1>, C4<1>; +L_0x2807430 .functor OR 1, L_0x2807ff0, L_0x28082d0, C4<0>, C4<0>; +v0x27d82d0_0 .net "a", 0 0, L_0x28085f0; 1 drivers +v0x27d8390_0 .net "ab", 0 0, L_0x2807740; 1 drivers +v0x27d8430_0 .net "acarryin", 0 0, L_0x2807a90; 1 drivers +v0x27d84d0_0 .net "andall", 0 0, L_0x28082d0; 1 drivers +v0x27d8550_0 .net "andsingleintermediate", 0 0, L_0x28080f0; 1 drivers +v0x27d85f0_0 .net "andsumintermediate", 0 0, L_0x2807ff0; 1 drivers +v0x27d8690_0 .net "b", 0 0, L_0x28086e0; 1 drivers +v0x27d8730_0 .net "bcarryin", 0 0, L_0x2807b40; 1 drivers +v0x27d87d0_0 .alias "carryin", 0 0, v0x27da160_0; +v0x27d8870_0 .alias "carryout", 0 0, v0x27da330_0; +v0x27d88f0_0 .net "invcarryout", 0 0, L_0x2807f00; 1 drivers +v0x27d8970_0 .net "orall", 0 0, L_0x2807e50; 1 drivers +v0x27d8a10_0 .net "orpairintermediate", 0 0, L_0x2807bf0; 1 drivers +v0x27d8ab0_0 .net "orsingleintermediate", 0 0, L_0x2807df0; 1 drivers +v0x27d8bd0_0 .net "sum", 0 0, L_0x2807430; 1 drivers +S_0x27d7700 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27d6b10; + .timescale -9 -12; +L_0x2808270 .functor AND 1, L_0x28092e0, L_0x28093d0, C4<1>, C4<1>; +L_0x28087d0 .functor AND 1, L_0x28092e0, L_0x2807cf0, C4<1>, C4<1>; +L_0x2808880 .functor AND 1, L_0x28093d0, L_0x2807cf0, C4<1>, C4<1>; +L_0x2808930 .functor OR 1, L_0x2808270, L_0x28087d0, C4<0>, C4<0>; +L_0x2808a30 .functor OR 1, L_0x2808930, L_0x2808880, C4<0>, C4<0>; +L_0x2808b30 .functor OR 1, L_0x28092e0, L_0x28093d0, C4<0>, C4<0>; +L_0x2808b90 .functor OR 1, L_0x2808b30, L_0x2807cf0, C4<0>, C4<0>; +L_0x2808c40 .functor NOT 1, L_0x2808a30, C4<0>, C4<0>, C4<0>; +L_0x2808d30 .functor AND 1, L_0x2808c40, L_0x2808b90, C4<1>, C4<1>; +L_0x2808e30 .functor AND 1, L_0x28092e0, L_0x28093d0, C4<1>, C4<1>; +L_0x2809010 .functor AND 1, L_0x2808e30, L_0x2807cf0, C4<1>, C4<1>; +L_0x2807f60 .functor OR 1, L_0x2808d30, L_0x2809010, C4<0>, C4<0>; +v0x27d77f0_0 .net "a", 0 0, L_0x28092e0; 1 drivers +v0x27d78b0_0 .net "ab", 0 0, L_0x2808270; 1 drivers +v0x27d7950_0 .net "acarryin", 0 0, L_0x28087d0; 1 drivers +v0x27d79f0_0 .net "andall", 0 0, L_0x2809010; 1 drivers +v0x27d7a70_0 .net "andsingleintermediate", 0 0, L_0x2808e30; 1 drivers +v0x27d7b10_0 .net "andsumintermediate", 0 0, L_0x2808d30; 1 drivers +v0x27d7bb0_0 .net "b", 0 0, L_0x28093d0; 1 drivers +v0x27d7c50_0 .net "bcarryin", 0 0, L_0x2808880; 1 drivers +v0x27d7d40_0 .alias "carryin", 0 0, v0x27da330_0; +v0x27d7de0_0 .alias "carryout", 0 0, v0x27da460_0; +v0x27d7e60_0 .net "invcarryout", 0 0, L_0x2808c40; 1 drivers +v0x27d7ee0_0 .net "orall", 0 0, L_0x2808b90; 1 drivers +v0x27d7f80_0 .net "orpairintermediate", 0 0, L_0x2808930; 1 drivers +v0x27d8020_0 .net "orsingleintermediate", 0 0, L_0x2808b30; 1 drivers +v0x27d8140_0 .net "sum", 0 0, L_0x2807f60; 1 drivers +S_0x27d6c00 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27d6b10; + .timescale -9 -12; +L_0x2808fb0 .functor AND 1, L_0x2809f80, L_0x280a0b0, C4<1>, C4<1>; +L_0x2809470 .functor AND 1, L_0x2809f80, L_0x2808a30, C4<1>, C4<1>; +L_0x2809520 .functor AND 1, L_0x280a0b0, L_0x2808a30, C4<1>, C4<1>; +L_0x28095d0 .functor OR 1, L_0x2808fb0, L_0x2809470, C4<0>, C4<0>; +L_0x28096d0 .functor OR 1, L_0x28095d0, L_0x2809520, C4<0>, C4<0>; +L_0x28097d0 .functor OR 1, L_0x2809f80, L_0x280a0b0, C4<0>, C4<0>; +L_0x2809830 .functor OR 1, L_0x28097d0, L_0x2808a30, C4<0>, C4<0>; +L_0x28098e0 .functor NOT 1, L_0x28096d0, C4<0>, C4<0>, C4<0>; +L_0x2809990 .functor AND 1, L_0x28098e0, L_0x2809830, C4<1>, C4<1>; +L_0x2809a90 .functor AND 1, L_0x2809f80, L_0x280a0b0, C4<1>, C4<1>; +L_0x2809c70 .functor AND 1, L_0x2809a90, L_0x2808a30, C4<1>, C4<1>; +L_0x2808ca0 .functor OR 1, L_0x2809990, L_0x2809c70, C4<0>, C4<0>; +v0x27d6cf0_0 .net "a", 0 0, L_0x2809f80; 1 drivers +v0x27d6db0_0 .net "ab", 0 0, L_0x2808fb0; 1 drivers +v0x27d6e50_0 .net "acarryin", 0 0, L_0x2809470; 1 drivers +v0x27d6ef0_0 .net "andall", 0 0, L_0x2809c70; 1 drivers +v0x27d6f70_0 .net "andsingleintermediate", 0 0, L_0x2809a90; 1 drivers +v0x27d7010_0 .net "andsumintermediate", 0 0, L_0x2809990; 1 drivers +v0x27d70b0_0 .net "b", 0 0, L_0x280a0b0; 1 drivers +v0x27d7150_0 .net "bcarryin", 0 0, L_0x2809520; 1 drivers +v0x27d7240_0 .alias "carryin", 0 0, v0x27da460_0; +v0x27d72e0_0 .alias "carryout", 0 0, v0x27eb650_0; +v0x27d7360_0 .net "invcarryout", 0 0, L_0x28098e0; 1 drivers +v0x27d7400_0 .net "orall", 0 0, L_0x2809830; 1 drivers +v0x27d74a0_0 .net "orpairintermediate", 0 0, L_0x28095d0; 1 drivers +v0x27d7540_0 .net "orsingleintermediate", 0 0, L_0x28097d0; 1 drivers +v0x27d7660_0 .net "sum", 0 0, L_0x2808ca0; 1 drivers +S_0x27d3000 .scope module, "adder3" "FullAdder4bit" 5 240, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x280df60 .functor AND 1, L_0x280e5a0, L_0x280e640, C4<1>, C4<1>; +L_0x280e6e0 .functor NOR 1, L_0x280e740, L_0x280e7e0, C4<0>, C4<0>; +L_0x280e960 .functor AND 1, L_0x280e9c0, L_0x280eab0, C4<1>, C4<1>; +L_0x280e8d0 .functor NOR 1, L_0x280ec40, L_0x280ee40, C4<0>, C4<0>; +L_0x280eba0 .functor OR 1, L_0x280df60, L_0x280e6e0, C4<0>, C4<0>; +L_0x280f030 .functor NOR 1, L_0x280e960, L_0x280e8d0, C4<0>, C4<0>; +L_0x280f130 .functor AND 1, L_0x280eba0, L_0x280f030, C4<1>, C4<1>; +v0x27d5bf0_0 .net *"_s25", 0 0, L_0x280e5a0; 1 drivers +v0x27d5cb0_0 .net *"_s27", 0 0, L_0x280e640; 1 drivers +v0x27d5d50_0 .net *"_s29", 0 0, L_0x280e740; 1 drivers +v0x27d5df0_0 .net *"_s31", 0 0, L_0x280e7e0; 1 drivers +v0x27d5e70_0 .net *"_s33", 0 0, L_0x280e9c0; 1 drivers +v0x27d5f10_0 .net *"_s35", 0 0, L_0x280eab0; 1 drivers +v0x27d5fb0_0 .net *"_s37", 0 0, L_0x280ec40; 1 drivers +v0x27d6050_0 .net *"_s39", 0 0, L_0x280ee40; 1 drivers +v0x27d60f0_0 .net "a", 3 0, L_0x280b100; 1 drivers +v0x27d6190_0 .net "aandb", 0 0, L_0x280df60; 1 drivers +v0x27d6230_0 .net "abandnoror", 0 0, L_0x280eba0; 1 drivers +v0x27d62d0_0 .net "anorb", 0 0, L_0x280e6e0; 1 drivers +v0x27d6370_0 .net "b", 3 0, L_0x280b1a0; 1 drivers +v0x27d6410_0 .net "bandsum", 0 0, L_0x280e960; 1 drivers +v0x27d6530_0 .net "bnorsum", 0 0, L_0x280e8d0; 1 drivers +v0x27d65d0_0 .net "bsumandnornor", 0 0, L_0x280f030; 1 drivers +v0x27d6490_0 .alias "carryin", 0 0, v0x27eb650_0; +v0x27d6700_0 .alias "carryout", 0 0, v0x27eb760_0; +v0x27d6650_0 .net "carryout1", 0 0, L_0x280b510; 1 drivers +v0x27d6820_0 .net "carryout2", 0 0, L_0x280c040; 1 drivers +v0x27d6950_0 .net "carryout3", 0 0, L_0x280cd80; 1 drivers +v0x27d69d0_0 .alias "overflow", 0 0, v0x27e8890_0; +v0x27d68a0_0 .net8 "sum", 3 0, RS_0x7f6901daadc8; 4 drivers +L_0x280bbb0 .part/pv L_0x280bb50, 0, 1, 4; +L_0x280bca0 .part L_0x280b100, 0, 1; +L_0x280bd40 .part L_0x280b1a0, 0, 1; +L_0x280c800 .part/pv L_0x280b780, 1, 1, 4; +L_0x280c940 .part L_0x280b100, 1, 1; +L_0x280ca30 .part L_0x280b1a0, 1, 1; +L_0x280d540 .part/pv L_0x280c2b0, 2, 1, 4; +L_0x280d630 .part L_0x280b100, 2, 1; +L_0x280d720 .part L_0x280b1a0, 2, 1; +L_0x280e1a0 .part/pv L_0x280cff0, 3, 1, 4; +L_0x280e2d0 .part L_0x280b100, 3, 1; +L_0x280e400 .part L_0x280b1a0, 3, 1; +L_0x280e5a0 .part L_0x280b100, 3, 1; +L_0x280e640 .part L_0x280b1a0, 3, 1; +L_0x280e740 .part L_0x280b100, 3, 1; +L_0x280e7e0 .part L_0x280b1a0, 3, 1; +L_0x280e9c0 .part L_0x280b1a0, 3, 1; +L_0x280eab0 .part RS_0x7f6901daadc8, 3, 1; +L_0x280ec40 .part L_0x280b1a0, 3, 1; +L_0x280ee40 .part RS_0x7f6901daadc8, 3, 1; +S_0x27d5160 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27d3000; + .timescale -9 -12; +L_0x2806d60 .functor AND 1, L_0x280bca0, L_0x280bd40, C4<1>, C4<1>; +L_0x2806dc0 .functor AND 1, L_0x280bca0, L_0x28096d0, C4<1>, C4<1>; +L_0x2806e20 .functor AND 1, L_0x280bd40, L_0x28096d0, C4<1>, C4<1>; +L_0x27eb6d0 .functor OR 1, L_0x2806d60, L_0x2806dc0, C4<0>, C4<0>; +L_0x280b510 .functor OR 1, L_0x27eb6d0, L_0x2806e20, C4<0>, C4<0>; +L_0x280b610 .functor OR 1, L_0x280bca0, L_0x280bd40, C4<0>, C4<0>; +L_0x280b670 .functor OR 1, L_0x280b610, L_0x28096d0, C4<0>, C4<0>; +L_0x280b720 .functor NOT 1, L_0x280b510, C4<0>, C4<0>, C4<0>; +L_0x280b810 .functor AND 1, L_0x280b720, L_0x280b670, C4<1>, C4<1>; +L_0x280b910 .functor AND 1, L_0x280bca0, L_0x280bd40, C4<1>, C4<1>; +L_0x280baf0 .functor AND 1, L_0x280b910, L_0x28096d0, C4<1>, C4<1>; +L_0x280bb50 .functor OR 1, L_0x280b810, L_0x280baf0, C4<0>, C4<0>; +v0x27d5250_0 .net "a", 0 0, L_0x280bca0; 1 drivers +v0x27d5310_0 .net "ab", 0 0, L_0x2806d60; 1 drivers +v0x27d53b0_0 .net "acarryin", 0 0, L_0x2806dc0; 1 drivers +v0x27d5450_0 .net "andall", 0 0, L_0x280baf0; 1 drivers +v0x27d54d0_0 .net "andsingleintermediate", 0 0, L_0x280b910; 1 drivers +v0x27d5570_0 .net "andsumintermediate", 0 0, L_0x280b810; 1 drivers +v0x27d5610_0 .net "b", 0 0, L_0x280bd40; 1 drivers +v0x27d56b0_0 .net "bcarryin", 0 0, L_0x2806e20; 1 drivers +v0x27d5750_0 .alias "carryin", 0 0, v0x27eb650_0; +v0x27d57f0_0 .alias "carryout", 0 0, v0x27d6650_0; +v0x27d5870_0 .net "invcarryout", 0 0, L_0x280b720; 1 drivers +v0x27d58f0_0 .net "orall", 0 0, L_0x280b670; 1 drivers +v0x27d5990_0 .net "orpairintermediate", 0 0, L_0x27eb6d0; 1 drivers +v0x27d5a30_0 .net "orsingleintermediate", 0 0, L_0x280b610; 1 drivers +v0x27d5b50_0 .net "sum", 0 0, L_0x280bb50; 1 drivers +S_0x27d46d0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27d3000; + .timescale -9 -12; +L_0x280ba90 .functor AND 1, L_0x280c940, L_0x280ca30, C4<1>, C4<1>; +L_0x280bde0 .functor AND 1, L_0x280c940, L_0x280b510, C4<1>, C4<1>; +L_0x280be90 .functor AND 1, L_0x280ca30, L_0x280b510, C4<1>, C4<1>; +L_0x280bf40 .functor OR 1, L_0x280ba90, L_0x280bde0, C4<0>, C4<0>; +L_0x280c040 .functor OR 1, L_0x280bf40, L_0x280be90, C4<0>, C4<0>; +L_0x280c140 .functor OR 1, L_0x280c940, L_0x280ca30, C4<0>, C4<0>; +L_0x280c1a0 .functor OR 1, L_0x280c140, L_0x280b510, C4<0>, C4<0>; +L_0x280c250 .functor NOT 1, L_0x280c040, C4<0>, C4<0>, C4<0>; +L_0x280c340 .functor AND 1, L_0x280c250, L_0x280c1a0, C4<1>, C4<1>; +L_0x280c440 .functor AND 1, L_0x280c940, L_0x280ca30, C4<1>, C4<1>; +L_0x280c620 .functor AND 1, L_0x280c440, L_0x280b510, C4<1>, C4<1>; +L_0x280b780 .functor OR 1, L_0x280c340, L_0x280c620, C4<0>, C4<0>; +v0x27d47c0_0 .net "a", 0 0, L_0x280c940; 1 drivers +v0x27d4880_0 .net "ab", 0 0, L_0x280ba90; 1 drivers +v0x27d4920_0 .net "acarryin", 0 0, L_0x280bde0; 1 drivers +v0x27d49c0_0 .net "andall", 0 0, L_0x280c620; 1 drivers +v0x27d4a40_0 .net "andsingleintermediate", 0 0, L_0x280c440; 1 drivers +v0x27d4ae0_0 .net "andsumintermediate", 0 0, L_0x280c340; 1 drivers +v0x27d4b80_0 .net "b", 0 0, L_0x280ca30; 1 drivers +v0x27d4c20_0 .net "bcarryin", 0 0, L_0x280be90; 1 drivers +v0x27d4cc0_0 .alias "carryin", 0 0, v0x27d6650_0; +v0x27d4d60_0 .alias "carryout", 0 0, v0x27d6820_0; +v0x27d4de0_0 .net "invcarryout", 0 0, L_0x280c250; 1 drivers +v0x27d4e60_0 .net "orall", 0 0, L_0x280c1a0; 1 drivers +v0x27d4f00_0 .net "orpairintermediate", 0 0, L_0x280bf40; 1 drivers +v0x27d4fa0_0 .net "orsingleintermediate", 0 0, L_0x280c140; 1 drivers +v0x27d50c0_0 .net "sum", 0 0, L_0x280b780; 1 drivers +S_0x27d3bf0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27d3000; + .timescale -9 -12; +L_0x280c5c0 .functor AND 1, L_0x280d630, L_0x280d720, C4<1>, C4<1>; +L_0x280cb20 .functor AND 1, L_0x280d630, L_0x280c040, C4<1>, C4<1>; +L_0x280cbd0 .functor AND 1, L_0x280d720, L_0x280c040, C4<1>, C4<1>; +L_0x280cc80 .functor OR 1, L_0x280c5c0, L_0x280cb20, C4<0>, C4<0>; +L_0x280cd80 .functor OR 1, L_0x280cc80, L_0x280cbd0, C4<0>, C4<0>; +L_0x280ce80 .functor OR 1, L_0x280d630, L_0x280d720, C4<0>, C4<0>; +L_0x280cee0 .functor OR 1, L_0x280ce80, L_0x280c040, C4<0>, C4<0>; +L_0x280cf90 .functor NOT 1, L_0x280cd80, C4<0>, C4<0>, C4<0>; +L_0x280d080 .functor AND 1, L_0x280cf90, L_0x280cee0, C4<1>, C4<1>; +L_0x280d180 .functor AND 1, L_0x280d630, L_0x280d720, C4<1>, C4<1>; +L_0x280d360 .functor AND 1, L_0x280d180, L_0x280c040, C4<1>, C4<1>; +L_0x280c2b0 .functor OR 1, L_0x280d080, L_0x280d360, C4<0>, C4<0>; +v0x27d3ce0_0 .net "a", 0 0, L_0x280d630; 1 drivers +v0x27d3da0_0 .net "ab", 0 0, L_0x280c5c0; 1 drivers +v0x27d3e40_0 .net "acarryin", 0 0, L_0x280cb20; 1 drivers +v0x27d3ee0_0 .net "andall", 0 0, L_0x280d360; 1 drivers +v0x27d3f60_0 .net "andsingleintermediate", 0 0, L_0x280d180; 1 drivers +v0x27d4000_0 .net "andsumintermediate", 0 0, L_0x280d080; 1 drivers +v0x27d40a0_0 .net "b", 0 0, L_0x280d720; 1 drivers +v0x27d4140_0 .net "bcarryin", 0 0, L_0x280cbd0; 1 drivers +v0x27d4230_0 .alias "carryin", 0 0, v0x27d6820_0; +v0x27d42d0_0 .alias "carryout", 0 0, v0x27d6950_0; +v0x27d4350_0 .net "invcarryout", 0 0, L_0x280cf90; 1 drivers +v0x27d43d0_0 .net "orall", 0 0, L_0x280cee0; 1 drivers +v0x27d4470_0 .net "orpairintermediate", 0 0, L_0x280cc80; 1 drivers +v0x27d4510_0 .net "orsingleintermediate", 0 0, L_0x280ce80; 1 drivers +v0x27d4630_0 .net "sum", 0 0, L_0x280c2b0; 1 drivers +S_0x27d30f0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27d3000; + .timescale -9 -12; +L_0x280d300 .functor AND 1, L_0x280e2d0, L_0x280e400, C4<1>, C4<1>; +L_0x280d7c0 .functor AND 1, L_0x280e2d0, L_0x280cd80, C4<1>, C4<1>; +L_0x280d870 .functor AND 1, L_0x280e400, L_0x280cd80, C4<1>, C4<1>; +L_0x280d920 .functor OR 1, L_0x280d300, L_0x280d7c0, C4<0>, C4<0>; +L_0x280da20 .functor OR 1, L_0x280d920, L_0x280d870, C4<0>, C4<0>; +L_0x280db20 .functor OR 1, L_0x280e2d0, L_0x280e400, C4<0>, C4<0>; +L_0x280db80 .functor OR 1, L_0x280db20, L_0x280cd80, C4<0>, C4<0>; +L_0x280dc30 .functor NOT 1, L_0x280da20, C4<0>, C4<0>, C4<0>; +L_0x280dce0 .functor AND 1, L_0x280dc30, L_0x280db80, C4<1>, C4<1>; +L_0x280dde0 .functor AND 1, L_0x280e2d0, L_0x280e400, C4<1>, C4<1>; +L_0x280dfc0 .functor AND 1, L_0x280dde0, L_0x280cd80, C4<1>, C4<1>; +L_0x280cff0 .functor OR 1, L_0x280dce0, L_0x280dfc0, C4<0>, C4<0>; +v0x27d31e0_0 .net "a", 0 0, L_0x280e2d0; 1 drivers +v0x27d32a0_0 .net "ab", 0 0, L_0x280d300; 1 drivers +v0x27d3340_0 .net "acarryin", 0 0, L_0x280d7c0; 1 drivers +v0x27d33e0_0 .net "andall", 0 0, L_0x280dfc0; 1 drivers +v0x27d3460_0 .net "andsingleintermediate", 0 0, L_0x280dde0; 1 drivers +v0x27d3500_0 .net "andsumintermediate", 0 0, L_0x280dce0; 1 drivers +v0x27d35a0_0 .net "b", 0 0, L_0x280e400; 1 drivers +v0x27d3640_0 .net "bcarryin", 0 0, L_0x280d870; 1 drivers +v0x27d3730_0 .alias "carryin", 0 0, v0x27d6950_0; +v0x27d37d0_0 .alias "carryout", 0 0, v0x27eb760_0; +v0x27d3850_0 .net "invcarryout", 0 0, L_0x280dc30; 1 drivers +v0x27d38f0_0 .net "orall", 0 0, L_0x280db80; 1 drivers +v0x27d3990_0 .net "orpairintermediate", 0 0, L_0x280d920; 1 drivers +v0x27d3a30_0 .net "orsingleintermediate", 0 0, L_0x280db20; 1 drivers +v0x27d3b50_0 .net "sum", 0 0, L_0x280cff0; 1 drivers +S_0x27cf4f0 .scope module, "adder4" "FullAdder4bit" 5 241, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x2812240 .functor AND 1, L_0x2812880, L_0x2812920, C4<1>, C4<1>; +L_0x28129c0 .functor NOR 1, L_0x2812a20, L_0x2812ac0, C4<0>, C4<0>; +L_0x2812c40 .functor AND 1, L_0x2812ca0, L_0x2812d90, C4<1>, C4<1>; +L_0x2812bb0 .functor NOR 1, L_0x2812f20, L_0x2813120, C4<0>, C4<0>; +L_0x2812e80 .functor OR 1, L_0x2812240, L_0x28129c0, C4<0>, C4<0>; +L_0x2813310 .functor NOR 1, L_0x2812c40, L_0x2812bb0, C4<0>, C4<0>; +L_0x2813410 .functor AND 1, L_0x2812e80, L_0x2813310, C4<1>, C4<1>; +v0x27d20e0_0 .net *"_s25", 0 0, L_0x2812880; 1 drivers +v0x27d21a0_0 .net *"_s27", 0 0, L_0x2812920; 1 drivers +v0x27d2240_0 .net *"_s29", 0 0, L_0x2812a20; 1 drivers +v0x27d22e0_0 .net *"_s31", 0 0, L_0x2812ac0; 1 drivers +v0x27d2360_0 .net *"_s33", 0 0, L_0x2812ca0; 1 drivers +v0x27d2400_0 .net *"_s35", 0 0, L_0x2812d90; 1 drivers +v0x27d24a0_0 .net *"_s37", 0 0, L_0x2812f20; 1 drivers +v0x27d2540_0 .net *"_s39", 0 0, L_0x2813120; 1 drivers +v0x27d25e0_0 .net "a", 3 0, L_0x2813600; 1 drivers +v0x27d2680_0 .net "aandb", 0 0, L_0x2812240; 1 drivers +v0x27d2720_0 .net "abandnoror", 0 0, L_0x2812e80; 1 drivers +v0x27d27c0_0 .net "anorb", 0 0, L_0x28129c0; 1 drivers +v0x27d2860_0 .net "b", 3 0, L_0x280f320; 1 drivers +v0x27d2900_0 .net "bandsum", 0 0, L_0x2812c40; 1 drivers +v0x27d2a20_0 .net "bnorsum", 0 0, L_0x2812bb0; 1 drivers +v0x27d2ac0_0 .net "bsumandnornor", 0 0, L_0x2813310; 1 drivers +v0x27d2980_0 .alias "carryin", 0 0, v0x27eb760_0; +v0x27d2bf0_0 .alias "carryout", 0 0, v0x27ebbb0_0; +v0x27d2b40_0 .net "carryout1", 0 0, L_0x280f800; 1 drivers +v0x27d2d10_0 .net "carryout2", 0 0, L_0x2810320; 1 drivers +v0x27d2e40_0 .net "carryout3", 0 0, L_0x2811060; 1 drivers +v0x27d2ec0_0 .alias "overflow", 0 0, v0x27e8910_0; +v0x27d2d90_0 .net8 "sum", 3 0, RS_0x7f6901da9fe8; 4 drivers +L_0x280fe90 .part/pv L_0x280fde0, 0, 1, 4; +L_0x280ff80 .part L_0x2813600, 0, 1; +L_0x2810020 .part L_0x280f320, 0, 1; +L_0x2810ae0 .part/pv L_0x280fa70, 1, 1, 4; +L_0x2810c20 .part L_0x2813600, 1, 1; +L_0x2810d10 .part L_0x280f320, 1, 1; +L_0x2811820 .part/pv L_0x2810590, 2, 1, 4; +L_0x2811910 .part L_0x2813600, 2, 1; +L_0x2811a00 .part L_0x280f320, 2, 1; +L_0x2812480 .part/pv L_0x28112d0, 3, 1, 4; +L_0x28125b0 .part L_0x2813600, 3, 1; +L_0x28126e0 .part L_0x280f320, 3, 1; +L_0x2812880 .part L_0x2813600, 3, 1; +L_0x2812920 .part L_0x280f320, 3, 1; +L_0x2812a20 .part L_0x2813600, 3, 1; +L_0x2812ac0 .part L_0x280f320, 3, 1; +L_0x2812ca0 .part L_0x280f320, 3, 1; +L_0x2812d90 .part RS_0x7f6901da9fe8, 3, 1; +L_0x2812f20 .part L_0x280f320, 3, 1; +L_0x2813120 .part RS_0x7f6901da9fe8, 3, 1; +S_0x27d1650 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27cf4f0; + .timescale -9 -12; +L_0x280b240 .functor AND 1, L_0x280ff80, L_0x2810020, C4<1>, C4<1>; +L_0x280b2a0 .functor AND 1, L_0x280ff80, L_0x280da20, C4<1>, C4<1>; +L_0x280f5a0 .functor AND 1, L_0x2810020, L_0x280da20, C4<1>, C4<1>; +L_0x27ebb20 .functor OR 1, L_0x280b240, L_0x280b2a0, C4<0>, C4<0>; +L_0x280f800 .functor OR 1, L_0x27ebb20, L_0x280f5a0, C4<0>, C4<0>; +L_0x280f900 .functor OR 1, L_0x280ff80, L_0x2810020, C4<0>, C4<0>; +L_0x280f960 .functor OR 1, L_0x280f900, L_0x280da20, C4<0>, C4<0>; +L_0x280fa10 .functor NOT 1, L_0x280f800, C4<0>, C4<0>, C4<0>; +L_0x280fb00 .functor AND 1, L_0x280fa10, L_0x280f960, C4<1>, C4<1>; +L_0x280fc00 .functor AND 1, L_0x280ff80, L_0x2810020, C4<1>, C4<1>; +L_0x280fd80 .functor AND 1, L_0x280fc00, L_0x280da20, C4<1>, C4<1>; +L_0x280fde0 .functor OR 1, L_0x280fb00, L_0x280fd80, C4<0>, C4<0>; +v0x27d1740_0 .net "a", 0 0, L_0x280ff80; 1 drivers +v0x27d1800_0 .net "ab", 0 0, L_0x280b240; 1 drivers +v0x27d18a0_0 .net "acarryin", 0 0, L_0x280b2a0; 1 drivers +v0x27d1940_0 .net "andall", 0 0, L_0x280fd80; 1 drivers +v0x27d19c0_0 .net "andsingleintermediate", 0 0, L_0x280fc00; 1 drivers +v0x27d1a60_0 .net "andsumintermediate", 0 0, L_0x280fb00; 1 drivers +v0x27d1b00_0 .net "b", 0 0, L_0x2810020; 1 drivers +v0x27d1ba0_0 .net "bcarryin", 0 0, L_0x280f5a0; 1 drivers +v0x27d1c40_0 .alias "carryin", 0 0, v0x27eb760_0; +v0x27d1ce0_0 .alias "carryout", 0 0, v0x27d2b40_0; +v0x27d1d60_0 .net "invcarryout", 0 0, L_0x280fa10; 1 drivers +v0x27d1de0_0 .net "orall", 0 0, L_0x280f960; 1 drivers +v0x27d1e80_0 .net "orpairintermediate", 0 0, L_0x27ebb20; 1 drivers +v0x27d1f20_0 .net "orsingleintermediate", 0 0, L_0x280f900; 1 drivers +v0x27d2040_0 .net "sum", 0 0, L_0x280fde0; 1 drivers +S_0x27d0bc0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27cf4f0; + .timescale -9 -12; +L_0x280b300 .functor AND 1, L_0x2810c20, L_0x2810d10, C4<1>, C4<1>; +L_0x28100c0 .functor AND 1, L_0x2810c20, L_0x280f800, C4<1>, C4<1>; +L_0x2810170 .functor AND 1, L_0x2810d10, L_0x280f800, C4<1>, C4<1>; +L_0x2810220 .functor OR 1, L_0x280b300, L_0x28100c0, C4<0>, C4<0>; +L_0x2810320 .functor OR 1, L_0x2810220, L_0x2810170, C4<0>, C4<0>; +L_0x2810420 .functor OR 1, L_0x2810c20, L_0x2810d10, C4<0>, C4<0>; +L_0x2810480 .functor OR 1, L_0x2810420, L_0x280f800, C4<0>, C4<0>; +L_0x2810530 .functor NOT 1, L_0x2810320, C4<0>, C4<0>, C4<0>; +L_0x2810620 .functor AND 1, L_0x2810530, L_0x2810480, C4<1>, C4<1>; +L_0x2810720 .functor AND 1, L_0x2810c20, L_0x2810d10, C4<1>, C4<1>; +L_0x2810900 .functor AND 1, L_0x2810720, L_0x280f800, C4<1>, C4<1>; +L_0x280fa70 .functor OR 1, L_0x2810620, L_0x2810900, C4<0>, C4<0>; +v0x27d0cb0_0 .net "a", 0 0, L_0x2810c20; 1 drivers +v0x27d0d70_0 .net "ab", 0 0, L_0x280b300; 1 drivers +v0x27d0e10_0 .net "acarryin", 0 0, L_0x28100c0; 1 drivers +v0x27d0eb0_0 .net "andall", 0 0, L_0x2810900; 1 drivers +v0x27d0f30_0 .net "andsingleintermediate", 0 0, L_0x2810720; 1 drivers +v0x27d0fd0_0 .net "andsumintermediate", 0 0, L_0x2810620; 1 drivers +v0x27d1070_0 .net "b", 0 0, L_0x2810d10; 1 drivers +v0x27d1110_0 .net "bcarryin", 0 0, L_0x2810170; 1 drivers +v0x27d11b0_0 .alias "carryin", 0 0, v0x27d2b40_0; +v0x27d1250_0 .alias "carryout", 0 0, v0x27d2d10_0; +v0x27d12d0_0 .net "invcarryout", 0 0, L_0x2810530; 1 drivers +v0x27d1350_0 .net "orall", 0 0, L_0x2810480; 1 drivers +v0x27d13f0_0 .net "orpairintermediate", 0 0, L_0x2810220; 1 drivers +v0x27d1490_0 .net "orsingleintermediate", 0 0, L_0x2810420; 1 drivers +v0x27d15b0_0 .net "sum", 0 0, L_0x280fa70; 1 drivers +S_0x27d00e0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27cf4f0; + .timescale -9 -12; +L_0x28108a0 .functor AND 1, L_0x2811910, L_0x2811a00, C4<1>, C4<1>; +L_0x2810e00 .functor AND 1, L_0x2811910, L_0x2810320, C4<1>, C4<1>; +L_0x2810eb0 .functor AND 1, L_0x2811a00, L_0x2810320, C4<1>, C4<1>; +L_0x2810f60 .functor OR 1, L_0x28108a0, L_0x2810e00, C4<0>, C4<0>; +L_0x2811060 .functor OR 1, L_0x2810f60, L_0x2810eb0, C4<0>, C4<0>; +L_0x2811160 .functor OR 1, L_0x2811910, L_0x2811a00, C4<0>, C4<0>; +L_0x28111c0 .functor OR 1, L_0x2811160, L_0x2810320, C4<0>, C4<0>; +L_0x2811270 .functor NOT 1, L_0x2811060, C4<0>, C4<0>, C4<0>; +L_0x2811360 .functor AND 1, L_0x2811270, L_0x28111c0, C4<1>, C4<1>; +L_0x2811460 .functor AND 1, L_0x2811910, L_0x2811a00, C4<1>, C4<1>; +L_0x2811640 .functor AND 1, L_0x2811460, L_0x2810320, C4<1>, C4<1>; +L_0x2810590 .functor OR 1, L_0x2811360, L_0x2811640, C4<0>, C4<0>; +v0x27d01d0_0 .net "a", 0 0, L_0x2811910; 1 drivers +v0x27d0290_0 .net "ab", 0 0, L_0x28108a0; 1 drivers +v0x27d0330_0 .net "acarryin", 0 0, L_0x2810e00; 1 drivers +v0x27d03d0_0 .net "andall", 0 0, L_0x2811640; 1 drivers +v0x27d0450_0 .net "andsingleintermediate", 0 0, L_0x2811460; 1 drivers +v0x27d04f0_0 .net "andsumintermediate", 0 0, L_0x2811360; 1 drivers +v0x27d0590_0 .net "b", 0 0, L_0x2811a00; 1 drivers +v0x27d0630_0 .net "bcarryin", 0 0, L_0x2810eb0; 1 drivers +v0x27d0720_0 .alias "carryin", 0 0, v0x27d2d10_0; +v0x27d07c0_0 .alias "carryout", 0 0, v0x27d2e40_0; +v0x27d0840_0 .net "invcarryout", 0 0, L_0x2811270; 1 drivers +v0x27d08c0_0 .net "orall", 0 0, L_0x28111c0; 1 drivers +v0x27d0960_0 .net "orpairintermediate", 0 0, L_0x2810f60; 1 drivers +v0x27d0a00_0 .net "orsingleintermediate", 0 0, L_0x2811160; 1 drivers +v0x27d0b20_0 .net "sum", 0 0, L_0x2810590; 1 drivers +S_0x27cf5e0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27cf4f0; + .timescale -9 -12; +L_0x28115e0 .functor AND 1, L_0x28125b0, L_0x28126e0, C4<1>, C4<1>; +L_0x2811aa0 .functor AND 1, L_0x28125b0, L_0x2811060, C4<1>, C4<1>; +L_0x2811b50 .functor AND 1, L_0x28126e0, L_0x2811060, C4<1>, C4<1>; +L_0x2811c00 .functor OR 1, L_0x28115e0, L_0x2811aa0, C4<0>, C4<0>; +L_0x2811d00 .functor OR 1, L_0x2811c00, L_0x2811b50, C4<0>, C4<0>; +L_0x2811e00 .functor OR 1, L_0x28125b0, L_0x28126e0, C4<0>, C4<0>; +L_0x2811e60 .functor OR 1, L_0x2811e00, L_0x2811060, C4<0>, C4<0>; +L_0x2811f10 .functor NOT 1, L_0x2811d00, C4<0>, C4<0>, C4<0>; +L_0x2811fc0 .functor AND 1, L_0x2811f10, L_0x2811e60, C4<1>, C4<1>; +L_0x28120c0 .functor AND 1, L_0x28125b0, L_0x28126e0, C4<1>, C4<1>; +L_0x28122a0 .functor AND 1, L_0x28120c0, L_0x2811060, C4<1>, C4<1>; +L_0x28112d0 .functor OR 1, L_0x2811fc0, L_0x28122a0, C4<0>, C4<0>; +v0x27cf6d0_0 .net "a", 0 0, L_0x28125b0; 1 drivers +v0x27cf790_0 .net "ab", 0 0, L_0x28115e0; 1 drivers +v0x27cf830_0 .net "acarryin", 0 0, L_0x2811aa0; 1 drivers +v0x27cf8d0_0 .net "andall", 0 0, L_0x28122a0; 1 drivers +v0x27cf950_0 .net "andsingleintermediate", 0 0, L_0x28120c0; 1 drivers +v0x27cf9f0_0 .net "andsumintermediate", 0 0, L_0x2811fc0; 1 drivers +v0x27cfa90_0 .net "b", 0 0, L_0x28126e0; 1 drivers +v0x27cfb30_0 .net "bcarryin", 0 0, L_0x2811b50; 1 drivers +v0x27cfc20_0 .alias "carryin", 0 0, v0x27d2e40_0; +v0x27cfcc0_0 .alias "carryout", 0 0, v0x27ebbb0_0; +v0x27cfd40_0 .net "invcarryout", 0 0, L_0x2811f10; 1 drivers +v0x27cfde0_0 .net "orall", 0 0, L_0x2811e60; 1 drivers +v0x27cfe80_0 .net "orpairintermediate", 0 0, L_0x2811c00; 1 drivers +v0x27cff20_0 .net "orsingleintermediate", 0 0, L_0x2811e00; 1 drivers +v0x27d0040_0 .net "sum", 0 0, L_0x28112d0; 1 drivers +S_0x27cb9e0 .scope module, "adder5" "FullAdder4bit" 5 242, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x2816530 .functor AND 1, L_0x2816b70, L_0x2816c10, C4<1>, C4<1>; +L_0x2816cb0 .functor NOR 1, L_0x2816d10, L_0x2816db0, C4<0>, C4<0>; +L_0x2816f30 .functor AND 1, L_0x2816f90, L_0x2817080, C4<1>, C4<1>; +L_0x2816ea0 .functor NOR 1, L_0x2817210, L_0x2817410, C4<0>, C4<0>; +L_0x2817170 .functor OR 1, L_0x2816530, L_0x2816cb0, C4<0>, C4<0>; +L_0x2817600 .functor NOR 1, L_0x2816f30, L_0x2816ea0, C4<0>, C4<0>; +L_0x2817700 .functor AND 1, L_0x2817170, L_0x2817600, C4<1>, C4<1>; +v0x27ce5d0_0 .net *"_s25", 0 0, L_0x2816b70; 1 drivers +v0x27ce690_0 .net *"_s27", 0 0, L_0x2816c10; 1 drivers +v0x27ce730_0 .net *"_s29", 0 0, L_0x2816d10; 1 drivers +v0x27ce7d0_0 .net *"_s31", 0 0, L_0x2816db0; 1 drivers +v0x27ce850_0 .net *"_s33", 0 0, L_0x2816f90; 1 drivers +v0x27ce8f0_0 .net *"_s35", 0 0, L_0x2817080; 1 drivers +v0x27ce990_0 .net *"_s37", 0 0, L_0x2817210; 1 drivers +v0x27cea30_0 .net *"_s39", 0 0, L_0x2817410; 1 drivers +v0x27cead0_0 .net "a", 3 0, L_0x28136a0; 1 drivers +v0x27ceb70_0 .net "aandb", 0 0, L_0x2816530; 1 drivers +v0x27cec10_0 .net "abandnoror", 0 0, L_0x2817170; 1 drivers +v0x27cecb0_0 .net "anorb", 0 0, L_0x2816cb0; 1 drivers +v0x27ced50_0 .net "b", 3 0, L_0x2813740; 1 drivers +v0x27cedf0_0 .net "bandsum", 0 0, L_0x2816f30; 1 drivers +v0x27cef10_0 .net "bnorsum", 0 0, L_0x2816ea0; 1 drivers +v0x27cefb0_0 .net "bsumandnornor", 0 0, L_0x2817600; 1 drivers +v0x27cee70_0 .alias "carryin", 0 0, v0x27ebbb0_0; +v0x27cf0e0_0 .alias "carryout", 0 0, v0x27ebcc0_0; +v0x27cf030_0 .net "carryout1", 0 0, L_0x2813ae0; 1 drivers +v0x27cf200_0 .net "carryout2", 0 0, L_0x2814610; 1 drivers +v0x27cf330_0 .net "carryout3", 0 0, L_0x2815350; 1 drivers +v0x27cf3b0_0 .alias "overflow", 0 0, v0x27e8990_0; +v0x27cf280_0 .net8 "sum", 3 0, RS_0x7f6901da9208; 4 drivers +L_0x2814180 .part/pv L_0x2814120, 0, 1, 4; +L_0x2814270 .part L_0x28136a0, 0, 1; +L_0x2814310 .part L_0x2813740, 0, 1; +L_0x2814dd0 .part/pv L_0x2813d50, 1, 1, 4; +L_0x2814f10 .part L_0x28136a0, 1, 1; +L_0x2815000 .part L_0x2813740, 1, 1; +L_0x2815b10 .part/pv L_0x2814880, 2, 1, 4; +L_0x2815c00 .part L_0x28136a0, 2, 1; +L_0x2815cf0 .part L_0x2813740, 2, 1; +L_0x2816770 .part/pv L_0x28155c0, 3, 1, 4; +L_0x28168a0 .part L_0x28136a0, 3, 1; +L_0x28169d0 .part L_0x2813740, 3, 1; +L_0x2816b70 .part L_0x28136a0, 3, 1; +L_0x2816c10 .part L_0x2813740, 3, 1; +L_0x2816d10 .part L_0x28136a0, 3, 1; +L_0x2816db0 .part L_0x2813740, 3, 1; +L_0x2816f90 .part L_0x2813740, 3, 1; +L_0x2817080 .part RS_0x7f6901da9208, 3, 1; +L_0x2817210 .part L_0x2813740, 3, 1; +L_0x2817410 .part RS_0x7f6901da9208, 3, 1; +S_0x27cdb40 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27cb9e0; + .timescale -9 -12; +L_0x280f3c0 .functor AND 1, L_0x2814270, L_0x2814310, C4<1>, C4<1>; +L_0x280f420 .functor AND 1, L_0x2814270, L_0x2811d00, C4<1>, C4<1>; +L_0x280f4d0 .functor AND 1, L_0x2814310, L_0x2811d00, C4<1>, C4<1>; +L_0x27ebc30 .functor OR 1, L_0x280f3c0, L_0x280f420, C4<0>, C4<0>; +L_0x2813ae0 .functor OR 1, L_0x27ebc30, L_0x280f4d0, C4<0>, C4<0>; +L_0x2813be0 .functor OR 1, L_0x2814270, L_0x2814310, C4<0>, C4<0>; +L_0x2813c40 .functor OR 1, L_0x2813be0, L_0x2811d00, C4<0>, C4<0>; +L_0x2813cf0 .functor NOT 1, L_0x2813ae0, C4<0>, C4<0>, C4<0>; +L_0x2813de0 .functor AND 1, L_0x2813cf0, L_0x2813c40, C4<1>, C4<1>; +L_0x2813ee0 .functor AND 1, L_0x2814270, L_0x2814310, C4<1>, C4<1>; +L_0x28140c0 .functor AND 1, L_0x2813ee0, L_0x2811d00, C4<1>, C4<1>; +L_0x2814120 .functor OR 1, L_0x2813de0, L_0x28140c0, C4<0>, C4<0>; +v0x27cdc30_0 .net "a", 0 0, L_0x2814270; 1 drivers +v0x27cdcf0_0 .net "ab", 0 0, L_0x280f3c0; 1 drivers +v0x27cdd90_0 .net "acarryin", 0 0, L_0x280f420; 1 drivers +v0x27cde30_0 .net "andall", 0 0, L_0x28140c0; 1 drivers +v0x27cdeb0_0 .net "andsingleintermediate", 0 0, L_0x2813ee0; 1 drivers +v0x27cdf50_0 .net "andsumintermediate", 0 0, L_0x2813de0; 1 drivers +v0x27cdff0_0 .net "b", 0 0, L_0x2814310; 1 drivers +v0x27ce090_0 .net "bcarryin", 0 0, L_0x280f4d0; 1 drivers +v0x27ce130_0 .alias "carryin", 0 0, v0x27ebbb0_0; +v0x27ce1d0_0 .alias "carryout", 0 0, v0x27cf030_0; +v0x27ce250_0 .net "invcarryout", 0 0, L_0x2813cf0; 1 drivers +v0x27ce2d0_0 .net "orall", 0 0, L_0x2813c40; 1 drivers +v0x27ce370_0 .net "orpairintermediate", 0 0, L_0x27ebc30; 1 drivers +v0x27ce410_0 .net "orsingleintermediate", 0 0, L_0x2813be0; 1 drivers +v0x27ce530_0 .net "sum", 0 0, L_0x2814120; 1 drivers +S_0x27cd0b0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27cb9e0; + .timescale -9 -12; +L_0x2814060 .functor AND 1, L_0x2814f10, L_0x2815000, C4<1>, C4<1>; +L_0x28143b0 .functor AND 1, L_0x2814f10, L_0x2813ae0, C4<1>, C4<1>; +L_0x2814460 .functor AND 1, L_0x2815000, L_0x2813ae0, C4<1>, C4<1>; +L_0x2814510 .functor OR 1, L_0x2814060, L_0x28143b0, C4<0>, C4<0>; +L_0x2814610 .functor OR 1, L_0x2814510, L_0x2814460, C4<0>, C4<0>; +L_0x2814710 .functor OR 1, L_0x2814f10, L_0x2815000, C4<0>, C4<0>; +L_0x2814770 .functor OR 1, L_0x2814710, L_0x2813ae0, C4<0>, C4<0>; +L_0x2814820 .functor NOT 1, L_0x2814610, C4<0>, C4<0>, C4<0>; +L_0x2814910 .functor AND 1, L_0x2814820, L_0x2814770, C4<1>, C4<1>; +L_0x2814a10 .functor AND 1, L_0x2814f10, L_0x2815000, C4<1>, C4<1>; +L_0x2814bf0 .functor AND 1, L_0x2814a10, L_0x2813ae0, C4<1>, C4<1>; +L_0x2813d50 .functor OR 1, L_0x2814910, L_0x2814bf0, C4<0>, C4<0>; +v0x27cd1a0_0 .net "a", 0 0, L_0x2814f10; 1 drivers +v0x27cd260_0 .net "ab", 0 0, L_0x2814060; 1 drivers +v0x27cd300_0 .net "acarryin", 0 0, L_0x28143b0; 1 drivers +v0x27cd3a0_0 .net "andall", 0 0, L_0x2814bf0; 1 drivers +v0x27cd420_0 .net "andsingleintermediate", 0 0, L_0x2814a10; 1 drivers +v0x27cd4c0_0 .net "andsumintermediate", 0 0, L_0x2814910; 1 drivers +v0x27cd560_0 .net "b", 0 0, L_0x2815000; 1 drivers +v0x27cd600_0 .net "bcarryin", 0 0, L_0x2814460; 1 drivers +v0x27cd6a0_0 .alias "carryin", 0 0, v0x27cf030_0; +v0x27cd740_0 .alias "carryout", 0 0, v0x27cf200_0; +v0x27cd7c0_0 .net "invcarryout", 0 0, L_0x2814820; 1 drivers +v0x27cd840_0 .net "orall", 0 0, L_0x2814770; 1 drivers +v0x27cd8e0_0 .net "orpairintermediate", 0 0, L_0x2814510; 1 drivers +v0x27cd980_0 .net "orsingleintermediate", 0 0, L_0x2814710; 1 drivers +v0x27cdaa0_0 .net "sum", 0 0, L_0x2813d50; 1 drivers +S_0x27cc5d0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27cb9e0; + .timescale -9 -12; +L_0x2814b90 .functor AND 1, L_0x2815c00, L_0x2815cf0, C4<1>, C4<1>; +L_0x28150f0 .functor AND 1, L_0x2815c00, L_0x2814610, C4<1>, C4<1>; +L_0x28151a0 .functor AND 1, L_0x2815cf0, L_0x2814610, C4<1>, C4<1>; +L_0x2815250 .functor OR 1, L_0x2814b90, L_0x28150f0, C4<0>, C4<0>; +L_0x2815350 .functor OR 1, L_0x2815250, L_0x28151a0, C4<0>, C4<0>; +L_0x2815450 .functor OR 1, L_0x2815c00, L_0x2815cf0, C4<0>, C4<0>; +L_0x28154b0 .functor OR 1, L_0x2815450, L_0x2814610, C4<0>, C4<0>; +L_0x2815560 .functor NOT 1, L_0x2815350, C4<0>, C4<0>, C4<0>; +L_0x2815650 .functor AND 1, L_0x2815560, L_0x28154b0, C4<1>, C4<1>; +L_0x2815750 .functor AND 1, L_0x2815c00, L_0x2815cf0, C4<1>, C4<1>; +L_0x2815930 .functor AND 1, L_0x2815750, L_0x2814610, C4<1>, C4<1>; +L_0x2814880 .functor OR 1, L_0x2815650, L_0x2815930, C4<0>, C4<0>; +v0x27cc6c0_0 .net "a", 0 0, L_0x2815c00; 1 drivers +v0x27cc780_0 .net "ab", 0 0, L_0x2814b90; 1 drivers +v0x27cc820_0 .net "acarryin", 0 0, L_0x28150f0; 1 drivers +v0x27cc8c0_0 .net "andall", 0 0, L_0x2815930; 1 drivers +v0x27cc940_0 .net "andsingleintermediate", 0 0, L_0x2815750; 1 drivers +v0x27cc9e0_0 .net "andsumintermediate", 0 0, L_0x2815650; 1 drivers +v0x27cca80_0 .net "b", 0 0, L_0x2815cf0; 1 drivers +v0x27ccb20_0 .net "bcarryin", 0 0, L_0x28151a0; 1 drivers +v0x27ccc10_0 .alias "carryin", 0 0, v0x27cf200_0; +v0x27cccb0_0 .alias "carryout", 0 0, v0x27cf330_0; +v0x27ccd30_0 .net "invcarryout", 0 0, L_0x2815560; 1 drivers +v0x27ccdb0_0 .net "orall", 0 0, L_0x28154b0; 1 drivers +v0x27cce50_0 .net "orpairintermediate", 0 0, L_0x2815250; 1 drivers +v0x27ccef0_0 .net "orsingleintermediate", 0 0, L_0x2815450; 1 drivers +v0x27cd010_0 .net "sum", 0 0, L_0x2814880; 1 drivers +S_0x27cbad0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27cb9e0; + .timescale -9 -12; +L_0x28158d0 .functor AND 1, L_0x28168a0, L_0x28169d0, C4<1>, C4<1>; +L_0x2815d90 .functor AND 1, L_0x28168a0, L_0x2815350, C4<1>, C4<1>; +L_0x2815e40 .functor AND 1, L_0x28169d0, L_0x2815350, C4<1>, C4<1>; +L_0x2815ef0 .functor OR 1, L_0x28158d0, L_0x2815d90, C4<0>, C4<0>; +L_0x2815ff0 .functor OR 1, L_0x2815ef0, L_0x2815e40, C4<0>, C4<0>; +L_0x28160f0 .functor OR 1, L_0x28168a0, L_0x28169d0, C4<0>, C4<0>; +L_0x2816150 .functor OR 1, L_0x28160f0, L_0x2815350, C4<0>, C4<0>; +L_0x2816200 .functor NOT 1, L_0x2815ff0, C4<0>, C4<0>, C4<0>; +L_0x28162b0 .functor AND 1, L_0x2816200, L_0x2816150, C4<1>, C4<1>; +L_0x28163b0 .functor AND 1, L_0x28168a0, L_0x28169d0, C4<1>, C4<1>; +L_0x2816590 .functor AND 1, L_0x28163b0, L_0x2815350, C4<1>, C4<1>; +L_0x28155c0 .functor OR 1, L_0x28162b0, L_0x2816590, C4<0>, C4<0>; +v0x27cbbc0_0 .net "a", 0 0, L_0x28168a0; 1 drivers +v0x27cbc80_0 .net "ab", 0 0, L_0x28158d0; 1 drivers +v0x27cbd20_0 .net "acarryin", 0 0, L_0x2815d90; 1 drivers +v0x27cbdc0_0 .net "andall", 0 0, L_0x2816590; 1 drivers +v0x27cbe40_0 .net "andsingleintermediate", 0 0, L_0x28163b0; 1 drivers +v0x27cbee0_0 .net "andsumintermediate", 0 0, L_0x28162b0; 1 drivers +v0x27cbf80_0 .net "b", 0 0, L_0x28169d0; 1 drivers +v0x27cc020_0 .net "bcarryin", 0 0, L_0x2815e40; 1 drivers +v0x27cc110_0 .alias "carryin", 0 0, v0x27cf330_0; +v0x27cc1b0_0 .alias "carryout", 0 0, v0x27ebcc0_0; +v0x27cc230_0 .net "invcarryout", 0 0, L_0x2816200; 1 drivers +v0x27cc2d0_0 .net "orall", 0 0, L_0x2816150; 1 drivers +v0x27cc370_0 .net "orpairintermediate", 0 0, L_0x2815ef0; 1 drivers +v0x27cc410_0 .net "orsingleintermediate", 0 0, L_0x28160f0; 1 drivers +v0x27cc530_0 .net "sum", 0 0, L_0x28155c0; 1 drivers +S_0x27c7ed0 .scope module, "adder6" "FullAdder4bit" 5 243, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x281a850 .functor AND 1, L_0x281ae90, L_0x281af30, C4<1>, C4<1>; +L_0x281afd0 .functor NOR 1, L_0x281b030, L_0x281b0d0, C4<0>, C4<0>; +L_0x281b250 .functor AND 1, L_0x281b2b0, L_0x281b3a0, C4<1>, C4<1>; +L_0x281b1c0 .functor NOR 1, L_0x281b530, L_0x281b730, C4<0>, C4<0>; +L_0x281b490 .functor OR 1, L_0x281a850, L_0x281afd0, C4<0>, C4<0>; +L_0x281b920 .functor NOR 1, L_0x281b250, L_0x281b1c0, C4<0>, C4<0>; +L_0x281ba20 .functor AND 1, L_0x281b490, L_0x281b920, C4<1>, C4<1>; +v0x27caac0_0 .net *"_s25", 0 0, L_0x281ae90; 1 drivers +v0x27cab80_0 .net *"_s27", 0 0, L_0x281af30; 1 drivers +v0x27cac20_0 .net *"_s29", 0 0, L_0x281b030; 1 drivers +v0x27cacc0_0 .net *"_s31", 0 0, L_0x281b0d0; 1 drivers +v0x27cad40_0 .net *"_s33", 0 0, L_0x281b2b0; 1 drivers +v0x27cade0_0 .net *"_s35", 0 0, L_0x281b3a0; 1 drivers +v0x27cae80_0 .net *"_s37", 0 0, L_0x281b530; 1 drivers +v0x27caf20_0 .net *"_s39", 0 0, L_0x281b730; 1 drivers +v0x27cafc0_0 .net "a", 3 0, L_0x281bd20; 1 drivers +v0x27cb060_0 .net "aandb", 0 0, L_0x281a850; 1 drivers +v0x27cb100_0 .net "abandnoror", 0 0, L_0x281b490; 1 drivers +v0x27cb1a0_0 .net "anorb", 0 0, L_0x281afd0; 1 drivers +v0x27cb240_0 .net "b", 3 0, L_0x28178f0; 1 drivers +v0x27cb2e0_0 .net "bandsum", 0 0, L_0x281b250; 1 drivers +v0x27cb400_0 .net "bnorsum", 0 0, L_0x281b1c0; 1 drivers +v0x27cb4a0_0 .net "bsumandnornor", 0 0, L_0x281b920; 1 drivers +v0x27cb360_0 .alias "carryin", 0 0, v0x27ebcc0_0; +v0x27cb5d0_0 .alias "carryout", 0 0, v0x27eb930_0; +v0x27cb520_0 .net "carryout1", 0 0, L_0x2817e00; 1 drivers +v0x27cb6f0_0 .net "carryout2", 0 0, L_0x2818930; 1 drivers +v0x27cb820_0 .net "carryout3", 0 0, L_0x2819670; 1 drivers +v0x27cb8a0_0 .alias "overflow", 0 0, v0x27e8a10_0; +v0x27cb770_0 .net8 "sum", 3 0, RS_0x7f6901da8428; 4 drivers +L_0x28184a0 .part/pv L_0x2818440, 0, 1, 4; +L_0x2818590 .part L_0x281bd20, 0, 1; +L_0x2818630 .part L_0x28178f0, 0, 1; +L_0x28190f0 .part/pv L_0x2818070, 1, 1, 4; +L_0x2819230 .part L_0x281bd20, 1, 1; +L_0x2819320 .part L_0x28178f0, 1, 1; +L_0x2819e30 .part/pv L_0x2818ba0, 2, 1, 4; +L_0x2819f20 .part L_0x281bd20, 2, 1; +L_0x281a010 .part L_0x28178f0, 2, 1; +L_0x281aa90 .part/pv L_0x28198e0, 3, 1, 4; +L_0x281abc0 .part L_0x281bd20, 3, 1; +L_0x281acf0 .part L_0x28178f0, 3, 1; +L_0x281ae90 .part L_0x281bd20, 3, 1; +L_0x281af30 .part L_0x28178f0, 3, 1; +L_0x281b030 .part L_0x281bd20, 3, 1; +L_0x281b0d0 .part L_0x28178f0, 3, 1; +L_0x281b2b0 .part L_0x28178f0, 3, 1; +L_0x281b3a0 .part RS_0x7f6901da8428, 3, 1; +L_0x281b530 .part L_0x28178f0, 3, 1; +L_0x281b730 .part RS_0x7f6901da8428, 3, 1; +S_0x27ca030 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27c7ed0; + .timescale -9 -12; +L_0x28137e0 .functor AND 1, L_0x2818590, L_0x2818630, C4<1>, C4<1>; +L_0x2813840 .functor AND 1, L_0x2818590, L_0x2815ff0, C4<1>, C4<1>; +L_0x2817ba0 .functor AND 1, L_0x2818630, L_0x2815ff0, C4<1>, C4<1>; +L_0x27eb8a0 .functor OR 1, L_0x28137e0, L_0x2813840, C4<0>, C4<0>; +L_0x2817e00 .functor OR 1, L_0x27eb8a0, L_0x2817ba0, C4<0>, C4<0>; +L_0x2817f00 .functor OR 1, L_0x2818590, L_0x2818630, C4<0>, C4<0>; +L_0x2817f60 .functor OR 1, L_0x2817f00, L_0x2815ff0, C4<0>, C4<0>; +L_0x2818010 .functor NOT 1, L_0x2817e00, C4<0>, C4<0>, C4<0>; +L_0x2818100 .functor AND 1, L_0x2818010, L_0x2817f60, C4<1>, C4<1>; +L_0x2818200 .functor AND 1, L_0x2818590, L_0x2818630, C4<1>, C4<1>; +L_0x28183e0 .functor AND 1, L_0x2818200, L_0x2815ff0, C4<1>, C4<1>; +L_0x2818440 .functor OR 1, L_0x2818100, L_0x28183e0, C4<0>, C4<0>; +v0x27ca120_0 .net "a", 0 0, L_0x2818590; 1 drivers +v0x27ca1e0_0 .net "ab", 0 0, L_0x28137e0; 1 drivers +v0x27ca280_0 .net "acarryin", 0 0, L_0x2813840; 1 drivers +v0x27ca320_0 .net "andall", 0 0, L_0x28183e0; 1 drivers +v0x27ca3a0_0 .net "andsingleintermediate", 0 0, L_0x2818200; 1 drivers +v0x27ca440_0 .net "andsumintermediate", 0 0, L_0x2818100; 1 drivers +v0x27ca4e0_0 .net "b", 0 0, L_0x2818630; 1 drivers +v0x27ca580_0 .net "bcarryin", 0 0, L_0x2817ba0; 1 drivers +v0x27ca620_0 .alias "carryin", 0 0, v0x27ebcc0_0; +v0x27ca6c0_0 .alias "carryout", 0 0, v0x27cb520_0; +v0x27ca740_0 .net "invcarryout", 0 0, L_0x2818010; 1 drivers +v0x27ca7c0_0 .net "orall", 0 0, L_0x2817f60; 1 drivers +v0x27ca860_0 .net "orpairintermediate", 0 0, L_0x27eb8a0; 1 drivers +v0x27ca900_0 .net "orsingleintermediate", 0 0, L_0x2817f00; 1 drivers +v0x27caa20_0 .net "sum", 0 0, L_0x2818440; 1 drivers +S_0x27c95a0 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27c7ed0; + .timescale -9 -12; +L_0x2818380 .functor AND 1, L_0x2819230, L_0x2819320, C4<1>, C4<1>; +L_0x28186d0 .functor AND 1, L_0x2819230, L_0x2817e00, C4<1>, C4<1>; +L_0x2818780 .functor AND 1, L_0x2819320, L_0x2817e00, C4<1>, C4<1>; +L_0x2818830 .functor OR 1, L_0x2818380, L_0x28186d0, C4<0>, C4<0>; +L_0x2818930 .functor OR 1, L_0x2818830, L_0x2818780, C4<0>, C4<0>; +L_0x2818a30 .functor OR 1, L_0x2819230, L_0x2819320, C4<0>, C4<0>; +L_0x2818a90 .functor OR 1, L_0x2818a30, L_0x2817e00, C4<0>, C4<0>; +L_0x2818b40 .functor NOT 1, L_0x2818930, C4<0>, C4<0>, C4<0>; +L_0x2818c30 .functor AND 1, L_0x2818b40, L_0x2818a90, C4<1>, C4<1>; +L_0x2818d30 .functor AND 1, L_0x2819230, L_0x2819320, C4<1>, C4<1>; +L_0x2818f10 .functor AND 1, L_0x2818d30, L_0x2817e00, C4<1>, C4<1>; +L_0x2818070 .functor OR 1, L_0x2818c30, L_0x2818f10, C4<0>, C4<0>; +v0x27c9690_0 .net "a", 0 0, L_0x2819230; 1 drivers +v0x27c9750_0 .net "ab", 0 0, L_0x2818380; 1 drivers +v0x27c97f0_0 .net "acarryin", 0 0, L_0x28186d0; 1 drivers +v0x27c9890_0 .net "andall", 0 0, L_0x2818f10; 1 drivers +v0x27c9910_0 .net "andsingleintermediate", 0 0, L_0x2818d30; 1 drivers +v0x27c99b0_0 .net "andsumintermediate", 0 0, L_0x2818c30; 1 drivers +v0x27c9a50_0 .net "b", 0 0, L_0x2819320; 1 drivers +v0x27c9af0_0 .net "bcarryin", 0 0, L_0x2818780; 1 drivers +v0x27c9b90_0 .alias "carryin", 0 0, v0x27cb520_0; +v0x27c9c30_0 .alias "carryout", 0 0, v0x27cb6f0_0; +v0x27c9cb0_0 .net "invcarryout", 0 0, L_0x2818b40; 1 drivers +v0x27c9d30_0 .net "orall", 0 0, L_0x2818a90; 1 drivers +v0x27c9dd0_0 .net "orpairintermediate", 0 0, L_0x2818830; 1 drivers +v0x27c9e70_0 .net "orsingleintermediate", 0 0, L_0x2818a30; 1 drivers +v0x27c9f90_0 .net "sum", 0 0, L_0x2818070; 1 drivers +S_0x27c8ac0 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27c7ed0; + .timescale -9 -12; +L_0x2818eb0 .functor AND 1, L_0x2819f20, L_0x281a010, C4<1>, C4<1>; +L_0x2819410 .functor AND 1, L_0x2819f20, L_0x2818930, C4<1>, C4<1>; +L_0x28194c0 .functor AND 1, L_0x281a010, L_0x2818930, C4<1>, C4<1>; +L_0x2819570 .functor OR 1, L_0x2818eb0, L_0x2819410, C4<0>, C4<0>; +L_0x2819670 .functor OR 1, L_0x2819570, L_0x28194c0, C4<0>, C4<0>; +L_0x2819770 .functor OR 1, L_0x2819f20, L_0x281a010, C4<0>, C4<0>; +L_0x28197d0 .functor OR 1, L_0x2819770, L_0x2818930, C4<0>, C4<0>; +L_0x2819880 .functor NOT 1, L_0x2819670, C4<0>, C4<0>, C4<0>; +L_0x2819970 .functor AND 1, L_0x2819880, L_0x28197d0, C4<1>, C4<1>; +L_0x2819a70 .functor AND 1, L_0x2819f20, L_0x281a010, C4<1>, C4<1>; +L_0x2819c50 .functor AND 1, L_0x2819a70, L_0x2818930, C4<1>, C4<1>; +L_0x2818ba0 .functor OR 1, L_0x2819970, L_0x2819c50, C4<0>, C4<0>; +v0x27c8bb0_0 .net "a", 0 0, L_0x2819f20; 1 drivers +v0x27c8c70_0 .net "ab", 0 0, L_0x2818eb0; 1 drivers +v0x27c8d10_0 .net "acarryin", 0 0, L_0x2819410; 1 drivers +v0x27c8db0_0 .net "andall", 0 0, L_0x2819c50; 1 drivers +v0x27c8e30_0 .net "andsingleintermediate", 0 0, L_0x2819a70; 1 drivers +v0x27c8ed0_0 .net "andsumintermediate", 0 0, L_0x2819970; 1 drivers +v0x27c8f70_0 .net "b", 0 0, L_0x281a010; 1 drivers +v0x27c9010_0 .net "bcarryin", 0 0, L_0x28194c0; 1 drivers +v0x27c9100_0 .alias "carryin", 0 0, v0x27cb6f0_0; +v0x27c91a0_0 .alias "carryout", 0 0, v0x27cb820_0; +v0x27c9220_0 .net "invcarryout", 0 0, L_0x2819880; 1 drivers +v0x27c92a0_0 .net "orall", 0 0, L_0x28197d0; 1 drivers +v0x27c9340_0 .net "orpairintermediate", 0 0, L_0x2819570; 1 drivers +v0x27c93e0_0 .net "orsingleintermediate", 0 0, L_0x2819770; 1 drivers +v0x27c9500_0 .net "sum", 0 0, L_0x2818ba0; 1 drivers +S_0x27c7fc0 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27c7ed0; + .timescale -9 -12; +L_0x2819bf0 .functor AND 1, L_0x281abc0, L_0x281acf0, C4<1>, C4<1>; +L_0x281a0b0 .functor AND 1, L_0x281abc0, L_0x2819670, C4<1>, C4<1>; +L_0x281a160 .functor AND 1, L_0x281acf0, L_0x2819670, C4<1>, C4<1>; +L_0x281a210 .functor OR 1, L_0x2819bf0, L_0x281a0b0, C4<0>, C4<0>; +L_0x281a310 .functor OR 1, L_0x281a210, L_0x281a160, C4<0>, C4<0>; +L_0x281a410 .functor OR 1, L_0x281abc0, L_0x281acf0, C4<0>, C4<0>; +L_0x281a470 .functor OR 1, L_0x281a410, L_0x2819670, C4<0>, C4<0>; +L_0x281a520 .functor NOT 1, L_0x281a310, C4<0>, C4<0>, C4<0>; +L_0x281a5d0 .functor AND 1, L_0x281a520, L_0x281a470, C4<1>, C4<1>; +L_0x281a6d0 .functor AND 1, L_0x281abc0, L_0x281acf0, C4<1>, C4<1>; +L_0x281a8b0 .functor AND 1, L_0x281a6d0, L_0x2819670, C4<1>, C4<1>; +L_0x28198e0 .functor OR 1, L_0x281a5d0, L_0x281a8b0, C4<0>, C4<0>; +v0x27c80b0_0 .net "a", 0 0, L_0x281abc0; 1 drivers +v0x27c8150_0 .net "ab", 0 0, L_0x2819bf0; 1 drivers +v0x27c81f0_0 .net "acarryin", 0 0, L_0x281a0b0; 1 drivers +v0x27c8290_0 .net "andall", 0 0, L_0x281a8b0; 1 drivers +v0x27c8330_0 .net "andsingleintermediate", 0 0, L_0x281a6d0; 1 drivers +v0x27c83d0_0 .net "andsumintermediate", 0 0, L_0x281a5d0; 1 drivers +v0x27c8470_0 .net "b", 0 0, L_0x281acf0; 1 drivers +v0x27c8510_0 .net "bcarryin", 0 0, L_0x281a160; 1 drivers +v0x27c8600_0 .alias "carryin", 0 0, v0x27cb820_0; +v0x27c86a0_0 .alias "carryout", 0 0, v0x27eb930_0; +v0x27c8720_0 .net "invcarryout", 0 0, L_0x281a520; 1 drivers +v0x27c87c0_0 .net "orall", 0 0, L_0x281a470; 1 drivers +v0x27c8860_0 .net "orpairintermediate", 0 0, L_0x281a210; 1 drivers +v0x27c8900_0 .net "orsingleintermediate", 0 0, L_0x281a410; 1 drivers +v0x27c8a20_0 .net "sum", 0 0, L_0x28198e0; 1 drivers +S_0x27c4440 .scope module, "adder7" "FullAdder4bit" 5 244, 2 47, S_0x27c4350; + .timescale -9 -12; +L_0x281ec20 .functor AND 1, L_0x281f260, L_0x281f300, C4<1>, C4<1>; +L_0x281f3a0 .functor NOR 1, L_0x281f400, L_0x281f4a0, C4<0>, C4<0>; +L_0x281f620 .functor AND 1, L_0x281f680, L_0x281f770, C4<1>, C4<1>; +L_0x281f590 .functor NOR 1, L_0x281f900, L_0x281fb00, C4<0>, C4<0>; +L_0x281f860 .functor OR 1, L_0x281ec20, L_0x281f3a0, C4<0>, C4<0>; +L_0x281fcf0 .functor NOR 1, L_0x281f620, L_0x281f590, C4<0>, C4<0>; +L_0x281fdf0 .functor AND 1, L_0x281f860, L_0x281fcf0, C4<1>, C4<1>; +v0x27c6fb0_0 .net *"_s25", 0 0, L_0x281f260; 1 drivers +v0x27c7070_0 .net *"_s27", 0 0, L_0x281f300; 1 drivers +v0x27c7110_0 .net *"_s29", 0 0, L_0x281f400; 1 drivers +v0x27c71b0_0 .net *"_s31", 0 0, L_0x281f4a0; 1 drivers +v0x27c7230_0 .net *"_s33", 0 0, L_0x281f680; 1 drivers +v0x27c72d0_0 .net *"_s35", 0 0, L_0x281f770; 1 drivers +v0x27c7370_0 .net *"_s37", 0 0, L_0x281f900; 1 drivers +v0x27c7410_0 .net *"_s39", 0 0, L_0x281fb00; 1 drivers +v0x27c74b0_0 .net "a", 3 0, L_0x281bdc0; 1 drivers +v0x27c7550_0 .net "aandb", 0 0, L_0x281ec20; 1 drivers +v0x27c75f0_0 .net "abandnoror", 0 0, L_0x281f860; 1 drivers +v0x27c7690_0 .net "anorb", 0 0, L_0x281f3a0; 1 drivers +v0x27c7730_0 .net "b", 3 0, L_0x27ecf70; 1 drivers +v0x27c77d0_0 .net "bandsum", 0 0, L_0x281f620; 1 drivers +v0x27c78f0_0 .net "bnorsum", 0 0, L_0x281f590; 1 drivers +v0x27c7990_0 .net "bsumandnornor", 0 0, L_0x281fcf0; 1 drivers +v0x27c7850_0 .alias "carryin", 0 0, v0x27eb930_0; +v0x27c7ac0_0 .alias "carryout", 0 0, v0x27ec3a0_0; +v0x27c7a10_0 .net "carryout1", 0 0, L_0x281c190; 1 drivers +v0x27c7be0_0 .net "carryout2", 0 0, L_0x281ccc0; 1 drivers +v0x27c7d10_0 .net "carryout3", 0 0, L_0x281da00; 1 drivers +v0x27c7d90_0 .alias "overflow", 0 0, v0x27ec420_0; +v0x27c7c60_0 .net8 "sum", 3 0, RS_0x7f6901da7648; 4 drivers +L_0x281c830 .part/pv L_0x281c7d0, 0, 1, 4; +L_0x281c920 .part L_0x281bdc0, 0, 1; +L_0x281c9c0 .part L_0x27ecf70, 0, 1; +L_0x281d480 .part/pv L_0x281c400, 1, 1, 4; +L_0x281d5c0 .part L_0x281bdc0, 1, 1; +L_0x281d6b0 .part L_0x27ecf70, 1, 1; +L_0x281e1c0 .part/pv L_0x281cf30, 2, 1, 4; +L_0x281e2b0 .part L_0x281bdc0, 2, 1; +L_0x281e3a0 .part L_0x27ecf70, 2, 1; +L_0x281ee60 .part/pv L_0x281dc70, 3, 1, 4; +L_0x281ef90 .part L_0x281bdc0, 3, 1; +L_0x281f0c0 .part L_0x27ecf70, 3, 1; +L_0x281f260 .part L_0x281bdc0, 3, 1; +L_0x281f300 .part L_0x27ecf70, 3, 1; +L_0x281f400 .part L_0x281bdc0, 3, 1; +L_0x281f4a0 .part L_0x27ecf70, 3, 1; +L_0x281f680 .part L_0x27ecf70, 3, 1; +L_0x281f770 .part RS_0x7f6901da7648, 3, 1; +L_0x281f900 .part L_0x27ecf70, 3, 1; +L_0x281fb00 .part RS_0x7f6901da7648, 3, 1; +S_0x27c6520 .scope module, "adder1" "structuralFullAdder" 2 65, 2 15, S_0x27c4440; + .timescale -9 -12; +L_0x2817990 .functor AND 1, L_0x281c920, L_0x281c9c0, C4<1>, C4<1>; +L_0x28179f0 .functor AND 1, L_0x281c920, L_0x281a310, C4<1>, C4<1>; +L_0x2817aa0 .functor AND 1, L_0x281c9c0, L_0x281a310, C4<1>, C4<1>; +L_0x280afd0 .functor OR 1, L_0x2817990, L_0x28179f0, C4<0>, C4<0>; +L_0x281c190 .functor OR 1, L_0x280afd0, L_0x2817aa0, C4<0>, C4<0>; +L_0x281c290 .functor OR 1, L_0x281c920, L_0x281c9c0, C4<0>, C4<0>; +L_0x281c2f0 .functor OR 1, L_0x281c290, L_0x281a310, C4<0>, C4<0>; +L_0x281c3a0 .functor NOT 1, L_0x281c190, C4<0>, C4<0>, C4<0>; +L_0x281c490 .functor AND 1, L_0x281c3a0, L_0x281c2f0, C4<1>, C4<1>; +L_0x281c590 .functor AND 1, L_0x281c920, L_0x281c9c0, C4<1>, C4<1>; +L_0x281c770 .functor AND 1, L_0x281c590, L_0x281a310, C4<1>, C4<1>; +L_0x281c7d0 .functor OR 1, L_0x281c490, L_0x281c770, C4<0>, C4<0>; +v0x27c6610_0 .net "a", 0 0, L_0x281c920; 1 drivers +v0x27c66d0_0 .net "ab", 0 0, L_0x2817990; 1 drivers +v0x27c6770_0 .net "acarryin", 0 0, L_0x28179f0; 1 drivers +v0x27c6810_0 .net "andall", 0 0, L_0x281c770; 1 drivers +v0x27c6890_0 .net "andsingleintermediate", 0 0, L_0x281c590; 1 drivers +v0x27c6930_0 .net "andsumintermediate", 0 0, L_0x281c490; 1 drivers +v0x27c69d0_0 .net "b", 0 0, L_0x281c9c0; 1 drivers +v0x27c6a70_0 .net "bcarryin", 0 0, L_0x2817aa0; 1 drivers +v0x27c6b10_0 .alias "carryin", 0 0, v0x27eb930_0; +v0x27c6bb0_0 .alias "carryout", 0 0, v0x27c7a10_0; +v0x27c6c30_0 .net "invcarryout", 0 0, L_0x281c3a0; 1 drivers +v0x27c6cb0_0 .net "orall", 0 0, L_0x281c2f0; 1 drivers +v0x27c6d50_0 .net "orpairintermediate", 0 0, L_0x280afd0; 1 drivers +v0x27c6df0_0 .net "orsingleintermediate", 0 0, L_0x281c290; 1 drivers +v0x27c6f10_0 .net "sum", 0 0, L_0x281c7d0; 1 drivers +S_0x27c5a90 .scope module, "adder2" "structuralFullAdder" 2 66, 2 15, S_0x27c4440; + .timescale -9 -12; +L_0x281c710 .functor AND 1, L_0x281d5c0, L_0x281d6b0, C4<1>, C4<1>; +L_0x281ca60 .functor AND 1, L_0x281d5c0, L_0x281c190, C4<1>, C4<1>; +L_0x281cb10 .functor AND 1, L_0x281d6b0, L_0x281c190, C4<1>, C4<1>; +L_0x281cbc0 .functor OR 1, L_0x281c710, L_0x281ca60, C4<0>, C4<0>; +L_0x281ccc0 .functor OR 1, L_0x281cbc0, L_0x281cb10, C4<0>, C4<0>; +L_0x281cdc0 .functor OR 1, L_0x281d5c0, L_0x281d6b0, C4<0>, C4<0>; +L_0x281ce20 .functor OR 1, L_0x281cdc0, L_0x281c190, C4<0>, C4<0>; +L_0x281ced0 .functor NOT 1, L_0x281ccc0, C4<0>, C4<0>, C4<0>; +L_0x281cfc0 .functor AND 1, L_0x281ced0, L_0x281ce20, C4<1>, C4<1>; +L_0x281d0c0 .functor AND 1, L_0x281d5c0, L_0x281d6b0, C4<1>, C4<1>; +L_0x281d2a0 .functor AND 1, L_0x281d0c0, L_0x281c190, C4<1>, C4<1>; +L_0x281c400 .functor OR 1, L_0x281cfc0, L_0x281d2a0, C4<0>, C4<0>; +v0x27c5b80_0 .net "a", 0 0, L_0x281d5c0; 1 drivers +v0x27c5c40_0 .net "ab", 0 0, L_0x281c710; 1 drivers +v0x27c5ce0_0 .net "acarryin", 0 0, L_0x281ca60; 1 drivers +v0x27c5d80_0 .net "andall", 0 0, L_0x281d2a0; 1 drivers +v0x27c5e00_0 .net "andsingleintermediate", 0 0, L_0x281d0c0; 1 drivers +v0x27c5ea0_0 .net "andsumintermediate", 0 0, L_0x281cfc0; 1 drivers +v0x27c5f40_0 .net "b", 0 0, L_0x281d6b0; 1 drivers +v0x27c5fe0_0 .net "bcarryin", 0 0, L_0x281cb10; 1 drivers +v0x27c6080_0 .alias "carryin", 0 0, v0x27c7a10_0; +v0x27c6120_0 .alias "carryout", 0 0, v0x27c7be0_0; +v0x27c61a0_0 .net "invcarryout", 0 0, L_0x281ced0; 1 drivers +v0x27c6220_0 .net "orall", 0 0, L_0x281ce20; 1 drivers +v0x27c62c0_0 .net "orpairintermediate", 0 0, L_0x281cbc0; 1 drivers +v0x27c6360_0 .net "orsingleintermediate", 0 0, L_0x281cdc0; 1 drivers +v0x27c6480_0 .net "sum", 0 0, L_0x281c400; 1 drivers +S_0x27c5000 .scope module, "adder3" "structuralFullAdder" 2 67, 2 15, S_0x27c4440; + .timescale -9 -12; +L_0x281d240 .functor AND 1, L_0x281e2b0, L_0x281e3a0, C4<1>, C4<1>; +L_0x281d7a0 .functor AND 1, L_0x281e2b0, L_0x281ccc0, C4<1>, C4<1>; +L_0x281d850 .functor AND 1, L_0x281e3a0, L_0x281ccc0, C4<1>, C4<1>; +L_0x281d900 .functor OR 1, L_0x281d240, L_0x281d7a0, C4<0>, C4<0>; +L_0x281da00 .functor OR 1, L_0x281d900, L_0x281d850, C4<0>, C4<0>; +L_0x281db00 .functor OR 1, L_0x281e2b0, L_0x281e3a0, C4<0>, C4<0>; +L_0x281db60 .functor OR 1, L_0x281db00, L_0x281ccc0, C4<0>, C4<0>; +L_0x281dc10 .functor NOT 1, L_0x281da00, C4<0>, C4<0>, C4<0>; +L_0x281dd00 .functor AND 1, L_0x281dc10, L_0x281db60, C4<1>, C4<1>; +L_0x281de00 .functor AND 1, L_0x281e2b0, L_0x281e3a0, C4<1>, C4<1>; +L_0x281dfe0 .functor AND 1, L_0x281de00, L_0x281ccc0, C4<1>, C4<1>; +L_0x281cf30 .functor OR 1, L_0x281dd00, L_0x281dfe0, C4<0>, C4<0>; +v0x27c50f0_0 .net "a", 0 0, L_0x281e2b0; 1 drivers +v0x27c51b0_0 .net "ab", 0 0, L_0x281d240; 1 drivers +v0x27c5250_0 .net "acarryin", 0 0, L_0x281d7a0; 1 drivers +v0x27c52f0_0 .net "andall", 0 0, L_0x281dfe0; 1 drivers +v0x27c5370_0 .net "andsingleintermediate", 0 0, L_0x281de00; 1 drivers +v0x27c5410_0 .net "andsumintermediate", 0 0, L_0x281dd00; 1 drivers +v0x27c54b0_0 .net "b", 0 0, L_0x281e3a0; 1 drivers +v0x27c5550_0 .net "bcarryin", 0 0, L_0x281d850; 1 drivers +v0x27c55f0_0 .alias "carryin", 0 0, v0x27c7be0_0; +v0x27c5690_0 .alias "carryout", 0 0, v0x27c7d10_0; +v0x27c5710_0 .net "invcarryout", 0 0, L_0x281dc10; 1 drivers +v0x27c5790_0 .net "orall", 0 0, L_0x281db60; 1 drivers +v0x27c5830_0 .net "orpairintermediate", 0 0, L_0x281d900; 1 drivers +v0x27c58d0_0 .net "orsingleintermediate", 0 0, L_0x281db00; 1 drivers +v0x27c59f0_0 .net "sum", 0 0, L_0x281cf30; 1 drivers +S_0x27c4530 .scope module, "adder4" "structuralFullAdder" 2 68, 2 15, S_0x27c4440; + .timescale -9 -12; +L_0x281df80 .functor AND 1, L_0x281ef90, L_0x281f0c0, C4<1>, C4<1>; +L_0x281e440 .functor AND 1, L_0x281ef90, L_0x281da00, C4<1>, C4<1>; +L_0x281e4f0 .functor AND 1, L_0x281f0c0, L_0x281da00, C4<1>, C4<1>; +L_0x281e5a0 .functor OR 1, L_0x281df80, L_0x281e440, C4<0>, C4<0>; +L_0x281e6a0 .functor OR 1, L_0x281e5a0, L_0x281e4f0, C4<0>, C4<0>; +L_0x281e7e0 .functor OR 1, L_0x281ef90, L_0x281f0c0, C4<0>, C4<0>; +L_0x281e840 .functor OR 1, L_0x281e7e0, L_0x281da00, C4<0>, C4<0>; +L_0x281e8f0 .functor NOT 1, L_0x281e6a0, C4<0>, C4<0>, C4<0>; +L_0x281e9a0 .functor AND 1, L_0x281e8f0, L_0x281e840, C4<1>, C4<1>; +L_0x281eaa0 .functor AND 1, L_0x281ef90, L_0x281f0c0, C4<1>, C4<1>; +L_0x281ec80 .functor AND 1, L_0x281eaa0, L_0x281da00, C4<1>, C4<1>; +L_0x281dc70 .functor OR 1, L_0x281e9a0, L_0x281ec80, C4<0>, C4<0>; +v0x27c4620_0 .net "a", 0 0, L_0x281ef90; 1 drivers +v0x27c46e0_0 .net "ab", 0 0, L_0x281df80; 1 drivers +v0x27c4780_0 .net "acarryin", 0 0, L_0x281e440; 1 drivers +v0x27c4820_0 .net "andall", 0 0, L_0x281ec80; 1 drivers +v0x27c48a0_0 .net "andsingleintermediate", 0 0, L_0x281eaa0; 1 drivers +v0x27c4940_0 .net "andsumintermediate", 0 0, L_0x281e9a0; 1 drivers +v0x27c49e0_0 .net "b", 0 0, L_0x281f0c0; 1 drivers +v0x27c4a80_0 .net "bcarryin", 0 0, L_0x281e4f0; 1 drivers +v0x27c4b20_0 .alias "carryin", 0 0, v0x27c7d10_0; +v0x27c4bc0_0 .alias "carryout", 0 0, v0x27ec3a0_0; +v0x27c4c60_0 .net "invcarryout", 0 0, L_0x281e8f0; 1 drivers +v0x27c4d00_0 .net "orall", 0 0, L_0x281e840; 1 drivers +v0x27c4da0_0 .net "orpairintermediate", 0 0, L_0x281e5a0; 1 drivers +v0x27c4e40_0 .net "orsingleintermediate", 0 0, L_0x281e7e0; 1 drivers +v0x27c4f60_0 .net "sum", 0 0, L_0x281dc70; 1 drivers +S_0x27c01c0 .scope module, "xor0" "xor_32bit" 4 35, 6 1, S_0x27a11a0; + .timescale -9 -12; +L_0x2820310 .functor XOR 1, L_0x28203c0, L_0x28204b0, C4<0>, C4<0>; +L_0x2820640 .functor XOR 1, L_0x28206f0, L_0x28207e0, C4<0>, C4<0>; +L_0x2820a00 .functor XOR 1, L_0x2820a60, L_0x2820ba0, C4<0>, C4<0>; +L_0x2820d90 .functor XOR 1, L_0x2820df0, L_0x2820ee0, C4<0>, C4<0>; +L_0x27bea70 .functor XOR 1, L_0x2821070, L_0x2821110, C4<0>, C4<0>; +L_0x28212e0 .functor XOR 1, L_0x2821390, L_0x2821480, C4<0>, C4<0>; +L_0x2821250 .functor XOR 1, L_0x28217c0, L_0x2821570, C4<0>, C4<0>; +L_0x28218b0 .functor XOR 1, L_0x2821b60, L_0x2821c50, C4<0>, C4<0>; +L_0x2821e10 .functor XOR 1, L_0x2821ec0, L_0x2821d40, C4<0>, C4<0>; +L_0x2821fb0 .functor XOR 1, L_0x28222d0, L_0x2822370, C4<0>, C4<0>; +L_0x2822560 .functor XOR 1, L_0x28225c0, L_0x2822460, C4<0>, C4<0>; +L_0x28226b0 .functor XOR 1, L_0x2822980, L_0x2822a20, C4<0>, C4<0>; +L_0x2822270 .functor XOR 1, L_0x2822c40, L_0x2822b10, C4<0>, C4<0>; +L_0x2822d30 .functor XOR 1, L_0x2823060, L_0x2823100, C4<0>, C4<0>; +L_0x2822fb0 .functor XOR 1, L_0x28216b0, L_0x28231f0, C4<0>, C4<0>; +L_0x28232e0 .functor XOR 1, L_0x28238f0, L_0x281f1b0, C4<0>, C4<0>; +L_0x2823810 .functor XOR 1, L_0x2823da0, L_0x2823e40, C4<0>, C4<0>; +L_0x281be60 .functor XOR 1, L_0x2824180, L_0x2824220, C4<0>, C4<0>; +L_0x2824070 .functor XOR 1, L_0x2824480, L_0x28242c0, C4<0>, C4<0>; +L_0x2824700 .functor XOR 1, L_0x281bf10, L_0x28248b0, C4<0>, C4<0>; +L_0x28245c0 .functor XOR 1, L_0x2824b90, L_0x28249a0, C4<0>, C4<0>; +L_0x2824b30 .functor XOR 1, L_0x28247b0, L_0x2824fa0, C4<0>, C4<0>; +L_0x2824cd0 .functor XOR 1, L_0x2824d80, L_0x2825090, C4<0>, C4<0>; +L_0x2825220 .functor XOR 1, L_0x2824e90, L_0x28256b0, C4<0>, C4<0>; +L_0x28253a0 .functor XOR 1, L_0x2825450, L_0x2825a00, C4<0>, C4<0>; +L_0x28257a0 .functor XOR 1, L_0x2825930, L_0x2825e00, C4<0>, C4<0>; +L_0x2825c30 .functor XOR 1, L_0x2825ce0, L_0x2826130, C4<0>, C4<0>; +L_0x2825ea0 .functor XOR 1, L_0x2825850, L_0x2826090, C4<0>, C4<0>; +L_0x2826360 .functor XOR 1, L_0x2826410, L_0x2826870, C4<0>, C4<0>; +L_0x28265b0 .functor XOR 1, L_0x2825f50, L_0x2826760, C4<0>, C4<0>; +L_0x27c1510 .functor XOR 1, L_0x2823350, L_0x2823440, C4<0>, C4<0>; +L_0x2826a50 .functor XOR 1, L_0x2826660, L_0x2827440, C4<0>, C4<0>; +v0x27c02b0_0 .net *"_s0", 0 0, L_0x2820310; 1 drivers +v0x27c0330_0 .net *"_s101", 0 0, L_0x2823e40; 1 drivers +v0x27c03b0_0 .net *"_s102", 0 0, L_0x281be60; 1 drivers +v0x27c0430_0 .net *"_s105", 0 0, L_0x2824180; 1 drivers +v0x27c04b0_0 .net *"_s107", 0 0, L_0x2824220; 1 drivers +v0x27c0530_0 .net *"_s108", 0 0, L_0x2824070; 1 drivers +v0x27c05b0_0 .net *"_s11", 0 0, L_0x28207e0; 1 drivers +v0x27c0630_0 .net *"_s111", 0 0, L_0x2824480; 1 drivers +v0x27c0720_0 .net *"_s113", 0 0, L_0x28242c0; 1 drivers +v0x27c07c0_0 .net *"_s114", 0 0, L_0x2824700; 1 drivers +v0x27c0860_0 .net *"_s117", 0 0, L_0x281bf10; 1 drivers +v0x27c0900_0 .net *"_s119", 0 0, L_0x28248b0; 1 drivers +v0x27c09a0_0 .net *"_s12", 0 0, L_0x2820a00; 1 drivers +v0x27c0a40_0 .net *"_s120", 0 0, L_0x28245c0; 1 drivers +v0x27c0b60_0 .net *"_s123", 0 0, L_0x2824b90; 1 drivers +v0x27c0c00_0 .net *"_s125", 0 0, L_0x28249a0; 1 drivers +v0x27c0ac0_0 .net *"_s126", 0 0, L_0x2824b30; 1 drivers +v0x27c0d50_0 .net *"_s129", 0 0, L_0x28247b0; 1 drivers +v0x27c0e70_0 .net *"_s131", 0 0, L_0x2824fa0; 1 drivers +v0x27c0ef0_0 .net *"_s132", 0 0, L_0x2824cd0; 1 drivers +v0x27c0dd0_0 .net *"_s135", 0 0, L_0x2824d80; 1 drivers +v0x27c1020_0 .net *"_s137", 0 0, L_0x2825090; 1 drivers +v0x27c0f70_0 .net *"_s138", 0 0, L_0x2825220; 1 drivers +v0x27c1160_0 .net *"_s141", 0 0, L_0x2824e90; 1 drivers +v0x27c10c0_0 .net *"_s143", 0 0, L_0x28256b0; 1 drivers +v0x27c12b0_0 .net *"_s144", 0 0, L_0x28253a0; 1 drivers +v0x27c1200_0 .net *"_s147", 0 0, L_0x2825450; 1 drivers +v0x27c1410_0 .net *"_s149", 0 0, L_0x2825a00; 1 drivers +v0x27c1350_0 .net *"_s15", 0 0, L_0x2820a60; 1 drivers +v0x27c1580_0 .net *"_s150", 0 0, L_0x28257a0; 1 drivers +v0x27c1490_0 .net *"_s153", 0 0, L_0x2825930; 1 drivers +v0x27c1700_0 .net *"_s155", 0 0, L_0x2825e00; 1 drivers +v0x27c1600_0 .net *"_s156", 0 0, L_0x2825c30; 1 drivers +v0x27c1890_0 .net *"_s159", 0 0, L_0x2825ce0; 1 drivers +v0x27c1780_0 .net *"_s161", 0 0, L_0x2826130; 1 drivers +v0x27c1a30_0 .net *"_s162", 0 0, L_0x2825ea0; 1 drivers +v0x27c1910_0 .net *"_s165", 0 0, L_0x2825850; 1 drivers +v0x27c19b0_0 .net *"_s167", 0 0, L_0x2826090; 1 drivers +v0x27c1bf0_0 .net *"_s168", 0 0, L_0x2826360; 1 drivers +v0x27c1c70_0 .net *"_s17", 0 0, L_0x2820ba0; 1 drivers +v0x27c1ab0_0 .net *"_s171", 0 0, L_0x2826410; 1 drivers +v0x27c1b50_0 .net *"_s173", 0 0, L_0x2826870; 1 drivers +v0x27c1e50_0 .net *"_s174", 0 0, L_0x28265b0; 1 drivers +v0x27c1ed0_0 .net *"_s177", 0 0, L_0x2825f50; 1 drivers +v0x27c1cf0_0 .net *"_s179", 0 0, L_0x2826760; 1 drivers +v0x27c1d90_0 .net *"_s18", 0 0, L_0x2820d90; 1 drivers +v0x27c20d0_0 .net *"_s180", 0 0, L_0x27c1510; 1 drivers +v0x27c2150_0 .net *"_s183", 0 0, L_0x2823350; 1 drivers +v0x27c1f70_0 .net *"_s185", 0 0, L_0x2823440; 1 drivers +v0x27c2010_0 .net *"_s186", 0 0, L_0x2826a50; 1 drivers +v0x27c2370_0 .net *"_s189", 0 0, L_0x2826660; 1 drivers +v0x27c23f0_0 .net *"_s191", 0 0, L_0x2827440; 1 drivers +v0x27c21f0_0 .net *"_s21", 0 0, L_0x2820df0; 1 drivers +v0x27c2290_0 .net *"_s23", 0 0, L_0x2820ee0; 1 drivers +v0x27c2630_0 .net *"_s24", 0 0, L_0x27bea70; 1 drivers +v0x27c26b0_0 .net *"_s27", 0 0, L_0x2821070; 1 drivers +v0x27c2470_0 .net *"_s29", 0 0, L_0x2821110; 1 drivers +v0x27c2510_0 .net *"_s3", 0 0, L_0x28203c0; 1 drivers +v0x27c25b0_0 .net *"_s30", 0 0, L_0x28212e0; 1 drivers +v0x27c2930_0 .net *"_s33", 0 0, L_0x2821390; 1 drivers +v0x27c2750_0 .net *"_s35", 0 0, L_0x2821480; 1 drivers +v0x27c27f0_0 .net *"_s36", 0 0, L_0x2821250; 1 drivers +v0x27c2890_0 .net *"_s39", 0 0, L_0x28217c0; 1 drivers +v0x27c2bd0_0 .net *"_s41", 0 0, L_0x2821570; 1 drivers +v0x27c29d0_0 .net *"_s42", 0 0, L_0x28218b0; 1 drivers +v0x27c2a70_0 .net *"_s45", 0 0, L_0x2821b60; 1 drivers +v0x27c2b10_0 .net *"_s47", 0 0, L_0x2821c50; 1 drivers +v0x27c2e70_0 .net *"_s48", 0 0, L_0x2821e10; 1 drivers +v0x27c2c70_0 .net *"_s5", 0 0, L_0x28204b0; 1 drivers +v0x27c2d10_0 .net *"_s51", 0 0, L_0x2821ec0; 1 drivers +v0x27c2db0_0 .net *"_s53", 0 0, L_0x2821d40; 1 drivers +v0x27c3130_0 .net *"_s54", 0 0, L_0x2821fb0; 1 drivers +v0x27c2ef0_0 .net *"_s57", 0 0, L_0x28222d0; 1 drivers +v0x27c2f90_0 .net *"_s59", 0 0, L_0x2822370; 1 drivers +v0x27c3030_0 .net *"_s6", 0 0, L_0x2820640; 1 drivers +v0x27c3410_0 .net *"_s60", 0 0, L_0x2822560; 1 drivers +v0x27c31b0_0 .net *"_s63", 0 0, L_0x28225c0; 1 drivers +v0x27c3250_0 .net *"_s65", 0 0, L_0x2822460; 1 drivers +v0x27c32f0_0 .net *"_s66", 0 0, L_0x28226b0; 1 drivers +v0x27c3390_0 .net *"_s69", 0 0, L_0x2822980; 1 drivers +v0x27c3720_0 .net *"_s71", 0 0, L_0x2822a20; 1 drivers +v0x27c37a0_0 .net *"_s72", 0 0, L_0x2822270; 1 drivers +v0x27c34b0_0 .net *"_s75", 0 0, L_0x2822c40; 1 drivers +v0x27c3550_0 .net *"_s77", 0 0, L_0x2822b10; 1 drivers +v0x27c35f0_0 .net *"_s78", 0 0, L_0x2822d30; 1 drivers +v0x27c3690_0 .net *"_s81", 0 0, L_0x2823060; 1 drivers +v0x27c3b00_0 .net *"_s83", 0 0, L_0x2823100; 1 drivers +v0x27c3ba0_0 .net *"_s84", 0 0, L_0x2822fb0; 1 drivers +v0x27c3840_0 .net *"_s87", 0 0, L_0x28216b0; 1 drivers +v0x27c38e0_0 .net *"_s89", 0 0, L_0x28231f0; 1 drivers +v0x27c3980_0 .net *"_s9", 0 0, L_0x28206f0; 1 drivers +v0x27c3a20_0 .net *"_s90", 0 0, L_0x28232e0; 1 drivers +v0x27c3f10_0 .net *"_s93", 0 0, L_0x28238f0; 1 drivers +v0x27c3f90_0 .net *"_s95", 0 0, L_0x281f1b0; 1 drivers +v0x27c3c40_0 .net *"_s96", 0 0, L_0x2823810; 1 drivers +v0x27c3ce0_0 .net *"_s99", 0 0, L_0x2823da0; 1 drivers +v0x27c3d80_0 .alias "a", 31 0, v0x27ebf20_0; +v0x27c3e00_0 .alias "b", 31 0, v0x27ec5a0_0; +v0x27c3e80_0 .alias "out", 31 0, v0x27ecb40_0; +L_0x2820270 .part/pv L_0x2820310, 0, 1, 32; +L_0x28203c0 .part v0x27ecef0_0, 0, 1; +L_0x28204b0 .part v0x27be3e0_0, 0, 1; +L_0x28205a0 .part/pv L_0x2820640, 1, 1, 32; +L_0x28206f0 .part v0x27ecef0_0, 1, 1; +L_0x28207e0 .part v0x27be3e0_0, 1, 1; +L_0x28208d0 .part/pv L_0x2820a00, 2, 1, 32; +L_0x2820a60 .part v0x27ecef0_0, 2, 1; +L_0x2820ba0 .part v0x27be3e0_0, 2, 1; +L_0x2820c90 .part/pv L_0x2820d90, 3, 1, 32; +L_0x2820df0 .part v0x27ecef0_0, 3, 1; +L_0x2820ee0 .part v0x27be3e0_0, 3, 1; +L_0x2820fd0 .part/pv L_0x27bea70, 4, 1, 32; +L_0x2821070 .part v0x27ecef0_0, 4, 1; +L_0x2821110 .part v0x27be3e0_0, 4, 1; +L_0x28211b0 .part/pv L_0x28212e0, 5, 1, 32; +L_0x2821390 .part v0x27ecef0_0, 5, 1; +L_0x2821480 .part v0x27be3e0_0, 5, 1; +L_0x2821610 .part/pv L_0x2821250, 6, 1, 32; +L_0x28217c0 .part v0x27ecef0_0, 6, 1; +L_0x2821570 .part v0x27be3e0_0, 6, 1; +L_0x28219b0 .part/pv L_0x28218b0, 7, 1, 32; +L_0x2821b60 .part v0x27ecef0_0, 7, 1; +L_0x2821c50 .part v0x27be3e0_0, 7, 1; +L_0x2821a50 .part/pv L_0x2821e10, 8, 1, 32; +L_0x2821ec0 .part v0x27ecef0_0, 8, 1; +L_0x2821d40 .part v0x27be3e0_0, 8, 1; +L_0x28220e0 .part/pv L_0x2821fb0, 9, 1, 32; +L_0x28222d0 .part v0x27ecef0_0, 9, 1; +L_0x2822370 .part v0x27be3e0_0, 9, 1; +L_0x2822180 .part/pv L_0x2822560, 10, 1, 32; +L_0x28225c0 .part v0x27ecef0_0, 10, 1; +L_0x2822460 .part v0x27be3e0_0, 10, 1; +L_0x28227c0 .part/pv L_0x28226b0, 11, 1, 32; +L_0x2822980 .part v0x27ecef0_0, 11, 1; +L_0x2822a20 .part v0x27be3e0_0, 11, 1; +L_0x2822860 .part/pv L_0x2822270, 12, 1, 32; +L_0x2822c40 .part v0x27ecef0_0, 12, 1; +L_0x2822b10 .part v0x27be3e0_0, 12, 1; +L_0x2822e70 .part/pv L_0x2822d30, 13, 1, 32; +L_0x2823060 .part v0x27ecef0_0, 13, 1; +L_0x2823100 .part v0x27be3e0_0, 13, 1; +L_0x2822f10 .part/pv L_0x2822fb0, 14, 1, 32; +L_0x28216b0 .part v0x27ecef0_0, 14, 1; +L_0x28231f0 .part v0x27be3e0_0, 14, 1; +L_0x28236d0 .part/pv L_0x28232e0, 15, 1, 32; +L_0x28238f0 .part v0x27ecef0_0, 15, 1; +L_0x281f1b0 .part v0x27be3e0_0, 15, 1; +L_0x2823770 .part/pv L_0x2823810, 16, 1, 32; +L_0x2823da0 .part v0x27ecef0_0, 16, 1; +L_0x2823e40 .part v0x27be3e0_0, 16, 1; +L_0x2823f30 .part/pv L_0x281be60, 17, 1, 32; +L_0x2824180 .part v0x27ecef0_0, 17, 1; +L_0x2824220 .part v0x27be3e0_0, 17, 1; +L_0x2823fd0 .part/pv L_0x2824070, 18, 1, 32; +L_0x2824480 .part v0x27ecef0_0, 18, 1; +L_0x28242c0 .part v0x27be3e0_0, 18, 1; +L_0x28243b0 .part/pv L_0x2824700, 19, 1, 32; +L_0x281bf10 .part v0x27ecef0_0, 19, 1; +L_0x28248b0 .part v0x27be3e0_0, 19, 1; +L_0x2824520 .part/pv L_0x28245c0, 20, 1, 32; +L_0x2824b90 .part v0x27ecef0_0, 20, 1; +L_0x28249a0 .part v0x27be3e0_0, 20, 1; +L_0x2824a90 .part/pv L_0x2824b30, 21, 1, 32; +L_0x28247b0 .part v0x27ecef0_0, 21, 1; +L_0x2824fa0 .part v0x27be3e0_0, 21, 1; +L_0x2824c30 .part/pv L_0x2824cd0, 22, 1, 32; +L_0x2824d80 .part v0x27ecef0_0, 22, 1; +L_0x2825090 .part v0x27be3e0_0, 22, 1; +L_0x2825180 .part/pv L_0x2825220, 23, 1, 32; +L_0x2824e90 .part v0x27ecef0_0, 23, 1; +L_0x28256b0 .part v0x27be3e0_0, 23, 1; +L_0x2825300 .part/pv L_0x28253a0, 24, 1, 32; +L_0x2825450 .part v0x27ecef0_0, 24, 1; +L_0x2825a00 .part v0x27be3e0_0, 24, 1; +L_0x2825af0 .part/pv L_0x28257a0, 25, 1, 32; +L_0x2825930 .part v0x27ecef0_0, 25, 1; +L_0x2825e00 .part v0x27be3e0_0, 25, 1; +L_0x2825b90 .part/pv L_0x2825c30, 26, 1, 32; +L_0x2825ce0 .part v0x27ecef0_0, 26, 1; +L_0x2826130 .part v0x27be3e0_0, 26, 1; +L_0x2826220 .part/pv L_0x2825ea0, 27, 1, 32; +L_0x2825850 .part v0x27ecef0_0, 27, 1; +L_0x2826090 .part v0x27be3e0_0, 27, 1; +L_0x28262c0 .part/pv L_0x2826360, 28, 1, 32; +L_0x2826410 .part v0x27ecef0_0, 28, 1; +L_0x2826870 .part v0x27be3e0_0, 28, 1; +L_0x2826910 .part/pv L_0x28265b0, 29, 1, 32; +L_0x2825f50 .part v0x27ecef0_0, 29, 1; +L_0x2826760 .part v0x27be3e0_0, 29, 1; +L_0x2826c90 .part/pv L_0x27c1510, 30, 1, 32; +L_0x2823350 .part v0x27ecef0_0, 30, 1; +L_0x2823440 .part v0x27be3e0_0, 30, 1; +L_0x28269b0 .part/pv L_0x2826a50, 31, 1, 32; +L_0x2826660 .part v0x27ecef0_0, 31, 1; +L_0x2827440 .part v0x27be3e0_0, 31, 1; +S_0x27b1d50 .scope module, "slt0" "full_slt_32bit" 4 36, 7 37, S_0x27a11a0; + .timescale -9 -12; +v0x27be2e0_0 .net/s *"_s128", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x27be360_0 .alias "a", 31 0, v0x27ebf20_0; +v0x27be470_0 .alias "b", 31 0, v0x27ec5a0_0; +v0x27be580_0 .alias "out", 31 0, v0x27eca10_0; +v0x27be630_0 .net "slt0", 0 0, L_0x2827350; 1 drivers +v0x27be6b0_0 .net "slt1", 0 0, L_0x2827d20; 1 drivers +v0x27be730_0 .net "slt10", 0 0, L_0x282ae70; 1 drivers +v0x27be800_0 .net "slt11", 0 0, L_0x282b3c0; 1 drivers +v0x27be920_0 .net "slt12", 0 0, L_0x282b910; 1 drivers +v0x27be9f0_0 .net "slt13", 0 0, L_0x282be70; 1 drivers +v0x27bead0_0 .net "slt14", 0 0, L_0x282c3e0; 1 drivers +v0x27beba0_0 .net "slt15", 0 0, L_0x282c960; 1 drivers +v0x27bece0_0 .net "slt16", 0 0, L_0x2823c30; 1 drivers +v0x27bedb0_0 .net "slt17", 0 0, L_0x282d710; 1 drivers +v0x27bef00_0 .net "slt18", 0 0, L_0x282dc70; 1 drivers +v0x27befd0_0 .net "slt19", 0 0, L_0x282e1e0; 1 drivers +v0x27bee30_0 .net "slt2", 0 0, L_0x2828260; 1 drivers +v0x27bf180_0 .net "slt20", 0 0, L_0x282e760; 1 drivers +v0x27bf2a0_0 .net "slt21", 0 0, L_0x282ecf0; 1 drivers +v0x27bf370_0 .net "slt22", 0 0, L_0x282f240; 1 drivers +v0x27bf4a0_0 .net "slt23", 0 0, L_0x27f59f0; 1 drivers +v0x27bf520_0 .net "slt24", 0 0, L_0x2830520; 1 drivers +v0x27bf660_0 .net "slt25", 0 0, L_0x2830aa0; 1 drivers +v0x27bf6e0_0 .net "slt26", 0 0, L_0x27bf440; 1 drivers +v0x27bf830_0 .net "slt27", 0 0, L_0x2831570; 1 drivers +v0x27bf8b0_0 .net "slt28", 0 0, L_0x2831ac0; 1 drivers +v0x27bf7b0_0 .net "slt29", 0 0, L_0x2832020; 1 drivers +v0x27bfa60_0 .net "slt3", 0 0, L_0x28287a0; 1 drivers +v0x27bf980_0 .net "slt30", 0 0, L_0x2832590; 1 drivers +v0x27bfc20_0 .net "slt4", 0 0, L_0x2828d30; 1 drivers +v0x27bfb30_0 .net "slt5", 0 0, L_0x2829280; 1 drivers +v0x27bfdf0_0 .net "slt6", 0 0, L_0x28297d0; 1 drivers +v0x27bfcf0_0 .net "slt7", 0 0, L_0x2829d90; 1 drivers +v0x27bffd0_0 .net "slt8", 0 0, L_0x282a360; 1 drivers +v0x27bfec0_0 .net "slt9", 0 0, L_0x282a8e0; 1 drivers +L_0x2827840 .part v0x27ecef0_0, 0, 1; +L_0x2827930 .part v0x27be3e0_0, 0, 1; +L_0x2827dd0 .part v0x27ecef0_0, 1, 1; +L_0x2827ec0 .part v0x27be3e0_0, 1, 1; +L_0x2828310 .part v0x27ecef0_0, 2, 1; +L_0x2828400 .part v0x27be3e0_0, 2, 1; +L_0x2828850 .part v0x27ecef0_0, 3, 1; +L_0x2828940 .part v0x27be3e0_0, 3, 1; +L_0x2828de0 .part v0x27ecef0_0, 4, 1; +L_0x2828ed0 .part v0x27be3e0_0, 4, 1; +L_0x2829330 .part v0x27ecef0_0, 5, 1; +L_0x2829420 .part v0x27be3e0_0, 5, 1; +L_0x2829880 .part v0x27ecef0_0, 6, 1; +L_0x2829970 .part v0x27be3e0_0, 6, 1; +L_0x2829e40 .part v0x27ecef0_0, 7, 1; +L_0x2829f30 .part v0x27be3e0_0, 7, 1; +L_0x282a410 .part v0x27ecef0_0, 8, 1; +L_0x282a500 .part v0x27be3e0_0, 8, 1; +L_0x282a990 .part v0x27ecef0_0, 9, 1; +L_0x282aa80 .part v0x27be3e0_0, 9, 1; +L_0x282af20 .part v0x27ecef0_0, 10, 1; +L_0x282b010 .part v0x27be3e0_0, 10, 1; +L_0x282b470 .part v0x27ecef0_0, 11, 1; +L_0x282b560 .part v0x27be3e0_0, 11, 1; +L_0x282b9c0 .part v0x27ecef0_0, 12, 1; +L_0x282bab0 .part v0x27be3e0_0, 12, 1; +L_0x282bf20 .part v0x27ecef0_0, 13, 1; +L_0x282c010 .part v0x27be3e0_0, 13, 1; +L_0x282c490 .part v0x27ecef0_0, 14, 1; +L_0x282c580 .part v0x27be3e0_0, 14, 1; +L_0x282ca10 .part v0x27ecef0_0, 15, 1; +L_0x2823990 .part v0x27be3e0_0, 15, 1; +L_0x2823ce0 .part v0x27ecef0_0, 16, 1; +L_0x282d360 .part v0x27be3e0_0, 16, 1; +L_0x282d7c0 .part v0x27ecef0_0, 17, 1; +L_0x282d8b0 .part v0x27be3e0_0, 17, 1; +L_0x282dd20 .part v0x27ecef0_0, 18, 1; +L_0x282de10 .part v0x27be3e0_0, 18, 1; +L_0x282e290 .part v0x27ecef0_0, 19, 1; +L_0x282e380 .part v0x27be3e0_0, 19, 1; +L_0x282e810 .part v0x27ecef0_0, 20, 1; +L_0x282e900 .part v0x27be3e0_0, 20, 1; +L_0x282eda0 .part v0x27ecef0_0, 21, 1; +L_0x282ee90 .part v0x27be3e0_0, 21, 1; +L_0x282f2f0 .part v0x27ecef0_0, 22, 1; +L_0x282f3e0 .part v0x27be3e0_0, 22, 1; +L_0x27f5aa0 .part v0x27ecef0_0, 23, 1; +L_0x27f5b90 .part v0x27be3e0_0, 23, 1; +L_0x28305d0 .part v0x27ecef0_0, 24, 1; +L_0x28306c0 .part v0x27be3e0_0, 24, 1; +L_0x2830b50 .part v0x27ecef0_0, 25, 1; +L_0x2830c40 .part v0x27be3e0_0, 25, 1; +L_0x28310d0 .part v0x27ecef0_0, 26, 1; +L_0x28311c0 .part v0x27be3e0_0, 26, 1; +L_0x2831620 .part v0x27ecef0_0, 27, 1; +L_0x2831710 .part v0x27be3e0_0, 27, 1; +L_0x2831b70 .part v0x27ecef0_0, 28, 1; +L_0x2831c60 .part v0x27be3e0_0, 28, 1; +L_0x28320d0 .part v0x27ecef0_0, 29, 1; +L_0x28321c0 .part v0x27be3e0_0, 29, 1; +L_0x2832640 .part v0x27ecef0_0, 30, 1; +L_0x2832730 .part v0x27be3e0_0, 30, 1; +L_0x2832260 .part/pv C4<0000000000000000000000000000000>, 1, 31, 32; +L_0x2832cd0 .part/pv L_0x2832c20, 0, 1, 32; +L_0x28327d0 .part v0x27ecef0_0, 31, 1; +L_0x2832870 .part v0x27be3e0_0, 31, 1; +S_0x27bdd40 .scope module, "bit0" "single_slt" 7 74, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2826c10 .functor XOR 1, L_0x2827840, L_0x2827930, C4<0>, C4<0>; +L_0x2827140 .functor AND 1, L_0x2827930, L_0x2826c10, C4<1>, C4<1>; +L_0x2827240 .functor NOT 1, L_0x2826c10, C4<0>, C4<0>, C4<0>; +L_0x28272a0 .functor AND 1, L_0x2827240, C4<0>, C4<1>, C4<1>; +L_0x2827350 .functor OR 1, L_0x2827140, L_0x28272a0, C4<0>, C4<0>; +v0x27bde30_0 .net "a", 0 0, L_0x2827840; 1 drivers +v0x27bdef0_0 .net "abxor", 0 0, L_0x2826c10; 1 drivers +v0x27bdf90_0 .net "b", 0 0, L_0x2827930; 1 drivers +v0x27be010_0 .net "bxorand", 0 0, L_0x2827140; 1 drivers +v0x27be090_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x27be110_0 .alias "out", 0 0, v0x27be630_0; +v0x27be190_0 .net "xornot", 0 0, L_0x2827240; 1 drivers +v0x27be210_0 .net "xornotand", 0 0, L_0x28272a0; 1 drivers +S_0x27bd710 .scope module, "bit1" "single_slt" 7 75, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2827a20 .functor XOR 1, L_0x2827dd0, L_0x2827ec0, C4<0>, C4<0>; +L_0x2827a80 .functor AND 1, L_0x2827ec0, L_0x2827a20, C4<1>, C4<1>; +L_0x2827b80 .functor NOT 1, L_0x2827a20, C4<0>, C4<0>, C4<0>; +L_0x2827be0 .functor AND 1, L_0x2827b80, L_0x2827350, C4<1>, C4<1>; +L_0x2827d20 .functor OR 1, L_0x2827a80, L_0x2827be0, C4<0>, C4<0>; +v0x27bd800_0 .net "a", 0 0, L_0x2827dd0; 1 drivers +v0x27bd8c0_0 .net "abxor", 0 0, L_0x2827a20; 1 drivers +v0x27bd960_0 .net "b", 0 0, L_0x2827ec0; 1 drivers +v0x27bda00_0 .net "bxorand", 0 0, L_0x2827a80; 1 drivers +v0x27bdab0_0 .alias "defaultCompare", 0 0, v0x27be630_0; +v0x27bdb50_0 .alias "out", 0 0, v0x27be6b0_0; +v0x27bdbd0_0 .net "xornot", 0 0, L_0x2827b80; 1 drivers +v0x27bdc50_0 .net "xornotand", 0 0, L_0x2827be0; 1 drivers +S_0x27bd0e0 .scope module, "bit2" "single_slt" 7 76, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2827f60 .functor XOR 1, L_0x2828310, L_0x2828400, C4<0>, C4<0>; +L_0x2827fc0 .functor AND 1, L_0x2828400, L_0x2827f60, C4<1>, C4<1>; +L_0x28280c0 .functor NOT 1, L_0x2827f60, C4<0>, C4<0>, C4<0>; +L_0x2828120 .functor AND 1, L_0x28280c0, L_0x2827d20, C4<1>, C4<1>; +L_0x2828260 .functor OR 1, L_0x2827fc0, L_0x2828120, C4<0>, C4<0>; +v0x27bd1d0_0 .net "a", 0 0, L_0x2828310; 1 drivers +v0x27bd290_0 .net "abxor", 0 0, L_0x2827f60; 1 drivers +v0x27bd330_0 .net "b", 0 0, L_0x2828400; 1 drivers +v0x27bd3d0_0 .net "bxorand", 0 0, L_0x2827fc0; 1 drivers +v0x27bd480_0 .alias "defaultCompare", 0 0, v0x27be6b0_0; +v0x27bd520_0 .alias "out", 0 0, v0x27bee30_0; +v0x27bd5a0_0 .net "xornot", 0 0, L_0x28280c0; 1 drivers +v0x27bd620_0 .net "xornotand", 0 0, L_0x2828120; 1 drivers +S_0x27bcab0 .scope module, "bit3" "single_slt" 7 77, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x28284a0 .functor XOR 1, L_0x2828850, L_0x2828940, C4<0>, C4<0>; +L_0x2828500 .functor AND 1, L_0x2828940, L_0x28284a0, C4<1>, C4<1>; +L_0x2828600 .functor NOT 1, L_0x28284a0, C4<0>, C4<0>, C4<0>; +L_0x2828660 .functor AND 1, L_0x2828600, L_0x2828260, C4<1>, C4<1>; +L_0x28287a0 .functor OR 1, L_0x2828500, L_0x2828660, C4<0>, C4<0>; +v0x27bcba0_0 .net "a", 0 0, L_0x2828850; 1 drivers +v0x27bcc60_0 .net "abxor", 0 0, L_0x28284a0; 1 drivers +v0x27bcd00_0 .net "b", 0 0, L_0x2828940; 1 drivers +v0x27bcda0_0 .net "bxorand", 0 0, L_0x2828500; 1 drivers +v0x27bce50_0 .alias "defaultCompare", 0 0, v0x27bee30_0; +v0x27bcef0_0 .alias "out", 0 0, v0x27bfa60_0; +v0x27bcf70_0 .net "xornot", 0 0, L_0x2828600; 1 drivers +v0x27bcff0_0 .net "xornotand", 0 0, L_0x2828660; 1 drivers +S_0x27bc480 .scope module, "bit4" "single_slt" 7 78, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2828a30 .functor XOR 1, L_0x2828de0, L_0x2828ed0, C4<0>, C4<0>; +L_0x2828a90 .functor AND 1, L_0x2828ed0, L_0x2828a30, C4<1>, C4<1>; +L_0x2828b90 .functor NOT 1, L_0x2828a30, C4<0>, C4<0>, C4<0>; +L_0x2828bf0 .functor AND 1, L_0x2828b90, L_0x28287a0, C4<1>, C4<1>; +L_0x2828d30 .functor OR 1, L_0x2828a90, L_0x2828bf0, C4<0>, C4<0>; +v0x27bc570_0 .net "a", 0 0, L_0x2828de0; 1 drivers +v0x27bc630_0 .net "abxor", 0 0, L_0x2828a30; 1 drivers +v0x27bc6d0_0 .net "b", 0 0, L_0x2828ed0; 1 drivers +v0x27bc770_0 .net "bxorand", 0 0, L_0x2828a90; 1 drivers +v0x27bc820_0 .alias "defaultCompare", 0 0, v0x27bfa60_0; +v0x27bc8c0_0 .alias "out", 0 0, v0x27bfc20_0; +v0x27bc940_0 .net "xornot", 0 0, L_0x2828b90; 1 drivers +v0x27bc9c0_0 .net "xornotand", 0 0, L_0x2828bf0; 1 drivers +S_0x27bbe50 .scope module, "bit5" "single_slt" 7 79, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2828fd0 .functor XOR 1, L_0x2829330, L_0x2829420, C4<0>, C4<0>; +L_0x2829030 .functor AND 1, L_0x2829420, L_0x2828fd0, C4<1>, C4<1>; +L_0x28290e0 .functor NOT 1, L_0x2828fd0, C4<0>, C4<0>, C4<0>; +L_0x2829140 .functor AND 1, L_0x28290e0, L_0x2828d30, C4<1>, C4<1>; +L_0x2829280 .functor OR 1, L_0x2829030, L_0x2829140, C4<0>, C4<0>; +v0x27bbf40_0 .net "a", 0 0, L_0x2829330; 1 drivers +v0x27bc000_0 .net "abxor", 0 0, L_0x2828fd0; 1 drivers +v0x27bc0a0_0 .net "b", 0 0, L_0x2829420; 1 drivers +v0x27bc140_0 .net "bxorand", 0 0, L_0x2829030; 1 drivers +v0x27bc1f0_0 .alias "defaultCompare", 0 0, v0x27bfc20_0; +v0x27bc290_0 .alias "out", 0 0, v0x27bfb30_0; +v0x27bc310_0 .net "xornot", 0 0, L_0x28290e0; 1 drivers +v0x27bc390_0 .net "xornotand", 0 0, L_0x2829140; 1 drivers +S_0x27bb820 .scope module, "bit6" "single_slt" 7 80, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2828f70 .functor XOR 1, L_0x2829880, L_0x2829970, C4<0>, C4<0>; +L_0x2829530 .functor AND 1, L_0x2829970, L_0x2828f70, C4<1>, C4<1>; +L_0x2829630 .functor NOT 1, L_0x2828f70, C4<0>, C4<0>, C4<0>; +L_0x2829690 .functor AND 1, L_0x2829630, L_0x2829280, C4<1>, C4<1>; +L_0x28297d0 .functor OR 1, L_0x2829530, L_0x2829690, C4<0>, C4<0>; +v0x27bb910_0 .net "a", 0 0, L_0x2829880; 1 drivers +v0x27bb9d0_0 .net "abxor", 0 0, L_0x2828f70; 1 drivers +v0x27bba70_0 .net "b", 0 0, L_0x2829970; 1 drivers +v0x27bbb10_0 .net "bxorand", 0 0, L_0x2829530; 1 drivers +v0x27bbbc0_0 .alias "defaultCompare", 0 0, v0x27bfb30_0; +v0x27bbc60_0 .alias "out", 0 0, v0x27bfdf0_0; +v0x27bbce0_0 .net "xornot", 0 0, L_0x2829630; 1 drivers +v0x27bbd60_0 .net "xornotand", 0 0, L_0x2829690; 1 drivers +S_0x27bb1f0 .scope module, "bit7" "single_slt" 7 81, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2829a90 .functor XOR 1, L_0x2829e40, L_0x2829f30, C4<0>, C4<0>; +L_0x2829af0 .functor AND 1, L_0x2829f30, L_0x2829a90, C4<1>, C4<1>; +L_0x2829bf0 .functor NOT 1, L_0x2829a90, C4<0>, C4<0>, C4<0>; +L_0x2829c50 .functor AND 1, L_0x2829bf0, L_0x28297d0, C4<1>, C4<1>; +L_0x2829d90 .functor OR 1, L_0x2829af0, L_0x2829c50, C4<0>, C4<0>; +v0x27bb2e0_0 .net "a", 0 0, L_0x2829e40; 1 drivers +v0x27bb3a0_0 .net "abxor", 0 0, L_0x2829a90; 1 drivers +v0x27bb440_0 .net "b", 0 0, L_0x2829f30; 1 drivers +v0x27bb4e0_0 .net "bxorand", 0 0, L_0x2829af0; 1 drivers +v0x27bb590_0 .alias "defaultCompare", 0 0, v0x27bfdf0_0; +v0x27bb630_0 .alias "out", 0 0, v0x27bfcf0_0; +v0x27bb6b0_0 .net "xornot", 0 0, L_0x2829bf0; 1 drivers +v0x27bb730_0 .net "xornotand", 0 0, L_0x2829c50; 1 drivers +S_0x27babc0 .scope module, "bit8" "single_slt" 7 82, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282a060 .functor XOR 1, L_0x282a410, L_0x282a500, C4<0>, C4<0>; +L_0x282a0c0 .functor AND 1, L_0x282a500, L_0x282a060, C4<1>, C4<1>; +L_0x282a1c0 .functor NOT 1, L_0x282a060, C4<0>, C4<0>, C4<0>; +L_0x282a220 .functor AND 1, L_0x282a1c0, L_0x2829d90, C4<1>, C4<1>; +L_0x282a360 .functor OR 1, L_0x282a0c0, L_0x282a220, C4<0>, C4<0>; +v0x27bacb0_0 .net "a", 0 0, L_0x282a410; 1 drivers +v0x27bad70_0 .net "abxor", 0 0, L_0x282a060; 1 drivers +v0x27bae10_0 .net "b", 0 0, L_0x282a500; 1 drivers +v0x27baeb0_0 .net "bxorand", 0 0, L_0x282a0c0; 1 drivers +v0x27baf60_0 .alias "defaultCompare", 0 0, v0x27bfcf0_0; +v0x27bb000_0 .alias "out", 0 0, v0x27bffd0_0; +v0x27bb080_0 .net "xornot", 0 0, L_0x282a1c0; 1 drivers +v0x27bb100_0 .net "xornotand", 0 0, L_0x282a220; 1 drivers +S_0x27ba590 .scope module, "bit9" "single_slt" 7 83, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2829fd0 .functor XOR 1, L_0x282a990, L_0x282aa80, C4<0>, C4<0>; +L_0x282a640 .functor AND 1, L_0x282aa80, L_0x2829fd0, C4<1>, C4<1>; +L_0x282a740 .functor NOT 1, L_0x2829fd0, C4<0>, C4<0>, C4<0>; +L_0x282a7a0 .functor AND 1, L_0x282a740, L_0x282a360, C4<1>, C4<1>; +L_0x282a8e0 .functor OR 1, L_0x282a640, L_0x282a7a0, C4<0>, C4<0>; +v0x27ba680_0 .net "a", 0 0, L_0x282a990; 1 drivers +v0x27ba740_0 .net "abxor", 0 0, L_0x2829fd0; 1 drivers +v0x27ba7e0_0 .net "b", 0 0, L_0x282aa80; 1 drivers +v0x27ba880_0 .net "bxorand", 0 0, L_0x282a640; 1 drivers +v0x27ba930_0 .alias "defaultCompare", 0 0, v0x27bffd0_0; +v0x27ba9d0_0 .alias "out", 0 0, v0x27bfec0_0; +v0x27baa50_0 .net "xornot", 0 0, L_0x282a740; 1 drivers +v0x27baad0_0 .net "xornotand", 0 0, L_0x282a7a0; 1 drivers +S_0x27b9f60 .scope module, "bit10" "single_slt" 7 84, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282a5a0 .functor XOR 1, L_0x282af20, L_0x282b010, C4<0>, C4<0>; +L_0x282abd0 .functor AND 1, L_0x282b010, L_0x282a5a0, C4<1>, C4<1>; +L_0x282acd0 .functor NOT 1, L_0x282a5a0, C4<0>, C4<0>, C4<0>; +L_0x282ad30 .functor AND 1, L_0x282acd0, L_0x282a8e0, C4<1>, C4<1>; +L_0x282ae70 .functor OR 1, L_0x282abd0, L_0x282ad30, C4<0>, C4<0>; +v0x27ba050_0 .net "a", 0 0, L_0x282af20; 1 drivers +v0x27ba110_0 .net "abxor", 0 0, L_0x282a5a0; 1 drivers +v0x27ba1b0_0 .net "b", 0 0, L_0x282b010; 1 drivers +v0x27ba250_0 .net "bxorand", 0 0, L_0x282abd0; 1 drivers +v0x27ba300_0 .alias "defaultCompare", 0 0, v0x27bfec0_0; +v0x27ba3a0_0 .alias "out", 0 0, v0x27be730_0; +v0x27ba420_0 .net "xornot", 0 0, L_0x282acd0; 1 drivers +v0x27ba4a0_0 .net "xornotand", 0 0, L_0x282ad30; 1 drivers +S_0x27b9930 .scope module, "bit11" "single_slt" 7 85, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282ab20 .functor XOR 1, L_0x282b470, L_0x282b560, C4<0>, C4<0>; +L_0x282b170 .functor AND 1, L_0x282b560, L_0x282ab20, C4<1>, C4<1>; +L_0x282b220 .functor NOT 1, L_0x282ab20, C4<0>, C4<0>, C4<0>; +L_0x282b280 .functor AND 1, L_0x282b220, L_0x282ae70, C4<1>, C4<1>; +L_0x282b3c0 .functor OR 1, L_0x282b170, L_0x282b280, C4<0>, C4<0>; +v0x27b9a20_0 .net "a", 0 0, L_0x282b470; 1 drivers +v0x27b9ae0_0 .net "abxor", 0 0, L_0x282ab20; 1 drivers +v0x27b9b80_0 .net "b", 0 0, L_0x282b560; 1 drivers +v0x27b9c20_0 .net "bxorand", 0 0, L_0x282b170; 1 drivers +v0x27b9cd0_0 .alias "defaultCompare", 0 0, v0x27be730_0; +v0x27b9d70_0 .alias "out", 0 0, v0x27be800_0; +v0x27b9df0_0 .net "xornot", 0 0, L_0x282b220; 1 drivers +v0x27b9e70_0 .net "xornotand", 0 0, L_0x282b280; 1 drivers +S_0x27b9300 .scope module, "bit12" "single_slt" 7 86, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282b0b0 .functor XOR 1, L_0x282b9c0, L_0x282bab0, C4<0>, C4<0>; +L_0x282b110 .functor AND 1, L_0x282bab0, L_0x282b0b0, C4<1>, C4<1>; +L_0x282b770 .functor NOT 1, L_0x282b0b0, C4<0>, C4<0>, C4<0>; +L_0x282b7d0 .functor AND 1, L_0x282b770, L_0x282b3c0, C4<1>, C4<1>; +L_0x282b910 .functor OR 1, L_0x282b110, L_0x282b7d0, C4<0>, C4<0>; +v0x27b93f0_0 .net "a", 0 0, L_0x282b9c0; 1 drivers +v0x27b94b0_0 .net "abxor", 0 0, L_0x282b0b0; 1 drivers +v0x27b9550_0 .net "b", 0 0, L_0x282bab0; 1 drivers +v0x27b95f0_0 .net "bxorand", 0 0, L_0x282b110; 1 drivers +v0x27b96a0_0 .alias "defaultCompare", 0 0, v0x27be800_0; +v0x27b9740_0 .alias "out", 0 0, v0x27be920_0; +v0x27b97c0_0 .net "xornot", 0 0, L_0x282b770; 1 drivers +v0x27b9840_0 .net "xornotand", 0 0, L_0x282b7d0; 1 drivers +S_0x27b8cd0 .scope module, "bit13" "single_slt" 7 87, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282b600 .functor XOR 1, L_0x282bf20, L_0x282c010, C4<0>, C4<0>; +L_0x282b660 .functor AND 1, L_0x282c010, L_0x282b600, C4<1>, C4<1>; +L_0x282bcd0 .functor NOT 1, L_0x282b600, C4<0>, C4<0>, C4<0>; +L_0x282bd30 .functor AND 1, L_0x282bcd0, L_0x282b910, C4<1>, C4<1>; +L_0x282be70 .functor OR 1, L_0x282b660, L_0x282bd30, C4<0>, C4<0>; +v0x27b8dc0_0 .net "a", 0 0, L_0x282bf20; 1 drivers +v0x27b8e80_0 .net "abxor", 0 0, L_0x282b600; 1 drivers +v0x27b8f20_0 .net "b", 0 0, L_0x282c010; 1 drivers +v0x27b8fc0_0 .net "bxorand", 0 0, L_0x282b660; 1 drivers +v0x27b9070_0 .alias "defaultCompare", 0 0, v0x27be920_0; +v0x27b9110_0 .alias "out", 0 0, v0x27be9f0_0; +v0x27b9190_0 .net "xornot", 0 0, L_0x282bcd0; 1 drivers +v0x27b9210_0 .net "xornotand", 0 0, L_0x282bd30; 1 drivers +S_0x27b86a0 .scope module, "bit14" "single_slt" 7 88, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282bb50 .functor XOR 1, L_0x282c490, L_0x282c580, C4<0>, C4<0>; +L_0x282bbb0 .functor AND 1, L_0x282c580, L_0x282bb50, C4<1>, C4<1>; +L_0x282c240 .functor NOT 1, L_0x282bb50, C4<0>, C4<0>, C4<0>; +L_0x282c2a0 .functor AND 1, L_0x282c240, L_0x282be70, C4<1>, C4<1>; +L_0x282c3e0 .functor OR 1, L_0x282bbb0, L_0x282c2a0, C4<0>, C4<0>; +v0x27b8790_0 .net "a", 0 0, L_0x282c490; 1 drivers +v0x27b8850_0 .net "abxor", 0 0, L_0x282bb50; 1 drivers +v0x27b88f0_0 .net "b", 0 0, L_0x282c580; 1 drivers +v0x27b8990_0 .net "bxorand", 0 0, L_0x282bbb0; 1 drivers +v0x27b8a40_0 .alias "defaultCompare", 0 0, v0x27be9f0_0; +v0x27b8ae0_0 .alias "out", 0 0, v0x27bead0_0; +v0x27b8b60_0 .net "xornot", 0 0, L_0x282c240; 1 drivers +v0x27b8be0_0 .net "xornotand", 0 0, L_0x282c2a0; 1 drivers +S_0x27b8070 .scope module, "bit15" "single_slt" 7 89, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282c0b0 .functor XOR 1, L_0x282ca10, L_0x2823990, C4<0>, C4<0>; +L_0x282c110 .functor AND 1, L_0x2823990, L_0x282c0b0, C4<1>, C4<1>; +L_0x282c7c0 .functor NOT 1, L_0x282c0b0, C4<0>, C4<0>, C4<0>; +L_0x282c820 .functor AND 1, L_0x282c7c0, L_0x282c3e0, C4<1>, C4<1>; +L_0x282c960 .functor OR 1, L_0x282c110, L_0x282c820, C4<0>, C4<0>; +v0x27b8160_0 .net "a", 0 0, L_0x282ca10; 1 drivers +v0x27b8220_0 .net "abxor", 0 0, L_0x282c0b0; 1 drivers +v0x27b82c0_0 .net "b", 0 0, L_0x2823990; 1 drivers +v0x27b8360_0 .net "bxorand", 0 0, L_0x282c110; 1 drivers +v0x27b8410_0 .alias "defaultCompare", 0 0, v0x27bead0_0; +v0x27b84b0_0 .alias "out", 0 0, v0x27beba0_0; +v0x27b8530_0 .net "xornot", 0 0, L_0x282c7c0; 1 drivers +v0x27b85b0_0 .net "xornotand", 0 0, L_0x282c820; 1 drivers +S_0x27b7a40 .scope module, "bit16" "single_slt" 7 90, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x27a0ed0 .functor XOR 1, L_0x2823ce0, L_0x282d360, C4<0>, C4<0>; +L_0x28294c0 .functor AND 1, L_0x282d360, L_0x27a0ed0, C4<1>, C4<1>; +L_0x282c670 .functor NOT 1, L_0x27a0ed0, C4<0>, C4<0>, C4<0>; +L_0x2823b40 .functor AND 1, L_0x282c670, L_0x282c960, C4<1>, C4<1>; +L_0x2823c30 .functor OR 1, L_0x28294c0, L_0x2823b40, C4<0>, C4<0>; +v0x27b7b30_0 .net "a", 0 0, L_0x2823ce0; 1 drivers +v0x27b7bf0_0 .net "abxor", 0 0, L_0x27a0ed0; 1 drivers +v0x27b7c90_0 .net "b", 0 0, L_0x282d360; 1 drivers +v0x27b7d30_0 .net "bxorand", 0 0, L_0x28294c0; 1 drivers +v0x27b7de0_0 .alias "defaultCompare", 0 0, v0x27beba0_0; +v0x27b7e80_0 .alias "out", 0 0, v0x27bece0_0; +v0x27b7f00_0 .net "xornot", 0 0, L_0x282c670; 1 drivers +v0x27b7f80_0 .net "xornotand", 0 0, L_0x2823b40; 1 drivers +S_0x27b7410 .scope module, "bit17" "single_slt" 7 91, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2823a30 .functor XOR 1, L_0x282d7c0, L_0x282d8b0, C4<0>, C4<0>; +L_0x2823a90 .functor AND 1, L_0x282d8b0, L_0x2823a30, C4<1>, C4<1>; +L_0x282d570 .functor NOT 1, L_0x2823a30, C4<0>, C4<0>, C4<0>; +L_0x282d5d0 .functor AND 1, L_0x282d570, L_0x2823c30, C4<1>, C4<1>; +L_0x282d710 .functor OR 1, L_0x2823a90, L_0x282d5d0, C4<0>, C4<0>; +v0x27b7500_0 .net "a", 0 0, L_0x282d7c0; 1 drivers +v0x27b75c0_0 .net "abxor", 0 0, L_0x2823a30; 1 drivers +v0x27b7660_0 .net "b", 0 0, L_0x282d8b0; 1 drivers +v0x27b7700_0 .net "bxorand", 0 0, L_0x2823a90; 1 drivers +v0x27b77b0_0 .alias "defaultCompare", 0 0, v0x27bece0_0; +v0x27b7850_0 .alias "out", 0 0, v0x27bedb0_0; +v0x27b78d0_0 .net "xornot", 0 0, L_0x282d570; 1 drivers +v0x27b7950_0 .net "xornotand", 0 0, L_0x282d5d0; 1 drivers +S_0x27b6de0 .scope module, "bit18" "single_slt" 7 92, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282d400 .functor XOR 1, L_0x282dd20, L_0x282de10, C4<0>, C4<0>; +L_0x282d460 .functor AND 1, L_0x282de10, L_0x282d400, C4<1>, C4<1>; +L_0x282dad0 .functor NOT 1, L_0x282d400, C4<0>, C4<0>, C4<0>; +L_0x282db30 .functor AND 1, L_0x282dad0, L_0x282d710, C4<1>, C4<1>; +L_0x282dc70 .functor OR 1, L_0x282d460, L_0x282db30, C4<0>, C4<0>; +v0x27b6ed0_0 .net "a", 0 0, L_0x282dd20; 1 drivers +v0x27b6f90_0 .net "abxor", 0 0, L_0x282d400; 1 drivers +v0x27b7030_0 .net "b", 0 0, L_0x282de10; 1 drivers +v0x27b70d0_0 .net "bxorand", 0 0, L_0x282d460; 1 drivers +v0x27b7180_0 .alias "defaultCompare", 0 0, v0x27bedb0_0; +v0x27b7220_0 .alias "out", 0 0, v0x27bef00_0; +v0x27b72a0_0 .net "xornot", 0 0, L_0x282dad0; 1 drivers +v0x27b7320_0 .net "xornotand", 0 0, L_0x282db30; 1 drivers +S_0x27b67b0 .scope module, "bit19" "single_slt" 7 93, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282d950 .functor XOR 1, L_0x282e290, L_0x282e380, C4<0>, C4<0>; +L_0x282d9b0 .functor AND 1, L_0x282e380, L_0x282d950, C4<1>, C4<1>; +L_0x282e040 .functor NOT 1, L_0x282d950, C4<0>, C4<0>, C4<0>; +L_0x282e0a0 .functor AND 1, L_0x282e040, L_0x282dc70, C4<1>, C4<1>; +L_0x282e1e0 .functor OR 1, L_0x282d9b0, L_0x282e0a0, C4<0>, C4<0>; +v0x27b68a0_0 .net "a", 0 0, L_0x282e290; 1 drivers +v0x27b6960_0 .net "abxor", 0 0, L_0x282d950; 1 drivers +v0x27b6a00_0 .net "b", 0 0, L_0x282e380; 1 drivers +v0x27b6aa0_0 .net "bxorand", 0 0, L_0x282d9b0; 1 drivers +v0x27b6b50_0 .alias "defaultCompare", 0 0, v0x27bef00_0; +v0x27b6bf0_0 .alias "out", 0 0, v0x27befd0_0; +v0x27b6c70_0 .net "xornot", 0 0, L_0x282e040; 1 drivers +v0x27b6cf0_0 .net "xornotand", 0 0, L_0x282e0a0; 1 drivers +S_0x27b6180 .scope module, "bit20" "single_slt" 7 94, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282deb0 .functor XOR 1, L_0x282e810, L_0x282e900, C4<0>, C4<0>; +L_0x282df10 .functor AND 1, L_0x282e900, L_0x282deb0, C4<1>, C4<1>; +L_0x282e5c0 .functor NOT 1, L_0x282deb0, C4<0>, C4<0>, C4<0>; +L_0x282e620 .functor AND 1, L_0x282e5c0, L_0x282e1e0, C4<1>, C4<1>; +L_0x282e760 .functor OR 1, L_0x282df10, L_0x282e620, C4<0>, C4<0>; +v0x27b6270_0 .net "a", 0 0, L_0x282e810; 1 drivers +v0x27b6330_0 .net "abxor", 0 0, L_0x282deb0; 1 drivers +v0x27b63d0_0 .net "b", 0 0, L_0x282e900; 1 drivers +v0x27b6470_0 .net "bxorand", 0 0, L_0x282df10; 1 drivers +v0x27b6520_0 .alias "defaultCompare", 0 0, v0x27befd0_0; +v0x27b65c0_0 .alias "out", 0 0, v0x27bf180_0; +v0x27b6640_0 .net "xornot", 0 0, L_0x282e5c0; 1 drivers +v0x27b66c0_0 .net "xornotand", 0 0, L_0x282e620; 1 drivers +S_0x27b5b50 .scope module, "bit21" "single_slt" 7 95, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282e420 .functor XOR 1, L_0x282eda0, L_0x282ee90, C4<0>, C4<0>; +L_0x282e480 .functor AND 1, L_0x282ee90, L_0x282e420, C4<1>, C4<1>; +L_0x282eb50 .functor NOT 1, L_0x282e420, C4<0>, C4<0>, C4<0>; +L_0x282ebb0 .functor AND 1, L_0x282eb50, L_0x282e760, C4<1>, C4<1>; +L_0x282ecf0 .functor OR 1, L_0x282e480, L_0x282ebb0, C4<0>, C4<0>; +v0x27b5c40_0 .net "a", 0 0, L_0x282eda0; 1 drivers +v0x27b5d00_0 .net "abxor", 0 0, L_0x282e420; 1 drivers +v0x27b5da0_0 .net "b", 0 0, L_0x282ee90; 1 drivers +v0x27b5e40_0 .net "bxorand", 0 0, L_0x282e480; 1 drivers +v0x27b5ef0_0 .alias "defaultCompare", 0 0, v0x27bf180_0; +v0x27b5f90_0 .alias "out", 0 0, v0x27bf2a0_0; +v0x27b6010_0 .net "xornot", 0 0, L_0x282eb50; 1 drivers +v0x27b6090_0 .net "xornotand", 0 0, L_0x282ebb0; 1 drivers +S_0x27b5520 .scope module, "bit22" "single_slt" 7 96, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282e9a0 .functor XOR 1, L_0x282f2f0, L_0x282f3e0, C4<0>, C4<0>; +L_0x282ea00 .functor AND 1, L_0x282f3e0, L_0x282e9a0, C4<1>, C4<1>; +L_0x282f0a0 .functor NOT 1, L_0x282e9a0, C4<0>, C4<0>, C4<0>; +L_0x282f100 .functor AND 1, L_0x282f0a0, L_0x282ecf0, C4<1>, C4<1>; +L_0x282f240 .functor OR 1, L_0x282ea00, L_0x282f100, C4<0>, C4<0>; +v0x27b5610_0 .net "a", 0 0, L_0x282f2f0; 1 drivers +v0x27b56d0_0 .net "abxor", 0 0, L_0x282e9a0; 1 drivers +v0x27b5770_0 .net "b", 0 0, L_0x282f3e0; 1 drivers +v0x27b5810_0 .net "bxorand", 0 0, L_0x282ea00; 1 drivers +v0x27b58c0_0 .alias "defaultCompare", 0 0, v0x27bf2a0_0; +v0x27b5960_0 .alias "out", 0 0, v0x27bf370_0; +v0x27b59e0_0 .net "xornot", 0 0, L_0x282f0a0; 1 drivers +v0x27b5a60_0 .net "xornotand", 0 0, L_0x282f100; 1 drivers +S_0x27b4ef0 .scope module, "bit23" "single_slt" 7 97, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x282ef30 .functor XOR 1, L_0x27f5aa0, L_0x27f5b90, C4<0>, C4<0>; +L_0x282ef90 .functor AND 1, L_0x27f5b90, L_0x282ef30, C4<1>, C4<1>; +L_0x27f5850 .functor NOT 1, L_0x282ef30, C4<0>, C4<0>, C4<0>; +L_0x27f58b0 .functor AND 1, L_0x27f5850, L_0x282f240, C4<1>, C4<1>; +L_0x27f59f0 .functor OR 1, L_0x282ef90, L_0x27f58b0, C4<0>, C4<0>; +v0x27b4fe0_0 .net "a", 0 0, L_0x27f5aa0; 1 drivers +v0x27b50a0_0 .net "abxor", 0 0, L_0x282ef30; 1 drivers +v0x27b5140_0 .net "b", 0 0, L_0x27f5b90; 1 drivers +v0x27b51e0_0 .net "bxorand", 0 0, L_0x282ef90; 1 drivers +v0x27b5290_0 .alias "defaultCompare", 0 0, v0x27bf370_0; +v0x27b5330_0 .alias "out", 0 0, v0x27bf4a0_0; +v0x27b53b0_0 .net "xornot", 0 0, L_0x27f5850; 1 drivers +v0x27b5430_0 .net "xornotand", 0 0, L_0x27f58b0; 1 drivers +S_0x27b48c0 .scope module, "bit24" "single_slt" 7 98, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x27f5dc0 .functor XOR 1, L_0x28305d0, L_0x28306c0, C4<0>, C4<0>; +L_0x27f5e20 .functor AND 1, L_0x28306c0, L_0x27f5dc0, C4<1>, C4<1>; +L_0x27f5720 .functor NOT 1, L_0x27f5dc0, C4<0>, C4<0>, C4<0>; +L_0x27f5780 .functor AND 1, L_0x27f5720, L_0x27f59f0, C4<1>, C4<1>; +L_0x2830520 .functor OR 1, L_0x27f5e20, L_0x27f5780, C4<0>, C4<0>; +v0x27b49b0_0 .net "a", 0 0, L_0x28305d0; 1 drivers +v0x27b4a70_0 .net "abxor", 0 0, L_0x27f5dc0; 1 drivers +v0x27b4b10_0 .net "b", 0 0, L_0x28306c0; 1 drivers +v0x27b4bb0_0 .net "bxorand", 0 0, L_0x27f5e20; 1 drivers +v0x27b4c60_0 .alias "defaultCompare", 0 0, v0x27bf4a0_0; +v0x27b4d00_0 .alias "out", 0 0, v0x27bf520_0; +v0x27b4d80_0 .net "xornot", 0 0, L_0x27f5720; 1 drivers +v0x27b4e00_0 .net "xornotand", 0 0, L_0x27f5780; 1 drivers +S_0x27b4290 .scope module, "bit25" "single_slt" 7 99, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x27f5c30 .functor XOR 1, L_0x2830b50, L_0x2830c40, C4<0>, C4<0>; +L_0x27f5c90 .functor AND 1, L_0x2830c40, L_0x27f5c30, C4<1>, C4<1>; +L_0x2830900 .functor NOT 1, L_0x27f5c30, C4<0>, C4<0>, C4<0>; +L_0x2830960 .functor AND 1, L_0x2830900, L_0x2830520, C4<1>, C4<1>; +L_0x2830aa0 .functor OR 1, L_0x27f5c90, L_0x2830960, C4<0>, C4<0>; +v0x27b4380_0 .net "a", 0 0, L_0x2830b50; 1 drivers +v0x27b4440_0 .net "abxor", 0 0, L_0x27f5c30; 1 drivers +v0x27b44e0_0 .net "b", 0 0, L_0x2830c40; 1 drivers +v0x27b4580_0 .net "bxorand", 0 0, L_0x27f5c90; 1 drivers +v0x27b4630_0 .alias "defaultCompare", 0 0, v0x27bf520_0; +v0x27b46d0_0 .alias "out", 0 0, v0x27bf660_0; +v0x27b4750_0 .net "xornot", 0 0, L_0x2830900; 1 drivers +v0x27b47d0_0 .net "xornotand", 0 0, L_0x2830960; 1 drivers +S_0x27b3c60 .scope module, "bit26" "single_slt" 7 100, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2830760 .functor XOR 1, L_0x28310d0, L_0x28311c0, C4<0>, C4<0>; +L_0x28307c0 .functor AND 1, L_0x28311c0, L_0x2830760, C4<1>, C4<1>; +L_0x2830e90 .functor NOT 1, L_0x2830760, C4<0>, C4<0>, C4<0>; +L_0x2830ef0 .functor AND 1, L_0x2830e90, L_0x2830aa0, C4<1>, C4<1>; +L_0x27bf440 .functor OR 1, L_0x28307c0, L_0x2830ef0, C4<0>, C4<0>; +v0x27b3d50_0 .net "a", 0 0, L_0x28310d0; 1 drivers +v0x27b3e10_0 .net "abxor", 0 0, L_0x2830760; 1 drivers +v0x27b3eb0_0 .net "b", 0 0, L_0x28311c0; 1 drivers +v0x27b3f50_0 .net "bxorand", 0 0, L_0x28307c0; 1 drivers +v0x27b4000_0 .alias "defaultCompare", 0 0, v0x27bf660_0; +v0x27b40a0_0 .alias "out", 0 0, v0x27bf6e0_0; +v0x27b4120_0 .net "xornot", 0 0, L_0x2830e90; 1 drivers +v0x27b41a0_0 .net "xornotand", 0 0, L_0x2830ef0; 1 drivers +S_0x27b3630 .scope module, "bit27" "single_slt" 7 101, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2830ce0 .functor XOR 1, L_0x2831620, L_0x2831710, C4<0>, C4<0>; +L_0x2830d40 .functor AND 1, L_0x2831710, L_0x2830ce0, C4<1>, C4<1>; +L_0x2831420 .functor NOT 1, L_0x2830ce0, C4<0>, C4<0>, C4<0>; +L_0x2831480 .functor AND 1, L_0x2831420, L_0x27bf440, C4<1>, C4<1>; +L_0x2831570 .functor OR 1, L_0x2830d40, L_0x2831480, C4<0>, C4<0>; +v0x27b3720_0 .net "a", 0 0, L_0x2831620; 1 drivers +v0x27b37e0_0 .net "abxor", 0 0, L_0x2830ce0; 1 drivers +v0x27b3880_0 .net "b", 0 0, L_0x2831710; 1 drivers +v0x27b3920_0 .net "bxorand", 0 0, L_0x2830d40; 1 drivers +v0x27b39d0_0 .alias "defaultCompare", 0 0, v0x27bf6e0_0; +v0x27b3a70_0 .alias "out", 0 0, v0x27bf830_0; +v0x27b3af0_0 .net "xornot", 0 0, L_0x2831420; 1 drivers +v0x27b3b70_0 .net "xornotand", 0 0, L_0x2831480; 1 drivers +S_0x27b3030 .scope module, "bit28" "single_slt" 7 102, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2831260 .functor XOR 1, L_0x2831b70, L_0x2831c60, C4<0>, C4<0>; +L_0x28312c0 .functor AND 1, L_0x2831c60, L_0x2831260, C4<1>, C4<1>; +L_0x28313c0 .functor NOT 1, L_0x2831260, C4<0>, C4<0>, C4<0>; +L_0x2831980 .functor AND 1, L_0x28313c0, L_0x2831570, C4<1>, C4<1>; +L_0x2831ac0 .functor OR 1, L_0x28312c0, L_0x2831980, C4<0>, C4<0>; +v0x27b3120_0 .net "a", 0 0, L_0x2831b70; 1 drivers +v0x27b31e0_0 .net "abxor", 0 0, L_0x2831260; 1 drivers +v0x27b3280_0 .net "b", 0 0, L_0x2831c60; 1 drivers +v0x27b3320_0 .net "bxorand", 0 0, L_0x28312c0; 1 drivers +v0x27b33a0_0 .alias "defaultCompare", 0 0, v0x27bf830_0; +v0x27b3440_0 .alias "out", 0 0, v0x27bf8b0_0; +v0x27b34c0_0 .net "xornot", 0 0, L_0x28313c0; 1 drivers +v0x27b3540_0 .net "xornotand", 0 0, L_0x2831980; 1 drivers +S_0x27b2a30 .scope module, "bit29" "single_slt" 7 103, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x28317b0 .functor XOR 1, L_0x28320d0, L_0x28321c0, C4<0>, C4<0>; +L_0x2831810 .functor AND 1, L_0x28321c0, L_0x28317b0, C4<1>, C4<1>; +L_0x2831910 .functor NOT 1, L_0x28317b0, C4<0>, C4<0>, C4<0>; +L_0x2831ee0 .functor AND 1, L_0x2831910, L_0x2831ac0, C4<1>, C4<1>; +L_0x2832020 .functor OR 1, L_0x2831810, L_0x2831ee0, C4<0>, C4<0>; +v0x27b2b20_0 .net "a", 0 0, L_0x28320d0; 1 drivers +v0x27b2be0_0 .net "abxor", 0 0, L_0x28317b0; 1 drivers +v0x27b2c80_0 .net "b", 0 0, L_0x28321c0; 1 drivers +v0x27b2d20_0 .net "bxorand", 0 0, L_0x2831810; 1 drivers +v0x27b2da0_0 .alias "defaultCompare", 0 0, v0x27bf8b0_0; +v0x27b2e40_0 .alias "out", 0 0, v0x27bf7b0_0; +v0x27b2ec0_0 .net "xornot", 0 0, L_0x2831910; 1 drivers +v0x27b2f40_0 .net "xornotand", 0 0, L_0x2831ee0; 1 drivers +S_0x27b2430 .scope module, "bit30" "single_slt" 7 104, 7 1, S_0x27b1d50; + .timescale -9 -12; +L_0x2831d00 .functor XOR 1, L_0x2832640, L_0x2832730, C4<0>, C4<0>; +L_0x2831d60 .functor AND 1, L_0x2832730, L_0x2831d00, C4<1>, C4<1>; +L_0x2831e60 .functor NOT 1, L_0x2831d00, C4<0>, C4<0>, C4<0>; +L_0x2832450 .functor AND 1, L_0x2831e60, L_0x2832020, C4<1>, C4<1>; +L_0x2832590 .functor OR 1, L_0x2831d60, L_0x2832450, C4<0>, C4<0>; +v0x27b2520_0 .net "a", 0 0, L_0x2832640; 1 drivers +v0x27b25e0_0 .net "abxor", 0 0, L_0x2831d00; 1 drivers +v0x27b2680_0 .net "b", 0 0, L_0x2832730; 1 drivers +v0x27b2720_0 .net "bxorand", 0 0, L_0x2831d60; 1 drivers +v0x27b27a0_0 .alias "defaultCompare", 0 0, v0x27bf7b0_0; +v0x27b2840_0 .alias "out", 0 0, v0x27bf980_0; +v0x27b28c0_0 .net "xornot", 0 0, L_0x2831e60; 1 drivers +v0x27b2940_0 .net "xornotand", 0 0, L_0x2832450; 1 drivers +S_0x27b1e40 .scope module, "bit31" "single_slt_reversed" 7 106, 7 19, S_0x27b1d50; + .timescale -9 -12; +L_0x28323a0 .functor XOR 1, L_0x28327d0, L_0x2832870, C4<0>, C4<0>; +L_0x28329d0 .functor AND 1, L_0x28327d0, L_0x28323a0, C4<1>, C4<1>; +L_0x2832a80 .functor NOT 1, L_0x28323a0, C4<0>, C4<0>, C4<0>; +L_0x2832ae0 .functor AND 1, L_0x2832a80, L_0x2832590, C4<1>, C4<1>; +L_0x2832c20 .functor OR 1, L_0x28329d0, L_0x2832ae0, C4<0>, C4<0>; +v0x27b1f30_0 .net "a", 0 0, L_0x28327d0; 1 drivers +v0x27b1ff0_0 .net "abxor", 0 0, L_0x28323a0; 1 drivers +v0x27b2090_0 .net "axorand", 0 0, L_0x28329d0; 1 drivers +v0x27b2130_0 .net "b", 0 0, L_0x2832870; 1 drivers +v0x27b21b0_0 .alias "defaultCompare", 0 0, v0x27bf980_0; +v0x27b2250_0 .net "out", 0 0, L_0x2832c20; 1 drivers +v0x27b22f0_0 .net "xornot", 0 0, L_0x2832a80; 1 drivers +v0x27b2390_0 .net "xornotand", 0 0, L_0x2832ae0; 1 drivers +S_0x27adb00 .scope module, "and0" "and_32bit" 4 37, 8 1, S_0x27a11a0; + .timescale -9 -12; +L_0x2833080 .functor AND 1, L_0x2833130, L_0x2833220, C4<1>, C4<1>; +L_0x28333b0 .functor AND 1, L_0x2833460, L_0x2833550, C4<1>, C4<1>; +L_0x2833770 .functor AND 1, L_0x28337d0, L_0x2833910, C4<1>, C4<1>; +L_0x2833b00 .functor AND 1, L_0x2833b60, L_0x2833c50, C4<1>, C4<1>; +L_0x2833aa0 .functor AND 1, L_0x2833ea0, L_0x2834010, C4<1>, C4<1>; +L_0x2834230 .functor AND 1, L_0x28342e0, L_0x28343d0, C4<1>, C4<1>; +L_0x28341a0 .functor AND 1, L_0x2834710, L_0x28344c0, C4<1>, C4<1>; +L_0x2834800 .functor AND 1, L_0x2834ab0, L_0x2834ba0, C4<1>, C4<1>; +L_0x2834d60 .functor AND 1, L_0x2834e10, L_0x2834c90, C4<1>, C4<1>; +L_0x2834f00 .functor AND 1, L_0x2835220, L_0x28352c0, C4<1>, C4<1>; +L_0x28354b0 .functor AND 1, L_0x2835510, L_0x28353b0, C4<1>, C4<1>; +L_0x2835600 .functor AND 1, L_0x28358d0, L_0x2835970, C4<1>, C4<1>; +L_0x28351c0 .functor AND 1, L_0x2835b90, L_0x2835a60, C4<1>, C4<1>; +L_0x2835c80 .functor AND 1, L_0x2835fb0, L_0x2836050, C4<1>, C4<1>; +L_0x2835f00 .functor AND 1, L_0x2834600, L_0x2836140, C4<1>, C4<1>; +L_0x2836230 .functor AND 1, L_0x2836840, L_0x28368e0, C4<1>, C4<1>; +L_0x2836760 .functor AND 1, L_0x2836b60, L_0x28369d0, C4<1>, C4<1>; +L_0x2836e00 .functor AND 1, L_0x2836f50, L_0x2836ff0, C4<1>, C4<1>; +L_0x2836cf0 .functor AND 1, L_0x28372a0, L_0x28370e0, C4<1>, C4<1>; +L_0x2837520 .functor AND 1, L_0x2836eb0, L_0x28376d0, C4<1>, C4<1>; +L_0x28373e0 .functor AND 1, L_0x28379b0, L_0x28377c0, C4<1>, C4<1>; +L_0x2837950 .functor AND 1, L_0x28375d0, L_0x2837dc0, C4<1>, C4<1>; +L_0x2837af0 .functor AND 1, L_0x2837ba0, L_0x2837eb0, C4<1>, C4<1>; +L_0x2838040 .functor AND 1, L_0x2837cb0, L_0x28384d0, C4<1>, C4<1>; +L_0x28381c0 .functor AND 1, L_0x2838270, L_0x2838820, C4<1>, C4<1>; +L_0x28385c0 .functor AND 1, L_0x2838750, L_0x2838c20, C4<1>, C4<1>; +L_0x2838a50 .functor AND 1, L_0x2838b00, L_0x2838f50, C4<1>, C4<1>; +L_0x2838cc0 .functor AND 1, L_0x2838670, L_0x2838eb0, C4<1>, C4<1>; +L_0x2839180 .functor AND 1, L_0x2839230, L_0x2839690, C4<1>, C4<1>; +L_0x28393d0 .functor AND 1, L_0x2838d70, L_0x2839580, C4<1>, C4<1>; +L_0x27aef10 .functor AND 1, L_0x28362a0, L_0x2836390, C4<1>, C4<1>; +L_0x2839870 .functor AND 1, L_0x2839480, L_0x283a260, C4<1>, C4<1>; +v0x27adbf0_0 .net *"_s0", 0 0, L_0x2833080; 1 drivers +v0x27adc90_0 .net *"_s101", 0 0, L_0x28369d0; 1 drivers +v0x27add30_0 .net *"_s102", 0 0, L_0x2836e00; 1 drivers +v0x27addd0_0 .net *"_s105", 0 0, L_0x2836f50; 1 drivers +v0x27ade50_0 .net *"_s107", 0 0, L_0x2836ff0; 1 drivers +v0x27adef0_0 .net *"_s108", 0 0, L_0x2836cf0; 1 drivers +v0x27adf90_0 .net *"_s11", 0 0, L_0x2833550; 1 drivers +v0x27ae030_0 .net *"_s111", 0 0, L_0x28372a0; 1 drivers +v0x27ae120_0 .net *"_s113", 0 0, L_0x28370e0; 1 drivers +v0x27ae1c0_0 .net *"_s114", 0 0, L_0x2837520; 1 drivers +v0x27ae260_0 .net *"_s117", 0 0, L_0x2836eb0; 1 drivers +v0x27ae300_0 .net *"_s119", 0 0, L_0x28376d0; 1 drivers +v0x27ae3a0_0 .net *"_s12", 0 0, L_0x2833770; 1 drivers +v0x27ae440_0 .net *"_s120", 0 0, L_0x28373e0; 1 drivers +v0x27ae560_0 .net *"_s123", 0 0, L_0x28379b0; 1 drivers +v0x27ae600_0 .net *"_s125", 0 0, L_0x28377c0; 1 drivers +v0x27ae4c0_0 .net *"_s126", 0 0, L_0x2837950; 1 drivers +v0x27ae750_0 .net *"_s129", 0 0, L_0x28375d0; 1 drivers +v0x27ae870_0 .net *"_s131", 0 0, L_0x2837dc0; 1 drivers +v0x27ae8f0_0 .net *"_s132", 0 0, L_0x2837af0; 1 drivers +v0x27ae7d0_0 .net *"_s135", 0 0, L_0x2837ba0; 1 drivers +v0x27aea20_0 .net *"_s137", 0 0, L_0x2837eb0; 1 drivers +v0x27ae970_0 .net *"_s138", 0 0, L_0x2838040; 1 drivers +v0x27aeb60_0 .net *"_s141", 0 0, L_0x2837cb0; 1 drivers +v0x27aeac0_0 .net *"_s143", 0 0, L_0x28384d0; 1 drivers +v0x27aecb0_0 .net *"_s144", 0 0, L_0x28381c0; 1 drivers +v0x27aec00_0 .net *"_s147", 0 0, L_0x2838270; 1 drivers +v0x27aee10_0 .net *"_s149", 0 0, L_0x2838820; 1 drivers +v0x27aed50_0 .net *"_s15", 0 0, L_0x28337d0; 1 drivers +v0x27aef80_0 .net *"_s150", 0 0, L_0x28385c0; 1 drivers +v0x27aee90_0 .net *"_s153", 0 0, L_0x2838750; 1 drivers +v0x27af100_0 .net *"_s155", 0 0, L_0x2838c20; 1 drivers +v0x27af000_0 .net *"_s156", 0 0, L_0x2838a50; 1 drivers +v0x27af290_0 .net *"_s159", 0 0, L_0x2838b00; 1 drivers +v0x27af180_0 .net *"_s161", 0 0, L_0x2838f50; 1 drivers +v0x27af430_0 .net *"_s162", 0 0, L_0x2838cc0; 1 drivers +v0x27af310_0 .net *"_s165", 0 0, L_0x2838670; 1 drivers +v0x27af3b0_0 .net *"_s167", 0 0, L_0x2838eb0; 1 drivers +v0x27af5f0_0 .net *"_s168", 0 0, L_0x2839180; 1 drivers +v0x27af670_0 .net *"_s17", 0 0, L_0x2833910; 1 drivers +v0x27af4b0_0 .net *"_s171", 0 0, L_0x2839230; 1 drivers +v0x27af550_0 .net *"_s173", 0 0, L_0x2839690; 1 drivers +v0x27af850_0 .net *"_s174", 0 0, L_0x28393d0; 1 drivers +v0x27af8d0_0 .net *"_s177", 0 0, L_0x2838d70; 1 drivers +v0x27af6f0_0 .net *"_s179", 0 0, L_0x2839580; 1 drivers +v0x27af790_0 .net *"_s18", 0 0, L_0x2833b00; 1 drivers +v0x27afad0_0 .net *"_s180", 0 0, L_0x27aef10; 1 drivers +v0x27afb50_0 .net *"_s183", 0 0, L_0x28362a0; 1 drivers +v0x27af970_0 .net *"_s185", 0 0, L_0x2836390; 1 drivers +v0x27afa10_0 .net *"_s186", 0 0, L_0x2839870; 1 drivers +v0x27afd70_0 .net *"_s189", 0 0, L_0x2839480; 1 drivers +v0x27afdf0_0 .net *"_s191", 0 0, L_0x283a260; 1 drivers +v0x27afbf0_0 .net *"_s21", 0 0, L_0x2833b60; 1 drivers +v0x27afc90_0 .net *"_s23", 0 0, L_0x2833c50; 1 drivers +v0x27b0030_0 .net *"_s24", 0 0, L_0x2833aa0; 1 drivers +v0x27b00b0_0 .net *"_s27", 0 0, L_0x2833ea0; 1 drivers +v0x27afe70_0 .net *"_s29", 0 0, L_0x2834010; 1 drivers +v0x27aff10_0 .net *"_s3", 0 0, L_0x2833130; 1 drivers +v0x27affb0_0 .net *"_s30", 0 0, L_0x2834230; 1 drivers +v0x27b0330_0 .net *"_s33", 0 0, L_0x28342e0; 1 drivers +v0x27b0150_0 .net *"_s35", 0 0, L_0x28343d0; 1 drivers +v0x27b01f0_0 .net *"_s36", 0 0, L_0x28341a0; 1 drivers +v0x27b0290_0 .net *"_s39", 0 0, L_0x2834710; 1 drivers +v0x27b05d0_0 .net *"_s41", 0 0, L_0x28344c0; 1 drivers +v0x27b03d0_0 .net *"_s42", 0 0, L_0x2834800; 1 drivers +v0x27b0470_0 .net *"_s45", 0 0, L_0x2834ab0; 1 drivers +v0x27b0510_0 .net *"_s47", 0 0, L_0x2834ba0; 1 drivers +v0x27b0870_0 .net *"_s48", 0 0, L_0x2834d60; 1 drivers +v0x27b0670_0 .net *"_s5", 0 0, L_0x2833220; 1 drivers +v0x27b0710_0 .net *"_s51", 0 0, L_0x2834e10; 1 drivers +v0x27b07b0_0 .net *"_s53", 0 0, L_0x2834c90; 1 drivers +v0x27b0b30_0 .net *"_s54", 0 0, L_0x2834f00; 1 drivers +v0x27b08f0_0 .net *"_s57", 0 0, L_0x2835220; 1 drivers +v0x27b0990_0 .net *"_s59", 0 0, L_0x28352c0; 1 drivers +v0x27b0a30_0 .net *"_s6", 0 0, L_0x28333b0; 1 drivers +v0x27b0e10_0 .net *"_s60", 0 0, L_0x28354b0; 1 drivers +v0x27b0bb0_0 .net *"_s63", 0 0, L_0x2835510; 1 drivers +v0x27b0c50_0 .net *"_s65", 0 0, L_0x28353b0; 1 drivers +v0x27b0cf0_0 .net *"_s66", 0 0, L_0x2835600; 1 drivers +v0x27b0d90_0 .net *"_s69", 0 0, L_0x28358d0; 1 drivers +v0x27b1120_0 .net *"_s71", 0 0, L_0x2835970; 1 drivers +v0x27b11a0_0 .net *"_s72", 0 0, L_0x28351c0; 1 drivers +v0x27b0eb0_0 .net *"_s75", 0 0, L_0x2835b90; 1 drivers +v0x27b0f50_0 .net *"_s77", 0 0, L_0x2835a60; 1 drivers +v0x27b0ff0_0 .net *"_s78", 0 0, L_0x2835c80; 1 drivers +v0x27b1090_0 .net *"_s81", 0 0, L_0x2835fb0; 1 drivers +v0x27b1500_0 .net *"_s83", 0 0, L_0x2836050; 1 drivers +v0x27b15a0_0 .net *"_s84", 0 0, L_0x2835f00; 1 drivers +v0x27b1240_0 .net *"_s87", 0 0, L_0x2834600; 1 drivers +v0x27b12e0_0 .net *"_s89", 0 0, L_0x2836140; 1 drivers +v0x27b1380_0 .net *"_s9", 0 0, L_0x2833460; 1 drivers +v0x27b1420_0 .net *"_s90", 0 0, L_0x2836230; 1 drivers +v0x27b1910_0 .net *"_s93", 0 0, L_0x2836840; 1 drivers +v0x27b1990_0 .net *"_s95", 0 0, L_0x28368e0; 1 drivers +v0x27b1640_0 .net *"_s96", 0 0, L_0x2836760; 1 drivers +v0x27b16e0_0 .net *"_s99", 0 0, L_0x2836b60; 1 drivers +v0x27b1780_0 .alias "a", 31 0, v0x27ebf20_0; +v0x27b1800_0 .alias "b", 31 0, v0x27ec5a0_0; +v0x27b1880_0 .alias "out", 31 0, v0x27ec520_0; +L_0x2832fe0 .part/pv L_0x2833080, 0, 1, 32; +L_0x2833130 .part v0x27ecef0_0, 0, 1; +L_0x2833220 .part v0x27be3e0_0, 0, 1; +L_0x2833310 .part/pv L_0x28333b0, 1, 1, 32; +L_0x2833460 .part v0x27ecef0_0, 1, 1; +L_0x2833550 .part v0x27be3e0_0, 1, 1; +L_0x2833640 .part/pv L_0x2833770, 2, 1, 32; +L_0x28337d0 .part v0x27ecef0_0, 2, 1; +L_0x2833910 .part v0x27be3e0_0, 2, 1; +L_0x2833a00 .part/pv L_0x2833b00, 3, 1, 32; +L_0x2833b60 .part v0x27ecef0_0, 3, 1; +L_0x2833c50 .part v0x27be3e0_0, 3, 1; +L_0x2833db0 .part/pv L_0x2833aa0, 4, 1, 32; +L_0x2833ea0 .part v0x27ecef0_0, 4, 1; +L_0x2834010 .part v0x27be3e0_0, 4, 1; +L_0x2834100 .part/pv L_0x2834230, 5, 1, 32; +L_0x28342e0 .part v0x27ecef0_0, 5, 1; +L_0x28343d0 .part v0x27be3e0_0, 5, 1; +L_0x2834560 .part/pv L_0x28341a0, 6, 1, 32; +L_0x2834710 .part v0x27ecef0_0, 6, 1; +L_0x28344c0 .part v0x27be3e0_0, 6, 1; +L_0x2834900 .part/pv L_0x2834800, 7, 1, 32; +L_0x2834ab0 .part v0x27ecef0_0, 7, 1; +L_0x2834ba0 .part v0x27be3e0_0, 7, 1; +L_0x28349a0 .part/pv L_0x2834d60, 8, 1, 32; +L_0x2834e10 .part v0x27ecef0_0, 8, 1; +L_0x2834c90 .part v0x27be3e0_0, 8, 1; +L_0x2835030 .part/pv L_0x2834f00, 9, 1, 32; +L_0x2835220 .part v0x27ecef0_0, 9, 1; +L_0x28352c0 .part v0x27be3e0_0, 9, 1; +L_0x28350d0 .part/pv L_0x28354b0, 10, 1, 32; +L_0x2835510 .part v0x27ecef0_0, 10, 1; +L_0x28353b0 .part v0x27be3e0_0, 10, 1; +L_0x2835710 .part/pv L_0x2835600, 11, 1, 32; +L_0x28358d0 .part v0x27ecef0_0, 11, 1; +L_0x2835970 .part v0x27be3e0_0, 11, 1; +L_0x28357b0 .part/pv L_0x28351c0, 12, 1, 32; +L_0x2835b90 .part v0x27ecef0_0, 12, 1; +L_0x2835a60 .part v0x27be3e0_0, 12, 1; +L_0x2835dc0 .part/pv L_0x2835c80, 13, 1, 32; +L_0x2835fb0 .part v0x27ecef0_0, 13, 1; +L_0x2836050 .part v0x27be3e0_0, 13, 1; +L_0x2835e60 .part/pv L_0x2835f00, 14, 1, 32; +L_0x2834600 .part v0x27ecef0_0, 14, 1; +L_0x2836140 .part v0x27be3e0_0, 14, 1; +L_0x2836620 .part/pv L_0x2836230, 15, 1, 32; +L_0x2836840 .part v0x27ecef0_0, 15, 1; +L_0x28368e0 .part v0x27be3e0_0, 15, 1; +L_0x28366c0 .part/pv L_0x2836760, 16, 1, 32; +L_0x2836b60 .part v0x27ecef0_0, 16, 1; +L_0x28369d0 .part v0x27be3e0_0, 16, 1; +L_0x2836ac0 .part/pv L_0x2836e00, 17, 1, 32; +L_0x2836f50 .part v0x27ecef0_0, 17, 1; +L_0x2836ff0 .part v0x27be3e0_0, 17, 1; +L_0x2836c50 .part/pv L_0x2836cf0, 18, 1, 32; +L_0x28372a0 .part v0x27ecef0_0, 18, 1; +L_0x28370e0 .part v0x27be3e0_0, 18, 1; +L_0x28371d0 .part/pv L_0x2837520, 19, 1, 32; +L_0x2836eb0 .part v0x27ecef0_0, 19, 1; +L_0x28376d0 .part v0x27be3e0_0, 19, 1; +L_0x2837340 .part/pv L_0x28373e0, 20, 1, 32; +L_0x28379b0 .part v0x27ecef0_0, 20, 1; +L_0x28377c0 .part v0x27be3e0_0, 20, 1; +L_0x28378b0 .part/pv L_0x2837950, 21, 1, 32; +L_0x28375d0 .part v0x27ecef0_0, 21, 1; +L_0x2837dc0 .part v0x27be3e0_0, 21, 1; +L_0x2837a50 .part/pv L_0x2837af0, 22, 1, 32; +L_0x2837ba0 .part v0x27ecef0_0, 22, 1; +L_0x2837eb0 .part v0x27be3e0_0, 22, 1; +L_0x2837fa0 .part/pv L_0x2838040, 23, 1, 32; +L_0x2837cb0 .part v0x27ecef0_0, 23, 1; +L_0x28384d0 .part v0x27be3e0_0, 23, 1; +L_0x2838120 .part/pv L_0x28381c0, 24, 1, 32; +L_0x2838270 .part v0x27ecef0_0, 24, 1; +L_0x2838820 .part v0x27be3e0_0, 24, 1; +L_0x2838910 .part/pv L_0x28385c0, 25, 1, 32; +L_0x2838750 .part v0x27ecef0_0, 25, 1; +L_0x2838c20 .part v0x27be3e0_0, 25, 1; +L_0x28389b0 .part/pv L_0x2838a50, 26, 1, 32; +L_0x2838b00 .part v0x27ecef0_0, 26, 1; +L_0x2838f50 .part v0x27be3e0_0, 26, 1; +L_0x2839040 .part/pv L_0x2838cc0, 27, 1, 32; +L_0x2838670 .part v0x27ecef0_0, 27, 1; +L_0x2838eb0 .part v0x27be3e0_0, 27, 1; +L_0x28390e0 .part/pv L_0x2839180, 28, 1, 32; +L_0x2839230 .part v0x27ecef0_0, 28, 1; +L_0x2839690 .part v0x27be3e0_0, 28, 1; +L_0x2839730 .part/pv L_0x28393d0, 29, 1, 32; +L_0x2838d70 .part v0x27ecef0_0, 29, 1; +L_0x2839580 .part v0x27be3e0_0, 29, 1; +L_0x2839ab0 .part/pv L_0x27aef10, 30, 1, 32; +L_0x28362a0 .part v0x27ecef0_0, 30, 1; +L_0x2836390 .part v0x27be3e0_0, 30, 1; +L_0x28397d0 .part/pv L_0x2839870, 31, 1, 32; +L_0x2839480 .part v0x27ecef0_0, 31, 1; +L_0x283a260 .part v0x27be3e0_0, 31, 1; +S_0x27a9870 .scope module, "nand0" "nand_32bit" 4 38, 9 1, S_0x27a11a0; + .timescale -9 -12; +L_0x283a050 .functor NAND 1, L_0x283a100, L_0x283a610, C4<1>, C4<1>; +L_0x2833f90 .functor NAND 1, L_0x283a750, L_0x283a840, C4<1>, C4<1>; +L_0x283aa60 .functor NAND 1, L_0x283aac0, L_0x283ac00, C4<1>, C4<1>; +L_0x283adf0 .functor NAND 1, L_0x283ae50, L_0x283af40, C4<1>, C4<1>; +L_0x283ad90 .functor NAND 1, L_0x283b190, L_0x283b300, C4<1>, C4<1>; +L_0x283b520 .functor NAND 1, L_0x283b5d0, L_0x283b6c0, C4<1>, C4<1>; +L_0x283b490 .functor NAND 1, L_0x283ba00, L_0x283b7b0, C4<1>, C4<1>; +L_0x283baf0 .functor NAND 1, L_0x283bda0, L_0x283be90, C4<1>, C4<1>; +L_0x283c050 .functor NAND 1, L_0x283c100, L_0x283bf80, C4<1>, C4<1>; +L_0x283c1f0 .functor NAND 1, L_0x283c510, L_0x283c5b0, C4<1>, C4<1>; +L_0x283c7a0 .functor NAND 1, L_0x283c800, L_0x283c6a0, C4<1>, C4<1>; +L_0x283c8f0 .functor NAND 1, L_0x283cbc0, L_0x283cc60, C4<1>, C4<1>; +L_0x283c4b0 .functor NAND 1, L_0x283ce80, L_0x283cd50, C4<1>, C4<1>; +L_0x283cf70 .functor NAND 1, L_0x283d2a0, L_0x283d340, C4<1>, C4<1>; +L_0x283d1f0 .functor NAND 1, L_0x283b8f0, L_0x283d430, C4<1>, C4<1>; +L_0x283d520 .functor NAND 1, L_0x283db30, L_0x282cb00, C4<1>, C4<1>; +L_0x283da50 .functor NAND 1, L_0x282cd80, L_0x282cbf0, C4<1>, C4<1>; +L_0x283b030 .functor NAND 1, L_0x282d0c0, L_0x282d1b0, C4<1>, C4<1>; +L_0x282cf10 .functor NAND 1, L_0x283eda0, L_0x283ebe0, C4<1>, C4<1>; +L_0x282d2a0 .functor NAND 1, L_0x282d020, L_0x283f120, C4<1>, C4<1>; +L_0x283eee0 .functor NAND 1, L_0x283f400, L_0x283f210, C4<1>, C4<1>; +L_0x283f3a0 .functor NAND 1, L_0x283efe0, L_0x283f7c0, C4<1>, C4<1>; +L_0x283f540 .functor NAND 1, L_0x283f5f0, L_0x283f8b0, C4<1>, C4<1>; +L_0x283fa40 .functor NAND 1, L_0x283f700, L_0x283fed0, C4<1>, C4<1>; +L_0x283fbc0 .functor NAND 1, L_0x283fc70, L_0x2840220, C4<1>, C4<1>; +L_0x283ffc0 .functor NAND 1, L_0x2840150, L_0x2840620, C4<1>, C4<1>; +L_0x2840450 .functor NAND 1, L_0x2840500, L_0x2840950, C4<1>, C4<1>; +L_0x28406c0 .functor NAND 1, L_0x2840070, L_0x28408b0, C4<1>, C4<1>; +L_0x2840b80 .functor NAND 1, L_0x2840c30, L_0x2841090, C4<1>, C4<1>; +L_0x2840dd0 .functor NAND 1, L_0x2840770, L_0x2840f80, C4<1>, C4<1>; +L_0x27ebac0 .functor NAND 1, L_0x283d590, L_0x283d680, C4<1>, C4<1>; +L_0x2841270 .functor NAND 1, L_0x2840e80, L_0x2841c60, C4<1>, C4<1>; +v0x27a9960_0 .net *"_s0", 0 0, L_0x283a050; 1 drivers +v0x27a9a00_0 .net *"_s101", 0 0, L_0x282cbf0; 1 drivers +v0x27a9aa0_0 .net *"_s102", 0 0, L_0x283b030; 1 drivers +v0x27a9b40_0 .net *"_s105", 0 0, L_0x282d0c0; 1 drivers +v0x27a9bf0_0 .net *"_s107", 0 0, L_0x282d1b0; 1 drivers +v0x27a9c90_0 .net *"_s108", 0 0, L_0x282cf10; 1 drivers +v0x27a9d30_0 .net *"_s11", 0 0, L_0x283a840; 1 drivers +v0x27a9dd0_0 .net *"_s111", 0 0, L_0x283eda0; 1 drivers +v0x27a9e70_0 .net *"_s113", 0 0, L_0x283ebe0; 1 drivers +v0x27a9f10_0 .net *"_s114", 0 0, L_0x282d2a0; 1 drivers +v0x27a9fb0_0 .net *"_s117", 0 0, L_0x282d020; 1 drivers +v0x27aa050_0 .net *"_s119", 0 0, L_0x283f120; 1 drivers +v0x27aa0f0_0 .net *"_s12", 0 0, L_0x283aa60; 1 drivers +v0x27aa190_0 .net *"_s120", 0 0, L_0x283eee0; 1 drivers +v0x27aa2b0_0 .net *"_s123", 0 0, L_0x283f400; 1 drivers +v0x27aa350_0 .net *"_s125", 0 0, L_0x283f210; 1 drivers +v0x27aa210_0 .net *"_s126", 0 0, L_0x283f3a0; 1 drivers +v0x27aa4a0_0 .net *"_s129", 0 0, L_0x283efe0; 1 drivers +v0x27aa5c0_0 .net *"_s131", 0 0, L_0x283f7c0; 1 drivers +v0x27aa640_0 .net *"_s132", 0 0, L_0x283f540; 1 drivers +v0x27aa520_0 .net *"_s135", 0 0, L_0x283f5f0; 1 drivers +v0x27aa770_0 .net *"_s137", 0 0, L_0x283f8b0; 1 drivers +v0x27aa6c0_0 .net *"_s138", 0 0, L_0x283fa40; 1 drivers +v0x27aa8b0_0 .net *"_s141", 0 0, L_0x283f700; 1 drivers +v0x27aa810_0 .net *"_s143", 0 0, L_0x283fed0; 1 drivers +v0x27aaa00_0 .net *"_s144", 0 0, L_0x283fbc0; 1 drivers +v0x27aa950_0 .net *"_s147", 0 0, L_0x283fc70; 1 drivers +v0x27aab60_0 .net *"_s149", 0 0, L_0x2840220; 1 drivers +v0x27aaaa0_0 .net *"_s15", 0 0, L_0x283aac0; 1 drivers +v0x27aacd0_0 .net *"_s150", 0 0, L_0x283ffc0; 1 drivers +v0x27aabe0_0 .net *"_s153", 0 0, L_0x2840150; 1 drivers +v0x27aae50_0 .net *"_s155", 0 0, L_0x2840620; 1 drivers +v0x27aad50_0 .net *"_s156", 0 0, L_0x2840450; 1 drivers +v0x27aafe0_0 .net *"_s159", 0 0, L_0x2840500; 1 drivers +v0x27aaed0_0 .net *"_s161", 0 0, L_0x2840950; 1 drivers +v0x27ab180_0 .net *"_s162", 0 0, L_0x28406c0; 1 drivers +v0x27ab060_0 .net *"_s165", 0 0, L_0x2840070; 1 drivers +v0x27ab100_0 .net *"_s167", 0 0, L_0x28408b0; 1 drivers +v0x27ab340_0 .net *"_s168", 0 0, L_0x2840b80; 1 drivers +v0x27ab3c0_0 .net *"_s17", 0 0, L_0x283ac00; 1 drivers +v0x27ab200_0 .net *"_s171", 0 0, L_0x2840c30; 1 drivers +v0x27ab2a0_0 .net *"_s173", 0 0, L_0x2841090; 1 drivers +v0x27ab5a0_0 .net *"_s174", 0 0, L_0x2840dd0; 1 drivers +v0x27ab620_0 .net *"_s177", 0 0, L_0x2840770; 1 drivers +v0x27ab440_0 .net *"_s179", 0 0, L_0x2840f80; 1 drivers +v0x27ab4e0_0 .net *"_s18", 0 0, L_0x283adf0; 1 drivers +v0x27ab820_0 .net *"_s180", 0 0, L_0x27ebac0; 1 drivers +v0x27ab8a0_0 .net *"_s183", 0 0, L_0x283d590; 1 drivers +v0x27ab6c0_0 .net *"_s185", 0 0, L_0x283d680; 1 drivers +v0x27ab760_0 .net *"_s186", 0 0, L_0x2841270; 1 drivers +v0x27abac0_0 .net *"_s189", 0 0, L_0x2840e80; 1 drivers +v0x27abb40_0 .net *"_s191", 0 0, L_0x2841c60; 1 drivers +v0x27ab940_0 .net *"_s21", 0 0, L_0x283ae50; 1 drivers +v0x27ab9e0_0 .net *"_s23", 0 0, L_0x283af40; 1 drivers +v0x27abd80_0 .net *"_s24", 0 0, L_0x283ad90; 1 drivers +v0x27abe00_0 .net *"_s27", 0 0, L_0x283b190; 1 drivers +v0x27abbc0_0 .net *"_s29", 0 0, L_0x283b300; 1 drivers +v0x27abc60_0 .net *"_s3", 0 0, L_0x283a100; 1 drivers +v0x27abd00_0 .net *"_s30", 0 0, L_0x283b520; 1 drivers +v0x27ac080_0 .net *"_s33", 0 0, L_0x283b5d0; 1 drivers +v0x27abea0_0 .net *"_s35", 0 0, L_0x283b6c0; 1 drivers +v0x27abf40_0 .net *"_s36", 0 0, L_0x283b490; 1 drivers +v0x27abfe0_0 .net *"_s39", 0 0, L_0x283ba00; 1 drivers +v0x27ac320_0 .net *"_s41", 0 0, L_0x283b7b0; 1 drivers +v0x27ac120_0 .net *"_s42", 0 0, L_0x283baf0; 1 drivers +v0x27ac1c0_0 .net *"_s45", 0 0, L_0x283bda0; 1 drivers +v0x27ac260_0 .net *"_s47", 0 0, L_0x283be90; 1 drivers +v0x27ac5c0_0 .net *"_s48", 0 0, L_0x283c050; 1 drivers +v0x27ac3c0_0 .net *"_s5", 0 0, L_0x283a610; 1 drivers +v0x27ac460_0 .net *"_s51", 0 0, L_0x283c100; 1 drivers +v0x27ac500_0 .net *"_s53", 0 0, L_0x283bf80; 1 drivers +v0x27ac880_0 .net *"_s54", 0 0, L_0x283c1f0; 1 drivers +v0x27ac640_0 .net *"_s57", 0 0, L_0x283c510; 1 drivers +v0x27ac6e0_0 .net *"_s59", 0 0, L_0x283c5b0; 1 drivers +v0x27ac780_0 .net *"_s6", 0 0, L_0x2833f90; 1 drivers +v0x27acb60_0 .net *"_s60", 0 0, L_0x283c7a0; 1 drivers +v0x27ac900_0 .net *"_s63", 0 0, L_0x283c800; 1 drivers +v0x27ac9a0_0 .net *"_s65", 0 0, L_0x283c6a0; 1 drivers +v0x27aca40_0 .net *"_s66", 0 0, L_0x283c8f0; 1 drivers +v0x27acae0_0 .net *"_s69", 0 0, L_0x283cbc0; 1 drivers +v0x27ace70_0 .net *"_s71", 0 0, L_0x283cc60; 1 drivers +v0x27acef0_0 .net *"_s72", 0 0, L_0x283c4b0; 1 drivers +v0x27acc00_0 .net *"_s75", 0 0, L_0x283ce80; 1 drivers +v0x27acca0_0 .net *"_s77", 0 0, L_0x283cd50; 1 drivers +v0x27acd40_0 .net *"_s78", 0 0, L_0x283cf70; 1 drivers +v0x27acde0_0 .net *"_s81", 0 0, L_0x283d2a0; 1 drivers +v0x27ad250_0 .net *"_s83", 0 0, L_0x283d340; 1 drivers +v0x27ad2f0_0 .net *"_s84", 0 0, L_0x283d1f0; 1 drivers +v0x27acf90_0 .net *"_s87", 0 0, L_0x283b8f0; 1 drivers +v0x27ad030_0 .net *"_s89", 0 0, L_0x283d430; 1 drivers +v0x27ad0d0_0 .net *"_s9", 0 0, L_0x283a750; 1 drivers +v0x27ad170_0 .net *"_s90", 0 0, L_0x283d520; 1 drivers +v0x27ad660_0 .net *"_s93", 0 0, L_0x283db30; 1 drivers +v0x27ad6e0_0 .net *"_s95", 0 0, L_0x282cb00; 1 drivers +v0x27ad390_0 .net *"_s96", 0 0, L_0x283da50; 1 drivers +v0x27ad430_0 .net *"_s99", 0 0, L_0x282cd80; 1 drivers +v0x27ad4d0_0 .alias "a", 31 0, v0x27ebf20_0; +v0x27ad550_0 .alias "b", 31 0, v0x27ec5a0_0; +v0x27ada80_0 .alias "out", 31 0, v0x27ec830_0; +L_0x2839f60 .part/pv L_0x283a050, 0, 1, 32; +L_0x283a100 .part v0x27ecef0_0, 0, 1; +L_0x283a610 .part v0x27be3e0_0, 0, 1; +L_0x283a6b0 .part/pv L_0x2833f90, 1, 1, 32; +L_0x283a750 .part v0x27ecef0_0, 1, 1; +L_0x283a840 .part v0x27be3e0_0, 1, 1; +L_0x283a930 .part/pv L_0x283aa60, 2, 1, 32; +L_0x283aac0 .part v0x27ecef0_0, 2, 1; +L_0x283ac00 .part v0x27be3e0_0, 2, 1; +L_0x283acf0 .part/pv L_0x283adf0, 3, 1, 32; +L_0x283ae50 .part v0x27ecef0_0, 3, 1; +L_0x283af40 .part v0x27be3e0_0, 3, 1; +L_0x283b0a0 .part/pv L_0x283ad90, 4, 1, 32; +L_0x283b190 .part v0x27ecef0_0, 4, 1; +L_0x283b300 .part v0x27be3e0_0, 4, 1; +L_0x283b3f0 .part/pv L_0x283b520, 5, 1, 32; +L_0x283b5d0 .part v0x27ecef0_0, 5, 1; +L_0x283b6c0 .part v0x27be3e0_0, 5, 1; +L_0x283b850 .part/pv L_0x283b490, 6, 1, 32; +L_0x283ba00 .part v0x27ecef0_0, 6, 1; +L_0x283b7b0 .part v0x27be3e0_0, 6, 1; +L_0x283bbf0 .part/pv L_0x283baf0, 7, 1, 32; +L_0x283bda0 .part v0x27ecef0_0, 7, 1; +L_0x283be90 .part v0x27be3e0_0, 7, 1; +L_0x283bc90 .part/pv L_0x283c050, 8, 1, 32; +L_0x283c100 .part v0x27ecef0_0, 8, 1; +L_0x283bf80 .part v0x27be3e0_0, 8, 1; +L_0x283c320 .part/pv L_0x283c1f0, 9, 1, 32; +L_0x283c510 .part v0x27ecef0_0, 9, 1; +L_0x283c5b0 .part v0x27be3e0_0, 9, 1; +L_0x283c3c0 .part/pv L_0x283c7a0, 10, 1, 32; +L_0x283c800 .part v0x27ecef0_0, 10, 1; +L_0x283c6a0 .part v0x27be3e0_0, 10, 1; +L_0x283ca00 .part/pv L_0x283c8f0, 11, 1, 32; +L_0x283cbc0 .part v0x27ecef0_0, 11, 1; +L_0x283cc60 .part v0x27be3e0_0, 11, 1; +L_0x283caa0 .part/pv L_0x283c4b0, 12, 1, 32; +L_0x283ce80 .part v0x27ecef0_0, 12, 1; +L_0x283cd50 .part v0x27be3e0_0, 12, 1; +L_0x283d0b0 .part/pv L_0x283cf70, 13, 1, 32; +L_0x283d2a0 .part v0x27ecef0_0, 13, 1; +L_0x283d340 .part v0x27be3e0_0, 13, 1; +L_0x283d150 .part/pv L_0x283d1f0, 14, 1, 32; +L_0x283b8f0 .part v0x27ecef0_0, 14, 1; +L_0x283d430 .part v0x27be3e0_0, 14, 1; +L_0x283d910 .part/pv L_0x283d520, 15, 1, 32; +L_0x283db30 .part v0x27ecef0_0, 15, 1; +L_0x282cb00 .part v0x27be3e0_0, 15, 1; +L_0x283d9b0 .part/pv L_0x283da50, 16, 1, 32; +L_0x282cd80 .part v0x27ecef0_0, 16, 1; +L_0x282cbf0 .part v0x27be3e0_0, 16, 1; +L_0x282cce0 .part/pv L_0x283b030, 17, 1, 32; +L_0x282d0c0 .part v0x27ecef0_0, 17, 1; +L_0x282d1b0 .part v0x27be3e0_0, 17, 1; +L_0x282ce70 .part/pv L_0x282cf10, 18, 1, 32; +L_0x283eda0 .part v0x27ecef0_0, 18, 1; +L_0x283ebe0 .part v0x27be3e0_0, 18, 1; +L_0x283ecd0 .part/pv L_0x282d2a0, 19, 1, 32; +L_0x282d020 .part v0x27ecef0_0, 19, 1; +L_0x283f120 .part v0x27be3e0_0, 19, 1; +L_0x283ee40 .part/pv L_0x283eee0, 20, 1, 32; +L_0x283f400 .part v0x27ecef0_0, 20, 1; +L_0x283f210 .part v0x27be3e0_0, 20, 1; +L_0x283f300 .part/pv L_0x283f3a0, 21, 1, 32; +L_0x283efe0 .part v0x27ecef0_0, 21, 1; +L_0x283f7c0 .part v0x27be3e0_0, 21, 1; +L_0x283f4a0 .part/pv L_0x283f540, 22, 1, 32; +L_0x283f5f0 .part v0x27ecef0_0, 22, 1; +L_0x283f8b0 .part v0x27be3e0_0, 22, 1; +L_0x283f9a0 .part/pv L_0x283fa40, 23, 1, 32; +L_0x283f700 .part v0x27ecef0_0, 23, 1; +L_0x283fed0 .part v0x27be3e0_0, 23, 1; +L_0x283fb20 .part/pv L_0x283fbc0, 24, 1, 32; +L_0x283fc70 .part v0x27ecef0_0, 24, 1; +L_0x2840220 .part v0x27be3e0_0, 24, 1; +L_0x2840310 .part/pv L_0x283ffc0, 25, 1, 32; +L_0x2840150 .part v0x27ecef0_0, 25, 1; +L_0x2840620 .part v0x27be3e0_0, 25, 1; +L_0x28403b0 .part/pv L_0x2840450, 26, 1, 32; +L_0x2840500 .part v0x27ecef0_0, 26, 1; +L_0x2840950 .part v0x27be3e0_0, 26, 1; +L_0x2840a40 .part/pv L_0x28406c0, 27, 1, 32; +L_0x2840070 .part v0x27ecef0_0, 27, 1; +L_0x28408b0 .part v0x27be3e0_0, 27, 1; +L_0x2840ae0 .part/pv L_0x2840b80, 28, 1, 32; +L_0x2840c30 .part v0x27ecef0_0, 28, 1; +L_0x2841090 .part v0x27be3e0_0, 28, 1; +L_0x2841130 .part/pv L_0x2840dd0, 29, 1, 32; +L_0x2840770 .part v0x27ecef0_0, 29, 1; +L_0x2840f80 .part v0x27be3e0_0, 29, 1; +L_0x28414b0 .part/pv L_0x27ebac0, 30, 1, 32; +L_0x283d590 .part v0x27ecef0_0, 30, 1; +L_0x283d680 .part v0x27be3e0_0, 30, 1; +L_0x28411d0 .part/pv L_0x2841270, 31, 1, 32; +L_0x2840e80 .part v0x27ecef0_0, 31, 1; +L_0x2841c60 .part v0x27be3e0_0, 31, 1; +S_0x27a5670 .scope module, "nor0" "nor_32bit" 4 39, 10 1, S_0x27a11a0; + .timescale -9 -12; +L_0x2841a50 .functor NOR 1, L_0x2841b00, L_0x2842010, C4<0>, C4<0>; +L_0x2841430 .functor NOR 1, L_0x28421a0, L_0x2842290, C4<0>, C4<0>; +L_0x28424b0 .functor NOR 1, L_0x2842510, L_0x2842650, C4<0>, C4<0>; +L_0x2842840 .functor NOR 1, L_0x28428a0, L_0x2842990, C4<0>, C4<0>; +L_0x28427e0 .functor NOR 1, L_0x2842be0, L_0x2842d50, C4<0>, C4<0>; +L_0x2842f70 .functor NOR 1, L_0x2843020, L_0x2843110, C4<0>, C4<0>; +L_0x2842ee0 .functor NOR 1, L_0x2843450, L_0x2843200, C4<0>, C4<0>; +L_0x2843540 .functor NOR 1, L_0x28437f0, L_0x28438e0, C4<0>, C4<0>; +L_0x2843aa0 .functor NOR 1, L_0x2843b50, L_0x28439d0, C4<0>, C4<0>; +L_0x2843c40 .functor NOR 1, L_0x2843f60, L_0x2844000, C4<0>, C4<0>; +L_0x28441f0 .functor NOR 1, L_0x2844250, L_0x28440f0, C4<0>, C4<0>; +L_0x2844340 .functor NOR 1, L_0x2844610, L_0x28446b0, C4<0>, C4<0>; +L_0x2843f00 .functor NOR 1, L_0x28448d0, L_0x28447a0, C4<0>, C4<0>; +L_0x28449c0 .functor NOR 1, L_0x2844cf0, L_0x2844d90, C4<0>, C4<0>; +L_0x2844c40 .functor NOR 1, L_0x2843340, L_0x2844e80, C4<0>, C4<0>; +L_0x2844f70 .functor NOR 1, L_0x2845580, L_0x2845620, C4<0>, C4<0>; +L_0x28454a0 .functor NOR 1, L_0x28458a0, L_0x2845710, C4<0>, C4<0>; +L_0x2845b40 .functor NOR 1, L_0x2845c90, L_0x2845d30, C4<0>, C4<0>; +L_0x2845a30 .functor NOR 1, L_0x2845fe0, L_0x2845e20, C4<0>, C4<0>; +L_0x2846260 .functor NOR 1, L_0x2845bf0, L_0x2846410, C4<0>, C4<0>; +L_0x2846120 .functor NOR 1, L_0x28466f0, L_0x2846500, C4<0>, C4<0>; +L_0x2846690 .functor NOR 1, L_0x2846310, L_0x2846b00, C4<0>, C4<0>; +L_0x2846830 .functor NOR 1, L_0x28468e0, L_0x2846bf0, C4<0>, C4<0>; +L_0x2846d80 .functor NOR 1, L_0x28469f0, L_0x2847210, C4<0>, C4<0>; +L_0x2846f00 .functor NOR 1, L_0x2846fb0, L_0x2847560, C4<0>, C4<0>; +L_0x2847300 .functor NOR 1, L_0x2847490, L_0x2847960, C4<0>, C4<0>; +L_0x2847790 .functor NOR 1, L_0x2847840, L_0x2847c90, C4<0>, C4<0>; +L_0x2847a00 .functor NOR 1, L_0x28473b0, L_0x2847bf0, C4<0>, C4<0>; +L_0x2847ec0 .functor NOR 1, L_0x2847f70, L_0x28483d0, C4<0>, C4<0>; +L_0x2848110 .functor NOR 1, L_0x2847ab0, L_0x28482c0, C4<0>, C4<0>; +L_0x27a6a50 .functor NOR 1, L_0x2844fe0, L_0x28450d0, C4<0>, C4<0>; +L_0x28485b0 .functor NOR 1, L_0x28481c0, L_0x2848fa0, C4<0>, C4<0>; +v0x27a5760_0 .net *"_s0", 0 0, L_0x2841a50; 1 drivers +v0x27a5800_0 .net *"_s101", 0 0, L_0x2845710; 1 drivers +v0x27a58a0_0 .net *"_s102", 0 0, L_0x2845b40; 1 drivers +v0x27a5940_0 .net *"_s105", 0 0, L_0x2845c90; 1 drivers +v0x27a59e0_0 .net *"_s107", 0 0, L_0x2845d30; 1 drivers +v0x27a5a80_0 .net *"_s108", 0 0, L_0x2845a30; 1 drivers +v0x27a5b20_0 .net *"_s11", 0 0, L_0x2842290; 1 drivers +v0x27a5bc0_0 .net *"_s111", 0 0, L_0x2845fe0; 1 drivers +v0x27a5c60_0 .net *"_s113", 0 0, L_0x2845e20; 1 drivers +v0x27a5d00_0 .net *"_s114", 0 0, L_0x2846260; 1 drivers +v0x27a5da0_0 .net *"_s117", 0 0, L_0x2845bf0; 1 drivers +v0x27a5e40_0 .net *"_s119", 0 0, L_0x2846410; 1 drivers +v0x27a5ee0_0 .net *"_s12", 0 0, L_0x28424b0; 1 drivers +v0x27a5f80_0 .net *"_s120", 0 0, L_0x2846120; 1 drivers +v0x27a60a0_0 .net *"_s123", 0 0, L_0x28466f0; 1 drivers +v0x27a6140_0 .net *"_s125", 0 0, L_0x2846500; 1 drivers +v0x27a6000_0 .net *"_s126", 0 0, L_0x2846690; 1 drivers +v0x27a6290_0 .net *"_s129", 0 0, L_0x2846310; 1 drivers +v0x27a63b0_0 .net *"_s131", 0 0, L_0x2846b00; 1 drivers +v0x27a6430_0 .net *"_s132", 0 0, L_0x2846830; 1 drivers +v0x27a6310_0 .net *"_s135", 0 0, L_0x28468e0; 1 drivers +v0x27a6560_0 .net *"_s137", 0 0, L_0x2846bf0; 1 drivers +v0x27a64b0_0 .net *"_s138", 0 0, L_0x2846d80; 1 drivers +v0x27a66a0_0 .net *"_s141", 0 0, L_0x28469f0; 1 drivers +v0x27a6600_0 .net *"_s143", 0 0, L_0x2847210; 1 drivers +v0x27a67f0_0 .net *"_s144", 0 0, L_0x2846f00; 1 drivers +v0x27a6740_0 .net *"_s147", 0 0, L_0x2846fb0; 1 drivers +v0x27a6950_0 .net *"_s149", 0 0, L_0x2847560; 1 drivers +v0x27a6890_0 .net *"_s15", 0 0, L_0x2842510; 1 drivers +v0x27a6ac0_0 .net *"_s150", 0 0, L_0x2847300; 1 drivers +v0x27a69d0_0 .net *"_s153", 0 0, L_0x2847490; 1 drivers +v0x27a6c40_0 .net *"_s155", 0 0, L_0x2847960; 1 drivers +v0x27a6b40_0 .net *"_s156", 0 0, L_0x2847790; 1 drivers +v0x27a6dd0_0 .net *"_s159", 0 0, L_0x2847840; 1 drivers +v0x27a6cc0_0 .net *"_s161", 0 0, L_0x2847c90; 1 drivers +v0x27a6f70_0 .net *"_s162", 0 0, L_0x2847a00; 1 drivers +v0x27a6e50_0 .net *"_s165", 0 0, L_0x28473b0; 1 drivers +v0x27a6ef0_0 .net *"_s167", 0 0, L_0x2847bf0; 1 drivers +v0x27a7130_0 .net *"_s168", 0 0, L_0x2847ec0; 1 drivers +v0x27a71b0_0 .net *"_s17", 0 0, L_0x2842650; 1 drivers +v0x27a6ff0_0 .net *"_s171", 0 0, L_0x2847f70; 1 drivers +v0x27a7090_0 .net *"_s173", 0 0, L_0x28483d0; 1 drivers +v0x27a7390_0 .net *"_s174", 0 0, L_0x2848110; 1 drivers +v0x27a7410_0 .net *"_s177", 0 0, L_0x2847ab0; 1 drivers +v0x27a7230_0 .net *"_s179", 0 0, L_0x28482c0; 1 drivers +v0x27a72d0_0 .net *"_s18", 0 0, L_0x2842840; 1 drivers +v0x27a7610_0 .net *"_s180", 0 0, L_0x27a6a50; 1 drivers +v0x27a7690_0 .net *"_s183", 0 0, L_0x2844fe0; 1 drivers +v0x27a74b0_0 .net *"_s185", 0 0, L_0x28450d0; 1 drivers +v0x27a7550_0 .net *"_s186", 0 0, L_0x28485b0; 1 drivers +v0x27a78b0_0 .net *"_s189", 0 0, L_0x28481c0; 1 drivers +v0x27a7930_0 .net *"_s191", 0 0, L_0x2848fa0; 1 drivers +v0x27a7730_0 .net *"_s21", 0 0, L_0x28428a0; 1 drivers +v0x27a77d0_0 .net *"_s23", 0 0, L_0x2842990; 1 drivers +v0x27a7b70_0 .net *"_s24", 0 0, L_0x28427e0; 1 drivers +v0x27a7bf0_0 .net *"_s27", 0 0, L_0x2842be0; 1 drivers +v0x27a79b0_0 .net *"_s29", 0 0, L_0x2842d50; 1 drivers +v0x27a7a50_0 .net *"_s3", 0 0, L_0x2841b00; 1 drivers +v0x27a7af0_0 .net *"_s30", 0 0, L_0x2842f70; 1 drivers +v0x27a7e70_0 .net *"_s33", 0 0, L_0x2843020; 1 drivers +v0x27a7c90_0 .net *"_s35", 0 0, L_0x2843110; 1 drivers +v0x27a7d30_0 .net *"_s36", 0 0, L_0x2842ee0; 1 drivers +v0x27a7dd0_0 .net *"_s39", 0 0, L_0x2843450; 1 drivers +v0x27a8110_0 .net *"_s41", 0 0, L_0x2843200; 1 drivers +v0x27a7f10_0 .net *"_s42", 0 0, L_0x2843540; 1 drivers +v0x27a7fb0_0 .net *"_s45", 0 0, L_0x28437f0; 1 drivers +v0x27a8050_0 .net *"_s47", 0 0, L_0x28438e0; 1 drivers +v0x27a83b0_0 .net *"_s48", 0 0, L_0x2843aa0; 1 drivers +v0x27a81b0_0 .net *"_s5", 0 0, L_0x2842010; 1 drivers +v0x27a8250_0 .net *"_s51", 0 0, L_0x2843b50; 1 drivers +v0x27a82f0_0 .net *"_s53", 0 0, L_0x28439d0; 1 drivers +v0x27a8670_0 .net *"_s54", 0 0, L_0x2843c40; 1 drivers +v0x27a8430_0 .net *"_s57", 0 0, L_0x2843f60; 1 drivers +v0x27a84d0_0 .net *"_s59", 0 0, L_0x2844000; 1 drivers +v0x27a8570_0 .net *"_s6", 0 0, L_0x2841430; 1 drivers +v0x27a8950_0 .net *"_s60", 0 0, L_0x28441f0; 1 drivers +v0x27a86f0_0 .net *"_s63", 0 0, L_0x2844250; 1 drivers +v0x27a8790_0 .net *"_s65", 0 0, L_0x28440f0; 1 drivers +v0x27a8830_0 .net *"_s66", 0 0, L_0x2844340; 1 drivers +v0x27a88d0_0 .net *"_s69", 0 0, L_0x2844610; 1 drivers +v0x27a8c60_0 .net *"_s71", 0 0, L_0x28446b0; 1 drivers +v0x27a8ce0_0 .net *"_s72", 0 0, L_0x2843f00; 1 drivers +v0x27a89f0_0 .net *"_s75", 0 0, L_0x28448d0; 1 drivers +v0x27a8a90_0 .net *"_s77", 0 0, L_0x28447a0; 1 drivers +v0x27a8b30_0 .net *"_s78", 0 0, L_0x28449c0; 1 drivers +v0x27a8bd0_0 .net *"_s81", 0 0, L_0x2844cf0; 1 drivers +v0x27a9040_0 .net *"_s83", 0 0, L_0x2844d90; 1 drivers +v0x27a90e0_0 .net *"_s84", 0 0, L_0x2844c40; 1 drivers +v0x27a8d80_0 .net *"_s87", 0 0, L_0x2843340; 1 drivers +v0x27a8e20_0 .net *"_s89", 0 0, L_0x2844e80; 1 drivers +v0x27a8ec0_0 .net *"_s9", 0 0, L_0x28421a0; 1 drivers +v0x27a8f60_0 .net *"_s90", 0 0, L_0x2844f70; 1 drivers +v0x27a9450_0 .net *"_s93", 0 0, L_0x2845580; 1 drivers +v0x27a94d0_0 .net *"_s95", 0 0, L_0x2845620; 1 drivers +v0x27a9180_0 .net *"_s96", 0 0, L_0x28454a0; 1 drivers +v0x27a9220_0 .net *"_s99", 0 0, L_0x28458a0; 1 drivers +v0x27a92c0_0 .alias "a", 31 0, v0x27ebf20_0; +v0x27a9340_0 .alias "b", 31 0, v0x27ec5a0_0; +v0x27a93c0_0 .alias "out", 31 0, v0x27ec8b0_0; +L_0x2841960 .part/pv L_0x2841a50, 0, 1, 32; +L_0x2841b00 .part v0x27ecef0_0, 0, 1; +L_0x2842010 .part v0x27be3e0_0, 0, 1; +L_0x28420b0 .part/pv L_0x2841430, 1, 1, 32; +L_0x28421a0 .part v0x27ecef0_0, 1, 1; +L_0x2842290 .part v0x27be3e0_0, 1, 1; +L_0x2842380 .part/pv L_0x28424b0, 2, 1, 32; +L_0x2842510 .part v0x27ecef0_0, 2, 1; +L_0x2842650 .part v0x27be3e0_0, 2, 1; +L_0x2842740 .part/pv L_0x2842840, 3, 1, 32; +L_0x28428a0 .part v0x27ecef0_0, 3, 1; +L_0x2842990 .part v0x27be3e0_0, 3, 1; +L_0x2842af0 .part/pv L_0x28427e0, 4, 1, 32; +L_0x2842be0 .part v0x27ecef0_0, 4, 1; +L_0x2842d50 .part v0x27be3e0_0, 4, 1; +L_0x2842e40 .part/pv L_0x2842f70, 5, 1, 32; +L_0x2843020 .part v0x27ecef0_0, 5, 1; +L_0x2843110 .part v0x27be3e0_0, 5, 1; +L_0x28432a0 .part/pv L_0x2842ee0, 6, 1, 32; +L_0x2843450 .part v0x27ecef0_0, 6, 1; +L_0x2843200 .part v0x27be3e0_0, 6, 1; +L_0x2843640 .part/pv L_0x2843540, 7, 1, 32; +L_0x28437f0 .part v0x27ecef0_0, 7, 1; +L_0x28438e0 .part v0x27be3e0_0, 7, 1; +L_0x28436e0 .part/pv L_0x2843aa0, 8, 1, 32; +L_0x2843b50 .part v0x27ecef0_0, 8, 1; +L_0x28439d0 .part v0x27be3e0_0, 8, 1; +L_0x2843d70 .part/pv L_0x2843c40, 9, 1, 32; +L_0x2843f60 .part v0x27ecef0_0, 9, 1; +L_0x2844000 .part v0x27be3e0_0, 9, 1; +L_0x2843e10 .part/pv L_0x28441f0, 10, 1, 32; +L_0x2844250 .part v0x27ecef0_0, 10, 1; +L_0x28440f0 .part v0x27be3e0_0, 10, 1; +L_0x2844450 .part/pv L_0x2844340, 11, 1, 32; +L_0x2844610 .part v0x27ecef0_0, 11, 1; +L_0x28446b0 .part v0x27be3e0_0, 11, 1; +L_0x28444f0 .part/pv L_0x2843f00, 12, 1, 32; +L_0x28448d0 .part v0x27ecef0_0, 12, 1; +L_0x28447a0 .part v0x27be3e0_0, 12, 1; +L_0x2844b00 .part/pv L_0x28449c0, 13, 1, 32; +L_0x2844cf0 .part v0x27ecef0_0, 13, 1; +L_0x2844d90 .part v0x27be3e0_0, 13, 1; +L_0x2844ba0 .part/pv L_0x2844c40, 14, 1, 32; +L_0x2843340 .part v0x27ecef0_0, 14, 1; +L_0x2844e80 .part v0x27be3e0_0, 14, 1; +L_0x2845360 .part/pv L_0x2844f70, 15, 1, 32; +L_0x2845580 .part v0x27ecef0_0, 15, 1; +L_0x2845620 .part v0x27be3e0_0, 15, 1; +L_0x2845400 .part/pv L_0x28454a0, 16, 1, 32; +L_0x28458a0 .part v0x27ecef0_0, 16, 1; +L_0x2845710 .part v0x27be3e0_0, 16, 1; +L_0x2845800 .part/pv L_0x2845b40, 17, 1, 32; +L_0x2845c90 .part v0x27ecef0_0, 17, 1; +L_0x2845d30 .part v0x27be3e0_0, 17, 1; +L_0x2845990 .part/pv L_0x2845a30, 18, 1, 32; +L_0x2845fe0 .part v0x27ecef0_0, 18, 1; +L_0x2845e20 .part v0x27be3e0_0, 18, 1; +L_0x2845f10 .part/pv L_0x2846260, 19, 1, 32; +L_0x2845bf0 .part v0x27ecef0_0, 19, 1; +L_0x2846410 .part v0x27be3e0_0, 19, 1; +L_0x2846080 .part/pv L_0x2846120, 20, 1, 32; +L_0x28466f0 .part v0x27ecef0_0, 20, 1; +L_0x2846500 .part v0x27be3e0_0, 20, 1; +L_0x28465f0 .part/pv L_0x2846690, 21, 1, 32; +L_0x2846310 .part v0x27ecef0_0, 21, 1; +L_0x2846b00 .part v0x27be3e0_0, 21, 1; +L_0x2846790 .part/pv L_0x2846830, 22, 1, 32; +L_0x28468e0 .part v0x27ecef0_0, 22, 1; +L_0x2846bf0 .part v0x27be3e0_0, 22, 1; +L_0x2846ce0 .part/pv L_0x2846d80, 23, 1, 32; +L_0x28469f0 .part v0x27ecef0_0, 23, 1; +L_0x2847210 .part v0x27be3e0_0, 23, 1; +L_0x2846e60 .part/pv L_0x2846f00, 24, 1, 32; +L_0x2846fb0 .part v0x27ecef0_0, 24, 1; +L_0x2847560 .part v0x27be3e0_0, 24, 1; +L_0x2847650 .part/pv L_0x2847300, 25, 1, 32; +L_0x2847490 .part v0x27ecef0_0, 25, 1; +L_0x2847960 .part v0x27be3e0_0, 25, 1; +L_0x28476f0 .part/pv L_0x2847790, 26, 1, 32; +L_0x2847840 .part v0x27ecef0_0, 26, 1; +L_0x2847c90 .part v0x27be3e0_0, 26, 1; +L_0x2847d80 .part/pv L_0x2847a00, 27, 1, 32; +L_0x28473b0 .part v0x27ecef0_0, 27, 1; +L_0x2847bf0 .part v0x27be3e0_0, 27, 1; +L_0x2847e20 .part/pv L_0x2847ec0, 28, 1, 32; +L_0x2847f70 .part v0x27ecef0_0, 28, 1; +L_0x28483d0 .part v0x27be3e0_0, 28, 1; +L_0x2848470 .part/pv L_0x2848110, 29, 1, 32; +L_0x2847ab0 .part v0x27ecef0_0, 29, 1; +L_0x28482c0 .part v0x27be3e0_0, 29, 1; +L_0x28487f0 .part/pv L_0x27a6a50, 30, 1, 32; +L_0x2844fe0 .part v0x27ecef0_0, 30, 1; +L_0x28450d0 .part v0x27be3e0_0, 30, 1; +L_0x2848510 .part/pv L_0x28485b0, 31, 1, 32; +L_0x28481c0 .part v0x27ecef0_0, 31, 1; +L_0x2848fa0 .part v0x27be3e0_0, 31, 1; +S_0x27a1300 .scope module, "or0" "or_32bit" 4 40, 11 1, S_0x27a11a0; + .timescale -9 -12; +L_0x2848d90 .functor OR 1, L_0x2848e40, L_0x2849350, C4<0>, C4<0>; +L_0x2842cd0 .functor OR 1, L_0x2849490, L_0x2849580, C4<0>, C4<0>; +L_0x28497a0 .functor OR 1, L_0x2849800, L_0x2849940, C4<0>, C4<0>; +L_0x2849b30 .functor OR 1, L_0x2849b90, L_0x2849c80, C4<0>, C4<0>; +L_0x2849ad0 .functor OR 1, L_0x2849ed0, L_0x284a040, C4<0>, C4<0>; +L_0x284a260 .functor OR 1, L_0x284a310, L_0x284a400, C4<0>, C4<0>; +L_0x284a1d0 .functor OR 1, L_0x284a740, L_0x284a4f0, C4<0>, C4<0>; +L_0x284a830 .functor OR 1, L_0x284aae0, L_0x284abd0, C4<0>, C4<0>; +L_0x284ad90 .functor OR 1, L_0x284ae40, L_0x284acc0, C4<0>, C4<0>; +L_0x284af30 .functor OR 1, L_0x284b250, L_0x284b2f0, C4<0>, C4<0>; +L_0x284b4e0 .functor OR 1, L_0x284b540, L_0x284b3e0, C4<0>, C4<0>; +L_0x284b630 .functor OR 1, L_0x284b900, L_0x284b9a0, C4<0>, C4<0>; +L_0x284b1f0 .functor OR 1, L_0x284bbc0, L_0x284ba90, C4<0>, C4<0>; +L_0x284bcb0 .functor OR 1, L_0x284bfe0, L_0x284c080, C4<0>, C4<0>; +L_0x284bf30 .functor OR 1, L_0x284a630, L_0x284c170, C4<0>, C4<0>; +L_0x284c260 .functor OR 1, L_0x284c870, L_0x284c910, C4<0>, C4<0>; +L_0x284c790 .functor OR 1, L_0x284cb90, L_0x284ca00, C4<0>, C4<0>; +L_0x284ce30 .functor OR 1, L_0x284cf80, L_0x284d020, C4<0>, C4<0>; +L_0x284cd20 .functor OR 1, L_0x284d2d0, L_0x284d110, C4<0>, C4<0>; +L_0x284d550 .functor OR 1, L_0x284cee0, L_0x284d700, C4<0>, C4<0>; +L_0x284d410 .functor OR 1, L_0x284d9e0, L_0x284d7f0, C4<0>, C4<0>; +L_0x284d980 .functor OR 1, L_0x284d600, L_0x284ddf0, C4<0>, C4<0>; +L_0x284db20 .functor OR 1, L_0x284dbd0, L_0x284dee0, C4<0>, C4<0>; +L_0x2849d70 .functor OR 1, L_0x284dce0, L_0x284e220, C4<0>, C4<0>; +L_0x282f770 .functor OR 1, L_0x282f820, L_0x282f480, C4<0>, C4<0>; +L_0x284e310 .functor OR 1, L_0x282f610, L_0x282fc60, C4<0>, C4<0>; +L_0x282f9b0 .functor OR 1, L_0x282fa60, L_0x282ffe0, C4<0>, C4<0>; +L_0x284e1a0 .functor OR 1, L_0x282fb50, L_0x282fe40, C4<0>, C4<0>; +L_0x2830170 .functor OR 1, L_0x2830220, L_0x2830310, C4<0>, C4<0>; +L_0x2850390 .functor OR 1, L_0x282fd50, L_0x2850540, C4<0>, C4<0>; +L_0x27a27d0 .functor OR 1, L_0x284c320, L_0x284c410, C4<0>, C4<0>; +L_0x28507e0 .functor OR 1, L_0x2850440, L_0x2851180, C4<0>, C4<0>; +v0x27a13f0_0 .net *"_s0", 0 0, L_0x2848d90; 1 drivers +v0x27a14b0_0 .net *"_s101", 0 0, L_0x284ca00; 1 drivers +v0x27a1550_0 .net *"_s102", 0 0, L_0x284ce30; 1 drivers +v0x27a15f0_0 .net *"_s105", 0 0, L_0x284cf80; 1 drivers +v0x27a16a0_0 .net *"_s107", 0 0, L_0x284d020; 1 drivers +v0x27a1740_0 .net *"_s108", 0 0, L_0x284cd20; 1 drivers +v0x27a17e0_0 .net *"_s11", 0 0, L_0x2849580; 1 drivers +v0x27a1880_0 .net *"_s111", 0 0, L_0x284d2d0; 1 drivers +v0x27a1970_0 .net *"_s113", 0 0, L_0x284d110; 1 drivers +v0x27a1a10_0 .net *"_s114", 0 0, L_0x284d550; 1 drivers +v0x27a1ab0_0 .net *"_s117", 0 0, L_0x284cee0; 1 drivers +v0x27a1b50_0 .net *"_s119", 0 0, L_0x284d700; 1 drivers +v0x27a1c60_0 .net *"_s12", 0 0, L_0x28497a0; 1 drivers +v0x27a1d00_0 .net *"_s120", 0 0, L_0x284d410; 1 drivers +v0x27a1e20_0 .net *"_s123", 0 0, L_0x284d9e0; 1 drivers +v0x27a1ec0_0 .net *"_s125", 0 0, L_0x284d7f0; 1 drivers +v0x27a1d80_0 .net *"_s126", 0 0, L_0x284d980; 1 drivers +v0x27a2010_0 .net *"_s129", 0 0, L_0x284d600; 1 drivers +v0x27a2130_0 .net *"_s131", 0 0, L_0x284ddf0; 1 drivers +v0x27a21b0_0 .net *"_s132", 0 0, L_0x284db20; 1 drivers +v0x27a2090_0 .net *"_s135", 0 0, L_0x284dbd0; 1 drivers +v0x27a22e0_0 .net *"_s137", 0 0, L_0x284dee0; 1 drivers +v0x27a2230_0 .net *"_s138", 0 0, L_0x2849d70; 1 drivers +v0x27a2420_0 .net *"_s141", 0 0, L_0x284dce0; 1 drivers +v0x27a2380_0 .net *"_s143", 0 0, L_0x284e220; 1 drivers +v0x27a2570_0 .net *"_s144", 0 0, L_0x282f770; 1 drivers +v0x27a24c0_0 .net *"_s147", 0 0, L_0x282f820; 1 drivers +v0x27a26d0_0 .net *"_s149", 0 0, L_0x282f480; 1 drivers +v0x27a2610_0 .net *"_s15", 0 0, L_0x2849800; 1 drivers +v0x27a2840_0 .net *"_s150", 0 0, L_0x284e310; 1 drivers +v0x27a2750_0 .net *"_s153", 0 0, L_0x282f610; 1 drivers +v0x27a29c0_0 .net *"_s155", 0 0, L_0x282fc60; 1 drivers +v0x27a28c0_0 .net *"_s156", 0 0, L_0x282f9b0; 1 drivers +v0x27a2b50_0 .net *"_s159", 0 0, L_0x282fa60; 1 drivers +v0x27a2a40_0 .net *"_s161", 0 0, L_0x282ffe0; 1 drivers +v0x27a2cf0_0 .net *"_s162", 0 0, L_0x284e1a0; 1 drivers +v0x27a2bd0_0 .net *"_s165", 0 0, L_0x282fb50; 1 drivers +v0x27a2c70_0 .net *"_s167", 0 0, L_0x282fe40; 1 drivers +v0x27a2eb0_0 .net *"_s168", 0 0, L_0x2830170; 1 drivers +v0x27a2f30_0 .net *"_s17", 0 0, L_0x2849940; 1 drivers +v0x27a2d70_0 .net *"_s171", 0 0, L_0x2830220; 1 drivers +v0x27a2e10_0 .net *"_s173", 0 0, L_0x2830310; 1 drivers +v0x27a3110_0 .net *"_s174", 0 0, L_0x2850390; 1 drivers +v0x27a3190_0 .net *"_s177", 0 0, L_0x282fd50; 1 drivers +v0x27a2fb0_0 .net *"_s179", 0 0, L_0x2850540; 1 drivers +v0x27a3050_0 .net *"_s18", 0 0, L_0x2849b30; 1 drivers +v0x27a3390_0 .net *"_s180", 0 0, L_0x27a27d0; 1 drivers +v0x27a3410_0 .net *"_s183", 0 0, L_0x284c320; 1 drivers +v0x27a3230_0 .net *"_s185", 0 0, L_0x284c410; 1 drivers +v0x27a32d0_0 .net *"_s186", 0 0, L_0x28507e0; 1 drivers +v0x27a3630_0 .net *"_s189", 0 0, L_0x2850440; 1 drivers +v0x27a36b0_0 .net *"_s191", 0 0, L_0x2851180; 1 drivers +v0x27a34b0_0 .net *"_s21", 0 0, L_0x2849b90; 1 drivers +v0x27a3550_0 .net *"_s23", 0 0, L_0x2849c80; 1 drivers +v0x27a38f0_0 .net *"_s24", 0 0, L_0x2849ad0; 1 drivers +v0x27a3970_0 .net *"_s27", 0 0, L_0x2849ed0; 1 drivers +v0x27a3730_0 .net *"_s29", 0 0, L_0x284a040; 1 drivers +v0x27a37d0_0 .net *"_s3", 0 0, L_0x2848e40; 1 drivers +v0x27a3870_0 .net *"_s30", 0 0, L_0x284a260; 1 drivers +v0x27a3bf0_0 .net *"_s33", 0 0, L_0x284a310; 1 drivers +v0x27a3a10_0 .net *"_s35", 0 0, L_0x284a400; 1 drivers +v0x27a3ab0_0 .net *"_s36", 0 0, L_0x284a1d0; 1 drivers +v0x27a3b50_0 .net *"_s39", 0 0, L_0x284a740; 1 drivers +v0x27a3e90_0 .net *"_s41", 0 0, L_0x284a4f0; 1 drivers +v0x27a3c90_0 .net *"_s42", 0 0, L_0x284a830; 1 drivers +v0x27a3d30_0 .net *"_s45", 0 0, L_0x284aae0; 1 drivers +v0x27a3dd0_0 .net *"_s47", 0 0, L_0x284abd0; 1 drivers +v0x27a4130_0 .net *"_s48", 0 0, L_0x284ad90; 1 drivers +v0x27a3f30_0 .net *"_s5", 0 0, L_0x2849350; 1 drivers +v0x27a3fd0_0 .net *"_s51", 0 0, L_0x284ae40; 1 drivers +v0x27a4070_0 .net *"_s53", 0 0, L_0x284acc0; 1 drivers +v0x27a43f0_0 .net *"_s54", 0 0, L_0x284af30; 1 drivers +v0x27a41b0_0 .net *"_s57", 0 0, L_0x284b250; 1 drivers +v0x27a4250_0 .net *"_s59", 0 0, L_0x284b2f0; 1 drivers +v0x27a42f0_0 .net *"_s6", 0 0, L_0x2842cd0; 1 drivers +v0x27a46d0_0 .net *"_s60", 0 0, L_0x284b4e0; 1 drivers +v0x27a4470_0 .net *"_s63", 0 0, L_0x284b540; 1 drivers +v0x27a4510_0 .net *"_s65", 0 0, L_0x284b3e0; 1 drivers +v0x27a45b0_0 .net *"_s66", 0 0, L_0x284b630; 1 drivers +v0x27a4650_0 .net *"_s69", 0 0, L_0x284b900; 1 drivers +v0x27a49e0_0 .net *"_s71", 0 0, L_0x284b9a0; 1 drivers +v0x27a4a60_0 .net *"_s72", 0 0, L_0x284b1f0; 1 drivers +v0x27a4770_0 .net *"_s75", 0 0, L_0x284bbc0; 1 drivers +v0x27a4810_0 .net *"_s77", 0 0, L_0x284ba90; 1 drivers +v0x27a48b0_0 .net *"_s78", 0 0, L_0x284bcb0; 1 drivers +v0x27a4950_0 .net *"_s81", 0 0, L_0x284bfe0; 1 drivers +v0x27a4dc0_0 .net *"_s83", 0 0, L_0x284c080; 1 drivers +v0x27a4e60_0 .net *"_s84", 0 0, L_0x284bf30; 1 drivers +v0x27a4b00_0 .net *"_s87", 0 0, L_0x284a630; 1 drivers +v0x27a4ba0_0 .net *"_s89", 0 0, L_0x284c170; 1 drivers +v0x27a4c40_0 .net *"_s9", 0 0, L_0x2849490; 1 drivers +v0x27a4ce0_0 .net *"_s90", 0 0, L_0x284c260; 1 drivers +v0x27a51d0_0 .net *"_s93", 0 0, L_0x284c870; 1 drivers +v0x27a5250_0 .net *"_s95", 0 0, L_0x284c910; 1 drivers +v0x27a4f00_0 .net *"_s96", 0 0, L_0x284c790; 1 drivers +v0x27a4fa0_0 .net *"_s99", 0 0, L_0x284cb90; 1 drivers +v0x27a5040_0 .alias "a", 31 0, v0x27ebf20_0; +v0x27a50e0_0 .alias "b", 31 0, v0x27ec5a0_0; +v0x27a55f0_0 .alias "out", 31 0, v0x27ec960_0; +L_0x2848ca0 .part/pv L_0x2848d90, 0, 1, 32; +L_0x2848e40 .part v0x27ecef0_0, 0, 1; +L_0x2849350 .part v0x27be3e0_0, 0, 1; +L_0x28493f0 .part/pv L_0x2842cd0, 1, 1, 32; +L_0x2849490 .part v0x27ecef0_0, 1, 1; +L_0x2849580 .part v0x27be3e0_0, 1, 1; +L_0x2849670 .part/pv L_0x28497a0, 2, 1, 32; +L_0x2849800 .part v0x27ecef0_0, 2, 1; +L_0x2849940 .part v0x27be3e0_0, 2, 1; +L_0x2849a30 .part/pv L_0x2849b30, 3, 1, 32; +L_0x2849b90 .part v0x27ecef0_0, 3, 1; +L_0x2849c80 .part v0x27be3e0_0, 3, 1; +L_0x2849de0 .part/pv L_0x2849ad0, 4, 1, 32; +L_0x2849ed0 .part v0x27ecef0_0, 4, 1; +L_0x284a040 .part v0x27be3e0_0, 4, 1; +L_0x284a130 .part/pv L_0x284a260, 5, 1, 32; +L_0x284a310 .part v0x27ecef0_0, 5, 1; +L_0x284a400 .part v0x27be3e0_0, 5, 1; +L_0x284a590 .part/pv L_0x284a1d0, 6, 1, 32; +L_0x284a740 .part v0x27ecef0_0, 6, 1; +L_0x284a4f0 .part v0x27be3e0_0, 6, 1; +L_0x284a930 .part/pv L_0x284a830, 7, 1, 32; +L_0x284aae0 .part v0x27ecef0_0, 7, 1; +L_0x284abd0 .part v0x27be3e0_0, 7, 1; +L_0x284a9d0 .part/pv L_0x284ad90, 8, 1, 32; +L_0x284ae40 .part v0x27ecef0_0, 8, 1; +L_0x284acc0 .part v0x27be3e0_0, 8, 1; +L_0x284b060 .part/pv L_0x284af30, 9, 1, 32; +L_0x284b250 .part v0x27ecef0_0, 9, 1; +L_0x284b2f0 .part v0x27be3e0_0, 9, 1; +L_0x284b100 .part/pv L_0x284b4e0, 10, 1, 32; +L_0x284b540 .part v0x27ecef0_0, 10, 1; +L_0x284b3e0 .part v0x27be3e0_0, 10, 1; +L_0x284b740 .part/pv L_0x284b630, 11, 1, 32; +L_0x284b900 .part v0x27ecef0_0, 11, 1; +L_0x284b9a0 .part v0x27be3e0_0, 11, 1; +L_0x284b7e0 .part/pv L_0x284b1f0, 12, 1, 32; +L_0x284bbc0 .part v0x27ecef0_0, 12, 1; +L_0x284ba90 .part v0x27be3e0_0, 12, 1; +L_0x284bdf0 .part/pv L_0x284bcb0, 13, 1, 32; +L_0x284bfe0 .part v0x27ecef0_0, 13, 1; +L_0x284c080 .part v0x27be3e0_0, 13, 1; +L_0x284be90 .part/pv L_0x284bf30, 14, 1, 32; +L_0x284a630 .part v0x27ecef0_0, 14, 1; +L_0x284c170 .part v0x27be3e0_0, 14, 1; +L_0x284c650 .part/pv L_0x284c260, 15, 1, 32; +L_0x284c870 .part v0x27ecef0_0, 15, 1; +L_0x284c910 .part v0x27be3e0_0, 15, 1; +L_0x284c6f0 .part/pv L_0x284c790, 16, 1, 32; +L_0x284cb90 .part v0x27ecef0_0, 16, 1; +L_0x284ca00 .part v0x27be3e0_0, 16, 1; +L_0x284caf0 .part/pv L_0x284ce30, 17, 1, 32; +L_0x284cf80 .part v0x27ecef0_0, 17, 1; +L_0x284d020 .part v0x27be3e0_0, 17, 1; +L_0x284cc80 .part/pv L_0x284cd20, 18, 1, 32; +L_0x284d2d0 .part v0x27ecef0_0, 18, 1; +L_0x284d110 .part v0x27be3e0_0, 18, 1; +L_0x284d200 .part/pv L_0x284d550, 19, 1, 32; +L_0x284cee0 .part v0x27ecef0_0, 19, 1; +L_0x284d700 .part v0x27be3e0_0, 19, 1; +L_0x284d370 .part/pv L_0x284d410, 20, 1, 32; +L_0x284d9e0 .part v0x27ecef0_0, 20, 1; +L_0x284d7f0 .part v0x27be3e0_0, 20, 1; +L_0x284d8e0 .part/pv L_0x284d980, 21, 1, 32; +L_0x284d600 .part v0x27ecef0_0, 21, 1; +L_0x284ddf0 .part v0x27be3e0_0, 21, 1; +L_0x284da80 .part/pv L_0x284db20, 22, 1, 32; +L_0x284dbd0 .part v0x27ecef0_0, 22, 1; +L_0x284dee0 .part v0x27be3e0_0, 22, 1; +L_0x284dfd0 .part/pv L_0x2849d70, 23, 1, 32; +L_0x284dce0 .part v0x27ecef0_0, 23, 1; +L_0x284e220 .part v0x27be3e0_0, 23, 1; +L_0x282f6d0 .part/pv L_0x282f770, 24, 1, 32; +L_0x282f820 .part v0x27ecef0_0, 24, 1; +L_0x282f480 .part v0x27be3e0_0, 24, 1; +L_0x282f570 .part/pv L_0x284e310, 25, 1, 32; +L_0x282f610 .part v0x27ecef0_0, 25, 1; +L_0x282fc60 .part v0x27be3e0_0, 25, 1; +L_0x282f910 .part/pv L_0x282f9b0, 26, 1, 32; +L_0x282fa60 .part v0x27ecef0_0, 26, 1; +L_0x282ffe0 .part v0x27be3e0_0, 26, 1; +L_0x28300d0 .part/pv L_0x284e1a0, 27, 1, 32; +L_0x282fb50 .part v0x27ecef0_0, 27, 1; +L_0x282fe40 .part v0x27be3e0_0, 27, 1; +L_0x282ff30 .part/pv L_0x2830170, 28, 1, 32; +L_0x2830220 .part v0x27ecef0_0, 28, 1; +L_0x2830310 .part v0x27be3e0_0, 28, 1; +L_0x2850650 .part/pv L_0x2850390, 29, 1, 32; +L_0x282fd50 .part v0x27ecef0_0, 29, 1; +L_0x2850540 .part v0x27be3e0_0, 29, 1; +L_0x28509d0 .part/pv L_0x27a27d0, 30, 1, 32; +L_0x284c320 .part v0x27ecef0_0, 30, 1; +L_0x284c410 .part v0x27be3e0_0, 30, 1; +L_0x2850740 .part/pv L_0x28507e0, 31, 1, 32; +L_0x2850440 .part v0x27ecef0_0, 31, 1; +L_0x2851180 .part v0x27be3e0_0, 31, 1; + .scope S_0x27a11a0; +T_1 ; + %wait E_0x27a12d0; + %load/v 8, v0x27ebe70_0, 3; + %cmpi/u 8, 0, 3; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 1, 3; + %jmp/1 T_1.1, 6; + %cmpi/u 8, 2, 3; + %jmp/1 T_1.2, 6; + %cmpi/u 8, 3, 3; + %jmp/1 T_1.3, 6; + %cmpi/u 8, 4, 3; + %jmp/1 T_1.4, 6; + %cmpi/u 8, 5, 3; + %jmp/1 T_1.5, 6; + %cmpi/u 8, 6, 3; + %jmp/1 T_1.6, 6; + %cmpi/u 8, 7, 3; + %jmp/1 T_1.7, 6; + %jmp T_1.8; +T_1.0 ; + %load/v 8, v0x27ec4a0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %load/v 8, v0x27ec3a0_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 8; + %load/v 8, v0x27ec420_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 8; + %jmp T_1.8; +T_1.1 ; + %load/v 8, v0x27ec4a0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %load/v 8, v0x27ec3a0_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 8; + %load/v 8, v0x27ec420_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 8; + %jmp T_1.8; +T_1.2 ; + %load/v 8, v0x27ecb40_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 0; + %jmp T_1.8; +T_1.3 ; + %load/v 8, v0x27eca10_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 0; + %jmp T_1.8; +T_1.4 ; + %load/v 8, v0x27ec520_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 0; + %jmp T_1.8; +T_1.5 ; + %load/v 8, v0x27ec830_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 0; + %jmp T_1.8; +T_1.6 ; + %load/v 8, v0x27ec8b0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 0; + %jmp T_1.8; +T_1.7 ; + %load/v 8, v0x27ec960_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x27ec730_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x27be4f0_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x27ec7b0_0, 0, 0; + %jmp T_1.8; +T_1.8 ; + %jmp T_1; + .thread T_1, $push; + .scope S_0x27a11a0; +T_2 ; + %wait E_0x27a0a70; + %load/v 8, v0x27ec730_0, 32; + %cmpi/u 8, 0, 32; + %jmp/0xz T_2.0, 4; + %ix/load 0, 1, 0; + %assign/v0 v0x27ecbf0_0, 0, 1; + %jmp T_2.1; +T_2.0 ; + %ix/load 0, 1, 0; + %assign/v0 v0x27ecbf0_0, 0, 0; +T_2.1 ; + %jmp T_2; + .thread T_2, $push; + .scope S_0x26fbeb0; +T_3 ; + %set/v v0x27ed2e0_0, 0, 32; + %end; + .thread T_3; + .scope S_0x26fbeb0; +T_4 ; + %set/v v0x27ed360_0, 0, 32; + %end; + .thread T_4; + .scope S_0x26fbeb0; +T_5 ; + %vpi_call 3 40 "$dumpfile", "alu.vcd"; + %vpi_call 3 41 "$dumpvars"; + %vpi_call 3 44 "$display", "\012Addition"; + %vpi_call 3 45 "$display", "-----------------------------------------------------------------"; + %set/v v0x27ed130_0, 0, 3; + %movi 8, 1048575, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 1, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 500000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %add 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %load/v 75, v0x27ed080_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %set/v v0x27ecef0_0, 1, 32; + %set/v v0x27be3e0_0, 0, 32; + %delay 500000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %add 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %load/v 75, v0x27ed080_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %set/v v0x27ecef0_0, 1, 32; + %movi 8, 1, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 500000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %add 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %load/v 75, v0x27ed080_0, 1; + %mov 76, 0, 2; + %cmpi/u 75, 1, 3; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2952790016, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 3221225473, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %add 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 2; + %cmpi/u 75, 1, 3; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147534508, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 3221921793, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %add 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 2; + %cmpi/u 75, 1, 3; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %vpi_call 3 69 "$display", "Subtraction"; + %vpi_call 3 70 "$display", "-----------------------------------------------------------------"; + %movi 8, 1, 3; + %set/v v0x27ed130_0, 8, 3; + %movi 8, 1048575, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 1, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %sub 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %load/v 75, v0x27ed080_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %set/v v0x27ecef0_0, 1, 32; + %set/v v0x27be3e0_0, 0, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %sub 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %load/v 75, v0x27ed080_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2952790016, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 3221225473, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %sub 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147534508, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 3221921793, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %sub 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 1; + %cmpi/u 75, 0, 2; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 1073741824, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2148179969, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %sub 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 2; + %cmpi/u 75, 1, 3; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483648, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 1074438145, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 1000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %sub 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %load/v 75, v0x27ed260_0, 1; + %mov 76, 0, 2; + %cmpi/u 75, 1, 3; + %mov 75, 4, 1; + %and 74, 75, 1; + %mov 75, 74, 1; + %mov 76, 0, 31; + %set/v v0x27ece70_0, 75, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %vpi_call 3 97 "$display", "\012XOR"; + %vpi_call 3 98 "$display", "-----------------------------------------------------------------"; + %movi 8, 2, 3; + %set/v v0x27ed130_0, 8, 3; + %vpi_call 3 100 "$display", "op: %b", v0x27ed130_0; + %set/v v0x27ecef0_0, 0, 32; + %movi 8, 1, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ecef0_0, 32; + %load/v 106, v0x27be3e0_0, 32; + %xor 74, 106, 32; + %load/v 106, v0x27ed1e0_0, 32; + %cmp/u 74, 106, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 0, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %vpi_call 3 106 "$display", "\012SLT"; + %vpi_call 3 107 "$display", "-----------------------------------------------------------------"; + %movi 8, 3, 3; + %set/v v0x27ed130_0, 8, 3; + %vpi_call 3 109 "$display", "op: %b", v0x27ed130_0; + %movi 8, 1, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 8, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483656, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 8, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147483650, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483656, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147484160, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483656, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2097152, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 8, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 1881145344, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 1879048200, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2097152, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 1879048200, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 1879048192, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 4278190088, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147483655, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483655, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 4278190088, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483655, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147483655, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 2000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 1073741825, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147483664, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 1000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483649, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 67108864, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 1000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 8, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2097152, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 1000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 536870913, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147483648, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 1000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 0, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %movi 8, 2147483648, 32; + %set/v v0x27ecef0_0, 8, 32; + %movi 8, 2147483647, 32; + %set/v v0x27be3e0_0, 8, 32; + %delay 1000000, 0; + %load/v 8, v0x27ed360_0, 32; + %mov 40, 39, 1; + %addi 8, 1, 33; + %set/v v0x27ed360_0, 8, 32; + %load/v 8, v0x27ed2e0_0, 32; + %mov 40, 39, 1; + %load/v 74, v0x27ed1e0_0, 32; + %cmpi/u 74, 1, 32; + %mov 74, 4, 1; + %mov 75, 0, 31; + %set/v v0x27ece70_0, 74, 32; + %set/v v0x27eca90_0, 1, 1; + %fork TD_testALU.test, S_0x27ecd00; + %join; + %load/v 74, v0x27ecdf0_0, 32; + %mov 41, 74, 32; + %mov 73, 72, 1; + %add 8, 41, 33; + %set/v v0x27ed2e0_0, 8, 32; + %vpi_call 3 185 "$display", "%2d/%2d Test Cases Passed", v0x27ed2e0_0, v0x27ed360_0; + %end; + .thread T_5; +# The file index is used to find the file name in the following table. +:file_names 12; + "N/A"; + ""; + "./adder.v"; + "alu.t.v"; + "./aluK.v"; + "./adder_subtracter.v"; + "./xor_32bit.v"; + "./slt.v"; + "./and_32bit.v"; + "./nand_32bit.v"; + "./nor_32bit.v"; + "./or_32bit.v"; diff --git a/alu.t.v b/alu.t.v new file mode 100644 index 0000000..2470b48 --- /dev/null +++ b/alu.t.v @@ -0,0 +1,188 @@ +// 1 Bit alu test bench +`timescale 1 ns / 1 ps +`include "aluK.v" + +module testALU (); + wire[31:0] out; + wire zero, overflow, cout; + reg[31:0] a, b; + reg[2:0] op; + + integer passed_tests = 0; + integer tests = 0; + + ALUcontrolLUT alu (cout,overflow,zero,out,op,a,b); + + function integer test; + input test_case; + integer test_case; + input show_extras; + begin + if (test_case) begin + test = 1; + $display("Passed test with:"); + end + else begin + test = 0; + $display("Failed test with:"); + end + $display("a: %b", a); + $display("b: %b", b); + $display("out: %b", out); + if (show_extras) begin + $display("Cout: %b, Overflow: %b, Zero: %b", cout, overflow, zero); + end + end + endfunction + + + initial begin + $dumpfile("alu.vcd"); + $dumpvars; + + // Test Add + $display("\nAddition"); + $display("-----------------------------------------------------------------"); + op=3'b000; + a=32'b00000000000011111111111111111111; b=32'b0000000000000000000000000000001;#500 + tests = tests + 1; + passed_tests = passed_tests + test(((a + b) == out) && (overflow == 0) && (cout == 0), 1); + + a=32'b11111111111111111111111111111111; b=32'b0000000000000000000000000000000;#500 + tests = tests + 1; + passed_tests = passed_tests + test(((a + b) == out) && (overflow == 0) && (cout == 0), 1); + + a=32'b11111111111111111111111111111111; b=32'b0000000000000000000000000000001;#500 + tests = tests + 1; + passed_tests = passed_tests + test(((a + b) == out) && (overflow == 0) && (cout == 1), 1); + + // Overflow + a=32'b10110000000000000000000000000000; b=32'b11000000000000000000000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a + b) == out) && (overflow == 1), 1); + + a=32'b10000000000000001100011010101100; b=32'b11000000000010101010000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a + b) == out) && (overflow == 1), 1); + + // Test Subtract + $display("Subtraction"); + $display("-----------------------------------------------------------------"); + op=3'b001; + a=32'b00000000000011111111111111111111; b=32'b0000000000000000000000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a - b) == out) && (overflow == 0) && (cout == 0), 1); + + a=32'b11111111111111111111111111111111; b=32'b0000000000000000000000000000000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a - b) == out) && (overflow == 0) && (cout == 0), 1); + + a=32'b10110000000000000000000000000000; b=32'b11000000000000000000000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a - b) == out) && (overflow == 0), 1); + + a=32'b10000000000000001100011010101100; b=32'b11000000000010101010000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a - b) == out) && (overflow == 0), 1); + + a=32'b01000000000000000000000000000000; b=32'b10000000000010101010000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(((a - b) == out) && (overflow == 1), 1); + + a=32'b10000000000000000000000000000000; b=32'b01000000000010101010000000000001;#1000 + tests = tests + 1; + passed_tests = passed_tests + test(((a - b) == out) && (overflow == 1), 1); + + // Test XOR + $display("\nXOR"); + $display("-----------------------------------------------------------------"); + op=3'b010; + $display("op: %b", op); + a=32'b00000000000000000000000000000000; b=32'b00000000000000000000000000000001;#2000 + tests = tests + 1; + passed_tests = passed_tests + test((a ^ b) == out, 0); + + // Test SLT + $display("\nSLT"); + $display("-----------------------------------------------------------------"); + op=3'b011; + $display("op: %b", op); + // SLT(a,b) = 1 where ab + a=32'b00000000000000000000000000001000; b=32'b00000000000000000000000000000010;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + + // SLT(a,b) = 1 where a(is negative)b(is negative) + a=32'b00000000000000000000000000001000; b=32'b10000000000000000000000000000010;#2000 + tests = tests + 1; + + passed_tests = passed_tests + test(out == 0, 1); + // SLT(a,b) = 1 where a(is negative)>b(is negative) + a=32'b10000000000000000000000000001000; b=32'b10000000000000000000001000000000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + + // SLT(a,b) = 1 where a(is negative)>b(is negative) + a=32'b10000000000000000000000000001000; b=32'b00000000001000000000000000000000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + + // small pos / large pos = 1 + a=32'b00000000000000000000000000001000; b=32'b01110000001000000000000000000000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + // large pos / small pos = 0 + a=32'b01110000000000000000000000001000; b=32'b00000000001000000000000000000000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + // equal positives = 0 + a=32'b01110000000000000000000000001000; b=32'b01110000000000000000000000000000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + + // small neg / large neg = 0 + a=32'b11111111000000000000000000001000; b=32'b10000000000000000000000000000111;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + // large neg / small neg = 1 + a=32'b10000000000000000000000000000111; b=32'b11111111000000000000000000001000;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + // equal negatives = 0 + a=32'b10000000000000000000000000000111; b=32'b10000000000000000000000000000111;#2000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + + // positive overflow: large pos / large neg : 0 + a=32'b01000000000000000000000000000001; b=32'b10000000000000000000000000010000;#1000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + // negative overflow: large neg / large pos : 1 + a=32'b10000000000000000000000000000001; b=32'b00000100000000000000000000000000;#1000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + + a=32'b00000000000000000000000000001000; b=32'b00000000001000000000000000000000;#1000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + + a=32'b00100000000000000000000000000001; b=32'b10000000000000000000000000000000;#1000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 0, 1); + + a=32'b10000000000000000000000000000000; b=32'b01111111111111111111111111111111;#1000 + tests = tests + 1; + passed_tests = passed_tests + test(out == 1, 1); + $display("%2d/%2d Test Cases Passed", passed_tests, tests); + + end +endmodule diff --git a/alu.v b/alu.v new file mode 100644 index 0000000..8350a34 --- /dev/null +++ b/alu.v @@ -0,0 +1,140 @@ +// ALU is a 32-Bit arithmetic logic unit +// It performs the following operations: +// b000 -> ADD +// b001 -> SUB +// b010 -> XOR +// b011 -> SLT +// b100 -> AND +// b101 -> NAND +// b110 -> NOR +// b111 -> OR +`define AND and +`define OR or +`define NOT not +`define XOR xor +`define NOR nor +`define NAND nand + +`include "alu1bit.v" + +module ALU +( + output[31:0] result, + output carryout, + output zero, + output overflow, + input[31:0] operandA, + input[31:0] operandB, + input[2:0] command +); + + wire[31:0] cout; + wire[31:0] res_premux; + ALU1bit a1(res_premux[0], cout[0], operandA[0], operandB[0], 0, command); + ALU1bit a2(res_premux[1], cout[1], operandA[1], operandB[1], cout[0], command); + ALU1bit a3(res_premux[2], cout[2], operandA[2], operandB[2], cout[1], command); + ALU1bit a4(res_premux[3], cout[3], operandA[3], operandB[3], cout[2], command); + ALU1bit a5(res_premux[4], cout[4], operandA[4], operandB[4], cout[3], command); + ALU1bit a6(res_premux[5], cout[5], operandA[5], operandB[5], cout[4], command); + ALU1bit a7(res_premux[6], cout[6], operandA[6], operandB[6], cout[5], command); + ALU1bit a8(res_premux[7], cout[7], operandA[7], operandB[7], cout[6], command); + ALU1bit a9(res_premux[8], cout[8], operandA[8], operandB[8], cout[7], command); + ALU1bit a10(res_premux[9], cout[9], operandA[9], operandB[9], cout[8], command); + ALU1bit a11(res_premux[10], cout[10], operandA[10], operandB[10], cout[9], command); + ALU1bit a12(res_premux[11], cout[11], operandA[11], operandB[11], cout[10], command); + ALU1bit a13(res_premux[12], cout[12], operandA[12], operandB[12], cout[11], command); + ALU1bit a14(res_premux[13], cout[13], operandA[13], operandB[13], cout[12], command); + ALU1bit a15(res_premux[14], cout[14], operandA[14], operandB[14], cout[13], command); + ALU1bit a16(res_premux[15], cout[15], operandA[15], operandB[15], cout[14], command); + ALU1bit a17(res_premux[16], cout[16], operandA[16], operandB[16], cout[15], command); + ALU1bit a18(res_premux[17], cout[17], operandA[17], operandB[17], cout[16], command); + ALU1bit a19(res_premux[18], cout[18], operandA[18], operandB[18], cout[17], command); + ALU1bit a20(res_premux[19], cout[19], operandA[19], operandB[19], cout[18], command); + ALU1bit a21(res_premux[20], cout[20], operandA[20], operandB[20], cout[19], command); + ALU1bit a22(res_premux[21], cout[21], operandA[21], operandB[21], cout[20], command); + ALU1bit a23(res_premux[22], cout[22], operandA[22], operandB[22], cout[21], command); + ALU1bit a24(res_premux[23], cout[23], operandA[23], operandB[23], cout[22], command); + ALU1bit a25(res_premux[24], cout[24], operandA[24], operandB[24], cout[23], command); + ALU1bit a26(res_premux[25], cout[25], operandA[25], operandB[25], cout[24], command); + ALU1bit a27(res_premux[26], cout[26], operandA[26], operandB[26], cout[25], command); + ALU1bit a28(res_premux[27], cout[27], operandA[27], operandB[27], cout[26], command); + ALU1bit a29(res_premux[28], cout[28], operandA[28], operandB[28], cout[27], command); + ALU1bit a30(res_premux[29], cout[29], operandA[29], operandB[29], cout[28], command); + ALU1bit a31(res_premux[30], cout[30], operandA[30], operandB[30], cout[29], command); + ALU1bit a32(res_premux[31], carryout, operandA[31], operandB[31], cout[30], command); + `XOR(overflow, carryout, cout[30]); + + // We're using subtraction for SLT. We have to handle additional cases + // for the cases where we have overflow. + wire temp; + `XOR(temp, res_premux[31], overflow); + + // This mux is necessary for handling the SLT, since the desired result of the SLT + // is very different from the actual output from our ALU. + // We could have used a MUX of size 2, but that would have required conversion + // of the SLT command. + wire[7:0] resMux0 = {res_premux[0], res_premux[0], res_premux[0], res_premux[0], temp, res_premux[0], res_premux[0], res_premux[0]}; + MUX3bit mux0(result[0], command, resMux0); + wire[7:0] resMux1 = {res_premux[1], res_premux[1], res_premux[1], res_premux[1], 1'b0, res_premux[1], res_premux[1], res_premux[1]}; + MUX3bit mux1(result[1], command, resMux1); + wire[7:0] resMux2 = {res_premux[2], res_premux[2], res_premux[2], res_premux[2], 1'b0, res_premux[2], res_premux[2], res_premux[2]}; + MUX3bit mux2(result[2], command, resMux2); + wire[7:0] resMux3 = {res_premux[3], res_premux[3], res_premux[3], res_premux[3], 1'b0, res_premux[3], res_premux[3], res_premux[3]}; + MUX3bit mux3(result[3], command, resMux3); + wire[7:0] resMux4 = {res_premux[4], res_premux[4], res_premux[4], res_premux[4], 1'b0, res_premux[4], res_premux[4], res_premux[4]}; + MUX3bit mux4(result[4], command, resMux4); + wire[7:0] resMux5 = {res_premux[5], res_premux[5], res_premux[5], res_premux[5], 1'b0, res_premux[5], res_premux[5], res_premux[5]}; + MUX3bit mux5(result[5], command, resMux5); + wire[7:0] resMux6 = {res_premux[6], res_premux[6], res_premux[6], res_premux[6], 1'b0, res_premux[6], res_premux[6], res_premux[6]}; + MUX3bit mux6(result[6], command, resMux6); + wire[7:0] resMux7 = {res_premux[7], res_premux[7], res_premux[7], res_premux[7], 1'b0, res_premux[7], res_premux[7], res_premux[7]}; + MUX3bit mux7(result[7], command, resMux7); + wire[7:0] resMux8 = {res_premux[8], res_premux[8], res_premux[8], res_premux[8], 1'b0, res_premux[8], res_premux[8], res_premux[8]}; + MUX3bit mux8(result[8], command, resMux8); + wire[7:0] resMux9 = {res_premux[9], res_premux[9], res_premux[9], res_premux[9], 1'b0, res_premux[9], res_premux[9], res_premux[9]}; + MUX3bit mux9(result[9], command, resMux9); + wire[7:0] resMux10 = {res_premux[10], res_premux[10], res_premux[10], res_premux[10], 1'b0, res_premux[10], res_premux[10], res_premux[10]}; + MUX3bit mux10(result[10], command, resMux10); + wire[7:0] resMux11 = {res_premux[11], res_premux[11], res_premux[11], res_premux[11], 1'b0, res_premux[11], res_premux[11], res_premux[11]}; + MUX3bit mux11(result[11], command, resMux11); + wire[7:0] resMux12 = {res_premux[12], res_premux[12], res_premux[12], res_premux[12], 1'b0, res_premux[12], res_premux[12], res_premux[12]}; + MUX3bit mux12(result[12], command, resMux12); + wire[7:0] resMux13 = {res_premux[13], res_premux[13], res_premux[13], res_premux[13], 1'b0, res_premux[13], res_premux[13], res_premux[13]}; + MUX3bit mux13(result[13], command, resMux13); + wire[7:0] resMux14 = {res_premux[14], res_premux[14], res_premux[14], res_premux[14], 1'b0, res_premux[14], res_premux[14], res_premux[14]}; + MUX3bit mux14(result[14], command, resMux14); + wire[7:0] resMux15 = {res_premux[15], res_premux[15], res_premux[15], res_premux[15], 1'b0, res_premux[15], res_premux[15], res_premux[15]}; + MUX3bit mux15(result[15], command, resMux15); + wire[7:0] resMux16 = {res_premux[16], res_premux[16], res_premux[16], res_premux[16], 1'b0, res_premux[16], res_premux[16], res_premux[16]}; + MUX3bit mux16(result[16], command, resMux16); + wire[7:0] resMux17 = {res_premux[17], res_premux[17], res_premux[17], res_premux[17], 1'b0, res_premux[17], res_premux[17], res_premux[17]}; + MUX3bit mux17(result[17], command, resMux17); + wire[7:0] resMux18 = {res_premux[18], res_premux[18], res_premux[18], res_premux[18], 1'b0, res_premux[18], res_premux[18], res_premux[18]}; + MUX3bit mux18(result[18], command, resMux18); + wire[7:0] resMux19 = {res_premux[19], res_premux[19], res_premux[19], res_premux[19], 1'b0, res_premux[19], res_premux[19], res_premux[19]}; + MUX3bit mux19(result[19], command, resMux19); + wire[7:0] resMux20 = {res_premux[20], res_premux[20], res_premux[20], res_premux[20], 1'b0, res_premux[20], res_premux[20], res_premux[20]}; + MUX3bit mux20(result[20], command, resMux20); + wire[7:0] resMux21 = {res_premux[21], res_premux[21], res_premux[21], res_premux[21], 1'b0, res_premux[21], res_premux[21], res_premux[21]}; + MUX3bit mux21(result[21], command, resMux21); + wire[7:0] resMux22 = {res_premux[22], res_premux[22], res_premux[22], res_premux[22], 1'b0, res_premux[22], res_premux[22], res_premux[22]}; + MUX3bit mux22(result[22], command, resMux22); + wire[7:0] resMux23 = {res_premux[23], res_premux[23], res_premux[23], res_premux[23], 1'b0, res_premux[23], res_premux[23], res_premux[23]}; + MUX3bit mux23(result[23], command, resMux23); + wire[7:0] resMux24 = {res_premux[24], res_premux[24], res_premux[24], res_premux[24], 1'b0, res_premux[24], res_premux[24], res_premux[24]}; + MUX3bit mux24(result[24], command, resMux24); + wire[7:0] resMux25 = {res_premux[25], res_premux[25], res_premux[25], res_premux[25], 1'b0, res_premux[25], res_premux[25], res_premux[25]}; + MUX3bit mux25(result[25], command, resMux25); + wire[7:0] resMux26 = {res_premux[26], res_premux[26], res_premux[26], res_premux[26], 1'b0, res_premux[26], res_premux[26], res_premux[26]}; + MUX3bit mux26(result[26], command, resMux26); + wire[7:0] resMux27 = {res_premux[27], res_premux[27], res_premux[27], res_premux[27], 1'b0, res_premux[27], res_premux[27], res_premux[27]}; + MUX3bit mux27(result[27], command, resMux27); + wire[7:0] resMux28 = {res_premux[28], res_premux[28], res_premux[28], res_premux[28], 1'b0, res_premux[28], res_premux[28], res_premux[28]}; + MUX3bit mux28(result[28], command, resMux28); + wire[7:0] resMux29 = {res_premux[29], res_premux[29], res_premux[29], res_premux[29], 1'b0, res_premux[29], res_premux[29], res_premux[29]}; + MUX3bit mux29(result[29], command, resMux29); + wire[7:0] resMux30 = {res_premux[30], res_premux[30], res_premux[30], res_premux[30], 1'b0, res_premux[30], res_premux[30], res_premux[30]}; + MUX3bit mux30(result[30], command, resMux30); + wire[7:0] resMux31 = {res_premux[31], res_premux[31], res_premux[31], res_premux[31], 1'b0, res_premux[31], res_premux[31], res_premux[31]}; + MUX3bit mux31(result[31], command, resMux31); +endmodule diff --git a/alu.vcd b/alu.vcd new file mode 100644 index 0000000..8a34133 --- /dev/null +++ b/alu.vcd @@ -0,0 +1,9674 @@ +$date + Thu Nov 16 18:55:44 2017 +$end +$version + Icarus Verilog +$end +$timescale + 1ps +$end +$scope module behavioralFullAdder $end +$var wire 1 ! a $end +$var wire 1 " b $end +$var wire 1 # carryin $end +$var wire 1 $ carryout $end +$var wire 1 % sum $end +$upscope $end +$scope module testALU $end +$var wire 1 & cout $end +$var wire 32 ' out [31:0] $end +$var wire 1 ( overflow $end +$var wire 1 ) zero $end +$var reg 32 * a [31:0] $end +$var reg 32 + b [31:0] $end +$var reg 3 , op [2:0] $end +$var integer 32 - passed_tests [31:0] $end +$var integer 32 . tests [31:0] $end +$scope function test $end +$var reg 1 / show_extras $end +$var integer 32 0 test [31:0] $end +$var integer 32 1 test_case [31:0] $end +$upscope $end +$scope module alu $end +$var wire 3 2 ALUcommand [2:0] $end +$var wire 32 3 a [31:0] $end +$var wire 1 4 adder_cout $end +$var wire 1 5 adder_flag $end +$var wire 32 6 addsub [31:0] $end +$var wire 32 7 andin [31:0] $end +$var wire 32 8 b [31:0] $end +$var wire 32 9 nandin [31:0] $end +$var wire 32 : norin [31:0] $end +$var wire 32 ; orin [31:0] $end +$var wire 32 < slt [31:0] $end +$var wire 32 = xorin [31:0] $end +$var reg 1 > cout $end +$var reg 32 ? finalsignal [31:0] $end +$var reg 1 @ flag $end +$var reg 1 A zeroflag $end +$scope module addsub0 $end +$var wire 1 B _ $end +$var wire 1 C _1 $end +$var wire 1 D _2 $end +$var wire 1 E _3 $end +$var wire 1 F _4 $end +$var wire 1 G _5 $end +$var wire 1 H _6 $end +$var wire 32 I ans [31:0] $end +$var wire 1 4 carryout $end +$var wire 3 J command [2:0] $end +$var wire 1 K cout0 $end +$var wire 1 L cout1 $end +$var wire 1 M cout2 $end +$var wire 1 N cout3 $end +$var wire 1 O cout4 $end +$var wire 1 P cout5 $end +$var wire 1 Q cout6 $end +$var wire 32 R finalB [31:0] $end +$var wire 32 S invertedB [31:0] $end +$var wire 32 T opA [31:0] $end +$var wire 32 U opB [31:0] $end +$var wire 1 5 overflow $end +$scope module addsubmux $end +$var wire 1 V address $end +$var wire 32 W in0 [31:0] $end +$var wire 1 X in00addr $end +$var wire 1 Y in010addr $end +$var wire 1 Z in011addr $end +$var wire 1 [ in012addr $end +$var wire 1 \ in013addr $end +$var wire 1 ] in014addr $end +$var wire 1 ^ in015addr $end +$var wire 1 _ in016addr $end +$var wire 1 ` in017addr $end +$var wire 1 a in018addr $end +$var wire 1 b in019addr $end +$var wire 1 c in01addr $end +$var wire 1 d in020addr $end +$var wire 1 e in021addr $end +$var wire 1 f in022addr $end +$var wire 1 g in023addr $end +$var wire 1 h in024addr $end +$var wire 1 i in025addr $end +$var wire 1 j in026addr $end +$var wire 1 k in027addr $end +$var wire 1 l in028addr $end +$var wire 1 m in029addr $end +$var wire 1 n in02addr $end +$var wire 1 o in030addr $end +$var wire 1 p in031addr $end +$var wire 1 q in03addr $end +$var wire 1 r in04addr $end +$var wire 1 s in05addr $end +$var wire 1 t in06addr $end +$var wire 1 u in07addr $end +$var wire 1 v in08addr $end +$var wire 1 w in09addr $end +$var wire 32 x in1 [31:0] $end +$var wire 1 y in10addr $end +$var wire 1 z in110addr $end +$var wire 1 { in111addr $end +$var wire 1 | in112addr $end +$var wire 1 } in113addr $end +$var wire 1 ~ in114addr $end +$var wire 1 !" in115addr $end +$var wire 1 "" in116addr $end +$var wire 1 #" in117addr $end +$var wire 1 $" in118addr $end +$var wire 1 %" in119addr $end +$var wire 1 &" in11addr $end +$var wire 1 '" in120addr $end +$var wire 1 (" in121addr $end +$var wire 1 )" in122addr $end +$var wire 1 *" in123addr $end +$var wire 1 +" in124addr $end +$var wire 1 ," in125addr $end +$var wire 1 -" in126addr $end +$var wire 1 ." in127addr $end +$var wire 1 /" in128addr $end +$var wire 1 0" in129addr $end +$var wire 1 1" in12addr $end +$var wire 1 2" in130addr $end +$var wire 1 3" in131addr $end +$var wire 1 4" in13addr $end +$var wire 1 5" in14addr $end +$var wire 1 6" in15addr $end +$var wire 1 7" in16addr $end +$var wire 1 8" in17addr $end +$var wire 1 9" in18addr $end +$var wire 1 :" in19addr $end +$var wire 1 ;" invaddr $end +$var wire 32 <" out [31:0] $end +$upscope $end +$scope module adder0 $end +$var wire 4 =" a [3:0] $end +$var wire 1 >" aandb $end +$var wire 1 ?" abandnoror $end +$var wire 1 @" anorb $end +$var wire 4 A" b [3:0] $end +$var wire 1 B" bandsum $end +$var wire 1 C" bnorsum $end +$var wire 1 D" bsumandnornor $end +$var wire 1 E" carryin $end +$var wire 1 K carryout $end +$var wire 1 F" carryout1 $end +$var wire 1 G" carryout2 $end +$var wire 1 H" carryout3 $end +$var wire 1 B overflow $end +$var wire 4 I" sum [3:0] $end +$scope module adder1 $end +$var wire 1 J" a $end +$var wire 1 K" ab $end +$var wire 1 L" acarryin $end +$var wire 1 M" andall $end +$var wire 1 N" andsingleintermediate $end +$var wire 1 O" andsumintermediate $end +$var wire 1 P" b $end +$var wire 1 Q" bcarryin $end +$var wire 1 E" carryin $end +$var wire 1 F" carryout $end +$var wire 1 R" invcarryout $end +$var wire 1 S" orall $end +$var wire 1 T" orpairintermediate $end +$var wire 1 U" orsingleintermediate $end +$var wire 1 V" sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 W" a $end +$var wire 1 X" ab $end +$var wire 1 Y" acarryin $end +$var wire 1 Z" andall $end +$var wire 1 [" andsingleintermediate $end +$var wire 1 \" andsumintermediate $end +$var wire 1 ]" b $end +$var wire 1 ^" bcarryin $end +$var wire 1 F" carryin $end +$var wire 1 G" carryout $end +$var wire 1 _" invcarryout $end +$var wire 1 `" orall $end +$var wire 1 a" orpairintermediate $end +$var wire 1 b" orsingleintermediate $end +$var wire 1 c" sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 d" a $end +$var wire 1 e" ab $end +$var wire 1 f" acarryin $end +$var wire 1 g" andall $end +$var wire 1 h" andsingleintermediate $end +$var wire 1 i" andsumintermediate $end +$var wire 1 j" b $end +$var wire 1 k" bcarryin $end +$var wire 1 G" carryin $end +$var wire 1 H" carryout $end +$var wire 1 l" invcarryout $end +$var wire 1 m" orall $end +$var wire 1 n" orpairintermediate $end +$var wire 1 o" orsingleintermediate $end +$var wire 1 p" sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 q" a $end +$var wire 1 r" ab $end +$var wire 1 s" acarryin $end +$var wire 1 t" andall $end +$var wire 1 u" andsingleintermediate $end +$var wire 1 v" andsumintermediate $end +$var wire 1 w" b $end +$var wire 1 x" bcarryin $end +$var wire 1 H" carryin $end +$var wire 1 K carryout $end +$var wire 1 y" invcarryout $end +$var wire 1 z" orall $end +$var wire 1 {" orpairintermediate $end +$var wire 1 |" orsingleintermediate $end +$var wire 1 }" sum $end +$upscope $end +$upscope $end +$scope module adder1 $end +$var wire 4 ~" a [3:0] $end +$var wire 1 !# aandb $end +$var wire 1 "# abandnoror $end +$var wire 1 ## anorb $end +$var wire 4 $# b [3:0] $end +$var wire 1 %# bandsum $end +$var wire 1 &# bnorsum $end +$var wire 1 '# bsumandnornor $end +$var wire 1 K carryin $end +$var wire 1 L carryout $end +$var wire 1 (# carryout1 $end +$var wire 1 )# carryout2 $end +$var wire 1 *# carryout3 $end +$var wire 1 C overflow $end +$var wire 4 +# sum [3:0] $end +$scope module adder1 $end +$var wire 1 ,# a $end +$var wire 1 -# ab $end +$var wire 1 .# acarryin $end +$var wire 1 /# andall $end +$var wire 1 0# andsingleintermediate $end +$var wire 1 1# andsumintermediate $end +$var wire 1 2# b $end +$var wire 1 3# bcarryin $end +$var wire 1 K carryin $end +$var wire 1 (# carryout $end +$var wire 1 4# invcarryout $end +$var wire 1 5# orall $end +$var wire 1 6# orpairintermediate $end +$var wire 1 7# orsingleintermediate $end +$var wire 1 8# sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 9# a $end +$var wire 1 :# ab $end +$var wire 1 ;# acarryin $end +$var wire 1 <# andall $end +$var wire 1 =# andsingleintermediate $end +$var wire 1 ># andsumintermediate $end +$var wire 1 ?# b $end +$var wire 1 @# bcarryin $end +$var wire 1 (# carryin $end +$var wire 1 )# carryout $end +$var wire 1 A# invcarryout $end +$var wire 1 B# orall $end +$var wire 1 C# orpairintermediate $end +$var wire 1 D# orsingleintermediate $end +$var wire 1 E# sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 F# a $end +$var wire 1 G# ab $end +$var wire 1 H# acarryin $end +$var wire 1 I# andall $end +$var wire 1 J# andsingleintermediate $end +$var wire 1 K# andsumintermediate $end +$var wire 1 L# b $end +$var wire 1 M# bcarryin $end +$var wire 1 )# carryin $end +$var wire 1 *# carryout $end +$var wire 1 N# invcarryout $end +$var wire 1 O# orall $end +$var wire 1 P# orpairintermediate $end +$var wire 1 Q# orsingleintermediate $end +$var wire 1 R# sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 S# a $end +$var wire 1 T# ab $end +$var wire 1 U# acarryin $end +$var wire 1 V# andall $end +$var wire 1 W# andsingleintermediate $end +$var wire 1 X# andsumintermediate $end +$var wire 1 Y# b $end +$var wire 1 Z# bcarryin $end +$var wire 1 *# carryin $end +$var wire 1 L carryout $end +$var wire 1 [# invcarryout $end +$var wire 1 \# orall $end +$var wire 1 ]# orpairintermediate $end +$var wire 1 ^# orsingleintermediate $end +$var wire 1 _# sum $end +$upscope $end +$upscope $end +$scope module adder2 $end +$var wire 4 `# a [3:0] $end +$var wire 1 a# aandb $end +$var wire 1 b# abandnoror $end +$var wire 1 c# anorb $end +$var wire 4 d# b [3:0] $end +$var wire 1 e# bandsum $end +$var wire 1 f# bnorsum $end +$var wire 1 g# bsumandnornor $end +$var wire 1 L carryin $end +$var wire 1 M carryout $end +$var wire 1 h# carryout1 $end +$var wire 1 i# carryout2 $end +$var wire 1 j# carryout3 $end +$var wire 1 D overflow $end +$var wire 4 k# sum [3:0] $end +$scope module adder1 $end +$var wire 1 l# a $end +$var wire 1 m# ab $end +$var wire 1 n# acarryin $end +$var wire 1 o# andall $end +$var wire 1 p# andsingleintermediate $end +$var wire 1 q# andsumintermediate $end +$var wire 1 r# b $end +$var wire 1 s# bcarryin $end +$var wire 1 L carryin $end +$var wire 1 h# carryout $end +$var wire 1 t# invcarryout $end +$var wire 1 u# orall $end +$var wire 1 v# orpairintermediate $end +$var wire 1 w# orsingleintermediate $end +$var wire 1 x# sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 y# a $end +$var wire 1 z# ab $end +$var wire 1 {# acarryin $end +$var wire 1 |# andall $end +$var wire 1 }# andsingleintermediate $end +$var wire 1 ~# andsumintermediate $end +$var wire 1 !$ b $end +$var wire 1 "$ bcarryin $end +$var wire 1 h# carryin $end +$var wire 1 i# carryout $end +$var wire 1 #$ invcarryout $end +$var wire 1 $$ orall $end +$var wire 1 %$ orpairintermediate $end +$var wire 1 &$ orsingleintermediate $end +$var wire 1 '$ sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 ($ a $end +$var wire 1 )$ ab $end +$var wire 1 *$ acarryin $end +$var wire 1 +$ andall $end +$var wire 1 ,$ andsingleintermediate $end +$var wire 1 -$ andsumintermediate $end +$var wire 1 .$ b $end +$var wire 1 /$ bcarryin $end +$var wire 1 i# carryin $end +$var wire 1 j# carryout $end +$var wire 1 0$ invcarryout $end +$var wire 1 1$ orall $end +$var wire 1 2$ orpairintermediate $end +$var wire 1 3$ orsingleintermediate $end +$var wire 1 4$ sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 5$ a $end +$var wire 1 6$ ab $end +$var wire 1 7$ acarryin $end +$var wire 1 8$ andall $end +$var wire 1 9$ andsingleintermediate $end +$var wire 1 :$ andsumintermediate $end +$var wire 1 ;$ b $end +$var wire 1 <$ bcarryin $end +$var wire 1 j# carryin $end +$var wire 1 M carryout $end +$var wire 1 =$ invcarryout $end +$var wire 1 >$ orall $end +$var wire 1 ?$ orpairintermediate $end +$var wire 1 @$ orsingleintermediate $end +$var wire 1 A$ sum $end +$upscope $end +$upscope $end +$scope module adder3 $end +$var wire 4 B$ a [3:0] $end +$var wire 1 C$ aandb $end +$var wire 1 D$ abandnoror $end +$var wire 1 E$ anorb $end +$var wire 4 F$ b [3:0] $end +$var wire 1 G$ bandsum $end +$var wire 1 H$ bnorsum $end +$var wire 1 I$ bsumandnornor $end +$var wire 1 M carryin $end +$var wire 1 N carryout $end +$var wire 1 J$ carryout1 $end +$var wire 1 K$ carryout2 $end +$var wire 1 L$ carryout3 $end +$var wire 1 E overflow $end +$var wire 4 M$ sum [3:0] $end +$scope module adder1 $end +$var wire 1 N$ a $end +$var wire 1 O$ ab $end +$var wire 1 P$ acarryin $end +$var wire 1 Q$ andall $end +$var wire 1 R$ andsingleintermediate $end +$var wire 1 S$ andsumintermediate $end +$var wire 1 T$ b $end +$var wire 1 U$ bcarryin $end +$var wire 1 M carryin $end +$var wire 1 J$ carryout $end +$var wire 1 V$ invcarryout $end +$var wire 1 W$ orall $end +$var wire 1 X$ orpairintermediate $end +$var wire 1 Y$ orsingleintermediate $end +$var wire 1 Z$ sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 [$ a $end +$var wire 1 \$ ab $end +$var wire 1 ]$ acarryin $end +$var wire 1 ^$ andall $end +$var wire 1 _$ andsingleintermediate $end +$var wire 1 `$ andsumintermediate $end +$var wire 1 a$ b $end +$var wire 1 b$ bcarryin $end +$var wire 1 J$ carryin $end +$var wire 1 K$ carryout $end +$var wire 1 c$ invcarryout $end +$var wire 1 d$ orall $end +$var wire 1 e$ orpairintermediate $end +$var wire 1 f$ orsingleintermediate $end +$var wire 1 g$ sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 h$ a $end +$var wire 1 i$ ab $end +$var wire 1 j$ acarryin $end +$var wire 1 k$ andall $end +$var wire 1 l$ andsingleintermediate $end +$var wire 1 m$ andsumintermediate $end +$var wire 1 n$ b $end +$var wire 1 o$ bcarryin $end +$var wire 1 K$ carryin $end +$var wire 1 L$ carryout $end +$var wire 1 p$ invcarryout $end +$var wire 1 q$ orall $end +$var wire 1 r$ orpairintermediate $end +$var wire 1 s$ orsingleintermediate $end +$var wire 1 t$ sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 u$ a $end +$var wire 1 v$ ab $end +$var wire 1 w$ acarryin $end +$var wire 1 x$ andall $end +$var wire 1 y$ andsingleintermediate $end +$var wire 1 z$ andsumintermediate $end +$var wire 1 {$ b $end +$var wire 1 |$ bcarryin $end +$var wire 1 L$ carryin $end +$var wire 1 N carryout $end +$var wire 1 }$ invcarryout $end +$var wire 1 ~$ orall $end +$var wire 1 !% orpairintermediate $end +$var wire 1 "% orsingleintermediate $end +$var wire 1 #% sum $end +$upscope $end +$upscope $end +$scope module adder4 $end +$var wire 4 $% a [3:0] $end +$var wire 1 %% aandb $end +$var wire 1 &% abandnoror $end +$var wire 1 '% anorb $end +$var wire 4 (% b [3:0] $end +$var wire 1 )% bandsum $end +$var wire 1 *% bnorsum $end +$var wire 1 +% bsumandnornor $end +$var wire 1 N carryin $end +$var wire 1 O carryout $end +$var wire 1 ,% carryout1 $end +$var wire 1 -% carryout2 $end +$var wire 1 .% carryout3 $end +$var wire 1 F overflow $end +$var wire 4 /% sum [3:0] $end +$scope module adder1 $end +$var wire 1 0% a $end +$var wire 1 1% ab $end +$var wire 1 2% acarryin $end +$var wire 1 3% andall $end +$var wire 1 4% andsingleintermediate $end +$var wire 1 5% andsumintermediate $end +$var wire 1 6% b $end +$var wire 1 7% bcarryin $end +$var wire 1 N carryin $end +$var wire 1 ,% carryout $end +$var wire 1 8% invcarryout $end +$var wire 1 9% orall $end +$var wire 1 :% orpairintermediate $end +$var wire 1 ;% orsingleintermediate $end +$var wire 1 <% sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 =% a $end +$var wire 1 >% ab $end +$var wire 1 ?% acarryin $end +$var wire 1 @% andall $end +$var wire 1 A% andsingleintermediate $end +$var wire 1 B% andsumintermediate $end +$var wire 1 C% b $end +$var wire 1 D% bcarryin $end +$var wire 1 ,% carryin $end +$var wire 1 -% carryout $end +$var wire 1 E% invcarryout $end +$var wire 1 F% orall $end +$var wire 1 G% orpairintermediate $end +$var wire 1 H% orsingleintermediate $end +$var wire 1 I% sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 J% a $end +$var wire 1 K% ab $end +$var wire 1 L% acarryin $end +$var wire 1 M% andall $end +$var wire 1 N% andsingleintermediate $end +$var wire 1 O% andsumintermediate $end +$var wire 1 P% b $end +$var wire 1 Q% bcarryin $end +$var wire 1 -% carryin $end +$var wire 1 .% carryout $end +$var wire 1 R% invcarryout $end +$var wire 1 S% orall $end +$var wire 1 T% orpairintermediate $end +$var wire 1 U% orsingleintermediate $end +$var wire 1 V% sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 W% a $end +$var wire 1 X% ab $end +$var wire 1 Y% acarryin $end +$var wire 1 Z% andall $end +$var wire 1 [% andsingleintermediate $end +$var wire 1 \% andsumintermediate $end +$var wire 1 ]% b $end +$var wire 1 ^% bcarryin $end +$var wire 1 .% carryin $end +$var wire 1 O carryout $end +$var wire 1 _% invcarryout $end +$var wire 1 `% orall $end +$var wire 1 a% orpairintermediate $end +$var wire 1 b% orsingleintermediate $end +$var wire 1 c% sum $end +$upscope $end +$upscope $end +$scope module adder5 $end +$var wire 4 d% a [3:0] $end +$var wire 1 e% aandb $end +$var wire 1 f% abandnoror $end +$var wire 1 g% anorb $end +$var wire 4 h% b [3:0] $end +$var wire 1 i% bandsum $end +$var wire 1 j% bnorsum $end +$var wire 1 k% bsumandnornor $end +$var wire 1 O carryin $end +$var wire 1 P carryout $end +$var wire 1 l% carryout1 $end +$var wire 1 m% carryout2 $end +$var wire 1 n% carryout3 $end +$var wire 1 G overflow $end +$var wire 4 o% sum [3:0] $end +$scope module adder1 $end +$var wire 1 p% a $end +$var wire 1 q% ab $end +$var wire 1 r% acarryin $end +$var wire 1 s% andall $end +$var wire 1 t% andsingleintermediate $end +$var wire 1 u% andsumintermediate $end +$var wire 1 v% b $end +$var wire 1 w% bcarryin $end +$var wire 1 O carryin $end +$var wire 1 l% carryout $end +$var wire 1 x% invcarryout $end +$var wire 1 y% orall $end +$var wire 1 z% orpairintermediate $end +$var wire 1 {% orsingleintermediate $end +$var wire 1 |% sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 }% a $end +$var wire 1 ~% ab $end +$var wire 1 !& acarryin $end +$var wire 1 "& andall $end +$var wire 1 #& andsingleintermediate $end +$var wire 1 $& andsumintermediate $end +$var wire 1 %& b $end +$var wire 1 && bcarryin $end +$var wire 1 l% carryin $end +$var wire 1 m% carryout $end +$var wire 1 '& invcarryout $end +$var wire 1 (& orall $end +$var wire 1 )& orpairintermediate $end +$var wire 1 *& orsingleintermediate $end +$var wire 1 +& sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 ,& a $end +$var wire 1 -& ab $end +$var wire 1 .& acarryin $end +$var wire 1 /& andall $end +$var wire 1 0& andsingleintermediate $end +$var wire 1 1& andsumintermediate $end +$var wire 1 2& b $end +$var wire 1 3& bcarryin $end +$var wire 1 m% carryin $end +$var wire 1 n% carryout $end +$var wire 1 4& invcarryout $end +$var wire 1 5& orall $end +$var wire 1 6& orpairintermediate $end +$var wire 1 7& orsingleintermediate $end +$var wire 1 8& sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 9& a $end +$var wire 1 :& ab $end +$var wire 1 ;& acarryin $end +$var wire 1 <& andall $end +$var wire 1 =& andsingleintermediate $end +$var wire 1 >& andsumintermediate $end +$var wire 1 ?& b $end +$var wire 1 @& bcarryin $end +$var wire 1 n% carryin $end +$var wire 1 P carryout $end +$var wire 1 A& invcarryout $end +$var wire 1 B& orall $end +$var wire 1 C& orpairintermediate $end +$var wire 1 D& orsingleintermediate $end +$var wire 1 E& sum $end +$upscope $end +$upscope $end +$scope module adder6 $end +$var wire 4 F& a [3:0] $end +$var wire 1 G& aandb $end +$var wire 1 H& abandnoror $end +$var wire 1 I& anorb $end +$var wire 4 J& b [3:0] $end +$var wire 1 K& bandsum $end +$var wire 1 L& bnorsum $end +$var wire 1 M& bsumandnornor $end +$var wire 1 P carryin $end +$var wire 1 Q carryout $end +$var wire 1 N& carryout1 $end +$var wire 1 O& carryout2 $end +$var wire 1 P& carryout3 $end +$var wire 1 H overflow $end +$var wire 4 Q& sum [3:0] $end +$scope module adder1 $end +$var wire 1 R& a $end +$var wire 1 S& ab $end +$var wire 1 T& acarryin $end +$var wire 1 U& andall $end +$var wire 1 V& andsingleintermediate $end +$var wire 1 W& andsumintermediate $end +$var wire 1 X& b $end +$var wire 1 Y& bcarryin $end +$var wire 1 P carryin $end +$var wire 1 N& carryout $end +$var wire 1 Z& invcarryout $end +$var wire 1 [& orall $end +$var wire 1 \& orpairintermediate $end +$var wire 1 ]& orsingleintermediate $end +$var wire 1 ^& sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 _& a $end +$var wire 1 `& ab $end +$var wire 1 a& acarryin $end +$var wire 1 b& andall $end +$var wire 1 c& andsingleintermediate $end +$var wire 1 d& andsumintermediate $end +$var wire 1 e& b $end +$var wire 1 f& bcarryin $end +$var wire 1 N& carryin $end +$var wire 1 O& carryout $end +$var wire 1 g& invcarryout $end +$var wire 1 h& orall $end +$var wire 1 i& orpairintermediate $end +$var wire 1 j& orsingleintermediate $end +$var wire 1 k& sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 l& a $end +$var wire 1 m& ab $end +$var wire 1 n& acarryin $end +$var wire 1 o& andall $end +$var wire 1 p& andsingleintermediate $end +$var wire 1 q& andsumintermediate $end +$var wire 1 r& b $end +$var wire 1 s& bcarryin $end +$var wire 1 O& carryin $end +$var wire 1 P& carryout $end +$var wire 1 t& invcarryout $end +$var wire 1 u& orall $end +$var wire 1 v& orpairintermediate $end +$var wire 1 w& orsingleintermediate $end +$var wire 1 x& sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 y& a $end +$var wire 1 z& ab $end +$var wire 1 {& acarryin $end +$var wire 1 |& andall $end +$var wire 1 }& andsingleintermediate $end +$var wire 1 ~& andsumintermediate $end +$var wire 1 !' b $end +$var wire 1 "' bcarryin $end +$var wire 1 P& carryin $end +$var wire 1 Q carryout $end +$var wire 1 #' invcarryout $end +$var wire 1 $' orall $end +$var wire 1 %' orpairintermediate $end +$var wire 1 &' orsingleintermediate $end +$var wire 1 '' sum $end +$upscope $end +$upscope $end +$scope module adder7 $end +$var wire 4 (' a [3:0] $end +$var wire 1 )' aandb $end +$var wire 1 *' abandnoror $end +$var wire 1 +' anorb $end +$var wire 4 ,' b [3:0] $end +$var wire 1 -' bandsum $end +$var wire 1 .' bnorsum $end +$var wire 1 /' bsumandnornor $end +$var wire 1 Q carryin $end +$var wire 1 4 carryout $end +$var wire 1 0' carryout1 $end +$var wire 1 1' carryout2 $end +$var wire 1 2' carryout3 $end +$var wire 1 5 overflow $end +$var wire 4 3' sum [3:0] $end +$scope module adder1 $end +$var wire 1 4' a $end +$var wire 1 5' ab $end +$var wire 1 6' acarryin $end +$var wire 1 7' andall $end +$var wire 1 8' andsingleintermediate $end +$var wire 1 9' andsumintermediate $end +$var wire 1 :' b $end +$var wire 1 ;' bcarryin $end +$var wire 1 Q carryin $end +$var wire 1 0' carryout $end +$var wire 1 <' invcarryout $end +$var wire 1 =' orall $end +$var wire 1 >' orpairintermediate $end +$var wire 1 ?' orsingleintermediate $end +$var wire 1 @' sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 A' a $end +$var wire 1 B' ab $end +$var wire 1 C' acarryin $end +$var wire 1 D' andall $end +$var wire 1 E' andsingleintermediate $end +$var wire 1 F' andsumintermediate $end +$var wire 1 G' b $end +$var wire 1 H' bcarryin $end +$var wire 1 0' carryin $end +$var wire 1 1' carryout $end +$var wire 1 I' invcarryout $end +$var wire 1 J' orall $end +$var wire 1 K' orpairintermediate $end +$var wire 1 L' orsingleintermediate $end +$var wire 1 M' sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 N' a $end +$var wire 1 O' ab $end +$var wire 1 P' acarryin $end +$var wire 1 Q' andall $end +$var wire 1 R' andsingleintermediate $end +$var wire 1 S' andsumintermediate $end +$var wire 1 T' b $end +$var wire 1 U' bcarryin $end +$var wire 1 1' carryin $end +$var wire 1 2' carryout $end +$var wire 1 V' invcarryout $end +$var wire 1 W' orall $end +$var wire 1 X' orpairintermediate $end +$var wire 1 Y' orsingleintermediate $end +$var wire 1 Z' sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 [' a $end +$var wire 1 \' ab $end +$var wire 1 ]' acarryin $end +$var wire 1 ^' andall $end +$var wire 1 _' andsingleintermediate $end +$var wire 1 `' andsumintermediate $end +$var wire 1 a' b $end +$var wire 1 b' bcarryin $end +$var wire 1 2' carryin $end +$var wire 1 4 carryout $end +$var wire 1 c' invcarryout $end +$var wire 1 d' orall $end +$var wire 1 e' orpairintermediate $end +$var wire 1 f' orsingleintermediate $end +$var wire 1 g' sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module xor0 $end +$var wire 32 h' a [31:0] $end +$var wire 32 i' b [31:0] $end +$var wire 32 j' out [31:0] $end +$upscope $end +$scope module slt0 $end +$var wire 32 k' a [31:0] $end +$var wire 32 l' b [31:0] $end +$var wire 32 m' out [31:0] $end +$var wire 1 n' slt0 $end +$var wire 1 o' slt1 $end +$var wire 1 p' slt10 $end +$var wire 1 q' slt11 $end +$var wire 1 r' slt12 $end +$var wire 1 s' slt13 $end +$var wire 1 t' slt14 $end +$var wire 1 u' slt15 $end +$var wire 1 v' slt16 $end +$var wire 1 w' slt17 $end +$var wire 1 x' slt18 $end +$var wire 1 y' slt19 $end +$var wire 1 z' slt2 $end +$var wire 1 {' slt20 $end +$var wire 1 |' slt21 $end +$var wire 1 }' slt22 $end +$var wire 1 ~' slt23 $end +$var wire 1 !( slt24 $end +$var wire 1 "( slt25 $end +$var wire 1 #( slt26 $end +$var wire 1 $( slt27 $end +$var wire 1 %( slt28 $end +$var wire 1 &( slt29 $end +$var wire 1 '( slt3 $end +$var wire 1 (( slt30 $end +$var wire 1 )( slt4 $end +$var wire 1 *( slt5 $end +$var wire 1 +( slt6 $end +$var wire 1 ,( slt7 $end +$var wire 1 -( slt8 $end +$var wire 1 .( slt9 $end +$scope module bit0 $end +$var wire 1 /( a $end +$var wire 1 0( abxor $end +$var wire 1 1( b $end +$var wire 1 2( bxorand $end +$var wire 1 3( defaultCompare $end +$var wire 1 n' out $end +$var wire 1 4( xornot $end +$var wire 1 5( xornotand $end +$upscope $end +$scope module bit1 $end +$var wire 1 6( a $end +$var wire 1 7( abxor $end +$var wire 1 8( b $end +$var wire 1 9( bxorand $end +$var wire 1 n' defaultCompare $end +$var wire 1 o' out $end +$var wire 1 :( xornot $end +$var wire 1 ;( xornotand $end +$upscope $end +$scope module bit2 $end +$var wire 1 <( a $end +$var wire 1 =( abxor $end +$var wire 1 >( b $end +$var wire 1 ?( bxorand $end +$var wire 1 o' defaultCompare $end +$var wire 1 z' out $end +$var wire 1 @( xornot $end +$var wire 1 A( xornotand $end +$upscope $end +$scope module bit3 $end +$var wire 1 B( a $end +$var wire 1 C( abxor $end +$var wire 1 D( b $end +$var wire 1 E( bxorand $end +$var wire 1 z' defaultCompare $end +$var wire 1 '( out $end +$var wire 1 F( xornot $end +$var wire 1 G( xornotand $end +$upscope $end +$scope module bit4 $end +$var wire 1 H( a $end +$var wire 1 I( abxor $end +$var wire 1 J( b $end +$var wire 1 K( bxorand $end +$var wire 1 '( defaultCompare $end +$var wire 1 )( out $end +$var wire 1 L( xornot $end +$var wire 1 M( xornotand $end +$upscope $end +$scope module bit5 $end +$var wire 1 N( a $end +$var wire 1 O( abxor $end +$var wire 1 P( b $end +$var wire 1 Q( bxorand $end +$var wire 1 )( defaultCompare $end +$var wire 1 *( out $end +$var wire 1 R( xornot $end +$var wire 1 S( xornotand $end +$upscope $end +$scope module bit6 $end +$var wire 1 T( a $end +$var wire 1 U( abxor $end +$var wire 1 V( b $end +$var wire 1 W( bxorand $end +$var wire 1 *( defaultCompare $end +$var wire 1 +( out $end +$var wire 1 X( xornot $end +$var wire 1 Y( xornotand $end +$upscope $end +$scope module bit7 $end +$var wire 1 Z( a $end +$var wire 1 [( abxor $end +$var wire 1 \( b $end +$var wire 1 ]( bxorand $end +$var wire 1 +( defaultCompare $end +$var wire 1 ,( out $end +$var wire 1 ^( xornot $end +$var wire 1 _( xornotand $end +$upscope $end +$scope module bit8 $end +$var wire 1 `( a $end +$var wire 1 a( abxor $end +$var wire 1 b( b $end +$var wire 1 c( bxorand $end +$var wire 1 ,( defaultCompare $end +$var wire 1 -( out $end +$var wire 1 d( xornot $end +$var wire 1 e( xornotand $end +$upscope $end +$scope module bit9 $end +$var wire 1 f( a $end +$var wire 1 g( abxor $end +$var wire 1 h( b $end +$var wire 1 i( bxorand $end +$var wire 1 -( defaultCompare $end +$var wire 1 .( out $end +$var wire 1 j( xornot $end +$var wire 1 k( xornotand $end +$upscope $end +$scope module bit10 $end +$var wire 1 l( a $end +$var wire 1 m( abxor $end +$var wire 1 n( b $end +$var wire 1 o( bxorand $end +$var wire 1 .( defaultCompare $end +$var wire 1 p' out $end +$var wire 1 p( xornot $end +$var wire 1 q( xornotand $end +$upscope $end +$scope module bit11 $end +$var wire 1 r( a $end +$var wire 1 s( abxor $end +$var wire 1 t( b $end +$var wire 1 u( bxorand $end +$var wire 1 p' defaultCompare $end +$var wire 1 q' out $end +$var wire 1 v( xornot $end +$var wire 1 w( xornotand $end +$upscope $end +$scope module bit12 $end +$var wire 1 x( a $end +$var wire 1 y( abxor $end +$var wire 1 z( b $end +$var wire 1 {( bxorand $end +$var wire 1 q' defaultCompare $end +$var wire 1 r' out $end +$var wire 1 |( xornot $end +$var wire 1 }( xornotand $end +$upscope $end +$scope module bit13 $end +$var wire 1 ~( a $end +$var wire 1 !) abxor $end +$var wire 1 ") b $end +$var wire 1 #) bxorand $end +$var wire 1 r' defaultCompare $end +$var wire 1 s' out $end +$var wire 1 $) xornot $end +$var wire 1 %) xornotand $end +$upscope $end +$scope module bit14 $end +$var wire 1 &) a $end +$var wire 1 ') abxor $end +$var wire 1 () b $end +$var wire 1 )) bxorand $end +$var wire 1 s' defaultCompare $end +$var wire 1 t' out $end +$var wire 1 *) xornot $end +$var wire 1 +) xornotand $end +$upscope $end +$scope module bit15 $end +$var wire 1 ,) a $end +$var wire 1 -) abxor $end +$var wire 1 .) b $end +$var wire 1 /) bxorand $end +$var wire 1 t' defaultCompare $end +$var wire 1 u' out $end +$var wire 1 0) xornot $end +$var wire 1 1) xornotand $end +$upscope $end +$scope module bit16 $end +$var wire 1 2) a $end +$var wire 1 3) abxor $end +$var wire 1 4) b $end +$var wire 1 5) bxorand $end +$var wire 1 u' defaultCompare $end +$var wire 1 v' out $end +$var wire 1 6) xornot $end +$var wire 1 7) xornotand $end +$upscope $end +$scope module bit17 $end +$var wire 1 8) a $end +$var wire 1 9) abxor $end +$var wire 1 :) b $end +$var wire 1 ;) bxorand $end +$var wire 1 v' defaultCompare $end +$var wire 1 w' out $end +$var wire 1 <) xornot $end +$var wire 1 =) xornotand $end +$upscope $end +$scope module bit18 $end +$var wire 1 >) a $end +$var wire 1 ?) abxor $end +$var wire 1 @) b $end +$var wire 1 A) bxorand $end +$var wire 1 w' defaultCompare $end +$var wire 1 x' out $end +$var wire 1 B) xornot $end +$var wire 1 C) xornotand $end +$upscope $end +$scope module bit19 $end +$var wire 1 D) a $end +$var wire 1 E) abxor $end +$var wire 1 F) b $end +$var wire 1 G) bxorand $end +$var wire 1 x' defaultCompare $end +$var wire 1 y' out $end +$var wire 1 H) xornot $end +$var wire 1 I) xornotand $end +$upscope $end +$scope module bit20 $end +$var wire 1 J) a $end +$var wire 1 K) abxor $end +$var wire 1 L) b $end +$var wire 1 M) bxorand $end +$var wire 1 y' defaultCompare $end +$var wire 1 {' out $end +$var wire 1 N) xornot $end +$var wire 1 O) xornotand $end +$upscope $end +$scope module bit21 $end +$var wire 1 P) a $end +$var wire 1 Q) abxor $end +$var wire 1 R) b $end +$var wire 1 S) bxorand $end +$var wire 1 {' defaultCompare $end +$var wire 1 |' out $end +$var wire 1 T) xornot $end +$var wire 1 U) xornotand $end +$upscope $end +$scope module bit22 $end +$var wire 1 V) a $end +$var wire 1 W) abxor $end +$var wire 1 X) b $end +$var wire 1 Y) bxorand $end +$var wire 1 |' defaultCompare $end +$var wire 1 }' out $end +$var wire 1 Z) xornot $end +$var wire 1 [) xornotand $end +$upscope $end +$scope module bit23 $end +$var wire 1 \) a $end +$var wire 1 ]) abxor $end +$var wire 1 ^) b $end +$var wire 1 _) bxorand $end +$var wire 1 }' defaultCompare $end +$var wire 1 ~' out $end +$var wire 1 `) xornot $end +$var wire 1 a) xornotand $end +$upscope $end +$scope module bit24 $end +$var wire 1 b) a $end +$var wire 1 c) abxor $end +$var wire 1 d) b $end +$var wire 1 e) bxorand $end +$var wire 1 ~' defaultCompare $end +$var wire 1 !( out $end +$var wire 1 f) xornot $end +$var wire 1 g) xornotand $end +$upscope $end +$scope module bit25 $end +$var wire 1 h) a $end +$var wire 1 i) abxor $end +$var wire 1 j) b $end +$var wire 1 k) bxorand $end +$var wire 1 !( defaultCompare $end +$var wire 1 "( out $end +$var wire 1 l) xornot $end +$var wire 1 m) xornotand $end +$upscope $end +$scope module bit26 $end +$var wire 1 n) a $end +$var wire 1 o) abxor $end +$var wire 1 p) b $end +$var wire 1 q) bxorand $end +$var wire 1 "( defaultCompare $end +$var wire 1 #( out $end +$var wire 1 r) xornot $end +$var wire 1 s) xornotand $end +$upscope $end +$scope module bit27 $end +$var wire 1 t) a $end +$var wire 1 u) abxor $end +$var wire 1 v) b $end +$var wire 1 w) bxorand $end +$var wire 1 #( defaultCompare $end +$var wire 1 $( out $end +$var wire 1 x) xornot $end +$var wire 1 y) xornotand $end +$upscope $end +$scope module bit28 $end +$var wire 1 z) a $end +$var wire 1 {) abxor $end +$var wire 1 |) b $end +$var wire 1 }) bxorand $end +$var wire 1 $( defaultCompare $end +$var wire 1 %( out $end +$var wire 1 ~) xornot $end +$var wire 1 !* xornotand $end +$upscope $end +$scope module bit29 $end +$var wire 1 "* a $end +$var wire 1 #* abxor $end +$var wire 1 $* b $end +$var wire 1 %* bxorand $end +$var wire 1 %( defaultCompare $end +$var wire 1 &( out $end +$var wire 1 &* xornot $end +$var wire 1 '* xornotand $end +$upscope $end +$scope module bit30 $end +$var wire 1 (* a $end +$var wire 1 )* abxor $end +$var wire 1 ** b $end +$var wire 1 +* bxorand $end +$var wire 1 &( defaultCompare $end +$var wire 1 (( out $end +$var wire 1 ,* xornot $end +$var wire 1 -* xornotand $end +$upscope $end +$scope module bit31 $end +$var wire 1 .* a $end +$var wire 1 /* abxor $end +$var wire 1 0* axorand $end +$var wire 1 1* b $end +$var wire 1 (( defaultCompare $end +$var wire 1 2* out $end +$var wire 1 3* xornot $end +$var wire 1 4* xornotand $end +$upscope $end +$upscope $end +$scope module and0 $end +$var wire 32 5* a [31:0] $end +$var wire 32 6* b [31:0] $end +$var wire 32 7* out [31:0] $end +$upscope $end +$scope module nand0 $end +$var wire 32 8* a [31:0] $end +$var wire 32 9* b [31:0] $end +$var wire 32 :* out [31:0] $end +$upscope $end +$scope module nor0 $end +$var wire 32 ;* a [31:0] $end +$var wire 32 <* b [31:0] $end +$var wire 32 =* out [31:0] $end +$upscope $end +$scope module or0 $end +$var wire 32 >* a [31:0] $end +$var wire 32 ?* b [31:0] $end +$var wire 32 @* out [31:0] $end +$upscope $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +b11111111111111111111 @* +b1 ?* +b11111111111111111111 >* +b11111111111100000000000000000000 =* +b1 <* +b11111111111111111111 ;* +b11111111111111111111111111111110 :* +b1 9* +b11111111111111111111 8* +b1 7* +b1 6* +b11111111111111111111 5* +04* +13* +02* +01* +00* +0/* +0.* +0-* +1,* +0+* +0** +0)* +0(* +0'* +1&* +0%* +0$* +0#* +0"* +0!* +1~) +0}) +0|) +0{) +0z) +0y) +1x) +0w) +0v) +0u) +0t) +0s) +1r) +0q) +0p) +0o) +0n) +0m) +1l) +0k) +0j) +0i) +0h) +0g) +1f) +0e) +0d) +0c) +0b) +0a) +1`) +0_) +0^) +0]) +0\) +0[) +1Z) +0Y) +0X) +0W) +0V) +0U) +1T) +0S) +0R) +0Q) +0P) +0O) +1N) +0M) +0L) +0K) +0J) +0I) +0H) +0G) +0F) +1E) +1D) +0C) +0B) +0A) +0@) +1?) +1>) +0=) +0<) +0;) +0:) +19) +18) +07) +06) +05) +04) +13) +12) +01) +00) +0/) +0.) +1-) +1,) +0+) +0*) +0)) +0() +1') +1&) +0%) +0$) +0#) +0") +1!) +1~( +0}( +0|( +0{( +0z( +1y( +1x( +0w( +0v( +0u( +0t( +1s( +1r( +0q( +0p( +0o( +0n( +1m( +1l( +0k( +0j( +0i( +0h( +1g( +1f( +0e( +0d( +0c( +0b( +1a( +1`( +0_( +0^( +0]( +0\( +1[( +1Z( +0Y( +0X( +0W( +0V( +1U( +1T( +0S( +0R( +0Q( +0P( +1O( +1N( +0M( +0L( +0K( +0J( +1I( +1H( +0G( +0F( +0E( +0D( +1C( +1B( +0A( +0@( +0?( +0>( +1=( +1<( +0;( +0:( +09( +08( +17( +16( +05( +14( +03( +02( +11( +00( +1/( +0.( +0-( +0,( +0+( +0*( +0)( +0(( +0'( +0&( +0%( +0$( +0#( +0"( +0!( +0~' +0}' +0|' +0{' +0z' +0y' +0x' +0w' +0v' +0u' +0t' +0s' +0r' +0q' +0p' +0o' +0n' +b0 m' +b1 l' +b11111111111111111111 k' +b11111111111111111110 j' +b1 i' +b11111111111111111111 h' +0g' +0f' +0e' +0d' +1c' +0b' +0a' +0`' +0_' +0^' +0]' +0\' +0[' +0Z' +0Y' +0X' +0W' +1V' +0U' +0T' +0S' +0R' +0Q' +0P' +0O' +0N' +0M' +0L' +0K' +0J' +1I' +0H' +0G' +0F' +0E' +0D' +0C' +0B' +0A' +0@' +0?' +0>' +0=' +1<' +0;' +0:' +09' +08' +07' +06' +05' +04' +b0 3' +02' +01' +00' +0/' +1.' +0-' +b0 ,' +1+' +1*' +0)' +b0 (' +0'' +0&' +0%' +0$' +1#' +0"' +0!' +0~& +0}& +0|& +0{& +0z& +0y& +0x& +0w& +0v& +0u& +1t& +0s& +0r& +0q& +0p& +0o& +0n& +0m& +0l& +0k& +0j& +0i& +0h& +1g& +0f& +0e& +0d& +0c& +0b& +0a& +0`& +0_& +0^& +0]& +0\& +0[& +1Z& +0Y& +0X& +0W& +0V& +0U& +0T& +0S& +0R& +b0 Q& +0P& +0O& +0N& +0M& +1L& +0K& +b0 J& +1I& +1H& +0G& +b0 F& +0E& +0D& +0C& +0B& +1A& +0@& +0?& +0>& +0=& +0<& +0;& +0:& +09& +08& +07& +06& +05& +14& +03& +02& +01& +00& +0/& +0.& +0-& +0,& +0+& +0*& +0)& +0(& +1'& +0&& +0%& +0$& +0#& +0"& +0!& +0~% +0}% +1|% +0{% +0z% +1y% +1x% +0w% +0v% +1u% +0t% +0s% +0r% +0q% +0p% +b1 o% +0n% +0m% +0l% +0k% +1j% +0i% +b0 h% +1g% +1f% +0e% +b0 d% +0c% +1b% +1a% +1`% +0_% +0^% +0]% +0\% +0[% +0Z% +1Y% +0X% +1W% +0V% +1U% +1T% +1S% +0R% +0Q% +0P% +0O% +0N% +0M% +1L% +0K% +1J% +0I% +1H% +1G% +1F% +0E% +0D% +0C% +0B% +0A% +0@% +1?% +0>% +1=% +0<% +1;% +1:% +19% +08% +07% +06% +05% +04% +03% +12% +01% +10% +b0 /% +1.% +1-% +1,% +0+% +1*% +0)% +b0 (% +0'% +0&% +0%% +b1111 $% +0#% +1"% +1!% +1~$ +0}$ +0|$ +0{$ +0z$ +0y$ +0x$ +1w$ +0v$ +1u$ +0t$ +1s$ +1r$ +1q$ +0p$ +0o$ +0n$ +0m$ +0l$ +0k$ +1j$ +0i$ +1h$ +0g$ +1f$ +1e$ +1d$ +0c$ +0b$ +0a$ +0`$ +0_$ +0^$ +1]$ +0\$ +1[$ +0Z$ +1Y$ +1X$ +1W$ +0V$ +0U$ +0T$ +0S$ +0R$ +0Q$ +1P$ +0O$ +1N$ +b0 M$ +1L$ +1K$ +1J$ +0I$ +1H$ +0G$ +b0 F$ +0E$ +0D$ +0C$ +b1111 B$ +0A$ +1@$ +1?$ +1>$ +0=$ +0<$ +0;$ +0:$ +09$ +08$ +17$ +06$ +15$ +04$ +13$ +12$ +11$ +00$ +0/$ +0.$ +0-$ +0,$ +0+$ +1*$ +0)$ +1($ +0'$ +1&$ +1%$ +1$$ +0#$ +0"$ +0!$ +0~# +0}# +0|# +1{# +0z# +1y# +0x# +1w# +1v# +1u# +0t# +0s# +0r# +0q# +0p# +0o# +1n# +0m# +1l# +b0 k# +1j# +1i# +1h# +0g# +1f# +0e# +b0 d# +0c# +0b# +0a# +b1111 `# +0_# +1^# +1]# +1\# +0[# +0Z# +0Y# +0X# +0W# +0V# +1U# +0T# +1S# +0R# +1Q# +1P# +1O# +0N# +0M# +0L# +0K# +0J# +0I# +1H# +0G# +1F# +0E# +1D# +1C# +1B# +0A# +0@# +0?# +0># +0=# +0<# +1;# +0:# +19# +08# +17# +16# +15# +04# +03# +02# +01# +00# +0/# +1.# +0-# +1,# +b0 +# +1*# +1)# +1(# +0'# +1&# +0%# +b0 $# +0## +0"# +0!# +b1111 ~" +0}" +1|" +1{" +1z" +0y" +0x" +0w" +0v" +0u" +0t" +1s" +0r" +1q" +0p" +1o" +1n" +1m" +0l" +0k" +0j" +0i" +0h" +0g" +1f" +0e" +1d" +0c" +1b" +1a" +1`" +0_" +0^" +0]" +0\" +0[" +0Z" +1Y" +0X" +1W" +0V" +1U" +1T" +1S" +0R" +0Q" +1P" +0O" +1N" +0M" +0L" +1K" +1J" +b0 I" +1H" +1G" +1F" +0E" +0D" +1C" +0B" +b1 A" +0@" +0?" +0>" +b1111 =" +b1 <" +1;" +0:" +09" +08" +07" +06" +05" +04" +03" +02" +01" +00" +0/" +0." +0-" +0," +0+" +0*" +0)" +0(" +0'" +0&" +0%" +0$" +0#" +0"" +0!" +0~ +0} +0| +0{ +0z +0y +b11111111111111111111111111111110 x +0w +0v +0u +0t +0s +0r +0q +0p +0o +0n +0m +0l +0k +0j +0i +0h +0g +0f +0e +0d +0c +0b +0a +0` +0_ +0^ +0] +0\ +0[ +0Z +0Y +1X +b1 W +0V +b1 U +b11111111111111111111 T +b11111111111111111111111111111110 S +b1 R +0Q +0P +1O +1N +1M +1L +1K +b0 J +b100000000000000000000 I +0H +0G +0F +0E +0D +0C +0B +0A +0@ +b100000000000000000000 ? +0> +b11111111111111111110 = +b0 < +b11111111111111111111 ; +b11111111111100000000000000000000 : +b11111111111111111111111111111110 9 +b1 8 +b1 7 +b100000000000000000000 6 +05 +04 +b11111111111111111111 3 +b0 2 +bx 1 +bx 0 +x/ +b0 . +b0 - +b0 , +b1 + +b11111111111111111111 * +0) +0( +b100000000000000000000 ' +0& +x% +x$ +z# +z" +z! +$end +#500000 +0> +0& +b11111111111111111111111111111111 ? +b11111111111111111111111111111111 ' +1+% +0*% +1c% +1\% +1_% +1V% +0O +1O% +0a% +1R% +0Y% +1I% +0.% +1B% +0T% +1E% +0L% +1I$ +1<% +b1111 /% +0-% +0H$ +15% +0G% +18% +0?% +1#% +0,% +1z$ +0:% +1}$ +02% +1t$ +0N +1m$ +0!% +1p$ +0w$ +1g$ +0L$ +1`$ +0r$ +1c$ +0j$ +1g# +1Z$ +b1111 M$ +0K$ +0f# +1S$ +0e$ +1V$ +0]$ +1A$ +0J$ +1:$ +0X$ +1=$ +0P$ +14$ +0M +1-$ +0?$ +10$ +07$ +1c' +1'$ +0j# +04 +1~# +02$ +0e' +1#$ +0*$ +1V' +0]' +1'# +1x# +b1111 k# +0i# +02' +0&# +1q# +0%$ +0X' +1t# +0{# +1I' +0P' +1_# +0h# +01' +1X# +0v# +0K' +1[# +0n# +1<' +0C' +1R# +0L +00' +1K# +0]# +0>' +1N# +0U# +1#' +06' +1E# +0*# +0Q +1># +0P# +0%' +1A# +0H# +1t& +0{& +1D" +18# +b1111 +# +0)# +0P& +0C" +11# +0C# +0v& +14# +0;# +1g& +0n& +1}" +0(# +0O& +1v" +06# +0i& +1y" +0.# +1Z& +0a& +1p" +0K +0N& +1i" +0{" +0\& +1l" +0s" +1A& +0T& +1c" +0H" +0P +1\" +0n" +0C& +1_" +0f" +14& +0;& +1V" +b1111 I" +0G" +0n% +1O" +0a" +06& +1R" +0Y" +1'& +0.& +1k% +1M& +1/' +0F" +1|% +0m% +0j% +0L& +0.' +0T" +1u% +0)& +0K" +0N" +1x% +0!& +1+& +18& +1E& +b1111 o% +1^& +1k& +1x& +1'' +b1111 Q& +1@' +1M' +1Z' +1g' +b11111111111111111111111111111111 6 +b11111111111111111111111111111111 I +b1111 3' +0P" +0l% +1$& +11& +1>& +1W& +1d& +1q& +1~& +19' +1F' +1S' +1`' +b0 A" +0z% +1(& +15& +1B& +0f% +1[& +1h& +1u& +1$' +0H& +1=' +1J' +1W' +1d' +0*' +12* +b1 < +b1 m' +b0 R +b0 <" +04( +0r% +1{% +1*& +17& +1D& +0g% +1]& +1j& +1w& +1&' +0I& +1?' +1L' +1Y' +1f' +0+' +0N) +0T) +0Z) +0`) +0f) +0l) +0r) +0x) +0~) +0&* +0,* +10* +03* +b11111111111111111111111111111111 S +b11111111111111111111111111111111 x +0X +10( +b0 7 +b0 7* +b11111111111111111111111111111111 9 +b11111111111111111111111111111111 :* +1p% +1}% +1,& +19& +1R& +1_& +1l& +1y& +14' +1A' +1N' +1[' +b11111111111111111111111111111111 = +b11111111111111111111111111111111 j' +1K) +1Q) +1W) +1]) +1c) +1i) +1o) +1u) +1{) +1#* +1)* +1/* +b0 : +b0 =* +b11111111111111111111111111111111 ; +b11111111111111111111111111111111 @* +01( +b1111 d% +b1111 F& +b1111 (' +1J) +1P) +1V) +1\) +1b) +1h) +1n) +1t) +1z) +1"* +1(* +1.* +b0 + +b0 8 +b0 U +b0 W +b0 i' +b0 l' +b0 6* +b0 9* +b0 <* +b0 ?* +b11111111111111111111111111111111 * +b11111111111111111111111111111111 3 +b11111111111111111111111111111111 T +b11111111111111111111111111111111 h' +b11111111111111111111111111111111 k' +b11111111111111111111111111111111 5* +b11111111111111111111111111111111 8* +b11111111111111111111111111111111 ;* +b11111111111111111111111111111111 >* +b1 - +b1 0 +1/ +b1 1 +b1 . +#1000000 +1A +1) +1> +1& +b0 ? +b0 ' +0/' +1.' +0g' +0`' +0c' +0Z' +14 +0S' +1e' +0V' +1]' +0M' +12' +0F' +1X' +0I' +1P' +0M& +0@' +b0 3' +11' +1L& +09' +1K' +0<' +1C' +0'' +10' +0~& +1>' +0#' +16' +0x& +1Q +0q& +1%' +0t& +1{& +0k& +1P& +0d& +1v& +0g& +1n& +0k% +0^& +b0 Q& +1O& +1j% +0W& +1i& +0Z& +1a& +0E& +1N& +0>& +1\& +0A& +1T& +08& +1P +01& +1C& +04& +1;& +0+& +1n% +0$& +16& +0'& +1.& +0+% +0|% +b0 o% +1m% +1*% +0u% +1)& +0x% +1!& +0c% +1l% +0\% +1z% +0_% +1r% +0V% +1O +0O% +1a% +0R% +1Y% +0I% +1.% +0B% +1T% +0E% +1L% +0I$ +0<% +b0 /% +1-% +1H$ +05% +1G% +08% +1?% +0#% +1,% +0z$ +1:% +0}$ +12% +0t$ +1N +0m$ +1!% +0p$ +1w$ +0g$ +1L$ +0`$ +1r$ +0c$ +1j$ +0g# +0Z$ +b0 M$ +1K$ +1f# +0S$ +1e$ +0V$ +1]$ +0A$ +1J$ +0:$ +1X$ +0=$ +1P$ +04$ +1M +0-$ +1?$ +00$ +17$ +0'$ +1j# +0~# +12$ +0#$ +1*$ +0'# +0x# +b0 k# +1i# +1&# +0q# +1%$ +0t# +1{# +0_# +1h# +0X# +1v# +0[# +1n# +0R# +1L +0K# +1]# +0N# +1U# +0E# +1*# +0># +1P# +0A# +1H# +0D" +08# +b0 +# +1)# +1C" +01# +1C# +04# +1;# +0}" +1(# +0v" +16# +0y" +1.# +0p" +1K +0i" +1{" +0l" +1s" +0c" +1H" +0\" +1n" +0_" +1f" +0V" +b0 6 +b0 I +b0 I" +1G" +0O" +1a" +0R" +1Y" +1F" +1T" +1K" +1N" +1P" +b1 A" +b1 R +b1 <" +14( +0n' +b11111111111111111111111111111110 S +b11111111111111111111111111111110 x +1X +b11111111111111111111111111111110 = +b11111111111111111111111111111110 j' +00( +02( +b1 7 +b1 7* +b11111111111111111111111111111110 9 +b11111111111111111111111111111110 :* +11( +b1 + +b1 8 +b1 U +b1 W +b1 i' +b1 l' +b1 6* +b1 9* +b1 <* +b1 ?* +b10 - +b10 . +#1500000 +0A +0) +0@ +0( +b1110000000000000000000000000001 ? +b1110000000000000000000000000001 ' +1$( +1y) +1#( +1s) +1"( +1m) +1!( +1g) +1~' +1a) +1}' +1[) +1|' +1U) +1{' +1O) +1y' +1I) +1x' +1C) +1w' +1=) +1v' +17) +1u' +11) +1t' +1+) +1s' +1%) +1r' +1}( +1q' +1w( +1p' +1q( +1.( +1k( +1-( +1e( +1,( +1_( +1+( +1Y( +1M' +1*( +1F' +1S( +1I' +1)( +0-' +1@' +01' +1M( +19' +0K' +1'( +0g' +1<' +0C' +1G( +0b' +0^' +15 +1V" +b1 I" +00' +1Z' +b1110000000000000000000000000001 6 +b1110000000000000000000000000001 I +b111 3' +1z' +1*' +1/' +1O" +0>' +1S' +1A( +0U' +1\' +1_' +1)' +0.' +1R" +0`" +1_" +0m" +1l" +0z" +1y" +05# +14# +0B# +1A# +0O# +1N# +0\# +1[# +0u# +1t# +0$$ +1#$ +01$ +10$ +0>$ +1=$ +0W$ +1V$ +0d$ +1c$ +0q$ +1p$ +0~$ +1}$ +09% +18% +0F% +1E% +0S% +1R% +0`% +1_% +0y% +1x% +0(& +1'& +05& +14& +0B& +1A& +0[& +1Z& +0h& +1g& +0u& +1t& +0$' +1#' +06' +1V' +0]' +1o' +1T' +1a' +0F" +0G" +0H" +0K +0(# +0)# +0*# +0L +0h# +0i# +0j# +0M +0J$ +0K$ +0L$ +0N +0,% +0-% +0.% +0O +0l% +0m% +0n% +0P +0N& +0O& +0P& +0Q +02' +1;( +b1100 ,' +14* +0T" +0a" +0n" +0{" +1?" +06# +0C# +0P# +0]# +1"# +0v# +0%$ +02$ +0?$ +1b# +0X$ +0e$ +0r$ +0!% +1D$ +0:% +0G% +0T% +0a% +1&% +0z% +0)& +06& +0C& +1f% +0\& +0i& +0v& +0%' +1H& +0X' +1n' +b11000000000000000000000000000001 R +b11000000000000000000000000000001 <" +1(( +00* +13* +0K" +0N" +0Y" +0b" +0f" +0o" +0s" +0|" +1@" +0.# +07# +0;# +0D# +0H# +0Q# +0U# +0^# +1## +0n# +0w# +0{# +0&$ +0*$ +03$ +07$ +0@$ +1c# +0P$ +0Y$ +0]$ +0f$ +0j$ +0s$ +0w$ +0"% +1E$ +02% +0;% +0?% +0H% +0L% +0U% +0Y% +0b% +1'% +0r% +0{% +0!& +0*& +0.& +07& +0;& +0D& +1g% +0T& +0]& +0a& +0j& +0n& +0w& +0{& +0&' +1I& +0P' +1Y' +12( +04( +1:( +1@( +1F( +1L( +1R( +1X( +1^( +1d( +1j( +1p( +1v( +1|( +1$) +1*) +10) +16) +1<) +1B) +1H) +1N) +1T) +1Z) +1`) +1f) +1l) +1r) +1x) +b111111111111111111111111111110 S +b111111111111111111111111111110 x +1o +1p +1+* +0/* +0J" +0W" +0d" +0q" +0,# +09# +0F# +0S# +0l# +0y# +0($ +05$ +0N$ +0[$ +0h$ +0u$ +00% +0=% +0J% +0W% +0p% +0}% +0,& +09& +0R& +0_& +0l& +0y& +0N' +b1110000000000000000000000000001 = +b1110000000000000000000000000001 j' +10( +07( +0=( +0C( +0I( +0O( +0U( +0[( +0a( +0g( +0m( +0s( +0y( +0!) +0') +0-) +03) +09) +0?) +0E) +0K) +0Q) +0W) +0]) +0c) +0i) +0o) +0u) +b10000000000000000000000000000000 7 +b10000000000000000000000000000000 7* +b1111111111111111111111111111111 9 +b1111111111111111111111111111111 :* +b1111111111111111111111111110 : +b1111111111111111111111111110 =* +b11110000000000000000000000000001 ; +b11110000000000000000000000000001 @* +1** +11* +b0 =" +b0 ~" +b0 `# +b0 B$ +b0 $% +b0 d% +b0 F& +b1011 (' +0/( +06( +0<( +0B( +0H( +0N( +0T( +0Z( +0`( +0f( +0l( +0r( +0x( +0~( +0&) +0,) +02) +08) +0>) +0D) +0J) +0P) +0V) +0\) +0b) +0h) +0n) +0t) +0(* +b11000000000000000000000000000001 + +b11000000000000000000000000000001 8 +b11000000000000000000000000000001 U +b11000000000000000000000000000001 W +b11000000000000000000000000000001 i' +b11000000000000000000000000000001 l' +b11000000000000000000000000000001 6* +b11000000000000000000000000000001 9* +b11000000000000000000000000000001 <* +b11000000000000000000000000000001 ?* +b10110000000000000000000000000000 * +b10110000000000000000000000000000 3 +b10110000000000000000000000000000 T +b10110000000000000000000000000000 h' +b10110000000000000000000000000000 k' +b10110000000000000000000000000000 5* +b10110000000000000000000000000000 8* +b10110000000000000000000000000000 ;* +b10110000000000000000000000000000 >* +b11 - +b11 . +#3500000 +b1000000000010110110011010101101 ? +b1000000000010110110011010101101 ' +1@ +1( +1<% +1)% +15% +1g$ +0}$ +19% +1I% +1c% +b1011 /% +1D" +1'# +0r' +0v' +1`$ +1N +1E +1B% +1\% +0C" +0&# +0G$ +0}( +07) +1d$ +1!% +1I$ +1F% +1`% +0&% +0+% +0)( +0+( +0-( +0q' +0u' +1&( +1f$ +1v$ +1y$ +1C$ +0H$ +1H% +1b% +0'% +0*% +1p" +1}" +b1101 I" +1E# +1_# +b1010 +# +1'$ +14$ +b110 k# +1t$ +0#% +b110 M$ +0@' +0M' +b1000000000010110110011010101101 6 +b1000000000010110110011010101101 I +b100 3' +0M( +0Y( +0e( +0w( +01) +1'* +1a$ +1{$ +1C% +1]% +1i" +1v" +1># +1X# +1~# +1-$ +1m$ +0z$ +09' +0F' +0z' +0'( +0*( +0,( +0.( +0p' +0t' +1%( +b1010 F$ +b1010 (% +0%) +0=) +0I) +1m" +1z" +0?" +1B# +1\# +0"# +1$$ +11$ +1q$ +1~$ +1D$ +0=' +0J' +0A( +0G( +0S( +0_( +0k( +0q( +0+) +1!* +b11000000000010101010000000000001 R +b11000000000010101010000000000001 <" +1#) +0$) +1;) +0<) +1G) +0H) +1o" +1|" +0@" +1D# +1^# +0## +1&$ +13$ +1s$ +1"% +0E$ +0?' +0L' +0@( +0F( +0R( +0^( +0j( +0p( +0*) +1~) +1&* +b111111111101010101111111111110 S +b111111111101010101111111111110 x +1\ +1^ +1` +1b +1!) +19) +1E) +1d" +1q" +19# +1S# +1y# +1($ +1h$ +1u$ +04' +0A' +b1000000000010100110011010101101 = +b1000000000010100110011010101101 j' +1=( +1C( +1O( +1[( +1g( +1m( +1') +0{) +0#* +b10000000000000001000000000000000 7 +b10000000000000001000000000000000 7* +b1111111111111110111111111111111 9 +b1111111111111110111111111111111 :* +b111111111101010001100101010010 : +b111111111101010001100101010010 =* +b11000000000010101110011010101101 ; +b11000000000010101110011010101101 @* +1") +1.) +1:) +1F) +b1100 =" +b1010 ~" +b110 `# +b1100 B$ +b1000 (' +1<( +1B( +1N( +1Z( +1f( +1l( +1&) +1,) +0z) +0"* +b11000000000010101010000000000001 + +b11000000000010101010000000000001 8 +b11000000000010101010000000000001 U +b11000000000010101010000000000001 W +b11000000000010101010000000000001 i' +b11000000000010101010000000000001 l' +b11000000000010101010000000000001 6* +b11000000000010101010000000000001 9* +b11000000000010101010000000000001 <* +b11000000000010101010000000000001 ?* +b10000000000000001100011010101100 * +b10000000000000001100011010101100 3 +b10000000000000001100011010101100 T +b10000000000000001100011010101100 h' +b10000000000000001100011010101100 k' +b10000000000000001100011010101100 5* +b10000000000000001100011010101100 8* +b10000000000000001100011010101100 ;* +b10000000000000001100011010101100 >* +b0 0 +b0 1 +b100 . +#5500000 +0@ +0( +1> +1& +b11111111111111111110 ? +b11111111111111111110 ' +0V' +1b' +12' +0I' +1U' +11' +0<' +1H' +0&( +10' +0'* +0#' +1;' +0%( +1Q +0!* +0t& +1"' +0$( +1P& +0y) +0g& +1s& +0#( +1O& +0s) +0Z& +1f& +0"( +1N& +0m) +0A& +1Y& +0-' +0!( +1P +1G$ +0g) +0F +04& +1@& +0g' +0~' +1n% +0i% +0K& +1#% +0`' +0a) +0v" +0># +0X# +0~# +0-$ +1t$ +0z$ +1<% +0'& +13& +1x$ +1@% +1Z% +0}' +0V" +0i" +0y" +1.# +13# +1/# +04# +1;# +1@# +1<# +0A# +1H# +1M# +1I# +0N# +1U# +1Z# +1V# +0[# +1n# +1s# +1o# +0t# +1{# +1"$ +1|# +0#$ +1*$ +1/$ +1+$ +00$ +17$ +1<$ +18$ +0=$ +1P$ +1U$ +1Q$ +0V$ +1]$ +1^$ +0m$ +0}$ +1m% +0+& +08& +0E& +0^& +0k& +0x& +0'' +b0 Q& +0@' +0M' +0Z' +b0 3' +1b$ +1D% +0[) +1e# +1g$ +1I% +1c% +0|% +b0 o% +0l" +1s" +1x" +1t" +1K +1(# +1)# +1*# +1L +1h# +1i# +1j# +1M +0D +1J$ +0p$ +1w$ +1|$ +1N +0E +0R% +1Y% +1^% +0x% +1&& +0$& +01& +0>& +0W& +0d& +0q& +0~& +09' +0F' +0S' +0|' +0`$ +05% +0B% +0\% +0u% +1Z" +1n" +1H" +1{" +1?" +0D" +16# +1C# +1P# +1]# +1"# +0'# +1v# +1%$ +12$ +1?$ +0g# +1X$ +1r$ +1L$ +1!% +1D$ +0I$ +13% +1T% +1.% +0+% +1l% +1(& +15& +1B& +0f% +1k% +1[& +1h& +1u& +1$' +0H& +1M& +1=' +1J' +1W' +1d' +1/' +0U) +0_" +1f" +1g" +18# +1R# +b1111 +# +1x# +1A$ +b1111 k# +1Z$ +b1111 M$ +0c$ +1j$ +1k$ +08% +1?% +0E% +1L% +1M% +1V% +b1111 /% +0_% +1y% +0c' +0P" +1X" +1^" +1[" +1e" +1k" +1h" +1r" +1u" +1>" +1B" +1-# +10# +1:# +1=# +1G# +1J# +1T# +1W# +1!# +1%# +1m# +1p# +1z# +1}# +1)$ +1,$ +16$ +19$ +1a# +0f# +1O$ +1R$ +1i$ +1o$ +1l$ +1v$ +1y$ +1C$ +0H$ +11% +17% +14% +1K% +1Q% +1N% +1)% +1w% +1{% +1*& +17& +1D& +0g% +0j% +1]& +1j& +1w& +1&' +0I& +0L& +1?' +1L' +1Y' +1f' +0+' +0.' +1c" +b11111111111111111110 6 +b11111111111111111110 I +b1110 I" +0{' +02* +b0 < +b0 m' +1G" +01# +0K# +0q# +0:$ +0S$ +1K$ +1,% +1-% +0O% +1O +14 +05 +0o' +0x' +1]" +1j" +1w" +12# +1?# +1L# +1Y# +1r# +1!$ +1.$ +1;$ +1T$ +1a$ +1n$ +1{$ +16% +1C% +1P% +1]% +1v% +1%& +12& +1?& +1X& +1e& +1r& +1!' +1:' +1G' +1T' +1a' +0O" +0\" +1} +1!" +1#" +1%" +12" +13" +0O) +0-* +04* +1T" +0M" +1a" +15# +1O# +1u# +1>$ +1b# +1W$ +1e$ +1:% +1G% +1S% +1a% +1&% +0e' +0*' +0n' +0;( +0C) +b1110 A" +b1111 $# +b1111 d# +b1111 F$ +b1111 (% +b1111 h% +b1111 J& +b1111 ,' +0R" +1`" +0s' +00) +0w' +0y' +1,* +0(( +0K" +1L" +0N" +1Y" +1b" +17# +1Q# +1w# +1@$ +0c# +1Y$ +1\$ +1_$ +12% +1;% +1>% +1A% +1U% +1X% +1[% +1%% +0\' +0_' +0)' +02( +14( +0:( +0L( +0X( +0d( +0v( +0|( +06) +0B) +0X +b11111111111111111111111111111110 R +b11111111111111111111111111111110 <" +1F" +b11111111111111111111111111111110 S +b11111111111111111111111111111110 x +0\ +0^ +0` +0b +0o +0p +0#) +1-) +0;) +0G) +0)* +0+* +1J" +1W" +1,# +1F# +1l# +15$ +1N$ +1[$ +10% +1=% +1J% +1W% +0[' +b11111111111111111110 = +b11111111111111111110 j' +00( +17( +1I( +1U( +1a( +1s( +1y( +13) +1?) +b1 7 +b1 7* +b11111111111111111111111111111110 9 +b11111111111111111111111111111110 :* +b11111111111100000000000000000000 : +b11111111111100000000000000000000 =* +b11111111111111111111 ; +b11111111111111111111 @* +0;" +1&" +11" +14" +15" +16" +17" +18" +19" +1:" +1z +1{ +1| +1~ +1"" +1$" +1'" +1(" +1)" +1*" +1+" +1," +1-" +1." +1/" +10" +0Q" +0") +0.) +0:) +0F) +0** +01* +b1111 =" +b1111 ~" +b1111 `# +b1111 B$ +b1111 $% +b0 (' +1/( +16( +1H( +1T( +1`( +1r( +1x( +1~( +12) +18) +1>) +1D) +0.* +1V +1E" +b1 + +b1 8 +b1 U +b1 W +b1 i' +b1 l' +b1 6* +b1 9* +b1 <* +b1 ?* +b11111111111111111111 * +b11111111111111111111 3 +b11111111111111111111 T +b11111111111111111111 h' +b11111111111111111111 k' +b11111111111111111111 5* +b11111111111111111111 8* +b11111111111111111111 ;* +b11111111111111111111 >* +b1 , +b1 2 +b1 J +b100 - +b1 0 +b1 1 +b101 . +#7500000 +0@ +0( +b11111111111111111111111111111111 ? +b11111111111111111111111111111111 ' +1V" +b1111 I" +1M" +1K" +1Q" +1N" +0k% +0M& +0/' +1P" +1i% +1K& +1-' +b1111 A" +b11111111111111111111111111111111 R +b11111111111111111111111111111111 <" +1|% +1+& +18& +1E& +b1111 o% +0G +1^& +1k& +1x& +1'' +b1111 Q& +0H +1@' +1M' +1Z' +1g' +b11111111111111111111111111111111 6 +b11111111111111111111111111111111 I +b1111 3' +05 +1y +1z% +1s% +1)& +1"& +16& +1/& +1C& +1<& +1f% +1\& +1U& +1i& +1b& +1v& +1o& +1%' +1|& +1H& +1>' +17' +1K' +1D' +1X' +1Q' +1e' +1^' +1*' +12* +b1 < +b1 m' +04( +1q% +1r% +1t% +1~% +1!& +1#& +1-& +1.& +10& +1:& +1;& +1=& +1e% +1S& +1T& +1V& +1`& +1a& +1c& +1m& +1n& +1p& +1z& +1{& +1}& +1G& +15' +16' +18' +1B' +1C' +1E' +1O' +1P' +1R' +1\' +1]' +1_' +1)' +0N) +0T) +0Z) +0`) +0f) +0l) +0r) +0x) +0~) +0&* +0,* +10* +03* +b11111111111111111111111111111111 S +b11111111111111111111111111111111 x +10( +b0 7 +b0 7* +b11111111111111111111111111111111 9 +b11111111111111111111111111111111 :* +1p% +1}% +1,& +19& +1R& +1_& +1l& +1y& +14' +1A' +1N' +1[' +b11111111111111111111111111111111 = +b11111111111111111111111111111111 j' +1K) +1Q) +1W) +1]) +1c) +1i) +1o) +1u) +1{) +1#* +1)* +1/* +b0 : +b0 =* +b11111111111111111111111111111111 ; +b11111111111111111111111111111111 @* +01( +b1111 d% +b1111 F& +b1111 (' +1J) +1P) +1V) +1\) +1b) +1h) +1n) +1t) +1z) +1"* +1(* +1.* +b0 + +b0 8 +b0 U +b0 W +b0 i' +b0 l' +b0 6* +b0 9* +b0 <* +b0 ?* +b11111111111111111111111111111111 * +b11111111111111111111111111111111 3 +b11111111111111111111111111111111 T +b11111111111111111111111111111111 h' +b11111111111111111111111111111111 k' +b11111111111111111111111111111111 5* +b11111111111111111111111111111111 8* +b11111111111111111111111111111111 ;* +b11111111111111111111111111111111 >* +b0 0 +b0 1 +b110 . +#9500000 +0> +0& +b11101111111111111111111111111111 ? +b11101111111111111111111111111111 ' +1~& +0@' +1#' +06' +0;' +07' +1q& +0Q +1t& +0"' +1d& +0P& +1g& +0s& +1W& +0O& +1Z& +0f& +1>& +0N& +1$( +1A& +0Y& +1y) +11& +0P +1#( +14& +0@& +1s) +1$& +0n% +1"( +1'& +03& +1m) +1u% +0m% +1!( +1x% +0&& +1g) +1\% +0l% +1~' +1_% +0w% +1a) +1O% +0O +1}' +1R% +0^% +1[) +1B% +0.% +1|' +1E% +0Q% +1U) +15% +0-% +1{' +18% +0D% +1O) +1z$ +0,% +1y' +1}$ +07% +1I) +1m$ +0N +1x' +1p$ +0|$ +1C) +1`$ +0L$ +1w' +1c$ +0o$ +1=) +1S$ +0K$ +1v' +1V$ +0b$ +17) +1:$ +0J$ +1u' +1=$ +0U$ +11) +1-$ +0M +1t' +10$ +0<$ +1+) +1~# +0j# +1s' +1#$ +0/$ +1%) +1q# +0i# +1r' +1t# +0"$ +1}( +1X# +0h# +1q' +1[# +0s# +1w( +1K# +0L +1p' +1N# +0Z# +1q( +1># +0*# +1.( +1A# +0M# +1k( +11# +0)# +1-( +14# +0@# +1e( +1v" +0(# +1,( +1y" +03# +1_( +1i" +0K +1+( +1l" +0x" +1`' +1Y( +1\" +0H" +1c' +1*( +1_" +0k" +04 +0.' +1S( +1O" +0G" +1S' +0e' +1)( +1R" +0^" +1V' +0]' +1g' +1M( +0F" +02' +0^' +0*' +1/' +1'( +0Q" +0U" +0U' +0Y' +0\' +0b' +0_' +0)' +0-' +0D" +0'# +0g# +0I$ +0+% +0k% +0M& +1G( +0P" +0T' +0a' +1B" +1%# +1e# +1G$ +1)% +1i% +1K& +1z' +b1110 A" +b11 ,' +1A( +b111111111111111111111111111110 R +b111111111111111111111111111110 <" +1V" +1c" +1p" +1}" +b1111 I" +18# +1E# +1R# +1_# +b1111 +# +1x# +1'$ +14$ +1A$ +b1111 k# +1Z$ +1g$ +1t$ +1#% +b1111 M$ +1<% +1I% +1V% +1c% +b1111 /% +1|% +1+& +18& +1E& +b1111 o% +1^& +1k& +1x& +1'' +b1111 Q& +1Z' +b11101111111111111111111111111111 6 +b11101111111111111111111111111111 I +b1110 3' +1o' +0y +02" +03" +14* +0T" +0M" +0a" +0Z" +0n" +0g" +0{" +0t" +0?" +06# +0/# +0C# +0<# +0P# +0I# +0]# +0V# +0"# +0v# +0o# +0%$ +0|# +02$ +0+$ +0?$ +08$ +0b# +0X$ +0Q$ +0e$ +0^$ +0r$ +0k$ +0!% +0x$ +0D$ +0:% +03% +0G% +0@% +0T% +0M% +0a% +0Z% +0&% +0z% +0s% +0)& +0"& +06& +0/& +0C& +0<& +0f% +0\& +0U& +0i& +0b& +0v& +0o& +0%' +0|& +0H& +0X' +0Q' +1;( +1n' +1(( +00* +13* +0K" +0L" +0N" +0X" +0Y" +0[" +0e" +0f" +0h" +0r" +0s" +0u" +0>" +0-# +0.# +00# +0:# +0;# +0=# +0G# +0H# +0J# +0T# +0U# +0W# +0!# +0m# +0n# +0p# +0z# +0{# +0}# +0)$ +0*$ +0,$ +06$ +07$ +09$ +0a# +0O$ +0P$ +0R$ +0\$ +0]$ +0_$ +0i$ +0j$ +0l$ +0v$ +0w$ +0y$ +0C$ +01% +02% +04% +0>% +0?% +0A% +0K% +0L% +0N% +0X% +0Y% +0[% +0%% +0q% +0r% +0t% +0~% +0!& +0#& +0-& +0.& +00& +0:& +0;& +0=& +0e% +0S& +0T& +0V& +0`& +0a& +0c& +0m& +0n& +0p& +0z& +0{& +0}& +0G& +0O' +0P' +0R' +1:( +1@( +1F( +1L( +1R( +1X( +1^( +1d( +1j( +1p( +1v( +1|( +1$) +1*) +10) +16) +1<) +1B) +1H) +1N) +1T) +1Z) +1`) +1f) +1l) +1r) +1x) +b111111111111111111111111111110 S +b111111111111111111111111111110 x +12( +1+* +0/* +b10000000000000000000000000000000 7 +b10000000000000000000000000000000 7* +b1111111111111111111111111111111 9 +b1111111111111111111111111111111 :* +0J" +0W" +0d" +0q" +0,# +09# +0F# +0S# +0l# +0y# +0($ +05$ +0N$ +0[$ +0h$ +0u$ +00% +0=% +0J% +0W% +0p% +0}% +0,& +09& +0R& +0_& +0l& +0y& +0N' +b1110000000000000000000000000001 = +b1110000000000000000000000000001 j' +07( +0=( +0C( +0I( +0O( +0U( +0[( +0a( +0g( +0m( +0s( +0y( +0!) +0') +0-) +03) +09) +0?) +0E) +0K) +0Q) +0W) +0]) +0c) +0i) +0o) +0u) +b1111111111111111111111111110 : +b1111111111111111111111111110 =* +b11110000000000000000000000000001 ; +b11110000000000000000000000000001 @* +11( +1** +11* +b0 =" +b0 ~" +b0 `# +b0 B$ +b0 $% +b0 d% +b0 F& +b1011 (' +0/( +06( +0<( +0B( +0H( +0N( +0T( +0Z( +0`( +0f( +0l( +0r( +0x( +0~( +0&) +0,) +02) +08) +0>) +0D) +0J) +0P) +0V) +0\) +0b) +0h) +0n) +0t) +0(* +b11000000000000000000000000000001 + +b11000000000000000000000000000001 8 +b11000000000000000000000000000001 U +b11000000000000000000000000000001 W +b11000000000000000000000000000001 i' +b11000000000000000000000000000001 l' +b11000000000000000000000000000001 6* +b11000000000000000000000000000001 9* +b11000000000000000000000000000001 <* +b11000000000000000000000000000001 ?* +b10110000000000000000000000000000 * +b10110000000000000000000000000000 3 +b10110000000000000000000000000000 T +b10110000000000000000000000000000 h' +b10110000000000000000000000000000 k' +b10110000000000000000000000000000 5* +b10110000000000000000000000000000 8* +b10110000000000000000000000000000 ;* +b10110000000000000000000000000000 >* +b111 . +#11500000 +b10111111111101100010011010101011 ? +b10111111111101100010011010101011 ' +1*% +1g# +1H$ +0C +0e# +0Z$ +0c% +0'# +0S$ +0#% +0\% +0F +08# +0R# +1%# +0x# +0A$ +0V$ +0<% +b110 /% +0Z' +0I$ +0`% +1&% +0+% +01# +0K# +0q# +0:$ +1J$ +05% +1F' +0S' +0r' +0v' +0f$ +0G$ +0H% +0b% +1'% +0)% +0p" +b1011 I" +04# +1;# +1@# +1<# +1E# +0N# +1U# +1Z# +1V# +1_# +b1010 +# +0t# +1{# +1"$ +1|# +1'$ +b110 k# +0=$ +1U$ +0t$ +b10 M$ +08% +1@' +1I' +0W' +0}( +07) +0a$ +0{$ +0C% +0]% +0i" +0v" +1(# +0># +1*# +0X# +1h# +0~# +0-$ +1M +0m$ +0z$ +1,% +19' +01' +0)( +0+( +0-( +0q' +0u' +1&( +b101 F$ +b101 (% +0l" +1s" +1x" +1t" +0y" +13# +0A# +1M# +0[# +1s# +0#$ +1*$ +1/$ +1+$ +00$ +1<$ +0p$ +1w$ +0|$ +0x$ +0}$ +17% +1<' +0H' +0M( +0Y( +0e( +0w( +01) +1'* +b111111111101010101111111111110 R +b111111111101010101111111111110 <" +1H" +1K +1)# +1L +1i# +1j# +1L$ +1N +00' +1M' +b10111111111101100010011010101011 6 +b10111111111101100010011010101011 I +b1011 3' +0z' +0'( +0*( +0,( +0.( +0p' +0t' +1%( +0} +0!" +0#" +0%" +0%) +0=) +0I) +1n" +1{" +1?" +1C# +1]# +1"# +1%$ +12$ +1r$ +1!% +0D$ +0>' +0K' +0D' +0A( +0G( +0S( +0_( +0k( +0q( +0+) +1!* +1#) +0$) +1;) +0<) +1G) +0H) +1e" +1h" +1r" +1u" +1>" +1:# +1=# +1T# +1W# +1!# +1z# +1}# +1)$ +1,$ +1i$ +1l$ +0v$ +0y$ +0C$ +05' +08' +0B' +0C' +0E' +0@( +0F( +0R( +0^( +0j( +0p( +0*) +1~) +1&* +b111111111101010101111111111110 S +b111111111101010101111111111110 x +1!) +19) +1E) +1d" +1q" +19# +1S# +1y# +1($ +1h$ +1u$ +04' +0A' +b1000000000010100110011010101101 = +b1000000000010100110011010101101 j' +1=( +1C( +1O( +1[( +1g( +1m( +1') +0{) +0#* +b10000000000000001000000000000000 7 +b10000000000000001000000000000000 7* +b1111111111111110111111111111111 9 +b1111111111111110111111111111111 :* +b111111111101010001100101010010 : +b111111111101010001100101010010 =* +b11000000000010101110011010101101 ; +b11000000000010101110011010101101 @* +1") +1.) +1:) +1F) +b1100 =" +b1010 ~" +b110 `# +b1100 B$ +b1000 (' +1<( +1B( +1N( +1Z( +1f( +1l( +1&) +1,) +0z) +0"* +b11000000000010101010000000000001 + +b11000000000010101010000000000001 8 +b11000000000010101010000000000001 U +b11000000000010101010000000000001 W +b11000000000010101010000000000001 i' +b11000000000010101010000000000001 l' +b11000000000010101010000000000001 6* +b11000000000010101010000000000001 9* +b11000000000010101010000000000001 <* +b11000000000010101010000000000001 ?* +b10000000000000001100011010101100 * +b10000000000000001100011010101100 3 +b10000000000000001100011010101100 T +b10000000000000001100011010101100 h' +b10000000000000001100011010101100 k' +b10000000000000001100011010101100 5* +b10000000000000001100011010101100 8* +b10000000000000001100011010101100 ;* +b10000000000000001100011010101100 >* +b101 - +b1 0 +b1 1 +b1000 . +#13500000 +1@ +1( +b10111111111101010101111111111111 ? +b10111111111101010101111111111111 ' +0g# +1e# +1Z$ +0g$ +1S$ +0`$ +1A$ +1V$ +0d$ +1:$ +0J$ +1r' +1=$ +0U$ +1}( +1-$ +0M +1q' +10$ +0<$ +1w( +1~# +0j# +1p' +1x# +1#$ +0/$ +1q( +1q# +0i# +1.( +1t# +0"$ +1k( +1X# +0h# +1-( +1R# +1[# +0s# +1e( +1K# +0L +1,( +1N# +0Z# +1_( +1># +0*# +1+( +18# +1A# +0M# +1Y( +0V' +11# +0)# +1*( +12' +14# +0@# +1<% +0I% +b101 /% +1S( +1X' +1v" +0(# +15% +0B% +1/' +1)( +1O' +1R' +1p" +1y" +03# +0D" +0'# +1t$ +b101 M$ +18% +0F% +0.' +1M( +1T' +1i" +0K +1B" +1%# +1m$ +0,% +1'( +b111 ,' +1l" +0x" +1p$ +0~$ +1}$ +07% +0Z' +1g' +b1011 3' +1G( +1v' +b1111111111101010101111111111110 R +b1111111111101010101111111111110 <" +0H" +1}" +b1111 I" +1E# +1_# +b1111 +# +1'$ +14$ +b10111111111101010101111111111111 6 +b10111111111101010101111111111111 I +b1111 k# +0L$ +0N +0S' +1`' +15 +1z' +1t' +17) +02* +b0 < +b0 m' +12" +0n" +0{" +0t" +0?" +0C# +0<# +0]# +0V# +0"# +0%$ +0|# +02$ +0+$ +0r$ +0!% +1D$ +1W' +1d' +1*' +1A( +1+) +1u' +04* +0(( +0e" +0h" +0r" +0s" +0u" +0>" +0:# +0;# +0=# +0T# +0U# +0W# +0!# +0z# +0{# +0}# +0)$ +0*$ +0,$ +0i$ +0l$ +0w$ +0"% +1E$ +1Y' +0f' +1+' +1@( +1F( +1R( +1^( +1j( +1p( +1*) +1/) +00) +03* +b1111111111101010101111111111110 S +b1111111111101010101111111111110 x +0+* +0d" +0q" +09# +0S# +0y# +0($ +0h$ +0u$ +1N' +0[' +b11000000000010101010000000000001 = +b11000000000010101010000000000001 j' +0=( +0C( +0O( +0[( +0g( +0m( +0') +1-) +1/* +b0 7 +b0 7* +b11111111111111111111111111111111 9 +b11111111111111111111111111111111 :* +b111111111101010101111111111110 : +b111111111101010101111111111110 =* +b11000000000010101010000000000001 ; +b11000000000010101010000000000001 @* +0** +b0 =" +b0 ~" +b0 `# +b0 B$ +b100 (' +0<( +0B( +0N( +0Z( +0f( +0l( +0&) +0,) +1(* +0.* +b10000000000010101010000000000001 + +b10000000000010101010000000000001 8 +b10000000000010101010000000000001 U +b10000000000010101010000000000001 W +b10000000000010101010000000000001 i' +b10000000000010101010000000000001 l' +b10000000000010101010000000000001 6* +b10000000000010101010000000000001 9* +b10000000000010101010000000000001 <* +b10000000000010101010000000000001 ?* +b1000000000000000000000000000000 * +b1000000000000000000000000000000 3 +b1000000000000000000000000000000 T +b1000000000000000000000000000000 h' +b1000000000000000000000000000000 k' +b1000000000000000000000000000000 5* +b1000000000000000000000000000000 8* +b1000000000000000000000000000000 ;* +b1000000000000000000000000000000 >* +b110 - +b1001 . +#15500000 +1> +1& +1@ +1( +b111111111101010101111111111111 ? +b111111111101010101111111111111 ' +0W' +1/' +0Y' +1\' +1_' +1)' +0-' +0Z' +0g' +b111111111101010101111111111111 6 +b111111111101010101111111111111 I +b11 3' +0T' +1a' +0S' +0`' +b1011 ,' +1V' +0c' +b10111111111101010101111111111110 R +b10111111111101010101111111111110 <" +02' +14 +15 +02" +13" +0X' +1e' +1*' +1(( +0O' +0R' +0]' +1f' +0+' +12* +b1 < +b1 m' +b10111111111101010101111111111110 S +b10111111111101010101111111111110 x +1+* +0N' +1[' +10* +1** +01* +b1000 (' +0(* +1.* +b1000000000010101010000000000001 + +b1000000000010101010000000000001 8 +b1000000000010101010000000000001 U +b1000000000010101010000000000001 W +b1000000000010101010000000000001 i' +b1000000000010101010000000000001 l' +b1000000000010101010000000000001 6* +b1000000000010101010000000000001 9* +b1000000000010101010000000000001 <* +b1000000000010101010000000000001 ?* +b10000000000000000000000000000000 * +b10000000000000000000000000000000 3 +b10000000000000000000000000000000 T +b10000000000000000000000000000000 h' +b10000000000000000000000000000000 k' +b10000000000000000000000000000000 5* +b10000000000000000000000000000000 8* +b10000000000000000000000000000000 ;* +b10000000000000000000000000000000 >* +b111 - +b1010 . +#16500000 +0@ +0( +0> +0& +b1 ? +b1 ' +1&( +1'* +1%( +1!* +1$( +1y) +1#( +1s) +1"( +1m) +1!( +1g) +1~' +1C" +1&# +1f# +1j% +1L& +1a) +1}' +0c" +0p" +0}" +08# +0E# +0R# +0_# +b0 +# +0x# +0'$ +04$ +0A$ +b0 k# +0Z$ +0t$ +b0 M$ +0<% +0V% +b0 /% +0|% +0+& +08& +0E& +b0 o% +0^& +0k& +0x& +0'' +b0 Q& +0@' +0M' +b0 3' +1[) +0\" +0i" +0v" +0B +01# +0># +0K# +0X# +0C +0q# +0~# +0-$ +0:$ +0D +0S$ +0m$ +05% +0O% +0u% +0$& +01& +0>& +0G +0W& +0d& +0q& +0~& +0H +09' +0F' +1|' +1U" +0`" +0m" +0z" +1?" +0D" +05# +0B# +0O# +0\# +1"# +0'# +0u# +0$$ +01$ +0>$ +1b# +0g# +0W$ +0q$ +09% +0S% +0y% +0(& +05& +0B& +1f% +0k% +0[& +0h& +0u& +0$' +1H& +0M& +0=' +0J' +0d' +0/' +1U) +14* +1c' +1P" +0b" +0o" +0|" +1@" +0B" +07# +0D# +0Q# +0^# +1## +0%# +0w# +0&$ +03$ +0@$ +1c# +0e# +0Y$ +0s$ +0;% +0U% +0{% +0*& +07& +0D& +1g% +0i% +0]& +0j& +0w& +0&' +1I& +0K& +0?' +0L' +0f' +1+' +1.' +1t' +1v' +1x' +1{' +04 +05 +0]" +0j" +0w" +02# +0?# +0L# +0Y# +0r# +0!$ +0.$ +0;$ +0T$ +0n$ +06% +0P% +0v% +0%& +02& +0?& +0X& +0e& +0r& +0!' +0:' +0G' +0a' +1%) +1+) +11) +17) +1=) +1C) +1I) +1O) +1-* +0e' +1*' +b1 A" +b0 $# +b0 d# +b0 F$ +b0 (% +b0 h% +b0 J& +b0 ,' +1V" +b1 6 +b1 I +b1 I" +1$) +1s' +10) +1u' +1<) +1w' +1H) +1y' +1,* +1(( +0\' +0_' +0)' +13* +12* +b1 < +b1 m' +1X +b1 R +b1 <" +1O" +b11111111111111111111111111111110 S +b11111111111111111111111111111110 x +0!) +0#) +0-) +0/) +09) +0;) +0E) +0G) +0)* +0+* +0[' +b1 = +b1 j' +0/* +00* +b11111111111111111111111111111110 : +b11111111111111111111111111111110 =* +b1 ; +b1 @* +1;" +0&" +01" +04" +05" +06" +07" +08" +09" +0:" +0z +0{ +0| +0~ +0"" +0$" +0'" +0(" +0)" +0*" +0+" +0," +0-" +0." +0/" +00" +03" +1S" +0") +0.) +0:) +0F) +0** +b0 (' +0.* +0V +0E" +b1 + +b1 8 +b1 U +b1 W +b1 i' +b1 l' +b1 6* +b1 9* +b1 <* +b1 ?* +b0 * +b0 3 +b0 T +b0 h' +b0 k' +b0 5* +b0 8* +b0 ;* +b0 >* +b10 , +b10 2 +b10 J +b1000 - +b1011 . +#18500000 +1c' +04 +1V' +0b' +02' +1I' +0U' +01' +1<' +0H' +00' +1#' +0;' +0Q +1t& +0"' +0P& +1g& +0s& +0O& +1Z& +0f& +0N& +1A& +0Y& +0P +14& +0@& +0n% +1'& +03& +0m% +1x% +0&& +0l% +1_% +0w% +0O +1R% +0^% +0.% +1E% +0Q% +0-% +18% +0D% +0,% +1}$ +07% +0N +1p$ +0|$ +0L$ +1c$ +0o$ +0K$ +1V$ +0b$ +0J$ +1=$ +0U$ +0M +10$ +0<$ +0j# +1#$ +0/$ +0i# +1t# +0"$ +0h# +1[# +0s# +0L +1N# +0Z# +0*# +1A# +0M# +0)# +14# +0@# +0(# +1y" +03# +0K +1B" +1%# +1e# +1G$ +1)% +1i% +1K& +1-' +1l" +0x" +0H" +1p" +1}" +18# +1E# +1R# +1_# +b1111 +# +1x# +1'$ +14$ +1A$ +b1111 k# +1Z$ +1g$ +1t$ +1#% +b1111 M$ +1<% +1I% +1V% +1c% +b1111 /% +1|% +1+& +18& +1E& +b1111 o% +1^& +1k& +1x& +1'' +b1111 Q& +1@' +1M' +1Z' +1g' +b1111 3' +1V" +1_" +0k" +1i" +1v" +11# +1># +1K# +1X# +1q# +1~# +1-$ +1:$ +1S$ +1`$ +1m$ +1z$ +15% +1B% +1O% +1\% +1u% +1$& +11& +1>& +1W& +1d& +1q& +1~& +19' +1F' +1S' +1`' +0G" +1m" +1z" +0?" +0D" +15# +1B# +1O# +1\# +0"# +0'# +1u# +1$$ +11$ +1>$ +0b# +0g# +1W$ +1d$ +1q$ +1~$ +0D$ +0I$ +19% +1F% +1S% +1`% +0&% +0+% +1y% +1(& +15& +1B& +0f% +0k% +1[& +1h& +1u& +1$' +0H& +0M& +1=' +1J' +1W' +1d' +0*' +0/' +0^" +0b" +1o" +1|" +0@" +0C" +17# +1D# +1Q# +1^# +0## +0&# +1w# +1&$ +13$ +1@$ +0c# +0f# +1Y$ +1f$ +1s$ +1"% +0E$ +0H$ +1;% +1H% +1U% +1b% +0'% +0*% +1{% +1*& +17& +1D& +0g% +0j% +1]& +1j& +1w& +1&' +0I& +0L& +1?' +1L' +1Y' +1f' +0+' +0.' +1c" +b11111111111111111111111111111111 6 +b11111111111111111111111111111111 I +b1111 I" +1P" +0]" +1j" +1w" +12# +1?# +1L# +1Y# +1r# +1!$ +1.$ +1;$ +1T$ +1a$ +1n$ +1{$ +16% +1C% +1P% +1]% +1v% +1%& +12& +1?& +1X& +1e& +1r& +1!' +1:' +1G' +1T' +1a' +0O" +1\" +1y +0;( +1T" +1M" +b1101 A" +b1111 $# +b1111 d# +b1111 F$ +b1111 (% +b1111 h% +b1111 J& +b1111 ,' +0R" +1`" +0n' +19( +0:( +1K" +1L" +1N" +b11111111111111111111111111111101 R +b11111111111111111111111111111101 <" +1F" +b11111111111111111111111111111101 S +b11111111111111111111111111111101 x +0X +b11 = +b11 j' +02( +17( +b11111111111111111111111111111100 : +b11111111111111111111111111111100 =* +b11 ; +b11 @* +1J" +0;" +0&" +11" +14" +15" +16" +17" +18" +19" +1:" +1z +1{ +1| +1} +1~ +1!" +1"" +1#" +1$" +1%" +1'" +1(" +1)" +1*" +1+" +1," +1-" +1." +1/" +10" +12" +13" +1Q" +01( +18( +b1 =" +1/( +1V +1E" +b10 + +b10 8 +b10 U +b10 W +b10 i' +b10 l' +b10 6* +b10 9* +b10 <* +b10 ?* +b1 * +b1 3 +b1 T +b1 h' +b1 k' +b1 5* +b1 8* +b1 ;* +b1 >* +b11 , +b11 2 +b11 J +b1001 - +0/ +b1100 . +#20500000 +1A +1) +b0 ? +b0 ' +1/' +0-' +0g' +0`' +0Z' +0c' +0S' +14 +02* +b0 < +b0 m' +0M' +0V' +1b' +04* +1M& +0F' +12' +0(( +0K& +0@' +b0 3' +0I' +1U' +0-* +09' +11' +0&( +0'' +0<' +1H' +0'* +0~& +10' +0%( +0x& +0#' +1;' +0!* +0q& +1Q +0$( +0k& +0t& +1"' +0y) +1k% +0d& +1P& +0#( +0i% +0^& +b0 Q& +0g& +1s& +0s) +0W& +1O& +0"( +0E& +0Z& +1f& +0m) +0>& +1N& +0!( +08& +0A& +1Y& +0g) +01& +1P +0~' +0+& +04& +1@& +0a) +1+% +0$& +1n% +0}' +0)% +0|% +b0 o% +0'& +13& +0[) +0u% +1m% +0|' +0c% +0x% +1&& +0U) +0\% +1l% +0{' +0V% +0_% +1w% +0O) +0O% +1O +0y' +0I% +0R% +1^% +0I) +1I$ +0B% +1.% +0x' +0G$ +0<% +b0 /% +0E% +1Q% +0C) +05% +1-% +0w' +0#% +08% +1D% +0=) +0z$ +1,% +0v' +0t$ +0}$ +17% +07) +0m$ +1N +0u' +0g$ +0p$ +1|$ +01) +1g# +0`$ +1L$ +0t' +0e# +0Z$ +b0 M$ +0c$ +1o$ +0+) +0S$ +1K$ +0s' +0A$ +0V$ +1b$ +0%) +0:$ +1J$ +0r' +04$ +0=$ +1U$ +0}( +0-$ +1M +0q' +0'$ +00$ +1<$ +0w( +1'# +0~# +1j# +0p' +0%# +0x# +b0 k# +0#$ +1/$ +0q( +0q# +1i# +0.( +0_# +0t# +1"$ +0k( +0X# +1h# +0-( +0R# +0[# +1s# +0e( +0K# +1L +0,( +1B +0E# +0N# +1Z# +0_( +1D" +0># +1*# +0+( +0B" +08# +b0 +# +0A# +1M# +0Y( +01# +1)# +0*( +0}" +04# +1@# +0S( +0v" +1(# +0)( +0y" +13# +0M( +0V" +b110 6 +b110 I +b110 I" +1K +0'( +0T" +0M" +1{" +1?" +0G( +0K" +0L" +0N" +1r" +1u" +1>" +14( +0F( +0J" +1q" +b1010 = +b1010 j' +00( +1C( +b11111111111111111111111111110101 : +b11111111111111111111111111110101 =* +b1010 ; +b1010 @* +b1000 =" +0/( +1B( +b1000 * +b1000 3 +b1000 T +b1000 h' +b1000 k' +b1000 5* +b1000 8* +b1000 ;* +b1000 >* +b1010 - +1/ +b1101 . +#22500000 +0A +0) +b1 ? +b1 ' +0/' +1-' +1g' +b10000000000000000000000000000110 6 +b10000000000000000000000000000110 I +b1000 3' +05 +1e' +1^' +1*' +12* +b1 < +b1 m' +1\' +1]' +1_' +1)' +10* +03* +1[' +b10000000000000000000000000001010 = +b10000000000000000000000000001010 j' +1/* +b1111111111111111111111111110101 : +b1111111111111111111111111110101 =* +b10000000000000000000000000001010 ; +b10000000000000000000000000001010 @* +b1000 (' +1.* +b10000000000000000000000000001000 * +b10000000000000000000000000001000 3 +b10000000000000000000000000001000 T +b10000000000000000000000000001000 h' +b10000000000000000000000000001000 k' +b10000000000000000000000000001000 5* +b10000000000000000000000000001000 8* +b10000000000000000000000000001000 ;* +b10000000000000000000000000001000 >* +b1011 - +b1110 . +#24500000 +1A +1) +b0 ? +b0 ' +15 +1`' +1c' +04 +0b' +0f' +1+' +0.' +1/' +0a' +0-' +b111 ,' +b1111111111111111111111111111101 R +b1111111111111111111111111111101 <" +1g' +b10000000000000000000000000000110 6 +b10000000000000000000000000000110 I +b1000 3' +03" +0e' +0^' +1*' +0\' +0]' +0_' +0)' +02* +b0 < +b0 m' +b1111111111111111111111111111101 S +b1111111111111111111111111111101 x +0[' +00* +11* +b0 (' +0.* +b10000000000000000000000000000010 + +b10000000000000000000000000000010 8 +b10000000000000000000000000000010 U +b10000000000000000000000000000010 W +b10000000000000000000000000000010 i' +b10000000000000000000000000000010 l' +b10000000000000000000000000000010 6* +b10000000000000000000000000000010 9* +b10000000000000000000000000000010 <* +b10000000000000000000000000000010 ?* +b1000 * +b1000 3 +b1000 T +b1000 h' +b1000 k' +b1000 5* +b1000 8* +b1000 ;* +b1000 >* +b1100 - +b1111 . +#26500000 +0A +0) +b1 ? +b1 ' +1Z' +1S' +1M' +1V' +0M& +1F' +02' +1K& +1@' +1I' +0U' +19' +01' +1'' +1<' +0H' +1~& +00' +14* +1x& +1#' +0;' +1(( +1q& +0Q +1-* +1k& +1t& +0"' +1&( +0k% +1d& +0P& +1'* +1i% +1^& +b1111 Q& +1g& +0s& +1%( +1W& +0O& +1!* +1E& +1Z& +0f& +1$( +1>& +0N& +1y) +18& +1A& +0Y& +1#( +11& +0P +1s) +1+& +14& +0@& +1"( +0+% +1$& +0n% +1m) +1)% +1|% +b1111 o% +1'& +03& +1!( +1u% +0m% +1g) +1c% +1x% +0&& +1~' +1\% +0l% +1a) +1V% +1_% +0w% +1}' +1O% +0O +1[) +1I% +1R% +0^% +1|' +0I$ +1B% +0.% +1U) +1G$ +1<% +b1111 /% +1E% +0Q% +1{' +15% +0-% +1O) +1#% +18% +0D% +1y' +1z$ +0,% +1I) +1t$ +1}$ +07% +1x' +1m$ +0N +1C) +1g$ +1p$ +0|$ +1w' +0g# +1`$ +0L$ +1=) +1e# +1Z$ +b1111 M$ +1c$ +0o$ +1v' +0B +1S$ +0K$ +17) +0D" +1A$ +1V$ +0b$ +1u' +1B" +1:$ +0J$ +11) +0p" +14$ +1=$ +0U$ +1t' +0i" +1}" +1-$ +0M +1+) +0c" +b1000 I" +0l" +1s" +1x" +1t" +1'$ +b1110 k# +10$ +0<$ +1s' +0\" +1H" +1~# +0j# +1%) +1/' +0_" +1k" +1#$ +0/$ +1r' +0.' +1G" +0i# +1}( +1^" +1b" +0"$ +0&$ +1q' +1g' +b11111111111111111111111000001000 6 +b11111111111111111111111000001000 I +b1111 3' +1]" +0!$ +1w( +1`' +b1111 A" +b1101 d# +1p' +1c' +b1111111111111111111110111111111 R +b1111111111111111111110111111111 <" +0z' +1q( +04 +05 +1&" +0:" +0A( +1.( +0e' +0*' +1:( +0o' +1i( +0j( +0]' +1f' +0+' +13* +12* +b1 < +b1 m' +b1111111111111111111110111111111 S +b1111111111111111111110111111111 x +07( +09( +1g( +b1111111111111111111110111110111 : +b1111111111111111111110111110111 =* +b10000000000000000000001000001000 ; +b10000000000000000000001000001000 @* +1[' +b1000001000 = +b1000001000 j' +0/* +00* +b10000000000000000000000000000000 7 +b10000000000000000000000000000000 7* +b1111111111111111111111111111111 9 +b1111111111111111111111111111111 :* +08( +1h( +b1000 (' +1.* +b10000000000000000000001000000000 + +b10000000000000000000001000000000 8 +b10000000000000000000001000000000 U +b10000000000000000000001000000000 W +b10000000000000000000001000000000 i' +b10000000000000000000001000000000 l' +b10000000000000000000001000000000 6* +b10000000000000000000001000000000 9* +b10000000000000000000001000000000 <* +b10000000000000000000001000000000 ?* +b10000000000000000000000000001000 * +b10000000000000000000000000001000 3 +b10000000000000000000000000001000 T +b10000000000000000000000000001000 h' +b10000000000000000000000000001000 k' +b10000000000000000000000000001000 5* +b10000000000000000000000000001000 8* +b10000000000000000000000000001000 ;* +b10000000000000000000000000001000 >* +b1101 - +b10000 . +#28500000 +1+% +0)% +0|% +0u% +0c% +0x% +0\% +1l% +0V% +0_% +1w% +0O% +1O +0I% +0R% +1^% +1I$ +0B% +1.% +0G$ +0<% +b0 /% +0E% +1Q% +05% +1-% +0{' +0#% +08% +1D% +0O) +0z$ +1,% +0y' +0t$ +0}$ +17% +0I) +0m$ +1N +0x' +0g$ +0p$ +1|$ +0C) +1g# +0`$ +1L$ +0w' +0e# +0Z$ +b0 M$ +0c$ +1o$ +0=) +0S$ +1K$ +15 +0v' +0A$ +0V$ +1b$ +07) +0:$ +1J$ +0u' +04$ +0=$ +1U$ +01) +0-$ +1M +0g' +b111 3' +0t' +0'$ +b0 k# +00$ +1<$ +0`' +0+) +0~# +1j# +1+& +b1111111111000000000000000001000 6 +b1111111111000000000000000001000 I +b1110 o% +0c' +0s' +0#$ +1/$ +1$& +14 +0%) +1i# +1(& +1e' +1*' +1/' +0r' +1"$ +1&$ +0*& +1\' +1_' +1)' +0-' +0}( +1!$ +0%& +1a' +0q' +b1111 d# +b1101 h% +b1111 ,' +0w( +b11111111110111111111111111111111 R +b11111111110111111111111111111111 <" +0p' +1:" +0(" +13" +0q( +0U) +04* +1j( +0.( +1S) +0T) +10* +03* +b11111111110111111111111111111111 S +b11111111110111111111111111111111 x +b10000000001000000000000000001000 = +b10000000001000000000000000001000 j' +0g( +0i( +1Q) +1/* +b0 7 +b0 7* +b11111111111111111111111111111111 9 +b11111111111111111111111111111111 :* +b1111111110111111111111111110111 : +b1111111110111111111111111110111 =* +b10000000001000000000000000001000 ; +b10000000001000000000000000001000 @* +0h( +1R) +01* +b1000000000000000000000 + +b1000000000000000000000 8 +b1000000000000000000000 U +b1000000000000000000000 W +b1000000000000000000000 i' +b1000000000000000000000 l' +b1000000000000000000000 6* +b1000000000000000000000 9* +b1000000000000000000000 <* +b1000000000000000000000 ?* +b1110 - +b10001 . +#30500000 +b1 ? +b1 ' +0@' +0M' +0Z' +0/' +09' +0F' +0S' +1-' +0=' +0J' +0W' +0?' +0L' +0Y' +1g' +b10001111111000000000000000001000 6 +b10001111111000000000000000001000 I +b1000 3' +0:' +0G' +0T' +1`' +b1000 ,' +1c' +b10001111110111111111111111111111 R +b10001111110111111111111111111111 <" +04 +05 +0/" +00" +02" +0!* +0'* +0-* +0e' +0*' +14* +1}) +0~) +1%* +0&* +1+* +0,* +0\' +0_' +0)' +13* +12* +b1 < +b1 m' +b10001111110111111111111111111111 S +b10001111110111111111111111111111 x +1{) +1#* +1)* +0[' +b1110000001000000000000000001000 = +b1110000001000000000000000001000 j' +0/* +00* +b10001111110111111111111111110111 : +b10001111110111111111111111110111 =* +b1110000001000000000000000001000 ; +b1110000001000000000000000001000 @* +1|) +1$* +1** +b0 (' +0.* +b1110000001000000000000000000000 + +b1110000001000000000000000000000 8 +b1110000001000000000000000000000 U +b1110000001000000000000000000000 W +b1110000001000000000000000000000 i' +b1110000001000000000000000000000 l' +b1110000001000000000000000000000 6* +b1110000001000000000000000000000 9* +b1110000001000000000000000000000 <* +b1110000001000000000000000000000 ?* +b1000 * +b1000 3 +b1000 T +b1000 h' +b1000 k' +b1000 5* +b1000 8* +b1000 ;* +b1000 >* +b1111 - +b10010 . +#32500000 +1A +1) +b0 ? +b0 ' +1/' +0-' +0g' +0`' +0c' +14 +0<' +1C' +1H' +1D' +0I' +1P' +1U' +1Q' +0V' +1b' +10' +11' +12' +1>' +1K' +1X' +15' +18' +1B' +1E' +1O' +1R' +1:' +1G' +1T' +b1111 ,' +0@' +1M' +1Z' +b1101111111000000000000000001000 6 +b1101111111000000000000000001000 I +b110 3' +b11111111110111111111111111111111 R +b11111111110111111111111111111111 <" +02* +b0 < +b0 m' +09' +0F' +0S' +1/" +10" +12" +04* +1=' +1J' +1W' +0%( +0&( +0(( +1?' +1L' +1Y' +b11111111110111111111111111111111 S +b11111111110111111111111111111111 x +0}) +0%* +0+* +14' +1A' +1N' +0|) +0$* +0** +b111 (' +1z) +1"* +1(* +b1000000000000000000000 + +b1000000000000000000000 8 +b1000000000000000000000 U +b1000000000000000000000 W +b1000000000000000000000 i' +b1000000000000000000000 l' +b1000000000000000000000 6* +b1000000000000000000000 9* +b1000000000000000000000 <* +b1000000000000000000000 ?* +b1110000000000000000000000001000 * +b1110000000000000000000000001000 3 +b1110000000000000000000000001000 T +b1110000000000000000000000001000 h' +b1110000000000000000000000001000 k' +b1110000000000000000000000001000 5* +b1110000000000000000000000001000 8* +b1110000000000000000000000001000 ;* +b1110000000000000000000000001000 >* +b10000 - +b10011 . +#34500000 +b0 ? +b0 ' +1M& +0K& +0'' +1/' +0~& +0-' +0x& +0#' +16' +0q& +1Q +0g' +0k& +0t& +1"' +0`' +1k% +0d& +1P& +0c' +0i% +0^& +b0 Q& +0g& +1s& +0S' +14 +0W& +1O& +0V' +1b' +0E& +0Z& +1f& +12' +0>& +1N& +0F' +1X' +0$( +08& +0A& +1Y& +0I' +1P' +0y) +01& +1P +0@' +11' +0#( +0+& +b0 o% +04& +1@& +09' +1K' +0s) +0$& +1n% +0<' +1C' +0"( +0'& +13& +10' +0M' +0Z' +b1000 6 +b1000 I +b0 3' +0m) +1m% +1>' +0D' +0Q' +0!( +1&& +1*& +05' +08' +0B' +0H' +0E' +0O' +0U' +0R' +0g) +1%& +0:' +0G' +0T' +0~' +b1111 h% +b1000 ,' +0a) +b10001111111111111111111111111111 R +b10001111111111111111111111111111 <" +0}' +02* +b0 < +b0 m' +1(" +0/" +00" +02" +0[) +0!* +0'* +0-* +04* +1T) +0|' +1~) +0%( +1&* +0&( +1,* +0(( +b10001111111111111111111111111111 S +b10001111111111111111111111111111 x +b1000 = +b1000 j' +0Q) +0S) +0{) +0}) +0#* +0%* +0)* +0+* +b1110000000000000000000000000000 7 +b1110000000000000000000000000000 7* +b10001111111111111111111111111111 9 +b10001111111111111111111111111111 :* +b10001111111111111111111111110111 : +b10001111111111111111111111110111 =* +b1110000000000000000000000001000 ; +b1110000000000000000000000001000 @* +0R) +1|) +1$* +1** +b1110000000000000000000000000000 + +b1110000000000000000000000000000 8 +b1110000000000000000000000000000 U +b1110000000000000000000000000000 W +b1110000000000000000000000000000 i' +b1110000000000000000000000000000 l' +b1110000000000000000000000000000 6* +b1110000000000000000000000000000 9* +b1110000000000000000000000000000 <* +b1110000000000000000000000000000 ?* +b10001 - +b10100 . +#36500000 +1B +1D" +0B" +1V" +1.' +1O" +0}" +b1 I" +1R" +0`" +1_" +0m" +1l" +0s" +0x" +0t" +1@' +1M' +1Z' +0F" +0G" +0H" +17' +1D' +1Q' +0Q" +0U" +0^" +0b" +0k" +0o" +15' +1;' +18' +1B' +1H' +1E' +1O' +1U' +1R' +0b' +0M& +0/' +0P" +0]" +0j" +1:' +1G' +1T' +0a' +1K& +0-' +b1000 A" +b111 ,' +b1111111111111111111111111111000 R +b1111111111111111111111111111000 <" +1^& +1k& +1x& +1'' +b1111 Q& +0H +0g' +b1111111000000000000000000000001 6 +b1111111000000000000000000000001 I +b111 3' +05 +0y +0&" +01" +1/" +10" +12" +03" +1n' +1o' +1z' +1\& +1U& +1i& +1b& +1v& +1o& +1%' +1|& +1H& +1e' +0^' +0*' +12( +04( +19( +0:( +1?( +0@( +0~) +0&* +0,* +1S& +1T& +1V& +1`& +1a& +1c& +1m& +1n& +1p& +1z& +1{& +1}& +1G& +0\' +1]' +0_' +0)' +0f) +0l) +0r) +0x) +b1111111111111111111111111111000 S +b1111111111111111111111111111000 x +10( +17( +1=( +1{) +1#* +1)* +1R& +1_& +1l& +1y& +1[' +b1111111000000000000000000001111 = +b1111111000000000000000000001111 j' +1c) +1i) +1o) +1u) +b10000000000000000000000000000000 7 +b10000000000000000000000000000000 7* +b1111111111111111111111111111111 9 +b1111111111111111111111111111111 :* +b111111111111111111110000 : +b111111111111111111110000 =* +b11111111000000000000000000001111 ; +b11111111000000000000000000001111 @* +11( +18( +1>( +0|) +0$* +0** +11* +b1111 F& +b1111 (' +1b) +1h) +1n) +1t) +1.* +b10000000000000000000000000000111 + +b10000000000000000000000000000111 8 +b10000000000000000000000000000111 U +b10000000000000000000000000000111 W +b10000000000000000000000000000111 i' +b10000000000000000000000000000111 l' +b10000000000000000000000000000111 6* +b10000000000000000000000000000111 9* +b10000000000000000000000000000111 <* +b10000000000000000000000000000111 ?* +b11111111000000000000000000001000 * +b11111111000000000000000000001000 3 +b11111111000000000000000000001000 T +b11111111000000000000000000001000 h' +b11111111000000000000000000001000 k' +b11111111000000000000000000001000 5* +b11111111000000000000000000001000 8* +b11111111000000000000000000001000 ;* +b11111111000000000000000000001000 >* +b10010 - +b10101 . +#38500000 +0A +0) +b1 ? +b1 ' +0k% +1i% +1E& +1>& +18& +1A& +0[& +11& +0P +1+& +14& +0@& +1~' +0+% +1$& +0n% +1a) +1)% +1|% +b1111 o% +1'& +03& +1}' +1u% +0m% +1[) +1c% +1x% +0&& +1|' +1\% +0l% +1U) +1V% +1_% +0w% +1{' +1O% +0O +1O) +1I% +1R% +0^% +1y' +0I$ +1B% +0.% +1I) +1G$ +1<% +b1111 /% +1E% +0Q% +1x' +15% +0-% +1C) +1#% +18% +0D% +1w' +1z$ +0,% +1=) +1t$ +1}$ +07% +1v' +1m$ +0N +17) +1g$ +1p$ +0|$ +1u' +0g# +1`$ +0L$ +11) +1e# +1Z$ +b1111 M$ +1c$ +0o$ +1t' +1S$ +0K$ +1+) +1A$ +1V$ +0b$ +1s' +1:$ +0J$ +1%) +14$ +1=$ +0U$ +1r' +1-$ +0M +1}( +1'$ +10$ +0<$ +1q' +0'# +1~# +0j# +1/' +1w( +1%# +1x# +b1111 k# +1#$ +0/$ +0.' +1p' +1q# +0i# +1q( +1_# +1t# +0"$ +1g' +1.( +1X# +0h# +1`' +1k( +1R# +1[# +0s# +1c' +1-( +1K# +0L +04 +1e( +1E# +1N# +0Z# +0W& +0e' +1,( +1># +0*# +0l" +1Z& +0h& +1g& +0u& +1t& +0$' +1#' +0=' +1<' +0J' +1I' +0W' +1V' +0]' +1_( +18# +b1111 +# +1A# +0M# +1M" +1Z" +1n" +1H" +1z" +1D" +0N& +0O& +0P& +0Q +00' +01' +02' +1+( +0_" +1f" +1g" +11# +0)# +1K" +1Q" +1N" +1X" +1^" +1[" +1e" +1k" +1h" +0|" +1@" +0C" +0Y& +0]& +0f& +0j& +0s& +0w& +0"' +0&' +1I& +1L& +0;' +0?' +0H' +0L' +0U' +0Y' +1Y( +1V" +1G" +1}" +14# +0@# +0M& +1P" +1]" +1j" +0w" +0X& +0e& +0r& +0!' +0:' +0G' +0T' +1*( +0O" +1a" +1v" +0(# +0K& +b111 A" +b0 J& +b0 ,' +1S( +0R" +1Y" +1c" +1p" +b1111 I" +1y" +03# +b111111111111111111110111 R +b111111111111111111110111 <" +1)( +12* +b1 < +b1 m' +1F" +0\" +0i" +0K +1B +0^& +0k& +0x& +0'' +b0 Q& +0@' +0M' +0Z' +b10000000111111111111111111111111 6 +b10000000111111111111111111111111 I +b1000 3' +1y +1&" +11" +04" +0+" +0," +0-" +0." +0/" +00" +02" +1M( +14* +1T" +1`" +1m" +0{" +1?" +0\& +0U& +0i& +0b& +0v& +0o& +0%' +0|& +1H& +0>' +07' +0K' +0D' +0X' +0Q' +0n' +0o' +0z' +1'( +1!( +1"( +1#( +1$( +1%( +1&( +1(( +1L" +1U" +1b" +1o" +0r" +0u" +0>" +0S& +0T& +0V& +0`& +0a& +0c& +0m& +0n& +0p& +0z& +0{& +0}& +0G& +05' +06' +08' +0B' +0C' +0E' +0O' +0P' +0R' +b111111111111111111110111 S +b111111111111111111110111 x +02( +09( +0?( +1E( +1e) +1k) +1q) +1w) +1}) +1%* +1+* +1J" +1W" +1d" +0q" +0R& +0_& +0l& +0y& +04' +0A' +0N' +01( +08( +0>( +1D( +1d) +1j) +1p) +1v) +1|) +1$* +1** +b111 =" +b0 F& +b1000 (' +1/( +16( +1<( +0B( +0b) +0h) +0n) +0t) +0z) +0"* +0(* +b11111111000000000000000000001000 + +b11111111000000000000000000001000 8 +b11111111000000000000000000001000 U +b11111111000000000000000000001000 W +b11111111000000000000000000001000 i' +b11111111000000000000000000001000 l' +b11111111000000000000000000001000 6* +b11111111000000000000000000001000 9* +b11111111000000000000000000001000 <* +b11111111000000000000000000001000 ?* +b10000000000000000000000000000111 * +b10000000000000000000000000000111 3 +b10000000000000000000000000000111 T +b10000000000000000000000000000111 h' +b10000000000000000000000000000111 k' +b10000000000000000000000000000111 5* +b10000000000000000000000000000111 8* +b10000000000000000000000000000111 ;* +b10000000000000000000000000000111 >* +b10011 - +b10110 . +#40500000 +1A +1) +b0 ? +b0 ' +0/' +1.' +0g' +0`' +0c' +14 +1e' +0V' +1]' +12' +0I' +1U' +11' +0<' +1H' +10' +0#' +1;' +1Q +0t& +1"' +1k% +1P& +0i% +0g& +1s& +1O& +0E& +0Z& +1f& +0>& +1N& +08& +0A& +1Y& +01& +1P +0+& +04& +1@& +1+% +0$& +1n% +0)% +0|% +b0 o% +0'& +13& +0u% +1m% +0c% +0x% +1&& +0\% +1l% +0~' +0V% +0_% +1w% +0a) +0O% +1O +0}' +0I% +0R% +1^% +0[) +1I$ +0B% +1.% +0|' +0G$ +0<% +b0 /% +0E% +1Q% +0U) +05% +1-% +0{' +0#% +08% +1D% +0O) +0z$ +1,% +0y' +0t$ +0}$ +17% +0I) +0m$ +1N +0x' +0g$ +0p$ +1|$ +0C) +1g# +0`$ +1L$ +0w' +0e# +0Z$ +b0 M$ +0c$ +1o$ +0=) +0S$ +1K$ +0v' +0A$ +0V$ +1b$ +07) +0:$ +1J$ +0u' +04$ +0=$ +1U$ +01) +0-$ +1M +0t' +0'$ +00$ +1<$ +0+) +1'# +0~# +1j# +0s' +0%# +0x# +b0 k# +0#$ +1/$ +0%) +0q# +1i# +0r' +0_# +0t# +1"$ +0}( +0X# +1h# +0q' +0R# +0[# +1s# +0w( +0K# +1L +0p' +0E# +0N# +1Z# +0q( +0-* +0># +1*# +0.( +08# +b0 +# +0A# +1M# +0k( +0'* +01# +1)# +0K& +0-( +0}" +04# +1@# +0e( +0!* +0v" +1(# +0^& +0k& +0x& +0'' +b0 Q& +0@' +0M' +0Z' +b0 3' +0,( +0V" +0c" +0p" +b0 6 +b0 I +b0 I" +0y" +13# +0B +0W& +0d& +0q& +0~& +09' +0F' +0S' +0_( +0y) +0M" +0Z" +0g" +1K +0?" +1D" +1[& +1h& +1u& +1$' +0H& +1M& +1=' +1J' +1W' +0+( +0K" +0Q" +0N" +0X" +0^" +0[" +0e" +0k" +0h" +1x" +1|" +0@" +0B" +1]& +1j& +1w& +1&' +0I& +0L& +1?' +1L' +1Y' +0Y( +0s) +0P" +0]" +0j" +1w" +1X& +1e& +1r& +1!' +1:' +1G' +1T' +0*( +b1000 A" +b1111 J& +b111 ,' +0S( +0m) +b1111111111111111111111111111000 R +b1111111111111111111111111111000 <" +0)( +02* +b0 < +b0 m' +0y +0&" +01" +14" +1+" +1," +1-" +1." +1/" +10" +12" +0;( +0A( +0G( +0M( +0g) +04* +14( +0n' +1:( +0o' +1@( +0z' +1F( +0'( +1f) +0!( +1l) +0"( +1r) +0#( +1x) +0$( +1~) +0%( +1&* +0&( +1,* +0(( +b1111111111111111111111111111000 S +b1111111111111111111111111111000 x +b0 = +b0 j' +00( +02( +07( +09( +0=( +0?( +0C( +0E( +0c) +0e) +0i) +0k) +0o) +0q) +0u) +0w) +0{) +0}) +0#* +0%* +0)* +0+* +b10000000000000000000000000000111 7 +b10000000000000000000000000000111 7* +b1111111111111111111111111111000 9 +b1111111111111111111111111111000 :* +b1111111111111111111111111111000 : +b1111111111111111111111111111000 =* +b10000000000000000000000000000111 ; +b10000000000000000000000000000111 @* +11( +18( +1>( +0D( +0d) +0j) +0p) +0v) +0|) +0$* +0** +b10000000000000000000000000000111 + +b10000000000000000000000000000111 8 +b10000000000000000000000000000111 U +b10000000000000000000000000000111 W +b10000000000000000000000000000111 i' +b10000000000000000000000000000111 l' +b10000000000000000000000000000111 6* +b10000000000000000000000000000111 9* +b10000000000000000000000000000111 <* +b10000000000000000000000000000111 ?* +b10100 - +b10111 . +#42500000 +1M' +0M& +1F' +1K& +1@' +1I' +0U' +19' +01' +1'' +1<' +0H' +1~& +00' +1x& +1#' +0;' +1q& +0Q +1&( +1k& +1t& +0"' +1'* +0k% +1d& +0P& +1%( +1i% +1^& +b1111 Q& +1g& +0s& +1!* +1W& +0O& +1$( +1E& +1Z& +0f& +1y) +1>& +0N& +1#( +18& +1A& +0Y& +1s) +11& +0P +1"( +1+& +14& +0@& +1m) +0+% +1$& +0n% +1!( +1)% +1|% +b1111 o% +1'& +03& +1g) +1u% +0m% +1~' +1c% +1x% +0&& +1a) +1\% +0l% +1}' +1V% +1_% +0w% +1[) +1O% +0O +1|' +1I% +1R% +0^% +1U) +0I$ +1B% +0.% +1{' +1G$ +1<% +b1111 /% +1E% +0Q% +1O) +15% +0-% +1y' +1#% +18% +0D% +1I) +1z$ +0,% +1x' +1t$ +1}$ +07% +1C) +1m$ +0N +1w' +1g$ +1p$ +0|$ +1=) +0g# +1`$ +0L$ +1v' +1e# +1Z$ +b1111 M$ +1c$ +0o$ +17) +1S$ +0K$ +1u' +1A$ +1V$ +0b$ +11) +1:$ +0J$ +1t' +14$ +1=$ +0U$ +1+) +1-$ +0M +1s' +1'$ +10$ +0<$ +1%) +0'# +1~# +0j# +1r' +1%# +1x# +b1111 k# +1#$ +0/$ +1}( +1q# +0i# +1q' +1_# +1t# +0"$ +1w( +1X# +0h# +18# +1p' +1R# +1[# +0s# +11# +1q( +1K# +0L +1.( +1E# +b1111 +# +1N# +0Z# +1k( +1D" +1># +0*# +1-( +0B" +1A# +0M# +15 +0p" +1e( +0)# +1/' +1V" +1k" +0i" +1,( +0}" +14# +0@# +0.' +1M" +15# +1_( +0v" +0(# +1K" +1Q" +1N" +1^" +07# +1+( +0c" +b1 I" +0y" +03# +1g' +1P" +1]" +1j" +02# +1Y( +0\" +1K +1`' +b1111 A" +b1110 $# +1*( +0_" +1m" +0l" +1x" +1c' +b1111111111111111111111111101111 R +b1111111111111111111111111101111 <" +1S( +1G" +1H" +0Z' +b10111111111111111111111111110001 6 +b10111111111111111111111111110001 I +b1011 3' +04 +1y +1&" +11" +05" +1)( +0a" +0n" +1X' +0Q' +0e' +1*' +04( +1K( +0L( +0Y" +1b" +0f" +1o" +1O' +0P' +1R' +0]' +0f' +1+' +0,* +03* +b1111111111111111111111111101111 S +b1111111111111111111111111101111 x +10( +1I( +0W" +0d" +1N' +0[' +b11000000000000000000000000010001 = +b11000000000000000000000000010001 j' +1)* +1/* +b0 7 +b0 7* +b11111111111111111111111111111111 9 +b11111111111111111111111111111111 :* +b111111111111111111111111101110 : +b111111111111111111111111101110 =* +b11000000000000000000000000010001 ; +b11000000000000000000000000010001 @* +01( +08( +0>( +1J( +b1 =" +b100 (' +06( +0<( +1(* +0.* +b10000000000000000000000000010000 + +b10000000000000000000000000010000 8 +b10000000000000000000000000010000 U +b10000000000000000000000000010000 W +b10000000000000000000000000010000 i' +b10000000000000000000000000010000 l' +b10000000000000000000000000010000 6* +b10000000000000000000000000010000 9* +b10000000000000000000000000010000 <* +b10000000000000000000000000010000 ?* +b1000000000000000000000000000001 * +b1000000000000000000000000000001 3 +b1000000000000000000000000000001 T +b1000000000000000000000000000001 h' +b1000000000000000000000000000001 k' +b1000000000000000000000000000001 5* +b1000000000000000000000000000001 8* +b1000000000000000000000000000001 ;* +b1000000000000000000000000000001 >* +b10101 - +b11000 . +#43500000 +0A +0) +b1 ? +b1 ' +0k& +1k% +0d& +0i% +0^& +0g& +0W& +1O& +0E& +0Z& +1f& +0>& +1N& +08& +0A& +1Y& +01& +1P +0+& +04& +1@& +1+% +0$& +1n% +0"( +0)% +0|% +b0 o% +0'& +13& +0m) +0u% +1m% +0!( +0c% +0x% +1&& +0g) +0\% +1l% +0~' +0V% +0_% +1w% +0a) +0O% +1O +0}' +0I% +0R% +1^% +0[) +1I$ +0B% +1.% +0|' +0G$ +0<% +b0 /% +0E% +1Q% +0U) +05% +1-% +0{' +0#% +08% +1D% +0O) +0z$ +1,% +0y' +0t$ +0}$ +17% +0I) +0m$ +1N +0x' +0g$ +0p$ +1|$ +0C) +1g# +0`$ +1L$ +0w' +0e# +0Z$ +b0 M$ +0c$ +1o$ +0=) +0S$ +1K$ +0v' +0A$ +0V$ +1b$ +07) +0:$ +1J$ +0u' +04$ +0=$ +1U$ +01) +0-$ +1M +0t' +0'$ +00$ +1<$ +0+) +1'# +0~# +1j# +0s' +0%# +0x# +b0 k# +0#$ +1/$ +0%) +0q# +1i# +0r' +0_# +0t# +1"$ +0}( +0X# +1h# +0q' +0R# +0[# +1s# +0w( +0K# +1L +0p' +0E# +0N# +1Z# +0q( +0># +1*# +0.( +08# +b0 +# +0A# +1M# +0k( +01# +1)# +1x& +b1100 Q& +0-( +04# +1@# +1q& +0e( +1(# +1u& +1/' +0,( +13# +17# +0w& +1\' +1_' +1)' +0-' +0_( +1Z' +0g' +b1111100000000000000000000000001 6 +b1111100000000000000000000000001 I +b111 3' +12# +0r& +1a' +0+( +1S' +0`' +b1111 $# +b1011 J& +b1111 ,' +0Y( +1V' +0c' +b11111011111111111111111111111111 R +b11111011111111111111111111111111 <" +0*( +02' +14 +15 +1(( +15" +0-" +13" +0S( +0s) +0X' +1e' +1*' +1-* +1L( +0)( +1q) +0r) +0O' +0R' +0]' +1f' +0+' +1,* +12* +b1 < +b1 m' +b11111011111111111111111111111111 S +b11111011111111111111111111111111 x +0I( +0K( +1o) +0N' +1[' +b10000100000000000000000000000001 = +b10000100000000000000000000000001 j' +0)* +10* +b1111011111111111111111111111110 : +b1111011111111111111111111111110 =* +b10000100000000000000000000000001 ; +b10000100000000000000000000000001 @* +0J( +1p) +01* +b1000 (' +0(* +1.* +b100000000000000000000000000 + +b100000000000000000000000000 8 +b100000000000000000000000000 U +b100000000000000000000000000 W +b100000000000000000000000000 i' +b100000000000000000000000000 l' +b100000000000000000000000000 6* +b100000000000000000000000000 9* +b100000000000000000000000000 <* +b100000000000000000000000000 ?* +b10000000000000000000000000000001 * +b10000000000000000000000000000001 3 +b10000000000000000000000000000001 T +b10000000000000000000000000000001 h' +b10000000000000000000000000000001 k' +b10000000000000000000000000000001 5* +b10000000000000000000000000000001 8* +b10000000000000000000000000000001 ;* +b10000000000000000000000000000001 >* +b10110 - +b11001 . +#44500000 +b1 ? +b1 ' +1k& +1Z' +0k% +1d& +1S' +1i% +1^& +1g& +1M' +1V' +0b' +1W& +0O& +0M& +1F' +02' +1E& +1Z& +0f& +1K& +1@' +1I' +0U' +1>& +0N& +19' +01' +18& +1A& +0Y& +1'' +1<' +0H' +11& +0P +1~& +00' +1s) +1+& +b1110 o% +14& +0@& +1x& +b1111 Q& +1#' +0;' +1"( +1$& +0n% +1q& +0Q +1m) +1(( +0/' +1'& +03& +1t& +0"' +1!( +1-* +1-' +0m% +0P& +1g) +1&( +0&& +0*& +0s& +1w& +1~' +1'* +0D" +1g' +b1111 3' +0%& +1r& +1a) +1%( +1B" +1`' +b1101 h% +b1111 J& +1}' +1!* +1c' +b11111111110111111111111111111111 R +b11111111110111111111111111111111 <" +1[) +1$( +0V" +1}" +b11111111111000000000000000001000 6 +b11111111111000000000000000001000 I +b1000 I" +0B +04 +05 +0(" +1-" +1|' +1y) +0T" +0M" +1{" +1t" +1?" +0e' +0*' +14* +1S) +0T) +1r) +1#( +0K" +0L" +0N" +1r" +1s" +1u" +1>" +0\' +0_' +0)' +14( +0F( +13* +12* +b1 < +b1 m' +b11111111110111111111111111111111 S +b11111111110111111111111111111111 x +1Q) +0o) +0q) +0J" +1q" +0[' +b1000000000000000001000 = +b1000000000000000001000 j' +00( +1C( +0/* +00* +b11111111110111111111111111110111 : +b11111111110111111111111111110111 =* +b1000000000000000001000 ; +b1000000000000000001000 @* +1R) +0p) +b1000 =" +b0 (' +0/( +1B( +0.* +b1000000000000000000000 + +b1000000000000000000000 8 +b1000000000000000000000 U +b1000000000000000000000 W +b1000000000000000000000 i' +b1000000000000000000000 l' +b1000000000000000000000 6* +b1000000000000000000000 9* +b1000000000000000000000 <* +b1000000000000000000000 ?* +b1000 * +b1000 3 +b1000 T +b1000 h' +b1000 k' +b1000 5* +b1000 8* +b1000 ;* +b1000 >* +b10111 - +b11010 . +#45500000 +1A +1) +b0 ? +b0 ' +1M& +0K& +0@' +09' +0'' +0<' +1C' +1H' +1D' +0~& +10' +0x& +0#' +1;' +0q& +1Q +0k& +0t& +1"' +1k% +0d& +1P& +0i% +0^& +b0 Q& +0g& +1s& +0W& +1O& +0%( +0E& +0Z& +1f& +0!* +0>& +1N& +0$( +08& +0A& +1Y& +0y) +01& +1P +0#( +0+& +b0 o% +04& +1@& +0s) +0$& +1n% +0"( +0'& +13& +15 +0m) +0Z' +1m% +1*' +1/' +0!( +0S' +1&& +1*& +0f' +1+' +0-' +0g) +1D" +1M' +b1010 3' +0V' +1%& +0a' +0~' +0B" +0F' +12' +0(( +b1111 h% +b111 ,' +0a) +0I' +1U' +0-* +b1111111111111111111111111111111 R +b1111111111111111111111111111111 <" +0}' +02* +b0 < +b0 m' +1V" +0}" +b10100000000000000000000000000001 6 +b10100000000000000000000000000001 I +b1 I" +11' +0&( +1(" +03" +0[) +04* +1T" +1M" +0{" +0t" +0?" +1K' +0'* +1T) +0|' +03* +1K" +1L" +1N" +0r" +0s" +0u" +0>" +1B' +1E' +04( +1F( +0&* +b1111111111111111111111111111111 S +b1111111111111111111111111111111 x +0Q) +0S) +1/* +1J" +0q" +1A' +b10100000000000000000000000000001 = +b10100000000000000000000000000001 j' +10( +0C( +1#* +b1011111111111111111111111111110 : +b1011111111111111111111111111110 =* +b10100000000000000000000000000001 ; +b10100000000000000000000000000001 @* +0R) +11* +b1 =" +b10 (' +1/( +0B( +1"* +b10000000000000000000000000000000 + +b10000000000000000000000000000000 8 +b10000000000000000000000000000000 U +b10000000000000000000000000000000 W +b10000000000000000000000000000000 i' +b10000000000000000000000000000000 l' +b10000000000000000000000000000000 6* +b10000000000000000000000000000000 9* +b10000000000000000000000000000000 <* +b10000000000000000000000000000000 ?* +b100000000000000000000000000001 * +b100000000000000000000000000001 3 +b100000000000000000000000000001 T +b100000000000000000000000000001 h' +b100000000000000000000000000001 k' +b100000000000000000000000000001 5* +b100000000000000000000000000001 8* +b100000000000000000000000000001 ;* +b100000000000000000000000000001 >* +b11000 - +b11011 . +#46500000 +0A +0) +b1 ? +b1 ' +1O" +1R" +0`" +1_" +0m" +1l" +0z" +1y" +05# +14# +0B# +1A# +0O# +1N# +0\# +1[# +0u# +1t# +0$$ +1#$ +01$ +10$ +0>$ +1=$ +0W$ +1V$ +0d$ +1c$ +0q$ +1p$ +0~$ +1}$ +09% +18% +0F% +1E% +0S% +1R% +0`% +1_% +0y% +1x% +0(& +1'& +05& +14& +0B& +1A& +0[& +1Z& +0h& +1g& +0u& +1t& +0$' +1#' +0=' +1<' +0J' +1I' +0W' +1V' +0F" +0G" +0H" +0K +1?" +0D" +0(# +0)# +0*# +0L +1"# +0'# +0h# +0i# +0j# +0M +1b# +0g# +0J$ +0K$ +0L$ +0N +1D$ +0I$ +0,% +0-% +0.% +0O +1&% +0+% +0l% +0m% +0n% +0P +1f% +0k% +0N& +0O& +0P& +0Q +1H& +0M& +00' +01' +02' +0^' +1/' +0Q" +0U" +0^" +0b" +0k" +0o" +0x" +0|" +1@" +1C" +03# +07# +0@# +0D# +0M# +0Q# +0Z# +0^# +1## +1&# +0s# +0w# +0"$ +0&$ +0/$ +03$ +0<$ +0@$ +1c# +1f# +0U$ +0Y$ +0b$ +0f$ +0o$ +0s$ +0|$ +0"% +1E$ +1H$ +07% +0;% +0D% +0H% +0Q% +0U% +0^% +0b% +1'% +1*% +0w% +0{% +0&& +0*& +03& +07& +0@& +0D& +1g% +1j% +0Y& +0]& +0f& +0j& +0s& +0w& +0"' +0&' +1I& +1L& +0;' +0?' +0H' +0L' +0U' +0Y' +1\' +0b' +1_' +1)' +0-' +0g' +0P" +0]" +0j" +0w" +02# +0?# +0L# +0Y# +0r# +0!$ +0.$ +0;$ +0T$ +0a$ +0n$ +0{$ +06% +0C% +0P% +0]% +0v% +0%& +02& +0?& +0X& +0e& +0r& +0!' +0:' +0G' +0T' +1a' +0`' +b0 A" +b0 $# +b0 d# +b0 F$ +b0 (% +b0 h% +b0 J& +b1000 ,' +0c' +b10000000000000000000000000000000 R +b10000000000000000000000000000000 <" +1V" +b1 I" +0M' +b1 6 +b1 I +b0 3' +14 +15 +0y +0&" +01" +04" +05" +06" +07" +08" +09" +0:" +0z +0{ +0| +0} +0~ +0!" +0"" +0#" +0$" +0%" +0'" +0(" +0)" +0*" +0+" +0," +0-" +0." +0/" +00" +02" +13" +1o' +1z' +1'( +1)( +1*( +1+( +1,( +1-( +1.( +1p' +1q' +1r' +1s' +1t' +1u' +1v' +1w' +1x' +1y' +1{' +1|' +1}' +1~' +1!( +1"( +1#( +1$( +1%( +1(( +0T" +0M" +0K' +0D' +1e' +1*' +1n' +19( +0:( +1?( +0@( +1E( +0F( +1K( +0L( +1Q( +0R( +1W( +0X( +1]( +0^( +1c( +0d( +1i( +0j( +1o( +0p( +1u( +0v( +1{( +0|( +1#) +0$) +1)) +0*) +1/) +00) +15) +06) +1;) +0<) +1A) +0B) +1G) +0H) +1M) +0N) +1S) +0T) +1Y) +0Z) +1_) +0`) +1e) +0f) +1k) +0l) +1q) +0r) +1w) +0x) +1}) +0~) +1&( +1+* +0,* +0K" +0L" +0N" +0B' +0C' +0E' +0]' +1f' +0+' +12* +b1 < +b1 m' +b10000000000000000000000000000000 S +b10000000000000000000000000000000 x +b11111111111111111111111111111111 = +b11111111111111111111111111111111 j' +12( +17( +1=( +1C( +1I( +1O( +1U( +1[( +1a( +1g( +1m( +1s( +1y( +1!) +1') +1-) +13) +19) +1?) +1E) +1K) +1Q) +1W) +1]) +1c) +1i) +1o) +1u) +1{) +1%* +1)* +b0 : +b0 =* +b11111111111111111111111111111111 ; +b11111111111111111111111111111111 @* +0J" +0A' +1[' +10* +11( +18( +1>( +1D( +1J( +1P( +1V( +1\( +1b( +1h( +1n( +1t( +1z( +1") +1() +1.) +14) +1:) +1@) +1F) +1L) +1R) +1X) +1^) +1d) +1j) +1p) +1v) +1|) +1$* +1** +01* +b0 =" +b1000 (' +0/( +0"* +1.* +b1111111111111111111111111111111 + +b1111111111111111111111111111111 8 +b1111111111111111111111111111111 U +b1111111111111111111111111111111 W +b1111111111111111111111111111111 i' +b1111111111111111111111111111111 l' +b1111111111111111111111111111111 6* +b1111111111111111111111111111111 9* +b1111111111111111111111111111111 <* +b1111111111111111111111111111111 ?* +b10000000000000000000000000000000 * +b10000000000000000000000000000000 3 +b10000000000000000000000000000000 T +b10000000000000000000000000000000 h' +b10000000000000000000000000000000 k' +b10000000000000000000000000000000 5* +b10000000000000000000000000000000 8* +b10000000000000000000000000000000 ;* +b10000000000000000000000000000000 >* +b11001 - +b11100 . +#47500000 +b11010 - +b11101 . diff --git a/alu1bit.t.v b/alu1bit.t.v new file mode 100644 index 0000000..4591a50 --- /dev/null +++ b/alu1bit.t.v @@ -0,0 +1,209 @@ +// 1 Bit alu test bench +`timescale 1 ns / 1 ps +`include "alu1bit.v" + +module testALU1bit (); + wire out, cout; + reg a, b, cin; + reg[2:0] op; + + integer i, j; + integer passed_tests = 0; + integer tests = 0; + + ALU1bit alu (out,cout,a,b,cin,op); + + initial begin + + // Test ADD + $display("ADD:"); + op=3'b000; + // without cin + cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (((a + b) == out) & ((a & b) == cout)) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); end + end + end + // with cin + cin = 1; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (((a ~^ b) == out) & ((a | b) == cout)) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + // Test SUB + $display("SUB:"); + op=3'b001; + // without cin + cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (((a - b) == out) & ((a < b) == cout)) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + // with cin + cin = 1; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (((a ~^ b) == out) & ((a <= b) == cout)) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + + // Test XOR + $display("XOR:"); + op=3'b010; cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if ((a ^ b) == out) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + //Test SLT + $display("SLT:"); + op=3'b001; + // without cin + cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (((a - b) == out) & ((a < b) == cout)) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + // with cin + cin = 1; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (((a ~^ b) == out) & ((a <= b) == cout)) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + // Test AND + $display("AND:"); + op=3'b100; cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if ((a & b) == out) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + // Test NAND + $display("NAND:"); + op=3'b101; cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if (~(a&b) == out) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + // Test NOR + $display("NOR:"); + op=3'b110; cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if ((a ~| b) == out) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + + // Test OR + $display("OR:"); + op=3'b111; cin = 0; + for (i=0; i<2; i=i+1) begin + for (j=0; j<2; j=j+1) begin + a=i;b=j;#1000 + tests = tests + 1; + if ((a|b) == out) begin + passed_tests = passed_tests + 1; + $display("Passed test with: %b %b %b %b | %b %b", op, a, b, cin, out, cout); + end + else begin + $display("Failed test with: %b %b %b %b | %b %b*", op, a, b, cin, out, cout); + end + end + end + $display(" op a b cin|out cout "); + + $display("%2d/%2d Test Cases Passed", passed_tests, tests); + + end +endmodule diff --git a/alu1bit.v b/alu1bit.v new file mode 100644 index 0000000..ce271db --- /dev/null +++ b/alu1bit.v @@ -0,0 +1,73 @@ +// ALU1bit is a 1-Bit arithmetic logic unit +// It performs the following operations: +// b000 -> ADD +// b001 -> SUB +// b010 -> XOR +// b011 -> SLT +// b100 -> AND +// b101 -> NAND +// b110 -> NOR +// b111 -> OR + +`include "mux3bit.v" +`include "adder1bit.v" +`include "subtractor1bit.v" +`define AND and #30 +`define OR or #30 +`define NOT not #10 +`define XOR xor #30 +`define NOR nor #20 +`define NAND nand #20 + + +module ALU1bit +( + output out, + output cout, + input a, + input b, + input cin, + input[2:0] op +); + // Add + wire res_ADD; + wire cout_ADD; + Adder1bit adder(res_ADD, cout_ADD, a, b, cin); + + // Subtract + wire res_SUB; + wire cout_SUB; + Subtractor1bit subtractor(res_SUB, cout_SUB, a, b, cin); + + // Xor + wire res_XOR; + `XOR(res_XOR, a, b); + + // SLT + wire res_SLT; + wire cout_SLT; + Subtractor1bit slt(res_SLT, cout_SLT, a, b, cin); + + // And + wire res_AND; + `AND(res_AND, a, b); + + // Nand + wire res_NAND; + `NAND(res_NAND, a, b); + + // Nor + wire res_NOR; + `NOR(res_NOR, a, b); + + // Or + wire res_OR; + `OR(res_OR, a, b); + + // Use a behavioral mux to select operation + wire[7:0] muxRes = {res_OR, res_NOR, res_NAND, res_AND, res_SLT, res_XOR, res_SUB, res_ADD}; + wire[7:0] muxCout = {1'b0, 1'b0, 1'b0, 1'b0, cout_SLT, 1'b0, cout_SUB, cout_ADD}; + MUX3bit mux1(out, op, muxRes); + MUX3bit mux2(cout, op, muxCout); + +endmodule \ No newline at end of file diff --git a/aluK.v b/aluK.v new file mode 100644 index 0000000..062ddf6 --- /dev/null +++ b/aluK.v @@ -0,0 +1,64 @@ +//final 32-bit ALU + +`include "adder_subtracter.v" +`include "slt.v" +`include "and_32bit.v" +`include "nand_32bit.v" +`include "xor_32bit.v" +`include "nor_32bit.v" +`include "or_32bit.v" + +module ALUcontrolLUT +( + output reg cout, //addsub only + output reg flag, //addsub only + output reg zeroflag, + output reg[31:0] finalsignal, + input [2:0]ALUcommand, + input [31:0]a, + input [31:0]b + + +); +//everything going through the different parts +wire [31:0]addsub; +wire [31:0]xorin; +wire [31:0]slt; +wire [31:0]andin; +wire [31:0]nandin; +wire [31:0]norin; +wire [31:0]orin; +wire adder_cout; +wire adder_flag; + +adder_subtracter addsub0(addsub[31:0],adder_cout,adder_flag, a[31:0],b[31:0],ALUcommand[2:0]); +xor_32bit xor0(xorin[31:0],a[31:0],b[31:0]); +full_slt_32bit slt0(slt[31:0],a[31:0],b[31:0]); +and_32bit and0(andin[31:0],a[31:0],b[31:0]); +nand_32bit nand0(nandin[31:0],a[31:0],b[31:0]); +nor_32bit nor0(norin[31:0],a[31:0],b[31:0]); +or_32bit or0(orin[31:0],a[31:0],b[31:0]); + + + // update on changes to ALUcommand, a, or b + always @(ALUcommand or addsub or slt or andin or nandin or norin or xorin or orin) + begin + case (ALUcommand) + 3'b000: begin finalsignal[31:0] <= addsub[31:0]; cout <= adder_cout; flag <= adder_flag; end + 3'b001: begin finalsignal[31:0] <= addsub[31:0]; cout <= adder_cout; flag <= adder_flag; end + 3'b010: begin finalsignal[31:0] <= xorin[31:0]; cout <= 0; flag <= 0; end // carryout and flag should be 0 for all non-add/sub operations + 3'b011: begin finalsignal[31:0] <= slt[31:0]; cout <= 0; flag <= 0; end + 3'b100: begin finalsignal[31:0] <= andin[31:0]; cout <= 0; flag <= 0; end + 3'b101: begin finalsignal[31:0] <= nandin[31:0]; cout <= 0; flag <= 0; end + 3'b110: begin finalsignal[31:0] <= norin[31:0]; cout <= 0; flag <= 0; end + 3'b111: begin finalsignal[31:0] <= orin[31:0]; cout <= 0; flag <= 0; end + endcase + end +always @(finalsignal) begin + if(finalsignal[31:0]==32'b0)begin + zeroflag<=1; //indicates that zero + end + else + zeroflag<=0; + end +endmodule \ No newline at end of file diff --git a/and_32bit.v b/and_32bit.v new file mode 100644 index 0000000..f37937c --- /dev/null +++ b/and_32bit.v @@ -0,0 +1,38 @@ +module and_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + and bit0(out[0], a[0], b[0]); + and bit1(out[1], a[1], b[1]); + and bit2(out[2], a[2], b[2]); + and bit3(out[3], a[3], b[3]); + and bit4(out[4], a[4], b[4]); + and bit5(out[5], a[5], b[5]); + and bit6(out[6], a[6], b[6]); + and bit7(out[7], a[7], b[7]); + and bit8(out[8], a[8], b[8]); + and bit9(out[9], a[9], b[9]); + and bit10(out[10], a[10], b[10]); + and bit11(out[11], a[11], b[11]); + and bit12(out[12], a[12], b[12]); + and bit13(out[13], a[13], b[13]); + and bit14(out[14], a[14], b[14]); + and bit15(out[15], a[15], b[15]); + and bit16(out[16], a[16], b[16]); + and bit17(out[17], a[17], b[17]); + and bit18(out[18], a[18], b[18]); + and bit19(out[19], a[19], b[19]); + and bit20(out[20], a[20], b[20]); + and bit21(out[21], a[21], b[21]); + and bit22(out[22], a[22], b[22]); + and bit23(out[23], a[23], b[23]); + and bit24(out[24], a[24], b[24]); + and bit25(out[25], a[25], b[25]); + and bit26(out[26], a[26], b[26]); + and bit27(out[27], a[27], b[27]); + and bit28(out[28], a[28], b[28]); + and bit29(out[29], a[29], b[29]); + and bit30(out[30], a[30], b[30]); + and bit31(out[31], a[31], b[31]); +endmodule diff --git a/asm/.Makefile.swp b/asm/.Makefile.swp new file mode 100644 index 0000000..5f53501 Binary files /dev/null and b/asm/.Makefile.swp differ diff --git a/asm/Makefile b/asm/Makefile new file mode 100644 index 0000000..3b27942 --- /dev/null +++ b/asm/Makefile @@ -0,0 +1,27 @@ +# Generate machine code memory image from MIPS assembly + +# Get PROGRAM and MEMDUMP from project settings +include ../settings.mk + +MARS_PATH := ../../Mars4_5.jar +MARS_OPTS := a mc CompactTextAtZero +MARS := java -jar $(MARS_PATH) $(MARS_OPTS) + + +# Pattern rule for generating .text memory dump from MIPS assembly +%.text.hex: %.asm + $(MARS) dump .text HexText $@ $< + +# Pattern rule for generating .data memory dump from MIPS assembly +%.data.hex: %.asm + $(MARS) dump .data HexText $@ $< + + +# Shortcut (phony) targets for convenience +assemble: $(MEMDUMP) + +clean: + -rm -f $(MEMDUMP) + + +.PHONY: assemble clean diff --git a/asm/bens_fibonacci.asm b/asm/bens_fibonacci.asm new file mode 100644 index 0000000..d2d5279 --- /dev/null +++ b/asm/bens_fibonacci.asm @@ -0,0 +1,132 @@ +# Function call example: recursive Fibonacci + +main: +# Set up arguments for call to fib_test +addi $a0, $zero, 4 # arg0 = 4 +addi $a1, $zero, 10 # arg1 = 10 +jal fib_test + +# Print result +add $a0, $zero, $v0 # Copy result into argument register a0 +jal print_result + +# Jump to "exit", rather than falling through to subroutines +j program_end + +#------------------------------------------------------------------------------ +# Fibonacci test function. Equivalent C code: +# int fib_test(arg0, arg1) { +# return Fibonacci(arg0) + Fibonacci(arg1); +# } +# By MIPS calling convention, expects arguments in +# registers a0 and a1, and returns result in register v0. +fib_test: +# We will use s0 and s1 registers in this function, plus the ra register +# to return at the end. Save them to stack in case caller was using them. +addi $sp, $sp, -12 # Allocate three words on stack at once for three pushes +sw $ra, 8($sp) # Push ra on the stack (will be overwritten by Fib function calls) +sw $s0, 4($sp) # Push s0 onto stack +sw $s1, 0($sp) # Push s1 onto stack + +# a1 may be overwritten by called functions, so save it to s1 (saved temporary), +# which called function won't change, so we can use it later for the second fib call +add $s1, $zero, $a1 + +# Call Fib(arg0), save result in s0 +# arg0 is already in register a0, placed there by caller of fib_test +jal fib # Call fib(4), returns in register v0 +add $s0, $zero, $v0 # Move result to s0 so we can call fib again without overwriting + +# Call Fib(arg1), save result in s1 +add $a0, $zero, $s1 # Move original arg1 into register a0 for function call +jal fib +add $s1, $zero, $v0 # Move result to s1 + +# Add Fib(arg0) and Fib(arg1) into v0 (return value for fib_test) +add $v0, $s0, $s1 + +# Restore original values to s0 and s1 registers from stack before returning +lw $s1, 0($sp) # Pop s1 from stack +lw $s0, 4($sp) # Pop s0 from stack +lw $ra, 8($sp) # Pop ra from the stack so we can return to caller +addi $sp, $sp, 12 # Adjust stack pointer to reflect pops + +jr $ra # Return to caller + +#------------------------------------------------------------------------------ +# Recursive Fibonacci function. Equivalent C code: +# +# int Fibonacci(int n) { +# if (n == 0) return 0; // Base case +# if (n == 1) return 1; // Base case +# int fib_1 = Fibonacci(n - 1); +# int fib_2 = Fibonacci(n - 2); +# return fib_1+fib_2; +# } +fib: +# Test base cases. If we're in a base case, return directly (no need to use stack) +bne $a0, 0, testone +add $v0, $zero, $zero # a0 == 0 -> return 0 +jr $ra +testone: +bne $a0, 1, fib_body +add $v0, $zero, $a0 # a0 == 1 -> return 1 +jr $ra + +fib_body: +# Create stack frame for fib: push ra and s0 +addi $sp, $sp, -8 # Allocate two words on stack at once for two pushes +sw $ra, 4($sp) # Push ra on the stack (will be overwritten by recursive function calls) +sw $s0, 0($sp) # Push s0 onto stack + +# Call Fib(n-1), save result in s0 +add $s0, $zero, $a0 # Save a0 argument (n) in register s0 +addi $a0, $a0, -1 # a0 = n-1 +jal fib +add $a0, $s0, -2 # a0 = n-2 +add $s0, $zero, $v0 # s0 = Fib(n-1) + +# Call Fib(n-2), compute final result +jal fib +add $v0, $v0, $s0 # v0 = Fib(n-2) + Fib(n-1) + +# Restore registers and pop stack frame +lw $ra, 4($sp) +lw $s0, 0($sp) +addi $sp, $sp, 8 + +jr $ra # Return to caller + +#------------------------------------------------------------------------------ +# Utility function to print results +print_result: +# Create stack frame for ra and s0 +addi $sp, $sp, -8 +sw $ra, 4($sp) +sw $s0, 0($sp) + +add $s0, $zero, $a0 # Save argument (integer to print) to s0 + +li $v0, 4 # Service code to print string +la $a0, result_str # Argument is memory address of string to print +syscall + +li $v0, 1 # Service code to print integer +add $a0, $zero, $s0 # Argument is integer to print +syscall + +# Restore registers and pop stack frame +lw $ra, 4($sp) +lw $s0, 0($sp) +addi $sp, $sp, 8 + +#------------------------------------------------------------------------------ +# Jump loop to end execution, so we don't fall through to .data section +program_end: +j program_end + + +#------------------------------------------------------------------------------ +.data +# Null-terminated string to print as part of result +result_str: .asciiz "\nFib(4)+Fib(10) = " diff --git a/asm/fibonacci.asm b/asm/fibonacci.asm new file mode 100644 index 0000000..d2d5279 --- /dev/null +++ b/asm/fibonacci.asm @@ -0,0 +1,132 @@ +# Function call example: recursive Fibonacci + +main: +# Set up arguments for call to fib_test +addi $a0, $zero, 4 # arg0 = 4 +addi $a1, $zero, 10 # arg1 = 10 +jal fib_test + +# Print result +add $a0, $zero, $v0 # Copy result into argument register a0 +jal print_result + +# Jump to "exit", rather than falling through to subroutines +j program_end + +#------------------------------------------------------------------------------ +# Fibonacci test function. Equivalent C code: +# int fib_test(arg0, arg1) { +# return Fibonacci(arg0) + Fibonacci(arg1); +# } +# By MIPS calling convention, expects arguments in +# registers a0 and a1, and returns result in register v0. +fib_test: +# We will use s0 and s1 registers in this function, plus the ra register +# to return at the end. Save them to stack in case caller was using them. +addi $sp, $sp, -12 # Allocate three words on stack at once for three pushes +sw $ra, 8($sp) # Push ra on the stack (will be overwritten by Fib function calls) +sw $s0, 4($sp) # Push s0 onto stack +sw $s1, 0($sp) # Push s1 onto stack + +# a1 may be overwritten by called functions, so save it to s1 (saved temporary), +# which called function won't change, so we can use it later for the second fib call +add $s1, $zero, $a1 + +# Call Fib(arg0), save result in s0 +# arg0 is already in register a0, placed there by caller of fib_test +jal fib # Call fib(4), returns in register v0 +add $s0, $zero, $v0 # Move result to s0 so we can call fib again without overwriting + +# Call Fib(arg1), save result in s1 +add $a0, $zero, $s1 # Move original arg1 into register a0 for function call +jal fib +add $s1, $zero, $v0 # Move result to s1 + +# Add Fib(arg0) and Fib(arg1) into v0 (return value for fib_test) +add $v0, $s0, $s1 + +# Restore original values to s0 and s1 registers from stack before returning +lw $s1, 0($sp) # Pop s1 from stack +lw $s0, 4($sp) # Pop s0 from stack +lw $ra, 8($sp) # Pop ra from the stack so we can return to caller +addi $sp, $sp, 12 # Adjust stack pointer to reflect pops + +jr $ra # Return to caller + +#------------------------------------------------------------------------------ +# Recursive Fibonacci function. Equivalent C code: +# +# int Fibonacci(int n) { +# if (n == 0) return 0; // Base case +# if (n == 1) return 1; // Base case +# int fib_1 = Fibonacci(n - 1); +# int fib_2 = Fibonacci(n - 2); +# return fib_1+fib_2; +# } +fib: +# Test base cases. If we're in a base case, return directly (no need to use stack) +bne $a0, 0, testone +add $v0, $zero, $zero # a0 == 0 -> return 0 +jr $ra +testone: +bne $a0, 1, fib_body +add $v0, $zero, $a0 # a0 == 1 -> return 1 +jr $ra + +fib_body: +# Create stack frame for fib: push ra and s0 +addi $sp, $sp, -8 # Allocate two words on stack at once for two pushes +sw $ra, 4($sp) # Push ra on the stack (will be overwritten by recursive function calls) +sw $s0, 0($sp) # Push s0 onto stack + +# Call Fib(n-1), save result in s0 +add $s0, $zero, $a0 # Save a0 argument (n) in register s0 +addi $a0, $a0, -1 # a0 = n-1 +jal fib +add $a0, $s0, -2 # a0 = n-2 +add $s0, $zero, $v0 # s0 = Fib(n-1) + +# Call Fib(n-2), compute final result +jal fib +add $v0, $v0, $s0 # v0 = Fib(n-2) + Fib(n-1) + +# Restore registers and pop stack frame +lw $ra, 4($sp) +lw $s0, 0($sp) +addi $sp, $sp, 8 + +jr $ra # Return to caller + +#------------------------------------------------------------------------------ +# Utility function to print results +print_result: +# Create stack frame for ra and s0 +addi $sp, $sp, -8 +sw $ra, 4($sp) +sw $s0, 0($sp) + +add $s0, $zero, $a0 # Save argument (integer to print) to s0 + +li $v0, 4 # Service code to print string +la $a0, result_str # Argument is memory address of string to print +syscall + +li $v0, 1 # Service code to print integer +add $a0, $zero, $s0 # Argument is integer to print +syscall + +# Restore registers and pop stack frame +lw $ra, 4($sp) +lw $s0, 0($sp) +addi $sp, $sp, 8 + +#------------------------------------------------------------------------------ +# Jump loop to end execution, so we don't fall through to .data section +program_end: +j program_end + + +#------------------------------------------------------------------------------ +.data +# Null-terminated string to print as part of result +result_str: .asciiz "\nFib(4)+Fib(10) = " diff --git a/assemblyTestK.asm b/assemblyTestK.asm new file mode 100644 index 0000000..76c101f --- /dev/null +++ b/assemblyTestK.asm @@ -0,0 +1,9 @@ +#lw, sw, j, jr, jal, bne, xori, addi, add, sub, slt +#addi, add, sub, slt +addi $t0, $zero, 1 +addi $t2, $zero, 3 +add $t1, $t0, $t2 +sub $t3, $t2, $t1 #should = 36 = $t0 +slt $t4, $t3, $t0 +slt $t6, $t0, $t3 +slt $t5, $t3, $t2 diff --git a/ben_fib_mem b/ben_fib_mem new file mode 100644 index 0000000..3a5bbdd --- /dev/null +++ b/ben_fib_mem @@ -0,0 +1,120 @@ +20040004 +20040004 + +2005000a + +201d3ffc + +0c000008 + +00022020 + +0c00002d + +0800003a + +23bdfff4 + +afbf0008 + +afb00004 + +afb10000 + +00058820 + +0c000018 + +00028020 + +00112020 + +0c000018 + +00028820 + +02111020 + +8fb10000 + +8fb00004 + +8fbf0008 + +23bd000c + +03e00008 + +20010000 + +14240003 + +00001020 + +03e00008 + +20010001 + +14240003 + +00041020 + +03e00008 + +23bdfff8 + +afbf0004 + +afb00000 + +00048020 + +2084ffff + +0c000018 + +2204fffe + +00028020 + +0c000018 + +00501020 + +8fbf0004 + +8fb00000 + +23bd0008 + +03e00008 + +23bdfff8 + +afbf0004 + +afb00000 + +00048020 + +24020004 + +20042000 + +0000000c + +24020001 + +00102020 + +0000000c + +8fbf0004 + +8fb00000 + +23bd0008 + +0800003a + + diff --git a/control.t.v b/control.t.v new file mode 100644 index 0000000..f42cbaf --- /dev/null +++ b/control.t.v @@ -0,0 +1,127 @@ +`include "control.v" + +`define LW 6'h23 +`define SW 6'h2b +`define J 6'h02 +`define R 6'h00 +`define JAL 6'h03 +`define BNE 6'h05 +`define XORI 6'h0e +`define ADDI 6'h08 +`define JR 6'h08 +`define ADD 6'h24 +`define SUB 6'h22 +`define SLT 6'h2a + +module testControl(); + +// LW, SW, J, JR, JAL, BNE, XORI, ADDI, ADD, SUB, SLT +// op: h23 h2b h2 h0 h03 h05 h0e h08 h00 h00 h00 +// fun: -- -- -- h8 -- -- -- -- h24 h22 h2a + + reg[5:0] opcode; + reg[5:0] funct = 6'h0; + wire writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, memoryToRegister, is_jump, is_jr, is_branch; + wire[2:0] command; + + control dut(.opcode(opcode), + .funct(funct), + .writeReg(writeReg), + .linkToPC(linkToPC), + .ALUoperandSource(ALU_OperandSource), + .memoryRead(memoryRead), + .memoryWrite(memoryWrite), + .memoryToRegister(memoryToRegister), + .command(command), + .isjump(is_jump), + .isjr(isjr), + .isbranch(is_branch)); + + task checkResult; + input[2:0] exp_command; + input exp_wr, exp_l, exp_alu_choose, exp_mr, exp_mw, exp_m2r, exp_j, exp_b; + input[2:0] command; + input wr, l, alu_choose, mr, mw, m2r, j, b; + + begin + if ((command == exp_command) && (wr == exp_wr) && (l == exp_l) && + (alu_choose == exp_alu_choose) && (mr == exp_mr) && + (mw == exp_mw) && (m2r == exp_m2r) && + (m2r == exp_m2r) && (j == exp_j) && (b == exp_b)) begin + $display("Passed."); + end + else begin + $display("Failed"); + $display(opcode, funct); + $display("Command-current: %b expected: %b", command, exp_command); + $display("WriteReg-current: %b expected: %b", wr, exp_wr); + $display("ALU-current: %b expected: %b", alu_choose, exp_alu_choose); + $display("MemoryRead-current: %b expected: %b", mr, exp_mr); + $display("MemoryWrite-current: %b expected: %b", mw, exp_mw); + $display("MemToReg-current: %b expected: %b", m2r, exp_m2r); + $display("Jump-current: %b expected: %b", j, exp_j); + $display("Branch-current: %b expected: %b", b, exp_b); + end + end + endtask + + initial begin + + opcode = `LW; #10 + checkResult(3'h0, 1'b1, 1'b0, 1'b0, 1'b1, 1'b0, 1'b1, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `SW; #10 + checkResult(3'h0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1, 1'b0, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `J; #10 + checkResult(3'h0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `JAL; #10 + checkResult(3'h0, 1'b1, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `BNE; #10 + checkResult(3'h1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `XORI; #10 + checkResult(3'b011, 1'b1, 1'b0, 1'b1, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `ADDI; #10 + checkResult(3'h0, 1'b1, 1'b0, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + opcode = `R; + funct = `JR; #10 + checkResult(3'h0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b1, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + funct = `ADD; #10 + checkResult(3'h0, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + funct = `SUB; #10 + checkResult(3'b001, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + funct = `SLT; #10 + checkResult(3'b010, 1'b1, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, 1'b0, + command, writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, + memoryToRegister, is_jump, is_branch); + + end // initial +endmodule // testControl diff --git a/control.v b/control.v new file mode 100644 index 0000000..fd418cb --- /dev/null +++ b/control.v @@ -0,0 +1,183 @@ +// The control takes the opcode from the 32 bit instruction +// and sets all the control variables (such as writeEnables) + +// opcodes we need to support: +// LW, SW, J, JR, JAL, BNE, XORI, ADDI, ADD, SUB, SLT + +// define controls for ALU +`define ADD 3'b000 +`define SUB 3'b001 +`define SLT 3'b010 +`define XOR 3'b011 +`define ALUDB 0 +`define ALUIMM 1 + +`define LW 6'h23 +`define SW 6'h2b +`define J 6'h02 +`define R 6'h00 +`define JAL 6'h03 +`define BNE 6'h05 +`define XORI 6'h0e +`define ADDI 6'h08 +`define JRF 6'h08 +`define ADDF 6'h20 +`define SUBF 6'h22 +`define SLTF 6'h2a + +module control ( + input[5:0] opcode, + input[5:0] funct, + output reg writeReg, + output reg linkToPC, + output reg ALUoperandSource, // 0 for Db, 1 for immediate + output reg memoryRead, + output reg memoryWrite, + output reg memoryToRegister, + output reg [2:0] command, // sets the command for our ALU + output reg isjump, + output reg isjr, + output reg isbranch +); + // all of these will need some if cases or something + always @(opcode or funct) begin + case(opcode) + // R - type + `R: begin + linkToPC = 0; + ALUoperandSource = `ALUDB; + memoryRead = 0; + memoryWrite = 0; + memoryToRegister = 0; + isbranch = 0; + isjr = 0; + case(funct) + // Jump Register + `JRF: begin + writeReg = 0; + command = 3'h0; + isjump = 1; + isjr = 1; + end + // ADD + `ADDF: begin + writeReg = 1; + command = `ADD; + isjump = 0; + end + // SUB + `SUBF: begin + writeReg = 1; + command = `SUB; + isjump = 0; + end + // SLT + `SLTF: begin + writeReg = 1; + command = `SLT; + isjump = 0; + end + endcase + end + + // Load Word + `LW: begin + writeReg = 1; + linkToPC = 0; + ALUoperandSource = 0; + memoryRead = 1; + memoryWrite = 0; + memoryToRegister = 1; + command = 3'h0; + isjump = 0; + isjr = 0; + isbranch = 0; + end + + // Store Word + `SW: begin + writeReg = 0; + linkToPC = 0; + ALUoperandSource = 1; + memoryRead = 0; + memoryWrite = 1; + memoryToRegister = 0; + command = 3'h0; + isjump = 0; + isjr = 0; + isbranch = 0; + end + + // Jump + 6'h2: begin + writeReg = 0; + linkToPC = 0; + ALUoperandSource = 0; + memoryRead = 0; + memoryWrite = 0; + memoryToRegister = 0; + command = 3'h0; + isjump = 1; + isjr = 0; + isbranch = 0; + end + + // Jump ad Link + 6'h3: begin + writeReg = 1; + linkToPC = 1; + ALUoperandSource = 0; + memoryRead = 0; + memoryWrite = 0; + memoryToRegister = 0; + command = 3'h0; + isjump = 1; + isjr = 0; + isbranch = 0; + end + + // BNE + 6'h5: begin + writeReg = 0; + linkToPC = 0; + ALUoperandSource = `ALUDB; + memoryRead = 1; + memoryWrite = 0; + memoryToRegister = 0; + command = `SUB; + isjump = 0; + isjr = 0; + isbranch = 1; + end + + // XORI - + 6'h0e: begin + writeReg = 1; + linkToPC = 0; + ALUoperandSource = `ALUIMM; + memoryRead = 1; + memoryWrite = 0; + memoryToRegister = 0; + command = `XOR; + isjump = 0; + isjr = 0; + isbranch = 0; + end + + // ADDI - + 6'h8: begin + writeReg = 1; + linkToPC = 0; + ALUoperandSource = `ALUIMM; + memoryRead = 1; + memoryWrite = 0; + memoryToRegister = 0; + command = `ADD; + isjump = 0; + isjr = 0; + isbranch = 0; + end + + endcase// opcode + end +endmodule diff --git a/cpu.out b/cpu.out new file mode 100755 index 0000000..82baf7c --- /dev/null +++ b/cpu.out @@ -0,0 +1,10836 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +<<<<<<< HEAD +S_0x290c140 .scope module, "addressmux" "addressmux" 2 35; + .timescale 0 0; +v0x280bdd0_0 .net "addr0", 4 0, C4; 0 drivers +v0x2919ff0_0 .net "addr1", 4 0, C4; 0 drivers +v0x291a090_0 .net "mux_address", 0 0, C4; 0 drivers +v0x29441d0_0 .var "out", 0 0; +E_0x289db50 .event edge, v0x291a090_0, v0x2919ff0_0, v0x280bdd0_0; +S_0x2903da0 .scope module, "behavioralFullAdder" "behavioralFullAdder" 3 3; + .timescale 0 0; +v0x2943600_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x2933e80_0 .net *"_s11", 1 0, L_0x29f3ec0; 1 drivers +v0x2933f20_0 .net *"_s13", 1 0, L_0x29f4000; 1 drivers +v0x2942a30_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x2941e60_0 .net *"_s17", 1 0, L_0x29f4130; 1 drivers +v0x2941ee0_0 .net *"_s3", 1 0, L_0x29f3ce0; 1 drivers +v0x2941290_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x2941330_0 .net *"_s7", 1 0, L_0x29f3dd0; 1 drivers +v0x29406c0_0 .net "a", 0 0, C4; 0 drivers +v0x2940760_0 .net "b", 0 0, C4; 0 drivers +v0x293faf0_0 .net "carryin", 0 0, C4; 0 drivers +v0x293fb90_0 .net "carryout", 0 0, L_0x29f3b50; 1 drivers +v0x2933c90_0 .net "sum", 0 0, L_0x29f3bf0; 1 drivers +L_0x29f3b50 .part L_0x29f4130, 1, 1; +L_0x29f3bf0 .part L_0x29f4130, 0, 1; +L_0x29f3ce0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x29f3dd0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x29f3ec0 .arith/sum 2, L_0x29f3ce0, L_0x29f3dd0; +L_0x29f4000 .concat [ 1 1 0 0], C4, C4<0>; +L_0x29f4130 .arith/sum 2, L_0x29f3ec0, L_0x29f4000; +S_0x28eb4b0 .scope module, "cpu" "cpu" 4 18; + .timescale 0 0; +v0x29f1c70_0 .net "ALU_OperandSource", 0 0, v0x29f1500_0; 1 drivers +v0x29f1cf0_0 .net "ALU_result", 31 0, v0x29e0dd0_0; 1 drivers +v0x29f1e00_0 .net "Da", 31 0, L_0x29fa450; 1 drivers +v0x29f1e80_0 .net "Db", 31 0, L_0x29ef040; 1 drivers +v0x29f1f30_0 .net "Rd", 4 0, L_0x29f54e0; 1 drivers +RS_0x7ff1473ef4e8 .resolv tri, L_0x29f5290, L_0x29f5760, C4, C4; +v0x29f1fb0_0 .net8 "Rs", 4 0, RS_0x7ff1473ef4e8; 2 drivers +RS_0x7ff1473dc468 .resolv tri, L_0x29f5440, L_0x29f5800, C4, C4; +v0x29f20c0_0 .net8 "Rt", 4 0, RS_0x7ff1473dc468; 2 drivers +v0x29f2140_0 .net *"_s5", 30 0, C4; 1 drivers +v0x29f21c0_0 .net *"_s7", 0 0, L_0x2a5e3b0; 1 drivers +v0x29f2240_0 .net "carryout", 0 0, v0x29b2f50_0; 1 drivers +v0x29f22c0_0 .net "clk", 0 0, C4; 0 drivers +v0x29f2340_0 .net "command", 2 0, v0x29f1580_0; 1 drivers +v0x29f24c0_0 .net "dataOut", 0 0, L_0x2a5e250; 1 drivers +v0x29f2540_0 .net "funct", 5 0, L_0x29f5620; 1 drivers +v0x29f2640_0 .net "imm", 15 0, L_0x29f58a0; 1 drivers +v0x29f26c0_0 .net "instruction", 31 0, L_0x29f0eb0; 1 drivers +v0x29f25c0_0 .net "is_branch", 0 0, v0x29f1680_0; 1 drivers +v0x29f27d0_0 .net "is_jump", 0 0, v0x29f1800_0; 1 drivers +v0x29f2740_0 .net "isjr", 0 0, v0x29f1780_0; 1 drivers +v0x29f28f0_0 .net "jump_target", 25 0, v0x2936d80_0; 1 drivers +v0x29f2a20_0 .net "linkToPC", 0 0, v0x29f18d0_0; 1 drivers +v0x29f2aa0_0 .net "memoryRead", 0 0, v0x29f19a0_0; 1 drivers +v0x29f2970_0 .net "memoryToRegister", 0 0, v0x29f1a70_0; 1 drivers +v0x29f2c30_0 .net "memoryWrite", 0 0, v0x29f1af0_0; 1 drivers +RS_0x7ff1473f0238 .resolv tri, L_0x29f51f0, L_0x29f56c0, L_0x29f5330, C4; +v0x29f2d80_0 .net8 "opcode", 5 0, RS_0x7ff1473f0238; 3 drivers +v0x29f2e90_0 .net "overflow", 0 0, v0x29e0e50_0; 1 drivers +v0x29f2cb0_0 .net "pc", 31 0, v0x29f1150_0; 1 drivers +v0x29f3080_0 .net "regAddr", 4 0, v0x293d520_0; 1 drivers +v0x29f2f10_0 .net "regWrite", 0 0, C4; 0 drivers +v0x29f31f0_0 .net "reg_to_write", 4 0, v0x2939c80_0; 1 drivers +v0x29f3100_0 .net "shift", 4 0, L_0x29f5580; 1 drivers +v0x29f3370_0 .net "tempWriteData", 31 0, v0x2947ce0_0; 1 drivers +v0x29f3270_0 .net "temp_jump_target", 25 0, L_0x29f5b50; 1 drivers +v0x29f3500_0 .net "writeData", 31 0, v0x294a1c0_0; 1 drivers +v0x29f33f0_0 .net "writeReg", 0 0, v0x29f1bf0_0; 1 drivers +v0x29f3470_0 .net "zero", 0 0, v0x29e1230_0; 1 drivers +L_0x2a5e250 .part L_0x2a5d6c0, 0, 1; +L_0x2a5e3b0 .part L_0x2a5e250, 0, 1; +L_0x2a5e4a0 .concat [ 1 31 0 0], L_0x2a5e3b0, C4; +L_0x2a5e5e0 .part L_0x29fa450, 0, 26; +S_0x29f1410 .scope module, "CPU_control" "control" 4 47, 5 28, S_0x28eb4b0; + .timescale 0 0; +v0x29f1500_0 .var "ALUoperandSource", 0 0; +v0x29f1580_0 .var "command", 2 0; +v0x29f1600_0 .alias "funct", 5 0, v0x29f2540_0; +v0x29f1680_0 .var "isbranch", 0 0; +v0x29f1780_0 .var "isjr", 0 0; +v0x29f1800_0 .var "isjump", 0 0; +v0x29f18d0_0 .var "linkToPC", 0 0; +v0x29f19a0_0 .var "memoryRead", 0 0; +v0x29f1a70_0 .var "memoryToRegister", 0 0; +v0x29f1af0_0 .var "memoryWrite", 0 0; +v0x29f1b70_0 .alias "opcode", 5 0, v0x29f2d80_0; +v0x29f1bf0_0 .var "writeReg", 0 0; +E_0x29f02e0 .event edge, v0x29ef0d0_0, v0x29ee9e0_0; +S_0x29ef320 .scope module, "IF" "ifetch" 4 63, 6 6, S_0x28eb4b0; + .timescale 0 0; +v0x29f0810_0 .net "_", 0 0, L_0x29f4dd0; 1 drivers +v0x29f08b0_0 .net *"_s13", 3 0, L_0x29f4f20; 1 drivers +v0x29f0930_0 .net *"_s14", 1 0, C4<00>; 1 drivers +v0x29f09d0_0 .net *"_s7", 0 0, L_0x29f4460; 1 drivers +v0x29f0a80_0 .net *"_s8", 15 0, L_0x29f4590; 1 drivers +v0x29f0b20_0 .alias "branch_addr", 15 0, v0x29f2640_0; +v0x29f0bf0_0 .var "branch_addr_full", 31 0; +v0x29f0c90_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29f0d60_0 .net "increased_pc", 31 0, v0x29efbc0_0; 1 drivers +v0x29f0e30_0 .alias "is_branch", 0 0, v0x29f25c0_0; +v0x29f0f10_0 .alias "is_jump", 0 0, v0x29f27d0_0; +v0x29f0f90_0 .alias "jump_addr", 25 0, v0x29f28f0_0; +v0x29f1040_0 .alias "out", 31 0, v0x29f26c0_0; +v0x29f1150_0 .var "pc", 31 0; +v0x29f1250_0 .net "pc_next", 31 0, v0x29ef680_0; 1 drivers +v0x29f1300_0 .net "to_add", 31 0, v0x29f0230_0; 1 drivers +v0x29f11d0_0 .net "write_pc", 0 0, C4<1>; 1 drivers +L_0x29f4460 .part L_0x29f58a0, 15, 1; +LS_0x29f4590_0_0 .concat [ 1 1 1 1], L_0x29f4460, L_0x29f4460, L_0x29f4460, L_0x29f4460; +LS_0x29f4590_0_4 .concat [ 1 1 1 1], L_0x29f4460, L_0x29f4460, L_0x29f4460, L_0x29f4460; +LS_0x29f4590_0_8 .concat [ 1 1 1 1], L_0x29f4460, L_0x29f4460, L_0x29f4460, L_0x29f4460; +LS_0x29f4590_0_12 .concat [ 1 1 1 1], L_0x29f4460, L_0x29f4460, L_0x29f4460, L_0x29f4460; +L_0x29f4590 .concat [ 4 4 4 4], LS_0x29f4590_0_0, LS_0x29f4590_0_4, LS_0x29f4590_0_8, LS_0x29f4590_0_12; +L_0x29f46f0 .concat [ 16 16 0 0], L_0x29f58a0, L_0x29f4590; +L_0x29f4f20 .part v0x29f1150_0, 28, 4; +L_0x29f4fc0 .concat [ 2 26 4 0], C4<00>, v0x2936d80_0, L_0x29f4f20; +S_0x29f0310 .scope module, "program_mem" "instruction_memory" 6 22, 7 3, S_0x29ef320; + .timescale 0 0; +L_0x29f0eb0 .functor BUFZ 32, L_0x29f4270, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x29f0430_0 .alias "Addr", 31 0, v0x29f2cb0_0; +v0x29f04d0_0 .net "DataIn", 31 0, C4<00000000000000000000000000000000>; 1 drivers +v0x29f0570_0 .alias "DataOut", 31 0, v0x29f26c0_0; +v0x29f05f0_0 .net *"_s0", 31 0, L_0x29f4270; 1 drivers +v0x29f0670_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29f06f0 .array "mem", 0 60, 31 0; +v0x29f0770_0 .net "regWE", 0 0, C4<0>; 1 drivers +E_0x29f0400 .event edge, v0x294a4c0_0; +L_0x29f4270 .array/port v0x29f06f0, v0x29f1150_0; +S_0x29efed0 .scope module, "should_branch" "mux2to1by32" 6 28, 2 18, S_0x29ef320; + .timescale 0 0; +v0x29f0030_0 .alias "address", 0 0, v0x29f25c0_0; +v0x29f00f0_0 .net "input0", 31 0, C4<00000000000000000000000000000100>; 1 drivers +v0x29f0190_0 .net "input1", 31 0, L_0x29f46f0; 1 drivers +v0x29f0230_0 .var "out", 31 0; +E_0x29effc0 .event edge, v0x29f0030_0, v0x29f0190_0, v0x29f00f0_0; +S_0x29ef700 .scope module, "add_to_pc" "add32bit" 6 33, 8 3, S_0x29ef320; + .timescale 0 0; +L_0x29f4790 .functor XNOR 1, L_0x29f4aa0, L_0x29f4b90, C4<0>, C4<0>; +L_0x29f4c80 .functor XOR 1, v0x29efc40_0, L_0x29f4ce0, C4<0>, C4<0>; +L_0x29f4dd0 .functor AND 1, L_0x29f4c80, L_0x29f4790, C4<1>, C4<1>; +v0x29ef860_0 .net *"_s1", 0 0, L_0x29f4aa0; 1 drivers +v0x29ef920_0 .net *"_s3", 0 0, L_0x29f4b90; 1 drivers +v0x29ef9c0_0 .net *"_s5", 0 0, L_0x29f4ce0; 1 drivers +v0x29efa60_0 .alias "a", 31 0, v0x29f2cb0_0; +v0x29efb40_0 .alias "b", 31 0, v0x29f1300_0; +v0x29efbc0_0 .var "c", 31 0; +v0x29efc40_0 .var "carry", 0 0; +v0x29efcc0_0 .net "carryXorSign", 0 0, L_0x29f4c80; 1 drivers +v0x29efd90_0 .alias "overflow", 0 0, v0x29f0810_0; +v0x29efe30_0 .net "sameSign", 0 0, L_0x29f4790; 1 drivers +E_0x29ef7f0 .event edge, v0x29efb40_0, v0x294a4c0_0; +L_0x29f4aa0 .part v0x29f1150_0, 31, 1; +L_0x29f4b90 .part v0x29f0230_0, 31, 1; +L_0x29f4ce0 .part v0x29efbc0_0, 31, 1; +S_0x29ef410 .scope module, "should_jump" "mux2to1by32" 6 38, 2 18, S_0x29ef320; + .timescale 0 0; +v0x29ef500_0 .alias "address", 0 0, v0x29f27d0_0; +v0x29ef580_0 .alias "input0", 31 0, v0x29f0d60_0; +v0x29ef600_0 .net "input1", 31 0, L_0x29f4fc0; 1 drivers +v0x29ef680_0 .var "out", 31 0; +E_0x29edf20 .event edge, v0x29ef500_0, v0x29ef600_0, v0x29ef580_0; +S_0x29eedd0 .scope module, "ID_R" "instructionDecoderR" 4 75, 9 2, S_0x28eb4b0; + .timescale 0 0; +v0x29eeec0_0 .alias "Rd", 4 0, v0x29f1f30_0; +v0x29eef40_0 .alias "Rs", 4 0, v0x29f1fb0_0; +v0x29eefc0_0 .alias "Rt", 4 0, v0x29f20c0_0; +v0x29ef0d0_0 .alias "funct", 5 0, v0x29f2540_0; +v0x29ef150_0 .alias "instruction", 31 0, v0x29f26c0_0; +v0x29ef1d0_0 .alias "opcode", 5 0, v0x29f2d80_0; +v0x29ef2a0_0 .alias "shift", 4 0, v0x29f3100_0; +L_0x29f51f0 .part L_0x29f0eb0, 26, 6; +L_0x29f5290 .part L_0x29f0eb0, 21, 5; +L_0x29f5440 .part L_0x29f0eb0, 16, 5; +L_0x29f54e0 .part L_0x29f0eb0, 11, 5; +L_0x29f5580 .part L_0x29f0eb0, 6, 5; +L_0x29f5620 .part L_0x29f0eb0, 0, 6; +S_0x29eea60 .scope module, "ID_I" "instructionDecoderI" 4 76, 10 2, S_0x28eb4b0; + .timescale 0 0; +v0x29eeb50_0 .alias "Rs", 4 0, v0x29f1fb0_0; +v0x29eebd0_0 .alias "Rt", 4 0, v0x29f20c0_0; +v0x29eec50_0 .alias "imm", 15 0, v0x29f2640_0; +v0x29eecd0_0 .alias "instruction", 31 0, v0x29f26c0_0; +v0x29eed50_0 .alias "opcode", 5 0, v0x29f2d80_0; +L_0x29f56c0 .part L_0x29f0eb0, 26, 6; +L_0x29f5760 .part L_0x29f0eb0, 21, 5; +L_0x29f5800 .part L_0x29f0eb0, 16, 5; +L_0x29f58a0 .part L_0x29f0eb0, 0, 16; +S_0x29ee870 .scope module, "ID_J" "instructionDecoderJ" 4 77, 11 2, S_0x28eb4b0; + .timescale 0 0; +v0x29ee560_0 .alias "instruction", 31 0, v0x29f26c0_0; +v0x29ee960_0 .alias "jump_target", 25 0, v0x29f3270_0; +v0x29ee9e0_0 .alias "opcode", 5 0, v0x29f2d80_0; +L_0x29f5330 .part L_0x29f0eb0, 26, 6; +L_0x29f5b50 .part L_0x29f0eb0, 0, 26; +S_0x29e1ce0 .scope module, "regfile" "regfile" 4 82, 12 15, S_0x28eb4b0; + .timescale 0 0; +v0x29eccd0_0 .alias "Clk", 0 0, v0x29f22c0_0; +v0x29e9180_0 .alias "ReadData1", 31 0, v0x29f1e00_0; +v0x29e9200_0 .alias "ReadData2", 31 0, v0x29f1e80_0; +v0x29e9310_0 .alias "ReadRegister1", 4 0, v0x29f1fb0_0; +v0x29ed160_0 .alias "ReadRegister2", 4 0, v0x29f20c0_0; +v0x29ed1e0_0 .alias "RegWrite", 0 0, v0x29f2f10_0; +v0x29ed260_0 .alias "WriteData", 31 0, v0x29f3500_0; +v0x29ed2e0_0 .alias "WriteRegister", 4 0, v0x29f3080_0; +v0x29ed360_0 .net "decoder", 31 0, L_0x29f5ce0; 1 drivers +v0x29ed410_0 .net "reg0", 31 0, v0x29e8d80_0; 1 drivers +v0x29ed490_0 .net "reg1", 31 0, v0x29ec270_0; 1 drivers +v0x29ed510_0 .net "reg10", 31 0, v0x29ea410_0; 1 drivers +v0x29ed600_0 .net "reg11", 31 0, v0x29ea0b0_0; 1 drivers +v0x29ed680_0 .net "reg12", 31 0, v0x29e9d50_0; 1 drivers +v0x29ed780_0 .net "reg13", 31 0, v0x29e99f0_0; 1 drivers +v0x29ed800_0 .net "reg14", 31 0, v0x29e9690_0; 1 drivers +v0x29ed700_0 .net "reg15", 31 0, v0x29e7550_0; 1 drivers +v0x29ed910_0 .net "reg16", 31 0, v0x29e7160_0; 1 drivers +v0x29ed880_0 .net "reg17", 31 0, v0x29e8a20_0; 1 drivers +v0x29eda30_0 .net "reg18", 31 0, v0x29e86c0_0; 1 drivers +v0x29ed990_0 .net "reg19", 31 0, v0x29e8360_0; 1 drivers +v0x29edb60_0 .net "reg2", 31 0, v0x29ebf10_0; 1 drivers +v0x29edab0_0 .net "reg20", 31 0, v0x29e8000_0; 1 drivers +v0x29edca0_0 .net "reg21", 31 0, v0x29e7ca0_0; 1 drivers +v0x29edbe0_0 .net "reg22", 31 0, v0x29e7940_0; 1 drivers +v0x29eddf0_0 .net "reg23", 31 0, v0x29e75e0_0; 1 drivers +v0x29edd20_0 .net "reg24", 31 0, v0x29e6360_0; 1 drivers +v0x29edf50_0 .net "reg25", 31 0, v0x29e6e00_0; 1 drivers +v0x29ede70_0 .net "reg26", 31 0, v0x29e6aa0_0; 1 drivers +v0x29ee0c0_0 .net "reg27", 31 0, v0x29e6790_0; 1 drivers +v0x29edfd0_0 .net "reg28", 31 0, v0x29e63f0_0; 1 drivers +v0x29ee240_0 .net "reg29", 31 0, v0x29e6000_0; 1 drivers +v0x29ee140_0 .net "reg3", 31 0, v0x29ebbb0_0; 1 drivers +v0x29ee1c0_0 .net "reg30", 31 0, v0x29e5c50_0; 1 drivers +v0x29ee3e0_0 .net "reg31", 31 0, v0x29e58e0_0; 1 drivers +v0x29ee460_0 .net "reg4", 31 0, v0x29eb850_0; 1 drivers +v0x29ee2c0_0 .net "reg5", 31 0, v0x29eb4f0_0; 1 drivers +v0x29ee340_0 .net "reg6", 31 0, v0x29eb190_0; 1 drivers +v0x29ee620_0 .net "reg7", 31 0, v0x29eae30_0; 1 drivers +v0x29ee6a0_0 .net "reg8", 31 0, v0x29eaad0_0; 1 drivers +v0x29ee4e0_0 .net "reg9", 31 0, v0x29ea770_0; 1 drivers +L_0x29f5eb0 .part L_0x29f5ce0, 0, 1; +L_0x29f5f50 .part L_0x29f5ce0, 1, 1; +L_0x29f6080 .part L_0x29f5ce0, 2, 1; +L_0x29f6120 .part L_0x29f5ce0, 3, 1; +L_0x29f61f0 .part L_0x29f5ce0, 4, 1; +L_0x29f62c0 .part L_0x29f5ce0, 5, 1; +L_0x29f64a0 .part L_0x29f5ce0, 6, 1; +L_0x29f6540 .part L_0x29f5ce0, 7, 1; +L_0x29f65e0 .part L_0x29f5ce0, 8, 1; +L_0x29f66b0 .part L_0x29f5ce0, 9, 1; +L_0x29f67e0 .part L_0x29f5ce0, 10, 1; +L_0x29f68b0 .part L_0x29f5ce0, 11, 1; +L_0x29f6980 .part L_0x29f5ce0, 12, 1; +L_0x29f6a50 .part L_0x29f5ce0, 13, 1; +L_0x29f6d30 .part L_0x29f5ce0, 14, 1; +L_0x29f6dd0 .part L_0x29f5ce0, 15, 1; +L_0x29f6f00 .part L_0x29f5ce0, 16, 1; +L_0x29f6fa0 .part L_0x29f5ce0, 17, 1; +L_0x29f7110 .part L_0x29f5ce0, 18, 1; +L_0x29f71b0 .part L_0x29f5ce0, 19, 1; +L_0x29f7070 .part L_0x29f5ce0, 20, 1; +L_0x29f7300 .part L_0x29f5ce0, 21, 1; +L_0x29f7250 .part L_0x29f5ce0, 22, 1; +L_0x29f74c0 .part L_0x29f5ce0, 23, 1; +L_0x29f73d0 .part L_0x29f5ce0, 24, 1; +L_0x29f7690 .part L_0x29f5ce0, 25, 1; +L_0x29f7590 .part L_0x29f5ce0, 26, 1; +L_0x29f7840 .part L_0x29f5ce0, 27, 1; +L_0x29f7760 .part L_0x29f5ce0, 28, 1; +L_0x29f7a00 .part L_0x29f5ce0, 29, 1; +L_0x29f7910 .part L_0x29f5ce0, 30, 1; +L_0x29f6c20 .part L_0x29f5ce0, 31, 1; +S_0x29ec9e0 .scope module, "dec" "decoder1to32" 12 34, 13 4, S_0x29e1ce0; + .timescale 0 0; +v0x29e8ed0_0 .net *"_s0", 31 0, L_0x29f5bf0; 1 drivers +v0x29ecad0_0 .net *"_s3", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x29ecb50_0 .alias "address", 4 0, v0x29f3080_0; +v0x29ecbd0_0 .alias "enable", 0 0, v0x29f2f10_0; +v0x29ecc50_0 .alias "out", 31 0, v0x29ed360_0; +L_0x29f5bf0 .concat [ 1 31 0 0], C4, C4<0000000000000000000000000000000>; +L_0x29f5ce0 .shift/l 32, L_0x29f5bf0, v0x293d520_0; +S_0x29ec3c0 .scope module, "r0" "register32zero" 12 35, 14 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ec4b0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ec550_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e8d80_0 .var "q", 31 0; +v0x29e8e50_0 .net "wrenable", 0 0, L_0x29f5eb0; 1 drivers +S_0x29ec060 .scope module, "r1" "register32" 12 36, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ec150_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ec1f0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29ec270_0 .var "q", 31 0; +v0x29ec340_0 .net "wrenable", 0 0, L_0x29f5f50; 1 drivers +S_0x29ebd00 .scope module, "r2" "register32" 12 37, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ebdf0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ebe90_0 .alias "d", 31 0, v0x29f3500_0; +v0x29ebf10_0 .var "q", 31 0; +v0x29ebfe0_0 .net "wrenable", 0 0, L_0x29f6080; 1 drivers +S_0x29eb9a0 .scope module, "r3" "register32" 12 38, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29eba90_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ebb30_0 .alias "d", 31 0, v0x29f3500_0; +v0x29ebbb0_0 .var "q", 31 0; +v0x29ebc80_0 .net "wrenable", 0 0, L_0x29f6120; 1 drivers +S_0x29eb640 .scope module, "r4" "register32" 12 39, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29eb730_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29eb7d0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29eb850_0 .var "q", 31 0; +v0x29eb920_0 .net "wrenable", 0 0, L_0x29f61f0; 1 drivers +S_0x29eb2e0 .scope module, "r5" "register32" 12 40, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29eb3d0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29eb470_0 .alias "d", 31 0, v0x29f3500_0; +v0x29eb4f0_0 .var "q", 31 0; +v0x29eb5c0_0 .net "wrenable", 0 0, L_0x29f62c0; 1 drivers +S_0x29eaf80 .scope module, "r6" "register32" 12 41, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29eb070_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29eb110_0 .alias "d", 31 0, v0x29f3500_0; +v0x29eb190_0 .var "q", 31 0; +v0x29eb260_0 .net "wrenable", 0 0, L_0x29f64a0; 1 drivers +S_0x29eac20 .scope module, "r7" "register32" 12 42, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ead10_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29eadb0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29eae30_0 .var "q", 31 0; +v0x29eaf00_0 .net "wrenable", 0 0, L_0x29f6540; 1 drivers +S_0x29ea8c0 .scope module, "r8" "register32" 12 43, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ea9b0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29eaa50_0 .alias "d", 31 0, v0x29f3500_0; +v0x29eaad0_0 .var "q", 31 0; +v0x29eaba0_0 .net "wrenable", 0 0, L_0x29f65e0; 1 drivers +S_0x29ea560 .scope module, "r9" "register32" 12 44, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ea650_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ea6f0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29ea770_0 .var "q", 31 0; +v0x29ea840_0 .net "wrenable", 0 0, L_0x29f66b0; 1 drivers +S_0x29ea200 .scope module, "r10" "register32" 12 45, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29ea2f0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ea390_0 .alias "d", 31 0, v0x29f3500_0; +v0x29ea410_0 .var "q", 31 0; +v0x29ea4e0_0 .net "wrenable", 0 0, L_0x29f67e0; 1 drivers +S_0x29e9ea0 .scope module, "r11" "register32" 12 46, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e9f90_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29ea030_0 .alias "d", 31 0, v0x29f3500_0; +v0x29ea0b0_0 .var "q", 31 0; +v0x29ea180_0 .net "wrenable", 0 0, L_0x29f68b0; 1 drivers +S_0x29e9b40 .scope module, "r12" "register32" 12 47, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e9c30_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e9cd0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e9d50_0 .var "q", 31 0; +v0x29e9e20_0 .net "wrenable", 0 0, L_0x29f6980; 1 drivers +S_0x29e97e0 .scope module, "r13" "register32" 12 48, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e98d0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e9970_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e99f0_0 .var "q", 31 0; +v0x29e9ac0_0 .net "wrenable", 0 0, L_0x29f6a50; 1 drivers +S_0x29e9480 .scope module, "r14" "register32" 12 49, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e9570_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e9610_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e9690_0 .var "q", 31 0; +v0x29e9760_0 .net "wrenable", 0 0, L_0x29f6d30; 1 drivers +S_0x29e9010 .scope module, "r15" "register32" 12 50, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e9100_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e74d0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e7550_0 .var "q", 31 0; +v0x29e93e0_0 .net "wrenable", 0 0, L_0x29f6dd0; 1 drivers +S_0x29e8b70 .scope module, "r16" "register32" 12 51, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e8c60_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e8d00_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e7160_0 .var "q", 31 0; +v0x29e8f90_0 .net "wrenable", 0 0, L_0x29f6f00; 1 drivers +S_0x29e8810 .scope module, "r17" "register32" 12 52, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e8900_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e89a0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e8a20_0 .var "q", 31 0; +v0x29e8af0_0 .net "wrenable", 0 0, L_0x29f6fa0; 1 drivers +S_0x29e84b0 .scope module, "r18" "register32" 12 53, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e85a0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e8640_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e86c0_0 .var "q", 31 0; +v0x29e8790_0 .net "wrenable", 0 0, L_0x29f7110; 1 drivers +S_0x29e8150 .scope module, "r19" "register32" 12 54, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e8240_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e82e0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e8360_0 .var "q", 31 0; +v0x29e8430_0 .net "wrenable", 0 0, L_0x29f71b0; 1 drivers +S_0x29e7df0 .scope module, "r20" "register32" 12 55, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e7ee0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e7f80_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e8000_0 .var "q", 31 0; +v0x29e80d0_0 .net "wrenable", 0 0, L_0x29f7070; 1 drivers +S_0x29e7a90 .scope module, "r21" "register32" 12 56, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e7b80_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e7c20_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e7ca0_0 .var "q", 31 0; +v0x29e7d70_0 .net "wrenable", 0 0, L_0x29f7300; 1 drivers +S_0x29e7730 .scope module, "r22" "register32" 12 57, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e7820_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e78c0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e7940_0 .var "q", 31 0; +v0x29e7a10_0 .net "wrenable", 0 0, L_0x29f7250; 1 drivers +S_0x29e7340 .scope module, "r23" "register32" 12 58, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e7430_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e6680_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e75e0_0 .var "q", 31 0; +v0x29e76b0_0 .net "wrenable", 0 0, L_0x29f74c0; 1 drivers +S_0x29e6f50 .scope module, "r24" "register32" 12 59, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e7040_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e70e0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e6360_0 .var "q", 31 0; +v0x29e72c0_0 .net "wrenable", 0 0, L_0x29f73d0; 1 drivers +S_0x29e6bf0 .scope module, "r25" "register32" 12 60, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e6ce0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e6d80_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e6e00_0 .var "q", 31 0; +v0x29e6ed0_0 .net "wrenable", 0 0, L_0x29f7690; 1 drivers +S_0x29e6890 .scope module, "r26" "register32" 12 61, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e6980_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e6a20_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e6aa0_0 .var "q", 31 0; +v0x29e6b70_0 .net "wrenable", 0 0, L_0x29f7590; 1 drivers +S_0x29e64f0 .scope module, "r27" "register32" 12 62, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e65e0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e6710_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e6790_0 .var "q", 31 0; +v0x29e6810_0 .net "wrenable", 0 0, L_0x29f7840; 1 drivers +S_0x29e6150 .scope module, "r28" "register32" 12 63, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e6240_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e62e0_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e63f0_0 .var "q", 31 0; +v0x29e6470_0 .net "wrenable", 0 0, L_0x29f7760; 1 drivers +S_0x29e5da0 .scope module, "r29" "register32" 12 64, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e5e90_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e5f80_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e6000_0 .var "q", 31 0; +v0x29e60d0_0 .net "wrenable", 0 0, L_0x29f7a00; 1 drivers +S_0x29e59e0 .scope module, "r30" "register32" 12 65, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e5ad0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e5b80_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e5c50_0 .var "q", 31 0; +v0x29e5d20_0 .net "wrenable", 0 0, L_0x29f7910; 1 drivers +S_0x29e53d0 .scope module, "r31" "register32" 12 66, 15 1, S_0x29e1ce0; + .timescale 0 0; +v0x29e57b0_0 .alias "clk", 0 0, v0x29f22c0_0; +v0x29e5830_0 .alias "d", 31 0, v0x29f3500_0; +v0x29e58e0_0 .var "q", 31 0; +v0x29e5960_0 .net "wrenable", 0 0, L_0x29f6c20; 1 drivers +E_0x29e3130 .event posedge, v0x29e57b0_0; +S_0x29e34f0 .scope module, "mux1" "mux32to1by32" 12 68, 16 1, S_0x29e1ce0; + .timescale 0 0; +L_0x29f6780 .functor BUFZ 32, v0x29e8d80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f23c0 .functor BUFZ 32, v0x29ec270_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f6bb0 .functor BUFZ 32, v0x29ebf10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f6390 .functor BUFZ 32, v0x29ebbb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f81a0 .functor BUFZ 32, v0x29eb850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8290 .functor BUFZ 32, v0x29eb4f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f83b0 .functor BUFZ 32, v0x29eb190_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f84d0 .functor BUFZ 32, v0x29eae30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f85f0 .functor BUFZ 32, v0x29eaad0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8710 .functor BUFZ 32, v0x29ea770_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8890 .functor BUFZ 32, v0x29ea410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f89b0 .functor BUFZ 32, v0x29ea0b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8830 .functor BUFZ 32, v0x29e9d50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8c00 .functor BUFZ 32, v0x29e99f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8da0 .functor BUFZ 32, v0x29e9690_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8ec0 .functor BUFZ 32, v0x29e7550_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9070 .functor BUFZ 32, v0x29e7160_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9190 .functor BUFZ 32, v0x29e8a20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f8fe0 .functor BUFZ 32, v0x29e86c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f93e0 .functor BUFZ 32, v0x29e8360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f92b0 .functor BUFZ 32, v0x29e8000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9640 .functor BUFZ 32, v0x29e7ca0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9500 .functor BUFZ 32, v0x29e7940_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f98b0 .functor BUFZ 32, v0x29e75e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9760 .functor BUFZ 32, v0x29e6360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9b30 .functor BUFZ 32, v0x29e6e00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f99d0 .functor BUFZ 32, v0x29e6aa0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9d90 .functor BUFZ 32, v0x29e6790_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9c20 .functor BUFZ 32, v0x29e63f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa000 .functor BUFZ 32, v0x29e6000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9e80 .functor BUFZ 32, v0x29e5c50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29f9f10 .functor BUFZ 32, v0x29e58e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa450 .functor BUFZ 32, L_0x29fa0f0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x29e3bf0_0 .net *"_s96", 31 0, L_0x29fa0f0; 1 drivers +v0x29e3c90_0 .alias "address", 4 0, v0x29f1fb0_0; +v0x29e3d30_0 .alias "input0", 31 0, v0x29ed410_0; +v0x29e3db0_0 .alias "input1", 31 0, v0x29ed490_0; +v0x29e3e60_0 .alias "input10", 31 0, v0x29ed510_0; +v0x29e3f10_0 .alias "input11", 31 0, v0x29ed600_0; +v0x29e3f90_0 .alias "input12", 31 0, v0x29ed680_0; +v0x29e4040_0 .alias "input13", 31 0, v0x29ed780_0; +v0x29e40f0_0 .alias "input14", 31 0, v0x29ed800_0; +v0x29e41a0_0 .alias "input15", 31 0, v0x29ed700_0; +v0x29e4250_0 .alias "input16", 31 0, v0x29ed910_0; +v0x29e4300_0 .alias "input17", 31 0, v0x29ed880_0; +v0x29e43b0_0 .alias "input18", 31 0, v0x29eda30_0; +v0x29e4460_0 .alias "input19", 31 0, v0x29ed990_0; +v0x29e4590_0 .alias "input2", 31 0, v0x29edb60_0; +v0x29e4640_0 .alias "input20", 31 0, v0x29edab0_0; +v0x29e44e0_0 .alias "input21", 31 0, v0x29edca0_0; +v0x29e47b0_0 .alias "input22", 31 0, v0x29edbe0_0; +v0x29e48d0_0 .alias "input23", 31 0, v0x29eddf0_0; +v0x29e4950_0 .alias "input24", 31 0, v0x29edd20_0; +v0x29e4830_0 .alias "input25", 31 0, v0x29edf50_0; +v0x29e4ab0_0 .alias "input26", 31 0, v0x29ede70_0; +v0x29e4a00_0 .alias "input27", 31 0, v0x29ee0c0_0; +v0x29e4bf0_0 .alias "input28", 31 0, v0x29edfd0_0; +v0x29e4b30_0 .alias "input29", 31 0, v0x29ee240_0; +v0x29e4d40_0 .alias "input3", 31 0, v0x29ee140_0; +v0x29e4ca0_0 .alias "input30", 31 0, v0x29ee1c0_0; +v0x29e4ed0_0 .alias "input31", 31 0, v0x29ee3e0_0; +v0x29e4dc0_0 .alias "input4", 31 0, v0x29ee460_0; +v0x29e5040_0 .alias "input5", 31 0, v0x29ee2c0_0; +v0x29e4f50_0 .alias "input6", 31 0, v0x29ee340_0; +v0x29e51c0_0 .alias "input7", 31 0, v0x29ee620_0; +v0x29e50c0_0 .alias "input8", 31 0, v0x29ee6a0_0; +v0x29e5350_0 .alias "input9", 31 0, v0x29ee4e0_0; +v0x29e5240 .array "mux", 0 31; +v0x29e5240_0 .net v0x29e5240 0, 31 0, L_0x29f6780; 1 drivers +v0x29e5240_1 .net v0x29e5240 1, 31 0, L_0x29f23c0; 1 drivers +v0x29e5240_2 .net v0x29e5240 2, 31 0, L_0x29f6bb0; 1 drivers +v0x29e5240_3 .net v0x29e5240 3, 31 0, L_0x29f6390; 1 drivers +v0x29e5240_4 .net v0x29e5240 4, 31 0, L_0x29f81a0; 1 drivers +v0x29e5240_5 .net v0x29e5240 5, 31 0, L_0x29f8290; 1 drivers +v0x29e5240_6 .net v0x29e5240 6, 31 0, L_0x29f83b0; 1 drivers +v0x29e5240_7 .net v0x29e5240 7, 31 0, L_0x29f84d0; 1 drivers +v0x29e5240_8 .net v0x29e5240 8, 31 0, L_0x29f85f0; 1 drivers +v0x29e5240_9 .net v0x29e5240 9, 31 0, L_0x29f8710; 1 drivers +v0x29e5240_10 .net v0x29e5240 10, 31 0, L_0x29f8890; 1 drivers +v0x29e5240_11 .net v0x29e5240 11, 31 0, L_0x29f89b0; 1 drivers +v0x29e5240_12 .net v0x29e5240 12, 31 0, L_0x29f8830; 1 drivers +v0x29e5240_13 .net v0x29e5240 13, 31 0, L_0x29f8c00; 1 drivers +v0x29e5240_14 .net v0x29e5240 14, 31 0, L_0x29f8da0; 1 drivers +v0x29e5240_15 .net v0x29e5240 15, 31 0, L_0x29f8ec0; 1 drivers +v0x29e5240_16 .net v0x29e5240 16, 31 0, L_0x29f9070; 1 drivers +v0x29e5240_17 .net v0x29e5240 17, 31 0, L_0x29f9190; 1 drivers +v0x29e5240_18 .net v0x29e5240 18, 31 0, L_0x29f8fe0; 1 drivers +v0x29e5240_19 .net v0x29e5240 19, 31 0, L_0x29f93e0; 1 drivers +v0x29e5240_20 .net v0x29e5240 20, 31 0, L_0x29f92b0; 1 drivers +v0x29e5240_21 .net v0x29e5240 21, 31 0, L_0x29f9640; 1 drivers +v0x29e5240_22 .net v0x29e5240 22, 31 0, L_0x29f9500; 1 drivers +v0x29e5240_23 .net v0x29e5240 23, 31 0, L_0x29f98b0; 1 drivers +v0x29e5240_24 .net v0x29e5240 24, 31 0, L_0x29f9760; 1 drivers +v0x29e5240_25 .net v0x29e5240 25, 31 0, L_0x29f9b30; 1 drivers +v0x29e5240_26 .net v0x29e5240 26, 31 0, L_0x29f99d0; 1 drivers +v0x29e5240_27 .net v0x29e5240 27, 31 0, L_0x29f9d90; 1 drivers +v0x29e5240_28 .net v0x29e5240 28, 31 0, L_0x29f9c20; 1 drivers +v0x29e5240_29 .net v0x29e5240 29, 31 0, L_0x29fa000; 1 drivers +v0x29e5240_30 .net v0x29e5240 30, 31 0, L_0x29f9e80; 1 drivers +v0x29e5240_31 .net v0x29e5240 31, 31 0, L_0x29f9f10; 1 drivers +v0x29e5600_0 .alias "out", 31 0, v0x29f1e00_0; +L_0x29fa0f0 .array/port v0x29e5240, RS_0x7ff1473ef4e8; +S_0x29e1dd0 .scope module, "mux2" "mux32to1by32" 12 69, 16 1, S_0x29e1ce0; + .timescale 0 0; +L_0x29fa4b0 .functor BUFZ 32, v0x29e8d80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa510 .functor BUFZ 32, v0x29ec270_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa570 .functor BUFZ 32, v0x29ebf10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa600 .functor BUFZ 32, v0x29ebbb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa6c0 .functor BUFZ 32, v0x29eb850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa750 .functor BUFZ 32, v0x29eb4f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa820 .functor BUFZ 32, v0x29eb190_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa880 .functor BUFZ 32, v0x29eae30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa8e0 .functor BUFZ 32, v0x29eaad0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fa970 .functor BUFZ 32, v0x29ea770_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29faa60 .functor BUFZ 32, v0x29ea410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29faaf0 .functor BUFZ 32, v0x29ea0b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29faa00 .functor BUFZ 32, v0x29e9d50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fabb0 .functor BUFZ 32, v0x29e99f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fac40 .functor BUFZ 32, v0x29e9690_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29facd0 .functor BUFZ 32, v0x29e7550_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fadf0 .functor BUFZ 32, v0x29e7160_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fae80 .functor BUFZ 32, v0x29e8a20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fad60 .functor BUFZ 32, v0x29e86c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fafb0 .functor BUFZ 32, v0x29e8360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29faf10 .functor BUFZ 32, v0x29e8000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb0f0 .functor BUFZ 32, v0x29e7ca0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb040 .functor BUFZ 32, v0x29e7940_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb240 .functor BUFZ 32, v0x29e75e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb180 .functor BUFZ 32, v0x29e6360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb3a0 .functor BUFZ 32, v0x29e6e00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb2d0 .functor BUFZ 32, v0x29e6aa0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb4e0 .functor BUFZ 32, v0x29e6790_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb400 .functor BUFZ 32, v0x29e63f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb630 .functor BUFZ 32, v0x29e6000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb540 .functor BUFZ 32, v0x29e5c50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29fb5d0 .functor BUFZ 32, v0x29e58e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29ef040 .functor BUFZ 32, L_0x29fb690, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x29e1ec0_0 .net *"_s96", 31 0, L_0x29fb690; 1 drivers +v0x29e1f40_0 .alias "address", 4 0, v0x29f20c0_0; +v0x29e1ff0_0 .alias "input0", 31 0, v0x29ed410_0; +v0x29e2070_0 .alias "input1", 31 0, v0x29ed490_0; +v0x29e2120_0 .alias "input10", 31 0, v0x29ed510_0; +v0x29e21a0_0 .alias "input11", 31 0, v0x29ed600_0; +v0x29e2220_0 .alias "input12", 31 0, v0x29ed680_0; +v0x29e22a0_0 .alias "input13", 31 0, v0x29ed780_0; +v0x29e2320_0 .alias "input14", 31 0, v0x29ed800_0; +v0x29e23a0_0 .alias "input15", 31 0, v0x29ed700_0; +v0x29e2480_0 .alias "input16", 31 0, v0x29ed910_0; +v0x29e2500_0 .alias "input17", 31 0, v0x29ed880_0; +v0x29e2580_0 .alias "input18", 31 0, v0x29eda30_0; +v0x29e2620_0 .alias "input19", 31 0, v0x29ed990_0; +v0x29e2740_0 .alias "input2", 31 0, v0x29edb60_0; +v0x29e27e0_0 .alias "input20", 31 0, v0x29edab0_0; +v0x29e26a0_0 .alias "input21", 31 0, v0x29edca0_0; +v0x29e2930_0 .alias "input22", 31 0, v0x29edbe0_0; +v0x29e2a50_0 .alias "input23", 31 0, v0x29eddf0_0; +v0x29e2ad0_0 .alias "input24", 31 0, v0x29edd20_0; +v0x29e29b0_0 .alias "input25", 31 0, v0x29edf50_0; +v0x29e2c00_0 .alias "input26", 31 0, v0x29ede70_0; +v0x29e2b50_0 .alias "input27", 31 0, v0x29ee0c0_0; +v0x29e2d40_0 .alias "input28", 31 0, v0x29edfd0_0; +v0x29e2ca0_0 .alias "input29", 31 0, v0x29ee240_0; +v0x29e2e90_0 .alias "input3", 31 0, v0x29ee140_0; +v0x29e2de0_0 .alias "input30", 31 0, v0x29ee1c0_0; +v0x29e2ff0_0 .alias "input31", 31 0, v0x29ee3e0_0; +v0x29e2f30_0 .alias "input4", 31 0, v0x29ee460_0; +v0x29e3160_0 .alias "input5", 31 0, v0x29ee2c0_0; +v0x29e3070_0 .alias "input6", 31 0, v0x29ee340_0; +v0x29e32e0_0 .alias "input7", 31 0, v0x29ee620_0; +v0x29e31e0_0 .alias "input8", 31 0, v0x29ee6a0_0; +v0x29e3470_0 .alias "input9", 31 0, v0x29ee4e0_0; +v0x29e3360 .array "mux", 0 31; +v0x29e3360_0 .net v0x29e3360 0, 31 0, L_0x29fa4b0; 1 drivers +v0x29e3360_1 .net v0x29e3360 1, 31 0, L_0x29fa510; 1 drivers +v0x29e3360_2 .net v0x29e3360 2, 31 0, L_0x29fa570; 1 drivers +v0x29e3360_3 .net v0x29e3360 3, 31 0, L_0x29fa600; 1 drivers +v0x29e3360_4 .net v0x29e3360 4, 31 0, L_0x29fa6c0; 1 drivers +v0x29e3360_5 .net v0x29e3360 5, 31 0, L_0x29fa750; 1 drivers +v0x29e3360_6 .net v0x29e3360 6, 31 0, L_0x29fa820; 1 drivers +v0x29e3360_7 .net v0x29e3360 7, 31 0, L_0x29fa880; 1 drivers +v0x29e3360_8 .net v0x29e3360 8, 31 0, L_0x29fa8e0; 1 drivers +v0x29e3360_9 .net v0x29e3360 9, 31 0, L_0x29fa970; 1 drivers +v0x29e3360_10 .net v0x29e3360 10, 31 0, L_0x29faa60; 1 drivers +v0x29e3360_11 .net v0x29e3360 11, 31 0, L_0x29faaf0; 1 drivers +v0x29e3360_12 .net v0x29e3360 12, 31 0, L_0x29faa00; 1 drivers +v0x29e3360_13 .net v0x29e3360 13, 31 0, L_0x29fabb0; 1 drivers +v0x29e3360_14 .net v0x29e3360 14, 31 0, L_0x29fac40; 1 drivers +v0x29e3360_15 .net v0x29e3360 15, 31 0, L_0x29facd0; 1 drivers +v0x29e3360_16 .net v0x29e3360 16, 31 0, L_0x29fadf0; 1 drivers +v0x29e3360_17 .net v0x29e3360 17, 31 0, L_0x29fae80; 1 drivers +v0x29e3360_18 .net v0x29e3360 18, 31 0, L_0x29fad60; 1 drivers +v0x29e3360_19 .net v0x29e3360 19, 31 0, L_0x29fafb0; 1 drivers +v0x29e3360_20 .net v0x29e3360 20, 31 0, L_0x29faf10; 1 drivers +v0x29e3360_21 .net v0x29e3360 21, 31 0, L_0x29fb0f0; 1 drivers +v0x29e3360_22 .net v0x29e3360 22, 31 0, L_0x29fb040; 1 drivers +v0x29e3360_23 .net v0x29e3360 23, 31 0, L_0x29fb240; 1 drivers +v0x29e3360_24 .net v0x29e3360 24, 31 0, L_0x29fb180; 1 drivers +v0x29e3360_25 .net v0x29e3360 25, 31 0, L_0x29fb3a0; 1 drivers +v0x29e3360_26 .net v0x29e3360 26, 31 0, L_0x29fb2d0; 1 drivers +v0x29e3360_27 .net v0x29e3360 27, 31 0, L_0x29fb4e0; 1 drivers +v0x29e3360_28 .net v0x29e3360 28, 31 0, L_0x29fb400; 1 drivers +v0x29e3360_29 .net v0x29e3360 29, 31 0, L_0x29fb630; 1 drivers +v0x29e3360_30 .net v0x29e3360 30, 31 0, L_0x29fb540; 1 drivers +v0x29e3360_31 .net v0x29e3360 31, 31 0, L_0x29fb5d0; 1 drivers +v0x29e3a40_0 .alias "out", 31 0, v0x29f1e80_0; +L_0x29fb690 .array/port v0x29e3360, RS_0x7ff1473dc468; +S_0x2899940 .scope module, "exe" "execute" 4 86, 17 4, S_0x28eb4b0; + .timescale 0 0; +v0x29e1640_0 .alias "ALU_OperandSource", 0 0, v0x29f1c70_0; +v0x29e16f0_0 .alias "Da", 31 0, v0x29f1e00_0; +v0x29b2e40_0 .alias "Db", 31 0, v0x29f1e80_0; +v0x29e1880_0 .net "Operand", 31 0, v0x29e1590_0; 1 drivers +v0x29e1900_0 .alias "carryout", 0 0, v0x29f2240_0; +v0x29e19b0_0 .alias "command", 2 0, v0x29f2340_0; +v0x29e1a30_0 .var "extended_imm", 31 0; +v0x29e1ab0_0 .alias "imm", 15 0, v0x29f2640_0; +v0x29e1b30_0 .alias "overflow", 0 0, v0x29f2e90_0; +v0x29e1bb0_0 .alias "result", 31 0, v0x29f1cf0_0; +v0x29e1c30_0 .alias "zero", 0 0, v0x29f3470_0; +E_0x2947dc0 .event edge, v0x29e1ab0_0; +S_0x29e1340 .scope module, "ALUSource" "mux2to1by32" 17 21, 2 18, S_0x2899940; + .timescale 0 0; +v0x29e10d0_0 .alias "address", 0 0, v0x29f1c70_0; +v0x29e1460_0 .alias "input0", 31 0, v0x29f1e80_0; +v0x29e1510_0 .net "input1", 31 0, v0x29e1a30_0; 1 drivers +v0x29e1590_0 .var "out", 31 0; +E_0x29e1430 .event edge, v0x29e10d0_0, v0x29e1510_0, v0x2945970_0; +S_0x2916ac0 .scope module, "Alu" "ALUcontrolLUT" 17 27, 18 11, S_0x2899940; + .timescale 0 0; +v0x29e0510_0 .alias "ALUcommand", 2 0, v0x29f2340_0; +v0x29e05c0_0 .alias "a", 31 0, v0x29f1e00_0; +v0x29e0a40_0 .net "adder_cout", 0 0, L_0x2a2bc40; 1 drivers +v0x29e0ac0_0 .net "adder_flag", 0 0, L_0x2a2d390; 1 drivers +RS_0x7ff1473ee708/0/0 .resolv tri, L_0x2a0fc90, L_0x2a14090, L_0x2a183a0, L_0x2a1c6f0; +RS_0x7ff1473ee708/0/4 .resolv tri, L_0x2a20b00, L_0x2a24e10, L_0x2a29110, L_0x2a2d490; +RS_0x7ff1473ee708 .resolv tri, RS_0x7ff1473ee708/0/0, RS_0x7ff1473ee708/0/4, C4, C4; +v0x29e0b40_0 .net8 "addsub", 31 0, RS_0x7ff1473ee708; 8 drivers +RS_0x7ff1473e1028/0/0 .resolv tri, L_0x2a3fdb0, L_0x2a40780, L_0x2a40ab0, L_0x2a40e70; +RS_0x7ff1473e1028/0/4 .resolv tri, L_0x2a41220, L_0x2a41570, L_0x2a419d0, L_0x2a41d70; +RS_0x7ff1473e1028/0/8 .resolv tri, L_0x2a41e10, L_0x2a424a0, L_0x2a42540, L_0x2a42b80; +RS_0x7ff1473e1028/0/12 .resolv tri, L_0x2a42c20, L_0x2a431e0, L_0x2a43280, L_0x2a43a90; +RS_0x7ff1473e1028/0/16 .resolv tri, L_0x2a43b30, L_0x2a43e90, L_0x2a44020, L_0x2a445a0; +RS_0x7ff1473e1028/0/20 .resolv tri, L_0x2a44710, L_0x2a44c80, L_0x2a44e20, L_0x2a45370; +RS_0x7ff1473e1028/0/24 .resolv tri, L_0x2a454f0, L_0x2a45ce0, L_0x2a45d80, L_0x2a46410; +RS_0x7ff1473e1028/0/28 .resolv tri, L_0x2a464b0, L_0x2a46b00, L_0x2a46e80, L_0x2a46ba0; +RS_0x7ff1473e1028/1/0 .resolv tri, RS_0x7ff1473e1028/0/0, RS_0x7ff1473e1028/0/4, RS_0x7ff1473e1028/0/8, RS_0x7ff1473e1028/0/12; +RS_0x7ff1473e1028/1/4 .resolv tri, RS_0x7ff1473e1028/0/16, RS_0x7ff1473e1028/0/20, RS_0x7ff1473e1028/0/24, RS_0x7ff1473e1028/0/28; +RS_0x7ff1473e1028 .resolv tri, RS_0x7ff1473e1028/1/0, RS_0x7ff1473e1028/1/4, C4, C4; +v0x29e0bc0_0 .net8 "andin", 31 0, RS_0x7ff1473e1028; 32 drivers +v0x29e0c40_0 .alias "b", 31 0, v0x29e1880_0; +v0x29b2f50_0 .var "cout", 0 0; +v0x29e0dd0_0 .var "finalsignal", 31 0; +v0x29e0e50_0 .var "flag", 0 0; +RS_0x7ff1473dfdf8/0/0 .resolv tri, L_0x2a47330, L_0x2a47a80, L_0x2a47d50, L_0x2a48110; +RS_0x7ff1473dfdf8/0/4 .resolv tri, L_0x2a484c0, L_0x2a48810, L_0x2a48c70, L_0x2a49010; +RS_0x7ff1473dfdf8/0/8 .resolv tri, L_0x2a490b0, L_0x2a49740, L_0x2a497e0, L_0x2a49e20; +RS_0x7ff1473dfdf8/0/12 .resolv tri, L_0x2a49ec0, L_0x2a38da0, L_0x2a38e40, L_0x2a4b570; +RS_0x7ff1473dfdf8/0/16 .resolv tri, L_0x2a4b610, L_0x2a4b9c0, L_0x2a4bb50, L_0x2a4c0d0; +RS_0x7ff1473dfdf8/0/20 .resolv tri, L_0x2a4c240, L_0x2a4c7b0, L_0x2a4c950, L_0x2a4cea0; +RS_0x7ff1473dfdf8/0/24 .resolv tri, L_0x2a4d020, L_0x2a4d810, L_0x2a4d8b0, L_0x2a4df40; +RS_0x7ff1473dfdf8/0/28 .resolv tri, L_0x2a4dfe0, L_0x2a4e630, L_0x2a4e9b0, L_0x2a4b310; +RS_0x7ff1473dfdf8/1/0 .resolv tri, RS_0x7ff1473dfdf8/0/0, RS_0x7ff1473dfdf8/0/4, RS_0x7ff1473dfdf8/0/8, RS_0x7ff1473dfdf8/0/12; +RS_0x7ff1473dfdf8/1/4 .resolv tri, RS_0x7ff1473dfdf8/0/16, RS_0x7ff1473dfdf8/0/20, RS_0x7ff1473dfdf8/0/24, RS_0x7ff1473dfdf8/0/28; +RS_0x7ff1473dfdf8 .resolv tri, RS_0x7ff1473dfdf8/1/0, RS_0x7ff1473dfdf8/1/4, C4, C4; +v0x29e0ed0_0 .net8 "nandin", 31 0, RS_0x7ff1473dfdf8; 32 drivers +RS_0x7ff1473debc8/0/0 .resolv tri, L_0x2a4e8d0, L_0x2a4f400, L_0x2a4f730, L_0x2a4faf0; +RS_0x7ff1473debc8/0/4 .resolv tri, L_0x2a4fea0, L_0x2a501f0, L_0x2a50650, L_0x2a509f0; +RS_0x7ff1473debc8/0/8 .resolv tri, L_0x2a50a90, L_0x2a51120, L_0x2a511c0, L_0x2a51800; +RS_0x7ff1473debc8/0/12 .resolv tri, L_0x2a518a0, L_0x2a51eb0, L_0x2a51f50, L_0x2a52710; +RS_0x7ff1473debc8/0/16 .resolv tri, L_0x2a527b0, L_0x2a52bb0, L_0x2a52d40, L_0x2a532c0; +RS_0x7ff1473debc8/0/20 .resolv tri, L_0x2a53430, L_0x2a539a0, L_0x2a53b40, L_0x2a54090; +RS_0x7ff1473debc8/0/24 .resolv tri, L_0x2a54210, L_0x2a54a00, L_0x2a54aa0, L_0x2a55130; +RS_0x7ff1473debc8/0/28 .resolv tri, L_0x2a551d0, L_0x2a55820, L_0x2a55ba0, L_0x2a524d0; +RS_0x7ff1473debc8/1/0 .resolv tri, RS_0x7ff1473debc8/0/0, RS_0x7ff1473debc8/0/4, RS_0x7ff1473debc8/0/8, RS_0x7ff1473debc8/0/12; +RS_0x7ff1473debc8/1/4 .resolv tri, RS_0x7ff1473debc8/0/16, RS_0x7ff1473debc8/0/20, RS_0x7ff1473debc8/0/24, RS_0x7ff1473debc8/0/28; +RS_0x7ff1473debc8 .resolv tri, RS_0x7ff1473debc8/1/0, RS_0x7ff1473debc8/1/4, C4, C4; +v0x29e0f50_0 .net8 "norin", 31 0, RS_0x7ff1473debc8; 32 drivers +RS_0x7ff1473dd998/0/0 .resolv tri, L_0x2a55ac0, L_0x2a564f0, L_0x2a56820, L_0x2a56bd0; +RS_0x7ff1473dd998/0/4 .resolv tri, L_0x2a56f80, L_0x2a572d0, L_0x2a57730, L_0x2a57ad0; +RS_0x7ff1473dd998/0/8 .resolv tri, L_0x2a57b70, L_0x2a58200, L_0x2a582a0, L_0x2a588e0; +RS_0x7ff1473dd998/0/12 .resolv tri, L_0x2a58980, L_0x2a58f90, L_0x2a59030, L_0x2a597f0; +RS_0x7ff1473dd998/0/16 .resolv tri, L_0x2a59890, L_0x2a59c90, L_0x2a59e20, L_0x2a5a3a0; +RS_0x7ff1473dd998/0/20 .resolv tri, L_0x2a5a510, L_0x2a5aa80, L_0x2a5ac20, L_0x2a3c630; +RS_0x7ff1473dd998/0/24 .resolv tri, L_0x2a3c570, L_0x2a3c7c0, L_0x2a3ca10, L_0x2a3d1d0; +RS_0x7ff1473dd998/0/28 .resolv tri, L_0x2a3cf40, L_0x2a5d180, L_0x2a5d3e0, L_0x2a5d480; +RS_0x7ff1473dd998/1/0 .resolv tri, RS_0x7ff1473dd998/0/0, RS_0x7ff1473dd998/0/4, RS_0x7ff1473dd998/0/8, RS_0x7ff1473dd998/0/12; +RS_0x7ff1473dd998/1/4 .resolv tri, RS_0x7ff1473dd998/0/16, RS_0x7ff1473dd998/0/20, RS_0x7ff1473dd998/0/24, RS_0x7ff1473dd998/0/28; +RS_0x7ff1473dd998 .resolv tri, RS_0x7ff1473dd998/1/0, RS_0x7ff1473dd998/1/4, C4, C4; +v0x29e0fd0_0 .net8 "orin", 31 0, RS_0x7ff1473dd998; 32 drivers +v0x29e1050_0 .net "slt", 31 0, L_0x2a400b0; 1 drivers +RS_0x7ff1473e4ce8/0/0 .resolv tri, L_0x2a294a0, L_0x2a2da40, L_0x2a2dd70, L_0x2a2e130; +RS_0x7ff1473e4ce8/0/4 .resolv tri, L_0x2a2e470, L_0x2a2e740, L_0x2a2eba0, L_0x2a2ef40; +RS_0x7ff1473e4ce8/0/8 .resolv tri, L_0x2a2efe0, L_0x2a2f670, L_0x2a2f710, L_0x2a2fd50; +RS_0x7ff1473e4ce8/0/12 .resolv tri, L_0x2a1caf0, L_0x2a305a0, L_0x2a30640, L_0x2a30d10; +RS_0x7ff1473e4ce8/0/16 .resolv tri, L_0x2a30db0, L_0x2a311b0, L_0x2a31340, L_0x2a318c0; +RS_0x7ff1473e4ce8/0/20 .resolv tri, L_0x2a31a30, L_0x2a31fa0, L_0x2a32140, L_0x2a32690; +RS_0x7ff1473e4ce8/0/24 .resolv tri, L_0x2a32810, L_0x2a33000, L_0x2a330a0, L_0x2a33730; +RS_0x7ff1473e4ce8/0/28 .resolv tri, L_0x2a337d0, L_0x2a33e20, L_0x2a341a0, L_0x2a30a80; +RS_0x7ff1473e4ce8/1/0 .resolv tri, RS_0x7ff1473e4ce8/0/0, RS_0x7ff1473e4ce8/0/4, RS_0x7ff1473e4ce8/0/8, RS_0x7ff1473e4ce8/0/12; +RS_0x7ff1473e4ce8/1/4 .resolv tri, RS_0x7ff1473e4ce8/0/16, RS_0x7ff1473e4ce8/0/20, RS_0x7ff1473e4ce8/0/24, RS_0x7ff1473e4ce8/0/28; +RS_0x7ff1473e4ce8 .resolv tri, RS_0x7ff1473e4ce8/1/0, RS_0x7ff1473e4ce8/1/4, C4, C4; +v0x29e1180_0 .net8 "xorin", 31 0, RS_0x7ff1473e4ce8; 32 drivers +v0x29e1230_0 .var "zeroflag", 0 0; +E_0x2899a30 .event edge, v0x276abd0_0, v0x276ab30_0, v0x29dfa20_0; +S_0x29b8ce0 .scope module, "addsub0" "adder_subtracter" 18 34, 19 175, S_0x2916ac0; + .timescale 0 0; +L_0x29fba80 .functor NOT 1, L_0x29fbae0, C4<0>, C4<0>, C4<0>; +L_0x29fbc20 .functor NOT 1, L_0x29fbc80, C4<0>, C4<0>, C4<0>; +L_0x29fbe50 .functor NOT 1, L_0x29fbeb0, C4<0>, C4<0>, C4<0>; +L_0x29fbff0 .functor NOT 1, L_0x29fc050, C4<0>, C4<0>, C4<0>; +L_0x29fc190 .functor NOT 1, L_0x29fc1f0, C4<0>, C4<0>, C4<0>; +L_0x29fc390 .functor NOT 1, L_0x29fc3f0, C4<0>, C4<0>, C4<0>; +L_0x29fc290 .functor NOT 1, L_0x29fc7b0, C4<0>, C4<0>, C4<0>; +L_0x29e0d60 .functor NOT 1, L_0x29fc8f0, C4<0>, C4<0>, C4<0>; +L_0x29fca30 .functor NOT 1, L_0x29fca90, C4<0>, C4<0>, C4<0>; +L_0x29fbdc0 .functor NOT 1, L_0x29fccd0, C4<0>, C4<0>, C4<0>; +L_0x29fce20 .functor NOT 1, L_0x29fce80, C4<0>, C4<0>, C4<0>; +L_0x29fcfe0 .functor NOT 1, L_0x29fd040, C4<0>, C4<0>, C4<0>; +L_0x29fcc70 .functor NOT 1, L_0x29fd1b0, C4<0>, C4<0>, C4<0>; +L_0x29fd330 .functor NOT 1, L_0x29fd390, C4<0>, C4<0>, C4<0>; +L_0x29fc6a0 .functor NOT 1, L_0x29fc700, C4<0>, C4<0>, C4<0>; +L_0x29fd830 .functor NOT 1, L_0x29fd920, C4<0>, C4<0>, C4<0>; +L_0x29fd7d0 .functor NOT 1, L_0x29fdb20, C4<0>, C4<0>, C4<0>; +L_0x29fda60 .functor NOT 1, L_0x29fde20, C4<0>, C4<0>, C4<0>; +L_0x29fdcb0 .functor NOT 1, L_0x29fe040, C4<0>, C4<0>, C4<0>; +L_0x29fdf60 .functor NOT 1, L_0x29fdd80, C4<0>, C4<0>, C4<0>; +L_0x29fe1d0 .functor NOT 1, L_0x29fe560, C4<0>, C4<0>, C4<0>; +L_0x29fe460 .functor NOT 1, L_0x29fe2c0, C4<0>, C4<0>, C4<0>; +L_0x29de130 .functor NOT 1, L_0x29fe650, C4<0>, C4<0>, C4<0>; +L_0x29fc530 .functor NOT 1, L_0x29fe740, C4<0>, C4<0>, C4<0>; +L_0x29fed70 .functor NOT 1, L_0x29ff0b0, C4<0>, C4<0>, C4<0>; +L_0x29fefc0 .functor NOT 1, L_0x29fee20, C4<0>, C4<0>, C4<0>; +L_0x29ff1f0 .functor NOT 1, L_0x29ff580, C4<0>, C4<0>, C4<0>; +L_0x29ff470 .functor NOT 1, L_0x29ff2f0, C4<0>, C4<0>, C4<0>; +L_0x29ff6c0 .functor NOT 1, L_0x29ffaa0, C4<0>, C4<0>, C4<0>; +L_0x29ff970 .functor NOT 1, L_0x29ff7c0, C4<0>, C4<0>, C4<0>; +L_0x29f8d20 .functor NOT 1, L_0x29ffbe0, C4<0>, C4<0>, C4<0>; +L_0x29ffec0 .functor NOT 1, L_0x29fff20, C4<0>, C4<0>, C4<0>; +v0x29dc910_0 .net "_", 0 0, L_0x2a0fb40; 1 drivers +v0x29dcf70_0 .net "_1", 0 0, L_0x2a13f40; 1 drivers +v0x29dcff0_0 .net "_2", 0 0, L_0x2a18250; 1 drivers +v0x29dd070_0 .net "_3", 0 0, L_0x2a1c5a0; 1 drivers +v0x29dd0f0_0 .net "_4", 0 0, L_0x2a209b0; 1 drivers +v0x29dd170_0 .net "_5", 0 0, L_0x2a24cc0; 1 drivers +v0x29dd1f0_0 .net "_6", 0 0, L_0x2a28fc0; 1 drivers +v0x29dd270_0 .net *"_s0", 0 0, L_0x29fba80; 1 drivers +v0x29dd2f0_0 .net *"_s100", 0 0, L_0x29fefc0; 1 drivers +v0x29dd370_0 .net *"_s103", 0 0, L_0x29fee20; 1 drivers +v0x29dd3f0_0 .net *"_s104", 0 0, L_0x29ff1f0; 1 drivers +v0x29dd470_0 .net *"_s107", 0 0, L_0x29ff580; 1 drivers +v0x29dd4f0_0 .net *"_s108", 0 0, L_0x29ff470; 1 drivers +v0x29dd570_0 .net *"_s11", 0 0, L_0x29fbeb0; 1 drivers +v0x29dd670_0 .net *"_s111", 0 0, L_0x29ff2f0; 1 drivers +v0x29dd6f0_0 .net *"_s112", 0 0, L_0x29ff6c0; 1 drivers +v0x29dd5f0_0 .net *"_s115", 0 0, L_0x29ffaa0; 1 drivers +v0x29dd800_0 .net *"_s116", 0 0, L_0x29ff970; 1 drivers +v0x29dd920_0 .net *"_s119", 0 0, L_0x29ff7c0; 1 drivers +v0x29dd9a0_0 .net *"_s12", 0 0, L_0x29fbff0; 1 drivers +v0x29dd880_0 .net *"_s120", 0 0, L_0x29f8d20; 1 drivers +v0x29ddad0_0 .net *"_s123", 0 0, L_0x29ffbe0; 1 drivers +v0x29dda20_0 .net *"_s124", 0 0, L_0x29ffec0; 1 drivers +v0x29ddc10_0 .net *"_s127", 0 0, L_0x29fff20; 1 drivers +v0x29ddb70_0 .net *"_s15", 0 0, L_0x29fc050; 1 drivers +v0x29ddd60_0 .net *"_s16", 0 0, L_0x29fc190; 1 drivers +v0x29ddcb0_0 .net *"_s19", 0 0, L_0x29fc1f0; 1 drivers +v0x29ddec0_0 .net *"_s20", 0 0, L_0x29fc390; 1 drivers +v0x29dde00_0 .net *"_s23", 0 0, L_0x29fc3f0; 1 drivers +v0x29de030_0 .net *"_s24", 0 0, L_0x29fc290; 1 drivers +v0x29ddf40_0 .net *"_s27", 0 0, L_0x29fc7b0; 1 drivers +v0x29de1b0_0 .net *"_s28", 0 0, L_0x29e0d60; 1 drivers +v0x29de0b0_0 .net *"_s3", 0 0, L_0x29fbae0; 1 drivers +v0x29de340_0 .net *"_s31", 0 0, L_0x29fc8f0; 1 drivers +v0x29de230_0 .net *"_s32", 0 0, L_0x29fca30; 1 drivers +v0x29de4e0_0 .net *"_s35", 0 0, L_0x29fca90; 1 drivers +v0x29de3c0_0 .net *"_s36", 0 0, L_0x29fbdc0; 1 drivers +v0x29de460_0 .net *"_s39", 0 0, L_0x29fccd0; 1 drivers +v0x29de6a0_0 .net *"_s4", 0 0, L_0x29fbc20; 1 drivers +v0x29de720_0 .net *"_s40", 0 0, L_0x29fce20; 1 drivers +v0x29de560_0 .net *"_s43", 0 0, L_0x29fce80; 1 drivers +v0x29de600_0 .net *"_s44", 0 0, L_0x29fcfe0; 1 drivers +v0x29de900_0 .net *"_s47", 0 0, L_0x29fd040; 1 drivers +v0x29de980_0 .net *"_s48", 0 0, L_0x29fcc70; 1 drivers +v0x29de7a0_0 .net *"_s51", 0 0, L_0x29fd1b0; 1 drivers +v0x29de840_0 .net *"_s52", 0 0, L_0x29fd330; 1 drivers +v0x29deb80_0 .net *"_s55", 0 0, L_0x29fd390; 1 drivers +v0x29dec00_0 .net *"_s56", 0 0, L_0x29fc6a0; 1 drivers +v0x29dea20_0 .net *"_s59", 0 0, L_0x29fc700; 1 drivers +v0x29deac0_0 .net *"_s60", 0 0, L_0x29fd830; 1 drivers +v0x29dee20_0 .net *"_s63", 0 0, L_0x29fd920; 1 drivers +v0x29deea0_0 .net *"_s64", 0 0, L_0x29fd7d0; 1 drivers +v0x29deca0_0 .net *"_s67", 0 0, L_0x29fdb20; 1 drivers +v0x29ded40_0 .net *"_s68", 0 0, L_0x29fda60; 1 drivers +v0x29df0e0_0 .net *"_s7", 0 0, L_0x29fbc80; 1 drivers +v0x29df160_0 .net *"_s71", 0 0, L_0x29fde20; 1 drivers +v0x29def20_0 .net *"_s72", 0 0, L_0x29fdcb0; 1 drivers +v0x29defc0_0 .net *"_s75", 0 0, L_0x29fe040; 1 drivers +v0x29df060_0 .net *"_s76", 0 0, L_0x29fdf60; 1 drivers +v0x29df3e0_0 .net *"_s79", 0 0, L_0x29fdd80; 1 drivers +v0x29df200_0 .net *"_s8", 0 0, L_0x29fbe50; 1 drivers +v0x29df2a0_0 .net *"_s80", 0 0, L_0x29fe1d0; 1 drivers +v0x29df340_0 .net *"_s83", 0 0, L_0x29fe560; 1 drivers +v0x29df680_0 .net *"_s84", 0 0, L_0x29fe460; 1 drivers +v0x29df480_0 .net *"_s87", 0 0, L_0x29fe2c0; 1 drivers +v0x29df520_0 .net *"_s88", 0 0, L_0x29de130; 1 drivers +v0x29df5c0_0 .net *"_s91", 0 0, L_0x29fe650; 1 drivers +v0x29df920_0 .net *"_s92", 0 0, L_0x29fc530; 1 drivers +v0x29df720_0 .net *"_s95", 0 0, L_0x29fe740; 1 drivers +v0x29df7c0_0 .net *"_s96", 0 0, L_0x29fed70; 1 drivers +v0x29df860_0 .net *"_s99", 0 0, L_0x29ff0b0; 1 drivers +v0x29dfbe0_0 .alias "ans", 31 0, v0x29e0b40_0; +v0x29df9a0_0 .alias "carryout", 0 0, v0x29e0a40_0; +v0x29dfa20_0 .alias "command", 2 0, v0x29f2340_0; +v0x29dfac0_0 .net "cout0", 0 0, L_0x2a0e3b0; 1 drivers +v0x29dfec0_0 .net "cout1", 0 0, L_0x2a12830; 1 drivers +v0x29dfcf0_0 .net "cout2", 0 0, L_0x2a16b40; 1 drivers +v0x29dfe00_0 .net "cout3", 0 0, L_0x2a1ae90; 1 drivers +v0x29e0250_0 .net "cout4", 0 0, L_0x2a1f2a0; 1 drivers +v0x29e0360_0 .net "cout5", 0 0, L_0x2a23530; 1 drivers +v0x29dffd0_0 .net "cout6", 0 0, L_0x2a278b0; 1 drivers +RS_0x7ff1473edad8/0/0 .resolv tri, L_0x2a06e90, L_0x2a00230, L_0x2a05570, L_0x2a06c80; +RS_0x7ff1473edad8/0/4 .resolv tri, L_0x2a00010, L_0x2a07d80, L_0x2a081b0, L_0x2a08400; +RS_0x7ff1473edad8/0/8 .resolv tri, L_0x2a07e20, L_0x2a07fc0, L_0x2a087e0, L_0x2a089d0; +RS_0x7ff1473edad8/0/12 .resolv tri, L_0x2a08e30, L_0x2a08fd0, L_0x2a091c0, L_0x2a092b0; +RS_0x7ff1473edad8/0/16 .resolv tri, L_0x2a094a0, L_0x2a09690, L_0x2a09b20, L_0x2a09cd0; +RS_0x7ff1473edad8/0/20 .resolv tri, L_0x2a09ec0, L_0x2a09880, L_0x2a0a060, L_0x2a0a520; +RS_0x7ff1473edad8/0/24 .resolv tri, L_0x2a0a710, L_0x2a0a250, L_0x2a0a440, L_0x2a0a900; +RS_0x7ff1473edad8/0/28 .resolv tri, L_0x2a0ac50, L_0x2a0b140, L_0x2a0b330, L_0x2a0b3d0; +RS_0x7ff1473edad8/1/0 .resolv tri, RS_0x7ff1473edad8/0/0, RS_0x7ff1473edad8/0/4, RS_0x7ff1473edad8/0/8, RS_0x7ff1473edad8/0/12; +RS_0x7ff1473edad8/1/4 .resolv tri, RS_0x7ff1473edad8/0/16, RS_0x7ff1473edad8/0/20, RS_0x7ff1473edad8/0/24, RS_0x7ff1473edad8/0/28; +RS_0x7ff1473edad8 .resolv tri, RS_0x7ff1473edad8/1/0, RS_0x7ff1473edad8/1/4, C4, C4; +v0x29e00e0_0 .net8 "finalB", 31 0, RS_0x7ff1473edad8; 32 drivers +RS_0x7ff1473ed478/0/0 .resolv tri, L_0x29fb9e0, L_0x29fbb80, L_0x29fbd20, L_0x29fbf50; +RS_0x7ff1473ed478/0/4 .resolv tri, L_0x29fc0f0, L_0x29fc2f0, L_0x29e0cc0, L_0x29fc850; +RS_0x7ff1473ed478/0/8 .resolv tri, L_0x29fc990, L_0x29fcbd0, L_0x29fcb30, L_0x29fcd70; +RS_0x7ff1473ed478/0/12 .resolv tri, L_0x29fcf20, L_0x29fd0e0, L_0x29fd250, L_0x29fd430; +RS_0x7ff1473ed478/0/16 .resolv tri, L_0x29fd730, L_0x29fd9c0, L_0x29fdc10, L_0x29fdec0; +RS_0x7ff1473ed478/0/20 .resolv tri, L_0x29fe130, L_0x29fe3c0, L_0x29fc600, L_0x29fc490; +RS_0x7ff1473ed478/0/24 .resolv tri, L_0x29fecd0, L_0x29fef20, L_0x29ff150, L_0x29ff3d0; +RS_0x7ff1473ed478/0/28 .resolv tri, L_0x29ff620, L_0x29ff8d0, L_0x29ffb40, L_0x29ffe20; +RS_0x7ff1473ed478/1/0 .resolv tri, RS_0x7ff1473ed478/0/0, RS_0x7ff1473ed478/0/4, RS_0x7ff1473ed478/0/8, RS_0x7ff1473ed478/0/12; +RS_0x7ff1473ed478/1/4 .resolv tri, RS_0x7ff1473ed478/0/16, RS_0x7ff1473ed478/0/20, RS_0x7ff1473ed478/0/24, RS_0x7ff1473ed478/0/28; +RS_0x7ff1473ed478 .resolv tri, RS_0x7ff1473ed478/1/0, RS_0x7ff1473ed478/1/4, C4, C4; +v0x29e0680_0 .net8 "invertedB", 31 0, RS_0x7ff1473ed478; 32 drivers +v0x29e0700_0 .alias "opA", 31 0, v0x29f1e00_0; +v0x29e03e0_0 .alias "opB", 31 0, v0x29e1880_0; +v0x29e0460_0 .alias "overflow", 0 0, v0x29e0ac0_0; +L_0x29fb9e0 .part/pv L_0x29fba80, 0, 1, 32; +L_0x29fbae0 .part v0x29e1590_0, 0, 1; +L_0x29fbb80 .part/pv L_0x29fbc20, 1, 1, 32; +L_0x29fbc80 .part v0x29e1590_0, 1, 1; +L_0x29fbd20 .part/pv L_0x29fbe50, 2, 1, 32; +L_0x29fbeb0 .part v0x29e1590_0, 2, 1; +L_0x29fbf50 .part/pv L_0x29fbff0, 3, 1, 32; +L_0x29fc050 .part v0x29e1590_0, 3, 1; +L_0x29fc0f0 .part/pv L_0x29fc190, 4, 1, 32; +L_0x29fc1f0 .part v0x29e1590_0, 4, 1; +L_0x29fc2f0 .part/pv L_0x29fc390, 5, 1, 32; +L_0x29fc3f0 .part v0x29e1590_0, 5, 1; +L_0x29e0cc0 .part/pv L_0x29fc290, 6, 1, 32; +L_0x29fc7b0 .part v0x29e1590_0, 6, 1; +L_0x29fc850 .part/pv L_0x29e0d60, 7, 1, 32; +L_0x29fc8f0 .part v0x29e1590_0, 7, 1; +L_0x29fc990 .part/pv L_0x29fca30, 8, 1, 32; +L_0x29fca90 .part v0x29e1590_0, 8, 1; +L_0x29fcbd0 .part/pv L_0x29fbdc0, 9, 1, 32; +L_0x29fccd0 .part v0x29e1590_0, 9, 1; +L_0x29fcb30 .part/pv L_0x29fce20, 10, 1, 32; +L_0x29fce80 .part v0x29e1590_0, 10, 1; +L_0x29fcd70 .part/pv L_0x29fcfe0, 11, 1, 32; +L_0x29fd040 .part v0x29e1590_0, 11, 1; +L_0x29fcf20 .part/pv L_0x29fcc70, 12, 1, 32; +L_0x29fd1b0 .part v0x29e1590_0, 12, 1; +L_0x29fd0e0 .part/pv L_0x29fd330, 13, 1, 32; +L_0x29fd390 .part v0x29e1590_0, 13, 1; +L_0x29fd250 .part/pv L_0x29fc6a0, 14, 1, 32; +L_0x29fc700 .part v0x29e1590_0, 14, 1; +L_0x29fd430 .part/pv L_0x29fd830, 15, 1, 32; +L_0x29fd920 .part v0x29e1590_0, 15, 1; +L_0x29fd730 .part/pv L_0x29fd7d0, 16, 1, 32; +L_0x29fdb20 .part v0x29e1590_0, 16, 1; +L_0x29fd9c0 .part/pv L_0x29fda60, 17, 1, 32; +L_0x29fde20 .part v0x29e1590_0, 17, 1; +L_0x29fdc10 .part/pv L_0x29fdcb0, 18, 1, 32; +L_0x29fe040 .part v0x29e1590_0, 18, 1; +L_0x29fdec0 .part/pv L_0x29fdf60, 19, 1, 32; +L_0x29fdd80 .part v0x29e1590_0, 19, 1; +L_0x29fe130 .part/pv L_0x29fe1d0, 20, 1, 32; +L_0x29fe560 .part v0x29e1590_0, 20, 1; +L_0x29fe3c0 .part/pv L_0x29fe460, 21, 1, 32; +L_0x29fe2c0 .part v0x29e1590_0, 21, 1; +L_0x29fc600 .part/pv L_0x29de130, 22, 1, 32; +L_0x29fe650 .part v0x29e1590_0, 22, 1; +L_0x29fc490 .part/pv L_0x29fc530, 23, 1, 32; +L_0x29fe740 .part v0x29e1590_0, 23, 1; +L_0x29fecd0 .part/pv L_0x29fed70, 24, 1, 32; +L_0x29ff0b0 .part v0x29e1590_0, 24, 1; +L_0x29fef20 .part/pv L_0x29fefc0, 25, 1, 32; +L_0x29fee20 .part v0x29e1590_0, 25, 1; +L_0x29ff150 .part/pv L_0x29ff1f0, 26, 1, 32; +L_0x29ff580 .part v0x29e1590_0, 26, 1; +L_0x29ff3d0 .part/pv L_0x29ff470, 27, 1, 32; +L_0x29ff2f0 .part v0x29e1590_0, 27, 1; +L_0x29ff620 .part/pv L_0x29ff6c0, 28, 1, 32; +L_0x29ffaa0 .part v0x29e1590_0, 28, 1; +L_0x29ff8d0 .part/pv L_0x29ff970, 29, 1, 32; +L_0x29ff7c0 .part v0x29e1590_0, 29, 1; +L_0x29ffb40 .part/pv L_0x29f8d20, 30, 1, 32; +L_0x29ffbe0 .part v0x29e1590_0, 30, 1; +L_0x29ffe20 .part/pv L_0x29ffec0, 31, 1, 32; +L_0x29fff20 .part v0x29e1590_0, 31, 1; +L_0x2a0b5c0 .part v0x29f1580_0, 0, 1; +RS_0x7ff1473ebc18 .resolv tri, L_0x2a0c540, L_0x2a0d190, L_0x2a0ded0, L_0x2a0eb30; +L_0x2a0fc90 .part/pv RS_0x7ff1473ebc18, 0, 4, 32; +L_0x29fd520 .part L_0x29fa450, 0, 4; +L_0x29fd5c0 .part RS_0x7ff1473edad8, 0, 4; +L_0x29fd660 .part v0x29f1580_0, 0, 1; +RS_0x7ff1473eae38 .resolv tri, L_0x2a109c0, L_0x2a11610, L_0x2a12350, L_0x2a12fb0; +L_0x2a14090 .part/pv RS_0x7ff1473eae38, 4, 4, 32; +L_0x2a0fd80 .part L_0x29fa450, 4, 4; +L_0x2a0fe20 .part RS_0x7ff1473edad8, 4, 4; +RS_0x7ff1473ea058 .resolv tri, L_0x2a14cd0, L_0x2a15920, L_0x2a16660, L_0x2a172c0; +L_0x2a183a0 .part/pv RS_0x7ff1473ea058, 8, 4, 32; +L_0x2a184d0 .part L_0x29fa450, 8, 4; +L_0x2a14130 .part RS_0x7ff1473edad8, 8, 4; +RS_0x7ff1473e9278 .resolv tri, L_0x2a19020, L_0x2a19c70, L_0x2a1a9b0, L_0x2a1b610; +L_0x2a1c6f0 .part/pv RS_0x7ff1473e9278, 12, 4, 32; +L_0x2a18570 .part L_0x29fa450, 12, 4; +L_0x29e1770 .part RS_0x7ff1473edad8, 12, 4; +RS_0x7ff1473e8498 .resolv tri, L_0x2a1d430, L_0x2a1e080, L_0x2a1edc0, L_0x2a1fa20; +L_0x2a20b00 .part/pv RS_0x7ff1473e8498, 16, 4, 32; +L_0x2a20ba0 .part L_0x29fa450, 16, 4; +L_0x2a1cc10 .part RS_0x7ff1473edad8, 16, 4; +RS_0x7ff1473e76b8 .resolv tri, L_0x2a21720, L_0x2a22310, L_0x2a23050, L_0x2a23cb0; +L_0x2a24e10 .part/pv RS_0x7ff1473e76b8, 20, 4, 32; +L_0x2a20c40 .part L_0x29fa450, 20, 4; +L_0x2a20ce0 .part RS_0x7ff1473edad8, 20, 4; +RS_0x7ff1473e68d8 .resolv tri, L_0x2a25a60, L_0x2a266a0, L_0x2a273d0, L_0x2a28030; +L_0x2a29110 .part/pv RS_0x7ff1473e68d8, 24, 4, 32; +L_0x2a292c0 .part L_0x29fa450, 24, 4; +L_0x2a24eb0 .part RS_0x7ff1473edad8, 24, 4; +RS_0x7ff1473e5af8 .resolv tri, L_0x2a29dd0, L_0x2a2aa20, L_0x2a2b760, L_0x2a2c400; +L_0x2a2d490 .part/pv RS_0x7ff1473e5af8, 28, 4, 32; +L_0x2a29360 .part L_0x29fa450, 28, 4; +L_0x2a29400 .part RS_0x7ff1473edad8, 28, 4; +S_0x29d60c0 .scope module, "addsubmux" "muxtype1" 19 235, 19 3, S_0x29b8ce0; + .timescale 0 0; +L_0x29ffd20 .functor NOT 1, L_0x2a0b5c0, C4<0>, C4<0>, C4<0>; +L_0x29ffd80 .functor AND 1, L_0x2a00580, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00670 .functor AND 1, L_0x2a006d0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a007c0 .functor AND 1, L_0x2a008b0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00950 .functor AND 1, L_0x2a009b0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00aa0 .functor AND 1, L_0x2a00b00, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00bf0 .functor AND 1, L_0x2a00c50, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00d40 .functor AND 1, L_0x2a00eb0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00fa0 .functor AND 1, L_0x2a01000, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01140 .functor AND 1, L_0x2a011a0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01290 .functor AND 1, L_0x2a012f0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01440 .functor AND 1, L_0x2a01510, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a00820 .functor AND 1, L_0x2a015b0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a013e0 .functor AND 1, L_0x2a01790, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01880 .functor AND 1, L_0x2a018e0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01a50 .functor AND 1, L_0x2a01cc0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01d60 .functor AND 1, L_0x2a01dc0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01f40 .functor AND 1, L_0x2a02040, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a020e0 .functor AND 1, L_0x2a02140, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a01eb0 .functor AND 1, L_0x2a01fa0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a02400 .functor AND 1, L_0x2a02490, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a02230 .functor AND 1, L_0x2a02300, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a02740 .functor AND 1, L_0x2a027d0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a014a0 .functor AND 1, L_0x2a02580, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a02620 .functor AND 1, L_0x29fe990, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a019d0 .functor AND 1, L_0x29fec30, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a016f0 .functor AND 1, L_0x29fe8c0, L_0x29ffd20, C4<1>, C4<1>; +L_0x29fea80 .functor AND 1, L_0x29feb10, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a032f0 .functor AND 1, L_0x2a03350, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a03120 .functor AND 1, L_0x2a031b0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a03630 .functor AND 1, L_0x2a03690, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a03440 .functor AND 1, L_0x2a01bc0, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a03500 .functor AND 1, L_0x2a03590, L_0x29ffd20, C4<1>, C4<1>; +L_0x2a03730 .functor AND 1, L_0x2a01ab0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a03ec0 .functor AND 1, L_0x2a03f20, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a03c90 .functor AND 1, L_0x2a03d20, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a03dc0 .functor AND 1, L_0x2a042f0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04010 .functor AND 1, L_0x2a041c0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a040a0 .functor AND 1, L_0x2a04600, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04390 .functor AND 1, L_0x2a04420, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04510 .functor AND 1, L_0x2a04a90, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04130 .functor AND 1, L_0x2a046f0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04940 .functor AND 1, L_0x2a049d0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04b30 .functor AND 1, L_0x2a04b90, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04c80 .functor AND 1, L_0x2a04ce0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04de0 .functor AND 1, L_0x2a04e70, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04f60 .functor AND 1, L_0x2a04ff0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a05090 .functor AND 1, L_0x2a05120, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a05210 .functor AND 1, L_0x2a052a0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a04830 .functor AND 1, L_0x2a053f0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a054e0 .functor AND 1, L_0x2a05780, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a05870 .functor AND 1, L_0x2a05a80, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a05b70 .functor AND 1, L_0x2a05de0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a05c20 .functor AND 1, L_0x2a05cb0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a048c0 .functor AND 1, L_0x2a058d0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a059c0 .functor AND 1, L_0x2a05e80, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a05f70 .functor AND 1, L_0x2a06000, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a060f0 .functor AND 1, L_0x2a06360, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a06450 .functor AND 1, L_0x2a064b0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a06550 .functor AND 1, L_0x2a065b0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a066a0 .functor AND 1, L_0x2a06180, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a06220 .functor AND 1, L_0x2a067a0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a06890 .functor AND 1, L_0x2a06920, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a06a10 .functor AND 1, L_0x2a06aa0, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a062e0 .functor AND 1, L_0x2a06b90, L_0x2a0b5c0, C4<1>, C4<1>; +L_0x2a06f80 .functor OR 1, L_0x29ffd80, L_0x2a03730, C4<0>, C4<0>; +L_0x2a070d0 .functor OR 1, L_0x2a00670, L_0x2a03ec0, C4<0>, C4<0>; +L_0x2a003c0 .functor OR 1, L_0x2a007c0, L_0x2a03c90, C4<0>, C4<0>; +L_0x2a06d20 .functor OR 1, L_0x2a00950, L_0x2a03dc0, C4<0>, C4<0>; +L_0x2a000b0 .functor OR 1, L_0x2a00aa0, L_0x2a04010, C4<0>, C4<0>; +L_0x2a08060 .functor OR 1, L_0x2a00bf0, L_0x2a040a0, C4<0>, C4<0>; +L_0x2a05610 .functor OR 1, L_0x2a00d40, L_0x2a04390, C4<0>, C4<0>; +L_0x2a084a0 .functor OR 1, L_0x2a00fa0, L_0x2a04510, C4<0>, C4<0>; +L_0x2a07ec0 .functor OR 1, L_0x2a01140, L_0x2a04130, C4<0>, C4<0>; +L_0x2a08690 .functor OR 1, L_0x2a01290, L_0x2a04940, C4<0>, C4<0>; +L_0x2a08880 .functor OR 1, L_0x2a01440, L_0x2a04b30, C4<0>, C4<0>; +L_0x2a08ce0 .functor OR 1, L_0x2a00820, L_0x2a04c80, C4<0>, C4<0>; +L_0x2a08ed0 .functor OR 1, L_0x2a013e0, L_0x2a04de0, C4<0>, C4<0>; +L_0x2a09070 .functor OR 1, L_0x2a01880, L_0x2a04f60, C4<0>, C4<0>; +L_0x2a08c80 .functor OR 1, L_0x2a01a50, L_0x2a05090, C4<0>, C4<0>; +L_0x2a09350 .functor OR 1, L_0x2a01d60, L_0x2a05210, C4<0>, C4<0>; +L_0x2a09540 .functor OR 1, L_0x2a01f40, L_0x2a04830, C4<0>, C4<0>; +L_0x2a099d0 .functor OR 1, L_0x2a020e0, L_0x2a054e0, C4<0>, C4<0>; +L_0x2a09bc0 .functor OR 1, L_0x2a01eb0, L_0x2a05870, C4<0>, C4<0>; +L_0x2a09d70 .functor OR 1, L_0x2a02400, L_0x2a05b70, C4<0>, C4<0>; +L_0x2a09730 .functor OR 1, L_0x2a02230, L_0x2a05c20, C4<0>, C4<0>; +L_0x2a09920 .functor OR 1, L_0x2a02740, L_0x2a048c0, C4<0>, C4<0>; +L_0x2a0a100 .functor OR 1, L_0x2a014a0, L_0x2a059c0, C4<0>, C4<0>; +L_0x2a0a5c0 .functor OR 1, L_0x2a02620, L_0x2a05f70, C4<0>, C4<0>; +L_0x2a0aab0 .functor OR 1, L_0x2a019d0, L_0x2a060f0, C4<0>, C4<0>; +L_0x2a0a2f0 .functor OR 1, L_0x2a016f0, L_0x2a06450, C4<0>, C4<0>; +L_0x2a0a7b0 .functor OR 1, L_0x29fea80, L_0x2a06550, C4<0>, C4<0>; +L_0x2a0a9a0 .functor OR 1, L_0x2a032f0, L_0x2a066a0, C4<0>, C4<0>; +L_0x2a0acf0 .functor OR 1, L_0x2a03120, L_0x2a06220, C4<0>, C4<0>; +L_0x2a0b1e0 .functor OR 1, L_0x2a03630, L_0x2a06890, C4<0>, C4<0>; +L_0x2a06280 .functor OR 1, L_0x2a03440, L_0x2a06a10, C4<0>, C4<0>; +L_0x2a0b470 .functor OR 1, L_0x2a03500, L_0x2a062e0, C4<0>, C4<0>; +v0x29d61b0_0 .net *"_s1", 0 0, L_0x2a00580; 1 drivers +v0x29d6270_0 .net *"_s101", 0 0, L_0x2a05a80; 1 drivers +v0x29d6310_0 .net *"_s103", 0 0, L_0x2a05de0; 1 drivers +v0x29d63b0_0 .net *"_s105", 0 0, L_0x2a05cb0; 1 drivers +v0x29d6430_0 .net *"_s107", 0 0, L_0x2a058d0; 1 drivers +v0x29d64d0_0 .net *"_s109", 0 0, L_0x2a05e80; 1 drivers +v0x29d6570_0 .net *"_s11", 0 0, L_0x2a00c50; 1 drivers +v0x29d6610_0 .net *"_s111", 0 0, L_0x2a06000; 1 drivers +v0x29d6700_0 .net *"_s113", 0 0, L_0x2a06360; 1 drivers +v0x29d67a0_0 .net *"_s115", 0 0, L_0x2a064b0; 1 drivers +v0x29d6840_0 .net *"_s117", 0 0, L_0x2a065b0; 1 drivers +v0x29d68e0_0 .net *"_s119", 0 0, L_0x2a06180; 1 drivers +v0x29d6980_0 .net *"_s121", 0 0, L_0x2a067a0; 1 drivers +v0x29d6a20_0 .net *"_s123", 0 0, L_0x2a06920; 1 drivers +v0x29d6b40_0 .net *"_s125", 0 0, L_0x2a06aa0; 1 drivers +v0x29d6be0_0 .net *"_s127", 0 0, L_0x2a06b90; 1 drivers +v0x29d6aa0_0 .net *"_s128", 0 0, L_0x2a06f80; 1 drivers +v0x29d6d30_0 .net *"_s13", 0 0, L_0x2a00eb0; 1 drivers +v0x29d6e50_0 .net *"_s130", 0 0, L_0x2a070d0; 1 drivers +v0x29d6ed0_0 .net *"_s132", 0 0, L_0x2a003c0; 1 drivers +v0x29d6db0_0 .net *"_s134", 0 0, L_0x2a06d20; 1 drivers +v0x29d7000_0 .net *"_s136", 0 0, L_0x2a000b0; 1 drivers +v0x29d6f50_0 .net *"_s138", 0 0, L_0x2a08060; 1 drivers +v0x29d7140_0 .net *"_s140", 0 0, L_0x2a05610; 1 drivers +v0x29d70a0_0 .net *"_s142", 0 0, L_0x2a084a0; 1 drivers +v0x29d7290_0 .net *"_s144", 0 0, L_0x2a07ec0; 1 drivers +v0x29d71e0_0 .net *"_s146", 0 0, L_0x2a08690; 1 drivers +v0x29d73f0_0 .net *"_s148", 0 0, L_0x2a08880; 1 drivers +v0x29d7330_0 .net *"_s15", 0 0, L_0x2a01000; 1 drivers +v0x29d7560_0 .net *"_s150", 0 0, L_0x2a08ce0; 1 drivers +v0x29d7470_0 .net *"_s152", 0 0, L_0x2a08ed0; 1 drivers +v0x29d76e0_0 .net *"_s154", 0 0, L_0x2a09070; 1 drivers +v0x29d75e0_0 .net *"_s156", 0 0, L_0x2a08c80; 1 drivers +v0x29d7870_0 .net *"_s158", 0 0, L_0x2a09350; 1 drivers +v0x29d7760_0 .net *"_s160", 0 0, L_0x2a09540; 1 drivers +v0x29d7a10_0 .net *"_s162", 0 0, L_0x2a099d0; 1 drivers +v0x29d78f0_0 .net *"_s164", 0 0, L_0x2a09bc0; 1 drivers +v0x29d7990_0 .net *"_s166", 0 0, L_0x2a09d70; 1 drivers +v0x29d7bd0_0 .net *"_s168", 0 0, L_0x2a09730; 1 drivers +v0x29d7c50_0 .net *"_s17", 0 0, L_0x2a011a0; 1 drivers +v0x29d7a90_0 .net *"_s170", 0 0, L_0x2a09920; 1 drivers +v0x29d7b30_0 .net *"_s172", 0 0, L_0x2a0a100; 1 drivers +v0x29d7e30_0 .net *"_s174", 0 0, L_0x2a0a5c0; 1 drivers +v0x29d7eb0_0 .net *"_s176", 0 0, L_0x2a0aab0; 1 drivers +v0x29d7cd0_0 .net *"_s178", 0 0, L_0x2a0a2f0; 1 drivers +v0x29d7d70_0 .net *"_s180", 0 0, L_0x2a0a7b0; 1 drivers +v0x29d80b0_0 .net *"_s182", 0 0, L_0x2a0a9a0; 1 drivers +v0x29d8130_0 .net *"_s184", 0 0, L_0x2a0acf0; 1 drivers +v0x29d7f50_0 .net *"_s186", 0 0, L_0x2a0b1e0; 1 drivers +v0x29d7ff0_0 .net *"_s188", 0 0, L_0x2a06280; 1 drivers +v0x29d8350_0 .net *"_s19", 0 0, L_0x2a012f0; 1 drivers +v0x29d83d0_0 .net *"_s190", 0 0, L_0x2a0b470; 1 drivers +v0x29d81d0_0 .net *"_s21", 0 0, L_0x2a01510; 1 drivers +v0x29d8270_0 .net *"_s23", 0 0, L_0x2a015b0; 1 drivers +v0x29d8610_0 .net *"_s25", 0 0, L_0x2a01790; 1 drivers +v0x29d8690_0 .net *"_s27", 0 0, L_0x2a018e0; 1 drivers +v0x29d8450_0 .net *"_s29", 0 0, L_0x2a01cc0; 1 drivers +v0x29d84f0_0 .net *"_s3", 0 0, L_0x2a006d0; 1 drivers +v0x29d8590_0 .net *"_s31", 0 0, L_0x2a01dc0; 1 drivers +v0x29d8910_0 .net *"_s33", 0 0, L_0x2a02040; 1 drivers +v0x29d8730_0 .net *"_s35", 0 0, L_0x2a02140; 1 drivers +v0x29d87d0_0 .net *"_s37", 0 0, L_0x2a01fa0; 1 drivers +v0x29d8870_0 .net *"_s39", 0 0, L_0x2a02490; 1 drivers +v0x29d8bb0_0 .net *"_s41", 0 0, L_0x2a02300; 1 drivers +v0x29d89b0_0 .net *"_s43", 0 0, L_0x2a027d0; 1 drivers +v0x29d8a50_0 .net *"_s45", 0 0, L_0x2a02580; 1 drivers +v0x29d8af0_0 .net *"_s47", 0 0, L_0x29fe990; 1 drivers +v0x29d8e50_0 .net *"_s49", 0 0, L_0x29fec30; 1 drivers +v0x29d8c50_0 .net *"_s5", 0 0, L_0x2a008b0; 1 drivers +v0x29d8cf0_0 .net *"_s51", 0 0, L_0x29fe8c0; 1 drivers +v0x29d8d90_0 .net *"_s53", 0 0, L_0x29feb10; 1 drivers +v0x29d9110_0 .net *"_s55", 0 0, L_0x2a03350; 1 drivers +v0x29d8ed0_0 .net *"_s57", 0 0, L_0x2a031b0; 1 drivers +v0x29d8f70_0 .net *"_s59", 0 0, L_0x2a03690; 1 drivers +v0x29d9010_0 .net *"_s61", 0 0, L_0x2a01bc0; 1 drivers +v0x29d93f0_0 .net *"_s63", 0 0, L_0x2a03590; 1 drivers +v0x29d9190_0 .net *"_s65", 0 0, L_0x2a01ab0; 1 drivers +v0x29d9230_0 .net *"_s67", 0 0, L_0x2a03f20; 1 drivers +v0x29d92d0_0 .net *"_s69", 0 0, L_0x2a03d20; 1 drivers +v0x29d9370_0 .net *"_s7", 0 0, L_0x2a009b0; 1 drivers +v0x29d9700_0 .net *"_s71", 0 0, L_0x2a042f0; 1 drivers +v0x29d9780_0 .net *"_s73", 0 0, L_0x2a041c0; 1 drivers +v0x29d9490_0 .net *"_s75", 0 0, L_0x2a04600; 1 drivers +v0x29d9530_0 .net *"_s77", 0 0, L_0x2a04420; 1 drivers +v0x29d95d0_0 .net *"_s79", 0 0, L_0x2a04a90; 1 drivers +v0x29d9670_0 .net *"_s81", 0 0, L_0x2a046f0; 1 drivers +v0x29d9ae0_0 .net *"_s83", 0 0, L_0x2a049d0; 1 drivers +v0x29d9b80_0 .net *"_s85", 0 0, L_0x2a04b90; 1 drivers +v0x29d9820_0 .net *"_s87", 0 0, L_0x2a04ce0; 1 drivers +v0x29d98c0_0 .net *"_s89", 0 0, L_0x2a04e70; 1 drivers +v0x29d9960_0 .net *"_s9", 0 0, L_0x2a00b00; 1 drivers +v0x29d9a00_0 .net *"_s91", 0 0, L_0x2a04ff0; 1 drivers +v0x29d9ef0_0 .net *"_s93", 0 0, L_0x2a05120; 1 drivers +v0x29d9f70_0 .net *"_s95", 0 0, L_0x2a052a0; 1 drivers +v0x29d9c20_0 .net *"_s97", 0 0, L_0x2a053f0; 1 drivers +v0x29d9cc0_0 .net *"_s99", 0 0, L_0x2a05780; 1 drivers +v0x29d9d60_0 .net "address", 0 0, L_0x2a0b5c0; 1 drivers +v0x29d9e00_0 .alias "in0", 31 0, v0x29e1880_0; +v0x29da310_0 .net "in00addr", 0 0, L_0x29ffd80; 1 drivers +v0x29da390_0 .net "in010addr", 0 0, L_0x2a01440; 1 drivers +v0x29d9ff0_0 .net "in011addr", 0 0, L_0x2a00820; 1 drivers +v0x29da090_0 .net "in012addr", 0 0, L_0x2a013e0; 1 drivers +v0x29da130_0 .net "in013addr", 0 0, L_0x2a01880; 1 drivers +v0x29da1d0_0 .net "in014addr", 0 0, L_0x2a01a50; 1 drivers +v0x29da270_0 .net "in015addr", 0 0, L_0x2a01d60; 1 drivers +v0x29da760_0 .net "in016addr", 0 0, L_0x2a01f40; 1 drivers +v0x29da410_0 .net "in017addr", 0 0, L_0x2a020e0; 1 drivers +v0x29da4b0_0 .net "in018addr", 0 0, L_0x2a01eb0; 1 drivers +v0x29da550_0 .net "in019addr", 0 0, L_0x2a02400; 1 drivers +v0x29da5f0_0 .net "in01addr", 0 0, L_0x2a00670; 1 drivers +v0x29da690_0 .net "in020addr", 0 0, L_0x2a02230; 1 drivers +v0x29dab60_0 .net "in021addr", 0 0, L_0x2a02740; 1 drivers +v0x29da7e0_0 .net "in022addr", 0 0, L_0x2a014a0; 1 drivers +v0x29da880_0 .net "in023addr", 0 0, L_0x2a02620; 1 drivers +v0x29da920_0 .net "in024addr", 0 0, L_0x2a019d0; 1 drivers +v0x29da9c0_0 .net "in025addr", 0 0, L_0x2a016f0; 1 drivers +v0x29daa60_0 .net "in026addr", 0 0, L_0x29fea80; 1 drivers +v0x29daf90_0 .net "in027addr", 0 0, L_0x2a032f0; 1 drivers +v0x29dabe0_0 .net "in028addr", 0 0, L_0x2a03120; 1 drivers +v0x29dac80_0 .net "in029addr", 0 0, L_0x2a03630; 1 drivers +v0x29dad20_0 .net "in02addr", 0 0, L_0x2a007c0; 1 drivers +v0x29dadc0_0 .net "in030addr", 0 0, L_0x2a03440; 1 drivers +v0x29dae60_0 .net "in031addr", 0 0, L_0x2a03500; 1 drivers +v0x29daf00_0 .net "in03addr", 0 0, L_0x2a00950; 1 drivers +v0x29db400_0 .net "in04addr", 0 0, L_0x2a00aa0; 1 drivers +v0x29db480_0 .net "in05addr", 0 0, L_0x2a00bf0; 1 drivers +v0x29db010_0 .net "in06addr", 0 0, L_0x2a00d40; 1 drivers +v0x29db0b0_0 .net "in07addr", 0 0, L_0x2a00fa0; 1 drivers +v0x29db150_0 .net "in08addr", 0 0, L_0x2a01140; 1 drivers +v0x29db1f0_0 .net "in09addr", 0 0, L_0x2a01290; 1 drivers +v0x29db290_0 .alias "in1", 31 0, v0x29e0680_0; +v0x29db330_0 .net "in10addr", 0 0, L_0x2a03730; 1 drivers +v0x29db930_0 .net "in110addr", 0 0, L_0x2a04b30; 1 drivers +v0x29db9b0_0 .net "in111addr", 0 0, L_0x2a04c80; 1 drivers +v0x29db500_0 .net "in112addr", 0 0, L_0x2a04de0; 1 drivers +v0x29db5a0_0 .net "in113addr", 0 0, L_0x2a04f60; 1 drivers +v0x29db640_0 .net "in114addr", 0 0, L_0x2a05090; 1 drivers +v0x29db6e0_0 .net "in115addr", 0 0, L_0x2a05210; 1 drivers +v0x29db780_0 .net "in116addr", 0 0, L_0x2a04830; 1 drivers +v0x29db820_0 .net "in117addr", 0 0, L_0x2a054e0; 1 drivers +v0x29dbea0_0 .net "in118addr", 0 0, L_0x2a05870; 1 drivers +v0x29dbf20_0 .net "in119addr", 0 0, L_0x2a05b70; 1 drivers +v0x29dba30_0 .net "in11addr", 0 0, L_0x2a03ec0; 1 drivers +v0x29dbad0_0 .net "in120addr", 0 0, L_0x2a05c20; 1 drivers +v0x29dbb70_0 .net "in121addr", 0 0, L_0x2a048c0; 1 drivers +v0x29dbc10_0 .net "in122addr", 0 0, L_0x2a059c0; 1 drivers +v0x29dbcb0_0 .net "in123addr", 0 0, L_0x2a05f70; 1 drivers +v0x29dbd50_0 .net "in124addr", 0 0, L_0x2a060f0; 1 drivers +v0x29dbdf0_0 .net "in125addr", 0 0, L_0x2a06450; 1 drivers +v0x29dc450_0 .net "in126addr", 0 0, L_0x2a06550; 1 drivers +v0x29dbfa0_0 .net "in127addr", 0 0, L_0x2a066a0; 1 drivers +v0x29dc040_0 .net "in128addr", 0 0, L_0x2a06220; 1 drivers +v0x29dc0e0_0 .net "in129addr", 0 0, L_0x2a06890; 1 drivers +v0x29dc180_0 .net "in12addr", 0 0, L_0x2a03c90; 1 drivers +v0x29dc220_0 .net "in130addr", 0 0, L_0x2a06a10; 1 drivers +v0x29dc2c0_0 .net "in131addr", 0 0, L_0x2a062e0; 1 drivers +v0x29dc360_0 .net "in13addr", 0 0, L_0x2a03dc0; 1 drivers +v0x29dc9c0_0 .net "in14addr", 0 0, L_0x2a04010; 1 drivers +v0x29dc4d0_0 .net "in15addr", 0 0, L_0x2a040a0; 1 drivers +v0x29dc550_0 .net "in16addr", 0 0, L_0x2a04390; 1 drivers +v0x29dc5f0_0 .net "in17addr", 0 0, L_0x2a04510; 1 drivers +v0x29dc690_0 .net "in18addr", 0 0, L_0x2a04130; 1 drivers +v0x29dc730_0 .net "in19addr", 0 0, L_0x2a04940; 1 drivers +v0x29dc7d0_0 .net "invaddr", 0 0, L_0x29ffd20; 1 drivers +v0x29dc870_0 .alias "out", 31 0, v0x29e00e0_0; +L_0x2a00580 .part v0x29e1590_0, 0, 1; +L_0x2a006d0 .part v0x29e1590_0, 1, 1; +L_0x2a008b0 .part v0x29e1590_0, 2, 1; +L_0x2a009b0 .part v0x29e1590_0, 3, 1; +L_0x2a00b00 .part v0x29e1590_0, 4, 1; +L_0x2a00c50 .part v0x29e1590_0, 5, 1; +L_0x2a00eb0 .part v0x29e1590_0, 6, 1; +L_0x2a01000 .part v0x29e1590_0, 7, 1; +L_0x2a011a0 .part v0x29e1590_0, 8, 1; +L_0x2a012f0 .part v0x29e1590_0, 9, 1; +L_0x2a01510 .part v0x29e1590_0, 10, 1; +L_0x2a015b0 .part v0x29e1590_0, 11, 1; +L_0x2a01790 .part v0x29e1590_0, 12, 1; +L_0x2a018e0 .part v0x29e1590_0, 13, 1; +L_0x2a01cc0 .part v0x29e1590_0, 14, 1; +L_0x2a01dc0 .part v0x29e1590_0, 15, 1; +L_0x2a02040 .part v0x29e1590_0, 16, 1; +L_0x2a02140 .part v0x29e1590_0, 17, 1; +L_0x2a01fa0 .part v0x29e1590_0, 18, 1; +L_0x2a02490 .part v0x29e1590_0, 19, 1; +L_0x2a02300 .part v0x29e1590_0, 20, 1; +L_0x2a027d0 .part v0x29e1590_0, 21, 1; +L_0x2a02580 .part v0x29e1590_0, 22, 1; +L_0x29fe990 .part v0x29e1590_0, 23, 1; +L_0x29fec30 .part v0x29e1590_0, 24, 1; +L_0x29fe8c0 .part v0x29e1590_0, 25, 1; +L_0x29feb10 .part v0x29e1590_0, 26, 1; +L_0x2a03350 .part v0x29e1590_0, 27, 1; +L_0x2a031b0 .part v0x29e1590_0, 28, 1; +L_0x2a03690 .part v0x29e1590_0, 29, 1; +L_0x2a01bc0 .part v0x29e1590_0, 30, 1; +L_0x2a03590 .part v0x29e1590_0, 31, 1; +L_0x2a01ab0 .part RS_0x7ff1473ed478, 0, 1; +L_0x2a03f20 .part RS_0x7ff1473ed478, 1, 1; +L_0x2a03d20 .part RS_0x7ff1473ed478, 2, 1; +L_0x2a042f0 .part RS_0x7ff1473ed478, 3, 1; +L_0x2a041c0 .part RS_0x7ff1473ed478, 4, 1; +L_0x2a04600 .part RS_0x7ff1473ed478, 5, 1; +L_0x2a04420 .part RS_0x7ff1473ed478, 6, 1; +L_0x2a04a90 .part RS_0x7ff1473ed478, 7, 1; +L_0x2a046f0 .part RS_0x7ff1473ed478, 8, 1; +L_0x2a049d0 .part RS_0x7ff1473ed478, 9, 1; +L_0x2a04b90 .part RS_0x7ff1473ed478, 10, 1; +L_0x2a04ce0 .part RS_0x7ff1473ed478, 11, 1; +L_0x2a04e70 .part RS_0x7ff1473ed478, 12, 1; +L_0x2a04ff0 .part RS_0x7ff1473ed478, 13, 1; +L_0x2a05120 .part RS_0x7ff1473ed478, 14, 1; +L_0x2a052a0 .part RS_0x7ff1473ed478, 15, 1; +L_0x2a053f0 .part RS_0x7ff1473ed478, 16, 1; +L_0x2a05780 .part RS_0x7ff1473ed478, 17, 1; +L_0x2a05a80 .part RS_0x7ff1473ed478, 18, 1; +L_0x2a05de0 .part RS_0x7ff1473ed478, 19, 1; +L_0x2a05cb0 .part RS_0x7ff1473ed478, 20, 1; +L_0x2a058d0 .part RS_0x7ff1473ed478, 21, 1; +L_0x2a05e80 .part RS_0x7ff1473ed478, 22, 1; +L_0x2a06000 .part RS_0x7ff1473ed478, 23, 1; +L_0x2a06360 .part RS_0x7ff1473ed478, 24, 1; +L_0x2a064b0 .part RS_0x7ff1473ed478, 25, 1; +L_0x2a065b0 .part RS_0x7ff1473ed478, 26, 1; +L_0x2a06180 .part RS_0x7ff1473ed478, 27, 1; +L_0x2a067a0 .part RS_0x7ff1473ed478, 28, 1; +L_0x2a06920 .part RS_0x7ff1473ed478, 29, 1; +L_0x2a06aa0 .part RS_0x7ff1473ed478, 30, 1; +L_0x2a06b90 .part RS_0x7ff1473ed478, 31, 1; +L_0x2a06e90 .part/pv L_0x2a06f80, 0, 1, 32; +L_0x2a00230 .part/pv L_0x2a070d0, 1, 1, 32; +L_0x2a05570 .part/pv L_0x2a003c0, 2, 1, 32; +L_0x2a06c80 .part/pv L_0x2a06d20, 3, 1, 32; +L_0x2a00010 .part/pv L_0x2a000b0, 4, 1, 32; +L_0x2a07d80 .part/pv L_0x2a08060, 5, 1, 32; +L_0x2a081b0 .part/pv L_0x2a05610, 6, 1, 32; +L_0x2a08400 .part/pv L_0x2a084a0, 7, 1, 32; +L_0x2a07e20 .part/pv L_0x2a07ec0, 8, 1, 32; +L_0x2a07fc0 .part/pv L_0x2a08690, 9, 1, 32; +L_0x2a087e0 .part/pv L_0x2a08880, 10, 1, 32; +L_0x2a089d0 .part/pv L_0x2a08ce0, 11, 1, 32; +L_0x2a08e30 .part/pv L_0x2a08ed0, 12, 1, 32; +L_0x2a08fd0 .part/pv L_0x2a09070, 13, 1, 32; +L_0x2a091c0 .part/pv L_0x2a08c80, 14, 1, 32; +L_0x2a092b0 .part/pv L_0x2a09350, 15, 1, 32; +L_0x2a094a0 .part/pv L_0x2a09540, 16, 1, 32; +L_0x2a09690 .part/pv L_0x2a099d0, 17, 1, 32; +L_0x2a09b20 .part/pv L_0x2a09bc0, 18, 1, 32; +L_0x2a09cd0 .part/pv L_0x2a09d70, 19, 1, 32; +L_0x2a09ec0 .part/pv L_0x2a09730, 20, 1, 32; +L_0x2a09880 .part/pv L_0x2a09920, 21, 1, 32; +L_0x2a0a060 .part/pv L_0x2a0a100, 22, 1, 32; +L_0x2a0a520 .part/pv L_0x2a0a5c0, 23, 1, 32; +L_0x2a0a710 .part/pv L_0x2a0aab0, 24, 1, 32; +L_0x2a0a250 .part/pv L_0x2a0a2f0, 25, 1, 32; +L_0x2a0a440 .part/pv L_0x2a0a7b0, 26, 1, 32; +L_0x2a0a900 .part/pv L_0x2a0a9a0, 27, 1, 32; +L_0x2a0ac50 .part/pv L_0x2a0acf0, 28, 1, 32; +L_0x2a0b140 .part/pv L_0x2a0b1e0, 29, 1, 32; +L_0x2a0b330 .part/pv L_0x2a06280, 30, 1, 32; +L_0x2a0b3d0 .part/pv L_0x2a0b470, 31, 1, 32; +S_0x29d25b0 .scope module, "adder0" "FullAdder4bit" 19 237, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a0e8f0 .functor AND 1, L_0x2a0ef30, L_0x2a0efd0, C4<1>, C4<1>; +L_0x2a0f0f0 .functor NOR 1, L_0x2a0f150, L_0x2a0f1f0, C4<0>, C4<0>; +L_0x2a0f370 .functor AND 1, L_0x2a0f3d0, L_0x2a0f4c0, C4<1>, C4<1>; +L_0x2a0f2e0 .functor NOR 1, L_0x2a0f650, L_0x2a0f850, C4<0>, C4<0>; +L_0x2a0f5b0 .functor OR 1, L_0x2a0e8f0, L_0x2a0f0f0, C4<0>, C4<0>; +L_0x2a0fa40 .functor NOR 1, L_0x2a0f370, L_0x2a0f2e0, C4<0>, C4<0>; +L_0x2a0fb40 .functor AND 1, L_0x2a0f5b0, L_0x2a0fa40, C4<1>, C4<1>; +v0x29d51a0_0 .net *"_s25", 0 0, L_0x2a0ef30; 1 drivers +v0x29d5260_0 .net *"_s27", 0 0, L_0x2a0efd0; 1 drivers +v0x29d5300_0 .net *"_s29", 0 0, L_0x2a0f150; 1 drivers +v0x29d53a0_0 .net *"_s31", 0 0, L_0x2a0f1f0; 1 drivers +v0x29d5420_0 .net *"_s33", 0 0, L_0x2a0f3d0; 1 drivers +v0x29d54c0_0 .net *"_s35", 0 0, L_0x2a0f4c0; 1 drivers +v0x29d5560_0 .net *"_s37", 0 0, L_0x2a0f650; 1 drivers +v0x29d5600_0 .net *"_s39", 0 0, L_0x2a0f850; 1 drivers +v0x29d56a0_0 .net "a", 3 0, L_0x29fd520; 1 drivers +v0x29d5740_0 .net "aandb", 0 0, L_0x2a0e8f0; 1 drivers +v0x29d57e0_0 .net "abandnoror", 0 0, L_0x2a0f5b0; 1 drivers +v0x29d5880_0 .net "anorb", 0 0, L_0x2a0f0f0; 1 drivers +v0x29d5920_0 .net "b", 3 0, L_0x29fd5c0; 1 drivers +v0x29d59c0_0 .net "bandsum", 0 0, L_0x2a0f370; 1 drivers +v0x29d5ae0_0 .net "bnorsum", 0 0, L_0x2a0f2e0; 1 drivers +v0x29d5b80_0 .net "bsumandnornor", 0 0, L_0x2a0fa40; 1 drivers +v0x29d5a40_0 .net "carryin", 0 0, L_0x29fd660; 1 drivers +v0x29d5cb0_0 .alias "carryout", 0 0, v0x29dfac0_0; +v0x29d5c00_0 .net "carryout1", 0 0, L_0x2a08b70; 1 drivers +v0x29d5dd0_0 .net "carryout2", 0 0, L_0x2a0c9d0; 1 drivers +v0x29d5f00_0 .net "carryout3", 0 0, L_0x2a0d710; 1 drivers +v0x29d5f80_0 .alias "overflow", 0 0, v0x29dc910_0; +v0x29d5e50_0 .net8 "sum", 3 0, RS_0x7ff1473ebc18; 4 drivers +L_0x2a0c540 .part/pv L_0x2a0c470, 0, 1, 4; +L_0x2a0c630 .part L_0x29fd520, 0, 1; +L_0x2a0c6d0 .part L_0x29fd5c0, 0, 1; +L_0x2a0d190 .part/pv L_0x2a0b040, 1, 1, 4; +L_0x2a0d2d0 .part L_0x29fd520, 1, 1; +L_0x2a0d3c0 .part L_0x29fd5c0, 1, 1; +L_0x2a0ded0 .part/pv L_0x2a0cc40, 2, 1, 4; +L_0x2a0dfc0 .part L_0x29fd520, 2, 1; +L_0x2a0e0b0 .part L_0x29fd5c0, 2, 1; +L_0x2a0eb30 .part/pv L_0x2a0d980, 3, 1, 4; +L_0x2a0ec60 .part L_0x29fd520, 3, 1; +L_0x2a0ed90 .part L_0x29fd5c0, 3, 1; +L_0x2a0ef30 .part L_0x29fd520, 3, 1; +L_0x2a0efd0 .part L_0x29fd5c0, 3, 1; +L_0x2a0f150 .part L_0x29fd520, 3, 1; +L_0x2a0f1f0 .part L_0x29fd5c0, 3, 1; +L_0x2a0f3d0 .part L_0x29fd5c0, 3, 1; +L_0x2a0f4c0 .part RS_0x7ff1473ebc18, 3, 1; +L_0x2a0f650 .part L_0x29fd5c0, 3, 1; +L_0x2a0f850 .part RS_0x7ff1473ebc18, 3, 1; +S_0x29d4710 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29d25b0; + .timescale 0 0; +L_0x2a0b660 .functor AND 1, L_0x2a0c630, L_0x2a0c6d0, C4<1>, C4<1>; +L_0x2a0b6c0 .functor AND 1, L_0x2a0c630, L_0x29fd660, C4<1>, C4<1>; +L_0x2a02680 .functor AND 1, L_0x2a0c6d0, L_0x29fd660, C4<1>, C4<1>; +L_0x2a08a70 .functor OR 1, L_0x2a0b660, L_0x2a0b6c0, C4<0>, C4<0>; +L_0x2a08b70 .functor OR 1, L_0x2a08a70, L_0x2a02680, C4<0>, C4<0>; +L_0x2a0ae40 .functor OR 1, L_0x2a0c630, L_0x2a0c6d0, C4<0>, C4<0>; +L_0x2a0aea0 .functor OR 1, L_0x2a0ae40, L_0x29fd660, C4<0>, C4<0>; +L_0x2a0afe0 .functor NOT 1, L_0x2a08b70, C4<0>, C4<0>, C4<0>; +L_0x2a0b0d0 .functor AND 1, L_0x2a0afe0, L_0x2a0aea0, C4<1>, C4<1>; +L_0x2a0c230 .functor AND 1, L_0x2a0c630, L_0x2a0c6d0, C4<1>, C4<1>; +L_0x2a0c410 .functor AND 1, L_0x2a0c230, L_0x29fd660, C4<1>, C4<1>; +L_0x2a0c470 .functor OR 1, L_0x2a0b0d0, L_0x2a0c410, C4<0>, C4<0>; +v0x29d4800_0 .net "a", 0 0, L_0x2a0c630; 1 drivers +v0x29d48c0_0 .net "ab", 0 0, L_0x2a0b660; 1 drivers +v0x29d4960_0 .net "acarryin", 0 0, L_0x2a0b6c0; 1 drivers +v0x29d4a00_0 .net "andall", 0 0, L_0x2a0c410; 1 drivers +v0x29d4a80_0 .net "andsingleintermediate", 0 0, L_0x2a0c230; 1 drivers +v0x29d4b20_0 .net "andsumintermediate", 0 0, L_0x2a0b0d0; 1 drivers +v0x29d4bc0_0 .net "b", 0 0, L_0x2a0c6d0; 1 drivers +v0x29d4c60_0 .net "bcarryin", 0 0, L_0x2a02680; 1 drivers +v0x29d4d00_0 .alias "carryin", 0 0, v0x29d5a40_0; +v0x29d4da0_0 .alias "carryout", 0 0, v0x29d5c00_0; +v0x29d4e20_0 .net "invcarryout", 0 0, L_0x2a0afe0; 1 drivers +v0x29d4ea0_0 .net "orall", 0 0, L_0x2a0aea0; 1 drivers +v0x29d4f40_0 .net "orpairintermediate", 0 0, L_0x2a08a70; 1 drivers +v0x29d4fe0_0 .net "orsingleintermediate", 0 0, L_0x2a0ae40; 1 drivers +v0x29d5100_0 .net "sum", 0 0, L_0x2a0c470; 1 drivers +S_0x29d3c80 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29d25b0; + .timescale 0 0; +L_0x2a0c3b0 .functor AND 1, L_0x2a0d2d0, L_0x2a0d3c0, C4<1>, C4<1>; +L_0x2a0c770 .functor AND 1, L_0x2a0d2d0, L_0x2a08b70, C4<1>, C4<1>; +L_0x2a0c820 .functor AND 1, L_0x2a0d3c0, L_0x2a08b70, C4<1>, C4<1>; +L_0x2a0c8d0 .functor OR 1, L_0x2a0c3b0, L_0x2a0c770, C4<0>, C4<0>; +L_0x2a0c9d0 .functor OR 1, L_0x2a0c8d0, L_0x2a0c820, C4<0>, C4<0>; +L_0x2a0cad0 .functor OR 1, L_0x2a0d2d0, L_0x2a0d3c0, C4<0>, C4<0>; +L_0x2a0cb30 .functor OR 1, L_0x2a0cad0, L_0x2a08b70, C4<0>, C4<0>; +L_0x2a0cbe0 .functor NOT 1, L_0x2a0c9d0, C4<0>, C4<0>, C4<0>; +L_0x2a0ccd0 .functor AND 1, L_0x2a0cbe0, L_0x2a0cb30, C4<1>, C4<1>; +L_0x2a0cdd0 .functor AND 1, L_0x2a0d2d0, L_0x2a0d3c0, C4<1>, C4<1>; +L_0x2a0cfb0 .functor AND 1, L_0x2a0cdd0, L_0x2a08b70, C4<1>, C4<1>; +L_0x2a0b040 .functor OR 1, L_0x2a0ccd0, L_0x2a0cfb0, C4<0>, C4<0>; +v0x29d3d70_0 .net "a", 0 0, L_0x2a0d2d0; 1 drivers +v0x29d3e30_0 .net "ab", 0 0, L_0x2a0c3b0; 1 drivers +v0x29d3ed0_0 .net "acarryin", 0 0, L_0x2a0c770; 1 drivers +v0x29d3f70_0 .net "andall", 0 0, L_0x2a0cfb0; 1 drivers +v0x29d3ff0_0 .net "andsingleintermediate", 0 0, L_0x2a0cdd0; 1 drivers +v0x29d4090_0 .net "andsumintermediate", 0 0, L_0x2a0ccd0; 1 drivers +v0x29d4130_0 .net "b", 0 0, L_0x2a0d3c0; 1 drivers +v0x29d41d0_0 .net "bcarryin", 0 0, L_0x2a0c820; 1 drivers +v0x29d4270_0 .alias "carryin", 0 0, v0x29d5c00_0; +v0x29d4310_0 .alias "carryout", 0 0, v0x29d5dd0_0; +v0x29d4390_0 .net "invcarryout", 0 0, L_0x2a0cbe0; 1 drivers +v0x29d4410_0 .net "orall", 0 0, L_0x2a0cb30; 1 drivers +v0x29d44b0_0 .net "orpairintermediate", 0 0, L_0x2a0c8d0; 1 drivers +v0x29d4550_0 .net "orsingleintermediate", 0 0, L_0x2a0cad0; 1 drivers +v0x29d4670_0 .net "sum", 0 0, L_0x2a0b040; 1 drivers +S_0x29d31a0 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29d25b0; + .timescale 0 0; +L_0x2a0cf50 .functor AND 1, L_0x2a0dfc0, L_0x2a0e0b0, C4<1>, C4<1>; +L_0x2a0d4b0 .functor AND 1, L_0x2a0dfc0, L_0x2a0c9d0, C4<1>, C4<1>; +L_0x2a0d560 .functor AND 1, L_0x2a0e0b0, L_0x2a0c9d0, C4<1>, C4<1>; +L_0x2a0d610 .functor OR 1, L_0x2a0cf50, L_0x2a0d4b0, C4<0>, C4<0>; +L_0x2a0d710 .functor OR 1, L_0x2a0d610, L_0x2a0d560, C4<0>, C4<0>; +L_0x2a0d810 .functor OR 1, L_0x2a0dfc0, L_0x2a0e0b0, C4<0>, C4<0>; +L_0x2a0d870 .functor OR 1, L_0x2a0d810, L_0x2a0c9d0, C4<0>, C4<0>; +L_0x2a0d920 .functor NOT 1, L_0x2a0d710, C4<0>, C4<0>, C4<0>; +L_0x2a0da10 .functor AND 1, L_0x2a0d920, L_0x2a0d870, C4<1>, C4<1>; +L_0x2a0db10 .functor AND 1, L_0x2a0dfc0, L_0x2a0e0b0, C4<1>, C4<1>; +L_0x2a0dcf0 .functor AND 1, L_0x2a0db10, L_0x2a0c9d0, C4<1>, C4<1>; +L_0x2a0cc40 .functor OR 1, L_0x2a0da10, L_0x2a0dcf0, C4<0>, C4<0>; +v0x29d3290_0 .net "a", 0 0, L_0x2a0dfc0; 1 drivers +v0x29d3350_0 .net "ab", 0 0, L_0x2a0cf50; 1 drivers +v0x29d33f0_0 .net "acarryin", 0 0, L_0x2a0d4b0; 1 drivers +v0x29d3490_0 .net "andall", 0 0, L_0x2a0dcf0; 1 drivers +v0x29d3510_0 .net "andsingleintermediate", 0 0, L_0x2a0db10; 1 drivers +v0x29d35b0_0 .net "andsumintermediate", 0 0, L_0x2a0da10; 1 drivers +v0x29d3650_0 .net "b", 0 0, L_0x2a0e0b0; 1 drivers +v0x29d36f0_0 .net "bcarryin", 0 0, L_0x2a0d560; 1 drivers +v0x29d37e0_0 .alias "carryin", 0 0, v0x29d5dd0_0; +v0x29d3880_0 .alias "carryout", 0 0, v0x29d5f00_0; +v0x29d3900_0 .net "invcarryout", 0 0, L_0x2a0d920; 1 drivers +v0x29d3980_0 .net "orall", 0 0, L_0x2a0d870; 1 drivers +v0x29d3a20_0 .net "orpairintermediate", 0 0, L_0x2a0d610; 1 drivers +v0x29d3ac0_0 .net "orsingleintermediate", 0 0, L_0x2a0d810; 1 drivers +v0x29d3be0_0 .net "sum", 0 0, L_0x2a0cc40; 1 drivers +S_0x29d26a0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29d25b0; + .timescale 0 0; +L_0x2a0dc90 .functor AND 1, L_0x2a0ec60, L_0x2a0ed90, C4<1>, C4<1>; +L_0x2a0e150 .functor AND 1, L_0x2a0ec60, L_0x2a0d710, C4<1>, C4<1>; +L_0x2a0e200 .functor AND 1, L_0x2a0ed90, L_0x2a0d710, C4<1>, C4<1>; +L_0x2a0e2b0 .functor OR 1, L_0x2a0dc90, L_0x2a0e150, C4<0>, C4<0>; +L_0x2a0e3b0 .functor OR 1, L_0x2a0e2b0, L_0x2a0e200, C4<0>, C4<0>; +L_0x2a0e4b0 .functor OR 1, L_0x2a0ec60, L_0x2a0ed90, C4<0>, C4<0>; +L_0x2a0e510 .functor OR 1, L_0x2a0e4b0, L_0x2a0d710, C4<0>, C4<0>; +L_0x2a0e5c0 .functor NOT 1, L_0x2a0e3b0, C4<0>, C4<0>, C4<0>; +L_0x2a0e670 .functor AND 1, L_0x2a0e5c0, L_0x2a0e510, C4<1>, C4<1>; +L_0x2a0e770 .functor AND 1, L_0x2a0ec60, L_0x2a0ed90, C4<1>, C4<1>; +L_0x2a0e950 .functor AND 1, L_0x2a0e770, L_0x2a0d710, C4<1>, C4<1>; +L_0x2a0d980 .functor OR 1, L_0x2a0e670, L_0x2a0e950, C4<0>, C4<0>; +v0x29d2790_0 .net "a", 0 0, L_0x2a0ec60; 1 drivers +v0x29d2850_0 .net "ab", 0 0, L_0x2a0dc90; 1 drivers +v0x29d28f0_0 .net "acarryin", 0 0, L_0x2a0e150; 1 drivers +v0x29d2990_0 .net "andall", 0 0, L_0x2a0e950; 1 drivers +v0x29d2a10_0 .net "andsingleintermediate", 0 0, L_0x2a0e770; 1 drivers +v0x29d2ab0_0 .net "andsumintermediate", 0 0, L_0x2a0e670; 1 drivers +v0x29d2b50_0 .net "b", 0 0, L_0x2a0ed90; 1 drivers +v0x29d2bf0_0 .net "bcarryin", 0 0, L_0x2a0e200; 1 drivers +v0x29d2ce0_0 .alias "carryin", 0 0, v0x29d5f00_0; +v0x29d2d80_0 .alias "carryout", 0 0, v0x29dfac0_0; +v0x29d2e00_0 .net "invcarryout", 0 0, L_0x2a0e5c0; 1 drivers +v0x29d2ea0_0 .net "orall", 0 0, L_0x2a0e510; 1 drivers +v0x29d2f40_0 .net "orpairintermediate", 0 0, L_0x2a0e2b0; 1 drivers +v0x29d2fe0_0 .net "orsingleintermediate", 0 0, L_0x2a0e4b0; 1 drivers +v0x29d3100_0 .net "sum", 0 0, L_0x2a0d980; 1 drivers +S_0x29ceaa0 .scope module, "adder1" "FullAdder4bit" 19 238, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a12d70 .functor AND 1, L_0x2a133b0, L_0x2a13450, C4<1>, C4<1>; +L_0x2a134f0 .functor NOR 1, L_0x2a13550, L_0x2a135f0, C4<0>, C4<0>; +L_0x2a13770 .functor AND 1, L_0x2a137d0, L_0x2a138c0, C4<1>, C4<1>; +L_0x2a136e0 .functor NOR 1, L_0x2a13a50, L_0x2a13c50, C4<0>, C4<0>; +L_0x2a139b0 .functor OR 1, L_0x2a12d70, L_0x2a134f0, C4<0>, C4<0>; +L_0x2a13e40 .functor NOR 1, L_0x2a13770, L_0x2a136e0, C4<0>, C4<0>; +L_0x2a13f40 .functor AND 1, L_0x2a139b0, L_0x2a13e40, C4<1>, C4<1>; +v0x29d1690_0 .net *"_s25", 0 0, L_0x2a133b0; 1 drivers +v0x29d1750_0 .net *"_s27", 0 0, L_0x2a13450; 1 drivers +v0x29d17f0_0 .net *"_s29", 0 0, L_0x2a13550; 1 drivers +v0x29d1890_0 .net *"_s31", 0 0, L_0x2a135f0; 1 drivers +v0x29d1910_0 .net *"_s33", 0 0, L_0x2a137d0; 1 drivers +v0x29d19b0_0 .net *"_s35", 0 0, L_0x2a138c0; 1 drivers +v0x29d1a50_0 .net *"_s37", 0 0, L_0x2a13a50; 1 drivers +v0x29d1af0_0 .net *"_s39", 0 0, L_0x2a13c50; 1 drivers +v0x29d1b90_0 .net "a", 3 0, L_0x2a0fd80; 1 drivers +v0x29d1c30_0 .net "aandb", 0 0, L_0x2a12d70; 1 drivers +v0x29d1cd0_0 .net "abandnoror", 0 0, L_0x2a139b0; 1 drivers +v0x29d1d70_0 .net "anorb", 0 0, L_0x2a134f0; 1 drivers +v0x29d1e10_0 .net "b", 3 0, L_0x2a0fe20; 1 drivers +v0x29d1eb0_0 .net "bandsum", 0 0, L_0x2a13770; 1 drivers +v0x29d1fd0_0 .net "bnorsum", 0 0, L_0x2a136e0; 1 drivers +v0x29d2070_0 .net "bsumandnornor", 0 0, L_0x2a13e40; 1 drivers +v0x29d1f30_0 .alias "carryin", 0 0, v0x29dfac0_0; +v0x29d21a0_0 .alias "carryout", 0 0, v0x29dfec0_0; +v0x29d20f0_0 .net "carryout1", 0 0, L_0x2a10320; 1 drivers +v0x29d22c0_0 .net "carryout2", 0 0, L_0x2a10e50; 1 drivers +v0x29d23f0_0 .net "carryout3", 0 0, L_0x2a11b90; 1 drivers +v0x29d2470_0 .alias "overflow", 0 0, v0x29dcf70_0; +v0x29d2340_0 .net8 "sum", 3 0, RS_0x7ff1473eae38; 4 drivers +L_0x2a109c0 .part/pv L_0x2a10960, 0, 1, 4; +L_0x2a10ab0 .part L_0x2a0fd80, 0, 1; +L_0x2a10b50 .part L_0x2a0fe20, 0, 1; +L_0x2a11610 .part/pv L_0x2a10590, 1, 1, 4; +L_0x2a11750 .part L_0x2a0fd80, 1, 1; +L_0x2a11840 .part L_0x2a0fe20, 1, 1; +L_0x2a12350 .part/pv L_0x2a110c0, 2, 1, 4; +L_0x2a12440 .part L_0x2a0fd80, 2, 1; +L_0x2a12530 .part L_0x2a0fe20, 2, 1; +L_0x2a12fb0 .part/pv L_0x2a11e00, 3, 1, 4; +L_0x2a130e0 .part L_0x2a0fd80, 3, 1; +L_0x2a13210 .part L_0x2a0fe20, 3, 1; +L_0x2a133b0 .part L_0x2a0fd80, 3, 1; +L_0x2a13450 .part L_0x2a0fe20, 3, 1; +L_0x2a13550 .part L_0x2a0fd80, 3, 1; +L_0x2a135f0 .part L_0x2a0fe20, 3, 1; +L_0x2a137d0 .part L_0x2a0fe20, 3, 1; +L_0x2a138c0 .part RS_0x7ff1473eae38, 3, 1; +L_0x2a13a50 .part L_0x2a0fe20, 3, 1; +L_0x2a13c50 .part RS_0x7ff1473eae38, 3, 1; +S_0x29d0c00 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29ceaa0; + .timescale 0 0; +L_0x2a0ffb0 .functor AND 1, L_0x2a10ab0, L_0x2a10b50, C4<1>, C4<1>; +L_0x2a10010 .functor AND 1, L_0x2a10ab0, L_0x2a0e3b0, C4<1>, C4<1>; +L_0x2a100c0 .functor AND 1, L_0x2a10b50, L_0x2a0e3b0, C4<1>, C4<1>; +L_0x29dfb40 .functor OR 1, L_0x2a0ffb0, L_0x2a10010, C4<0>, C4<0>; +L_0x2a10320 .functor OR 1, L_0x29dfb40, L_0x2a100c0, C4<0>, C4<0>; +L_0x2a10420 .functor OR 1, L_0x2a10ab0, L_0x2a10b50, C4<0>, C4<0>; +L_0x2a10480 .functor OR 1, L_0x2a10420, L_0x2a0e3b0, C4<0>, C4<0>; +L_0x2a10530 .functor NOT 1, L_0x2a10320, C4<0>, C4<0>, C4<0>; +L_0x2a10620 .functor AND 1, L_0x2a10530, L_0x2a10480, C4<1>, C4<1>; +L_0x2a10720 .functor AND 1, L_0x2a10ab0, L_0x2a10b50, C4<1>, C4<1>; +L_0x2a10900 .functor AND 1, L_0x2a10720, L_0x2a0e3b0, C4<1>, C4<1>; +L_0x2a10960 .functor OR 1, L_0x2a10620, L_0x2a10900, C4<0>, C4<0>; +v0x29d0cf0_0 .net "a", 0 0, L_0x2a10ab0; 1 drivers +v0x29d0db0_0 .net "ab", 0 0, L_0x2a0ffb0; 1 drivers +v0x29d0e50_0 .net "acarryin", 0 0, L_0x2a10010; 1 drivers +v0x29d0ef0_0 .net "andall", 0 0, L_0x2a10900; 1 drivers +v0x29d0f70_0 .net "andsingleintermediate", 0 0, L_0x2a10720; 1 drivers +v0x29d1010_0 .net "andsumintermediate", 0 0, L_0x2a10620; 1 drivers +v0x29d10b0_0 .net "b", 0 0, L_0x2a10b50; 1 drivers +v0x29d1150_0 .net "bcarryin", 0 0, L_0x2a100c0; 1 drivers +v0x29d11f0_0 .alias "carryin", 0 0, v0x29dfac0_0; +v0x29d1290_0 .alias "carryout", 0 0, v0x29d20f0_0; +v0x29d1310_0 .net "invcarryout", 0 0, L_0x2a10530; 1 drivers +v0x29d1390_0 .net "orall", 0 0, L_0x2a10480; 1 drivers +v0x29d1430_0 .net "orpairintermediate", 0 0, L_0x29dfb40; 1 drivers +v0x29d14d0_0 .net "orsingleintermediate", 0 0, L_0x2a10420; 1 drivers +v0x29d15f0_0 .net "sum", 0 0, L_0x2a10960; 1 drivers +S_0x29d0170 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29ceaa0; + .timescale 0 0; +L_0x2a108a0 .functor AND 1, L_0x2a11750, L_0x2a11840, C4<1>, C4<1>; +L_0x2a10bf0 .functor AND 1, L_0x2a11750, L_0x2a10320, C4<1>, C4<1>; +L_0x2a10ca0 .functor AND 1, L_0x2a11840, L_0x2a10320, C4<1>, C4<1>; +L_0x2a10d50 .functor OR 1, L_0x2a108a0, L_0x2a10bf0, C4<0>, C4<0>; +L_0x2a10e50 .functor OR 1, L_0x2a10d50, L_0x2a10ca0, C4<0>, C4<0>; +L_0x2a10f50 .functor OR 1, L_0x2a11750, L_0x2a11840, C4<0>, C4<0>; +L_0x2a10fb0 .functor OR 1, L_0x2a10f50, L_0x2a10320, C4<0>, C4<0>; +L_0x2a11060 .functor NOT 1, L_0x2a10e50, C4<0>, C4<0>, C4<0>; +L_0x2a11150 .functor AND 1, L_0x2a11060, L_0x2a10fb0, C4<1>, C4<1>; +L_0x2a11250 .functor AND 1, L_0x2a11750, L_0x2a11840, C4<1>, C4<1>; +L_0x2a11430 .functor AND 1, L_0x2a11250, L_0x2a10320, C4<1>, C4<1>; +L_0x2a10590 .functor OR 1, L_0x2a11150, L_0x2a11430, C4<0>, C4<0>; +v0x29d0260_0 .net "a", 0 0, L_0x2a11750; 1 drivers +v0x29d0320_0 .net "ab", 0 0, L_0x2a108a0; 1 drivers +v0x29d03c0_0 .net "acarryin", 0 0, L_0x2a10bf0; 1 drivers +v0x29d0460_0 .net "andall", 0 0, L_0x2a11430; 1 drivers +v0x29d04e0_0 .net "andsingleintermediate", 0 0, L_0x2a11250; 1 drivers +v0x29d0580_0 .net "andsumintermediate", 0 0, L_0x2a11150; 1 drivers +v0x29d0620_0 .net "b", 0 0, L_0x2a11840; 1 drivers +v0x29d06c0_0 .net "bcarryin", 0 0, L_0x2a10ca0; 1 drivers +v0x29d0760_0 .alias "carryin", 0 0, v0x29d20f0_0; +v0x29d0800_0 .alias "carryout", 0 0, v0x29d22c0_0; +v0x29d0880_0 .net "invcarryout", 0 0, L_0x2a11060; 1 drivers +v0x29d0900_0 .net "orall", 0 0, L_0x2a10fb0; 1 drivers +v0x29d09a0_0 .net "orpairintermediate", 0 0, L_0x2a10d50; 1 drivers +v0x29d0a40_0 .net "orsingleintermediate", 0 0, L_0x2a10f50; 1 drivers +v0x29d0b60_0 .net "sum", 0 0, L_0x2a10590; 1 drivers +S_0x29cf690 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29ceaa0; + .timescale 0 0; +L_0x2a113d0 .functor AND 1, L_0x2a12440, L_0x2a12530, C4<1>, C4<1>; +L_0x2a11930 .functor AND 1, L_0x2a12440, L_0x2a10e50, C4<1>, C4<1>; +L_0x2a119e0 .functor AND 1, L_0x2a12530, L_0x2a10e50, C4<1>, C4<1>; +L_0x2a11a90 .functor OR 1, L_0x2a113d0, L_0x2a11930, C4<0>, C4<0>; +L_0x2a11b90 .functor OR 1, L_0x2a11a90, L_0x2a119e0, C4<0>, C4<0>; +L_0x2a11c90 .functor OR 1, L_0x2a12440, L_0x2a12530, C4<0>, C4<0>; +L_0x2a11cf0 .functor OR 1, L_0x2a11c90, L_0x2a10e50, C4<0>, C4<0>; +L_0x2a11da0 .functor NOT 1, L_0x2a11b90, C4<0>, C4<0>, C4<0>; +L_0x2a11e90 .functor AND 1, L_0x2a11da0, L_0x2a11cf0, C4<1>, C4<1>; +L_0x2a11f90 .functor AND 1, L_0x2a12440, L_0x2a12530, C4<1>, C4<1>; +L_0x2a12170 .functor AND 1, L_0x2a11f90, L_0x2a10e50, C4<1>, C4<1>; +L_0x2a110c0 .functor OR 1, L_0x2a11e90, L_0x2a12170, C4<0>, C4<0>; +v0x29cf780_0 .net "a", 0 0, L_0x2a12440; 1 drivers +v0x29cf840_0 .net "ab", 0 0, L_0x2a113d0; 1 drivers +v0x29cf8e0_0 .net "acarryin", 0 0, L_0x2a11930; 1 drivers +v0x29cf980_0 .net "andall", 0 0, L_0x2a12170; 1 drivers +v0x29cfa00_0 .net "andsingleintermediate", 0 0, L_0x2a11f90; 1 drivers +v0x29cfaa0_0 .net "andsumintermediate", 0 0, L_0x2a11e90; 1 drivers +v0x29cfb40_0 .net "b", 0 0, L_0x2a12530; 1 drivers +v0x29cfbe0_0 .net "bcarryin", 0 0, L_0x2a119e0; 1 drivers +v0x29cfcd0_0 .alias "carryin", 0 0, v0x29d22c0_0; +v0x29cfd70_0 .alias "carryout", 0 0, v0x29d23f0_0; +v0x29cfdf0_0 .net "invcarryout", 0 0, L_0x2a11da0; 1 drivers +v0x29cfe70_0 .net "orall", 0 0, L_0x2a11cf0; 1 drivers +v0x29cff10_0 .net "orpairintermediate", 0 0, L_0x2a11a90; 1 drivers +v0x29cffb0_0 .net "orsingleintermediate", 0 0, L_0x2a11c90; 1 drivers +v0x29d00d0_0 .net "sum", 0 0, L_0x2a110c0; 1 drivers +S_0x29ceb90 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29ceaa0; + .timescale 0 0; +L_0x2a12110 .functor AND 1, L_0x2a130e0, L_0x2a13210, C4<1>, C4<1>; +L_0x2a125d0 .functor AND 1, L_0x2a130e0, L_0x2a11b90, C4<1>, C4<1>; +L_0x2a12680 .functor AND 1, L_0x2a13210, L_0x2a11b90, C4<1>, C4<1>; +L_0x2a12730 .functor OR 1, L_0x2a12110, L_0x2a125d0, C4<0>, C4<0>; +L_0x2a12830 .functor OR 1, L_0x2a12730, L_0x2a12680, C4<0>, C4<0>; +L_0x2a12930 .functor OR 1, L_0x2a130e0, L_0x2a13210, C4<0>, C4<0>; +L_0x2a12990 .functor OR 1, L_0x2a12930, L_0x2a11b90, C4<0>, C4<0>; +L_0x2a12a40 .functor NOT 1, L_0x2a12830, C4<0>, C4<0>, C4<0>; +L_0x2a12af0 .functor AND 1, L_0x2a12a40, L_0x2a12990, C4<1>, C4<1>; +L_0x2a12bf0 .functor AND 1, L_0x2a130e0, L_0x2a13210, C4<1>, C4<1>; +L_0x2a12dd0 .functor AND 1, L_0x2a12bf0, L_0x2a11b90, C4<1>, C4<1>; +L_0x2a11e00 .functor OR 1, L_0x2a12af0, L_0x2a12dd0, C4<0>, C4<0>; +v0x29cec80_0 .net "a", 0 0, L_0x2a130e0; 1 drivers +v0x29ced40_0 .net "ab", 0 0, L_0x2a12110; 1 drivers +v0x29cede0_0 .net "acarryin", 0 0, L_0x2a125d0; 1 drivers +v0x29cee80_0 .net "andall", 0 0, L_0x2a12dd0; 1 drivers +v0x29cef00_0 .net "andsingleintermediate", 0 0, L_0x2a12bf0; 1 drivers +v0x29cefa0_0 .net "andsumintermediate", 0 0, L_0x2a12af0; 1 drivers +v0x29cf040_0 .net "b", 0 0, L_0x2a13210; 1 drivers +v0x29cf0e0_0 .net "bcarryin", 0 0, L_0x2a12680; 1 drivers +v0x29cf1d0_0 .alias "carryin", 0 0, v0x29d23f0_0; +v0x29cf270_0 .alias "carryout", 0 0, v0x29dfec0_0; +v0x29cf2f0_0 .net "invcarryout", 0 0, L_0x2a12a40; 1 drivers +v0x29cf390_0 .net "orall", 0 0, L_0x2a12990; 1 drivers +v0x29cf430_0 .net "orpairintermediate", 0 0, L_0x2a12730; 1 drivers +v0x29cf4d0_0 .net "orsingleintermediate", 0 0, L_0x2a12930; 1 drivers +v0x29cf5f0_0 .net "sum", 0 0, L_0x2a11e00; 1 drivers +S_0x29caf90 .scope module, "adder2" "FullAdder4bit" 19 239, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a17080 .functor AND 1, L_0x2a176c0, L_0x2a17760, C4<1>, C4<1>; +L_0x2a17800 .functor NOR 1, L_0x2a17860, L_0x2a17900, C4<0>, C4<0>; +L_0x2a17a80 .functor AND 1, L_0x2a17ae0, L_0x2a17bd0, C4<1>, C4<1>; +L_0x2a179f0 .functor NOR 1, L_0x2a17d60, L_0x2a17f60, C4<0>, C4<0>; +L_0x2a17cc0 .functor OR 1, L_0x2a17080, L_0x2a17800, C4<0>, C4<0>; +L_0x2a18150 .functor NOR 1, L_0x2a17a80, L_0x2a179f0, C4<0>, C4<0>; +L_0x2a18250 .functor AND 1, L_0x2a17cc0, L_0x2a18150, C4<1>, C4<1>; +v0x29cdb80_0 .net *"_s25", 0 0, L_0x2a176c0; 1 drivers +v0x29cdc40_0 .net *"_s27", 0 0, L_0x2a17760; 1 drivers +v0x29cdce0_0 .net *"_s29", 0 0, L_0x2a17860; 1 drivers +v0x29cdd80_0 .net *"_s31", 0 0, L_0x2a17900; 1 drivers +v0x29cde00_0 .net *"_s33", 0 0, L_0x2a17ae0; 1 drivers +v0x29cdea0_0 .net *"_s35", 0 0, L_0x2a17bd0; 1 drivers +v0x29cdf40_0 .net *"_s37", 0 0, L_0x2a17d60; 1 drivers +v0x29cdfe0_0 .net *"_s39", 0 0, L_0x2a17f60; 1 drivers +v0x29ce080_0 .net "a", 3 0, L_0x2a184d0; 1 drivers +v0x29ce120_0 .net "aandb", 0 0, L_0x2a17080; 1 drivers +v0x29ce1c0_0 .net "abandnoror", 0 0, L_0x2a17cc0; 1 drivers +v0x29ce260_0 .net "anorb", 0 0, L_0x2a17800; 1 drivers +v0x29ce300_0 .net "b", 3 0, L_0x2a14130; 1 drivers +v0x29ce3a0_0 .net "bandsum", 0 0, L_0x2a17a80; 1 drivers +v0x29ce4c0_0 .net "bnorsum", 0 0, L_0x2a179f0; 1 drivers +v0x29ce560_0 .net "bsumandnornor", 0 0, L_0x2a18150; 1 drivers +v0x29ce420_0 .alias "carryin", 0 0, v0x29dfec0_0; +v0x29ce690_0 .alias "carryout", 0 0, v0x29dfcf0_0; +v0x29ce5e0_0 .net "carryout1", 0 0, L_0x2a14630; 1 drivers +v0x29ce7b0_0 .net "carryout2", 0 0, L_0x2a15160; 1 drivers +v0x29ce8e0_0 .net "carryout3", 0 0, L_0x2a15ea0; 1 drivers +v0x29ce960_0 .alias "overflow", 0 0, v0x29dcff0_0; +v0x29ce830_0 .net8 "sum", 3 0, RS_0x7ff1473ea058; 4 drivers +L_0x2a14cd0 .part/pv L_0x2a14c70, 0, 1, 4; +L_0x2a14dc0 .part L_0x2a184d0, 0, 1; +L_0x2a14e60 .part L_0x2a14130, 0, 1; +L_0x2a15920 .part/pv L_0x2a148a0, 1, 1, 4; +L_0x2a15a60 .part L_0x2a184d0, 1, 1; +L_0x2a15b50 .part L_0x2a14130, 1, 1; +L_0x2a16660 .part/pv L_0x2a153d0, 2, 1, 4; +L_0x2a16750 .part L_0x2a184d0, 2, 1; +L_0x2a16840 .part L_0x2a14130, 2, 1; +L_0x2a172c0 .part/pv L_0x2a16110, 3, 1, 4; +L_0x2a173f0 .part L_0x2a184d0, 3, 1; +L_0x2a17520 .part L_0x2a14130, 3, 1; +L_0x2a176c0 .part L_0x2a184d0, 3, 1; +L_0x2a17760 .part L_0x2a14130, 3, 1; +L_0x2a17860 .part L_0x2a184d0, 3, 1; +L_0x2a17900 .part L_0x2a14130, 3, 1; +L_0x2a17ae0 .part L_0x2a14130, 3, 1; +L_0x2a17bd0 .part RS_0x7ff1473ea058, 3, 1; +L_0x2a17d60 .part L_0x2a14130, 3, 1; +L_0x2a17f60 .part RS_0x7ff1473ea058, 3, 1; +S_0x29cd0f0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29caf90; + .timescale 0 0; +L_0x2a0fec0 .functor AND 1, L_0x2a14dc0, L_0x2a14e60, C4<1>, C4<1>; +L_0x2a0ff20 .functor AND 1, L_0x2a14dc0, L_0x2a12830, C4<1>, C4<1>; +L_0x2a143d0 .functor AND 1, L_0x2a14e60, L_0x2a12830, C4<1>, C4<1>; +L_0x29dfc60 .functor OR 1, L_0x2a0fec0, L_0x2a0ff20, C4<0>, C4<0>; +L_0x2a14630 .functor OR 1, L_0x29dfc60, L_0x2a143d0, C4<0>, C4<0>; +L_0x2a14730 .functor OR 1, L_0x2a14dc0, L_0x2a14e60, C4<0>, C4<0>; +L_0x2a14790 .functor OR 1, L_0x2a14730, L_0x2a12830, C4<0>, C4<0>; +L_0x2a14840 .functor NOT 1, L_0x2a14630, C4<0>, C4<0>, C4<0>; +L_0x2a14930 .functor AND 1, L_0x2a14840, L_0x2a14790, C4<1>, C4<1>; +L_0x2a14a30 .functor AND 1, L_0x2a14dc0, L_0x2a14e60, C4<1>, C4<1>; +L_0x2a14c10 .functor AND 1, L_0x2a14a30, L_0x2a12830, C4<1>, C4<1>; +L_0x2a14c70 .functor OR 1, L_0x2a14930, L_0x2a14c10, C4<0>, C4<0>; +v0x29cd1e0_0 .net "a", 0 0, L_0x2a14dc0; 1 drivers +v0x29cd2a0_0 .net "ab", 0 0, L_0x2a0fec0; 1 drivers +v0x29cd340_0 .net "acarryin", 0 0, L_0x2a0ff20; 1 drivers +v0x29cd3e0_0 .net "andall", 0 0, L_0x2a14c10; 1 drivers +v0x29cd460_0 .net "andsingleintermediate", 0 0, L_0x2a14a30; 1 drivers +v0x29cd500_0 .net "andsumintermediate", 0 0, L_0x2a14930; 1 drivers +v0x29cd5a0_0 .net "b", 0 0, L_0x2a14e60; 1 drivers +v0x29cd640_0 .net "bcarryin", 0 0, L_0x2a143d0; 1 drivers +v0x29cd6e0_0 .alias "carryin", 0 0, v0x29dfec0_0; +v0x29cd780_0 .alias "carryout", 0 0, v0x29ce5e0_0; +v0x29cd800_0 .net "invcarryout", 0 0, L_0x2a14840; 1 drivers +v0x29cd880_0 .net "orall", 0 0, L_0x2a14790; 1 drivers +v0x29cd920_0 .net "orpairintermediate", 0 0, L_0x29dfc60; 1 drivers +v0x29cd9c0_0 .net "orsingleintermediate", 0 0, L_0x2a14730; 1 drivers +v0x29cdae0_0 .net "sum", 0 0, L_0x2a14c70; 1 drivers +S_0x29cc660 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29caf90; + .timescale 0 0; +L_0x2a14bb0 .functor AND 1, L_0x2a15a60, L_0x2a15b50, C4<1>, C4<1>; +L_0x2a14f00 .functor AND 1, L_0x2a15a60, L_0x2a14630, C4<1>, C4<1>; +L_0x2a14fb0 .functor AND 1, L_0x2a15b50, L_0x2a14630, C4<1>, C4<1>; +L_0x2a15060 .functor OR 1, L_0x2a14bb0, L_0x2a14f00, C4<0>, C4<0>; +L_0x2a15160 .functor OR 1, L_0x2a15060, L_0x2a14fb0, C4<0>, C4<0>; +L_0x2a15260 .functor OR 1, L_0x2a15a60, L_0x2a15b50, C4<0>, C4<0>; +L_0x2a152c0 .functor OR 1, L_0x2a15260, L_0x2a14630, C4<0>, C4<0>; +L_0x2a15370 .functor NOT 1, L_0x2a15160, C4<0>, C4<0>, C4<0>; +L_0x2a15460 .functor AND 1, L_0x2a15370, L_0x2a152c0, C4<1>, C4<1>; +L_0x2a15560 .functor AND 1, L_0x2a15a60, L_0x2a15b50, C4<1>, C4<1>; +L_0x2a15740 .functor AND 1, L_0x2a15560, L_0x2a14630, C4<1>, C4<1>; +L_0x2a148a0 .functor OR 1, L_0x2a15460, L_0x2a15740, C4<0>, C4<0>; +v0x29cc750_0 .net "a", 0 0, L_0x2a15a60; 1 drivers +v0x29cc810_0 .net "ab", 0 0, L_0x2a14bb0; 1 drivers +v0x29cc8b0_0 .net "acarryin", 0 0, L_0x2a14f00; 1 drivers +v0x29cc950_0 .net "andall", 0 0, L_0x2a15740; 1 drivers +v0x29cc9d0_0 .net "andsingleintermediate", 0 0, L_0x2a15560; 1 drivers +v0x29cca70_0 .net "andsumintermediate", 0 0, L_0x2a15460; 1 drivers +v0x29ccb10_0 .net "b", 0 0, L_0x2a15b50; 1 drivers +v0x29ccbb0_0 .net "bcarryin", 0 0, L_0x2a14fb0; 1 drivers +v0x29ccc50_0 .alias "carryin", 0 0, v0x29ce5e0_0; +v0x29cccf0_0 .alias "carryout", 0 0, v0x29ce7b0_0; +v0x29ccd70_0 .net "invcarryout", 0 0, L_0x2a15370; 1 drivers +v0x29ccdf0_0 .net "orall", 0 0, L_0x2a152c0; 1 drivers +v0x29cce90_0 .net "orpairintermediate", 0 0, L_0x2a15060; 1 drivers +v0x29ccf30_0 .net "orsingleintermediate", 0 0, L_0x2a15260; 1 drivers +v0x29cd050_0 .net "sum", 0 0, L_0x2a148a0; 1 drivers +S_0x29cbb80 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29caf90; + .timescale 0 0; +L_0x2a156e0 .functor AND 1, L_0x2a16750, L_0x2a16840, C4<1>, C4<1>; +L_0x2a15c40 .functor AND 1, L_0x2a16750, L_0x2a15160, C4<1>, C4<1>; +L_0x2a15cf0 .functor AND 1, L_0x2a16840, L_0x2a15160, C4<1>, C4<1>; +L_0x2a15da0 .functor OR 1, L_0x2a156e0, L_0x2a15c40, C4<0>, C4<0>; +L_0x2a15ea0 .functor OR 1, L_0x2a15da0, L_0x2a15cf0, C4<0>, C4<0>; +L_0x2a15fa0 .functor OR 1, L_0x2a16750, L_0x2a16840, C4<0>, C4<0>; +L_0x2a16000 .functor OR 1, L_0x2a15fa0, L_0x2a15160, C4<0>, C4<0>; +L_0x2a160b0 .functor NOT 1, L_0x2a15ea0, C4<0>, C4<0>, C4<0>; +L_0x2a161a0 .functor AND 1, L_0x2a160b0, L_0x2a16000, C4<1>, C4<1>; +L_0x2a162a0 .functor AND 1, L_0x2a16750, L_0x2a16840, C4<1>, C4<1>; +L_0x2a16480 .functor AND 1, L_0x2a162a0, L_0x2a15160, C4<1>, C4<1>; +L_0x2a153d0 .functor OR 1, L_0x2a161a0, L_0x2a16480, C4<0>, C4<0>; +v0x29cbc70_0 .net "a", 0 0, L_0x2a16750; 1 drivers +v0x29cbd30_0 .net "ab", 0 0, L_0x2a156e0; 1 drivers +v0x29cbdd0_0 .net "acarryin", 0 0, L_0x2a15c40; 1 drivers +v0x29cbe70_0 .net "andall", 0 0, L_0x2a16480; 1 drivers +v0x29cbef0_0 .net "andsingleintermediate", 0 0, L_0x2a162a0; 1 drivers +v0x29cbf90_0 .net "andsumintermediate", 0 0, L_0x2a161a0; 1 drivers +v0x29cc030_0 .net "b", 0 0, L_0x2a16840; 1 drivers +v0x29cc0d0_0 .net "bcarryin", 0 0, L_0x2a15cf0; 1 drivers +v0x29cc1c0_0 .alias "carryin", 0 0, v0x29ce7b0_0; +v0x29cc260_0 .alias "carryout", 0 0, v0x29ce8e0_0; +v0x29cc2e0_0 .net "invcarryout", 0 0, L_0x2a160b0; 1 drivers +v0x29cc360_0 .net "orall", 0 0, L_0x2a16000; 1 drivers +v0x29cc400_0 .net "orpairintermediate", 0 0, L_0x2a15da0; 1 drivers +v0x29cc4a0_0 .net "orsingleintermediate", 0 0, L_0x2a15fa0; 1 drivers +v0x29cc5c0_0 .net "sum", 0 0, L_0x2a153d0; 1 drivers +S_0x29cb080 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29caf90; + .timescale 0 0; +L_0x2a16420 .functor AND 1, L_0x2a173f0, L_0x2a17520, C4<1>, C4<1>; +L_0x2a168e0 .functor AND 1, L_0x2a173f0, L_0x2a15ea0, C4<1>, C4<1>; +L_0x2a16990 .functor AND 1, L_0x2a17520, L_0x2a15ea0, C4<1>, C4<1>; +L_0x2a16a40 .functor OR 1, L_0x2a16420, L_0x2a168e0, C4<0>, C4<0>; +L_0x2a16b40 .functor OR 1, L_0x2a16a40, L_0x2a16990, C4<0>, C4<0>; +L_0x2a16c40 .functor OR 1, L_0x2a173f0, L_0x2a17520, C4<0>, C4<0>; +L_0x2a16ca0 .functor OR 1, L_0x2a16c40, L_0x2a15ea0, C4<0>, C4<0>; +L_0x2a16d50 .functor NOT 1, L_0x2a16b40, C4<0>, C4<0>, C4<0>; +L_0x2a16e00 .functor AND 1, L_0x2a16d50, L_0x2a16ca0, C4<1>, C4<1>; +L_0x2a16f00 .functor AND 1, L_0x2a173f0, L_0x2a17520, C4<1>, C4<1>; +L_0x2a170e0 .functor AND 1, L_0x2a16f00, L_0x2a15ea0, C4<1>, C4<1>; +L_0x2a16110 .functor OR 1, L_0x2a16e00, L_0x2a170e0, C4<0>, C4<0>; +v0x29cb170_0 .net "a", 0 0, L_0x2a173f0; 1 drivers +v0x29cb230_0 .net "ab", 0 0, L_0x2a16420; 1 drivers +v0x29cb2d0_0 .net "acarryin", 0 0, L_0x2a168e0; 1 drivers +v0x29cb370_0 .net "andall", 0 0, L_0x2a170e0; 1 drivers +v0x29cb3f0_0 .net "andsingleintermediate", 0 0, L_0x2a16f00; 1 drivers +v0x29cb490_0 .net "andsumintermediate", 0 0, L_0x2a16e00; 1 drivers +v0x29cb530_0 .net "b", 0 0, L_0x2a17520; 1 drivers +v0x29cb5d0_0 .net "bcarryin", 0 0, L_0x2a16990; 1 drivers +v0x29cb6c0_0 .alias "carryin", 0 0, v0x29ce8e0_0; +v0x29cb760_0 .alias "carryout", 0 0, v0x29dfcf0_0; +v0x29cb7e0_0 .net "invcarryout", 0 0, L_0x2a16d50; 1 drivers +v0x29cb880_0 .net "orall", 0 0, L_0x2a16ca0; 1 drivers +v0x29cb920_0 .net "orpairintermediate", 0 0, L_0x2a16a40; 1 drivers +v0x29cb9c0_0 .net "orsingleintermediate", 0 0, L_0x2a16c40; 1 drivers +v0x29cbae0_0 .net "sum", 0 0, L_0x2a16110; 1 drivers +S_0x29c7480 .scope module, "adder3" "FullAdder4bit" 19 240, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a1b3d0 .functor AND 1, L_0x2a1ba10, L_0x2a1bab0, C4<1>, C4<1>; +L_0x2a1bb50 .functor NOR 1, L_0x2a1bbb0, L_0x2a1bc50, C4<0>, C4<0>; +L_0x2a1bdd0 .functor AND 1, L_0x2a1be30, L_0x2a1bf20, C4<1>, C4<1>; +L_0x2a1bd40 .functor NOR 1, L_0x2a1c0b0, L_0x2a1c2b0, C4<0>, C4<0>; +L_0x2a1c010 .functor OR 1, L_0x2a1b3d0, L_0x2a1bb50, C4<0>, C4<0>; +L_0x2a1c4a0 .functor NOR 1, L_0x2a1bdd0, L_0x2a1bd40, C4<0>, C4<0>; +L_0x2a1c5a0 .functor AND 1, L_0x2a1c010, L_0x2a1c4a0, C4<1>, C4<1>; +v0x29ca070_0 .net *"_s25", 0 0, L_0x2a1ba10; 1 drivers +v0x29ca130_0 .net *"_s27", 0 0, L_0x2a1bab0; 1 drivers +v0x29ca1d0_0 .net *"_s29", 0 0, L_0x2a1bbb0; 1 drivers +v0x29ca270_0 .net *"_s31", 0 0, L_0x2a1bc50; 1 drivers +v0x29ca2f0_0 .net *"_s33", 0 0, L_0x2a1be30; 1 drivers +v0x29ca390_0 .net *"_s35", 0 0, L_0x2a1bf20; 1 drivers +v0x29ca430_0 .net *"_s37", 0 0, L_0x2a1c0b0; 1 drivers +v0x29ca4d0_0 .net *"_s39", 0 0, L_0x2a1c2b0; 1 drivers +v0x29ca570_0 .net "a", 3 0, L_0x2a18570; 1 drivers +v0x29ca610_0 .net "aandb", 0 0, L_0x2a1b3d0; 1 drivers +v0x29ca6b0_0 .net "abandnoror", 0 0, L_0x2a1c010; 1 drivers +v0x29ca750_0 .net "anorb", 0 0, L_0x2a1bb50; 1 drivers +v0x29ca7f0_0 .net "b", 3 0, L_0x29e1770; 1 drivers +v0x29ca890_0 .net "bandsum", 0 0, L_0x2a1bdd0; 1 drivers +v0x29ca9b0_0 .net "bnorsum", 0 0, L_0x2a1bd40; 1 drivers +v0x29caa50_0 .net "bsumandnornor", 0 0, L_0x2a1c4a0; 1 drivers +v0x29ca910_0 .alias "carryin", 0 0, v0x29dfcf0_0; +v0x29cab80_0 .alias "carryout", 0 0, v0x29dfe00_0; +v0x29caad0_0 .net "carryout1", 0 0, L_0x2a18980; 1 drivers +v0x29caca0_0 .net "carryout2", 0 0, L_0x2a194b0; 1 drivers +v0x29cadd0_0 .net "carryout3", 0 0, L_0x2a1a1f0; 1 drivers +v0x29cae50_0 .alias "overflow", 0 0, v0x29dd070_0; +v0x29cad20_0 .net8 "sum", 3 0, RS_0x7ff1473e9278; 4 drivers +L_0x2a19020 .part/pv L_0x2a18fc0, 0, 1, 4; +L_0x2a19110 .part L_0x2a18570, 0, 1; +L_0x2a191b0 .part L_0x29e1770, 0, 1; +L_0x2a19c70 .part/pv L_0x2a18bf0, 1, 1, 4; +L_0x2a19db0 .part L_0x2a18570, 1, 1; +L_0x2a19ea0 .part L_0x29e1770, 1, 1; +L_0x2a1a9b0 .part/pv L_0x2a19720, 2, 1, 4; +L_0x2a1aaa0 .part L_0x2a18570, 2, 1; +L_0x2a1ab90 .part L_0x29e1770, 2, 1; +L_0x2a1b610 .part/pv L_0x2a1a460, 3, 1, 4; +L_0x2a1b740 .part L_0x2a18570, 3, 1; +L_0x2a1b870 .part L_0x29e1770, 3, 1; +L_0x2a1ba10 .part L_0x2a18570, 3, 1; +L_0x2a1bab0 .part L_0x29e1770, 3, 1; +L_0x2a1bbb0 .part L_0x2a18570, 3, 1; +L_0x2a1bc50 .part L_0x29e1770, 3, 1; +L_0x2a1be30 .part L_0x29e1770, 3, 1; +L_0x2a1bf20 .part RS_0x7ff1473e9278, 3, 1; +L_0x2a1c0b0 .part L_0x29e1770, 3, 1; +L_0x2a1c2b0 .part RS_0x7ff1473e9278, 3, 1; +S_0x29c95e0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29c7480; + .timescale 0 0; +L_0x2a141d0 .functor AND 1, L_0x2a19110, L_0x2a191b0, C4<1>, C4<1>; +L_0x2a14230 .functor AND 1, L_0x2a19110, L_0x2a16b40, C4<1>, C4<1>; +L_0x2a14290 .functor AND 1, L_0x2a191b0, L_0x2a16b40, C4<1>, C4<1>; +L_0x29dfd70 .functor OR 1, L_0x2a141d0, L_0x2a14230, C4<0>, C4<0>; +L_0x2a18980 .functor OR 1, L_0x29dfd70, L_0x2a14290, C4<0>, C4<0>; +L_0x2a18a80 .functor OR 1, L_0x2a19110, L_0x2a191b0, C4<0>, C4<0>; +L_0x2a18ae0 .functor OR 1, L_0x2a18a80, L_0x2a16b40, C4<0>, C4<0>; +L_0x2a18b90 .functor NOT 1, L_0x2a18980, C4<0>, C4<0>, C4<0>; +L_0x2a18c80 .functor AND 1, L_0x2a18b90, L_0x2a18ae0, C4<1>, C4<1>; +L_0x2a18d80 .functor AND 1, L_0x2a19110, L_0x2a191b0, C4<1>, C4<1>; +L_0x2a18f60 .functor AND 1, L_0x2a18d80, L_0x2a16b40, C4<1>, C4<1>; +L_0x2a18fc0 .functor OR 1, L_0x2a18c80, L_0x2a18f60, C4<0>, C4<0>; +v0x29c96d0_0 .net "a", 0 0, L_0x2a19110; 1 drivers +v0x29c9790_0 .net "ab", 0 0, L_0x2a141d0; 1 drivers +v0x29c9830_0 .net "acarryin", 0 0, L_0x2a14230; 1 drivers +v0x29c98d0_0 .net "andall", 0 0, L_0x2a18f60; 1 drivers +v0x29c9950_0 .net "andsingleintermediate", 0 0, L_0x2a18d80; 1 drivers +v0x29c99f0_0 .net "andsumintermediate", 0 0, L_0x2a18c80; 1 drivers +v0x29c9a90_0 .net "b", 0 0, L_0x2a191b0; 1 drivers +v0x29c9b30_0 .net "bcarryin", 0 0, L_0x2a14290; 1 drivers +v0x29c9bd0_0 .alias "carryin", 0 0, v0x29dfcf0_0; +v0x29c9c70_0 .alias "carryout", 0 0, v0x29caad0_0; +v0x29c9cf0_0 .net "invcarryout", 0 0, L_0x2a18b90; 1 drivers +v0x29c9d70_0 .net "orall", 0 0, L_0x2a18ae0; 1 drivers +v0x29c9e10_0 .net "orpairintermediate", 0 0, L_0x29dfd70; 1 drivers +v0x29c9eb0_0 .net "orsingleintermediate", 0 0, L_0x2a18a80; 1 drivers +v0x29c9fd0_0 .net "sum", 0 0, L_0x2a18fc0; 1 drivers +S_0x29c8b50 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29c7480; + .timescale 0 0; +L_0x2a18f00 .functor AND 1, L_0x2a19db0, L_0x2a19ea0, C4<1>, C4<1>; +L_0x2a19250 .functor AND 1, L_0x2a19db0, L_0x2a18980, C4<1>, C4<1>; +L_0x2a19300 .functor AND 1, L_0x2a19ea0, L_0x2a18980, C4<1>, C4<1>; +L_0x2a193b0 .functor OR 1, L_0x2a18f00, L_0x2a19250, C4<0>, C4<0>; +L_0x2a194b0 .functor OR 1, L_0x2a193b0, L_0x2a19300, C4<0>, C4<0>; +L_0x2a195b0 .functor OR 1, L_0x2a19db0, L_0x2a19ea0, C4<0>, C4<0>; +L_0x2a19610 .functor OR 1, L_0x2a195b0, L_0x2a18980, C4<0>, C4<0>; +L_0x2a196c0 .functor NOT 1, L_0x2a194b0, C4<0>, C4<0>, C4<0>; +L_0x2a197b0 .functor AND 1, L_0x2a196c0, L_0x2a19610, C4<1>, C4<1>; +L_0x2a198b0 .functor AND 1, L_0x2a19db0, L_0x2a19ea0, C4<1>, C4<1>; +L_0x2a19a90 .functor AND 1, L_0x2a198b0, L_0x2a18980, C4<1>, C4<1>; +L_0x2a18bf0 .functor OR 1, L_0x2a197b0, L_0x2a19a90, C4<0>, C4<0>; +v0x29c8c40_0 .net "a", 0 0, L_0x2a19db0; 1 drivers +v0x29c8d00_0 .net "ab", 0 0, L_0x2a18f00; 1 drivers +v0x29c8da0_0 .net "acarryin", 0 0, L_0x2a19250; 1 drivers +v0x29c8e40_0 .net "andall", 0 0, L_0x2a19a90; 1 drivers +v0x29c8ec0_0 .net "andsingleintermediate", 0 0, L_0x2a198b0; 1 drivers +v0x29c8f60_0 .net "andsumintermediate", 0 0, L_0x2a197b0; 1 drivers +v0x29c9000_0 .net "b", 0 0, L_0x2a19ea0; 1 drivers +v0x29c90a0_0 .net "bcarryin", 0 0, L_0x2a19300; 1 drivers +v0x29c9140_0 .alias "carryin", 0 0, v0x29caad0_0; +v0x29c91e0_0 .alias "carryout", 0 0, v0x29caca0_0; +v0x29c9260_0 .net "invcarryout", 0 0, L_0x2a196c0; 1 drivers +v0x29c92e0_0 .net "orall", 0 0, L_0x2a19610; 1 drivers +v0x29c9380_0 .net "orpairintermediate", 0 0, L_0x2a193b0; 1 drivers +v0x29c9420_0 .net "orsingleintermediate", 0 0, L_0x2a195b0; 1 drivers +v0x29c9540_0 .net "sum", 0 0, L_0x2a18bf0; 1 drivers +S_0x29c8070 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29c7480; + .timescale 0 0; +L_0x2a19a30 .functor AND 1, L_0x2a1aaa0, L_0x2a1ab90, C4<1>, C4<1>; +L_0x2a19f90 .functor AND 1, L_0x2a1aaa0, L_0x2a194b0, C4<1>, C4<1>; +L_0x2a1a040 .functor AND 1, L_0x2a1ab90, L_0x2a194b0, C4<1>, C4<1>; +L_0x2a1a0f0 .functor OR 1, L_0x2a19a30, L_0x2a19f90, C4<0>, C4<0>; +L_0x2a1a1f0 .functor OR 1, L_0x2a1a0f0, L_0x2a1a040, C4<0>, C4<0>; +L_0x2a1a2f0 .functor OR 1, L_0x2a1aaa0, L_0x2a1ab90, C4<0>, C4<0>; +L_0x2a1a350 .functor OR 1, L_0x2a1a2f0, L_0x2a194b0, C4<0>, C4<0>; +L_0x2a1a400 .functor NOT 1, L_0x2a1a1f0, C4<0>, C4<0>, C4<0>; +L_0x2a1a4f0 .functor AND 1, L_0x2a1a400, L_0x2a1a350, C4<1>, C4<1>; +L_0x2a1a5f0 .functor AND 1, L_0x2a1aaa0, L_0x2a1ab90, C4<1>, C4<1>; +L_0x2a1a7d0 .functor AND 1, L_0x2a1a5f0, L_0x2a194b0, C4<1>, C4<1>; +L_0x2a19720 .functor OR 1, L_0x2a1a4f0, L_0x2a1a7d0, C4<0>, C4<0>; +v0x29c8160_0 .net "a", 0 0, L_0x2a1aaa0; 1 drivers +v0x29c8220_0 .net "ab", 0 0, L_0x2a19a30; 1 drivers +v0x29c82c0_0 .net "acarryin", 0 0, L_0x2a19f90; 1 drivers +v0x29c8360_0 .net "andall", 0 0, L_0x2a1a7d0; 1 drivers +v0x29c83e0_0 .net "andsingleintermediate", 0 0, L_0x2a1a5f0; 1 drivers +v0x29c8480_0 .net "andsumintermediate", 0 0, L_0x2a1a4f0; 1 drivers +v0x29c8520_0 .net "b", 0 0, L_0x2a1ab90; 1 drivers +v0x29c85c0_0 .net "bcarryin", 0 0, L_0x2a1a040; 1 drivers +v0x29c86b0_0 .alias "carryin", 0 0, v0x29caca0_0; +v0x29c8750_0 .alias "carryout", 0 0, v0x29cadd0_0; +v0x29c87d0_0 .net "invcarryout", 0 0, L_0x2a1a400; 1 drivers +v0x29c8850_0 .net "orall", 0 0, L_0x2a1a350; 1 drivers +v0x29c88f0_0 .net "orpairintermediate", 0 0, L_0x2a1a0f0; 1 drivers +v0x29c8990_0 .net "orsingleintermediate", 0 0, L_0x2a1a2f0; 1 drivers +v0x29c8ab0_0 .net "sum", 0 0, L_0x2a19720; 1 drivers +S_0x29c7570 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29c7480; + .timescale 0 0; +L_0x2a1a770 .functor AND 1, L_0x2a1b740, L_0x2a1b870, C4<1>, C4<1>; +L_0x2a1ac30 .functor AND 1, L_0x2a1b740, L_0x2a1a1f0, C4<1>, C4<1>; +L_0x2a1ace0 .functor AND 1, L_0x2a1b870, L_0x2a1a1f0, C4<1>, C4<1>; +L_0x2a1ad90 .functor OR 1, L_0x2a1a770, L_0x2a1ac30, C4<0>, C4<0>; +L_0x2a1ae90 .functor OR 1, L_0x2a1ad90, L_0x2a1ace0, C4<0>, C4<0>; +L_0x2a1af90 .functor OR 1, L_0x2a1b740, L_0x2a1b870, C4<0>, C4<0>; +L_0x2a1aff0 .functor OR 1, L_0x2a1af90, L_0x2a1a1f0, C4<0>, C4<0>; +L_0x2a1b0a0 .functor NOT 1, L_0x2a1ae90, C4<0>, C4<0>, C4<0>; +L_0x2a1b150 .functor AND 1, L_0x2a1b0a0, L_0x2a1aff0, C4<1>, C4<1>; +L_0x2a1b250 .functor AND 1, L_0x2a1b740, L_0x2a1b870, C4<1>, C4<1>; +L_0x2a1b430 .functor AND 1, L_0x2a1b250, L_0x2a1a1f0, C4<1>, C4<1>; +L_0x2a1a460 .functor OR 1, L_0x2a1b150, L_0x2a1b430, C4<0>, C4<0>; +v0x29c7660_0 .net "a", 0 0, L_0x2a1b740; 1 drivers +v0x29c7720_0 .net "ab", 0 0, L_0x2a1a770; 1 drivers +v0x29c77c0_0 .net "acarryin", 0 0, L_0x2a1ac30; 1 drivers +v0x29c7860_0 .net "andall", 0 0, L_0x2a1b430; 1 drivers +v0x29c78e0_0 .net "andsingleintermediate", 0 0, L_0x2a1b250; 1 drivers +v0x29c7980_0 .net "andsumintermediate", 0 0, L_0x2a1b150; 1 drivers +v0x29c7a20_0 .net "b", 0 0, L_0x2a1b870; 1 drivers +v0x29c7ac0_0 .net "bcarryin", 0 0, L_0x2a1ace0; 1 drivers +v0x29c7bb0_0 .alias "carryin", 0 0, v0x29cadd0_0; +v0x29c7c50_0 .alias "carryout", 0 0, v0x29dfe00_0; +v0x29c7cd0_0 .net "invcarryout", 0 0, L_0x2a1b0a0; 1 drivers +v0x29c7d70_0 .net "orall", 0 0, L_0x2a1aff0; 1 drivers +v0x29c7e10_0 .net "orpairintermediate", 0 0, L_0x2a1ad90; 1 drivers +v0x29c7eb0_0 .net "orsingleintermediate", 0 0, L_0x2a1af90; 1 drivers +v0x29c7fd0_0 .net "sum", 0 0, L_0x2a1a460; 1 drivers +S_0x29c3970 .scope module, "adder4" "FullAdder4bit" 19 241, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a1f7e0 .functor AND 1, L_0x2a1fe20, L_0x2a1fec0, C4<1>, C4<1>; +L_0x2a1ff60 .functor NOR 1, L_0x2a1ffc0, L_0x2a20060, C4<0>, C4<0>; +L_0x2a201e0 .functor AND 1, L_0x2a20240, L_0x2a20330, C4<1>, C4<1>; +L_0x2a20150 .functor NOR 1, L_0x2a204c0, L_0x2a206c0, C4<0>, C4<0>; +L_0x2a20420 .functor OR 1, L_0x2a1f7e0, L_0x2a1ff60, C4<0>, C4<0>; +L_0x2a208b0 .functor NOR 1, L_0x2a201e0, L_0x2a20150, C4<0>, C4<0>; +L_0x2a209b0 .functor AND 1, L_0x2a20420, L_0x2a208b0, C4<1>, C4<1>; +v0x29c6560_0 .net *"_s25", 0 0, L_0x2a1fe20; 1 drivers +v0x29c6620_0 .net *"_s27", 0 0, L_0x2a1fec0; 1 drivers +v0x29c66c0_0 .net *"_s29", 0 0, L_0x2a1ffc0; 1 drivers +v0x29c6760_0 .net *"_s31", 0 0, L_0x2a20060; 1 drivers +v0x29c67e0_0 .net *"_s33", 0 0, L_0x2a20240; 1 drivers +v0x29c6880_0 .net *"_s35", 0 0, L_0x2a20330; 1 drivers +v0x29c6920_0 .net *"_s37", 0 0, L_0x2a204c0; 1 drivers +v0x29c69c0_0 .net *"_s39", 0 0, L_0x2a206c0; 1 drivers +v0x29c6a60_0 .net "a", 3 0, L_0x2a20ba0; 1 drivers +v0x29c6b00_0 .net "aandb", 0 0, L_0x2a1f7e0; 1 drivers +v0x29c6ba0_0 .net "abandnoror", 0 0, L_0x2a20420; 1 drivers +v0x29c6c40_0 .net "anorb", 0 0, L_0x2a1ff60; 1 drivers +v0x29c6ce0_0 .net "b", 3 0, L_0x2a1cc10; 1 drivers +v0x29c6d80_0 .net "bandsum", 0 0, L_0x2a201e0; 1 drivers +v0x29c6ea0_0 .net "bnorsum", 0 0, L_0x2a20150; 1 drivers +v0x29c6f40_0 .net "bsumandnornor", 0 0, L_0x2a208b0; 1 drivers +v0x29c6e00_0 .alias "carryin", 0 0, v0x29dfe00_0; +v0x29c7070_0 .alias "carryout", 0 0, v0x29e0250_0; +v0x29c6fc0_0 .net "carryout1", 0 0, L_0x2a1c8f0; 1 drivers +v0x29c7190_0 .net "carryout2", 0 0, L_0x2a1d8c0; 1 drivers +v0x29c72c0_0 .net "carryout3", 0 0, L_0x2a1e600; 1 drivers +v0x29c7340_0 .alias "overflow", 0 0, v0x29dd0f0_0; +v0x29c7210_0 .net8 "sum", 3 0, RS_0x7ff1473e8498; 4 drivers +L_0x2a1d430 .part/pv L_0x2a1d3d0, 0, 1, 4; +L_0x2a1d520 .part L_0x2a20ba0, 0, 1; +L_0x2a1d5c0 .part L_0x2a1cc10, 0, 1; +L_0x2a1e080 .part/pv L_0x2a1d000, 1, 1, 4; +L_0x2a1e1c0 .part L_0x2a20ba0, 1, 1; +L_0x2a1e2b0 .part L_0x2a1cc10, 1, 1; +L_0x2a1edc0 .part/pv L_0x2a1db30, 2, 1, 4; +L_0x2a1eeb0 .part L_0x2a20ba0, 2, 1; +L_0x2a1efa0 .part L_0x2a1cc10, 2, 1; +L_0x2a1fa20 .part/pv L_0x2a1e870, 3, 1, 4; +L_0x2a1fb50 .part L_0x2a20ba0, 3, 1; +L_0x2a1fc80 .part L_0x2a1cc10, 3, 1; +L_0x2a1fe20 .part L_0x2a20ba0, 3, 1; +L_0x2a1fec0 .part L_0x2a1cc10, 3, 1; +L_0x2a1ffc0 .part L_0x2a20ba0, 3, 1; +L_0x2a20060 .part L_0x2a1cc10, 3, 1; +L_0x2a20240 .part L_0x2a1cc10, 3, 1; +L_0x2a20330 .part RS_0x7ff1473e8498, 3, 1; +L_0x2a204c0 .part L_0x2a1cc10, 3, 1; +L_0x2a206c0 .part RS_0x7ff1473e8498, 3, 1; +S_0x29c5ad0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29c3970; + .timescale 0 0; +L_0x29e1810 .functor AND 1, L_0x2a1d520, L_0x2a1d5c0, C4<1>, C4<1>; +L_0x2a18610 .functor AND 1, L_0x2a1d520, L_0x2a1ae90, C4<1>, C4<1>; +L_0x2a186c0 .functor AND 1, L_0x2a1d5c0, L_0x2a1ae90, C4<1>, C4<1>; +L_0x2a18770 .functor OR 1, L_0x29e1810, L_0x2a18610, C4<0>, C4<0>; +L_0x2a1c8f0 .functor OR 1, L_0x2a18770, L_0x2a186c0, C4<0>, C4<0>; +L_0x2a1ce90 .functor OR 1, L_0x2a1d520, L_0x2a1d5c0, C4<0>, C4<0>; +L_0x2a1cef0 .functor OR 1, L_0x2a1ce90, L_0x2a1ae90, C4<0>, C4<0>; +L_0x2a1cfa0 .functor NOT 1, L_0x2a1c8f0, C4<0>, C4<0>, C4<0>; +L_0x2a1d090 .functor AND 1, L_0x2a1cfa0, L_0x2a1cef0, C4<1>, C4<1>; +L_0x2a1d190 .functor AND 1, L_0x2a1d520, L_0x2a1d5c0, C4<1>, C4<1>; +L_0x2a1d370 .functor AND 1, L_0x2a1d190, L_0x2a1ae90, C4<1>, C4<1>; +L_0x2a1d3d0 .functor OR 1, L_0x2a1d090, L_0x2a1d370, C4<0>, C4<0>; +v0x29c5bc0_0 .net "a", 0 0, L_0x2a1d520; 1 drivers +v0x29c5c80_0 .net "ab", 0 0, L_0x29e1810; 1 drivers +v0x29c5d20_0 .net "acarryin", 0 0, L_0x2a18610; 1 drivers +v0x29c5dc0_0 .net "andall", 0 0, L_0x2a1d370; 1 drivers +v0x29c5e40_0 .net "andsingleintermediate", 0 0, L_0x2a1d190; 1 drivers +v0x29c5ee0_0 .net "andsumintermediate", 0 0, L_0x2a1d090; 1 drivers +v0x29c5f80_0 .net "b", 0 0, L_0x2a1d5c0; 1 drivers +v0x29c6020_0 .net "bcarryin", 0 0, L_0x2a186c0; 1 drivers +v0x29c60c0_0 .alias "carryin", 0 0, v0x29dfe00_0; +v0x29c6160_0 .alias "carryout", 0 0, v0x29c6fc0_0; +v0x29c61e0_0 .net "invcarryout", 0 0, L_0x2a1cfa0; 1 drivers +v0x29c6260_0 .net "orall", 0 0, L_0x2a1cef0; 1 drivers +v0x29c6300_0 .net "orpairintermediate", 0 0, L_0x2a18770; 1 drivers +v0x29c63a0_0 .net "orsingleintermediate", 0 0, L_0x2a1ce90; 1 drivers +v0x29c64c0_0 .net "sum", 0 0, L_0x2a1d3d0; 1 drivers +S_0x29c5040 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29c3970; + .timescale 0 0; +L_0x2a1d310 .functor AND 1, L_0x2a1e1c0, L_0x2a1e2b0, C4<1>, C4<1>; +L_0x2a1d660 .functor AND 1, L_0x2a1e1c0, L_0x2a1c8f0, C4<1>, C4<1>; +L_0x2a1d710 .functor AND 1, L_0x2a1e2b0, L_0x2a1c8f0, C4<1>, C4<1>; +L_0x2a1d7c0 .functor OR 1, L_0x2a1d310, L_0x2a1d660, C4<0>, C4<0>; +L_0x2a1d8c0 .functor OR 1, L_0x2a1d7c0, L_0x2a1d710, C4<0>, C4<0>; +L_0x2a1d9c0 .functor OR 1, L_0x2a1e1c0, L_0x2a1e2b0, C4<0>, C4<0>; +L_0x2a1da20 .functor OR 1, L_0x2a1d9c0, L_0x2a1c8f0, C4<0>, C4<0>; +L_0x2a1dad0 .functor NOT 1, L_0x2a1d8c0, C4<0>, C4<0>, C4<0>; +L_0x2a1dbc0 .functor AND 1, L_0x2a1dad0, L_0x2a1da20, C4<1>, C4<1>; +L_0x2a1dcc0 .functor AND 1, L_0x2a1e1c0, L_0x2a1e2b0, C4<1>, C4<1>; +L_0x2a1dea0 .functor AND 1, L_0x2a1dcc0, L_0x2a1c8f0, C4<1>, C4<1>; +L_0x2a1d000 .functor OR 1, L_0x2a1dbc0, L_0x2a1dea0, C4<0>, C4<0>; +v0x29c5130_0 .net "a", 0 0, L_0x2a1e1c0; 1 drivers +v0x29c51f0_0 .net "ab", 0 0, L_0x2a1d310; 1 drivers +v0x29c5290_0 .net "acarryin", 0 0, L_0x2a1d660; 1 drivers +v0x29c5330_0 .net "andall", 0 0, L_0x2a1dea0; 1 drivers +v0x29c53b0_0 .net "andsingleintermediate", 0 0, L_0x2a1dcc0; 1 drivers +v0x29c5450_0 .net "andsumintermediate", 0 0, L_0x2a1dbc0; 1 drivers +v0x29c54f0_0 .net "b", 0 0, L_0x2a1e2b0; 1 drivers +v0x29c5590_0 .net "bcarryin", 0 0, L_0x2a1d710; 1 drivers +v0x29c5630_0 .alias "carryin", 0 0, v0x29c6fc0_0; +v0x29c56d0_0 .alias "carryout", 0 0, v0x29c7190_0; +v0x29c5750_0 .net "invcarryout", 0 0, L_0x2a1dad0; 1 drivers +v0x29c57d0_0 .net "orall", 0 0, L_0x2a1da20; 1 drivers +v0x29c5870_0 .net "orpairintermediate", 0 0, L_0x2a1d7c0; 1 drivers +v0x29c5910_0 .net "orsingleintermediate", 0 0, L_0x2a1d9c0; 1 drivers +v0x29c5a30_0 .net "sum", 0 0, L_0x2a1d000; 1 drivers +S_0x29c4560 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29c3970; + .timescale 0 0; +L_0x2a1de40 .functor AND 1, L_0x2a1eeb0, L_0x2a1efa0, C4<1>, C4<1>; +L_0x2a1e3a0 .functor AND 1, L_0x2a1eeb0, L_0x2a1d8c0, C4<1>, C4<1>; +L_0x2a1e450 .functor AND 1, L_0x2a1efa0, L_0x2a1d8c0, C4<1>, C4<1>; +L_0x2a1e500 .functor OR 1, L_0x2a1de40, L_0x2a1e3a0, C4<0>, C4<0>; +L_0x2a1e600 .functor OR 1, L_0x2a1e500, L_0x2a1e450, C4<0>, C4<0>; +L_0x2a1e700 .functor OR 1, L_0x2a1eeb0, L_0x2a1efa0, C4<0>, C4<0>; +L_0x2a1e760 .functor OR 1, L_0x2a1e700, L_0x2a1d8c0, C4<0>, C4<0>; +L_0x2a1e810 .functor NOT 1, L_0x2a1e600, C4<0>, C4<0>, C4<0>; +L_0x2a1e900 .functor AND 1, L_0x2a1e810, L_0x2a1e760, C4<1>, C4<1>; +L_0x2a1ea00 .functor AND 1, L_0x2a1eeb0, L_0x2a1efa0, C4<1>, C4<1>; +L_0x2a1ebe0 .functor AND 1, L_0x2a1ea00, L_0x2a1d8c0, C4<1>, C4<1>; +L_0x2a1db30 .functor OR 1, L_0x2a1e900, L_0x2a1ebe0, C4<0>, C4<0>; +v0x29c4650_0 .net "a", 0 0, L_0x2a1eeb0; 1 drivers +v0x29c4710_0 .net "ab", 0 0, L_0x2a1de40; 1 drivers +v0x29c47b0_0 .net "acarryin", 0 0, L_0x2a1e3a0; 1 drivers +v0x29c4850_0 .net "andall", 0 0, L_0x2a1ebe0; 1 drivers +v0x29c48d0_0 .net "andsingleintermediate", 0 0, L_0x2a1ea00; 1 drivers +v0x29c4970_0 .net "andsumintermediate", 0 0, L_0x2a1e900; 1 drivers +v0x29c4a10_0 .net "b", 0 0, L_0x2a1efa0; 1 drivers +v0x29c4ab0_0 .net "bcarryin", 0 0, L_0x2a1e450; 1 drivers +v0x29c4ba0_0 .alias "carryin", 0 0, v0x29c7190_0; +v0x29c4c40_0 .alias "carryout", 0 0, v0x29c72c0_0; +v0x29c4cc0_0 .net "invcarryout", 0 0, L_0x2a1e810; 1 drivers +v0x29c4d40_0 .net "orall", 0 0, L_0x2a1e760; 1 drivers +v0x29c4de0_0 .net "orpairintermediate", 0 0, L_0x2a1e500; 1 drivers +v0x29c4e80_0 .net "orsingleintermediate", 0 0, L_0x2a1e700; 1 drivers +v0x29c4fa0_0 .net "sum", 0 0, L_0x2a1db30; 1 drivers +S_0x29c3a60 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29c3970; + .timescale 0 0; +L_0x2a1eb80 .functor AND 1, L_0x2a1fb50, L_0x2a1fc80, C4<1>, C4<1>; +L_0x2a1f040 .functor AND 1, L_0x2a1fb50, L_0x2a1e600, C4<1>, C4<1>; +L_0x2a1f0f0 .functor AND 1, L_0x2a1fc80, L_0x2a1e600, C4<1>, C4<1>; +L_0x2a1f1a0 .functor OR 1, L_0x2a1eb80, L_0x2a1f040, C4<0>, C4<0>; +L_0x2a1f2a0 .functor OR 1, L_0x2a1f1a0, L_0x2a1f0f0, C4<0>, C4<0>; +L_0x2a1f3a0 .functor OR 1, L_0x2a1fb50, L_0x2a1fc80, C4<0>, C4<0>; +L_0x2a1f400 .functor OR 1, L_0x2a1f3a0, L_0x2a1e600, C4<0>, C4<0>; +L_0x2a1f4b0 .functor NOT 1, L_0x2a1f2a0, C4<0>, C4<0>, C4<0>; +L_0x2a1f560 .functor AND 1, L_0x2a1f4b0, L_0x2a1f400, C4<1>, C4<1>; +L_0x2a1f660 .functor AND 1, L_0x2a1fb50, L_0x2a1fc80, C4<1>, C4<1>; +L_0x2a1f840 .functor AND 1, L_0x2a1f660, L_0x2a1e600, C4<1>, C4<1>; +L_0x2a1e870 .functor OR 1, L_0x2a1f560, L_0x2a1f840, C4<0>, C4<0>; +v0x29c3b50_0 .net "a", 0 0, L_0x2a1fb50; 1 drivers +v0x29c3c10_0 .net "ab", 0 0, L_0x2a1eb80; 1 drivers +v0x29c3cb0_0 .net "acarryin", 0 0, L_0x2a1f040; 1 drivers +v0x29c3d50_0 .net "andall", 0 0, L_0x2a1f840; 1 drivers +v0x29c3dd0_0 .net "andsingleintermediate", 0 0, L_0x2a1f660; 1 drivers +v0x29c3e70_0 .net "andsumintermediate", 0 0, L_0x2a1f560; 1 drivers +v0x29c3f10_0 .net "b", 0 0, L_0x2a1fc80; 1 drivers +v0x29c3fb0_0 .net "bcarryin", 0 0, L_0x2a1f0f0; 1 drivers +v0x29c40a0_0 .alias "carryin", 0 0, v0x29c72c0_0; +v0x29c4140_0 .alias "carryout", 0 0, v0x29e0250_0; +v0x29c41c0_0 .net "invcarryout", 0 0, L_0x2a1f4b0; 1 drivers +v0x29c4260_0 .net "orall", 0 0, L_0x2a1f400; 1 drivers +v0x29c4300_0 .net "orpairintermediate", 0 0, L_0x2a1f1a0; 1 drivers +v0x29c43a0_0 .net "orsingleintermediate", 0 0, L_0x2a1f3a0; 1 drivers +v0x29c44c0_0 .net "sum", 0 0, L_0x2a1e870; 1 drivers +S_0x29c0050 .scope module, "adder5" "FullAdder4bit" 19 242, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a23a70 .functor AND 1, L_0x2a240b0, L_0x2a24150, C4<1>, C4<1>; +L_0x2a24270 .functor NOR 1, L_0x2a242d0, L_0x2a24370, C4<0>, C4<0>; +L_0x2a244f0 .functor AND 1, L_0x2a24550, L_0x2a24640, C4<1>, C4<1>; +L_0x2a24460 .functor NOR 1, L_0x2a247d0, L_0x2a249d0, C4<0>, C4<0>; +L_0x2a24730 .functor OR 1, L_0x2a23a70, L_0x2a24270, C4<0>, C4<0>; +L_0x2a24bc0 .functor NOR 1, L_0x2a244f0, L_0x2a24460, C4<0>, C4<0>; +L_0x2a24cc0 .functor AND 1, L_0x2a24730, L_0x2a24bc0, C4<1>, C4<1>; +v0x29c2a50_0 .net *"_s25", 0 0, L_0x2a240b0; 1 drivers +v0x29c2b10_0 .net *"_s27", 0 0, L_0x2a24150; 1 drivers +v0x29c2bb0_0 .net *"_s29", 0 0, L_0x2a242d0; 1 drivers +v0x29c2c50_0 .net *"_s31", 0 0, L_0x2a24370; 1 drivers +v0x29c2cd0_0 .net *"_s33", 0 0, L_0x2a24550; 1 drivers +v0x29c2d70_0 .net *"_s35", 0 0, L_0x2a24640; 1 drivers +v0x29c2e10_0 .net *"_s37", 0 0, L_0x2a247d0; 1 drivers +v0x29c2eb0_0 .net *"_s39", 0 0, L_0x2a249d0; 1 drivers +v0x29c2f50_0 .net "a", 3 0, L_0x2a20c40; 1 drivers +v0x29c2ff0_0 .net "aandb", 0 0, L_0x2a23a70; 1 drivers +v0x29c3090_0 .net "abandnoror", 0 0, L_0x2a24730; 1 drivers +v0x29c3130_0 .net "anorb", 0 0, L_0x2a24270; 1 drivers +v0x29c31d0_0 .net "b", 3 0, L_0x2a20ce0; 1 drivers +v0x29c3270_0 .net "bandsum", 0 0, L_0x2a244f0; 1 drivers +v0x29c3390_0 .net "bnorsum", 0 0, L_0x2a24460; 1 drivers +v0x29c3430_0 .net "bsumandnornor", 0 0, L_0x2a24bc0; 1 drivers +v0x29c32f0_0 .alias "carryin", 0 0, v0x29e0250_0; +v0x29c3560_0 .alias "carryout", 0 0, v0x29e0360_0; +v0x29c34b0_0 .net "carryout1", 0 0, L_0x2a21080; 1 drivers +v0x29c3680_0 .net "carryout2", 0 0, L_0x2a21bb0; 1 drivers +v0x29c37b0_0 .net "carryout3", 0 0, L_0x2a22890; 1 drivers +v0x29c3830_0 .alias "overflow", 0 0, v0x29dd170_0; +v0x29c3700_0 .net8 "sum", 3 0, RS_0x7ff1473e76b8; 4 drivers +L_0x2a21720 .part/pv L_0x2a216c0, 0, 1, 4; +L_0x2a21810 .part L_0x2a20c40, 0, 1; +L_0x2a218b0 .part L_0x2a20ce0, 0, 1; +L_0x2a22310 .part/pv L_0x2a212f0, 1, 1, 4; +L_0x2a22450 .part L_0x2a20c40, 1, 1; +L_0x2a22540 .part L_0x2a20ce0, 1, 1; +L_0x2a23050 .part/pv L_0x2a21e20, 2, 1, 4; +L_0x2a23140 .part L_0x2a20c40, 2, 1; +L_0x2a23230 .part L_0x2a20ce0, 2, 1; +L_0x2a23cb0 .part/pv L_0x2a22b00, 3, 1, 4; +L_0x2a23de0 .part L_0x2a20c40, 3, 1; +L_0x2a23f10 .part L_0x2a20ce0, 3, 1; +L_0x2a240b0 .part L_0x2a20c40, 3, 1; +L_0x2a24150 .part L_0x2a20ce0, 3, 1; +L_0x2a242d0 .part L_0x2a20c40, 3, 1; +L_0x2a24370 .part L_0x2a20ce0, 3, 1; +L_0x2a24550 .part L_0x2a20ce0, 3, 1; +L_0x2a24640 .part RS_0x7ff1473e76b8, 3, 1; +L_0x2a247d0 .part L_0x2a20ce0, 3, 1; +L_0x2a249d0 .part RS_0x7ff1473e76b8, 3, 1; +S_0x29c1fc0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29c0050; + .timescale 0 0; +L_0x2a1ccb0 .functor AND 1, L_0x2a21810, L_0x2a218b0, C4<1>, C4<1>; +L_0x2a1cd10 .functor AND 1, L_0x2a21810, L_0x2a1f2a0, C4<1>, C4<1>; +L_0x2a1cdc0 .functor AND 1, L_0x2a218b0, L_0x2a1f2a0, C4<1>, C4<1>; +L_0x29e02d0 .functor OR 1, L_0x2a1ccb0, L_0x2a1cd10, C4<0>, C4<0>; +L_0x2a21080 .functor OR 1, L_0x29e02d0, L_0x2a1cdc0, C4<0>, C4<0>; +L_0x2a21180 .functor OR 1, L_0x2a21810, L_0x2a218b0, C4<0>, C4<0>; +L_0x2a211e0 .functor OR 1, L_0x2a21180, L_0x2a1f2a0, C4<0>, C4<0>; +L_0x2a21290 .functor NOT 1, L_0x2a21080, C4<0>, C4<0>, C4<0>; +L_0x2a21380 .functor AND 1, L_0x2a21290, L_0x2a211e0, C4<1>, C4<1>; +L_0x2a21480 .functor AND 1, L_0x2a21810, L_0x2a218b0, C4<1>, C4<1>; +L_0x2a21660 .functor AND 1, L_0x2a21480, L_0x2a1f2a0, C4<1>, C4<1>; +L_0x2a216c0 .functor OR 1, L_0x2a21380, L_0x2a21660, C4<0>, C4<0>; +v0x29c20b0_0 .net "a", 0 0, L_0x2a21810; 1 drivers +v0x29c2170_0 .net "ab", 0 0, L_0x2a1ccb0; 1 drivers +v0x29c2210_0 .net "acarryin", 0 0, L_0x2a1cd10; 1 drivers +v0x29c22b0_0 .net "andall", 0 0, L_0x2a21660; 1 drivers +v0x29c2330_0 .net "andsingleintermediate", 0 0, L_0x2a21480; 1 drivers +v0x29c23d0_0 .net "andsumintermediate", 0 0, L_0x2a21380; 1 drivers +v0x29c2470_0 .net "b", 0 0, L_0x2a218b0; 1 drivers +v0x29c2510_0 .net "bcarryin", 0 0, L_0x2a1cdc0; 1 drivers +v0x29c25b0_0 .alias "carryin", 0 0, v0x29e0250_0; +v0x29c2650_0 .alias "carryout", 0 0, v0x29c34b0_0; +v0x29c26d0_0 .net "invcarryout", 0 0, L_0x2a21290; 1 drivers +v0x29c2750_0 .net "orall", 0 0, L_0x2a211e0; 1 drivers +v0x29c27f0_0 .net "orpairintermediate", 0 0, L_0x29e02d0; 1 drivers +v0x29c2890_0 .net "orsingleintermediate", 0 0, L_0x2a21180; 1 drivers +v0x29c29b0_0 .net "sum", 0 0, L_0x2a216c0; 1 drivers +S_0x29c1530 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29c0050; + .timescale 0 0; +L_0x2a21600 .functor AND 1, L_0x2a22450, L_0x2a22540, C4<1>, C4<1>; +L_0x2a21950 .functor AND 1, L_0x2a22450, L_0x2a21080, C4<1>, C4<1>; +L_0x2a21a00 .functor AND 1, L_0x2a22540, L_0x2a21080, C4<1>, C4<1>; +L_0x2a21ab0 .functor OR 1, L_0x2a21600, L_0x2a21950, C4<0>, C4<0>; +L_0x2a21bb0 .functor OR 1, L_0x2a21ab0, L_0x2a21a00, C4<0>, C4<0>; +L_0x2a21cb0 .functor OR 1, L_0x2a22450, L_0x2a22540, C4<0>, C4<0>; +L_0x2a21d10 .functor OR 1, L_0x2a21cb0, L_0x2a21080, C4<0>, C4<0>; +L_0x2a21dc0 .functor NOT 1, L_0x2a21bb0, C4<0>, C4<0>, C4<0>; +L_0x2a21eb0 .functor AND 1, L_0x2a21dc0, L_0x2a21d10, C4<1>, C4<1>; +L_0x2a0f070 .functor AND 1, L_0x2a22450, L_0x2a22540, C4<1>, C4<1>; +L_0x2a22130 .functor AND 1, L_0x2a0f070, L_0x2a21080, C4<1>, C4<1>; +L_0x2a212f0 .functor OR 1, L_0x2a21eb0, L_0x2a22130, C4<0>, C4<0>; +v0x29c1620_0 .net "a", 0 0, L_0x2a22450; 1 drivers +v0x29c16e0_0 .net "ab", 0 0, L_0x2a21600; 1 drivers +v0x29c1780_0 .net "acarryin", 0 0, L_0x2a21950; 1 drivers +v0x29c1820_0 .net "andall", 0 0, L_0x2a22130; 1 drivers +v0x29c18a0_0 .net "andsingleintermediate", 0 0, L_0x2a0f070; 1 drivers +v0x29c1940_0 .net "andsumintermediate", 0 0, L_0x2a21eb0; 1 drivers +v0x29c19e0_0 .net "b", 0 0, L_0x2a22540; 1 drivers +v0x29c1a80_0 .net "bcarryin", 0 0, L_0x2a21a00; 1 drivers +v0x29c1b20_0 .alias "carryin", 0 0, v0x29c34b0_0; +v0x29c1bc0_0 .alias "carryout", 0 0, v0x29c3680_0; +v0x29c1c40_0 .net "invcarryout", 0 0, L_0x2a21dc0; 1 drivers +v0x29c1cc0_0 .net "orall", 0 0, L_0x2a21d10; 1 drivers +v0x29c1d60_0 .net "orpairintermediate", 0 0, L_0x2a21ab0; 1 drivers +v0x29c1e00_0 .net "orsingleintermediate", 0 0, L_0x2a21cb0; 1 drivers +v0x29c1f20_0 .net "sum", 0 0, L_0x2a212f0; 1 drivers +S_0x29c0a50 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29c0050; + .timescale 0 0; +L_0x2a220d0 .functor AND 1, L_0x2a23140, L_0x2a23230, C4<1>, C4<1>; +L_0x2a22630 .functor AND 1, L_0x2a23140, L_0x2a21bb0, C4<1>, C4<1>; +L_0x2a226e0 .functor AND 1, L_0x2a23230, L_0x2a21bb0, C4<1>, C4<1>; +L_0x2a22790 .functor OR 1, L_0x2a220d0, L_0x2a22630, C4<0>, C4<0>; +L_0x2a22890 .functor OR 1, L_0x2a22790, L_0x2a226e0, C4<0>, C4<0>; +L_0x2a22990 .functor OR 1, L_0x2a23140, L_0x2a23230, C4<0>, C4<0>; +L_0x2a229f0 .functor OR 1, L_0x2a22990, L_0x2a21bb0, C4<0>, C4<0>; +L_0x2a22aa0 .functor NOT 1, L_0x2a22890, C4<0>, C4<0>, C4<0>; +L_0x2a22b90 .functor AND 1, L_0x2a22aa0, L_0x2a229f0, C4<1>, C4<1>; +L_0x2a22c90 .functor AND 1, L_0x2a23140, L_0x2a23230, C4<1>, C4<1>; +L_0x2a22e70 .functor AND 1, L_0x2a22c90, L_0x2a21bb0, C4<1>, C4<1>; +L_0x2a21e20 .functor OR 1, L_0x2a22b90, L_0x2a22e70, C4<0>, C4<0>; +v0x29c0b40_0 .net "a", 0 0, L_0x2a23140; 1 drivers +v0x29c0c00_0 .net "ab", 0 0, L_0x2a220d0; 1 drivers +v0x29c0ca0_0 .net "acarryin", 0 0, L_0x2a22630; 1 drivers +v0x29c0d40_0 .net "andall", 0 0, L_0x2a22e70; 1 drivers +v0x29c0dc0_0 .net "andsingleintermediate", 0 0, L_0x2a22c90; 1 drivers +v0x29c0e60_0 .net "andsumintermediate", 0 0, L_0x2a22b90; 1 drivers +v0x29c0f00_0 .net "b", 0 0, L_0x2a23230; 1 drivers +v0x29c0fa0_0 .net "bcarryin", 0 0, L_0x2a226e0; 1 drivers +v0x29c1090_0 .alias "carryin", 0 0, v0x29c3680_0; +v0x29c1130_0 .alias "carryout", 0 0, v0x29c37b0_0; +v0x29c11b0_0 .net "invcarryout", 0 0, L_0x2a22aa0; 1 drivers +v0x29c1230_0 .net "orall", 0 0, L_0x2a229f0; 1 drivers +v0x29c12d0_0 .net "orpairintermediate", 0 0, L_0x2a22790; 1 drivers +v0x29c1370_0 .net "orsingleintermediate", 0 0, L_0x2a22990; 1 drivers +v0x29c1490_0 .net "sum", 0 0, L_0x2a21e20; 1 drivers +S_0x29c0140 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29c0050; + .timescale 0 0; +L_0x2a22e10 .functor AND 1, L_0x2a23de0, L_0x2a23f10, C4<1>, C4<1>; +L_0x2a232d0 .functor AND 1, L_0x2a23de0, L_0x2a22890, C4<1>, C4<1>; +L_0x2a23380 .functor AND 1, L_0x2a23f10, L_0x2a22890, C4<1>, C4<1>; +L_0x2a23430 .functor OR 1, L_0x2a22e10, L_0x2a232d0, C4<0>, C4<0>; +L_0x2a23530 .functor OR 1, L_0x2a23430, L_0x2a23380, C4<0>, C4<0>; +L_0x2a23630 .functor OR 1, L_0x2a23de0, L_0x2a23f10, C4<0>, C4<0>; +L_0x2a23690 .functor OR 1, L_0x2a23630, L_0x2a22890, C4<0>, C4<0>; +L_0x2a23740 .functor NOT 1, L_0x2a23530, C4<0>, C4<0>, C4<0>; +L_0x2a237f0 .functor AND 1, L_0x2a23740, L_0x2a23690, C4<1>, C4<1>; +L_0x2a238f0 .functor AND 1, L_0x2a23de0, L_0x2a23f10, C4<1>, C4<1>; +L_0x2a23ad0 .functor AND 1, L_0x2a238f0, L_0x2a22890, C4<1>, C4<1>; +L_0x2a22b00 .functor OR 1, L_0x2a237f0, L_0x2a23ad0, C4<0>, C4<0>; +v0x29c0230_0 .net "a", 0 0, L_0x2a23de0; 1 drivers +v0x29c02b0_0 .net "ab", 0 0, L_0x2a22e10; 1 drivers +v0x29c0330_0 .net "acarryin", 0 0, L_0x2a232d0; 1 drivers +v0x29c03b0_0 .net "andall", 0 0, L_0x2a23ad0; 1 drivers +v0x29c0430_0 .net "andsingleintermediate", 0 0, L_0x2a238f0; 1 drivers +v0x29c04b0_0 .net "andsumintermediate", 0 0, L_0x2a237f0; 1 drivers +v0x29c0530_0 .net "b", 0 0, L_0x2a23f10; 1 drivers +v0x29c05b0_0 .net "bcarryin", 0 0, L_0x2a23380; 1 drivers +v0x29c0630_0 .alias "carryin", 0 0, v0x29c37b0_0; +v0x29c06b0_0 .alias "carryout", 0 0, v0x29e0360_0; +v0x29c0730_0 .net "invcarryout", 0 0, L_0x2a23740; 1 drivers +v0x29c07b0_0 .net "orall", 0 0, L_0x2a23690; 1 drivers +v0x29c0830_0 .net "orpairintermediate", 0 0, L_0x2a23430; 1 drivers +v0x29c08b0_0 .net "orsingleintermediate", 0 0, L_0x2a23630; 1 drivers +v0x29c09b0_0 .net "sum", 0 0, L_0x2a22b00; 1 drivers +S_0x29bc860 .scope module, "adder6" "FullAdder4bit" 19 243, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a27df0 .functor AND 1, L_0x2a28430, L_0x2a284d0, C4<1>, C4<1>; +L_0x2a28570 .functor NOR 1, L_0x2a285d0, L_0x2a28670, C4<0>, C4<0>; +L_0x2a287f0 .functor AND 1, L_0x2a28850, L_0x2a28940, C4<1>, C4<1>; +L_0x2a28760 .functor NOR 1, L_0x2a28ad0, L_0x2a28cd0, C4<0>, C4<0>; +L_0x2a28a30 .functor OR 1, L_0x2a27df0, L_0x2a28570, C4<0>, C4<0>; +L_0x2a28ec0 .functor NOR 1, L_0x2a287f0, L_0x2a28760, C4<0>, C4<0>; +L_0x2a28fc0 .functor AND 1, L_0x2a28a30, L_0x2a28ec0, C4<1>, C4<1>; +v0x29bf3b0_0 .net *"_s25", 0 0, L_0x2a28430; 1 drivers +v0x29bf430_0 .net *"_s27", 0 0, L_0x2a284d0; 1 drivers +v0x29bf4b0_0 .net *"_s29", 0 0, L_0x2a285d0; 1 drivers +v0x29bf530_0 .net *"_s31", 0 0, L_0x2a28670; 1 drivers +v0x29bf5b0_0 .net *"_s33", 0 0, L_0x2a28850; 1 drivers +v0x29bf630_0 .net *"_s35", 0 0, L_0x2a28940; 1 drivers +v0x29bf6b0_0 .net *"_s37", 0 0, L_0x2a28ad0; 1 drivers +v0x29bf730_0 .net *"_s39", 0 0, L_0x2a28cd0; 1 drivers +v0x29bf7b0_0 .net "a", 3 0, L_0x2a292c0; 1 drivers +v0x29bf830_0 .net "aandb", 0 0, L_0x2a27df0; 1 drivers +v0x29bf8b0_0 .net "abandnoror", 0 0, L_0x2a28a30; 1 drivers +v0x29bf930_0 .net "anorb", 0 0, L_0x2a28570; 1 drivers +v0x29bf9b0_0 .net "b", 3 0, L_0x2a24eb0; 1 drivers +v0x29bfa30_0 .net "bandsum", 0 0, L_0x2a287f0; 1 drivers +v0x29bfb30_0 .net "bnorsum", 0 0, L_0x2a28760; 1 drivers +v0x29bfbb0_0 .net "bsumandnornor", 0 0, L_0x2a28ec0; 1 drivers +v0x29bfab0_0 .alias "carryin", 0 0, v0x29e0360_0; +v0x29bfcc0_0 .alias "carryout", 0 0, v0x29dffd0_0; +v0x29bfc30_0 .net "carryout1", 0 0, L_0x2a253c0; 1 drivers +v0x29bfde0_0 .net "carryout2", 0 0, L_0x2a25ef0; 1 drivers +v0x29bfd40_0 .net "carryout3", 0 0, L_0x2a26c20; 1 drivers +v0x29bff10_0 .alias "overflow", 0 0, v0x29dd1f0_0; +v0x29bfe60_0 .net8 "sum", 3 0, RS_0x7ff1473e68d8; 4 drivers +L_0x2a25a60 .part/pv L_0x2a25a00, 0, 1, 4; +L_0x2a25b50 .part L_0x2a292c0, 0, 1; +L_0x2a25bf0 .part L_0x2a24eb0, 0, 1; +L_0x2a266a0 .part/pv L_0x2a25630, 1, 1, 4; +L_0x2a267e0 .part L_0x2a292c0, 1, 1; +L_0x2a268d0 .part L_0x2a24eb0, 1, 1; +L_0x2a273d0 .part/pv L_0x2a26160, 2, 1, 4; +L_0x2a274c0 .part L_0x2a292c0, 2, 1; +L_0x2a275b0 .part L_0x2a24eb0, 2, 1; +L_0x2a28030 .part/pv L_0x2a26e90, 3, 1, 4; +L_0x2a28160 .part L_0x2a292c0, 3, 1; +L_0x2a28290 .part L_0x2a24eb0, 3, 1; +L_0x2a28430 .part L_0x2a292c0, 3, 1; +L_0x2a284d0 .part L_0x2a24eb0, 3, 1; +L_0x2a285d0 .part L_0x2a292c0, 3, 1; +L_0x2a28670 .part L_0x2a24eb0, 3, 1; +L_0x2a28850 .part L_0x2a24eb0, 3, 1; +L_0x2a28940 .part RS_0x7ff1473e68d8, 3, 1; +L_0x2a28ad0 .part L_0x2a24eb0, 3, 1; +L_0x2a28cd0 .part RS_0x7ff1473e68d8, 3, 1; +S_0x29be9c0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29bc860; + .timescale 0 0; +L_0x2a20d80 .functor AND 1, L_0x2a25b50, L_0x2a25bf0, C4<1>, C4<1>; +L_0x2a20de0 .functor AND 1, L_0x2a25b50, L_0x2a23530, C4<1>, C4<1>; +L_0x2a25160 .functor AND 1, L_0x2a25bf0, L_0x2a23530, C4<1>, C4<1>; +L_0x29dff40 .functor OR 1, L_0x2a20d80, L_0x2a20de0, C4<0>, C4<0>; +L_0x2a253c0 .functor OR 1, L_0x29dff40, L_0x2a25160, C4<0>, C4<0>; +L_0x2a254c0 .functor OR 1, L_0x2a25b50, L_0x2a25bf0, C4<0>, C4<0>; +L_0x2a25520 .functor OR 1, L_0x2a254c0, L_0x2a23530, C4<0>, C4<0>; +L_0x2a255d0 .functor NOT 1, L_0x2a253c0, C4<0>, C4<0>, C4<0>; +L_0x2a256c0 .functor AND 1, L_0x2a255d0, L_0x2a25520, C4<1>, C4<1>; +L_0x2a257c0 .functor AND 1, L_0x2a25b50, L_0x2a25bf0, C4<1>, C4<1>; +L_0x2a259a0 .functor AND 1, L_0x2a257c0, L_0x2a23530, C4<1>, C4<1>; +L_0x2a25a00 .functor OR 1, L_0x2a256c0, L_0x2a259a0, C4<0>, C4<0>; +v0x29beab0_0 .net "a", 0 0, L_0x2a25b50; 1 drivers +v0x29beb70_0 .net "ab", 0 0, L_0x2a20d80; 1 drivers +v0x29bec10_0 .net "acarryin", 0 0, L_0x2a20de0; 1 drivers +v0x29becb0_0 .net "andall", 0 0, L_0x2a259a0; 1 drivers +v0x29bed30_0 .net "andsingleintermediate", 0 0, L_0x2a257c0; 1 drivers +v0x29bedd0_0 .net "andsumintermediate", 0 0, L_0x2a256c0; 1 drivers +v0x29bee70_0 .net "b", 0 0, L_0x2a25bf0; 1 drivers +v0x29bef10_0 .net "bcarryin", 0 0, L_0x2a25160; 1 drivers +v0x29befb0_0 .alias "carryin", 0 0, v0x29e0360_0; +v0x29bf030_0 .alias "carryout", 0 0, v0x29bfc30_0; +v0x29bf0b0_0 .net "invcarryout", 0 0, L_0x2a255d0; 1 drivers +v0x29bf130_0 .net "orall", 0 0, L_0x2a25520; 1 drivers +v0x29bf1b0_0 .net "orpairintermediate", 0 0, L_0x29dff40; 1 drivers +v0x29bf230_0 .net "orsingleintermediate", 0 0, L_0x2a254c0; 1 drivers +v0x29bf330_0 .net "sum", 0 0, L_0x2a25a00; 1 drivers +S_0x29bdf30 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29bc860; + .timescale 0 0; +L_0x2a25940 .functor AND 1, L_0x2a267e0, L_0x2a268d0, C4<1>, C4<1>; +L_0x2a25c90 .functor AND 1, L_0x2a267e0, L_0x2a253c0, C4<1>, C4<1>; +L_0x2a25d40 .functor AND 1, L_0x2a268d0, L_0x2a253c0, C4<1>, C4<1>; +L_0x2a25df0 .functor OR 1, L_0x2a25940, L_0x2a25c90, C4<0>, C4<0>; +L_0x2a25ef0 .functor OR 1, L_0x2a25df0, L_0x2a25d40, C4<0>, C4<0>; +L_0x2a25ff0 .functor OR 1, L_0x2a267e0, L_0x2a268d0, C4<0>, C4<0>; +L_0x2a26050 .functor OR 1, L_0x2a25ff0, L_0x2a253c0, C4<0>, C4<0>; +L_0x2a26100 .functor NOT 1, L_0x2a25ef0, C4<0>, C4<0>, C4<0>; +L_0x2766570 .functor AND 1, L_0x2a26100, L_0x2a26050, C4<1>, C4<1>; +L_0x2a262e0 .functor AND 1, L_0x2a267e0, L_0x2a268d0, C4<1>, C4<1>; +L_0x2a264c0 .functor AND 1, L_0x2a262e0, L_0x2a253c0, C4<1>, C4<1>; +L_0x2a25630 .functor OR 1, L_0x2766570, L_0x2a264c0, C4<0>, C4<0>; +v0x29be020_0 .net "a", 0 0, L_0x2a267e0; 1 drivers +v0x29be0e0_0 .net "ab", 0 0, L_0x2a25940; 1 drivers +v0x29be180_0 .net "acarryin", 0 0, L_0x2a25c90; 1 drivers +v0x29be220_0 .net "andall", 0 0, L_0x2a264c0; 1 drivers +v0x29be2a0_0 .net "andsingleintermediate", 0 0, L_0x2a262e0; 1 drivers +v0x29be340_0 .net "andsumintermediate", 0 0, L_0x2766570; 1 drivers +v0x29be3e0_0 .net "b", 0 0, L_0x2a268d0; 1 drivers +v0x29be480_0 .net "bcarryin", 0 0, L_0x2a25d40; 1 drivers +v0x29be520_0 .alias "carryin", 0 0, v0x29bfc30_0; +v0x29be5c0_0 .alias "carryout", 0 0, v0x29bfde0_0; +v0x29be640_0 .net "invcarryout", 0 0, L_0x2a26100; 1 drivers +v0x29be6c0_0 .net "orall", 0 0, L_0x2a26050; 1 drivers +v0x29be760_0 .net "orpairintermediate", 0 0, L_0x2a25df0; 1 drivers +v0x29be800_0 .net "orsingleintermediate", 0 0, L_0x2a25ff0; 1 drivers +v0x29be920_0 .net "sum", 0 0, L_0x2a25630; 1 drivers +S_0x29bd450 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29bc860; + .timescale 0 0; +L_0x2a26460 .functor AND 1, L_0x2a274c0, L_0x2a275b0, C4<1>, C4<1>; +L_0x2a269c0 .functor AND 1, L_0x2a274c0, L_0x2a25ef0, C4<1>, C4<1>; +L_0x2a26a70 .functor AND 1, L_0x2a275b0, L_0x2a25ef0, C4<1>, C4<1>; +L_0x2a26b20 .functor OR 1, L_0x2a26460, L_0x2a269c0, C4<0>, C4<0>; +L_0x2a26c20 .functor OR 1, L_0x2a26b20, L_0x2a26a70, C4<0>, C4<0>; +L_0x2a26d20 .functor OR 1, L_0x2a274c0, L_0x2a275b0, C4<0>, C4<0>; +L_0x2a26d80 .functor OR 1, L_0x2a26d20, L_0x2a25ef0, C4<0>, C4<0>; +L_0x2a26e30 .functor NOT 1, L_0x2a26c20, C4<0>, C4<0>, C4<0>; +L_0x2839ab0 .functor AND 1, L_0x2a26e30, L_0x2a26d80, C4<1>, C4<1>; +L_0x2a27010 .functor AND 1, L_0x2a274c0, L_0x2a275b0, C4<1>, C4<1>; +L_0x2a271f0 .functor AND 1, L_0x2a27010, L_0x2a25ef0, C4<1>, C4<1>; +L_0x2a26160 .functor OR 1, L_0x2839ab0, L_0x2a271f0, C4<0>, C4<0>; +v0x29bd540_0 .net "a", 0 0, L_0x2a274c0; 1 drivers +v0x29bd600_0 .net "ab", 0 0, L_0x2a26460; 1 drivers +v0x29bd6a0_0 .net "acarryin", 0 0, L_0x2a269c0; 1 drivers +v0x29bd740_0 .net "andall", 0 0, L_0x2a271f0; 1 drivers +v0x29bd7c0_0 .net "andsingleintermediate", 0 0, L_0x2a27010; 1 drivers +v0x29bd860_0 .net "andsumintermediate", 0 0, L_0x2839ab0; 1 drivers +v0x29bd900_0 .net "b", 0 0, L_0x2a275b0; 1 drivers +v0x29bd9a0_0 .net "bcarryin", 0 0, L_0x2a26a70; 1 drivers +v0x29bda90_0 .alias "carryin", 0 0, v0x29bfde0_0; +v0x29bdb30_0 .alias "carryout", 0 0, v0x29bfd40_0; +v0x29bdbb0_0 .net "invcarryout", 0 0, L_0x2a26e30; 1 drivers +v0x29bdc30_0 .net "orall", 0 0, L_0x2a26d80; 1 drivers +v0x29bdcd0_0 .net "orpairintermediate", 0 0, L_0x2a26b20; 1 drivers +v0x29bdd70_0 .net "orsingleintermediate", 0 0, L_0x2a26d20; 1 drivers +v0x29bde90_0 .net "sum", 0 0, L_0x2a26160; 1 drivers +S_0x29bc950 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29bc860; + .timescale 0 0; +L_0x2a27190 .functor AND 1, L_0x2a28160, L_0x2a28290, C4<1>, C4<1>; +L_0x2a27650 .functor AND 1, L_0x2a28160, L_0x2a26c20, C4<1>, C4<1>; +L_0x2a27700 .functor AND 1, L_0x2a28290, L_0x2a26c20, C4<1>, C4<1>; +L_0x2a277b0 .functor OR 1, L_0x2a27190, L_0x2a27650, C4<0>, C4<0>; +L_0x2a278b0 .functor OR 1, L_0x2a277b0, L_0x2a27700, C4<0>, C4<0>; +L_0x2a279b0 .functor OR 1, L_0x2a28160, L_0x2a28290, C4<0>, C4<0>; +L_0x2a27a10 .functor OR 1, L_0x2a279b0, L_0x2a26c20, C4<0>, C4<0>; +L_0x2a27ac0 .functor NOT 1, L_0x2a278b0, C4<0>, C4<0>, C4<0>; +L_0x2a27b70 .functor AND 1, L_0x2a27ac0, L_0x2a27a10, C4<1>, C4<1>; +L_0x2a27c70 .functor AND 1, L_0x2a28160, L_0x2a28290, C4<1>, C4<1>; +L_0x2a27e50 .functor AND 1, L_0x2a27c70, L_0x2a26c20, C4<1>, C4<1>; +L_0x2a26e90 .functor OR 1, L_0x2a27b70, L_0x2a27e50, C4<0>, C4<0>; +v0x29bca40_0 .net "a", 0 0, L_0x2a28160; 1 drivers +v0x29bcae0_0 .net "ab", 0 0, L_0x2a27190; 1 drivers +v0x29bcb80_0 .net "acarryin", 0 0, L_0x2a27650; 1 drivers +v0x29bcc20_0 .net "andall", 0 0, L_0x2a27e50; 1 drivers +v0x29bccc0_0 .net "andsingleintermediate", 0 0, L_0x2a27c70; 1 drivers +v0x29bcd60_0 .net "andsumintermediate", 0 0, L_0x2a27b70; 1 drivers +v0x29bce00_0 .net "b", 0 0, L_0x2a28290; 1 drivers +v0x29bcea0_0 .net "bcarryin", 0 0, L_0x2a27700; 1 drivers +v0x29bcf90_0 .alias "carryin", 0 0, v0x29bfd40_0; +v0x29bd030_0 .alias "carryout", 0 0, v0x29dffd0_0; +v0x29bd0b0_0 .net "invcarryout", 0 0, L_0x2a27ac0; 1 drivers +v0x29bd150_0 .net "orall", 0 0, L_0x2a27a10; 1 drivers +v0x29bd1f0_0 .net "orpairintermediate", 0 0, L_0x2a277b0; 1 drivers +v0x29bd290_0 .net "orsingleintermediate", 0 0, L_0x2a279b0; 1 drivers +v0x29bd3b0_0 .net "sum", 0 0, L_0x2a26e90; 1 drivers +S_0x29b8dd0 .scope module, "adder7" "FullAdder4bit" 19 244, 3 47, S_0x29b8ce0; + .timescale 0 0; +L_0x2a2c1c0 .functor AND 1, L_0x2a2c800, L_0x2a2c8a0, C4<1>, C4<1>; +L_0x2a2c940 .functor NOR 1, L_0x2a2c9a0, L_0x2a2ca40, C4<0>, C4<0>; +L_0x2a2cbc0 .functor AND 1, L_0x2a2cc20, L_0x2a2cd10, C4<1>, C4<1>; +L_0x2a2cb30 .functor NOR 1, L_0x2a2cea0, L_0x2a2d0a0, C4<0>, C4<0>; +L_0x2a2ce00 .functor OR 1, L_0x2a2c1c0, L_0x2a2c940, C4<0>, C4<0>; +L_0x2a2d290 .functor NOR 1, L_0x2a2cbc0, L_0x2a2cb30, C4<0>, C4<0>; +L_0x2a2d390 .functor AND 1, L_0x2a2ce00, L_0x2a2d290, C4<1>, C4<1>; +v0x29bb940_0 .net *"_s25", 0 0, L_0x2a2c800; 1 drivers +v0x29bba00_0 .net *"_s27", 0 0, L_0x2a2c8a0; 1 drivers +v0x29bbaa0_0 .net *"_s29", 0 0, L_0x2a2c9a0; 1 drivers +v0x29bbb40_0 .net *"_s31", 0 0, L_0x2a2ca40; 1 drivers +v0x29bbbc0_0 .net *"_s33", 0 0, L_0x2a2cc20; 1 drivers +v0x29bbc60_0 .net *"_s35", 0 0, L_0x2a2cd10; 1 drivers +v0x29bbd00_0 .net *"_s37", 0 0, L_0x2a2cea0; 1 drivers +v0x29bbda0_0 .net *"_s39", 0 0, L_0x2a2d0a0; 1 drivers +v0x29bbe40_0 .net "a", 3 0, L_0x2a29360; 1 drivers +v0x29bbee0_0 .net "aandb", 0 0, L_0x2a2c1c0; 1 drivers +v0x29bbf80_0 .net "abandnoror", 0 0, L_0x2a2ce00; 1 drivers +v0x29bc020_0 .net "anorb", 0 0, L_0x2a2c940; 1 drivers +v0x29bc0c0_0 .net "b", 3 0, L_0x2a29400; 1 drivers +v0x29bc160_0 .net "bandsum", 0 0, L_0x2a2cbc0; 1 drivers +v0x29bc280_0 .net "bnorsum", 0 0, L_0x2a2cb30; 1 drivers +v0x29bc320_0 .net "bsumandnornor", 0 0, L_0x2a2d290; 1 drivers +v0x29bc1e0_0 .alias "carryin", 0 0, v0x29dffd0_0; +v0x29bc450_0 .alias "carryout", 0 0, v0x29e0a40_0; +v0x29bc3a0_0 .net "carryout1", 0 0, L_0x2a29730; 1 drivers +v0x29bc570_0 .net "carryout2", 0 0, L_0x2a2a260; 1 drivers +v0x29bc6a0_0 .net "carryout3", 0 0, L_0x2a2afa0; 1 drivers +v0x29bc720_0 .alias "overflow", 0 0, v0x29e0ac0_0; +v0x29bc5f0_0 .net8 "sum", 3 0, RS_0x7ff1473e5af8; 4 drivers +L_0x2a29dd0 .part/pv L_0x2a29d70, 0, 1, 4; +L_0x2a29ec0 .part L_0x2a29360, 0, 1; +L_0x2a29f60 .part L_0x2a29400, 0, 1; +L_0x2a2aa20 .part/pv L_0x2a299a0, 1, 1, 4; +L_0x2a2ab60 .part L_0x2a29360, 1, 1; +L_0x2a2ac50 .part L_0x2a29400, 1, 1; +L_0x2a2b760 .part/pv L_0x2a2a4d0, 2, 1, 4; +L_0x2a2b850 .part L_0x2a29360, 2, 1; +L_0x2a2b940 .part L_0x2a29400, 2, 1; +L_0x2a2c400 .part/pv L_0x2a2b210, 3, 1, 4; +L_0x2a2c530 .part L_0x2a29360, 3, 1; +L_0x2a2c660 .part L_0x2a29400, 3, 1; +L_0x2a2c800 .part L_0x2a29360, 3, 1; +L_0x2a2c8a0 .part L_0x2a29400, 3, 1; +L_0x2a2c9a0 .part L_0x2a29360, 3, 1; +L_0x2a2ca40 .part L_0x2a29400, 3, 1; +L_0x2a2cc20 .part L_0x2a29400, 3, 1; +L_0x2a2cd10 .part RS_0x7ff1473e5af8, 3, 1; +L_0x2a2cea0 .part L_0x2a29400, 3, 1; +L_0x2a2d0a0 .part RS_0x7ff1473e5af8, 3, 1; +S_0x29baeb0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29b8dd0; + .timescale 0 0; +L_0x2a24f50 .functor AND 1, L_0x2a29ec0, L_0x2a29f60, C4<1>, C4<1>; +L_0x2a24fb0 .functor AND 1, L_0x2a29ec0, L_0x2a278b0, C4<1>, C4<1>; +L_0x2a25060 .functor AND 1, L_0x2a29f60, L_0x2a278b0, C4<1>, C4<1>; +L_0x2a18440 .functor OR 1, L_0x2a24f50, L_0x2a24fb0, C4<0>, C4<0>; +L_0x2a29730 .functor OR 1, L_0x2a18440, L_0x2a25060, C4<0>, C4<0>; +L_0x2a29830 .functor OR 1, L_0x2a29ec0, L_0x2a29f60, C4<0>, C4<0>; +L_0x2a29890 .functor OR 1, L_0x2a29830, L_0x2a278b0, C4<0>, C4<0>; +L_0x2a29940 .functor NOT 1, L_0x2a29730, C4<0>, C4<0>, C4<0>; +L_0x2a29a30 .functor AND 1, L_0x2a29940, L_0x2a29890, C4<1>, C4<1>; +L_0x2a29b30 .functor AND 1, L_0x2a29ec0, L_0x2a29f60, C4<1>, C4<1>; +L_0x2a29d10 .functor AND 1, L_0x2a29b30, L_0x2a278b0, C4<1>, C4<1>; +L_0x2a29d70 .functor OR 1, L_0x2a29a30, L_0x2a29d10, C4<0>, C4<0>; +v0x29bafa0_0 .net "a", 0 0, L_0x2a29ec0; 1 drivers +v0x29bb060_0 .net "ab", 0 0, L_0x2a24f50; 1 drivers +v0x29bb100_0 .net "acarryin", 0 0, L_0x2a24fb0; 1 drivers +v0x29bb1a0_0 .net "andall", 0 0, L_0x2a29d10; 1 drivers +v0x29bb220_0 .net "andsingleintermediate", 0 0, L_0x2a29b30; 1 drivers +v0x29bb2c0_0 .net "andsumintermediate", 0 0, L_0x2a29a30; 1 drivers +v0x29bb360_0 .net "b", 0 0, L_0x2a29f60; 1 drivers +v0x29bb400_0 .net "bcarryin", 0 0, L_0x2a25060; 1 drivers +v0x29bb4a0_0 .alias "carryin", 0 0, v0x29dffd0_0; +v0x29bb540_0 .alias "carryout", 0 0, v0x29bc3a0_0; +v0x29bb5c0_0 .net "invcarryout", 0 0, L_0x2a29940; 1 drivers +v0x29bb640_0 .net "orall", 0 0, L_0x2a29890; 1 drivers +v0x29bb6e0_0 .net "orpairintermediate", 0 0, L_0x2a18440; 1 drivers +v0x29bb780_0 .net "orsingleintermediate", 0 0, L_0x2a29830; 1 drivers +v0x29bb8a0_0 .net "sum", 0 0, L_0x2a29d70; 1 drivers +S_0x29ba420 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29b8dd0; + .timescale 0 0; +L_0x2a29cb0 .functor AND 1, L_0x2a2ab60, L_0x2a2ac50, C4<1>, C4<1>; +L_0x2a2a000 .functor AND 1, L_0x2a2ab60, L_0x2a29730, C4<1>, C4<1>; +L_0x2a2a0b0 .functor AND 1, L_0x2a2ac50, L_0x2a29730, C4<1>, C4<1>; +L_0x2a2a160 .functor OR 1, L_0x2a29cb0, L_0x2a2a000, C4<0>, C4<0>; +L_0x2a2a260 .functor OR 1, L_0x2a2a160, L_0x2a2a0b0, C4<0>, C4<0>; +L_0x2a2a360 .functor OR 1, L_0x2a2ab60, L_0x2a2ac50, C4<0>, C4<0>; +L_0x2a2a3c0 .functor OR 1, L_0x2a2a360, L_0x2a29730, C4<0>, C4<0>; +L_0x2a2a470 .functor NOT 1, L_0x2a2a260, C4<0>, C4<0>, C4<0>; +L_0x2a2a560 .functor AND 1, L_0x2a2a470, L_0x2a2a3c0, C4<1>, C4<1>; +L_0x2a2a660 .functor AND 1, L_0x2a2ab60, L_0x2a2ac50, C4<1>, C4<1>; +L_0x2a2a840 .functor AND 1, L_0x2a2a660, L_0x2a29730, C4<1>, C4<1>; +L_0x2a299a0 .functor OR 1, L_0x2a2a560, L_0x2a2a840, C4<0>, C4<0>; +v0x29ba510_0 .net "a", 0 0, L_0x2a2ab60; 1 drivers +v0x29ba5d0_0 .net "ab", 0 0, L_0x2a29cb0; 1 drivers +v0x29ba670_0 .net "acarryin", 0 0, L_0x2a2a000; 1 drivers +v0x29ba710_0 .net "andall", 0 0, L_0x2a2a840; 1 drivers +v0x29ba790_0 .net "andsingleintermediate", 0 0, L_0x2a2a660; 1 drivers +v0x29ba830_0 .net "andsumintermediate", 0 0, L_0x2a2a560; 1 drivers +v0x29ba8d0_0 .net "b", 0 0, L_0x2a2ac50; 1 drivers +v0x29ba970_0 .net "bcarryin", 0 0, L_0x2a2a0b0; 1 drivers +v0x29baa10_0 .alias "carryin", 0 0, v0x29bc3a0_0; +v0x29baab0_0 .alias "carryout", 0 0, v0x29bc570_0; +v0x29bab30_0 .net "invcarryout", 0 0, L_0x2a2a470; 1 drivers +v0x29babb0_0 .net "orall", 0 0, L_0x2a2a3c0; 1 drivers +v0x29bac50_0 .net "orpairintermediate", 0 0, L_0x2a2a160; 1 drivers +v0x29bacf0_0 .net "orsingleintermediate", 0 0, L_0x2a2a360; 1 drivers +v0x29bae10_0 .net "sum", 0 0, L_0x2a299a0; 1 drivers +S_0x29b9990 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29b8dd0; + .timescale 0 0; +L_0x2a2a7e0 .functor AND 1, L_0x2a2b850, L_0x2a2b940, C4<1>, C4<1>; +L_0x2a2ad40 .functor AND 1, L_0x2a2b850, L_0x2a2a260, C4<1>, C4<1>; +L_0x2a2adf0 .functor AND 1, L_0x2a2b940, L_0x2a2a260, C4<1>, C4<1>; +L_0x2a2aea0 .functor OR 1, L_0x2a2a7e0, L_0x2a2ad40, C4<0>, C4<0>; +L_0x2a2afa0 .functor OR 1, L_0x2a2aea0, L_0x2a2adf0, C4<0>, C4<0>; +L_0x2a2b0a0 .functor OR 1, L_0x2a2b850, L_0x2a2b940, C4<0>, C4<0>; +L_0x2a2b100 .functor OR 1, L_0x2a2b0a0, L_0x2a2a260, C4<0>, C4<0>; +L_0x2a2b1b0 .functor NOT 1, L_0x2a2afa0, C4<0>, C4<0>, C4<0>; +L_0x2a2b2a0 .functor AND 1, L_0x2a2b1b0, L_0x2a2b100, C4<1>, C4<1>; +L_0x2a2b3a0 .functor AND 1, L_0x2a2b850, L_0x2a2b940, C4<1>, C4<1>; +L_0x2a2b580 .functor AND 1, L_0x2a2b3a0, L_0x2a2a260, C4<1>, C4<1>; +L_0x2a2a4d0 .functor OR 1, L_0x2a2b2a0, L_0x2a2b580, C4<0>, C4<0>; +v0x29b9a80_0 .net "a", 0 0, L_0x2a2b850; 1 drivers +v0x29b9b40_0 .net "ab", 0 0, L_0x2a2a7e0; 1 drivers +v0x29b9be0_0 .net "acarryin", 0 0, L_0x2a2ad40; 1 drivers +v0x29b9c80_0 .net "andall", 0 0, L_0x2a2b580; 1 drivers +v0x29b9d00_0 .net "andsingleintermediate", 0 0, L_0x2a2b3a0; 1 drivers +v0x29b9da0_0 .net "andsumintermediate", 0 0, L_0x2a2b2a0; 1 drivers +v0x29b9e40_0 .net "b", 0 0, L_0x2a2b940; 1 drivers +v0x29b9ee0_0 .net "bcarryin", 0 0, L_0x2a2adf0; 1 drivers +v0x29b9f80_0 .alias "carryin", 0 0, v0x29bc570_0; +v0x29ba020_0 .alias "carryout", 0 0, v0x29bc6a0_0; +v0x29ba0a0_0 .net "invcarryout", 0 0, L_0x2a2b1b0; 1 drivers +v0x29ba120_0 .net "orall", 0 0, L_0x2a2b100; 1 drivers +v0x29ba1c0_0 .net "orpairintermediate", 0 0, L_0x2a2aea0; 1 drivers +v0x29ba260_0 .net "orsingleintermediate", 0 0, L_0x2a2b0a0; 1 drivers +v0x29ba380_0 .net "sum", 0 0, L_0x2a2a4d0; 1 drivers +S_0x29b8ec0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29b8dd0; + .timescale 0 0; +L_0x2a2b520 .functor AND 1, L_0x2a2c530, L_0x2a2c660, C4<1>, C4<1>; +L_0x2a2b9e0 .functor AND 1, L_0x2a2c530, L_0x2a2afa0, C4<1>, C4<1>; +L_0x2a2ba90 .functor AND 1, L_0x2a2c660, L_0x2a2afa0, C4<1>, C4<1>; +L_0x2a2bb40 .functor OR 1, L_0x2a2b520, L_0x2a2b9e0, C4<0>, C4<0>; +L_0x2a2bc40 .functor OR 1, L_0x2a2bb40, L_0x2a2ba90, C4<0>, C4<0>; +L_0x2a2bd80 .functor OR 1, L_0x2a2c530, L_0x2a2c660, C4<0>, C4<0>; +L_0x2a2bde0 .functor OR 1, L_0x2a2bd80, L_0x2a2afa0, C4<0>, C4<0>; +L_0x2a2be90 .functor NOT 1, L_0x2a2bc40, C4<0>, C4<0>, C4<0>; +L_0x2a2bf40 .functor AND 1, L_0x2a2be90, L_0x2a2bde0, C4<1>, C4<1>; +L_0x2a2c040 .functor AND 1, L_0x2a2c530, L_0x2a2c660, C4<1>, C4<1>; +L_0x2a2c220 .functor AND 1, L_0x2a2c040, L_0x2a2afa0, C4<1>, C4<1>; +L_0x2a2b210 .functor OR 1, L_0x2a2bf40, L_0x2a2c220, C4<0>, C4<0>; +v0x29b8fb0_0 .net "a", 0 0, L_0x2a2c530; 1 drivers +v0x29b9070_0 .net "ab", 0 0, L_0x2a2b520; 1 drivers +v0x29b9110_0 .net "acarryin", 0 0, L_0x2a2b9e0; 1 drivers +v0x29b91b0_0 .net "andall", 0 0, L_0x2a2c220; 1 drivers +v0x29b9230_0 .net "andsingleintermediate", 0 0, L_0x2a2c040; 1 drivers +v0x29b92d0_0 .net "andsumintermediate", 0 0, L_0x2a2bf40; 1 drivers +v0x29b9370_0 .net "b", 0 0, L_0x2a2c660; 1 drivers +v0x29b9410_0 .net "bcarryin", 0 0, L_0x2a2ba90; 1 drivers +v0x29b94b0_0 .alias "carryin", 0 0, v0x29bc6a0_0; +v0x29b9550_0 .alias "carryout", 0 0, v0x29e0a40_0; +v0x29b95f0_0 .net "invcarryout", 0 0, L_0x2a2be90; 1 drivers +v0x29b9690_0 .net "orall", 0 0, L_0x2a2bde0; 1 drivers +v0x29b9730_0 .net "orpairintermediate", 0 0, L_0x2a2bb40; 1 drivers +v0x29b97d0_0 .net "orsingleintermediate", 0 0, L_0x2a2bd80; 1 drivers +v0x29b98f0_0 .net "sum", 0 0, L_0x2a2b210; 1 drivers +S_0x29b4b50 .scope module, "xor0" "xor_32bit" 18 35, 20 1, S_0x2916ac0; + .timescale 0 0; +L_0x2a29590 .functor XOR 1, L_0x2a2d860, L_0x2a2d950, C4<0>, C4<0>; +L_0x2a2dae0 .functor XOR 1, L_0x2a2db90, L_0x2a2dc80, C4<0>, C4<0>; +L_0x2a2dea0 .functor XOR 1, L_0x2a2df00, L_0x2a2e040, C4<0>, C4<0>; +L_0x2a2e230 .functor XOR 1, L_0x2a2e290, L_0x2a2e380, C4<0>, C4<0>; +L_0x2a2e1d0 .functor XOR 1, L_0x2a2e560, L_0x2a2e650, C4<0>, C4<0>; +L_0x2a2e870 .functor XOR 1, L_0x2a2e920, L_0x2a2ea10, C4<0>, C4<0>; +L_0x2a2e7e0 .functor XOR 1, L_0x2a2ed50, L_0x2a2eb00, C4<0>, C4<0>; +L_0x2a2ee40 .functor XOR 1, L_0x2a2f0f0, L_0x2a2f1e0, C4<0>, C4<0>; +L_0x2a2f3a0 .functor XOR 1, L_0x2a2f450, L_0x2a2f2d0, C4<0>, C4<0>; +L_0x2a2f540 .functor XOR 1, L_0x2a2f860, L_0x2a2f900, C4<0>, C4<0>; +L_0x2a2faf0 .functor XOR 1, L_0x2a2fb50, L_0x2a2f9f0, C4<0>, C4<0>; +L_0x2a2fc40 .functor XOR 1, L_0x2a2ff10, L_0x2a1ca00, C4<0>, C4<0>; +L_0x2798ef0 .functor XOR 1, L_0x2a2fdf0, L_0x2a30500, C4<0>, C4<0>; +L_0x2944e60 .functor XOR 1, L_0x2a303c0, L_0x2a30790, C4<0>, C4<0>; +L_0x2a306e0 .functor XOR 1, L_0x2a2ec40, L_0x2a30830, C4<0>, C4<0>; +L_0x2a30920 .functor XOR 1, L_0x2a30f30, L_0x2a30fd0, C4<0>, C4<0>; +L_0x2a30e50 .functor XOR 1, L_0x2a31250, L_0x2a310c0, C4<0>, C4<0>; +L_0x2a314f0 .functor XOR 1, L_0x2a31640, L_0x2a316e0, C4<0>, C4<0>; +L_0x2a313e0 .functor XOR 1, L_0x2a31990, L_0x2a317d0, C4<0>, C4<0>; +L_0x2a31c10 .functor XOR 1, L_0x2a315a0, L_0x2a31dc0, C4<0>, C4<0>; +L_0x2a31ad0 .functor XOR 1, L_0x2a320a0, L_0x2a31eb0, C4<0>, C4<0>; +L_0x2a32040 .functor XOR 1, L_0x2a31cc0, L_0x2a324b0, C4<0>, C4<0>; +L_0x2a321e0 .functor XOR 1, L_0x2a32290, L_0x2a325a0, C4<0>, C4<0>; +L_0x2a32730 .functor XOR 1, L_0x2a323a0, L_0x2a32bc0, C4<0>, C4<0>; +L_0x2a328b0 .functor XOR 1, L_0x2a32960, L_0x2a32f10, C4<0>, C4<0>; +L_0x2a32cb0 .functor XOR 1, L_0x2a32e40, L_0x2a33310, C4<0>, C4<0>; +L_0x2a33140 .functor XOR 1, L_0x2a331f0, L_0x2a33640, C4<0>, C4<0>; +L_0x2a333b0 .functor XOR 1, L_0x2a32d60, L_0x2a335a0, C4<0>, C4<0>; +L_0x2a33870 .functor XOR 1, L_0x2a33920, L_0x2a33d80, C4<0>, C4<0>; +L_0x2a33ac0 .functor XOR 1, L_0x2a33460, L_0x2a33c70, C4<0>, C4<0>; +L_0x29b5ea0 .functor XOR 1, L_0x2a2c750, L_0x2a30990, C4<0>, C4<0>; +L_0x2a30b20 .functor XOR 1, L_0x2a33b70, L_0x2a34020, C4<0>, C4<0>; +v0x29b4c40_0 .net *"_s0", 0 0, L_0x2a29590; 1 drivers +v0x29b4cc0_0 .net *"_s101", 0 0, L_0x2a310c0; 1 drivers +v0x29b4d40_0 .net *"_s102", 0 0, L_0x2a314f0; 1 drivers +v0x29b4dc0_0 .net *"_s105", 0 0, L_0x2a31640; 1 drivers +v0x29b4e40_0 .net *"_s107", 0 0, L_0x2a316e0; 1 drivers +v0x29b4ec0_0 .net *"_s108", 0 0, L_0x2a313e0; 1 drivers +v0x29b4f40_0 .net *"_s11", 0 0, L_0x2a2dc80; 1 drivers +v0x29b4fc0_0 .net *"_s111", 0 0, L_0x2a31990; 1 drivers +v0x29b50b0_0 .net *"_s113", 0 0, L_0x2a317d0; 1 drivers +v0x29b5150_0 .net *"_s114", 0 0, L_0x2a31c10; 1 drivers +v0x29b51f0_0 .net *"_s117", 0 0, L_0x2a315a0; 1 drivers +v0x29b5290_0 .net *"_s119", 0 0, L_0x2a31dc0; 1 drivers +v0x29b5330_0 .net *"_s12", 0 0, L_0x2a2dea0; 1 drivers +v0x29b53d0_0 .net *"_s120", 0 0, L_0x2a31ad0; 1 drivers +v0x29b54f0_0 .net *"_s123", 0 0, L_0x2a320a0; 1 drivers +v0x29b5590_0 .net *"_s125", 0 0, L_0x2a31eb0; 1 drivers +v0x29b5450_0 .net *"_s126", 0 0, L_0x2a32040; 1 drivers +v0x29b56e0_0 .net *"_s129", 0 0, L_0x2a31cc0; 1 drivers +v0x29b5800_0 .net *"_s131", 0 0, L_0x2a324b0; 1 drivers +v0x29b5880_0 .net *"_s132", 0 0, L_0x2a321e0; 1 drivers +v0x29b5760_0 .net *"_s135", 0 0, L_0x2a32290; 1 drivers +v0x29b59b0_0 .net *"_s137", 0 0, L_0x2a325a0; 1 drivers +v0x29b5900_0 .net *"_s138", 0 0, L_0x2a32730; 1 drivers +v0x29b5af0_0 .net *"_s141", 0 0, L_0x2a323a0; 1 drivers +v0x29b5a50_0 .net *"_s143", 0 0, L_0x2a32bc0; 1 drivers +v0x29b5c40_0 .net *"_s144", 0 0, L_0x2a328b0; 1 drivers +v0x29b5b90_0 .net *"_s147", 0 0, L_0x2a32960; 1 drivers +v0x29b5da0_0 .net *"_s149", 0 0, L_0x2a32f10; 1 drivers +v0x29b5ce0_0 .net *"_s15", 0 0, L_0x2a2df00; 1 drivers +v0x29b5f10_0 .net *"_s150", 0 0, L_0x2a32cb0; 1 drivers +v0x29b5e20_0 .net *"_s153", 0 0, L_0x2a32e40; 1 drivers +v0x29b6090_0 .net *"_s155", 0 0, L_0x2a33310; 1 drivers +v0x29b5f90_0 .net *"_s156", 0 0, L_0x2a33140; 1 drivers +v0x29b6220_0 .net *"_s159", 0 0, L_0x2a331f0; 1 drivers +v0x29b6110_0 .net *"_s161", 0 0, L_0x2a33640; 1 drivers +v0x29b63c0_0 .net *"_s162", 0 0, L_0x2a333b0; 1 drivers +v0x29b62a0_0 .net *"_s165", 0 0, L_0x2a32d60; 1 drivers +v0x29b6340_0 .net *"_s167", 0 0, L_0x2a335a0; 1 drivers +v0x29b6580_0 .net *"_s168", 0 0, L_0x2a33870; 1 drivers +v0x29b6600_0 .net *"_s17", 0 0, L_0x2a2e040; 1 drivers +v0x29b6440_0 .net *"_s171", 0 0, L_0x2a33920; 1 drivers +v0x29b64e0_0 .net *"_s173", 0 0, L_0x2a33d80; 1 drivers +v0x29b67e0_0 .net *"_s174", 0 0, L_0x2a33ac0; 1 drivers +v0x29b6860_0 .net *"_s177", 0 0, L_0x2a33460; 1 drivers +v0x29b6680_0 .net *"_s179", 0 0, L_0x2a33c70; 1 drivers +v0x29b6720_0 .net *"_s18", 0 0, L_0x2a2e230; 1 drivers +v0x29b6a60_0 .net *"_s180", 0 0, L_0x29b5ea0; 1 drivers +v0x29b6ae0_0 .net *"_s183", 0 0, L_0x2a2c750; 1 drivers +v0x29b6900_0 .net *"_s185", 0 0, L_0x2a30990; 1 drivers +v0x29b69a0_0 .net *"_s186", 0 0, L_0x2a30b20; 1 drivers +v0x29b6d00_0 .net *"_s189", 0 0, L_0x2a33b70; 1 drivers +v0x29b6d80_0 .net *"_s191", 0 0, L_0x2a34020; 1 drivers +v0x29b6b80_0 .net *"_s21", 0 0, L_0x2a2e290; 1 drivers +v0x29b6c20_0 .net *"_s23", 0 0, L_0x2a2e380; 1 drivers +v0x29b6fc0_0 .net *"_s24", 0 0, L_0x2a2e1d0; 1 drivers +v0x29b7040_0 .net *"_s27", 0 0, L_0x2a2e560; 1 drivers +v0x29b6e00_0 .net *"_s29", 0 0, L_0x2a2e650; 1 drivers +v0x29b6ea0_0 .net *"_s3", 0 0, L_0x2a2d860; 1 drivers +v0x29b6f40_0 .net *"_s30", 0 0, L_0x2a2e870; 1 drivers +v0x29b72c0_0 .net *"_s33", 0 0, L_0x2a2e920; 1 drivers +v0x29b70e0_0 .net *"_s35", 0 0, L_0x2a2ea10; 1 drivers +v0x29b7180_0 .net *"_s36", 0 0, L_0x2a2e7e0; 1 drivers +v0x29b7220_0 .net *"_s39", 0 0, L_0x2a2ed50; 1 drivers +v0x29b7560_0 .net *"_s41", 0 0, L_0x2a2eb00; 1 drivers +v0x29b7360_0 .net *"_s42", 0 0, L_0x2a2ee40; 1 drivers +v0x29b7400_0 .net *"_s45", 0 0, L_0x2a2f0f0; 1 drivers +v0x29b74a0_0 .net *"_s47", 0 0, L_0x2a2f1e0; 1 drivers +v0x29b7800_0 .net *"_s48", 0 0, L_0x2a2f3a0; 1 drivers +v0x29b7600_0 .net *"_s5", 0 0, L_0x2a2d950; 1 drivers +v0x29b76a0_0 .net *"_s51", 0 0, L_0x2a2f450; 1 drivers +v0x29b7740_0 .net *"_s53", 0 0, L_0x2a2f2d0; 1 drivers +v0x29b7ac0_0 .net *"_s54", 0 0, L_0x2a2f540; 1 drivers +v0x29b7880_0 .net *"_s57", 0 0, L_0x2a2f860; 1 drivers +v0x29b7920_0 .net *"_s59", 0 0, L_0x2a2f900; 1 drivers +v0x29b79c0_0 .net *"_s6", 0 0, L_0x2a2dae0; 1 drivers +v0x29b7da0_0 .net *"_s60", 0 0, L_0x2a2faf0; 1 drivers +v0x29b7b40_0 .net *"_s63", 0 0, L_0x2a2fb50; 1 drivers +v0x29b7be0_0 .net *"_s65", 0 0, L_0x2a2f9f0; 1 drivers +v0x29b7c80_0 .net *"_s66", 0 0, L_0x2a2fc40; 1 drivers +v0x29b7d20_0 .net *"_s69", 0 0, L_0x2a2ff10; 1 drivers +v0x29b80b0_0 .net *"_s71", 0 0, L_0x2a1ca00; 1 drivers +v0x29b8130_0 .net *"_s72", 0 0, L_0x2798ef0; 1 drivers +v0x29b7e40_0 .net *"_s75", 0 0, L_0x2a2fdf0; 1 drivers +v0x29b7ee0_0 .net *"_s77", 0 0, L_0x2a30500; 1 drivers +v0x29b7f80_0 .net *"_s78", 0 0, L_0x2944e60; 1 drivers +v0x29b8020_0 .net *"_s81", 0 0, L_0x2a303c0; 1 drivers +v0x29b8490_0 .net *"_s83", 0 0, L_0x2a30790; 1 drivers +v0x29b8530_0 .net *"_s84", 0 0, L_0x2a306e0; 1 drivers +v0x29b81d0_0 .net *"_s87", 0 0, L_0x2a2ec40; 1 drivers +v0x29b8270_0 .net *"_s89", 0 0, L_0x2a30830; 1 drivers +v0x29b8310_0 .net *"_s9", 0 0, L_0x2a2db90; 1 drivers +v0x29b83b0_0 .net *"_s90", 0 0, L_0x2a30920; 1 drivers +v0x29b88a0_0 .net *"_s93", 0 0, L_0x2a30f30; 1 drivers +v0x29b8920_0 .net *"_s95", 0 0, L_0x2a30fd0; 1 drivers +v0x29b85d0_0 .net *"_s96", 0 0, L_0x2a30e50; 1 drivers +v0x29b8670_0 .net *"_s99", 0 0, L_0x2a31250; 1 drivers +v0x29b8710_0 .alias "a", 31 0, v0x29f1e00_0; +v0x29b8790_0 .alias "b", 31 0, v0x29e1880_0; +v0x29b8810_0 .alias "out", 31 0, v0x29e1180_0; +L_0x2a294a0 .part/pv L_0x2a29590, 0, 1, 32; +L_0x2a2d860 .part L_0x29fa450, 0, 1; +L_0x2a2d950 .part v0x29e1590_0, 0, 1; +L_0x2a2da40 .part/pv L_0x2a2dae0, 1, 1, 32; +L_0x2a2db90 .part L_0x29fa450, 1, 1; +L_0x2a2dc80 .part v0x29e1590_0, 1, 1; +L_0x2a2dd70 .part/pv L_0x2a2dea0, 2, 1, 32; +L_0x2a2df00 .part L_0x29fa450, 2, 1; +L_0x2a2e040 .part v0x29e1590_0, 2, 1; +L_0x2a2e130 .part/pv L_0x2a2e230, 3, 1, 32; +L_0x2a2e290 .part L_0x29fa450, 3, 1; +L_0x2a2e380 .part v0x29e1590_0, 3, 1; +L_0x2a2e470 .part/pv L_0x2a2e1d0, 4, 1, 32; +L_0x2a2e560 .part L_0x29fa450, 4, 1; +L_0x2a2e650 .part v0x29e1590_0, 4, 1; +L_0x2a2e740 .part/pv L_0x2a2e870, 5, 1, 32; +L_0x2a2e920 .part L_0x29fa450, 5, 1; +L_0x2a2ea10 .part v0x29e1590_0, 5, 1; +L_0x2a2eba0 .part/pv L_0x2a2e7e0, 6, 1, 32; +L_0x2a2ed50 .part L_0x29fa450, 6, 1; +L_0x2a2eb00 .part v0x29e1590_0, 6, 1; +L_0x2a2ef40 .part/pv L_0x2a2ee40, 7, 1, 32; +L_0x2a2f0f0 .part L_0x29fa450, 7, 1; +L_0x2a2f1e0 .part v0x29e1590_0, 7, 1; +L_0x2a2efe0 .part/pv L_0x2a2f3a0, 8, 1, 32; +L_0x2a2f450 .part L_0x29fa450, 8, 1; +L_0x2a2f2d0 .part v0x29e1590_0, 8, 1; +L_0x2a2f670 .part/pv L_0x2a2f540, 9, 1, 32; +L_0x2a2f860 .part L_0x29fa450, 9, 1; +L_0x2a2f900 .part v0x29e1590_0, 9, 1; +L_0x2a2f710 .part/pv L_0x2a2faf0, 10, 1, 32; +L_0x2a2fb50 .part L_0x29fa450, 10, 1; +L_0x2a2f9f0 .part v0x29e1590_0, 10, 1; +L_0x2a2fd50 .part/pv L_0x2a2fc40, 11, 1, 32; +L_0x2a2ff10 .part L_0x29fa450, 11, 1; +L_0x2a1ca00 .part v0x29e1590_0, 11, 1; +L_0x2a1caf0 .part/pv L_0x2798ef0, 12, 1, 32; +L_0x2a2fdf0 .part L_0x29fa450, 12, 1; +L_0x2a30500 .part v0x29e1590_0, 12, 1; +L_0x2a305a0 .part/pv L_0x2944e60, 13, 1, 32; +L_0x2a303c0 .part L_0x29fa450, 13, 1; +L_0x2a30790 .part v0x29e1590_0, 13, 1; +L_0x2a30640 .part/pv L_0x2a306e0, 14, 1, 32; +L_0x2a2ec40 .part L_0x29fa450, 14, 1; +L_0x2a30830 .part v0x29e1590_0, 14, 1; +L_0x2a30d10 .part/pv L_0x2a30920, 15, 1, 32; +L_0x2a30f30 .part L_0x29fa450, 15, 1; +L_0x2a30fd0 .part v0x29e1590_0, 15, 1; +L_0x2a30db0 .part/pv L_0x2a30e50, 16, 1, 32; +L_0x2a31250 .part L_0x29fa450, 16, 1; +L_0x2a310c0 .part v0x29e1590_0, 16, 1; +L_0x2a311b0 .part/pv L_0x2a314f0, 17, 1, 32; +L_0x2a31640 .part L_0x29fa450, 17, 1; +L_0x2a316e0 .part v0x29e1590_0, 17, 1; +L_0x2a31340 .part/pv L_0x2a313e0, 18, 1, 32; +L_0x2a31990 .part L_0x29fa450, 18, 1; +L_0x2a317d0 .part v0x29e1590_0, 18, 1; +L_0x2a318c0 .part/pv L_0x2a31c10, 19, 1, 32; +L_0x2a315a0 .part L_0x29fa450, 19, 1; +L_0x2a31dc0 .part v0x29e1590_0, 19, 1; +L_0x2a31a30 .part/pv L_0x2a31ad0, 20, 1, 32; +L_0x2a320a0 .part L_0x29fa450, 20, 1; +L_0x2a31eb0 .part v0x29e1590_0, 20, 1; +L_0x2a31fa0 .part/pv L_0x2a32040, 21, 1, 32; +L_0x2a31cc0 .part L_0x29fa450, 21, 1; +L_0x2a324b0 .part v0x29e1590_0, 21, 1; +L_0x2a32140 .part/pv L_0x2a321e0, 22, 1, 32; +L_0x2a32290 .part L_0x29fa450, 22, 1; +L_0x2a325a0 .part v0x29e1590_0, 22, 1; +L_0x2a32690 .part/pv L_0x2a32730, 23, 1, 32; +L_0x2a323a0 .part L_0x29fa450, 23, 1; +L_0x2a32bc0 .part v0x29e1590_0, 23, 1; +L_0x2a32810 .part/pv L_0x2a328b0, 24, 1, 32; +L_0x2a32960 .part L_0x29fa450, 24, 1; +L_0x2a32f10 .part v0x29e1590_0, 24, 1; +L_0x2a33000 .part/pv L_0x2a32cb0, 25, 1, 32; +L_0x2a32e40 .part L_0x29fa450, 25, 1; +L_0x2a33310 .part v0x29e1590_0, 25, 1; +L_0x2a330a0 .part/pv L_0x2a33140, 26, 1, 32; +L_0x2a331f0 .part L_0x29fa450, 26, 1; +L_0x2a33640 .part v0x29e1590_0, 26, 1; +L_0x2a33730 .part/pv L_0x2a333b0, 27, 1, 32; +L_0x2a32d60 .part L_0x29fa450, 27, 1; +L_0x2a335a0 .part v0x29e1590_0, 27, 1; +L_0x2a337d0 .part/pv L_0x2a33870, 28, 1, 32; +L_0x2a33920 .part L_0x29fa450, 28, 1; +L_0x2a33d80 .part v0x29e1590_0, 28, 1; +L_0x2a33e20 .part/pv L_0x2a33ac0, 29, 1, 32; +L_0x2a33460 .part L_0x29fa450, 29, 1; +L_0x2a33c70 .part v0x29e1590_0, 29, 1; +L_0x2a341a0 .part/pv L_0x29b5ea0, 30, 1, 32; +L_0x2a2c750 .part L_0x29fa450, 30, 1; +L_0x2a30990 .part v0x29e1590_0, 30, 1; +L_0x2a30a80 .part/pv L_0x2a30b20, 31, 1, 32; +L_0x2a33b70 .part L_0x29fa450, 31, 1; +L_0x2a34020 .part v0x29e1590_0, 31, 1; +S_0x29a66e0 .scope module, "slt0" "full_slt_32bit" 18 36, 21 37, S_0x2916ac0; + .timescale 0 0; +v0x29b2d00_0 .net *"_s129", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x29b2dc0_0 .alias "a", 31 0, v0x29f1e00_0; +v0x29b2ed0_0 .alias "b", 31 0, v0x29e1880_0; +v0x29b2fe0_0 .alias "out", 31 0, v0x29e1050_0; +v0x29b3090_0 .net "slt0", 0 0, L_0x2a34b70; 1 drivers +v0x29b3110_0 .net "slt1", 0 0, L_0x2a35160; 1 drivers +v0x29b3190_0 .net "slt10", 0 0, L_0x2a382b0; 1 drivers +v0x29b3260_0 .net "slt11", 0 0, L_0x2a38800; 1 drivers +v0x29b3380_0 .net "slt12", 0 0, L_0x2a302c0; 1 drivers +v0x29b3450_0 .net "slt13", 0 0, L_0x2a39610; 1 drivers +v0x29b34d0_0 .net "slt14", 0 0, L_0x2a39b80; 1 drivers +v0x29b35a0_0 .net "slt15", 0 0, L_0x2a3a100; 1 drivers +v0x29b3670_0 .net "slt16", 0 0, L_0x2a3a690; 1 drivers +v0x29b3740_0 .net "slt17", 0 0, L_0x2a3abe0; 1 drivers +v0x29b3890_0 .net "slt18", 0 0, L_0x2a3b140; 1 drivers +v0x29b3960_0 .net "slt19", 0 0, L_0x2a3b6b0; 1 drivers +v0x29b37c0_0 .net "slt2", 0 0, L_0x2a356a0; 1 drivers +v0x29b3b10_0 .net "slt20", 0 0, L_0x2a3bc30; 1 drivers +v0x29b3c30_0 .net "slt21", 0 0, L_0x2a3c1c0; 1 drivers +v0x29b3d00_0 .net "slt22", 0 0, L_0x2a02bd0; 1 drivers +v0x29b3e30_0 .net "slt23", 0 0, L_0x2a3d4a0; 1 drivers +v0x29b3eb0_0 .net "slt24", 0 0, L_0x2a3da10; 1 drivers +v0x29b3ff0_0 .net "slt25", 0 0, L_0x2a3df90; 1 drivers +v0x29b4070_0 .net "slt26", 0 0, L_0x29b3dd0; 1 drivers +v0x29b41c0_0 .net "slt27", 0 0, L_0x2a3ea60; 1 drivers +v0x29b4240_0 .net "slt28", 0 0, L_0x2a3efb0; 1 drivers +v0x29b4140_0 .net "slt29", 0 0, L_0x2a3f510; 1 drivers +v0x29b43f0_0 .net "slt3", 0 0, L_0x2a35be0; 1 drivers +v0x29b4310_0 .net "slt30", 0 0, L_0x2a3fa80; 1 drivers +v0x29b45b0_0 .net "slt4", 0 0, L_0x2a36170; 1 drivers +v0x29b44c0_0 .net "slt5", 0 0, L_0x2a366c0; 1 drivers +v0x29b4780_0 .net "slt6", 0 0, L_0x2a36c10; 1 drivers +v0x29b4680_0 .net "slt7", 0 0, L_0x2a371d0; 1 drivers +v0x29b4960_0 .net "slt8", 0 0, L_0x2a377a0; 1 drivers +v0x29b4850_0 .net "slt9", 0 0, L_0x2a37d20; 1 drivers +L_0x2a34c70 .part L_0x29fa450, 0, 1; +L_0x2a34d60 .part v0x29e1590_0, 0, 1; +L_0x2a35210 .part L_0x29fa450, 1, 1; +L_0x2a35300 .part v0x29e1590_0, 1, 1; +L_0x2a35750 .part L_0x29fa450, 2, 1; +L_0x2a35840 .part v0x29e1590_0, 2, 1; +L_0x2a35c90 .part L_0x29fa450, 3, 1; +L_0x2a35d80 .part v0x29e1590_0, 3, 1; +L_0x2a36220 .part L_0x29fa450, 4, 1; +L_0x2a36310 .part v0x29e1590_0, 4, 1; +L_0x2a36770 .part L_0x29fa450, 5, 1; +L_0x2a36860 .part v0x29e1590_0, 5, 1; +L_0x2a36cc0 .part L_0x29fa450, 6, 1; +L_0x2a36db0 .part v0x29e1590_0, 6, 1; +L_0x2a37280 .part L_0x29fa450, 7, 1; +L_0x2a37370 .part v0x29e1590_0, 7, 1; +L_0x2a37850 .part L_0x29fa450, 8, 1; +L_0x2a37940 .part v0x29e1590_0, 8, 1; +L_0x2a37dd0 .part L_0x29fa450, 9, 1; +L_0x2a37ec0 .part v0x29e1590_0, 9, 1; +L_0x2a38360 .part L_0x29fa450, 10, 1; +L_0x2a38450 .part v0x29e1590_0, 10, 1; +L_0x2a388b0 .part L_0x29fa450, 11, 1; +L_0x2a2ffb0 .part v0x29e1590_0, 11, 1; +L_0x2a391b0 .part L_0x29fa450, 12, 1; +L_0x2a39250 .part v0x29e1590_0, 12, 1; +L_0x2a396c0 .part L_0x29fa450, 13, 1; +L_0x2a397b0 .part v0x29e1590_0, 13, 1; +L_0x2a39c30 .part L_0x29fa450, 14, 1; +L_0x2a39d20 .part v0x29e1590_0, 14, 1; +L_0x2a3a1b0 .part L_0x29fa450, 15, 1; +L_0x2a3a2a0 .part v0x29e1590_0, 15, 1; +L_0x2a3a740 .part L_0x29fa450, 16, 1; +L_0x2a3a830 .part v0x29e1590_0, 16, 1; +L_0x2a3ac90 .part L_0x29fa450, 17, 1; +L_0x2a3ad80 .part v0x29e1590_0, 17, 1; +L_0x2a3b1f0 .part L_0x29fa450, 18, 1; +L_0x2a3b2e0 .part v0x29e1590_0, 18, 1; +L_0x2a3b760 .part L_0x29fa450, 19, 1; +L_0x2a3b850 .part v0x29e1590_0, 19, 1; +L_0x2a3bce0 .part L_0x29fa450, 20, 1; +L_0x2a3bdd0 .part v0x29e1590_0, 20, 1; +L_0x2a3c270 .part L_0x29fa450, 21, 1; +L_0x2a3c360 .part v0x29e1590_0, 21, 1; +L_0x2a02c80 .part L_0x29fa450, 22, 1; +L_0x2a02d70 .part v0x29e1590_0, 22, 1; +L_0x2a3d550 .part L_0x29fa450, 23, 1; +L_0x2a3d640 .part v0x29e1590_0, 23, 1; +L_0x2a3dac0 .part L_0x29fa450, 24, 1; +L_0x2a3dbb0 .part v0x29e1590_0, 24, 1; +L_0x2a3e040 .part L_0x29fa450, 25, 1; +L_0x2a3e130 .part v0x29e1590_0, 25, 1; +L_0x2a3e5c0 .part L_0x29fa450, 26, 1; +L_0x2a3e6b0 .part v0x29e1590_0, 26, 1; +L_0x2a3eb10 .part L_0x29fa450, 27, 1; +L_0x2a3ec00 .part v0x29e1590_0, 27, 1; +L_0x2a3f060 .part L_0x29fa450, 28, 1; +L_0x2a3f150 .part v0x29e1590_0, 28, 1; +L_0x2a3f5c0 .part L_0x29fa450, 29, 1; +L_0x2a3f6b0 .part v0x29e1590_0, 29, 1; +L_0x2a3fb30 .part L_0x29fa450, 30, 1; +L_0x2a3fc20 .part v0x29e1590_0, 30, 1; +L_0x2a400b0 .concat [ 1 31 0 0], L_0x2a40000, C4<0000000000000000000000000000000>; +L_0x2a40240 .part L_0x29fa450, 31, 1; +L_0x2a3fcc0 .part v0x29e1590_0, 31, 1; +S_0x29b26d0 .scope module, "bit0" "single_slt" 21 74, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a34110 .functor XOR 1, L_0x2a34c70, L_0x2a34d60, C4<0>, C4<0>; +L_0x2a34960 .functor AND 1, L_0x2a34d60, L_0x2a34110, C4<1>, C4<1>; +L_0x2a34a60 .functor NOT 1, L_0x2a34110, C4<0>, C4<0>, C4<0>; +L_0x2a34ac0 .functor AND 1, L_0x2a34a60, C4<0>, C4<1>, C4<1>; +L_0x2a34b70 .functor OR 1, L_0x2a34960, L_0x2a34ac0, C4<0>, C4<0>; +v0x29b27c0_0 .net "a", 0 0, L_0x2a34c70; 1 drivers +v0x29b2880_0 .net "abxor", 0 0, L_0x2a34110; 1 drivers +v0x29b2920_0 .net "b", 0 0, L_0x2a34d60; 1 drivers +v0x29b29c0_0 .net "bxorand", 0 0, L_0x2a34960; 1 drivers +v0x29b2a70_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x29b2b10_0 .alias "out", 0 0, v0x29b3090_0; +v0x29b2b90_0 .net "xornot", 0 0, L_0x2a34a60; 1 drivers +v0x29b2c10_0 .net "xornotand", 0 0, L_0x2a34ac0; 1 drivers +S_0x29b20a0 .scope module, "bit1" "single_slt" 21 75, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a34eb0 .functor XOR 1, L_0x2a35210, L_0x2a35300, C4<0>, C4<0>; +L_0x2a34f10 .functor AND 1, L_0x2a35300, L_0x2a34eb0, C4<1>, C4<1>; +L_0x2a34fc0 .functor NOT 1, L_0x2a34eb0, C4<0>, C4<0>, C4<0>; +L_0x2a35020 .functor AND 1, L_0x2a34fc0, L_0x2a34b70, C4<1>, C4<1>; +L_0x2a35160 .functor OR 1, L_0x2a34f10, L_0x2a35020, C4<0>, C4<0>; +v0x29b2190_0 .net "a", 0 0, L_0x2a35210; 1 drivers +v0x29b2250_0 .net "abxor", 0 0, L_0x2a34eb0; 1 drivers +v0x29b22f0_0 .net "b", 0 0, L_0x2a35300; 1 drivers +v0x29b2390_0 .net "bxorand", 0 0, L_0x2a34f10; 1 drivers +v0x29b2440_0 .alias "defaultCompare", 0 0, v0x29b3090_0; +v0x29b24e0_0 .alias "out", 0 0, v0x29b3110_0; +v0x29b2560_0 .net "xornot", 0 0, L_0x2a34fc0; 1 drivers +v0x29b25e0_0 .net "xornotand", 0 0, L_0x2a35020; 1 drivers +S_0x29b1a70 .scope module, "bit2" "single_slt" 21 76, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a353a0 .functor XOR 1, L_0x2a35750, L_0x2a35840, C4<0>, C4<0>; +L_0x2a35400 .functor AND 1, L_0x2a35840, L_0x2a353a0, C4<1>, C4<1>; +L_0x2a35500 .functor NOT 1, L_0x2a353a0, C4<0>, C4<0>, C4<0>; +L_0x2a35560 .functor AND 1, L_0x2a35500, L_0x2a35160, C4<1>, C4<1>; +L_0x2a356a0 .functor OR 1, L_0x2a35400, L_0x2a35560, C4<0>, C4<0>; +v0x29b1b60_0 .net "a", 0 0, L_0x2a35750; 1 drivers +v0x29b1c20_0 .net "abxor", 0 0, L_0x2a353a0; 1 drivers +v0x29b1cc0_0 .net "b", 0 0, L_0x2a35840; 1 drivers +v0x29b1d60_0 .net "bxorand", 0 0, L_0x2a35400; 1 drivers +v0x29b1e10_0 .alias "defaultCompare", 0 0, v0x29b3110_0; +v0x29b1eb0_0 .alias "out", 0 0, v0x29b37c0_0; +v0x29b1f30_0 .net "xornot", 0 0, L_0x2a35500; 1 drivers +v0x29b1fb0_0 .net "xornotand", 0 0, L_0x2a35560; 1 drivers +S_0x29b1440 .scope module, "bit3" "single_slt" 21 77, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a358e0 .functor XOR 1, L_0x2a35c90, L_0x2a35d80, C4<0>, C4<0>; +L_0x2a35940 .functor AND 1, L_0x2a35d80, L_0x2a358e0, C4<1>, C4<1>; +L_0x2a35a40 .functor NOT 1, L_0x2a358e0, C4<0>, C4<0>, C4<0>; +L_0x2a35aa0 .functor AND 1, L_0x2a35a40, L_0x2a356a0, C4<1>, C4<1>; +L_0x2a35be0 .functor OR 1, L_0x2a35940, L_0x2a35aa0, C4<0>, C4<0>; +v0x29b1530_0 .net "a", 0 0, L_0x2a35c90; 1 drivers +v0x29b15f0_0 .net "abxor", 0 0, L_0x2a358e0; 1 drivers +v0x29b1690_0 .net "b", 0 0, L_0x2a35d80; 1 drivers +v0x29b1730_0 .net "bxorand", 0 0, L_0x2a35940; 1 drivers +v0x29b17e0_0 .alias "defaultCompare", 0 0, v0x29b37c0_0; +v0x29b1880_0 .alias "out", 0 0, v0x29b43f0_0; +v0x29b1900_0 .net "xornot", 0 0, L_0x2a35a40; 1 drivers +v0x29b1980_0 .net "xornotand", 0 0, L_0x2a35aa0; 1 drivers +S_0x29b0e10 .scope module, "bit4" "single_slt" 21 78, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a35e70 .functor XOR 1, L_0x2a36220, L_0x2a36310, C4<0>, C4<0>; +L_0x2a35ed0 .functor AND 1, L_0x2a36310, L_0x2a35e70, C4<1>, C4<1>; +L_0x2a35fd0 .functor NOT 1, L_0x2a35e70, C4<0>, C4<0>, C4<0>; +L_0x2a36030 .functor AND 1, L_0x2a35fd0, L_0x2a35be0, C4<1>, C4<1>; +L_0x2a36170 .functor OR 1, L_0x2a35ed0, L_0x2a36030, C4<0>, C4<0>; +v0x29b0f00_0 .net "a", 0 0, L_0x2a36220; 1 drivers +v0x29b0fc0_0 .net "abxor", 0 0, L_0x2a35e70; 1 drivers +v0x29b1060_0 .net "b", 0 0, L_0x2a36310; 1 drivers +v0x29b1100_0 .net "bxorand", 0 0, L_0x2a35ed0; 1 drivers +v0x29b11b0_0 .alias "defaultCompare", 0 0, v0x29b43f0_0; +v0x29b1250_0 .alias "out", 0 0, v0x29b45b0_0; +v0x29b12d0_0 .net "xornot", 0 0, L_0x2a35fd0; 1 drivers +v0x29b1350_0 .net "xornotand", 0 0, L_0x2a36030; 1 drivers +S_0x29b07e0 .scope module, "bit5" "single_slt" 21 79, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a36410 .functor XOR 1, L_0x2a36770, L_0x2a36860, C4<0>, C4<0>; +L_0x2a36470 .functor AND 1, L_0x2a36860, L_0x2a36410, C4<1>, C4<1>; +L_0x2a36520 .functor NOT 1, L_0x2a36410, C4<0>, C4<0>, C4<0>; +L_0x2a36580 .functor AND 1, L_0x2a36520, L_0x2a36170, C4<1>, C4<1>; +L_0x2a366c0 .functor OR 1, L_0x2a36470, L_0x2a36580, C4<0>, C4<0>; +v0x29b08d0_0 .net "a", 0 0, L_0x2a36770; 1 drivers +v0x29b0990_0 .net "abxor", 0 0, L_0x2a36410; 1 drivers +v0x29b0a30_0 .net "b", 0 0, L_0x2a36860; 1 drivers +v0x29b0ad0_0 .net "bxorand", 0 0, L_0x2a36470; 1 drivers +v0x29b0b80_0 .alias "defaultCompare", 0 0, v0x29b45b0_0; +v0x29b0c20_0 .alias "out", 0 0, v0x29b44c0_0; +v0x29b0ca0_0 .net "xornot", 0 0, L_0x2a36520; 1 drivers +v0x29b0d20_0 .net "xornotand", 0 0, L_0x2a36580; 1 drivers +S_0x29b01b0 .scope module, "bit6" "single_slt" 21 80, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a363b0 .functor XOR 1, L_0x2a36cc0, L_0x2a36db0, C4<0>, C4<0>; +L_0x2a36970 .functor AND 1, L_0x2a36db0, L_0x2a363b0, C4<1>, C4<1>; +L_0x2a36a70 .functor NOT 1, L_0x2a363b0, C4<0>, C4<0>, C4<0>; +L_0x2a36ad0 .functor AND 1, L_0x2a36a70, L_0x2a366c0, C4<1>, C4<1>; +L_0x2a36c10 .functor OR 1, L_0x2a36970, L_0x2a36ad0, C4<0>, C4<0>; +v0x29b02a0_0 .net "a", 0 0, L_0x2a36cc0; 1 drivers +v0x29b0360_0 .net "abxor", 0 0, L_0x2a363b0; 1 drivers +v0x29b0400_0 .net "b", 0 0, L_0x2a36db0; 1 drivers +v0x29b04a0_0 .net "bxorand", 0 0, L_0x2a36970; 1 drivers +v0x29b0550_0 .alias "defaultCompare", 0 0, v0x29b44c0_0; +v0x29b05f0_0 .alias "out", 0 0, v0x29b4780_0; +v0x29b0670_0 .net "xornot", 0 0, L_0x2a36a70; 1 drivers +v0x29b06f0_0 .net "xornotand", 0 0, L_0x2a36ad0; 1 drivers +S_0x29afb80 .scope module, "bit7" "single_slt" 21 81, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a36ed0 .functor XOR 1, L_0x2a37280, L_0x2a37370, C4<0>, C4<0>; +L_0x2a36f30 .functor AND 1, L_0x2a37370, L_0x2a36ed0, C4<1>, C4<1>; +L_0x2a37030 .functor NOT 1, L_0x2a36ed0, C4<0>, C4<0>, C4<0>; +L_0x2a37090 .functor AND 1, L_0x2a37030, L_0x2a36c10, C4<1>, C4<1>; +L_0x2a371d0 .functor OR 1, L_0x2a36f30, L_0x2a37090, C4<0>, C4<0>; +v0x29afc70_0 .net "a", 0 0, L_0x2a37280; 1 drivers +v0x29afd30_0 .net "abxor", 0 0, L_0x2a36ed0; 1 drivers +v0x29afdd0_0 .net "b", 0 0, L_0x2a37370; 1 drivers +v0x29afe70_0 .net "bxorand", 0 0, L_0x2a36f30; 1 drivers +v0x29aff20_0 .alias "defaultCompare", 0 0, v0x29b4780_0; +v0x29affc0_0 .alias "out", 0 0, v0x29b4680_0; +v0x29b0040_0 .net "xornot", 0 0, L_0x2a37030; 1 drivers +v0x29b00c0_0 .net "xornotand", 0 0, L_0x2a37090; 1 drivers +S_0x29af550 .scope module, "bit8" "single_slt" 21 82, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a374a0 .functor XOR 1, L_0x2a37850, L_0x2a37940, C4<0>, C4<0>; +L_0x2a37500 .functor AND 1, L_0x2a37940, L_0x2a374a0, C4<1>, C4<1>; +L_0x2a37600 .functor NOT 1, L_0x2a374a0, C4<0>, C4<0>, C4<0>; +L_0x2a37660 .functor AND 1, L_0x2a37600, L_0x2a371d0, C4<1>, C4<1>; +L_0x2a377a0 .functor OR 1, L_0x2a37500, L_0x2a37660, C4<0>, C4<0>; +v0x29af640_0 .net "a", 0 0, L_0x2a37850; 1 drivers +v0x29af700_0 .net "abxor", 0 0, L_0x2a374a0; 1 drivers +v0x29af7a0_0 .net "b", 0 0, L_0x2a37940; 1 drivers +v0x29af840_0 .net "bxorand", 0 0, L_0x2a37500; 1 drivers +v0x29af8f0_0 .alias "defaultCompare", 0 0, v0x29b4680_0; +v0x29af990_0 .alias "out", 0 0, v0x29b4960_0; +v0x29afa10_0 .net "xornot", 0 0, L_0x2a37600; 1 drivers +v0x29afa90_0 .net "xornotand", 0 0, L_0x2a37660; 1 drivers +S_0x29aef20 .scope module, "bit9" "single_slt" 21 83, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a37410 .functor XOR 1, L_0x2a37dd0, L_0x2a37ec0, C4<0>, C4<0>; +L_0x2a37a80 .functor AND 1, L_0x2a37ec0, L_0x2a37410, C4<1>, C4<1>; +L_0x2a37b80 .functor NOT 1, L_0x2a37410, C4<0>, C4<0>, C4<0>; +L_0x2a37be0 .functor AND 1, L_0x2a37b80, L_0x2a377a0, C4<1>, C4<1>; +L_0x2a37d20 .functor OR 1, L_0x2a37a80, L_0x2a37be0, C4<0>, C4<0>; +v0x29af010_0 .net "a", 0 0, L_0x2a37dd0; 1 drivers +v0x29af0d0_0 .net "abxor", 0 0, L_0x2a37410; 1 drivers +v0x29af170_0 .net "b", 0 0, L_0x2a37ec0; 1 drivers +v0x29af210_0 .net "bxorand", 0 0, L_0x2a37a80; 1 drivers +v0x29af2c0_0 .alias "defaultCompare", 0 0, v0x29b4960_0; +v0x29af360_0 .alias "out", 0 0, v0x29b4850_0; +v0x29af3e0_0 .net "xornot", 0 0, L_0x2a37b80; 1 drivers +v0x29af460_0 .net "xornotand", 0 0, L_0x2a37be0; 1 drivers +S_0x29ae8f0 .scope module, "bit10" "single_slt" 21 84, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a379e0 .functor XOR 1, L_0x2a38360, L_0x2a38450, C4<0>, C4<0>; +L_0x2a38010 .functor AND 1, L_0x2a38450, L_0x2a379e0, C4<1>, C4<1>; +L_0x2a38110 .functor NOT 1, L_0x2a379e0, C4<0>, C4<0>, C4<0>; +L_0x2a38170 .functor AND 1, L_0x2a38110, L_0x2a37d20, C4<1>, C4<1>; +L_0x2a382b0 .functor OR 1, L_0x2a38010, L_0x2a38170, C4<0>, C4<0>; +v0x29ae9e0_0 .net "a", 0 0, L_0x2a38360; 1 drivers +v0x29aeaa0_0 .net "abxor", 0 0, L_0x2a379e0; 1 drivers +v0x29aeb40_0 .net "b", 0 0, L_0x2a38450; 1 drivers +v0x29aebe0_0 .net "bxorand", 0 0, L_0x2a38010; 1 drivers +v0x29aec90_0 .alias "defaultCompare", 0 0, v0x29b4850_0; +v0x29aed30_0 .alias "out", 0 0, v0x29b3190_0; +v0x29aedb0_0 .net "xornot", 0 0, L_0x2a38110; 1 drivers +v0x29aee30_0 .net "xornotand", 0 0, L_0x2a38170; 1 drivers +S_0x29ae2c0 .scope module, "bit11" "single_slt" 21 85, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a37f60 .functor XOR 1, L_0x2a388b0, L_0x2a2ffb0, C4<0>, C4<0>; +L_0x2a385b0 .functor AND 1, L_0x2a2ffb0, L_0x2a37f60, C4<1>, C4<1>; +L_0x2a38660 .functor NOT 1, L_0x2a37f60, C4<0>, C4<0>, C4<0>; +L_0x2a386c0 .functor AND 1, L_0x2a38660, L_0x2a382b0, C4<1>, C4<1>; +L_0x2a38800 .functor OR 1, L_0x2a385b0, L_0x2a386c0, C4<0>, C4<0>; +v0x29ae3b0_0 .net "a", 0 0, L_0x2a388b0; 1 drivers +v0x29ae470_0 .net "abxor", 0 0, L_0x2a37f60; 1 drivers +v0x29ae510_0 .net "b", 0 0, L_0x2a2ffb0; 1 drivers +v0x29ae5b0_0 .net "bxorand", 0 0, L_0x2a385b0; 1 drivers +v0x29ae660_0 .alias "defaultCompare", 0 0, v0x29b3190_0; +v0x29ae700_0 .alias "out", 0 0, v0x29b3260_0; +v0x29ae780_0 .net "xornot", 0 0, L_0x2a38660; 1 drivers +v0x29ae800_0 .net "xornotand", 0 0, L_0x2a386c0; 1 drivers +S_0x29adc90 .scope module, "bit12" "single_slt" 21 86, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a36900 .functor XOR 1, L_0x2a391b0, L_0x2a39250, C4<0>, C4<0>; +L_0x2a36e50 .functor AND 1, L_0x2a39250, L_0x2a36900, C4<1>, C4<1>; +L_0x2a30120 .functor NOT 1, L_0x2a36900, C4<0>, C4<0>, C4<0>; +L_0x2a30180 .functor AND 1, L_0x2a30120, L_0x2a38800, C4<1>, C4<1>; +L_0x2a302c0 .functor OR 1, L_0x2a36e50, L_0x2a30180, C4<0>, C4<0>; +v0x29add80_0 .net "a", 0 0, L_0x2a391b0; 1 drivers +v0x29ade40_0 .net "abxor", 0 0, L_0x2a36900; 1 drivers +v0x29adee0_0 .net "b", 0 0, L_0x2a39250; 1 drivers +v0x29adf80_0 .net "bxorand", 0 0, L_0x2a36e50; 1 drivers +v0x29ae030_0 .alias "defaultCompare", 0 0, v0x29b3260_0; +v0x29ae0d0_0 .alias "out", 0 0, v0x29b3380_0; +v0x29ae150_0 .net "xornot", 0 0, L_0x2a30120; 1 drivers +v0x29ae1d0_0 .net "xornotand", 0 0, L_0x2a30180; 1 drivers +S_0x29ad660 .scope module, "bit13" "single_slt" 21 87, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a30050 .functor XOR 1, L_0x2a396c0, L_0x2a397b0, C4<0>, C4<0>; +L_0x2a300b0 .functor AND 1, L_0x2a397b0, L_0x2a30050, C4<1>, C4<1>; +L_0x2a39470 .functor NOT 1, L_0x2a30050, C4<0>, C4<0>, C4<0>; +L_0x2a394d0 .functor AND 1, L_0x2a39470, L_0x2a302c0, C4<1>, C4<1>; +L_0x2a39610 .functor OR 1, L_0x2a300b0, L_0x2a394d0, C4<0>, C4<0>; +v0x29ad750_0 .net "a", 0 0, L_0x2a396c0; 1 drivers +v0x29ad810_0 .net "abxor", 0 0, L_0x2a30050; 1 drivers +v0x29ad8b0_0 .net "b", 0 0, L_0x2a397b0; 1 drivers +v0x29ad950_0 .net "bxorand", 0 0, L_0x2a300b0; 1 drivers +v0x29ada00_0 .alias "defaultCompare", 0 0, v0x29b3380_0; +v0x29adaa0_0 .alias "out", 0 0, v0x29b3450_0; +v0x29adb20_0 .net "xornot", 0 0, L_0x2a39470; 1 drivers +v0x29adba0_0 .net "xornotand", 0 0, L_0x2a394d0; 1 drivers +S_0x29ad030 .scope module, "bit14" "single_slt" 21 88, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a392f0 .functor XOR 1, L_0x2a39c30, L_0x2a39d20, C4<0>, C4<0>; +L_0x2a39350 .functor AND 1, L_0x2a39d20, L_0x2a392f0, C4<1>, C4<1>; +L_0x2a399e0 .functor NOT 1, L_0x2a392f0, C4<0>, C4<0>, C4<0>; +L_0x2a39a40 .functor AND 1, L_0x2a399e0, L_0x2a39610, C4<1>, C4<1>; +L_0x2a39b80 .functor OR 1, L_0x2a39350, L_0x2a39a40, C4<0>, C4<0>; +v0x29ad120_0 .net "a", 0 0, L_0x2a39c30; 1 drivers +v0x29ad1e0_0 .net "abxor", 0 0, L_0x2a392f0; 1 drivers +v0x29ad280_0 .net "b", 0 0, L_0x2a39d20; 1 drivers +v0x29ad320_0 .net "bxorand", 0 0, L_0x2a39350; 1 drivers +v0x29ad3d0_0 .alias "defaultCompare", 0 0, v0x29b3450_0; +v0x29ad470_0 .alias "out", 0 0, v0x29b34d0_0; +v0x29ad4f0_0 .net "xornot", 0 0, L_0x2a399e0; 1 drivers +v0x29ad570_0 .net "xornotand", 0 0, L_0x2a39a40; 1 drivers +S_0x29aca00 .scope module, "bit15" "single_slt" 21 89, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a39850 .functor XOR 1, L_0x2a3a1b0, L_0x2a3a2a0, C4<0>, C4<0>; +L_0x2a398b0 .functor AND 1, L_0x2a3a2a0, L_0x2a39850, C4<1>, C4<1>; +L_0x2a39f60 .functor NOT 1, L_0x2a39850, C4<0>, C4<0>, C4<0>; +L_0x2a39fc0 .functor AND 1, L_0x2a39f60, L_0x2a39b80, C4<1>, C4<1>; +L_0x2a3a100 .functor OR 1, L_0x2a398b0, L_0x2a39fc0, C4<0>, C4<0>; +v0x29acaf0_0 .net "a", 0 0, L_0x2a3a1b0; 1 drivers +v0x29acbb0_0 .net "abxor", 0 0, L_0x2a39850; 1 drivers +v0x29acc50_0 .net "b", 0 0, L_0x2a3a2a0; 1 drivers +v0x29accf0_0 .net "bxorand", 0 0, L_0x2a398b0; 1 drivers +v0x29acda0_0 .alias "defaultCompare", 0 0, v0x29b34d0_0; +v0x29ace40_0 .alias "out", 0 0, v0x29b35a0_0; +v0x29acec0_0 .net "xornot", 0 0, L_0x2a39f60; 1 drivers +v0x29acf40_0 .net "xornotand", 0 0, L_0x2a39fc0; 1 drivers +S_0x29ac3d0 .scope module, "bit16" "single_slt" 21 90, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a39dc0 .functor XOR 1, L_0x2a3a740, L_0x2a3a830, C4<0>, C4<0>; +L_0x2a39e20 .functor AND 1, L_0x2a3a830, L_0x2a39dc0, C4<1>, C4<1>; +L_0x2a3a4f0 .functor NOT 1, L_0x2a39dc0, C4<0>, C4<0>, C4<0>; +L_0x2a3a550 .functor AND 1, L_0x2a3a4f0, L_0x2a3a100, C4<1>, C4<1>; +L_0x2a3a690 .functor OR 1, L_0x2a39e20, L_0x2a3a550, C4<0>, C4<0>; +v0x29ac4c0_0 .net "a", 0 0, L_0x2a3a740; 1 drivers +v0x29ac580_0 .net "abxor", 0 0, L_0x2a39dc0; 1 drivers +v0x29ac620_0 .net "b", 0 0, L_0x2a3a830; 1 drivers +v0x29ac6c0_0 .net "bxorand", 0 0, L_0x2a39e20; 1 drivers +v0x29ac770_0 .alias "defaultCompare", 0 0, v0x29b35a0_0; +v0x29ac810_0 .alias "out", 0 0, v0x29b3670_0; +v0x29ac890_0 .net "xornot", 0 0, L_0x2a3a4f0; 1 drivers +v0x29ac910_0 .net "xornotand", 0 0, L_0x2a3a550; 1 drivers +S_0x29abda0 .scope module, "bit17" "single_slt" 21 91, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3a340 .functor XOR 1, L_0x2a3ac90, L_0x2a3ad80, C4<0>, C4<0>; +L_0x2a3a3a0 .functor AND 1, L_0x2a3ad80, L_0x2a3a340, C4<1>, C4<1>; +L_0x2a3aa40 .functor NOT 1, L_0x2a3a340, C4<0>, C4<0>, C4<0>; +L_0x2a3aaa0 .functor AND 1, L_0x2a3aa40, L_0x2a3a690, C4<1>, C4<1>; +L_0x2a3abe0 .functor OR 1, L_0x2a3a3a0, L_0x2a3aaa0, C4<0>, C4<0>; +v0x29abe90_0 .net "a", 0 0, L_0x2a3ac90; 1 drivers +v0x29abf50_0 .net "abxor", 0 0, L_0x2a3a340; 1 drivers +v0x29abff0_0 .net "b", 0 0, L_0x2a3ad80; 1 drivers +v0x29ac090_0 .net "bxorand", 0 0, L_0x2a3a3a0; 1 drivers +v0x29ac140_0 .alias "defaultCompare", 0 0, v0x29b3670_0; +v0x29ac1e0_0 .alias "out", 0 0, v0x29b3740_0; +v0x29ac260_0 .net "xornot", 0 0, L_0x2a3aa40; 1 drivers +v0x29ac2e0_0 .net "xornotand", 0 0, L_0x2a3aaa0; 1 drivers +S_0x29ab770 .scope module, "bit18" "single_slt" 21 92, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3a8d0 .functor XOR 1, L_0x2a3b1f0, L_0x2a3b2e0, C4<0>, C4<0>; +L_0x2a3a930 .functor AND 1, L_0x2a3b2e0, L_0x2a3a8d0, C4<1>, C4<1>; +L_0x2a3afa0 .functor NOT 1, L_0x2a3a8d0, C4<0>, C4<0>, C4<0>; +L_0x2a3b000 .functor AND 1, L_0x2a3afa0, L_0x2a3abe0, C4<1>, C4<1>; +L_0x2a3b140 .functor OR 1, L_0x2a3a930, L_0x2a3b000, C4<0>, C4<0>; +v0x29ab860_0 .net "a", 0 0, L_0x2a3b1f0; 1 drivers +v0x29ab920_0 .net "abxor", 0 0, L_0x2a3a8d0; 1 drivers +v0x29ab9c0_0 .net "b", 0 0, L_0x2a3b2e0; 1 drivers +v0x29aba60_0 .net "bxorand", 0 0, L_0x2a3a930; 1 drivers +v0x29abb10_0 .alias "defaultCompare", 0 0, v0x29b3740_0; +v0x29abbb0_0 .alias "out", 0 0, v0x29b3890_0; +v0x29abc30_0 .net "xornot", 0 0, L_0x2a3afa0; 1 drivers +v0x29abcb0_0 .net "xornotand", 0 0, L_0x2a3b000; 1 drivers +S_0x29ab140 .scope module, "bit19" "single_slt" 21 93, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3ae20 .functor XOR 1, L_0x2a3b760, L_0x2a3b850, C4<0>, C4<0>; +L_0x2a3ae80 .functor AND 1, L_0x2a3b850, L_0x2a3ae20, C4<1>, C4<1>; +L_0x2a3b510 .functor NOT 1, L_0x2a3ae20, C4<0>, C4<0>, C4<0>; +L_0x2a3b570 .functor AND 1, L_0x2a3b510, L_0x2a3b140, C4<1>, C4<1>; +L_0x2a3b6b0 .functor OR 1, L_0x2a3ae80, L_0x2a3b570, C4<0>, C4<0>; +v0x29ab230_0 .net "a", 0 0, L_0x2a3b760; 1 drivers +v0x29ab2f0_0 .net "abxor", 0 0, L_0x2a3ae20; 1 drivers +v0x29ab390_0 .net "b", 0 0, L_0x2a3b850; 1 drivers +v0x29ab430_0 .net "bxorand", 0 0, L_0x2a3ae80; 1 drivers +v0x29ab4e0_0 .alias "defaultCompare", 0 0, v0x29b3890_0; +v0x29ab580_0 .alias "out", 0 0, v0x29b3960_0; +v0x29ab600_0 .net "xornot", 0 0, L_0x2a3b510; 1 drivers +v0x29ab680_0 .net "xornotand", 0 0, L_0x2a3b570; 1 drivers +S_0x29aab10 .scope module, "bit20" "single_slt" 21 94, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3b380 .functor XOR 1, L_0x2a3bce0, L_0x2a3bdd0, C4<0>, C4<0>; +L_0x2a3b3e0 .functor AND 1, L_0x2a3bdd0, L_0x2a3b380, C4<1>, C4<1>; +L_0x2a3ba90 .functor NOT 1, L_0x2a3b380, C4<0>, C4<0>, C4<0>; +L_0x2a3baf0 .functor AND 1, L_0x2a3ba90, L_0x2a3b6b0, C4<1>, C4<1>; +L_0x2a3bc30 .functor OR 1, L_0x2a3b3e0, L_0x2a3baf0, C4<0>, C4<0>; +v0x29aac00_0 .net "a", 0 0, L_0x2a3bce0; 1 drivers +v0x29aacc0_0 .net "abxor", 0 0, L_0x2a3b380; 1 drivers +v0x29aad60_0 .net "b", 0 0, L_0x2a3bdd0; 1 drivers +v0x29aae00_0 .net "bxorand", 0 0, L_0x2a3b3e0; 1 drivers +v0x29aaeb0_0 .alias "defaultCompare", 0 0, v0x29b3960_0; +v0x29aaf50_0 .alias "out", 0 0, v0x29b3b10_0; +v0x29aafd0_0 .net "xornot", 0 0, L_0x2a3ba90; 1 drivers +v0x29ab050_0 .net "xornotand", 0 0, L_0x2a3baf0; 1 drivers +S_0x29aa4e0 .scope module, "bit21" "single_slt" 21 95, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3b8f0 .functor XOR 1, L_0x2a3c270, L_0x2a3c360, C4<0>, C4<0>; +L_0x2a3b950 .functor AND 1, L_0x2a3c360, L_0x2a3b8f0, C4<1>, C4<1>; +L_0x2a3c020 .functor NOT 1, L_0x2a3b8f0, C4<0>, C4<0>, C4<0>; +L_0x2a3c080 .functor AND 1, L_0x2a3c020, L_0x2a3bc30, C4<1>, C4<1>; +L_0x2a3c1c0 .functor OR 1, L_0x2a3b950, L_0x2a3c080, C4<0>, C4<0>; +v0x29aa5d0_0 .net "a", 0 0, L_0x2a3c270; 1 drivers +v0x29aa690_0 .net "abxor", 0 0, L_0x2a3b8f0; 1 drivers +v0x29aa730_0 .net "b", 0 0, L_0x2a3c360; 1 drivers +v0x29aa7d0_0 .net "bxorand", 0 0, L_0x2a3b950; 1 drivers +v0x29aa880_0 .alias "defaultCompare", 0 0, v0x29b3b10_0; +v0x29aa920_0 .alias "out", 0 0, v0x29b3c30_0; +v0x29aa9a0_0 .net "xornot", 0 0, L_0x2a3c020; 1 drivers +v0x29aaa20_0 .net "xornotand", 0 0, L_0x2a3c080; 1 drivers +S_0x29a9eb0 .scope module, "bit22" "single_slt" 21 96, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3be70 .functor XOR 1, L_0x2a02c80, L_0x2a02d70, C4<0>, C4<0>; +L_0x2a3bed0 .functor AND 1, L_0x2a02d70, L_0x2a3be70, C4<1>, C4<1>; +L_0x2a02a30 .functor NOT 1, L_0x2a3be70, C4<0>, C4<0>, C4<0>; +L_0x2a02a90 .functor AND 1, L_0x2a02a30, L_0x2a3c1c0, C4<1>, C4<1>; +L_0x2a02bd0 .functor OR 1, L_0x2a3bed0, L_0x2a02a90, C4<0>, C4<0>; +v0x29a9fa0_0 .net "a", 0 0, L_0x2a02c80; 1 drivers +v0x29aa060_0 .net "abxor", 0 0, L_0x2a3be70; 1 drivers +v0x29aa100_0 .net "b", 0 0, L_0x2a02d70; 1 drivers +v0x29aa1a0_0 .net "bxorand", 0 0, L_0x2a3bed0; 1 drivers +v0x29aa250_0 .alias "defaultCompare", 0 0, v0x29b3c30_0; +v0x29aa2f0_0 .alias "out", 0 0, v0x29b3d00_0; +v0x29aa370_0 .net "xornot", 0 0, L_0x2a02a30; 1 drivers +v0x29aa3f0_0 .net "xornotand", 0 0, L_0x2a02a90; 1 drivers +S_0x29a9880 .scope module, "bit23" "single_slt" 21 97, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a02f90 .functor XOR 1, L_0x2a3d550, L_0x2a3d640, C4<0>, C4<0>; +L_0x2a02ff0 .functor AND 1, L_0x2a3d640, L_0x2a02f90, C4<1>, C4<1>; +L_0x2a02910 .functor NOT 1, L_0x2a02f90, C4<0>, C4<0>, C4<0>; +L_0x2a02970 .functor AND 1, L_0x2a02910, L_0x2a02bd0, C4<1>, C4<1>; +L_0x2a3d4a0 .functor OR 1, L_0x2a02ff0, L_0x2a02970, C4<0>, C4<0>; +v0x29a9970_0 .net "a", 0 0, L_0x2a3d550; 1 drivers +v0x29a9a30_0 .net "abxor", 0 0, L_0x2a02f90; 1 drivers +v0x29a9ad0_0 .net "b", 0 0, L_0x2a3d640; 1 drivers +v0x29a9b70_0 .net "bxorand", 0 0, L_0x2a02ff0; 1 drivers +v0x29a9c20_0 .alias "defaultCompare", 0 0, v0x29b3d00_0; +v0x29a9cc0_0 .alias "out", 0 0, v0x29b3e30_0; +v0x29a9d40_0 .net "xornot", 0 0, L_0x2a02910; 1 drivers +v0x29a9dc0_0 .net "xornotand", 0 0, L_0x2a02970; 1 drivers +S_0x29a9250 .scope module, "bit24" "single_slt" 21 98, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a02e10 .functor XOR 1, L_0x2a3dac0, L_0x2a3dbb0, C4<0>, C4<0>; +L_0x2a02e70 .functor AND 1, L_0x2a3dbb0, L_0x2a02e10, C4<1>, C4<1>; +L_0x2a3d870 .functor NOT 1, L_0x2a02e10, C4<0>, C4<0>, C4<0>; +L_0x2a3d8d0 .functor AND 1, L_0x2a3d870, L_0x2a3d4a0, C4<1>, C4<1>; +L_0x2a3da10 .functor OR 1, L_0x2a02e70, L_0x2a3d8d0, C4<0>, C4<0>; +v0x29a9340_0 .net "a", 0 0, L_0x2a3dac0; 1 drivers +v0x29a9400_0 .net "abxor", 0 0, L_0x2a02e10; 1 drivers +v0x29a94a0_0 .net "b", 0 0, L_0x2a3dbb0; 1 drivers +v0x29a9540_0 .net "bxorand", 0 0, L_0x2a02e70; 1 drivers +v0x29a95f0_0 .alias "defaultCompare", 0 0, v0x29b3e30_0; +v0x29a9690_0 .alias "out", 0 0, v0x29b3eb0_0; +v0x29a9710_0 .net "xornot", 0 0, L_0x2a3d870; 1 drivers +v0x29a9790_0 .net "xornotand", 0 0, L_0x2a3d8d0; 1 drivers +S_0x29a8c20 .scope module, "bit25" "single_slt" 21 99, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3d6e0 .functor XOR 1, L_0x2a3e040, L_0x2a3e130, C4<0>, C4<0>; +L_0x2a3d740 .functor AND 1, L_0x2a3e130, L_0x2a3d6e0, C4<1>, C4<1>; +L_0x2a3ddf0 .functor NOT 1, L_0x2a3d6e0, C4<0>, C4<0>, C4<0>; +L_0x2a3de50 .functor AND 1, L_0x2a3ddf0, L_0x2a3da10, C4<1>, C4<1>; +L_0x2a3df90 .functor OR 1, L_0x2a3d740, L_0x2a3de50, C4<0>, C4<0>; +v0x29a8d10_0 .net "a", 0 0, L_0x2a3e040; 1 drivers +v0x29a8dd0_0 .net "abxor", 0 0, L_0x2a3d6e0; 1 drivers +v0x29a8e70_0 .net "b", 0 0, L_0x2a3e130; 1 drivers +v0x29a8f10_0 .net "bxorand", 0 0, L_0x2a3d740; 1 drivers +v0x29a8fc0_0 .alias "defaultCompare", 0 0, v0x29b3eb0_0; +v0x29a9060_0 .alias "out", 0 0, v0x29b3ff0_0; +v0x29a90e0_0 .net "xornot", 0 0, L_0x2a3ddf0; 1 drivers +v0x29a9160_0 .net "xornotand", 0 0, L_0x2a3de50; 1 drivers +S_0x29a85f0 .scope module, "bit26" "single_slt" 21 100, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3dc50 .functor XOR 1, L_0x2a3e5c0, L_0x2a3e6b0, C4<0>, C4<0>; +L_0x2a3dcb0 .functor AND 1, L_0x2a3e6b0, L_0x2a3dc50, C4<1>, C4<1>; +L_0x2a3e380 .functor NOT 1, L_0x2a3dc50, C4<0>, C4<0>, C4<0>; +L_0x2a3e3e0 .functor AND 1, L_0x2a3e380, L_0x2a3df90, C4<1>, C4<1>; +L_0x29b3dd0 .functor OR 1, L_0x2a3dcb0, L_0x2a3e3e0, C4<0>, C4<0>; +v0x29a86e0_0 .net "a", 0 0, L_0x2a3e5c0; 1 drivers +v0x29a87a0_0 .net "abxor", 0 0, L_0x2a3dc50; 1 drivers +v0x29a8840_0 .net "b", 0 0, L_0x2a3e6b0; 1 drivers +v0x29a88e0_0 .net "bxorand", 0 0, L_0x2a3dcb0; 1 drivers +v0x29a8990_0 .alias "defaultCompare", 0 0, v0x29b3ff0_0; +v0x29a8a30_0 .alias "out", 0 0, v0x29b4070_0; +v0x29a8ab0_0 .net "xornot", 0 0, L_0x2a3e380; 1 drivers +v0x29a8b30_0 .net "xornotand", 0 0, L_0x2a3e3e0; 1 drivers +S_0x29a7fc0 .scope module, "bit27" "single_slt" 21 101, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3e1d0 .functor XOR 1, L_0x2a3eb10, L_0x2a3ec00, C4<0>, C4<0>; +L_0x2a3e230 .functor AND 1, L_0x2a3ec00, L_0x2a3e1d0, C4<1>, C4<1>; +L_0x2a3e910 .functor NOT 1, L_0x2a3e1d0, C4<0>, C4<0>, C4<0>; +L_0x2a3e970 .functor AND 1, L_0x2a3e910, L_0x29b3dd0, C4<1>, C4<1>; +L_0x2a3ea60 .functor OR 1, L_0x2a3e230, L_0x2a3e970, C4<0>, C4<0>; +v0x29a80b0_0 .net "a", 0 0, L_0x2a3eb10; 1 drivers +v0x29a8170_0 .net "abxor", 0 0, L_0x2a3e1d0; 1 drivers +v0x29a8210_0 .net "b", 0 0, L_0x2a3ec00; 1 drivers +v0x29a82b0_0 .net "bxorand", 0 0, L_0x2a3e230; 1 drivers +v0x29a8360_0 .alias "defaultCompare", 0 0, v0x29b4070_0; +v0x29a8400_0 .alias "out", 0 0, v0x29b41c0_0; +v0x29a8480_0 .net "xornot", 0 0, L_0x2a3e910; 1 drivers +v0x29a8500_0 .net "xornotand", 0 0, L_0x2a3e970; 1 drivers +S_0x29a79c0 .scope module, "bit28" "single_slt" 21 102, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3e750 .functor XOR 1, L_0x2a3f060, L_0x2a3f150, C4<0>, C4<0>; +L_0x2a3e7b0 .functor AND 1, L_0x2a3f150, L_0x2a3e750, C4<1>, C4<1>; +L_0x2a3e8b0 .functor NOT 1, L_0x2a3e750, C4<0>, C4<0>, C4<0>; +L_0x2a3ee70 .functor AND 1, L_0x2a3e8b0, L_0x2a3ea60, C4<1>, C4<1>; +L_0x2a3efb0 .functor OR 1, L_0x2a3e7b0, L_0x2a3ee70, C4<0>, C4<0>; +v0x29a7ab0_0 .net "a", 0 0, L_0x2a3f060; 1 drivers +v0x29a7b70_0 .net "abxor", 0 0, L_0x2a3e750; 1 drivers +v0x29a7c10_0 .net "b", 0 0, L_0x2a3f150; 1 drivers +v0x29a7cb0_0 .net "bxorand", 0 0, L_0x2a3e7b0; 1 drivers +v0x29a7d30_0 .alias "defaultCompare", 0 0, v0x29b41c0_0; +v0x29a7dd0_0 .alias "out", 0 0, v0x29b4240_0; +v0x29a7e50_0 .net "xornot", 0 0, L_0x2a3e8b0; 1 drivers +v0x29a7ed0_0 .net "xornotand", 0 0, L_0x2a3ee70; 1 drivers +S_0x29a73c0 .scope module, "bit29" "single_slt" 21 103, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3eca0 .functor XOR 1, L_0x2a3f5c0, L_0x2a3f6b0, C4<0>, C4<0>; +L_0x2a3ed00 .functor AND 1, L_0x2a3f6b0, L_0x2a3eca0, C4<1>, C4<1>; +L_0x2a3ee00 .functor NOT 1, L_0x2a3eca0, C4<0>, C4<0>, C4<0>; +L_0x2a3f3d0 .functor AND 1, L_0x2a3ee00, L_0x2a3efb0, C4<1>, C4<1>; +L_0x2a3f510 .functor OR 1, L_0x2a3ed00, L_0x2a3f3d0, C4<0>, C4<0>; +v0x29a74b0_0 .net "a", 0 0, L_0x2a3f5c0; 1 drivers +v0x29a7570_0 .net "abxor", 0 0, L_0x2a3eca0; 1 drivers +v0x29a7610_0 .net "b", 0 0, L_0x2a3f6b0; 1 drivers +v0x29a76b0_0 .net "bxorand", 0 0, L_0x2a3ed00; 1 drivers +v0x29a7730_0 .alias "defaultCompare", 0 0, v0x29b4240_0; +v0x29a77d0_0 .alias "out", 0 0, v0x29b4140_0; +v0x29a7850_0 .net "xornot", 0 0, L_0x2a3ee00; 1 drivers +v0x29a78d0_0 .net "xornotand", 0 0, L_0x2a3f3d0; 1 drivers +S_0x29a6dc0 .scope module, "bit30" "single_slt" 21 104, 21 1, S_0x29a66e0; + .timescale 0 0; +L_0x2a3f1f0 .functor XOR 1, L_0x2a3fb30, L_0x2a3fc20, C4<0>, C4<0>; +L_0x2a3f250 .functor AND 1, L_0x2a3fc20, L_0x2a3f1f0, C4<1>, C4<1>; +L_0x2a3f350 .functor NOT 1, L_0x2a3f1f0, C4<0>, C4<0>, C4<0>; +L_0x2a3f940 .functor AND 1, L_0x2a3f350, L_0x2a3f510, C4<1>, C4<1>; +L_0x2a3fa80 .functor OR 1, L_0x2a3f250, L_0x2a3f940, C4<0>, C4<0>; +v0x29a6eb0_0 .net "a", 0 0, L_0x2a3fb30; 1 drivers +v0x29a6f70_0 .net "abxor", 0 0, L_0x2a3f1f0; 1 drivers +v0x29a7010_0 .net "b", 0 0, L_0x2a3fc20; 1 drivers +v0x29a70b0_0 .net "bxorand", 0 0, L_0x2a3f250; 1 drivers +v0x29a7130_0 .alias "defaultCompare", 0 0, v0x29b4140_0; +v0x29a71d0_0 .alias "out", 0 0, v0x29b4310_0; +v0x29a7250_0 .net "xornot", 0 0, L_0x2a3f350; 1 drivers +v0x29a72d0_0 .net "xornotand", 0 0, L_0x2a3f940; 1 drivers +S_0x29a67d0 .scope module, "bit31" "single_slt_reversed" 21 105, 21 19, S_0x29a66e0; + .timescale 0 0; +L_0x2a3f750 .functor XOR 1, L_0x2a40240, L_0x2a3fcc0, C4<0>, C4<0>; +L_0x2a3f7b0 .functor AND 1, L_0x2a40240, L_0x2a3f750, C4<1>, C4<1>; +L_0x2a3f8b0 .functor NOT 1, L_0x2a3f750, C4<0>, C4<0>, C4<0>; +L_0x2a3fec0 .functor AND 1, L_0x2a3f8b0, L_0x2a3fa80, C4<1>, C4<1>; +L_0x2a40000 .functor OR 1, L_0x2a3f7b0, L_0x2a3fec0, C4<0>, C4<0>; +v0x29a68c0_0 .net "a", 0 0, L_0x2a40240; 1 drivers +v0x29a6980_0 .net "abxor", 0 0, L_0x2a3f750; 1 drivers +v0x29a6a20_0 .net "axorand", 0 0, L_0x2a3f7b0; 1 drivers +v0x29a6ac0_0 .net "b", 0 0, L_0x2a3fcc0; 1 drivers +v0x29a6b40_0 .alias "defaultCompare", 0 0, v0x29b4310_0; +v0x29a6be0_0 .net "out", 0 0, L_0x2a40000; 1 drivers +v0x29a6c80_0 .net "xornot", 0 0, L_0x2a3f8b0; 1 drivers +v0x29a6d20_0 .net "xornotand", 0 0, L_0x2a3fec0; 1 drivers +S_0x29a20a0 .scope module, "and0" "and_32bit" 18 37, 22 1, S_0x2916ac0; + .timescale 0 0; +L_0x2a404f0 .functor AND 1, L_0x2a405a0, L_0x2a40690, C4<1>, C4<1>; +L_0x2a40820 .functor AND 1, L_0x2a408d0, L_0x2a409c0, C4<1>, C4<1>; +L_0x2a40be0 .functor AND 1, L_0x2a40c40, L_0x2a40d80, C4<1>, C4<1>; +L_0x2a40f70 .functor AND 1, L_0x2a40fd0, L_0x2a410c0, C4<1>, C4<1>; +L_0x2a40f10 .functor AND 1, L_0x2a41310, L_0x2a41480, C4<1>, C4<1>; +L_0x2a416a0 .functor AND 1, L_0x2a41750, L_0x2a41840, C4<1>, C4<1>; +L_0x2a41610 .functor AND 1, L_0x2a41b80, L_0x2a41930, C4<1>, C4<1>; +L_0x2a41c70 .functor AND 1, L_0x2a41f20, L_0x2a42010, C4<1>, C4<1>; +L_0x2a421d0 .functor AND 1, L_0x2a42280, L_0x2a42100, C4<1>, C4<1>; +L_0x2a42370 .functor AND 1, L_0x2a42690, L_0x2a42730, C4<1>, C4<1>; +L_0x2a42920 .functor AND 1, L_0x2a42980, L_0x2a42820, C4<1>, C4<1>; +L_0x2a42a70 .functor AND 1, L_0x2a42d40, L_0x2a42de0, C4<1>, C4<1>; +L_0x2a42630 .functor AND 1, L_0x2a43000, L_0x2a42ed0, C4<1>, C4<1>; +L_0x2a430a0 .functor AND 1, L_0x2a433d0, L_0x2a434c0, C4<1>, C4<1>; +L_0x2a43320 .functor AND 1, L_0x2a41a70, L_0x2a435b0, C4<1>, C4<1>; +L_0x2a436a0 .functor AND 1, L_0x2a43970, L_0x2a43cb0, C4<1>, C4<1>; +L_0x2a43bd0 .functor AND 1, L_0x2a43f30, L_0x2a43da0, C4<1>, C4<1>; +L_0x2a441d0 .functor AND 1, L_0x2a44320, L_0x2a443c0, C4<1>, C4<1>; +L_0x2a440c0 .functor AND 1, L_0x2a44670, L_0x2a444b0, C4<1>, C4<1>; +L_0x2a448f0 .functor AND 1, L_0x2a44280, L_0x2a44aa0, C4<1>, C4<1>; +L_0x2a447b0 .functor AND 1, L_0x2a44d80, L_0x2a44b90, C4<1>, C4<1>; +L_0x2a44d20 .functor AND 1, L_0x2a449a0, L_0x2a45190, C4<1>, C4<1>; +L_0x2a44ec0 .functor AND 1, L_0x2a44f70, L_0x2a45280, C4<1>, C4<1>; +L_0x2a45410 .functor AND 1, L_0x2a45080, L_0x2a458a0, C4<1>, C4<1>; +L_0x2a45590 .functor AND 1, L_0x2a45640, L_0x2a45bf0, C4<1>, C4<1>; +L_0x2a45990 .functor AND 1, L_0x2a45b20, L_0x2a45ff0, C4<1>, C4<1>; +L_0x2a45e20 .functor AND 1, L_0x2a45ed0, L_0x2a46320, C4<1>, C4<1>; +L_0x2a46090 .functor AND 1, L_0x2a45a40, L_0x2a46280, C4<1>, C4<1>; +L_0x2a46550 .functor AND 1, L_0x2a46600, L_0x2a46a60, C4<1>, C4<1>; +L_0x2a467a0 .functor AND 1, L_0x2a46140, L_0x2a46950, C4<1>, C4<1>; +L_0x29a38a0 .functor AND 1, L_0x2a43710, L_0x2a43800, C4<1>, C4<1>; +L_0x2a46c40 .functor AND 1, L_0x2a46850, L_0x2a47630, C4<1>, C4<1>; +v0x29a2620_0 .net *"_s0", 0 0, L_0x2a404f0; 1 drivers +v0x29a26a0_0 .net *"_s101", 0 0, L_0x2a43da0; 1 drivers +v0x29a2720_0 .net *"_s102", 0 0, L_0x2a441d0; 1 drivers +v0x29a27a0_0 .net *"_s105", 0 0, L_0x2a44320; 1 drivers +v0x29a2820_0 .net *"_s107", 0 0, L_0x2a443c0; 1 drivers +v0x29a28a0_0 .net *"_s108", 0 0, L_0x2a440c0; 1 drivers +v0x29a2920_0 .net *"_s11", 0 0, L_0x2a409c0; 1 drivers +v0x29a29c0_0 .net *"_s111", 0 0, L_0x2a44670; 1 drivers +v0x29a2ab0_0 .net *"_s113", 0 0, L_0x2a444b0; 1 drivers +v0x29a2b50_0 .net *"_s114", 0 0, L_0x2a448f0; 1 drivers +v0x29a2bf0_0 .net *"_s117", 0 0, L_0x2a44280; 1 drivers +v0x29a2c90_0 .net *"_s119", 0 0, L_0x2a44aa0; 1 drivers +v0x29a2d30_0 .net *"_s12", 0 0, L_0x2a40be0; 1 drivers +v0x29a2dd0_0 .net *"_s120", 0 0, L_0x2a447b0; 1 drivers +v0x29a2ef0_0 .net *"_s123", 0 0, L_0x2a44d80; 1 drivers +v0x29a2f90_0 .net *"_s125", 0 0, L_0x2a44b90; 1 drivers +v0x29a2e50_0 .net *"_s126", 0 0, L_0x2a44d20; 1 drivers +v0x29a30e0_0 .net *"_s129", 0 0, L_0x2a449a0; 1 drivers +v0x29a3200_0 .net *"_s131", 0 0, L_0x2a45190; 1 drivers +v0x29a3280_0 .net *"_s132", 0 0, L_0x2a44ec0; 1 drivers +v0x29a3160_0 .net *"_s135", 0 0, L_0x2a44f70; 1 drivers +v0x29a33b0_0 .net *"_s137", 0 0, L_0x2a45280; 1 drivers +v0x29a3300_0 .net *"_s138", 0 0, L_0x2a45410; 1 drivers +v0x29a34f0_0 .net *"_s141", 0 0, L_0x2a45080; 1 drivers +v0x29a3450_0 .net *"_s143", 0 0, L_0x2a458a0; 1 drivers +v0x29a3640_0 .net *"_s144", 0 0, L_0x2a45590; 1 drivers +v0x29a3590_0 .net *"_s147", 0 0, L_0x2a45640; 1 drivers +v0x29a37a0_0 .net *"_s149", 0 0, L_0x2a45bf0; 1 drivers +v0x29a36e0_0 .net *"_s15", 0 0, L_0x2a40c40; 1 drivers +v0x29a3910_0 .net *"_s150", 0 0, L_0x2a45990; 1 drivers +v0x29a3820_0 .net *"_s153", 0 0, L_0x2a45b20; 1 drivers +v0x29a3a90_0 .net *"_s155", 0 0, L_0x2a45ff0; 1 drivers +v0x29a3990_0 .net *"_s156", 0 0, L_0x2a45e20; 1 drivers +v0x29a3c20_0 .net *"_s159", 0 0, L_0x2a45ed0; 1 drivers +v0x29a3b10_0 .net *"_s161", 0 0, L_0x2a46320; 1 drivers +v0x29a3dc0_0 .net *"_s162", 0 0, L_0x2a46090; 1 drivers +v0x29a3ca0_0 .net *"_s165", 0 0, L_0x2a45a40; 1 drivers +v0x29a3d40_0 .net *"_s167", 0 0, L_0x2a46280; 1 drivers +v0x29a3f80_0 .net *"_s168", 0 0, L_0x2a46550; 1 drivers +v0x29a4000_0 .net *"_s17", 0 0, L_0x2a40d80; 1 drivers +v0x29a3e40_0 .net *"_s171", 0 0, L_0x2a46600; 1 drivers +v0x29a3ee0_0 .net *"_s173", 0 0, L_0x2a46a60; 1 drivers +v0x29a41e0_0 .net *"_s174", 0 0, L_0x2a467a0; 1 drivers +v0x29a4260_0 .net *"_s177", 0 0, L_0x2a46140; 1 drivers +v0x29a4080_0 .net *"_s179", 0 0, L_0x2a46950; 1 drivers +v0x29a4120_0 .net *"_s18", 0 0, L_0x2a40f70; 1 drivers +v0x29a4460_0 .net *"_s180", 0 0, L_0x29a38a0; 1 drivers +v0x29a44e0_0 .net *"_s183", 0 0, L_0x2a43710; 1 drivers +v0x29a4300_0 .net *"_s185", 0 0, L_0x2a43800; 1 drivers +v0x29a43a0_0 .net *"_s186", 0 0, L_0x2a46c40; 1 drivers +v0x29a4700_0 .net *"_s189", 0 0, L_0x2a46850; 1 drivers +v0x29a4780_0 .net *"_s191", 0 0, L_0x2a47630; 1 drivers +v0x29a4580_0 .net *"_s21", 0 0, L_0x2a40fd0; 1 drivers +v0x29a4620_0 .net *"_s23", 0 0, L_0x2a410c0; 1 drivers +v0x29a49c0_0 .net *"_s24", 0 0, L_0x2a40f10; 1 drivers +v0x29a4a40_0 .net *"_s27", 0 0, L_0x2a41310; 1 drivers +v0x29a4800_0 .net *"_s29", 0 0, L_0x2a41480; 1 drivers +v0x29a48a0_0 .net *"_s3", 0 0, L_0x2a405a0; 1 drivers +v0x29a4940_0 .net *"_s30", 0 0, L_0x2a416a0; 1 drivers +v0x29a4cc0_0 .net *"_s33", 0 0, L_0x2a41750; 1 drivers +v0x29a4ae0_0 .net *"_s35", 0 0, L_0x2a41840; 1 drivers +v0x29a4b80_0 .net *"_s36", 0 0, L_0x2a41610; 1 drivers +v0x29a4c20_0 .net *"_s39", 0 0, L_0x2a41b80; 1 drivers +v0x29a4f60_0 .net *"_s41", 0 0, L_0x2a41930; 1 drivers +v0x29a4d60_0 .net *"_s42", 0 0, L_0x2a41c70; 1 drivers +v0x29a4e00_0 .net *"_s45", 0 0, L_0x2a41f20; 1 drivers +v0x29a4ea0_0 .net *"_s47", 0 0, L_0x2a42010; 1 drivers +v0x29a5200_0 .net *"_s48", 0 0, L_0x2a421d0; 1 drivers +v0x29a5000_0 .net *"_s5", 0 0, L_0x2a40690; 1 drivers +v0x29a50a0_0 .net *"_s51", 0 0, L_0x2a42280; 1 drivers +v0x29a5140_0 .net *"_s53", 0 0, L_0x2a42100; 1 drivers +v0x29a54c0_0 .net *"_s54", 0 0, L_0x2a42370; 1 drivers +v0x29a5280_0 .net *"_s57", 0 0, L_0x2a42690; 1 drivers +v0x29a5320_0 .net *"_s59", 0 0, L_0x2a42730; 1 drivers +v0x29a53c0_0 .net *"_s6", 0 0, L_0x2a40820; 1 drivers +v0x29a57a0_0 .net *"_s60", 0 0, L_0x2a42920; 1 drivers +v0x29a5540_0 .net *"_s63", 0 0, L_0x2a42980; 1 drivers +v0x29a55e0_0 .net *"_s65", 0 0, L_0x2a42820; 1 drivers +v0x29a5680_0 .net *"_s66", 0 0, L_0x2a42a70; 1 drivers +v0x29a5720_0 .net *"_s69", 0 0, L_0x2a42d40; 1 drivers +v0x29a5ab0_0 .net *"_s71", 0 0, L_0x2a42de0; 1 drivers +v0x29a5b30_0 .net *"_s72", 0 0, L_0x2a42630; 1 drivers +v0x29a5840_0 .net *"_s75", 0 0, L_0x2a43000; 1 drivers +v0x29a58e0_0 .net *"_s77", 0 0, L_0x2a42ed0; 1 drivers +v0x29a5980_0 .net *"_s78", 0 0, L_0x2a430a0; 1 drivers +v0x29a5a20_0 .net *"_s81", 0 0, L_0x2a433d0; 1 drivers +v0x29a5e90_0 .net *"_s83", 0 0, L_0x2a434c0; 1 drivers +v0x29a5f30_0 .net *"_s84", 0 0, L_0x2a43320; 1 drivers +v0x29a5bd0_0 .net *"_s87", 0 0, L_0x2a41a70; 1 drivers +v0x29a5c70_0 .net *"_s89", 0 0, L_0x2a435b0; 1 drivers +v0x29a5d10_0 .net *"_s9", 0 0, L_0x2a408d0; 1 drivers +v0x29a5db0_0 .net *"_s90", 0 0, L_0x2a436a0; 1 drivers +v0x29a62a0_0 .net *"_s93", 0 0, L_0x2a43970; 1 drivers +v0x29a6320_0 .net *"_s95", 0 0, L_0x2a43cb0; 1 drivers +v0x29a5fd0_0 .net *"_s96", 0 0, L_0x2a43bd0; 1 drivers +v0x29a6070_0 .net *"_s99", 0 0, L_0x2a43f30; 1 drivers +v0x29a6110_0 .alias "a", 31 0, v0x29f1e00_0; +v0x29a6190_0 .alias "b", 31 0, v0x29e1880_0; +v0x29a6210_0 .alias "out", 31 0, v0x29e0bc0_0; +L_0x2a3fdb0 .part/pv L_0x2a404f0, 0, 1, 32; +L_0x2a405a0 .part L_0x29fa450, 0, 1; +L_0x2a40690 .part v0x29e1590_0, 0, 1; +L_0x2a40780 .part/pv L_0x2a40820, 1, 1, 32; +L_0x2a408d0 .part L_0x29fa450, 1, 1; +L_0x2a409c0 .part v0x29e1590_0, 1, 1; +L_0x2a40ab0 .part/pv L_0x2a40be0, 2, 1, 32; +L_0x2a40c40 .part L_0x29fa450, 2, 1; +L_0x2a40d80 .part v0x29e1590_0, 2, 1; +L_0x2a40e70 .part/pv L_0x2a40f70, 3, 1, 32; +L_0x2a40fd0 .part L_0x29fa450, 3, 1; +L_0x2a410c0 .part v0x29e1590_0, 3, 1; +L_0x2a41220 .part/pv L_0x2a40f10, 4, 1, 32; +L_0x2a41310 .part L_0x29fa450, 4, 1; +L_0x2a41480 .part v0x29e1590_0, 4, 1; +L_0x2a41570 .part/pv L_0x2a416a0, 5, 1, 32; +L_0x2a41750 .part L_0x29fa450, 5, 1; +L_0x2a41840 .part v0x29e1590_0, 5, 1; +L_0x2a419d0 .part/pv L_0x2a41610, 6, 1, 32; +L_0x2a41b80 .part L_0x29fa450, 6, 1; +L_0x2a41930 .part v0x29e1590_0, 6, 1; +L_0x2a41d70 .part/pv L_0x2a41c70, 7, 1, 32; +L_0x2a41f20 .part L_0x29fa450, 7, 1; +L_0x2a42010 .part v0x29e1590_0, 7, 1; +L_0x2a41e10 .part/pv L_0x2a421d0, 8, 1, 32; +L_0x2a42280 .part L_0x29fa450, 8, 1; +L_0x2a42100 .part v0x29e1590_0, 8, 1; +L_0x2a424a0 .part/pv L_0x2a42370, 9, 1, 32; +L_0x2a42690 .part L_0x29fa450, 9, 1; +L_0x2a42730 .part v0x29e1590_0, 9, 1; +L_0x2a42540 .part/pv L_0x2a42920, 10, 1, 32; +L_0x2a42980 .part L_0x29fa450, 10, 1; +L_0x2a42820 .part v0x29e1590_0, 10, 1; +L_0x2a42b80 .part/pv L_0x2a42a70, 11, 1, 32; +L_0x2a42d40 .part L_0x29fa450, 11, 1; +L_0x2a42de0 .part v0x29e1590_0, 11, 1; +L_0x2a42c20 .part/pv L_0x2a42630, 12, 1, 32; +L_0x2a43000 .part L_0x29fa450, 12, 1; +L_0x2a42ed0 .part v0x29e1590_0, 12, 1; +L_0x2a431e0 .part/pv L_0x2a430a0, 13, 1, 32; +L_0x2a433d0 .part L_0x29fa450, 13, 1; +L_0x2a434c0 .part v0x29e1590_0, 13, 1; +L_0x2a43280 .part/pv L_0x2a43320, 14, 1, 32; +L_0x2a41a70 .part L_0x29fa450, 14, 1; +L_0x2a435b0 .part v0x29e1590_0, 14, 1; +L_0x2a43a90 .part/pv L_0x2a436a0, 15, 1, 32; +L_0x2a43970 .part L_0x29fa450, 15, 1; +L_0x2a43cb0 .part v0x29e1590_0, 15, 1; +L_0x2a43b30 .part/pv L_0x2a43bd0, 16, 1, 32; +L_0x2a43f30 .part L_0x29fa450, 16, 1; +L_0x2a43da0 .part v0x29e1590_0, 16, 1; +L_0x2a43e90 .part/pv L_0x2a441d0, 17, 1, 32; +L_0x2a44320 .part L_0x29fa450, 17, 1; +L_0x2a443c0 .part v0x29e1590_0, 17, 1; +L_0x2a44020 .part/pv L_0x2a440c0, 18, 1, 32; +L_0x2a44670 .part L_0x29fa450, 18, 1; +L_0x2a444b0 .part v0x29e1590_0, 18, 1; +L_0x2a445a0 .part/pv L_0x2a448f0, 19, 1, 32; +L_0x2a44280 .part L_0x29fa450, 19, 1; +L_0x2a44aa0 .part v0x29e1590_0, 19, 1; +L_0x2a44710 .part/pv L_0x2a447b0, 20, 1, 32; +L_0x2a44d80 .part L_0x29fa450, 20, 1; +L_0x2a44b90 .part v0x29e1590_0, 20, 1; +L_0x2a44c80 .part/pv L_0x2a44d20, 21, 1, 32; +L_0x2a449a0 .part L_0x29fa450, 21, 1; +L_0x2a45190 .part v0x29e1590_0, 21, 1; +L_0x2a44e20 .part/pv L_0x2a44ec0, 22, 1, 32; +L_0x2a44f70 .part L_0x29fa450, 22, 1; +L_0x2a45280 .part v0x29e1590_0, 22, 1; +L_0x2a45370 .part/pv L_0x2a45410, 23, 1, 32; +L_0x2a45080 .part L_0x29fa450, 23, 1; +L_0x2a458a0 .part v0x29e1590_0, 23, 1; +L_0x2a454f0 .part/pv L_0x2a45590, 24, 1, 32; +L_0x2a45640 .part L_0x29fa450, 24, 1; +L_0x2a45bf0 .part v0x29e1590_0, 24, 1; +L_0x2a45ce0 .part/pv L_0x2a45990, 25, 1, 32; +L_0x2a45b20 .part L_0x29fa450, 25, 1; +L_0x2a45ff0 .part v0x29e1590_0, 25, 1; +L_0x2a45d80 .part/pv L_0x2a45e20, 26, 1, 32; +L_0x2a45ed0 .part L_0x29fa450, 26, 1; +L_0x2a46320 .part v0x29e1590_0, 26, 1; +L_0x2a46410 .part/pv L_0x2a46090, 27, 1, 32; +L_0x2a45a40 .part L_0x29fa450, 27, 1; +L_0x2a46280 .part v0x29e1590_0, 27, 1; +L_0x2a464b0 .part/pv L_0x2a46550, 28, 1, 32; +L_0x2a46600 .part L_0x29fa450, 28, 1; +L_0x2a46a60 .part v0x29e1590_0, 28, 1; +L_0x2a46b00 .part/pv L_0x2a467a0, 29, 1, 32; +L_0x2a46140 .part L_0x29fa450, 29, 1; +L_0x2a46950 .part v0x29e1590_0, 29, 1; +L_0x2a46e80 .part/pv L_0x29a38a0, 30, 1, 32; +L_0x2a43710 .part L_0x29fa450, 30, 1; +L_0x2a43800 .part v0x29e1590_0, 30, 1; +L_0x2a46ba0 .part/pv L_0x2a46c40, 31, 1, 32; +L_0x2a46850 .part L_0x29fa450, 31, 1; +L_0x2a47630 .part v0x29e1590_0, 31, 1; +S_0x276dd70 .scope module, "nand0" "nand_32bit" 18 38, 23 1, S_0x2916ac0; + .timescale 0 0; +L_0x2a47420 .functor NAND 1, L_0x2a474d0, L_0x2a479e0, C4<1>, C4<1>; +L_0x2a46e00 .functor NAND 1, L_0x2a47b70, L_0x2a47c60, C4<1>, C4<1>; +L_0x2a47e80 .functor NAND 1, L_0x2a47ee0, L_0x2a48020, C4<1>, C4<1>; +L_0x2a48210 .functor NAND 1, L_0x2a48270, L_0x2a48360, C4<1>, C4<1>; +L_0x2a481b0 .functor NAND 1, L_0x2a485b0, L_0x2a48720, C4<1>, C4<1>; +L_0x2a48940 .functor NAND 1, L_0x2a489f0, L_0x2a48ae0, C4<1>, C4<1>; +L_0x2a488b0 .functor NAND 1, L_0x2a48e20, L_0x2a48bd0, C4<1>, C4<1>; +L_0x2a48f10 .functor NAND 1, L_0x2a491c0, L_0x2a492b0, C4<1>, C4<1>; +L_0x2a49470 .functor NAND 1, L_0x2a49520, L_0x2a493a0, C4<1>, C4<1>; +L_0x2a49610 .functor NAND 1, L_0x2a49930, L_0x2a499d0, C4<1>, C4<1>; +L_0x2a49bc0 .functor NAND 1, L_0x2a49c20, L_0x2a49ac0, C4<1>, C4<1>; +L_0x2a49d10 .functor NAND 1, L_0x2a49fe0, L_0x2a389a0, C4<1>, C4<1>; +L_0x2a498d0 .functor NAND 1, L_0x2a38b70, L_0x2a38a40, C4<1>, C4<1>; +L_0x2a486a0 .functor NAND 1, L_0x2a38f90, L_0x2a39080, C4<1>, C4<1>; +L_0x2a38d30 .functor NAND 1, L_0x2a48d10, L_0x2a4b090, C4<1>, C4<1>; +L_0x2a48db0 .functor NAND 1, L_0x2a4b490, L_0x2a4b7e0, C4<1>, C4<1>; +L_0x2a4b6b0 .functor NAND 1, L_0x2a4ba60, L_0x2a4b8d0, C4<1>, C4<1>; +L_0x2a4bd00 .functor NAND 1, L_0x2a4be50, L_0x2a4bef0, C4<1>, C4<1>; +L_0x2a4bbf0 .functor NAND 1, L_0x2a4c1a0, L_0x2a4bfe0, C4<1>, C4<1>; +L_0x2a4c420 .functor NAND 1, L_0x2a4bdb0, L_0x2a4c5d0, C4<1>, C4<1>; +L_0x2a4c2e0 .functor NAND 1, L_0x2a4c8b0, L_0x2a4c6c0, C4<1>, C4<1>; +L_0x2a4c850 .functor NAND 1, L_0x2a4c4d0, L_0x2a4ccc0, C4<1>, C4<1>; +L_0x2a4c9f0 .functor NAND 1, L_0x2a4caa0, L_0x2a4cdb0, C4<1>, C4<1>; +L_0x2a4cf40 .functor NAND 1, L_0x2a4cbb0, L_0x2a4d3d0, C4<1>, C4<1>; +L_0x2a4d0c0 .functor NAND 1, L_0x2a4d170, L_0x2a4d720, C4<1>, C4<1>; +L_0x2a4d4c0 .functor NAND 1, L_0x2a4d650, L_0x2a4db20, C4<1>, C4<1>; +L_0x2a4d950 .functor NAND 1, L_0x2a4da00, L_0x2a4de50, C4<1>, C4<1>; +L_0x2a4dbc0 .functor NAND 1, L_0x2a4d570, L_0x2a4ddb0, C4<1>, C4<1>; +L_0x2a4e080 .functor NAND 1, L_0x2a4e130, L_0x2a4e590, C4<1>, C4<1>; +L_0x2a4e2d0 .functor NAND 1, L_0x2a4dc70, L_0x2a4e480, C4<1>, C4<1>; +L_0x299f8d0 .functor NAND 1, L_0x2a4b1d0, L_0x2a4b270, C4<1>, C4<1>; +L_0x2a48450 .functor NAND 1, L_0x2a4e380, L_0x2a4e7e0, C4<1>, C4<1>; +v0x276de60_0 .net *"_s0", 0 0, L_0x2a47420; 1 drivers +v0x276df20_0 .net *"_s101", 0 0, L_0x2a4b8d0; 1 drivers +v0x27e3110_0 .net *"_s102", 0 0, L_0x2a4bd00; 1 drivers +v0x299ea00_0 .net *"_s105", 0 0, L_0x2a4be50; 1 drivers +v0x299ea80_0 .net *"_s107", 0 0, L_0x2a4bef0; 1 drivers +v0x299eb00_0 .net *"_s108", 0 0, L_0x2a4bbf0; 1 drivers +v0x299eb80_0 .net *"_s11", 0 0, L_0x2a47c60; 1 drivers +v0x299ec00_0 .net *"_s111", 0 0, L_0x2a4c1a0; 1 drivers +v0x299ec80_0 .net *"_s113", 0 0, L_0x2a4bfe0; 1 drivers +v0x299ed00_0 .net *"_s114", 0 0, L_0x2a4c420; 1 drivers +v0x299ed80_0 .net *"_s117", 0 0, L_0x2a4bdb0; 1 drivers +v0x299ee00_0 .net *"_s119", 0 0, L_0x2a4c5d0; 1 drivers +v0x299ee80_0 .net *"_s12", 0 0, L_0x2a47e80; 1 drivers +v0x299ef00_0 .net *"_s120", 0 0, L_0x2a4c2e0; 1 drivers +v0x299f000_0 .net *"_s123", 0 0, L_0x2a4c8b0; 1 drivers +v0x299f080_0 .net *"_s125", 0 0, L_0x2a4c6c0; 1 drivers +v0x299ef80_0 .net *"_s126", 0 0, L_0x2a4c850; 1 drivers +v0x299f190_0 .net *"_s129", 0 0, L_0x2a4c4d0; 1 drivers +v0x299f100_0 .net *"_s131", 0 0, L_0x2a4ccc0; 1 drivers +v0x299f2b0_0 .net *"_s132", 0 0, L_0x2a4c9f0; 1 drivers +v0x299f210_0 .net *"_s135", 0 0, L_0x2a4caa0; 1 drivers +v0x299f3e0_0 .net *"_s137", 0 0, L_0x2a4cdb0; 1 drivers +v0x299f330_0 .net *"_s138", 0 0, L_0x2a4cf40; 1 drivers +v0x299f520_0 .net *"_s141", 0 0, L_0x2a4cbb0; 1 drivers +v0x299f460_0 .net *"_s143", 0 0, L_0x2a4d3d0; 1 drivers +v0x299f670_0 .net *"_s144", 0 0, L_0x2a4d0c0; 1 drivers +v0x299f5a0_0 .net *"_s147", 0 0, L_0x2a4d170; 1 drivers +v0x299f7d0_0 .net *"_s149", 0 0, L_0x2a4d720; 1 drivers +v0x299f6f0_0 .net *"_s15", 0 0, L_0x2a47ee0; 1 drivers +v0x299f940_0 .net *"_s150", 0 0, L_0x2a4d4c0; 1 drivers +v0x299f850_0 .net *"_s153", 0 0, L_0x2a4d650; 1 drivers +v0x299fac0_0 .net *"_s155", 0 0, L_0x2a4db20; 1 drivers +v0x299f9c0_0 .net *"_s156", 0 0, L_0x2a4d950; 1 drivers +v0x299fa40_0 .net *"_s159", 0 0, L_0x2a4da00; 1 drivers +v0x299fc60_0 .net *"_s161", 0 0, L_0x2a4de50; 1 drivers +v0x299fce0_0 .net *"_s162", 0 0, L_0x2a4dbc0; 1 drivers +v0x299fb40_0 .net *"_s165", 0 0, L_0x2a4d570; 1 drivers +v0x299fbe0_0 .net *"_s167", 0 0, L_0x2a4ddb0; 1 drivers +v0x299fea0_0 .net *"_s168", 0 0, L_0x2a4e080; 1 drivers +v0x299ff20_0 .net *"_s17", 0 0, L_0x2a48020; 1 drivers +v0x299fd60_0 .net *"_s171", 0 0, L_0x2a4e130; 1 drivers +v0x299fe00_0 .net *"_s173", 0 0, L_0x2a4e590; 1 drivers +v0x29a0100_0 .net *"_s174", 0 0, L_0x2a4e2d0; 1 drivers +v0x29a0180_0 .net *"_s177", 0 0, L_0x2a4dc70; 1 drivers +v0x299ffa0_0 .net *"_s179", 0 0, L_0x2a4e480; 1 drivers +v0x29a0040_0 .net *"_s18", 0 0, L_0x2a48210; 1 drivers +v0x29a0380_0 .net *"_s180", 0 0, L_0x299f8d0; 1 drivers +v0x29a0400_0 .net *"_s183", 0 0, L_0x2a4b1d0; 1 drivers +v0x29a0200_0 .net *"_s185", 0 0, L_0x2a4b270; 1 drivers +v0x29a02a0_0 .net *"_s186", 0 0, L_0x2a48450; 1 drivers +v0x29a0620_0 .net *"_s189", 0 0, L_0x2a4e380; 1 drivers +v0x29a06a0_0 .net *"_s191", 0 0, L_0x2a4e7e0; 1 drivers +v0x29a0480_0 .net *"_s21", 0 0, L_0x2a48270; 1 drivers +v0x29a0520_0 .net *"_s23", 0 0, L_0x2a48360; 1 drivers +v0x29a08e0_0 .net *"_s24", 0 0, L_0x2a481b0; 1 drivers +v0x29a0960_0 .net *"_s27", 0 0, L_0x2a485b0; 1 drivers +v0x29a0720_0 .net *"_s29", 0 0, L_0x2a48720; 1 drivers +v0x29a07c0_0 .net *"_s3", 0 0, L_0x2a474d0; 1 drivers +v0x29a0860_0 .net *"_s30", 0 0, L_0x2a48940; 1 drivers +v0x29a0bc0_0 .net *"_s33", 0 0, L_0x2a489f0; 1 drivers +v0x29a09e0_0 .net *"_s35", 0 0, L_0x2a48ae0; 1 drivers +v0x29a0a60_0 .net *"_s36", 0 0, L_0x2a488b0; 1 drivers +v0x29a0b00_0 .net *"_s39", 0 0, L_0x2a48e20; 1 drivers +v0x29a0e40_0 .net *"_s41", 0 0, L_0x2a48bd0; 1 drivers +v0x29a0c40_0 .net *"_s42", 0 0, L_0x2a48f10; 1 drivers +v0x29a0ce0_0 .net *"_s45", 0 0, L_0x2a491c0; 1 drivers +v0x29a0d80_0 .net *"_s47", 0 0, L_0x2a492b0; 1 drivers +v0x29a10e0_0 .net *"_s48", 0 0, L_0x2a49470; 1 drivers +v0x29a0ec0_0 .net *"_s5", 0 0, L_0x2a479e0; 1 drivers +v0x29a0f60_0 .net *"_s51", 0 0, L_0x2a49520; 1 drivers +v0x29a1000_0 .net *"_s53", 0 0, L_0x2a493a0; 1 drivers +v0x29a13a0_0 .net *"_s54", 0 0, L_0x2a49610; 1 drivers +v0x29a1160_0 .net *"_s57", 0 0, L_0x2a49930; 1 drivers +v0x29a11e0_0 .net *"_s59", 0 0, L_0x2a499d0; 1 drivers +v0x29a1280_0 .net *"_s6", 0 0, L_0x2a46e00; 1 drivers +v0x29a1320_0 .net *"_s60", 0 0, L_0x2a49bc0; 1 drivers +v0x29a1690_0 .net *"_s63", 0 0, L_0x2a49c20; 1 drivers +v0x29a1710_0 .net *"_s65", 0 0, L_0x2a49ac0; 1 drivers +v0x29a1420_0 .net *"_s66", 0 0, L_0x2a49d10; 1 drivers +v0x29a14c0_0 .net *"_s69", 0 0, L_0x2a49fe0; 1 drivers +v0x29a1560_0 .net *"_s71", 0 0, L_0x2a389a0; 1 drivers +v0x29a1600_0 .net *"_s72", 0 0, L_0x2a498d0; 1 drivers +v0x29a1a30_0 .net *"_s75", 0 0, L_0x2a38b70; 1 drivers +v0x29a1ab0_0 .net *"_s77", 0 0, L_0x2a38a40; 1 drivers +v0x29a1790_0 .net *"_s78", 0 0, L_0x2a486a0; 1 drivers +v0x29a1830_0 .net *"_s81", 0 0, L_0x2a38f90; 1 drivers +v0x29a18d0_0 .net *"_s83", 0 0, L_0x2a39080; 1 drivers +v0x29a1970_0 .net *"_s84", 0 0, L_0x2a38d30; 1 drivers +v0x29a1e00_0 .net *"_s87", 0 0, L_0x2a48d10; 1 drivers +v0x29a1e80_0 .net *"_s89", 0 0, L_0x2a4b090; 1 drivers +v0x29a1b30_0 .net *"_s9", 0 0, L_0x2a47b70; 1 drivers +v0x29a1bd0_0 .net *"_s90", 0 0, L_0x2a48db0; 1 drivers +v0x29a1c70_0 .net *"_s93", 0 0, L_0x2a4b490; 1 drivers +v0x29a1d10_0 .net *"_s95", 0 0, L_0x2a4b7e0; 1 drivers +v0x29a2200_0 .net *"_s96", 0 0, L_0x2a4b6b0; 1 drivers +v0x29a2280_0 .net *"_s99", 0 0, L_0x2a4ba60; 1 drivers +v0x29a1f00_0 .alias "a", 31 0, v0x29f1e00_0; +v0x29a1f80_0 .alias "b", 31 0, v0x29e1880_0; +v0x29a2000_0 .alias "out", 31 0, v0x29e0ed0_0; +L_0x2a47330 .part/pv L_0x2a47420, 0, 1, 32; +L_0x2a474d0 .part L_0x29fa450, 0, 1; +L_0x2a479e0 .part v0x29e1590_0, 0, 1; +L_0x2a47a80 .part/pv L_0x2a46e00, 1, 1, 32; +L_0x2a47b70 .part L_0x29fa450, 1, 1; +L_0x2a47c60 .part v0x29e1590_0, 1, 1; +L_0x2a47d50 .part/pv L_0x2a47e80, 2, 1, 32; +L_0x2a47ee0 .part L_0x29fa450, 2, 1; +L_0x2a48020 .part v0x29e1590_0, 2, 1; +L_0x2a48110 .part/pv L_0x2a48210, 3, 1, 32; +L_0x2a48270 .part L_0x29fa450, 3, 1; +L_0x2a48360 .part v0x29e1590_0, 3, 1; +L_0x2a484c0 .part/pv L_0x2a481b0, 4, 1, 32; +L_0x2a485b0 .part L_0x29fa450, 4, 1; +L_0x2a48720 .part v0x29e1590_0, 4, 1; +L_0x2a48810 .part/pv L_0x2a48940, 5, 1, 32; +L_0x2a489f0 .part L_0x29fa450, 5, 1; +L_0x2a48ae0 .part v0x29e1590_0, 5, 1; +L_0x2a48c70 .part/pv L_0x2a488b0, 6, 1, 32; +L_0x2a48e20 .part L_0x29fa450, 6, 1; +L_0x2a48bd0 .part v0x29e1590_0, 6, 1; +L_0x2a49010 .part/pv L_0x2a48f10, 7, 1, 32; +L_0x2a491c0 .part L_0x29fa450, 7, 1; +L_0x2a492b0 .part v0x29e1590_0, 7, 1; +L_0x2a490b0 .part/pv L_0x2a49470, 8, 1, 32; +L_0x2a49520 .part L_0x29fa450, 8, 1; +L_0x2a493a0 .part v0x29e1590_0, 8, 1; +L_0x2a49740 .part/pv L_0x2a49610, 9, 1, 32; +L_0x2a49930 .part L_0x29fa450, 9, 1; +L_0x2a499d0 .part v0x29e1590_0, 9, 1; +L_0x2a497e0 .part/pv L_0x2a49bc0, 10, 1, 32; +L_0x2a49c20 .part L_0x29fa450, 10, 1; +L_0x2a49ac0 .part v0x29e1590_0, 10, 1; +L_0x2a49e20 .part/pv L_0x2a49d10, 11, 1, 32; +L_0x2a49fe0 .part L_0x29fa450, 11, 1; +L_0x2a389a0 .part v0x29e1590_0, 11, 1; +L_0x2a49ec0 .part/pv L_0x2a498d0, 12, 1, 32; +L_0x2a38b70 .part L_0x29fa450, 12, 1; +L_0x2a38a40 .part v0x29e1590_0, 12, 1; +L_0x2a38da0 .part/pv L_0x2a486a0, 13, 1, 32; +L_0x2a38f90 .part L_0x29fa450, 13, 1; +L_0x2a39080 .part v0x29e1590_0, 13, 1; +L_0x2a38e40 .part/pv L_0x2a38d30, 14, 1, 32; +L_0x2a48d10 .part L_0x29fa450, 14, 1; +L_0x2a4b090 .part v0x29e1590_0, 14, 1; +L_0x2a4b570 .part/pv L_0x2a48db0, 15, 1, 32; +L_0x2a4b490 .part L_0x29fa450, 15, 1; +L_0x2a4b7e0 .part v0x29e1590_0, 15, 1; +L_0x2a4b610 .part/pv L_0x2a4b6b0, 16, 1, 32; +L_0x2a4ba60 .part L_0x29fa450, 16, 1; +L_0x2a4b8d0 .part v0x29e1590_0, 16, 1; +L_0x2a4b9c0 .part/pv L_0x2a4bd00, 17, 1, 32; +L_0x2a4be50 .part L_0x29fa450, 17, 1; +L_0x2a4bef0 .part v0x29e1590_0, 17, 1; +L_0x2a4bb50 .part/pv L_0x2a4bbf0, 18, 1, 32; +L_0x2a4c1a0 .part L_0x29fa450, 18, 1; +L_0x2a4bfe0 .part v0x29e1590_0, 18, 1; +L_0x2a4c0d0 .part/pv L_0x2a4c420, 19, 1, 32; +L_0x2a4bdb0 .part L_0x29fa450, 19, 1; +L_0x2a4c5d0 .part v0x29e1590_0, 19, 1; +L_0x2a4c240 .part/pv L_0x2a4c2e0, 20, 1, 32; +L_0x2a4c8b0 .part L_0x29fa450, 20, 1; +L_0x2a4c6c0 .part v0x29e1590_0, 20, 1; +L_0x2a4c7b0 .part/pv L_0x2a4c850, 21, 1, 32; +L_0x2a4c4d0 .part L_0x29fa450, 21, 1; +L_0x2a4ccc0 .part v0x29e1590_0, 21, 1; +L_0x2a4c950 .part/pv L_0x2a4c9f0, 22, 1, 32; +L_0x2a4caa0 .part L_0x29fa450, 22, 1; +L_0x2a4cdb0 .part v0x29e1590_0, 22, 1; +L_0x2a4cea0 .part/pv L_0x2a4cf40, 23, 1, 32; +L_0x2a4cbb0 .part L_0x29fa450, 23, 1; +L_0x2a4d3d0 .part v0x29e1590_0, 23, 1; +L_0x2a4d020 .part/pv L_0x2a4d0c0, 24, 1, 32; +L_0x2a4d170 .part L_0x29fa450, 24, 1; +L_0x2a4d720 .part v0x29e1590_0, 24, 1; +L_0x2a4d810 .part/pv L_0x2a4d4c0, 25, 1, 32; +L_0x2a4d650 .part L_0x29fa450, 25, 1; +L_0x2a4db20 .part v0x29e1590_0, 25, 1; +L_0x2a4d8b0 .part/pv L_0x2a4d950, 26, 1, 32; +L_0x2a4da00 .part L_0x29fa450, 26, 1; +L_0x2a4de50 .part v0x29e1590_0, 26, 1; +L_0x2a4df40 .part/pv L_0x2a4dbc0, 27, 1, 32; +L_0x2a4d570 .part L_0x29fa450, 27, 1; +L_0x2a4ddb0 .part v0x29e1590_0, 27, 1; +L_0x2a4dfe0 .part/pv L_0x2a4e080, 28, 1, 32; +L_0x2a4e130 .part L_0x29fa450, 28, 1; +L_0x2a4e590 .part v0x29e1590_0, 28, 1; +L_0x2a4e630 .part/pv L_0x2a4e2d0, 29, 1, 32; +L_0x2a4dc70 .part L_0x29fa450, 29, 1; +L_0x2a4e480 .part v0x29e1590_0, 29, 1; +L_0x2a4e9b0 .part/pv L_0x299f8d0, 30, 1, 32; +L_0x2a4b1d0 .part L_0x29fa450, 30, 1; +L_0x2a4b270 .part v0x29e1590_0, 30, 1; +L_0x2a4b310 .part/pv L_0x2a48450, 31, 1, 32; +L_0x2a4e380 .part L_0x29fa450, 31, 1; +L_0x2a4e7e0 .part v0x29e1590_0, 31, 1; +S_0x27d0e50 .scope module, "nor0" "nor_32bit" 18 39, 24 1, S_0x2916ac0; + .timescale 0 0; +L_0x2a4f170 .functor NOR 1, L_0x2a4f220, L_0x2a4f310, C4<0>, C4<0>; +L_0x2a4f4a0 .functor NOR 1, L_0x2a4f550, L_0x2a4f640, C4<0>, C4<0>; +L_0x2a4f860 .functor NOR 1, L_0x2a4f8c0, L_0x2a4fa00, C4<0>, C4<0>; +L_0x2a4fbf0 .functor NOR 1, L_0x2a4fc50, L_0x2a4fd40, C4<0>, C4<0>; +L_0x2a4fb90 .functor NOR 1, L_0x2a4ff90, L_0x2a50100, C4<0>, C4<0>; +L_0x2a50320 .functor NOR 1, L_0x2a503d0, L_0x2a504c0, C4<0>, C4<0>; +L_0x2a50290 .functor NOR 1, L_0x2a50800, L_0x2a505b0, C4<0>, C4<0>; +L_0x2a508f0 .functor NOR 1, L_0x2a50ba0, L_0x2a50c90, C4<0>, C4<0>; +L_0x2a50e50 .functor NOR 1, L_0x2a50f00, L_0x2a50d80, C4<0>, C4<0>; +L_0x2a50ff0 .functor NOR 1, L_0x2a51310, L_0x2a513b0, C4<0>, C4<0>; +L_0x2a515a0 .functor NOR 1, L_0x2a51600, L_0x2a514a0, C4<0>, C4<0>; +L_0x2a516f0 .functor NOR 1, L_0x2a519c0, L_0x2a51a60, C4<0>, C4<0>; +L_0x2a512b0 .functor NOR 1, L_0x2a51c80, L_0x2a51b50, C4<0>, C4<0>; +L_0x2a51d70 .functor NOR 1, L_0x2a520a0, L_0x2a52140, C4<0>, C4<0>; +L_0x2a51ff0 .functor NOR 1, L_0x2a506f0, L_0x2a52230, C4<0>, C4<0>; +L_0x2a52320 .functor NOR 1, L_0x2a52930, L_0x2a529d0, C4<0>, C4<0>; +L_0x2a52850 .functor NOR 1, L_0x2a52c50, L_0x2a52ac0, C4<0>, C4<0>; +L_0x2a52ef0 .functor NOR 1, L_0x2a53040, L_0x2a530e0, C4<0>, C4<0>; +L_0x2a52de0 .functor NOR 1, L_0x2a53390, L_0x2a531d0, C4<0>, C4<0>; +L_0x2a53610 .functor NOR 1, L_0x2a52fa0, L_0x2a537c0, C4<0>, C4<0>; +L_0x2a534d0 .functor NOR 1, L_0x2a53aa0, L_0x2a538b0, C4<0>, C4<0>; +L_0x2a53a40 .functor NOR 1, L_0x2a536c0, L_0x2a53eb0, C4<0>, C4<0>; +L_0x2a53be0 .functor NOR 1, L_0x2a53c90, L_0x2a53fa0, C4<0>, C4<0>; +L_0x2a54130 .functor NOR 1, L_0x2a53da0, L_0x2a545c0, C4<0>, C4<0>; +L_0x2a542b0 .functor NOR 1, L_0x2a54360, L_0x2a54910, C4<0>, C4<0>; +L_0x2a546b0 .functor NOR 1, L_0x2a54840, L_0x2a54d10, C4<0>, C4<0>; +L_0x2a54b40 .functor NOR 1, L_0x2a54bf0, L_0x2a55040, C4<0>, C4<0>; +L_0x2a54db0 .functor NOR 1, L_0x2a54760, L_0x2a54fa0, C4<0>, C4<0>; +L_0x2a55270 .functor NOR 1, L_0x2a55320, L_0x2a55780, C4<0>, C4<0>; +L_0x2a554c0 .functor NOR 1, L_0x2a54e60, L_0x2a55670, C4<0>, C4<0>; +L_0x2780f70 .functor NOR 1, L_0x2a52390, L_0x2a52430, C4<0>, C4<0>; +L_0x276dfa0 .functor NOR 1, L_0x2a55570, L_0x2a559d0, C4<0>, C4<0>; +v0x2797de0_0 .net *"_s0", 0 0, L_0x2a4f170; 1 drivers +v0x2797ea0_0 .net *"_s101", 0 0, L_0x2a52ac0; 1 drivers +v0x2797f40_0 .net *"_s102", 0 0, L_0x2a52ef0; 1 drivers +v0x2771a00_0 .net *"_s105", 0 0, L_0x2a53040; 1 drivers +v0x2771a80_0 .net *"_s107", 0 0, L_0x2a530e0; 1 drivers +v0x2771b20_0 .net *"_s108", 0 0, L_0x2a52de0; 1 drivers +v0x280fee0_0 .net *"_s11", 0 0, L_0x2a4f640; 1 drivers +v0x280ff80_0 .net *"_s111", 0 0, L_0x2a53390; 1 drivers +v0x2810020_0 .net *"_s113", 0 0, L_0x2a531d0; 1 drivers +v0x27801e0_0 .net *"_s114", 0 0, L_0x2a53610; 1 drivers +v0x2780280_0 .net *"_s117", 0 0, L_0x2a52fa0; 1 drivers +v0x2780320_0 .net *"_s119", 0 0, L_0x2a537c0; 1 drivers +v0x2766340_0 .net *"_s12", 0 0, L_0x2a4f860; 1 drivers +v0x27663e0_0 .net *"_s120", 0 0, L_0x2a534d0; 1 drivers +v0x2807cf0_0 .net *"_s123", 0 0, L_0x2a53aa0; 1 drivers +v0x2807d90_0 .net *"_s125", 0 0, L_0x2a538b0; 1 drivers +v0x2766460_0 .net *"_s126", 0 0, L_0x2a53a40; 1 drivers +v0x27c5d40_0 .net *"_s129", 0 0, L_0x2a536c0; 1 drivers +v0x2807e10_0 .net *"_s131", 0 0, L_0x2a53eb0; 1 drivers +v0x27c5e60_0 .net *"_s132", 0 0, L_0x2a53be0; 1 drivers +v0x27c5dc0_0 .net *"_s135", 0 0, L_0x2a53c90; 1 drivers +v0x280d170_0 .net *"_s137", 0 0, L_0x2a53fa0; 1 drivers +v0x27c5ee0_0 .net *"_s138", 0 0, L_0x2a54130; 1 drivers +v0x280d2b0_0 .net *"_s141", 0 0, L_0x2a53da0; 1 drivers +v0x280d1f0_0 .net *"_s143", 0 0, L_0x2a545c0; 1 drivers +v0x280ee00_0 .net *"_s144", 0 0, L_0x2a542b0; 1 drivers +v0x280d330_0 .net *"_s147", 0 0, L_0x2a54360; 1 drivers +v0x280ef60_0 .net *"_s149", 0 0, L_0x2a54910; 1 drivers +v0x280efe0_0 .net *"_s15", 0 0, L_0x2a4f8c0; 1 drivers +v0x280ee80_0 .net *"_s150", 0 0, L_0x2a546b0; 1 drivers +v0x280aaa0_0 .net *"_s153", 0 0, L_0x2a54840; 1 drivers +v0x280ab40_0 .net *"_s155", 0 0, L_0x2a54d10; 1 drivers +v0x280a9a0_0 .net *"_s156", 0 0, L_0x2a54b40; 1 drivers +v0x280aa20_0 .net *"_s159", 0 0, L_0x2a54bf0; 1 drivers +v0x272e7b0_0 .net *"_s161", 0 0, L_0x2a55040; 1 drivers +v0x272e850_0 .net *"_s162", 0 0, L_0x2a54db0; 1 drivers +v0x272e690_0 .net *"_s165", 0 0, L_0x2a54760; 1 drivers +v0x272e730_0 .net *"_s167", 0 0, L_0x2a54fa0; 1 drivers +v0x27648d0_0 .net *"_s168", 0 0, L_0x2a55270; 1 drivers +v0x2764970_0 .net *"_s17", 0 0, L_0x2a4fa00; 1 drivers +v0x2767f20_0 .net *"_s171", 0 0, L_0x2a55320; 1 drivers +v0x2767fc0_0 .net *"_s173", 0 0, L_0x2a55780; 1 drivers +v0x27696c0_0 .net *"_s174", 0 0, L_0x2a554c0; 1 drivers +v0x2769760_0 .net *"_s177", 0 0, L_0x2a54e60; 1 drivers +v0x277f650_0 .net *"_s179", 0 0, L_0x2a55670; 1 drivers +v0x277f6f0_0 .net *"_s18", 0 0, L_0x2a4fbf0; 1 drivers +v0x2780ff0_0 .net *"_s180", 0 0, L_0x2780f70; 1 drivers +v0x2764790_0 .net *"_s183", 0 0, L_0x2a52390; 1 drivers +v0x2764810_0 .net *"_s185", 0 0, L_0x2a52430; 1 drivers +v0x27a01b0_0 .net *"_s186", 0 0, L_0x276dfa0; 1 drivers +v0x27a0230_0 .net *"_s189", 0 0, L_0x2a55570; 1 drivers +v0x27da020_0 .net *"_s191", 0 0, L_0x2a559d0; 1 drivers +v0x27ec1f0_0 .net *"_s21", 0 0, L_0x2a4fc50; 1 drivers +v0x2767dd0_0 .net *"_s23", 0 0, L_0x2a4fd40; 1 drivers +v0x2767e50_0 .net *"_s24", 0 0, L_0x2a4fb90; 1 drivers +v0x27f52e0_0 .net *"_s27", 0 0, L_0x2a4ff90; 1 drivers +v0x278abd0_0 .net *"_s29", 0 0, L_0x2a50100; 1 drivers +v0x2769560_0 .net *"_s3", 0 0, L_0x2a4f220; 1 drivers +v0x277e4b0_0 .net *"_s30", 0 0, L_0x2a50320; 1 drivers +v0x27695e0_0 .net *"_s33", 0 0, L_0x2a503d0; 1 drivers +v0x277d470_0 .net *"_s35", 0 0, L_0x2a504c0; 1 drivers +v0x277f4e0_0 .net *"_s36", 0 0, L_0x2a50290; 1 drivers +v0x27c2e90_0 .net *"_s39", 0 0, L_0x2a50800; 1 drivers +v0x277f560_0 .net *"_s41", 0 0, L_0x2a505b0; 1 drivers +v0x27c46b0_0 .net *"_s42", 0 0, L_0x2a508f0; 1 drivers +v0x2780e70_0 .net *"_s45", 0 0, L_0x2a50ba0; 1 drivers +v0x2780ef0_0 .net *"_s47", 0 0, L_0x2a50c90; 1 drivers +v0x27a0020_0 .net *"_s48", 0 0, L_0x2a50e50; 1 drivers +v0x27a00c0_0 .net *"_s5", 0 0, L_0x2a4f310; 1 drivers +v0x27d9e80_0 .net *"_s51", 0 0, L_0x2a50f00; 1 drivers +v0x27d9f00_0 .net *"_s53", 0 0, L_0x2a50d80; 1 drivers +v0x27d9fa0_0 .net *"_s54", 0 0, L_0x2a50ff0; 1 drivers +v0x27ec040_0 .net *"_s57", 0 0, L_0x2a51310; 1 drivers +v0x27ec0e0_0 .net *"_s59", 0 0, L_0x2a513b0; 1 drivers +v0x27ec160_0 .net *"_s6", 0 0, L_0x2a4f4a0; 1 drivers +v0x27f5120_0 .net *"_s60", 0 0, L_0x2a515a0; 1 drivers +v0x27f51a0_0 .net *"_s63", 0 0, L_0x2a51600; 1 drivers +v0x27f5220_0 .net *"_s65", 0 0, L_0x2a514a0; 1 drivers +v0x278aa00_0 .net *"_s66", 0 0, L_0x2a516f0; 1 drivers +v0x278aa80_0 .net *"_s69", 0 0, L_0x2a519c0; 1 drivers +v0x278ab20_0 .net *"_s71", 0 0, L_0x2a51a60; 1 drivers +v0x277e2d0_0 .net *"_s72", 0 0, L_0x2a512b0; 1 drivers +v0x277e370_0 .net *"_s75", 0 0, L_0x2a51c80; 1 drivers +v0x277e410_0 .net *"_s77", 0 0, L_0x2a51b50; 1 drivers +v0x277d280_0 .net *"_s78", 0 0, L_0x2a51d70; 1 drivers +v0x277d320_0 .net *"_s81", 0 0, L_0x2a520a0; 1 drivers +v0x277d3c0_0 .net *"_s83", 0 0, L_0x2a52140; 1 drivers +v0x27c2c90_0 .net *"_s84", 0 0, L_0x2a51ff0; 1 drivers +v0x27c2d30_0 .net *"_s87", 0 0, L_0x2a506f0; 1 drivers +v0x27c2dd0_0 .net *"_s89", 0 0, L_0x2a52230; 1 drivers +v0x27c44a0_0 .net *"_s9", 0 0, L_0x2a4f550; 1 drivers +v0x27c4520_0 .net *"_s90", 0 0, L_0x2a52320; 1 drivers +v0x27c45c0_0 .net *"_s93", 0 0, L_0x2a52930; 1 drivers +v0x2798cc0_0 .net *"_s95", 0 0, L_0x2a529d0; 1 drivers +v0x2798d60_0 .net *"_s96", 0 0, L_0x2a52850; 1 drivers +v0x2798e00_0 .net *"_s99", 0 0, L_0x2a52c50; 1 drivers +v0x27e2f60_0 .alias "a", 31 0, v0x29f1e00_0; +v0x27e2fe0_0 .alias "b", 31 0, v0x29e1880_0; +v0x27e3090_0 .alias "out", 31 0, v0x29e0f50_0; +L_0x2a4e8d0 .part/pv L_0x2a4f170, 0, 1, 32; +L_0x2a4f220 .part L_0x29fa450, 0, 1; +L_0x2a4f310 .part v0x29e1590_0, 0, 1; +L_0x2a4f400 .part/pv L_0x2a4f4a0, 1, 1, 32; +L_0x2a4f550 .part L_0x29fa450, 1, 1; +L_0x2a4f640 .part v0x29e1590_0, 1, 1; +L_0x2a4f730 .part/pv L_0x2a4f860, 2, 1, 32; +L_0x2a4f8c0 .part L_0x29fa450, 2, 1; +L_0x2a4fa00 .part v0x29e1590_0, 2, 1; +L_0x2a4faf0 .part/pv L_0x2a4fbf0, 3, 1, 32; +L_0x2a4fc50 .part L_0x29fa450, 3, 1; +L_0x2a4fd40 .part v0x29e1590_0, 3, 1; +L_0x2a4fea0 .part/pv L_0x2a4fb90, 4, 1, 32; +L_0x2a4ff90 .part L_0x29fa450, 4, 1; +L_0x2a50100 .part v0x29e1590_0, 4, 1; +L_0x2a501f0 .part/pv L_0x2a50320, 5, 1, 32; +L_0x2a503d0 .part L_0x29fa450, 5, 1; +L_0x2a504c0 .part v0x29e1590_0, 5, 1; +L_0x2a50650 .part/pv L_0x2a50290, 6, 1, 32; +L_0x2a50800 .part L_0x29fa450, 6, 1; +L_0x2a505b0 .part v0x29e1590_0, 6, 1; +L_0x2a509f0 .part/pv L_0x2a508f0, 7, 1, 32; +L_0x2a50ba0 .part L_0x29fa450, 7, 1; +L_0x2a50c90 .part v0x29e1590_0, 7, 1; +L_0x2a50a90 .part/pv L_0x2a50e50, 8, 1, 32; +L_0x2a50f00 .part L_0x29fa450, 8, 1; +L_0x2a50d80 .part v0x29e1590_0, 8, 1; +L_0x2a51120 .part/pv L_0x2a50ff0, 9, 1, 32; +L_0x2a51310 .part L_0x29fa450, 9, 1; +L_0x2a513b0 .part v0x29e1590_0, 9, 1; +L_0x2a511c0 .part/pv L_0x2a515a0, 10, 1, 32; +L_0x2a51600 .part L_0x29fa450, 10, 1; +L_0x2a514a0 .part v0x29e1590_0, 10, 1; +L_0x2a51800 .part/pv L_0x2a516f0, 11, 1, 32; +L_0x2a519c0 .part L_0x29fa450, 11, 1; +L_0x2a51a60 .part v0x29e1590_0, 11, 1; +L_0x2a518a0 .part/pv L_0x2a512b0, 12, 1, 32; +L_0x2a51c80 .part L_0x29fa450, 12, 1; +L_0x2a51b50 .part v0x29e1590_0, 12, 1; +L_0x2a51eb0 .part/pv L_0x2a51d70, 13, 1, 32; +L_0x2a520a0 .part L_0x29fa450, 13, 1; +L_0x2a52140 .part v0x29e1590_0, 13, 1; +L_0x2a51f50 .part/pv L_0x2a51ff0, 14, 1, 32; +L_0x2a506f0 .part L_0x29fa450, 14, 1; +L_0x2a52230 .part v0x29e1590_0, 14, 1; +L_0x2a52710 .part/pv L_0x2a52320, 15, 1, 32; +L_0x2a52930 .part L_0x29fa450, 15, 1; +L_0x2a529d0 .part v0x29e1590_0, 15, 1; +L_0x2a527b0 .part/pv L_0x2a52850, 16, 1, 32; +L_0x2a52c50 .part L_0x29fa450, 16, 1; +L_0x2a52ac0 .part v0x29e1590_0, 16, 1; +L_0x2a52bb0 .part/pv L_0x2a52ef0, 17, 1, 32; +L_0x2a53040 .part L_0x29fa450, 17, 1; +L_0x2a530e0 .part v0x29e1590_0, 17, 1; +L_0x2a52d40 .part/pv L_0x2a52de0, 18, 1, 32; +L_0x2a53390 .part L_0x29fa450, 18, 1; +L_0x2a531d0 .part v0x29e1590_0, 18, 1; +L_0x2a532c0 .part/pv L_0x2a53610, 19, 1, 32; +L_0x2a52fa0 .part L_0x29fa450, 19, 1; +L_0x2a537c0 .part v0x29e1590_0, 19, 1; +L_0x2a53430 .part/pv L_0x2a534d0, 20, 1, 32; +L_0x2a53aa0 .part L_0x29fa450, 20, 1; +L_0x2a538b0 .part v0x29e1590_0, 20, 1; +L_0x2a539a0 .part/pv L_0x2a53a40, 21, 1, 32; +L_0x2a536c0 .part L_0x29fa450, 21, 1; +L_0x2a53eb0 .part v0x29e1590_0, 21, 1; +L_0x2a53b40 .part/pv L_0x2a53be0, 22, 1, 32; +L_0x2a53c90 .part L_0x29fa450, 22, 1; +L_0x2a53fa0 .part v0x29e1590_0, 22, 1; +L_0x2a54090 .part/pv L_0x2a54130, 23, 1, 32; +L_0x2a53da0 .part L_0x29fa450, 23, 1; +L_0x2a545c0 .part v0x29e1590_0, 23, 1; +L_0x2a54210 .part/pv L_0x2a542b0, 24, 1, 32; +L_0x2a54360 .part L_0x29fa450, 24, 1; +L_0x2a54910 .part v0x29e1590_0, 24, 1; +L_0x2a54a00 .part/pv L_0x2a546b0, 25, 1, 32; +L_0x2a54840 .part L_0x29fa450, 25, 1; +L_0x2a54d10 .part v0x29e1590_0, 25, 1; +L_0x2a54aa0 .part/pv L_0x2a54b40, 26, 1, 32; +L_0x2a54bf0 .part L_0x29fa450, 26, 1; +L_0x2a55040 .part v0x29e1590_0, 26, 1; +L_0x2a55130 .part/pv L_0x2a54db0, 27, 1, 32; +L_0x2a54760 .part L_0x29fa450, 27, 1; +L_0x2a54fa0 .part v0x29e1590_0, 27, 1; +L_0x2a551d0 .part/pv L_0x2a55270, 28, 1, 32; +L_0x2a55320 .part L_0x29fa450, 28, 1; +L_0x2a55780 .part v0x29e1590_0, 28, 1; +L_0x2a55820 .part/pv L_0x2a554c0, 29, 1, 32; +L_0x2a54e60 .part L_0x29fa450, 29, 1; +L_0x2a55670 .part v0x29e1590_0, 29, 1; +L_0x2a55ba0 .part/pv L_0x2780f70, 30, 1, 32; +L_0x2a52390 .part L_0x29fa450, 30, 1; +L_0x2a52430 .part v0x29e1590_0, 30, 1; +L_0x2a524d0 .part/pv L_0x276dfa0, 31, 1, 32; +L_0x2a55570 .part L_0x29fa450, 31, 1; +L_0x2a559d0 .part v0x29e1590_0, 31, 1; +S_0x290e830 .scope module, "or0" "or_32bit" 18 40, 25 1, S_0x2916ac0; + .timescale 0 0; +L_0x27a0140 .functor OR 1, L_0x2a56360, L_0x2a56400, C4<0>, C4<0>; +L_0x2a56590 .functor OR 1, L_0x2a56640, L_0x2a56730, C4<0>, C4<0>; +L_0x2a55610 .functor OR 1, L_0x2a569a0, L_0x2a56ae0, C4<0>, C4<0>; +L_0x2a56cd0 .functor OR 1, L_0x2a56d30, L_0x2a56e20, C4<0>, C4<0>; +L_0x2a56c70 .functor OR 1, L_0x2a57070, L_0x2a571e0, C4<0>, C4<0>; +L_0x2a57400 .functor OR 1, L_0x2a574b0, L_0x2a575a0, C4<0>, C4<0>; +L_0x2a57370 .functor OR 1, L_0x2a578e0, L_0x2a57690, C4<0>, C4<0>; +L_0x2a579d0 .functor OR 1, L_0x2a57c80, L_0x2a57d70, C4<0>, C4<0>; +L_0x2a57f30 .functor OR 1, L_0x2a57fe0, L_0x2a57e60, C4<0>, C4<0>; +L_0x2a580d0 .functor OR 1, L_0x2a583f0, L_0x2a58490, C4<0>, C4<0>; +L_0x2a58680 .functor OR 1, L_0x2a586e0, L_0x2a58580, C4<0>, C4<0>; +L_0x2a587d0 .functor OR 1, L_0x2a58aa0, L_0x2a58b40, C4<0>, C4<0>; +L_0x2a58390 .functor OR 1, L_0x2a58d60, L_0x2a58c30, C4<0>, C4<0>; +L_0x2a58e50 .functor OR 1, L_0x2a59180, L_0x2a59220, C4<0>, C4<0>; +L_0x2a590d0 .functor OR 1, L_0x2a577d0, L_0x2a59310, C4<0>, C4<0>; +L_0x2a59400 .functor OR 1, L_0x2a59a10, L_0x2a59ab0, C4<0>, C4<0>; +L_0x2a59930 .functor OR 1, L_0x2a59d30, L_0x2a59ba0, C4<0>, C4<0>; +L_0x2a59fd0 .functor OR 1, L_0x2a5a120, L_0x2a5a1c0, C4<0>, C4<0>; +L_0x2a59ec0 .functor OR 1, L_0x2a5a470, L_0x2a5a2b0, C4<0>, C4<0>; +L_0x2a5a6f0 .functor OR 1, L_0x2a5a080, L_0x2a5a8a0, C4<0>, C4<0>; +L_0x2a5a5b0 .functor OR 1, L_0x2a5ab80, L_0x2a5a990, C4<0>, C4<0>; +L_0x2a5ab20 .functor OR 1, L_0x2a5a7a0, L_0x2a5af90, C4<0>, C4<0>; +L_0x27fe2f0 .functor OR 1, L_0x2a5acc0, L_0x2a5ad60, C4<0>, C4<0>; +L_0x29e0160 .functor OR 1, L_0x2a5ae80, L_0x2a3c4d0, C4<0>, C4<0>; +L_0x2a56f10 .functor OR 1, L_0x2a3c920, L_0x2a3c6d0, C4<0>, C4<0>; +L_0x2a57160 .functor OR 1, L_0x2a3c400, L_0x2a3cd60, C4<0>, C4<0>; +L_0x2a3cab0 .functor OR 1, L_0x2a3cb60, L_0x2a3d0e0, C4<0>, C4<0>; +L_0x2a3d270 .functor OR 1, L_0x2a3cc50, L_0x2a3ce50, C4<0>, C4<0>; +L_0x2a3cfe0 .functor OR 1, L_0x2a5d340, L_0x2a5d090, C4<0>, C4<0>; +L_0x2a5d220 .functor OR 1, L_0x2a3d320, L_0x2a5d7b0, C4<0>, C4<0>; +L_0x2a59470 .functor OR 1, L_0x2a594d0, L_0x2a59570, C4<0>, C4<0>; +L_0x2a5d520 .functor OR 1, L_0x2a5d960, L_0x2a5da50, C4<0>, C4<0>; +v0x28f5e50_0 .net *"_s0", 0 0, L_0x27a0140; 1 drivers +v0x28f5f10_0 .net *"_s101", 0 0, L_0x2a59ba0; 1 drivers +v0x28edbc0_0 .net *"_s102", 0 0, L_0x2a59fd0; 1 drivers +v0x28edc60_0 .net *"_s105", 0 0, L_0x2a5a120; 1 drivers +v0x28f0a30_0 .net *"_s107", 0 0, L_0x2a5a1c0; 1 drivers +v0x28f0ab0_0 .net *"_s108", 0 0, L_0x2a59ec0; 1 drivers +v0x28f8cc0_0 .net *"_s11", 0 0, L_0x2a56730; 1 drivers +v0x28f8d40_0 .net *"_s111", 0 0, L_0x2a5a470; 1 drivers +v0x29116a0_0 .net *"_s113", 0 0, L_0x2a5a2b0; 1 drivers +v0x2911720_0 .net *"_s114", 0 0, L_0x2a5a6f0; 1 drivers +v0x2919930_0 .net *"_s117", 0 0, L_0x2a5a080; 1 drivers +v0x29199b0_0 .net *"_s119", 0 0, L_0x2a5a8a0; 1 drivers +v0x299cfb0_0 .net *"_s12", 0 0, L_0x2a55610; 1 drivers +v0x299ab10_0 .net *"_s120", 0 0, L_0x2a5a5b0; 1 drivers +v0x289a5c0_0 .net *"_s123", 0 0, L_0x2a5ab80; 1 drivers +v0x289a660_0 .net *"_s125", 0 0, L_0x2a5a990; 1 drivers +v0x299ab90_0 .net *"_s126", 0 0, L_0x2a5ab20; 1 drivers +v0x289a340_0 .net *"_s129", 0 0, L_0x2a5a7a0; 1 drivers +v0x289a270_0 .net *"_s131", 0 0, L_0x2a5af90; 1 drivers +v0x2899fc0_0 .net *"_s132", 0 0, L_0x27fe2f0; 1 drivers +v0x2899ca0_0 .net *"_s135", 0 0, L_0x2a5acc0; 1 drivers +v0x2899f20_0 .net *"_s137", 0 0, L_0x2a5ad60; 1 drivers +v0x289b350_0 .net *"_s138", 0 0, L_0x29e0160; 1 drivers +v0x2899bf0_0 .net *"_s141", 0 0, L_0x2a5ae80; 1 drivers +v0x289b030_0 .net *"_s143", 0 0, L_0x2a3c4d0; 1 drivers +v0x289b290_0 .net *"_s144", 0 0, L_0x2a56f10; 1 drivers +v0x289af60_0 .net *"_s147", 0 0, L_0x2a3c920; 1 drivers +v0x283ec70_0 .net *"_s149", 0 0, L_0x2a3c6d0; 1 drivers +v0x283ed10_0 .net *"_s15", 0 0, L_0x2a569a0; 1 drivers +v0x28e3240_0 .net *"_s150", 0 0, L_0x2a57160; 1 drivers +v0x28e32c0_0 .net *"_s153", 0 0, L_0x2a3c400; 1 drivers +v0x28399c0_0 .net *"_s155", 0 0, L_0x2a3cd60; 1 drivers +v0x29041f0_0 .net *"_s156", 0 0, L_0x2a3cab0; 1 drivers +v0x2904290_0 .net *"_s159", 0 0, L_0x2a3cb60; 1 drivers +v0x28eb900_0 .net *"_s161", 0 0, L_0x2a3d0e0; 1 drivers +v0x291cb30_0 .net *"_s162", 0 0, L_0x2a3d270; 1 drivers +v0x291cbb0_0 .net *"_s165", 0 0, L_0x2a3cc50; 1 drivers +v0x2944aa0_0 .net *"_s167", 0 0, L_0x2a3ce50; 1 drivers +v0x2944b20_0 .net *"_s168", 0 0, L_0x2a3cfe0; 1 drivers +v0x290c590_0 .net *"_s17", 0 0, L_0x2a56ae0; 1 drivers +v0x290c630_0 .net *"_s171", 0 0, L_0x2a5d340; 1 drivers +v0x2943300_0 .net *"_s173", 0 0, L_0x2a5d090; 1 drivers +v0x2943380_0 .net *"_s174", 0 0, L_0x2a5d220; 1 drivers +v0x2942730_0 .net *"_s177", 0 0, L_0x2a3d320; 1 drivers +v0x29331b0_0 .net *"_s179", 0 0, L_0x2a5d7b0; 1 drivers +v0x29427b0_0 .net *"_s18", 0 0, L_0x2a56cd0; 1 drivers +v0x27fe350_0 .net *"_s180", 0 0, L_0x2a59470; 1 drivers +v0x27fe3d0_0 .net *"_s183", 0 0, L_0x2a594d0; 1 drivers +v0x279bf00_0 .net *"_s185", 0 0, L_0x2a59570; 1 drivers +v0x2941b60_0 .net *"_s186", 0 0, L_0x2a5d520; 1 drivers +v0x2941be0_0 .net *"_s189", 0 0, L_0x2a5d960; 1 drivers +v0x276c0c0_0 .net *"_s191", 0 0, L_0x2a5da50; 1 drivers +v0x27b66e0_0 .net *"_s21", 0 0, L_0x2a56d30; 1 drivers +v0x2940f90_0 .net *"_s23", 0 0, L_0x2a56e20; 1 drivers +v0x2941010_0 .net *"_s24", 0 0, L_0x2a56c70; 1 drivers +v0x276ac50_0 .net *"_s27", 0 0, L_0x2a57070; 1 drivers +v0x27d0f80_0 .net *"_s29", 0 0, L_0x2a571e0; 1 drivers +v0x29403c0_0 .net *"_s3", 0 0, L_0x2a56360; 1 drivers +v0x2797fc0_0 .net *"_s30", 0 0, L_0x2a57400; 1 drivers +v0x2940440_0 .net *"_s33", 0 0, L_0x2a574b0; 1 drivers +v0x2771bf0_0 .net *"_s35", 0 0, L_0x2a575a0; 1 drivers +v0x293f7f0_0 .net *"_s36", 0 0, L_0x2a57370; 1 drivers +v0x28100e0_0 .net *"_s39", 0 0, L_0x2a578e0; 1 drivers +v0x293f870_0 .net *"_s41", 0 0, L_0x2a57690; 1 drivers +v0x27803f0_0 .net *"_s42", 0 0, L_0x2a579d0; 1 drivers +v0x293ec20_0 .net *"_s45", 0 0, L_0x2a57c80; 1 drivers +v0x293eca0_0 .net *"_s47", 0 0, L_0x2a57d70; 1 drivers +v0x293e050_0 .net *"_s48", 0 0, L_0x2a57f30; 1 drivers +v0x293e0f0_0 .net *"_s5", 0 0, L_0x2a56400; 1 drivers +v0x2949180_0 .net *"_s51", 0 0, L_0x2a57fe0; 1 drivers +v0x2949200_0 .net *"_s53", 0 0, L_0x2a57e60; 1 drivers +v0x29485b0_0 .net *"_s54", 0 0, L_0x2a580d0; 1 drivers +v0x2948650_0 .net *"_s57", 0 0, L_0x2a583f0; 1 drivers +v0x29479e0_0 .net *"_s59", 0 0, L_0x2a58490; 1 drivers +v0x2947a60_0 .net *"_s6", 0 0, L_0x2a56590; 1 drivers +v0x2946e10_0 .net *"_s60", 0 0, L_0x2a58680; 1 drivers +v0x2946e90_0 .net *"_s63", 0 0, L_0x2a586e0; 1 drivers +v0x2946240_0 .net *"_s65", 0 0, L_0x2a58580; 1 drivers +v0x29462c0_0 .net *"_s66", 0 0, L_0x2a587d0; 1 drivers +v0x2945670_0 .net *"_s69", 0 0, L_0x2a58aa0; 1 drivers +v0x2945710_0 .net *"_s71", 0 0, L_0x2a58b40; 1 drivers +v0x2943ed0_0 .net *"_s72", 0 0, L_0x2a58390; 1 drivers +v0x2943f50_0 .net *"_s75", 0 0, L_0x2a58d60; 1 drivers +v0x2784ee0_0 .net *"_s77", 0 0, L_0x2a58c30; 1 drivers +v0x2784f80_0 .net *"_s78", 0 0, L_0x2a58e50; 1 drivers +v0x2933040_0 .net *"_s81", 0 0, L_0x2a59180; 1 drivers +v0x29330e0_0 .net *"_s83", 0 0, L_0x2a59220; 1 drivers +v0x27fe1d0_0 .net *"_s84", 0 0, L_0x2a590d0; 1 drivers +v0x27fe270_0 .net *"_s87", 0 0, L_0x2a577d0; 1 drivers +v0x279bd70_0 .net *"_s89", 0 0, L_0x2a59310; 1 drivers +v0x279be10_0 .net *"_s9", 0 0, L_0x2a56640; 1 drivers +v0x276bf20_0 .net *"_s90", 0 0, L_0x2a59400; 1 drivers +v0x276bfc0_0 .net *"_s93", 0 0, L_0x2a59a10; 1 drivers +v0x27b6530_0 .net *"_s95", 0 0, L_0x2a59ab0; 1 drivers +v0x27b65d0_0 .net *"_s96", 0 0, L_0x2a59930; 1 drivers +v0x276aa90_0 .net *"_s99", 0 0, L_0x2a59d30; 1 drivers +v0x276ab30_0 .alias "a", 31 0, v0x29f1e00_0; +v0x276abd0_0 .alias "b", 31 0, v0x29e1880_0; +v0x27d0db0_0 .alias "out", 31 0, v0x29e0fd0_0; +L_0x2a55ac0 .part/pv L_0x27a0140, 0, 1, 32; +L_0x2a56360 .part L_0x29fa450, 0, 1; +L_0x2a56400 .part v0x29e1590_0, 0, 1; +L_0x2a564f0 .part/pv L_0x2a56590, 1, 1, 32; +L_0x2a56640 .part L_0x29fa450, 1, 1; +L_0x2a56730 .part v0x29e1590_0, 1, 1; +L_0x2a56820 .part/pv L_0x2a55610, 2, 1, 32; +L_0x2a569a0 .part L_0x29fa450, 2, 1; +L_0x2a56ae0 .part v0x29e1590_0, 2, 1; +L_0x2a56bd0 .part/pv L_0x2a56cd0, 3, 1, 32; +L_0x2a56d30 .part L_0x29fa450, 3, 1; +L_0x2a56e20 .part v0x29e1590_0, 3, 1; +L_0x2a56f80 .part/pv L_0x2a56c70, 4, 1, 32; +L_0x2a57070 .part L_0x29fa450, 4, 1; +L_0x2a571e0 .part v0x29e1590_0, 4, 1; +L_0x2a572d0 .part/pv L_0x2a57400, 5, 1, 32; +L_0x2a574b0 .part L_0x29fa450, 5, 1; +L_0x2a575a0 .part v0x29e1590_0, 5, 1; +L_0x2a57730 .part/pv L_0x2a57370, 6, 1, 32; +L_0x2a578e0 .part L_0x29fa450, 6, 1; +L_0x2a57690 .part v0x29e1590_0, 6, 1; +L_0x2a57ad0 .part/pv L_0x2a579d0, 7, 1, 32; +L_0x2a57c80 .part L_0x29fa450, 7, 1; +L_0x2a57d70 .part v0x29e1590_0, 7, 1; +L_0x2a57b70 .part/pv L_0x2a57f30, 8, 1, 32; +L_0x2a57fe0 .part L_0x29fa450, 8, 1; +L_0x2a57e60 .part v0x29e1590_0, 8, 1; +L_0x2a58200 .part/pv L_0x2a580d0, 9, 1, 32; +L_0x2a583f0 .part L_0x29fa450, 9, 1; +L_0x2a58490 .part v0x29e1590_0, 9, 1; +L_0x2a582a0 .part/pv L_0x2a58680, 10, 1, 32; +L_0x2a586e0 .part L_0x29fa450, 10, 1; +L_0x2a58580 .part v0x29e1590_0, 10, 1; +L_0x2a588e0 .part/pv L_0x2a587d0, 11, 1, 32; +L_0x2a58aa0 .part L_0x29fa450, 11, 1; +L_0x2a58b40 .part v0x29e1590_0, 11, 1; +L_0x2a58980 .part/pv L_0x2a58390, 12, 1, 32; +L_0x2a58d60 .part L_0x29fa450, 12, 1; +L_0x2a58c30 .part v0x29e1590_0, 12, 1; +L_0x2a58f90 .part/pv L_0x2a58e50, 13, 1, 32; +L_0x2a59180 .part L_0x29fa450, 13, 1; +L_0x2a59220 .part v0x29e1590_0, 13, 1; +L_0x2a59030 .part/pv L_0x2a590d0, 14, 1, 32; +L_0x2a577d0 .part L_0x29fa450, 14, 1; +L_0x2a59310 .part v0x29e1590_0, 14, 1; +L_0x2a597f0 .part/pv L_0x2a59400, 15, 1, 32; +L_0x2a59a10 .part L_0x29fa450, 15, 1; +L_0x2a59ab0 .part v0x29e1590_0, 15, 1; +L_0x2a59890 .part/pv L_0x2a59930, 16, 1, 32; +L_0x2a59d30 .part L_0x29fa450, 16, 1; +L_0x2a59ba0 .part v0x29e1590_0, 16, 1; +L_0x2a59c90 .part/pv L_0x2a59fd0, 17, 1, 32; +L_0x2a5a120 .part L_0x29fa450, 17, 1; +L_0x2a5a1c0 .part v0x29e1590_0, 17, 1; +L_0x2a59e20 .part/pv L_0x2a59ec0, 18, 1, 32; +L_0x2a5a470 .part L_0x29fa450, 18, 1; +L_0x2a5a2b0 .part v0x29e1590_0, 18, 1; +L_0x2a5a3a0 .part/pv L_0x2a5a6f0, 19, 1, 32; +L_0x2a5a080 .part L_0x29fa450, 19, 1; +L_0x2a5a8a0 .part v0x29e1590_0, 19, 1; +L_0x2a5a510 .part/pv L_0x2a5a5b0, 20, 1, 32; +L_0x2a5ab80 .part L_0x29fa450, 20, 1; +L_0x2a5a990 .part v0x29e1590_0, 20, 1; +L_0x2a5aa80 .part/pv L_0x2a5ab20, 21, 1, 32; +L_0x2a5a7a0 .part L_0x29fa450, 21, 1; +L_0x2a5af90 .part v0x29e1590_0, 21, 1; +L_0x2a5ac20 .part/pv L_0x27fe2f0, 22, 1, 32; +L_0x2a5acc0 .part L_0x29fa450, 22, 1; +L_0x2a5ad60 .part v0x29e1590_0, 22, 1; +L_0x2a3c630 .part/pv L_0x29e0160, 23, 1, 32; +L_0x2a5ae80 .part L_0x29fa450, 23, 1; +L_0x2a3c4d0 .part v0x29e1590_0, 23, 1; +L_0x2a3c570 .part/pv L_0x2a56f10, 24, 1, 32; +L_0x2a3c920 .part L_0x29fa450, 24, 1; +L_0x2a3c6d0 .part v0x29e1590_0, 24, 1; +L_0x2a3c7c0 .part/pv L_0x2a57160, 25, 1, 32; +L_0x2a3c400 .part L_0x29fa450, 25, 1; +L_0x2a3cd60 .part v0x29e1590_0, 25, 1; +L_0x2a3ca10 .part/pv L_0x2a3cab0, 26, 1, 32; +L_0x2a3cb60 .part L_0x29fa450, 26, 1; +L_0x2a3d0e0 .part v0x29e1590_0, 26, 1; +L_0x2a3d1d0 .part/pv L_0x2a3d270, 27, 1, 32; +L_0x2a3cc50 .part L_0x29fa450, 27, 1; +L_0x2a3ce50 .part v0x29e1590_0, 27, 1; +L_0x2a3cf40 .part/pv L_0x2a3cfe0, 28, 1, 32; +L_0x2a5d340 .part L_0x29fa450, 28, 1; +L_0x2a5d090 .part v0x29e1590_0, 28, 1; +L_0x2a5d180 .part/pv L_0x2a5d220, 29, 1, 32; +L_0x2a3d320 .part L_0x29fa450, 29, 1; +L_0x2a5d7b0 .part v0x29e1590_0, 29, 1; +L_0x2a5d3e0 .part/pv L_0x2a59470, 30, 1, 32; +L_0x2a594d0 .part L_0x29fa450, 30, 1; +L_0x2a59570 .part v0x29e1590_0, 30, 1; +L_0x2a5d480 .part/pv L_0x2a5d520, 31, 1, 32; +L_0x2a5d960 .part L_0x29fa450, 31, 1; +L_0x2a5da50 .part v0x29e1590_0, 31, 1; +S_0x2947110 .scope module, "memory0" "memory" 4 90, 7 42, S_0x28eb4b0; + .timescale 0 0; +L_0x2a5d6c0 .functor BUFZ 32, L_0x2a5d620, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x2946540_0 .alias "Addr", 31 0, v0x29f1cf0_0; +v0x2945970_0 .alias "DataIn", 31 0, v0x29f1e80_0; +v0x29459f0_0 .net "DataOut", 31 0, L_0x2a5d6c0; 1 drivers +v0x2944da0_0 .net *"_s0", 31 0, L_0x2a5d620; 1 drivers +v0x2999110 .array "mem", 0 60, 31 0; +v0x2999190_0 .alias "regWE", 0 0, v0x29f2c30_0; +E_0x2947200 .event edge, v0x29488b0_0; +L_0x2a5d620 .array/port v0x2999110, v0x29e0dd0_0; +S_0x2934a40 .scope module, "ToReg" "mux" 4 91, 2 1, S_0x28eb4b0; + .timescale 0 0; +P_0x294a248 .param/l "width" 2 2, +C4<0100000>; +v0x29494c0_0 .alias "address", 0 0, v0x29f2970_0; +v0x29488b0_0 .alias "input0", 31 0, v0x29f1cf0_0; +v0x2948930_0 .net "input1", 31 0, L_0x2a5e4a0; 1 drivers +v0x2947ce0_0 .var "out", 31 0; +E_0x2934b30 .event edge, v0x29494c0_0, v0x2948930_0, v0x29488b0_0; +S_0x29361c0 .scope module, "dataOrPC" "mux" 4 95, 2 1, S_0x28eb4b0; + .timescale 0 0; +P_0x2937a08 .param/l "width" 2 2, +C4<0100000>; +v0x2935620_0 .alias "address", 0 0, v0x29f2a20_0; +v0x294a440_0 .alias "input0", 31 0, v0x29f3370_0; +v0x294a4c0_0 .alias "input1", 31 0, v0x29f2cb0_0; +v0x294a1c0_0 .var "out", 31 0; +E_0x29362b0 .event edge, v0x293e3f0_0, v0x294a4c0_0, v0x294a440_0; +S_0x29390c0 .scope module, "jumpto" "mux" 4 99, 2 1, S_0x28eb4b0; + .timescale 0 0; +P_0x2939d68 .param/l "width" 2 2, +C4<011010>; +v0x2938500_0 .alias "address", 0 0, v0x29f2740_0; +v0x29385a0_0 .alias "input0", 25 0, v0x29f3270_0; +v0x2937960_0 .net "input1", 25 0, L_0x2a5e5e0; 1 drivers +v0x2936d80_0 .var "out", 25 0; +E_0x29391b0 .event edge, v0x2938500_0, v0x2937960_0, v0x29385a0_0; +S_0x293cb80 .scope module, "Rd_or_Rt" "mux" 4 102, 2 1, S_0x28eb4b0; + .timescale 0 0; +P_0x293bfc8 .param/l "width" 2 2, +C4<0101>; +v0x293b400_0 .alias "address", 0 0, v0x29f2aa0_0; +v0x293a840_0 .alias "input0", 4 0, v0x29f1f30_0; +v0x293a8e0_0 .alias "input1", 4 0, v0x29f20c0_0; +v0x2939c80_0 .var "out", 4 0; +E_0x293cc70 .event edge, v0x293b400_0, v0x293a8e0_0, v0x293a840_0; +S_0x293ef20 .scope module, "writeRA" "mux" 4 103, 2 1, S_0x28eb4b0; + .timescale 0 0; +P_0x2942ab8 .param/l "width" 2 2, +C4<0101>; +v0x293e3f0_0 .alias "address", 0 0, v0x29f2a20_0; +v0x293d7c0_0 .alias "input0", 4 0, v0x29f31f0_0; +v0x293d480_0 .net "input1", 4 0, C4<11111>; 1 drivers +v0x293d520_0 .var "out", 4 0; +E_0x293f010 .event edge, v0x293e3f0_0, v0x293d480_0, v0x293d7c0_0; +S_0x28e2df0 .scope module, "dff" "dff" 26 9; + .timescale 0 0; +P_0x27c6378 .param/l "width" 26 10, +C4<01000>; +v0x29f36b0_0 .net "ce", 0 0, C4; 0 drivers +v0x29f3730_0 .net "clk", 0 0, C4; 0 drivers +v0x29f37b0_0 .net "dataIn", 7 0, C4; 0 drivers +v0x29f3830_0 .net "dataOut", 7 0, v0x29f38b0_0; 1 drivers +v0x29f38b0_0 .var "mem", 7 0; +E_0x29e1cb0 .event posedge, v0x29f3730_0; +S_0x2896ad0 .scope module, "mux32to1by1" "mux32to1by1" 27 1; + .timescale 0 0; +v0x29f3930_0 .net "address", 4 0, C4; 0 drivers +v0x29f39b0_0 .net "inputs", 31 0, C4; 0 drivers +v0x29f3a30_0 .net "mux", 0 0, C4; 0 drivers +v0x29f3ad0_0 .net "out", 0 0, L_0x2a5e680; 1 drivers +L_0x2a5e680 .part/v C4, C4, 1; + .scope S_0x290c140; +T_0 ; + %wait E_0x289db50; + %load/v 8, v0x291a090_0, 1; +======= +S_0x289b140 .scope module, "addressmux" "addressmux" 2 35; + .timescale 0 0; +v0x279add0_0 .net "addr0", 4 0, C4; 0 drivers +v0x28a8ff0_0 .net "addr1", 4 0, C4; 0 drivers +v0x28a9090_0 .net "mux_address", 0 0, C4; 0 drivers +v0x28d31d0_0 .var "out", 0 0; +E_0x282cb50 .event edge, v0x28a9090_0, v0x28a8ff0_0, v0x279add0_0; +S_0x2892da0 .scope module, "behavioralFullAdder" "behavioralFullAdder" 3 3; + .timescale 0 0; +v0x28d2600_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x28c2e80_0 .net *"_s11", 1 0, L_0x2982ec0; 1 drivers +v0x28c2f20_0 .net *"_s13", 1 0, L_0x2983000; 1 drivers +v0x28d1a30_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x28d0e60_0 .net *"_s17", 1 0, L_0x2983130; 1 drivers +v0x28d0ee0_0 .net *"_s3", 1 0, L_0x2982ce0; 1 drivers +v0x28d0290_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x28d0330_0 .net *"_s7", 1 0, L_0x2982dd0; 1 drivers +v0x28cf6c0_0 .net "a", 0 0, C4; 0 drivers +v0x28cf760_0 .net "b", 0 0, C4; 0 drivers +v0x28ceaf0_0 .net "carryin", 0 0, C4; 0 drivers +v0x28ceb90_0 .net "carryout", 0 0, L_0x2982b50; 1 drivers +v0x28c2c90_0 .net "sum", 0 0, L_0x2982bf0; 1 drivers +L_0x2982b50 .part L_0x2983130, 1, 1; +L_0x2982bf0 .part L_0x2983130, 0, 1; +L_0x2982ce0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x2982dd0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x2982ec0 .arith/sum 2, L_0x2982ce0, L_0x2982dd0; +L_0x2983000 .concat [ 1 1 0 0], C4, C4<0>; +L_0x2983130 .arith/sum 2, L_0x2982ec0, L_0x2983000; +S_0x287a4b0 .scope module, "cpu" "cpu" 4 18; + .timescale 0 0; +v0x2980c70_0 .net "ALU_OperandSource", 0 0, v0x2980500_0; 1 drivers +v0x2980cf0_0 .net "ALU_result", 31 0, v0x296fdd0_0; 1 drivers +v0x2980e00_0 .net "Da", 31 0, L_0x2989450; 1 drivers +v0x2980e80_0 .net "Db", 31 0, L_0x297e040; 1 drivers +v0x2980f30_0 .net "Rd", 4 0, L_0x29844e0; 1 drivers +RS_0x7ff6df0a54e8 .resolv tri, L_0x2984290, L_0x2984760, C4, C4; +v0x2980fb0_0 .net8 "Rs", 4 0, RS_0x7ff6df0a54e8; 2 drivers +RS_0x7ff6df092468 .resolv tri, L_0x2984440, L_0x2984800, C4, C4; +v0x29810c0_0 .net8 "Rt", 4 0, RS_0x7ff6df092468; 2 drivers +v0x2981140_0 .net *"_s5", 30 0, C4; 1 drivers +v0x29811c0_0 .net *"_s7", 0 0, L_0x29ed3b0; 1 drivers +v0x2981240_0 .net "carryout", 0 0, v0x2941f50_0; 1 drivers +v0x29812c0_0 .net "clk", 0 0, C4; 0 drivers +v0x2981340_0 .net "command", 2 0, v0x2980580_0; 1 drivers +v0x29814c0_0 .net "dataOut", 0 0, L_0x29ed250; 1 drivers +v0x2981540_0 .net "funct", 5 0, L_0x2984620; 1 drivers +v0x2981640_0 .net "imm", 15 0, L_0x29848a0; 1 drivers +v0x29816c0_0 .net "instruction", 31 0, L_0x297feb0; 1 drivers +v0x29815c0_0 .net "is_branch", 0 0, v0x2980680_0; 1 drivers +v0x29817d0_0 .net "is_jump", 0 0, v0x2980800_0; 1 drivers +v0x2981740_0 .net "isjr", 0 0, v0x2980780_0; 1 drivers +v0x29818f0_0 .net "jump_target", 25 0, v0x28c5d80_0; 1 drivers +v0x2981a20_0 .net "linkToPC", 0 0, v0x29808d0_0; 1 drivers +v0x2981aa0_0 .net "memoryRead", 0 0, v0x29809a0_0; 1 drivers +v0x2981970_0 .net "memoryToRegister", 0 0, v0x2980a70_0; 1 drivers +v0x2981c30_0 .net "memoryWrite", 0 0, v0x2980af0_0; 1 drivers +RS_0x7ff6df0a6238 .resolv tri, L_0x29841f0, L_0x29846c0, L_0x2984330, C4; +v0x2981d80_0 .net8 "opcode", 5 0, RS_0x7ff6df0a6238; 3 drivers +v0x2981e90_0 .net "overflow", 0 0, v0x296fe50_0; 1 drivers +v0x2981cb0_0 .net "pc", 31 0, v0x2980150_0; 1 drivers +v0x2982080_0 .net "regAddr", 4 0, v0x28cc520_0; 1 drivers +v0x2981f10_0 .net "regWrite", 0 0, C4; 0 drivers +v0x29821f0_0 .net "reg_to_write", 4 0, v0x28c8c80_0; 1 drivers +v0x2982100_0 .net "shift", 4 0, L_0x2984580; 1 drivers +v0x2982370_0 .net "tempWriteData", 31 0, v0x28d6ce0_0; 1 drivers +v0x2982270_0 .net "temp_jump_target", 25 0, L_0x2984b50; 1 drivers +v0x2982500_0 .net "writeData", 31 0, v0x28d91c0_0; 1 drivers +v0x29823f0_0 .net "writeReg", 0 0, v0x2980bf0_0; 1 drivers +v0x2982470_0 .net "zero", 0 0, v0x2970230_0; 1 drivers +L_0x29ed250 .part L_0x29ec6c0, 0, 1; +L_0x29ed3b0 .part L_0x29ed250, 0, 1; +L_0x29ed4a0 .concat [ 1 31 0 0], L_0x29ed3b0, C4; +L_0x29ed5e0 .part L_0x2989450, 0, 26; +S_0x2980410 .scope module, "CPU_control" "control" 4 47, 5 28, S_0x287a4b0; + .timescale 0 0; +v0x2980500_0 .var "ALUoperandSource", 0 0; +v0x2980580_0 .var "command", 2 0; +v0x2980600_0 .alias "funct", 5 0, v0x2981540_0; +v0x2980680_0 .var "isbranch", 0 0; +v0x2980780_0 .var "isjr", 0 0; +v0x2980800_0 .var "isjump", 0 0; +v0x29808d0_0 .var "linkToPC", 0 0; +v0x29809a0_0 .var "memoryRead", 0 0; +v0x2980a70_0 .var "memoryToRegister", 0 0; +v0x2980af0_0 .var "memoryWrite", 0 0; +v0x2980b70_0 .alias "opcode", 5 0, v0x2981d80_0; +v0x2980bf0_0 .var "writeReg", 0 0; +E_0x297f2e0 .event edge, v0x297e0d0_0, v0x297d9e0_0; +S_0x297e320 .scope module, "IF" "ifetch" 4 63, 6 6, S_0x287a4b0; + .timescale 0 0; +v0x297f810_0 .net "_", 0 0, L_0x2983dd0; 1 drivers +v0x297f8b0_0 .net *"_s13", 3 0, L_0x2983f20; 1 drivers +v0x297f930_0 .net *"_s14", 1 0, C4<00>; 1 drivers +v0x297f9d0_0 .net *"_s7", 0 0, L_0x2983460; 1 drivers +v0x297fa80_0 .net *"_s8", 15 0, L_0x2983590; 1 drivers +v0x297fb20_0 .alias "branch_addr", 15 0, v0x2981640_0; +v0x297fbf0_0 .var "branch_addr_full", 31 0; +v0x297fc90_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297fd60_0 .net "increased_pc", 31 0, v0x297ebc0_0; 1 drivers +v0x297fe30_0 .alias "is_branch", 0 0, v0x29815c0_0; +v0x297ff10_0 .alias "is_jump", 0 0, v0x29817d0_0; +v0x297ff90_0 .alias "jump_addr", 25 0, v0x29818f0_0; +v0x2980040_0 .alias "out", 31 0, v0x29816c0_0; +v0x2980150_0 .var "pc", 31 0; +v0x2980250_0 .net "pc_next", 31 0, v0x297e680_0; 1 drivers +v0x2980300_0 .net "to_add", 31 0, v0x297f230_0; 1 drivers +v0x29801d0_0 .net "write_pc", 0 0, C4<1>; 1 drivers +L_0x2983460 .part L_0x29848a0, 15, 1; +LS_0x2983590_0_0 .concat [ 1 1 1 1], L_0x2983460, L_0x2983460, L_0x2983460, L_0x2983460; +LS_0x2983590_0_4 .concat [ 1 1 1 1], L_0x2983460, L_0x2983460, L_0x2983460, L_0x2983460; +LS_0x2983590_0_8 .concat [ 1 1 1 1], L_0x2983460, L_0x2983460, L_0x2983460, L_0x2983460; +LS_0x2983590_0_12 .concat [ 1 1 1 1], L_0x2983460, L_0x2983460, L_0x2983460, L_0x2983460; +L_0x2983590 .concat [ 4 4 4 4], LS_0x2983590_0_0, LS_0x2983590_0_4, LS_0x2983590_0_8, LS_0x2983590_0_12; +L_0x29836f0 .concat [ 16 16 0 0], L_0x29848a0, L_0x2983590; +L_0x2983f20 .part v0x2980150_0, 28, 4; +L_0x2983fc0 .concat [ 2 26 4 0], C4<00>, v0x28c5d80_0, L_0x2983f20; +S_0x297f310 .scope module, "program_mem" "instruction_memory" 6 22, 7 3, S_0x297e320; + .timescale 0 0; +L_0x297feb0 .functor BUFZ 32, L_0x2983270, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x297f430_0 .alias "Addr", 31 0, v0x2981cb0_0; +v0x297f4d0_0 .net "DataIn", 31 0, C4<00000000000000000000000000000000>; 1 drivers +v0x297f570_0 .alias "DataOut", 31 0, v0x29816c0_0; +v0x297f5f0_0 .net *"_s0", 31 0, L_0x2983270; 1 drivers +v0x297f670_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297f6f0 .array "mem", 0 60, 31 0; +v0x297f770_0 .net "regWE", 0 0, C4<0>; 1 drivers +E_0x297f400 .event edge, v0x28d94c0_0; +L_0x2983270 .array/port v0x297f6f0, v0x2980150_0; +S_0x297eed0 .scope module, "should_branch" "mux2to1by32" 6 28, 2 18, S_0x297e320; + .timescale 0 0; +v0x297f030_0 .alias "address", 0 0, v0x29815c0_0; +v0x297f0f0_0 .net "input0", 31 0, C4<00000000000000000000000000000100>; 1 drivers +v0x297f190_0 .net "input1", 31 0, L_0x29836f0; 1 drivers +v0x297f230_0 .var "out", 31 0; +E_0x297efc0 .event edge, v0x297f030_0, v0x297f190_0, v0x297f0f0_0; +S_0x297e700 .scope module, "add_to_pc" "add32bit" 6 33, 8 3, S_0x297e320; + .timescale 0 0; +L_0x2983790 .functor XNOR 1, L_0x2983aa0, L_0x2983b90, C4<0>, C4<0>; +L_0x2983c80 .functor XOR 1, v0x297ec40_0, L_0x2983ce0, C4<0>, C4<0>; +L_0x2983dd0 .functor AND 1, L_0x2983c80, L_0x2983790, C4<1>, C4<1>; +v0x297e860_0 .net *"_s1", 0 0, L_0x2983aa0; 1 drivers +v0x297e920_0 .net *"_s3", 0 0, L_0x2983b90; 1 drivers +v0x297e9c0_0 .net *"_s5", 0 0, L_0x2983ce0; 1 drivers +v0x297ea60_0 .alias "a", 31 0, v0x2981cb0_0; +v0x297eb40_0 .alias "b", 31 0, v0x2980300_0; +v0x297ebc0_0 .var "c", 31 0; +v0x297ec40_0 .var "carry", 0 0; +v0x297ecc0_0 .net "carryXorSign", 0 0, L_0x2983c80; 1 drivers +v0x297ed90_0 .alias "overflow", 0 0, v0x297f810_0; +v0x297ee30_0 .net "sameSign", 0 0, L_0x2983790; 1 drivers +E_0x297e7f0 .event edge, v0x297eb40_0, v0x28d94c0_0; +L_0x2983aa0 .part v0x2980150_0, 31, 1; +L_0x2983b90 .part v0x297f230_0, 31, 1; +L_0x2983ce0 .part v0x297ebc0_0, 31, 1; +S_0x297e410 .scope module, "should_jump" "mux2to1by32" 6 38, 2 18, S_0x297e320; + .timescale 0 0; +v0x297e500_0 .alias "address", 0 0, v0x29817d0_0; +v0x297e580_0 .alias "input0", 31 0, v0x297fd60_0; +v0x297e600_0 .net "input1", 31 0, L_0x2983fc0; 1 drivers +v0x297e680_0 .var "out", 31 0; +E_0x297cf20 .event edge, v0x297e500_0, v0x297e600_0, v0x297e580_0; +S_0x297ddd0 .scope module, "ID_R" "instructionDecoderR" 4 75, 9 2, S_0x287a4b0; + .timescale 0 0; +v0x297dec0_0 .alias "Rd", 4 0, v0x2980f30_0; +v0x297df40_0 .alias "Rs", 4 0, v0x2980fb0_0; +v0x297dfc0_0 .alias "Rt", 4 0, v0x29810c0_0; +v0x297e0d0_0 .alias "funct", 5 0, v0x2981540_0; +v0x297e150_0 .alias "instruction", 31 0, v0x29816c0_0; +v0x297e1d0_0 .alias "opcode", 5 0, v0x2981d80_0; +v0x297e2a0_0 .alias "shift", 4 0, v0x2982100_0; +L_0x29841f0 .part L_0x297feb0, 26, 6; +L_0x2984290 .part L_0x297feb0, 21, 5; +L_0x2984440 .part L_0x297feb0, 16, 5; +L_0x29844e0 .part L_0x297feb0, 11, 5; +L_0x2984580 .part L_0x297feb0, 6, 5; +L_0x2984620 .part L_0x297feb0, 0, 6; +S_0x297da60 .scope module, "ID_I" "instructionDecoderI" 4 76, 10 2, S_0x287a4b0; + .timescale 0 0; +v0x297db50_0 .alias "Rs", 4 0, v0x2980fb0_0; +v0x297dbd0_0 .alias "Rt", 4 0, v0x29810c0_0; +v0x297dc50_0 .alias "imm", 15 0, v0x2981640_0; +v0x297dcd0_0 .alias "instruction", 31 0, v0x29816c0_0; +v0x297dd50_0 .alias "opcode", 5 0, v0x2981d80_0; +L_0x29846c0 .part L_0x297feb0, 26, 6; +L_0x2984760 .part L_0x297feb0, 21, 5; +L_0x2984800 .part L_0x297feb0, 16, 5; +L_0x29848a0 .part L_0x297feb0, 0, 16; +S_0x297d870 .scope module, "ID_J" "instructionDecoderJ" 4 77, 11 2, S_0x287a4b0; + .timescale 0 0; +v0x297d560_0 .alias "instruction", 31 0, v0x29816c0_0; +v0x297d960_0 .alias "jump_target", 25 0, v0x2982270_0; +v0x297d9e0_0 .alias "opcode", 5 0, v0x2981d80_0; +L_0x2984330 .part L_0x297feb0, 26, 6; +L_0x2984b50 .part L_0x297feb0, 0, 26; +S_0x2970ce0 .scope module, "regfile" "regfile" 4 82, 12 15, S_0x287a4b0; + .timescale 0 0; +v0x297bcd0_0 .alias "Clk", 0 0, v0x29812c0_0; +v0x2978180_0 .alias "ReadData1", 31 0, v0x2980e00_0; +v0x2978200_0 .alias "ReadData2", 31 0, v0x2980e80_0; +v0x2978310_0 .alias "ReadRegister1", 4 0, v0x2980fb0_0; +v0x297c160_0 .alias "ReadRegister2", 4 0, v0x29810c0_0; +v0x297c1e0_0 .alias "RegWrite", 0 0, v0x2981f10_0; +v0x297c260_0 .alias "WriteData", 31 0, v0x2982500_0; +v0x297c2e0_0 .alias "WriteRegister", 4 0, v0x2982080_0; +v0x297c360_0 .net "decoder", 31 0, L_0x2984ce0; 1 drivers +v0x297c410_0 .net "reg0", 31 0, v0x2977d80_0; 1 drivers +v0x297c490_0 .net "reg1", 31 0, v0x297b270_0; 1 drivers +v0x297c510_0 .net "reg10", 31 0, v0x2979410_0; 1 drivers +v0x297c600_0 .net "reg11", 31 0, v0x29790b0_0; 1 drivers +v0x297c680_0 .net "reg12", 31 0, v0x2978d50_0; 1 drivers +v0x297c780_0 .net "reg13", 31 0, v0x29789f0_0; 1 drivers +v0x297c800_0 .net "reg14", 31 0, v0x2978690_0; 1 drivers +v0x297c700_0 .net "reg15", 31 0, v0x2976550_0; 1 drivers +v0x297c910_0 .net "reg16", 31 0, v0x2976160_0; 1 drivers +v0x297c880_0 .net "reg17", 31 0, v0x2977a20_0; 1 drivers +v0x297ca30_0 .net "reg18", 31 0, v0x29776c0_0; 1 drivers +v0x297c990_0 .net "reg19", 31 0, v0x2977360_0; 1 drivers +v0x297cb60_0 .net "reg2", 31 0, v0x297af10_0; 1 drivers +v0x297cab0_0 .net "reg20", 31 0, v0x2977000_0; 1 drivers +v0x297cca0_0 .net "reg21", 31 0, v0x2976ca0_0; 1 drivers +v0x297cbe0_0 .net "reg22", 31 0, v0x2976940_0; 1 drivers +v0x297cdf0_0 .net "reg23", 31 0, v0x29765e0_0; 1 drivers +v0x297cd20_0 .net "reg24", 31 0, v0x2975360_0; 1 drivers +v0x297cf50_0 .net "reg25", 31 0, v0x2975e00_0; 1 drivers +v0x297ce70_0 .net "reg26", 31 0, v0x2975aa0_0; 1 drivers +v0x297d0c0_0 .net "reg27", 31 0, v0x2975790_0; 1 drivers +v0x297cfd0_0 .net "reg28", 31 0, v0x29753f0_0; 1 drivers +v0x297d240_0 .net "reg29", 31 0, v0x2975000_0; 1 drivers +v0x297d140_0 .net "reg3", 31 0, v0x297abb0_0; 1 drivers +v0x297d1c0_0 .net "reg30", 31 0, v0x2974c50_0; 1 drivers +v0x297d3e0_0 .net "reg31", 31 0, v0x29748e0_0; 1 drivers +v0x297d460_0 .net "reg4", 31 0, v0x297a850_0; 1 drivers +v0x297d2c0_0 .net "reg5", 31 0, v0x297a4f0_0; 1 drivers +v0x297d340_0 .net "reg6", 31 0, v0x297a190_0; 1 drivers +v0x297d620_0 .net "reg7", 31 0, v0x2979e30_0; 1 drivers +v0x297d6a0_0 .net "reg8", 31 0, v0x2979ad0_0; 1 drivers +v0x297d4e0_0 .net "reg9", 31 0, v0x2979770_0; 1 drivers +L_0x2984eb0 .part L_0x2984ce0, 0, 1; +L_0x2984f50 .part L_0x2984ce0, 1, 1; +L_0x2985080 .part L_0x2984ce0, 2, 1; +L_0x2985120 .part L_0x2984ce0, 3, 1; +L_0x29851f0 .part L_0x2984ce0, 4, 1; +L_0x29852c0 .part L_0x2984ce0, 5, 1; +L_0x29854a0 .part L_0x2984ce0, 6, 1; +L_0x2985540 .part L_0x2984ce0, 7, 1; +L_0x29855e0 .part L_0x2984ce0, 8, 1; +L_0x29856b0 .part L_0x2984ce0, 9, 1; +L_0x29857e0 .part L_0x2984ce0, 10, 1; +L_0x29858b0 .part L_0x2984ce0, 11, 1; +L_0x2985980 .part L_0x2984ce0, 12, 1; +L_0x2985a50 .part L_0x2984ce0, 13, 1; +L_0x2985d30 .part L_0x2984ce0, 14, 1; +L_0x2985dd0 .part L_0x2984ce0, 15, 1; +L_0x2985f00 .part L_0x2984ce0, 16, 1; +L_0x2985fa0 .part L_0x2984ce0, 17, 1; +L_0x2986110 .part L_0x2984ce0, 18, 1; +L_0x29861b0 .part L_0x2984ce0, 19, 1; +L_0x2986070 .part L_0x2984ce0, 20, 1; +L_0x2986300 .part L_0x2984ce0, 21, 1; +L_0x2986250 .part L_0x2984ce0, 22, 1; +L_0x29864c0 .part L_0x2984ce0, 23, 1; +L_0x29863d0 .part L_0x2984ce0, 24, 1; +L_0x2986690 .part L_0x2984ce0, 25, 1; +L_0x2986590 .part L_0x2984ce0, 26, 1; +L_0x2986840 .part L_0x2984ce0, 27, 1; +L_0x2986760 .part L_0x2984ce0, 28, 1; +L_0x2986a00 .part L_0x2984ce0, 29, 1; +L_0x2986910 .part L_0x2984ce0, 30, 1; +L_0x2985c20 .part L_0x2984ce0, 31, 1; +S_0x297b9e0 .scope module, "dec" "decoder1to32" 12 34, 13 4, S_0x2970ce0; + .timescale 0 0; +v0x2977ed0_0 .net *"_s0", 31 0, L_0x2984bf0; 1 drivers +v0x297bad0_0 .net *"_s3", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x297bb50_0 .alias "address", 4 0, v0x2982080_0; +v0x297bbd0_0 .alias "enable", 0 0, v0x2981f10_0; +v0x297bc50_0 .alias "out", 31 0, v0x297c360_0; +L_0x2984bf0 .concat [ 1 31 0 0], C4, C4<0000000000000000000000000000000>; +L_0x2984ce0 .shift/l 32, L_0x2984bf0, v0x28cc520_0; +S_0x297b3c0 .scope module, "r0" "register32zero" 12 35, 14 1, S_0x2970ce0; + .timescale 0 0; +v0x297b4b0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297b550_0 .alias "d", 31 0, v0x2982500_0; +v0x2977d80_0 .var "q", 31 0; +v0x2977e50_0 .net "wrenable", 0 0, L_0x2984eb0; 1 drivers +S_0x297b060 .scope module, "r1" "register32" 12 36, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x297b150_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297b1f0_0 .alias "d", 31 0, v0x2982500_0; +v0x297b270_0 .var "q", 31 0; +v0x297b340_0 .net "wrenable", 0 0, L_0x2984f50; 1 drivers +S_0x297ad00 .scope module, "r2" "register32" 12 37, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x297adf0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297ae90_0 .alias "d", 31 0, v0x2982500_0; +v0x297af10_0 .var "q", 31 0; +v0x297afe0_0 .net "wrenable", 0 0, L_0x2985080; 1 drivers +S_0x297a9a0 .scope module, "r3" "register32" 12 38, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x297aa90_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297ab30_0 .alias "d", 31 0, v0x2982500_0; +v0x297abb0_0 .var "q", 31 0; +v0x297ac80_0 .net "wrenable", 0 0, L_0x2985120; 1 drivers +S_0x297a640 .scope module, "r4" "register32" 12 39, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x297a730_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297a7d0_0 .alias "d", 31 0, v0x2982500_0; +v0x297a850_0 .var "q", 31 0; +v0x297a920_0 .net "wrenable", 0 0, L_0x29851f0; 1 drivers +S_0x297a2e0 .scope module, "r5" "register32" 12 40, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x297a3d0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297a470_0 .alias "d", 31 0, v0x2982500_0; +v0x297a4f0_0 .var "q", 31 0; +v0x297a5c0_0 .net "wrenable", 0 0, L_0x29852c0; 1 drivers +S_0x2979f80 .scope module, "r6" "register32" 12 41, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x297a070_0 .alias "clk", 0 0, v0x29812c0_0; +v0x297a110_0 .alias "d", 31 0, v0x2982500_0; +v0x297a190_0 .var "q", 31 0; +v0x297a260_0 .net "wrenable", 0 0, L_0x29854a0; 1 drivers +S_0x2979c20 .scope module, "r7" "register32" 12 42, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2979d10_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2979db0_0 .alias "d", 31 0, v0x2982500_0; +v0x2979e30_0 .var "q", 31 0; +v0x2979f00_0 .net "wrenable", 0 0, L_0x2985540; 1 drivers +S_0x29798c0 .scope module, "r8" "register32" 12 43, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x29799b0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2979a50_0 .alias "d", 31 0, v0x2982500_0; +v0x2979ad0_0 .var "q", 31 0; +v0x2979ba0_0 .net "wrenable", 0 0, L_0x29855e0; 1 drivers +S_0x2979560 .scope module, "r9" "register32" 12 44, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2979650_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29796f0_0 .alias "d", 31 0, v0x2982500_0; +v0x2979770_0 .var "q", 31 0; +v0x2979840_0 .net "wrenable", 0 0, L_0x29856b0; 1 drivers +S_0x2979200 .scope module, "r10" "register32" 12 45, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x29792f0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2979390_0 .alias "d", 31 0, v0x2982500_0; +v0x2979410_0 .var "q", 31 0; +v0x29794e0_0 .net "wrenable", 0 0, L_0x29857e0; 1 drivers +S_0x2978ea0 .scope module, "r11" "register32" 12 46, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2978f90_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2979030_0 .alias "d", 31 0, v0x2982500_0; +v0x29790b0_0 .var "q", 31 0; +v0x2979180_0 .net "wrenable", 0 0, L_0x29858b0; 1 drivers +S_0x2978b40 .scope module, "r12" "register32" 12 47, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2978c30_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2978cd0_0 .alias "d", 31 0, v0x2982500_0; +v0x2978d50_0 .var "q", 31 0; +v0x2978e20_0 .net "wrenable", 0 0, L_0x2985980; 1 drivers +S_0x29787e0 .scope module, "r13" "register32" 12 48, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x29788d0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2978970_0 .alias "d", 31 0, v0x2982500_0; +v0x29789f0_0 .var "q", 31 0; +v0x2978ac0_0 .net "wrenable", 0 0, L_0x2985a50; 1 drivers +S_0x2978480 .scope module, "r14" "register32" 12 49, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2978570_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2978610_0 .alias "d", 31 0, v0x2982500_0; +v0x2978690_0 .var "q", 31 0; +v0x2978760_0 .net "wrenable", 0 0, L_0x2985d30; 1 drivers +S_0x2978010 .scope module, "r15" "register32" 12 50, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2978100_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29764d0_0 .alias "d", 31 0, v0x2982500_0; +v0x2976550_0 .var "q", 31 0; +v0x29783e0_0 .net "wrenable", 0 0, L_0x2985dd0; 1 drivers +S_0x2977b70 .scope module, "r16" "register32" 12 51, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2977c60_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2977d00_0 .alias "d", 31 0, v0x2982500_0; +v0x2976160_0 .var "q", 31 0; +v0x2977f90_0 .net "wrenable", 0 0, L_0x2985f00; 1 drivers +S_0x2977810 .scope module, "r17" "register32" 12 52, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2977900_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29779a0_0 .alias "d", 31 0, v0x2982500_0; +v0x2977a20_0 .var "q", 31 0; +v0x2977af0_0 .net "wrenable", 0 0, L_0x2985fa0; 1 drivers +S_0x29774b0 .scope module, "r18" "register32" 12 53, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x29775a0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2977640_0 .alias "d", 31 0, v0x2982500_0; +v0x29776c0_0 .var "q", 31 0; +v0x2977790_0 .net "wrenable", 0 0, L_0x2986110; 1 drivers +S_0x2977150 .scope module, "r19" "register32" 12 54, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2977240_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29772e0_0 .alias "d", 31 0, v0x2982500_0; +v0x2977360_0 .var "q", 31 0; +v0x2977430_0 .net "wrenable", 0 0, L_0x29861b0; 1 drivers +S_0x2976df0 .scope module, "r20" "register32" 12 55, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2976ee0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2976f80_0 .alias "d", 31 0, v0x2982500_0; +v0x2977000_0 .var "q", 31 0; +v0x29770d0_0 .net "wrenable", 0 0, L_0x2986070; 1 drivers +S_0x2976a90 .scope module, "r21" "register32" 12 56, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2976b80_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2976c20_0 .alias "d", 31 0, v0x2982500_0; +v0x2976ca0_0 .var "q", 31 0; +v0x2976d70_0 .net "wrenable", 0 0, L_0x2986300; 1 drivers +S_0x2976730 .scope module, "r22" "register32" 12 57, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2976820_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29768c0_0 .alias "d", 31 0, v0x2982500_0; +v0x2976940_0 .var "q", 31 0; +v0x2976a10_0 .net "wrenable", 0 0, L_0x2986250; 1 drivers +S_0x2976340 .scope module, "r23" "register32" 12 58, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2976430_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2975680_0 .alias "d", 31 0, v0x2982500_0; +v0x29765e0_0 .var "q", 31 0; +v0x29766b0_0 .net "wrenable", 0 0, L_0x29864c0; 1 drivers +S_0x2975f50 .scope module, "r24" "register32" 12 59, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2976040_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29760e0_0 .alias "d", 31 0, v0x2982500_0; +v0x2975360_0 .var "q", 31 0; +v0x29762c0_0 .net "wrenable", 0 0, L_0x29863d0; 1 drivers +S_0x2975bf0 .scope module, "r25" "register32" 12 60, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2975ce0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2975d80_0 .alias "d", 31 0, v0x2982500_0; +v0x2975e00_0 .var "q", 31 0; +v0x2975ed0_0 .net "wrenable", 0 0, L_0x2986690; 1 drivers +S_0x2975890 .scope module, "r26" "register32" 12 61, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2975980_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2975a20_0 .alias "d", 31 0, v0x2982500_0; +v0x2975aa0_0 .var "q", 31 0; +v0x2975b70_0 .net "wrenable", 0 0, L_0x2986590; 1 drivers +S_0x29754f0 .scope module, "r27" "register32" 12 62, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x29755e0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2975710_0 .alias "d", 31 0, v0x2982500_0; +v0x2975790_0 .var "q", 31 0; +v0x2975810_0 .net "wrenable", 0 0, L_0x2986840; 1 drivers +S_0x2975150 .scope module, "r28" "register32" 12 63, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2975240_0 .alias "clk", 0 0, v0x29812c0_0; +v0x29752e0_0 .alias "d", 31 0, v0x2982500_0; +v0x29753f0_0 .var "q", 31 0; +v0x2975470_0 .net "wrenable", 0 0, L_0x2986760; 1 drivers +S_0x2974da0 .scope module, "r29" "register32" 12 64, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2974e90_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2974f80_0 .alias "d", 31 0, v0x2982500_0; +v0x2975000_0 .var "q", 31 0; +v0x29750d0_0 .net "wrenable", 0 0, L_0x2986a00; 1 drivers +S_0x29749e0 .scope module, "r30" "register32" 12 65, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x2974ad0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2974b80_0 .alias "d", 31 0, v0x2982500_0; +v0x2974c50_0 .var "q", 31 0; +v0x2974d20_0 .net "wrenable", 0 0, L_0x2986910; 1 drivers +S_0x29743d0 .scope module, "r31" "register32" 12 66, 15 1, S_0x2970ce0; + .timescale 0 0; +v0x29747b0_0 .alias "clk", 0 0, v0x29812c0_0; +v0x2974830_0 .alias "d", 31 0, v0x2982500_0; +v0x29748e0_0 .var "q", 31 0; +v0x2974960_0 .net "wrenable", 0 0, L_0x2985c20; 1 drivers +E_0x2972130 .event posedge, v0x29747b0_0; +S_0x29724f0 .scope module, "mux1" "mux32to1by32" 12 68, 16 1, S_0x2970ce0; + .timescale 0 0; +L_0x2985780 .functor BUFZ 32, v0x2977d80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29813c0 .functor BUFZ 32, v0x297b270_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2985bb0 .functor BUFZ 32, v0x297af10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2985390 .functor BUFZ 32, v0x297abb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29871a0 .functor BUFZ 32, v0x297a850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987290 .functor BUFZ 32, v0x297a4f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29873b0 .functor BUFZ 32, v0x297a190_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29874d0 .functor BUFZ 32, v0x2979e30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29875f0 .functor BUFZ 32, v0x2979ad0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987710 .functor BUFZ 32, v0x2979770_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987890 .functor BUFZ 32, v0x2979410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29879b0 .functor BUFZ 32, v0x29790b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987830 .functor BUFZ 32, v0x2978d50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987c00 .functor BUFZ 32, v0x29789f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987da0 .functor BUFZ 32, v0x2978690_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987ec0 .functor BUFZ 32, v0x2976550_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988070 .functor BUFZ 32, v0x2976160_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988190 .functor BUFZ 32, v0x2977a20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2987fe0 .functor BUFZ 32, v0x29776c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29883e0 .functor BUFZ 32, v0x2977360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29882b0 .functor BUFZ 32, v0x2977000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988640 .functor BUFZ 32, v0x2976ca0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988500 .functor BUFZ 32, v0x2976940_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29888b0 .functor BUFZ 32, v0x29765e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988760 .functor BUFZ 32, v0x2975360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988b30 .functor BUFZ 32, v0x2975e00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29889d0 .functor BUFZ 32, v0x2975aa0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988d90 .functor BUFZ 32, v0x2975790_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988c20 .functor BUFZ 32, v0x29753f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989000 .functor BUFZ 32, v0x2975000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988e80 .functor BUFZ 32, v0x2974c50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2988f10 .functor BUFZ 32, v0x29748e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989450 .functor BUFZ 32, L_0x29890f0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x2972bf0_0 .net *"_s96", 31 0, L_0x29890f0; 1 drivers +v0x2972c90_0 .alias "address", 4 0, v0x2980fb0_0; +v0x2972d30_0 .alias "input0", 31 0, v0x297c410_0; +v0x2972db0_0 .alias "input1", 31 0, v0x297c490_0; +v0x2972e60_0 .alias "input10", 31 0, v0x297c510_0; +v0x2972f10_0 .alias "input11", 31 0, v0x297c600_0; +v0x2972f90_0 .alias "input12", 31 0, v0x297c680_0; +v0x2973040_0 .alias "input13", 31 0, v0x297c780_0; +v0x29730f0_0 .alias "input14", 31 0, v0x297c800_0; +v0x29731a0_0 .alias "input15", 31 0, v0x297c700_0; +v0x2973250_0 .alias "input16", 31 0, v0x297c910_0; +v0x2973300_0 .alias "input17", 31 0, v0x297c880_0; +v0x29733b0_0 .alias "input18", 31 0, v0x297ca30_0; +v0x2973460_0 .alias "input19", 31 0, v0x297c990_0; +v0x2973590_0 .alias "input2", 31 0, v0x297cb60_0; +v0x2973640_0 .alias "input20", 31 0, v0x297cab0_0; +v0x29734e0_0 .alias "input21", 31 0, v0x297cca0_0; +v0x29737b0_0 .alias "input22", 31 0, v0x297cbe0_0; +v0x29738d0_0 .alias "input23", 31 0, v0x297cdf0_0; +v0x2973950_0 .alias "input24", 31 0, v0x297cd20_0; +v0x2973830_0 .alias "input25", 31 0, v0x297cf50_0; +v0x2973ab0_0 .alias "input26", 31 0, v0x297ce70_0; +v0x2973a00_0 .alias "input27", 31 0, v0x297d0c0_0; +v0x2973bf0_0 .alias "input28", 31 0, v0x297cfd0_0; +v0x2973b30_0 .alias "input29", 31 0, v0x297d240_0; +v0x2973d40_0 .alias "input3", 31 0, v0x297d140_0; +v0x2973ca0_0 .alias "input30", 31 0, v0x297d1c0_0; +v0x2973ed0_0 .alias "input31", 31 0, v0x297d3e0_0; +v0x2973dc0_0 .alias "input4", 31 0, v0x297d460_0; +v0x2974040_0 .alias "input5", 31 0, v0x297d2c0_0; +v0x2973f50_0 .alias "input6", 31 0, v0x297d340_0; +v0x29741c0_0 .alias "input7", 31 0, v0x297d620_0; +v0x29740c0_0 .alias "input8", 31 0, v0x297d6a0_0; +v0x2974350_0 .alias "input9", 31 0, v0x297d4e0_0; +v0x2974240 .array "mux", 0 31; +v0x2974240_0 .net v0x2974240 0, 31 0, L_0x2985780; 1 drivers +v0x2974240_1 .net v0x2974240 1, 31 0, L_0x29813c0; 1 drivers +v0x2974240_2 .net v0x2974240 2, 31 0, L_0x2985bb0; 1 drivers +v0x2974240_3 .net v0x2974240 3, 31 0, L_0x2985390; 1 drivers +v0x2974240_4 .net v0x2974240 4, 31 0, L_0x29871a0; 1 drivers +v0x2974240_5 .net v0x2974240 5, 31 0, L_0x2987290; 1 drivers +v0x2974240_6 .net v0x2974240 6, 31 0, L_0x29873b0; 1 drivers +v0x2974240_7 .net v0x2974240 7, 31 0, L_0x29874d0; 1 drivers +v0x2974240_8 .net v0x2974240 8, 31 0, L_0x29875f0; 1 drivers +v0x2974240_9 .net v0x2974240 9, 31 0, L_0x2987710; 1 drivers +v0x2974240_10 .net v0x2974240 10, 31 0, L_0x2987890; 1 drivers +v0x2974240_11 .net v0x2974240 11, 31 0, L_0x29879b0; 1 drivers +v0x2974240_12 .net v0x2974240 12, 31 0, L_0x2987830; 1 drivers +v0x2974240_13 .net v0x2974240 13, 31 0, L_0x2987c00; 1 drivers +v0x2974240_14 .net v0x2974240 14, 31 0, L_0x2987da0; 1 drivers +v0x2974240_15 .net v0x2974240 15, 31 0, L_0x2987ec0; 1 drivers +v0x2974240_16 .net v0x2974240 16, 31 0, L_0x2988070; 1 drivers +v0x2974240_17 .net v0x2974240 17, 31 0, L_0x2988190; 1 drivers +v0x2974240_18 .net v0x2974240 18, 31 0, L_0x2987fe0; 1 drivers +v0x2974240_19 .net v0x2974240 19, 31 0, L_0x29883e0; 1 drivers +v0x2974240_20 .net v0x2974240 20, 31 0, L_0x29882b0; 1 drivers +v0x2974240_21 .net v0x2974240 21, 31 0, L_0x2988640; 1 drivers +v0x2974240_22 .net v0x2974240 22, 31 0, L_0x2988500; 1 drivers +v0x2974240_23 .net v0x2974240 23, 31 0, L_0x29888b0; 1 drivers +v0x2974240_24 .net v0x2974240 24, 31 0, L_0x2988760; 1 drivers +v0x2974240_25 .net v0x2974240 25, 31 0, L_0x2988b30; 1 drivers +v0x2974240_26 .net v0x2974240 26, 31 0, L_0x29889d0; 1 drivers +v0x2974240_27 .net v0x2974240 27, 31 0, L_0x2988d90; 1 drivers +v0x2974240_28 .net v0x2974240 28, 31 0, L_0x2988c20; 1 drivers +v0x2974240_29 .net v0x2974240 29, 31 0, L_0x2989000; 1 drivers +v0x2974240_30 .net v0x2974240 30, 31 0, L_0x2988e80; 1 drivers +v0x2974240_31 .net v0x2974240 31, 31 0, L_0x2988f10; 1 drivers +v0x2974600_0 .alias "out", 31 0, v0x2980e00_0; +L_0x29890f0 .array/port v0x2974240, RS_0x7ff6df0a54e8; +S_0x2970dd0 .scope module, "mux2" "mux32to1by32" 12 69, 16 1, S_0x2970ce0; + .timescale 0 0; +L_0x29894b0 .functor BUFZ 32, v0x2977d80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989510 .functor BUFZ 32, v0x297b270_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989570 .functor BUFZ 32, v0x297af10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989600 .functor BUFZ 32, v0x297abb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29896c0 .functor BUFZ 32, v0x297a850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989750 .functor BUFZ 32, v0x297a4f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989820 .functor BUFZ 32, v0x297a190_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989880 .functor BUFZ 32, v0x2979e30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x29898e0 .functor BUFZ 32, v0x2979ad0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989970 .functor BUFZ 32, v0x2979770_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989a60 .functor BUFZ 32, v0x2979410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989af0 .functor BUFZ 32, v0x29790b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989a00 .functor BUFZ 32, v0x2978d50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989bb0 .functor BUFZ 32, v0x29789f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989c40 .functor BUFZ 32, v0x2978690_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989cd0 .functor BUFZ 32, v0x2976550_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989df0 .functor BUFZ 32, v0x2976160_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989e80 .functor BUFZ 32, v0x2977a20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989d60 .functor BUFZ 32, v0x29776c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989fb0 .functor BUFZ 32, v0x2977360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x2989f10 .functor BUFZ 32, v0x2977000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a0f0 .functor BUFZ 32, v0x2976ca0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a040 .functor BUFZ 32, v0x2976940_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a240 .functor BUFZ 32, v0x29765e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a180 .functor BUFZ 32, v0x2975360_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a3a0 .functor BUFZ 32, v0x2975e00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a2d0 .functor BUFZ 32, v0x2975aa0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a4e0 .functor BUFZ 32, v0x2975790_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a400 .functor BUFZ 32, v0x29753f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a630 .functor BUFZ 32, v0x2975000_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a540 .functor BUFZ 32, v0x2974c50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x298a5d0 .functor BUFZ 32, v0x29748e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x297e040 .functor BUFZ 32, L_0x298a690, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x2970ec0_0 .net *"_s96", 31 0, L_0x298a690; 1 drivers +v0x2970f40_0 .alias "address", 4 0, v0x29810c0_0; +v0x2970ff0_0 .alias "input0", 31 0, v0x297c410_0; +v0x2971070_0 .alias "input1", 31 0, v0x297c490_0; +v0x2971120_0 .alias "input10", 31 0, v0x297c510_0; +v0x29711a0_0 .alias "input11", 31 0, v0x297c600_0; +v0x2971220_0 .alias "input12", 31 0, v0x297c680_0; +v0x29712a0_0 .alias "input13", 31 0, v0x297c780_0; +v0x2971320_0 .alias "input14", 31 0, v0x297c800_0; +v0x29713a0_0 .alias "input15", 31 0, v0x297c700_0; +v0x2971480_0 .alias "input16", 31 0, v0x297c910_0; +v0x2971500_0 .alias "input17", 31 0, v0x297c880_0; +v0x2971580_0 .alias "input18", 31 0, v0x297ca30_0; +v0x2971620_0 .alias "input19", 31 0, v0x297c990_0; +v0x2971740_0 .alias "input2", 31 0, v0x297cb60_0; +v0x29717e0_0 .alias "input20", 31 0, v0x297cab0_0; +v0x29716a0_0 .alias "input21", 31 0, v0x297cca0_0; +v0x2971930_0 .alias "input22", 31 0, v0x297cbe0_0; +v0x2971a50_0 .alias "input23", 31 0, v0x297cdf0_0; +v0x2971ad0_0 .alias "input24", 31 0, v0x297cd20_0; +v0x29719b0_0 .alias "input25", 31 0, v0x297cf50_0; +v0x2971c00_0 .alias "input26", 31 0, v0x297ce70_0; +v0x2971b50_0 .alias "input27", 31 0, v0x297d0c0_0; +v0x2971d40_0 .alias "input28", 31 0, v0x297cfd0_0; +v0x2971ca0_0 .alias "input29", 31 0, v0x297d240_0; +v0x2971e90_0 .alias "input3", 31 0, v0x297d140_0; +v0x2971de0_0 .alias "input30", 31 0, v0x297d1c0_0; +v0x2971ff0_0 .alias "input31", 31 0, v0x297d3e0_0; +v0x2971f30_0 .alias "input4", 31 0, v0x297d460_0; +v0x2972160_0 .alias "input5", 31 0, v0x297d2c0_0; +v0x2972070_0 .alias "input6", 31 0, v0x297d340_0; +v0x29722e0_0 .alias "input7", 31 0, v0x297d620_0; +v0x29721e0_0 .alias "input8", 31 0, v0x297d6a0_0; +v0x2972470_0 .alias "input9", 31 0, v0x297d4e0_0; +v0x2972360 .array "mux", 0 31; +v0x2972360_0 .net v0x2972360 0, 31 0, L_0x29894b0; 1 drivers +v0x2972360_1 .net v0x2972360 1, 31 0, L_0x2989510; 1 drivers +v0x2972360_2 .net v0x2972360 2, 31 0, L_0x2989570; 1 drivers +v0x2972360_3 .net v0x2972360 3, 31 0, L_0x2989600; 1 drivers +v0x2972360_4 .net v0x2972360 4, 31 0, L_0x29896c0; 1 drivers +v0x2972360_5 .net v0x2972360 5, 31 0, L_0x2989750; 1 drivers +v0x2972360_6 .net v0x2972360 6, 31 0, L_0x2989820; 1 drivers +v0x2972360_7 .net v0x2972360 7, 31 0, L_0x2989880; 1 drivers +v0x2972360_8 .net v0x2972360 8, 31 0, L_0x29898e0; 1 drivers +v0x2972360_9 .net v0x2972360 9, 31 0, L_0x2989970; 1 drivers +v0x2972360_10 .net v0x2972360 10, 31 0, L_0x2989a60; 1 drivers +v0x2972360_11 .net v0x2972360 11, 31 0, L_0x2989af0; 1 drivers +v0x2972360_12 .net v0x2972360 12, 31 0, L_0x2989a00; 1 drivers +v0x2972360_13 .net v0x2972360 13, 31 0, L_0x2989bb0; 1 drivers +v0x2972360_14 .net v0x2972360 14, 31 0, L_0x2989c40; 1 drivers +v0x2972360_15 .net v0x2972360 15, 31 0, L_0x2989cd0; 1 drivers +v0x2972360_16 .net v0x2972360 16, 31 0, L_0x2989df0; 1 drivers +v0x2972360_17 .net v0x2972360 17, 31 0, L_0x2989e80; 1 drivers +v0x2972360_18 .net v0x2972360 18, 31 0, L_0x2989d60; 1 drivers +v0x2972360_19 .net v0x2972360 19, 31 0, L_0x2989fb0; 1 drivers +v0x2972360_20 .net v0x2972360 20, 31 0, L_0x2989f10; 1 drivers +v0x2972360_21 .net v0x2972360 21, 31 0, L_0x298a0f0; 1 drivers +v0x2972360_22 .net v0x2972360 22, 31 0, L_0x298a040; 1 drivers +v0x2972360_23 .net v0x2972360 23, 31 0, L_0x298a240; 1 drivers +v0x2972360_24 .net v0x2972360 24, 31 0, L_0x298a180; 1 drivers +v0x2972360_25 .net v0x2972360 25, 31 0, L_0x298a3a0; 1 drivers +v0x2972360_26 .net v0x2972360 26, 31 0, L_0x298a2d0; 1 drivers +v0x2972360_27 .net v0x2972360 27, 31 0, L_0x298a4e0; 1 drivers +v0x2972360_28 .net v0x2972360 28, 31 0, L_0x298a400; 1 drivers +v0x2972360_29 .net v0x2972360 29, 31 0, L_0x298a630; 1 drivers +v0x2972360_30 .net v0x2972360 30, 31 0, L_0x298a540; 1 drivers +v0x2972360_31 .net v0x2972360 31, 31 0, L_0x298a5d0; 1 drivers +v0x2972a40_0 .alias "out", 31 0, v0x2980e80_0; +L_0x298a690 .array/port v0x2972360, RS_0x7ff6df092468; +S_0x2828940 .scope module, "exe" "execute" 4 86, 17 4, S_0x287a4b0; + .timescale 0 0; +v0x2970640_0 .alias "ALU_OperandSource", 0 0, v0x2980c70_0; +v0x29706f0_0 .alias "Da", 31 0, v0x2980e00_0; +v0x2941e40_0 .alias "Db", 31 0, v0x2980e80_0; +v0x2970880_0 .net "Operand", 31 0, v0x2970590_0; 1 drivers +v0x2970900_0 .alias "carryout", 0 0, v0x2981240_0; +v0x29709b0_0 .alias "command", 2 0, v0x2981340_0; +v0x2970a30_0 .var "extended_imm", 31 0; +v0x2970ab0_0 .alias "imm", 15 0, v0x2981640_0; +v0x2970b30_0 .alias "overflow", 0 0, v0x2981e90_0; +v0x2970bb0_0 .alias "result", 31 0, v0x2980cf0_0; +v0x2970c30_0 .alias "zero", 0 0, v0x2982470_0; +E_0x28d6dc0 .event edge, v0x2970ab0_0; +S_0x2970340 .scope module, "ALUSource" "mux2to1by32" 17 21, 2 18, S_0x2828940; + .timescale 0 0; +v0x29700d0_0 .alias "address", 0 0, v0x2980c70_0; +v0x2970460_0 .alias "input0", 31 0, v0x2980e80_0; +v0x2970510_0 .net "input1", 31 0, v0x2970a30_0; 1 drivers +v0x2970590_0 .var "out", 31 0; +E_0x2970430 .event edge, v0x29700d0_0, v0x2970510_0, v0x28d4970_0; +S_0x28a5ac0 .scope module, "Alu" "ALUcontrolLUT" 17 27, 18 11, S_0x2828940; + .timescale 0 0; +v0x296f510_0 .alias "ALUcommand", 2 0, v0x2981340_0; +v0x296f5c0_0 .alias "a", 31 0, v0x2980e00_0; +v0x296fa40_0 .net "adder_cout", 0 0, L_0x29bac40; 1 drivers +v0x296fac0_0 .net "adder_flag", 0 0, L_0x29bc390; 1 drivers +RS_0x7ff6df0a4708/0/0 .resolv tri, L_0x299ec90, L_0x29a3090, L_0x29a73a0, L_0x29ab6f0; +RS_0x7ff6df0a4708/0/4 .resolv tri, L_0x29afb00, L_0x29b3e10, L_0x29b8110, L_0x29bc490; +RS_0x7ff6df0a4708 .resolv tri, RS_0x7ff6df0a4708/0/0, RS_0x7ff6df0a4708/0/4, C4, C4; +v0x296fb40_0 .net8 "addsub", 31 0, RS_0x7ff6df0a4708; 8 drivers +RS_0x7ff6df097028/0/0 .resolv tri, L_0x29cedb0, L_0x29cf780, L_0x29cfab0, L_0x29cfe70; +RS_0x7ff6df097028/0/4 .resolv tri, L_0x29d0220, L_0x29d0570, L_0x29d09d0, L_0x29d0d70; +RS_0x7ff6df097028/0/8 .resolv tri, L_0x29d0e10, L_0x29d14a0, L_0x29d1540, L_0x29d1b80; +RS_0x7ff6df097028/0/12 .resolv tri, L_0x29d1c20, L_0x29d21e0, L_0x29d2280, L_0x29d2a90; +RS_0x7ff6df097028/0/16 .resolv tri, L_0x29d2b30, L_0x29d2e90, L_0x29d3020, L_0x29d35a0; +RS_0x7ff6df097028/0/20 .resolv tri, L_0x29d3710, L_0x29d3c80, L_0x29d3e20, L_0x29d4370; +RS_0x7ff6df097028/0/24 .resolv tri, L_0x29d44f0, L_0x29d4ce0, L_0x29d4d80, L_0x29d5410; +RS_0x7ff6df097028/0/28 .resolv tri, L_0x29d54b0, L_0x29d5b00, L_0x29d5e80, L_0x29d5ba0; +RS_0x7ff6df097028/1/0 .resolv tri, RS_0x7ff6df097028/0/0, RS_0x7ff6df097028/0/4, RS_0x7ff6df097028/0/8, RS_0x7ff6df097028/0/12; +RS_0x7ff6df097028/1/4 .resolv tri, RS_0x7ff6df097028/0/16, RS_0x7ff6df097028/0/20, RS_0x7ff6df097028/0/24, RS_0x7ff6df097028/0/28; +RS_0x7ff6df097028 .resolv tri, RS_0x7ff6df097028/1/0, RS_0x7ff6df097028/1/4, C4, C4; +v0x296fbc0_0 .net8 "andin", 31 0, RS_0x7ff6df097028; 32 drivers +v0x296fc40_0 .alias "b", 31 0, v0x2970880_0; +v0x2941f50_0 .var "cout", 0 0; +v0x296fdd0_0 .var "finalsignal", 31 0; +v0x296fe50_0 .var "flag", 0 0; +RS_0x7ff6df095df8/0/0 .resolv tri, L_0x29d6330, L_0x29d6a80, L_0x29d6d50, L_0x29d7110; +RS_0x7ff6df095df8/0/4 .resolv tri, L_0x29d74c0, L_0x29d7810, L_0x29d7c70, L_0x29d8010; +RS_0x7ff6df095df8/0/8 .resolv tri, L_0x29d80b0, L_0x29d8740, L_0x29d87e0, L_0x29d8e20; +RS_0x7ff6df095df8/0/12 .resolv tri, L_0x29d8ec0, L_0x29c7da0, L_0x29c7e40, L_0x29da570; +RS_0x7ff6df095df8/0/16 .resolv tri, L_0x29da610, L_0x29da9c0, L_0x29dab50, L_0x29db0d0; +RS_0x7ff6df095df8/0/20 .resolv tri, L_0x29db240, L_0x29db7b0, L_0x29db950, L_0x29dbea0; +RS_0x7ff6df095df8/0/24 .resolv tri, L_0x29dc020, L_0x29dc810, L_0x29dc8b0, L_0x29dcf40; +RS_0x7ff6df095df8/0/28 .resolv tri, L_0x29dcfe0, L_0x29dd630, L_0x29dd9b0, L_0x29da310; +RS_0x7ff6df095df8/1/0 .resolv tri, RS_0x7ff6df095df8/0/0, RS_0x7ff6df095df8/0/4, RS_0x7ff6df095df8/0/8, RS_0x7ff6df095df8/0/12; +RS_0x7ff6df095df8/1/4 .resolv tri, RS_0x7ff6df095df8/0/16, RS_0x7ff6df095df8/0/20, RS_0x7ff6df095df8/0/24, RS_0x7ff6df095df8/0/28; +RS_0x7ff6df095df8 .resolv tri, RS_0x7ff6df095df8/1/0, RS_0x7ff6df095df8/1/4, C4, C4; +v0x296fed0_0 .net8 "nandin", 31 0, RS_0x7ff6df095df8; 32 drivers +RS_0x7ff6df094bc8/0/0 .resolv tri, L_0x29dd8d0, L_0x29de400, L_0x29de730, L_0x29deaf0; +RS_0x7ff6df094bc8/0/4 .resolv tri, L_0x29deea0, L_0x29df1f0, L_0x29df650, L_0x29df9f0; +RS_0x7ff6df094bc8/0/8 .resolv tri, L_0x29dfa90, L_0x29e0120, L_0x29e01c0, L_0x29e0800; +RS_0x7ff6df094bc8/0/12 .resolv tri, L_0x29e08a0, L_0x29e0eb0, L_0x29e0f50, L_0x29e1710; +RS_0x7ff6df094bc8/0/16 .resolv tri, L_0x29e17b0, L_0x29e1bb0, L_0x29e1d40, L_0x29e22c0; +RS_0x7ff6df094bc8/0/20 .resolv tri, L_0x29e2430, L_0x29e29a0, L_0x29e2b40, L_0x29e3090; +RS_0x7ff6df094bc8/0/24 .resolv tri, L_0x29e3210, L_0x29e3a00, L_0x29e3aa0, L_0x29e4130; +RS_0x7ff6df094bc8/0/28 .resolv tri, L_0x29e41d0, L_0x29e4820, L_0x29e4ba0, L_0x29e14d0; +RS_0x7ff6df094bc8/1/0 .resolv tri, RS_0x7ff6df094bc8/0/0, RS_0x7ff6df094bc8/0/4, RS_0x7ff6df094bc8/0/8, RS_0x7ff6df094bc8/0/12; +RS_0x7ff6df094bc8/1/4 .resolv tri, RS_0x7ff6df094bc8/0/16, RS_0x7ff6df094bc8/0/20, RS_0x7ff6df094bc8/0/24, RS_0x7ff6df094bc8/0/28; +RS_0x7ff6df094bc8 .resolv tri, RS_0x7ff6df094bc8/1/0, RS_0x7ff6df094bc8/1/4, C4, C4; +v0x296ff50_0 .net8 "norin", 31 0, RS_0x7ff6df094bc8; 32 drivers +RS_0x7ff6df093998/0/0 .resolv tri, L_0x29e4ac0, L_0x29e54f0, L_0x29e5820, L_0x29e5bd0; +RS_0x7ff6df093998/0/4 .resolv tri, L_0x29e5f80, L_0x29e62d0, L_0x29e6730, L_0x29e6ad0; +RS_0x7ff6df093998/0/8 .resolv tri, L_0x29e6b70, L_0x29e7200, L_0x29e72a0, L_0x29e78e0; +RS_0x7ff6df093998/0/12 .resolv tri, L_0x29e7980, L_0x29e7f90, L_0x29e8030, L_0x29e87f0; +RS_0x7ff6df093998/0/16 .resolv tri, L_0x29e8890, L_0x29e8c90, L_0x29e8e20, L_0x29e93a0; +RS_0x7ff6df093998/0/20 .resolv tri, L_0x29e9510, L_0x29e9a80, L_0x29e9c20, L_0x29cb630; +RS_0x7ff6df093998/0/24 .resolv tri, L_0x29cb570, L_0x29cb7c0, L_0x29cba10, L_0x29cc1d0; +RS_0x7ff6df093998/0/28 .resolv tri, L_0x29cbf40, L_0x29ec180, L_0x29ec3e0, L_0x29ec480; +RS_0x7ff6df093998/1/0 .resolv tri, RS_0x7ff6df093998/0/0, RS_0x7ff6df093998/0/4, RS_0x7ff6df093998/0/8, RS_0x7ff6df093998/0/12; +RS_0x7ff6df093998/1/4 .resolv tri, RS_0x7ff6df093998/0/16, RS_0x7ff6df093998/0/20, RS_0x7ff6df093998/0/24, RS_0x7ff6df093998/0/28; +RS_0x7ff6df093998 .resolv tri, RS_0x7ff6df093998/1/0, RS_0x7ff6df093998/1/4, C4, C4; +v0x296ffd0_0 .net8 "orin", 31 0, RS_0x7ff6df093998; 32 drivers +v0x2970050_0 .net "slt", 31 0, L_0x29cf0b0; 1 drivers +RS_0x7ff6df09ace8/0/0 .resolv tri, L_0x29b84a0, L_0x29bca40, L_0x29bcd70, L_0x29bd130; +RS_0x7ff6df09ace8/0/4 .resolv tri, L_0x29bd470, L_0x29bd740, L_0x29bdba0, L_0x29bdf40; +RS_0x7ff6df09ace8/0/8 .resolv tri, L_0x29bdfe0, L_0x29be670, L_0x29be710, L_0x29bed50; +RS_0x7ff6df09ace8/0/12 .resolv tri, L_0x29abaf0, L_0x29bf5a0, L_0x29bf640, L_0x29bfd10; +RS_0x7ff6df09ace8/0/16 .resolv tri, L_0x29bfdb0, L_0x29c01b0, L_0x29c0340, L_0x29c08c0; +RS_0x7ff6df09ace8/0/20 .resolv tri, L_0x29c0a30, L_0x29c0fa0, L_0x29c1140, L_0x29c1690; +RS_0x7ff6df09ace8/0/24 .resolv tri, L_0x29c1810, L_0x29c2000, L_0x29c20a0, L_0x29c2730; +RS_0x7ff6df09ace8/0/28 .resolv tri, L_0x29c27d0, L_0x29c2e20, L_0x29c31a0, L_0x29bfa80; +RS_0x7ff6df09ace8/1/0 .resolv tri, RS_0x7ff6df09ace8/0/0, RS_0x7ff6df09ace8/0/4, RS_0x7ff6df09ace8/0/8, RS_0x7ff6df09ace8/0/12; +RS_0x7ff6df09ace8/1/4 .resolv tri, RS_0x7ff6df09ace8/0/16, RS_0x7ff6df09ace8/0/20, RS_0x7ff6df09ace8/0/24, RS_0x7ff6df09ace8/0/28; +RS_0x7ff6df09ace8 .resolv tri, RS_0x7ff6df09ace8/1/0, RS_0x7ff6df09ace8/1/4, C4, C4; +v0x2970180_0 .net8 "xorin", 31 0, RS_0x7ff6df09ace8; 32 drivers +v0x2970230_0 .var "zeroflag", 0 0; +E_0x2828a30 .event edge, v0x26f9be0_0, v0x26f9b40_0, v0x296ea20_0; +S_0x2947ce0 .scope module, "addsub0" "adder_subtracter" 18 34, 19 175, S_0x28a5ac0; + .timescale 0 0; +L_0x298aa80 .functor NOT 1, L_0x298aae0, C4<0>, C4<0>, C4<0>; +L_0x298ac20 .functor NOT 1, L_0x298ac80, C4<0>, C4<0>, C4<0>; +L_0x298ae50 .functor NOT 1, L_0x298aeb0, C4<0>, C4<0>, C4<0>; +L_0x298aff0 .functor NOT 1, L_0x298b050, C4<0>, C4<0>, C4<0>; +L_0x298b190 .functor NOT 1, L_0x298b1f0, C4<0>, C4<0>, C4<0>; +L_0x298b390 .functor NOT 1, L_0x298b3f0, C4<0>, C4<0>, C4<0>; +L_0x298b290 .functor NOT 1, L_0x298b7b0, C4<0>, C4<0>, C4<0>; +L_0x296fd60 .functor NOT 1, L_0x298b8f0, C4<0>, C4<0>, C4<0>; +L_0x298ba30 .functor NOT 1, L_0x298ba90, C4<0>, C4<0>, C4<0>; +L_0x298adc0 .functor NOT 1, L_0x298bcd0, C4<0>, C4<0>, C4<0>; +L_0x298be20 .functor NOT 1, L_0x298be80, C4<0>, C4<0>, C4<0>; +L_0x298bfe0 .functor NOT 1, L_0x298c040, C4<0>, C4<0>, C4<0>; +L_0x298bc70 .functor NOT 1, L_0x298c1b0, C4<0>, C4<0>, C4<0>; +L_0x298c330 .functor NOT 1, L_0x298c390, C4<0>, C4<0>, C4<0>; +L_0x298b6a0 .functor NOT 1, L_0x298b700, C4<0>, C4<0>, C4<0>; +L_0x298c830 .functor NOT 1, L_0x298c920, C4<0>, C4<0>, C4<0>; +L_0x298c7d0 .functor NOT 1, L_0x298cb20, C4<0>, C4<0>, C4<0>; +L_0x298ca60 .functor NOT 1, L_0x298ce20, C4<0>, C4<0>, C4<0>; +L_0x298ccb0 .functor NOT 1, L_0x298d040, C4<0>, C4<0>, C4<0>; +L_0x298cf60 .functor NOT 1, L_0x298cd80, C4<0>, C4<0>, C4<0>; +L_0x298d1d0 .functor NOT 1, L_0x298d560, C4<0>, C4<0>, C4<0>; +L_0x298d460 .functor NOT 1, L_0x298d2c0, C4<0>, C4<0>, C4<0>; +L_0x296d130 .functor NOT 1, L_0x298d650, C4<0>, C4<0>, C4<0>; +L_0x298b530 .functor NOT 1, L_0x298d740, C4<0>, C4<0>, C4<0>; +L_0x298dd70 .functor NOT 1, L_0x298e0b0, C4<0>, C4<0>, C4<0>; +L_0x298dfc0 .functor NOT 1, L_0x298de20, C4<0>, C4<0>, C4<0>; +L_0x298e1f0 .functor NOT 1, L_0x298e580, C4<0>, C4<0>, C4<0>; +L_0x298e470 .functor NOT 1, L_0x298e2f0, C4<0>, C4<0>, C4<0>; +L_0x298e6c0 .functor NOT 1, L_0x298eaa0, C4<0>, C4<0>, C4<0>; +L_0x298e970 .functor NOT 1, L_0x298e7c0, C4<0>, C4<0>, C4<0>; +L_0x2987d20 .functor NOT 1, L_0x298ebe0, C4<0>, C4<0>, C4<0>; +L_0x298eec0 .functor NOT 1, L_0x298ef20, C4<0>, C4<0>, C4<0>; +v0x296b910_0 .net "_", 0 0, L_0x299eb40; 1 drivers +v0x296bf70_0 .net "_1", 0 0, L_0x29a2f40; 1 drivers +v0x296bff0_0 .net "_2", 0 0, L_0x29a7250; 1 drivers +v0x296c070_0 .net "_3", 0 0, L_0x29ab5a0; 1 drivers +v0x296c0f0_0 .net "_4", 0 0, L_0x29af9b0; 1 drivers +v0x296c170_0 .net "_5", 0 0, L_0x29b3cc0; 1 drivers +v0x296c1f0_0 .net "_6", 0 0, L_0x29b7fc0; 1 drivers +v0x296c270_0 .net *"_s0", 0 0, L_0x298aa80; 1 drivers +v0x296c2f0_0 .net *"_s100", 0 0, L_0x298dfc0; 1 drivers +v0x296c370_0 .net *"_s103", 0 0, L_0x298de20; 1 drivers +v0x296c3f0_0 .net *"_s104", 0 0, L_0x298e1f0; 1 drivers +v0x296c470_0 .net *"_s107", 0 0, L_0x298e580; 1 drivers +v0x296c4f0_0 .net *"_s108", 0 0, L_0x298e470; 1 drivers +v0x296c570_0 .net *"_s11", 0 0, L_0x298aeb0; 1 drivers +v0x296c670_0 .net *"_s111", 0 0, L_0x298e2f0; 1 drivers +v0x296c6f0_0 .net *"_s112", 0 0, L_0x298e6c0; 1 drivers +v0x296c5f0_0 .net *"_s115", 0 0, L_0x298eaa0; 1 drivers +v0x296c800_0 .net *"_s116", 0 0, L_0x298e970; 1 drivers +v0x296c920_0 .net *"_s119", 0 0, L_0x298e7c0; 1 drivers +v0x296c9a0_0 .net *"_s12", 0 0, L_0x298aff0; 1 drivers +v0x296c880_0 .net *"_s120", 0 0, L_0x2987d20; 1 drivers +v0x296cad0_0 .net *"_s123", 0 0, L_0x298ebe0; 1 drivers +v0x296ca20_0 .net *"_s124", 0 0, L_0x298eec0; 1 drivers +v0x296cc10_0 .net *"_s127", 0 0, L_0x298ef20; 1 drivers +v0x296cb70_0 .net *"_s15", 0 0, L_0x298b050; 1 drivers +v0x296cd60_0 .net *"_s16", 0 0, L_0x298b190; 1 drivers +v0x296ccb0_0 .net *"_s19", 0 0, L_0x298b1f0; 1 drivers +v0x296cec0_0 .net *"_s20", 0 0, L_0x298b390; 1 drivers +v0x296ce00_0 .net *"_s23", 0 0, L_0x298b3f0; 1 drivers +v0x296d030_0 .net *"_s24", 0 0, L_0x298b290; 1 drivers +v0x296cf40_0 .net *"_s27", 0 0, L_0x298b7b0; 1 drivers +v0x296d1b0_0 .net *"_s28", 0 0, L_0x296fd60; 1 drivers +v0x296d0b0_0 .net *"_s3", 0 0, L_0x298aae0; 1 drivers +v0x296d340_0 .net *"_s31", 0 0, L_0x298b8f0; 1 drivers +v0x296d230_0 .net *"_s32", 0 0, L_0x298ba30; 1 drivers +v0x296d4e0_0 .net *"_s35", 0 0, L_0x298ba90; 1 drivers +v0x296d3c0_0 .net *"_s36", 0 0, L_0x298adc0; 1 drivers +v0x296d460_0 .net *"_s39", 0 0, L_0x298bcd0; 1 drivers +v0x296d6a0_0 .net *"_s4", 0 0, L_0x298ac20; 1 drivers +v0x296d720_0 .net *"_s40", 0 0, L_0x298be20; 1 drivers +v0x296d560_0 .net *"_s43", 0 0, L_0x298be80; 1 drivers +v0x296d600_0 .net *"_s44", 0 0, L_0x298bfe0; 1 drivers +v0x296d900_0 .net *"_s47", 0 0, L_0x298c040; 1 drivers +v0x296d980_0 .net *"_s48", 0 0, L_0x298bc70; 1 drivers +v0x296d7a0_0 .net *"_s51", 0 0, L_0x298c1b0; 1 drivers +v0x296d840_0 .net *"_s52", 0 0, L_0x298c330; 1 drivers +v0x296db80_0 .net *"_s55", 0 0, L_0x298c390; 1 drivers +v0x296dc00_0 .net *"_s56", 0 0, L_0x298b6a0; 1 drivers +v0x296da20_0 .net *"_s59", 0 0, L_0x298b700; 1 drivers +v0x296dac0_0 .net *"_s60", 0 0, L_0x298c830; 1 drivers +v0x296de20_0 .net *"_s63", 0 0, L_0x298c920; 1 drivers +v0x296dea0_0 .net *"_s64", 0 0, L_0x298c7d0; 1 drivers +v0x296dca0_0 .net *"_s67", 0 0, L_0x298cb20; 1 drivers +v0x296dd40_0 .net *"_s68", 0 0, L_0x298ca60; 1 drivers +v0x296e0e0_0 .net *"_s7", 0 0, L_0x298ac80; 1 drivers +v0x296e160_0 .net *"_s71", 0 0, L_0x298ce20; 1 drivers +v0x296df20_0 .net *"_s72", 0 0, L_0x298ccb0; 1 drivers +v0x296dfc0_0 .net *"_s75", 0 0, L_0x298d040; 1 drivers +v0x296e060_0 .net *"_s76", 0 0, L_0x298cf60; 1 drivers +v0x296e3e0_0 .net *"_s79", 0 0, L_0x298cd80; 1 drivers +v0x296e200_0 .net *"_s8", 0 0, L_0x298ae50; 1 drivers +v0x296e2a0_0 .net *"_s80", 0 0, L_0x298d1d0; 1 drivers +v0x296e340_0 .net *"_s83", 0 0, L_0x298d560; 1 drivers +v0x296e680_0 .net *"_s84", 0 0, L_0x298d460; 1 drivers +v0x296e480_0 .net *"_s87", 0 0, L_0x298d2c0; 1 drivers +v0x296e520_0 .net *"_s88", 0 0, L_0x296d130; 1 drivers +v0x296e5c0_0 .net *"_s91", 0 0, L_0x298d650; 1 drivers +v0x296e920_0 .net *"_s92", 0 0, L_0x298b530; 1 drivers +v0x296e720_0 .net *"_s95", 0 0, L_0x298d740; 1 drivers +v0x296e7c0_0 .net *"_s96", 0 0, L_0x298dd70; 1 drivers +v0x296e860_0 .net *"_s99", 0 0, L_0x298e0b0; 1 drivers +v0x296ebe0_0 .alias "ans", 31 0, v0x296fb40_0; +v0x296e9a0_0 .alias "carryout", 0 0, v0x296fa40_0; +v0x296ea20_0 .alias "command", 2 0, v0x2981340_0; +v0x296eac0_0 .net "cout0", 0 0, L_0x299d3b0; 1 drivers +v0x296eec0_0 .net "cout1", 0 0, L_0x29a1830; 1 drivers +v0x296ecf0_0 .net "cout2", 0 0, L_0x29a5b40; 1 drivers +v0x296ee00_0 .net "cout3", 0 0, L_0x29a9e90; 1 drivers +v0x296f250_0 .net "cout4", 0 0, L_0x29ae2a0; 1 drivers +v0x296f360_0 .net "cout5", 0 0, L_0x29b2530; 1 drivers +v0x296efd0_0 .net "cout6", 0 0, L_0x29b68b0; 1 drivers +RS_0x7ff6df0a3ad8/0/0 .resolv tri, L_0x2995e90, L_0x298f230, L_0x2994570, L_0x2995c80; +RS_0x7ff6df0a3ad8/0/4 .resolv tri, L_0x298f010, L_0x2996d80, L_0x29971b0, L_0x2997400; +RS_0x7ff6df0a3ad8/0/8 .resolv tri, L_0x2996e20, L_0x2996fc0, L_0x29977e0, L_0x29979d0; +RS_0x7ff6df0a3ad8/0/12 .resolv tri, L_0x2997e30, L_0x2997fd0, L_0x29981c0, L_0x29982b0; +RS_0x7ff6df0a3ad8/0/16 .resolv tri, L_0x29984a0, L_0x2998690, L_0x2998b20, L_0x2998cd0; +RS_0x7ff6df0a3ad8/0/20 .resolv tri, L_0x2998ec0, L_0x2998880, L_0x2999060, L_0x2999520; +RS_0x7ff6df0a3ad8/0/24 .resolv tri, L_0x2999710, L_0x2999250, L_0x2999440, L_0x2999900; +RS_0x7ff6df0a3ad8/0/28 .resolv tri, L_0x2999c50, L_0x299a140, L_0x299a330, L_0x299a3d0; +RS_0x7ff6df0a3ad8/1/0 .resolv tri, RS_0x7ff6df0a3ad8/0/0, RS_0x7ff6df0a3ad8/0/4, RS_0x7ff6df0a3ad8/0/8, RS_0x7ff6df0a3ad8/0/12; +RS_0x7ff6df0a3ad8/1/4 .resolv tri, RS_0x7ff6df0a3ad8/0/16, RS_0x7ff6df0a3ad8/0/20, RS_0x7ff6df0a3ad8/0/24, RS_0x7ff6df0a3ad8/0/28; +RS_0x7ff6df0a3ad8 .resolv tri, RS_0x7ff6df0a3ad8/1/0, RS_0x7ff6df0a3ad8/1/4, C4, C4; +v0x296f0e0_0 .net8 "finalB", 31 0, RS_0x7ff6df0a3ad8; 32 drivers +RS_0x7ff6df0a3478/0/0 .resolv tri, L_0x298a9e0, L_0x298ab80, L_0x298ad20, L_0x298af50; +RS_0x7ff6df0a3478/0/4 .resolv tri, L_0x298b0f0, L_0x298b2f0, L_0x296fcc0, L_0x298b850; +RS_0x7ff6df0a3478/0/8 .resolv tri, L_0x298b990, L_0x298bbd0, L_0x298bb30, L_0x298bd70; +RS_0x7ff6df0a3478/0/12 .resolv tri, L_0x298bf20, L_0x298c0e0, L_0x298c250, L_0x298c430; +RS_0x7ff6df0a3478/0/16 .resolv tri, L_0x298c730, L_0x298c9c0, L_0x298cc10, L_0x298cec0; +RS_0x7ff6df0a3478/0/20 .resolv tri, L_0x298d130, L_0x298d3c0, L_0x298b600, L_0x298b490; +RS_0x7ff6df0a3478/0/24 .resolv tri, L_0x298dcd0, L_0x298df20, L_0x298e150, L_0x298e3d0; +RS_0x7ff6df0a3478/0/28 .resolv tri, L_0x298e620, L_0x298e8d0, L_0x298eb40, L_0x298ee20; +RS_0x7ff6df0a3478/1/0 .resolv tri, RS_0x7ff6df0a3478/0/0, RS_0x7ff6df0a3478/0/4, RS_0x7ff6df0a3478/0/8, RS_0x7ff6df0a3478/0/12; +RS_0x7ff6df0a3478/1/4 .resolv tri, RS_0x7ff6df0a3478/0/16, RS_0x7ff6df0a3478/0/20, RS_0x7ff6df0a3478/0/24, RS_0x7ff6df0a3478/0/28; +RS_0x7ff6df0a3478 .resolv tri, RS_0x7ff6df0a3478/1/0, RS_0x7ff6df0a3478/1/4, C4, C4; +v0x296f680_0 .net8 "invertedB", 31 0, RS_0x7ff6df0a3478; 32 drivers +v0x296f700_0 .alias "opA", 31 0, v0x2980e00_0; +v0x296f3e0_0 .alias "opB", 31 0, v0x2970880_0; +v0x296f460_0 .alias "overflow", 0 0, v0x296fac0_0; +L_0x298a9e0 .part/pv L_0x298aa80, 0, 1, 32; +L_0x298aae0 .part v0x2970590_0, 0, 1; +L_0x298ab80 .part/pv L_0x298ac20, 1, 1, 32; +L_0x298ac80 .part v0x2970590_0, 1, 1; +L_0x298ad20 .part/pv L_0x298ae50, 2, 1, 32; +L_0x298aeb0 .part v0x2970590_0, 2, 1; +L_0x298af50 .part/pv L_0x298aff0, 3, 1, 32; +L_0x298b050 .part v0x2970590_0, 3, 1; +L_0x298b0f0 .part/pv L_0x298b190, 4, 1, 32; +L_0x298b1f0 .part v0x2970590_0, 4, 1; +L_0x298b2f0 .part/pv L_0x298b390, 5, 1, 32; +L_0x298b3f0 .part v0x2970590_0, 5, 1; +L_0x296fcc0 .part/pv L_0x298b290, 6, 1, 32; +L_0x298b7b0 .part v0x2970590_0, 6, 1; +L_0x298b850 .part/pv L_0x296fd60, 7, 1, 32; +L_0x298b8f0 .part v0x2970590_0, 7, 1; +L_0x298b990 .part/pv L_0x298ba30, 8, 1, 32; +L_0x298ba90 .part v0x2970590_0, 8, 1; +L_0x298bbd0 .part/pv L_0x298adc0, 9, 1, 32; +L_0x298bcd0 .part v0x2970590_0, 9, 1; +L_0x298bb30 .part/pv L_0x298be20, 10, 1, 32; +L_0x298be80 .part v0x2970590_0, 10, 1; +L_0x298bd70 .part/pv L_0x298bfe0, 11, 1, 32; +L_0x298c040 .part v0x2970590_0, 11, 1; +L_0x298bf20 .part/pv L_0x298bc70, 12, 1, 32; +L_0x298c1b0 .part v0x2970590_0, 12, 1; +L_0x298c0e0 .part/pv L_0x298c330, 13, 1, 32; +L_0x298c390 .part v0x2970590_0, 13, 1; +L_0x298c250 .part/pv L_0x298b6a0, 14, 1, 32; +L_0x298b700 .part v0x2970590_0, 14, 1; +L_0x298c430 .part/pv L_0x298c830, 15, 1, 32; +L_0x298c920 .part v0x2970590_0, 15, 1; +L_0x298c730 .part/pv L_0x298c7d0, 16, 1, 32; +L_0x298cb20 .part v0x2970590_0, 16, 1; +L_0x298c9c0 .part/pv L_0x298ca60, 17, 1, 32; +L_0x298ce20 .part v0x2970590_0, 17, 1; +L_0x298cc10 .part/pv L_0x298ccb0, 18, 1, 32; +L_0x298d040 .part v0x2970590_0, 18, 1; +L_0x298cec0 .part/pv L_0x298cf60, 19, 1, 32; +L_0x298cd80 .part v0x2970590_0, 19, 1; +L_0x298d130 .part/pv L_0x298d1d0, 20, 1, 32; +L_0x298d560 .part v0x2970590_0, 20, 1; +L_0x298d3c0 .part/pv L_0x298d460, 21, 1, 32; +L_0x298d2c0 .part v0x2970590_0, 21, 1; +L_0x298b600 .part/pv L_0x296d130, 22, 1, 32; +L_0x298d650 .part v0x2970590_0, 22, 1; +L_0x298b490 .part/pv L_0x298b530, 23, 1, 32; +L_0x298d740 .part v0x2970590_0, 23, 1; +L_0x298dcd0 .part/pv L_0x298dd70, 24, 1, 32; +L_0x298e0b0 .part v0x2970590_0, 24, 1; +L_0x298df20 .part/pv L_0x298dfc0, 25, 1, 32; +L_0x298de20 .part v0x2970590_0, 25, 1; +L_0x298e150 .part/pv L_0x298e1f0, 26, 1, 32; +L_0x298e580 .part v0x2970590_0, 26, 1; +L_0x298e3d0 .part/pv L_0x298e470, 27, 1, 32; +L_0x298e2f0 .part v0x2970590_0, 27, 1; +L_0x298e620 .part/pv L_0x298e6c0, 28, 1, 32; +L_0x298eaa0 .part v0x2970590_0, 28, 1; +L_0x298e8d0 .part/pv L_0x298e970, 29, 1, 32; +L_0x298e7c0 .part v0x2970590_0, 29, 1; +L_0x298eb40 .part/pv L_0x2987d20, 30, 1, 32; +L_0x298ebe0 .part v0x2970590_0, 30, 1; +L_0x298ee20 .part/pv L_0x298eec0, 31, 1, 32; +L_0x298ef20 .part v0x2970590_0, 31, 1; +L_0x299a5c0 .part v0x2980580_0, 0, 1; +RS_0x7ff6df0a1c18 .resolv tri, L_0x299b540, L_0x299c190, L_0x299ced0, L_0x299db30; +L_0x299ec90 .part/pv RS_0x7ff6df0a1c18, 0, 4, 32; +L_0x298c520 .part L_0x2989450, 0, 4; +L_0x298c5c0 .part RS_0x7ff6df0a3ad8, 0, 4; +L_0x298c660 .part v0x2980580_0, 0, 1; +RS_0x7ff6df0a0e38 .resolv tri, L_0x299f9c0, L_0x29a0610, L_0x29a1350, L_0x29a1fb0; +L_0x29a3090 .part/pv RS_0x7ff6df0a0e38, 4, 4, 32; +L_0x299ed80 .part L_0x2989450, 4, 4; +L_0x299ee20 .part RS_0x7ff6df0a3ad8, 4, 4; +RS_0x7ff6df0a0058 .resolv tri, L_0x29a3cd0, L_0x29a4920, L_0x29a5660, L_0x29a62c0; +L_0x29a73a0 .part/pv RS_0x7ff6df0a0058, 8, 4, 32; +L_0x29a74d0 .part L_0x2989450, 8, 4; +L_0x29a3130 .part RS_0x7ff6df0a3ad8, 8, 4; +RS_0x7ff6df09f278 .resolv tri, L_0x29a8020, L_0x29a8c70, L_0x29a99b0, L_0x29aa610; +L_0x29ab6f0 .part/pv RS_0x7ff6df09f278, 12, 4, 32; +L_0x29a7570 .part L_0x2989450, 12, 4; +L_0x2970770 .part RS_0x7ff6df0a3ad8, 12, 4; +RS_0x7ff6df09e498 .resolv tri, L_0x29ac430, L_0x29ad080, L_0x29addc0, L_0x29aea20; +L_0x29afb00 .part/pv RS_0x7ff6df09e498, 16, 4, 32; +L_0x29afba0 .part L_0x2989450, 16, 4; +L_0x29abc10 .part RS_0x7ff6df0a3ad8, 16, 4; +RS_0x7ff6df09d6b8 .resolv tri, L_0x29b0720, L_0x29b1310, L_0x29b2050, L_0x29b2cb0; +L_0x29b3e10 .part/pv RS_0x7ff6df09d6b8, 20, 4, 32; +L_0x29afc40 .part L_0x2989450, 20, 4; +L_0x29afce0 .part RS_0x7ff6df0a3ad8, 20, 4; +RS_0x7ff6df09c8d8 .resolv tri, L_0x29b4a60, L_0x29b56a0, L_0x29b63d0, L_0x29b7030; +L_0x29b8110 .part/pv RS_0x7ff6df09c8d8, 24, 4, 32; +L_0x29b82c0 .part L_0x2989450, 24, 4; +L_0x29b3eb0 .part RS_0x7ff6df0a3ad8, 24, 4; +RS_0x7ff6df09baf8 .resolv tri, L_0x29b8dd0, L_0x29b9a20, L_0x29ba760, L_0x29bb400; +L_0x29bc490 .part/pv RS_0x7ff6df09baf8, 28, 4, 32; +L_0x29b8360 .part L_0x2989450, 28, 4; +L_0x29b8400 .part RS_0x7ff6df0a3ad8, 28, 4; +S_0x29650c0 .scope module, "addsubmux" "muxtype1" 19 235, 19 3, S_0x2947ce0; + .timescale 0 0; +L_0x298ed20 .functor NOT 1, L_0x299a5c0, C4<0>, C4<0>, C4<0>; +L_0x298ed80 .functor AND 1, L_0x298f580, L_0x298ed20, C4<1>, C4<1>; +L_0x298f670 .functor AND 1, L_0x298f6d0, L_0x298ed20, C4<1>, C4<1>; +L_0x298f7c0 .functor AND 1, L_0x298f8b0, L_0x298ed20, C4<1>, C4<1>; +L_0x298f950 .functor AND 1, L_0x298f9b0, L_0x298ed20, C4<1>, C4<1>; +L_0x298faa0 .functor AND 1, L_0x298fb00, L_0x298ed20, C4<1>, C4<1>; +L_0x298fbf0 .functor AND 1, L_0x298fc50, L_0x298ed20, C4<1>, C4<1>; +L_0x298fd40 .functor AND 1, L_0x298feb0, L_0x298ed20, C4<1>, C4<1>; +L_0x298ffa0 .functor AND 1, L_0x2990000, L_0x298ed20, C4<1>, C4<1>; +L_0x2990140 .functor AND 1, L_0x29901a0, L_0x298ed20, C4<1>, C4<1>; +L_0x2990290 .functor AND 1, L_0x29902f0, L_0x298ed20, C4<1>, C4<1>; +L_0x2990440 .functor AND 1, L_0x2990510, L_0x298ed20, C4<1>, C4<1>; +L_0x298f820 .functor AND 1, L_0x29905b0, L_0x298ed20, C4<1>, C4<1>; +L_0x29903e0 .functor AND 1, L_0x2990790, L_0x298ed20, C4<1>, C4<1>; +L_0x2990880 .functor AND 1, L_0x29908e0, L_0x298ed20, C4<1>, C4<1>; +L_0x2990a50 .functor AND 1, L_0x2990cc0, L_0x298ed20, C4<1>, C4<1>; +L_0x2990d60 .functor AND 1, L_0x2990dc0, L_0x298ed20, C4<1>, C4<1>; +L_0x2990f40 .functor AND 1, L_0x2991040, L_0x298ed20, C4<1>, C4<1>; +L_0x29910e0 .functor AND 1, L_0x2991140, L_0x298ed20, C4<1>, C4<1>; +L_0x2990eb0 .functor AND 1, L_0x2990fa0, L_0x298ed20, C4<1>, C4<1>; +L_0x2991400 .functor AND 1, L_0x2991490, L_0x298ed20, C4<1>, C4<1>; +L_0x2991230 .functor AND 1, L_0x2991300, L_0x298ed20, C4<1>, C4<1>; +L_0x2991740 .functor AND 1, L_0x29917d0, L_0x298ed20, C4<1>, C4<1>; +L_0x29904a0 .functor AND 1, L_0x2991580, L_0x298ed20, C4<1>, C4<1>; +L_0x2991620 .functor AND 1, L_0x298d990, L_0x298ed20, C4<1>, C4<1>; +L_0x29909d0 .functor AND 1, L_0x298dc30, L_0x298ed20, C4<1>, C4<1>; +L_0x29906f0 .functor AND 1, L_0x298d8c0, L_0x298ed20, C4<1>, C4<1>; +L_0x298da80 .functor AND 1, L_0x298db10, L_0x298ed20, C4<1>, C4<1>; +L_0x29922f0 .functor AND 1, L_0x2992350, L_0x298ed20, C4<1>, C4<1>; +L_0x2992120 .functor AND 1, L_0x29921b0, L_0x298ed20, C4<1>, C4<1>; +L_0x2992630 .functor AND 1, L_0x2992690, L_0x298ed20, C4<1>, C4<1>; +L_0x2992440 .functor AND 1, L_0x2990bc0, L_0x298ed20, C4<1>, C4<1>; +L_0x2992500 .functor AND 1, L_0x2992590, L_0x298ed20, C4<1>, C4<1>; +L_0x2992730 .functor AND 1, L_0x2990ab0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2992ec0 .functor AND 1, L_0x2992f20, L_0x299a5c0, C4<1>, C4<1>; +L_0x2992c90 .functor AND 1, L_0x2992d20, L_0x299a5c0, C4<1>, C4<1>; +L_0x2992dc0 .functor AND 1, L_0x29932f0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993010 .functor AND 1, L_0x29931c0, L_0x299a5c0, C4<1>, C4<1>; +L_0x29930a0 .functor AND 1, L_0x2993600, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993390 .functor AND 1, L_0x2993420, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993510 .functor AND 1, L_0x2993a90, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993130 .functor AND 1, L_0x29936f0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993940 .functor AND 1, L_0x29939d0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993b30 .functor AND 1, L_0x2993b90, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993c80 .functor AND 1, L_0x2993ce0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993de0 .functor AND 1, L_0x2993e70, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993f60 .functor AND 1, L_0x2993ff0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2994090 .functor AND 1, L_0x2994120, L_0x299a5c0, C4<1>, C4<1>; +L_0x2994210 .functor AND 1, L_0x29942a0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2993830 .functor AND 1, L_0x29943f0, L_0x299a5c0, C4<1>, C4<1>; +L_0x29944e0 .functor AND 1, L_0x2994780, L_0x299a5c0, C4<1>, C4<1>; +L_0x2994870 .functor AND 1, L_0x2994a80, L_0x299a5c0, C4<1>, C4<1>; +L_0x2994b70 .functor AND 1, L_0x2994de0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2994c20 .functor AND 1, L_0x2994cb0, L_0x299a5c0, C4<1>, C4<1>; +L_0x29938c0 .functor AND 1, L_0x29948d0, L_0x299a5c0, C4<1>, C4<1>; +L_0x29949c0 .functor AND 1, L_0x2994e80, L_0x299a5c0, C4<1>, C4<1>; +L_0x2994f70 .functor AND 1, L_0x2995000, L_0x299a5c0, C4<1>, C4<1>; +L_0x29950f0 .functor AND 1, L_0x2995360, L_0x299a5c0, C4<1>, C4<1>; +L_0x2995450 .functor AND 1, L_0x29954b0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2995550 .functor AND 1, L_0x29955b0, L_0x299a5c0, C4<1>, C4<1>; +L_0x29956a0 .functor AND 1, L_0x2995180, L_0x299a5c0, C4<1>, C4<1>; +L_0x2995220 .functor AND 1, L_0x29957a0, L_0x299a5c0, C4<1>, C4<1>; +L_0x2995890 .functor AND 1, L_0x2995920, L_0x299a5c0, C4<1>, C4<1>; +L_0x2995a10 .functor AND 1, L_0x2995aa0, L_0x299a5c0, C4<1>, C4<1>; +L_0x29952e0 .functor AND 1, L_0x2995b90, L_0x299a5c0, C4<1>, C4<1>; +L_0x2995f80 .functor OR 1, L_0x298ed80, L_0x2992730, C4<0>, C4<0>; +L_0x29960d0 .functor OR 1, L_0x298f670, L_0x2992ec0, C4<0>, C4<0>; +L_0x298f3c0 .functor OR 1, L_0x298f7c0, L_0x2992c90, C4<0>, C4<0>; +L_0x2995d20 .functor OR 1, L_0x298f950, L_0x2992dc0, C4<0>, C4<0>; +L_0x298f0b0 .functor OR 1, L_0x298faa0, L_0x2993010, C4<0>, C4<0>; +L_0x2997060 .functor OR 1, L_0x298fbf0, L_0x29930a0, C4<0>, C4<0>; +L_0x2994610 .functor OR 1, L_0x298fd40, L_0x2993390, C4<0>, C4<0>; +L_0x29974a0 .functor OR 1, L_0x298ffa0, L_0x2993510, C4<0>, C4<0>; +L_0x2996ec0 .functor OR 1, L_0x2990140, L_0x2993130, C4<0>, C4<0>; +L_0x2997690 .functor OR 1, L_0x2990290, L_0x2993940, C4<0>, C4<0>; +L_0x2997880 .functor OR 1, L_0x2990440, L_0x2993b30, C4<0>, C4<0>; +L_0x2997ce0 .functor OR 1, L_0x298f820, L_0x2993c80, C4<0>, C4<0>; +L_0x2997ed0 .functor OR 1, L_0x29903e0, L_0x2993de0, C4<0>, C4<0>; +L_0x2998070 .functor OR 1, L_0x2990880, L_0x2993f60, C4<0>, C4<0>; +L_0x2997c80 .functor OR 1, L_0x2990a50, L_0x2994090, C4<0>, C4<0>; +L_0x2998350 .functor OR 1, L_0x2990d60, L_0x2994210, C4<0>, C4<0>; +L_0x2998540 .functor OR 1, L_0x2990f40, L_0x2993830, C4<0>, C4<0>; +L_0x29989d0 .functor OR 1, L_0x29910e0, L_0x29944e0, C4<0>, C4<0>; +L_0x2998bc0 .functor OR 1, L_0x2990eb0, L_0x2994870, C4<0>, C4<0>; +L_0x2998d70 .functor OR 1, L_0x2991400, L_0x2994b70, C4<0>, C4<0>; +L_0x2998730 .functor OR 1, L_0x2991230, L_0x2994c20, C4<0>, C4<0>; +L_0x2998920 .functor OR 1, L_0x2991740, L_0x29938c0, C4<0>, C4<0>; +L_0x2999100 .functor OR 1, L_0x29904a0, L_0x29949c0, C4<0>, C4<0>; +L_0x29995c0 .functor OR 1, L_0x2991620, L_0x2994f70, C4<0>, C4<0>; +L_0x2999ab0 .functor OR 1, L_0x29909d0, L_0x29950f0, C4<0>, C4<0>; +L_0x29992f0 .functor OR 1, L_0x29906f0, L_0x2995450, C4<0>, C4<0>; +L_0x29997b0 .functor OR 1, L_0x298da80, L_0x2995550, C4<0>, C4<0>; +L_0x29999a0 .functor OR 1, L_0x29922f0, L_0x29956a0, C4<0>, C4<0>; +L_0x2999cf0 .functor OR 1, L_0x2992120, L_0x2995220, C4<0>, C4<0>; +L_0x299a1e0 .functor OR 1, L_0x2992630, L_0x2995890, C4<0>, C4<0>; +L_0x2995280 .functor OR 1, L_0x2992440, L_0x2995a10, C4<0>, C4<0>; +L_0x299a470 .functor OR 1, L_0x2992500, L_0x29952e0, C4<0>, C4<0>; +v0x29651b0_0 .net *"_s1", 0 0, L_0x298f580; 1 drivers +v0x2965270_0 .net *"_s101", 0 0, L_0x2994a80; 1 drivers +v0x2965310_0 .net *"_s103", 0 0, L_0x2994de0; 1 drivers +v0x29653b0_0 .net *"_s105", 0 0, L_0x2994cb0; 1 drivers +v0x2965430_0 .net *"_s107", 0 0, L_0x29948d0; 1 drivers +v0x29654d0_0 .net *"_s109", 0 0, L_0x2994e80; 1 drivers +v0x2965570_0 .net *"_s11", 0 0, L_0x298fc50; 1 drivers +v0x2965610_0 .net *"_s111", 0 0, L_0x2995000; 1 drivers +v0x2965700_0 .net *"_s113", 0 0, L_0x2995360; 1 drivers +v0x29657a0_0 .net *"_s115", 0 0, L_0x29954b0; 1 drivers +v0x2965840_0 .net *"_s117", 0 0, L_0x29955b0; 1 drivers +v0x29658e0_0 .net *"_s119", 0 0, L_0x2995180; 1 drivers +v0x2965980_0 .net *"_s121", 0 0, L_0x29957a0; 1 drivers +v0x2965a20_0 .net *"_s123", 0 0, L_0x2995920; 1 drivers +v0x2965b40_0 .net *"_s125", 0 0, L_0x2995aa0; 1 drivers +v0x2965be0_0 .net *"_s127", 0 0, L_0x2995b90; 1 drivers +v0x2965aa0_0 .net *"_s128", 0 0, L_0x2995f80; 1 drivers +v0x2965d30_0 .net *"_s13", 0 0, L_0x298feb0; 1 drivers +v0x2965e50_0 .net *"_s130", 0 0, L_0x29960d0; 1 drivers +v0x2965ed0_0 .net *"_s132", 0 0, L_0x298f3c0; 1 drivers +v0x2965db0_0 .net *"_s134", 0 0, L_0x2995d20; 1 drivers +v0x2966000_0 .net *"_s136", 0 0, L_0x298f0b0; 1 drivers +v0x2965f50_0 .net *"_s138", 0 0, L_0x2997060; 1 drivers +v0x2966140_0 .net *"_s140", 0 0, L_0x2994610; 1 drivers +v0x29660a0_0 .net *"_s142", 0 0, L_0x29974a0; 1 drivers +v0x2966290_0 .net *"_s144", 0 0, L_0x2996ec0; 1 drivers +v0x29661e0_0 .net *"_s146", 0 0, L_0x2997690; 1 drivers +v0x29663f0_0 .net *"_s148", 0 0, L_0x2997880; 1 drivers +v0x2966330_0 .net *"_s15", 0 0, L_0x2990000; 1 drivers +v0x2966560_0 .net *"_s150", 0 0, L_0x2997ce0; 1 drivers +v0x2966470_0 .net *"_s152", 0 0, L_0x2997ed0; 1 drivers +v0x29666e0_0 .net *"_s154", 0 0, L_0x2998070; 1 drivers +v0x29665e0_0 .net *"_s156", 0 0, L_0x2997c80; 1 drivers +v0x2966870_0 .net *"_s158", 0 0, L_0x2998350; 1 drivers +v0x2966760_0 .net *"_s160", 0 0, L_0x2998540; 1 drivers +v0x2966a10_0 .net *"_s162", 0 0, L_0x29989d0; 1 drivers +v0x29668f0_0 .net *"_s164", 0 0, L_0x2998bc0; 1 drivers +v0x2966990_0 .net *"_s166", 0 0, L_0x2998d70; 1 drivers +v0x2966bd0_0 .net *"_s168", 0 0, L_0x2998730; 1 drivers +v0x2966c50_0 .net *"_s17", 0 0, L_0x29901a0; 1 drivers +v0x2966a90_0 .net *"_s170", 0 0, L_0x2998920; 1 drivers +v0x2966b30_0 .net *"_s172", 0 0, L_0x2999100; 1 drivers +v0x2966e30_0 .net *"_s174", 0 0, L_0x29995c0; 1 drivers +v0x2966eb0_0 .net *"_s176", 0 0, L_0x2999ab0; 1 drivers +v0x2966cd0_0 .net *"_s178", 0 0, L_0x29992f0; 1 drivers +v0x2966d70_0 .net *"_s180", 0 0, L_0x29997b0; 1 drivers +v0x29670b0_0 .net *"_s182", 0 0, L_0x29999a0; 1 drivers +v0x2967130_0 .net *"_s184", 0 0, L_0x2999cf0; 1 drivers +v0x2966f50_0 .net *"_s186", 0 0, L_0x299a1e0; 1 drivers +v0x2966ff0_0 .net *"_s188", 0 0, L_0x2995280; 1 drivers +v0x2967350_0 .net *"_s19", 0 0, L_0x29902f0; 1 drivers +v0x29673d0_0 .net *"_s190", 0 0, L_0x299a470; 1 drivers +v0x29671d0_0 .net *"_s21", 0 0, L_0x2990510; 1 drivers +v0x2967270_0 .net *"_s23", 0 0, L_0x29905b0; 1 drivers +v0x2967610_0 .net *"_s25", 0 0, L_0x2990790; 1 drivers +v0x2967690_0 .net *"_s27", 0 0, L_0x29908e0; 1 drivers +v0x2967450_0 .net *"_s29", 0 0, L_0x2990cc0; 1 drivers +v0x29674f0_0 .net *"_s3", 0 0, L_0x298f6d0; 1 drivers +v0x2967590_0 .net *"_s31", 0 0, L_0x2990dc0; 1 drivers +v0x2967910_0 .net *"_s33", 0 0, L_0x2991040; 1 drivers +v0x2967730_0 .net *"_s35", 0 0, L_0x2991140; 1 drivers +v0x29677d0_0 .net *"_s37", 0 0, L_0x2990fa0; 1 drivers +v0x2967870_0 .net *"_s39", 0 0, L_0x2991490; 1 drivers +v0x2967bb0_0 .net *"_s41", 0 0, L_0x2991300; 1 drivers +v0x29679b0_0 .net *"_s43", 0 0, L_0x29917d0; 1 drivers +v0x2967a50_0 .net *"_s45", 0 0, L_0x2991580; 1 drivers +v0x2967af0_0 .net *"_s47", 0 0, L_0x298d990; 1 drivers +v0x2967e50_0 .net *"_s49", 0 0, L_0x298dc30; 1 drivers +v0x2967c50_0 .net *"_s5", 0 0, L_0x298f8b0; 1 drivers +v0x2967cf0_0 .net *"_s51", 0 0, L_0x298d8c0; 1 drivers +v0x2967d90_0 .net *"_s53", 0 0, L_0x298db10; 1 drivers +v0x2968110_0 .net *"_s55", 0 0, L_0x2992350; 1 drivers +v0x2967ed0_0 .net *"_s57", 0 0, L_0x29921b0; 1 drivers +v0x2967f70_0 .net *"_s59", 0 0, L_0x2992690; 1 drivers +v0x2968010_0 .net *"_s61", 0 0, L_0x2990bc0; 1 drivers +v0x29683f0_0 .net *"_s63", 0 0, L_0x2992590; 1 drivers +v0x2968190_0 .net *"_s65", 0 0, L_0x2990ab0; 1 drivers +v0x2968230_0 .net *"_s67", 0 0, L_0x2992f20; 1 drivers +v0x29682d0_0 .net *"_s69", 0 0, L_0x2992d20; 1 drivers +v0x2968370_0 .net *"_s7", 0 0, L_0x298f9b0; 1 drivers +v0x2968700_0 .net *"_s71", 0 0, L_0x29932f0; 1 drivers +v0x2968780_0 .net *"_s73", 0 0, L_0x29931c0; 1 drivers +v0x2968490_0 .net *"_s75", 0 0, L_0x2993600; 1 drivers +v0x2968530_0 .net *"_s77", 0 0, L_0x2993420; 1 drivers +v0x29685d0_0 .net *"_s79", 0 0, L_0x2993a90; 1 drivers +v0x2968670_0 .net *"_s81", 0 0, L_0x29936f0; 1 drivers +v0x2968ae0_0 .net *"_s83", 0 0, L_0x29939d0; 1 drivers +v0x2968b80_0 .net *"_s85", 0 0, L_0x2993b90; 1 drivers +v0x2968820_0 .net *"_s87", 0 0, L_0x2993ce0; 1 drivers +v0x29688c0_0 .net *"_s89", 0 0, L_0x2993e70; 1 drivers +v0x2968960_0 .net *"_s9", 0 0, L_0x298fb00; 1 drivers +v0x2968a00_0 .net *"_s91", 0 0, L_0x2993ff0; 1 drivers +v0x2968ef0_0 .net *"_s93", 0 0, L_0x2994120; 1 drivers +v0x2968f70_0 .net *"_s95", 0 0, L_0x29942a0; 1 drivers +v0x2968c20_0 .net *"_s97", 0 0, L_0x29943f0; 1 drivers +v0x2968cc0_0 .net *"_s99", 0 0, L_0x2994780; 1 drivers +v0x2968d60_0 .net "address", 0 0, L_0x299a5c0; 1 drivers +v0x2968e00_0 .alias "in0", 31 0, v0x2970880_0; +v0x2969310_0 .net "in00addr", 0 0, L_0x298ed80; 1 drivers +v0x2969390_0 .net "in010addr", 0 0, L_0x2990440; 1 drivers +v0x2968ff0_0 .net "in011addr", 0 0, L_0x298f820; 1 drivers +v0x2969090_0 .net "in012addr", 0 0, L_0x29903e0; 1 drivers +v0x2969130_0 .net "in013addr", 0 0, L_0x2990880; 1 drivers +v0x29691d0_0 .net "in014addr", 0 0, L_0x2990a50; 1 drivers +v0x2969270_0 .net "in015addr", 0 0, L_0x2990d60; 1 drivers +v0x2969760_0 .net "in016addr", 0 0, L_0x2990f40; 1 drivers +v0x2969410_0 .net "in017addr", 0 0, L_0x29910e0; 1 drivers +v0x29694b0_0 .net "in018addr", 0 0, L_0x2990eb0; 1 drivers +v0x2969550_0 .net "in019addr", 0 0, L_0x2991400; 1 drivers +v0x29695f0_0 .net "in01addr", 0 0, L_0x298f670; 1 drivers +v0x2969690_0 .net "in020addr", 0 0, L_0x2991230; 1 drivers +v0x2969b60_0 .net "in021addr", 0 0, L_0x2991740; 1 drivers +v0x29697e0_0 .net "in022addr", 0 0, L_0x29904a0; 1 drivers +v0x2969880_0 .net "in023addr", 0 0, L_0x2991620; 1 drivers +v0x2969920_0 .net "in024addr", 0 0, L_0x29909d0; 1 drivers +v0x29699c0_0 .net "in025addr", 0 0, L_0x29906f0; 1 drivers +v0x2969a60_0 .net "in026addr", 0 0, L_0x298da80; 1 drivers +v0x2969f90_0 .net "in027addr", 0 0, L_0x29922f0; 1 drivers +v0x2969be0_0 .net "in028addr", 0 0, L_0x2992120; 1 drivers +v0x2969c80_0 .net "in029addr", 0 0, L_0x2992630; 1 drivers +v0x2969d20_0 .net "in02addr", 0 0, L_0x298f7c0; 1 drivers +v0x2969dc0_0 .net "in030addr", 0 0, L_0x2992440; 1 drivers +v0x2969e60_0 .net "in031addr", 0 0, L_0x2992500; 1 drivers +v0x2969f00_0 .net "in03addr", 0 0, L_0x298f950; 1 drivers +v0x296a400_0 .net "in04addr", 0 0, L_0x298faa0; 1 drivers +v0x296a480_0 .net "in05addr", 0 0, L_0x298fbf0; 1 drivers +v0x296a010_0 .net "in06addr", 0 0, L_0x298fd40; 1 drivers +v0x296a0b0_0 .net "in07addr", 0 0, L_0x298ffa0; 1 drivers +v0x296a150_0 .net "in08addr", 0 0, L_0x2990140; 1 drivers +v0x296a1f0_0 .net "in09addr", 0 0, L_0x2990290; 1 drivers +v0x296a290_0 .alias "in1", 31 0, v0x296f680_0; +v0x296a330_0 .net "in10addr", 0 0, L_0x2992730; 1 drivers +v0x296a930_0 .net "in110addr", 0 0, L_0x2993b30; 1 drivers +v0x296a9b0_0 .net "in111addr", 0 0, L_0x2993c80; 1 drivers +v0x296a500_0 .net "in112addr", 0 0, L_0x2993de0; 1 drivers +v0x296a5a0_0 .net "in113addr", 0 0, L_0x2993f60; 1 drivers +v0x296a640_0 .net "in114addr", 0 0, L_0x2994090; 1 drivers +v0x296a6e0_0 .net "in115addr", 0 0, L_0x2994210; 1 drivers +v0x296a780_0 .net "in116addr", 0 0, L_0x2993830; 1 drivers +v0x296a820_0 .net "in117addr", 0 0, L_0x29944e0; 1 drivers +v0x296aea0_0 .net "in118addr", 0 0, L_0x2994870; 1 drivers +v0x296af20_0 .net "in119addr", 0 0, L_0x2994b70; 1 drivers +v0x296aa30_0 .net "in11addr", 0 0, L_0x2992ec0; 1 drivers +v0x296aad0_0 .net "in120addr", 0 0, L_0x2994c20; 1 drivers +v0x296ab70_0 .net "in121addr", 0 0, L_0x29938c0; 1 drivers +v0x296ac10_0 .net "in122addr", 0 0, L_0x29949c0; 1 drivers +v0x296acb0_0 .net "in123addr", 0 0, L_0x2994f70; 1 drivers +v0x296ad50_0 .net "in124addr", 0 0, L_0x29950f0; 1 drivers +v0x296adf0_0 .net "in125addr", 0 0, L_0x2995450; 1 drivers +v0x296b450_0 .net "in126addr", 0 0, L_0x2995550; 1 drivers +v0x296afa0_0 .net "in127addr", 0 0, L_0x29956a0; 1 drivers +v0x296b040_0 .net "in128addr", 0 0, L_0x2995220; 1 drivers +v0x296b0e0_0 .net "in129addr", 0 0, L_0x2995890; 1 drivers +v0x296b180_0 .net "in12addr", 0 0, L_0x2992c90; 1 drivers +v0x296b220_0 .net "in130addr", 0 0, L_0x2995a10; 1 drivers +v0x296b2c0_0 .net "in131addr", 0 0, L_0x29952e0; 1 drivers +v0x296b360_0 .net "in13addr", 0 0, L_0x2992dc0; 1 drivers +v0x296b9c0_0 .net "in14addr", 0 0, L_0x2993010; 1 drivers +v0x296b4d0_0 .net "in15addr", 0 0, L_0x29930a0; 1 drivers +v0x296b550_0 .net "in16addr", 0 0, L_0x2993390; 1 drivers +v0x296b5f0_0 .net "in17addr", 0 0, L_0x2993510; 1 drivers +v0x296b690_0 .net "in18addr", 0 0, L_0x2993130; 1 drivers +v0x296b730_0 .net "in19addr", 0 0, L_0x2993940; 1 drivers +v0x296b7d0_0 .net "invaddr", 0 0, L_0x298ed20; 1 drivers +v0x296b870_0 .alias "out", 31 0, v0x296f0e0_0; +L_0x298f580 .part v0x2970590_0, 0, 1; +L_0x298f6d0 .part v0x2970590_0, 1, 1; +L_0x298f8b0 .part v0x2970590_0, 2, 1; +L_0x298f9b0 .part v0x2970590_0, 3, 1; +L_0x298fb00 .part v0x2970590_0, 4, 1; +L_0x298fc50 .part v0x2970590_0, 5, 1; +L_0x298feb0 .part v0x2970590_0, 6, 1; +L_0x2990000 .part v0x2970590_0, 7, 1; +L_0x29901a0 .part v0x2970590_0, 8, 1; +L_0x29902f0 .part v0x2970590_0, 9, 1; +L_0x2990510 .part v0x2970590_0, 10, 1; +L_0x29905b0 .part v0x2970590_0, 11, 1; +L_0x2990790 .part v0x2970590_0, 12, 1; +L_0x29908e0 .part v0x2970590_0, 13, 1; +L_0x2990cc0 .part v0x2970590_0, 14, 1; +L_0x2990dc0 .part v0x2970590_0, 15, 1; +L_0x2991040 .part v0x2970590_0, 16, 1; +L_0x2991140 .part v0x2970590_0, 17, 1; +L_0x2990fa0 .part v0x2970590_0, 18, 1; +L_0x2991490 .part v0x2970590_0, 19, 1; +L_0x2991300 .part v0x2970590_0, 20, 1; +L_0x29917d0 .part v0x2970590_0, 21, 1; +L_0x2991580 .part v0x2970590_0, 22, 1; +L_0x298d990 .part v0x2970590_0, 23, 1; +L_0x298dc30 .part v0x2970590_0, 24, 1; +L_0x298d8c0 .part v0x2970590_0, 25, 1; +L_0x298db10 .part v0x2970590_0, 26, 1; +L_0x2992350 .part v0x2970590_0, 27, 1; +L_0x29921b0 .part v0x2970590_0, 28, 1; +L_0x2992690 .part v0x2970590_0, 29, 1; +L_0x2990bc0 .part v0x2970590_0, 30, 1; +L_0x2992590 .part v0x2970590_0, 31, 1; +L_0x2990ab0 .part RS_0x7ff6df0a3478, 0, 1; +L_0x2992f20 .part RS_0x7ff6df0a3478, 1, 1; +L_0x2992d20 .part RS_0x7ff6df0a3478, 2, 1; +L_0x29932f0 .part RS_0x7ff6df0a3478, 3, 1; +L_0x29931c0 .part RS_0x7ff6df0a3478, 4, 1; +L_0x2993600 .part RS_0x7ff6df0a3478, 5, 1; +L_0x2993420 .part RS_0x7ff6df0a3478, 6, 1; +L_0x2993a90 .part RS_0x7ff6df0a3478, 7, 1; +L_0x29936f0 .part RS_0x7ff6df0a3478, 8, 1; +L_0x29939d0 .part RS_0x7ff6df0a3478, 9, 1; +L_0x2993b90 .part RS_0x7ff6df0a3478, 10, 1; +L_0x2993ce0 .part RS_0x7ff6df0a3478, 11, 1; +L_0x2993e70 .part RS_0x7ff6df0a3478, 12, 1; +L_0x2993ff0 .part RS_0x7ff6df0a3478, 13, 1; +L_0x2994120 .part RS_0x7ff6df0a3478, 14, 1; +L_0x29942a0 .part RS_0x7ff6df0a3478, 15, 1; +L_0x29943f0 .part RS_0x7ff6df0a3478, 16, 1; +L_0x2994780 .part RS_0x7ff6df0a3478, 17, 1; +L_0x2994a80 .part RS_0x7ff6df0a3478, 18, 1; +L_0x2994de0 .part RS_0x7ff6df0a3478, 19, 1; +L_0x2994cb0 .part RS_0x7ff6df0a3478, 20, 1; +L_0x29948d0 .part RS_0x7ff6df0a3478, 21, 1; +L_0x2994e80 .part RS_0x7ff6df0a3478, 22, 1; +L_0x2995000 .part RS_0x7ff6df0a3478, 23, 1; +L_0x2995360 .part RS_0x7ff6df0a3478, 24, 1; +L_0x29954b0 .part RS_0x7ff6df0a3478, 25, 1; +L_0x29955b0 .part RS_0x7ff6df0a3478, 26, 1; +L_0x2995180 .part RS_0x7ff6df0a3478, 27, 1; +L_0x29957a0 .part RS_0x7ff6df0a3478, 28, 1; +L_0x2995920 .part RS_0x7ff6df0a3478, 29, 1; +L_0x2995aa0 .part RS_0x7ff6df0a3478, 30, 1; +L_0x2995b90 .part RS_0x7ff6df0a3478, 31, 1; +L_0x2995e90 .part/pv L_0x2995f80, 0, 1, 32; +L_0x298f230 .part/pv L_0x29960d0, 1, 1, 32; +L_0x2994570 .part/pv L_0x298f3c0, 2, 1, 32; +L_0x2995c80 .part/pv L_0x2995d20, 3, 1, 32; +L_0x298f010 .part/pv L_0x298f0b0, 4, 1, 32; +L_0x2996d80 .part/pv L_0x2997060, 5, 1, 32; +L_0x29971b0 .part/pv L_0x2994610, 6, 1, 32; +L_0x2997400 .part/pv L_0x29974a0, 7, 1, 32; +L_0x2996e20 .part/pv L_0x2996ec0, 8, 1, 32; +L_0x2996fc0 .part/pv L_0x2997690, 9, 1, 32; +L_0x29977e0 .part/pv L_0x2997880, 10, 1, 32; +L_0x29979d0 .part/pv L_0x2997ce0, 11, 1, 32; +L_0x2997e30 .part/pv L_0x2997ed0, 12, 1, 32; +L_0x2997fd0 .part/pv L_0x2998070, 13, 1, 32; +L_0x29981c0 .part/pv L_0x2997c80, 14, 1, 32; +L_0x29982b0 .part/pv L_0x2998350, 15, 1, 32; +L_0x29984a0 .part/pv L_0x2998540, 16, 1, 32; +L_0x2998690 .part/pv L_0x29989d0, 17, 1, 32; +L_0x2998b20 .part/pv L_0x2998bc0, 18, 1, 32; +L_0x2998cd0 .part/pv L_0x2998d70, 19, 1, 32; +L_0x2998ec0 .part/pv L_0x2998730, 20, 1, 32; +L_0x2998880 .part/pv L_0x2998920, 21, 1, 32; +L_0x2999060 .part/pv L_0x2999100, 22, 1, 32; +L_0x2999520 .part/pv L_0x29995c0, 23, 1, 32; +L_0x2999710 .part/pv L_0x2999ab0, 24, 1, 32; +L_0x2999250 .part/pv L_0x29992f0, 25, 1, 32; +L_0x2999440 .part/pv L_0x29997b0, 26, 1, 32; +L_0x2999900 .part/pv L_0x29999a0, 27, 1, 32; +L_0x2999c50 .part/pv L_0x2999cf0, 28, 1, 32; +L_0x299a140 .part/pv L_0x299a1e0, 29, 1, 32; +L_0x299a330 .part/pv L_0x2995280, 30, 1, 32; +L_0x299a3d0 .part/pv L_0x299a470, 31, 1, 32; +S_0x29615b0 .scope module, "adder0" "FullAdder4bit" 19 237, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x299d8f0 .functor AND 1, L_0x299df30, L_0x299dfd0, C4<1>, C4<1>; +L_0x299e0f0 .functor NOR 1, L_0x299e150, L_0x299e1f0, C4<0>, C4<0>; +L_0x299e370 .functor AND 1, L_0x299e3d0, L_0x299e4c0, C4<1>, C4<1>; +L_0x299e2e0 .functor NOR 1, L_0x299e650, L_0x299e850, C4<0>, C4<0>; +L_0x299e5b0 .functor OR 1, L_0x299d8f0, L_0x299e0f0, C4<0>, C4<0>; +L_0x299ea40 .functor NOR 1, L_0x299e370, L_0x299e2e0, C4<0>, C4<0>; +L_0x299eb40 .functor AND 1, L_0x299e5b0, L_0x299ea40, C4<1>, C4<1>; +v0x29641a0_0 .net *"_s25", 0 0, L_0x299df30; 1 drivers +v0x2964260_0 .net *"_s27", 0 0, L_0x299dfd0; 1 drivers +v0x2964300_0 .net *"_s29", 0 0, L_0x299e150; 1 drivers +v0x29643a0_0 .net *"_s31", 0 0, L_0x299e1f0; 1 drivers +v0x2964420_0 .net *"_s33", 0 0, L_0x299e3d0; 1 drivers +v0x29644c0_0 .net *"_s35", 0 0, L_0x299e4c0; 1 drivers +v0x2964560_0 .net *"_s37", 0 0, L_0x299e650; 1 drivers +v0x2964600_0 .net *"_s39", 0 0, L_0x299e850; 1 drivers +v0x29646a0_0 .net "a", 3 0, L_0x298c520; 1 drivers +v0x2964740_0 .net "aandb", 0 0, L_0x299d8f0; 1 drivers +v0x29647e0_0 .net "abandnoror", 0 0, L_0x299e5b0; 1 drivers +v0x2964880_0 .net "anorb", 0 0, L_0x299e0f0; 1 drivers +v0x2964920_0 .net "b", 3 0, L_0x298c5c0; 1 drivers +v0x29649c0_0 .net "bandsum", 0 0, L_0x299e370; 1 drivers +v0x2964ae0_0 .net "bnorsum", 0 0, L_0x299e2e0; 1 drivers +v0x2964b80_0 .net "bsumandnornor", 0 0, L_0x299ea40; 1 drivers +v0x2964a40_0 .net "carryin", 0 0, L_0x298c660; 1 drivers +v0x2964cb0_0 .alias "carryout", 0 0, v0x296eac0_0; +v0x2964c00_0 .net "carryout1", 0 0, L_0x2997b70; 1 drivers +v0x2964dd0_0 .net "carryout2", 0 0, L_0x299b9d0; 1 drivers +v0x2964f00_0 .net "carryout3", 0 0, L_0x299c710; 1 drivers +v0x2964f80_0 .alias "overflow", 0 0, v0x296b910_0; +v0x2964e50_0 .net8 "sum", 3 0, RS_0x7ff6df0a1c18; 4 drivers +L_0x299b540 .part/pv L_0x299b470, 0, 1, 4; +L_0x299b630 .part L_0x298c520, 0, 1; +L_0x299b6d0 .part L_0x298c5c0, 0, 1; +L_0x299c190 .part/pv L_0x299a040, 1, 1, 4; +L_0x299c2d0 .part L_0x298c520, 1, 1; +L_0x299c3c0 .part L_0x298c5c0, 1, 1; +L_0x299ced0 .part/pv L_0x299bc40, 2, 1, 4; +L_0x299cfc0 .part L_0x298c520, 2, 1; +L_0x299d0b0 .part L_0x298c5c0, 2, 1; +L_0x299db30 .part/pv L_0x299c980, 3, 1, 4; +L_0x299dc60 .part L_0x298c520, 3, 1; +L_0x299dd90 .part L_0x298c5c0, 3, 1; +L_0x299df30 .part L_0x298c520, 3, 1; +L_0x299dfd0 .part L_0x298c5c0, 3, 1; +L_0x299e150 .part L_0x298c520, 3, 1; +L_0x299e1f0 .part L_0x298c5c0, 3, 1; +L_0x299e3d0 .part L_0x298c5c0, 3, 1; +L_0x299e4c0 .part RS_0x7ff6df0a1c18, 3, 1; +L_0x299e650 .part L_0x298c5c0, 3, 1; +L_0x299e850 .part RS_0x7ff6df0a1c18, 3, 1; +S_0x2963710 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x29615b0; + .timescale 0 0; +L_0x299a660 .functor AND 1, L_0x299b630, L_0x299b6d0, C4<1>, C4<1>; +L_0x299a6c0 .functor AND 1, L_0x299b630, L_0x298c660, C4<1>, C4<1>; +L_0x2991680 .functor AND 1, L_0x299b6d0, L_0x298c660, C4<1>, C4<1>; +L_0x2997a70 .functor OR 1, L_0x299a660, L_0x299a6c0, C4<0>, C4<0>; +L_0x2997b70 .functor OR 1, L_0x2997a70, L_0x2991680, C4<0>, C4<0>; +L_0x2999e40 .functor OR 1, L_0x299b630, L_0x299b6d0, C4<0>, C4<0>; +L_0x2999ea0 .functor OR 1, L_0x2999e40, L_0x298c660, C4<0>, C4<0>; +L_0x2999fe0 .functor NOT 1, L_0x2997b70, C4<0>, C4<0>, C4<0>; +L_0x299a0d0 .functor AND 1, L_0x2999fe0, L_0x2999ea0, C4<1>, C4<1>; +L_0x299b230 .functor AND 1, L_0x299b630, L_0x299b6d0, C4<1>, C4<1>; +L_0x299b410 .functor AND 1, L_0x299b230, L_0x298c660, C4<1>, C4<1>; +L_0x299b470 .functor OR 1, L_0x299a0d0, L_0x299b410, C4<0>, C4<0>; +v0x2963800_0 .net "a", 0 0, L_0x299b630; 1 drivers +v0x29638c0_0 .net "ab", 0 0, L_0x299a660; 1 drivers +v0x2963960_0 .net "acarryin", 0 0, L_0x299a6c0; 1 drivers +v0x2963a00_0 .net "andall", 0 0, L_0x299b410; 1 drivers +v0x2963a80_0 .net "andsingleintermediate", 0 0, L_0x299b230; 1 drivers +v0x2963b20_0 .net "andsumintermediate", 0 0, L_0x299a0d0; 1 drivers +v0x2963bc0_0 .net "b", 0 0, L_0x299b6d0; 1 drivers +v0x2963c60_0 .net "bcarryin", 0 0, L_0x2991680; 1 drivers +v0x2963d00_0 .alias "carryin", 0 0, v0x2964a40_0; +v0x2963da0_0 .alias "carryout", 0 0, v0x2964c00_0; +v0x2963e20_0 .net "invcarryout", 0 0, L_0x2999fe0; 1 drivers +v0x2963ea0_0 .net "orall", 0 0, L_0x2999ea0; 1 drivers +v0x2963f40_0 .net "orpairintermediate", 0 0, L_0x2997a70; 1 drivers +v0x2963fe0_0 .net "orsingleintermediate", 0 0, L_0x2999e40; 1 drivers +v0x2964100_0 .net "sum", 0 0, L_0x299b470; 1 drivers +S_0x2962c80 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x29615b0; + .timescale 0 0; +L_0x299b3b0 .functor AND 1, L_0x299c2d0, L_0x299c3c0, C4<1>, C4<1>; +L_0x299b770 .functor AND 1, L_0x299c2d0, L_0x2997b70, C4<1>, C4<1>; +L_0x299b820 .functor AND 1, L_0x299c3c0, L_0x2997b70, C4<1>, C4<1>; +L_0x299b8d0 .functor OR 1, L_0x299b3b0, L_0x299b770, C4<0>, C4<0>; +L_0x299b9d0 .functor OR 1, L_0x299b8d0, L_0x299b820, C4<0>, C4<0>; +L_0x299bad0 .functor OR 1, L_0x299c2d0, L_0x299c3c0, C4<0>, C4<0>; +L_0x299bb30 .functor OR 1, L_0x299bad0, L_0x2997b70, C4<0>, C4<0>; +L_0x299bbe0 .functor NOT 1, L_0x299b9d0, C4<0>, C4<0>, C4<0>; +L_0x299bcd0 .functor AND 1, L_0x299bbe0, L_0x299bb30, C4<1>, C4<1>; +L_0x299bdd0 .functor AND 1, L_0x299c2d0, L_0x299c3c0, C4<1>, C4<1>; +L_0x299bfb0 .functor AND 1, L_0x299bdd0, L_0x2997b70, C4<1>, C4<1>; +L_0x299a040 .functor OR 1, L_0x299bcd0, L_0x299bfb0, C4<0>, C4<0>; +v0x2962d70_0 .net "a", 0 0, L_0x299c2d0; 1 drivers +v0x2962e30_0 .net "ab", 0 0, L_0x299b3b0; 1 drivers +v0x2962ed0_0 .net "acarryin", 0 0, L_0x299b770; 1 drivers +v0x2962f70_0 .net "andall", 0 0, L_0x299bfb0; 1 drivers +v0x2962ff0_0 .net "andsingleintermediate", 0 0, L_0x299bdd0; 1 drivers +v0x2963090_0 .net "andsumintermediate", 0 0, L_0x299bcd0; 1 drivers +v0x2963130_0 .net "b", 0 0, L_0x299c3c0; 1 drivers +v0x29631d0_0 .net "bcarryin", 0 0, L_0x299b820; 1 drivers +v0x2963270_0 .alias "carryin", 0 0, v0x2964c00_0; +v0x2963310_0 .alias "carryout", 0 0, v0x2964dd0_0; +v0x2963390_0 .net "invcarryout", 0 0, L_0x299bbe0; 1 drivers +v0x2963410_0 .net "orall", 0 0, L_0x299bb30; 1 drivers +v0x29634b0_0 .net "orpairintermediate", 0 0, L_0x299b8d0; 1 drivers +v0x2963550_0 .net "orsingleintermediate", 0 0, L_0x299bad0; 1 drivers +v0x2963670_0 .net "sum", 0 0, L_0x299a040; 1 drivers +S_0x29621a0 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x29615b0; + .timescale 0 0; +L_0x299bf50 .functor AND 1, L_0x299cfc0, L_0x299d0b0, C4<1>, C4<1>; +L_0x299c4b0 .functor AND 1, L_0x299cfc0, L_0x299b9d0, C4<1>, C4<1>; +L_0x299c560 .functor AND 1, L_0x299d0b0, L_0x299b9d0, C4<1>, C4<1>; +L_0x299c610 .functor OR 1, L_0x299bf50, L_0x299c4b0, C4<0>, C4<0>; +L_0x299c710 .functor OR 1, L_0x299c610, L_0x299c560, C4<0>, C4<0>; +L_0x299c810 .functor OR 1, L_0x299cfc0, L_0x299d0b0, C4<0>, C4<0>; +L_0x299c870 .functor OR 1, L_0x299c810, L_0x299b9d0, C4<0>, C4<0>; +L_0x299c920 .functor NOT 1, L_0x299c710, C4<0>, C4<0>, C4<0>; +L_0x299ca10 .functor AND 1, L_0x299c920, L_0x299c870, C4<1>, C4<1>; +L_0x299cb10 .functor AND 1, L_0x299cfc0, L_0x299d0b0, C4<1>, C4<1>; +L_0x299ccf0 .functor AND 1, L_0x299cb10, L_0x299b9d0, C4<1>, C4<1>; +L_0x299bc40 .functor OR 1, L_0x299ca10, L_0x299ccf0, C4<0>, C4<0>; +v0x2962290_0 .net "a", 0 0, L_0x299cfc0; 1 drivers +v0x2962350_0 .net "ab", 0 0, L_0x299bf50; 1 drivers +v0x29623f0_0 .net "acarryin", 0 0, L_0x299c4b0; 1 drivers +v0x2962490_0 .net "andall", 0 0, L_0x299ccf0; 1 drivers +v0x2962510_0 .net "andsingleintermediate", 0 0, L_0x299cb10; 1 drivers +v0x29625b0_0 .net "andsumintermediate", 0 0, L_0x299ca10; 1 drivers +v0x2962650_0 .net "b", 0 0, L_0x299d0b0; 1 drivers +v0x29626f0_0 .net "bcarryin", 0 0, L_0x299c560; 1 drivers +v0x29627e0_0 .alias "carryin", 0 0, v0x2964dd0_0; +v0x2962880_0 .alias "carryout", 0 0, v0x2964f00_0; +v0x2962900_0 .net "invcarryout", 0 0, L_0x299c920; 1 drivers +v0x2962980_0 .net "orall", 0 0, L_0x299c870; 1 drivers +v0x2962a20_0 .net "orpairintermediate", 0 0, L_0x299c610; 1 drivers +v0x2962ac0_0 .net "orsingleintermediate", 0 0, L_0x299c810; 1 drivers +v0x2962be0_0 .net "sum", 0 0, L_0x299bc40; 1 drivers +S_0x29616a0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x29615b0; + .timescale 0 0; +L_0x299cc90 .functor AND 1, L_0x299dc60, L_0x299dd90, C4<1>, C4<1>; +L_0x299d150 .functor AND 1, L_0x299dc60, L_0x299c710, C4<1>, C4<1>; +L_0x299d200 .functor AND 1, L_0x299dd90, L_0x299c710, C4<1>, C4<1>; +L_0x299d2b0 .functor OR 1, L_0x299cc90, L_0x299d150, C4<0>, C4<0>; +L_0x299d3b0 .functor OR 1, L_0x299d2b0, L_0x299d200, C4<0>, C4<0>; +L_0x299d4b0 .functor OR 1, L_0x299dc60, L_0x299dd90, C4<0>, C4<0>; +L_0x299d510 .functor OR 1, L_0x299d4b0, L_0x299c710, C4<0>, C4<0>; +L_0x299d5c0 .functor NOT 1, L_0x299d3b0, C4<0>, C4<0>, C4<0>; +L_0x299d670 .functor AND 1, L_0x299d5c0, L_0x299d510, C4<1>, C4<1>; +L_0x299d770 .functor AND 1, L_0x299dc60, L_0x299dd90, C4<1>, C4<1>; +L_0x299d950 .functor AND 1, L_0x299d770, L_0x299c710, C4<1>, C4<1>; +L_0x299c980 .functor OR 1, L_0x299d670, L_0x299d950, C4<0>, C4<0>; +v0x2961790_0 .net "a", 0 0, L_0x299dc60; 1 drivers +v0x2961850_0 .net "ab", 0 0, L_0x299cc90; 1 drivers +v0x29618f0_0 .net "acarryin", 0 0, L_0x299d150; 1 drivers +v0x2961990_0 .net "andall", 0 0, L_0x299d950; 1 drivers +v0x2961a10_0 .net "andsingleintermediate", 0 0, L_0x299d770; 1 drivers +v0x2961ab0_0 .net "andsumintermediate", 0 0, L_0x299d670; 1 drivers +v0x2961b50_0 .net "b", 0 0, L_0x299dd90; 1 drivers +v0x2961bf0_0 .net "bcarryin", 0 0, L_0x299d200; 1 drivers +v0x2961ce0_0 .alias "carryin", 0 0, v0x2964f00_0; +v0x2961d80_0 .alias "carryout", 0 0, v0x296eac0_0; +v0x2961e00_0 .net "invcarryout", 0 0, L_0x299d5c0; 1 drivers +v0x2961ea0_0 .net "orall", 0 0, L_0x299d510; 1 drivers +v0x2961f40_0 .net "orpairintermediate", 0 0, L_0x299d2b0; 1 drivers +v0x2961fe0_0 .net "orsingleintermediate", 0 0, L_0x299d4b0; 1 drivers +v0x2962100_0 .net "sum", 0 0, L_0x299c980; 1 drivers +S_0x295daa0 .scope module, "adder1" "FullAdder4bit" 19 238, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29a1d70 .functor AND 1, L_0x29a23b0, L_0x29a2450, C4<1>, C4<1>; +L_0x29a24f0 .functor NOR 1, L_0x29a2550, L_0x29a25f0, C4<0>, C4<0>; +L_0x29a2770 .functor AND 1, L_0x29a27d0, L_0x29a28c0, C4<1>, C4<1>; +L_0x29a26e0 .functor NOR 1, L_0x29a2a50, L_0x29a2c50, C4<0>, C4<0>; +L_0x29a29b0 .functor OR 1, L_0x29a1d70, L_0x29a24f0, C4<0>, C4<0>; +L_0x29a2e40 .functor NOR 1, L_0x29a2770, L_0x29a26e0, C4<0>, C4<0>; +L_0x29a2f40 .functor AND 1, L_0x29a29b0, L_0x29a2e40, C4<1>, C4<1>; +v0x2960690_0 .net *"_s25", 0 0, L_0x29a23b0; 1 drivers +v0x2960750_0 .net *"_s27", 0 0, L_0x29a2450; 1 drivers +v0x29607f0_0 .net *"_s29", 0 0, L_0x29a2550; 1 drivers +v0x2960890_0 .net *"_s31", 0 0, L_0x29a25f0; 1 drivers +v0x2960910_0 .net *"_s33", 0 0, L_0x29a27d0; 1 drivers +v0x29609b0_0 .net *"_s35", 0 0, L_0x29a28c0; 1 drivers +v0x2960a50_0 .net *"_s37", 0 0, L_0x29a2a50; 1 drivers +v0x2960af0_0 .net *"_s39", 0 0, L_0x29a2c50; 1 drivers +v0x2960b90_0 .net "a", 3 0, L_0x299ed80; 1 drivers +v0x2960c30_0 .net "aandb", 0 0, L_0x29a1d70; 1 drivers +v0x2960cd0_0 .net "abandnoror", 0 0, L_0x29a29b0; 1 drivers +v0x2960d70_0 .net "anorb", 0 0, L_0x29a24f0; 1 drivers +v0x2960e10_0 .net "b", 3 0, L_0x299ee20; 1 drivers +v0x2960eb0_0 .net "bandsum", 0 0, L_0x29a2770; 1 drivers +v0x2960fd0_0 .net "bnorsum", 0 0, L_0x29a26e0; 1 drivers +v0x2961070_0 .net "bsumandnornor", 0 0, L_0x29a2e40; 1 drivers +v0x2960f30_0 .alias "carryin", 0 0, v0x296eac0_0; +v0x29611a0_0 .alias "carryout", 0 0, v0x296eec0_0; +v0x29610f0_0 .net "carryout1", 0 0, L_0x299f320; 1 drivers +v0x29612c0_0 .net "carryout2", 0 0, L_0x299fe50; 1 drivers +v0x29613f0_0 .net "carryout3", 0 0, L_0x29a0b90; 1 drivers +v0x2961470_0 .alias "overflow", 0 0, v0x296bf70_0; +v0x2961340_0 .net8 "sum", 3 0, RS_0x7ff6df0a0e38; 4 drivers +L_0x299f9c0 .part/pv L_0x299f960, 0, 1, 4; +L_0x299fab0 .part L_0x299ed80, 0, 1; +L_0x299fb50 .part L_0x299ee20, 0, 1; +L_0x29a0610 .part/pv L_0x299f590, 1, 1, 4; +L_0x29a0750 .part L_0x299ed80, 1, 1; +L_0x29a0840 .part L_0x299ee20, 1, 1; +L_0x29a1350 .part/pv L_0x29a00c0, 2, 1, 4; +L_0x29a1440 .part L_0x299ed80, 2, 1; +L_0x29a1530 .part L_0x299ee20, 2, 1; +L_0x29a1fb0 .part/pv L_0x29a0e00, 3, 1, 4; +L_0x29a20e0 .part L_0x299ed80, 3, 1; +L_0x29a2210 .part L_0x299ee20, 3, 1; +L_0x29a23b0 .part L_0x299ed80, 3, 1; +L_0x29a2450 .part L_0x299ee20, 3, 1; +L_0x29a2550 .part L_0x299ed80, 3, 1; +L_0x29a25f0 .part L_0x299ee20, 3, 1; +L_0x29a27d0 .part L_0x299ee20, 3, 1; +L_0x29a28c0 .part RS_0x7ff6df0a0e38, 3, 1; +L_0x29a2a50 .part L_0x299ee20, 3, 1; +L_0x29a2c50 .part RS_0x7ff6df0a0e38, 3, 1; +S_0x295fc00 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x295daa0; + .timescale 0 0; +L_0x299efb0 .functor AND 1, L_0x299fab0, L_0x299fb50, C4<1>, C4<1>; +L_0x299f010 .functor AND 1, L_0x299fab0, L_0x299d3b0, C4<1>, C4<1>; +L_0x299f0c0 .functor AND 1, L_0x299fb50, L_0x299d3b0, C4<1>, C4<1>; +L_0x296eb40 .functor OR 1, L_0x299efb0, L_0x299f010, C4<0>, C4<0>; +L_0x299f320 .functor OR 1, L_0x296eb40, L_0x299f0c0, C4<0>, C4<0>; +L_0x299f420 .functor OR 1, L_0x299fab0, L_0x299fb50, C4<0>, C4<0>; +L_0x299f480 .functor OR 1, L_0x299f420, L_0x299d3b0, C4<0>, C4<0>; +L_0x299f530 .functor NOT 1, L_0x299f320, C4<0>, C4<0>, C4<0>; +L_0x299f620 .functor AND 1, L_0x299f530, L_0x299f480, C4<1>, C4<1>; +L_0x299f720 .functor AND 1, L_0x299fab0, L_0x299fb50, C4<1>, C4<1>; +L_0x299f900 .functor AND 1, L_0x299f720, L_0x299d3b0, C4<1>, C4<1>; +L_0x299f960 .functor OR 1, L_0x299f620, L_0x299f900, C4<0>, C4<0>; +v0x295fcf0_0 .net "a", 0 0, L_0x299fab0; 1 drivers +v0x295fdb0_0 .net "ab", 0 0, L_0x299efb0; 1 drivers +v0x295fe50_0 .net "acarryin", 0 0, L_0x299f010; 1 drivers +v0x295fef0_0 .net "andall", 0 0, L_0x299f900; 1 drivers +v0x295ff70_0 .net "andsingleintermediate", 0 0, L_0x299f720; 1 drivers +v0x2960010_0 .net "andsumintermediate", 0 0, L_0x299f620; 1 drivers +v0x29600b0_0 .net "b", 0 0, L_0x299fb50; 1 drivers +v0x2960150_0 .net "bcarryin", 0 0, L_0x299f0c0; 1 drivers +v0x29601f0_0 .alias "carryin", 0 0, v0x296eac0_0; +v0x2960290_0 .alias "carryout", 0 0, v0x29610f0_0; +v0x2960310_0 .net "invcarryout", 0 0, L_0x299f530; 1 drivers +v0x2960390_0 .net "orall", 0 0, L_0x299f480; 1 drivers +v0x2960430_0 .net "orpairintermediate", 0 0, L_0x296eb40; 1 drivers +v0x29604d0_0 .net "orsingleintermediate", 0 0, L_0x299f420; 1 drivers +v0x29605f0_0 .net "sum", 0 0, L_0x299f960; 1 drivers +S_0x295f170 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x295daa0; + .timescale 0 0; +L_0x299f8a0 .functor AND 1, L_0x29a0750, L_0x29a0840, C4<1>, C4<1>; +L_0x299fbf0 .functor AND 1, L_0x29a0750, L_0x299f320, C4<1>, C4<1>; +L_0x299fca0 .functor AND 1, L_0x29a0840, L_0x299f320, C4<1>, C4<1>; +L_0x299fd50 .functor OR 1, L_0x299f8a0, L_0x299fbf0, C4<0>, C4<0>; +L_0x299fe50 .functor OR 1, L_0x299fd50, L_0x299fca0, C4<0>, C4<0>; +L_0x299ff50 .functor OR 1, L_0x29a0750, L_0x29a0840, C4<0>, C4<0>; +L_0x299ffb0 .functor OR 1, L_0x299ff50, L_0x299f320, C4<0>, C4<0>; +L_0x29a0060 .functor NOT 1, L_0x299fe50, C4<0>, C4<0>, C4<0>; +L_0x29a0150 .functor AND 1, L_0x29a0060, L_0x299ffb0, C4<1>, C4<1>; +L_0x29a0250 .functor AND 1, L_0x29a0750, L_0x29a0840, C4<1>, C4<1>; +L_0x29a0430 .functor AND 1, L_0x29a0250, L_0x299f320, C4<1>, C4<1>; +L_0x299f590 .functor OR 1, L_0x29a0150, L_0x29a0430, C4<0>, C4<0>; +v0x295f260_0 .net "a", 0 0, L_0x29a0750; 1 drivers +v0x295f320_0 .net "ab", 0 0, L_0x299f8a0; 1 drivers +v0x295f3c0_0 .net "acarryin", 0 0, L_0x299fbf0; 1 drivers +v0x295f460_0 .net "andall", 0 0, L_0x29a0430; 1 drivers +v0x295f4e0_0 .net "andsingleintermediate", 0 0, L_0x29a0250; 1 drivers +v0x295f580_0 .net "andsumintermediate", 0 0, L_0x29a0150; 1 drivers +v0x295f620_0 .net "b", 0 0, L_0x29a0840; 1 drivers +v0x295f6c0_0 .net "bcarryin", 0 0, L_0x299fca0; 1 drivers +v0x295f760_0 .alias "carryin", 0 0, v0x29610f0_0; +v0x295f800_0 .alias "carryout", 0 0, v0x29612c0_0; +v0x295f880_0 .net "invcarryout", 0 0, L_0x29a0060; 1 drivers +v0x295f900_0 .net "orall", 0 0, L_0x299ffb0; 1 drivers +v0x295f9a0_0 .net "orpairintermediate", 0 0, L_0x299fd50; 1 drivers +v0x295fa40_0 .net "orsingleintermediate", 0 0, L_0x299ff50; 1 drivers +v0x295fb60_0 .net "sum", 0 0, L_0x299f590; 1 drivers +S_0x295e690 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x295daa0; + .timescale 0 0; +L_0x29a03d0 .functor AND 1, L_0x29a1440, L_0x29a1530, C4<1>, C4<1>; +L_0x29a0930 .functor AND 1, L_0x29a1440, L_0x299fe50, C4<1>, C4<1>; +L_0x29a09e0 .functor AND 1, L_0x29a1530, L_0x299fe50, C4<1>, C4<1>; +L_0x29a0a90 .functor OR 1, L_0x29a03d0, L_0x29a0930, C4<0>, C4<0>; +L_0x29a0b90 .functor OR 1, L_0x29a0a90, L_0x29a09e0, C4<0>, C4<0>; +L_0x29a0c90 .functor OR 1, L_0x29a1440, L_0x29a1530, C4<0>, C4<0>; +L_0x29a0cf0 .functor OR 1, L_0x29a0c90, L_0x299fe50, C4<0>, C4<0>; +L_0x29a0da0 .functor NOT 1, L_0x29a0b90, C4<0>, C4<0>, C4<0>; +L_0x29a0e90 .functor AND 1, L_0x29a0da0, L_0x29a0cf0, C4<1>, C4<1>; +L_0x29a0f90 .functor AND 1, L_0x29a1440, L_0x29a1530, C4<1>, C4<1>; +L_0x29a1170 .functor AND 1, L_0x29a0f90, L_0x299fe50, C4<1>, C4<1>; +L_0x29a00c0 .functor OR 1, L_0x29a0e90, L_0x29a1170, C4<0>, C4<0>; +v0x295e780_0 .net "a", 0 0, L_0x29a1440; 1 drivers +v0x295e840_0 .net "ab", 0 0, L_0x29a03d0; 1 drivers +v0x295e8e0_0 .net "acarryin", 0 0, L_0x29a0930; 1 drivers +v0x295e980_0 .net "andall", 0 0, L_0x29a1170; 1 drivers +v0x295ea00_0 .net "andsingleintermediate", 0 0, L_0x29a0f90; 1 drivers +v0x295eaa0_0 .net "andsumintermediate", 0 0, L_0x29a0e90; 1 drivers +v0x295eb40_0 .net "b", 0 0, L_0x29a1530; 1 drivers +v0x295ebe0_0 .net "bcarryin", 0 0, L_0x29a09e0; 1 drivers +v0x295ecd0_0 .alias "carryin", 0 0, v0x29612c0_0; +v0x295ed70_0 .alias "carryout", 0 0, v0x29613f0_0; +v0x295edf0_0 .net "invcarryout", 0 0, L_0x29a0da0; 1 drivers +v0x295ee70_0 .net "orall", 0 0, L_0x29a0cf0; 1 drivers +v0x295ef10_0 .net "orpairintermediate", 0 0, L_0x29a0a90; 1 drivers +v0x295efb0_0 .net "orsingleintermediate", 0 0, L_0x29a0c90; 1 drivers +v0x295f0d0_0 .net "sum", 0 0, L_0x29a00c0; 1 drivers +S_0x295db90 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x295daa0; + .timescale 0 0; +L_0x29a1110 .functor AND 1, L_0x29a20e0, L_0x29a2210, C4<1>, C4<1>; +L_0x29a15d0 .functor AND 1, L_0x29a20e0, L_0x29a0b90, C4<1>, C4<1>; +L_0x29a1680 .functor AND 1, L_0x29a2210, L_0x29a0b90, C4<1>, C4<1>; +L_0x29a1730 .functor OR 1, L_0x29a1110, L_0x29a15d0, C4<0>, C4<0>; +L_0x29a1830 .functor OR 1, L_0x29a1730, L_0x29a1680, C4<0>, C4<0>; +L_0x29a1930 .functor OR 1, L_0x29a20e0, L_0x29a2210, C4<0>, C4<0>; +L_0x29a1990 .functor OR 1, L_0x29a1930, L_0x29a0b90, C4<0>, C4<0>; +L_0x29a1a40 .functor NOT 1, L_0x29a1830, C4<0>, C4<0>, C4<0>; +L_0x29a1af0 .functor AND 1, L_0x29a1a40, L_0x29a1990, C4<1>, C4<1>; +L_0x29a1bf0 .functor AND 1, L_0x29a20e0, L_0x29a2210, C4<1>, C4<1>; +L_0x29a1dd0 .functor AND 1, L_0x29a1bf0, L_0x29a0b90, C4<1>, C4<1>; +L_0x29a0e00 .functor OR 1, L_0x29a1af0, L_0x29a1dd0, C4<0>, C4<0>; +v0x295dc80_0 .net "a", 0 0, L_0x29a20e0; 1 drivers +v0x295dd40_0 .net "ab", 0 0, L_0x29a1110; 1 drivers +v0x295dde0_0 .net "acarryin", 0 0, L_0x29a15d0; 1 drivers +v0x295de80_0 .net "andall", 0 0, L_0x29a1dd0; 1 drivers +v0x295df00_0 .net "andsingleintermediate", 0 0, L_0x29a1bf0; 1 drivers +v0x295dfa0_0 .net "andsumintermediate", 0 0, L_0x29a1af0; 1 drivers +v0x295e040_0 .net "b", 0 0, L_0x29a2210; 1 drivers +v0x295e0e0_0 .net "bcarryin", 0 0, L_0x29a1680; 1 drivers +v0x295e1d0_0 .alias "carryin", 0 0, v0x29613f0_0; +v0x295e270_0 .alias "carryout", 0 0, v0x296eec0_0; +v0x295e2f0_0 .net "invcarryout", 0 0, L_0x29a1a40; 1 drivers +v0x295e390_0 .net "orall", 0 0, L_0x29a1990; 1 drivers +v0x295e430_0 .net "orpairintermediate", 0 0, L_0x29a1730; 1 drivers +v0x295e4d0_0 .net "orsingleintermediate", 0 0, L_0x29a1930; 1 drivers +v0x295e5f0_0 .net "sum", 0 0, L_0x29a0e00; 1 drivers +S_0x2959f90 .scope module, "adder2" "FullAdder4bit" 19 239, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29a6080 .functor AND 1, L_0x29a66c0, L_0x29a6760, C4<1>, C4<1>; +L_0x29a6800 .functor NOR 1, L_0x29a6860, L_0x29a6900, C4<0>, C4<0>; +L_0x29a6a80 .functor AND 1, L_0x29a6ae0, L_0x29a6bd0, C4<1>, C4<1>; +L_0x29a69f0 .functor NOR 1, L_0x29a6d60, L_0x29a6f60, C4<0>, C4<0>; +L_0x29a6cc0 .functor OR 1, L_0x29a6080, L_0x29a6800, C4<0>, C4<0>; +L_0x29a7150 .functor NOR 1, L_0x29a6a80, L_0x29a69f0, C4<0>, C4<0>; +L_0x29a7250 .functor AND 1, L_0x29a6cc0, L_0x29a7150, C4<1>, C4<1>; +v0x295cb80_0 .net *"_s25", 0 0, L_0x29a66c0; 1 drivers +v0x295cc40_0 .net *"_s27", 0 0, L_0x29a6760; 1 drivers +v0x295cce0_0 .net *"_s29", 0 0, L_0x29a6860; 1 drivers +v0x295cd80_0 .net *"_s31", 0 0, L_0x29a6900; 1 drivers +v0x295ce00_0 .net *"_s33", 0 0, L_0x29a6ae0; 1 drivers +v0x295cea0_0 .net *"_s35", 0 0, L_0x29a6bd0; 1 drivers +v0x295cf40_0 .net *"_s37", 0 0, L_0x29a6d60; 1 drivers +v0x295cfe0_0 .net *"_s39", 0 0, L_0x29a6f60; 1 drivers +v0x295d080_0 .net "a", 3 0, L_0x29a74d0; 1 drivers +v0x295d120_0 .net "aandb", 0 0, L_0x29a6080; 1 drivers +v0x295d1c0_0 .net "abandnoror", 0 0, L_0x29a6cc0; 1 drivers +v0x295d260_0 .net "anorb", 0 0, L_0x29a6800; 1 drivers +v0x295d300_0 .net "b", 3 0, L_0x29a3130; 1 drivers +v0x295d3a0_0 .net "bandsum", 0 0, L_0x29a6a80; 1 drivers +v0x295d4c0_0 .net "bnorsum", 0 0, L_0x29a69f0; 1 drivers +v0x295d560_0 .net "bsumandnornor", 0 0, L_0x29a7150; 1 drivers +v0x295d420_0 .alias "carryin", 0 0, v0x296eec0_0; +v0x295d690_0 .alias "carryout", 0 0, v0x296ecf0_0; +v0x295d5e0_0 .net "carryout1", 0 0, L_0x29a3630; 1 drivers +v0x295d7b0_0 .net "carryout2", 0 0, L_0x29a4160; 1 drivers +v0x295d8e0_0 .net "carryout3", 0 0, L_0x29a4ea0; 1 drivers +v0x295d960_0 .alias "overflow", 0 0, v0x296bff0_0; +v0x295d830_0 .net8 "sum", 3 0, RS_0x7ff6df0a0058; 4 drivers +L_0x29a3cd0 .part/pv L_0x29a3c70, 0, 1, 4; +L_0x29a3dc0 .part L_0x29a74d0, 0, 1; +L_0x29a3e60 .part L_0x29a3130, 0, 1; +L_0x29a4920 .part/pv L_0x29a38a0, 1, 1, 4; +L_0x29a4a60 .part L_0x29a74d0, 1, 1; +L_0x29a4b50 .part L_0x29a3130, 1, 1; +L_0x29a5660 .part/pv L_0x29a43d0, 2, 1, 4; +L_0x29a5750 .part L_0x29a74d0, 2, 1; +L_0x29a5840 .part L_0x29a3130, 2, 1; +L_0x29a62c0 .part/pv L_0x29a5110, 3, 1, 4; +L_0x29a63f0 .part L_0x29a74d0, 3, 1; +L_0x29a6520 .part L_0x29a3130, 3, 1; +L_0x29a66c0 .part L_0x29a74d0, 3, 1; +L_0x29a6760 .part L_0x29a3130, 3, 1; +L_0x29a6860 .part L_0x29a74d0, 3, 1; +L_0x29a6900 .part L_0x29a3130, 3, 1; +L_0x29a6ae0 .part L_0x29a3130, 3, 1; +L_0x29a6bd0 .part RS_0x7ff6df0a0058, 3, 1; +L_0x29a6d60 .part L_0x29a3130, 3, 1; +L_0x29a6f60 .part RS_0x7ff6df0a0058, 3, 1; +S_0x295c0f0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2959f90; + .timescale 0 0; +L_0x299eec0 .functor AND 1, L_0x29a3dc0, L_0x29a3e60, C4<1>, C4<1>; +L_0x299ef20 .functor AND 1, L_0x29a3dc0, L_0x29a1830, C4<1>, C4<1>; +L_0x29a33d0 .functor AND 1, L_0x29a3e60, L_0x29a1830, C4<1>, C4<1>; +L_0x296ec60 .functor OR 1, L_0x299eec0, L_0x299ef20, C4<0>, C4<0>; +L_0x29a3630 .functor OR 1, L_0x296ec60, L_0x29a33d0, C4<0>, C4<0>; +L_0x29a3730 .functor OR 1, L_0x29a3dc0, L_0x29a3e60, C4<0>, C4<0>; +L_0x29a3790 .functor OR 1, L_0x29a3730, L_0x29a1830, C4<0>, C4<0>; +L_0x29a3840 .functor NOT 1, L_0x29a3630, C4<0>, C4<0>, C4<0>; +L_0x29a3930 .functor AND 1, L_0x29a3840, L_0x29a3790, C4<1>, C4<1>; +L_0x29a3a30 .functor AND 1, L_0x29a3dc0, L_0x29a3e60, C4<1>, C4<1>; +L_0x29a3c10 .functor AND 1, L_0x29a3a30, L_0x29a1830, C4<1>, C4<1>; +L_0x29a3c70 .functor OR 1, L_0x29a3930, L_0x29a3c10, C4<0>, C4<0>; +v0x295c1e0_0 .net "a", 0 0, L_0x29a3dc0; 1 drivers +v0x295c2a0_0 .net "ab", 0 0, L_0x299eec0; 1 drivers +v0x295c340_0 .net "acarryin", 0 0, L_0x299ef20; 1 drivers +v0x295c3e0_0 .net "andall", 0 0, L_0x29a3c10; 1 drivers +v0x295c460_0 .net "andsingleintermediate", 0 0, L_0x29a3a30; 1 drivers +v0x295c500_0 .net "andsumintermediate", 0 0, L_0x29a3930; 1 drivers +v0x295c5a0_0 .net "b", 0 0, L_0x29a3e60; 1 drivers +v0x295c640_0 .net "bcarryin", 0 0, L_0x29a33d0; 1 drivers +v0x295c6e0_0 .alias "carryin", 0 0, v0x296eec0_0; +v0x295c780_0 .alias "carryout", 0 0, v0x295d5e0_0; +v0x295c800_0 .net "invcarryout", 0 0, L_0x29a3840; 1 drivers +v0x295c880_0 .net "orall", 0 0, L_0x29a3790; 1 drivers +v0x295c920_0 .net "orpairintermediate", 0 0, L_0x296ec60; 1 drivers +v0x295c9c0_0 .net "orsingleintermediate", 0 0, L_0x29a3730; 1 drivers +v0x295cae0_0 .net "sum", 0 0, L_0x29a3c70; 1 drivers +S_0x295b660 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2959f90; + .timescale 0 0; +L_0x29a3bb0 .functor AND 1, L_0x29a4a60, L_0x29a4b50, C4<1>, C4<1>; +L_0x29a3f00 .functor AND 1, L_0x29a4a60, L_0x29a3630, C4<1>, C4<1>; +L_0x29a3fb0 .functor AND 1, L_0x29a4b50, L_0x29a3630, C4<1>, C4<1>; +L_0x29a4060 .functor OR 1, L_0x29a3bb0, L_0x29a3f00, C4<0>, C4<0>; +L_0x29a4160 .functor OR 1, L_0x29a4060, L_0x29a3fb0, C4<0>, C4<0>; +L_0x29a4260 .functor OR 1, L_0x29a4a60, L_0x29a4b50, C4<0>, C4<0>; +L_0x29a42c0 .functor OR 1, L_0x29a4260, L_0x29a3630, C4<0>, C4<0>; +L_0x29a4370 .functor NOT 1, L_0x29a4160, C4<0>, C4<0>, C4<0>; +L_0x29a4460 .functor AND 1, L_0x29a4370, L_0x29a42c0, C4<1>, C4<1>; +L_0x29a4560 .functor AND 1, L_0x29a4a60, L_0x29a4b50, C4<1>, C4<1>; +L_0x29a4740 .functor AND 1, L_0x29a4560, L_0x29a3630, C4<1>, C4<1>; +L_0x29a38a0 .functor OR 1, L_0x29a4460, L_0x29a4740, C4<0>, C4<0>; +v0x295b750_0 .net "a", 0 0, L_0x29a4a60; 1 drivers +v0x295b810_0 .net "ab", 0 0, L_0x29a3bb0; 1 drivers +v0x295b8b0_0 .net "acarryin", 0 0, L_0x29a3f00; 1 drivers +v0x295b950_0 .net "andall", 0 0, L_0x29a4740; 1 drivers +v0x295b9d0_0 .net "andsingleintermediate", 0 0, L_0x29a4560; 1 drivers +v0x295ba70_0 .net "andsumintermediate", 0 0, L_0x29a4460; 1 drivers +v0x295bb10_0 .net "b", 0 0, L_0x29a4b50; 1 drivers +v0x295bbb0_0 .net "bcarryin", 0 0, L_0x29a3fb0; 1 drivers +v0x295bc50_0 .alias "carryin", 0 0, v0x295d5e0_0; +v0x295bcf0_0 .alias "carryout", 0 0, v0x295d7b0_0; +v0x295bd70_0 .net "invcarryout", 0 0, L_0x29a4370; 1 drivers +v0x295bdf0_0 .net "orall", 0 0, L_0x29a42c0; 1 drivers +v0x295be90_0 .net "orpairintermediate", 0 0, L_0x29a4060; 1 drivers +v0x295bf30_0 .net "orsingleintermediate", 0 0, L_0x29a4260; 1 drivers +v0x295c050_0 .net "sum", 0 0, L_0x29a38a0; 1 drivers +S_0x295ab80 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2959f90; + .timescale 0 0; +L_0x29a46e0 .functor AND 1, L_0x29a5750, L_0x29a5840, C4<1>, C4<1>; +L_0x29a4c40 .functor AND 1, L_0x29a5750, L_0x29a4160, C4<1>, C4<1>; +L_0x29a4cf0 .functor AND 1, L_0x29a5840, L_0x29a4160, C4<1>, C4<1>; +L_0x29a4da0 .functor OR 1, L_0x29a46e0, L_0x29a4c40, C4<0>, C4<0>; +L_0x29a4ea0 .functor OR 1, L_0x29a4da0, L_0x29a4cf0, C4<0>, C4<0>; +L_0x29a4fa0 .functor OR 1, L_0x29a5750, L_0x29a5840, C4<0>, C4<0>; +L_0x29a5000 .functor OR 1, L_0x29a4fa0, L_0x29a4160, C4<0>, C4<0>; +L_0x29a50b0 .functor NOT 1, L_0x29a4ea0, C4<0>, C4<0>, C4<0>; +L_0x29a51a0 .functor AND 1, L_0x29a50b0, L_0x29a5000, C4<1>, C4<1>; +L_0x29a52a0 .functor AND 1, L_0x29a5750, L_0x29a5840, C4<1>, C4<1>; +L_0x29a5480 .functor AND 1, L_0x29a52a0, L_0x29a4160, C4<1>, C4<1>; +L_0x29a43d0 .functor OR 1, L_0x29a51a0, L_0x29a5480, C4<0>, C4<0>; +v0x295ac70_0 .net "a", 0 0, L_0x29a5750; 1 drivers +v0x295ad30_0 .net "ab", 0 0, L_0x29a46e0; 1 drivers +v0x295add0_0 .net "acarryin", 0 0, L_0x29a4c40; 1 drivers +v0x295ae70_0 .net "andall", 0 0, L_0x29a5480; 1 drivers +v0x295aef0_0 .net "andsingleintermediate", 0 0, L_0x29a52a0; 1 drivers +v0x295af90_0 .net "andsumintermediate", 0 0, L_0x29a51a0; 1 drivers +v0x295b030_0 .net "b", 0 0, L_0x29a5840; 1 drivers +v0x295b0d0_0 .net "bcarryin", 0 0, L_0x29a4cf0; 1 drivers +v0x295b1c0_0 .alias "carryin", 0 0, v0x295d7b0_0; +v0x295b260_0 .alias "carryout", 0 0, v0x295d8e0_0; +v0x295b2e0_0 .net "invcarryout", 0 0, L_0x29a50b0; 1 drivers +v0x295b360_0 .net "orall", 0 0, L_0x29a5000; 1 drivers +v0x295b400_0 .net "orpairintermediate", 0 0, L_0x29a4da0; 1 drivers +v0x295b4a0_0 .net "orsingleintermediate", 0 0, L_0x29a4fa0; 1 drivers +v0x295b5c0_0 .net "sum", 0 0, L_0x29a43d0; 1 drivers +S_0x295a080 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2959f90; + .timescale 0 0; +L_0x29a5420 .functor AND 1, L_0x29a63f0, L_0x29a6520, C4<1>, C4<1>; +L_0x29a58e0 .functor AND 1, L_0x29a63f0, L_0x29a4ea0, C4<1>, C4<1>; +L_0x29a5990 .functor AND 1, L_0x29a6520, L_0x29a4ea0, C4<1>, C4<1>; +L_0x29a5a40 .functor OR 1, L_0x29a5420, L_0x29a58e0, C4<0>, C4<0>; +L_0x29a5b40 .functor OR 1, L_0x29a5a40, L_0x29a5990, C4<0>, C4<0>; +L_0x29a5c40 .functor OR 1, L_0x29a63f0, L_0x29a6520, C4<0>, C4<0>; +L_0x29a5ca0 .functor OR 1, L_0x29a5c40, L_0x29a4ea0, C4<0>, C4<0>; +L_0x29a5d50 .functor NOT 1, L_0x29a5b40, C4<0>, C4<0>, C4<0>; +L_0x29a5e00 .functor AND 1, L_0x29a5d50, L_0x29a5ca0, C4<1>, C4<1>; +L_0x29a5f00 .functor AND 1, L_0x29a63f0, L_0x29a6520, C4<1>, C4<1>; +L_0x29a60e0 .functor AND 1, L_0x29a5f00, L_0x29a4ea0, C4<1>, C4<1>; +L_0x29a5110 .functor OR 1, L_0x29a5e00, L_0x29a60e0, C4<0>, C4<0>; +v0x295a170_0 .net "a", 0 0, L_0x29a63f0; 1 drivers +v0x295a230_0 .net "ab", 0 0, L_0x29a5420; 1 drivers +v0x295a2d0_0 .net "acarryin", 0 0, L_0x29a58e0; 1 drivers +v0x295a370_0 .net "andall", 0 0, L_0x29a60e0; 1 drivers +v0x295a3f0_0 .net "andsingleintermediate", 0 0, L_0x29a5f00; 1 drivers +v0x295a490_0 .net "andsumintermediate", 0 0, L_0x29a5e00; 1 drivers +v0x295a530_0 .net "b", 0 0, L_0x29a6520; 1 drivers +v0x295a5d0_0 .net "bcarryin", 0 0, L_0x29a5990; 1 drivers +v0x295a6c0_0 .alias "carryin", 0 0, v0x295d8e0_0; +v0x295a760_0 .alias "carryout", 0 0, v0x296ecf0_0; +v0x295a7e0_0 .net "invcarryout", 0 0, L_0x29a5d50; 1 drivers +v0x295a880_0 .net "orall", 0 0, L_0x29a5ca0; 1 drivers +v0x295a920_0 .net "orpairintermediate", 0 0, L_0x29a5a40; 1 drivers +v0x295a9c0_0 .net "orsingleintermediate", 0 0, L_0x29a5c40; 1 drivers +v0x295aae0_0 .net "sum", 0 0, L_0x29a5110; 1 drivers +S_0x2956480 .scope module, "adder3" "FullAdder4bit" 19 240, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29aa3d0 .functor AND 1, L_0x29aaa10, L_0x29aaab0, C4<1>, C4<1>; +L_0x29aab50 .functor NOR 1, L_0x29aabb0, L_0x29aac50, C4<0>, C4<0>; +L_0x29aadd0 .functor AND 1, L_0x29aae30, L_0x29aaf20, C4<1>, C4<1>; +L_0x29aad40 .functor NOR 1, L_0x29ab0b0, L_0x29ab2b0, C4<0>, C4<0>; +L_0x29ab010 .functor OR 1, L_0x29aa3d0, L_0x29aab50, C4<0>, C4<0>; +L_0x29ab4a0 .functor NOR 1, L_0x29aadd0, L_0x29aad40, C4<0>, C4<0>; +L_0x29ab5a0 .functor AND 1, L_0x29ab010, L_0x29ab4a0, C4<1>, C4<1>; +v0x2959070_0 .net *"_s25", 0 0, L_0x29aaa10; 1 drivers +v0x2959130_0 .net *"_s27", 0 0, L_0x29aaab0; 1 drivers +v0x29591d0_0 .net *"_s29", 0 0, L_0x29aabb0; 1 drivers +v0x2959270_0 .net *"_s31", 0 0, L_0x29aac50; 1 drivers +v0x29592f0_0 .net *"_s33", 0 0, L_0x29aae30; 1 drivers +v0x2959390_0 .net *"_s35", 0 0, L_0x29aaf20; 1 drivers +v0x2959430_0 .net *"_s37", 0 0, L_0x29ab0b0; 1 drivers +v0x29594d0_0 .net *"_s39", 0 0, L_0x29ab2b0; 1 drivers +v0x2959570_0 .net "a", 3 0, L_0x29a7570; 1 drivers +v0x2959610_0 .net "aandb", 0 0, L_0x29aa3d0; 1 drivers +v0x29596b0_0 .net "abandnoror", 0 0, L_0x29ab010; 1 drivers +v0x2959750_0 .net "anorb", 0 0, L_0x29aab50; 1 drivers +v0x29597f0_0 .net "b", 3 0, L_0x2970770; 1 drivers +v0x2959890_0 .net "bandsum", 0 0, L_0x29aadd0; 1 drivers +v0x29599b0_0 .net "bnorsum", 0 0, L_0x29aad40; 1 drivers +v0x2959a50_0 .net "bsumandnornor", 0 0, L_0x29ab4a0; 1 drivers +v0x2959910_0 .alias "carryin", 0 0, v0x296ecf0_0; +v0x2959b80_0 .alias "carryout", 0 0, v0x296ee00_0; +v0x2959ad0_0 .net "carryout1", 0 0, L_0x29a7980; 1 drivers +v0x2959ca0_0 .net "carryout2", 0 0, L_0x29a84b0; 1 drivers +v0x2959dd0_0 .net "carryout3", 0 0, L_0x29a91f0; 1 drivers +v0x2959e50_0 .alias "overflow", 0 0, v0x296c070_0; +v0x2959d20_0 .net8 "sum", 3 0, RS_0x7ff6df09f278; 4 drivers +L_0x29a8020 .part/pv L_0x29a7fc0, 0, 1, 4; +L_0x29a8110 .part L_0x29a7570, 0, 1; +L_0x29a81b0 .part L_0x2970770, 0, 1; +L_0x29a8c70 .part/pv L_0x29a7bf0, 1, 1, 4; +L_0x29a8db0 .part L_0x29a7570, 1, 1; +L_0x29a8ea0 .part L_0x2970770, 1, 1; +L_0x29a99b0 .part/pv L_0x29a8720, 2, 1, 4; +L_0x29a9aa0 .part L_0x29a7570, 2, 1; +L_0x29a9b90 .part L_0x2970770, 2, 1; +L_0x29aa610 .part/pv L_0x29a9460, 3, 1, 4; +L_0x29aa740 .part L_0x29a7570, 3, 1; +L_0x29aa870 .part L_0x2970770, 3, 1; +L_0x29aaa10 .part L_0x29a7570, 3, 1; +L_0x29aaab0 .part L_0x2970770, 3, 1; +L_0x29aabb0 .part L_0x29a7570, 3, 1; +L_0x29aac50 .part L_0x2970770, 3, 1; +L_0x29aae30 .part L_0x2970770, 3, 1; +L_0x29aaf20 .part RS_0x7ff6df09f278, 3, 1; +L_0x29ab0b0 .part L_0x2970770, 3, 1; +L_0x29ab2b0 .part RS_0x7ff6df09f278, 3, 1; +S_0x29585e0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2956480; + .timescale 0 0; +L_0x29a31d0 .functor AND 1, L_0x29a8110, L_0x29a81b0, C4<1>, C4<1>; +L_0x29a3230 .functor AND 1, L_0x29a8110, L_0x29a5b40, C4<1>, C4<1>; +L_0x29a3290 .functor AND 1, L_0x29a81b0, L_0x29a5b40, C4<1>, C4<1>; +L_0x296ed70 .functor OR 1, L_0x29a31d0, L_0x29a3230, C4<0>, C4<0>; +L_0x29a7980 .functor OR 1, L_0x296ed70, L_0x29a3290, C4<0>, C4<0>; +L_0x29a7a80 .functor OR 1, L_0x29a8110, L_0x29a81b0, C4<0>, C4<0>; +L_0x29a7ae0 .functor OR 1, L_0x29a7a80, L_0x29a5b40, C4<0>, C4<0>; +L_0x29a7b90 .functor NOT 1, L_0x29a7980, C4<0>, C4<0>, C4<0>; +L_0x29a7c80 .functor AND 1, L_0x29a7b90, L_0x29a7ae0, C4<1>, C4<1>; +L_0x29a7d80 .functor AND 1, L_0x29a8110, L_0x29a81b0, C4<1>, C4<1>; +L_0x29a7f60 .functor AND 1, L_0x29a7d80, L_0x29a5b40, C4<1>, C4<1>; +L_0x29a7fc0 .functor OR 1, L_0x29a7c80, L_0x29a7f60, C4<0>, C4<0>; +v0x29586d0_0 .net "a", 0 0, L_0x29a8110; 1 drivers +v0x2958790_0 .net "ab", 0 0, L_0x29a31d0; 1 drivers +v0x2958830_0 .net "acarryin", 0 0, L_0x29a3230; 1 drivers +v0x29588d0_0 .net "andall", 0 0, L_0x29a7f60; 1 drivers +v0x2958950_0 .net "andsingleintermediate", 0 0, L_0x29a7d80; 1 drivers +v0x29589f0_0 .net "andsumintermediate", 0 0, L_0x29a7c80; 1 drivers +v0x2958a90_0 .net "b", 0 0, L_0x29a81b0; 1 drivers +v0x2958b30_0 .net "bcarryin", 0 0, L_0x29a3290; 1 drivers +v0x2958bd0_0 .alias "carryin", 0 0, v0x296ecf0_0; +v0x2958c70_0 .alias "carryout", 0 0, v0x2959ad0_0; +v0x2958cf0_0 .net "invcarryout", 0 0, L_0x29a7b90; 1 drivers +v0x2958d70_0 .net "orall", 0 0, L_0x29a7ae0; 1 drivers +v0x2958e10_0 .net "orpairintermediate", 0 0, L_0x296ed70; 1 drivers +v0x2958eb0_0 .net "orsingleintermediate", 0 0, L_0x29a7a80; 1 drivers +v0x2958fd0_0 .net "sum", 0 0, L_0x29a7fc0; 1 drivers +S_0x2957b50 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2956480; + .timescale 0 0; +L_0x29a7f00 .functor AND 1, L_0x29a8db0, L_0x29a8ea0, C4<1>, C4<1>; +L_0x29a8250 .functor AND 1, L_0x29a8db0, L_0x29a7980, C4<1>, C4<1>; +L_0x29a8300 .functor AND 1, L_0x29a8ea0, L_0x29a7980, C4<1>, C4<1>; +L_0x29a83b0 .functor OR 1, L_0x29a7f00, L_0x29a8250, C4<0>, C4<0>; +L_0x29a84b0 .functor OR 1, L_0x29a83b0, L_0x29a8300, C4<0>, C4<0>; +L_0x29a85b0 .functor OR 1, L_0x29a8db0, L_0x29a8ea0, C4<0>, C4<0>; +L_0x29a8610 .functor OR 1, L_0x29a85b0, L_0x29a7980, C4<0>, C4<0>; +L_0x29a86c0 .functor NOT 1, L_0x29a84b0, C4<0>, C4<0>, C4<0>; +L_0x29a87b0 .functor AND 1, L_0x29a86c0, L_0x29a8610, C4<1>, C4<1>; +L_0x29a88b0 .functor AND 1, L_0x29a8db0, L_0x29a8ea0, C4<1>, C4<1>; +L_0x29a8a90 .functor AND 1, L_0x29a88b0, L_0x29a7980, C4<1>, C4<1>; +L_0x29a7bf0 .functor OR 1, L_0x29a87b0, L_0x29a8a90, C4<0>, C4<0>; +v0x2957c40_0 .net "a", 0 0, L_0x29a8db0; 1 drivers +v0x2957d00_0 .net "ab", 0 0, L_0x29a7f00; 1 drivers +v0x2957da0_0 .net "acarryin", 0 0, L_0x29a8250; 1 drivers +v0x2957e40_0 .net "andall", 0 0, L_0x29a8a90; 1 drivers +v0x2957ec0_0 .net "andsingleintermediate", 0 0, L_0x29a88b0; 1 drivers +v0x2957f60_0 .net "andsumintermediate", 0 0, L_0x29a87b0; 1 drivers +v0x2958000_0 .net "b", 0 0, L_0x29a8ea0; 1 drivers +v0x29580a0_0 .net "bcarryin", 0 0, L_0x29a8300; 1 drivers +v0x2958140_0 .alias "carryin", 0 0, v0x2959ad0_0; +v0x29581e0_0 .alias "carryout", 0 0, v0x2959ca0_0; +v0x2958260_0 .net "invcarryout", 0 0, L_0x29a86c0; 1 drivers +v0x29582e0_0 .net "orall", 0 0, L_0x29a8610; 1 drivers +v0x2958380_0 .net "orpairintermediate", 0 0, L_0x29a83b0; 1 drivers +v0x2958420_0 .net "orsingleintermediate", 0 0, L_0x29a85b0; 1 drivers +v0x2958540_0 .net "sum", 0 0, L_0x29a7bf0; 1 drivers +S_0x2957070 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2956480; + .timescale 0 0; +L_0x29a8a30 .functor AND 1, L_0x29a9aa0, L_0x29a9b90, C4<1>, C4<1>; +L_0x29a8f90 .functor AND 1, L_0x29a9aa0, L_0x29a84b0, C4<1>, C4<1>; +L_0x29a9040 .functor AND 1, L_0x29a9b90, L_0x29a84b0, C4<1>, C4<1>; +L_0x29a90f0 .functor OR 1, L_0x29a8a30, L_0x29a8f90, C4<0>, C4<0>; +L_0x29a91f0 .functor OR 1, L_0x29a90f0, L_0x29a9040, C4<0>, C4<0>; +L_0x29a92f0 .functor OR 1, L_0x29a9aa0, L_0x29a9b90, C4<0>, C4<0>; +L_0x29a9350 .functor OR 1, L_0x29a92f0, L_0x29a84b0, C4<0>, C4<0>; +L_0x29a9400 .functor NOT 1, L_0x29a91f0, C4<0>, C4<0>, C4<0>; +L_0x29a94f0 .functor AND 1, L_0x29a9400, L_0x29a9350, C4<1>, C4<1>; +L_0x29a95f0 .functor AND 1, L_0x29a9aa0, L_0x29a9b90, C4<1>, C4<1>; +L_0x29a97d0 .functor AND 1, L_0x29a95f0, L_0x29a84b0, C4<1>, C4<1>; +L_0x29a8720 .functor OR 1, L_0x29a94f0, L_0x29a97d0, C4<0>, C4<0>; +v0x2957160_0 .net "a", 0 0, L_0x29a9aa0; 1 drivers +v0x2957220_0 .net "ab", 0 0, L_0x29a8a30; 1 drivers +v0x29572c0_0 .net "acarryin", 0 0, L_0x29a8f90; 1 drivers +v0x2957360_0 .net "andall", 0 0, L_0x29a97d0; 1 drivers +v0x29573e0_0 .net "andsingleintermediate", 0 0, L_0x29a95f0; 1 drivers +v0x2957480_0 .net "andsumintermediate", 0 0, L_0x29a94f0; 1 drivers +v0x2957520_0 .net "b", 0 0, L_0x29a9b90; 1 drivers +v0x29575c0_0 .net "bcarryin", 0 0, L_0x29a9040; 1 drivers +v0x29576b0_0 .alias "carryin", 0 0, v0x2959ca0_0; +v0x2957750_0 .alias "carryout", 0 0, v0x2959dd0_0; +v0x29577d0_0 .net "invcarryout", 0 0, L_0x29a9400; 1 drivers +v0x2957850_0 .net "orall", 0 0, L_0x29a9350; 1 drivers +v0x29578f0_0 .net "orpairintermediate", 0 0, L_0x29a90f0; 1 drivers +v0x2957990_0 .net "orsingleintermediate", 0 0, L_0x29a92f0; 1 drivers +v0x2957ab0_0 .net "sum", 0 0, L_0x29a8720; 1 drivers +S_0x2956570 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2956480; + .timescale 0 0; +L_0x29a9770 .functor AND 1, L_0x29aa740, L_0x29aa870, C4<1>, C4<1>; +L_0x29a9c30 .functor AND 1, L_0x29aa740, L_0x29a91f0, C4<1>, C4<1>; +L_0x29a9ce0 .functor AND 1, L_0x29aa870, L_0x29a91f0, C4<1>, C4<1>; +L_0x29a9d90 .functor OR 1, L_0x29a9770, L_0x29a9c30, C4<0>, C4<0>; +L_0x29a9e90 .functor OR 1, L_0x29a9d90, L_0x29a9ce0, C4<0>, C4<0>; +L_0x29a9f90 .functor OR 1, L_0x29aa740, L_0x29aa870, C4<0>, C4<0>; +L_0x29a9ff0 .functor OR 1, L_0x29a9f90, L_0x29a91f0, C4<0>, C4<0>; +L_0x29aa0a0 .functor NOT 1, L_0x29a9e90, C4<0>, C4<0>, C4<0>; +L_0x29aa150 .functor AND 1, L_0x29aa0a0, L_0x29a9ff0, C4<1>, C4<1>; +L_0x29aa250 .functor AND 1, L_0x29aa740, L_0x29aa870, C4<1>, C4<1>; +L_0x29aa430 .functor AND 1, L_0x29aa250, L_0x29a91f0, C4<1>, C4<1>; +L_0x29a9460 .functor OR 1, L_0x29aa150, L_0x29aa430, C4<0>, C4<0>; +v0x2956660_0 .net "a", 0 0, L_0x29aa740; 1 drivers +v0x2956720_0 .net "ab", 0 0, L_0x29a9770; 1 drivers +v0x29567c0_0 .net "acarryin", 0 0, L_0x29a9c30; 1 drivers +v0x2956860_0 .net "andall", 0 0, L_0x29aa430; 1 drivers +v0x29568e0_0 .net "andsingleintermediate", 0 0, L_0x29aa250; 1 drivers +v0x2956980_0 .net "andsumintermediate", 0 0, L_0x29aa150; 1 drivers +v0x2956a20_0 .net "b", 0 0, L_0x29aa870; 1 drivers +v0x2956ac0_0 .net "bcarryin", 0 0, L_0x29a9ce0; 1 drivers +v0x2956bb0_0 .alias "carryin", 0 0, v0x2959dd0_0; +v0x2956c50_0 .alias "carryout", 0 0, v0x296ee00_0; +v0x2956cd0_0 .net "invcarryout", 0 0, L_0x29aa0a0; 1 drivers +v0x2956d70_0 .net "orall", 0 0, L_0x29a9ff0; 1 drivers +v0x2956e10_0 .net "orpairintermediate", 0 0, L_0x29a9d90; 1 drivers +v0x2956eb0_0 .net "orsingleintermediate", 0 0, L_0x29a9f90; 1 drivers +v0x2956fd0_0 .net "sum", 0 0, L_0x29a9460; 1 drivers +S_0x2952970 .scope module, "adder4" "FullAdder4bit" 19 241, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29ae7e0 .functor AND 1, L_0x29aee20, L_0x29aeec0, C4<1>, C4<1>; +L_0x29aef60 .functor NOR 1, L_0x29aefc0, L_0x29af060, C4<0>, C4<0>; +L_0x29af1e0 .functor AND 1, L_0x29af240, L_0x29af330, C4<1>, C4<1>; +L_0x29af150 .functor NOR 1, L_0x29af4c0, L_0x29af6c0, C4<0>, C4<0>; +L_0x29af420 .functor OR 1, L_0x29ae7e0, L_0x29aef60, C4<0>, C4<0>; +L_0x29af8b0 .functor NOR 1, L_0x29af1e0, L_0x29af150, C4<0>, C4<0>; +L_0x29af9b0 .functor AND 1, L_0x29af420, L_0x29af8b0, C4<1>, C4<1>; +v0x2955560_0 .net *"_s25", 0 0, L_0x29aee20; 1 drivers +v0x2955620_0 .net *"_s27", 0 0, L_0x29aeec0; 1 drivers +v0x29556c0_0 .net *"_s29", 0 0, L_0x29aefc0; 1 drivers +v0x2955760_0 .net *"_s31", 0 0, L_0x29af060; 1 drivers +v0x29557e0_0 .net *"_s33", 0 0, L_0x29af240; 1 drivers +v0x2955880_0 .net *"_s35", 0 0, L_0x29af330; 1 drivers +v0x2955920_0 .net *"_s37", 0 0, L_0x29af4c0; 1 drivers +v0x29559c0_0 .net *"_s39", 0 0, L_0x29af6c0; 1 drivers +v0x2955a60_0 .net "a", 3 0, L_0x29afba0; 1 drivers +v0x2955b00_0 .net "aandb", 0 0, L_0x29ae7e0; 1 drivers +v0x2955ba0_0 .net "abandnoror", 0 0, L_0x29af420; 1 drivers +v0x2955c40_0 .net "anorb", 0 0, L_0x29aef60; 1 drivers +v0x2955ce0_0 .net "b", 3 0, L_0x29abc10; 1 drivers +v0x2955d80_0 .net "bandsum", 0 0, L_0x29af1e0; 1 drivers +v0x2955ea0_0 .net "bnorsum", 0 0, L_0x29af150; 1 drivers +v0x2955f40_0 .net "bsumandnornor", 0 0, L_0x29af8b0; 1 drivers +v0x2955e00_0 .alias "carryin", 0 0, v0x296ee00_0; +v0x2956070_0 .alias "carryout", 0 0, v0x296f250_0; +v0x2955fc0_0 .net "carryout1", 0 0, L_0x29ab8f0; 1 drivers +v0x2956190_0 .net "carryout2", 0 0, L_0x29ac8c0; 1 drivers +v0x29562c0_0 .net "carryout3", 0 0, L_0x29ad600; 1 drivers +v0x2956340_0 .alias "overflow", 0 0, v0x296c0f0_0; +v0x2956210_0 .net8 "sum", 3 0, RS_0x7ff6df09e498; 4 drivers +L_0x29ac430 .part/pv L_0x29ac3d0, 0, 1, 4; +L_0x29ac520 .part L_0x29afba0, 0, 1; +L_0x29ac5c0 .part L_0x29abc10, 0, 1; +L_0x29ad080 .part/pv L_0x29ac000, 1, 1, 4; +L_0x29ad1c0 .part L_0x29afba0, 1, 1; +L_0x29ad2b0 .part L_0x29abc10, 1, 1; +L_0x29addc0 .part/pv L_0x29acb30, 2, 1, 4; +L_0x29adeb0 .part L_0x29afba0, 2, 1; +L_0x29adfa0 .part L_0x29abc10, 2, 1; +L_0x29aea20 .part/pv L_0x29ad870, 3, 1, 4; +L_0x29aeb50 .part L_0x29afba0, 3, 1; +L_0x29aec80 .part L_0x29abc10, 3, 1; +L_0x29aee20 .part L_0x29afba0, 3, 1; +L_0x29aeec0 .part L_0x29abc10, 3, 1; +L_0x29aefc0 .part L_0x29afba0, 3, 1; +L_0x29af060 .part L_0x29abc10, 3, 1; +L_0x29af240 .part L_0x29abc10, 3, 1; +L_0x29af330 .part RS_0x7ff6df09e498, 3, 1; +L_0x29af4c0 .part L_0x29abc10, 3, 1; +L_0x29af6c0 .part RS_0x7ff6df09e498, 3, 1; +S_0x2954ad0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2952970; + .timescale 0 0; +L_0x2970810 .functor AND 1, L_0x29ac520, L_0x29ac5c0, C4<1>, C4<1>; +L_0x29a7610 .functor AND 1, L_0x29ac520, L_0x29a9e90, C4<1>, C4<1>; +L_0x29a76c0 .functor AND 1, L_0x29ac5c0, L_0x29a9e90, C4<1>, C4<1>; +L_0x29a7770 .functor OR 1, L_0x2970810, L_0x29a7610, C4<0>, C4<0>; +L_0x29ab8f0 .functor OR 1, L_0x29a7770, L_0x29a76c0, C4<0>, C4<0>; +L_0x29abe90 .functor OR 1, L_0x29ac520, L_0x29ac5c0, C4<0>, C4<0>; +L_0x29abef0 .functor OR 1, L_0x29abe90, L_0x29a9e90, C4<0>, C4<0>; +L_0x29abfa0 .functor NOT 1, L_0x29ab8f0, C4<0>, C4<0>, C4<0>; +L_0x29ac090 .functor AND 1, L_0x29abfa0, L_0x29abef0, C4<1>, C4<1>; +L_0x29ac190 .functor AND 1, L_0x29ac520, L_0x29ac5c0, C4<1>, C4<1>; +L_0x29ac370 .functor AND 1, L_0x29ac190, L_0x29a9e90, C4<1>, C4<1>; +L_0x29ac3d0 .functor OR 1, L_0x29ac090, L_0x29ac370, C4<0>, C4<0>; +v0x2954bc0_0 .net "a", 0 0, L_0x29ac520; 1 drivers +v0x2954c80_0 .net "ab", 0 0, L_0x2970810; 1 drivers +v0x2954d20_0 .net "acarryin", 0 0, L_0x29a7610; 1 drivers +v0x2954dc0_0 .net "andall", 0 0, L_0x29ac370; 1 drivers +v0x2954e40_0 .net "andsingleintermediate", 0 0, L_0x29ac190; 1 drivers +v0x2954ee0_0 .net "andsumintermediate", 0 0, L_0x29ac090; 1 drivers +v0x2954f80_0 .net "b", 0 0, L_0x29ac5c0; 1 drivers +v0x2955020_0 .net "bcarryin", 0 0, L_0x29a76c0; 1 drivers +v0x29550c0_0 .alias "carryin", 0 0, v0x296ee00_0; +v0x2955160_0 .alias "carryout", 0 0, v0x2955fc0_0; +v0x29551e0_0 .net "invcarryout", 0 0, L_0x29abfa0; 1 drivers +v0x2955260_0 .net "orall", 0 0, L_0x29abef0; 1 drivers +v0x2955300_0 .net "orpairintermediate", 0 0, L_0x29a7770; 1 drivers +v0x29553a0_0 .net "orsingleintermediate", 0 0, L_0x29abe90; 1 drivers +v0x29554c0_0 .net "sum", 0 0, L_0x29ac3d0; 1 drivers +S_0x2954040 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2952970; + .timescale 0 0; +L_0x29ac310 .functor AND 1, L_0x29ad1c0, L_0x29ad2b0, C4<1>, C4<1>; +L_0x29ac660 .functor AND 1, L_0x29ad1c0, L_0x29ab8f0, C4<1>, C4<1>; +L_0x29ac710 .functor AND 1, L_0x29ad2b0, L_0x29ab8f0, C4<1>, C4<1>; +L_0x29ac7c0 .functor OR 1, L_0x29ac310, L_0x29ac660, C4<0>, C4<0>; +L_0x29ac8c0 .functor OR 1, L_0x29ac7c0, L_0x29ac710, C4<0>, C4<0>; +L_0x29ac9c0 .functor OR 1, L_0x29ad1c0, L_0x29ad2b0, C4<0>, C4<0>; +L_0x29aca20 .functor OR 1, L_0x29ac9c0, L_0x29ab8f0, C4<0>, C4<0>; +L_0x29acad0 .functor NOT 1, L_0x29ac8c0, C4<0>, C4<0>, C4<0>; +L_0x29acbc0 .functor AND 1, L_0x29acad0, L_0x29aca20, C4<1>, C4<1>; +L_0x29accc0 .functor AND 1, L_0x29ad1c0, L_0x29ad2b0, C4<1>, C4<1>; +L_0x29acea0 .functor AND 1, L_0x29accc0, L_0x29ab8f0, C4<1>, C4<1>; +L_0x29ac000 .functor OR 1, L_0x29acbc0, L_0x29acea0, C4<0>, C4<0>; +v0x2954130_0 .net "a", 0 0, L_0x29ad1c0; 1 drivers +v0x29541f0_0 .net "ab", 0 0, L_0x29ac310; 1 drivers +v0x2954290_0 .net "acarryin", 0 0, L_0x29ac660; 1 drivers +v0x2954330_0 .net "andall", 0 0, L_0x29acea0; 1 drivers +v0x29543b0_0 .net "andsingleintermediate", 0 0, L_0x29accc0; 1 drivers +v0x2954450_0 .net "andsumintermediate", 0 0, L_0x29acbc0; 1 drivers +v0x29544f0_0 .net "b", 0 0, L_0x29ad2b0; 1 drivers +v0x2954590_0 .net "bcarryin", 0 0, L_0x29ac710; 1 drivers +v0x2954630_0 .alias "carryin", 0 0, v0x2955fc0_0; +v0x29546d0_0 .alias "carryout", 0 0, v0x2956190_0; +v0x2954750_0 .net "invcarryout", 0 0, L_0x29acad0; 1 drivers +v0x29547d0_0 .net "orall", 0 0, L_0x29aca20; 1 drivers +v0x2954870_0 .net "orpairintermediate", 0 0, L_0x29ac7c0; 1 drivers +v0x2954910_0 .net "orsingleintermediate", 0 0, L_0x29ac9c0; 1 drivers +v0x2954a30_0 .net "sum", 0 0, L_0x29ac000; 1 drivers +S_0x2953560 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2952970; + .timescale 0 0; +L_0x29ace40 .functor AND 1, L_0x29adeb0, L_0x29adfa0, C4<1>, C4<1>; +L_0x29ad3a0 .functor AND 1, L_0x29adeb0, L_0x29ac8c0, C4<1>, C4<1>; +L_0x29ad450 .functor AND 1, L_0x29adfa0, L_0x29ac8c0, C4<1>, C4<1>; +L_0x29ad500 .functor OR 1, L_0x29ace40, L_0x29ad3a0, C4<0>, C4<0>; +L_0x29ad600 .functor OR 1, L_0x29ad500, L_0x29ad450, C4<0>, C4<0>; +L_0x29ad700 .functor OR 1, L_0x29adeb0, L_0x29adfa0, C4<0>, C4<0>; +L_0x29ad760 .functor OR 1, L_0x29ad700, L_0x29ac8c0, C4<0>, C4<0>; +L_0x29ad810 .functor NOT 1, L_0x29ad600, C4<0>, C4<0>, C4<0>; +L_0x29ad900 .functor AND 1, L_0x29ad810, L_0x29ad760, C4<1>, C4<1>; +L_0x29ada00 .functor AND 1, L_0x29adeb0, L_0x29adfa0, C4<1>, C4<1>; +L_0x29adbe0 .functor AND 1, L_0x29ada00, L_0x29ac8c0, C4<1>, C4<1>; +L_0x29acb30 .functor OR 1, L_0x29ad900, L_0x29adbe0, C4<0>, C4<0>; +v0x2953650_0 .net "a", 0 0, L_0x29adeb0; 1 drivers +v0x2953710_0 .net "ab", 0 0, L_0x29ace40; 1 drivers +v0x29537b0_0 .net "acarryin", 0 0, L_0x29ad3a0; 1 drivers +v0x2953850_0 .net "andall", 0 0, L_0x29adbe0; 1 drivers +v0x29538d0_0 .net "andsingleintermediate", 0 0, L_0x29ada00; 1 drivers +v0x2953970_0 .net "andsumintermediate", 0 0, L_0x29ad900; 1 drivers +v0x2953a10_0 .net "b", 0 0, L_0x29adfa0; 1 drivers +v0x2953ab0_0 .net "bcarryin", 0 0, L_0x29ad450; 1 drivers +v0x2953ba0_0 .alias "carryin", 0 0, v0x2956190_0; +v0x2953c40_0 .alias "carryout", 0 0, v0x29562c0_0; +v0x2953cc0_0 .net "invcarryout", 0 0, L_0x29ad810; 1 drivers +v0x2953d40_0 .net "orall", 0 0, L_0x29ad760; 1 drivers +v0x2953de0_0 .net "orpairintermediate", 0 0, L_0x29ad500; 1 drivers +v0x2953e80_0 .net "orsingleintermediate", 0 0, L_0x29ad700; 1 drivers +v0x2953fa0_0 .net "sum", 0 0, L_0x29acb30; 1 drivers +S_0x2952a60 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2952970; + .timescale 0 0; +L_0x29adb80 .functor AND 1, L_0x29aeb50, L_0x29aec80, C4<1>, C4<1>; +L_0x29ae040 .functor AND 1, L_0x29aeb50, L_0x29ad600, C4<1>, C4<1>; +L_0x29ae0f0 .functor AND 1, L_0x29aec80, L_0x29ad600, C4<1>, C4<1>; +L_0x29ae1a0 .functor OR 1, L_0x29adb80, L_0x29ae040, C4<0>, C4<0>; +L_0x29ae2a0 .functor OR 1, L_0x29ae1a0, L_0x29ae0f0, C4<0>, C4<0>; +L_0x29ae3a0 .functor OR 1, L_0x29aeb50, L_0x29aec80, C4<0>, C4<0>; +L_0x29ae400 .functor OR 1, L_0x29ae3a0, L_0x29ad600, C4<0>, C4<0>; +L_0x29ae4b0 .functor NOT 1, L_0x29ae2a0, C4<0>, C4<0>, C4<0>; +L_0x29ae560 .functor AND 1, L_0x29ae4b0, L_0x29ae400, C4<1>, C4<1>; +L_0x29ae660 .functor AND 1, L_0x29aeb50, L_0x29aec80, C4<1>, C4<1>; +L_0x29ae840 .functor AND 1, L_0x29ae660, L_0x29ad600, C4<1>, C4<1>; +L_0x29ad870 .functor OR 1, L_0x29ae560, L_0x29ae840, C4<0>, C4<0>; +v0x2952b50_0 .net "a", 0 0, L_0x29aeb50; 1 drivers +v0x2952c10_0 .net "ab", 0 0, L_0x29adb80; 1 drivers +v0x2952cb0_0 .net "acarryin", 0 0, L_0x29ae040; 1 drivers +v0x2952d50_0 .net "andall", 0 0, L_0x29ae840; 1 drivers +v0x2952dd0_0 .net "andsingleintermediate", 0 0, L_0x29ae660; 1 drivers +v0x2952e70_0 .net "andsumintermediate", 0 0, L_0x29ae560; 1 drivers +v0x2952f10_0 .net "b", 0 0, L_0x29aec80; 1 drivers +v0x2952fb0_0 .net "bcarryin", 0 0, L_0x29ae0f0; 1 drivers +v0x29530a0_0 .alias "carryin", 0 0, v0x29562c0_0; +v0x2953140_0 .alias "carryout", 0 0, v0x296f250_0; +v0x29531c0_0 .net "invcarryout", 0 0, L_0x29ae4b0; 1 drivers +v0x2953260_0 .net "orall", 0 0, L_0x29ae400; 1 drivers +v0x2953300_0 .net "orpairintermediate", 0 0, L_0x29ae1a0; 1 drivers +v0x29533a0_0 .net "orsingleintermediate", 0 0, L_0x29ae3a0; 1 drivers +v0x29534c0_0 .net "sum", 0 0, L_0x29ad870; 1 drivers +S_0x294f050 .scope module, "adder5" "FullAdder4bit" 19 242, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29b2a70 .functor AND 1, L_0x29b30b0, L_0x29b3150, C4<1>, C4<1>; +L_0x29b3270 .functor NOR 1, L_0x29b32d0, L_0x29b3370, C4<0>, C4<0>; +L_0x29b34f0 .functor AND 1, L_0x29b3550, L_0x29b3640, C4<1>, C4<1>; +L_0x29b3460 .functor NOR 1, L_0x29b37d0, L_0x29b39d0, C4<0>, C4<0>; +L_0x29b3730 .functor OR 1, L_0x29b2a70, L_0x29b3270, C4<0>, C4<0>; +L_0x29b3bc0 .functor NOR 1, L_0x29b34f0, L_0x29b3460, C4<0>, C4<0>; +L_0x29b3cc0 .functor AND 1, L_0x29b3730, L_0x29b3bc0, C4<1>, C4<1>; +v0x2951a50_0 .net *"_s25", 0 0, L_0x29b30b0; 1 drivers +v0x2951b10_0 .net *"_s27", 0 0, L_0x29b3150; 1 drivers +v0x2951bb0_0 .net *"_s29", 0 0, L_0x29b32d0; 1 drivers +v0x2951c50_0 .net *"_s31", 0 0, L_0x29b3370; 1 drivers +v0x2951cd0_0 .net *"_s33", 0 0, L_0x29b3550; 1 drivers +v0x2951d70_0 .net *"_s35", 0 0, L_0x29b3640; 1 drivers +v0x2951e10_0 .net *"_s37", 0 0, L_0x29b37d0; 1 drivers +v0x2951eb0_0 .net *"_s39", 0 0, L_0x29b39d0; 1 drivers +v0x2951f50_0 .net "a", 3 0, L_0x29afc40; 1 drivers +v0x2951ff0_0 .net "aandb", 0 0, L_0x29b2a70; 1 drivers +v0x2952090_0 .net "abandnoror", 0 0, L_0x29b3730; 1 drivers +v0x2952130_0 .net "anorb", 0 0, L_0x29b3270; 1 drivers +v0x29521d0_0 .net "b", 3 0, L_0x29afce0; 1 drivers +v0x2952270_0 .net "bandsum", 0 0, L_0x29b34f0; 1 drivers +v0x2952390_0 .net "bnorsum", 0 0, L_0x29b3460; 1 drivers +v0x2952430_0 .net "bsumandnornor", 0 0, L_0x29b3bc0; 1 drivers +v0x29522f0_0 .alias "carryin", 0 0, v0x296f250_0; +v0x2952560_0 .alias "carryout", 0 0, v0x296f360_0; +v0x29524b0_0 .net "carryout1", 0 0, L_0x29b0080; 1 drivers +v0x2952680_0 .net "carryout2", 0 0, L_0x29b0bb0; 1 drivers +v0x29527b0_0 .net "carryout3", 0 0, L_0x29b1890; 1 drivers +v0x2952830_0 .alias "overflow", 0 0, v0x296c170_0; +v0x2952700_0 .net8 "sum", 3 0, RS_0x7ff6df09d6b8; 4 drivers +L_0x29b0720 .part/pv L_0x29b06c0, 0, 1, 4; +L_0x29b0810 .part L_0x29afc40, 0, 1; +L_0x29b08b0 .part L_0x29afce0, 0, 1; +L_0x29b1310 .part/pv L_0x29b02f0, 1, 1, 4; +L_0x29b1450 .part L_0x29afc40, 1, 1; +L_0x29b1540 .part L_0x29afce0, 1, 1; +L_0x29b2050 .part/pv L_0x29b0e20, 2, 1, 4; +L_0x29b2140 .part L_0x29afc40, 2, 1; +L_0x29b2230 .part L_0x29afce0, 2, 1; +L_0x29b2cb0 .part/pv L_0x29b1b00, 3, 1, 4; +L_0x29b2de0 .part L_0x29afc40, 3, 1; +L_0x29b2f10 .part L_0x29afce0, 3, 1; +L_0x29b30b0 .part L_0x29afc40, 3, 1; +L_0x29b3150 .part L_0x29afce0, 3, 1; +L_0x29b32d0 .part L_0x29afc40, 3, 1; +L_0x29b3370 .part L_0x29afce0, 3, 1; +L_0x29b3550 .part L_0x29afce0, 3, 1; +L_0x29b3640 .part RS_0x7ff6df09d6b8, 3, 1; +L_0x29b37d0 .part L_0x29afce0, 3, 1; +L_0x29b39d0 .part RS_0x7ff6df09d6b8, 3, 1; +S_0x2950fc0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x294f050; + .timescale 0 0; +L_0x29abcb0 .functor AND 1, L_0x29b0810, L_0x29b08b0, C4<1>, C4<1>; +L_0x29abd10 .functor AND 1, L_0x29b0810, L_0x29ae2a0, C4<1>, C4<1>; +L_0x29abdc0 .functor AND 1, L_0x29b08b0, L_0x29ae2a0, C4<1>, C4<1>; +L_0x296f2d0 .functor OR 1, L_0x29abcb0, L_0x29abd10, C4<0>, C4<0>; +L_0x29b0080 .functor OR 1, L_0x296f2d0, L_0x29abdc0, C4<0>, C4<0>; +L_0x29b0180 .functor OR 1, L_0x29b0810, L_0x29b08b0, C4<0>, C4<0>; +L_0x29b01e0 .functor OR 1, L_0x29b0180, L_0x29ae2a0, C4<0>, C4<0>; +L_0x29b0290 .functor NOT 1, L_0x29b0080, C4<0>, C4<0>, C4<0>; +L_0x29b0380 .functor AND 1, L_0x29b0290, L_0x29b01e0, C4<1>, C4<1>; +L_0x29b0480 .functor AND 1, L_0x29b0810, L_0x29b08b0, C4<1>, C4<1>; +L_0x29b0660 .functor AND 1, L_0x29b0480, L_0x29ae2a0, C4<1>, C4<1>; +L_0x29b06c0 .functor OR 1, L_0x29b0380, L_0x29b0660, C4<0>, C4<0>; +v0x29510b0_0 .net "a", 0 0, L_0x29b0810; 1 drivers +v0x2951170_0 .net "ab", 0 0, L_0x29abcb0; 1 drivers +v0x2951210_0 .net "acarryin", 0 0, L_0x29abd10; 1 drivers +v0x29512b0_0 .net "andall", 0 0, L_0x29b0660; 1 drivers +v0x2951330_0 .net "andsingleintermediate", 0 0, L_0x29b0480; 1 drivers +v0x29513d0_0 .net "andsumintermediate", 0 0, L_0x29b0380; 1 drivers +v0x2951470_0 .net "b", 0 0, L_0x29b08b0; 1 drivers +v0x2951510_0 .net "bcarryin", 0 0, L_0x29abdc0; 1 drivers +v0x29515b0_0 .alias "carryin", 0 0, v0x296f250_0; +v0x2951650_0 .alias "carryout", 0 0, v0x29524b0_0; +v0x29516d0_0 .net "invcarryout", 0 0, L_0x29b0290; 1 drivers +v0x2951750_0 .net "orall", 0 0, L_0x29b01e0; 1 drivers +v0x29517f0_0 .net "orpairintermediate", 0 0, L_0x296f2d0; 1 drivers +v0x2951890_0 .net "orsingleintermediate", 0 0, L_0x29b0180; 1 drivers +v0x29519b0_0 .net "sum", 0 0, L_0x29b06c0; 1 drivers +S_0x2950530 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x294f050; + .timescale 0 0; +L_0x29b0600 .functor AND 1, L_0x29b1450, L_0x29b1540, C4<1>, C4<1>; +L_0x29b0950 .functor AND 1, L_0x29b1450, L_0x29b0080, C4<1>, C4<1>; +L_0x29b0a00 .functor AND 1, L_0x29b1540, L_0x29b0080, C4<1>, C4<1>; +L_0x29b0ab0 .functor OR 1, L_0x29b0600, L_0x29b0950, C4<0>, C4<0>; +L_0x29b0bb0 .functor OR 1, L_0x29b0ab0, L_0x29b0a00, C4<0>, C4<0>; +L_0x29b0cb0 .functor OR 1, L_0x29b1450, L_0x29b1540, C4<0>, C4<0>; +L_0x29b0d10 .functor OR 1, L_0x29b0cb0, L_0x29b0080, C4<0>, C4<0>; +L_0x29b0dc0 .functor NOT 1, L_0x29b0bb0, C4<0>, C4<0>, C4<0>; +L_0x29b0eb0 .functor AND 1, L_0x29b0dc0, L_0x29b0d10, C4<1>, C4<1>; +L_0x299e070 .functor AND 1, L_0x29b1450, L_0x29b1540, C4<1>, C4<1>; +L_0x29b1130 .functor AND 1, L_0x299e070, L_0x29b0080, C4<1>, C4<1>; +L_0x29b02f0 .functor OR 1, L_0x29b0eb0, L_0x29b1130, C4<0>, C4<0>; +v0x2950620_0 .net "a", 0 0, L_0x29b1450; 1 drivers +v0x29506e0_0 .net "ab", 0 0, L_0x29b0600; 1 drivers +v0x2950780_0 .net "acarryin", 0 0, L_0x29b0950; 1 drivers +v0x2950820_0 .net "andall", 0 0, L_0x29b1130; 1 drivers +v0x29508a0_0 .net "andsingleintermediate", 0 0, L_0x299e070; 1 drivers +v0x2950940_0 .net "andsumintermediate", 0 0, L_0x29b0eb0; 1 drivers +v0x29509e0_0 .net "b", 0 0, L_0x29b1540; 1 drivers +v0x2950a80_0 .net "bcarryin", 0 0, L_0x29b0a00; 1 drivers +v0x2950b20_0 .alias "carryin", 0 0, v0x29524b0_0; +v0x2950bc0_0 .alias "carryout", 0 0, v0x2952680_0; +v0x2950c40_0 .net "invcarryout", 0 0, L_0x29b0dc0; 1 drivers +v0x2950cc0_0 .net "orall", 0 0, L_0x29b0d10; 1 drivers +v0x2950d60_0 .net "orpairintermediate", 0 0, L_0x29b0ab0; 1 drivers +v0x2950e00_0 .net "orsingleintermediate", 0 0, L_0x29b0cb0; 1 drivers +v0x2950f20_0 .net "sum", 0 0, L_0x29b02f0; 1 drivers +S_0x294fa50 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x294f050; + .timescale 0 0; +L_0x29b10d0 .functor AND 1, L_0x29b2140, L_0x29b2230, C4<1>, C4<1>; +L_0x29b1630 .functor AND 1, L_0x29b2140, L_0x29b0bb0, C4<1>, C4<1>; +L_0x29b16e0 .functor AND 1, L_0x29b2230, L_0x29b0bb0, C4<1>, C4<1>; +L_0x29b1790 .functor OR 1, L_0x29b10d0, L_0x29b1630, C4<0>, C4<0>; +L_0x29b1890 .functor OR 1, L_0x29b1790, L_0x29b16e0, C4<0>, C4<0>; +L_0x29b1990 .functor OR 1, L_0x29b2140, L_0x29b2230, C4<0>, C4<0>; +L_0x29b19f0 .functor OR 1, L_0x29b1990, L_0x29b0bb0, C4<0>, C4<0>; +L_0x29b1aa0 .functor NOT 1, L_0x29b1890, C4<0>, C4<0>, C4<0>; +L_0x29b1b90 .functor AND 1, L_0x29b1aa0, L_0x29b19f0, C4<1>, C4<1>; +L_0x29b1c90 .functor AND 1, L_0x29b2140, L_0x29b2230, C4<1>, C4<1>; +L_0x29b1e70 .functor AND 1, L_0x29b1c90, L_0x29b0bb0, C4<1>, C4<1>; +L_0x29b0e20 .functor OR 1, L_0x29b1b90, L_0x29b1e70, C4<0>, C4<0>; +v0x294fb40_0 .net "a", 0 0, L_0x29b2140; 1 drivers +v0x294fc00_0 .net "ab", 0 0, L_0x29b10d0; 1 drivers +v0x294fca0_0 .net "acarryin", 0 0, L_0x29b1630; 1 drivers +v0x294fd40_0 .net "andall", 0 0, L_0x29b1e70; 1 drivers +v0x294fdc0_0 .net "andsingleintermediate", 0 0, L_0x29b1c90; 1 drivers +v0x294fe60_0 .net "andsumintermediate", 0 0, L_0x29b1b90; 1 drivers +v0x294ff00_0 .net "b", 0 0, L_0x29b2230; 1 drivers +v0x294ffa0_0 .net "bcarryin", 0 0, L_0x29b16e0; 1 drivers +v0x2950090_0 .alias "carryin", 0 0, v0x2952680_0; +v0x2950130_0 .alias "carryout", 0 0, v0x29527b0_0; +v0x29501b0_0 .net "invcarryout", 0 0, L_0x29b1aa0; 1 drivers +v0x2950230_0 .net "orall", 0 0, L_0x29b19f0; 1 drivers +v0x29502d0_0 .net "orpairintermediate", 0 0, L_0x29b1790; 1 drivers +v0x2950370_0 .net "orsingleintermediate", 0 0, L_0x29b1990; 1 drivers +v0x2950490_0 .net "sum", 0 0, L_0x29b0e20; 1 drivers +S_0x294f140 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x294f050; + .timescale 0 0; +L_0x29b1e10 .functor AND 1, L_0x29b2de0, L_0x29b2f10, C4<1>, C4<1>; +L_0x29b22d0 .functor AND 1, L_0x29b2de0, L_0x29b1890, C4<1>, C4<1>; +L_0x29b2380 .functor AND 1, L_0x29b2f10, L_0x29b1890, C4<1>, C4<1>; +L_0x29b2430 .functor OR 1, L_0x29b1e10, L_0x29b22d0, C4<0>, C4<0>; +L_0x29b2530 .functor OR 1, L_0x29b2430, L_0x29b2380, C4<0>, C4<0>; +L_0x29b2630 .functor OR 1, L_0x29b2de0, L_0x29b2f10, C4<0>, C4<0>; +L_0x29b2690 .functor OR 1, L_0x29b2630, L_0x29b1890, C4<0>, C4<0>; +L_0x29b2740 .functor NOT 1, L_0x29b2530, C4<0>, C4<0>, C4<0>; +L_0x29b27f0 .functor AND 1, L_0x29b2740, L_0x29b2690, C4<1>, C4<1>; +L_0x29b28f0 .functor AND 1, L_0x29b2de0, L_0x29b2f10, C4<1>, C4<1>; +L_0x29b2ad0 .functor AND 1, L_0x29b28f0, L_0x29b1890, C4<1>, C4<1>; +L_0x29b1b00 .functor OR 1, L_0x29b27f0, L_0x29b2ad0, C4<0>, C4<0>; +v0x294f230_0 .net "a", 0 0, L_0x29b2de0; 1 drivers +v0x294f2b0_0 .net "ab", 0 0, L_0x29b1e10; 1 drivers +v0x294f330_0 .net "acarryin", 0 0, L_0x29b22d0; 1 drivers +v0x294f3b0_0 .net "andall", 0 0, L_0x29b2ad0; 1 drivers +v0x294f430_0 .net "andsingleintermediate", 0 0, L_0x29b28f0; 1 drivers +v0x294f4b0_0 .net "andsumintermediate", 0 0, L_0x29b27f0; 1 drivers +v0x294f530_0 .net "b", 0 0, L_0x29b2f10; 1 drivers +v0x294f5b0_0 .net "bcarryin", 0 0, L_0x29b2380; 1 drivers +v0x294f630_0 .alias "carryin", 0 0, v0x29527b0_0; +v0x294f6b0_0 .alias "carryout", 0 0, v0x296f360_0; +v0x294f730_0 .net "invcarryout", 0 0, L_0x29b2740; 1 drivers +v0x294f7b0_0 .net "orall", 0 0, L_0x29b2690; 1 drivers +v0x294f830_0 .net "orpairintermediate", 0 0, L_0x29b2430; 1 drivers +v0x294f8b0_0 .net "orsingleintermediate", 0 0, L_0x29b2630; 1 drivers +v0x294f9b0_0 .net "sum", 0 0, L_0x29b1b00; 1 drivers +S_0x294b860 .scope module, "adder6" "FullAdder4bit" 19 243, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29b6df0 .functor AND 1, L_0x29b7430, L_0x29b74d0, C4<1>, C4<1>; +L_0x29b7570 .functor NOR 1, L_0x29b75d0, L_0x29b7670, C4<0>, C4<0>; +L_0x29b77f0 .functor AND 1, L_0x29b7850, L_0x29b7940, C4<1>, C4<1>; +L_0x29b7760 .functor NOR 1, L_0x29b7ad0, L_0x29b7cd0, C4<0>, C4<0>; +L_0x29b7a30 .functor OR 1, L_0x29b6df0, L_0x29b7570, C4<0>, C4<0>; +L_0x29b7ec0 .functor NOR 1, L_0x29b77f0, L_0x29b7760, C4<0>, C4<0>; +L_0x29b7fc0 .functor AND 1, L_0x29b7a30, L_0x29b7ec0, C4<1>, C4<1>; +v0x294e3b0_0 .net *"_s25", 0 0, L_0x29b7430; 1 drivers +v0x294e430_0 .net *"_s27", 0 0, L_0x29b74d0; 1 drivers +v0x294e4b0_0 .net *"_s29", 0 0, L_0x29b75d0; 1 drivers +v0x294e530_0 .net *"_s31", 0 0, L_0x29b7670; 1 drivers +v0x294e5b0_0 .net *"_s33", 0 0, L_0x29b7850; 1 drivers +v0x294e630_0 .net *"_s35", 0 0, L_0x29b7940; 1 drivers +v0x294e6b0_0 .net *"_s37", 0 0, L_0x29b7ad0; 1 drivers +v0x294e730_0 .net *"_s39", 0 0, L_0x29b7cd0; 1 drivers +v0x294e7b0_0 .net "a", 3 0, L_0x29b82c0; 1 drivers +v0x294e830_0 .net "aandb", 0 0, L_0x29b6df0; 1 drivers +v0x294e8b0_0 .net "abandnoror", 0 0, L_0x29b7a30; 1 drivers +v0x294e930_0 .net "anorb", 0 0, L_0x29b7570; 1 drivers +v0x294e9b0_0 .net "b", 3 0, L_0x29b3eb0; 1 drivers +v0x294ea30_0 .net "bandsum", 0 0, L_0x29b77f0; 1 drivers +v0x294eb30_0 .net "bnorsum", 0 0, L_0x29b7760; 1 drivers +v0x294ebb0_0 .net "bsumandnornor", 0 0, L_0x29b7ec0; 1 drivers +v0x294eab0_0 .alias "carryin", 0 0, v0x296f360_0; +v0x294ecc0_0 .alias "carryout", 0 0, v0x296efd0_0; +v0x294ec30_0 .net "carryout1", 0 0, L_0x29b43c0; 1 drivers +v0x294ede0_0 .net "carryout2", 0 0, L_0x29b4ef0; 1 drivers +v0x294ed40_0 .net "carryout3", 0 0, L_0x29b5c20; 1 drivers +v0x294ef10_0 .alias "overflow", 0 0, v0x296c1f0_0; +v0x294ee60_0 .net8 "sum", 3 0, RS_0x7ff6df09c8d8; 4 drivers +L_0x29b4a60 .part/pv L_0x29b4a00, 0, 1, 4; +L_0x29b4b50 .part L_0x29b82c0, 0, 1; +L_0x29b4bf0 .part L_0x29b3eb0, 0, 1; +L_0x29b56a0 .part/pv L_0x29b4630, 1, 1, 4; +L_0x29b57e0 .part L_0x29b82c0, 1, 1; +L_0x29b58d0 .part L_0x29b3eb0, 1, 1; +L_0x29b63d0 .part/pv L_0x29b5160, 2, 1, 4; +L_0x29b64c0 .part L_0x29b82c0, 2, 1; +L_0x29b65b0 .part L_0x29b3eb0, 2, 1; +L_0x29b7030 .part/pv L_0x29b5e90, 3, 1, 4; +L_0x29b7160 .part L_0x29b82c0, 3, 1; +L_0x29b7290 .part L_0x29b3eb0, 3, 1; +L_0x29b7430 .part L_0x29b82c0, 3, 1; +L_0x29b74d0 .part L_0x29b3eb0, 3, 1; +L_0x29b75d0 .part L_0x29b82c0, 3, 1; +L_0x29b7670 .part L_0x29b3eb0, 3, 1; +L_0x29b7850 .part L_0x29b3eb0, 3, 1; +L_0x29b7940 .part RS_0x7ff6df09c8d8, 3, 1; +L_0x29b7ad0 .part L_0x29b3eb0, 3, 1; +L_0x29b7cd0 .part RS_0x7ff6df09c8d8, 3, 1; +S_0x294d9c0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x294b860; + .timescale 0 0; +L_0x29afd80 .functor AND 1, L_0x29b4b50, L_0x29b4bf0, C4<1>, C4<1>; +L_0x29afde0 .functor AND 1, L_0x29b4b50, L_0x29b2530, C4<1>, C4<1>; +L_0x29b4160 .functor AND 1, L_0x29b4bf0, L_0x29b2530, C4<1>, C4<1>; +L_0x296ef40 .functor OR 1, L_0x29afd80, L_0x29afde0, C4<0>, C4<0>; +L_0x29b43c0 .functor OR 1, L_0x296ef40, L_0x29b4160, C4<0>, C4<0>; +L_0x29b44c0 .functor OR 1, L_0x29b4b50, L_0x29b4bf0, C4<0>, C4<0>; +L_0x29b4520 .functor OR 1, L_0x29b44c0, L_0x29b2530, C4<0>, C4<0>; +L_0x29b45d0 .functor NOT 1, L_0x29b43c0, C4<0>, C4<0>, C4<0>; +L_0x29b46c0 .functor AND 1, L_0x29b45d0, L_0x29b4520, C4<1>, C4<1>; +L_0x29b47c0 .functor AND 1, L_0x29b4b50, L_0x29b4bf0, C4<1>, C4<1>; +L_0x29b49a0 .functor AND 1, L_0x29b47c0, L_0x29b2530, C4<1>, C4<1>; +L_0x29b4a00 .functor OR 1, L_0x29b46c0, L_0x29b49a0, C4<0>, C4<0>; +v0x294dab0_0 .net "a", 0 0, L_0x29b4b50; 1 drivers +v0x294db70_0 .net "ab", 0 0, L_0x29afd80; 1 drivers +v0x294dc10_0 .net "acarryin", 0 0, L_0x29afde0; 1 drivers +v0x294dcb0_0 .net "andall", 0 0, L_0x29b49a0; 1 drivers +v0x294dd30_0 .net "andsingleintermediate", 0 0, L_0x29b47c0; 1 drivers +v0x294ddd0_0 .net "andsumintermediate", 0 0, L_0x29b46c0; 1 drivers +v0x294de70_0 .net "b", 0 0, L_0x29b4bf0; 1 drivers +v0x294df10_0 .net "bcarryin", 0 0, L_0x29b4160; 1 drivers +v0x294dfb0_0 .alias "carryin", 0 0, v0x296f360_0; +v0x294e030_0 .alias "carryout", 0 0, v0x294ec30_0; +v0x294e0b0_0 .net "invcarryout", 0 0, L_0x29b45d0; 1 drivers +v0x294e130_0 .net "orall", 0 0, L_0x29b4520; 1 drivers +v0x294e1b0_0 .net "orpairintermediate", 0 0, L_0x296ef40; 1 drivers +v0x294e230_0 .net "orsingleintermediate", 0 0, L_0x29b44c0; 1 drivers +v0x294e330_0 .net "sum", 0 0, L_0x29b4a00; 1 drivers +S_0x294cf30 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x294b860; + .timescale 0 0; +L_0x29b4940 .functor AND 1, L_0x29b57e0, L_0x29b58d0, C4<1>, C4<1>; +L_0x29b4c90 .functor AND 1, L_0x29b57e0, L_0x29b43c0, C4<1>, C4<1>; +L_0x29b4d40 .functor AND 1, L_0x29b58d0, L_0x29b43c0, C4<1>, C4<1>; +L_0x29b4df0 .functor OR 1, L_0x29b4940, L_0x29b4c90, C4<0>, C4<0>; +L_0x29b4ef0 .functor OR 1, L_0x29b4df0, L_0x29b4d40, C4<0>, C4<0>; +L_0x29b4ff0 .functor OR 1, L_0x29b57e0, L_0x29b58d0, C4<0>, C4<0>; +L_0x29b5050 .functor OR 1, L_0x29b4ff0, L_0x29b43c0, C4<0>, C4<0>; +L_0x29b5100 .functor NOT 1, L_0x29b4ef0, C4<0>, C4<0>, C4<0>; +L_0x26f5580 .functor AND 1, L_0x29b5100, L_0x29b5050, C4<1>, C4<1>; +L_0x29b52e0 .functor AND 1, L_0x29b57e0, L_0x29b58d0, C4<1>, C4<1>; +L_0x29b54c0 .functor AND 1, L_0x29b52e0, L_0x29b43c0, C4<1>, C4<1>; +L_0x29b4630 .functor OR 1, L_0x26f5580, L_0x29b54c0, C4<0>, C4<0>; +v0x294d020_0 .net "a", 0 0, L_0x29b57e0; 1 drivers +v0x294d0e0_0 .net "ab", 0 0, L_0x29b4940; 1 drivers +v0x294d180_0 .net "acarryin", 0 0, L_0x29b4c90; 1 drivers +v0x294d220_0 .net "andall", 0 0, L_0x29b54c0; 1 drivers +v0x294d2a0_0 .net "andsingleintermediate", 0 0, L_0x29b52e0; 1 drivers +v0x294d340_0 .net "andsumintermediate", 0 0, L_0x26f5580; 1 drivers +v0x294d3e0_0 .net "b", 0 0, L_0x29b58d0; 1 drivers +v0x294d480_0 .net "bcarryin", 0 0, L_0x29b4d40; 1 drivers +v0x294d520_0 .alias "carryin", 0 0, v0x294ec30_0; +v0x294d5c0_0 .alias "carryout", 0 0, v0x294ede0_0; +v0x294d640_0 .net "invcarryout", 0 0, L_0x29b5100; 1 drivers +v0x294d6c0_0 .net "orall", 0 0, L_0x29b5050; 1 drivers +v0x294d760_0 .net "orpairintermediate", 0 0, L_0x29b4df0; 1 drivers +v0x294d800_0 .net "orsingleintermediate", 0 0, L_0x29b4ff0; 1 drivers +v0x294d920_0 .net "sum", 0 0, L_0x29b4630; 1 drivers +S_0x294c450 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x294b860; + .timescale 0 0; +L_0x29b5460 .functor AND 1, L_0x29b64c0, L_0x29b65b0, C4<1>, C4<1>; +L_0x29b59c0 .functor AND 1, L_0x29b64c0, L_0x29b4ef0, C4<1>, C4<1>; +L_0x29b5a70 .functor AND 1, L_0x29b65b0, L_0x29b4ef0, C4<1>, C4<1>; +L_0x29b5b20 .functor OR 1, L_0x29b5460, L_0x29b59c0, C4<0>, C4<0>; +L_0x29b5c20 .functor OR 1, L_0x29b5b20, L_0x29b5a70, C4<0>, C4<0>; +L_0x29b5d20 .functor OR 1, L_0x29b64c0, L_0x29b65b0, C4<0>, C4<0>; +L_0x29b5d80 .functor OR 1, L_0x29b5d20, L_0x29b4ef0, C4<0>, C4<0>; +L_0x29b5e30 .functor NOT 1, L_0x29b5c20, C4<0>, C4<0>, C4<0>; +L_0x27c8ab0 .functor AND 1, L_0x29b5e30, L_0x29b5d80, C4<1>, C4<1>; +L_0x29b6010 .functor AND 1, L_0x29b64c0, L_0x29b65b0, C4<1>, C4<1>; +L_0x29b61f0 .functor AND 1, L_0x29b6010, L_0x29b4ef0, C4<1>, C4<1>; +L_0x29b5160 .functor OR 1, L_0x27c8ab0, L_0x29b61f0, C4<0>, C4<0>; +v0x294c540_0 .net "a", 0 0, L_0x29b64c0; 1 drivers +v0x294c600_0 .net "ab", 0 0, L_0x29b5460; 1 drivers +v0x294c6a0_0 .net "acarryin", 0 0, L_0x29b59c0; 1 drivers +v0x294c740_0 .net "andall", 0 0, L_0x29b61f0; 1 drivers +v0x294c7c0_0 .net "andsingleintermediate", 0 0, L_0x29b6010; 1 drivers +v0x294c860_0 .net "andsumintermediate", 0 0, L_0x27c8ab0; 1 drivers +v0x294c900_0 .net "b", 0 0, L_0x29b65b0; 1 drivers +v0x294c9a0_0 .net "bcarryin", 0 0, L_0x29b5a70; 1 drivers +v0x294ca90_0 .alias "carryin", 0 0, v0x294ede0_0; +v0x294cb30_0 .alias "carryout", 0 0, v0x294ed40_0; +v0x294cbb0_0 .net "invcarryout", 0 0, L_0x29b5e30; 1 drivers +v0x294cc30_0 .net "orall", 0 0, L_0x29b5d80; 1 drivers +v0x294ccd0_0 .net "orpairintermediate", 0 0, L_0x29b5b20; 1 drivers +v0x294cd70_0 .net "orsingleintermediate", 0 0, L_0x29b5d20; 1 drivers +v0x294ce90_0 .net "sum", 0 0, L_0x29b5160; 1 drivers +S_0x294b950 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x294b860; + .timescale 0 0; +L_0x29b6190 .functor AND 1, L_0x29b7160, L_0x29b7290, C4<1>, C4<1>; +L_0x29b6650 .functor AND 1, L_0x29b7160, L_0x29b5c20, C4<1>, C4<1>; +L_0x29b6700 .functor AND 1, L_0x29b7290, L_0x29b5c20, C4<1>, C4<1>; +L_0x29b67b0 .functor OR 1, L_0x29b6190, L_0x29b6650, C4<0>, C4<0>; +L_0x29b68b0 .functor OR 1, L_0x29b67b0, L_0x29b6700, C4<0>, C4<0>; +L_0x29b69b0 .functor OR 1, L_0x29b7160, L_0x29b7290, C4<0>, C4<0>; +L_0x29b6a10 .functor OR 1, L_0x29b69b0, L_0x29b5c20, C4<0>, C4<0>; +L_0x29b6ac0 .functor NOT 1, L_0x29b68b0, C4<0>, C4<0>, C4<0>; +L_0x29b6b70 .functor AND 1, L_0x29b6ac0, L_0x29b6a10, C4<1>, C4<1>; +L_0x29b6c70 .functor AND 1, L_0x29b7160, L_0x29b7290, C4<1>, C4<1>; +L_0x29b6e50 .functor AND 1, L_0x29b6c70, L_0x29b5c20, C4<1>, C4<1>; +L_0x29b5e90 .functor OR 1, L_0x29b6b70, L_0x29b6e50, C4<0>, C4<0>; +v0x294ba40_0 .net "a", 0 0, L_0x29b7160; 1 drivers +v0x294bae0_0 .net "ab", 0 0, L_0x29b6190; 1 drivers +v0x294bb80_0 .net "acarryin", 0 0, L_0x29b6650; 1 drivers +v0x294bc20_0 .net "andall", 0 0, L_0x29b6e50; 1 drivers +v0x294bcc0_0 .net "andsingleintermediate", 0 0, L_0x29b6c70; 1 drivers +v0x294bd60_0 .net "andsumintermediate", 0 0, L_0x29b6b70; 1 drivers +v0x294be00_0 .net "b", 0 0, L_0x29b7290; 1 drivers +v0x294bea0_0 .net "bcarryin", 0 0, L_0x29b6700; 1 drivers +v0x294bf90_0 .alias "carryin", 0 0, v0x294ed40_0; +v0x294c030_0 .alias "carryout", 0 0, v0x296efd0_0; +v0x294c0b0_0 .net "invcarryout", 0 0, L_0x29b6ac0; 1 drivers +v0x294c150_0 .net "orall", 0 0, L_0x29b6a10; 1 drivers +v0x294c1f0_0 .net "orpairintermediate", 0 0, L_0x29b67b0; 1 drivers +v0x294c290_0 .net "orsingleintermediate", 0 0, L_0x29b69b0; 1 drivers +v0x294c3b0_0 .net "sum", 0 0, L_0x29b5e90; 1 drivers +S_0x2947dd0 .scope module, "adder7" "FullAdder4bit" 19 244, 3 47, S_0x2947ce0; + .timescale 0 0; +L_0x29bb1c0 .functor AND 1, L_0x29bb800, L_0x29bb8a0, C4<1>, C4<1>; +L_0x29bb940 .functor NOR 1, L_0x29bb9a0, L_0x29bba40, C4<0>, C4<0>; +L_0x29bbbc0 .functor AND 1, L_0x29bbc20, L_0x29bbd10, C4<1>, C4<1>; +L_0x29bbb30 .functor NOR 1, L_0x29bbea0, L_0x29bc0a0, C4<0>, C4<0>; +L_0x29bbe00 .functor OR 1, L_0x29bb1c0, L_0x29bb940, C4<0>, C4<0>; +L_0x29bc290 .functor NOR 1, L_0x29bbbc0, L_0x29bbb30, C4<0>, C4<0>; +L_0x29bc390 .functor AND 1, L_0x29bbe00, L_0x29bc290, C4<1>, C4<1>; +v0x294a940_0 .net *"_s25", 0 0, L_0x29bb800; 1 drivers +v0x294aa00_0 .net *"_s27", 0 0, L_0x29bb8a0; 1 drivers +v0x294aaa0_0 .net *"_s29", 0 0, L_0x29bb9a0; 1 drivers +v0x294ab40_0 .net *"_s31", 0 0, L_0x29bba40; 1 drivers +v0x294abc0_0 .net *"_s33", 0 0, L_0x29bbc20; 1 drivers +v0x294ac60_0 .net *"_s35", 0 0, L_0x29bbd10; 1 drivers +v0x294ad00_0 .net *"_s37", 0 0, L_0x29bbea0; 1 drivers +v0x294ada0_0 .net *"_s39", 0 0, L_0x29bc0a0; 1 drivers +v0x294ae40_0 .net "a", 3 0, L_0x29b8360; 1 drivers +v0x294aee0_0 .net "aandb", 0 0, L_0x29bb1c0; 1 drivers +v0x294af80_0 .net "abandnoror", 0 0, L_0x29bbe00; 1 drivers +v0x294b020_0 .net "anorb", 0 0, L_0x29bb940; 1 drivers +v0x294b0c0_0 .net "b", 3 0, L_0x29b8400; 1 drivers +v0x294b160_0 .net "bandsum", 0 0, L_0x29bbbc0; 1 drivers +v0x294b280_0 .net "bnorsum", 0 0, L_0x29bbb30; 1 drivers +v0x294b320_0 .net "bsumandnornor", 0 0, L_0x29bc290; 1 drivers +v0x294b1e0_0 .alias "carryin", 0 0, v0x296efd0_0; +v0x294b450_0 .alias "carryout", 0 0, v0x296fa40_0; +v0x294b3a0_0 .net "carryout1", 0 0, L_0x29b8730; 1 drivers +v0x294b570_0 .net "carryout2", 0 0, L_0x29b9260; 1 drivers +v0x294b6a0_0 .net "carryout3", 0 0, L_0x29b9fa0; 1 drivers +v0x294b720_0 .alias "overflow", 0 0, v0x296fac0_0; +v0x294b5f0_0 .net8 "sum", 3 0, RS_0x7ff6df09baf8; 4 drivers +L_0x29b8dd0 .part/pv L_0x29b8d70, 0, 1, 4; +L_0x29b8ec0 .part L_0x29b8360, 0, 1; +L_0x29b8f60 .part L_0x29b8400, 0, 1; +L_0x29b9a20 .part/pv L_0x29b89a0, 1, 1, 4; +L_0x29b9b60 .part L_0x29b8360, 1, 1; +L_0x29b9c50 .part L_0x29b8400, 1, 1; +L_0x29ba760 .part/pv L_0x29b94d0, 2, 1, 4; +L_0x29ba850 .part L_0x29b8360, 2, 1; +L_0x29ba940 .part L_0x29b8400, 2, 1; +L_0x29bb400 .part/pv L_0x29ba210, 3, 1, 4; +L_0x29bb530 .part L_0x29b8360, 3, 1; +L_0x29bb660 .part L_0x29b8400, 3, 1; +L_0x29bb800 .part L_0x29b8360, 3, 1; +L_0x29bb8a0 .part L_0x29b8400, 3, 1; +L_0x29bb9a0 .part L_0x29b8360, 3, 1; +L_0x29bba40 .part L_0x29b8400, 3, 1; +L_0x29bbc20 .part L_0x29b8400, 3, 1; +L_0x29bbd10 .part RS_0x7ff6df09baf8, 3, 1; +L_0x29bbea0 .part L_0x29b8400, 3, 1; +L_0x29bc0a0 .part RS_0x7ff6df09baf8, 3, 1; +S_0x2949eb0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2947dd0; + .timescale 0 0; +L_0x29b3f50 .functor AND 1, L_0x29b8ec0, L_0x29b8f60, C4<1>, C4<1>; +L_0x29b3fb0 .functor AND 1, L_0x29b8ec0, L_0x29b68b0, C4<1>, C4<1>; +L_0x29b4060 .functor AND 1, L_0x29b8f60, L_0x29b68b0, C4<1>, C4<1>; +L_0x29a7440 .functor OR 1, L_0x29b3f50, L_0x29b3fb0, C4<0>, C4<0>; +L_0x29b8730 .functor OR 1, L_0x29a7440, L_0x29b4060, C4<0>, C4<0>; +L_0x29b8830 .functor OR 1, L_0x29b8ec0, L_0x29b8f60, C4<0>, C4<0>; +L_0x29b8890 .functor OR 1, L_0x29b8830, L_0x29b68b0, C4<0>, C4<0>; +L_0x29b8940 .functor NOT 1, L_0x29b8730, C4<0>, C4<0>, C4<0>; +L_0x29b8a30 .functor AND 1, L_0x29b8940, L_0x29b8890, C4<1>, C4<1>; +L_0x29b8b30 .functor AND 1, L_0x29b8ec0, L_0x29b8f60, C4<1>, C4<1>; +L_0x29b8d10 .functor AND 1, L_0x29b8b30, L_0x29b68b0, C4<1>, C4<1>; +L_0x29b8d70 .functor OR 1, L_0x29b8a30, L_0x29b8d10, C4<0>, C4<0>; +v0x2949fa0_0 .net "a", 0 0, L_0x29b8ec0; 1 drivers +v0x294a060_0 .net "ab", 0 0, L_0x29b3f50; 1 drivers +v0x294a100_0 .net "acarryin", 0 0, L_0x29b3fb0; 1 drivers +v0x294a1a0_0 .net "andall", 0 0, L_0x29b8d10; 1 drivers +v0x294a220_0 .net "andsingleintermediate", 0 0, L_0x29b8b30; 1 drivers +v0x294a2c0_0 .net "andsumintermediate", 0 0, L_0x29b8a30; 1 drivers +v0x294a360_0 .net "b", 0 0, L_0x29b8f60; 1 drivers +v0x294a400_0 .net "bcarryin", 0 0, L_0x29b4060; 1 drivers +v0x294a4a0_0 .alias "carryin", 0 0, v0x296efd0_0; +v0x294a540_0 .alias "carryout", 0 0, v0x294b3a0_0; +v0x294a5c0_0 .net "invcarryout", 0 0, L_0x29b8940; 1 drivers +v0x294a640_0 .net "orall", 0 0, L_0x29b8890; 1 drivers +v0x294a6e0_0 .net "orpairintermediate", 0 0, L_0x29a7440; 1 drivers +v0x294a780_0 .net "orsingleintermediate", 0 0, L_0x29b8830; 1 drivers +v0x294a8a0_0 .net "sum", 0 0, L_0x29b8d70; 1 drivers +S_0x2949420 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2947dd0; + .timescale 0 0; +L_0x29b8cb0 .functor AND 1, L_0x29b9b60, L_0x29b9c50, C4<1>, C4<1>; +L_0x29b9000 .functor AND 1, L_0x29b9b60, L_0x29b8730, C4<1>, C4<1>; +L_0x29b90b0 .functor AND 1, L_0x29b9c50, L_0x29b8730, C4<1>, C4<1>; +L_0x29b9160 .functor OR 1, L_0x29b8cb0, L_0x29b9000, C4<0>, C4<0>; +L_0x29b9260 .functor OR 1, L_0x29b9160, L_0x29b90b0, C4<0>, C4<0>; +L_0x29b9360 .functor OR 1, L_0x29b9b60, L_0x29b9c50, C4<0>, C4<0>; +L_0x29b93c0 .functor OR 1, L_0x29b9360, L_0x29b8730, C4<0>, C4<0>; +L_0x29b9470 .functor NOT 1, L_0x29b9260, C4<0>, C4<0>, C4<0>; +L_0x29b9560 .functor AND 1, L_0x29b9470, L_0x29b93c0, C4<1>, C4<1>; +L_0x29b9660 .functor AND 1, L_0x29b9b60, L_0x29b9c50, C4<1>, C4<1>; +L_0x29b9840 .functor AND 1, L_0x29b9660, L_0x29b8730, C4<1>, C4<1>; +L_0x29b89a0 .functor OR 1, L_0x29b9560, L_0x29b9840, C4<0>, C4<0>; +v0x2949510_0 .net "a", 0 0, L_0x29b9b60; 1 drivers +v0x29495d0_0 .net "ab", 0 0, L_0x29b8cb0; 1 drivers +v0x2949670_0 .net "acarryin", 0 0, L_0x29b9000; 1 drivers +v0x2949710_0 .net "andall", 0 0, L_0x29b9840; 1 drivers +v0x2949790_0 .net "andsingleintermediate", 0 0, L_0x29b9660; 1 drivers +v0x2949830_0 .net "andsumintermediate", 0 0, L_0x29b9560; 1 drivers +v0x29498d0_0 .net "b", 0 0, L_0x29b9c50; 1 drivers +v0x2949970_0 .net "bcarryin", 0 0, L_0x29b90b0; 1 drivers +v0x2949a10_0 .alias "carryin", 0 0, v0x294b3a0_0; +v0x2949ab0_0 .alias "carryout", 0 0, v0x294b570_0; +v0x2949b30_0 .net "invcarryout", 0 0, L_0x29b9470; 1 drivers +v0x2949bb0_0 .net "orall", 0 0, L_0x29b93c0; 1 drivers +v0x2949c50_0 .net "orpairintermediate", 0 0, L_0x29b9160; 1 drivers +v0x2949cf0_0 .net "orsingleintermediate", 0 0, L_0x29b9360; 1 drivers +v0x2949e10_0 .net "sum", 0 0, L_0x29b89a0; 1 drivers +S_0x2948990 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2947dd0; + .timescale 0 0; +L_0x29b97e0 .functor AND 1, L_0x29ba850, L_0x29ba940, C4<1>, C4<1>; +L_0x29b9d40 .functor AND 1, L_0x29ba850, L_0x29b9260, C4<1>, C4<1>; +L_0x29b9df0 .functor AND 1, L_0x29ba940, L_0x29b9260, C4<1>, C4<1>; +L_0x29b9ea0 .functor OR 1, L_0x29b97e0, L_0x29b9d40, C4<0>, C4<0>; +L_0x29b9fa0 .functor OR 1, L_0x29b9ea0, L_0x29b9df0, C4<0>, C4<0>; +L_0x29ba0a0 .functor OR 1, L_0x29ba850, L_0x29ba940, C4<0>, C4<0>; +L_0x29ba100 .functor OR 1, L_0x29ba0a0, L_0x29b9260, C4<0>, C4<0>; +L_0x29ba1b0 .functor NOT 1, L_0x29b9fa0, C4<0>, C4<0>, C4<0>; +L_0x29ba2a0 .functor AND 1, L_0x29ba1b0, L_0x29ba100, C4<1>, C4<1>; +L_0x29ba3a0 .functor AND 1, L_0x29ba850, L_0x29ba940, C4<1>, C4<1>; +L_0x29ba580 .functor AND 1, L_0x29ba3a0, L_0x29b9260, C4<1>, C4<1>; +L_0x29b94d0 .functor OR 1, L_0x29ba2a0, L_0x29ba580, C4<0>, C4<0>; +v0x2948a80_0 .net "a", 0 0, L_0x29ba850; 1 drivers +v0x2948b40_0 .net "ab", 0 0, L_0x29b97e0; 1 drivers +v0x2948be0_0 .net "acarryin", 0 0, L_0x29b9d40; 1 drivers +v0x2948c80_0 .net "andall", 0 0, L_0x29ba580; 1 drivers +v0x2948d00_0 .net "andsingleintermediate", 0 0, L_0x29ba3a0; 1 drivers +v0x2948da0_0 .net "andsumintermediate", 0 0, L_0x29ba2a0; 1 drivers +v0x2948e40_0 .net "b", 0 0, L_0x29ba940; 1 drivers +v0x2948ee0_0 .net "bcarryin", 0 0, L_0x29b9df0; 1 drivers +v0x2948f80_0 .alias "carryin", 0 0, v0x294b570_0; +v0x2949020_0 .alias "carryout", 0 0, v0x294b6a0_0; +v0x29490a0_0 .net "invcarryout", 0 0, L_0x29ba1b0; 1 drivers +v0x2949120_0 .net "orall", 0 0, L_0x29ba100; 1 drivers +v0x29491c0_0 .net "orpairintermediate", 0 0, L_0x29b9ea0; 1 drivers +v0x2949260_0 .net "orsingleintermediate", 0 0, L_0x29ba0a0; 1 drivers +v0x2949380_0 .net "sum", 0 0, L_0x29b94d0; 1 drivers +S_0x2947ec0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2947dd0; + .timescale 0 0; +L_0x29ba520 .functor AND 1, L_0x29bb530, L_0x29bb660, C4<1>, C4<1>; +L_0x29ba9e0 .functor AND 1, L_0x29bb530, L_0x29b9fa0, C4<1>, C4<1>; +L_0x29baa90 .functor AND 1, L_0x29bb660, L_0x29b9fa0, C4<1>, C4<1>; +L_0x29bab40 .functor OR 1, L_0x29ba520, L_0x29ba9e0, C4<0>, C4<0>; +L_0x29bac40 .functor OR 1, L_0x29bab40, L_0x29baa90, C4<0>, C4<0>; +L_0x29bad80 .functor OR 1, L_0x29bb530, L_0x29bb660, C4<0>, C4<0>; +L_0x29bade0 .functor OR 1, L_0x29bad80, L_0x29b9fa0, C4<0>, C4<0>; +L_0x29bae90 .functor NOT 1, L_0x29bac40, C4<0>, C4<0>, C4<0>; +L_0x29baf40 .functor AND 1, L_0x29bae90, L_0x29bade0, C4<1>, C4<1>; +L_0x29bb040 .functor AND 1, L_0x29bb530, L_0x29bb660, C4<1>, C4<1>; +L_0x29bb220 .functor AND 1, L_0x29bb040, L_0x29b9fa0, C4<1>, C4<1>; +L_0x29ba210 .functor OR 1, L_0x29baf40, L_0x29bb220, C4<0>, C4<0>; +v0x2947fb0_0 .net "a", 0 0, L_0x29bb530; 1 drivers +v0x2948070_0 .net "ab", 0 0, L_0x29ba520; 1 drivers +v0x2948110_0 .net "acarryin", 0 0, L_0x29ba9e0; 1 drivers +v0x29481b0_0 .net "andall", 0 0, L_0x29bb220; 1 drivers +v0x2948230_0 .net "andsingleintermediate", 0 0, L_0x29bb040; 1 drivers +v0x29482d0_0 .net "andsumintermediate", 0 0, L_0x29baf40; 1 drivers +v0x2948370_0 .net "b", 0 0, L_0x29bb660; 1 drivers +v0x2948410_0 .net "bcarryin", 0 0, L_0x29baa90; 1 drivers +v0x29484b0_0 .alias "carryin", 0 0, v0x294b6a0_0; +v0x2948550_0 .alias "carryout", 0 0, v0x296fa40_0; +v0x29485f0_0 .net "invcarryout", 0 0, L_0x29bae90; 1 drivers +v0x2948690_0 .net "orall", 0 0, L_0x29bade0; 1 drivers +v0x2948730_0 .net "orpairintermediate", 0 0, L_0x29bab40; 1 drivers +v0x29487d0_0 .net "orsingleintermediate", 0 0, L_0x29bad80; 1 drivers +v0x29488f0_0 .net "sum", 0 0, L_0x29ba210; 1 drivers +S_0x2943b50 .scope module, "xor0" "xor_32bit" 18 35, 20 1, S_0x28a5ac0; + .timescale 0 0; +L_0x29b8590 .functor XOR 1, L_0x29bc860, L_0x29bc950, C4<0>, C4<0>; +L_0x29bcae0 .functor XOR 1, L_0x29bcb90, L_0x29bcc80, C4<0>, C4<0>; +L_0x29bcea0 .functor XOR 1, L_0x29bcf00, L_0x29bd040, C4<0>, C4<0>; +L_0x29bd230 .functor XOR 1, L_0x29bd290, L_0x29bd380, C4<0>, C4<0>; +L_0x29bd1d0 .functor XOR 1, L_0x29bd560, L_0x29bd650, C4<0>, C4<0>; +L_0x29bd870 .functor XOR 1, L_0x29bd920, L_0x29bda10, C4<0>, C4<0>; +L_0x29bd7e0 .functor XOR 1, L_0x29bdd50, L_0x29bdb00, C4<0>, C4<0>; +L_0x29bde40 .functor XOR 1, L_0x29be0f0, L_0x29be1e0, C4<0>, C4<0>; +L_0x29be3a0 .functor XOR 1, L_0x29be450, L_0x29be2d0, C4<0>, C4<0>; +L_0x29be540 .functor XOR 1, L_0x29be860, L_0x29be900, C4<0>, C4<0>; +L_0x29beaf0 .functor XOR 1, L_0x29beb50, L_0x29be9f0, C4<0>, C4<0>; +L_0x29bec40 .functor XOR 1, L_0x29bef10, L_0x29aba00, C4<0>, C4<0>; +L_0x2727f00 .functor XOR 1, L_0x29bedf0, L_0x29bf500, C4<0>, C4<0>; +L_0x28d3e60 .functor XOR 1, L_0x29bf3c0, L_0x29bf790, C4<0>, C4<0>; +L_0x29bf6e0 .functor XOR 1, L_0x29bdc40, L_0x29bf830, C4<0>, C4<0>; +L_0x29bf920 .functor XOR 1, L_0x29bff30, L_0x29bffd0, C4<0>, C4<0>; +L_0x29bfe50 .functor XOR 1, L_0x29c0250, L_0x29c00c0, C4<0>, C4<0>; +L_0x29c04f0 .functor XOR 1, L_0x29c0640, L_0x29c06e0, C4<0>, C4<0>; +L_0x29c03e0 .functor XOR 1, L_0x29c0990, L_0x29c07d0, C4<0>, C4<0>; +L_0x29c0c10 .functor XOR 1, L_0x29c05a0, L_0x29c0dc0, C4<0>, C4<0>; +L_0x29c0ad0 .functor XOR 1, L_0x29c10a0, L_0x29c0eb0, C4<0>, C4<0>; +L_0x29c1040 .functor XOR 1, L_0x29c0cc0, L_0x29c14b0, C4<0>, C4<0>; +L_0x29c11e0 .functor XOR 1, L_0x29c1290, L_0x29c15a0, C4<0>, C4<0>; +L_0x29c1730 .functor XOR 1, L_0x29c13a0, L_0x29c1bc0, C4<0>, C4<0>; +L_0x29c18b0 .functor XOR 1, L_0x29c1960, L_0x29c1f10, C4<0>, C4<0>; +L_0x29c1cb0 .functor XOR 1, L_0x29c1e40, L_0x29c2310, C4<0>, C4<0>; +L_0x29c2140 .functor XOR 1, L_0x29c21f0, L_0x29c2640, C4<0>, C4<0>; +L_0x29c23b0 .functor XOR 1, L_0x29c1d60, L_0x29c25a0, C4<0>, C4<0>; +L_0x29c2870 .functor XOR 1, L_0x29c2920, L_0x29c2d80, C4<0>, C4<0>; +L_0x29c2ac0 .functor XOR 1, L_0x29c2460, L_0x29c2c70, C4<0>, C4<0>; +L_0x2944ea0 .functor XOR 1, L_0x29bb750, L_0x29bf990, C4<0>, C4<0>; +L_0x29bfb20 .functor XOR 1, L_0x29c2b70, L_0x29c3020, C4<0>, C4<0>; +v0x2943c40_0 .net *"_s0", 0 0, L_0x29b8590; 1 drivers +v0x2943cc0_0 .net *"_s101", 0 0, L_0x29c00c0; 1 drivers +v0x2943d40_0 .net *"_s102", 0 0, L_0x29c04f0; 1 drivers +v0x2943dc0_0 .net *"_s105", 0 0, L_0x29c0640; 1 drivers +v0x2943e40_0 .net *"_s107", 0 0, L_0x29c06e0; 1 drivers +v0x2943ec0_0 .net *"_s108", 0 0, L_0x29c03e0; 1 drivers +v0x2943f40_0 .net *"_s11", 0 0, L_0x29bcc80; 1 drivers +v0x2943fc0_0 .net *"_s111", 0 0, L_0x29c0990; 1 drivers +v0x29440b0_0 .net *"_s113", 0 0, L_0x29c07d0; 1 drivers +v0x2944150_0 .net *"_s114", 0 0, L_0x29c0c10; 1 drivers +v0x29441f0_0 .net *"_s117", 0 0, L_0x29c05a0; 1 drivers +v0x2944290_0 .net *"_s119", 0 0, L_0x29c0dc0; 1 drivers +v0x2944330_0 .net *"_s12", 0 0, L_0x29bcea0; 1 drivers +v0x29443d0_0 .net *"_s120", 0 0, L_0x29c0ad0; 1 drivers +v0x29444f0_0 .net *"_s123", 0 0, L_0x29c10a0; 1 drivers +v0x2944590_0 .net *"_s125", 0 0, L_0x29c0eb0; 1 drivers +v0x2944450_0 .net *"_s126", 0 0, L_0x29c1040; 1 drivers +v0x29446e0_0 .net *"_s129", 0 0, L_0x29c0cc0; 1 drivers +v0x2944800_0 .net *"_s131", 0 0, L_0x29c14b0; 1 drivers +v0x2944880_0 .net *"_s132", 0 0, L_0x29c11e0; 1 drivers +v0x2944760_0 .net *"_s135", 0 0, L_0x29c1290; 1 drivers +v0x29449b0_0 .net *"_s137", 0 0, L_0x29c15a0; 1 drivers +v0x2944900_0 .net *"_s138", 0 0, L_0x29c1730; 1 drivers +v0x2944af0_0 .net *"_s141", 0 0, L_0x29c13a0; 1 drivers +v0x2944a50_0 .net *"_s143", 0 0, L_0x29c1bc0; 1 drivers +v0x2944c40_0 .net *"_s144", 0 0, L_0x29c18b0; 1 drivers +v0x2944b90_0 .net *"_s147", 0 0, L_0x29c1960; 1 drivers +v0x2944da0_0 .net *"_s149", 0 0, L_0x29c1f10; 1 drivers +v0x2944ce0_0 .net *"_s15", 0 0, L_0x29bcf00; 1 drivers +v0x2944f10_0 .net *"_s150", 0 0, L_0x29c1cb0; 1 drivers +v0x2944e20_0 .net *"_s153", 0 0, L_0x29c1e40; 1 drivers +v0x2945090_0 .net *"_s155", 0 0, L_0x29c2310; 1 drivers +v0x2944f90_0 .net *"_s156", 0 0, L_0x29c2140; 1 drivers +v0x2945220_0 .net *"_s159", 0 0, L_0x29c21f0; 1 drivers +v0x2945110_0 .net *"_s161", 0 0, L_0x29c2640; 1 drivers +v0x29453c0_0 .net *"_s162", 0 0, L_0x29c23b0; 1 drivers +v0x29452a0_0 .net *"_s165", 0 0, L_0x29c1d60; 1 drivers +v0x2945340_0 .net *"_s167", 0 0, L_0x29c25a0; 1 drivers +v0x2945580_0 .net *"_s168", 0 0, L_0x29c2870; 1 drivers +v0x2945600_0 .net *"_s17", 0 0, L_0x29bd040; 1 drivers +v0x2945440_0 .net *"_s171", 0 0, L_0x29c2920; 1 drivers +v0x29454e0_0 .net *"_s173", 0 0, L_0x29c2d80; 1 drivers +v0x29457e0_0 .net *"_s174", 0 0, L_0x29c2ac0; 1 drivers +v0x2945860_0 .net *"_s177", 0 0, L_0x29c2460; 1 drivers +v0x2945680_0 .net *"_s179", 0 0, L_0x29c2c70; 1 drivers +v0x2945720_0 .net *"_s18", 0 0, L_0x29bd230; 1 drivers +v0x2945a60_0 .net *"_s180", 0 0, L_0x2944ea0; 1 drivers +v0x2945ae0_0 .net *"_s183", 0 0, L_0x29bb750; 1 drivers +v0x2945900_0 .net *"_s185", 0 0, L_0x29bf990; 1 drivers +v0x29459a0_0 .net *"_s186", 0 0, L_0x29bfb20; 1 drivers +v0x2945d00_0 .net *"_s189", 0 0, L_0x29c2b70; 1 drivers +v0x2945d80_0 .net *"_s191", 0 0, L_0x29c3020; 1 drivers +v0x2945b80_0 .net *"_s21", 0 0, L_0x29bd290; 1 drivers +v0x2945c20_0 .net *"_s23", 0 0, L_0x29bd380; 1 drivers +v0x2945fc0_0 .net *"_s24", 0 0, L_0x29bd1d0; 1 drivers +v0x2946040_0 .net *"_s27", 0 0, L_0x29bd560; 1 drivers +v0x2945e00_0 .net *"_s29", 0 0, L_0x29bd650; 1 drivers +v0x2945ea0_0 .net *"_s3", 0 0, L_0x29bc860; 1 drivers +v0x2945f40_0 .net *"_s30", 0 0, L_0x29bd870; 1 drivers +v0x29462c0_0 .net *"_s33", 0 0, L_0x29bd920; 1 drivers +v0x29460e0_0 .net *"_s35", 0 0, L_0x29bda10; 1 drivers +v0x2946180_0 .net *"_s36", 0 0, L_0x29bd7e0; 1 drivers +v0x2946220_0 .net *"_s39", 0 0, L_0x29bdd50; 1 drivers +v0x2946560_0 .net *"_s41", 0 0, L_0x29bdb00; 1 drivers +v0x2946360_0 .net *"_s42", 0 0, L_0x29bde40; 1 drivers +v0x2946400_0 .net *"_s45", 0 0, L_0x29be0f0; 1 drivers +v0x29464a0_0 .net *"_s47", 0 0, L_0x29be1e0; 1 drivers +v0x2946800_0 .net *"_s48", 0 0, L_0x29be3a0; 1 drivers +v0x2946600_0 .net *"_s5", 0 0, L_0x29bc950; 1 drivers +v0x29466a0_0 .net *"_s51", 0 0, L_0x29be450; 1 drivers +v0x2946740_0 .net *"_s53", 0 0, L_0x29be2d0; 1 drivers +v0x2946ac0_0 .net *"_s54", 0 0, L_0x29be540; 1 drivers +v0x2946880_0 .net *"_s57", 0 0, L_0x29be860; 1 drivers +v0x2946920_0 .net *"_s59", 0 0, L_0x29be900; 1 drivers +v0x29469c0_0 .net *"_s6", 0 0, L_0x29bcae0; 1 drivers +v0x2946da0_0 .net *"_s60", 0 0, L_0x29beaf0; 1 drivers +v0x2946b40_0 .net *"_s63", 0 0, L_0x29beb50; 1 drivers +v0x2946be0_0 .net *"_s65", 0 0, L_0x29be9f0; 1 drivers +v0x2946c80_0 .net *"_s66", 0 0, L_0x29bec40; 1 drivers +v0x2946d20_0 .net *"_s69", 0 0, L_0x29bef10; 1 drivers +v0x29470b0_0 .net *"_s71", 0 0, L_0x29aba00; 1 drivers +v0x2947130_0 .net *"_s72", 0 0, L_0x2727f00; 1 drivers +v0x2946e40_0 .net *"_s75", 0 0, L_0x29bedf0; 1 drivers +v0x2946ee0_0 .net *"_s77", 0 0, L_0x29bf500; 1 drivers +v0x2946f80_0 .net *"_s78", 0 0, L_0x28d3e60; 1 drivers +v0x2947020_0 .net *"_s81", 0 0, L_0x29bf3c0; 1 drivers +v0x2947490_0 .net *"_s83", 0 0, L_0x29bf790; 1 drivers +v0x2947530_0 .net *"_s84", 0 0, L_0x29bf6e0; 1 drivers +v0x29471d0_0 .net *"_s87", 0 0, L_0x29bdc40; 1 drivers +v0x2947270_0 .net *"_s89", 0 0, L_0x29bf830; 1 drivers +v0x2947310_0 .net *"_s9", 0 0, L_0x29bcb90; 1 drivers +v0x29473b0_0 .net *"_s90", 0 0, L_0x29bf920; 1 drivers +v0x29478a0_0 .net *"_s93", 0 0, L_0x29bff30; 1 drivers +v0x2947920_0 .net *"_s95", 0 0, L_0x29bffd0; 1 drivers +v0x29475d0_0 .net *"_s96", 0 0, L_0x29bfe50; 1 drivers +v0x2947670_0 .net *"_s99", 0 0, L_0x29c0250; 1 drivers +v0x2947710_0 .alias "a", 31 0, v0x2980e00_0; +v0x2947790_0 .alias "b", 31 0, v0x2970880_0; +v0x2947810_0 .alias "out", 31 0, v0x2970180_0; +L_0x29b84a0 .part/pv L_0x29b8590, 0, 1, 32; +L_0x29bc860 .part L_0x2989450, 0, 1; +L_0x29bc950 .part v0x2970590_0, 0, 1; +L_0x29bca40 .part/pv L_0x29bcae0, 1, 1, 32; +L_0x29bcb90 .part L_0x2989450, 1, 1; +L_0x29bcc80 .part v0x2970590_0, 1, 1; +L_0x29bcd70 .part/pv L_0x29bcea0, 2, 1, 32; +L_0x29bcf00 .part L_0x2989450, 2, 1; +L_0x29bd040 .part v0x2970590_0, 2, 1; +L_0x29bd130 .part/pv L_0x29bd230, 3, 1, 32; +L_0x29bd290 .part L_0x2989450, 3, 1; +L_0x29bd380 .part v0x2970590_0, 3, 1; +L_0x29bd470 .part/pv L_0x29bd1d0, 4, 1, 32; +L_0x29bd560 .part L_0x2989450, 4, 1; +L_0x29bd650 .part v0x2970590_0, 4, 1; +L_0x29bd740 .part/pv L_0x29bd870, 5, 1, 32; +L_0x29bd920 .part L_0x2989450, 5, 1; +L_0x29bda10 .part v0x2970590_0, 5, 1; +L_0x29bdba0 .part/pv L_0x29bd7e0, 6, 1, 32; +L_0x29bdd50 .part L_0x2989450, 6, 1; +L_0x29bdb00 .part v0x2970590_0, 6, 1; +L_0x29bdf40 .part/pv L_0x29bde40, 7, 1, 32; +L_0x29be0f0 .part L_0x2989450, 7, 1; +L_0x29be1e0 .part v0x2970590_0, 7, 1; +L_0x29bdfe0 .part/pv L_0x29be3a0, 8, 1, 32; +L_0x29be450 .part L_0x2989450, 8, 1; +L_0x29be2d0 .part v0x2970590_0, 8, 1; +L_0x29be670 .part/pv L_0x29be540, 9, 1, 32; +L_0x29be860 .part L_0x2989450, 9, 1; +L_0x29be900 .part v0x2970590_0, 9, 1; +L_0x29be710 .part/pv L_0x29beaf0, 10, 1, 32; +L_0x29beb50 .part L_0x2989450, 10, 1; +L_0x29be9f0 .part v0x2970590_0, 10, 1; +L_0x29bed50 .part/pv L_0x29bec40, 11, 1, 32; +L_0x29bef10 .part L_0x2989450, 11, 1; +L_0x29aba00 .part v0x2970590_0, 11, 1; +L_0x29abaf0 .part/pv L_0x2727f00, 12, 1, 32; +L_0x29bedf0 .part L_0x2989450, 12, 1; +L_0x29bf500 .part v0x2970590_0, 12, 1; +L_0x29bf5a0 .part/pv L_0x28d3e60, 13, 1, 32; +L_0x29bf3c0 .part L_0x2989450, 13, 1; +L_0x29bf790 .part v0x2970590_0, 13, 1; +L_0x29bf640 .part/pv L_0x29bf6e0, 14, 1, 32; +L_0x29bdc40 .part L_0x2989450, 14, 1; +L_0x29bf830 .part v0x2970590_0, 14, 1; +L_0x29bfd10 .part/pv L_0x29bf920, 15, 1, 32; +L_0x29bff30 .part L_0x2989450, 15, 1; +L_0x29bffd0 .part v0x2970590_0, 15, 1; +L_0x29bfdb0 .part/pv L_0x29bfe50, 16, 1, 32; +L_0x29c0250 .part L_0x2989450, 16, 1; +L_0x29c00c0 .part v0x2970590_0, 16, 1; +L_0x29c01b0 .part/pv L_0x29c04f0, 17, 1, 32; +L_0x29c0640 .part L_0x2989450, 17, 1; +L_0x29c06e0 .part v0x2970590_0, 17, 1; +L_0x29c0340 .part/pv L_0x29c03e0, 18, 1, 32; +L_0x29c0990 .part L_0x2989450, 18, 1; +L_0x29c07d0 .part v0x2970590_0, 18, 1; +L_0x29c08c0 .part/pv L_0x29c0c10, 19, 1, 32; +L_0x29c05a0 .part L_0x2989450, 19, 1; +L_0x29c0dc0 .part v0x2970590_0, 19, 1; +L_0x29c0a30 .part/pv L_0x29c0ad0, 20, 1, 32; +L_0x29c10a0 .part L_0x2989450, 20, 1; +L_0x29c0eb0 .part v0x2970590_0, 20, 1; +L_0x29c0fa0 .part/pv L_0x29c1040, 21, 1, 32; +L_0x29c0cc0 .part L_0x2989450, 21, 1; +L_0x29c14b0 .part v0x2970590_0, 21, 1; +L_0x29c1140 .part/pv L_0x29c11e0, 22, 1, 32; +L_0x29c1290 .part L_0x2989450, 22, 1; +L_0x29c15a0 .part v0x2970590_0, 22, 1; +L_0x29c1690 .part/pv L_0x29c1730, 23, 1, 32; +L_0x29c13a0 .part L_0x2989450, 23, 1; +L_0x29c1bc0 .part v0x2970590_0, 23, 1; +L_0x29c1810 .part/pv L_0x29c18b0, 24, 1, 32; +L_0x29c1960 .part L_0x2989450, 24, 1; +L_0x29c1f10 .part v0x2970590_0, 24, 1; +L_0x29c2000 .part/pv L_0x29c1cb0, 25, 1, 32; +L_0x29c1e40 .part L_0x2989450, 25, 1; +L_0x29c2310 .part v0x2970590_0, 25, 1; +L_0x29c20a0 .part/pv L_0x29c2140, 26, 1, 32; +L_0x29c21f0 .part L_0x2989450, 26, 1; +L_0x29c2640 .part v0x2970590_0, 26, 1; +L_0x29c2730 .part/pv L_0x29c23b0, 27, 1, 32; +L_0x29c1d60 .part L_0x2989450, 27, 1; +L_0x29c25a0 .part v0x2970590_0, 27, 1; +L_0x29c27d0 .part/pv L_0x29c2870, 28, 1, 32; +L_0x29c2920 .part L_0x2989450, 28, 1; +L_0x29c2d80 .part v0x2970590_0, 28, 1; +L_0x29c2e20 .part/pv L_0x29c2ac0, 29, 1, 32; +L_0x29c2460 .part L_0x2989450, 29, 1; +L_0x29c2c70 .part v0x2970590_0, 29, 1; +L_0x29c31a0 .part/pv L_0x2944ea0, 30, 1, 32; +L_0x29bb750 .part L_0x2989450, 30, 1; +L_0x29bf990 .part v0x2970590_0, 30, 1; +L_0x29bfa80 .part/pv L_0x29bfb20, 31, 1, 32; +L_0x29c2b70 .part L_0x2989450, 31, 1; +L_0x29c3020 .part v0x2970590_0, 31, 1; +S_0x29356e0 .scope module, "slt0" "full_slt_32bit" 18 36, 21 37, S_0x28a5ac0; + .timescale 0 0; +v0x2941d00_0 .net *"_s129", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x2941dc0_0 .alias "a", 31 0, v0x2980e00_0; +v0x2941ed0_0 .alias "b", 31 0, v0x2970880_0; +v0x2941fe0_0 .alias "out", 31 0, v0x2970050_0; +v0x2942090_0 .net "slt0", 0 0, L_0x29c3b70; 1 drivers +v0x2942110_0 .net "slt1", 0 0, L_0x29c4160; 1 drivers +v0x2942190_0 .net "slt10", 0 0, L_0x29c72b0; 1 drivers +v0x2942260_0 .net "slt11", 0 0, L_0x29c7800; 1 drivers +v0x2942380_0 .net "slt12", 0 0, L_0x29bf2c0; 1 drivers +v0x2942450_0 .net "slt13", 0 0, L_0x29c8610; 1 drivers +v0x29424d0_0 .net "slt14", 0 0, L_0x29c8b80; 1 drivers +v0x29425a0_0 .net "slt15", 0 0, L_0x29c9100; 1 drivers +v0x2942670_0 .net "slt16", 0 0, L_0x29c9690; 1 drivers +v0x2942740_0 .net "slt17", 0 0, L_0x29c9be0; 1 drivers +v0x2942890_0 .net "slt18", 0 0, L_0x29ca140; 1 drivers +v0x2942960_0 .net "slt19", 0 0, L_0x29ca6b0; 1 drivers +v0x29427c0_0 .net "slt2", 0 0, L_0x29c46a0; 1 drivers +v0x2942b10_0 .net "slt20", 0 0, L_0x29cac30; 1 drivers +v0x2942c30_0 .net "slt21", 0 0, L_0x29cb1c0; 1 drivers +v0x2942d00_0 .net "slt22", 0 0, L_0x2991bd0; 1 drivers +v0x2942e30_0 .net "slt23", 0 0, L_0x29cc4a0; 1 drivers +v0x2942eb0_0 .net "slt24", 0 0, L_0x29cca10; 1 drivers +v0x2942ff0_0 .net "slt25", 0 0, L_0x29ccf90; 1 drivers +v0x2943070_0 .net "slt26", 0 0, L_0x2942dd0; 1 drivers +v0x29431c0_0 .net "slt27", 0 0, L_0x29cda60; 1 drivers +v0x2943240_0 .net "slt28", 0 0, L_0x29cdfb0; 1 drivers +v0x2943140_0 .net "slt29", 0 0, L_0x29ce510; 1 drivers +v0x29433f0_0 .net "slt3", 0 0, L_0x29c4be0; 1 drivers +v0x2943310_0 .net "slt30", 0 0, L_0x29cea80; 1 drivers +v0x29435b0_0 .net "slt4", 0 0, L_0x29c5170; 1 drivers +v0x29434c0_0 .net "slt5", 0 0, L_0x29c56c0; 1 drivers +v0x2943780_0 .net "slt6", 0 0, L_0x29c5c10; 1 drivers +v0x2943680_0 .net "slt7", 0 0, L_0x29c61d0; 1 drivers +v0x2943960_0 .net "slt8", 0 0, L_0x29c67a0; 1 drivers +v0x2943850_0 .net "slt9", 0 0, L_0x29c6d20; 1 drivers +L_0x29c3c70 .part L_0x2989450, 0, 1; +L_0x29c3d60 .part v0x2970590_0, 0, 1; +L_0x29c4210 .part L_0x2989450, 1, 1; +L_0x29c4300 .part v0x2970590_0, 1, 1; +L_0x29c4750 .part L_0x2989450, 2, 1; +L_0x29c4840 .part v0x2970590_0, 2, 1; +L_0x29c4c90 .part L_0x2989450, 3, 1; +L_0x29c4d80 .part v0x2970590_0, 3, 1; +L_0x29c5220 .part L_0x2989450, 4, 1; +L_0x29c5310 .part v0x2970590_0, 4, 1; +L_0x29c5770 .part L_0x2989450, 5, 1; +L_0x29c5860 .part v0x2970590_0, 5, 1; +L_0x29c5cc0 .part L_0x2989450, 6, 1; +L_0x29c5db0 .part v0x2970590_0, 6, 1; +L_0x29c6280 .part L_0x2989450, 7, 1; +L_0x29c6370 .part v0x2970590_0, 7, 1; +L_0x29c6850 .part L_0x2989450, 8, 1; +L_0x29c6940 .part v0x2970590_0, 8, 1; +L_0x29c6dd0 .part L_0x2989450, 9, 1; +L_0x29c6ec0 .part v0x2970590_0, 9, 1; +L_0x29c7360 .part L_0x2989450, 10, 1; +L_0x29c7450 .part v0x2970590_0, 10, 1; +L_0x29c78b0 .part L_0x2989450, 11, 1; +L_0x29befb0 .part v0x2970590_0, 11, 1; +L_0x29c81b0 .part L_0x2989450, 12, 1; +L_0x29c8250 .part v0x2970590_0, 12, 1; +L_0x29c86c0 .part L_0x2989450, 13, 1; +L_0x29c87b0 .part v0x2970590_0, 13, 1; +L_0x29c8c30 .part L_0x2989450, 14, 1; +L_0x29c8d20 .part v0x2970590_0, 14, 1; +L_0x29c91b0 .part L_0x2989450, 15, 1; +L_0x29c92a0 .part v0x2970590_0, 15, 1; +L_0x29c9740 .part L_0x2989450, 16, 1; +L_0x29c9830 .part v0x2970590_0, 16, 1; +L_0x29c9c90 .part L_0x2989450, 17, 1; +L_0x29c9d80 .part v0x2970590_0, 17, 1; +L_0x29ca1f0 .part L_0x2989450, 18, 1; +L_0x29ca2e0 .part v0x2970590_0, 18, 1; +L_0x29ca760 .part L_0x2989450, 19, 1; +L_0x29ca850 .part v0x2970590_0, 19, 1; +L_0x29cace0 .part L_0x2989450, 20, 1; +L_0x29cadd0 .part v0x2970590_0, 20, 1; +L_0x29cb270 .part L_0x2989450, 21, 1; +L_0x29cb360 .part v0x2970590_0, 21, 1; +L_0x2991c80 .part L_0x2989450, 22, 1; +L_0x2991d70 .part v0x2970590_0, 22, 1; +L_0x29cc550 .part L_0x2989450, 23, 1; +L_0x29cc640 .part v0x2970590_0, 23, 1; +L_0x29ccac0 .part L_0x2989450, 24, 1; +L_0x29ccbb0 .part v0x2970590_0, 24, 1; +L_0x29cd040 .part L_0x2989450, 25, 1; +L_0x29cd130 .part v0x2970590_0, 25, 1; +L_0x29cd5c0 .part L_0x2989450, 26, 1; +L_0x29cd6b0 .part v0x2970590_0, 26, 1; +L_0x29cdb10 .part L_0x2989450, 27, 1; +L_0x29cdc00 .part v0x2970590_0, 27, 1; +L_0x29ce060 .part L_0x2989450, 28, 1; +L_0x29ce150 .part v0x2970590_0, 28, 1; +L_0x29ce5c0 .part L_0x2989450, 29, 1; +L_0x29ce6b0 .part v0x2970590_0, 29, 1; +L_0x29ceb30 .part L_0x2989450, 30, 1; +L_0x29cec20 .part v0x2970590_0, 30, 1; +L_0x29cf0b0 .concat [ 1 31 0 0], L_0x29cf000, C4<0000000000000000000000000000000>; +L_0x29cf240 .part L_0x2989450, 31, 1; +L_0x29cecc0 .part v0x2970590_0, 31, 1; +S_0x29416d0 .scope module, "bit0" "single_slt" 21 74, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c3110 .functor XOR 1, L_0x29c3c70, L_0x29c3d60, C4<0>, C4<0>; +L_0x29c3960 .functor AND 1, L_0x29c3d60, L_0x29c3110, C4<1>, C4<1>; +L_0x29c3a60 .functor NOT 1, L_0x29c3110, C4<0>, C4<0>, C4<0>; +L_0x29c3ac0 .functor AND 1, L_0x29c3a60, C4<0>, C4<1>, C4<1>; +L_0x29c3b70 .functor OR 1, L_0x29c3960, L_0x29c3ac0, C4<0>, C4<0>; +v0x29417c0_0 .net "a", 0 0, L_0x29c3c70; 1 drivers +v0x2941880_0 .net "abxor", 0 0, L_0x29c3110; 1 drivers +v0x2941920_0 .net "b", 0 0, L_0x29c3d60; 1 drivers +v0x29419c0_0 .net "bxorand", 0 0, L_0x29c3960; 1 drivers +v0x2941a70_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x2941b10_0 .alias "out", 0 0, v0x2942090_0; +v0x2941b90_0 .net "xornot", 0 0, L_0x29c3a60; 1 drivers +v0x2941c10_0 .net "xornotand", 0 0, L_0x29c3ac0; 1 drivers +S_0x29410a0 .scope module, "bit1" "single_slt" 21 75, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c3eb0 .functor XOR 1, L_0x29c4210, L_0x29c4300, C4<0>, C4<0>; +L_0x29c3f10 .functor AND 1, L_0x29c4300, L_0x29c3eb0, C4<1>, C4<1>; +L_0x29c3fc0 .functor NOT 1, L_0x29c3eb0, C4<0>, C4<0>, C4<0>; +L_0x29c4020 .functor AND 1, L_0x29c3fc0, L_0x29c3b70, C4<1>, C4<1>; +L_0x29c4160 .functor OR 1, L_0x29c3f10, L_0x29c4020, C4<0>, C4<0>; +v0x2941190_0 .net "a", 0 0, L_0x29c4210; 1 drivers +v0x2941250_0 .net "abxor", 0 0, L_0x29c3eb0; 1 drivers +v0x29412f0_0 .net "b", 0 0, L_0x29c4300; 1 drivers +v0x2941390_0 .net "bxorand", 0 0, L_0x29c3f10; 1 drivers +v0x2941440_0 .alias "defaultCompare", 0 0, v0x2942090_0; +v0x29414e0_0 .alias "out", 0 0, v0x2942110_0; +v0x2941560_0 .net "xornot", 0 0, L_0x29c3fc0; 1 drivers +v0x29415e0_0 .net "xornotand", 0 0, L_0x29c4020; 1 drivers +S_0x2940a70 .scope module, "bit2" "single_slt" 21 76, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c43a0 .functor XOR 1, L_0x29c4750, L_0x29c4840, C4<0>, C4<0>; +L_0x29c4400 .functor AND 1, L_0x29c4840, L_0x29c43a0, C4<1>, C4<1>; +L_0x29c4500 .functor NOT 1, L_0x29c43a0, C4<0>, C4<0>, C4<0>; +L_0x29c4560 .functor AND 1, L_0x29c4500, L_0x29c4160, C4<1>, C4<1>; +L_0x29c46a0 .functor OR 1, L_0x29c4400, L_0x29c4560, C4<0>, C4<0>; +v0x2940b60_0 .net "a", 0 0, L_0x29c4750; 1 drivers +v0x2940c20_0 .net "abxor", 0 0, L_0x29c43a0; 1 drivers +v0x2940cc0_0 .net "b", 0 0, L_0x29c4840; 1 drivers +v0x2940d60_0 .net "bxorand", 0 0, L_0x29c4400; 1 drivers +v0x2940e10_0 .alias "defaultCompare", 0 0, v0x2942110_0; +v0x2940eb0_0 .alias "out", 0 0, v0x29427c0_0; +v0x2940f30_0 .net "xornot", 0 0, L_0x29c4500; 1 drivers +v0x2940fb0_0 .net "xornotand", 0 0, L_0x29c4560; 1 drivers +S_0x2940440 .scope module, "bit3" "single_slt" 21 77, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c48e0 .functor XOR 1, L_0x29c4c90, L_0x29c4d80, C4<0>, C4<0>; +L_0x29c4940 .functor AND 1, L_0x29c4d80, L_0x29c48e0, C4<1>, C4<1>; +L_0x29c4a40 .functor NOT 1, L_0x29c48e0, C4<0>, C4<0>, C4<0>; +L_0x29c4aa0 .functor AND 1, L_0x29c4a40, L_0x29c46a0, C4<1>, C4<1>; +L_0x29c4be0 .functor OR 1, L_0x29c4940, L_0x29c4aa0, C4<0>, C4<0>; +v0x2940530_0 .net "a", 0 0, L_0x29c4c90; 1 drivers +v0x29405f0_0 .net "abxor", 0 0, L_0x29c48e0; 1 drivers +v0x2940690_0 .net "b", 0 0, L_0x29c4d80; 1 drivers +v0x2940730_0 .net "bxorand", 0 0, L_0x29c4940; 1 drivers +v0x29407e0_0 .alias "defaultCompare", 0 0, v0x29427c0_0; +v0x2940880_0 .alias "out", 0 0, v0x29433f0_0; +v0x2940900_0 .net "xornot", 0 0, L_0x29c4a40; 1 drivers +v0x2940980_0 .net "xornotand", 0 0, L_0x29c4aa0; 1 drivers +S_0x293fe10 .scope module, "bit4" "single_slt" 21 78, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c4e70 .functor XOR 1, L_0x29c5220, L_0x29c5310, C4<0>, C4<0>; +L_0x29c4ed0 .functor AND 1, L_0x29c5310, L_0x29c4e70, C4<1>, C4<1>; +L_0x29c4fd0 .functor NOT 1, L_0x29c4e70, C4<0>, C4<0>, C4<0>; +L_0x29c5030 .functor AND 1, L_0x29c4fd0, L_0x29c4be0, C4<1>, C4<1>; +L_0x29c5170 .functor OR 1, L_0x29c4ed0, L_0x29c5030, C4<0>, C4<0>; +v0x293ff00_0 .net "a", 0 0, L_0x29c5220; 1 drivers +v0x293ffc0_0 .net "abxor", 0 0, L_0x29c4e70; 1 drivers +v0x2940060_0 .net "b", 0 0, L_0x29c5310; 1 drivers +v0x2940100_0 .net "bxorand", 0 0, L_0x29c4ed0; 1 drivers +v0x29401b0_0 .alias "defaultCompare", 0 0, v0x29433f0_0; +v0x2940250_0 .alias "out", 0 0, v0x29435b0_0; +v0x29402d0_0 .net "xornot", 0 0, L_0x29c4fd0; 1 drivers +v0x2940350_0 .net "xornotand", 0 0, L_0x29c5030; 1 drivers +S_0x293f7e0 .scope module, "bit5" "single_slt" 21 79, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c5410 .functor XOR 1, L_0x29c5770, L_0x29c5860, C4<0>, C4<0>; +L_0x29c5470 .functor AND 1, L_0x29c5860, L_0x29c5410, C4<1>, C4<1>; +L_0x29c5520 .functor NOT 1, L_0x29c5410, C4<0>, C4<0>, C4<0>; +L_0x29c5580 .functor AND 1, L_0x29c5520, L_0x29c5170, C4<1>, C4<1>; +L_0x29c56c0 .functor OR 1, L_0x29c5470, L_0x29c5580, C4<0>, C4<0>; +v0x293f8d0_0 .net "a", 0 0, L_0x29c5770; 1 drivers +v0x293f990_0 .net "abxor", 0 0, L_0x29c5410; 1 drivers +v0x293fa30_0 .net "b", 0 0, L_0x29c5860; 1 drivers +v0x293fad0_0 .net "bxorand", 0 0, L_0x29c5470; 1 drivers +v0x293fb80_0 .alias "defaultCompare", 0 0, v0x29435b0_0; +v0x293fc20_0 .alias "out", 0 0, v0x29434c0_0; +v0x293fca0_0 .net "xornot", 0 0, L_0x29c5520; 1 drivers +v0x293fd20_0 .net "xornotand", 0 0, L_0x29c5580; 1 drivers +S_0x293f1b0 .scope module, "bit6" "single_slt" 21 80, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c53b0 .functor XOR 1, L_0x29c5cc0, L_0x29c5db0, C4<0>, C4<0>; +L_0x29c5970 .functor AND 1, L_0x29c5db0, L_0x29c53b0, C4<1>, C4<1>; +L_0x29c5a70 .functor NOT 1, L_0x29c53b0, C4<0>, C4<0>, C4<0>; +L_0x29c5ad0 .functor AND 1, L_0x29c5a70, L_0x29c56c0, C4<1>, C4<1>; +L_0x29c5c10 .functor OR 1, L_0x29c5970, L_0x29c5ad0, C4<0>, C4<0>; +v0x293f2a0_0 .net "a", 0 0, L_0x29c5cc0; 1 drivers +v0x293f360_0 .net "abxor", 0 0, L_0x29c53b0; 1 drivers +v0x293f400_0 .net "b", 0 0, L_0x29c5db0; 1 drivers +v0x293f4a0_0 .net "bxorand", 0 0, L_0x29c5970; 1 drivers +v0x293f550_0 .alias "defaultCompare", 0 0, v0x29434c0_0; +v0x293f5f0_0 .alias "out", 0 0, v0x2943780_0; +v0x293f670_0 .net "xornot", 0 0, L_0x29c5a70; 1 drivers +v0x293f6f0_0 .net "xornotand", 0 0, L_0x29c5ad0; 1 drivers +S_0x293eb80 .scope module, "bit7" "single_slt" 21 81, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c5ed0 .functor XOR 1, L_0x29c6280, L_0x29c6370, C4<0>, C4<0>; +L_0x29c5f30 .functor AND 1, L_0x29c6370, L_0x29c5ed0, C4<1>, C4<1>; +L_0x29c6030 .functor NOT 1, L_0x29c5ed0, C4<0>, C4<0>, C4<0>; +L_0x29c6090 .functor AND 1, L_0x29c6030, L_0x29c5c10, C4<1>, C4<1>; +L_0x29c61d0 .functor OR 1, L_0x29c5f30, L_0x29c6090, C4<0>, C4<0>; +v0x293ec70_0 .net "a", 0 0, L_0x29c6280; 1 drivers +v0x293ed30_0 .net "abxor", 0 0, L_0x29c5ed0; 1 drivers +v0x293edd0_0 .net "b", 0 0, L_0x29c6370; 1 drivers +v0x293ee70_0 .net "bxorand", 0 0, L_0x29c5f30; 1 drivers +v0x293ef20_0 .alias "defaultCompare", 0 0, v0x2943780_0; +v0x293efc0_0 .alias "out", 0 0, v0x2943680_0; +v0x293f040_0 .net "xornot", 0 0, L_0x29c6030; 1 drivers +v0x293f0c0_0 .net "xornotand", 0 0, L_0x29c6090; 1 drivers +S_0x293e550 .scope module, "bit8" "single_slt" 21 82, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c64a0 .functor XOR 1, L_0x29c6850, L_0x29c6940, C4<0>, C4<0>; +L_0x29c6500 .functor AND 1, L_0x29c6940, L_0x29c64a0, C4<1>, C4<1>; +L_0x29c6600 .functor NOT 1, L_0x29c64a0, C4<0>, C4<0>, C4<0>; +L_0x29c6660 .functor AND 1, L_0x29c6600, L_0x29c61d0, C4<1>, C4<1>; +L_0x29c67a0 .functor OR 1, L_0x29c6500, L_0x29c6660, C4<0>, C4<0>; +v0x293e640_0 .net "a", 0 0, L_0x29c6850; 1 drivers +v0x293e700_0 .net "abxor", 0 0, L_0x29c64a0; 1 drivers +v0x293e7a0_0 .net "b", 0 0, L_0x29c6940; 1 drivers +v0x293e840_0 .net "bxorand", 0 0, L_0x29c6500; 1 drivers +v0x293e8f0_0 .alias "defaultCompare", 0 0, v0x2943680_0; +v0x293e990_0 .alias "out", 0 0, v0x2943960_0; +v0x293ea10_0 .net "xornot", 0 0, L_0x29c6600; 1 drivers +v0x293ea90_0 .net "xornotand", 0 0, L_0x29c6660; 1 drivers +S_0x293df20 .scope module, "bit9" "single_slt" 21 83, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c6410 .functor XOR 1, L_0x29c6dd0, L_0x29c6ec0, C4<0>, C4<0>; +L_0x29c6a80 .functor AND 1, L_0x29c6ec0, L_0x29c6410, C4<1>, C4<1>; +L_0x29c6b80 .functor NOT 1, L_0x29c6410, C4<0>, C4<0>, C4<0>; +L_0x29c6be0 .functor AND 1, L_0x29c6b80, L_0x29c67a0, C4<1>, C4<1>; +L_0x29c6d20 .functor OR 1, L_0x29c6a80, L_0x29c6be0, C4<0>, C4<0>; +v0x293e010_0 .net "a", 0 0, L_0x29c6dd0; 1 drivers +v0x293e0d0_0 .net "abxor", 0 0, L_0x29c6410; 1 drivers +v0x293e170_0 .net "b", 0 0, L_0x29c6ec0; 1 drivers +v0x293e210_0 .net "bxorand", 0 0, L_0x29c6a80; 1 drivers +v0x293e2c0_0 .alias "defaultCompare", 0 0, v0x2943960_0; +v0x293e360_0 .alias "out", 0 0, v0x2943850_0; +v0x293e3e0_0 .net "xornot", 0 0, L_0x29c6b80; 1 drivers +v0x293e460_0 .net "xornotand", 0 0, L_0x29c6be0; 1 drivers +S_0x293d8f0 .scope module, "bit10" "single_slt" 21 84, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c69e0 .functor XOR 1, L_0x29c7360, L_0x29c7450, C4<0>, C4<0>; +L_0x29c7010 .functor AND 1, L_0x29c7450, L_0x29c69e0, C4<1>, C4<1>; +L_0x29c7110 .functor NOT 1, L_0x29c69e0, C4<0>, C4<0>, C4<0>; +L_0x29c7170 .functor AND 1, L_0x29c7110, L_0x29c6d20, C4<1>, C4<1>; +L_0x29c72b0 .functor OR 1, L_0x29c7010, L_0x29c7170, C4<0>, C4<0>; +v0x293d9e0_0 .net "a", 0 0, L_0x29c7360; 1 drivers +v0x293daa0_0 .net "abxor", 0 0, L_0x29c69e0; 1 drivers +v0x293db40_0 .net "b", 0 0, L_0x29c7450; 1 drivers +v0x293dbe0_0 .net "bxorand", 0 0, L_0x29c7010; 1 drivers +v0x293dc90_0 .alias "defaultCompare", 0 0, v0x2943850_0; +v0x293dd30_0 .alias "out", 0 0, v0x2942190_0; +v0x293ddb0_0 .net "xornot", 0 0, L_0x29c7110; 1 drivers +v0x293de30_0 .net "xornotand", 0 0, L_0x29c7170; 1 drivers +S_0x293d2c0 .scope module, "bit11" "single_slt" 21 85, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c6f60 .functor XOR 1, L_0x29c78b0, L_0x29befb0, C4<0>, C4<0>; +L_0x29c75b0 .functor AND 1, L_0x29befb0, L_0x29c6f60, C4<1>, C4<1>; +L_0x29c7660 .functor NOT 1, L_0x29c6f60, C4<0>, C4<0>, C4<0>; +L_0x29c76c0 .functor AND 1, L_0x29c7660, L_0x29c72b0, C4<1>, C4<1>; +L_0x29c7800 .functor OR 1, L_0x29c75b0, L_0x29c76c0, C4<0>, C4<0>; +v0x293d3b0_0 .net "a", 0 0, L_0x29c78b0; 1 drivers +v0x293d470_0 .net "abxor", 0 0, L_0x29c6f60; 1 drivers +v0x293d510_0 .net "b", 0 0, L_0x29befb0; 1 drivers +v0x293d5b0_0 .net "bxorand", 0 0, L_0x29c75b0; 1 drivers +v0x293d660_0 .alias "defaultCompare", 0 0, v0x2942190_0; +v0x293d700_0 .alias "out", 0 0, v0x2942260_0; +v0x293d780_0 .net "xornot", 0 0, L_0x29c7660; 1 drivers +v0x293d800_0 .net "xornotand", 0 0, L_0x29c76c0; 1 drivers +S_0x293cc90 .scope module, "bit12" "single_slt" 21 86, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c5900 .functor XOR 1, L_0x29c81b0, L_0x29c8250, C4<0>, C4<0>; +L_0x29c5e50 .functor AND 1, L_0x29c8250, L_0x29c5900, C4<1>, C4<1>; +L_0x29bf120 .functor NOT 1, L_0x29c5900, C4<0>, C4<0>, C4<0>; +L_0x29bf180 .functor AND 1, L_0x29bf120, L_0x29c7800, C4<1>, C4<1>; +L_0x29bf2c0 .functor OR 1, L_0x29c5e50, L_0x29bf180, C4<0>, C4<0>; +v0x293cd80_0 .net "a", 0 0, L_0x29c81b0; 1 drivers +v0x293ce40_0 .net "abxor", 0 0, L_0x29c5900; 1 drivers +v0x293cee0_0 .net "b", 0 0, L_0x29c8250; 1 drivers +v0x293cf80_0 .net "bxorand", 0 0, L_0x29c5e50; 1 drivers +v0x293d030_0 .alias "defaultCompare", 0 0, v0x2942260_0; +v0x293d0d0_0 .alias "out", 0 0, v0x2942380_0; +v0x293d150_0 .net "xornot", 0 0, L_0x29bf120; 1 drivers +v0x293d1d0_0 .net "xornotand", 0 0, L_0x29bf180; 1 drivers +S_0x293c660 .scope module, "bit13" "single_slt" 21 87, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29bf050 .functor XOR 1, L_0x29c86c0, L_0x29c87b0, C4<0>, C4<0>; +L_0x29bf0b0 .functor AND 1, L_0x29c87b0, L_0x29bf050, C4<1>, C4<1>; +L_0x29c8470 .functor NOT 1, L_0x29bf050, C4<0>, C4<0>, C4<0>; +L_0x29c84d0 .functor AND 1, L_0x29c8470, L_0x29bf2c0, C4<1>, C4<1>; +L_0x29c8610 .functor OR 1, L_0x29bf0b0, L_0x29c84d0, C4<0>, C4<0>; +v0x293c750_0 .net "a", 0 0, L_0x29c86c0; 1 drivers +v0x293c810_0 .net "abxor", 0 0, L_0x29bf050; 1 drivers +v0x293c8b0_0 .net "b", 0 0, L_0x29c87b0; 1 drivers +v0x293c950_0 .net "bxorand", 0 0, L_0x29bf0b0; 1 drivers +v0x293ca00_0 .alias "defaultCompare", 0 0, v0x2942380_0; +v0x293caa0_0 .alias "out", 0 0, v0x2942450_0; +v0x293cb20_0 .net "xornot", 0 0, L_0x29c8470; 1 drivers +v0x293cba0_0 .net "xornotand", 0 0, L_0x29c84d0; 1 drivers +S_0x293c030 .scope module, "bit14" "single_slt" 21 88, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c82f0 .functor XOR 1, L_0x29c8c30, L_0x29c8d20, C4<0>, C4<0>; +L_0x29c8350 .functor AND 1, L_0x29c8d20, L_0x29c82f0, C4<1>, C4<1>; +L_0x29c89e0 .functor NOT 1, L_0x29c82f0, C4<0>, C4<0>, C4<0>; +L_0x29c8a40 .functor AND 1, L_0x29c89e0, L_0x29c8610, C4<1>, C4<1>; +L_0x29c8b80 .functor OR 1, L_0x29c8350, L_0x29c8a40, C4<0>, C4<0>; +v0x293c120_0 .net "a", 0 0, L_0x29c8c30; 1 drivers +v0x293c1e0_0 .net "abxor", 0 0, L_0x29c82f0; 1 drivers +v0x293c280_0 .net "b", 0 0, L_0x29c8d20; 1 drivers +v0x293c320_0 .net "bxorand", 0 0, L_0x29c8350; 1 drivers +v0x293c3d0_0 .alias "defaultCompare", 0 0, v0x2942450_0; +v0x293c470_0 .alias "out", 0 0, v0x29424d0_0; +v0x293c4f0_0 .net "xornot", 0 0, L_0x29c89e0; 1 drivers +v0x293c570_0 .net "xornotand", 0 0, L_0x29c8a40; 1 drivers +S_0x293ba00 .scope module, "bit15" "single_slt" 21 89, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c8850 .functor XOR 1, L_0x29c91b0, L_0x29c92a0, C4<0>, C4<0>; +L_0x29c88b0 .functor AND 1, L_0x29c92a0, L_0x29c8850, C4<1>, C4<1>; +L_0x29c8f60 .functor NOT 1, L_0x29c8850, C4<0>, C4<0>, C4<0>; +L_0x29c8fc0 .functor AND 1, L_0x29c8f60, L_0x29c8b80, C4<1>, C4<1>; +L_0x29c9100 .functor OR 1, L_0x29c88b0, L_0x29c8fc0, C4<0>, C4<0>; +v0x293baf0_0 .net "a", 0 0, L_0x29c91b0; 1 drivers +v0x293bbb0_0 .net "abxor", 0 0, L_0x29c8850; 1 drivers +v0x293bc50_0 .net "b", 0 0, L_0x29c92a0; 1 drivers +v0x293bcf0_0 .net "bxorand", 0 0, L_0x29c88b0; 1 drivers +v0x293bda0_0 .alias "defaultCompare", 0 0, v0x29424d0_0; +v0x293be40_0 .alias "out", 0 0, v0x29425a0_0; +v0x293bec0_0 .net "xornot", 0 0, L_0x29c8f60; 1 drivers +v0x293bf40_0 .net "xornotand", 0 0, L_0x29c8fc0; 1 drivers +S_0x293b3d0 .scope module, "bit16" "single_slt" 21 90, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c8dc0 .functor XOR 1, L_0x29c9740, L_0x29c9830, C4<0>, C4<0>; +L_0x29c8e20 .functor AND 1, L_0x29c9830, L_0x29c8dc0, C4<1>, C4<1>; +L_0x29c94f0 .functor NOT 1, L_0x29c8dc0, C4<0>, C4<0>, C4<0>; +L_0x29c9550 .functor AND 1, L_0x29c94f0, L_0x29c9100, C4<1>, C4<1>; +L_0x29c9690 .functor OR 1, L_0x29c8e20, L_0x29c9550, C4<0>, C4<0>; +v0x293b4c0_0 .net "a", 0 0, L_0x29c9740; 1 drivers +v0x293b580_0 .net "abxor", 0 0, L_0x29c8dc0; 1 drivers +v0x293b620_0 .net "b", 0 0, L_0x29c9830; 1 drivers +v0x293b6c0_0 .net "bxorand", 0 0, L_0x29c8e20; 1 drivers +v0x293b770_0 .alias "defaultCompare", 0 0, v0x29425a0_0; +v0x293b810_0 .alias "out", 0 0, v0x2942670_0; +v0x293b890_0 .net "xornot", 0 0, L_0x29c94f0; 1 drivers +v0x293b910_0 .net "xornotand", 0 0, L_0x29c9550; 1 drivers +S_0x293ada0 .scope module, "bit17" "single_slt" 21 91, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c9340 .functor XOR 1, L_0x29c9c90, L_0x29c9d80, C4<0>, C4<0>; +L_0x29c93a0 .functor AND 1, L_0x29c9d80, L_0x29c9340, C4<1>, C4<1>; +L_0x29c9a40 .functor NOT 1, L_0x29c9340, C4<0>, C4<0>, C4<0>; +L_0x29c9aa0 .functor AND 1, L_0x29c9a40, L_0x29c9690, C4<1>, C4<1>; +L_0x29c9be0 .functor OR 1, L_0x29c93a0, L_0x29c9aa0, C4<0>, C4<0>; +v0x293ae90_0 .net "a", 0 0, L_0x29c9c90; 1 drivers +v0x293af50_0 .net "abxor", 0 0, L_0x29c9340; 1 drivers +v0x293aff0_0 .net "b", 0 0, L_0x29c9d80; 1 drivers +v0x293b090_0 .net "bxorand", 0 0, L_0x29c93a0; 1 drivers +v0x293b140_0 .alias "defaultCompare", 0 0, v0x2942670_0; +v0x293b1e0_0 .alias "out", 0 0, v0x2942740_0; +v0x293b260_0 .net "xornot", 0 0, L_0x29c9a40; 1 drivers +v0x293b2e0_0 .net "xornotand", 0 0, L_0x29c9aa0; 1 drivers +S_0x293a770 .scope module, "bit18" "single_slt" 21 92, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c98d0 .functor XOR 1, L_0x29ca1f0, L_0x29ca2e0, C4<0>, C4<0>; +L_0x29c9930 .functor AND 1, L_0x29ca2e0, L_0x29c98d0, C4<1>, C4<1>; +L_0x29c9fa0 .functor NOT 1, L_0x29c98d0, C4<0>, C4<0>, C4<0>; +L_0x29ca000 .functor AND 1, L_0x29c9fa0, L_0x29c9be0, C4<1>, C4<1>; +L_0x29ca140 .functor OR 1, L_0x29c9930, L_0x29ca000, C4<0>, C4<0>; +v0x293a860_0 .net "a", 0 0, L_0x29ca1f0; 1 drivers +v0x293a920_0 .net "abxor", 0 0, L_0x29c98d0; 1 drivers +v0x293a9c0_0 .net "b", 0 0, L_0x29ca2e0; 1 drivers +v0x293aa60_0 .net "bxorand", 0 0, L_0x29c9930; 1 drivers +v0x293ab10_0 .alias "defaultCompare", 0 0, v0x2942740_0; +v0x293abb0_0 .alias "out", 0 0, v0x2942890_0; +v0x293ac30_0 .net "xornot", 0 0, L_0x29c9fa0; 1 drivers +v0x293acb0_0 .net "xornotand", 0 0, L_0x29ca000; 1 drivers +S_0x293a140 .scope module, "bit19" "single_slt" 21 93, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29c9e20 .functor XOR 1, L_0x29ca760, L_0x29ca850, C4<0>, C4<0>; +L_0x29c9e80 .functor AND 1, L_0x29ca850, L_0x29c9e20, C4<1>, C4<1>; +L_0x29ca510 .functor NOT 1, L_0x29c9e20, C4<0>, C4<0>, C4<0>; +L_0x29ca570 .functor AND 1, L_0x29ca510, L_0x29ca140, C4<1>, C4<1>; +L_0x29ca6b0 .functor OR 1, L_0x29c9e80, L_0x29ca570, C4<0>, C4<0>; +v0x293a230_0 .net "a", 0 0, L_0x29ca760; 1 drivers +v0x293a2f0_0 .net "abxor", 0 0, L_0x29c9e20; 1 drivers +v0x293a390_0 .net "b", 0 0, L_0x29ca850; 1 drivers +v0x293a430_0 .net "bxorand", 0 0, L_0x29c9e80; 1 drivers +v0x293a4e0_0 .alias "defaultCompare", 0 0, v0x2942890_0; +v0x293a580_0 .alias "out", 0 0, v0x2942960_0; +v0x293a600_0 .net "xornot", 0 0, L_0x29ca510; 1 drivers +v0x293a680_0 .net "xornotand", 0 0, L_0x29ca570; 1 drivers +S_0x2939b10 .scope module, "bit20" "single_slt" 21 94, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29ca380 .functor XOR 1, L_0x29cace0, L_0x29cadd0, C4<0>, C4<0>; +L_0x29ca3e0 .functor AND 1, L_0x29cadd0, L_0x29ca380, C4<1>, C4<1>; +L_0x29caa90 .functor NOT 1, L_0x29ca380, C4<0>, C4<0>, C4<0>; +L_0x29caaf0 .functor AND 1, L_0x29caa90, L_0x29ca6b0, C4<1>, C4<1>; +L_0x29cac30 .functor OR 1, L_0x29ca3e0, L_0x29caaf0, C4<0>, C4<0>; +v0x2939c00_0 .net "a", 0 0, L_0x29cace0; 1 drivers +v0x2939cc0_0 .net "abxor", 0 0, L_0x29ca380; 1 drivers +v0x2939d60_0 .net "b", 0 0, L_0x29cadd0; 1 drivers +v0x2939e00_0 .net "bxorand", 0 0, L_0x29ca3e0; 1 drivers +v0x2939eb0_0 .alias "defaultCompare", 0 0, v0x2942960_0; +v0x2939f50_0 .alias "out", 0 0, v0x2942b10_0; +v0x2939fd0_0 .net "xornot", 0 0, L_0x29caa90; 1 drivers +v0x293a050_0 .net "xornotand", 0 0, L_0x29caaf0; 1 drivers +S_0x29394e0 .scope module, "bit21" "single_slt" 21 95, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29ca8f0 .functor XOR 1, L_0x29cb270, L_0x29cb360, C4<0>, C4<0>; +L_0x29ca950 .functor AND 1, L_0x29cb360, L_0x29ca8f0, C4<1>, C4<1>; +L_0x29cb020 .functor NOT 1, L_0x29ca8f0, C4<0>, C4<0>, C4<0>; +L_0x29cb080 .functor AND 1, L_0x29cb020, L_0x29cac30, C4<1>, C4<1>; +L_0x29cb1c0 .functor OR 1, L_0x29ca950, L_0x29cb080, C4<0>, C4<0>; +v0x29395d0_0 .net "a", 0 0, L_0x29cb270; 1 drivers +v0x2939690_0 .net "abxor", 0 0, L_0x29ca8f0; 1 drivers +v0x2939730_0 .net "b", 0 0, L_0x29cb360; 1 drivers +v0x29397d0_0 .net "bxorand", 0 0, L_0x29ca950; 1 drivers +v0x2939880_0 .alias "defaultCompare", 0 0, v0x2942b10_0; +v0x2939920_0 .alias "out", 0 0, v0x2942c30_0; +v0x29399a0_0 .net "xornot", 0 0, L_0x29cb020; 1 drivers +v0x2939a20_0 .net "xornotand", 0 0, L_0x29cb080; 1 drivers +S_0x2938eb0 .scope module, "bit22" "single_slt" 21 96, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29cae70 .functor XOR 1, L_0x2991c80, L_0x2991d70, C4<0>, C4<0>; +L_0x29caed0 .functor AND 1, L_0x2991d70, L_0x29cae70, C4<1>, C4<1>; +L_0x2991a30 .functor NOT 1, L_0x29cae70, C4<0>, C4<0>, C4<0>; +L_0x2991a90 .functor AND 1, L_0x2991a30, L_0x29cb1c0, C4<1>, C4<1>; +L_0x2991bd0 .functor OR 1, L_0x29caed0, L_0x2991a90, C4<0>, C4<0>; +v0x2938fa0_0 .net "a", 0 0, L_0x2991c80; 1 drivers +v0x2939060_0 .net "abxor", 0 0, L_0x29cae70; 1 drivers +v0x2939100_0 .net "b", 0 0, L_0x2991d70; 1 drivers +v0x29391a0_0 .net "bxorand", 0 0, L_0x29caed0; 1 drivers +v0x2939250_0 .alias "defaultCompare", 0 0, v0x2942c30_0; +v0x29392f0_0 .alias "out", 0 0, v0x2942d00_0; +v0x2939370_0 .net "xornot", 0 0, L_0x2991a30; 1 drivers +v0x29393f0_0 .net "xornotand", 0 0, L_0x2991a90; 1 drivers +S_0x2938880 .scope module, "bit23" "single_slt" 21 97, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x2991f90 .functor XOR 1, L_0x29cc550, L_0x29cc640, C4<0>, C4<0>; +L_0x2991ff0 .functor AND 1, L_0x29cc640, L_0x2991f90, C4<1>, C4<1>; +L_0x2991910 .functor NOT 1, L_0x2991f90, C4<0>, C4<0>, C4<0>; +L_0x2991970 .functor AND 1, L_0x2991910, L_0x2991bd0, C4<1>, C4<1>; +L_0x29cc4a0 .functor OR 1, L_0x2991ff0, L_0x2991970, C4<0>, C4<0>; +v0x2938970_0 .net "a", 0 0, L_0x29cc550; 1 drivers +v0x2938a30_0 .net "abxor", 0 0, L_0x2991f90; 1 drivers +v0x2938ad0_0 .net "b", 0 0, L_0x29cc640; 1 drivers +v0x2938b70_0 .net "bxorand", 0 0, L_0x2991ff0; 1 drivers +v0x2938c20_0 .alias "defaultCompare", 0 0, v0x2942d00_0; +v0x2938cc0_0 .alias "out", 0 0, v0x2942e30_0; +v0x2938d40_0 .net "xornot", 0 0, L_0x2991910; 1 drivers +v0x2938dc0_0 .net "xornotand", 0 0, L_0x2991970; 1 drivers +S_0x2938250 .scope module, "bit24" "single_slt" 21 98, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x2991e10 .functor XOR 1, L_0x29ccac0, L_0x29ccbb0, C4<0>, C4<0>; +L_0x2991e70 .functor AND 1, L_0x29ccbb0, L_0x2991e10, C4<1>, C4<1>; +L_0x29cc870 .functor NOT 1, L_0x2991e10, C4<0>, C4<0>, C4<0>; +L_0x29cc8d0 .functor AND 1, L_0x29cc870, L_0x29cc4a0, C4<1>, C4<1>; +L_0x29cca10 .functor OR 1, L_0x2991e70, L_0x29cc8d0, C4<0>, C4<0>; +v0x2938340_0 .net "a", 0 0, L_0x29ccac0; 1 drivers +v0x2938400_0 .net "abxor", 0 0, L_0x2991e10; 1 drivers +v0x29384a0_0 .net "b", 0 0, L_0x29ccbb0; 1 drivers +v0x2938540_0 .net "bxorand", 0 0, L_0x2991e70; 1 drivers +v0x29385f0_0 .alias "defaultCompare", 0 0, v0x2942e30_0; +v0x2938690_0 .alias "out", 0 0, v0x2942eb0_0; +v0x2938710_0 .net "xornot", 0 0, L_0x29cc870; 1 drivers +v0x2938790_0 .net "xornotand", 0 0, L_0x29cc8d0; 1 drivers +S_0x2937c20 .scope module, "bit25" "single_slt" 21 99, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29cc6e0 .functor XOR 1, L_0x29cd040, L_0x29cd130, C4<0>, C4<0>; +L_0x29cc740 .functor AND 1, L_0x29cd130, L_0x29cc6e0, C4<1>, C4<1>; +L_0x29ccdf0 .functor NOT 1, L_0x29cc6e0, C4<0>, C4<0>, C4<0>; +L_0x29cce50 .functor AND 1, L_0x29ccdf0, L_0x29cca10, C4<1>, C4<1>; +L_0x29ccf90 .functor OR 1, L_0x29cc740, L_0x29cce50, C4<0>, C4<0>; +v0x2937d10_0 .net "a", 0 0, L_0x29cd040; 1 drivers +v0x2937dd0_0 .net "abxor", 0 0, L_0x29cc6e0; 1 drivers +v0x2937e70_0 .net "b", 0 0, L_0x29cd130; 1 drivers +v0x2937f10_0 .net "bxorand", 0 0, L_0x29cc740; 1 drivers +v0x2937fc0_0 .alias "defaultCompare", 0 0, v0x2942eb0_0; +v0x2938060_0 .alias "out", 0 0, v0x2942ff0_0; +v0x29380e0_0 .net "xornot", 0 0, L_0x29ccdf0; 1 drivers +v0x2938160_0 .net "xornotand", 0 0, L_0x29cce50; 1 drivers +S_0x29375f0 .scope module, "bit26" "single_slt" 21 100, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29ccc50 .functor XOR 1, L_0x29cd5c0, L_0x29cd6b0, C4<0>, C4<0>; +L_0x29cccb0 .functor AND 1, L_0x29cd6b0, L_0x29ccc50, C4<1>, C4<1>; +L_0x29cd380 .functor NOT 1, L_0x29ccc50, C4<0>, C4<0>, C4<0>; +L_0x29cd3e0 .functor AND 1, L_0x29cd380, L_0x29ccf90, C4<1>, C4<1>; +L_0x2942dd0 .functor OR 1, L_0x29cccb0, L_0x29cd3e0, C4<0>, C4<0>; +v0x29376e0_0 .net "a", 0 0, L_0x29cd5c0; 1 drivers +v0x29377a0_0 .net "abxor", 0 0, L_0x29ccc50; 1 drivers +v0x2937840_0 .net "b", 0 0, L_0x29cd6b0; 1 drivers +v0x29378e0_0 .net "bxorand", 0 0, L_0x29cccb0; 1 drivers +v0x2937990_0 .alias "defaultCompare", 0 0, v0x2942ff0_0; +v0x2937a30_0 .alias "out", 0 0, v0x2943070_0; +v0x2937ab0_0 .net "xornot", 0 0, L_0x29cd380; 1 drivers +v0x2937b30_0 .net "xornotand", 0 0, L_0x29cd3e0; 1 drivers +S_0x2936fc0 .scope module, "bit27" "single_slt" 21 101, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29cd1d0 .functor XOR 1, L_0x29cdb10, L_0x29cdc00, C4<0>, C4<0>; +L_0x29cd230 .functor AND 1, L_0x29cdc00, L_0x29cd1d0, C4<1>, C4<1>; +L_0x29cd910 .functor NOT 1, L_0x29cd1d0, C4<0>, C4<0>, C4<0>; +L_0x29cd970 .functor AND 1, L_0x29cd910, L_0x2942dd0, C4<1>, C4<1>; +L_0x29cda60 .functor OR 1, L_0x29cd230, L_0x29cd970, C4<0>, C4<0>; +v0x29370b0_0 .net "a", 0 0, L_0x29cdb10; 1 drivers +v0x2937170_0 .net "abxor", 0 0, L_0x29cd1d0; 1 drivers +v0x2937210_0 .net "b", 0 0, L_0x29cdc00; 1 drivers +v0x29372b0_0 .net "bxorand", 0 0, L_0x29cd230; 1 drivers +v0x2937360_0 .alias "defaultCompare", 0 0, v0x2943070_0; +v0x2937400_0 .alias "out", 0 0, v0x29431c0_0; +v0x2937480_0 .net "xornot", 0 0, L_0x29cd910; 1 drivers +v0x2937500_0 .net "xornotand", 0 0, L_0x29cd970; 1 drivers +S_0x29369c0 .scope module, "bit28" "single_slt" 21 102, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29cd750 .functor XOR 1, L_0x29ce060, L_0x29ce150, C4<0>, C4<0>; +L_0x29cd7b0 .functor AND 1, L_0x29ce150, L_0x29cd750, C4<1>, C4<1>; +L_0x29cd8b0 .functor NOT 1, L_0x29cd750, C4<0>, C4<0>, C4<0>; +L_0x29cde70 .functor AND 1, L_0x29cd8b0, L_0x29cda60, C4<1>, C4<1>; +L_0x29cdfb0 .functor OR 1, L_0x29cd7b0, L_0x29cde70, C4<0>, C4<0>; +v0x2936ab0_0 .net "a", 0 0, L_0x29ce060; 1 drivers +v0x2936b70_0 .net "abxor", 0 0, L_0x29cd750; 1 drivers +v0x2936c10_0 .net "b", 0 0, L_0x29ce150; 1 drivers +v0x2936cb0_0 .net "bxorand", 0 0, L_0x29cd7b0; 1 drivers +v0x2936d30_0 .alias "defaultCompare", 0 0, v0x29431c0_0; +v0x2936dd0_0 .alias "out", 0 0, v0x2943240_0; +v0x2936e50_0 .net "xornot", 0 0, L_0x29cd8b0; 1 drivers +v0x2936ed0_0 .net "xornotand", 0 0, L_0x29cde70; 1 drivers +S_0x29363c0 .scope module, "bit29" "single_slt" 21 103, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29cdca0 .functor XOR 1, L_0x29ce5c0, L_0x29ce6b0, C4<0>, C4<0>; +L_0x29cdd00 .functor AND 1, L_0x29ce6b0, L_0x29cdca0, C4<1>, C4<1>; +L_0x29cde00 .functor NOT 1, L_0x29cdca0, C4<0>, C4<0>, C4<0>; +L_0x29ce3d0 .functor AND 1, L_0x29cde00, L_0x29cdfb0, C4<1>, C4<1>; +L_0x29ce510 .functor OR 1, L_0x29cdd00, L_0x29ce3d0, C4<0>, C4<0>; +v0x29364b0_0 .net "a", 0 0, L_0x29ce5c0; 1 drivers +v0x2936570_0 .net "abxor", 0 0, L_0x29cdca0; 1 drivers +v0x2936610_0 .net "b", 0 0, L_0x29ce6b0; 1 drivers +v0x29366b0_0 .net "bxorand", 0 0, L_0x29cdd00; 1 drivers +v0x2936730_0 .alias "defaultCompare", 0 0, v0x2943240_0; +v0x29367d0_0 .alias "out", 0 0, v0x2943140_0; +v0x2936850_0 .net "xornot", 0 0, L_0x29cde00; 1 drivers +v0x29368d0_0 .net "xornotand", 0 0, L_0x29ce3d0; 1 drivers +S_0x2935dc0 .scope module, "bit30" "single_slt" 21 104, 21 1, S_0x29356e0; + .timescale 0 0; +L_0x29ce1f0 .functor XOR 1, L_0x29ceb30, L_0x29cec20, C4<0>, C4<0>; +L_0x29ce250 .functor AND 1, L_0x29cec20, L_0x29ce1f0, C4<1>, C4<1>; +L_0x29ce350 .functor NOT 1, L_0x29ce1f0, C4<0>, C4<0>, C4<0>; +L_0x29ce940 .functor AND 1, L_0x29ce350, L_0x29ce510, C4<1>, C4<1>; +L_0x29cea80 .functor OR 1, L_0x29ce250, L_0x29ce940, C4<0>, C4<0>; +v0x2935eb0_0 .net "a", 0 0, L_0x29ceb30; 1 drivers +v0x2935f70_0 .net "abxor", 0 0, L_0x29ce1f0; 1 drivers +v0x2936010_0 .net "b", 0 0, L_0x29cec20; 1 drivers +v0x29360b0_0 .net "bxorand", 0 0, L_0x29ce250; 1 drivers +v0x2936130_0 .alias "defaultCompare", 0 0, v0x2943140_0; +v0x29361d0_0 .alias "out", 0 0, v0x2943310_0; +v0x2936250_0 .net "xornot", 0 0, L_0x29ce350; 1 drivers +v0x29362d0_0 .net "xornotand", 0 0, L_0x29ce940; 1 drivers +S_0x29357d0 .scope module, "bit31" "single_slt_reversed" 21 105, 21 19, S_0x29356e0; + .timescale 0 0; +L_0x29ce750 .functor XOR 1, L_0x29cf240, L_0x29cecc0, C4<0>, C4<0>; +L_0x29ce7b0 .functor AND 1, L_0x29cf240, L_0x29ce750, C4<1>, C4<1>; +L_0x29ce8b0 .functor NOT 1, L_0x29ce750, C4<0>, C4<0>, C4<0>; +L_0x29ceec0 .functor AND 1, L_0x29ce8b0, L_0x29cea80, C4<1>, C4<1>; +L_0x29cf000 .functor OR 1, L_0x29ce7b0, L_0x29ceec0, C4<0>, C4<0>; +v0x29358c0_0 .net "a", 0 0, L_0x29cf240; 1 drivers +v0x2935980_0 .net "abxor", 0 0, L_0x29ce750; 1 drivers +v0x2935a20_0 .net "axorand", 0 0, L_0x29ce7b0; 1 drivers +v0x2935ac0_0 .net "b", 0 0, L_0x29cecc0; 1 drivers +v0x2935b40_0 .alias "defaultCompare", 0 0, v0x2943310_0; +v0x2935be0_0 .net "out", 0 0, L_0x29cf000; 1 drivers +v0x2935c80_0 .net "xornot", 0 0, L_0x29ce8b0; 1 drivers +v0x2935d20_0 .net "xornotand", 0 0, L_0x29ceec0; 1 drivers +S_0x29310a0 .scope module, "and0" "and_32bit" 18 37, 22 1, S_0x28a5ac0; + .timescale 0 0; +L_0x29cf4f0 .functor AND 1, L_0x29cf5a0, L_0x29cf690, C4<1>, C4<1>; +L_0x29cf820 .functor AND 1, L_0x29cf8d0, L_0x29cf9c0, C4<1>, C4<1>; +L_0x29cfbe0 .functor AND 1, L_0x29cfc40, L_0x29cfd80, C4<1>, C4<1>; +L_0x29cff70 .functor AND 1, L_0x29cffd0, L_0x29d00c0, C4<1>, C4<1>; +L_0x29cff10 .functor AND 1, L_0x29d0310, L_0x29d0480, C4<1>, C4<1>; +L_0x29d06a0 .functor AND 1, L_0x29d0750, L_0x29d0840, C4<1>, C4<1>; +L_0x29d0610 .functor AND 1, L_0x29d0b80, L_0x29d0930, C4<1>, C4<1>; +L_0x29d0c70 .functor AND 1, L_0x29d0f20, L_0x29d1010, C4<1>, C4<1>; +L_0x29d11d0 .functor AND 1, L_0x29d1280, L_0x29d1100, C4<1>, C4<1>; +L_0x29d1370 .functor AND 1, L_0x29d1690, L_0x29d1730, C4<1>, C4<1>; +L_0x29d1920 .functor AND 1, L_0x29d1980, L_0x29d1820, C4<1>, C4<1>; +L_0x29d1a70 .functor AND 1, L_0x29d1d40, L_0x29d1de0, C4<1>, C4<1>; +L_0x29d1630 .functor AND 1, L_0x29d2000, L_0x29d1ed0, C4<1>, C4<1>; +L_0x29d20a0 .functor AND 1, L_0x29d23d0, L_0x29d24c0, C4<1>, C4<1>; +L_0x29d2320 .functor AND 1, L_0x29d0a70, L_0x29d25b0, C4<1>, C4<1>; +L_0x29d26a0 .functor AND 1, L_0x29d2970, L_0x29d2cb0, C4<1>, C4<1>; +L_0x29d2bd0 .functor AND 1, L_0x29d2f30, L_0x29d2da0, C4<1>, C4<1>; +L_0x29d31d0 .functor AND 1, L_0x29d3320, L_0x29d33c0, C4<1>, C4<1>; +L_0x29d30c0 .functor AND 1, L_0x29d3670, L_0x29d34b0, C4<1>, C4<1>; +L_0x29d38f0 .functor AND 1, L_0x29d3280, L_0x29d3aa0, C4<1>, C4<1>; +L_0x29d37b0 .functor AND 1, L_0x29d3d80, L_0x29d3b90, C4<1>, C4<1>; +L_0x29d3d20 .functor AND 1, L_0x29d39a0, L_0x29d4190, C4<1>, C4<1>; +L_0x29d3ec0 .functor AND 1, L_0x29d3f70, L_0x29d4280, C4<1>, C4<1>; +L_0x29d4410 .functor AND 1, L_0x29d4080, L_0x29d48a0, C4<1>, C4<1>; +L_0x29d4590 .functor AND 1, L_0x29d4640, L_0x29d4bf0, C4<1>, C4<1>; +L_0x29d4990 .functor AND 1, L_0x29d4b20, L_0x29d4ff0, C4<1>, C4<1>; +L_0x29d4e20 .functor AND 1, L_0x29d4ed0, L_0x29d5320, C4<1>, C4<1>; +L_0x29d5090 .functor AND 1, L_0x29d4a40, L_0x29d5280, C4<1>, C4<1>; +L_0x29d5550 .functor AND 1, L_0x29d5600, L_0x29d5a60, C4<1>, C4<1>; +L_0x29d57a0 .functor AND 1, L_0x29d5140, L_0x29d5950, C4<1>, C4<1>; +L_0x29328a0 .functor AND 1, L_0x29d2710, L_0x29d2800, C4<1>, C4<1>; +L_0x29d5c40 .functor AND 1, L_0x29d5850, L_0x29d6630, C4<1>, C4<1>; +v0x2931620_0 .net *"_s0", 0 0, L_0x29cf4f0; 1 drivers +v0x29316a0_0 .net *"_s101", 0 0, L_0x29d2da0; 1 drivers +v0x2931720_0 .net *"_s102", 0 0, L_0x29d31d0; 1 drivers +v0x29317a0_0 .net *"_s105", 0 0, L_0x29d3320; 1 drivers +v0x2931820_0 .net *"_s107", 0 0, L_0x29d33c0; 1 drivers +v0x29318a0_0 .net *"_s108", 0 0, L_0x29d30c0; 1 drivers +v0x2931920_0 .net *"_s11", 0 0, L_0x29cf9c0; 1 drivers +v0x29319c0_0 .net *"_s111", 0 0, L_0x29d3670; 1 drivers +v0x2931ab0_0 .net *"_s113", 0 0, L_0x29d34b0; 1 drivers +v0x2931b50_0 .net *"_s114", 0 0, L_0x29d38f0; 1 drivers +v0x2931bf0_0 .net *"_s117", 0 0, L_0x29d3280; 1 drivers +v0x2931c90_0 .net *"_s119", 0 0, L_0x29d3aa0; 1 drivers +v0x2931d30_0 .net *"_s12", 0 0, L_0x29cfbe0; 1 drivers +v0x2931dd0_0 .net *"_s120", 0 0, L_0x29d37b0; 1 drivers +v0x2931ef0_0 .net *"_s123", 0 0, L_0x29d3d80; 1 drivers +v0x2931f90_0 .net *"_s125", 0 0, L_0x29d3b90; 1 drivers +v0x2931e50_0 .net *"_s126", 0 0, L_0x29d3d20; 1 drivers +v0x29320e0_0 .net *"_s129", 0 0, L_0x29d39a0; 1 drivers +v0x2932200_0 .net *"_s131", 0 0, L_0x29d4190; 1 drivers +v0x2932280_0 .net *"_s132", 0 0, L_0x29d3ec0; 1 drivers +v0x2932160_0 .net *"_s135", 0 0, L_0x29d3f70; 1 drivers +v0x29323b0_0 .net *"_s137", 0 0, L_0x29d4280; 1 drivers +v0x2932300_0 .net *"_s138", 0 0, L_0x29d4410; 1 drivers +v0x29324f0_0 .net *"_s141", 0 0, L_0x29d4080; 1 drivers +v0x2932450_0 .net *"_s143", 0 0, L_0x29d48a0; 1 drivers +v0x2932640_0 .net *"_s144", 0 0, L_0x29d4590; 1 drivers +v0x2932590_0 .net *"_s147", 0 0, L_0x29d4640; 1 drivers +v0x29327a0_0 .net *"_s149", 0 0, L_0x29d4bf0; 1 drivers +v0x29326e0_0 .net *"_s15", 0 0, L_0x29cfc40; 1 drivers +v0x2932910_0 .net *"_s150", 0 0, L_0x29d4990; 1 drivers +v0x2932820_0 .net *"_s153", 0 0, L_0x29d4b20; 1 drivers +v0x2932a90_0 .net *"_s155", 0 0, L_0x29d4ff0; 1 drivers +v0x2932990_0 .net *"_s156", 0 0, L_0x29d4e20; 1 drivers +v0x2932c20_0 .net *"_s159", 0 0, L_0x29d4ed0; 1 drivers +v0x2932b10_0 .net *"_s161", 0 0, L_0x29d5320; 1 drivers +v0x2932dc0_0 .net *"_s162", 0 0, L_0x29d5090; 1 drivers +v0x2932ca0_0 .net *"_s165", 0 0, L_0x29d4a40; 1 drivers +v0x2932d40_0 .net *"_s167", 0 0, L_0x29d5280; 1 drivers +v0x2932f80_0 .net *"_s168", 0 0, L_0x29d5550; 1 drivers +v0x2933000_0 .net *"_s17", 0 0, L_0x29cfd80; 1 drivers +v0x2932e40_0 .net *"_s171", 0 0, L_0x29d5600; 1 drivers +v0x2932ee0_0 .net *"_s173", 0 0, L_0x29d5a60; 1 drivers +v0x29331e0_0 .net *"_s174", 0 0, L_0x29d57a0; 1 drivers +v0x2933260_0 .net *"_s177", 0 0, L_0x29d5140; 1 drivers +v0x2933080_0 .net *"_s179", 0 0, L_0x29d5950; 1 drivers +v0x2933120_0 .net *"_s18", 0 0, L_0x29cff70; 1 drivers +v0x2933460_0 .net *"_s180", 0 0, L_0x29328a0; 1 drivers +v0x29334e0_0 .net *"_s183", 0 0, L_0x29d2710; 1 drivers +v0x2933300_0 .net *"_s185", 0 0, L_0x29d2800; 1 drivers +v0x29333a0_0 .net *"_s186", 0 0, L_0x29d5c40; 1 drivers +v0x2933700_0 .net *"_s189", 0 0, L_0x29d5850; 1 drivers +v0x2933780_0 .net *"_s191", 0 0, L_0x29d6630; 1 drivers +v0x2933580_0 .net *"_s21", 0 0, L_0x29cffd0; 1 drivers +v0x2933620_0 .net *"_s23", 0 0, L_0x29d00c0; 1 drivers +v0x29339c0_0 .net *"_s24", 0 0, L_0x29cff10; 1 drivers +v0x2933a40_0 .net *"_s27", 0 0, L_0x29d0310; 1 drivers +v0x2933800_0 .net *"_s29", 0 0, L_0x29d0480; 1 drivers +v0x29338a0_0 .net *"_s3", 0 0, L_0x29cf5a0; 1 drivers +v0x2933940_0 .net *"_s30", 0 0, L_0x29d06a0; 1 drivers +v0x2933cc0_0 .net *"_s33", 0 0, L_0x29d0750; 1 drivers +v0x2933ae0_0 .net *"_s35", 0 0, L_0x29d0840; 1 drivers +v0x2933b80_0 .net *"_s36", 0 0, L_0x29d0610; 1 drivers +v0x2933c20_0 .net *"_s39", 0 0, L_0x29d0b80; 1 drivers +v0x2933f60_0 .net *"_s41", 0 0, L_0x29d0930; 1 drivers +v0x2933d60_0 .net *"_s42", 0 0, L_0x29d0c70; 1 drivers +v0x2933e00_0 .net *"_s45", 0 0, L_0x29d0f20; 1 drivers +v0x2933ea0_0 .net *"_s47", 0 0, L_0x29d1010; 1 drivers +v0x2934200_0 .net *"_s48", 0 0, L_0x29d11d0; 1 drivers +v0x2934000_0 .net *"_s5", 0 0, L_0x29cf690; 1 drivers +v0x29340a0_0 .net *"_s51", 0 0, L_0x29d1280; 1 drivers +v0x2934140_0 .net *"_s53", 0 0, L_0x29d1100; 1 drivers +v0x29344c0_0 .net *"_s54", 0 0, L_0x29d1370; 1 drivers +v0x2934280_0 .net *"_s57", 0 0, L_0x29d1690; 1 drivers +v0x2934320_0 .net *"_s59", 0 0, L_0x29d1730; 1 drivers +v0x29343c0_0 .net *"_s6", 0 0, L_0x29cf820; 1 drivers +v0x29347a0_0 .net *"_s60", 0 0, L_0x29d1920; 1 drivers +v0x2934540_0 .net *"_s63", 0 0, L_0x29d1980; 1 drivers +v0x29345e0_0 .net *"_s65", 0 0, L_0x29d1820; 1 drivers +v0x2934680_0 .net *"_s66", 0 0, L_0x29d1a70; 1 drivers +v0x2934720_0 .net *"_s69", 0 0, L_0x29d1d40; 1 drivers +v0x2934ab0_0 .net *"_s71", 0 0, L_0x29d1de0; 1 drivers +v0x2934b30_0 .net *"_s72", 0 0, L_0x29d1630; 1 drivers +v0x2934840_0 .net *"_s75", 0 0, L_0x29d2000; 1 drivers +v0x29348e0_0 .net *"_s77", 0 0, L_0x29d1ed0; 1 drivers +v0x2934980_0 .net *"_s78", 0 0, L_0x29d20a0; 1 drivers +v0x2934a20_0 .net *"_s81", 0 0, L_0x29d23d0; 1 drivers +v0x2934e90_0 .net *"_s83", 0 0, L_0x29d24c0; 1 drivers +v0x2934f30_0 .net *"_s84", 0 0, L_0x29d2320; 1 drivers +v0x2934bd0_0 .net *"_s87", 0 0, L_0x29d0a70; 1 drivers +v0x2934c70_0 .net *"_s89", 0 0, L_0x29d25b0; 1 drivers +v0x2934d10_0 .net *"_s9", 0 0, L_0x29cf8d0; 1 drivers +v0x2934db0_0 .net *"_s90", 0 0, L_0x29d26a0; 1 drivers +v0x29352a0_0 .net *"_s93", 0 0, L_0x29d2970; 1 drivers +v0x2935320_0 .net *"_s95", 0 0, L_0x29d2cb0; 1 drivers +v0x2934fd0_0 .net *"_s96", 0 0, L_0x29d2bd0; 1 drivers +v0x2935070_0 .net *"_s99", 0 0, L_0x29d2f30; 1 drivers +v0x2935110_0 .alias "a", 31 0, v0x2980e00_0; +v0x2935190_0 .alias "b", 31 0, v0x2970880_0; +v0x2935210_0 .alias "out", 31 0, v0x296fbc0_0; +L_0x29cedb0 .part/pv L_0x29cf4f0, 0, 1, 32; +L_0x29cf5a0 .part L_0x2989450, 0, 1; +L_0x29cf690 .part v0x2970590_0, 0, 1; +L_0x29cf780 .part/pv L_0x29cf820, 1, 1, 32; +L_0x29cf8d0 .part L_0x2989450, 1, 1; +L_0x29cf9c0 .part v0x2970590_0, 1, 1; +L_0x29cfab0 .part/pv L_0x29cfbe0, 2, 1, 32; +L_0x29cfc40 .part L_0x2989450, 2, 1; +L_0x29cfd80 .part v0x2970590_0, 2, 1; +L_0x29cfe70 .part/pv L_0x29cff70, 3, 1, 32; +L_0x29cffd0 .part L_0x2989450, 3, 1; +L_0x29d00c0 .part v0x2970590_0, 3, 1; +L_0x29d0220 .part/pv L_0x29cff10, 4, 1, 32; +L_0x29d0310 .part L_0x2989450, 4, 1; +L_0x29d0480 .part v0x2970590_0, 4, 1; +L_0x29d0570 .part/pv L_0x29d06a0, 5, 1, 32; +L_0x29d0750 .part L_0x2989450, 5, 1; +L_0x29d0840 .part v0x2970590_0, 5, 1; +L_0x29d09d0 .part/pv L_0x29d0610, 6, 1, 32; +L_0x29d0b80 .part L_0x2989450, 6, 1; +L_0x29d0930 .part v0x2970590_0, 6, 1; +L_0x29d0d70 .part/pv L_0x29d0c70, 7, 1, 32; +L_0x29d0f20 .part L_0x2989450, 7, 1; +L_0x29d1010 .part v0x2970590_0, 7, 1; +L_0x29d0e10 .part/pv L_0x29d11d0, 8, 1, 32; +L_0x29d1280 .part L_0x2989450, 8, 1; +L_0x29d1100 .part v0x2970590_0, 8, 1; +L_0x29d14a0 .part/pv L_0x29d1370, 9, 1, 32; +L_0x29d1690 .part L_0x2989450, 9, 1; +L_0x29d1730 .part v0x2970590_0, 9, 1; +L_0x29d1540 .part/pv L_0x29d1920, 10, 1, 32; +L_0x29d1980 .part L_0x2989450, 10, 1; +L_0x29d1820 .part v0x2970590_0, 10, 1; +L_0x29d1b80 .part/pv L_0x29d1a70, 11, 1, 32; +L_0x29d1d40 .part L_0x2989450, 11, 1; +L_0x29d1de0 .part v0x2970590_0, 11, 1; +L_0x29d1c20 .part/pv L_0x29d1630, 12, 1, 32; +L_0x29d2000 .part L_0x2989450, 12, 1; +L_0x29d1ed0 .part v0x2970590_0, 12, 1; +L_0x29d21e0 .part/pv L_0x29d20a0, 13, 1, 32; +L_0x29d23d0 .part L_0x2989450, 13, 1; +L_0x29d24c0 .part v0x2970590_0, 13, 1; +L_0x29d2280 .part/pv L_0x29d2320, 14, 1, 32; +L_0x29d0a70 .part L_0x2989450, 14, 1; +L_0x29d25b0 .part v0x2970590_0, 14, 1; +L_0x29d2a90 .part/pv L_0x29d26a0, 15, 1, 32; +L_0x29d2970 .part L_0x2989450, 15, 1; +L_0x29d2cb0 .part v0x2970590_0, 15, 1; +L_0x29d2b30 .part/pv L_0x29d2bd0, 16, 1, 32; +L_0x29d2f30 .part L_0x2989450, 16, 1; +L_0x29d2da0 .part v0x2970590_0, 16, 1; +L_0x29d2e90 .part/pv L_0x29d31d0, 17, 1, 32; +L_0x29d3320 .part L_0x2989450, 17, 1; +L_0x29d33c0 .part v0x2970590_0, 17, 1; +L_0x29d3020 .part/pv L_0x29d30c0, 18, 1, 32; +L_0x29d3670 .part L_0x2989450, 18, 1; +L_0x29d34b0 .part v0x2970590_0, 18, 1; +L_0x29d35a0 .part/pv L_0x29d38f0, 19, 1, 32; +L_0x29d3280 .part L_0x2989450, 19, 1; +L_0x29d3aa0 .part v0x2970590_0, 19, 1; +L_0x29d3710 .part/pv L_0x29d37b0, 20, 1, 32; +L_0x29d3d80 .part L_0x2989450, 20, 1; +L_0x29d3b90 .part v0x2970590_0, 20, 1; +L_0x29d3c80 .part/pv L_0x29d3d20, 21, 1, 32; +L_0x29d39a0 .part L_0x2989450, 21, 1; +L_0x29d4190 .part v0x2970590_0, 21, 1; +L_0x29d3e20 .part/pv L_0x29d3ec0, 22, 1, 32; +L_0x29d3f70 .part L_0x2989450, 22, 1; +L_0x29d4280 .part v0x2970590_0, 22, 1; +L_0x29d4370 .part/pv L_0x29d4410, 23, 1, 32; +L_0x29d4080 .part L_0x2989450, 23, 1; +L_0x29d48a0 .part v0x2970590_0, 23, 1; +L_0x29d44f0 .part/pv L_0x29d4590, 24, 1, 32; +L_0x29d4640 .part L_0x2989450, 24, 1; +L_0x29d4bf0 .part v0x2970590_0, 24, 1; +L_0x29d4ce0 .part/pv L_0x29d4990, 25, 1, 32; +L_0x29d4b20 .part L_0x2989450, 25, 1; +L_0x29d4ff0 .part v0x2970590_0, 25, 1; +L_0x29d4d80 .part/pv L_0x29d4e20, 26, 1, 32; +L_0x29d4ed0 .part L_0x2989450, 26, 1; +L_0x29d5320 .part v0x2970590_0, 26, 1; +L_0x29d5410 .part/pv L_0x29d5090, 27, 1, 32; +L_0x29d4a40 .part L_0x2989450, 27, 1; +L_0x29d5280 .part v0x2970590_0, 27, 1; +L_0x29d54b0 .part/pv L_0x29d5550, 28, 1, 32; +L_0x29d5600 .part L_0x2989450, 28, 1; +L_0x29d5a60 .part v0x2970590_0, 28, 1; +L_0x29d5b00 .part/pv L_0x29d57a0, 29, 1, 32; +L_0x29d5140 .part L_0x2989450, 29, 1; +L_0x29d5950 .part v0x2970590_0, 29, 1; +L_0x29d5e80 .part/pv L_0x29328a0, 30, 1, 32; +L_0x29d2710 .part L_0x2989450, 30, 1; +L_0x29d2800 .part v0x2970590_0, 30, 1; +L_0x29d5ba0 .part/pv L_0x29d5c40, 31, 1, 32; +L_0x29d5850 .part L_0x2989450, 31, 1; +L_0x29d6630 .part v0x2970590_0, 31, 1; +S_0x26fcd80 .scope module, "nand0" "nand_32bit" 18 38, 23 1, S_0x28a5ac0; + .timescale 0 0; +L_0x29d6420 .functor NAND 1, L_0x29d64d0, L_0x29d69e0, C4<1>, C4<1>; +L_0x29d5e00 .functor NAND 1, L_0x29d6b70, L_0x29d6c60, C4<1>, C4<1>; +L_0x29d6e80 .functor NAND 1, L_0x29d6ee0, L_0x29d7020, C4<1>, C4<1>; +L_0x29d7210 .functor NAND 1, L_0x29d7270, L_0x29d7360, C4<1>, C4<1>; +L_0x29d71b0 .functor NAND 1, L_0x29d75b0, L_0x29d7720, C4<1>, C4<1>; +L_0x29d7940 .functor NAND 1, L_0x29d79f0, L_0x29d7ae0, C4<1>, C4<1>; +L_0x29d78b0 .functor NAND 1, L_0x29d7e20, L_0x29d7bd0, C4<1>, C4<1>; +L_0x29d7f10 .functor NAND 1, L_0x29d81c0, L_0x29d82b0, C4<1>, C4<1>; +L_0x29d8470 .functor NAND 1, L_0x29d8520, L_0x29d83a0, C4<1>, C4<1>; +L_0x29d8610 .functor NAND 1, L_0x29d8930, L_0x29d89d0, C4<1>, C4<1>; +L_0x29d8bc0 .functor NAND 1, L_0x29d8c20, L_0x29d8ac0, C4<1>, C4<1>; +L_0x29d8d10 .functor NAND 1, L_0x29d8fe0, L_0x29c79a0, C4<1>, C4<1>; +L_0x29d88d0 .functor NAND 1, L_0x29c7b70, L_0x29c7a40, C4<1>, C4<1>; +L_0x29d76a0 .functor NAND 1, L_0x29c7f90, L_0x29c8080, C4<1>, C4<1>; +L_0x29c7d30 .functor NAND 1, L_0x29d7d10, L_0x29da090, C4<1>, C4<1>; +L_0x29d7db0 .functor NAND 1, L_0x29da490, L_0x29da7e0, C4<1>, C4<1>; +L_0x29da6b0 .functor NAND 1, L_0x29daa60, L_0x29da8d0, C4<1>, C4<1>; +L_0x29dad00 .functor NAND 1, L_0x29dae50, L_0x29daef0, C4<1>, C4<1>; +L_0x29dabf0 .functor NAND 1, L_0x29db1a0, L_0x29dafe0, C4<1>, C4<1>; +L_0x29db420 .functor NAND 1, L_0x29dadb0, L_0x29db5d0, C4<1>, C4<1>; +L_0x29db2e0 .functor NAND 1, L_0x29db8b0, L_0x29db6c0, C4<1>, C4<1>; +L_0x29db850 .functor NAND 1, L_0x29db4d0, L_0x29dbcc0, C4<1>, C4<1>; +L_0x29db9f0 .functor NAND 1, L_0x29dbaa0, L_0x29dbdb0, C4<1>, C4<1>; +L_0x29dbf40 .functor NAND 1, L_0x29dbbb0, L_0x29dc3d0, C4<1>, C4<1>; +L_0x29dc0c0 .functor NAND 1, L_0x29dc170, L_0x29dc720, C4<1>, C4<1>; +L_0x29dc4c0 .functor NAND 1, L_0x29dc650, L_0x29dcb20, C4<1>, C4<1>; +L_0x29dc950 .functor NAND 1, L_0x29dca00, L_0x29dce50, C4<1>, C4<1>; +L_0x29dcbc0 .functor NAND 1, L_0x29dc570, L_0x29dcdb0, C4<1>, C4<1>; +L_0x29dd080 .functor NAND 1, L_0x29dd130, L_0x29dd590, C4<1>, C4<1>; +L_0x29dd2d0 .functor NAND 1, L_0x29dcc70, L_0x29dd480, C4<1>, C4<1>; +L_0x292e8d0 .functor NAND 1, L_0x29da1d0, L_0x29da270, C4<1>, C4<1>; +L_0x29d7450 .functor NAND 1, L_0x29dd380, L_0x29dd7e0, C4<1>, C4<1>; +v0x26fce70_0 .net *"_s0", 0 0, L_0x29d6420; 1 drivers +v0x26fcf30_0 .net *"_s101", 0 0, L_0x29da8d0; 1 drivers +v0x2772120_0 .net *"_s102", 0 0, L_0x29dad00; 1 drivers +v0x292da00_0 .net *"_s105", 0 0, L_0x29dae50; 1 drivers +v0x292da80_0 .net *"_s107", 0 0, L_0x29daef0; 1 drivers +v0x292db00_0 .net *"_s108", 0 0, L_0x29dabf0; 1 drivers +v0x292db80_0 .net *"_s11", 0 0, L_0x29d6c60; 1 drivers +v0x292dc00_0 .net *"_s111", 0 0, L_0x29db1a0; 1 drivers +v0x292dc80_0 .net *"_s113", 0 0, L_0x29dafe0; 1 drivers +v0x292dd00_0 .net *"_s114", 0 0, L_0x29db420; 1 drivers +v0x292dd80_0 .net *"_s117", 0 0, L_0x29dadb0; 1 drivers +v0x292de00_0 .net *"_s119", 0 0, L_0x29db5d0; 1 drivers +v0x292de80_0 .net *"_s12", 0 0, L_0x29d6e80; 1 drivers +v0x292df00_0 .net *"_s120", 0 0, L_0x29db2e0; 1 drivers +v0x292e000_0 .net *"_s123", 0 0, L_0x29db8b0; 1 drivers +v0x292e080_0 .net *"_s125", 0 0, L_0x29db6c0; 1 drivers +v0x292df80_0 .net *"_s126", 0 0, L_0x29db850; 1 drivers +v0x292e190_0 .net *"_s129", 0 0, L_0x29db4d0; 1 drivers +v0x292e100_0 .net *"_s131", 0 0, L_0x29dbcc0; 1 drivers +v0x292e2b0_0 .net *"_s132", 0 0, L_0x29db9f0; 1 drivers +v0x292e210_0 .net *"_s135", 0 0, L_0x29dbaa0; 1 drivers +v0x292e3e0_0 .net *"_s137", 0 0, L_0x29dbdb0; 1 drivers +v0x292e330_0 .net *"_s138", 0 0, L_0x29dbf40; 1 drivers +v0x292e520_0 .net *"_s141", 0 0, L_0x29dbbb0; 1 drivers +v0x292e460_0 .net *"_s143", 0 0, L_0x29dc3d0; 1 drivers +v0x292e670_0 .net *"_s144", 0 0, L_0x29dc0c0; 1 drivers +v0x292e5a0_0 .net *"_s147", 0 0, L_0x29dc170; 1 drivers +v0x292e7d0_0 .net *"_s149", 0 0, L_0x29dc720; 1 drivers +v0x292e6f0_0 .net *"_s15", 0 0, L_0x29d6ee0; 1 drivers +v0x292e940_0 .net *"_s150", 0 0, L_0x29dc4c0; 1 drivers +v0x292e850_0 .net *"_s153", 0 0, L_0x29dc650; 1 drivers +v0x292eac0_0 .net *"_s155", 0 0, L_0x29dcb20; 1 drivers +v0x292e9c0_0 .net *"_s156", 0 0, L_0x29dc950; 1 drivers +v0x292ea40_0 .net *"_s159", 0 0, L_0x29dca00; 1 drivers +v0x292ec60_0 .net *"_s161", 0 0, L_0x29dce50; 1 drivers +v0x292ece0_0 .net *"_s162", 0 0, L_0x29dcbc0; 1 drivers +v0x292eb40_0 .net *"_s165", 0 0, L_0x29dc570; 1 drivers +v0x292ebe0_0 .net *"_s167", 0 0, L_0x29dcdb0; 1 drivers +v0x292eea0_0 .net *"_s168", 0 0, L_0x29dd080; 1 drivers +v0x292ef20_0 .net *"_s17", 0 0, L_0x29d7020; 1 drivers +v0x292ed60_0 .net *"_s171", 0 0, L_0x29dd130; 1 drivers +v0x292ee00_0 .net *"_s173", 0 0, L_0x29dd590; 1 drivers +v0x292f100_0 .net *"_s174", 0 0, L_0x29dd2d0; 1 drivers +v0x292f180_0 .net *"_s177", 0 0, L_0x29dcc70; 1 drivers +v0x292efa0_0 .net *"_s179", 0 0, L_0x29dd480; 1 drivers +v0x292f040_0 .net *"_s18", 0 0, L_0x29d7210; 1 drivers +v0x292f380_0 .net *"_s180", 0 0, L_0x292e8d0; 1 drivers +v0x292f400_0 .net *"_s183", 0 0, L_0x29da1d0; 1 drivers +v0x292f200_0 .net *"_s185", 0 0, L_0x29da270; 1 drivers +v0x292f2a0_0 .net *"_s186", 0 0, L_0x29d7450; 1 drivers +v0x292f620_0 .net *"_s189", 0 0, L_0x29dd380; 1 drivers +v0x292f6a0_0 .net *"_s191", 0 0, L_0x29dd7e0; 1 drivers +v0x292f480_0 .net *"_s21", 0 0, L_0x29d7270; 1 drivers +v0x292f520_0 .net *"_s23", 0 0, L_0x29d7360; 1 drivers +v0x292f8e0_0 .net *"_s24", 0 0, L_0x29d71b0; 1 drivers +v0x292f960_0 .net *"_s27", 0 0, L_0x29d75b0; 1 drivers +v0x292f720_0 .net *"_s29", 0 0, L_0x29d7720; 1 drivers +v0x292f7c0_0 .net *"_s3", 0 0, L_0x29d64d0; 1 drivers +v0x292f860_0 .net *"_s30", 0 0, L_0x29d7940; 1 drivers +v0x292fbc0_0 .net *"_s33", 0 0, L_0x29d79f0; 1 drivers +v0x292f9e0_0 .net *"_s35", 0 0, L_0x29d7ae0; 1 drivers +v0x292fa60_0 .net *"_s36", 0 0, L_0x29d78b0; 1 drivers +v0x292fb00_0 .net *"_s39", 0 0, L_0x29d7e20; 1 drivers +v0x292fe40_0 .net *"_s41", 0 0, L_0x29d7bd0; 1 drivers +v0x292fc40_0 .net *"_s42", 0 0, L_0x29d7f10; 1 drivers +v0x292fce0_0 .net *"_s45", 0 0, L_0x29d81c0; 1 drivers +v0x292fd80_0 .net *"_s47", 0 0, L_0x29d82b0; 1 drivers +v0x29300e0_0 .net *"_s48", 0 0, L_0x29d8470; 1 drivers +v0x292fec0_0 .net *"_s5", 0 0, L_0x29d69e0; 1 drivers +v0x292ff60_0 .net *"_s51", 0 0, L_0x29d8520; 1 drivers +v0x2930000_0 .net *"_s53", 0 0, L_0x29d83a0; 1 drivers +v0x29303a0_0 .net *"_s54", 0 0, L_0x29d8610; 1 drivers +v0x2930160_0 .net *"_s57", 0 0, L_0x29d8930; 1 drivers +v0x29301e0_0 .net *"_s59", 0 0, L_0x29d89d0; 1 drivers +v0x2930280_0 .net *"_s6", 0 0, L_0x29d5e00; 1 drivers +v0x2930320_0 .net *"_s60", 0 0, L_0x29d8bc0; 1 drivers +v0x2930690_0 .net *"_s63", 0 0, L_0x29d8c20; 1 drivers +v0x2930710_0 .net *"_s65", 0 0, L_0x29d8ac0; 1 drivers +v0x2930420_0 .net *"_s66", 0 0, L_0x29d8d10; 1 drivers +v0x29304c0_0 .net *"_s69", 0 0, L_0x29d8fe0; 1 drivers +v0x2930560_0 .net *"_s71", 0 0, L_0x29c79a0; 1 drivers +v0x2930600_0 .net *"_s72", 0 0, L_0x29d88d0; 1 drivers +v0x2930a30_0 .net *"_s75", 0 0, L_0x29c7b70; 1 drivers +v0x2930ab0_0 .net *"_s77", 0 0, L_0x29c7a40; 1 drivers +v0x2930790_0 .net *"_s78", 0 0, L_0x29d76a0; 1 drivers +v0x2930830_0 .net *"_s81", 0 0, L_0x29c7f90; 1 drivers +v0x29308d0_0 .net *"_s83", 0 0, L_0x29c8080; 1 drivers +v0x2930970_0 .net *"_s84", 0 0, L_0x29c7d30; 1 drivers +v0x2930e00_0 .net *"_s87", 0 0, L_0x29d7d10; 1 drivers +v0x2930e80_0 .net *"_s89", 0 0, L_0x29da090; 1 drivers +v0x2930b30_0 .net *"_s9", 0 0, L_0x29d6b70; 1 drivers +v0x2930bd0_0 .net *"_s90", 0 0, L_0x29d7db0; 1 drivers +v0x2930c70_0 .net *"_s93", 0 0, L_0x29da490; 1 drivers +v0x2930d10_0 .net *"_s95", 0 0, L_0x29da7e0; 1 drivers +v0x2931200_0 .net *"_s96", 0 0, L_0x29da6b0; 1 drivers +v0x2931280_0 .net *"_s99", 0 0, L_0x29daa60; 1 drivers +v0x2930f00_0 .alias "a", 31 0, v0x2980e00_0; +v0x2930f80_0 .alias "b", 31 0, v0x2970880_0; +v0x2931000_0 .alias "out", 31 0, v0x296fed0_0; +L_0x29d6330 .part/pv L_0x29d6420, 0, 1, 32; +L_0x29d64d0 .part L_0x2989450, 0, 1; +L_0x29d69e0 .part v0x2970590_0, 0, 1; +L_0x29d6a80 .part/pv L_0x29d5e00, 1, 1, 32; +L_0x29d6b70 .part L_0x2989450, 1, 1; +L_0x29d6c60 .part v0x2970590_0, 1, 1; +L_0x29d6d50 .part/pv L_0x29d6e80, 2, 1, 32; +L_0x29d6ee0 .part L_0x2989450, 2, 1; +L_0x29d7020 .part v0x2970590_0, 2, 1; +L_0x29d7110 .part/pv L_0x29d7210, 3, 1, 32; +L_0x29d7270 .part L_0x2989450, 3, 1; +L_0x29d7360 .part v0x2970590_0, 3, 1; +L_0x29d74c0 .part/pv L_0x29d71b0, 4, 1, 32; +L_0x29d75b0 .part L_0x2989450, 4, 1; +L_0x29d7720 .part v0x2970590_0, 4, 1; +L_0x29d7810 .part/pv L_0x29d7940, 5, 1, 32; +L_0x29d79f0 .part L_0x2989450, 5, 1; +L_0x29d7ae0 .part v0x2970590_0, 5, 1; +L_0x29d7c70 .part/pv L_0x29d78b0, 6, 1, 32; +L_0x29d7e20 .part L_0x2989450, 6, 1; +L_0x29d7bd0 .part v0x2970590_0, 6, 1; +L_0x29d8010 .part/pv L_0x29d7f10, 7, 1, 32; +L_0x29d81c0 .part L_0x2989450, 7, 1; +L_0x29d82b0 .part v0x2970590_0, 7, 1; +L_0x29d80b0 .part/pv L_0x29d8470, 8, 1, 32; +L_0x29d8520 .part L_0x2989450, 8, 1; +L_0x29d83a0 .part v0x2970590_0, 8, 1; +L_0x29d8740 .part/pv L_0x29d8610, 9, 1, 32; +L_0x29d8930 .part L_0x2989450, 9, 1; +L_0x29d89d0 .part v0x2970590_0, 9, 1; +L_0x29d87e0 .part/pv L_0x29d8bc0, 10, 1, 32; +L_0x29d8c20 .part L_0x2989450, 10, 1; +L_0x29d8ac0 .part v0x2970590_0, 10, 1; +L_0x29d8e20 .part/pv L_0x29d8d10, 11, 1, 32; +L_0x29d8fe0 .part L_0x2989450, 11, 1; +L_0x29c79a0 .part v0x2970590_0, 11, 1; +L_0x29d8ec0 .part/pv L_0x29d88d0, 12, 1, 32; +L_0x29c7b70 .part L_0x2989450, 12, 1; +L_0x29c7a40 .part v0x2970590_0, 12, 1; +L_0x29c7da0 .part/pv L_0x29d76a0, 13, 1, 32; +L_0x29c7f90 .part L_0x2989450, 13, 1; +L_0x29c8080 .part v0x2970590_0, 13, 1; +L_0x29c7e40 .part/pv L_0x29c7d30, 14, 1, 32; +L_0x29d7d10 .part L_0x2989450, 14, 1; +L_0x29da090 .part v0x2970590_0, 14, 1; +L_0x29da570 .part/pv L_0x29d7db0, 15, 1, 32; +L_0x29da490 .part L_0x2989450, 15, 1; +L_0x29da7e0 .part v0x2970590_0, 15, 1; +L_0x29da610 .part/pv L_0x29da6b0, 16, 1, 32; +L_0x29daa60 .part L_0x2989450, 16, 1; +L_0x29da8d0 .part v0x2970590_0, 16, 1; +L_0x29da9c0 .part/pv L_0x29dad00, 17, 1, 32; +L_0x29dae50 .part L_0x2989450, 17, 1; +L_0x29daef0 .part v0x2970590_0, 17, 1; +L_0x29dab50 .part/pv L_0x29dabf0, 18, 1, 32; +L_0x29db1a0 .part L_0x2989450, 18, 1; +L_0x29dafe0 .part v0x2970590_0, 18, 1; +L_0x29db0d0 .part/pv L_0x29db420, 19, 1, 32; +L_0x29dadb0 .part L_0x2989450, 19, 1; +L_0x29db5d0 .part v0x2970590_0, 19, 1; +L_0x29db240 .part/pv L_0x29db2e0, 20, 1, 32; +L_0x29db8b0 .part L_0x2989450, 20, 1; +L_0x29db6c0 .part v0x2970590_0, 20, 1; +L_0x29db7b0 .part/pv L_0x29db850, 21, 1, 32; +L_0x29db4d0 .part L_0x2989450, 21, 1; +L_0x29dbcc0 .part v0x2970590_0, 21, 1; +L_0x29db950 .part/pv L_0x29db9f0, 22, 1, 32; +L_0x29dbaa0 .part L_0x2989450, 22, 1; +L_0x29dbdb0 .part v0x2970590_0, 22, 1; +L_0x29dbea0 .part/pv L_0x29dbf40, 23, 1, 32; +L_0x29dbbb0 .part L_0x2989450, 23, 1; +L_0x29dc3d0 .part v0x2970590_0, 23, 1; +L_0x29dc020 .part/pv L_0x29dc0c0, 24, 1, 32; +L_0x29dc170 .part L_0x2989450, 24, 1; +L_0x29dc720 .part v0x2970590_0, 24, 1; +L_0x29dc810 .part/pv L_0x29dc4c0, 25, 1, 32; +L_0x29dc650 .part L_0x2989450, 25, 1; +L_0x29dcb20 .part v0x2970590_0, 25, 1; +L_0x29dc8b0 .part/pv L_0x29dc950, 26, 1, 32; +L_0x29dca00 .part L_0x2989450, 26, 1; +L_0x29dce50 .part v0x2970590_0, 26, 1; +L_0x29dcf40 .part/pv L_0x29dcbc0, 27, 1, 32; +L_0x29dc570 .part L_0x2989450, 27, 1; +L_0x29dcdb0 .part v0x2970590_0, 27, 1; +L_0x29dcfe0 .part/pv L_0x29dd080, 28, 1, 32; +L_0x29dd130 .part L_0x2989450, 28, 1; +L_0x29dd590 .part v0x2970590_0, 28, 1; +L_0x29dd630 .part/pv L_0x29dd2d0, 29, 1, 32; +L_0x29dcc70 .part L_0x2989450, 29, 1; +L_0x29dd480 .part v0x2970590_0, 29, 1; +L_0x29dd9b0 .part/pv L_0x292e8d0, 30, 1, 32; +L_0x29da1d0 .part L_0x2989450, 30, 1; +L_0x29da270 .part v0x2970590_0, 30, 1; +L_0x29da310 .part/pv L_0x29d7450, 31, 1, 32; +L_0x29dd380 .part L_0x2989450, 31, 1; +L_0x29dd7e0 .part v0x2970590_0, 31, 1; +S_0x275fe60 .scope module, "nor0" "nor_32bit" 18 39, 24 1, S_0x28a5ac0; + .timescale 0 0; +L_0x29de170 .functor NOR 1, L_0x29de220, L_0x29de310, C4<0>, C4<0>; +L_0x29de4a0 .functor NOR 1, L_0x29de550, L_0x29de640, C4<0>, C4<0>; +L_0x29de860 .functor NOR 1, L_0x29de8c0, L_0x29dea00, C4<0>, C4<0>; +L_0x29debf0 .functor NOR 1, L_0x29dec50, L_0x29ded40, C4<0>, C4<0>; +L_0x29deb90 .functor NOR 1, L_0x29def90, L_0x29df100, C4<0>, C4<0>; +L_0x29df320 .functor NOR 1, L_0x29df3d0, L_0x29df4c0, C4<0>, C4<0>; +L_0x29df290 .functor NOR 1, L_0x29df800, L_0x29df5b0, C4<0>, C4<0>; +L_0x29df8f0 .functor NOR 1, L_0x29dfba0, L_0x29dfc90, C4<0>, C4<0>; +L_0x29dfe50 .functor NOR 1, L_0x29dff00, L_0x29dfd80, C4<0>, C4<0>; +L_0x29dfff0 .functor NOR 1, L_0x29e0310, L_0x29e03b0, C4<0>, C4<0>; +L_0x29e05a0 .functor NOR 1, L_0x29e0600, L_0x29e04a0, C4<0>, C4<0>; +L_0x29e06f0 .functor NOR 1, L_0x29e09c0, L_0x29e0a60, C4<0>, C4<0>; +L_0x29e02b0 .functor NOR 1, L_0x29e0c80, L_0x29e0b50, C4<0>, C4<0>; +L_0x29e0d70 .functor NOR 1, L_0x29e10a0, L_0x29e1140, C4<0>, C4<0>; +L_0x29e0ff0 .functor NOR 1, L_0x29df6f0, L_0x29e1230, C4<0>, C4<0>; +L_0x29e1320 .functor NOR 1, L_0x29e1930, L_0x29e19d0, C4<0>, C4<0>; +L_0x29e1850 .functor NOR 1, L_0x29e1c50, L_0x29e1ac0, C4<0>, C4<0>; +L_0x29e1ef0 .functor NOR 1, L_0x29e2040, L_0x29e20e0, C4<0>, C4<0>; +L_0x29e1de0 .functor NOR 1, L_0x29e2390, L_0x29e21d0, C4<0>, C4<0>; +L_0x29e2610 .functor NOR 1, L_0x29e1fa0, L_0x29e27c0, C4<0>, C4<0>; +L_0x29e24d0 .functor NOR 1, L_0x29e2aa0, L_0x29e28b0, C4<0>, C4<0>; +L_0x29e2a40 .functor NOR 1, L_0x29e26c0, L_0x29e2eb0, C4<0>, C4<0>; +L_0x29e2be0 .functor NOR 1, L_0x29e2c90, L_0x29e2fa0, C4<0>, C4<0>; +L_0x29e3130 .functor NOR 1, L_0x29e2da0, L_0x29e35c0, C4<0>, C4<0>; +L_0x29e32b0 .functor NOR 1, L_0x29e3360, L_0x29e3910, C4<0>, C4<0>; +L_0x29e36b0 .functor NOR 1, L_0x29e3840, L_0x29e3d10, C4<0>, C4<0>; +L_0x29e3b40 .functor NOR 1, L_0x29e3bf0, L_0x29e4040, C4<0>, C4<0>; +L_0x29e3db0 .functor NOR 1, L_0x29e3760, L_0x29e3fa0, C4<0>, C4<0>; +L_0x29e4270 .functor NOR 1, L_0x29e4320, L_0x29e4780, C4<0>, C4<0>; +L_0x29e44c0 .functor NOR 1, L_0x29e3e60, L_0x29e4670, C4<0>, C4<0>; +L_0x270ff80 .functor NOR 1, L_0x29e1390, L_0x29e1430, C4<0>, C4<0>; +L_0x26fcfb0 .functor NOR 1, L_0x29e4570, L_0x29e49d0, C4<0>, C4<0>; +v0x2726df0_0 .net *"_s0", 0 0, L_0x29de170; 1 drivers +v0x2726eb0_0 .net *"_s101", 0 0, L_0x29e1ac0; 1 drivers +v0x2726f50_0 .net *"_s102", 0 0, L_0x29e1ef0; 1 drivers +v0x2700a10_0 .net *"_s105", 0 0, L_0x29e2040; 1 drivers +v0x2700a90_0 .net *"_s107", 0 0, L_0x29e20e0; 1 drivers +v0x2700b30_0 .net *"_s108", 0 0, L_0x29e1de0; 1 drivers +v0x279eee0_0 .net *"_s11", 0 0, L_0x29de640; 1 drivers +v0x279ef80_0 .net *"_s111", 0 0, L_0x29e2390; 1 drivers +v0x279f020_0 .net *"_s113", 0 0, L_0x29e21d0; 1 drivers +v0x270f1f0_0 .net *"_s114", 0 0, L_0x29e2610; 1 drivers +v0x270f290_0 .net *"_s117", 0 0, L_0x29e1fa0; 1 drivers +v0x270f330_0 .net *"_s119", 0 0, L_0x29e27c0; 1 drivers +v0x26f5350_0 .net *"_s12", 0 0, L_0x29de860; 1 drivers +v0x26f53f0_0 .net *"_s120", 0 0, L_0x29e24d0; 1 drivers +v0x2796cf0_0 .net *"_s123", 0 0, L_0x29e2aa0; 1 drivers +v0x2796d90_0 .net *"_s125", 0 0, L_0x29e28b0; 1 drivers +v0x26f5470_0 .net *"_s126", 0 0, L_0x29e2a40; 1 drivers +v0x2754d50_0 .net *"_s129", 0 0, L_0x29e26c0; 1 drivers +v0x2796e10_0 .net *"_s131", 0 0, L_0x29e2eb0; 1 drivers +v0x2754e70_0 .net *"_s132", 0 0, L_0x29e2be0; 1 drivers +v0x2754dd0_0 .net *"_s135", 0 0, L_0x29e2c90; 1 drivers +v0x279c170_0 .net *"_s137", 0 0, L_0x29e2fa0; 1 drivers +v0x2754ef0_0 .net *"_s138", 0 0, L_0x29e3130; 1 drivers +v0x279c2b0_0 .net *"_s141", 0 0, L_0x29e2da0; 1 drivers +v0x279c1f0_0 .net *"_s143", 0 0, L_0x29e35c0; 1 drivers +v0x279de00_0 .net *"_s144", 0 0, L_0x29e32b0; 1 drivers +v0x279c330_0 .net *"_s147", 0 0, L_0x29e3360; 1 drivers +v0x279df60_0 .net *"_s149", 0 0, L_0x29e3910; 1 drivers +v0x279dfe0_0 .net *"_s15", 0 0, L_0x29de8c0; 1 drivers +v0x279de80_0 .net *"_s150", 0 0, L_0x29e36b0; 1 drivers +v0x2799aa0_0 .net *"_s153", 0 0, L_0x29e3840; 1 drivers +v0x2799b40_0 .net *"_s155", 0 0, L_0x29e3d10; 1 drivers +v0x27999a0_0 .net *"_s156", 0 0, L_0x29e3b40; 1 drivers +v0x2799a20_0 .net *"_s159", 0 0, L_0x29e3bf0; 1 drivers +v0x26bd7b0_0 .net *"_s161", 0 0, L_0x29e4040; 1 drivers +v0x26bd850_0 .net *"_s162", 0 0, L_0x29e3db0; 1 drivers +v0x26bd690_0 .net *"_s165", 0 0, L_0x29e3760; 1 drivers +v0x26bd730_0 .net *"_s167", 0 0, L_0x29e3fa0; 1 drivers +v0x26f38d0_0 .net *"_s168", 0 0, L_0x29e4270; 1 drivers +v0x26f3970_0 .net *"_s17", 0 0, L_0x29dea00; 1 drivers +v0x26f6f30_0 .net *"_s171", 0 0, L_0x29e4320; 1 drivers +v0x26f6fd0_0 .net *"_s173", 0 0, L_0x29e4780; 1 drivers +v0x26f86d0_0 .net *"_s174", 0 0, L_0x29e44c0; 1 drivers +v0x26f8770_0 .net *"_s177", 0 0, L_0x29e3e60; 1 drivers +v0x270e660_0 .net *"_s179", 0 0, L_0x29e4670; 1 drivers +v0x270e700_0 .net *"_s18", 0 0, L_0x29debf0; 1 drivers +v0x2710000_0 .net *"_s180", 0 0, L_0x270ff80; 1 drivers +v0x26f3790_0 .net *"_s183", 0 0, L_0x29e1390; 1 drivers +v0x26f3810_0 .net *"_s185", 0 0, L_0x29e1430; 1 drivers +v0x272f1c0_0 .net *"_s186", 0 0, L_0x26fcfb0; 1 drivers +v0x272f240_0 .net *"_s189", 0 0, L_0x29e4570; 1 drivers +v0x2769030_0 .net *"_s191", 0 0, L_0x29e49d0; 1 drivers +v0x277b200_0 .net *"_s21", 0 0, L_0x29dec50; 1 drivers +v0x26f6de0_0 .net *"_s23", 0 0, L_0x29ded40; 1 drivers +v0x26f6e60_0 .net *"_s24", 0 0, L_0x29deb90; 1 drivers +v0x27842f0_0 .net *"_s27", 0 0, L_0x29def90; 1 drivers +v0x2719be0_0 .net *"_s29", 0 0, L_0x29df100; 1 drivers +v0x26f8570_0 .net *"_s3", 0 0, L_0x29de220; 1 drivers +v0x270d4c0_0 .net *"_s30", 0 0, L_0x29df320; 1 drivers +v0x26f85f0_0 .net *"_s33", 0 0, L_0x29df3d0; 1 drivers +v0x270c480_0 .net *"_s35", 0 0, L_0x29df4c0; 1 drivers +v0x270e4f0_0 .net *"_s36", 0 0, L_0x29df290; 1 drivers +v0x2751ea0_0 .net *"_s39", 0 0, L_0x29df800; 1 drivers +v0x270e570_0 .net *"_s41", 0 0, L_0x29df5b0; 1 drivers +v0x27536c0_0 .net *"_s42", 0 0, L_0x29df8f0; 1 drivers +v0x270fe80_0 .net *"_s45", 0 0, L_0x29dfba0; 1 drivers +v0x270ff00_0 .net *"_s47", 0 0, L_0x29dfc90; 1 drivers +v0x272f030_0 .net *"_s48", 0 0, L_0x29dfe50; 1 drivers +v0x272f0d0_0 .net *"_s5", 0 0, L_0x29de310; 1 drivers +v0x2768e90_0 .net *"_s51", 0 0, L_0x29dff00; 1 drivers +v0x2768f10_0 .net *"_s53", 0 0, L_0x29dfd80; 1 drivers +v0x2768fb0_0 .net *"_s54", 0 0, L_0x29dfff0; 1 drivers +v0x277b050_0 .net *"_s57", 0 0, L_0x29e0310; 1 drivers +v0x277b0f0_0 .net *"_s59", 0 0, L_0x29e03b0; 1 drivers +v0x277b170_0 .net *"_s6", 0 0, L_0x29de4a0; 1 drivers +v0x2784130_0 .net *"_s60", 0 0, L_0x29e05a0; 1 drivers +v0x27841b0_0 .net *"_s63", 0 0, L_0x29e0600; 1 drivers +v0x2784230_0 .net *"_s65", 0 0, L_0x29e04a0; 1 drivers +v0x2719a10_0 .net *"_s66", 0 0, L_0x29e06f0; 1 drivers +v0x2719a90_0 .net *"_s69", 0 0, L_0x29e09c0; 1 drivers +v0x2719b30_0 .net *"_s71", 0 0, L_0x29e0a60; 1 drivers +v0x270d2e0_0 .net *"_s72", 0 0, L_0x29e02b0; 1 drivers +v0x270d380_0 .net *"_s75", 0 0, L_0x29e0c80; 1 drivers +v0x270d420_0 .net *"_s77", 0 0, L_0x29e0b50; 1 drivers +v0x270c290_0 .net *"_s78", 0 0, L_0x29e0d70; 1 drivers +v0x270c330_0 .net *"_s81", 0 0, L_0x29e10a0; 1 drivers +v0x270c3d0_0 .net *"_s83", 0 0, L_0x29e1140; 1 drivers +v0x2751ca0_0 .net *"_s84", 0 0, L_0x29e0ff0; 1 drivers +v0x2751d40_0 .net *"_s87", 0 0, L_0x29df6f0; 1 drivers +v0x2751de0_0 .net *"_s89", 0 0, L_0x29e1230; 1 drivers +v0x27534b0_0 .net *"_s9", 0 0, L_0x29de550; 1 drivers +v0x2753530_0 .net *"_s90", 0 0, L_0x29e1320; 1 drivers +v0x27535d0_0 .net *"_s93", 0 0, L_0x29e1930; 1 drivers +v0x2727cd0_0 .net *"_s95", 0 0, L_0x29e19d0; 1 drivers +v0x2727d70_0 .net *"_s96", 0 0, L_0x29e1850; 1 drivers +v0x2727e10_0 .net *"_s99", 0 0, L_0x29e1c50; 1 drivers +v0x2771f70_0 .alias "a", 31 0, v0x2980e00_0; +v0x2771ff0_0 .alias "b", 31 0, v0x2970880_0; +v0x27720a0_0 .alias "out", 31 0, v0x296ff50_0; +L_0x29dd8d0 .part/pv L_0x29de170, 0, 1, 32; +L_0x29de220 .part L_0x2989450, 0, 1; +L_0x29de310 .part v0x2970590_0, 0, 1; +L_0x29de400 .part/pv L_0x29de4a0, 1, 1, 32; +L_0x29de550 .part L_0x2989450, 1, 1; +L_0x29de640 .part v0x2970590_0, 1, 1; +L_0x29de730 .part/pv L_0x29de860, 2, 1, 32; +L_0x29de8c0 .part L_0x2989450, 2, 1; +L_0x29dea00 .part v0x2970590_0, 2, 1; +L_0x29deaf0 .part/pv L_0x29debf0, 3, 1, 32; +L_0x29dec50 .part L_0x2989450, 3, 1; +L_0x29ded40 .part v0x2970590_0, 3, 1; +L_0x29deea0 .part/pv L_0x29deb90, 4, 1, 32; +L_0x29def90 .part L_0x2989450, 4, 1; +L_0x29df100 .part v0x2970590_0, 4, 1; +L_0x29df1f0 .part/pv L_0x29df320, 5, 1, 32; +L_0x29df3d0 .part L_0x2989450, 5, 1; +L_0x29df4c0 .part v0x2970590_0, 5, 1; +L_0x29df650 .part/pv L_0x29df290, 6, 1, 32; +L_0x29df800 .part L_0x2989450, 6, 1; +L_0x29df5b0 .part v0x2970590_0, 6, 1; +L_0x29df9f0 .part/pv L_0x29df8f0, 7, 1, 32; +L_0x29dfba0 .part L_0x2989450, 7, 1; +L_0x29dfc90 .part v0x2970590_0, 7, 1; +L_0x29dfa90 .part/pv L_0x29dfe50, 8, 1, 32; +L_0x29dff00 .part L_0x2989450, 8, 1; +L_0x29dfd80 .part v0x2970590_0, 8, 1; +L_0x29e0120 .part/pv L_0x29dfff0, 9, 1, 32; +L_0x29e0310 .part L_0x2989450, 9, 1; +L_0x29e03b0 .part v0x2970590_0, 9, 1; +L_0x29e01c0 .part/pv L_0x29e05a0, 10, 1, 32; +L_0x29e0600 .part L_0x2989450, 10, 1; +L_0x29e04a0 .part v0x2970590_0, 10, 1; +L_0x29e0800 .part/pv L_0x29e06f0, 11, 1, 32; +L_0x29e09c0 .part L_0x2989450, 11, 1; +L_0x29e0a60 .part v0x2970590_0, 11, 1; +L_0x29e08a0 .part/pv L_0x29e02b0, 12, 1, 32; +L_0x29e0c80 .part L_0x2989450, 12, 1; +L_0x29e0b50 .part v0x2970590_0, 12, 1; +L_0x29e0eb0 .part/pv L_0x29e0d70, 13, 1, 32; +L_0x29e10a0 .part L_0x2989450, 13, 1; +L_0x29e1140 .part v0x2970590_0, 13, 1; +L_0x29e0f50 .part/pv L_0x29e0ff0, 14, 1, 32; +L_0x29df6f0 .part L_0x2989450, 14, 1; +L_0x29e1230 .part v0x2970590_0, 14, 1; +L_0x29e1710 .part/pv L_0x29e1320, 15, 1, 32; +L_0x29e1930 .part L_0x2989450, 15, 1; +L_0x29e19d0 .part v0x2970590_0, 15, 1; +L_0x29e17b0 .part/pv L_0x29e1850, 16, 1, 32; +L_0x29e1c50 .part L_0x2989450, 16, 1; +L_0x29e1ac0 .part v0x2970590_0, 16, 1; +L_0x29e1bb0 .part/pv L_0x29e1ef0, 17, 1, 32; +L_0x29e2040 .part L_0x2989450, 17, 1; +L_0x29e20e0 .part v0x2970590_0, 17, 1; +L_0x29e1d40 .part/pv L_0x29e1de0, 18, 1, 32; +L_0x29e2390 .part L_0x2989450, 18, 1; +L_0x29e21d0 .part v0x2970590_0, 18, 1; +L_0x29e22c0 .part/pv L_0x29e2610, 19, 1, 32; +L_0x29e1fa0 .part L_0x2989450, 19, 1; +L_0x29e27c0 .part v0x2970590_0, 19, 1; +L_0x29e2430 .part/pv L_0x29e24d0, 20, 1, 32; +L_0x29e2aa0 .part L_0x2989450, 20, 1; +L_0x29e28b0 .part v0x2970590_0, 20, 1; +L_0x29e29a0 .part/pv L_0x29e2a40, 21, 1, 32; +L_0x29e26c0 .part L_0x2989450, 21, 1; +L_0x29e2eb0 .part v0x2970590_0, 21, 1; +L_0x29e2b40 .part/pv L_0x29e2be0, 22, 1, 32; +L_0x29e2c90 .part L_0x2989450, 22, 1; +L_0x29e2fa0 .part v0x2970590_0, 22, 1; +L_0x29e3090 .part/pv L_0x29e3130, 23, 1, 32; +L_0x29e2da0 .part L_0x2989450, 23, 1; +L_0x29e35c0 .part v0x2970590_0, 23, 1; +L_0x29e3210 .part/pv L_0x29e32b0, 24, 1, 32; +L_0x29e3360 .part L_0x2989450, 24, 1; +L_0x29e3910 .part v0x2970590_0, 24, 1; +L_0x29e3a00 .part/pv L_0x29e36b0, 25, 1, 32; +L_0x29e3840 .part L_0x2989450, 25, 1; +L_0x29e3d10 .part v0x2970590_0, 25, 1; +L_0x29e3aa0 .part/pv L_0x29e3b40, 26, 1, 32; +L_0x29e3bf0 .part L_0x2989450, 26, 1; +L_0x29e4040 .part v0x2970590_0, 26, 1; +L_0x29e4130 .part/pv L_0x29e3db0, 27, 1, 32; +L_0x29e3760 .part L_0x2989450, 27, 1; +L_0x29e3fa0 .part v0x2970590_0, 27, 1; +L_0x29e41d0 .part/pv L_0x29e4270, 28, 1, 32; +L_0x29e4320 .part L_0x2989450, 28, 1; +L_0x29e4780 .part v0x2970590_0, 28, 1; +L_0x29e4820 .part/pv L_0x29e44c0, 29, 1, 32; +L_0x29e3e60 .part L_0x2989450, 29, 1; +L_0x29e4670 .part v0x2970590_0, 29, 1; +L_0x29e4ba0 .part/pv L_0x270ff80, 30, 1, 32; +L_0x29e1390 .part L_0x2989450, 30, 1; +L_0x29e1430 .part v0x2970590_0, 30, 1; +L_0x29e14d0 .part/pv L_0x26fcfb0, 31, 1, 32; +L_0x29e4570 .part L_0x2989450, 31, 1; +L_0x29e49d0 .part v0x2970590_0, 31, 1; +S_0x289d830 .scope module, "or0" "or_32bit" 18 40, 25 1, S_0x28a5ac0; + .timescale 0 0; +L_0x272f150 .functor OR 1, L_0x29e5360, L_0x29e5400, C4<0>, C4<0>; +L_0x29e5590 .functor OR 1, L_0x29e5640, L_0x29e5730, C4<0>, C4<0>; +L_0x29e4610 .functor OR 1, L_0x29e59a0, L_0x29e5ae0, C4<0>, C4<0>; +L_0x29e5cd0 .functor OR 1, L_0x29e5d30, L_0x29e5e20, C4<0>, C4<0>; +L_0x29e5c70 .functor OR 1, L_0x29e6070, L_0x29e61e0, C4<0>, C4<0>; +L_0x29e6400 .functor OR 1, L_0x29e64b0, L_0x29e65a0, C4<0>, C4<0>; +L_0x29e6370 .functor OR 1, L_0x29e68e0, L_0x29e6690, C4<0>, C4<0>; +L_0x29e69d0 .functor OR 1, L_0x29e6c80, L_0x29e6d70, C4<0>, C4<0>; +L_0x29e6f30 .functor OR 1, L_0x29e6fe0, L_0x29e6e60, C4<0>, C4<0>; +L_0x29e70d0 .functor OR 1, L_0x29e73f0, L_0x29e7490, C4<0>, C4<0>; +L_0x29e7680 .functor OR 1, L_0x29e76e0, L_0x29e7580, C4<0>, C4<0>; +L_0x29e77d0 .functor OR 1, L_0x29e7aa0, L_0x29e7b40, C4<0>, C4<0>; +L_0x29e7390 .functor OR 1, L_0x29e7d60, L_0x29e7c30, C4<0>, C4<0>; +L_0x29e7e50 .functor OR 1, L_0x29e8180, L_0x29e8220, C4<0>, C4<0>; +L_0x29e80d0 .functor OR 1, L_0x29e67d0, L_0x29e8310, C4<0>, C4<0>; +L_0x29e8400 .functor OR 1, L_0x29e8a10, L_0x29e8ab0, C4<0>, C4<0>; +L_0x29e8930 .functor OR 1, L_0x29e8d30, L_0x29e8ba0, C4<0>, C4<0>; +L_0x29e8fd0 .functor OR 1, L_0x29e9120, L_0x29e91c0, C4<0>, C4<0>; +L_0x29e8ec0 .functor OR 1, L_0x29e9470, L_0x29e92b0, C4<0>, C4<0>; +L_0x29e96f0 .functor OR 1, L_0x29e9080, L_0x29e98a0, C4<0>, C4<0>; +L_0x29e95b0 .functor OR 1, L_0x29e9b80, L_0x29e9990, C4<0>, C4<0>; +L_0x29e9b20 .functor OR 1, L_0x29e97a0, L_0x29e9f90, C4<0>, C4<0>; +L_0x278d2f0 .functor OR 1, L_0x29e9cc0, L_0x29e9d60, C4<0>, C4<0>; +L_0x296f160 .functor OR 1, L_0x29e9e80, L_0x29cb4d0, C4<0>, C4<0>; +L_0x29e5f10 .functor OR 1, L_0x29cb920, L_0x29cb6d0, C4<0>, C4<0>; +L_0x29e6160 .functor OR 1, L_0x29cb400, L_0x29cbd60, C4<0>, C4<0>; +L_0x29cbab0 .functor OR 1, L_0x29cbb60, L_0x29cc0e0, C4<0>, C4<0>; +L_0x29cc270 .functor OR 1, L_0x29cbc50, L_0x29cbe50, C4<0>, C4<0>; +L_0x29cbfe0 .functor OR 1, L_0x29ec340, L_0x29ec090, C4<0>, C4<0>; +L_0x29ec220 .functor OR 1, L_0x29cc320, L_0x29ec7b0, C4<0>, C4<0>; +L_0x29e8470 .functor OR 1, L_0x29e84d0, L_0x29e8570, C4<0>, C4<0>; +L_0x29ec520 .functor OR 1, L_0x29ec960, L_0x29eca50, C4<0>, C4<0>; +v0x2884e50_0 .net *"_s0", 0 0, L_0x272f150; 1 drivers +v0x2884f10_0 .net *"_s101", 0 0, L_0x29e8ba0; 1 drivers +v0x287cbc0_0 .net *"_s102", 0 0, L_0x29e8fd0; 1 drivers +v0x287cc60_0 .net *"_s105", 0 0, L_0x29e9120; 1 drivers +v0x287fa30_0 .net *"_s107", 0 0, L_0x29e91c0; 1 drivers +v0x287fab0_0 .net *"_s108", 0 0, L_0x29e8ec0; 1 drivers +v0x2887cc0_0 .net *"_s11", 0 0, L_0x29e5730; 1 drivers +v0x2887d40_0 .net *"_s111", 0 0, L_0x29e9470; 1 drivers +v0x28a06a0_0 .net *"_s113", 0 0, L_0x29e92b0; 1 drivers +v0x28a0720_0 .net *"_s114", 0 0, L_0x29e96f0; 1 drivers +v0x28a8930_0 .net *"_s117", 0 0, L_0x29e9080; 1 drivers +v0x28a89b0_0 .net *"_s119", 0 0, L_0x29e98a0; 1 drivers +v0x292bfb0_0 .net *"_s12", 0 0, L_0x29e4610; 1 drivers +v0x2929b10_0 .net *"_s120", 0 0, L_0x29e95b0; 1 drivers +v0x28295c0_0 .net *"_s123", 0 0, L_0x29e9b80; 1 drivers +v0x2829660_0 .net *"_s125", 0 0, L_0x29e9990; 1 drivers +v0x2929b90_0 .net *"_s126", 0 0, L_0x29e9b20; 1 drivers +v0x2829340_0 .net *"_s129", 0 0, L_0x29e97a0; 1 drivers +v0x2829270_0 .net *"_s131", 0 0, L_0x29e9f90; 1 drivers +v0x2828fc0_0 .net *"_s132", 0 0, L_0x278d2f0; 1 drivers +v0x2828ca0_0 .net *"_s135", 0 0, L_0x29e9cc0; 1 drivers +v0x2828f20_0 .net *"_s137", 0 0, L_0x29e9d60; 1 drivers +v0x282a350_0 .net *"_s138", 0 0, L_0x296f160; 1 drivers +v0x2828bf0_0 .net *"_s141", 0 0, L_0x29e9e80; 1 drivers +v0x282a030_0 .net *"_s143", 0 0, L_0x29cb4d0; 1 drivers +v0x282a290_0 .net *"_s144", 0 0, L_0x29e5f10; 1 drivers +v0x2829f60_0 .net *"_s147", 0 0, L_0x29cb920; 1 drivers +v0x27cdc70_0 .net *"_s149", 0 0, L_0x29cb6d0; 1 drivers +v0x27cdd10_0 .net *"_s15", 0 0, L_0x29e59a0; 1 drivers +v0x2872240_0 .net *"_s150", 0 0, L_0x29e6160; 1 drivers +v0x28722c0_0 .net *"_s153", 0 0, L_0x29cb400; 1 drivers +v0x27c89c0_0 .net *"_s155", 0 0, L_0x29cbd60; 1 drivers +v0x28931f0_0 .net *"_s156", 0 0, L_0x29cbab0; 1 drivers +v0x2893290_0 .net *"_s159", 0 0, L_0x29cbb60; 1 drivers +v0x287a900_0 .net *"_s161", 0 0, L_0x29cc0e0; 1 drivers +v0x28abb30_0 .net *"_s162", 0 0, L_0x29cc270; 1 drivers +v0x28abbb0_0 .net *"_s165", 0 0, L_0x29cbc50; 1 drivers +v0x28d3aa0_0 .net *"_s167", 0 0, L_0x29cbe50; 1 drivers +v0x28d3b20_0 .net *"_s168", 0 0, L_0x29cbfe0; 1 drivers +v0x289b590_0 .net *"_s17", 0 0, L_0x29e5ae0; 1 drivers +v0x289b630_0 .net *"_s171", 0 0, L_0x29ec340; 1 drivers +v0x28d2300_0 .net *"_s173", 0 0, L_0x29ec090; 1 drivers +v0x28d2380_0 .net *"_s174", 0 0, L_0x29ec220; 1 drivers +v0x28d1730_0 .net *"_s177", 0 0, L_0x29cc320; 1 drivers +v0x28c21b0_0 .net *"_s179", 0 0, L_0x29ec7b0; 1 drivers +v0x28d17b0_0 .net *"_s18", 0 0, L_0x29e5cd0; 1 drivers +v0x278d350_0 .net *"_s180", 0 0, L_0x29e8470; 1 drivers +v0x278d3d0_0 .net *"_s183", 0 0, L_0x29e84d0; 1 drivers +v0x272af10_0 .net *"_s185", 0 0, L_0x29e8570; 1 drivers +v0x28d0b60_0 .net *"_s186", 0 0, L_0x29ec520; 1 drivers +v0x28d0be0_0 .net *"_s189", 0 0, L_0x29ec960; 1 drivers +v0x26fb0d0_0 .net *"_s191", 0 0, L_0x29eca50; 1 drivers +v0x27456f0_0 .net *"_s21", 0 0, L_0x29e5d30; 1 drivers +v0x28cff90_0 .net *"_s23", 0 0, L_0x29e5e20; 1 drivers +v0x28d0010_0 .net *"_s24", 0 0, L_0x29e5c70; 1 drivers +v0x26f9c60_0 .net *"_s27", 0 0, L_0x29e6070; 1 drivers +v0x275ff90_0 .net *"_s29", 0 0, L_0x29e61e0; 1 drivers +v0x28cf3c0_0 .net *"_s3", 0 0, L_0x29e5360; 1 drivers +v0x2726fd0_0 .net *"_s30", 0 0, L_0x29e6400; 1 drivers +v0x28cf440_0 .net *"_s33", 0 0, L_0x29e64b0; 1 drivers +v0x2700c00_0 .net *"_s35", 0 0, L_0x29e65a0; 1 drivers +v0x28ce7f0_0 .net *"_s36", 0 0, L_0x29e6370; 1 drivers +v0x279f0e0_0 .net *"_s39", 0 0, L_0x29e68e0; 1 drivers +v0x28ce870_0 .net *"_s41", 0 0, L_0x29e6690; 1 drivers +v0x270f400_0 .net *"_s42", 0 0, L_0x29e69d0; 1 drivers +v0x28cdc20_0 .net *"_s45", 0 0, L_0x29e6c80; 1 drivers +v0x28cdca0_0 .net *"_s47", 0 0, L_0x29e6d70; 1 drivers +v0x28cd050_0 .net *"_s48", 0 0, L_0x29e6f30; 1 drivers +v0x28cd0f0_0 .net *"_s5", 0 0, L_0x29e5400; 1 drivers +v0x28d8180_0 .net *"_s51", 0 0, L_0x29e6fe0; 1 drivers +v0x28d8200_0 .net *"_s53", 0 0, L_0x29e6e60; 1 drivers +v0x28d75b0_0 .net *"_s54", 0 0, L_0x29e70d0; 1 drivers +v0x28d7650_0 .net *"_s57", 0 0, L_0x29e73f0; 1 drivers +v0x28d69e0_0 .net *"_s59", 0 0, L_0x29e7490; 1 drivers +v0x28d6a60_0 .net *"_s6", 0 0, L_0x29e5590; 1 drivers +v0x28d5e10_0 .net *"_s60", 0 0, L_0x29e7680; 1 drivers +v0x28d5e90_0 .net *"_s63", 0 0, L_0x29e76e0; 1 drivers +v0x28d5240_0 .net *"_s65", 0 0, L_0x29e7580; 1 drivers +v0x28d52c0_0 .net *"_s66", 0 0, L_0x29e77d0; 1 drivers +v0x28d4670_0 .net *"_s69", 0 0, L_0x29e7aa0; 1 drivers +v0x28d4710_0 .net *"_s71", 0 0, L_0x29e7b40; 1 drivers +v0x28d2ed0_0 .net *"_s72", 0 0, L_0x29e7390; 1 drivers +v0x28d2f50_0 .net *"_s75", 0 0, L_0x29e7d60; 1 drivers +v0x2713ef0_0 .net *"_s77", 0 0, L_0x29e7c30; 1 drivers +v0x2713f90_0 .net *"_s78", 0 0, L_0x29e7e50; 1 drivers +v0x28c2040_0 .net *"_s81", 0 0, L_0x29e8180; 1 drivers +v0x28c20e0_0 .net *"_s83", 0 0, L_0x29e8220; 1 drivers +v0x278d1d0_0 .net *"_s84", 0 0, L_0x29e80d0; 1 drivers +v0x278d270_0 .net *"_s87", 0 0, L_0x29e67d0; 1 drivers +v0x272ad80_0 .net *"_s89", 0 0, L_0x29e8310; 1 drivers +v0x272ae20_0 .net *"_s9", 0 0, L_0x29e5640; 1 drivers +v0x26faf30_0 .net *"_s90", 0 0, L_0x29e8400; 1 drivers +v0x26fafd0_0 .net *"_s93", 0 0, L_0x29e8a10; 1 drivers +v0x2745540_0 .net *"_s95", 0 0, L_0x29e8ab0; 1 drivers +v0x27455e0_0 .net *"_s96", 0 0, L_0x29e8930; 1 drivers +v0x26f9aa0_0 .net *"_s99", 0 0, L_0x29e8d30; 1 drivers +v0x26f9b40_0 .alias "a", 31 0, v0x2980e00_0; +v0x26f9be0_0 .alias "b", 31 0, v0x2970880_0; +v0x275fdc0_0 .alias "out", 31 0, v0x296ffd0_0; +L_0x29e4ac0 .part/pv L_0x272f150, 0, 1, 32; +L_0x29e5360 .part L_0x2989450, 0, 1; +L_0x29e5400 .part v0x2970590_0, 0, 1; +L_0x29e54f0 .part/pv L_0x29e5590, 1, 1, 32; +L_0x29e5640 .part L_0x2989450, 1, 1; +L_0x29e5730 .part v0x2970590_0, 1, 1; +L_0x29e5820 .part/pv L_0x29e4610, 2, 1, 32; +L_0x29e59a0 .part L_0x2989450, 2, 1; +L_0x29e5ae0 .part v0x2970590_0, 2, 1; +L_0x29e5bd0 .part/pv L_0x29e5cd0, 3, 1, 32; +L_0x29e5d30 .part L_0x2989450, 3, 1; +L_0x29e5e20 .part v0x2970590_0, 3, 1; +L_0x29e5f80 .part/pv L_0x29e5c70, 4, 1, 32; +L_0x29e6070 .part L_0x2989450, 4, 1; +L_0x29e61e0 .part v0x2970590_0, 4, 1; +L_0x29e62d0 .part/pv L_0x29e6400, 5, 1, 32; +L_0x29e64b0 .part L_0x2989450, 5, 1; +L_0x29e65a0 .part v0x2970590_0, 5, 1; +L_0x29e6730 .part/pv L_0x29e6370, 6, 1, 32; +L_0x29e68e0 .part L_0x2989450, 6, 1; +L_0x29e6690 .part v0x2970590_0, 6, 1; +L_0x29e6ad0 .part/pv L_0x29e69d0, 7, 1, 32; +L_0x29e6c80 .part L_0x2989450, 7, 1; +L_0x29e6d70 .part v0x2970590_0, 7, 1; +L_0x29e6b70 .part/pv L_0x29e6f30, 8, 1, 32; +L_0x29e6fe0 .part L_0x2989450, 8, 1; +L_0x29e6e60 .part v0x2970590_0, 8, 1; +L_0x29e7200 .part/pv L_0x29e70d0, 9, 1, 32; +L_0x29e73f0 .part L_0x2989450, 9, 1; +L_0x29e7490 .part v0x2970590_0, 9, 1; +L_0x29e72a0 .part/pv L_0x29e7680, 10, 1, 32; +L_0x29e76e0 .part L_0x2989450, 10, 1; +L_0x29e7580 .part v0x2970590_0, 10, 1; +L_0x29e78e0 .part/pv L_0x29e77d0, 11, 1, 32; +L_0x29e7aa0 .part L_0x2989450, 11, 1; +L_0x29e7b40 .part v0x2970590_0, 11, 1; +L_0x29e7980 .part/pv L_0x29e7390, 12, 1, 32; +L_0x29e7d60 .part L_0x2989450, 12, 1; +L_0x29e7c30 .part v0x2970590_0, 12, 1; +L_0x29e7f90 .part/pv L_0x29e7e50, 13, 1, 32; +L_0x29e8180 .part L_0x2989450, 13, 1; +L_0x29e8220 .part v0x2970590_0, 13, 1; +L_0x29e8030 .part/pv L_0x29e80d0, 14, 1, 32; +L_0x29e67d0 .part L_0x2989450, 14, 1; +L_0x29e8310 .part v0x2970590_0, 14, 1; +L_0x29e87f0 .part/pv L_0x29e8400, 15, 1, 32; +L_0x29e8a10 .part L_0x2989450, 15, 1; +L_0x29e8ab0 .part v0x2970590_0, 15, 1; +L_0x29e8890 .part/pv L_0x29e8930, 16, 1, 32; +L_0x29e8d30 .part L_0x2989450, 16, 1; +L_0x29e8ba0 .part v0x2970590_0, 16, 1; +L_0x29e8c90 .part/pv L_0x29e8fd0, 17, 1, 32; +L_0x29e9120 .part L_0x2989450, 17, 1; +L_0x29e91c0 .part v0x2970590_0, 17, 1; +L_0x29e8e20 .part/pv L_0x29e8ec0, 18, 1, 32; +L_0x29e9470 .part L_0x2989450, 18, 1; +L_0x29e92b0 .part v0x2970590_0, 18, 1; +L_0x29e93a0 .part/pv L_0x29e96f0, 19, 1, 32; +L_0x29e9080 .part L_0x2989450, 19, 1; +L_0x29e98a0 .part v0x2970590_0, 19, 1; +L_0x29e9510 .part/pv L_0x29e95b0, 20, 1, 32; +L_0x29e9b80 .part L_0x2989450, 20, 1; +L_0x29e9990 .part v0x2970590_0, 20, 1; +L_0x29e9a80 .part/pv L_0x29e9b20, 21, 1, 32; +L_0x29e97a0 .part L_0x2989450, 21, 1; +L_0x29e9f90 .part v0x2970590_0, 21, 1; +L_0x29e9c20 .part/pv L_0x278d2f0, 22, 1, 32; +L_0x29e9cc0 .part L_0x2989450, 22, 1; +L_0x29e9d60 .part v0x2970590_0, 22, 1; +L_0x29cb630 .part/pv L_0x296f160, 23, 1, 32; +L_0x29e9e80 .part L_0x2989450, 23, 1; +L_0x29cb4d0 .part v0x2970590_0, 23, 1; +L_0x29cb570 .part/pv L_0x29e5f10, 24, 1, 32; +L_0x29cb920 .part L_0x2989450, 24, 1; +L_0x29cb6d0 .part v0x2970590_0, 24, 1; +L_0x29cb7c0 .part/pv L_0x29e6160, 25, 1, 32; +L_0x29cb400 .part L_0x2989450, 25, 1; +L_0x29cbd60 .part v0x2970590_0, 25, 1; +L_0x29cba10 .part/pv L_0x29cbab0, 26, 1, 32; +L_0x29cbb60 .part L_0x2989450, 26, 1; +L_0x29cc0e0 .part v0x2970590_0, 26, 1; +L_0x29cc1d0 .part/pv L_0x29cc270, 27, 1, 32; +L_0x29cbc50 .part L_0x2989450, 27, 1; +L_0x29cbe50 .part v0x2970590_0, 27, 1; +L_0x29cbf40 .part/pv L_0x29cbfe0, 28, 1, 32; +L_0x29ec340 .part L_0x2989450, 28, 1; +L_0x29ec090 .part v0x2970590_0, 28, 1; +L_0x29ec180 .part/pv L_0x29ec220, 29, 1, 32; +L_0x29cc320 .part L_0x2989450, 29, 1; +L_0x29ec7b0 .part v0x2970590_0, 29, 1; +L_0x29ec3e0 .part/pv L_0x29e8470, 30, 1, 32; +L_0x29e84d0 .part L_0x2989450, 30, 1; +L_0x29e8570 .part v0x2970590_0, 30, 1; +L_0x29ec480 .part/pv L_0x29ec520, 31, 1, 32; +L_0x29ec960 .part L_0x2989450, 31, 1; +L_0x29eca50 .part v0x2970590_0, 31, 1; +S_0x28d6110 .scope module, "memory0" "memory" 4 90, 7 42, S_0x287a4b0; + .timescale 0 0; +L_0x29ec6c0 .functor BUFZ 32, L_0x29ec620, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x28d5540_0 .alias "Addr", 31 0, v0x2980cf0_0; +v0x28d4970_0 .alias "DataIn", 31 0, v0x2980e80_0; +v0x28d49f0_0 .net "DataOut", 31 0, L_0x29ec6c0; 1 drivers +v0x28d3da0_0 .net *"_s0", 31 0, L_0x29ec620; 1 drivers +v0x2928110 .array "mem", 0 3950, 31 0; +v0x2928190_0 .alias "regWE", 0 0, v0x2981c30_0; +E_0x28d6200 .event edge, v0x28d78b0_0; +L_0x29ec620 .array/port v0x2928110, v0x296fdd0_0; +S_0x28c3a40 .scope module, "ToReg" "mux" 4 91, 2 1, S_0x287a4b0; + .timescale 0 0; +P_0x28d9248 .param/l "width" 2 2, +C4<0100000>; +v0x28d84c0_0 .alias "address", 0 0, v0x2981970_0; +v0x28d78b0_0 .alias "input0", 31 0, v0x2980cf0_0; +v0x28d7930_0 .net "input1", 31 0, L_0x29ed4a0; 1 drivers +v0x28d6ce0_0 .var "out", 31 0; +E_0x28c3b30 .event edge, v0x28d84c0_0, v0x28d7930_0, v0x28d78b0_0; +S_0x28c51c0 .scope module, "dataOrPC" "mux" 4 95, 2 1, S_0x287a4b0; + .timescale 0 0; +P_0x28c6a08 .param/l "width" 2 2, +C4<0100000>; +v0x28c4620_0 .alias "address", 0 0, v0x2981a20_0; +v0x28d9440_0 .alias "input0", 31 0, v0x2982370_0; +v0x28d94c0_0 .alias "input1", 31 0, v0x2981cb0_0; +v0x28d91c0_0 .var "out", 31 0; +E_0x28c52b0 .event edge, v0x28cd3f0_0, v0x28d94c0_0, v0x28d9440_0; +S_0x28c80c0 .scope module, "jumpto" "mux" 4 99, 2 1, S_0x287a4b0; + .timescale 0 0; +P_0x28c8d68 .param/l "width" 2 2, +C4<011010>; +v0x28c7500_0 .alias "address", 0 0, v0x2981740_0; +v0x28c75a0_0 .alias "input0", 25 0, v0x2982270_0; +v0x28c6960_0 .net "input1", 25 0, L_0x29ed5e0; 1 drivers +v0x28c5d80_0 .var "out", 25 0; +E_0x28c81b0 .event edge, v0x28c7500_0, v0x28c6960_0, v0x28c75a0_0; +S_0x28cbb80 .scope module, "Rd_or_Rt" "mux" 4 102, 2 1, S_0x287a4b0; + .timescale 0 0; +P_0x28cafc8 .param/l "width" 2 2, +C4<0101>; +v0x28ca400_0 .alias "address", 0 0, v0x2981aa0_0; +v0x28c9840_0 .alias "input0", 4 0, v0x2980f30_0; +v0x28c98e0_0 .alias "input1", 4 0, v0x29810c0_0; +v0x28c8c80_0 .var "out", 4 0; +E_0x28cbc70 .event edge, v0x28ca400_0, v0x28c98e0_0, v0x28c9840_0; +S_0x28cdf20 .scope module, "writeRA" "mux" 4 103, 2 1, S_0x287a4b0; + .timescale 0 0; +P_0x28d1ab8 .param/l "width" 2 2, +C4<0101>; +v0x28cd3f0_0 .alias "address", 0 0, v0x2981a20_0; +v0x28cc7c0_0 .alias "input0", 4 0, v0x29821f0_0; +v0x28cc480_0 .net "input1", 4 0, C4<11111>; 1 drivers +v0x28cc520_0 .var "out", 4 0; +E_0x28ce010 .event edge, v0x28cd3f0_0, v0x28cc480_0, v0x28cc7c0_0; +S_0x2871df0 .scope module, "dff" "dff" 26 9; + .timescale 0 0; +P_0x2755388 .param/l "width" 26 10, +C4<01000>; +v0x29826b0_0 .net "ce", 0 0, C4; 0 drivers +v0x2982730_0 .net "clk", 0 0, C4; 0 drivers +v0x29827b0_0 .net "dataIn", 7 0, C4; 0 drivers +v0x2982830_0 .net "dataOut", 7 0, v0x29828b0_0; 1 drivers +v0x29828b0_0 .var "mem", 7 0; +E_0x2970cb0 .event posedge, v0x2982730_0; +S_0x2825ad0 .scope module, "mux32to1by1" "mux32to1by1" 27 1; + .timescale 0 0; +v0x2982930_0 .net "address", 4 0, C4; 0 drivers +v0x29829b0_0 .net "inputs", 31 0, C4; 0 drivers +v0x2982a30_0 .net "mux", 0 0, C4; 0 drivers +v0x2982ad0_0 .net "out", 0 0, L_0x29ed680; 1 drivers +L_0x29ed680 .part/v C4, C4, 1; + .scope S_0x289b140; +T_0 ; + %wait E_0x282cb50; + %load/v 8, v0x28a9090_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_0.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_0.1, 6; + %jmp T_0.2; +T_0.0 ; +<<<<<<< HEAD + %load/v 8, v0x280bdd0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x29441d0_0, 0, 8; + %jmp T_0.2; +T_0.1 ; + %load/v 8, v0x2919ff0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x29441d0_0, 0, 8; +======= + %load/v 8, v0x279add0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x28d31d0_0, 0, 8; + %jmp T_0.2; +T_0.1 ; + %load/v 8, v0x28a8ff0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x28d31d0_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_0.2; +T_0.2 ; + %jmp T_0; + .thread T_0, $push; +<<<<<<< HEAD + .scope S_0x29f1410; +T_1 ; + %wait E_0x29f02e0; + %load/v 8, v0x29f1b70_0, 6; +======= + .scope S_0x2980410; +T_1 ; + %wait E_0x297f2e0; + %load/v 8, v0x2980b70_0, 6; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 6; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 35, 6; + %jmp/1 T_1.1, 6; + %cmpi/u 8, 43, 6; + %jmp/1 T_1.2, 6; + %cmpi/u 8, 2, 6; + %jmp/1 T_1.3, 6; + %cmpi/u 8, 3, 6; + %jmp/1 T_1.4, 6; + %cmpi/u 8, 5, 6; + %jmp/1 T_1.5, 6; + %cmpi/u 8, 14, 6; + %jmp/1 T_1.6, 6; + %cmpi/u 8, 8, 6; + %jmp/1 T_1.7, 6; + %jmp T_1.8; +T_1.0 ; +<<<<<<< HEAD + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 0, 1; + %set/v v0x29f19a0_0, 0, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; + %set/v v0x29f1780_0, 0, 1; + %load/v 8, v0x29f1600_0, 6; +======= + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 0, 1; + %set/v v0x29809a0_0, 0, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 0, 1; + %set/v v0x2980680_0, 0, 1; + %set/v v0x2980780_0, 0, 1; + %load/v 8, v0x2980600_0, 6; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 8, 6; + %jmp/1 T_1.9, 6; + %cmpi/u 8, 36, 6; + %jmp/1 T_1.10, 6; + %cmpi/u 8, 34, 6; + %jmp/1 T_1.11, 6; + %cmpi/u 8, 42, 6; + %jmp/1 T_1.12, 6; + %jmp T_1.13; +T_1.9 ; +<<<<<<< HEAD + %set/v v0x29f1bf0_0, 0, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 1, 1; + %set/v v0x29f1780_0, 1, 1; + %jmp T_1.13; +T_1.10 ; + %set/v v0x29f1bf0_0, 1, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 0, 1; + %jmp T_1.13; +T_1.11 ; + %set/v v0x29f1bf0_0, 1, 1; + %movi 8, 1, 3; + %set/v v0x29f1580_0, 8, 3; + %set/v v0x29f1800_0, 0, 1; + %jmp T_1.13; +T_1.12 ; + %set/v v0x29f1bf0_0, 1, 1; + %movi 8, 2, 3; + %set/v v0x29f1580_0, 8, 3; + %set/v v0x29f1800_0, 0, 1; +======= + %set/v v0x2980bf0_0, 0, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 1, 1; + %set/v v0x2980780_0, 1, 1; + %jmp T_1.13; +T_1.10 ; + %set/v v0x2980bf0_0, 1, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 0, 1; + %jmp T_1.13; +T_1.11 ; + %set/v v0x2980bf0_0, 1, 1; + %movi 8, 1, 3; + %set/v v0x2980580_0, 8, 3; + %set/v v0x2980800_0, 0, 1; + %jmp T_1.13; +T_1.12 ; + %set/v v0x2980bf0_0, 1, 1; + %movi 8, 2, 3; + %set/v v0x2980580_0, 8, 3; + %set/v v0x2980800_0, 0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_1.13; +T_1.13 ; + %jmp T_1.8; +T_1.1 ; +<<<<<<< HEAD + %set/v v0x29f1bf0_0, 1, 1; + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 0, 1; + %set/v v0x29f19a0_0, 1, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 1, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 0, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; + %jmp T_1.8; +T_1.2 ; + %set/v v0x29f1bf0_0, 0, 1; + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 1, 1; + %set/v v0x29f19a0_0, 0, 1; + %set/v v0x29f1af0_0, 1, 1; + %set/v v0x29f1a70_0, 0, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 0, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; + %jmp T_1.8; +T_1.3 ; + %set/v v0x29f1bf0_0, 0, 1; + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 0, 1; + %set/v v0x29f19a0_0, 0, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 0, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 1, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; + %jmp T_1.8; +T_1.4 ; + %set/v v0x29f1bf0_0, 1, 1; + %set/v v0x29f18d0_0, 1, 1; + %set/v v0x29f1500_0, 0, 1; + %set/v v0x29f19a0_0, 0, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 0, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 1, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; + %jmp T_1.8; +T_1.5 ; + %set/v v0x29f1bf0_0, 0, 1; + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 0, 1; + %set/v v0x29f19a0_0, 0, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 0, 1; + %movi 8, 1, 3; + %set/v v0x29f1580_0, 8, 3; + %set/v v0x29f1800_0, 0, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 1, 1; + %jmp T_1.8; +T_1.6 ; + %set/v v0x29f1bf0_0, 1, 1; + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 1, 1; + %set/v v0x29f19a0_0, 1, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 0, 1; + %movi 8, 3, 3; + %set/v v0x29f1580_0, 8, 3; + %set/v v0x29f1800_0, 0, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; + %jmp T_1.8; +T_1.7 ; + %set/v v0x29f1bf0_0, 1, 1; + %set/v v0x29f18d0_0, 0, 1; + %set/v v0x29f1500_0, 1, 1; + %set/v v0x29f19a0_0, 0, 1; + %set/v v0x29f1af0_0, 0, 1; + %set/v v0x29f1a70_0, 0, 1; + %set/v v0x29f1580_0, 0, 3; + %set/v v0x29f1800_0, 0, 1; + %set/v v0x29f1780_0, 0, 1; + %set/v v0x29f1680_0, 0, 1; +======= + %set/v v0x2980bf0_0, 1, 1; + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 0, 1; + %set/v v0x29809a0_0, 1, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 1, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 0, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 0, 1; + %jmp T_1.8; +T_1.2 ; + %set/v v0x2980bf0_0, 0, 1; + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 1, 1; + %set/v v0x29809a0_0, 0, 1; + %set/v v0x2980af0_0, 1, 1; + %set/v v0x2980a70_0, 0, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 0, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 0, 1; + %jmp T_1.8; +T_1.3 ; + %set/v v0x2980bf0_0, 0, 1; + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 0, 1; + %set/v v0x29809a0_0, 0, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 0, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 1, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 0, 1; + %jmp T_1.8; +T_1.4 ; + %set/v v0x2980bf0_0, 1, 1; + %set/v v0x29808d0_0, 1, 1; + %set/v v0x2980500_0, 0, 1; + %set/v v0x29809a0_0, 0, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 0, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 1, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 0, 1; + %jmp T_1.8; +T_1.5 ; + %set/v v0x2980bf0_0, 0, 1; + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 0, 1; + %set/v v0x29809a0_0, 0, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 0, 1; + %movi 8, 1, 3; + %set/v v0x2980580_0, 8, 3; + %set/v v0x2980800_0, 0, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 1, 1; + %jmp T_1.8; +T_1.6 ; + %set/v v0x2980bf0_0, 1, 1; + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 1, 1; + %set/v v0x29809a0_0, 1, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 0, 1; + %movi 8, 3, 3; + %set/v v0x2980580_0, 8, 3; + %set/v v0x2980800_0, 0, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 0, 1; + %jmp T_1.8; +T_1.7 ; + %set/v v0x2980bf0_0, 1, 1; + %set/v v0x29808d0_0, 0, 1; + %set/v v0x2980500_0, 1, 1; + %set/v v0x29809a0_0, 0, 1; + %set/v v0x2980af0_0, 0, 1; + %set/v v0x2980a70_0, 0, 1; + %set/v v0x2980580_0, 0, 3; + %set/v v0x2980800_0, 0, 1; + %set/v v0x2980780_0, 0, 1; + %set/v v0x2980680_0, 0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_1.8; +T_1.8 ; + %jmp T_1; + .thread T_1, $push; +<<<<<<< HEAD + .scope S_0x29f0310; +T_2 ; + %wait E_0x29f0400; + %load/v 8, v0x29f0770_0, 1; + %jmp/0xz T_2.0, 8; + %load/v 8, v0x29f04d0_0, 32; + %ix/getv 3, v0x29f0430_0; + %jmp/1 t_0, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x29f06f0, 0, 8; +======= + .scope S_0x297f310; +T_2 ; + %wait E_0x297f400; + %load/v 8, v0x297f770_0, 1; + %jmp/0xz T_2.0, 8; + %load/v 8, v0x297f4d0_0, 32; + %ix/getv 3, v0x297f430_0; + %jmp/1 t_0, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x297f6f0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 +t_0 ; +T_2.0 ; + %jmp T_2; + .thread T_2, $push; +<<<<<<< HEAD + .scope S_0x29efed0; +T_3 ; + %wait E_0x29effc0; + %load/v 8, v0x29f0030_0, 1; +======= + .scope S_0x297eed0; +T_3 ; + %wait E_0x297efc0; + %load/v 8, v0x297f030_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_3.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_3.1, 6; + %jmp T_3.2; +T_3.0 ; +<<<<<<< HEAD + %load/v 8, v0x29f00f0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29f0230_0, 0, 8; + %jmp T_3.2; +T_3.1 ; + %load/v 8, v0x29f0190_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29f0230_0, 0, 8; +======= + %load/v 8, v0x297f0f0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x297f230_0, 0, 8; + %jmp T_3.2; +T_3.1 ; + %load/v 8, v0x297f190_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x297f230_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_3.2; +T_3.2 ; + %jmp T_3; + .thread T_3, $push; +<<<<<<< HEAD + .scope S_0x29ef700; +T_4 ; + %wait E_0x29ef7f0; + %load/v 8, v0x29efa60_0, 32; + %mov 40, 0, 1; + %load/v 41, v0x29efb40_0, 32; + %mov 73, 0, 1; + %add 8, 41, 33; + %set/v v0x29efbc0_0, 8, 32; + %set/v v0x29efc40_0, 40, 1; + %jmp T_4; + .thread T_4, $push; + .scope S_0x29ef410; +T_5 ; + %wait E_0x29edf20; + %load/v 8, v0x29ef500_0, 1; +======= + .scope S_0x297e700; +T_4 ; + %wait E_0x297e7f0; + %load/v 8, v0x297ea60_0, 32; + %mov 40, 0, 1; + %load/v 41, v0x297eb40_0, 32; + %mov 73, 0, 1; + %add 8, 41, 33; + %set/v v0x297ebc0_0, 8, 32; + %set/v v0x297ec40_0, 40, 1; + %jmp T_4; + .thread T_4, $push; + .scope S_0x297e410; +T_5 ; + %wait E_0x297cf20; + %load/v 8, v0x297e500_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_5.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_5.1, 6; + %jmp T_5.2; +T_5.0 ; +<<<<<<< HEAD + %load/v 8, v0x29ef580_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29ef680_0, 0, 8; + %jmp T_5.2; +T_5.1 ; + %load/v 8, v0x29ef600_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29ef680_0, 0, 8; +======= + %load/v 8, v0x297e580_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x297e680_0, 0, 8; + %jmp T_5.2; +T_5.1 ; + %load/v 8, v0x297e600_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x297e680_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_5.2; +T_5.2 ; + %jmp T_5; + .thread T_5, $push; +<<<<<<< HEAD + .scope S_0x29ef320; +T_6 ; + %set/v v0x29f1150_0, 0, 32; + %end; + .thread T_6; + .scope S_0x29ef320; +T_7 ; + %movi 8, 4, 32; + %set/v v0x29f0bf0_0, 8, 32; + %end; + .thread T_7; + .scope S_0x29ef320; +T_8 ; + %wait E_0x29e3130; + %load/v 8, v0x29f11d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_8.0, 4; + %load/v 8, v0x29f1250_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29f1150_0, 0, 8; +T_8.0 ; + %jmp T_8; + .thread T_8; + .scope S_0x29ec3c0; +T_9 ; + %wait E_0x29e3130; + %set/v v0x29e8d80_0, 0, 32; + %jmp T_9; + .thread T_9; + .scope S_0x29ec060; +T_10 ; + %wait E_0x29e3130; + %load/v 8, v0x29ec340_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_10.0, 4; + %load/v 8, v0x29ec1f0_0, 32; + %set/v v0x29ec270_0, 8, 32; +T_10.0 ; + %jmp T_10; + .thread T_10; + .scope S_0x29ebd00; +T_11 ; + %wait E_0x29e3130; + %load/v 8, v0x29ebfe0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_11.0, 4; + %load/v 8, v0x29ebe90_0, 32; + %set/v v0x29ebf10_0, 8, 32; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0x29eb9a0; +T_12 ; + %wait E_0x29e3130; + %load/v 8, v0x29ebc80_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_12.0, 4; + %load/v 8, v0x29ebb30_0, 32; + %set/v v0x29ebbb0_0, 8, 32; +T_12.0 ; + %jmp T_12; + .thread T_12; + .scope S_0x29eb640; +T_13 ; + %wait E_0x29e3130; + %load/v 8, v0x29eb920_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_13.0, 4; + %load/v 8, v0x29eb7d0_0, 32; + %set/v v0x29eb850_0, 8, 32; +T_13.0 ; + %jmp T_13; + .thread T_13; + .scope S_0x29eb2e0; +T_14 ; + %wait E_0x29e3130; + %load/v 8, v0x29eb5c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_14.0, 4; + %load/v 8, v0x29eb470_0, 32; + %set/v v0x29eb4f0_0, 8, 32; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0x29eaf80; +T_15 ; + %wait E_0x29e3130; + %load/v 8, v0x29eb260_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_15.0, 4; + %load/v 8, v0x29eb110_0, 32; + %set/v v0x29eb190_0, 8, 32; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0x29eac20; +T_16 ; + %wait E_0x29e3130; + %load/v 8, v0x29eaf00_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_16.0, 4; + %load/v 8, v0x29eadb0_0, 32; + %set/v v0x29eae30_0, 8, 32; +T_16.0 ; + %jmp T_16; + .thread T_16; + .scope S_0x29ea8c0; +T_17 ; + %wait E_0x29e3130; + %load/v 8, v0x29eaba0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_17.0, 4; + %load/v 8, v0x29eaa50_0, 32; + %set/v v0x29eaad0_0, 8, 32; +T_17.0 ; + %jmp T_17; + .thread T_17; + .scope S_0x29ea560; +T_18 ; + %wait E_0x29e3130; + %load/v 8, v0x29ea840_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_18.0, 4; + %load/v 8, v0x29ea6f0_0, 32; + %set/v v0x29ea770_0, 8, 32; +T_18.0 ; + %jmp T_18; + .thread T_18; + .scope S_0x29ea200; +T_19 ; + %wait E_0x29e3130; + %load/v 8, v0x29ea4e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_19.0, 4; + %load/v 8, v0x29ea390_0, 32; + %set/v v0x29ea410_0, 8, 32; +T_19.0 ; + %jmp T_19; + .thread T_19; + .scope S_0x29e9ea0; +T_20 ; + %wait E_0x29e3130; + %load/v 8, v0x29ea180_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_20.0, 4; + %load/v 8, v0x29ea030_0, 32; + %set/v v0x29ea0b0_0, 8, 32; +T_20.0 ; + %jmp T_20; + .thread T_20; + .scope S_0x29e9b40; +T_21 ; + %wait E_0x29e3130; + %load/v 8, v0x29e9e20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_21.0, 4; + %load/v 8, v0x29e9cd0_0, 32; + %set/v v0x29e9d50_0, 8, 32; +T_21.0 ; + %jmp T_21; + .thread T_21; + .scope S_0x29e97e0; +T_22 ; + %wait E_0x29e3130; + %load/v 8, v0x29e9ac0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_22.0, 4; + %load/v 8, v0x29e9970_0, 32; + %set/v v0x29e99f0_0, 8, 32; +T_22.0 ; + %jmp T_22; + .thread T_22; + .scope S_0x29e9480; +T_23 ; + %wait E_0x29e3130; + %load/v 8, v0x29e9760_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_23.0, 4; + %load/v 8, v0x29e9610_0, 32; + %set/v v0x29e9690_0, 8, 32; +T_23.0 ; + %jmp T_23; + .thread T_23; + .scope S_0x29e9010; +T_24 ; + %wait E_0x29e3130; + %load/v 8, v0x29e93e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_24.0, 4; + %load/v 8, v0x29e74d0_0, 32; + %set/v v0x29e7550_0, 8, 32; +T_24.0 ; + %jmp T_24; + .thread T_24; + .scope S_0x29e8b70; +T_25 ; + %wait E_0x29e3130; + %load/v 8, v0x29e8f90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_25.0, 4; + %load/v 8, v0x29e8d00_0, 32; + %set/v v0x29e7160_0, 8, 32; +T_25.0 ; + %jmp T_25; + .thread T_25; + .scope S_0x29e8810; +T_26 ; + %wait E_0x29e3130; + %load/v 8, v0x29e8af0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_26.0, 4; + %load/v 8, v0x29e89a0_0, 32; + %set/v v0x29e8a20_0, 8, 32; +T_26.0 ; + %jmp T_26; + .thread T_26; + .scope S_0x29e84b0; +T_27 ; + %wait E_0x29e3130; + %load/v 8, v0x29e8790_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_27.0, 4; + %load/v 8, v0x29e8640_0, 32; + %set/v v0x29e86c0_0, 8, 32; +T_27.0 ; + %jmp T_27; + .thread T_27; + .scope S_0x29e8150; +T_28 ; + %wait E_0x29e3130; + %load/v 8, v0x29e8430_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_28.0, 4; + %load/v 8, v0x29e82e0_0, 32; + %set/v v0x29e8360_0, 8, 32; +T_28.0 ; + %jmp T_28; + .thread T_28; + .scope S_0x29e7df0; +T_29 ; + %wait E_0x29e3130; + %load/v 8, v0x29e80d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_29.0, 4; + %load/v 8, v0x29e7f80_0, 32; + %set/v v0x29e8000_0, 8, 32; +T_29.0 ; + %jmp T_29; + .thread T_29; + .scope S_0x29e7a90; +T_30 ; + %wait E_0x29e3130; + %load/v 8, v0x29e7d70_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_30.0, 4; + %load/v 8, v0x29e7c20_0, 32; + %set/v v0x29e7ca0_0, 8, 32; +T_30.0 ; + %jmp T_30; + .thread T_30; + .scope S_0x29e7730; +T_31 ; + %wait E_0x29e3130; + %load/v 8, v0x29e7a10_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_31.0, 4; + %load/v 8, v0x29e78c0_0, 32; + %set/v v0x29e7940_0, 8, 32; +T_31.0 ; + %jmp T_31; + .thread T_31; + .scope S_0x29e7340; +T_32 ; + %wait E_0x29e3130; + %load/v 8, v0x29e76b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_32.0, 4; + %load/v 8, v0x29e6680_0, 32; + %set/v v0x29e75e0_0, 8, 32; +T_32.0 ; + %jmp T_32; + .thread T_32; + .scope S_0x29e6f50; +T_33 ; + %wait E_0x29e3130; + %load/v 8, v0x29e72c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_33.0, 4; + %load/v 8, v0x29e70e0_0, 32; + %set/v v0x29e6360_0, 8, 32; +T_33.0 ; + %jmp T_33; + .thread T_33; + .scope S_0x29e6bf0; +T_34 ; + %wait E_0x29e3130; + %load/v 8, v0x29e6ed0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_34.0, 4; + %load/v 8, v0x29e6d80_0, 32; + %set/v v0x29e6e00_0, 8, 32; +T_34.0 ; + %jmp T_34; + .thread T_34; + .scope S_0x29e6890; +T_35 ; + %wait E_0x29e3130; + %load/v 8, v0x29e6b70_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_35.0, 4; + %load/v 8, v0x29e6a20_0, 32; + %set/v v0x29e6aa0_0, 8, 32; +T_35.0 ; + %jmp T_35; + .thread T_35; + .scope S_0x29e64f0; +T_36 ; + %wait E_0x29e3130; + %load/v 8, v0x29e6810_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_36.0, 4; + %load/v 8, v0x29e6710_0, 32; + %set/v v0x29e6790_0, 8, 32; +T_36.0 ; + %jmp T_36; + .thread T_36; + .scope S_0x29e6150; +T_37 ; + %wait E_0x29e3130; + %load/v 8, v0x29e6470_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_37.0, 4; + %load/v 8, v0x29e62e0_0, 32; + %set/v v0x29e63f0_0, 8, 32; +T_37.0 ; + %jmp T_37; + .thread T_37; + .scope S_0x29e5da0; +T_38 ; + %wait E_0x29e3130; + %load/v 8, v0x29e60d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_38.0, 4; + %load/v 8, v0x29e5f80_0, 32; + %set/v v0x29e6000_0, 8, 32; +T_38.0 ; + %jmp T_38; + .thread T_38; + .scope S_0x29e59e0; +T_39 ; + %wait E_0x29e3130; + %load/v 8, v0x29e5d20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_39.0, 4; + %load/v 8, v0x29e5b80_0, 32; + %set/v v0x29e5c50_0, 8, 32; +T_39.0 ; + %jmp T_39; + .thread T_39; + .scope S_0x29e53d0; +T_40 ; + %wait E_0x29e3130; + %load/v 8, v0x29e5960_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_40.0, 4; + %load/v 8, v0x29e5830_0, 32; + %set/v v0x29e58e0_0, 8, 32; +T_40.0 ; + %jmp T_40; + .thread T_40; + .scope S_0x29e1340; +T_41 ; + %wait E_0x29e1430; + %load/v 8, v0x29e10d0_0, 1; +======= + .scope S_0x297e320; +T_6 ; + %set/v v0x2980150_0, 0, 32; + %end; + .thread T_6; + .scope S_0x297e320; +T_7 ; + %movi 8, 4, 32; + %set/v v0x297fbf0_0, 8, 32; + %end; + .thread T_7; + .scope S_0x297e320; +T_8 ; + %wait E_0x2972130; + %load/v 8, v0x29801d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_8.0, 4; + %load/v 8, v0x2980250_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x2980150_0, 0, 8; +T_8.0 ; + %jmp T_8; + .thread T_8; + .scope S_0x297b3c0; +T_9 ; + %wait E_0x2972130; + %set/v v0x2977d80_0, 0, 32; + %jmp T_9; + .thread T_9; + .scope S_0x297b060; +T_10 ; + %wait E_0x2972130; + %load/v 8, v0x297b340_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_10.0, 4; + %load/v 8, v0x297b1f0_0, 32; + %set/v v0x297b270_0, 8, 32; +T_10.0 ; + %jmp T_10; + .thread T_10; + .scope S_0x297ad00; +T_11 ; + %wait E_0x2972130; + %load/v 8, v0x297afe0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_11.0, 4; + %load/v 8, v0x297ae90_0, 32; + %set/v v0x297af10_0, 8, 32; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0x297a9a0; +T_12 ; + %wait E_0x2972130; + %load/v 8, v0x297ac80_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_12.0, 4; + %load/v 8, v0x297ab30_0, 32; + %set/v v0x297abb0_0, 8, 32; +T_12.0 ; + %jmp T_12; + .thread T_12; + .scope S_0x297a640; +T_13 ; + %wait E_0x2972130; + %load/v 8, v0x297a920_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_13.0, 4; + %load/v 8, v0x297a7d0_0, 32; + %set/v v0x297a850_0, 8, 32; +T_13.0 ; + %jmp T_13; + .thread T_13; + .scope S_0x297a2e0; +T_14 ; + %wait E_0x2972130; + %load/v 8, v0x297a5c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_14.0, 4; + %load/v 8, v0x297a470_0, 32; + %set/v v0x297a4f0_0, 8, 32; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0x2979f80; +T_15 ; + %wait E_0x2972130; + %load/v 8, v0x297a260_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_15.0, 4; + %load/v 8, v0x297a110_0, 32; + %set/v v0x297a190_0, 8, 32; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0x2979c20; +T_16 ; + %wait E_0x2972130; + %load/v 8, v0x2979f00_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_16.0, 4; + %load/v 8, v0x2979db0_0, 32; + %set/v v0x2979e30_0, 8, 32; +T_16.0 ; + %jmp T_16; + .thread T_16; + .scope S_0x29798c0; +T_17 ; + %wait E_0x2972130; + %load/v 8, v0x2979ba0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_17.0, 4; + %load/v 8, v0x2979a50_0, 32; + %set/v v0x2979ad0_0, 8, 32; +T_17.0 ; + %jmp T_17; + .thread T_17; + .scope S_0x2979560; +T_18 ; + %wait E_0x2972130; + %load/v 8, v0x2979840_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_18.0, 4; + %load/v 8, v0x29796f0_0, 32; + %set/v v0x2979770_0, 8, 32; +T_18.0 ; + %jmp T_18; + .thread T_18; + .scope S_0x2979200; +T_19 ; + %wait E_0x2972130; + %load/v 8, v0x29794e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_19.0, 4; + %load/v 8, v0x2979390_0, 32; + %set/v v0x2979410_0, 8, 32; +T_19.0 ; + %jmp T_19; + .thread T_19; + .scope S_0x2978ea0; +T_20 ; + %wait E_0x2972130; + %load/v 8, v0x2979180_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_20.0, 4; + %load/v 8, v0x2979030_0, 32; + %set/v v0x29790b0_0, 8, 32; +T_20.0 ; + %jmp T_20; + .thread T_20; + .scope S_0x2978b40; +T_21 ; + %wait E_0x2972130; + %load/v 8, v0x2978e20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_21.0, 4; + %load/v 8, v0x2978cd0_0, 32; + %set/v v0x2978d50_0, 8, 32; +T_21.0 ; + %jmp T_21; + .thread T_21; + .scope S_0x29787e0; +T_22 ; + %wait E_0x2972130; + %load/v 8, v0x2978ac0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_22.0, 4; + %load/v 8, v0x2978970_0, 32; + %set/v v0x29789f0_0, 8, 32; +T_22.0 ; + %jmp T_22; + .thread T_22; + .scope S_0x2978480; +T_23 ; + %wait E_0x2972130; + %load/v 8, v0x2978760_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_23.0, 4; + %load/v 8, v0x2978610_0, 32; + %set/v v0x2978690_0, 8, 32; +T_23.0 ; + %jmp T_23; + .thread T_23; + .scope S_0x2978010; +T_24 ; + %wait E_0x2972130; + %load/v 8, v0x29783e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_24.0, 4; + %load/v 8, v0x29764d0_0, 32; + %set/v v0x2976550_0, 8, 32; +T_24.0 ; + %jmp T_24; + .thread T_24; + .scope S_0x2977b70; +T_25 ; + %wait E_0x2972130; + %load/v 8, v0x2977f90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_25.0, 4; + %load/v 8, v0x2977d00_0, 32; + %set/v v0x2976160_0, 8, 32; +T_25.0 ; + %jmp T_25; + .thread T_25; + .scope S_0x2977810; +T_26 ; + %wait E_0x2972130; + %load/v 8, v0x2977af0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_26.0, 4; + %load/v 8, v0x29779a0_0, 32; + %set/v v0x2977a20_0, 8, 32; +T_26.0 ; + %jmp T_26; + .thread T_26; + .scope S_0x29774b0; +T_27 ; + %wait E_0x2972130; + %load/v 8, v0x2977790_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_27.0, 4; + %load/v 8, v0x2977640_0, 32; + %set/v v0x29776c0_0, 8, 32; +T_27.0 ; + %jmp T_27; + .thread T_27; + .scope S_0x2977150; +T_28 ; + %wait E_0x2972130; + %load/v 8, v0x2977430_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_28.0, 4; + %load/v 8, v0x29772e0_0, 32; + %set/v v0x2977360_0, 8, 32; +T_28.0 ; + %jmp T_28; + .thread T_28; + .scope S_0x2976df0; +T_29 ; + %wait E_0x2972130; + %load/v 8, v0x29770d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_29.0, 4; + %load/v 8, v0x2976f80_0, 32; + %set/v v0x2977000_0, 8, 32; +T_29.0 ; + %jmp T_29; + .thread T_29; + .scope S_0x2976a90; +T_30 ; + %wait E_0x2972130; + %load/v 8, v0x2976d70_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_30.0, 4; + %load/v 8, v0x2976c20_0, 32; + %set/v v0x2976ca0_0, 8, 32; +T_30.0 ; + %jmp T_30; + .thread T_30; + .scope S_0x2976730; +T_31 ; + %wait E_0x2972130; + %load/v 8, v0x2976a10_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_31.0, 4; + %load/v 8, v0x29768c0_0, 32; + %set/v v0x2976940_0, 8, 32; +T_31.0 ; + %jmp T_31; + .thread T_31; + .scope S_0x2976340; +T_32 ; + %wait E_0x2972130; + %load/v 8, v0x29766b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_32.0, 4; + %load/v 8, v0x2975680_0, 32; + %set/v v0x29765e0_0, 8, 32; +T_32.0 ; + %jmp T_32; + .thread T_32; + .scope S_0x2975f50; +T_33 ; + %wait E_0x2972130; + %load/v 8, v0x29762c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_33.0, 4; + %load/v 8, v0x29760e0_0, 32; + %set/v v0x2975360_0, 8, 32; +T_33.0 ; + %jmp T_33; + .thread T_33; + .scope S_0x2975bf0; +T_34 ; + %wait E_0x2972130; + %load/v 8, v0x2975ed0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_34.0, 4; + %load/v 8, v0x2975d80_0, 32; + %set/v v0x2975e00_0, 8, 32; +T_34.0 ; + %jmp T_34; + .thread T_34; + .scope S_0x2975890; +T_35 ; + %wait E_0x2972130; + %load/v 8, v0x2975b70_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_35.0, 4; + %load/v 8, v0x2975a20_0, 32; + %set/v v0x2975aa0_0, 8, 32; +T_35.0 ; + %jmp T_35; + .thread T_35; + .scope S_0x29754f0; +T_36 ; + %wait E_0x2972130; + %load/v 8, v0x2975810_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_36.0, 4; + %load/v 8, v0x2975710_0, 32; + %set/v v0x2975790_0, 8, 32; +T_36.0 ; + %jmp T_36; + .thread T_36; + .scope S_0x2975150; +T_37 ; + %wait E_0x2972130; + %load/v 8, v0x2975470_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_37.0, 4; + %load/v 8, v0x29752e0_0, 32; + %set/v v0x29753f0_0, 8, 32; +T_37.0 ; + %jmp T_37; + .thread T_37; + .scope S_0x2974da0; +T_38 ; + %wait E_0x2972130; + %load/v 8, v0x29750d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_38.0, 4; + %load/v 8, v0x2974f80_0, 32; + %set/v v0x2975000_0, 8, 32; +T_38.0 ; + %jmp T_38; + .thread T_38; + .scope S_0x29749e0; +T_39 ; + %wait E_0x2972130; + %load/v 8, v0x2974d20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_39.0, 4; + %load/v 8, v0x2974b80_0, 32; + %set/v v0x2974c50_0, 8, 32; +T_39.0 ; + %jmp T_39; + .thread T_39; + .scope S_0x29743d0; +T_40 ; + %wait E_0x2972130; + %load/v 8, v0x2974960_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_40.0, 4; + %load/v 8, v0x2974830_0, 32; + %set/v v0x29748e0_0, 8, 32; +T_40.0 ; + %jmp T_40; + .thread T_40; + .scope S_0x2970340; +T_41 ; + %wait E_0x2970430; + %load/v 8, v0x29700d0_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_41.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_41.1, 6; + %jmp T_41.2; +T_41.0 ; +<<<<<<< HEAD + %load/v 8, v0x29e1460_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29e1590_0, 0, 8; + %jmp T_41.2; +T_41.1 ; + %load/v 8, v0x29e1510_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x29e1590_0, 0, 8; +======= + %load/v 8, v0x2970460_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x2970590_0, 0, 8; + %jmp T_41.2; +T_41.1 ; + %load/v 8, v0x2970510_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x2970590_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_41.2; +T_41.2 ; + %jmp T_41; + .thread T_41, $push; +<<<<<<< HEAD + .scope S_0x2916ac0; +T_42 ; + %wait E_0x2899a30; + %load/v 8, v0x29e0510_0, 3; +======= + .scope S_0x28a5ac0; +T_42 ; + %wait E_0x2828a30; + %load/v 8, v0x296f510_0, 3; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 3; + %jmp/1 T_42.0, 6; + %cmpi/u 8, 1, 3; + %jmp/1 T_42.1, 6; + %cmpi/u 8, 2, 3; + %jmp/1 T_42.2, 6; + %cmpi/u 8, 3, 3; + %jmp/1 T_42.3, 6; + %cmpi/u 8, 4, 3; + %jmp/1 T_42.4, 6; + %cmpi/u 8, 5, 3; + %jmp/1 T_42.5, 6; + %cmpi/u 8, 6, 3; + %jmp/1 T_42.6, 6; + %cmpi/u 8, 7, 3; + %jmp/1 T_42.7, 6; + %jmp T_42.8; +T_42.0 ; +<<<<<<< HEAD + %load/v 8, v0x29e0b40_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %load/v 8, v0x29e0a40_0, 1; + %set/v v0x29b2f50_0, 8, 1; + %load/v 8, v0x29e0ac0_0, 1; + %set/v v0x29e0e50_0, 8, 1; + %jmp T_42.8; +T_42.1 ; + %load/v 8, v0x29e0b40_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %load/v 8, v0x29e0a40_0, 1; + %set/v v0x29b2f50_0, 8, 1; + %load/v 8, v0x29e0ac0_0, 1; + %set/v v0x29e0e50_0, 8, 1; + %jmp T_42.8; +T_42.2 ; + %load/v 8, v0x29e1180_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %set/v v0x29b2f50_0, 0, 1; + %set/v v0x29e0e50_0, 0, 1; + %jmp T_42.8; +T_42.3 ; + %load/v 8, v0x29e1050_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %set/v v0x29b2f50_0, 0, 1; + %set/v v0x29e0e50_0, 0, 1; + %jmp T_42.8; +T_42.4 ; + %load/v 8, v0x29e0bc0_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %set/v v0x29b2f50_0, 0, 1; + %set/v v0x29e0e50_0, 0, 1; + %jmp T_42.8; +T_42.5 ; + %load/v 8, v0x29e0ed0_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %set/v v0x29b2f50_0, 0, 1; + %set/v v0x29e0e50_0, 0, 1; + %jmp T_42.8; +T_42.6 ; + %load/v 8, v0x29e0f50_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %set/v v0x29b2f50_0, 0, 1; + %set/v v0x29e0e50_0, 0, 1; + %jmp T_42.8; +T_42.7 ; + %load/v 8, v0x29e0fd0_0, 32; + %set/v v0x29e0dd0_0, 8, 32; + %set/v v0x29b2f50_0, 0, 1; + %set/v v0x29e0e50_0, 0, 1; + %jmp T_42.8; +T_42.8 ; + %load/v 8, v0x29e0dd0_0, 32; + %cmpi/u 8, 0, 32; + %jmp/0xz T_42.9, 4; + %ix/load 0, 1, 0; + %assign/v0 v0x29e1230_0, 0, 1; + %jmp T_42.10; +T_42.9 ; + %ix/load 0, 1, 0; + %assign/v0 v0x29e1230_0, 0, 0; +T_42.10 ; + %jmp T_42; + .thread T_42, $push; + .scope S_0x2899940; +T_43 ; + %wait E_0x2947dc0; + %load/v 8, v0x29e1ab0_0, 16; + %ix/load 1, 15, 0; + %mov 4, 0, 1; + %jmp/1 T_43.0, 4; + %load/x1p 56, v0x29e1ab0_0, 1; +======= + %load/v 8, v0x296fb40_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %load/v 8, v0x296fa40_0, 1; + %set/v v0x2941f50_0, 8, 1; + %load/v 8, v0x296fac0_0, 1; + %set/v v0x296fe50_0, 8, 1; + %jmp T_42.8; +T_42.1 ; + %load/v 8, v0x296fb40_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %load/v 8, v0x296fa40_0, 1; + %set/v v0x2941f50_0, 8, 1; + %load/v 8, v0x296fac0_0, 1; + %set/v v0x296fe50_0, 8, 1; + %jmp T_42.8; +T_42.2 ; + %load/v 8, v0x2970180_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %set/v v0x2941f50_0, 0, 1; + %set/v v0x296fe50_0, 0, 1; + %jmp T_42.8; +T_42.3 ; + %load/v 8, v0x2970050_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %set/v v0x2941f50_0, 0, 1; + %set/v v0x296fe50_0, 0, 1; + %jmp T_42.8; +T_42.4 ; + %load/v 8, v0x296fbc0_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %set/v v0x2941f50_0, 0, 1; + %set/v v0x296fe50_0, 0, 1; + %jmp T_42.8; +T_42.5 ; + %load/v 8, v0x296fed0_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %set/v v0x2941f50_0, 0, 1; + %set/v v0x296fe50_0, 0, 1; + %jmp T_42.8; +T_42.6 ; + %load/v 8, v0x296ff50_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %set/v v0x2941f50_0, 0, 1; + %set/v v0x296fe50_0, 0, 1; + %jmp T_42.8; +T_42.7 ; + %load/v 8, v0x296ffd0_0, 32; + %set/v v0x296fdd0_0, 8, 32; + %set/v v0x2941f50_0, 0, 1; + %set/v v0x296fe50_0, 0, 1; + %jmp T_42.8; +T_42.8 ; + %load/v 8, v0x296fdd0_0, 32; + %cmpi/u 8, 0, 32; + %jmp/0xz T_42.9, 4; + %ix/load 0, 1, 0; + %assign/v0 v0x2970230_0, 0, 1; + %jmp T_42.10; +T_42.9 ; + %ix/load 0, 1, 0; + %assign/v0 v0x2970230_0, 0, 0; +T_42.10 ; + %jmp T_42; + .thread T_42, $push; + .scope S_0x2828940; +T_43 ; + %wait E_0x28d6dc0; + %load/v 8, v0x2970ab0_0, 16; + %ix/load 1, 15, 0; + %mov 4, 0, 1; + %jmp/1 T_43.0, 4; + %load/x1p 56, v0x2970ab0_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_43.1; +T_43.0 ; + %mov 56, 2, 1; +T_43.1 ; + %mov 40, 56, 1; Move signal select into place + %mov 55, 40, 1; Repetition 16 + %mov 54, 40, 1; Repetition 15 + %mov 53, 40, 1; Repetition 14 + %mov 52, 40, 1; Repetition 13 + %mov 51, 40, 1; Repetition 12 + %mov 50, 40, 1; Repetition 11 + %mov 49, 40, 1; Repetition 10 + %mov 48, 40, 1; Repetition 9 + %mov 47, 40, 1; Repetition 8 + %mov 46, 40, 1; Repetition 7 + %mov 45, 40, 1; Repetition 6 + %mov 44, 40, 1; Repetition 5 + %mov 43, 40, 1; Repetition 4 + %mov 42, 40, 1; Repetition 3 + %mov 41, 40, 1; Repetition 2 + %mov 24, 40, 16; + %ix/load 0, 32, 0; +<<<<<<< HEAD + %assign/v0 v0x29e1a30_0, 0, 8; + %jmp T_43; + .thread T_43, $push; + .scope S_0x2947110; +T_44 ; + %vpi_call 7 51 "$readmemh", "data", v0x2999110; + %end; + .thread T_44; + .scope S_0x2947110; +T_45 ; + %wait E_0x2947200; + %load/v 8, v0x2999190_0, 1; + %jmp/0xz T_45.0, 8; + %load/v 8, v0x2945970_0, 32; + %ix/getv 3, v0x2946540_0; + %jmp/1 t_1, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x2999110, 0, 8; +======= + %assign/v0 v0x2970a30_0, 0, 8; + %jmp T_43; + .thread T_43, $push; + .scope S_0x28d6110; +T_44 ; + %vpi_call 7 51 "$readmemh", "data", v0x2928110; + %end; + .thread T_44; + .scope S_0x28d6110; +T_45 ; + %wait E_0x28d6200; + %load/v 8, v0x2928190_0, 1; + %jmp/0xz T_45.0, 8; + %load/v 8, v0x28d4970_0, 32; + %ix/getv 3, v0x28d5540_0; + %jmp/1 t_1, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x2928110, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 +t_1 ; +T_45.0 ; + %jmp T_45; + .thread T_45, $push; +<<<<<<< HEAD + .scope S_0x2934a40; +T_46 ; + %wait E_0x2934b30; + %load/v 8, v0x29494c0_0, 1; +======= + .scope S_0x28c3a40; +T_46 ; + %wait E_0x28c3b30; + %load/v 8, v0x28d84c0_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_46.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_46.1, 6; + %jmp T_46.2; +T_46.0 ; +<<<<<<< HEAD + %load/v 8, v0x29488b0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x2947ce0_0, 0, 8; + %jmp T_46.2; +T_46.1 ; + %load/v 8, v0x2948930_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x2947ce0_0, 0, 8; +======= + %load/v 8, v0x28d78b0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x28d6ce0_0, 0, 8; + %jmp T_46.2; +T_46.1 ; + %load/v 8, v0x28d7930_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x28d6ce0_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_46.2; +T_46.2 ; + %jmp T_46; + .thread T_46, $push; +<<<<<<< HEAD + .scope S_0x29361c0; +T_47 ; + %wait E_0x29362b0; + %load/v 8, v0x2935620_0, 1; +======= + .scope S_0x28c51c0; +T_47 ; + %wait E_0x28c52b0; + %load/v 8, v0x28c4620_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_47.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_47.1, 6; + %jmp T_47.2; +T_47.0 ; +<<<<<<< HEAD + %load/v 8, v0x294a440_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x294a1c0_0, 0, 8; + %jmp T_47.2; +T_47.1 ; + %load/v 8, v0x294a4c0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x294a1c0_0, 0, 8; +======= + %load/v 8, v0x28d9440_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x28d91c0_0, 0, 8; + %jmp T_47.2; +T_47.1 ; + %load/v 8, v0x28d94c0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x28d91c0_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_47.2; +T_47.2 ; + %jmp T_47; + .thread T_47, $push; +<<<<<<< HEAD + .scope S_0x29390c0; +T_48 ; + %wait E_0x29391b0; + %load/v 8, v0x2938500_0, 1; +======= + .scope S_0x28c80c0; +T_48 ; + %wait E_0x28c81b0; + %load/v 8, v0x28c7500_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_48.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_48.1, 6; + %jmp T_48.2; +T_48.0 ; +<<<<<<< HEAD + %load/v 8, v0x29385a0_0, 26; + %ix/load 0, 26, 0; + %assign/v0 v0x2936d80_0, 0, 8; + %jmp T_48.2; +T_48.1 ; + %load/v 8, v0x2937960_0, 26; + %ix/load 0, 26, 0; + %assign/v0 v0x2936d80_0, 0, 8; +======= + %load/v 8, v0x28c75a0_0, 26; + %ix/load 0, 26, 0; + %assign/v0 v0x28c5d80_0, 0, 8; + %jmp T_48.2; +T_48.1 ; + %load/v 8, v0x28c6960_0, 26; + %ix/load 0, 26, 0; + %assign/v0 v0x28c5d80_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_48.2; +T_48.2 ; + %jmp T_48; + .thread T_48, $push; +<<<<<<< HEAD + .scope S_0x293cb80; +T_49 ; + %wait E_0x293cc70; + %load/v 8, v0x293b400_0, 1; +======= + .scope S_0x28cbb80; +T_49 ; + %wait E_0x28cbc70; + %load/v 8, v0x28ca400_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_49.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_49.1, 6; + %jmp T_49.2; +T_49.0 ; +<<<<<<< HEAD + %load/v 8, v0x293a840_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x2939c80_0, 0, 8; + %jmp T_49.2; +T_49.1 ; + %load/v 8, v0x293a8e0_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x2939c80_0, 0, 8; +======= + %load/v 8, v0x28c9840_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x28c8c80_0, 0, 8; + %jmp T_49.2; +T_49.1 ; + %load/v 8, v0x28c98e0_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x28c8c80_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_49.2; +T_49.2 ; + %jmp T_49; + .thread T_49, $push; +<<<<<<< HEAD + .scope S_0x293ef20; +T_50 ; + %wait E_0x293f010; + %load/v 8, v0x293e3f0_0, 1; +======= + .scope S_0x28cdf20; +T_50 ; + %wait E_0x28ce010; + %load/v 8, v0x28cd3f0_0, 1; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %cmpi/u 8, 0, 1; + %jmp/1 T_50.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_50.1, 6; + %jmp T_50.2; +T_50.0 ; +<<<<<<< HEAD + %load/v 8, v0x293d7c0_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x293d520_0, 0, 8; + %jmp T_50.2; +T_50.1 ; + %load/v 8, v0x293d480_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x293d520_0, 0, 8; +======= + %load/v 8, v0x28cc7c0_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x28cc520_0, 0, 8; + %jmp T_50.2; +T_50.1 ; + %load/v 8, v0x28cc480_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x28cc520_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 + %jmp T_50.2; +T_50.2 ; + %jmp T_50; + .thread T_50, $push; +<<<<<<< HEAD + .scope S_0x28e2df0; +T_51 ; + %wait E_0x29e1cb0; + %load/v 8, v0x29f36b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_51.0, 4; + %load/v 8, v0x29f37b0_0, 8; + %ix/load 0, 8, 0; + %assign/v0 v0x29f38b0_0, 0, 8; +======= + .scope S_0x2871df0; +T_51 ; + %wait E_0x2970cb0; + %load/v 8, v0x29826b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_51.0, 4; + %load/v 8, v0x29827b0_0, 8; + %ix/load 0, 8, 0; + %assign/v0 v0x29828b0_0, 0, 8; +>>>>>>> 45749faa49331c8959cb61dbc59c547eecfb4d84 +T_51.0 ; + %jmp T_51; + .thread T_51; +# The file index is used to find the file name in the following table. +:file_names 28; + "N/A"; + ""; + "./mux.v"; + "./adder.v"; + "cpu.v"; + "./control.v"; + "./ifetch.v"; + "./memory.v"; + "./add32bit.v"; + "./instructionDecoderR.v"; + "./instructionDecoderI.v"; + "./instructionDecoderJ.v"; + "./regfile.v"; + "./decoders.v"; + "./register32zero.v"; + "./register32.v"; + "./mux32to1by32.v"; + "./execute.v"; + "./aluK.v"; + "./adder_subtracter.v"; + "./xor_32bit.v"; + "./slt.v"; + "./and_32bit.v"; + "./nand_32bit.v"; + "./nor_32bit.v"; + "./or_32bit.v"; + "./dff.v"; + "./mux32to1by1.v"; diff --git a/cpu.t.v b/cpu.t.v new file mode 100644 index 0000000..6b55cf3 --- /dev/null +++ b/cpu.t.v @@ -0,0 +1,80 @@ +`include "cpu.v" + +//------------------------------------------------------------------------ +// Simple fake CPU testbench sequence +//------------------------------------------------------------------------ + +module cpu_test (); + + reg clk; + reg reset; + + // Clock generation + initial clk=0; + always #10 clk = !clk; + + // Instantiate fake CPU + cpu CPU(.clk(clk)); + + + reg [1023:0] mem_fn; + reg [1023:0] dump_fn; + + always @(CPU.instruction) begin + if(CPU.instruction === 31'bx) begin + $finish(); + end + end + + // Test sequence + initial begin + // Get command line arguments for memory image and VCD dump file + // http://iverilog.wikia.com/wiki/Simulation + // http://www.project-veripage.com/plusarg.php + /*if (! $value$plusargs("mem_fn=%s", mem_fn)) begin + $display("ERROR: provide +mem_fn=[path to memory image] argument"); + $finish(); + end + if (! $value$plusargs("dump_fn=%s", dump_fn)) begin + $display("ERROR: provide +dump_fn=[path for VCD dump] argument"); + $finish(); + end*/ + + + // Load CPU memory from (assembly) dump file + //$readmemh(mem_fn, cpu.memory); + // Alternate: Explicitly state which array element range to read into + + $readmemh("ben_fib_mem", CPU.memory0.mem); + + $readmemh("ben_fib_mem", CPU.IF.program_mem.mem); + // $readmemh("inefficient_mult.tex", CPU.memory0.mem); + // $readmemh("inefficient_mult.tex", CPU.IF.program_mem.mem); + // Dump waveforms to file + // Note: arrays (e.g. memory) are not dumped by default + $dumpfile("dump_fn"); + $dumpvars(); + + // Assert reset pulse + reset = 0; #10; + reset = 1; #10; + reset = 0; #10; + + + // Display a few cycles just for quick checking + // Note: I'm just dumping instruction bits, but you can do some + // self-checking test cases based on your CPU and program and + // automatically report the results. + $display("Time | PC | Instruction"); + repeat(3) begin + $display("%4t | %h | %h", $time, CPU.pc, CPU.instruction); #20 ; + end + $display("... more execution (see waveform)"); + + // End execution after some time delay - adjust to match your program + // or use a smarter approach like looking for an exit syscall or the + // PC to be the value of the last instruction in your program. + #2000 $finish(); + end + +endmodule diff --git a/cpu.v b/cpu.v new file mode 100644 index 0000000..53caa7a --- /dev/null +++ b/cpu.v @@ -0,0 +1,108 @@ +// Single cycle-cpu +`include "ifetch.v" +`include "control.v" +`include "regfile.v" +`include "execute.v" +`include "instructionDecoderR.v" +`include "instructionDecoderI.v" +`include "instructionDecoderJ.v" + +// This is the top level module for our single cycle CPU +// It consists of 5 sub-modules: +// Instruction Fetch +// Instruction Decode / Register Fetch +// Execute +// Data Memory +// Write + +module cpu ( + input clk +); + wire[31:0] pc; + // Primarily used in Decode + wire[5:0] opcode; + wire[4:0] Rs; + wire[4:0] Rt; + wire[4:0] Rd, reg_to_write, regAddr; + wire[4:0] shift; + wire[5:0] funct; + wire[15:0] imm; + wire[25:0] jump_target, temp_jump_target; + + // Primarily used in Register Fetch + wire[31:0] writeData, tempWriteData, dataOut; + wire[31:0] Da; + wire[31:0] Db; + + // Primarily used in Execute + wire[31:0] extended_imm; // need to extend our immediate + wire[31:0] Operand; + wire[31:0] ALU_result; + wire carryout, zero, overflow; // Don't think we actually use these + wire[2:0] command; + + // Control Wires + wire writeReg, linkToPC, ALU_OperandSource, memoryRead, memoryWrite, memoryToRegister, is_jump, isjr, is_branch, branch_taken; + + control CPU_control(.opcode(opcode), + .funct(funct), + .writeReg(writeReg), + .linkToPC(linkToPC), + .ALUoperandSource(ALU_OperandSource), + .memoryRead(memoryRead), + .memoryWrite(memoryWrite), + .memoryToRegister(memoryToRegister), + .command(command), + .isjump(is_jump), + .isjr(isjr), + .isbranch(is_branch)); + +// ----------------------------Instruction Fetch------------------------- + // Tests: [DONE] + wire[31:0] instruction; + and (branch_taken, is_branch, !zero); + ifetch IF(.clk(clk), + .write_pc(1'b1), + .is_branch(branch_taken), + .is_jump(is_jump), + .branch_addr(imm[15:0]), + .jump_addr(jump_target[25:0]), + .out(instruction[31:0]), + .increased_pc(pc[31:0])); // updates instruction, increments PC by 4 + +// ----------------------------Instruction Decode------------------------ + // Testing: [DONE] + + instructionDecoderR ID_R(instruction[31:0], opcode[5:0], Rs[4:0], Rt[4:0], Rd[4:0], shift[4:0], funct[5:0]); + instructionDecoderI ID_I(instruction[31:0], opcode[5:0], Rs[4:0], Rt[4:0], imm[15:0]); + instructionDecoderJ ID_J(instruction[31:0], opcode[5:0], temp_jump_target[25:0]); + +// ---------------------------Register Fetch----------------------------- + // Testing: [DONE] + + regfile regfile(Da, Db, writeData[31:0], Rs, Rt, regAddr, writeReg, clk); // Rd is incorrect here, will fix later + +// ----------------------------Execute----------------------------------- + + execute exe(ALU_result, zero, carryout, overflow, Da, Db, imm, ALU_OperandSource, command); + +// ----------------------------Memory/Write----------------------------------- + + memory memory0(.clk(clk),.regWE(memoryWrite), .Addr(ALU_result[31:0]), .DataIn(Db), .DataOut(dataOut)); //the only time we're writing to mem is during sw, so it //will only ever be this. + mux #(.width(32)) ToReg(.out(tempWriteData[31:0]), // Chooses between writing the ALU result or the output of DataMemory + .address(memoryToRegister), // to the Register File + .input0(ALU_result[31:0]), + .input1(dataOut[31:0])); + mux #(32) dataOrPC(writeData[31:0], linkToPC, tempWriteData[31:0], pc); // Chooses between writing the above value or PC (JAL) to the + // Register File. +//----------------------------Misc.----------------------------------- + + mux #(26) jumpto(jump_target, isjr, temp_jump_target, Da[27:2]); // If instruction is j/jal, jump to temp_jump_target. + // If instruction is jr, jump to the value stored in the register given + // (jr $ra means PC = Reg[ra]) + mux #(5) Rd_or_Rt(.out(reg_to_write), + .address(memoryRead), + .input0(Rd), + .input1(Rt)); // Chooses between writing to Reg[Rd] for R-type or Reg[Rt] for I-type + mux #(5) writeRA(regAddr, linkToPC, reg_to_write, 5'd31); // Chooses between writing Rd/Rt in the reg file or $31 (for JAL) +endmodule diff --git a/cpucompile b/cpucompile new file mode 100755 index 0000000..b7b9b08 --- /dev/null +++ b/cpucompile @@ -0,0 +1,1430 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1943a00 .scope module, "addressmux" "addressmux" 2 34; + .timescale 0 0; +v0x1957790_0 .net "addr0", 4 0, C4; 0 drivers +v0x1974010_0 .net "addr1", 4 0, C4; 0 drivers +v0x19740b0_0 .net "mux_address", 0 0, C4; 0 drivers +v0x1974150_0 .var "out", 0 0; +E_0x1948470 .event edge, v0x19740b0_0, v0x1974010_0, v0x1957790_0; +S_0x193f010 .scope module, "control" "control" 3 30; + .timescale 0 0; +v0x1974270_0 .var "ALUoperandSource", 0 0; +v0x1974330_0 .var "command", 2 0; +v0x19743d0_0 .net "funct", 5 0, C4; 0 drivers +v0x1974470_0 .var "isbranch", 0 0; +v0x1974520_0 .var "isjump", 0 0; +v0x19745c0_0 .var "linkToPC", 0 0; +v0x19746a0_0 .var "memoryRead", 0 0; +v0x1974740_0 .var "memoryToRegister", 0 0; +v0x1974830_0 .var "memoryWrite", 0 0; +v0x19748d0_0 .net "opcode", 5 0, C4; 0 drivers +v0x19749d0_0 .var "writeReg", 0 0; +E_0x1974200 .event edge, v0x19743d0_0, v0x19748d0_0; +S_0x194a3b0 .scope module, "datamemory" "datamemory" 4 8; + .timescale 0 0; +P_0x1920268 .param/l "addresswidth" 4 10, +C4<0111>; +P_0x1920290 .param/l "depth" 4 11, +C4<010000000>; +P_0x19202b8 .param/l "width" 4 12, +C4<0100000>; +v0x1974ab0_0 .net "address", 6 0, C4; 0 drivers +v0x1974b70_0 .net "dataIn", 31 0, C4; 0 drivers +v0x1974c10_0 .var "dataOut", 31 0; +v0x1974cb0 .array "memory", 0 127, 31 0; +v0x1974d60_0 .net "writeEnable", 0 0, C4; 0 drivers +E_0x19744f0 .event edge, v0x1974b70_0, v0x1974ab0_0, v0x1974d60_0; +S_0x1949bc0 .scope module, "dff" "dff" 5 9; + .timescale 0 0; +P_0x1943768 .param/l "width" 5 10, +C4<01000>; +v0x1974e50_0 .net "ce", 0 0, C4; 0 drivers +v0x1974f10_0 .net "clk", 0 0, C4; 0 drivers +v0x1974fb0_0 .net "dataIn", 7 0, C4; 0 drivers +v0x1975050_0 .net "dataOut", 7 0, v0x1975100_0; 1 drivers +v0x1975100_0 .var "mem", 7 0; +E_0x1974de0 .event posedge, v0x1974f10_0; +S_0x1957a00 .scope module, "ifetch" "ifetch" 6 6; + .timescale 0 0; +v0x19767d0_0 .net "_", 0 0, L_0x1985040; 1 drivers +v0x1976870_0 .net *"_s13", 3 0, L_0x1985190; 1 drivers +v0x19768f0_0 .net *"_s14", 1 0, C4<00>; 1 drivers +v0x1976990_0 .net *"_s7", 0 0, L_0x19846a0; 1 drivers +v0x1976a40_0 .net *"_s8", 15 0, L_0x1984740; 1 drivers +v0x1976ae0_0 .net "branch_addr", 15 0, C4; 0 drivers +v0x1976bc0_0 .var "branch_addr_full", 31 0; +v0x1976c60_0 .net "clk", 0 0, C4; 0 drivers +v0x1976ce0_0 .net "increased_pc", 31 0, v0x1975ad0_0; 1 drivers +v0x1976db0_0 .net "is_branch", 0 0, C4; 0 drivers +v0x1976e90_0 .net "is_jump", 0 0, C4; 0 drivers +v0x1976f40_0 .net "jump_addr", 25 0, C4; 0 drivers +v0x1977030_0 .net "out", 31 0, L_0x197f0e0; 1 drivers +v0x19770e0_0 .var "pc", 31 0; +v0x19771e0_0 .net "pc_next", 31 0, v0x1975570_0; 1 drivers +v0x1977260_0 .net "to_add", 31 0, v0x1976170_0; 1 drivers +v0x1977160_0 .net "write_pc", 0 0, C4; 0 drivers +E_0x19751a0 .event posedge, v0x1976610_0; +L_0x19846a0 .part C4, 15, 1; +LS_0x1984740_0_0 .concat [ 1 1 1 1], L_0x19846a0, L_0x19846a0, L_0x19846a0, L_0x19846a0; +LS_0x1984740_0_4 .concat [ 1 1 1 1], L_0x19846a0, L_0x19846a0, L_0x19846a0, L_0x19846a0; +LS_0x1984740_0_8 .concat [ 1 1 1 1], L_0x19846a0, L_0x19846a0, L_0x19846a0, L_0x19846a0; +LS_0x1984740_0_12 .concat [ 1 1 1 1], L_0x19846a0, L_0x19846a0, L_0x19846a0, L_0x19846a0; +L_0x1984740 .concat [ 4 4 4 4], LS_0x1984740_0_0, LS_0x1984740_0_4, LS_0x1984740_0_8, LS_0x1984740_0_12; +L_0x19848f0 .concat [ 16 16 0 0], C4, L_0x1984740; +L_0x1985190 .part v0x19770e0_0, 28, 4; +L_0x1985270 .concat [ 2 26 4 0], C4<00>, C4, L_0x1985190; +S_0x1976250 .scope module, "program_mem" "instruction_memory" 6 22, 7 3, S_0x1957a00; + .timescale 0 0; +L_0x197f0e0 .functor BUFZ 32, L_0x1984600, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x1976370_0 .net "Addr", 31 0, v0x19770e0_0; 1 drivers +v0x1976440_0 .net "DataIn", 31 0, C4<00000000000000000000000000000000>; 1 drivers +v0x19764c0_0 .alias "DataOut", 31 0, v0x1977030_0; +v0x1976560_0 .net *"_s0", 31 0, L_0x1984600; 1 drivers +v0x1976610_0 .alias "clk", 0 0, v0x1976c60_0; +v0x19766b0 .array "mem", 0 60, 31 0; +v0x1976730_0 .net "regWE", 0 0, C4<0>; 1 drivers +E_0x1976340 .event edge, v0x1975980_0; +L_0x1984600 .array/port v0x19766b0, v0x19770e0_0; +S_0x1975e10 .scope module, "should_branch" "mux2to1by32" 6 28, 2 17, S_0x1957a00; + .timescale 0 0; +v0x1975f70_0 .alias "address", 0 0, v0x1976db0_0; +v0x1976030_0 .net "input0", 31 0, C4<00000000000000000000000000000100>; 1 drivers +v0x19760d0_0 .net "input1", 31 0, L_0x19848f0; 1 drivers +v0x1976170_0 .var "out", 31 0; +E_0x1975f00 .event edge, v0x1975f70_0, v0x19760d0_0, v0x1976030_0; +S_0x1975620 .scope module, "add_to_pc" "add32bit" 6 33, 8 3, S_0x1957a00; + .timescale 0 0; +L_0x19849e0 .functor XNOR 1, L_0x1984ca0, L_0x1984e20, C4<0>, C4<0>; +L_0x1984ec0 .functor XOR 1, v0x1975b50_0, L_0x1984f50, C4<0>, C4<0>; +L_0x1985040 .functor AND 1, L_0x1984ec0, L_0x19849e0, C4<1>, C4<1>; +v0x1975780_0 .net *"_s1", 0 0, L_0x1984ca0; 1 drivers +v0x1975840_0 .net *"_s3", 0 0, L_0x1984e20; 1 drivers +v0x19758e0_0 .net *"_s5", 0 0, L_0x1984f50; 1 drivers +v0x1975980_0 .alias "a", 31 0, v0x1976370_0; +v0x1975a30_0 .alias "b", 31 0, v0x1977260_0; +v0x1975ad0_0 .var "c", 31 0; +v0x1975b50_0 .var "carry", 0 0; +v0x1975bd0_0 .net "carryXorSign", 0 0, L_0x1984ec0; 1 drivers +v0x1975c70_0 .alias "overflow", 0 0, v0x19767d0_0; +v0x1975d10_0 .net "sameSign", 0 0, L_0x19849e0; 1 drivers +E_0x1975710 .event edge, v0x1975a30_0, v0x1975980_0; +L_0x1984ca0 .part v0x19770e0_0, 31, 1; +L_0x1984e20 .part v0x1976170_0, 31, 1; +L_0x1984f50 .part v0x1975ad0_0, 31, 1; +S_0x1975210 .scope module, "should_jump" "mux2to1by32" 6 38, 2 17, S_0x1957a00; + .timescale 0 0; +v0x1975370_0 .alias "address", 0 0, v0x1976e90_0; +v0x1975430_0 .alias "input0", 31 0, v0x1976ce0_0; +v0x19754d0_0 .net "input1", 31 0, L_0x1985270; 1 drivers +v0x1975570_0 .var "out", 31 0; +E_0x1975300 .event edge, v0x1975370_0, v0x19754d0_0, v0x1975430_0; +S_0x1957210 .scope module, "mux" "mux" 2 1; + .timescale 0 0; +P_0x1911dd8 .param/l "width" 2 2, +C4<0100000>; +v0x19773c0_0 .net "address", 0 0, C4; 0 drivers +v0x1977460_0 .net "input0", 31 0, C4; 0 drivers +v0x1977500_0 .net "input1", 31 0, C4; 0 drivers +v0x19775a0_0 .var "out", 31 0; +E_0x1976220 .event edge, v0x19773c0_0, v0x1977500_0, v0x1977460_0; +S_0x1956a20 .scope module, "mux32to1by1" "mux32to1by1" 9 1; + .timescale 0 0; +v0x1977650_0 .net "address", 4 0, C4; 0 drivers +v0x1977710_0 .net "inputs", 31 0, C4; 0 drivers +v0x19777b0_0 .net "mux", 0 0, C4; 0 drivers +v0x1977850_0 .net "out", 0 0, L_0x1985410; 1 drivers +L_0x1985410 .part/v C4, C4, 1; +S_0x1956230 .scope module, "regfile" "regfile" 10 15; + .timescale 0 0; +v0x19827d0_0 .net "Clk", 0 0, C4; 0 drivers +v0x197ed20_0 .net "ReadData1", 31 0, L_0x1989d10; 1 drivers +v0x197edd0_0 .net "ReadData2", 31 0, L_0x198af10; 1 drivers +v0x197ee80_0 .net "ReadRegister1", 4 0, C4; 0 drivers +v0x1982c80_0 .net "ReadRegister2", 4 0, C4; 0 drivers +v0x1982d00_0 .net "RegWrite", 0 0, C4; 0 drivers +v0x1982d80_0 .net "WriteData", 31 0, C4; 0 drivers +v0x197ef30_0 .net "WriteRegister", 4 0, C4; 0 drivers +v0x197f030_0 .net "decoder", 31 0, L_0x19856f0; 1 drivers +v0x1983210_0 .net "reg0", 31 0, v0x1982270_0; 1 drivers +v0x1983290_0 .net "reg1", 31 0, v0x1981f10_0; 1 drivers +v0x1983310_0 .net "reg10", 31 0, v0x19800b0_0; 1 drivers +v0x1983390_0 .net "reg11", 31 0, v0x197fd50_0; 1 drivers +v0x1983410_0 .net "reg12", 31 0, v0x197f9f0_0; 1 drivers +v0x1983510_0 .net "reg13", 31 0, v0x197f690_0; 1 drivers +v0x1983590_0 .net "reg14", 31 0, v0x197f330_0; 1 drivers +v0x1983490_0 .net "reg15", 31 0, v0x197d180_0; 1 drivers +v0x19836a0_0 .net "reg16", 31 0, v0x197ea40_0; 1 drivers +v0x1983610_0 .net "reg17", 31 0, v0x197e6e0_0; 1 drivers +v0x19837c0_0 .net "reg18", 31 0, v0x197e380_0; 1 drivers +v0x1983720_0 .net "reg19", 31 0, v0x197e020_0; 1 drivers +v0x19838f0_0 .net "reg2", 31 0, v0x1981bb0_0; 1 drivers +v0x1983840_0 .net "reg20", 31 0, v0x197dcc0_0; 1 drivers +v0x1983a30_0 .net "reg21", 31 0, v0x197d960_0; 1 drivers +v0x1983970_0 .net "reg22", 31 0, v0x197d600_0; 1 drivers +v0x1983b80_0 .net "reg23", 31 0, v0x197c410_0; 1 drivers +v0x1983ab0_0 .net "reg24", 31 0, v0x197ce20_0; 1 drivers +v0x1983ce0_0 .net "reg25", 31 0, v0x197cac0_0; 1 drivers +v0x1983c00_0 .net "reg26", 31 0, v0x197c7b0_0; 1 drivers +v0x1983e50_0 .net "reg27", 31 0, v0x197c4a0_0; 1 drivers +v0x1983d60_0 .net "reg28", 31 0, v0x197c020_0; 1 drivers +v0x1983fd0_0 .net "reg29", 31 0, v0x197bce0_0; 1 drivers +v0x1983ed0_0 .net "reg3", 31 0, v0x1981850_0; 1 drivers +v0x1983f50_0 .net "reg30", 31 0, v0x197b900_0; 1 drivers +v0x1984170_0 .net "reg31", 31 0, v0x197b590_0; 1 drivers +v0x19841f0_0 .net "reg4", 31 0, v0x19814f0_0; 1 drivers +v0x1984050_0 .net "reg5", 31 0, v0x1981190_0; 1 drivers +v0x19840d0_0 .net "reg6", 31 0, v0x1980e30_0; 1 drivers +v0x19843b0_0 .net "reg7", 31 0, v0x1980ad0_0; 1 drivers +v0x1984430_0 .net "reg8", 31 0, v0x1980770_0; 1 drivers +v0x1984270_0 .net "reg9", 31 0, v0x1980410_0; 1 drivers +L_0x1985880 .part L_0x19856f0, 0, 1; +L_0x1985920 .part L_0x19856f0, 1, 1; +L_0x1985a50 .part L_0x19856f0, 2, 1; +L_0x1985af0 .part L_0x19856f0, 3, 1; +L_0x1985bc0 .part L_0x19856f0, 4, 1; +L_0x1985c90 .part L_0x19856f0, 5, 1; +L_0x1985e70 .part L_0x19856f0, 6, 1; +L_0x1985f10 .part L_0x19856f0, 7, 1; +L_0x1985fb0 .part L_0x19856f0, 8, 1; +L_0x1986080 .part L_0x19856f0, 9, 1; +L_0x19861b0 .part L_0x19856f0, 10, 1; +L_0x1986280 .part L_0x19856f0, 11, 1; +L_0x1986350 .part L_0x19856f0, 12, 1; +L_0x1986420 .part L_0x19856f0, 13, 1; +L_0x1986700 .part L_0x19856f0, 14, 1; +L_0x19867a0 .part L_0x19856f0, 15, 1; +L_0x19868d0 .part L_0x19856f0, 16, 1; +L_0x1986970 .part L_0x19856f0, 17, 1; +L_0x1986ae0 .part L_0x19856f0, 18, 1; +L_0x1986b80 .part L_0x19856f0, 19, 1; +L_0x1986a40 .part L_0x19856f0, 20, 1; +L_0x1986cd0 .part L_0x19856f0, 21, 1; +L_0x1986c20 .part L_0x19856f0, 22, 1; +L_0x1986e90 .part L_0x19856f0, 23, 1; +L_0x1986da0 .part L_0x19856f0, 24, 1; +L_0x1987060 .part L_0x19856f0, 25, 1; +L_0x1986f60 .part L_0x19856f0, 26, 1; +L_0x1987210 .part L_0x19856f0, 27, 1; +L_0x1987130 .part L_0x19856f0, 28, 1; +L_0x19873d0 .part L_0x19856f0, 29, 1; +L_0x19872e0 .part L_0x19856f0, 30, 1; +L_0x19865f0 .part L_0x19856f0, 31, 1; +S_0x19823c0 .scope module, "dec" "decoder1to32" 10 34, 11 4, S_0x1956230; + .timescale 0 0; +v0x19824b0_0 .net *"_s0", 31 0, L_0x1985510; 1 drivers +v0x1982570_0 .net *"_s3", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x1982610_0 .alias "address", 4 0, v0x197ef30_0; +v0x19826b0_0 .alias "enable", 0 0, v0x1982d00_0; +v0x1982730_0 .alias "out", 31 0, v0x197f030_0; +L_0x1985510 .concat [ 1 31 0 0], C4, C4<0000000000000000000000000000000>; +L_0x19856f0 .shift/l 32, L_0x1985510, C4; +S_0x1982060 .scope module, "r0" "register32zero" 10 35, 12 1, S_0x1956230; + .timescale 0 0; +v0x1982150_0 .alias "clk", 0 0, v0x19827d0_0; +v0x19821f0_0 .alias "d", 31 0, v0x1982d80_0; +v0x1982270_0 .var "q", 31 0; +v0x1982340_0 .net "wrenable", 0 0, L_0x1985880; 1 drivers +S_0x1981d00 .scope module, "r1" "register32" 10 36, 13 1, S_0x1956230; + .timescale 0 0; +v0x1981df0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1981e90_0 .alias "d", 31 0, v0x1982d80_0; +v0x1981f10_0 .var "q", 31 0; +v0x1981fe0_0 .net "wrenable", 0 0, L_0x1985920; 1 drivers +S_0x19819a0 .scope module, "r2" "register32" 10 37, 13 1, S_0x1956230; + .timescale 0 0; +v0x1981a90_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1981b30_0 .alias "d", 31 0, v0x1982d80_0; +v0x1981bb0_0 .var "q", 31 0; +v0x1981c80_0 .net "wrenable", 0 0, L_0x1985a50; 1 drivers +S_0x1981640 .scope module, "r3" "register32" 10 38, 13 1, S_0x1956230; + .timescale 0 0; +v0x1981730_0 .alias "clk", 0 0, v0x19827d0_0; +v0x19817d0_0 .alias "d", 31 0, v0x1982d80_0; +v0x1981850_0 .var "q", 31 0; +v0x1981920_0 .net "wrenable", 0 0, L_0x1985af0; 1 drivers +S_0x19812e0 .scope module, "r4" "register32" 10 39, 13 1, S_0x1956230; + .timescale 0 0; +v0x19813d0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1981470_0 .alias "d", 31 0, v0x1982d80_0; +v0x19814f0_0 .var "q", 31 0; +v0x19815c0_0 .net "wrenable", 0 0, L_0x1985bc0; 1 drivers +S_0x1980f80 .scope module, "r5" "register32" 10 40, 13 1, S_0x1956230; + .timescale 0 0; +v0x1981070_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1981110_0 .alias "d", 31 0, v0x1982d80_0; +v0x1981190_0 .var "q", 31 0; +v0x1981260_0 .net "wrenable", 0 0, L_0x1985c90; 1 drivers +S_0x1980c20 .scope module, "r6" "register32" 10 41, 13 1, S_0x1956230; + .timescale 0 0; +v0x1980d10_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1980db0_0 .alias "d", 31 0, v0x1982d80_0; +v0x1980e30_0 .var "q", 31 0; +v0x1980f00_0 .net "wrenable", 0 0, L_0x1985e70; 1 drivers +S_0x19808c0 .scope module, "r7" "register32" 10 42, 13 1, S_0x1956230; + .timescale 0 0; +v0x19809b0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1980a50_0 .alias "d", 31 0, v0x1982d80_0; +v0x1980ad0_0 .var "q", 31 0; +v0x1980ba0_0 .net "wrenable", 0 0, L_0x1985f10; 1 drivers +S_0x1980560 .scope module, "r8" "register32" 10 43, 13 1, S_0x1956230; + .timescale 0 0; +v0x1980650_0 .alias "clk", 0 0, v0x19827d0_0; +v0x19806f0_0 .alias "d", 31 0, v0x1982d80_0; +v0x1980770_0 .var "q", 31 0; +v0x1980840_0 .net "wrenable", 0 0, L_0x1985fb0; 1 drivers +S_0x1980200 .scope module, "r9" "register32" 10 44, 13 1, S_0x1956230; + .timescale 0 0; +v0x19802f0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1980390_0 .alias "d", 31 0, v0x1982d80_0; +v0x1980410_0 .var "q", 31 0; +v0x19804e0_0 .net "wrenable", 0 0, L_0x1986080; 1 drivers +S_0x197fea0 .scope module, "r10" "register32" 10 45, 13 1, S_0x1956230; + .timescale 0 0; +v0x197ff90_0 .alias "clk", 0 0, v0x19827d0_0; +v0x1980030_0 .alias "d", 31 0, v0x1982d80_0; +v0x19800b0_0 .var "q", 31 0; +v0x1980180_0 .net "wrenable", 0 0, L_0x19861b0; 1 drivers +S_0x197fb40 .scope module, "r11" "register32" 10 46, 13 1, S_0x1956230; + .timescale 0 0; +v0x197fc30_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197fcd0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197fd50_0 .var "q", 31 0; +v0x197fe20_0 .net "wrenable", 0 0, L_0x1986280; 1 drivers +S_0x197f7e0 .scope module, "r12" "register32" 10 47, 13 1, S_0x1956230; + .timescale 0 0; +v0x197f8d0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197f970_0 .alias "d", 31 0, v0x1982d80_0; +v0x197f9f0_0 .var "q", 31 0; +v0x197fac0_0 .net "wrenable", 0 0, L_0x1986350; 1 drivers +S_0x197f480 .scope module, "r13" "register32" 10 48, 13 1, S_0x1956230; + .timescale 0 0; +v0x197f570_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197f610_0 .alias "d", 31 0, v0x1982d80_0; +v0x197f690_0 .var "q", 31 0; +v0x197f760_0 .net "wrenable", 0 0, L_0x1986420; 1 drivers +S_0x197f140 .scope module, "r14" "register32" 10 49, 13 1, S_0x1956230; + .timescale 0 0; +v0x197f230_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197f2b0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197f330_0 .var "q", 31 0; +v0x197f400_0 .net "wrenable", 0 0, L_0x1986700; 1 drivers +S_0x197eb90 .scope module, "r15" "register32" 10 50, 13 1, S_0x1956230; + .timescale 0 0; +v0x197ec80_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197d100_0 .alias "d", 31 0, v0x1982d80_0; +v0x197d180_0 .var "q", 31 0; +v0x197d250_0 .net "wrenable", 0 0, L_0x19867a0; 1 drivers +S_0x197e830 .scope module, "r16" "register32" 10 51, 13 1, S_0x1956230; + .timescale 0 0; +v0x197e920_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197e9c0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197ea40_0 .var "q", 31 0; +v0x197eb10_0 .net "wrenable", 0 0, L_0x19868d0; 1 drivers +S_0x197e4d0 .scope module, "r17" "register32" 10 52, 13 1, S_0x1956230; + .timescale 0 0; +v0x197e5c0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197e660_0 .alias "d", 31 0, v0x1982d80_0; +v0x197e6e0_0 .var "q", 31 0; +v0x197e7b0_0 .net "wrenable", 0 0, L_0x1986970; 1 drivers +S_0x197e170 .scope module, "r18" "register32" 10 53, 13 1, S_0x1956230; + .timescale 0 0; +v0x197e260_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197e300_0 .alias "d", 31 0, v0x1982d80_0; +v0x197e380_0 .var "q", 31 0; +v0x197e450_0 .net "wrenable", 0 0, L_0x1986ae0; 1 drivers +S_0x197de10 .scope module, "r19" "register32" 10 54, 13 1, S_0x1956230; + .timescale 0 0; +v0x197df00_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197dfa0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197e020_0 .var "q", 31 0; +v0x197e0f0_0 .net "wrenable", 0 0, L_0x1986b80; 1 drivers +S_0x197dab0 .scope module, "r20" "register32" 10 55, 13 1, S_0x1956230; + .timescale 0 0; +v0x197dba0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197dc40_0 .alias "d", 31 0, v0x1982d80_0; +v0x197dcc0_0 .var "q", 31 0; +v0x197dd90_0 .net "wrenable", 0 0, L_0x1986a40; 1 drivers +S_0x197d750 .scope module, "r21" "register32" 10 56, 13 1, S_0x1956230; + .timescale 0 0; +v0x197d840_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197d8e0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197d960_0 .var "q", 31 0; +v0x197da30_0 .net "wrenable", 0 0, L_0x1986cd0; 1 drivers +S_0x197d3f0 .scope module, "r22" "register32" 10 57, 13 1, S_0x1956230; + .timescale 0 0; +v0x197d4e0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197d580_0 .alias "d", 31 0, v0x1982d80_0; +v0x197d600_0 .var "q", 31 0; +v0x197d6d0_0 .net "wrenable", 0 0, L_0x1986c20; 1 drivers +S_0x197cf70 .scope module, "r23" "register32" 10 58, 13 1, S_0x1956230; + .timescale 0 0; +v0x197d060_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197c300_0 .alias "d", 31 0, v0x1982d80_0; +v0x197c410_0 .var "q", 31 0; +v0x197d370_0 .net "wrenable", 0 0, L_0x1986e90; 1 drivers +S_0x197cc10 .scope module, "r24" "register32" 10 59, 13 1, S_0x1956230; + .timescale 0 0; +v0x197cd00_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197cda0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197ce20_0 .var "q", 31 0; +v0x197cef0_0 .net "wrenable", 0 0, L_0x1986da0; 1 drivers +S_0x197c8b0 .scope module, "r25" "register32" 10 60, 13 1, S_0x1956230; + .timescale 0 0; +v0x197c9a0_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197ca40_0 .alias "d", 31 0, v0x1982d80_0; +v0x197cac0_0 .var "q", 31 0; +v0x197cb90_0 .net "wrenable", 0 0, L_0x1987060; 1 drivers +S_0x197c5a0 .scope module, "r26" "register32" 10 61, 13 1, S_0x1956230; + .timescale 0 0; +v0x197c690_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197c730_0 .alias "d", 31 0, v0x1982d80_0; +v0x197c7b0_0 .var "q", 31 0; +v0x197c830_0 .net "wrenable", 0 0, L_0x1986f60; 1 drivers +S_0x197c170 .scope module, "r27" "register32" 10 62, 13 1, S_0x1956230; + .timescale 0 0; +v0x197c260_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197c390_0 .alias "d", 31 0, v0x1982d80_0; +v0x197c4a0_0 .var "q", 31 0; +v0x197c520_0 .net "wrenable", 0 0, L_0x1987210; 1 drivers +S_0x197be30 .scope module, "r28" "register32" 10 63, 13 1, S_0x1956230; + .timescale 0 0; +v0x197bf20_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197bfa0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197c020_0 .var "q", 31 0; +v0x197c0f0_0 .net "wrenable", 0 0, L_0x1987130; 1 drivers +S_0x197ba50 .scope module, "r29" "register32" 10 64, 13 1, S_0x1956230; + .timescale 0 0; +v0x197bb40_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197bc10_0 .alias "d", 31 0, v0x1982d80_0; +v0x197bce0_0 .var "q", 31 0; +v0x197bdb0_0 .net "wrenable", 0 0, L_0x19873d0; 1 drivers +S_0x197b690 .scope module, "r30" "register32" 10 65, 13 1, S_0x1956230; + .timescale 0 0; +v0x197b780_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197b850_0 .alias "d", 31 0, v0x1982d80_0; +v0x197b900_0 .var "q", 31 0; +v0x197b9d0_0 .net "wrenable", 0 0, L_0x19872e0; 1 drivers +S_0x197b0b0 .scope module, "r31" "register32" 10 66, 13 1, S_0x1956230; + .timescale 0 0; +v0x197b430_0 .alias "clk", 0 0, v0x19827d0_0; +v0x197b4f0_0 .alias "d", 31 0, v0x1982d80_0; +v0x197b590_0 .var "q", 31 0; +v0x197b610_0 .net "wrenable", 0 0, L_0x19865f0; 1 drivers +E_0x1978da0 .event posedge, v0x197b430_0; +S_0x1979180 .scope module, "mux1" "mux32to1by32" 10 68, 14 1, S_0x1956230; + .timescale 0 0; +L_0x1986150 .functor BUFZ 32, v0x1982270_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1976fc0 .functor BUFZ 32, v0x1981f10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1986580 .functor BUFZ 32, v0x1981bb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1985d60 .functor BUFZ 32, v0x1981850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1987ba0 .functor BUFZ 32, v0x19814f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1987cc0 .functor BUFZ 32, v0x1981190_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1987e20 .functor BUFZ 32, v0x1980e30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1987f10 .functor BUFZ 32, v0x1980ad0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988030 .functor BUFZ 32, v0x1980770_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988150 .functor BUFZ 32, v0x1980410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19882d0 .functor BUFZ 32, v0x19800b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19883f0 .functor BUFZ 32, v0x197fd50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988270 .functor BUFZ 32, v0x197f9f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988640 .functor BUFZ 32, v0x197f690_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19887e0 .functor BUFZ 32, v0x197f330_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988900 .functor BUFZ 32, v0x197d180_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988ab0 .functor BUFZ 32, v0x197ea40_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988bd0 .functor BUFZ 32, v0x197e6e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988a20 .functor BUFZ 32, v0x197e380_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988e20 .functor BUFZ 32, v0x197e020_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988cf0 .functor BUFZ 32, v0x197dcc0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988510 .functor BUFZ 32, v0x197d960_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1988760 .functor BUFZ 32, v0x197d600_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19891d0 .functor BUFZ 32, v0x197c410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989110 .functor BUFZ 32, v0x197ce20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989420 .functor BUFZ 32, v0x197cac0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19892c0 .functor BUFZ 32, v0x197c7b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989680 .functor BUFZ 32, v0x197c4a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989510 .functor BUFZ 32, v0x197c020_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19898f0 .functor BUFZ 32, v0x197bce0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989770 .functor BUFZ 32, v0x197b900_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989800 .functor BUFZ 32, v0x197b590_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989d10 .functor BUFZ 32, L_0x19899e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x1979860_0 .net *"_s96", 31 0, L_0x19899e0; 1 drivers +v0x1979920_0 .alias "address", 4 0, v0x197ee80_0; +v0x19799c0_0 .alias "input0", 31 0, v0x1983210_0; +v0x1979a40_0 .alias "input1", 31 0, v0x1983290_0; +v0x1979b20_0 .alias "input10", 31 0, v0x1983310_0; +v0x1979bd0_0 .alias "input11", 31 0, v0x1983390_0; +v0x1979c50_0 .alias "input12", 31 0, v0x1983410_0; +v0x1979d00_0 .alias "input13", 31 0, v0x1983510_0; +v0x1979db0_0 .alias "input14", 31 0, v0x1983590_0; +v0x1979e60_0 .alias "input15", 31 0, v0x1983490_0; +v0x1979f10_0 .alias "input16", 31 0, v0x19836a0_0; +v0x1979fc0_0 .alias "input17", 31 0, v0x1983610_0; +v0x197a070_0 .alias "input18", 31 0, v0x19837c0_0; +v0x197a120_0 .alias "input19", 31 0, v0x1983720_0; +v0x197a250_0 .alias "input2", 31 0, v0x19838f0_0; +v0x197a300_0 .alias "input20", 31 0, v0x1983840_0; +v0x197a1a0_0 .alias "input21", 31 0, v0x1983a30_0; +v0x197a470_0 .alias "input22", 31 0, v0x1983970_0; +v0x197a590_0 .alias "input23", 31 0, v0x1983b80_0; +v0x197a610_0 .alias "input24", 31 0, v0x1983ab0_0; +v0x197a4f0_0 .alias "input25", 31 0, v0x1983ce0_0; +v0x197a770_0 .alias "input26", 31 0, v0x1983c00_0; +v0x197a6c0_0 .alias "input27", 31 0, v0x1983e50_0; +v0x197a8b0_0 .alias "input28", 31 0, v0x1983d60_0; +v0x197a7f0_0 .alias "input29", 31 0, v0x1983fd0_0; +v0x197aa00_0 .alias "input3", 31 0, v0x1983ed0_0; +v0x197a960_0 .alias "input30", 31 0, v0x1983f50_0; +v0x197ab90_0 .alias "input31", 31 0, v0x1984170_0; +v0x197aa80_0 .alias "input4", 31 0, v0x19841f0_0; +v0x197ad00_0 .alias "input5", 31 0, v0x1984050_0; +v0x197ac10_0 .alias "input6", 31 0, v0x19840d0_0; +v0x197ae80_0 .alias "input7", 31 0, v0x19843b0_0; +v0x197ad80_0 .alias "input8", 31 0, v0x1984430_0; +v0x197b010_0 .alias "input9", 31 0, v0x1984270_0; +v0x197af00 .array "mux", 0 31; +v0x197af00_0 .net v0x197af00 0, 31 0, L_0x1986150; 1 drivers +v0x197af00_1 .net v0x197af00 1, 31 0, L_0x1976fc0; 1 drivers +v0x197af00_2 .net v0x197af00 2, 31 0, L_0x1986580; 1 drivers +v0x197af00_3 .net v0x197af00 3, 31 0, L_0x1985d60; 1 drivers +v0x197af00_4 .net v0x197af00 4, 31 0, L_0x1987ba0; 1 drivers +v0x197af00_5 .net v0x197af00 5, 31 0, L_0x1987cc0; 1 drivers +v0x197af00_6 .net v0x197af00 6, 31 0, L_0x1987e20; 1 drivers +v0x197af00_7 .net v0x197af00 7, 31 0, L_0x1987f10; 1 drivers +v0x197af00_8 .net v0x197af00 8, 31 0, L_0x1988030; 1 drivers +v0x197af00_9 .net v0x197af00 9, 31 0, L_0x1988150; 1 drivers +v0x197af00_10 .net v0x197af00 10, 31 0, L_0x19882d0; 1 drivers +v0x197af00_11 .net v0x197af00 11, 31 0, L_0x19883f0; 1 drivers +v0x197af00_12 .net v0x197af00 12, 31 0, L_0x1988270; 1 drivers +v0x197af00_13 .net v0x197af00 13, 31 0, L_0x1988640; 1 drivers +v0x197af00_14 .net v0x197af00 14, 31 0, L_0x19887e0; 1 drivers +v0x197af00_15 .net v0x197af00 15, 31 0, L_0x1988900; 1 drivers +v0x197af00_16 .net v0x197af00 16, 31 0, L_0x1988ab0; 1 drivers +v0x197af00_17 .net v0x197af00 17, 31 0, L_0x1988bd0; 1 drivers +v0x197af00_18 .net v0x197af00 18, 31 0, L_0x1988a20; 1 drivers +v0x197af00_19 .net v0x197af00 19, 31 0, L_0x1988e20; 1 drivers +v0x197af00_20 .net v0x197af00 20, 31 0, L_0x1988cf0; 1 drivers +v0x197af00_21 .net v0x197af00 21, 31 0, L_0x1988510; 1 drivers +v0x197af00_22 .net v0x197af00 22, 31 0, L_0x1988760; 1 drivers +v0x197af00_23 .net v0x197af00 23, 31 0, L_0x19891d0; 1 drivers +v0x197af00_24 .net v0x197af00 24, 31 0, L_0x1989110; 1 drivers +v0x197af00_25 .net v0x197af00 25, 31 0, L_0x1989420; 1 drivers +v0x197af00_26 .net v0x197af00 26, 31 0, L_0x19892c0; 1 drivers +v0x197af00_27 .net v0x197af00 27, 31 0, L_0x1989680; 1 drivers +v0x197af00_28 .net v0x197af00 28, 31 0, L_0x1989510; 1 drivers +v0x197af00_29 .net v0x197af00 29, 31 0, L_0x19898f0; 1 drivers +v0x197af00_30 .net v0x197af00 30, 31 0, L_0x1989770; 1 drivers +v0x197af00_31 .net v0x197af00 31, 31 0, L_0x1989800; 1 drivers +v0x197af80_0 .alias "out", 31 0, v0x197ed20_0; +L_0x19899e0 .array/port v0x197af00, C4; +S_0x1977900 .scope module, "mux2" "mux32to1by32" 10 69, 14 1, S_0x1956230; + .timescale 0 0; +L_0x1989d70 .functor BUFZ 32, v0x1982270_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989dd0 .functor BUFZ 32, v0x1981f10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989e30 .functor BUFZ 32, v0x1981bb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989e90 .functor BUFZ 32, v0x1981850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989ef0 .functor BUFZ 32, v0x19814f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989f50 .functor BUFZ 32, v0x1981190_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1989fb0 .functor BUFZ 32, v0x1980e30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a010 .functor BUFZ 32, v0x1980ad0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a070 .functor BUFZ 32, v0x1980770_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a0d0 .functor BUFZ 32, v0x1980410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a190 .functor BUFZ 32, v0x19800b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a1f0 .functor BUFZ 32, v0x197fd50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a130 .functor BUFZ 32, v0x197f9f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a2c0 .functor BUFZ 32, v0x197f690_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a3a0 .functor BUFZ 32, v0x197f330_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a400 .functor BUFZ 32, v0x197d180_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a4f0 .functor BUFZ 32, v0x197ea40_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a550 .functor BUFZ 32, v0x197e6e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a460 .functor BUFZ 32, v0x197e380_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a650 .functor BUFZ 32, v0x197e020_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a5b0 .functor BUFZ 32, v0x197dcc0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a760 .functor BUFZ 32, v0x197d960_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a6b0 .functor BUFZ 32, v0x197d600_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a880 .functor BUFZ 32, v0x197c410_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a7c0 .functor BUFZ 32, v0x197ce20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a9e0 .functor BUFZ 32, v0x197cac0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198a910 .functor BUFZ 32, v0x197c7b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198ab20 .functor BUFZ 32, v0x197c4a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198aa40 .functor BUFZ 32, v0x197c020_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198ac70 .functor BUFZ 32, v0x197bce0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198ab80 .functor BUFZ 32, v0x197b900_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198ac10 .functor BUFZ 32, v0x197b590_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x198af10 .functor BUFZ 32, L_0x198acd0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x19779f0_0 .net *"_s96", 31 0, L_0x198acd0; 1 drivers +v0x1977ab0_0 .alias "address", 4 0, v0x1982c80_0; +v0x1977b50_0 .alias "input0", 31 0, v0x1983210_0; +v0x1977bf0_0 .alias "input1", 31 0, v0x1983290_0; +v0x1977ca0_0 .alias "input10", 31 0, v0x1983310_0; +v0x1977d40_0 .alias "input11", 31 0, v0x1983390_0; +v0x1977de0_0 .alias "input12", 31 0, v0x1983410_0; +v0x1977e80_0 .alias "input13", 31 0, v0x1983510_0; +v0x1977f70_0 .alias "input14", 31 0, v0x1983590_0; +v0x1978010_0 .alias "input15", 31 0, v0x1983490_0; +v0x19780b0_0 .alias "input16", 31 0, v0x19836a0_0; +v0x1978150_0 .alias "input17", 31 0, v0x1983610_0; +v0x19781f0_0 .alias "input18", 31 0, v0x19837c0_0; +v0x1978290_0 .alias "input19", 31 0, v0x1983720_0; +v0x19783b0_0 .alias "input2", 31 0, v0x19838f0_0; +v0x1978450_0 .alias "input20", 31 0, v0x1983840_0; +v0x1978310_0 .alias "input21", 31 0, v0x1983a30_0; +v0x19785a0_0 .alias "input22", 31 0, v0x1983970_0; +v0x19786c0_0 .alias "input23", 31 0, v0x1983b80_0; +v0x1978740_0 .alias "input24", 31 0, v0x1983ab0_0; +v0x1978620_0 .alias "input25", 31 0, v0x1983ce0_0; +v0x1978870_0 .alias "input26", 31 0, v0x1983c00_0; +v0x19787c0_0 .alias "input27", 31 0, v0x1983e50_0; +v0x19789b0_0 .alias "input28", 31 0, v0x1983d60_0; +v0x1978910_0 .alias "input29", 31 0, v0x1983fd0_0; +v0x1978b00_0 .alias "input3", 31 0, v0x1983ed0_0; +v0x1978a50_0 .alias "input30", 31 0, v0x1983f50_0; +v0x1978c60_0 .alias "input31", 31 0, v0x1984170_0; +v0x1978ba0_0 .alias "input4", 31 0, v0x19841f0_0; +v0x1978dd0_0 .alias "input5", 31 0, v0x1984050_0; +v0x1978ce0_0 .alias "input6", 31 0, v0x19840d0_0; +v0x1978f50_0 .alias "input7", 31 0, v0x19843b0_0; +v0x1978e50_0 .alias "input8", 31 0, v0x1984430_0; +v0x19790e0_0 .alias "input9", 31 0, v0x1984270_0; +v0x1978fd0 .array "mux", 0 31; +v0x1978fd0_0 .net v0x1978fd0 0, 31 0, L_0x1989d70; 1 drivers +v0x1978fd0_1 .net v0x1978fd0 1, 31 0, L_0x1989dd0; 1 drivers +v0x1978fd0_2 .net v0x1978fd0 2, 31 0, L_0x1989e30; 1 drivers +v0x1978fd0_3 .net v0x1978fd0 3, 31 0, L_0x1989e90; 1 drivers +v0x1978fd0_4 .net v0x1978fd0 4, 31 0, L_0x1989ef0; 1 drivers +v0x1978fd0_5 .net v0x1978fd0 5, 31 0, L_0x1989f50; 1 drivers +v0x1978fd0_6 .net v0x1978fd0 6, 31 0, L_0x1989fb0; 1 drivers +v0x1978fd0_7 .net v0x1978fd0 7, 31 0, L_0x198a010; 1 drivers +v0x1978fd0_8 .net v0x1978fd0 8, 31 0, L_0x198a070; 1 drivers +v0x1978fd0_9 .net v0x1978fd0 9, 31 0, L_0x198a0d0; 1 drivers +v0x1978fd0_10 .net v0x1978fd0 10, 31 0, L_0x198a190; 1 drivers +v0x1978fd0_11 .net v0x1978fd0 11, 31 0, L_0x198a1f0; 1 drivers +v0x1978fd0_12 .net v0x1978fd0 12, 31 0, L_0x198a130; 1 drivers +v0x1978fd0_13 .net v0x1978fd0 13, 31 0, L_0x198a2c0; 1 drivers +v0x1978fd0_14 .net v0x1978fd0 14, 31 0, L_0x198a3a0; 1 drivers +v0x1978fd0_15 .net v0x1978fd0 15, 31 0, L_0x198a400; 1 drivers +v0x1978fd0_16 .net v0x1978fd0 16, 31 0, L_0x198a4f0; 1 drivers +v0x1978fd0_17 .net v0x1978fd0 17, 31 0, L_0x198a550; 1 drivers +v0x1978fd0_18 .net v0x1978fd0 18, 31 0, L_0x198a460; 1 drivers +v0x1978fd0_19 .net v0x1978fd0 19, 31 0, L_0x198a650; 1 drivers +v0x1978fd0_20 .net v0x1978fd0 20, 31 0, L_0x198a5b0; 1 drivers +v0x1978fd0_21 .net v0x1978fd0 21, 31 0, L_0x198a760; 1 drivers +v0x1978fd0_22 .net v0x1978fd0 22, 31 0, L_0x198a6b0; 1 drivers +v0x1978fd0_23 .net v0x1978fd0 23, 31 0, L_0x198a880; 1 drivers +v0x1978fd0_24 .net v0x1978fd0 24, 31 0, L_0x198a7c0; 1 drivers +v0x1978fd0_25 .net v0x1978fd0 25, 31 0, L_0x198a9e0; 1 drivers +v0x1978fd0_26 .net v0x1978fd0 26, 31 0, L_0x198a910; 1 drivers +v0x1978fd0_27 .net v0x1978fd0 27, 31 0, L_0x198ab20; 1 drivers +v0x1978fd0_28 .net v0x1978fd0 28, 31 0, L_0x198aa40; 1 drivers +v0x1978fd0_29 .net v0x1978fd0 29, 31 0, L_0x198ac70; 1 drivers +v0x1978fd0_30 .net v0x1978fd0 30, 31 0, L_0x198ab80; 1 drivers +v0x1978fd0_31 .net v0x1978fd0 31, 31 0, L_0x198ac10; 1 drivers +v0x19796b0_0 .alias "out", 31 0, v0x197edd0_0; +L_0x198acd0 .array/port v0x1978fd0, C4; + .scope S_0x1943a00; +T_0 ; + %wait E_0x1948470; + %load/v 8, v0x19740b0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_0.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_0.1, 6; + %jmp T_0.2; +T_0.0 ; + %load/v 8, v0x1957790_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x1974150_0, 0, 8; + %jmp T_0.2; +T_0.1 ; + %load/v 8, v0x1974010_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x1974150_0, 0, 8; + %jmp T_0.2; +T_0.2 ; + %jmp T_0; + .thread T_0, $push; + .scope S_0x193f010; +T_1 ; + %wait E_0x1974200; + %load/v 8, v0x19748d0_0, 6; + %cmpi/u 8, 0, 6; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 35, 6; + %jmp/1 T_1.1, 6; + %cmpi/u 8, 43, 6; + %jmp/1 T_1.2, 6; + %cmpi/u 8, 2, 6; + %jmp/1 T_1.3, 6; + %cmpi/u 8, 3, 6; + %jmp/1 T_1.4, 6; + %cmpi/u 8, 5, 6; + %jmp/1 T_1.5, 6; + %cmpi/u 8, 14, 6; + %jmp/1 T_1.6, 6; + %cmpi/u 8, 8, 6; + %jmp/1 T_1.7, 6; + %jmp T_1.8; +T_1.0 ; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 0, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 0, 1; + %set/v v0x1974470_0, 0, 1; + %load/v 8, v0x19743d0_0, 6; + %cmpi/u 8, 8, 6; + %jmp/1 T_1.9, 6; + %cmpi/u 8, 36, 6; + %jmp/1 T_1.10, 6; + %cmpi/u 8, 34, 6; + %jmp/1 T_1.11, 6; + %cmpi/u 8, 42, 6; + %jmp/1 T_1.12, 6; + %jmp T_1.13; +T_1.9 ; + %set/v v0x19749d0_0, 0, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 1, 1; + %jmp T_1.13; +T_1.10 ; + %set/v v0x19749d0_0, 1, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 0, 1; + %jmp T_1.13; +T_1.11 ; + %set/v v0x19749d0_0, 1, 1; + %movi 8, 1, 3; + %set/v v0x1974330_0, 8, 3; + %set/v v0x1974520_0, 0, 1; + %jmp T_1.13; +T_1.12 ; + %set/v v0x19749d0_0, 1, 1; + %movi 8, 2, 3; + %set/v v0x1974330_0, 8, 3; + %set/v v0x1974520_0, 0, 1; + %jmp T_1.13; +T_1.13 ; + %jmp T_1.8; +T_1.1 ; + %set/v v0x19749d0_0, 1, 1; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 0, 1; + %set/v v0x19746a0_0, 1, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 1, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 0, 1; + %set/v v0x1974470_0, 0, 1; + %jmp T_1.8; +T_1.2 ; + %set/v v0x19749d0_0, 0, 1; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 0, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 1, 1; + %set/v v0x1974740_0, 0, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 0, 1; + %set/v v0x1974470_0, 0, 1; + %jmp T_1.8; +T_1.3 ; + %set/v v0x19749d0_0, 0, 1; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 0, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 0, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 1, 1; + %set/v v0x1974470_0, 0, 1; + %jmp T_1.8; +T_1.4 ; + %set/v v0x19749d0_0, 1, 1; + %set/v v0x19745c0_0, 1, 1; + %set/v v0x1974270_0, 0, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 0, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 1, 1; + %set/v v0x1974470_0, 0, 1; + %jmp T_1.8; +T_1.5 ; + %set/v v0x19749d0_0, 0, 1; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 0, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 0, 1; + %movi 8, 1, 3; + %set/v v0x1974330_0, 8, 3; + %set/v v0x1974520_0, 0, 1; + %set/v v0x1974470_0, 1, 1; + %jmp T_1.8; +T_1.6 ; + %set/v v0x19749d0_0, 1, 1; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 1, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 0, 1; + %movi 8, 3, 3; + %set/v v0x1974330_0, 8, 3; + %set/v v0x1974520_0, 0, 1; + %set/v v0x1974470_0, 0, 1; + %jmp T_1.8; +T_1.7 ; + %set/v v0x19749d0_0, 1, 1; + %set/v v0x19745c0_0, 0, 1; + %set/v v0x1974270_0, 1, 1; + %set/v v0x19746a0_0, 0, 1; + %set/v v0x1974830_0, 0, 1; + %set/v v0x1974740_0, 0, 1; + %set/v v0x1974330_0, 0, 3; + %set/v v0x1974520_0, 0, 1; + %set/v v0x1974470_0, 0, 1; + %jmp T_1.8; +T_1.8 ; + %jmp T_1; + .thread T_1, $push; + .scope S_0x194a3b0; +T_2 ; + %wait E_0x19744f0; + %load/v 8, v0x1974d60_0, 1; + %jmp/0xz T_2.0, 8; + %load/v 8, v0x1974b70_0, 32; + %ix/getv 3, v0x1974ab0_0; + %jmp/1 t_0, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x1974cb0, 0, 8; +t_0 ; +T_2.0 ; + %ix/getv 3, v0x1974ab0_0; + %load/av 8, v0x1974cb0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1974c10_0, 0, 8; + %jmp T_2; + .thread T_2, $push; + .scope S_0x1949bc0; +T_3 ; + %wait E_0x1974de0; + %load/v 8, v0x1974e50_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_3.0, 4; + %load/v 8, v0x1974fb0_0, 8; + %ix/load 0, 8, 0; + %assign/v0 v0x1975100_0, 0, 8; +T_3.0 ; + %jmp T_3; + .thread T_3; + .scope S_0x1976250; +T_4 ; + %ix/load 3, 0, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 0; +t_1 ; + %movi 8, 4, 32; + %ix/load 3, 4, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_2 ; + %movi 8, 8, 32; + %ix/load 3, 8, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_3 ; + %movi 8, 12, 32; + %ix/load 3, 12, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_4 ; + %movi 8, 16, 32; + %ix/load 3, 16, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_5 ; + %movi 8, 20, 32; + %ix/load 3, 20, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_6 ; + %movi 8, 24, 32; + %ix/load 3, 24, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_7 ; + %movi 8, 28, 32; + %ix/load 3, 28, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_8 ; + %movi 8, 32, 32; + %ix/load 3, 32, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_9 ; + %movi 8, 36, 32; + %ix/load 3, 36, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_10 ; + %movi 8, 40, 32; + %ix/load 3, 40, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_11 ; + %movi 8, 44, 32; + %ix/load 3, 44, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_12 ; + %movi 8, 48, 32; + %ix/load 3, 48, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_13 ; + %movi 8, 52, 32; + %ix/load 3, 52, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_14 ; + %movi 8, 56, 32; + %ix/load 3, 56, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_15 ; + %movi 8, 60, 32; + %ix/load 3, 60, 0; address + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_16 ; + %end; + .thread T_4; + .scope S_0x1976250; +T_5 ; + %wait E_0x1976340; + %load/v 8, v0x1976730_0, 1; + %jmp/0xz T_5.0, 8; + %load/v 8, v0x1976440_0, 32; + %ix/getv 3, v0x1976370_0; + %jmp/1 t_17, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x19766b0, 0, 8; +t_17 ; +T_5.0 ; + %jmp T_5; + .thread T_5, $push; + .scope S_0x1975e10; +T_6 ; + %wait E_0x1975f00; + %load/v 8, v0x1975f70_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_6.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_6.1, 6; + %jmp T_6.2; +T_6.0 ; + %load/v 8, v0x1976030_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1976170_0, 0, 8; + %jmp T_6.2; +T_6.1 ; + %load/v 8, v0x19760d0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1976170_0, 0, 8; + %jmp T_6.2; +T_6.2 ; + %jmp T_6; + .thread T_6, $push; + .scope S_0x1975620; +T_7 ; + %wait E_0x1975710; + %load/v 8, v0x1975980_0, 32; + %mov 40, 0, 1; + %load/v 41, v0x1975a30_0, 32; + %mov 73, 0, 1; + %add 8, 41, 33; + %set/v v0x1975ad0_0, 8, 32; + %set/v v0x1975b50_0, 40, 1; + %jmp T_7; + .thread T_7, $push; + .scope S_0x1975210; +T_8 ; + %wait E_0x1975300; + %load/v 8, v0x1975370_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_8.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_8.1, 6; + %jmp T_8.2; +T_8.0 ; + %load/v 8, v0x1975430_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1975570_0, 0, 8; + %jmp T_8.2; +T_8.1 ; + %load/v 8, v0x19754d0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1975570_0, 0, 8; + %jmp T_8.2; +T_8.2 ; + %jmp T_8; + .thread T_8, $push; + .scope S_0x1957a00; +T_9 ; + %set/v v0x19770e0_0, 0, 32; + %end; + .thread T_9; + .scope S_0x1957a00; +T_10 ; + %movi 8, 4, 32; + %set/v v0x1976bc0_0, 8, 32; + %end; + .thread T_10; + .scope S_0x1957a00; +T_11 ; + %wait E_0x19751a0; + %load/v 8, v0x1977160_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_11.0, 4; + %load/v 8, v0x19771e0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x19770e0_0, 0, 8; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0x1957210; +T_12 ; + %wait E_0x1976220; + %load/v 8, v0x19773c0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_12.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_12.1, 6; + %jmp T_12.2; +T_12.0 ; + %load/v 8, v0x1977460_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x19775a0_0, 0, 8; + %jmp T_12.2; +T_12.1 ; + %load/v 8, v0x1977500_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x19775a0_0, 0, 8; + %jmp T_12.2; +T_12.2 ; + %jmp T_12; + .thread T_12, $push; + .scope S_0x1982060; +T_13 ; + %wait E_0x1978da0; + %set/v v0x1982270_0, 0, 32; + %jmp T_13; + .thread T_13; + .scope S_0x1981d00; +T_14 ; + %wait E_0x1978da0; + %load/v 8, v0x1981fe0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_14.0, 4; + %load/v 8, v0x1981e90_0, 32; + %set/v v0x1981f10_0, 8, 32; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0x19819a0; +T_15 ; + %wait E_0x1978da0; + %load/v 8, v0x1981c80_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_15.0, 4; + %load/v 8, v0x1981b30_0, 32; + %set/v v0x1981bb0_0, 8, 32; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0x1981640; +T_16 ; + %wait E_0x1978da0; + %load/v 8, v0x1981920_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_16.0, 4; + %load/v 8, v0x19817d0_0, 32; + %set/v v0x1981850_0, 8, 32; +T_16.0 ; + %jmp T_16; + .thread T_16; + .scope S_0x19812e0; +T_17 ; + %wait E_0x1978da0; + %load/v 8, v0x19815c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_17.0, 4; + %load/v 8, v0x1981470_0, 32; + %set/v v0x19814f0_0, 8, 32; +T_17.0 ; + %jmp T_17; + .thread T_17; + .scope S_0x1980f80; +T_18 ; + %wait E_0x1978da0; + %load/v 8, v0x1981260_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_18.0, 4; + %load/v 8, v0x1981110_0, 32; + %set/v v0x1981190_0, 8, 32; +T_18.0 ; + %jmp T_18; + .thread T_18; + .scope S_0x1980c20; +T_19 ; + %wait E_0x1978da0; + %load/v 8, v0x1980f00_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_19.0, 4; + %load/v 8, v0x1980db0_0, 32; + %set/v v0x1980e30_0, 8, 32; +T_19.0 ; + %jmp T_19; + .thread T_19; + .scope S_0x19808c0; +T_20 ; + %wait E_0x1978da0; + %load/v 8, v0x1980ba0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_20.0, 4; + %load/v 8, v0x1980a50_0, 32; + %set/v v0x1980ad0_0, 8, 32; +T_20.0 ; + %jmp T_20; + .thread T_20; + .scope S_0x1980560; +T_21 ; + %wait E_0x1978da0; + %load/v 8, v0x1980840_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_21.0, 4; + %load/v 8, v0x19806f0_0, 32; + %set/v v0x1980770_0, 8, 32; +T_21.0 ; + %jmp T_21; + .thread T_21; + .scope S_0x1980200; +T_22 ; + %wait E_0x1978da0; + %load/v 8, v0x19804e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_22.0, 4; + %load/v 8, v0x1980390_0, 32; + %set/v v0x1980410_0, 8, 32; +T_22.0 ; + %jmp T_22; + .thread T_22; + .scope S_0x197fea0; +T_23 ; + %wait E_0x1978da0; + %load/v 8, v0x1980180_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_23.0, 4; + %load/v 8, v0x1980030_0, 32; + %set/v v0x19800b0_0, 8, 32; +T_23.0 ; + %jmp T_23; + .thread T_23; + .scope S_0x197fb40; +T_24 ; + %wait E_0x1978da0; + %load/v 8, v0x197fe20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_24.0, 4; + %load/v 8, v0x197fcd0_0, 32; + %set/v v0x197fd50_0, 8, 32; +T_24.0 ; + %jmp T_24; + .thread T_24; + .scope S_0x197f7e0; +T_25 ; + %wait E_0x1978da0; + %load/v 8, v0x197fac0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_25.0, 4; + %load/v 8, v0x197f970_0, 32; + %set/v v0x197f9f0_0, 8, 32; +T_25.0 ; + %jmp T_25; + .thread T_25; + .scope S_0x197f480; +T_26 ; + %wait E_0x1978da0; + %load/v 8, v0x197f760_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_26.0, 4; + %load/v 8, v0x197f610_0, 32; + %set/v v0x197f690_0, 8, 32; +T_26.0 ; + %jmp T_26; + .thread T_26; + .scope S_0x197f140; +T_27 ; + %wait E_0x1978da0; + %load/v 8, v0x197f400_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_27.0, 4; + %load/v 8, v0x197f2b0_0, 32; + %set/v v0x197f330_0, 8, 32; +T_27.0 ; + %jmp T_27; + .thread T_27; + .scope S_0x197eb90; +T_28 ; + %wait E_0x1978da0; + %load/v 8, v0x197d250_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_28.0, 4; + %load/v 8, v0x197d100_0, 32; + %set/v v0x197d180_0, 8, 32; +T_28.0 ; + %jmp T_28; + .thread T_28; + .scope S_0x197e830; +T_29 ; + %wait E_0x1978da0; + %load/v 8, v0x197eb10_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_29.0, 4; + %load/v 8, v0x197e9c0_0, 32; + %set/v v0x197ea40_0, 8, 32; +T_29.0 ; + %jmp T_29; + .thread T_29; + .scope S_0x197e4d0; +T_30 ; + %wait E_0x1978da0; + %load/v 8, v0x197e7b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_30.0, 4; + %load/v 8, v0x197e660_0, 32; + %set/v v0x197e6e0_0, 8, 32; +T_30.0 ; + %jmp T_30; + .thread T_30; + .scope S_0x197e170; +T_31 ; + %wait E_0x1978da0; + %load/v 8, v0x197e450_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_31.0, 4; + %load/v 8, v0x197e300_0, 32; + %set/v v0x197e380_0, 8, 32; +T_31.0 ; + %jmp T_31; + .thread T_31; + .scope S_0x197de10; +T_32 ; + %wait E_0x1978da0; + %load/v 8, v0x197e0f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_32.0, 4; + %load/v 8, v0x197dfa0_0, 32; + %set/v v0x197e020_0, 8, 32; +T_32.0 ; + %jmp T_32; + .thread T_32; + .scope S_0x197dab0; +T_33 ; + %wait E_0x1978da0; + %load/v 8, v0x197dd90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_33.0, 4; + %load/v 8, v0x197dc40_0, 32; + %set/v v0x197dcc0_0, 8, 32; +T_33.0 ; + %jmp T_33; + .thread T_33; + .scope S_0x197d750; +T_34 ; + %wait E_0x1978da0; + %load/v 8, v0x197da30_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_34.0, 4; + %load/v 8, v0x197d8e0_0, 32; + %set/v v0x197d960_0, 8, 32; +T_34.0 ; + %jmp T_34; + .thread T_34; + .scope S_0x197d3f0; +T_35 ; + %wait E_0x1978da0; + %load/v 8, v0x197d6d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_35.0, 4; + %load/v 8, v0x197d580_0, 32; + %set/v v0x197d600_0, 8, 32; +T_35.0 ; + %jmp T_35; + .thread T_35; + .scope S_0x197cf70; +T_36 ; + %wait E_0x1978da0; + %load/v 8, v0x197d370_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_36.0, 4; + %load/v 8, v0x197c300_0, 32; + %set/v v0x197c410_0, 8, 32; +T_36.0 ; + %jmp T_36; + .thread T_36; + .scope S_0x197cc10; +T_37 ; + %wait E_0x1978da0; + %load/v 8, v0x197cef0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_37.0, 4; + %load/v 8, v0x197cda0_0, 32; + %set/v v0x197ce20_0, 8, 32; +T_37.0 ; + %jmp T_37; + .thread T_37; + .scope S_0x197c8b0; +T_38 ; + %wait E_0x1978da0; + %load/v 8, v0x197cb90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_38.0, 4; + %load/v 8, v0x197ca40_0, 32; + %set/v v0x197cac0_0, 8, 32; +T_38.0 ; + %jmp T_38; + .thread T_38; + .scope S_0x197c5a0; +T_39 ; + %wait E_0x1978da0; + %load/v 8, v0x197c830_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_39.0, 4; + %load/v 8, v0x197c730_0, 32; + %set/v v0x197c7b0_0, 8, 32; +T_39.0 ; + %jmp T_39; + .thread T_39; + .scope S_0x197c170; +T_40 ; + %wait E_0x1978da0; + %load/v 8, v0x197c520_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_40.0, 4; + %load/v 8, v0x197c390_0, 32; + %set/v v0x197c4a0_0, 8, 32; +T_40.0 ; + %jmp T_40; + .thread T_40; + .scope S_0x197be30; +T_41 ; + %wait E_0x1978da0; + %load/v 8, v0x197c0f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_41.0, 4; + %load/v 8, v0x197bfa0_0, 32; + %set/v v0x197c020_0, 8, 32; +T_41.0 ; + %jmp T_41; + .thread T_41; + .scope S_0x197ba50; +T_42 ; + %wait E_0x1978da0; + %load/v 8, v0x197bdb0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_42.0, 4; + %load/v 8, v0x197bc10_0, 32; + %set/v v0x197bce0_0, 8, 32; +T_42.0 ; + %jmp T_42; + .thread T_42; + .scope S_0x197b690; +T_43 ; + %wait E_0x1978da0; + %load/v 8, v0x197b9d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_43.0, 4; + %load/v 8, v0x197b850_0, 32; + %set/v v0x197b900_0, 8, 32; +T_43.0 ; + %jmp T_43; + .thread T_43; + .scope S_0x197b0b0; +T_44 ; + %wait E_0x1978da0; + %load/v 8, v0x197b610_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_44.0, 4; + %load/v 8, v0x197b4f0_0, 32; + %set/v v0x197b590_0, 8, 32; +T_44.0 ; + %jmp T_44; + .thread T_44; +# The file index is used to find the file name in the following table. +:file_names 15; + "N/A"; + ""; + "./mux.v"; + "./control.v"; + "./datamemory.v"; + "./dff.v"; + "./ifetch.v"; + "./memory.v"; + "./add32bit.v"; + "./mux32to1by1.v"; + "./regfile.v"; + "./decoders.v"; + "./register32zero.v"; + "./register32.v"; + "./mux32to1by32.v"; diff --git a/data b/data new file mode 100644 index 0000000..7458580 --- /dev/null +++ b/data @@ -0,0 +1,2048 @@ +6269460a +2b293428 +28626946 +20293031 +0000203d +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000003 +00000090 +00000003 +00000090 +00000003 +00000090 +00000003 +00000090 +00000002 +0000009c +00000005 +0000009c +0000000d +0000009c +00000022 +0000009c +00000003 +0000003c +00000000 +00000000 +00000014 +00000000 diff --git a/datamemory.t.v b/datamemory.t.v new file mode 100644 index 0000000..0d781db --- /dev/null +++ b/datamemory.t.v @@ -0,0 +1,40 @@ +//test datamemory.v + +`include "datamemory.v" + +module testDM(); + + wire[31:0] dOut; + reg[31:0] dIn; + reg WrEn; + reg[6:0] address; + + datamemory DM(dOut[31:0], address[6:0], WrEn, dIn[31:0]); + + initial begin + WrEn=1; + dIn[31:0]= 32'd20; + address[6:0]=7'd5; + #15 + $display("%b",dOut[31:0]); + + WrEn=0; + dIn[31:0]= 32'd20; + address[6:0]=7'd5; + #15 + $display("%b",dOut[31:0]); + + WrEn=1; + dIn[31:0]= 32'd15; + address[6:0]=7'd7; + #15 + $display("%b",dOut[31:0]); + + WrEn=0; + dIn[31:0]= 32'd30; + address[6:0]=7'd7; + #15; + $display("%b",dOut[31:0]); + + end +endmodule \ No newline at end of file diff --git a/datamemory.v b/datamemory.v new file mode 100644 index 0000000..27e5ec8 --- /dev/null +++ b/datamemory.v @@ -0,0 +1,28 @@ +//------------------------------------------------------------------------ +// Data Memory +// Positive edge triggered +// dataOut always has the value mem[address] +// If writeEnable is true, writes dataIn to mem[address] +//------------------------------------------------------------------------ + +module datamemory +#( + parameter addresswidth = 7, + parameter depth = 2**addresswidth, + parameter width = 32 +) +( + output reg [width-1:0] dataOut, + input [addresswidth-1:0] address, + input writeEnable, + input [width-1:0] dataIn +); + + reg [width-1:0] memory [depth-1:0]; + always @(writeEnable or address or dataIn) begin + if(writeEnable) + memory[address] <= dataIn; + dataOut <= memory[address]; + end + +endmodule \ No newline at end of file diff --git a/decoders.v b/decoders.v new file mode 100644 index 0000000..dd467c2 --- /dev/null +++ b/decoders.v @@ -0,0 +1,14 @@ +// 32 bit decoder with enable signal +// enable=0: all output bits are 0 +// enable=1: out[address] is 1, all other outputs are 0 +module decoder1to32 +( +output[31:0] out, +input enable, +input[4:0] address +); + + assign out = enable< extended_imm [31:0] $end +$scope module ALUSource $end +$var wire 1 7 address $end +$var wire 32 ? input0 [31:0] $end +$var wire 32 @ input1 [31:0] $end +$var reg 32 A out [31:0] $end +$upscope $end +$scope module Alu $end +$var wire 3 B ALUcommand [2:0] $end +$var wire 32 C a [31:0] $end +$var wire 1 D adder_cout $end +$var wire 1 E adder_flag $end +$var wire 32 F addsub [31:0] $end +$var wire 32 G andin [31:0] $end +$var wire 32 H b [31:0] $end +$var wire 32 I nandin [31:0] $end +$var wire 32 J norin [31:0] $end +$var wire 32 K orin [31:0] $end +$var wire 32 L slt [31:0] $end +$var wire 32 M xorin [31:0] $end +$var reg 1 N cout $end +$var reg 32 O finalsignal [31:0] $end +$var reg 1 P flag $end +$var reg 1 Q zeroflag $end +$scope module addsub0 $end +$var wire 1 R _ $end +$var wire 1 S _1 $end +$var wire 1 T _2 $end +$var wire 1 U _3 $end +$var wire 1 V _4 $end +$var wire 1 W _5 $end +$var wire 1 X _6 $end +$var wire 32 Y ans [31:0] $end +$var wire 1 D carryout $end +$var wire 3 Z command [2:0] $end +$var wire 1 [ cout0 $end +$var wire 1 \ cout1 $end +$var wire 1 ] cout2 $end +$var wire 1 ^ cout3 $end +$var wire 1 _ cout4 $end +$var wire 1 ` cout5 $end +$var wire 1 a cout6 $end +$var wire 32 b finalB [31:0] $end +$var wire 32 c invertedB [31:0] $end +$var wire 32 d opA [31:0] $end +$var wire 32 e opB [31:0] $end +$var wire 1 E overflow $end +$scope module addsubmux $end +$var wire 1 f address $end +$var wire 32 g in0 [31:0] $end +$var wire 1 h in00addr $end +$var wire 1 i in010addr $end +$var wire 1 j in011addr $end +$var wire 1 k in012addr $end +$var wire 1 l in013addr $end +$var wire 1 m in014addr $end +$var wire 1 n in015addr $end +$var wire 1 o in016addr $end +$var wire 1 p in017addr $end +$var wire 1 q in018addr $end +$var wire 1 r in019addr $end +$var wire 1 s in01addr $end +$var wire 1 t in020addr $end +$var wire 1 u in021addr $end +$var wire 1 v in022addr $end +$var wire 1 w in023addr $end +$var wire 1 x in024addr $end +$var wire 1 y in025addr $end +$var wire 1 z in026addr $end +$var wire 1 { in027addr $end +$var wire 1 | in028addr $end +$var wire 1 } in029addr $end +$var wire 1 ~ in02addr $end +$var wire 1 !" in030addr $end +$var wire 1 "" in031addr $end +$var wire 1 #" in03addr $end +$var wire 1 $" in04addr $end +$var wire 1 %" in05addr $end +$var wire 1 &" in06addr $end +$var wire 1 '" in07addr $end +$var wire 1 (" in08addr $end +$var wire 1 )" in09addr $end +$var wire 32 *" in1 [31:0] $end +$var wire 1 +" in10addr $end +$var wire 1 ," in110addr $end +$var wire 1 -" in111addr $end +$var wire 1 ." in112addr $end +$var wire 1 /" in113addr $end +$var wire 1 0" in114addr $end +$var wire 1 1" in115addr $end +$var wire 1 2" in116addr $end +$var wire 1 3" in117addr $end +$var wire 1 4" in118addr $end +$var wire 1 5" in119addr $end +$var wire 1 6" in11addr $end +$var wire 1 7" in120addr $end +$var wire 1 8" in121addr $end +$var wire 1 9" in122addr $end +$var wire 1 :" in123addr $end +$var wire 1 ;" in124addr $end +$var wire 1 <" in125addr $end +$var wire 1 =" in126addr $end +$var wire 1 >" in127addr $end +$var wire 1 ?" in128addr $end +$var wire 1 @" in129addr $end +$var wire 1 A" in12addr $end +$var wire 1 B" in130addr $end +$var wire 1 C" in131addr $end +$var wire 1 D" in13addr $end +$var wire 1 E" in14addr $end +$var wire 1 F" in15addr $end +$var wire 1 G" in16addr $end +$var wire 1 H" in17addr $end +$var wire 1 I" in18addr $end +$var wire 1 J" in19addr $end +$var wire 1 K" invaddr $end +$var wire 32 L" out [31:0] $end +$upscope $end +$scope module adder0 $end +$var wire 4 M" a [3:0] $end +$var wire 1 N" aandb $end +$var wire 1 O" abandnoror $end +$var wire 1 P" anorb $end +$var wire 4 Q" b [3:0] $end +$var wire 1 R" bandsum $end +$var wire 1 S" bnorsum $end +$var wire 1 T" bsumandnornor $end +$var wire 1 U" carryin $end +$var wire 1 [ carryout $end +$var wire 1 V" carryout1 $end +$var wire 1 W" carryout2 $end +$var wire 1 X" carryout3 $end +$var wire 1 R overflow $end +$var wire 4 Y" sum [3:0] $end +$scope module adder1 $end +$var wire 1 Z" a $end +$var wire 1 [" ab $end +$var wire 1 \" acarryin $end +$var wire 1 ]" andall $end +$var wire 1 ^" andsingleintermediate $end +$var wire 1 _" andsumintermediate $end +$var wire 1 `" b $end +$var wire 1 a" bcarryin $end +$var wire 1 U" carryin $end +$var wire 1 V" carryout $end +$var wire 1 b" invcarryout $end +$var wire 1 c" orall $end +$var wire 1 d" orpairintermediate $end +$var wire 1 e" orsingleintermediate $end +$var wire 1 f" sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 g" a $end +$var wire 1 h" ab $end +$var wire 1 i" acarryin $end +$var wire 1 j" andall $end +$var wire 1 k" andsingleintermediate $end +$var wire 1 l" andsumintermediate $end +$var wire 1 m" b $end +$var wire 1 n" bcarryin $end +$var wire 1 V" carryin $end +$var wire 1 W" carryout $end +$var wire 1 o" invcarryout $end +$var wire 1 p" orall $end +$var wire 1 q" orpairintermediate $end +$var wire 1 r" orsingleintermediate $end +$var wire 1 s" sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 t" a $end +$var wire 1 u" ab $end +$var wire 1 v" acarryin $end +$var wire 1 w" andall $end +$var wire 1 x" andsingleintermediate $end +$var wire 1 y" andsumintermediate $end +$var wire 1 z" b $end +$var wire 1 {" bcarryin $end +$var wire 1 W" carryin $end +$var wire 1 X" carryout $end +$var wire 1 |" invcarryout $end +$var wire 1 }" orall $end +$var wire 1 ~" orpairintermediate $end +$var wire 1 !# orsingleintermediate $end +$var wire 1 "# sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 ## a $end +$var wire 1 $# ab $end +$var wire 1 %# acarryin $end +$var wire 1 &# andall $end +$var wire 1 '# andsingleintermediate $end +$var wire 1 (# andsumintermediate $end +$var wire 1 )# b $end +$var wire 1 *# bcarryin $end +$var wire 1 X" carryin $end +$var wire 1 [ carryout $end +$var wire 1 +# invcarryout $end +$var wire 1 ,# orall $end +$var wire 1 -# orpairintermediate $end +$var wire 1 .# orsingleintermediate $end +$var wire 1 /# sum $end +$upscope $end +$upscope $end +$scope module adder1 $end +$var wire 4 0# a [3:0] $end +$var wire 1 1# aandb $end +$var wire 1 2# abandnoror $end +$var wire 1 3# anorb $end +$var wire 4 4# b [3:0] $end +$var wire 1 5# bandsum $end +$var wire 1 6# bnorsum $end +$var wire 1 7# bsumandnornor $end +$var wire 1 [ carryin $end +$var wire 1 \ carryout $end +$var wire 1 8# carryout1 $end +$var wire 1 9# carryout2 $end +$var wire 1 :# carryout3 $end +$var wire 1 S overflow $end +$var wire 4 ;# sum [3:0] $end +$scope module adder1 $end +$var wire 1 <# a $end +$var wire 1 =# ab $end +$var wire 1 ># acarryin $end +$var wire 1 ?# andall $end +$var wire 1 @# andsingleintermediate $end +$var wire 1 A# andsumintermediate $end +$var wire 1 B# b $end +$var wire 1 C# bcarryin $end +$var wire 1 [ carryin $end +$var wire 1 8# carryout $end +$var wire 1 D# invcarryout $end +$var wire 1 E# orall $end +$var wire 1 F# orpairintermediate $end +$var wire 1 G# orsingleintermediate $end +$var wire 1 H# sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 I# a $end +$var wire 1 J# ab $end +$var wire 1 K# acarryin $end +$var wire 1 L# andall $end +$var wire 1 M# andsingleintermediate $end +$var wire 1 N# andsumintermediate $end +$var wire 1 O# b $end +$var wire 1 P# bcarryin $end +$var wire 1 8# carryin $end +$var wire 1 9# carryout $end +$var wire 1 Q# invcarryout $end +$var wire 1 R# orall $end +$var wire 1 S# orpairintermediate $end +$var wire 1 T# orsingleintermediate $end +$var wire 1 U# sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 V# a $end +$var wire 1 W# ab $end +$var wire 1 X# acarryin $end +$var wire 1 Y# andall $end +$var wire 1 Z# andsingleintermediate $end +$var wire 1 [# andsumintermediate $end +$var wire 1 \# b $end +$var wire 1 ]# bcarryin $end +$var wire 1 9# carryin $end +$var wire 1 :# carryout $end +$var wire 1 ^# invcarryout $end +$var wire 1 _# orall $end +$var wire 1 `# orpairintermediate $end +$var wire 1 a# orsingleintermediate $end +$var wire 1 b# sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 c# a $end +$var wire 1 d# ab $end +$var wire 1 e# acarryin $end +$var wire 1 f# andall $end +$var wire 1 g# andsingleintermediate $end +$var wire 1 h# andsumintermediate $end +$var wire 1 i# b $end +$var wire 1 j# bcarryin $end +$var wire 1 :# carryin $end +$var wire 1 \ carryout $end +$var wire 1 k# invcarryout $end +$var wire 1 l# orall $end +$var wire 1 m# orpairintermediate $end +$var wire 1 n# orsingleintermediate $end +$var wire 1 o# sum $end +$upscope $end +$upscope $end +$scope module adder2 $end +$var wire 4 p# a [3:0] $end +$var wire 1 q# aandb $end +$var wire 1 r# abandnoror $end +$var wire 1 s# anorb $end +$var wire 4 t# b [3:0] $end +$var wire 1 u# bandsum $end +$var wire 1 v# bnorsum $end +$var wire 1 w# bsumandnornor $end +$var wire 1 \ carryin $end +$var wire 1 ] carryout $end +$var wire 1 x# carryout1 $end +$var wire 1 y# carryout2 $end +$var wire 1 z# carryout3 $end +$var wire 1 T overflow $end +$var wire 4 {# sum [3:0] $end +$scope module adder1 $end +$var wire 1 |# a $end +$var wire 1 }# ab $end +$var wire 1 ~# acarryin $end +$var wire 1 !$ andall $end +$var wire 1 "$ andsingleintermediate $end +$var wire 1 #$ andsumintermediate $end +$var wire 1 $$ b $end +$var wire 1 %$ bcarryin $end +$var wire 1 \ carryin $end +$var wire 1 x# carryout $end +$var wire 1 &$ invcarryout $end +$var wire 1 '$ orall $end +$var wire 1 ($ orpairintermediate $end +$var wire 1 )$ orsingleintermediate $end +$var wire 1 *$ sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 +$ a $end +$var wire 1 ,$ ab $end +$var wire 1 -$ acarryin $end +$var wire 1 .$ andall $end +$var wire 1 /$ andsingleintermediate $end +$var wire 1 0$ andsumintermediate $end +$var wire 1 1$ b $end +$var wire 1 2$ bcarryin $end +$var wire 1 x# carryin $end +$var wire 1 y# carryout $end +$var wire 1 3$ invcarryout $end +$var wire 1 4$ orall $end +$var wire 1 5$ orpairintermediate $end +$var wire 1 6$ orsingleintermediate $end +$var wire 1 7$ sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 8$ a $end +$var wire 1 9$ ab $end +$var wire 1 :$ acarryin $end +$var wire 1 ;$ andall $end +$var wire 1 <$ andsingleintermediate $end +$var wire 1 =$ andsumintermediate $end +$var wire 1 >$ b $end +$var wire 1 ?$ bcarryin $end +$var wire 1 y# carryin $end +$var wire 1 z# carryout $end +$var wire 1 @$ invcarryout $end +$var wire 1 A$ orall $end +$var wire 1 B$ orpairintermediate $end +$var wire 1 C$ orsingleintermediate $end +$var wire 1 D$ sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 E$ a $end +$var wire 1 F$ ab $end +$var wire 1 G$ acarryin $end +$var wire 1 H$ andall $end +$var wire 1 I$ andsingleintermediate $end +$var wire 1 J$ andsumintermediate $end +$var wire 1 K$ b $end +$var wire 1 L$ bcarryin $end +$var wire 1 z# carryin $end +$var wire 1 ] carryout $end +$var wire 1 M$ invcarryout $end +$var wire 1 N$ orall $end +$var wire 1 O$ orpairintermediate $end +$var wire 1 P$ orsingleintermediate $end +$var wire 1 Q$ sum $end +$upscope $end +$upscope $end +$scope module adder3 $end +$var wire 4 R$ a [3:0] $end +$var wire 1 S$ aandb $end +$var wire 1 T$ abandnoror $end +$var wire 1 U$ anorb $end +$var wire 4 V$ b [3:0] $end +$var wire 1 W$ bandsum $end +$var wire 1 X$ bnorsum $end +$var wire 1 Y$ bsumandnornor $end +$var wire 1 ] carryin $end +$var wire 1 ^ carryout $end +$var wire 1 Z$ carryout1 $end +$var wire 1 [$ carryout2 $end +$var wire 1 \$ carryout3 $end +$var wire 1 U overflow $end +$var wire 4 ]$ sum [3:0] $end +$scope module adder1 $end +$var wire 1 ^$ a $end +$var wire 1 _$ ab $end +$var wire 1 `$ acarryin $end +$var wire 1 a$ andall $end +$var wire 1 b$ andsingleintermediate $end +$var wire 1 c$ andsumintermediate $end +$var wire 1 d$ b $end +$var wire 1 e$ bcarryin $end +$var wire 1 ] carryin $end +$var wire 1 Z$ carryout $end +$var wire 1 f$ invcarryout $end +$var wire 1 g$ orall $end +$var wire 1 h$ orpairintermediate $end +$var wire 1 i$ orsingleintermediate $end +$var wire 1 j$ sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 k$ a $end +$var wire 1 l$ ab $end +$var wire 1 m$ acarryin $end +$var wire 1 n$ andall $end +$var wire 1 o$ andsingleintermediate $end +$var wire 1 p$ andsumintermediate $end +$var wire 1 q$ b $end +$var wire 1 r$ bcarryin $end +$var wire 1 Z$ carryin $end +$var wire 1 [$ carryout $end +$var wire 1 s$ invcarryout $end +$var wire 1 t$ orall $end +$var wire 1 u$ orpairintermediate $end +$var wire 1 v$ orsingleintermediate $end +$var wire 1 w$ sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 x$ a $end +$var wire 1 y$ ab $end +$var wire 1 z$ acarryin $end +$var wire 1 {$ andall $end +$var wire 1 |$ andsingleintermediate $end +$var wire 1 }$ andsumintermediate $end +$var wire 1 ~$ b $end +$var wire 1 !% bcarryin $end +$var wire 1 [$ carryin $end +$var wire 1 \$ carryout $end +$var wire 1 "% invcarryout $end +$var wire 1 #% orall $end +$var wire 1 $% orpairintermediate $end +$var wire 1 %% orsingleintermediate $end +$var wire 1 &% sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 '% a $end +$var wire 1 (% ab $end +$var wire 1 )% acarryin $end +$var wire 1 *% andall $end +$var wire 1 +% andsingleintermediate $end +$var wire 1 ,% andsumintermediate $end +$var wire 1 -% b $end +$var wire 1 .% bcarryin $end +$var wire 1 \$ carryin $end +$var wire 1 ^ carryout $end +$var wire 1 /% invcarryout $end +$var wire 1 0% orall $end +$var wire 1 1% orpairintermediate $end +$var wire 1 2% orsingleintermediate $end +$var wire 1 3% sum $end +$upscope $end +$upscope $end +$scope module adder4 $end +$var wire 4 4% a [3:0] $end +$var wire 1 5% aandb $end +$var wire 1 6% abandnoror $end +$var wire 1 7% anorb $end +$var wire 4 8% b [3:0] $end +$var wire 1 9% bandsum $end +$var wire 1 :% bnorsum $end +$var wire 1 ;% bsumandnornor $end +$var wire 1 ^ carryin $end +$var wire 1 _ carryout $end +$var wire 1 <% carryout1 $end +$var wire 1 =% carryout2 $end +$var wire 1 >% carryout3 $end +$var wire 1 V overflow $end +$var wire 4 ?% sum [3:0] $end +$scope module adder1 $end +$var wire 1 @% a $end +$var wire 1 A% ab $end +$var wire 1 B% acarryin $end +$var wire 1 C% andall $end +$var wire 1 D% andsingleintermediate $end +$var wire 1 E% andsumintermediate $end +$var wire 1 F% b $end +$var wire 1 G% bcarryin $end +$var wire 1 ^ carryin $end +$var wire 1 <% carryout $end +$var wire 1 H% invcarryout $end +$var wire 1 I% orall $end +$var wire 1 J% orpairintermediate $end +$var wire 1 K% orsingleintermediate $end +$var wire 1 L% sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 M% a $end +$var wire 1 N% ab $end +$var wire 1 O% acarryin $end +$var wire 1 P% andall $end +$var wire 1 Q% andsingleintermediate $end +$var wire 1 R% andsumintermediate $end +$var wire 1 S% b $end +$var wire 1 T% bcarryin $end +$var wire 1 <% carryin $end +$var wire 1 =% carryout $end +$var wire 1 U% invcarryout $end +$var wire 1 V% orall $end +$var wire 1 W% orpairintermediate $end +$var wire 1 X% orsingleintermediate $end +$var wire 1 Y% sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 Z% a $end +$var wire 1 [% ab $end +$var wire 1 \% acarryin $end +$var wire 1 ]% andall $end +$var wire 1 ^% andsingleintermediate $end +$var wire 1 _% andsumintermediate $end +$var wire 1 `% b $end +$var wire 1 a% bcarryin $end +$var wire 1 =% carryin $end +$var wire 1 >% carryout $end +$var wire 1 b% invcarryout $end +$var wire 1 c% orall $end +$var wire 1 d% orpairintermediate $end +$var wire 1 e% orsingleintermediate $end +$var wire 1 f% sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 g% a $end +$var wire 1 h% ab $end +$var wire 1 i% acarryin $end +$var wire 1 j% andall $end +$var wire 1 k% andsingleintermediate $end +$var wire 1 l% andsumintermediate $end +$var wire 1 m% b $end +$var wire 1 n% bcarryin $end +$var wire 1 >% carryin $end +$var wire 1 _ carryout $end +$var wire 1 o% invcarryout $end +$var wire 1 p% orall $end +$var wire 1 q% orpairintermediate $end +$var wire 1 r% orsingleintermediate $end +$var wire 1 s% sum $end +$upscope $end +$upscope $end +$scope module adder5 $end +$var wire 4 t% a [3:0] $end +$var wire 1 u% aandb $end +$var wire 1 v% abandnoror $end +$var wire 1 w% anorb $end +$var wire 4 x% b [3:0] $end +$var wire 1 y% bandsum $end +$var wire 1 z% bnorsum $end +$var wire 1 {% bsumandnornor $end +$var wire 1 _ carryin $end +$var wire 1 ` carryout $end +$var wire 1 |% carryout1 $end +$var wire 1 }% carryout2 $end +$var wire 1 ~% carryout3 $end +$var wire 1 W overflow $end +$var wire 4 !& sum [3:0] $end +$scope module adder1 $end +$var wire 1 "& a $end +$var wire 1 #& ab $end +$var wire 1 $& acarryin $end +$var wire 1 %& andall $end +$var wire 1 && andsingleintermediate $end +$var wire 1 '& andsumintermediate $end +$var wire 1 (& b $end +$var wire 1 )& bcarryin $end +$var wire 1 _ carryin $end +$var wire 1 |% carryout $end +$var wire 1 *& invcarryout $end +$var wire 1 +& orall $end +$var wire 1 ,& orpairintermediate $end +$var wire 1 -& orsingleintermediate $end +$var wire 1 .& sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 /& a $end +$var wire 1 0& ab $end +$var wire 1 1& acarryin $end +$var wire 1 2& andall $end +$var wire 1 3& andsingleintermediate $end +$var wire 1 4& andsumintermediate $end +$var wire 1 5& b $end +$var wire 1 6& bcarryin $end +$var wire 1 |% carryin $end +$var wire 1 }% carryout $end +$var wire 1 7& invcarryout $end +$var wire 1 8& orall $end +$var wire 1 9& orpairintermediate $end +$var wire 1 :& orsingleintermediate $end +$var wire 1 ;& sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 <& a $end +$var wire 1 =& ab $end +$var wire 1 >& acarryin $end +$var wire 1 ?& andall $end +$var wire 1 @& andsingleintermediate $end +$var wire 1 A& andsumintermediate $end +$var wire 1 B& b $end +$var wire 1 C& bcarryin $end +$var wire 1 }% carryin $end +$var wire 1 ~% carryout $end +$var wire 1 D& invcarryout $end +$var wire 1 E& orall $end +$var wire 1 F& orpairintermediate $end +$var wire 1 G& orsingleintermediate $end +$var wire 1 H& sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 I& a $end +$var wire 1 J& ab $end +$var wire 1 K& acarryin $end +$var wire 1 L& andall $end +$var wire 1 M& andsingleintermediate $end +$var wire 1 N& andsumintermediate $end +$var wire 1 O& b $end +$var wire 1 P& bcarryin $end +$var wire 1 ~% carryin $end +$var wire 1 ` carryout $end +$var wire 1 Q& invcarryout $end +$var wire 1 R& orall $end +$var wire 1 S& orpairintermediate $end +$var wire 1 T& orsingleintermediate $end +$var wire 1 U& sum $end +$upscope $end +$upscope $end +$scope module adder6 $end +$var wire 4 V& a [3:0] $end +$var wire 1 W& aandb $end +$var wire 1 X& abandnoror $end +$var wire 1 Y& anorb $end +$var wire 4 Z& b [3:0] $end +$var wire 1 [& bandsum $end +$var wire 1 \& bnorsum $end +$var wire 1 ]& bsumandnornor $end +$var wire 1 ` carryin $end +$var wire 1 a carryout $end +$var wire 1 ^& carryout1 $end +$var wire 1 _& carryout2 $end +$var wire 1 `& carryout3 $end +$var wire 1 X overflow $end +$var wire 4 a& sum [3:0] $end +$scope module adder1 $end +$var wire 1 b& a $end +$var wire 1 c& ab $end +$var wire 1 d& acarryin $end +$var wire 1 e& andall $end +$var wire 1 f& andsingleintermediate $end +$var wire 1 g& andsumintermediate $end +$var wire 1 h& b $end +$var wire 1 i& bcarryin $end +$var wire 1 ` carryin $end +$var wire 1 ^& carryout $end +$var wire 1 j& invcarryout $end +$var wire 1 k& orall $end +$var wire 1 l& orpairintermediate $end +$var wire 1 m& orsingleintermediate $end +$var wire 1 n& sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 o& a $end +$var wire 1 p& ab $end +$var wire 1 q& acarryin $end +$var wire 1 r& andall $end +$var wire 1 s& andsingleintermediate $end +$var wire 1 t& andsumintermediate $end +$var wire 1 u& b $end +$var wire 1 v& bcarryin $end +$var wire 1 ^& carryin $end +$var wire 1 _& carryout $end +$var wire 1 w& invcarryout $end +$var wire 1 x& orall $end +$var wire 1 y& orpairintermediate $end +$var wire 1 z& orsingleintermediate $end +$var wire 1 {& sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 |& a $end +$var wire 1 }& ab $end +$var wire 1 ~& acarryin $end +$var wire 1 !' andall $end +$var wire 1 "' andsingleintermediate $end +$var wire 1 #' andsumintermediate $end +$var wire 1 $' b $end +$var wire 1 %' bcarryin $end +$var wire 1 _& carryin $end +$var wire 1 `& carryout $end +$var wire 1 &' invcarryout $end +$var wire 1 '' orall $end +$var wire 1 (' orpairintermediate $end +$var wire 1 )' orsingleintermediate $end +$var wire 1 *' sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 +' a $end +$var wire 1 ,' ab $end +$var wire 1 -' acarryin $end +$var wire 1 .' andall $end +$var wire 1 /' andsingleintermediate $end +$var wire 1 0' andsumintermediate $end +$var wire 1 1' b $end +$var wire 1 2' bcarryin $end +$var wire 1 `& carryin $end +$var wire 1 a carryout $end +$var wire 1 3' invcarryout $end +$var wire 1 4' orall $end +$var wire 1 5' orpairintermediate $end +$var wire 1 6' orsingleintermediate $end +$var wire 1 7' sum $end +$upscope $end +$upscope $end +$scope module adder7 $end +$var wire 4 8' a [3:0] $end +$var wire 1 9' aandb $end +$var wire 1 :' abandnoror $end +$var wire 1 ;' anorb $end +$var wire 4 <' b [3:0] $end +$var wire 1 =' bandsum $end +$var wire 1 >' bnorsum $end +$var wire 1 ?' bsumandnornor $end +$var wire 1 a carryin $end +$var wire 1 D carryout $end +$var wire 1 @' carryout1 $end +$var wire 1 A' carryout2 $end +$var wire 1 B' carryout3 $end +$var wire 1 E overflow $end +$var wire 4 C' sum [3:0] $end +$scope module adder1 $end +$var wire 1 D' a $end +$var wire 1 E' ab $end +$var wire 1 F' acarryin $end +$var wire 1 G' andall $end +$var wire 1 H' andsingleintermediate $end +$var wire 1 I' andsumintermediate $end +$var wire 1 J' b $end +$var wire 1 K' bcarryin $end +$var wire 1 a carryin $end +$var wire 1 @' carryout $end +$var wire 1 L' invcarryout $end +$var wire 1 M' orall $end +$var wire 1 N' orpairintermediate $end +$var wire 1 O' orsingleintermediate $end +$var wire 1 P' sum $end +$upscope $end +$scope module adder2 $end +$var wire 1 Q' a $end +$var wire 1 R' ab $end +$var wire 1 S' acarryin $end +$var wire 1 T' andall $end +$var wire 1 U' andsingleintermediate $end +$var wire 1 V' andsumintermediate $end +$var wire 1 W' b $end +$var wire 1 X' bcarryin $end +$var wire 1 @' carryin $end +$var wire 1 A' carryout $end +$var wire 1 Y' invcarryout $end +$var wire 1 Z' orall $end +$var wire 1 [' orpairintermediate $end +$var wire 1 \' orsingleintermediate $end +$var wire 1 ]' sum $end +$upscope $end +$scope module adder3 $end +$var wire 1 ^' a $end +$var wire 1 _' ab $end +$var wire 1 `' acarryin $end +$var wire 1 a' andall $end +$var wire 1 b' andsingleintermediate $end +$var wire 1 c' andsumintermediate $end +$var wire 1 d' b $end +$var wire 1 e' bcarryin $end +$var wire 1 A' carryin $end +$var wire 1 B' carryout $end +$var wire 1 f' invcarryout $end +$var wire 1 g' orall $end +$var wire 1 h' orpairintermediate $end +$var wire 1 i' orsingleintermediate $end +$var wire 1 j' sum $end +$upscope $end +$scope module adder4 $end +$var wire 1 k' a $end +$var wire 1 l' ab $end +$var wire 1 m' acarryin $end +$var wire 1 n' andall $end +$var wire 1 o' andsingleintermediate $end +$var wire 1 p' andsumintermediate $end +$var wire 1 q' b $end +$var wire 1 r' bcarryin $end +$var wire 1 B' carryin $end +$var wire 1 D carryout $end +$var wire 1 s' invcarryout $end +$var wire 1 t' orall $end +$var wire 1 u' orpairintermediate $end +$var wire 1 v' orsingleintermediate $end +$var wire 1 w' sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module xor0 $end +$var wire 32 x' a [31:0] $end +$var wire 32 y' b [31:0] $end +$var wire 32 z' out [31:0] $end +$upscope $end +$scope module slt0 $end +$var wire 32 {' a [31:0] $end +$var wire 32 |' b [31:0] $end +$var wire 32 }' out [31:0] $end +$var wire 1 ~' slt0 $end +$var wire 1 !( slt1 $end +$var wire 1 "( slt10 $end +$var wire 1 #( slt11 $end +$var wire 1 $( slt12 $end +$var wire 1 %( slt13 $end +$var wire 1 &( slt14 $end +$var wire 1 '( slt15 $end +$var wire 1 (( slt16 $end +$var wire 1 )( slt17 $end +$var wire 1 *( slt18 $end +$var wire 1 +( slt19 $end +$var wire 1 ,( slt2 $end +$var wire 1 -( slt20 $end +$var wire 1 .( slt21 $end +$var wire 1 /( slt22 $end +$var wire 1 0( slt23 $end +$var wire 1 1( slt24 $end +$var wire 1 2( slt25 $end +$var wire 1 3( slt26 $end +$var wire 1 4( slt27 $end +$var wire 1 5( slt28 $end +$var wire 1 6( slt29 $end +$var wire 1 7( slt3 $end +$var wire 1 8( slt30 $end +$var wire 1 9( slt4 $end +$var wire 1 :( slt5 $end +$var wire 1 ;( slt6 $end +$var wire 1 <( slt7 $end +$var wire 1 =( slt8 $end +$var wire 1 >( slt9 $end +$scope module bit0 $end +$var wire 1 ?( a $end +$var wire 1 @( abxor $end +$var wire 1 A( b $end +$var wire 1 B( bxorand $end +$var wire 1 C( defaultCompare $end +$var wire 1 ~' out $end +$var wire 1 D( xornot $end +$var wire 1 E( xornotand $end +$upscope $end +$scope module bit1 $end +$var wire 1 F( a $end +$var wire 1 G( abxor $end +$var wire 1 H( b $end +$var wire 1 I( bxorand $end +$var wire 1 ~' defaultCompare $end +$var wire 1 !( out $end +$var wire 1 J( xornot $end +$var wire 1 K( xornotand $end +$upscope $end +$scope module bit2 $end +$var wire 1 L( a $end +$var wire 1 M( abxor $end +$var wire 1 N( b $end +$var wire 1 O( bxorand $end +$var wire 1 !( defaultCompare $end +$var wire 1 ,( out $end +$var wire 1 P( xornot $end +$var wire 1 Q( xornotand $end +$upscope $end +$scope module bit3 $end +$var wire 1 R( a $end +$var wire 1 S( abxor $end +$var wire 1 T( b $end +$var wire 1 U( bxorand $end +$var wire 1 ,( defaultCompare $end +$var wire 1 7( out $end +$var wire 1 V( xornot $end +$var wire 1 W( xornotand $end +$upscope $end +$scope module bit4 $end +$var wire 1 X( a $end +$var wire 1 Y( abxor $end +$var wire 1 Z( b $end +$var wire 1 [( bxorand $end +$var wire 1 7( defaultCompare $end +$var wire 1 9( out $end +$var wire 1 \( xornot $end +$var wire 1 ]( xornotand $end +$upscope $end +$scope module bit5 $end +$var wire 1 ^( a $end +$var wire 1 _( abxor $end +$var wire 1 `( b $end +$var wire 1 a( bxorand $end +$var wire 1 9( defaultCompare $end +$var wire 1 :( out $end +$var wire 1 b( xornot $end +$var wire 1 c( xornotand $end +$upscope $end +$scope module bit6 $end +$var wire 1 d( a $end +$var wire 1 e( abxor $end +$var wire 1 f( b $end +$var wire 1 g( bxorand $end +$var wire 1 :( defaultCompare $end +$var wire 1 ;( out $end +$var wire 1 h( xornot $end +$var wire 1 i( xornotand $end +$upscope $end +$scope module bit7 $end +$var wire 1 j( a $end +$var wire 1 k( abxor $end +$var wire 1 l( b $end +$var wire 1 m( bxorand $end +$var wire 1 ;( defaultCompare $end +$var wire 1 <( out $end +$var wire 1 n( xornot $end +$var wire 1 o( xornotand $end +$upscope $end +$scope module bit8 $end +$var wire 1 p( a $end +$var wire 1 q( abxor $end +$var wire 1 r( b $end +$var wire 1 s( bxorand $end +$var wire 1 <( defaultCompare $end +$var wire 1 =( out $end +$var wire 1 t( xornot $end +$var wire 1 u( xornotand $end +$upscope $end +$scope module bit9 $end +$var wire 1 v( a $end +$var wire 1 w( abxor $end +$var wire 1 x( b $end +$var wire 1 y( bxorand $end +$var wire 1 =( defaultCompare $end +$var wire 1 >( out $end +$var wire 1 z( xornot $end +$var wire 1 {( xornotand $end +$upscope $end +$scope module bit10 $end +$var wire 1 |( a $end +$var wire 1 }( abxor $end +$var wire 1 ~( b $end +$var wire 1 !) bxorand $end +$var wire 1 >( defaultCompare $end +$var wire 1 "( out $end +$var wire 1 ") xornot $end +$var wire 1 #) xornotand $end +$upscope $end +$scope module bit11 $end +$var wire 1 $) a $end +$var wire 1 %) abxor $end +$var wire 1 &) b $end +$var wire 1 ') bxorand $end +$var wire 1 "( defaultCompare $end +$var wire 1 #( out $end +$var wire 1 () xornot $end +$var wire 1 )) xornotand $end +$upscope $end +$scope module bit12 $end +$var wire 1 *) a $end +$var wire 1 +) abxor $end +$var wire 1 ,) b $end +$var wire 1 -) bxorand $end +$var wire 1 #( defaultCompare $end +$var wire 1 $( out $end +$var wire 1 .) xornot $end +$var wire 1 /) xornotand $end +$upscope $end +$scope module bit13 $end +$var wire 1 0) a $end +$var wire 1 1) abxor $end +$var wire 1 2) b $end +$var wire 1 3) bxorand $end +$var wire 1 $( defaultCompare $end +$var wire 1 %( out $end +$var wire 1 4) xornot $end +$var wire 1 5) xornotand $end +$upscope $end +$scope module bit14 $end +$var wire 1 6) a $end +$var wire 1 7) abxor $end +$var wire 1 8) b $end +$var wire 1 9) bxorand $end +$var wire 1 %( defaultCompare $end +$var wire 1 &( out $end +$var wire 1 :) xornot $end +$var wire 1 ;) xornotand $end +$upscope $end +$scope module bit15 $end +$var wire 1 <) a $end +$var wire 1 =) abxor $end +$var wire 1 >) b $end +$var wire 1 ?) bxorand $end +$var wire 1 &( defaultCompare $end +$var wire 1 '( out $end +$var wire 1 @) xornot $end +$var wire 1 A) xornotand $end +$upscope $end +$scope module bit16 $end +$var wire 1 B) a $end +$var wire 1 C) abxor $end +$var wire 1 D) b $end +$var wire 1 E) bxorand $end +$var wire 1 '( defaultCompare $end +$var wire 1 (( out $end +$var wire 1 F) xornot $end +$var wire 1 G) xornotand $end +$upscope $end +$scope module bit17 $end +$var wire 1 H) a $end +$var wire 1 I) abxor $end +$var wire 1 J) b $end +$var wire 1 K) bxorand $end +$var wire 1 (( defaultCompare $end +$var wire 1 )( out $end +$var wire 1 L) xornot $end +$var wire 1 M) xornotand $end +$upscope $end +$scope module bit18 $end +$var wire 1 N) a $end +$var wire 1 O) abxor $end +$var wire 1 P) b $end +$var wire 1 Q) bxorand $end +$var wire 1 )( defaultCompare $end +$var wire 1 *( out $end +$var wire 1 R) xornot $end +$var wire 1 S) xornotand $end +$upscope $end +$scope module bit19 $end +$var wire 1 T) a $end +$var wire 1 U) abxor $end +$var wire 1 V) b $end +$var wire 1 W) bxorand $end +$var wire 1 *( defaultCompare $end +$var wire 1 +( out $end +$var wire 1 X) xornot $end +$var wire 1 Y) xornotand $end +$upscope $end +$scope module bit20 $end +$var wire 1 Z) a $end +$var wire 1 [) abxor $end +$var wire 1 \) b $end +$var wire 1 ]) bxorand $end +$var wire 1 +( defaultCompare $end +$var wire 1 -( out $end +$var wire 1 ^) xornot $end +$var wire 1 _) xornotand $end +$upscope $end +$scope module bit21 $end +$var wire 1 `) a $end +$var wire 1 a) abxor $end +$var wire 1 b) b $end +$var wire 1 c) bxorand $end +$var wire 1 -( defaultCompare $end +$var wire 1 .( out $end +$var wire 1 d) xornot $end +$var wire 1 e) xornotand $end +$upscope $end +$scope module bit22 $end +$var wire 1 f) a $end +$var wire 1 g) abxor $end +$var wire 1 h) b $end +$var wire 1 i) bxorand $end +$var wire 1 .( defaultCompare $end +$var wire 1 /( out $end +$var wire 1 j) xornot $end +$var wire 1 k) xornotand $end +$upscope $end +$scope module bit23 $end +$var wire 1 l) a $end +$var wire 1 m) abxor $end +$var wire 1 n) b $end +$var wire 1 o) bxorand $end +$var wire 1 /( defaultCompare $end +$var wire 1 0( out $end +$var wire 1 p) xornot $end +$var wire 1 q) xornotand $end +$upscope $end +$scope module bit24 $end +$var wire 1 r) a $end +$var wire 1 s) abxor $end +$var wire 1 t) b $end +$var wire 1 u) bxorand $end +$var wire 1 0( defaultCompare $end +$var wire 1 1( out $end +$var wire 1 v) xornot $end +$var wire 1 w) xornotand $end +$upscope $end +$scope module bit25 $end +$var wire 1 x) a $end +$var wire 1 y) abxor $end +$var wire 1 z) b $end +$var wire 1 {) bxorand $end +$var wire 1 1( defaultCompare $end +$var wire 1 2( out $end +$var wire 1 |) xornot $end +$var wire 1 }) xornotand $end +$upscope $end +$scope module bit26 $end +$var wire 1 ~) a $end +$var wire 1 !* abxor $end +$var wire 1 "* b $end +$var wire 1 #* bxorand $end +$var wire 1 2( defaultCompare $end +$var wire 1 3( out $end +$var wire 1 $* xornot $end +$var wire 1 %* xornotand $end +$upscope $end +$scope module bit27 $end +$var wire 1 &* a $end +$var wire 1 '* abxor $end +$var wire 1 (* b $end +$var wire 1 )* bxorand $end +$var wire 1 3( defaultCompare $end +$var wire 1 4( out $end +$var wire 1 ** xornot $end +$var wire 1 +* xornotand $end +$upscope $end +$scope module bit28 $end +$var wire 1 ,* a $end +$var wire 1 -* abxor $end +$var wire 1 .* b $end +$var wire 1 /* bxorand $end +$var wire 1 4( defaultCompare $end +$var wire 1 5( out $end +$var wire 1 0* xornot $end +$var wire 1 1* xornotand $end +$upscope $end +$scope module bit29 $end +$var wire 1 2* a $end +$var wire 1 3* abxor $end +$var wire 1 4* b $end +$var wire 1 5* bxorand $end +$var wire 1 5( defaultCompare $end +$var wire 1 6( out $end +$var wire 1 6* xornot $end +$var wire 1 7* xornotand $end +$upscope $end +$scope module bit30 $end +$var wire 1 8* a $end +$var wire 1 9* abxor $end +$var wire 1 :* b $end +$var wire 1 ;* bxorand $end +$var wire 1 6( defaultCompare $end +$var wire 1 8( out $end +$var wire 1 <* xornot $end +$var wire 1 =* xornotand $end +$upscope $end +$scope module bit31 $end +$var wire 1 >* a $end +$var wire 1 ?* abxor $end +$var wire 1 @* axorand $end +$var wire 1 A* b $end +$var wire 1 8( defaultCompare $end +$var wire 1 B* out $end +$var wire 1 C* xornot $end +$var wire 1 D* xornotand $end +$upscope $end +$upscope $end +$scope module and0 $end +$var wire 32 E* a [31:0] $end +$var wire 32 F* b [31:0] $end +$var wire 32 G* out [31:0] $end +$upscope $end +$scope module nand0 $end +$var wire 32 H* a [31:0] $end +$var wire 32 I* b [31:0] $end +$var wire 32 J* out [31:0] $end +$upscope $end +$scope module nor0 $end +$var wire 32 K* a [31:0] $end +$var wire 32 L* b [31:0] $end +$var wire 32 M* out [31:0] $end +$upscope $end +$scope module or0 $end +$var wire 32 N* a [31:0] $end +$var wire 32 O* b [31:0] $end +$var wire 32 P* out [31:0] $end +$upscope $end +$upscope $end +$upscope $end +$scope task checkResult $end +$var reg 1 Q* carryout $end +$var reg 1 R* exp_carryout $end +$var reg 1 S* exp_overflow $end +$var reg 32 T* exp_result [31:0] $end +$var reg 1 U* exp_zero $end +$var reg 1 V* overflow $end +$var reg 32 W* result [31:0] $end +$var reg 1 X* zero $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +xX* +bx W* +xV* +xU* +bx T* +xS* +xR* +xQ* +b1111110100 P* +b1001100100 O* +b111110100 N* +b11111111111111111111110000001011 M* +b1001100100 L* +b111110100 K* +b11111111111111111111111110011011 J* +b1001100100 I* +b111110100 H* +b1100100 G* +b1001100100 F* +b111110100 E* +1D* +1C* +1B* +0A* +0@* +0?* +0>* +1=* +1<* +0;* +0:* +09* +08* +17* +16* +05* +04* +03* +02* +11* +10* +0/* +0.* +0-* +0,* +1+* +1** +0)* +0(* +0'* +0&* +1%* +1$* +0#* +0"* +0!* +0~) +1}) +1|) +0{) +0z) +0y) +0x) +1w) +1v) +0u) +0t) +0s) +0r) +1q) +1p) +0o) +0n) +0m) +0l) +1k) +1j) +0i) +0h) +0g) +0f) +1e) +1d) +0c) +0b) +0a) +0`) +1_) +1^) +0]) +0\) +0[) +0Z) +1Y) +1X) +0W) +0V) +0U) +0T) +1S) +1R) +0Q) +0P) +0O) +0N) +1M) +1L) +0K) +0J) +0I) +0H) +1G) +1F) +0E) +0D) +0C) +0B) +1A) +1@) +0?) +0>) +0=) +0<) +1;) +1:) +09) +08) +07) +06) +15) +14) +03) +02) +01) +00) +1/) +1.) +0-) +0,) +0+) +0*) +1)) +1() +0') +0&) +0%) +0$) +1#) +1") +0!) +0~( +0}( +0|( +0{( +0z( +1y( +1x( +1w( +0v( +0u( +0t( +0s( +0r( +1q( +1p( +0o( +0n( +0m( +0l( +1k( +1j( +0i( +1h( +0g( +1f( +0e( +1d( +0c( +1b( +0a( +1`( +0_( +1^( +0]( +0\( +0[( +0Z( +1Y( +1X( +0W( +1V( +0U( +0T( +0S( +0R( +0Q( +1P( +0O( +1N( +0M( +1L( +0K( +1J( +0I( +0H( +0G( +0F( +0E( +1D( +0C( +0B( +0A( +0@( +0?( +1>( +0=( +0<( +0;( +0:( +09( +18( +07( +16( +15( +14( +13( +12( +11( +10( +1/( +1.( +1-( +0,( +1+( +1*( +1)( +1(( +1'( +1&( +1%( +1$( +1#( +1"( +0!( +0~' +b1 }' +b1001100100 |' +b111110100 {' +b1110010000 z' +b1001100100 y' +b111110100 x' +0w' +0v' +0u' +0t' +1s' +0r' +0q' +0p' +0o' +0n' +0m' +0l' +0k' +0j' +0i' +0h' +0g' +1f' +0e' +0d' +0c' +0b' +0a' +0`' +0_' +0^' +0]' +0\' +0[' +0Z' +1Y' +0X' +0W' +0V' +0U' +0T' +0S' +0R' +0Q' +0P' +0O' +0N' +0M' +1L' +0K' +0J' +0I' +0H' +0G' +0F' +0E' +0D' +b0 C' +0B' +0A' +0@' +0?' +1>' +0=' +b0 <' +1;' +1:' +09' +b0 8' +07' +06' +05' +04' +13' +02' +01' +00' +0/' +0.' +0-' +0,' +0+' +0*' +0)' +0(' +0'' +1&' +0%' +0$' +0#' +0"' +0!' +0~& +0}& +0|& +0{& +0z& +0y& +0x& +1w& +0v& +0u& +0t& +0s& +0r& +0q& +0p& +0o& +0n& +0m& +0l& +0k& +1j& +0i& +0h& +0g& +0f& +0e& +0d& +0c& +0b& +b0 a& +0`& +0_& +0^& +0]& +1\& +0[& +b0 Z& +1Y& +1X& +0W& +b0 V& +0U& +0T& +0S& +0R& +1Q& +0P& +0O& +0N& +0M& +0L& +0K& +0J& +0I& +0H& +0G& +0F& +0E& +1D& +0C& +0B& +0A& +0@& +0?& +0>& +0=& +0<& +0;& +0:& +09& +08& +17& +06& +05& +04& +03& +02& +01& +00& +0/& +0.& +0-& +0,& +0+& +1*& +0)& +0(& +0'& +0&& +0%& +0$& +0#& +0"& +b0 !& +0~% +0}% +0|% +0{% +1z% +0y% +b0 x% +1w% +1v% +0u% +b0 t% +0s% +0r% +0q% +0p% +1o% +0n% +0m% +0l% +0k% +0j% +0i% +0h% +0g% +0f% +0e% +0d% +0c% +1b% +0a% +0`% +0_% +0^% +0]% +0\% +0[% +0Z% +0Y% +0X% +0W% +0V% +1U% +0T% +0S% +0R% +0Q% +0P% +0O% +0N% +0M% +0L% +0K% +0J% +0I% +1H% +0G% +0F% +0E% +0D% +0C% +0B% +0A% +0@% +b0 ?% +0>% +0=% +0<% +0;% +1:% +09% +b0 8% +17% +16% +05% +b0 4% +03% +02% +01% +00% +1/% +0.% +0-% +0,% +0+% +0*% +0)% +0(% +0'% +0&% +0%% +0$% +0#% +1"% +0!% +0~$ +0}$ +0|$ +0{$ +0z$ +0y$ +0x$ +0w$ +0v$ +0u$ +0t$ +1s$ +0r$ +0q$ +0p$ +0o$ +0n$ +0m$ +0l$ +0k$ +0j$ +0i$ +0h$ +0g$ +1f$ +0e$ +0d$ +0c$ +0b$ +0a$ +0`$ +0_$ +0^$ +b0 ]$ +0\$ +0[$ +0Z$ +0Y$ +1X$ +0W$ +b0 V$ +1U$ +1T$ +0S$ +b0 R$ +0Q$ +0P$ +0O$ +0N$ +1M$ +0L$ +0K$ +0J$ +0I$ +0H$ +0G$ +0F$ +0E$ +1D$ +0C$ +0B$ +1A$ +1@$ +0?$ +0>$ +1=$ +0<$ +0;$ +0:$ +09$ +08$ +07$ +16$ +05$ +14$ +03$ +12$ +11$ +00$ +0/$ +0.$ +0-$ +0,$ +0+$ +0*$ +1)$ +1($ +1'$ +0&$ +0%$ +0$$ +0#$ +0"$ +0!$ +1~# +0}# +1|# +b100 {# +0z# +1y# +1x# +0w# +1v# +0u# +b10 t# +1s# +1r# +0q# +b1 p# +0o# +1n# +1m# +1l# +0k# +0j# +0i# +0h# +0g# +0f# +1e# +0d# +1c# +1b# +1a# +1`# +1_# +0^# +1]# +1\# +0[# +1Z# +1Y# +1X# +1W# +1V# +0U# +1T# +1S# +1R# +0Q# +0P# +1O# +0N# +1M# +0L# +0K# +1J# +1I# +1H# +1G# +0F# +1E# +1D# +0C# +0B# +1A# +0@# +0?# +0># +0=# +1<# +b101 ;# +1:# +19# +08# +07# +16# +05# +b110 4# +03# +02# +01# +b1111 0# +1/# +0.# +0-# +1,# +1+# +0*# +0)# +1(# +0'# +0&# +0%# +0$# +0## +0"# +1!# +1~" +1}" +0|" +0{" +1z" +0y" +1x" +0w" +0v" +1u" +1t" +0s" +0r" +0q" +0p" +1o" +0n" +0m" +0l" +0k" +0j" +0i" +0h" +0g" +0f" +0e" +0d" +0c" +1b" +0a" +0`" +0_" +0^" +0]" +0\" +0[" +0Z" +b1000 Y" +1X" +0W" +0V" +0U" +1T" +0S" +0R" +b100 Q" +1P" +1O" +0N" +b100 M" +b1001100100 L" +1K" +0J" +0I" +0H" +0G" +0F" +0E" +0D" +0C" +0B" +0A" +0@" +0?" +0>" +0=" +0<" +0;" +0:" +09" +08" +07" +06" +05" +04" +03" +02" +01" +00" +0/" +0." +0-" +0," +0+" +b11111111111111111111110110011011 *" +1)" +0(" +0'" +1&" +1%" +0$" +0#" +0"" +0!" +1~ +0} +0| +0{ +0z +0y +0x +0w +0v +0u +0t +0s +0r +0q +0p +0o +0n +0m +0l +0k +0j +0i +0h +b1001100100 g +0f +b1001100100 e +b111110100 d +b11111111111111111111110110011011 c +b1001100100 b +0a +0` +0_ +0^ +0] +1\ +0[ +b0 Z +b10001011000 Y +0X +0W +0V +0U +0T +0S +1R +0Q +0P +b10001011000 O +0N +b1110010000 M +b1 L +b1111110100 K +b11111111111111111111110000001011 J +b11111111111111111111111110011011 I +b1001100100 H +b1100100 G +b10001011000 F +0E +0D +b111110100 C +b0 B +b1001100100 A +b1011010 @ +b1001100100 ? +b1011010 > +b10001011000 = +b1011010 < +b0 ; +b1001100100 : +b1001100100 9 +b111110100 8 +07 +b1011010 6 +b1001100100 5 +b111110100 4 +b0 3 +02 +01 +b10001011000 0 +0/ +0. +bx - +bz , +bz + +z* +x) +x( +z' +z& +z% +x$ +z# +bz " +bz ! +$end +#1000 +0V* +0Q* +0X* +b10001011000 W* +0S* +0R* +0U* +b10001011000 T* +#1500 +b1001001110 O +b1001001110 0 +b1001001110 = +0B* +b0 L +b0 }' +0D* +08( +0=* +06( +07* +05( +01* +04( +0+* +03( +0%* +02( +0}) +01( +0w) +00( +0q) +0/( +0k) +0.( +0e) +0-( +0_) +0+( +0Y) +0*( +0S) +0)( +0M) +0(( +0G) +0'( +0A) +0&( +0H# +0;) +1"# +0U# +0%( +1y" +1/# +0A# +0N# +1b# +b100 ;# +17$ +0D$ +b10 {# +05) +1s" +b1001001110 F +b1001001110 Y +b1110 Y" +1|" +1(# +0D# +1K# +0Q# +1X# +1]# +1Y# +10$ +0=$ +0$( +1l" +0X" +1+# +0># +0C# +0?# +0R +18# +19# +13$ +0A$ +0/) +1p" +0~" +0[ +0O" +0T" +1F# +1S# +0y# +0#( +1r" +0u" +0x" +0*# +1.# +0P" +1R" +1=# +1@# +0J# +0M# +02$ +06$ +0)) +1m" +0z" +1)# +1B# +0O# +01$ +1]( +0"( +b1010 Q" +b101 4# +b0 t# +1!( +17( +0#) +b1011010 b +b1011010 L" +1I( +0J( +0P( +1U( +0V( +1\( +19( +0b( +1z( +0>( +b11111111111111111111111110100101 c +b11111111111111111111111110100101 *" +1s +0~ +1#" +1$" +0%" +0)" +b110101110 M +b110101110 z' +1G( +1M( +1S( +0Y( +0[( +1_( +0w( +0y( +b1010000 G +b1010000 G* +b11111111111111111111111110101111 I +b11111111111111111111111110101111 J* +b11111111111111111111111000000001 J +b11111111111111111111111000000001 M* +b111111110 K +b111111110 P* +1H( +0N( +1T( +1Z( +0`( +0x( +b1011010 A +b1011010 : +b1011010 H +b1011010 e +b1011010 g +b1011010 y' +b1011010 |' +b1011010 F* +b1011010 I* +b1011010 L* +b1011010 O* +12 +17 +#2500 +1Q +11 +1N +1. +b0 O +b0 0 +b0 = +0s' +1D +0f' +1r' +1B' +0Y' +1e' +1A' +0L' +1X' +1@' +03' +1K' +1a +0&' +12' +1`& +0w& +1%' +1_& +0j& +1v& +1^& +0Q& +1i& +1` +0D& +1P& +1~% +07& +1C& +1}% +0*& +16& +1|% +0o% +1)& +1_ +0b% +1n% +1>% +0U% +1a% +07# +0*$ +1=% +16# +0#$ +0H% +1T% +0&$ +1<% +0o# +1x# +0/% +1G% +0h# +1($ +1^ +0k# +1~# +0"% +1.% +1\ +1\$ +1T" +0[# +1m# +0s$ +1!% +0R" +0^# +1e# +1[$ +0U# +1:# +0f$ +1r$ +0/# +0N# +1`# +1Z$ +0(# +0Q# +1X# +0M$ +1e$ +0"# +0+# +1># +0H# +19# +1] +0u# +0W$ +09% +0y% +0[& +0=' +0y" +1[ +0A# +1S# +07$ +0@$ +1L$ +0s" +b0 Y" +0|" +1*# +0D# +1K# +00$ +1z# +0D$ +0Q$ +b0 {# +0j$ +0w$ +0&% +03% +b0 ]$ +0L% +0Y% +0f% +0s% +b0 ?% +0.& +0;& +0H& +0U& +b0 !& +0n& +0{& +0*' +07' +b0 a& +0P' +0]' +0j' +0w' +b0 C' +0l" +1X" +18# +0b# +b0 F +b0 Y +b0 ;# +03$ +1?$ +0=$ +0J$ +0c$ +0p$ +0}$ +0,% +0E% +0R% +0_% +0l% +0'& +04& +0A& +0N& +0g& +0t& +0#' +00' +0I' +0V' +0c' +0p' +0p" +1~" +1F# +0Y# +1y# +1A$ +1N$ +0r# +1w# +1g$ +1t$ +1#% +10% +0T$ +1Y$ +1I% +1V% +1c% +1p% +06% +1;% +1+& +18& +1E& +1R& +0v% +1{% +1k& +1x& +1'' +14' +0X& +1]& +1M' +1Z' +1g' +1t' +0:' +1?' +0r" +1u" +1x" +0=# +0@# +0W# +0]# +0Z# +12$ +16$ +1C$ +1P$ +0s# +0v# +1i$ +1v$ +1%% +12% +0U$ +0X$ +1K% +1X% +1e% +1r% +07% +0:% +1-& +1:& +1G& +1T& +0w% +0z% +1m& +1z& +1)' +16' +0Y& +0\& +1O' +1\' +1i' +1v' +0;' +0>' +0m" +1z" +0B# +0\# +11$ +1>$ +1K$ +1d$ +1q$ +1~$ +1-% +1F% +1S% +1`% +1m% +1(& +15& +1B& +1O& +1h& +1u& +1$' +11' +1J' +1W' +1d' +1q' +09( +b1100 Q" +b0 4# +b1110 t# +b1111 V$ +b1111 8% +b1111 x% +b1111 Z& +b1111 <' +0]( +1>( +1"( +1#( +1$( +1%( +1&( +1'( +1(( +1)( +1*( +1+( +1-( +1.( +1/( +10( +11( +12( +13( +14( +15( +16( +18( +b11111111111111111111111000001100 b +b11111111111111111111111000001100 L" +1J( +0!( +1P( +0,( +0\( +0h( +1y( +0z( +1!) +0") +1') +0() +1-) +0.) +13) +04) +19) +0:) +1?) +0@) +1E) +0F) +1K) +0L) +1Q) +0R) +1W) +0X) +1]) +0^) +1c) +0d) +1i) +0j) +1o) +0p) +1u) +0v) +1{) +0|) +1#* +0$* +1)* +0** +1/* +00* +15* +06* +1;* +0<* +0C* +b111110011 c +b111110011 *" +0s +1~ +0$" +0&" +1)" +1i +1j +1k +1l +1m +1n +1o +1p +1q +1r +1t +1u +1v +1w +1x +1y +1z +1{ +1| +1} +1!" +1"" +b11111111111111111111111111111000 M +b11111111111111111111111111111000 z' +0G( +0I( +0M( +0O( +1Y( +1e( +1w( +1}( +1%) +1+) +11) +17) +1=) +1C) +1I) +1O) +1U) +1[) +1a) +1g) +1m) +1s) +1y) +1!* +1'* +1-* +13* +19* +1?* +b100 G +b100 G* +b11111111111111111111111111111011 I +b11111111111111111111111111111011 J* +b11 J +b11 M* +b11111111111111111111111111111100 K +b11111111111111111111111111111100 P* +0H( +1N( +0Z( +0f( +1x( +1~( +1&) +1,) +12) +18) +1>) +1D) +1J) +1P) +1V) +1\) +1b) +1h) +1n) +1t) +1z) +1"* +1(* +1.* +14* +1:* +1A* +b11111111111111111111111000001100 A +b11111111111111111111111000001100 : +b11111111111111111111111000001100 H +b11111111111111111111111000001100 e +b11111111111111111111111000001100 g +b11111111111111111111111000001100 y' +b11111111111111111111111000001100 |' +b11111111111111111111111000001100 F* +b11111111111111111111111000001100 I* +b11111111111111111111111000001100 L* +b11111111111111111111111000001100 O* +b11111111111111111111111000001100 > +b11111111111111111111111000001100 @ +b1111111000001100 6 +b1111111000001100 < +b1001001110 W* +b1001001110 T* +#3500 +1Q* +1X* +b0 W* +1R* +1U* +b0 T* +#6500 diff --git a/execute.t.v b/execute.t.v new file mode 100644 index 0000000..f4e040b --- /dev/null +++ b/execute.t.v @@ -0,0 +1,79 @@ +`include "mux.v" +`include "execute.v" + +`define LW 6'h23 +`define DB 0 +`define IMM 1 +`define ADD 3'd0 +`define SUB 3'd1 +`define XOR 3'd2 +`define SLT 3'd3 + +module testExecute(); + + reg[31:0] Da, Db; + reg[15:0] imm; + reg ALU_OperandSource; + reg[2:0] ALU_cmd; + wire zero, carryout, overflow; + wire[31:0] result; + + execute dut(.result(result), + .zero(zero), + .carryout(carryout), + .overflow(overflow), + .Da(Da), + .Db(Db), + .imm(imm), + .ALU_OperandSource(ALU_OperandSource), + .command(ALU_cmd)); + + task checkResult; + input[31:0] exp_result; + input exp_zero, exp_carryout, exp_overflow; + + input[31:0] result; + input zero, carryout, overflow; + + begin + if ((result == exp_result) && (zero == exp_zero) && + (carryout == exp_carryout) && (overflow == exp_overflow)) + begin + $display("Passed."); + end + else begin + $display("Failed"); + $display("result: %d", result); + $display("expected: %d", exp_result); + $display("zero %b, carryout %b, overflow %b", zero, carryout, overflow); + end + end + endtask + + initial begin + $dumpfile("dump_exec.vcd"); + $dumpvars(); + // try adding two iputs + Da = 32'd500; + Db = 32'd612; + imm = 16'd90; + ALU_OperandSource = `DB; + ALU_cmd = `ADD; + #1000; + checkResult(32'd1112,0,0,0, + result, zero, carryout, overflow); + // add the immediate to the input + #500 + ALU_OperandSource = `IMM; + #1000; + checkResult(32'd590,0,0,0, + result, zero, carryout, overflow); + // Test negative numbers, carryout, overflow and zero flag + imm = -32'sd500; + #1000; + checkResult(32'd0,1,1,0, + result, zero, carryout, overflow); + #3000; + + end // initial +endmodule // testControl \ No newline at end of file diff --git a/execute.v b/execute.v new file mode 100644 index 0000000..625c182 --- /dev/null +++ b/execute.v @@ -0,0 +1,28 @@ +// Execude block for CPU +`include "aluK.v" + +module execute( + output[31:0] result, + output zero, + output carryout, + output overflow, + input[31:0] Da, + input[31:0] Db, + input[15:0] imm, + input ALU_OperandSource, + input[2:0] command +); +reg[31:0] extended_imm; +wire[31:0] Operand; +always @(imm) begin//not sure if this is exactly correct, but not sure if this op can run continuously + extended_imm <= {{16{imm[15]}}, imm}; // extending the immediate + end + + mux2to1by32 ALUSource(.out(Operand), + .address(ALU_OperandSource), + .input0(Db), + .input1(extended_imm)); // choose between Db or our immediate as the second operand in the ALU + //Q: Db/ALU_operandsource??? + // Use my ALU from Lab 1 - opcode will need to be converted + ALUcontrolLUT Alu(carryout, overflow, zero, result [31:0],command[2:0],Da, Operand); +endmodule diff --git a/gitignore b/gitignore new file mode 100644 index 0000000..f47cb20 --- /dev/null +++ b/gitignore @@ -0,0 +1 @@ +*.out diff --git a/ifetch.t.v b/ifetch.t.v new file mode 100644 index 0000000..3321364 --- /dev/null +++ b/ifetch.t.v @@ -0,0 +1,70 @@ +`include "ifetch.v" + +module testifetch(); + reg clk; // FPGA clock + reg write_pc, is_branch, is_jump; + reg[15:0] branch_addr; + reg[27:0] jump_addr; + wire[31:0] out, pc; + + ifetch dut( + .clk(clk), + .write_pc(write_pc), + .is_branch(is_branch), + .is_jump(is_jump), + .branch_addr(branch_addr), + .jump_addr(jump_addr[27:2]), + .out(out), + .pc(pc) + ); + + initial begin + clk=0; + end + + always #5 clk=!clk; // 50MHz Clock + + task checkResult; + input[31:0] exp_val; + input[31:0] val; + input w_pc, is_b, is_j; + input[15:0] b_a; + input[25:0] j_a; + + begin + if (val == exp_val) begin + $display("Passed."); + end + else begin + $display("Failed"); + $display("OutPut - output: %d expected: %d",val, exp_val); + $display("WritePC: %b is_branch: %b is_jump: %b", w_pc, is_b, is_j); + $display("Branch Address: %d", b_a); + $display("Jump Address: %d", j_a); + end + end + endtask + + initial begin + $dumpfile("ifetch.vcd"); + $dumpvars(); + + write_pc = 1; is_branch = 0; is_jump = 0; branch_addr = 16'd0; jump_addr = 26'b0; + #10//@(posedge clk); + checkResult(dut.pc, out, write_pc, is_branch, is_jump, branch_addr, jump_addr); + + write_pc = 1; is_branch = 1; is_jump = 0; branch_addr = 16'd12; jump_addr = 26'b0; + #10//@(posedge clk); + checkResult(dut.pc, out, write_pc, is_branch, is_jump, branch_addr, jump_addr); + + write_pc = 1; is_branch = 0; branch_addr = -16'd4; jump_addr = 26'd28; is_jump = 1; + #10//@(posedge clk); + checkResult(dut.pc, out, write_pc, is_branch, is_jump, branch_addr, jump_addr); + + write_pc = 1; is_branch = 0; is_jump = 0; branch_addr = 16'd4; jump_addr = 26'd32; + #10//@(posedge clk); + checkResult(dut.pc, out, write_pc, is_branch, is_jump, branch_addr, jump_addr); + #20 $finish; + + end // initial +endmodule // testifetch \ No newline at end of file diff --git a/ifetch.v b/ifetch.v new file mode 100644 index 0000000..cf5aa2a --- /dev/null +++ b/ifetch.v @@ -0,0 +1,57 @@ +`include "memory.v" +`include "dff.v" +`include "mux.v" +`include "add32bit.v" + +module ifetch + ( + input clk, // clk updates the PC + input write_pc, // if write_pc is high, pc can change + input is_branch, // is_branch selects between add 4 (0) and add branch (1) + input is_jump, // is jump selects between incrementing by 4/branch (0) or putting PC to jump_addr (1) + input [15:0] branch_addr, // add this to PC to go to the branch location + input [25:0] jump_addr, // instruction memory address to jump to + output[31:0] out, // returns instruction encoding (32 bits) + output[31:0] increased_pc // returns the PC for use in JAL + ); + + wire [31:0] pc_next, to_add, increased_pc; // create connecting wires + reg [31:0] pc = 32'd0, branch_addr_full = 32'd4; // pc keeps track of position, branch_addr_full is the sign extended version of branch_addr + + // Get instruction encoding from the instruction memory + memory program_mem(.clk(clk), // only happens on clock edge + .regWE(0), // We don't want to write to instruction memory + .Addr(pc), // pc is the 32 bit address + .DataIn(32'b0), // doesn't actually matter, we're not writing + .DataOut(out)); // this will be instruction encoding + + mux2to1by32 should_branch(.out(to_add), // to_add is either 4 or the branch value + .address(is_branch), // selector + .input0(32'd4), // constant 4 (normal incrememnt) + .input1({{14{branch_addr[15]}}, branch_addr, 2'b0})); // second option is the se branch addr + + add32bit add_to_pc(.a(pc), // pc is base + .b(to_add), // add to_add + .c(increased_pc), // the potential incremented value + .overflow(_)); // I don't think we care about overflow + + mux2to1by32 should_jump(.out(pc_next), // next PC value + .address(is_jump), // chooses either the incrememnted value (4/branch) or a jump + .input0(increased_pc), + .input1({pc[31:28], jump_addr, 2'b0})); + + always @(posedge clk) begin // update on clock + //branch_addr_full <= {{16{branch_addr[15]}}, branch_addr}; // se branch_addr + if(write_pc == 1) begin // register! + pc <= pc_next; + end + end + + // having a should_branch and should_jump here gets messy + // I'm making a Control black-box that takes the opcode (first 6 bits of the instructions) + // and sets a bunch of single registers accordingly. + // For example, when the opcode is a 2, which will correspond to jump (see control.v) + // writeEnable might be disabled. + // written by: David + +endmodule \ No newline at end of file diff --git a/inefficient_mult.asm b/inefficient_mult.asm new file mode 100644 index 0000000..5c71eb1 --- /dev/null +++ b/inefficient_mult.asm @@ -0,0 +1,74 @@ +# Inefficient Multiplication +# Multiplication that was designed in order to use more instructions + +# multiply $a0x$a1 +main: +# Set up arguments for call multiTest +addi $a0, $zero, 4 # arg0 = 4 +addi $a1, $zero, 10 # arg1 = 10 + +addi $sp, $sp, -8 +sw $ra, 4($sp) +sw $s0, 0($sp) + +add $v0, $zero, $zero # Make sure that there is no value already in v0 +add $s0, $zero, $zero # or in s0, which is now a counter +jal multTest + +lw $ra, 4($sp) +lw $s0, 0($sp) +addi $sp, $sp, 8 + +# Print result +add $a0, $zero, $v0 # Copy result into argument register a0 + +jal print_result + +# Jump to "exit", rather than falling through to subroutines +j program_end + +#------------------------------------------------------------------------------ +multTest: + +slt $t0, $s0, $a1 # check to see if the count is less than a1, in which case you want to keep going +bne $t0, $zero, base_case +add $v0, $v0, $a0 # Add arg0 to the result +addi $s0, $s0, 1 # Increment the counter + +j multTest # and go again! + +base_case: +jr $ra # Go home, you're done +#------------------------------------------------------------------------------ +# Utility function to print results +print_result: +# Create stack frame for ra and s0 +addi $sp, $sp, -8 +sw $ra, 4($sp) +sw $s0, 0($sp) + +add $s0, $zero, $a0 # Save argument (integer to print) to s0 + +li $v0, 4 # Service code to print string +la $a0, result_str # Argument is memory address of string to print +syscall + +li $v0, 1 # Service code to print integer +add $a0, $zero, $s0 # Argument is integer to print +syscall + +# Restore registers and pop stack frame +lw $ra, 4($sp) +lw $s0, 0($sp) +addi $sp, $sp, 8 + +#------------------------------------------------------------------------------ +# Jump loop to end execution, so we don't fall through to .data section +program_end: +j program_end + + +#------------------------------------------------------------------------------ +.data +# Null-terminated string to print as part of result +result_str: .asciiz "\nFib(4)+Fib(10) = " diff --git a/inefficient_mult.tex b/inefficient_mult.tex new file mode 100644 index 0000000..51f027d --- /dev/null +++ b/inefficient_mult.tex @@ -0,0 +1,27 @@ +20040004 +2005000a +0c00000a +0002b820 +20040048 +20050005 +0c00000a +0002b020 +02f61022 +0800001a +23bdfff8 +afbf0004 +afb00000 +00001020 +00008020 +0c000014 +8fbf0004 +8fb00000 +23bd0008 +03e00008 +0205402a +15000001 +03e00008 +00441020 +22100001 +08000014 +0800001a diff --git a/instructionDecoderI.v b/instructionDecoderI.v new file mode 100644 index 0000000..9343b3b --- /dev/null +++ b/instructionDecoderI.v @@ -0,0 +1,15 @@ + +module instructionDecoderI ( + input[31:0] instruction, + output[5:0] opcode, + output[4:0] Rs, + output[4:0] Rt, + output[15:0] imm +); + // I-type + assign opcode = instruction[31:26]; + assign Rs = instruction[25:21]; + assign Rt = instruction[20:16]; + assign imm = instruction[15:0]; + +endmodule diff --git a/instructionDecoderJ.v b/instructionDecoderJ.v new file mode 100644 index 0000000..f2d90e2 --- /dev/null +++ b/instructionDecoderJ.v @@ -0,0 +1,11 @@ + +module instructionDecoderJ ( + input[31:0] instruction, + output[5:0] opcode, + output[25:0] jump_target +); + // J-type + assign opcode = instruction[31:26]; + assign jump_target = instruction[25:0]; + +endmodule diff --git a/instructionDecoderR.v b/instructionDecoderR.v new file mode 100644 index 0000000..22e23ad --- /dev/null +++ b/instructionDecoderR.v @@ -0,0 +1,19 @@ + +module instructionDecoderR ( + input[31:0] instruction, + output[5:0] opcode, + output[4:0] Rs, + output[4:0] Rt, + output[4:0] Rd, + output[4:0] shift, + output[5:0] funct +); + // R-type + assign opcode = instruction[31:26]; + assign Rs = instruction[25:21]; + assign Rt = instruction[20:16]; + assign Rd = instruction[15:11]; + assign shift = instruction[10:6]; + assign funct = instruction[5:0]; + +endmodule diff --git a/kktest.tex b/kktest.tex new file mode 100644 index 0000000..dba152a --- /dev/null +++ b/kktest.tex @@ -0,0 +1,22 @@ +201d3ffc +201d3ffc +20080001 +20090003 +0c00000f +01098020 +01098822 +0230502a +0211582a +8fa40004 +8fa50000 +23bd0008 +14880006 +14a90006 +08000015 +23bdfff8 +afa80004 +afa90000 +03e00008 +20082710 +20092710 +08000015 diff --git a/memory.out b/memory.out new file mode 100755 index 0000000..c376481 --- /dev/null +++ b/memory.out @@ -0,0 +1,43 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0xb2b690 .scope module, "instruction_memory" "instruction_memory" 2 3; + .timescale 0 0; +L_0xb6e870 .functor BUFZ 32, L_0xb6e780, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0xb3cb20_0 .net "Addr", 31 0, C4; 0 drivers +v0xb6e390_0 .net "DataIn", 31 0, C4; 0 drivers +v0xb6e430_0 .net "DataOut", 31 0, L_0xb6e870; 1 drivers +v0xb6e4d0_0 .net *"_s0", 31 0, L_0xb6e780; 1 drivers +v0xb6e580_0 .net "clk", 0 0, C4; 0 drivers +v0xb6e620 .array "mem", 0 60, 31 0; +v0xb6e6e0_0 .net "regWE", 0 0, C4; 0 drivers +E_0xb2bfb0 .event edge, v0xb3cb20_0; +L_0xb6e780 .array/port v0xb6e620, C4; + .scope S_0xb2b690; +T_0 ; + %vpi_call 2 12 "$readmemh", "file.dat", v0xb6e620; + %end; + .thread T_0; + .scope S_0xb2b690; +T_1 ; + %wait E_0xb2bfb0; + %load/v 8, v0xb6e6e0_0, 1; + %jmp/0xz T_1.0, 8; + %load/v 8, v0xb6e390_0, 32; + %ix/getv 3, v0xb3cb20_0; + %jmp/1 t_0, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0xb6e620, 0, 8; +t_0 ; +T_1.0 ; + %jmp T_1; + .thread T_1, $push; +# The file index is used to find the file name in the following table. +:file_names 3; + "N/A"; + ""; + "memory.v"; diff --git a/memory.v b/memory.v new file mode 100644 index 0000000..0d62033 --- /dev/null +++ b/memory.v @@ -0,0 +1,62 @@ +`define MEMSIZE = 32 + +module instruction_memory +( + input clk, regWE, + input[31:0] Addr, + input[31:0] DataIn, + output[31:0] DataOut +); + + reg [31:0] mem[4095:0]; + //initial $readmemh("file.dat", mem); + assign DataOut = mem[Addr]; + + //initial $readmemh("file.dat", mem); + /*initial begin + mem[0] <= 32'd0; + mem[4] <= 32'd4; + mem[8] <= 32'd8; + mem[12] <= 32'd12; + mem[16] <= 32'd16; + mem[20] <= 32'd20; + mem[24] <= 32'd24; + mem[28] <= 32'd28; + mem[32] <= 32'd32; + mem[36] <= 32'd36; + mem[40] <= 32'd40; + mem[44] <= 32'd44; + mem[48] <= 32'd48; + mem[52] <= 32'd52; + mem[56] <= 32'd56; + mem[60] <= 32'd60; + end*/ + always @(Addr) begin + if (regWE) begin + mem[Addr] <= DataIn; + end + end + +endmodule + +module memory +( + input clk, regWE, + input[31:0] Addr, + input[31:0] DataIn, + output[31:0] DataOut +); + + reg [31:0] mem[4095:0]; + //initial $readmemh("data", mem); + + always @(negedge clk) begin + if (regWE) begin + mem[Addr] <= DataIn; + $display("Wrote %h to Memory at address %h", DataIn, Addr); + end + end + + assign DataOut = mem[{2'b0, Addr[31:2]}]; + +endmodule diff --git a/mux.v b/mux.v new file mode 100644 index 0000000..037b3fe --- /dev/null +++ b/mux.v @@ -0,0 +1,48 @@ +module mux + #(parameter width = 32) + ( + output reg [width-1:0] out, + input address, + input[width-1:0] input0, input1 + ); + + always @(input0 or input1 or address) begin // if anything changes, check + case(address) + 0: out <= input0; + 1: out <= input1; + endcase // address + end +endmodule + + +module mux2to1by32 + +( +output reg [31:0] out, +input address, +input[31:0] input0, input1 +); + + always @(input0 or input1 or address) begin // if anything changes, check + case(address) + 0: out <= input0; + 1: out <= input1; + endcase // address + end + +endmodule + +module addressmux + ( + output reg out, + input mux_address, + input[4:0] addr0, addr1 + ); + always @(addr0 or addr1 or mux_address) begin // if anything changes, check + case(mux_address) + 0: out <= addr0; + 1: out <= addr1; + endcase // address + end + +endmodule diff --git a/mux32to1by1.v b/mux32to1by1.v new file mode 100644 index 0000000..43c1cd9 --- /dev/null +++ b/mux32to1by1.v @@ -0,0 +1,8 @@ +module mux32to1by1 +( +output out, +input[4:0] address, +input[31:0] inputs +); + assign out = mux[address]; +endmodule \ No newline at end of file diff --git a/mux32to1by32.v b/mux32to1by32.v new file mode 100644 index 0000000..5bc3481 --- /dev/null +++ b/mux32to1by32.v @@ -0,0 +1,45 @@ +module mux32to1by32 +( +output[31:0] out, +input[4:0] address, +input[31:0] input0, input1, input2, input3, input4, input5, input6, input7, input8, input9, + input10, input11, input12, input13, input14, input15, input16, input17, input18, input19, + input20, input21, input22, input23, input24, input25, input26, input27, input28, input29, + input30, input31 +); + + wire[31:0] mux[31:0]; // Create a 2D array of wires + assign mux[0] = input0; // Connect the sources of the array + assign mux[1] = input1; + assign mux[2] = input2; + assign mux[3] = input3; + assign mux[4] = input4; + assign mux[5] = input5; + assign mux[6] = input6; + assign mux[7] = input7; + assign mux[8] = input8; + assign mux[9] = input9; + assign mux[10] = input10; // Connect the sources of the array + assign mux[11] = input11; + assign mux[12] = input12; + assign mux[13] = input13; + assign mux[14] = input14; + assign mux[15] = input15; + assign mux[16] = input16; + assign mux[17] = input17; + assign mux[18] = input18; + assign mux[19] = input19; + assign mux[20] = input20; // Connect the sources of the array + assign mux[21] = input21; + assign mux[22] = input22; + assign mux[23] = input23; + assign mux[24] = input24; + assign mux[25] = input25; + assign mux[26] = input26; + assign mux[27] = input27; + assign mux[28] = input28; + assign mux[29] = input29; + assign mux[30] = input30; // Connect the sources of the array + assign mux[31] = input31; + assign out = mux[address]; // Connect the output of the array +endmodule \ No newline at end of file diff --git a/mux3bit.t.v b/mux3bit.t.v new file mode 100644 index 0000000..0dc67c9 --- /dev/null +++ b/mux3bit.t.v @@ -0,0 +1,26 @@ +// Multiplexer testbench +`timescale 1 ns / 1 ps +`include "mux3bit.v" + +module testMultiplexer (); + reg[2:0] address; + reg[7:0] inputs; + wire out; + + //behavioralMultiplexer mux(out, addr0, addr1, in0, in1, in2, in3); + MUX3bit mux(out, address, inputs); + + initial begin + $display("address | inputs | Out | Expected Output"); + inputs=8'b00000001;address=3'b000; #1000 + $display("%b | %b | %b | %b", address, inputs, out, 1'b1); + inputs=8'b00000100;address=3'b010; #1000 + $display("%b | %b | %b | %b", address, inputs, out, 1'b1); + inputs=8'b10000000;address=3'b111; #1000 + $display("%b | %b | %b | %b", address, inputs, out, 1'b1); + inputs=8'b01000000;address=3'b110; #1000 + $display("%b | %b | %b | %b", address, inputs, out, 1'b1); + inputs=8'b00000000;address=3'b100; #1000 + $display("%b | %b | %b | %b", address, inputs, out, 1'b0); + end +endmodule diff --git a/mux3bit.v b/mux3bit.v new file mode 100644 index 0000000..f8c5a20 --- /dev/null +++ b/mux3bit.v @@ -0,0 +1,8 @@ +module MUX3bit +( + output out, + input[2:0] address, + input[7:0] inputs +); + assign out = inputs[address]; +endmodule diff --git a/nand_32bit.v b/nand_32bit.v new file mode 100644 index 0000000..9b895d0 --- /dev/null +++ b/nand_32bit.v @@ -0,0 +1,38 @@ + module nand_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + nand bit0(out[0], a[0], b[0]); + nand bit1(out[1], a[1], b[1]); + nand bit2(out[2], a[2], b[2]); + nand bit3(out[3], a[3], b[3]); + nand bit4(out[4], a[4], b[4]); + nand bit5(out[5], a[5], b[5]); + nand bit6(out[6], a[6], b[6]); + nand bit7(out[7], a[7], b[7]); + nand bit8(out[8], a[8], b[8]); + nand bit9(out[9], a[9], b[9]); + nand bit10(out[10], a[10], b[10]); + nand bit11(out[11], a[11], b[11]); + nand bit12(out[12], a[12], b[12]); + nand bit13(out[13], a[13], b[13]); + nand bit14(out[14], a[14], b[14]); + nand bit15(out[15], a[15], b[15]); + nand bit16(out[16], a[16], b[16]); + nand bit17(out[17], a[17], b[17]); + nand bit18(out[18], a[18], b[18]); + nand bit19(out[19], a[19], b[19]); + nand bit20(out[20], a[20], b[20]); + nand bit21(out[21], a[21], b[21]); + nand bit22(out[22], a[22], b[22]); + nand bit23(out[23], a[23], b[23]); + nand bit24(out[24], a[24], b[24]); + nand bit25(out[25], a[25], b[25]); + nand bit26(out[26], a[26], b[26]); + nand bit27(out[27], a[27], b[27]); + nand bit28(out[28], a[28], b[28]); + nand bit29(out[29], a[29], b[29]); + nand bit30(out[30], a[30], b[30]); + nand bit31(out[31], a[31], b[31]); +endmodule diff --git a/nor_32bit.v b/nor_32bit.v new file mode 100644 index 0000000..8262d27 --- /dev/null +++ b/nor_32bit.v @@ -0,0 +1,38 @@ +module nor_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + nor bit0(out[0], a[0], b[0]); + nor bit1(out[1], a[1], b[1]); + nor bit2(out[2], a[2], b[2]); + nor bit3(out[3], a[3], b[3]); + nor bit4(out[4], a[4], b[4]); + nor bit5(out[5], a[5], b[5]); + nor bit6(out[6], a[6], b[6]); + nor bit7(out[7], a[7], b[7]); + nor bit8(out[8], a[8], b[8]); + nor bit9(out[9], a[9], b[9]); + nor bit10(out[10], a[10], b[10]); + nor bit11(out[11], a[11], b[11]); + nor bit12(out[12], a[12], b[12]); + nor bit13(out[13], a[13], b[13]); + nor bit14(out[14], a[14], b[14]); + nor bit15(out[15], a[15], b[15]); + nor bit16(out[16], a[16], b[16]); + nor bit17(out[17], a[17], b[17]); + nor bit18(out[18], a[18], b[18]); + nor bit19(out[19], a[19], b[19]); + nor bit20(out[20], a[20], b[20]); + nor bit21(out[21], a[21], b[21]); + nor bit22(out[22], a[22], b[22]); + nor bit23(out[23], a[23], b[23]); + nor bit24(out[24], a[24], b[24]); + nor bit25(out[25], a[25], b[25]); + nor bit26(out[26], a[26], b[26]); + nor bit27(out[27], a[27], b[27]); + nor bit28(out[28], a[28], b[28]); + nor bit29(out[29], a[29], b[29]); + nor bit30(out[30], a[30], b[30]); + nor bit31(out[31], a[31], b[31]); +endmodule diff --git a/or_32bit.v b/or_32bit.v new file mode 100644 index 0000000..83a217b --- /dev/null +++ b/or_32bit.v @@ -0,0 +1,38 @@ +module or_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + or bit0(out[0], a[0], b[0]); + or bit1(out[1], a[1], b[1]); + or bit2(out[2], a[2], b[2]); + or bit3(out[3], a[3], b[3]); + or bit4(out[4], a[4], b[4]); + or bit5(out[5], a[5], b[5]); + or bit6(out[6], a[6], b[6]); + or bit7(out[7], a[7], b[7]); + or bit8(out[8], a[8], b[8]); + or bit9(out[9], a[9], b[9]); + or bit10(out[10], a[10], b[10]); + or bit11(out[11], a[11], b[11]); + or bit12(out[12], a[12], b[12]); + or bit13(out[13], a[13], b[13]); + or bit14(out[14], a[14], b[14]); + or bit15(out[15], a[15], b[15]); + or bit16(out[16], a[16], b[16]); + or bit17(out[17], a[17], b[17]); + or bit18(out[18], a[18], b[18]); + or bit19(out[19], a[19], b[19]); + or bit20(out[20], a[20], b[20]); + or bit21(out[21], a[21], b[21]); + or bit22(out[22], a[22], b[22]); + or bit23(out[23], a[23], b[23]); + or bit24(out[24], a[24], b[24]); + or bit25(out[25], a[25], b[25]); + or bit26(out[26], a[26], b[26]); + or bit27(out[27], a[27], b[27]); + or bit28(out[28], a[28], b[28]); + or bit29(out[29], a[29], b[29]); + or bit30(out[30], a[30], b[30]); + or bit31(out[31], a[31], b[31]); +endmodule \ No newline at end of file diff --git a/regfile.out b/regfile.out new file mode 100755 index 0000000..27477c7 --- /dev/null +++ b/regfile.out @@ -0,0 +1,886 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1f636e0 .scope module, "mux32to1by1" "mux32to1by1" 2 1; + .timescale 0 0; +v0x1f708a0_0 .net "address", 4 0, C4; 0 drivers +v0x1f8fa20_0 .net "inputs", 31 0, C4; 0 drivers +v0x1f8fac0_0 .net "mux", 0 0, C4; 0 drivers +v0x1f8fb60_0 .net "out", 0 0, L_0x1f9c6d0; 1 drivers +L_0x1f9c6d0 .part/v C4, C4, 1; +S_0x1f62f70 .scope module, "regfile" "regfile" 3 15; + .timescale 0 0; +v0x1f9ab00_0 .net "Clk", 0 0, C4; 0 drivers +v0x1f97050_0 .net "ReadData1", 31 0, L_0x1fa1190; 1 drivers +v0x1f97100_0 .net "ReadData2", 31 0, L_0x1fa25a0; 1 drivers +v0x1f971b0_0 .net "ReadRegister1", 4 0, C4; 0 drivers +v0x1f9afb0_0 .net "ReadRegister2", 4 0, C4; 0 drivers +v0x1f9b030_0 .net "RegWrite", 0 0, C4; 0 drivers +v0x1f9b0f0_0 .net "WriteData", 31 0, C4; 0 drivers +v0x1f97260_0 .net "WriteRegister", 4 0, C4; 0 drivers +v0x1f97360_0 .net "decoder", 31 0, L_0x1f9ca80; 1 drivers +v0x1f9b580_0 .net "reg0", 31 0, v0x1f9a5a0_0; 1 drivers +v0x1f9b600_0 .net "reg1", 31 0, v0x1f9a240_0; 1 drivers +v0x1f9b680_0 .net "reg10", 31 0, v0x1f983e0_0; 1 drivers +v0x1f9b770_0 .net "reg11", 31 0, v0x1f98080_0; 1 drivers +v0x1f9b7f0_0 .net "reg12", 31 0, v0x1f97d20_0; 1 drivers +v0x1f9b8f0_0 .net "reg13", 31 0, v0x1f979c0_0; 1 drivers +v0x1f9b970_0 .net "reg14", 31 0, v0x1f97660_0; 1 drivers +v0x1f9b870_0 .net "reg15", 31 0, v0x1f954b0_0; 1 drivers +v0x1f9ba80_0 .net "reg16", 31 0, v0x1f96d70_0; 1 drivers +v0x1f9b9f0_0 .net "reg17", 31 0, v0x1f96a10_0; 1 drivers +v0x1f9bba0_0 .net "reg18", 31 0, v0x1f966b0_0; 1 drivers +v0x1f9bb00_0 .net "reg19", 31 0, v0x1f96350_0; 1 drivers +v0x1f9bcd0_0 .net "reg2", 31 0, v0x1f99ee0_0; 1 drivers +v0x1f9bc20_0 .net "reg20", 31 0, v0x1f95ff0_0; 1 drivers +v0x1f9be10_0 .net "reg21", 31 0, v0x1f95c90_0; 1 drivers +v0x1f9bd50_0 .net "reg22", 31 0, v0x1f95930_0; 1 drivers +v0x1f9bf60_0 .net "reg23", 31 0, v0x1f94740_0; 1 drivers +v0x1f9be90_0 .net "reg24", 31 0, v0x1f95150_0; 1 drivers +v0x1f9c0c0_0 .net "reg25", 31 0, v0x1f94df0_0; 1 drivers +v0x1f9bfe0_0 .net "reg26", 31 0, v0x1f94ae0_0; 1 drivers +v0x1f9c230_0 .net "reg27", 31 0, v0x1f947d0_0; 1 drivers +v0x1f9c140_0 .net "reg28", 31 0, v0x1f94350_0; 1 drivers +v0x1f9c3b0_0 .net "reg29", 31 0, v0x1f94010_0; 1 drivers +v0x1f9c2b0_0 .net "reg3", 31 0, v0x1f99b80_0; 1 drivers +v0x1f9c330_0 .net "reg30", 31 0, v0x1f93c30_0; 1 drivers +v0x1f9c550_0 .net "reg31", 31 0, v0x1f93870_0; 1 drivers +v0x1f9c5d0_0 .net "reg4", 31 0, v0x1f99820_0; 1 drivers +v0x1f9c430_0 .net "reg5", 31 0, v0x1f994c0_0; 1 drivers +v0x1f9c4b0_0 .net "reg6", 31 0, v0x1f99160_0; 1 drivers +v0x1f9c790_0 .net "reg7", 31 0, v0x1f98e00_0; 1 drivers +v0x1f9c810_0 .net "reg8", 31 0, v0x1f98aa0_0; 1 drivers +v0x1f9c650_0 .net "reg9", 31 0, v0x1f98740_0; 1 drivers +L_0x1f9cc10 .part L_0x1f9ca80, 0, 1; +L_0x1f9ccb0 .part L_0x1f9ca80, 1, 1; +L_0x1f9cde0 .part L_0x1f9ca80, 2, 1; +L_0x1f9ce80 .part L_0x1f9ca80, 3, 1; +L_0x1f9cf50 .part L_0x1f9ca80, 4, 1; +L_0x1f9d020 .part L_0x1f9ca80, 5, 1; +L_0x1f9d200 .part L_0x1f9ca80, 6, 1; +L_0x1f9d2a0 .part L_0x1f9ca80, 7, 1; +L_0x1f9d340 .part L_0x1f9ca80, 8, 1; +L_0x1f9d410 .part L_0x1f9ca80, 9, 1; +L_0x1f9d4e0 .part L_0x1f9ca80, 10, 1; +L_0x1f9d5b0 .part L_0x1f9ca80, 11, 1; +L_0x1f9d680 .part L_0x1f9ca80, 12, 1; +L_0x1f9d750 .part L_0x1f9ca80, 13, 1; +L_0x1f9da30 .part L_0x1f9ca80, 14, 1; +L_0x1f9dad0 .part L_0x1f9ca80, 15, 1; +L_0x1f9dc00 .part L_0x1f9ca80, 16, 1; +L_0x1f9dca0 .part L_0x1f9ca80, 17, 1; +L_0x1f9de10 .part L_0x1f9ca80, 18, 1; +L_0x1f9deb0 .part L_0x1f9ca80, 19, 1; +L_0x1f9dd70 .part L_0x1f9ca80, 20, 1; +L_0x1f9e000 .part L_0x1f9ca80, 21, 1; +L_0x1f9df50 .part L_0x1f9ca80, 22, 1; +L_0x1f9e1c0 .part L_0x1f9ca80, 23, 1; +L_0x1f9e0d0 .part L_0x1f9ca80, 24, 1; +L_0x1f9e390 .part L_0x1f9ca80, 25, 1; +L_0x1f9e290 .part L_0x1f9ca80, 26, 1; +L_0x1f9e540 .part L_0x1f9ca80, 27, 1; +L_0x1f9e460 .part L_0x1f9ca80, 28, 1; +L_0x1f9e700 .part L_0x1f9ca80, 29, 1; +L_0x1f9e610 .part L_0x1f9ca80, 30, 1; +L_0x1f9d920 .part L_0x1f9ca80, 31, 1; +S_0x1f9a6f0 .scope module, "dec" "decoder1to32" 3 34, 4 4, S_0x1f62f70; + .timescale 0 0; +v0x1f9a7e0_0 .net *"_s0", 31 0, L_0x1f9c9e0; 1 drivers +v0x1f9a8a0_0 .net *"_s3", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x1f9a940_0 .alias "address", 4 0, v0x1f97260_0; +v0x1f9a9e0_0 .alias "enable", 0 0, v0x1f9b030_0; +v0x1f9aa60_0 .alias "out", 31 0, v0x1f97360_0; +L_0x1f9c9e0 .concat [ 1 31 0 0], C4, C4<0000000000000000000000000000000>; +L_0x1f9ca80 .shift/l 32, L_0x1f9c9e0, C4; +S_0x1f9a390 .scope module, "r0" "register32zero" 3 35, 5 1, S_0x1f62f70; + .timescale 0 0; +v0x1f9a480_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f9a520_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f9a5a0_0 .var "q", 31 0; +v0x1f9a670_0 .net "wrenable", 0 0, L_0x1f9cc10; 1 drivers +S_0x1f9a030 .scope module, "r1" "register32" 3 36, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f9a120_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f9a1c0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f9a240_0 .var "q", 31 0; +v0x1f9a310_0 .net "wrenable", 0 0, L_0x1f9ccb0; 1 drivers +S_0x1f99cd0 .scope module, "r2" "register32" 3 37, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f99dc0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f99e60_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f99ee0_0 .var "q", 31 0; +v0x1f99fb0_0 .net "wrenable", 0 0, L_0x1f9cde0; 1 drivers +S_0x1f99970 .scope module, "r3" "register32" 3 38, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f99a60_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f99b00_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f99b80_0 .var "q", 31 0; +v0x1f99c50_0 .net "wrenable", 0 0, L_0x1f9ce80; 1 drivers +S_0x1f99610 .scope module, "r4" "register32" 3 39, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f99700_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f997a0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f99820_0 .var "q", 31 0; +v0x1f998f0_0 .net "wrenable", 0 0, L_0x1f9cf50; 1 drivers +S_0x1f992b0 .scope module, "r5" "register32" 3 40, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f993a0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f99440_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f994c0_0 .var "q", 31 0; +v0x1f99590_0 .net "wrenable", 0 0, L_0x1f9d020; 1 drivers +S_0x1f98f50 .scope module, "r6" "register32" 3 41, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f99040_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f990e0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f99160_0 .var "q", 31 0; +v0x1f99230_0 .net "wrenable", 0 0, L_0x1f9d200; 1 drivers +S_0x1f98bf0 .scope module, "r7" "register32" 3 42, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f98ce0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f98d80_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f98e00_0 .var "q", 31 0; +v0x1f98ed0_0 .net "wrenable", 0 0, L_0x1f9d2a0; 1 drivers +S_0x1f98890 .scope module, "r8" "register32" 3 43, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f98980_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f98a20_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f98aa0_0 .var "q", 31 0; +v0x1f98b70_0 .net "wrenable", 0 0, L_0x1f9d340; 1 drivers +S_0x1f98530 .scope module, "r9" "register32" 3 44, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f98620_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f986c0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f98740_0 .var "q", 31 0; +v0x1f98810_0 .net "wrenable", 0 0, L_0x1f9d410; 1 drivers +S_0x1f981d0 .scope module, "r10" "register32" 3 45, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f982c0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f98360_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f983e0_0 .var "q", 31 0; +v0x1f984b0_0 .net "wrenable", 0 0, L_0x1f9d4e0; 1 drivers +S_0x1f97e70 .scope module, "r11" "register32" 3 46, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f97f60_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f98000_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f98080_0 .var "q", 31 0; +v0x1f98150_0 .net "wrenable", 0 0, L_0x1f9d5b0; 1 drivers +S_0x1f97b10 .scope module, "r12" "register32" 3 47, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f97c00_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f97ca0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f97d20_0 .var "q", 31 0; +v0x1f97df0_0 .net "wrenable", 0 0, L_0x1f9d680; 1 drivers +S_0x1f977b0 .scope module, "r13" "register32" 3 48, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f978a0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f97940_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f979c0_0 .var "q", 31 0; +v0x1f97a90_0 .net "wrenable", 0 0, L_0x1f9d750; 1 drivers +S_0x1f97470 .scope module, "r14" "register32" 3 49, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f97560_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f975e0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f97660_0 .var "q", 31 0; +v0x1f97730_0 .net "wrenable", 0 0, L_0x1f9da30; 1 drivers +S_0x1f96ec0 .scope module, "r15" "register32" 3 50, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f96fb0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f95430_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f954b0_0 .var "q", 31 0; +v0x1f95580_0 .net "wrenable", 0 0, L_0x1f9dad0; 1 drivers +S_0x1f96b60 .scope module, "r16" "register32" 3 51, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f96c50_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f96cf0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f96d70_0 .var "q", 31 0; +v0x1f96e40_0 .net "wrenable", 0 0, L_0x1f9dc00; 1 drivers +S_0x1f96800 .scope module, "r17" "register32" 3 52, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f968f0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f96990_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f96a10_0 .var "q", 31 0; +v0x1f96ae0_0 .net "wrenable", 0 0, L_0x1f9dca0; 1 drivers +S_0x1f964a0 .scope module, "r18" "register32" 3 53, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f96590_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f96630_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f966b0_0 .var "q", 31 0; +v0x1f96780_0 .net "wrenable", 0 0, L_0x1f9de10; 1 drivers +S_0x1f96140 .scope module, "r19" "register32" 3 54, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f96230_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f962d0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f96350_0 .var "q", 31 0; +v0x1f96420_0 .net "wrenable", 0 0, L_0x1f9deb0; 1 drivers +S_0x1f95de0 .scope module, "r20" "register32" 3 55, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f95ed0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f95f70_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f95ff0_0 .var "q", 31 0; +v0x1f960c0_0 .net "wrenable", 0 0, L_0x1f9dd70; 1 drivers +S_0x1f95a80 .scope module, "r21" "register32" 3 56, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f95b70_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f95c10_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f95c90_0 .var "q", 31 0; +v0x1f95d60_0 .net "wrenable", 0 0, L_0x1f9e000; 1 drivers +S_0x1f95720 .scope module, "r22" "register32" 3 57, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f95810_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f958b0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f95930_0 .var "q", 31 0; +v0x1f95a00_0 .net "wrenable", 0 0, L_0x1f9df50; 1 drivers +S_0x1f952a0 .scope module, "r23" "register32" 3 58, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f95390_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f94630_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f94740_0 .var "q", 31 0; +v0x1f956a0_0 .net "wrenable", 0 0, L_0x1f9e1c0; 1 drivers +S_0x1f94f40 .scope module, "r24" "register32" 3 59, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f95030_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f950d0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f95150_0 .var "q", 31 0; +v0x1f95220_0 .net "wrenable", 0 0, L_0x1f9e0d0; 1 drivers +S_0x1f94be0 .scope module, "r25" "register32" 3 60, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f94cd0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f94d70_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f94df0_0 .var "q", 31 0; +v0x1f94ec0_0 .net "wrenable", 0 0, L_0x1f9e390; 1 drivers +S_0x1f948d0 .scope module, "r26" "register32" 3 61, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f949c0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f94a60_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f94ae0_0 .var "q", 31 0; +v0x1f94b60_0 .net "wrenable", 0 0, L_0x1f9e290; 1 drivers +S_0x1f944a0 .scope module, "r27" "register32" 3 62, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f94590_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f946c0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f947d0_0 .var "q", 31 0; +v0x1f94850_0 .net "wrenable", 0 0, L_0x1f9e540; 1 drivers +S_0x1f94160 .scope module, "r28" "register32" 3 63, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f94250_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f942d0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f94350_0 .var "q", 31 0; +v0x1f94420_0 .net "wrenable", 0 0, L_0x1f9e460; 1 drivers +S_0x1f93d80 .scope module, "r29" "register32" 3 64, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f93e70_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f93f40_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f94010_0 .var "q", 31 0; +v0x1f940e0_0 .net "wrenable", 0 0, L_0x1f9e700; 1 drivers +S_0x1f939c0 .scope module, "r30" "register32" 3 65, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f93ab0_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f93b80_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f93c30_0 .var "q", 31 0; +v0x1f93d00_0 .net "wrenable", 0 0, L_0x1f9e610; 1 drivers +S_0x1f931d0 .scope module, "r31" "register32" 3 66, 6 1, S_0x1f62f70; + .timescale 0 0; +v0x1f93710_0 .alias "clk", 0 0, v0x1f9ab00_0; +v0x1f937d0_0 .alias "d", 31 0, v0x1f9b0f0_0; +v0x1f93870_0 .var "q", 31 0; +v0x1f93940_0 .net "wrenable", 0 0, L_0x1f9d920; 1 drivers +E_0x1f911c0 .event posedge, v0x1f93710_0; +S_0x1f915a0 .scope module, "mux1" "mux32to1by32" 3 68, 7 1, S_0x1f62f70; + .timescale 0 0; +L_0x1f97410 .functor BUFZ 32, v0x1f9a5a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9b700 .functor BUFZ 32, v0x1f9a240_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9d8b0 .functor BUFZ 32, v0x1f99ee0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9d0f0 .functor BUFZ 32, v0x1f99b80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9ef00 .functor BUFZ 32, v0x1f99820_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f020 .functor BUFZ 32, v0x1f994c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f180 .functor BUFZ 32, v0x1f99160_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f270 .functor BUFZ 32, v0x1f98e00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f390 .functor BUFZ 32, v0x1f98aa0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f4b0 .functor BUFZ 32, v0x1f98740_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f630 .functor BUFZ 32, v0x1f983e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f750 .functor BUFZ 32, v0x1f98080_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f5d0 .functor BUFZ 32, v0x1f97d20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9f9a0 .functor BUFZ 32, v0x1f979c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9fb40 .functor BUFZ 32, v0x1f97660_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9fc60 .functor BUFZ 32, v0x1f954b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9fe10 .functor BUFZ 32, v0x1f96d70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9ff30 .functor BUFZ 32, v0x1f96a10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1f9fd80 .functor BUFZ 32, v0x1f966b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0180 .functor BUFZ 32, v0x1f96350_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0050 .functor BUFZ 32, v0x1f95ff0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa03e0 .functor BUFZ 32, v0x1f95c90_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa02a0 .functor BUFZ 32, v0x1f95930_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0650 .functor BUFZ 32, v0x1f94740_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0500 .functor BUFZ 32, v0x1f95150_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa08a0 .functor BUFZ 32, v0x1f94df0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0740 .functor BUFZ 32, v0x1f94ae0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa07a0 .functor BUFZ 32, v0x1f947d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0990 .functor BUFZ 32, v0x1f94350_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0d40 .functor BUFZ 32, v0x1f94010_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0bc0 .functor BUFZ 32, v0x1f93c30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa0c50 .functor BUFZ 32, v0x1f93870_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1190 .functor BUFZ 32, L_0x1fa0e30, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x1f91c80_0 .net *"_s96", 31 0, L_0x1fa0e30; 1 drivers +v0x1f91d40_0 .alias "address", 4 0, v0x1f971b0_0; +v0x1f91de0_0 .alias "input0", 31 0, v0x1f9b580_0; +v0x1f91e60_0 .alias "input1", 31 0, v0x1f9b600_0; +v0x1f91f40_0 .alias "input10", 31 0, v0x1f9b680_0; +v0x1f91ff0_0 .alias "input11", 31 0, v0x1f9b770_0; +v0x1f92070_0 .alias "input12", 31 0, v0x1f9b7f0_0; +v0x1f92120_0 .alias "input13", 31 0, v0x1f9b8f0_0; +v0x1f921d0_0 .alias "input14", 31 0, v0x1f9b970_0; +v0x1f92280_0 .alias "input15", 31 0, v0x1f9b870_0; +v0x1f92330_0 .alias "input16", 31 0, v0x1f9ba80_0; +v0x1f923e0_0 .alias "input17", 31 0, v0x1f9b9f0_0; +v0x1f92490_0 .alias "input18", 31 0, v0x1f9bba0_0; +v0x1f92540_0 .alias "input19", 31 0, v0x1f9bb00_0; +v0x1f92670_0 .alias "input2", 31 0, v0x1f9bcd0_0; +v0x1f92720_0 .alias "input20", 31 0, v0x1f9bc20_0; +v0x1f925c0_0 .alias "input21", 31 0, v0x1f9be10_0; +v0x1f92890_0 .alias "input22", 31 0, v0x1f9bd50_0; +v0x1f929b0_0 .alias "input23", 31 0, v0x1f9bf60_0; +v0x1f92a30_0 .alias "input24", 31 0, v0x1f9be90_0; +v0x1f92910_0 .alias "input25", 31 0, v0x1f9c0c0_0; +v0x1f92b90_0 .alias "input26", 31 0, v0x1f9bfe0_0; +v0x1f92ae0_0 .alias "input27", 31 0, v0x1f9c230_0; +v0x1f92cd0_0 .alias "input28", 31 0, v0x1f9c140_0; +v0x1f92c10_0 .alias "input29", 31 0, v0x1f9c3b0_0; +v0x1f92e20_0 .alias "input3", 31 0, v0x1f9c2b0_0; +v0x1f92d80_0 .alias "input30", 31 0, v0x1f9c330_0; +v0x1f903e0_0 .alias "input31", 31 0, v0x1f9c550_0; +v0x1f90580_0 .alias "input4", 31 0, v0x1f9c5d0_0; +v0x1f92ea0_0 .alias "input5", 31 0, v0x1f9c430_0; +v0x1f930b0_0 .alias "input6", 31 0, v0x1f9c4b0_0; +v0x1f93130_0 .alias "input7", 31 0, v0x1f9c790_0; +v0x1f92fb0_0 .alias "input8", 31 0, v0x1f9c810_0; +v0x1f93030_0 .alias "input9", 31 0, v0x1f9c650_0; +v0x1f932d0 .array "mux", 0 31; +v0x1f932d0_0 .net v0x1f932d0 0, 31 0, L_0x1f97410; 1 drivers +v0x1f932d0_1 .net v0x1f932d0 1, 31 0, L_0x1f9b700; 1 drivers +v0x1f932d0_2 .net v0x1f932d0 2, 31 0, L_0x1f9d8b0; 1 drivers +v0x1f932d0_3 .net v0x1f932d0 3, 31 0, L_0x1f9d0f0; 1 drivers +v0x1f932d0_4 .net v0x1f932d0 4, 31 0, L_0x1f9ef00; 1 drivers +v0x1f932d0_5 .net v0x1f932d0 5, 31 0, L_0x1f9f020; 1 drivers +v0x1f932d0_6 .net v0x1f932d0 6, 31 0, L_0x1f9f180; 1 drivers +v0x1f932d0_7 .net v0x1f932d0 7, 31 0, L_0x1f9f270; 1 drivers +v0x1f932d0_8 .net v0x1f932d0 8, 31 0, L_0x1f9f390; 1 drivers +v0x1f932d0_9 .net v0x1f932d0 9, 31 0, L_0x1f9f4b0; 1 drivers +v0x1f932d0_10 .net v0x1f932d0 10, 31 0, L_0x1f9f630; 1 drivers +v0x1f932d0_11 .net v0x1f932d0 11, 31 0, L_0x1f9f750; 1 drivers +v0x1f932d0_12 .net v0x1f932d0 12, 31 0, L_0x1f9f5d0; 1 drivers +v0x1f932d0_13 .net v0x1f932d0 13, 31 0, L_0x1f9f9a0; 1 drivers +v0x1f932d0_14 .net v0x1f932d0 14, 31 0, L_0x1f9fb40; 1 drivers +v0x1f932d0_15 .net v0x1f932d0 15, 31 0, L_0x1f9fc60; 1 drivers +v0x1f932d0_16 .net v0x1f932d0 16, 31 0, L_0x1f9fe10; 1 drivers +v0x1f932d0_17 .net v0x1f932d0 17, 31 0, L_0x1f9ff30; 1 drivers +v0x1f932d0_18 .net v0x1f932d0 18, 31 0, L_0x1f9fd80; 1 drivers +v0x1f932d0_19 .net v0x1f932d0 19, 31 0, L_0x1fa0180; 1 drivers +v0x1f932d0_20 .net v0x1f932d0 20, 31 0, L_0x1fa0050; 1 drivers +v0x1f932d0_21 .net v0x1f932d0 21, 31 0, L_0x1fa03e0; 1 drivers +v0x1f932d0_22 .net v0x1f932d0 22, 31 0, L_0x1fa02a0; 1 drivers +v0x1f932d0_23 .net v0x1f932d0 23, 31 0, L_0x1fa0650; 1 drivers +v0x1f932d0_24 .net v0x1f932d0 24, 31 0, L_0x1fa0500; 1 drivers +v0x1f932d0_25 .net v0x1f932d0 25, 31 0, L_0x1fa08a0; 1 drivers +v0x1f932d0_26 .net v0x1f932d0 26, 31 0, L_0x1fa0740; 1 drivers +v0x1f932d0_27 .net v0x1f932d0 27, 31 0, L_0x1fa07a0; 1 drivers +v0x1f932d0_28 .net v0x1f932d0 28, 31 0, L_0x1fa0990; 1 drivers +v0x1f932d0_29 .net v0x1f932d0 29, 31 0, L_0x1fa0d40; 1 drivers +v0x1f932d0_30 .net v0x1f932d0 30, 31 0, L_0x1fa0bc0; 1 drivers +v0x1f932d0_31 .net v0x1f932d0 31, 31 0, L_0x1fa0c50; 1 drivers +v0x1f93520_0 .alias "out", 31 0, v0x1f97050_0; +L_0x1fa0e30 .array/port v0x1f932d0, C4; +S_0x1f8fc10 .scope module, "mux2" "mux32to1by32" 3 69, 7 1, S_0x1f62f70; + .timescale 0 0; +L_0x1fa11f0 .functor BUFZ 32, v0x1f9a5a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1250 .functor BUFZ 32, v0x1f9a240_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa12b0 .functor BUFZ 32, v0x1f99ee0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1310 .functor BUFZ 32, v0x1f99b80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa13d0 .functor BUFZ 32, v0x1f99820_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1460 .functor BUFZ 32, v0x1f994c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa14f0 .functor BUFZ 32, v0x1f99160_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1550 .functor BUFZ 32, v0x1f98e00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa15b0 .functor BUFZ 32, v0x1f98aa0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1640 .functor BUFZ 32, v0x1f98740_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1730 .functor BUFZ 32, v0x1f983e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa17c0 .functor BUFZ 32, v0x1f98080_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa16d0 .functor BUFZ 32, v0x1f97d20_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1880 .functor BUFZ 32, v0x1f979c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1910 .functor BUFZ 32, v0x1f97660_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa19a0 .functor BUFZ 32, v0x1f954b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1ac0 .functor BUFZ 32, v0x1f96d70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1b50 .functor BUFZ 32, v0x1f96a10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1a30 .functor BUFZ 32, v0x1f966b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1c80 .functor BUFZ 32, v0x1f96350_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1be0 .functor BUFZ 32, v0x1f95ff0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1dc0 .functor BUFZ 32, v0x1f95c90_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1d10 .functor BUFZ 32, v0x1f95930_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1f10 .functor BUFZ 32, v0x1f94740_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1e50 .functor BUFZ 32, v0x1f95150_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa2070 .functor BUFZ 32, v0x1f94df0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa1fa0 .functor BUFZ 32, v0x1f94ae0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa21b0 .functor BUFZ 32, v0x1f947d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa20d0 .functor BUFZ 32, v0x1f94350_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa2300 .functor BUFZ 32, v0x1f94010_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa2210 .functor BUFZ 32, v0x1f93c30_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa22a0 .functor BUFZ 32, v0x1f93870_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1fa25a0 .functor BUFZ 32, L_0x1fa2360, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x1f8fd00_0 .net *"_s96", 31 0, L_0x1fa2360; 1 drivers +v0x1f8fdc0_0 .alias "address", 4 0, v0x1f9afb0_0; +v0x1f8fe60_0 .alias "input0", 31 0, v0x1f9b580_0; +v0x1f8ff00_0 .alias "input1", 31 0, v0x1f9b600_0; +v0x1f8ffb0_0 .alias "input10", 31 0, v0x1f9b680_0; +v0x1f90050_0 .alias "input11", 31 0, v0x1f9b770_0; +v0x1f90130_0 .alias "input12", 31 0, v0x1f9b7f0_0; +v0x1f901d0_0 .alias "input13", 31 0, v0x1f9b8f0_0; +v0x1f902c0_0 .alias "input14", 31 0, v0x1f9b970_0; +v0x1f90360_0 .alias "input15", 31 0, v0x1f9b870_0; +v0x1f90460_0 .alias "input16", 31 0, v0x1f9ba80_0; +v0x1f90500_0 .alias "input17", 31 0, v0x1f9b9f0_0; +v0x1f90610_0 .alias "input18", 31 0, v0x1f9bba0_0; +v0x1f906b0_0 .alias "input19", 31 0, v0x1f9bb00_0; +v0x1f907d0_0 .alias "input2", 31 0, v0x1f9bcd0_0; +v0x1f90870_0 .alias "input20", 31 0, v0x1f9bc20_0; +v0x1f90730_0 .alias "input21", 31 0, v0x1f9be10_0; +v0x1f909c0_0 .alias "input22", 31 0, v0x1f9bd50_0; +v0x1f90ae0_0 .alias "input23", 31 0, v0x1f9bf60_0; +v0x1f90b60_0 .alias "input24", 31 0, v0x1f9be90_0; +v0x1f90a40_0 .alias "input25", 31 0, v0x1f9c0c0_0; +v0x1f90c90_0 .alias "input26", 31 0, v0x1f9bfe0_0; +v0x1f90be0_0 .alias "input27", 31 0, v0x1f9c230_0; +v0x1f90dd0_0 .alias "input28", 31 0, v0x1f9c140_0; +v0x1f90d30_0 .alias "input29", 31 0, v0x1f9c3b0_0; +v0x1f90f20_0 .alias "input3", 31 0, v0x1f9c2b0_0; +v0x1f90e70_0 .alias "input30", 31 0, v0x1f9c330_0; +v0x1f91080_0 .alias "input31", 31 0, v0x1f9c550_0; +v0x1f90fc0_0 .alias "input4", 31 0, v0x1f9c5d0_0; +v0x1f911f0_0 .alias "input5", 31 0, v0x1f9c430_0; +v0x1f91100_0 .alias "input6", 31 0, v0x1f9c4b0_0; +v0x1f91370_0 .alias "input7", 31 0, v0x1f9c790_0; +v0x1f91270_0 .alias "input8", 31 0, v0x1f9c810_0; +v0x1f91500_0 .alias "input9", 31 0, v0x1f9c650_0; +v0x1f913f0 .array "mux", 0 31; +v0x1f913f0_0 .net v0x1f913f0 0, 31 0, L_0x1fa11f0; 1 drivers +v0x1f913f0_1 .net v0x1f913f0 1, 31 0, L_0x1fa1250; 1 drivers +v0x1f913f0_2 .net v0x1f913f0 2, 31 0, L_0x1fa12b0; 1 drivers +v0x1f913f0_3 .net v0x1f913f0 3, 31 0, L_0x1fa1310; 1 drivers +v0x1f913f0_4 .net v0x1f913f0 4, 31 0, L_0x1fa13d0; 1 drivers +v0x1f913f0_5 .net v0x1f913f0 5, 31 0, L_0x1fa1460; 1 drivers +v0x1f913f0_6 .net v0x1f913f0 6, 31 0, L_0x1fa14f0; 1 drivers +v0x1f913f0_7 .net v0x1f913f0 7, 31 0, L_0x1fa1550; 1 drivers +v0x1f913f0_8 .net v0x1f913f0 8, 31 0, L_0x1fa15b0; 1 drivers +v0x1f913f0_9 .net v0x1f913f0 9, 31 0, L_0x1fa1640; 1 drivers +v0x1f913f0_10 .net v0x1f913f0 10, 31 0, L_0x1fa1730; 1 drivers +v0x1f913f0_11 .net v0x1f913f0 11, 31 0, L_0x1fa17c0; 1 drivers +v0x1f913f0_12 .net v0x1f913f0 12, 31 0, L_0x1fa16d0; 1 drivers +v0x1f913f0_13 .net v0x1f913f0 13, 31 0, L_0x1fa1880; 1 drivers +v0x1f913f0_14 .net v0x1f913f0 14, 31 0, L_0x1fa1910; 1 drivers +v0x1f913f0_15 .net v0x1f913f0 15, 31 0, L_0x1fa19a0; 1 drivers +v0x1f913f0_16 .net v0x1f913f0 16, 31 0, L_0x1fa1ac0; 1 drivers +v0x1f913f0_17 .net v0x1f913f0 17, 31 0, L_0x1fa1b50; 1 drivers +v0x1f913f0_18 .net v0x1f913f0 18, 31 0, L_0x1fa1a30; 1 drivers +v0x1f913f0_19 .net v0x1f913f0 19, 31 0, L_0x1fa1c80; 1 drivers +v0x1f913f0_20 .net v0x1f913f0 20, 31 0, L_0x1fa1be0; 1 drivers +v0x1f913f0_21 .net v0x1f913f0 21, 31 0, L_0x1fa1dc0; 1 drivers +v0x1f913f0_22 .net v0x1f913f0 22, 31 0, L_0x1fa1d10; 1 drivers +v0x1f913f0_23 .net v0x1f913f0 23, 31 0, L_0x1fa1f10; 1 drivers +v0x1f913f0_24 .net v0x1f913f0 24, 31 0, L_0x1fa1e50; 1 drivers +v0x1f913f0_25 .net v0x1f913f0 25, 31 0, L_0x1fa2070; 1 drivers +v0x1f913f0_26 .net v0x1f913f0 26, 31 0, L_0x1fa1fa0; 1 drivers +v0x1f913f0_27 .net v0x1f913f0 27, 31 0, L_0x1fa21b0; 1 drivers +v0x1f913f0_28 .net v0x1f913f0 28, 31 0, L_0x1fa20d0; 1 drivers +v0x1f913f0_29 .net v0x1f913f0 29, 31 0, L_0x1fa2300; 1 drivers +v0x1f913f0_30 .net v0x1f913f0 30, 31 0, L_0x1fa2210; 1 drivers +v0x1f913f0_31 .net v0x1f913f0 31, 31 0, L_0x1fa22a0; 1 drivers +v0x1f91ad0_0 .alias "out", 31 0, v0x1f97100_0; +L_0x1fa2360 .array/port v0x1f913f0, C4; + .scope S_0x1f9a390; +T_0 ; + %wait E_0x1f911c0; + %set/v v0x1f9a5a0_0, 0, 32; + %jmp T_0; + .thread T_0; + .scope S_0x1f9a030; +T_1 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f9a310_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_1.0, 4; + %load/v 8, v0x1f9a1c0_0, 32; + %set/v v0x1f9a240_0, 8, 32; +T_1.0 ; + %jmp T_1; + .thread T_1; + .scope S_0x1f99cd0; +T_2 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f99fb0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_2.0, 4; + %load/v 8, v0x1f99e60_0, 32; + %set/v v0x1f99ee0_0, 8, 32; +T_2.0 ; + %jmp T_2; + .thread T_2; + .scope S_0x1f99970; +T_3 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f99c50_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_3.0, 4; + %load/v 8, v0x1f99b00_0, 32; + %set/v v0x1f99b80_0, 8, 32; +T_3.0 ; + %jmp T_3; + .thread T_3; + .scope S_0x1f99610; +T_4 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f998f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_4.0, 4; + %load/v 8, v0x1f997a0_0, 32; + %set/v v0x1f99820_0, 8, 32; +T_4.0 ; + %jmp T_4; + .thread T_4; + .scope S_0x1f992b0; +T_5 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f99590_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_5.0, 4; + %load/v 8, v0x1f99440_0, 32; + %set/v v0x1f994c0_0, 8, 32; +T_5.0 ; + %jmp T_5; + .thread T_5; + .scope S_0x1f98f50; +T_6 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f99230_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_6.0, 4; + %load/v 8, v0x1f990e0_0, 32; + %set/v v0x1f99160_0, 8, 32; +T_6.0 ; + %jmp T_6; + .thread T_6; + .scope S_0x1f98bf0; +T_7 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f98ed0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_7.0, 4; + %load/v 8, v0x1f98d80_0, 32; + %set/v v0x1f98e00_0, 8, 32; +T_7.0 ; + %jmp T_7; + .thread T_7; + .scope S_0x1f98890; +T_8 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f98b70_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_8.0, 4; + %load/v 8, v0x1f98a20_0, 32; + %set/v v0x1f98aa0_0, 8, 32; +T_8.0 ; + %jmp T_8; + .thread T_8; + .scope S_0x1f98530; +T_9 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f98810_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_9.0, 4; + %load/v 8, v0x1f986c0_0, 32; + %set/v v0x1f98740_0, 8, 32; +T_9.0 ; + %jmp T_9; + .thread T_9; + .scope S_0x1f981d0; +T_10 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f984b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_10.0, 4; + %load/v 8, v0x1f98360_0, 32; + %set/v v0x1f983e0_0, 8, 32; +T_10.0 ; + %jmp T_10; + .thread T_10; + .scope S_0x1f97e70; +T_11 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f98150_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_11.0, 4; + %load/v 8, v0x1f98000_0, 32; + %set/v v0x1f98080_0, 8, 32; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0x1f97b10; +T_12 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f97df0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_12.0, 4; + %load/v 8, v0x1f97ca0_0, 32; + %set/v v0x1f97d20_0, 8, 32; +T_12.0 ; + %jmp T_12; + .thread T_12; + .scope S_0x1f977b0; +T_13 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f97a90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_13.0, 4; + %load/v 8, v0x1f97940_0, 32; + %set/v v0x1f979c0_0, 8, 32; +T_13.0 ; + %jmp T_13; + .thread T_13; + .scope S_0x1f97470; +T_14 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f97730_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_14.0, 4; + %load/v 8, v0x1f975e0_0, 32; + %set/v v0x1f97660_0, 8, 32; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0x1f96ec0; +T_15 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f95580_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_15.0, 4; + %load/v 8, v0x1f95430_0, 32; + %set/v v0x1f954b0_0, 8, 32; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0x1f96b60; +T_16 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f96e40_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_16.0, 4; + %load/v 8, v0x1f96cf0_0, 32; + %set/v v0x1f96d70_0, 8, 32; +T_16.0 ; + %jmp T_16; + .thread T_16; + .scope S_0x1f96800; +T_17 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f96ae0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_17.0, 4; + %load/v 8, v0x1f96990_0, 32; + %set/v v0x1f96a10_0, 8, 32; +T_17.0 ; + %jmp T_17; + .thread T_17; + .scope S_0x1f964a0; +T_18 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f96780_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_18.0, 4; + %load/v 8, v0x1f96630_0, 32; + %set/v v0x1f966b0_0, 8, 32; +T_18.0 ; + %jmp T_18; + .thread T_18; + .scope S_0x1f96140; +T_19 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f96420_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_19.0, 4; + %load/v 8, v0x1f962d0_0, 32; + %set/v v0x1f96350_0, 8, 32; +T_19.0 ; + %jmp T_19; + .thread T_19; + .scope S_0x1f95de0; +T_20 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f960c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_20.0, 4; + %load/v 8, v0x1f95f70_0, 32; + %set/v v0x1f95ff0_0, 8, 32; +T_20.0 ; + %jmp T_20; + .thread T_20; + .scope S_0x1f95a80; +T_21 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f95d60_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_21.0, 4; + %load/v 8, v0x1f95c10_0, 32; + %set/v v0x1f95c90_0, 8, 32; +T_21.0 ; + %jmp T_21; + .thread T_21; + .scope S_0x1f95720; +T_22 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f95a00_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_22.0, 4; + %load/v 8, v0x1f958b0_0, 32; + %set/v v0x1f95930_0, 8, 32; +T_22.0 ; + %jmp T_22; + .thread T_22; + .scope S_0x1f952a0; +T_23 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f956a0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_23.0, 4; + %load/v 8, v0x1f94630_0, 32; + %set/v v0x1f94740_0, 8, 32; +T_23.0 ; + %jmp T_23; + .thread T_23; + .scope S_0x1f94f40; +T_24 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f95220_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_24.0, 4; + %load/v 8, v0x1f950d0_0, 32; + %set/v v0x1f95150_0, 8, 32; +T_24.0 ; + %jmp T_24; + .thread T_24; + .scope S_0x1f94be0; +T_25 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f94ec0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_25.0, 4; + %load/v 8, v0x1f94d70_0, 32; + %set/v v0x1f94df0_0, 8, 32; +T_25.0 ; + %jmp T_25; + .thread T_25; + .scope S_0x1f948d0; +T_26 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f94b60_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_26.0, 4; + %load/v 8, v0x1f94a60_0, 32; + %set/v v0x1f94ae0_0, 8, 32; +T_26.0 ; + %jmp T_26; + .thread T_26; + .scope S_0x1f944a0; +T_27 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f94850_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_27.0, 4; + %load/v 8, v0x1f946c0_0, 32; + %set/v v0x1f947d0_0, 8, 32; +T_27.0 ; + %jmp T_27; + .thread T_27; + .scope S_0x1f94160; +T_28 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f94420_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_28.0, 4; + %load/v 8, v0x1f942d0_0, 32; + %set/v v0x1f94350_0, 8, 32; +T_28.0 ; + %jmp T_28; + .thread T_28; + .scope S_0x1f93d80; +T_29 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f940e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_29.0, 4; + %load/v 8, v0x1f93f40_0, 32; + %set/v v0x1f94010_0, 8, 32; +T_29.0 ; + %jmp T_29; + .thread T_29; + .scope S_0x1f939c0; +T_30 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f93d00_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_30.0, 4; + %load/v 8, v0x1f93b80_0, 32; + %set/v v0x1f93c30_0, 8, 32; +T_30.0 ; + %jmp T_30; + .thread T_30; + .scope S_0x1f931d0; +T_31 ; + %wait E_0x1f911c0; + %load/v 8, v0x1f93940_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_31.0, 4; + %load/v 8, v0x1f937d0_0, 32; + %set/v v0x1f93870_0, 8, 32; +T_31.0 ; + %jmp T_31; + .thread T_31; +# The file index is used to find the file name in the following table. +:file_names 8; + "N/A"; + ""; + "./mux32to1by1.v"; + "regfile.v"; + "./decoders.v"; + "./register32zero.v"; + "./register32.v"; + "./mux32to1by32.v"; diff --git a/regfile.t.out b/regfile.t.out new file mode 100755 index 0000000..fedaf67 --- /dev/null +++ b/regfile.t.out @@ -0,0 +1,1085 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0xb18440 .scope module, "hw4testbenchharness" "hw4testbenchharness" 2 7; + .timescale 0 0; +v0xb38750_0 .net "Clk", 0 0, v0xb2b450_0; 1 drivers +v0xb38a60_0 .net "ReadData1", 31 0, L_0xb3d920; 1 drivers +v0xb38ae0_0 .net "ReadData2", 31 0, L_0xb3edf0; 1 drivers +v0xb38b60_0 .net "ReadRegister1", 4 0, v0xb2b650_0; 1 drivers +v0xb38be0_0 .net "ReadRegister2", 4 0, v0xb2b700_0; 1 drivers +v0xb38c60_0 .net "RegWrite", 0 0, v0xb2b7a0_0; 1 drivers +v0xb38ce0_0 .net "WriteData", 31 0, v0xb2b880_0; 1 drivers +v0xb38d60_0 .net "WriteRegister", 4 0, v0xb2b920_0; 1 drivers +v0xb38de0_0 .var "begintest", 0 0; +v0xb38e60_0 .net "dutpassed", 0 0, v0xb2bab0_0; 1 drivers +v0xb38ee0_0 .net "endtest", 0 0, v0xb2bbb0_0; 1 drivers +E_0xaf6590 .event posedge, v0xb2bbb0_0; +S_0xb2bc50 .scope module, "DUT" "regfile" 2 22, 3 15, S_0xb18440; + .timescale 0 0; +v0xb36f90_0 .alias "Clk", 0 0, v0xb38750_0; +v0xb37010_0 .alias "ReadData1", 31 0, v0xb38a60_0; +v0xb37090_0 .alias "ReadData2", 31 0, v0xb38ae0_0; +v0xb37110_0 .alias "ReadRegister1", 4 0, v0xb38b60_0; +v0xb371e0_0 .alias "ReadRegister2", 4 0, v0xb38be0_0; +v0xb372b0_0 .alias "RegWrite", 0 0, v0xb38c60_0; +v0xb37380_0 .alias "WriteData", 31 0, v0xb38ce0_0; +v0xb37400_0 .alias "WriteRegister", 4 0, v0xb38d60_0; +v0xb37520_0 .net "decoder", 31 0, L_0xb39290; 1 drivers +v0xb375a0_0 .net "reg0", 31 0, v0xb32e40_0; 1 drivers +v0xb37680_0 .net "reg1", 31 0, v0xb36310_0; 1 drivers +v0xb37700_0 .net "reg10", 31 0, v0xb344b0_0; 1 drivers +v0xb377f0_0 .net "reg11", 31 0, v0xb34150_0; 1 drivers +v0xb37870_0 .net "reg12", 31 0, v0xb33df0_0; 1 drivers +v0xb37970_0 .net "reg13", 31 0, v0xb33a90_0; 1 drivers +v0xb379f0_0 .net "reg14", 31 0, v0xb33730_0; 1 drivers +v0xb378f0_0 .net "reg15", 31 0, v0xb333d0_0; 1 drivers +v0xb37b00_0 .net "reg16", 31 0, v0xb31220_0; 1 drivers +v0xb37a70_0 .net "reg17", 31 0, v0xb32ae0_0; 1 drivers +v0xb37c20_0 .net "reg18", 31 0, v0xb32780_0; 1 drivers +v0xb37b80_0 .net "reg19", 31 0, v0xb32420_0; 1 drivers +v0xb37d50_0 .net "reg2", 31 0, v0xb35fb0_0; 1 drivers +v0xb37ca0_0 .net "reg20", 31 0, v0xb320c0_0; 1 drivers +v0xb37e90_0 .net "reg21", 31 0, v0xb31d60_0; 1 drivers +v0xb37dd0_0 .net "reg22", 31 0, v0xb31a00_0; 1 drivers +v0xb37fe0_0 .net "reg23", 31 0, v0xb316a0_0; 1 drivers +v0xb37f10_0 .net "reg24", 31 0, v0xb304b0_0; 1 drivers +v0xb38140_0 .net "reg25", 31 0, v0xb30ec0_0; 1 drivers +v0xb38060_0 .net "reg26", 31 0, v0xb30b60_0; 1 drivers +v0xb382b0_0 .net "reg27", 31 0, v0xb30850_0; 1 drivers +v0xb381c0_0 .net "reg28", 31 0, v0xb30540_0; 1 drivers +v0xb38430_0 .net "reg29", 31 0, v0xb300c0_0; 1 drivers +v0xb38330_0 .net "reg3", 31 0, v0xb35c50_0; 1 drivers +v0xb383b0_0 .net "reg30", 31 0, v0xb2fd80_0; 1 drivers +v0xb385d0_0 .net "reg31", 31 0, v0xb2f9f0_0; 1 drivers +v0xb38650_0 .net "reg4", 31 0, v0xb358f0_0; 1 drivers +v0xb384b0_0 .net "reg5", 31 0, v0xb35590_0; 1 drivers +v0xb38530_0 .net "reg6", 31 0, v0xb35230_0; 1 drivers +v0xb38810_0 .net "reg7", 31 0, v0xb34ed0_0; 1 drivers +v0xb38890_0 .net "reg8", 31 0, v0xb34b70_0; 1 drivers +v0xb386d0_0 .net "reg9", 31 0, v0xb34810_0; 1 drivers +L_0xb393c0 .part L_0xb39290, 0, 1; +L_0xb39460 .part L_0xb39290, 1, 1; +L_0xb39590 .part L_0xb39290, 2, 1; +L_0xb39630 .part L_0xb39290, 3, 1; +L_0xb396d0 .part L_0xb39290, 4, 1; +L_0xb39770 .part L_0xb39290, 5, 1; +L_0xb39950 .part L_0xb39290, 6, 1; +L_0xb399f0 .part L_0xb39290, 7, 1; +L_0xb39a90 .part L_0xb39290, 8, 1; +L_0xb39b30 .part L_0xb39290, 9, 1; +L_0xb39c30 .part L_0xb39290, 10, 1; +L_0xb39d00 .part L_0xb39290, 11, 1; +L_0xb39dd0 .part L_0xb39290, 12, 1; +L_0xb39ea0 .part L_0xb39290, 13, 1; +L_0xb39840 .part L_0xb39290, 14, 1; +L_0xb3a180 .part L_0xb39290, 15, 1; +L_0xb3a220 .part L_0xb39290, 16, 1; +L_0xb3a2c0 .part L_0xb39290, 17, 1; +L_0xb3a360 .part L_0xb39290, 18, 1; +L_0xb3a400 .part L_0xb39290, 19, 1; +L_0xb37480 .part L_0xb39290, 20, 1; +L_0xb3a580 .part L_0xb39290, 21, 1; +L_0xb3a4a0 .part L_0xb39290, 22, 1; +L_0xb3a740 .part L_0xb39290, 23, 1; +L_0xb3a650 .part L_0xb39290, 24, 1; +L_0xb3a910 .part L_0xb39290, 25, 1; +L_0xb3a810 .part L_0xb39290, 26, 1; +L_0xb3aac0 .part L_0xb39290, 27, 1; +L_0xb3a9e0 .part L_0xb39290, 28, 1; +L_0xb3ac80 .part L_0xb39290, 29, 1; +L_0xb3ab90 .part L_0xb39290, 30, 1; +L_0xb3a070 .part L_0xb39290, 31, 1; +S_0xb32f90 .scope module, "dec" "decoder1to32" 3 34, 4 4, S_0xb2bc50; + .timescale 0 0; +v0xb33080_0 .net *"_s0", 31 0, L_0xb39160; 1 drivers +v0xb33140_0 .net *"_s3", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0xb36e10_0 .alias "address", 4 0, v0xb38d60_0; +v0xb36e90_0 .alias "enable", 0 0, v0xb38c60_0; +v0xb36f10_0 .alias "out", 31 0, v0xb37520_0; +L_0xb39160 .concat [ 1 31 0 0], v0xb2b7a0_0, C4<0000000000000000000000000000000>; +L_0xb39290 .shift/l 32, L_0xb39160, v0xb2b920_0; +S_0xb36460 .scope module, "r0" "register32zero" 3 35, 5 1, S_0xb2bc50; + .timescale 0 0; +v0xb36550_0 .alias "clk", 0 0, v0xb38750_0; +v0xb32dc0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb32e40_0 .var "q", 31 0; +v0xb32f10_0 .net "wrenable", 0 0, L_0xb393c0; 1 drivers +S_0xb36100 .scope module, "r1" "register32" 3 36, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb361f0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb36290_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb36310_0 .var "q", 31 0; +v0xb363e0_0 .net "wrenable", 0 0, L_0xb39460; 1 drivers +S_0xb35da0 .scope module, "r2" "register32" 3 37, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb35e90_0 .alias "clk", 0 0, v0xb38750_0; +v0xb35f30_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb35fb0_0 .var "q", 31 0; +v0xb36080_0 .net "wrenable", 0 0, L_0xb39590; 1 drivers +S_0xb35a40 .scope module, "r3" "register32" 3 38, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb35b30_0 .alias "clk", 0 0, v0xb38750_0; +v0xb35bd0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb35c50_0 .var "q", 31 0; +v0xb35d20_0 .net "wrenable", 0 0, L_0xb39630; 1 drivers +S_0xb356e0 .scope module, "r4" "register32" 3 39, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb357d0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb35870_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb358f0_0 .var "q", 31 0; +v0xb359c0_0 .net "wrenable", 0 0, L_0xb396d0; 1 drivers +S_0xb35380 .scope module, "r5" "register32" 3 40, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb35470_0 .alias "clk", 0 0, v0xb38750_0; +v0xb35510_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb35590_0 .var "q", 31 0; +v0xb35660_0 .net "wrenable", 0 0, L_0xb39770; 1 drivers +S_0xb35020 .scope module, "r6" "register32" 3 41, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb35110_0 .alias "clk", 0 0, v0xb38750_0; +v0xb351b0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb35230_0 .var "q", 31 0; +v0xb35300_0 .net "wrenable", 0 0, L_0xb39950; 1 drivers +S_0xb34cc0 .scope module, "r7" "register32" 3 42, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb34db0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb34e50_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb34ed0_0 .var "q", 31 0; +v0xb34fa0_0 .net "wrenable", 0 0, L_0xb399f0; 1 drivers +S_0xb34960 .scope module, "r8" "register32" 3 43, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb34a50_0 .alias "clk", 0 0, v0xb38750_0; +v0xb34af0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb34b70_0 .var "q", 31 0; +v0xb34c40_0 .net "wrenable", 0 0, L_0xb39a90; 1 drivers +S_0xb34600 .scope module, "r9" "register32" 3 44, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb346f0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb34790_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb34810_0 .var "q", 31 0; +v0xb348e0_0 .net "wrenable", 0 0, L_0xb39b30; 1 drivers +S_0xb342a0 .scope module, "r10" "register32" 3 45, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb34390_0 .alias "clk", 0 0, v0xb38750_0; +v0xb34430_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb344b0_0 .var "q", 31 0; +v0xb34580_0 .net "wrenable", 0 0, L_0xb39c30; 1 drivers +S_0xb33f40 .scope module, "r11" "register32" 3 46, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb34030_0 .alias "clk", 0 0, v0xb38750_0; +v0xb340d0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb34150_0 .var "q", 31 0; +v0xb34220_0 .net "wrenable", 0 0, L_0xb39d00; 1 drivers +S_0xb33be0 .scope module, "r12" "register32" 3 47, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb33cd0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb33d70_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb33df0_0 .var "q", 31 0; +v0xb33ec0_0 .net "wrenable", 0 0, L_0xb39dd0; 1 drivers +S_0xb33880 .scope module, "r13" "register32" 3 48, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb33970_0 .alias "clk", 0 0, v0xb38750_0; +v0xb33a10_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb33a90_0 .var "q", 31 0; +v0xb33b60_0 .net "wrenable", 0 0, L_0xb39ea0; 1 drivers +S_0xb33520 .scope module, "r14" "register32" 3 49, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb33610_0 .alias "clk", 0 0, v0xb38750_0; +v0xb336b0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb33730_0 .var "q", 31 0; +v0xb33800_0 .net "wrenable", 0 0, L_0xb39840; 1 drivers +S_0xb331e0 .scope module, "r15" "register32" 3 50, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb332d0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb33350_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb333d0_0 .var "q", 31 0; +v0xb334a0_0 .net "wrenable", 0 0, L_0xb3a180; 1 drivers +S_0xb32c30 .scope module, "r16" "register32" 3 51, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb32d20_0 .alias "clk", 0 0, v0xb38750_0; +v0xb311a0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb31220_0 .var "q", 31 0; +v0xb312f0_0 .net "wrenable", 0 0, L_0xb3a220; 1 drivers +S_0xb328d0 .scope module, "r17" "register32" 3 52, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb329c0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb32a60_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb32ae0_0 .var "q", 31 0; +v0xb32bb0_0 .net "wrenable", 0 0, L_0xb3a2c0; 1 drivers +S_0xb32570 .scope module, "r18" "register32" 3 53, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb32660_0 .alias "clk", 0 0, v0xb38750_0; +v0xb32700_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb32780_0 .var "q", 31 0; +v0xb32850_0 .net "wrenable", 0 0, L_0xb3a360; 1 drivers +S_0xb32210 .scope module, "r19" "register32" 3 54, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb32300_0 .alias "clk", 0 0, v0xb38750_0; +v0xb323a0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb32420_0 .var "q", 31 0; +v0xb324f0_0 .net "wrenable", 0 0, L_0xb3a400; 1 drivers +S_0xb31eb0 .scope module, "r20" "register32" 3 55, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb31fa0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb32040_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb320c0_0 .var "q", 31 0; +v0xb32190_0 .net "wrenable", 0 0, L_0xb37480; 1 drivers +S_0xb31b50 .scope module, "r21" "register32" 3 56, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb31c40_0 .alias "clk", 0 0, v0xb38750_0; +v0xb31ce0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb31d60_0 .var "q", 31 0; +v0xb31e30_0 .net "wrenable", 0 0, L_0xb3a580; 1 drivers +S_0xb317f0 .scope module, "r22" "register32" 3 57, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb318e0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb31980_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb31a00_0 .var "q", 31 0; +v0xb31ad0_0 .net "wrenable", 0 0, L_0xb3a4a0; 1 drivers +S_0xb31490 .scope module, "r23" "register32" 3 58, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb31580_0 .alias "clk", 0 0, v0xb38750_0; +v0xb31620_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb316a0_0 .var "q", 31 0; +v0xb31770_0 .net "wrenable", 0 0, L_0xb3a740; 1 drivers +S_0xb31010 .scope module, "r24" "register32" 3 59, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb31100_0 .alias "clk", 0 0, v0xb38750_0; +v0xb303a0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb304b0_0 .var "q", 31 0; +v0xb31410_0 .net "wrenable", 0 0, L_0xb3a650; 1 drivers +S_0xb30cb0 .scope module, "r25" "register32" 3 60, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb30da0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb30e40_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb30ec0_0 .var "q", 31 0; +v0xb30f90_0 .net "wrenable", 0 0, L_0xb3a910; 1 drivers +S_0xb30950 .scope module, "r26" "register32" 3 61, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb30a40_0 .alias "clk", 0 0, v0xb38750_0; +v0xb30ae0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb30b60_0 .var "q", 31 0; +v0xb30c30_0 .net "wrenable", 0 0, L_0xb3a810; 1 drivers +S_0xb30640 .scope module, "r27" "register32" 3 62, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb30730_0 .alias "clk", 0 0, v0xb38750_0; +v0xb307d0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb30850_0 .var "q", 31 0; +v0xb308d0_0 .net "wrenable", 0 0, L_0xb3aac0; 1 drivers +S_0xb30210 .scope module, "r28" "register32" 3 63, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb30300_0 .alias "clk", 0 0, v0xb38750_0; +v0xb30430_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb30540_0 .var "q", 31 0; +v0xb305c0_0 .net "wrenable", 0 0, L_0xb3a9e0; 1 drivers +S_0xb2fed0 .scope module, "r29" "register32" 3 64, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb2ffc0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb30040_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb300c0_0 .var "q", 31 0; +v0xb30190_0 .net "wrenable", 0 0, L_0xb3ac80; 1 drivers +S_0xb2faf0 .scope module, "r30" "register32" 3 65, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb2fbe0_0 .alias "clk", 0 0, v0xb38750_0; +v0xb2fcb0_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb2fd80_0 .var "q", 31 0; +v0xb2fe50_0 .net "wrenable", 0 0, L_0xb3ab90; 1 drivers +S_0xb2f510 .scope module, "r31" "register32" 3 66, 6 1, S_0xb2bc50; + .timescale 0 0; +v0xb2f870_0 .alias "clk", 0 0, v0xb38750_0; +v0xb2f940_0 .alias "d", 31 0, v0xb38ce0_0; +v0xb2f9f0_0 .var "q", 31 0; +v0xb2fa70_0 .net "wrenable", 0 0, L_0xb3a070; 1 drivers +E_0xb2f600 .event posedge, v0xb2b450_0; +S_0xb2d5e0 .scope module, "mux1" "mux32to1by32" 3 68, 7 1, S_0xb2bc50; + .timescale 0 0; +L_0xb37780 .functor BUFZ 32, v0xb32e40_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3a000 .functor BUFZ 32, v0xb36310_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3b330 .functor BUFZ 32, v0xb35fb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3b450 .functor BUFZ 32, v0xb35c50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3b5a0 .functor BUFZ 32, v0xb358f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3b6c0 .functor BUFZ 32, v0xb35590_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3b820 .functor BUFZ 32, v0xb35230_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3b910 .functor BUFZ 32, v0xb34ed0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3ba30 .functor BUFZ 32, v0xb34b70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3bb50 .functor BUFZ 32, v0xb34810_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3bcd0 .functor BUFZ 32, v0xb344b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3bdf0 .functor BUFZ 32, v0xb34150_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3bc70 .functor BUFZ 32, v0xb33df0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c040 .functor BUFZ 32, v0xb33a90_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c1e0 .functor BUFZ 32, v0xb33730_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c300 .functor BUFZ 32, v0xb333d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c4b0 .functor BUFZ 32, v0xb31220_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c5d0 .functor BUFZ 32, v0xb32ae0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c420 .functor BUFZ 32, v0xb32780_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c820 .functor BUFZ 32, v0xb32420_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c6f0 .functor BUFZ 32, v0xb320c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3ca80 .functor BUFZ 32, v0xb31d60_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3c940 .functor BUFZ 32, v0xb31a00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3ccf0 .functor BUFZ 32, v0xb316a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3cba0 .functor BUFZ 32, v0xb304b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3cf70 .functor BUFZ 32, v0xb30ec0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3ce10 .functor BUFZ 32, v0xb30b60_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3d1d0 .functor BUFZ 32, v0xb30850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3d060 .functor BUFZ 32, v0xb30540_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3d440 .functor BUFZ 32, v0xb300c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3d2c0 .functor BUFZ 32, v0xb2fd80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3d350 .functor BUFZ 32, v0xb2f9f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3d920 .functor BUFZ 32, L_0xb3d530, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0xb2dce0_0 .net *"_s96", 31 0, L_0xb3d530; 1 drivers +v0xb2dd60_0 .alias "address", 4 0, v0xb38b60_0; +v0xb2de10_0 .alias "input0", 31 0, v0xb375a0_0; +v0xb2dec0_0 .alias "input1", 31 0, v0xb37680_0; +v0xb2dfa0_0 .alias "input10", 31 0, v0xb37700_0; +v0xb2e050_0 .alias "input11", 31 0, v0xb377f0_0; +v0xb2e0d0_0 .alias "input12", 31 0, v0xb37870_0; +v0xb2e180_0 .alias "input13", 31 0, v0xb37970_0; +v0xb2e230_0 .alias "input14", 31 0, v0xb379f0_0; +v0xb2e2e0_0 .alias "input15", 31 0, v0xb378f0_0; +v0xb2e390_0 .alias "input16", 31 0, v0xb37b00_0; +v0xb2e440_0 .alias "input17", 31 0, v0xb37a70_0; +v0xb2e4f0_0 .alias "input18", 31 0, v0xb37c20_0; +v0xb2e5a0_0 .alias "input19", 31 0, v0xb37b80_0; +v0xb2e6d0_0 .alias "input2", 31 0, v0xb37d50_0; +v0xb2e780_0 .alias "input20", 31 0, v0xb37ca0_0; +v0xb2e620_0 .alias "input21", 31 0, v0xb37e90_0; +v0xb2e8f0_0 .alias "input22", 31 0, v0xb37dd0_0; +v0xb2ea10_0 .alias "input23", 31 0, v0xb37fe0_0; +v0xb2ea90_0 .alias "input24", 31 0, v0xb37f10_0; +v0xb2e970_0 .alias "input25", 31 0, v0xb38140_0; +v0xb2ebf0_0 .alias "input26", 31 0, v0xb38060_0; +v0xb2eb40_0 .alias "input27", 31 0, v0xb382b0_0; +v0xb2ed30_0 .alias "input28", 31 0, v0xb381c0_0; +v0xb2ec70_0 .alias "input29", 31 0, v0xb38430_0; +v0xb2ee80_0 .alias "input3", 31 0, v0xb38330_0; +v0xb2ede0_0 .alias "input30", 31 0, v0xb383b0_0; +v0xb2f010_0 .alias "input31", 31 0, v0xb385d0_0; +v0xb2ef00_0 .alias "input4", 31 0, v0xb38650_0; +v0xb2f180_0 .alias "input5", 31 0, v0xb384b0_0; +v0xb2f090_0 .alias "input6", 31 0, v0xb38530_0; +v0xb2f300_0 .alias "input7", 31 0, v0xb38810_0; +v0xb2f200_0 .alias "input8", 31 0, v0xb38890_0; +v0xb2f490_0 .alias "input9", 31 0, v0xb386d0_0; +v0xb2f380 .array "mux", 0 31; +v0xb2f380_0 .net v0xb2f380 0, 31 0, L_0xb37780; 1 drivers +v0xb2f380_1 .net v0xb2f380 1, 31 0, L_0xb3a000; 1 drivers +v0xb2f380_2 .net v0xb2f380 2, 31 0, L_0xb3b330; 1 drivers +v0xb2f380_3 .net v0xb2f380 3, 31 0, L_0xb3b450; 1 drivers +v0xb2f380_4 .net v0xb2f380 4, 31 0, L_0xb3b5a0; 1 drivers +v0xb2f380_5 .net v0xb2f380 5, 31 0, L_0xb3b6c0; 1 drivers +v0xb2f380_6 .net v0xb2f380 6, 31 0, L_0xb3b820; 1 drivers +v0xb2f380_7 .net v0xb2f380 7, 31 0, L_0xb3b910; 1 drivers +v0xb2f380_8 .net v0xb2f380 8, 31 0, L_0xb3ba30; 1 drivers +v0xb2f380_9 .net v0xb2f380 9, 31 0, L_0xb3bb50; 1 drivers +v0xb2f380_10 .net v0xb2f380 10, 31 0, L_0xb3bcd0; 1 drivers +v0xb2f380_11 .net v0xb2f380 11, 31 0, L_0xb3bdf0; 1 drivers +v0xb2f380_12 .net v0xb2f380 12, 31 0, L_0xb3bc70; 1 drivers +v0xb2f380_13 .net v0xb2f380 13, 31 0, L_0xb3c040; 1 drivers +v0xb2f380_14 .net v0xb2f380 14, 31 0, L_0xb3c1e0; 1 drivers +v0xb2f380_15 .net v0xb2f380 15, 31 0, L_0xb3c300; 1 drivers +v0xb2f380_16 .net v0xb2f380 16, 31 0, L_0xb3c4b0; 1 drivers +v0xb2f380_17 .net v0xb2f380 17, 31 0, L_0xb3c5d0; 1 drivers +v0xb2f380_18 .net v0xb2f380 18, 31 0, L_0xb3c420; 1 drivers +v0xb2f380_19 .net v0xb2f380 19, 31 0, L_0xb3c820; 1 drivers +v0xb2f380_20 .net v0xb2f380 20, 31 0, L_0xb3c6f0; 1 drivers +v0xb2f380_21 .net v0xb2f380 21, 31 0, L_0xb3ca80; 1 drivers +v0xb2f380_22 .net v0xb2f380 22, 31 0, L_0xb3c940; 1 drivers +v0xb2f380_23 .net v0xb2f380 23, 31 0, L_0xb3ccf0; 1 drivers +v0xb2f380_24 .net v0xb2f380 24, 31 0, L_0xb3cba0; 1 drivers +v0xb2f380_25 .net v0xb2f380 25, 31 0, L_0xb3cf70; 1 drivers +v0xb2f380_26 .net v0xb2f380 26, 31 0, L_0xb3ce10; 1 drivers +v0xb2f380_27 .net v0xb2f380 27, 31 0, L_0xb3d1d0; 1 drivers +v0xb2f380_28 .net v0xb2f380 28, 31 0, L_0xb3d060; 1 drivers +v0xb2f380_29 .net v0xb2f380 29, 31 0, L_0xb3d440; 1 drivers +v0xb2f380_30 .net v0xb2f380 30, 31 0, L_0xb3d2c0; 1 drivers +v0xb2f380_31 .net v0xb2f380 31, 31 0, L_0xb3d350; 1 drivers +v0xb2f400_0 .alias "out", 31 0, v0xb38a60_0; +L_0xb3d530 .array/port v0xb2f380, v0xb2b650_0; +S_0xb2bd40 .scope module, "mux2" "mux32to1by32" 3 69, 7 1, S_0xb2bc50; + .timescale 0 0; +L_0xb2c440 .functor BUFZ 32, v0xb32e40_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3da10 .functor BUFZ 32, v0xb36310_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3da70 .functor BUFZ 32, v0xb35fb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3dad0 .functor BUFZ 32, v0xb35c50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3db90 .functor BUFZ 32, v0xb358f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3dc20 .functor BUFZ 32, v0xb35590_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3dcb0 .functor BUFZ 32, v0xb35230_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3dd10 .functor BUFZ 32, v0xb34ed0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3dd70 .functor BUFZ 32, v0xb34b70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3de00 .functor BUFZ 32, v0xb34810_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3de90 .functor BUFZ 32, v0xb344b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3df20 .functor BUFZ 32, v0xb34150_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3dfb0 .functor BUFZ 32, v0xb33df0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e040 .functor BUFZ 32, v0xb33a90_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e0d0 .functor BUFZ 32, v0xb33730_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e160 .functor BUFZ 32, v0xb333d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e280 .functor BUFZ 32, v0xb31220_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e310 .functor BUFZ 32, v0xb32ae0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e1f0 .functor BUFZ 32, v0xb32780_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e440 .functor BUFZ 32, v0xb32420_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e3a0 .functor BUFZ 32, v0xb320c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e580 .functor BUFZ 32, v0xb31d60_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e4d0 .functor BUFZ 32, v0xb31a00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e6d0 .functor BUFZ 32, v0xb316a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e610 .functor BUFZ 32, v0xb304b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e830 .functor BUFZ 32, v0xb30ec0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e760 .functor BUFZ 32, v0xb30b60_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e970 .functor BUFZ 32, v0xb30850_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e890 .functor BUFZ 32, v0xb30540_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3eac0 .functor BUFZ 32, v0xb300c0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3e9d0 .functor BUFZ 32, v0xb2fd80_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3ea60 .functor BUFZ 32, v0xb2f9f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0xb3edf0 .functor BUFZ 32, L_0xb3eb20, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0xb2be30_0 .net *"_s96", 31 0, L_0xb3eb20; 1 drivers +v0xb2bef0_0 .alias "address", 4 0, v0xb38be0_0; +v0xb2bf70_0 .alias "input0", 31 0, v0xb375a0_0; +v0xb2bff0_0 .alias "input1", 31 0, v0xb37680_0; +v0xb2c0a0_0 .alias "input10", 31 0, v0xb37700_0; +v0xb2c140_0 .alias "input11", 31 0, v0xb377f0_0; +v0xb2c1e0_0 .alias "input12", 31 0, v0xb37870_0; +v0xb2c280_0 .alias "input13", 31 0, v0xb37970_0; +v0xb2c320_0 .alias "input14", 31 0, v0xb379f0_0; +v0xb2c3c0_0 .alias "input15", 31 0, v0xb378f0_0; +v0xb2c4c0_0 .alias "input16", 31 0, v0xb37b00_0; +v0xb2c560_0 .alias "input17", 31 0, v0xb37a70_0; +v0xb2c670_0 .alias "input18", 31 0, v0xb37c20_0; +v0xb2c710_0 .alias "input19", 31 0, v0xb37b80_0; +v0xb2c830_0 .alias "input2", 31 0, v0xb37d50_0; +v0xb2c8d0_0 .alias "input20", 31 0, v0xb37ca0_0; +v0xb2c790_0 .alias "input21", 31 0, v0xb37e90_0; +v0xb2ca20_0 .alias "input22", 31 0, v0xb37dd0_0; +v0xb2cb40_0 .alias "input23", 31 0, v0xb37fe0_0; +v0xb2cbc0_0 .alias "input24", 31 0, v0xb37f10_0; +v0xb2caa0_0 .alias "input25", 31 0, v0xb38140_0; +v0xb2ccf0_0 .alias "input26", 31 0, v0xb38060_0; +v0xb2cc40_0 .alias "input27", 31 0, v0xb382b0_0; +v0xb2ce30_0 .alias "input28", 31 0, v0xb381c0_0; +v0xb2cd90_0 .alias "input29", 31 0, v0xb38430_0; +v0xb2cf80_0 .alias "input3", 31 0, v0xb38330_0; +v0xb2ced0_0 .alias "input30", 31 0, v0xb383b0_0; +v0xb2d0e0_0 .alias "input31", 31 0, v0xb385d0_0; +v0xb2d020_0 .alias "input4", 31 0, v0xb38650_0; +v0xb2d250_0 .alias "input5", 31 0, v0xb384b0_0; +v0xb2d160_0 .alias "input6", 31 0, v0xb38530_0; +v0xb2d3d0_0 .alias "input7", 31 0, v0xb38810_0; +v0xb2d2d0_0 .alias "input8", 31 0, v0xb38890_0; +v0xb2d560_0 .alias "input9", 31 0, v0xb386d0_0; +v0xb2d450 .array "mux", 0 31; +v0xb2d450_0 .net v0xb2d450 0, 31 0, L_0xb2c440; 1 drivers +v0xb2d450_1 .net v0xb2d450 1, 31 0, L_0xb3da10; 1 drivers +v0xb2d450_2 .net v0xb2d450 2, 31 0, L_0xb3da70; 1 drivers +v0xb2d450_3 .net v0xb2d450 3, 31 0, L_0xb3dad0; 1 drivers +v0xb2d450_4 .net v0xb2d450 4, 31 0, L_0xb3db90; 1 drivers +v0xb2d450_5 .net v0xb2d450 5, 31 0, L_0xb3dc20; 1 drivers +v0xb2d450_6 .net v0xb2d450 6, 31 0, L_0xb3dcb0; 1 drivers +v0xb2d450_7 .net v0xb2d450 7, 31 0, L_0xb3dd10; 1 drivers +v0xb2d450_8 .net v0xb2d450 8, 31 0, L_0xb3dd70; 1 drivers +v0xb2d450_9 .net v0xb2d450 9, 31 0, L_0xb3de00; 1 drivers +v0xb2d450_10 .net v0xb2d450 10, 31 0, L_0xb3de90; 1 drivers +v0xb2d450_11 .net v0xb2d450 11, 31 0, L_0xb3df20; 1 drivers +v0xb2d450_12 .net v0xb2d450 12, 31 0, L_0xb3dfb0; 1 drivers +v0xb2d450_13 .net v0xb2d450 13, 31 0, L_0xb3e040; 1 drivers +v0xb2d450_14 .net v0xb2d450 14, 31 0, L_0xb3e0d0; 1 drivers +v0xb2d450_15 .net v0xb2d450 15, 31 0, L_0xb3e160; 1 drivers +v0xb2d450_16 .net v0xb2d450 16, 31 0, L_0xb3e280; 1 drivers +v0xb2d450_17 .net v0xb2d450 17, 31 0, L_0xb3e310; 1 drivers +v0xb2d450_18 .net v0xb2d450 18, 31 0, L_0xb3e1f0; 1 drivers +v0xb2d450_19 .net v0xb2d450 19, 31 0, L_0xb3e440; 1 drivers +v0xb2d450_20 .net v0xb2d450 20, 31 0, L_0xb3e3a0; 1 drivers +v0xb2d450_21 .net v0xb2d450 21, 31 0, L_0xb3e580; 1 drivers +v0xb2d450_22 .net v0xb2d450 22, 31 0, L_0xb3e4d0; 1 drivers +v0xb2d450_23 .net v0xb2d450 23, 31 0, L_0xb3e6d0; 1 drivers +v0xb2d450_24 .net v0xb2d450 24, 31 0, L_0xb3e610; 1 drivers +v0xb2d450_25 .net v0xb2d450 25, 31 0, L_0xb3e830; 1 drivers +v0xb2d450_26 .net v0xb2d450 26, 31 0, L_0xb3e760; 1 drivers +v0xb2d450_27 .net v0xb2d450 27, 31 0, L_0xb3e970; 1 drivers +v0xb2d450_28 .net v0xb2d450 28, 31 0, L_0xb3e890; 1 drivers +v0xb2d450_29 .net v0xb2d450 29, 31 0, L_0xb3eac0; 1 drivers +v0xb2d450_30 .net v0xb2d450 30, 31 0, L_0xb3e9d0; 1 drivers +v0xb2d450_31 .net v0xb2d450 31, 31 0, L_0xb3ea60; 1 drivers +v0xb2db30_0 .alias "out", 31 0, v0xb38ae0_0; +L_0xb3eb20 .array/port v0xb2d450, v0xb2b700_0; +S_0xaf7df0 .scope module, "tester" "hw4testbench" 2 35, 2 77, S_0xb18440; + .timescale 0 0; +v0xb2b450_0 .var "Clk", 0 0; +v0xb2b510_0 .alias "ReadData1", 31 0, v0xb38a60_0; +v0xb2b5b0_0 .alias "ReadData2", 31 0, v0xb38ae0_0; +v0xb2b650_0 .var "ReadRegister1", 4 0; +v0xb2b700_0 .var "ReadRegister2", 4 0; +v0xb2b7a0_0 .var "RegWrite", 0 0; +v0xb2b880_0 .var "WriteData", 31 0; +v0xb2b920_0 .var "WriteRegister", 4 0; +v0xb2ba10_0 .net "begintest", 0 0, v0xb38de0_0; 1 drivers +v0xb2bab0_0 .var "dutpassed", 0 0; +v0xb2bbb0_0 .var "endtest", 0 0; +E_0xaf91f0 .event posedge, v0xb2ba10_0; +S_0xb2b2a0 .scope task, "resetReg" "resetReg" 2 97, 2 97, S_0xaf7df0; + .timescale 0 0; +v0xb2b390_0 .var/i "i", 31 0; +TD_hw4testbenchharness.tester.resetReg ; + %set/v v0xb2b7a0_0, 1, 1; + %set/v v0xb2b880_0, 0, 32; + %set/v v0xb2b390_0, 0, 32; +T_0.0 ; + %load/v 8, v0xb2b390_0, 32; + %cmpi/s 8, 32, 32; + %jmp/0xz T_0.1, 5; + %load/v 8, v0xb2b390_0, 32; + %set/v v0xb2b920_0, 8, 5; + %delay 5, 0; + %set/v v0xb2b450_0, 1, 1; + %delay 5, 0; + %set/v v0xb2b450_0, 0, 1; + %ix/load 0, 1, 0; + %load/vp0/s 8, v0xb2b390_0, 32; + %set/v v0xb2b390_0, 8, 32; + %jmp T_0.0; +T_0.1 ; + %set/v v0xb2b880_0, 0, 32; + %set/v v0xb2b650_0, 0, 5; + %set/v v0xb2b700_0, 0, 5; + %set/v v0xb2b920_0, 0, 5; + %set/v v0xb2b7a0_0, 0, 1; + %end; +S_0xb05970 .scope task, "test" "test" 2 118, 2 118, S_0xaf7df0; + .timescale 0 0; +v0xae5920_0 .var/i "expectedReadData1", 31 0; +v0xb2b200_0 .var/i "expectedReadData2", 31 0; +TD_hw4testbenchharness.tester.test ; + %delay 5, 0; + %set/v v0xb2b450_0, 1, 1; + %delay 5, 0; + %set/v v0xb2b450_0, 0, 1; + %load/v 8, v0xb2b510_0, 32; + %load/v 40, v0xae5920_0, 32; + %cmp/u 8, 40, 32; + %inv 4, 1; + %mov 8, 4, 1; + %load/v 9, v0xb2b5b0_0, 32; + %load/v 41, v0xb2b200_0, 32; + %cmp/u 9, 41, 32; + %inv 4, 1; + %or 8, 4, 1; + %jmp/0xz T_1.2, 8; + %vpi_call 2 126 "$display", "Test Case Failed"; + %set/v v0xb2bab0_0, 0, 1; +T_1.2 ; + %vpi_call 2 129 "$display", "Expected: %2d, %2d", v0xae5920_0, v0xb2b200_0; + %vpi_call 2 130 "$display", "Got: %2d, %2d\012", v0xb2b510_0, v0xb2b5b0_0; + %fork TD_hw4testbenchharness.tester.resetReg, S_0xb2b2a0; + %join; + %end; +S_0xaf8560 .scope module, "mux32to1by1" "mux32to1by1" 8 1; + .timescale 0 0; +v0xb38f60_0 .net "address", 4 0, C4; 0 drivers +v0xb38fe0_0 .net "inputs", 31 0, C4; 0 drivers +v0xb39060_0 .net "mux", 0 0, C4; 0 drivers +v0xb390e0_0 .net "out", 0 0, L_0xb3eee0; 1 drivers +L_0xb3eee0 .part/v C4, C4, 1; + .scope S_0xb36460; +T_2 ; + %wait E_0xb2f600; + %set/v v0xb32e40_0, 0, 32; + %jmp T_2; + .thread T_2; + .scope S_0xb36100; +T_3 ; + %wait E_0xb2f600; + %load/v 8, v0xb363e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_3.0, 4; + %load/v 8, v0xb36290_0, 32; + %set/v v0xb36310_0, 8, 32; +T_3.0 ; + %jmp T_3; + .thread T_3; + .scope S_0xb35da0; +T_4 ; + %wait E_0xb2f600; + %load/v 8, v0xb36080_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_4.0, 4; + %load/v 8, v0xb35f30_0, 32; + %set/v v0xb35fb0_0, 8, 32; +T_4.0 ; + %jmp T_4; + .thread T_4; + .scope S_0xb35a40; +T_5 ; + %wait E_0xb2f600; + %load/v 8, v0xb35d20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_5.0, 4; + %load/v 8, v0xb35bd0_0, 32; + %set/v v0xb35c50_0, 8, 32; +T_5.0 ; + %jmp T_5; + .thread T_5; + .scope S_0xb356e0; +T_6 ; + %wait E_0xb2f600; + %load/v 8, v0xb359c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_6.0, 4; + %load/v 8, v0xb35870_0, 32; + %set/v v0xb358f0_0, 8, 32; +T_6.0 ; + %jmp T_6; + .thread T_6; + .scope S_0xb35380; +T_7 ; + %wait E_0xb2f600; + %load/v 8, v0xb35660_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_7.0, 4; + %load/v 8, v0xb35510_0, 32; + %set/v v0xb35590_0, 8, 32; +T_7.0 ; + %jmp T_7; + .thread T_7; + .scope S_0xb35020; +T_8 ; + %wait E_0xb2f600; + %load/v 8, v0xb35300_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_8.0, 4; + %load/v 8, v0xb351b0_0, 32; + %set/v v0xb35230_0, 8, 32; +T_8.0 ; + %jmp T_8; + .thread T_8; + .scope S_0xb34cc0; +T_9 ; + %wait E_0xb2f600; + %load/v 8, v0xb34fa0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_9.0, 4; + %load/v 8, v0xb34e50_0, 32; + %set/v v0xb34ed0_0, 8, 32; +T_9.0 ; + %jmp T_9; + .thread T_9; + .scope S_0xb34960; +T_10 ; + %wait E_0xb2f600; + %load/v 8, v0xb34c40_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_10.0, 4; + %load/v 8, v0xb34af0_0, 32; + %set/v v0xb34b70_0, 8, 32; +T_10.0 ; + %jmp T_10; + .thread T_10; + .scope S_0xb34600; +T_11 ; + %wait E_0xb2f600; + %load/v 8, v0xb348e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_11.0, 4; + %load/v 8, v0xb34790_0, 32; + %set/v v0xb34810_0, 8, 32; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0xb342a0; +T_12 ; + %wait E_0xb2f600; + %load/v 8, v0xb34580_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_12.0, 4; + %load/v 8, v0xb34430_0, 32; + %set/v v0xb344b0_0, 8, 32; +T_12.0 ; + %jmp T_12; + .thread T_12; + .scope S_0xb33f40; +T_13 ; + %wait E_0xb2f600; + %load/v 8, v0xb34220_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_13.0, 4; + %load/v 8, v0xb340d0_0, 32; + %set/v v0xb34150_0, 8, 32; +T_13.0 ; + %jmp T_13; + .thread T_13; + .scope S_0xb33be0; +T_14 ; + %wait E_0xb2f600; + %load/v 8, v0xb33ec0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_14.0, 4; + %load/v 8, v0xb33d70_0, 32; + %set/v v0xb33df0_0, 8, 32; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0xb33880; +T_15 ; + %wait E_0xb2f600; + %load/v 8, v0xb33b60_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_15.0, 4; + %load/v 8, v0xb33a10_0, 32; + %set/v v0xb33a90_0, 8, 32; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0xb33520; +T_16 ; + %wait E_0xb2f600; + %load/v 8, v0xb33800_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_16.0, 4; + %load/v 8, v0xb336b0_0, 32; + %set/v v0xb33730_0, 8, 32; +T_16.0 ; + %jmp T_16; + .thread T_16; + .scope S_0xb331e0; +T_17 ; + %wait E_0xb2f600; + %load/v 8, v0xb334a0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_17.0, 4; + %load/v 8, v0xb33350_0, 32; + %set/v v0xb333d0_0, 8, 32; +T_17.0 ; + %jmp T_17; + .thread T_17; + .scope S_0xb32c30; +T_18 ; + %wait E_0xb2f600; + %load/v 8, v0xb312f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_18.0, 4; + %load/v 8, v0xb311a0_0, 32; + %set/v v0xb31220_0, 8, 32; +T_18.0 ; + %jmp T_18; + .thread T_18; + .scope S_0xb328d0; +T_19 ; + %wait E_0xb2f600; + %load/v 8, v0xb32bb0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_19.0, 4; + %load/v 8, v0xb32a60_0, 32; + %set/v v0xb32ae0_0, 8, 32; +T_19.0 ; + %jmp T_19; + .thread T_19; + .scope S_0xb32570; +T_20 ; + %wait E_0xb2f600; + %load/v 8, v0xb32850_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_20.0, 4; + %load/v 8, v0xb32700_0, 32; + %set/v v0xb32780_0, 8, 32; +T_20.0 ; + %jmp T_20; + .thread T_20; + .scope S_0xb32210; +T_21 ; + %wait E_0xb2f600; + %load/v 8, v0xb324f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_21.0, 4; + %load/v 8, v0xb323a0_0, 32; + %set/v v0xb32420_0, 8, 32; +T_21.0 ; + %jmp T_21; + .thread T_21; + .scope S_0xb31eb0; +T_22 ; + %wait E_0xb2f600; + %load/v 8, v0xb32190_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_22.0, 4; + %load/v 8, v0xb32040_0, 32; + %set/v v0xb320c0_0, 8, 32; +T_22.0 ; + %jmp T_22; + .thread T_22; + .scope S_0xb31b50; +T_23 ; + %wait E_0xb2f600; + %load/v 8, v0xb31e30_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_23.0, 4; + %load/v 8, v0xb31ce0_0, 32; + %set/v v0xb31d60_0, 8, 32; +T_23.0 ; + %jmp T_23; + .thread T_23; + .scope S_0xb317f0; +T_24 ; + %wait E_0xb2f600; + %load/v 8, v0xb31ad0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_24.0, 4; + %load/v 8, v0xb31980_0, 32; + %set/v v0xb31a00_0, 8, 32; +T_24.0 ; + %jmp T_24; + .thread T_24; + .scope S_0xb31490; +T_25 ; + %wait E_0xb2f600; + %load/v 8, v0xb31770_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_25.0, 4; + %load/v 8, v0xb31620_0, 32; + %set/v v0xb316a0_0, 8, 32; +T_25.0 ; + %jmp T_25; + .thread T_25; + .scope S_0xb31010; +T_26 ; + %wait E_0xb2f600; + %load/v 8, v0xb31410_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_26.0, 4; + %load/v 8, v0xb303a0_0, 32; + %set/v v0xb304b0_0, 8, 32; +T_26.0 ; + %jmp T_26; + .thread T_26; + .scope S_0xb30cb0; +T_27 ; + %wait E_0xb2f600; + %load/v 8, v0xb30f90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_27.0, 4; + %load/v 8, v0xb30e40_0, 32; + %set/v v0xb30ec0_0, 8, 32; +T_27.0 ; + %jmp T_27; + .thread T_27; + .scope S_0xb30950; +T_28 ; + %wait E_0xb2f600; + %load/v 8, v0xb30c30_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_28.0, 4; + %load/v 8, v0xb30ae0_0, 32; + %set/v v0xb30b60_0, 8, 32; +T_28.0 ; + %jmp T_28; + .thread T_28; + .scope S_0xb30640; +T_29 ; + %wait E_0xb2f600; + %load/v 8, v0xb308d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_29.0, 4; + %load/v 8, v0xb307d0_0, 32; + %set/v v0xb30850_0, 8, 32; +T_29.0 ; + %jmp T_29; + .thread T_29; + .scope S_0xb30210; +T_30 ; + %wait E_0xb2f600; + %load/v 8, v0xb305c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_30.0, 4; + %load/v 8, v0xb30430_0, 32; + %set/v v0xb30540_0, 8, 32; +T_30.0 ; + %jmp T_30; + .thread T_30; + .scope S_0xb2fed0; +T_31 ; + %wait E_0xb2f600; + %load/v 8, v0xb30190_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_31.0, 4; + %load/v 8, v0xb30040_0, 32; + %set/v v0xb300c0_0, 8, 32; +T_31.0 ; + %jmp T_31; + .thread T_31; + .scope S_0xb2faf0; +T_32 ; + %wait E_0xb2f600; + %load/v 8, v0xb2fe50_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_32.0, 4; + %load/v 8, v0xb2fcb0_0, 32; + %set/v v0xb2fd80_0, 8, 32; +T_32.0 ; + %jmp T_32; + .thread T_32; + .scope S_0xb2f510; +T_33 ; + %wait E_0xb2f600; + %load/v 8, v0xb2fa70_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_33.0, 4; + %load/v 8, v0xb2f940_0, 32; + %set/v v0xb2f9f0_0, 8, 32; +T_33.0 ; + %jmp T_33; + .thread T_33; + .scope S_0xaf7df0; +T_34 ; + %set/v v0xb2b880_0, 0, 32; + %set/v v0xb2b650_0, 0, 5; + %set/v v0xb2b700_0, 0, 5; + %set/v v0xb2b920_0, 0, 5; + %set/v v0xb2b7a0_0, 0, 1; + %set/v v0xb2b450_0, 0, 1; + %end; + .thread T_34; + .scope S_0xaf7df0; +T_35 ; + %wait E_0xaf91f0; + %set/v v0xb2bbb0_0, 0, 1; + %set/v v0xb2bab0_0, 1, 1; + %delay 10, 0; + %movi 8, 2, 5; + %set/v v0xb2b920_0, 8, 5; + %movi 8, 42, 32; + %set/v v0xb2b880_0, 8, 32; + %set/v v0xb2b7a0_0, 1, 1; + %movi 8, 2, 5; + %set/v v0xb2b650_0, 8, 5; + %movi 8, 2, 5; + %set/v v0xb2b700_0, 8, 5; + %movi 8, 42, 32; + %set/v v0xae5920_0, 8, 32; + %movi 8, 42, 32; + %set/v v0xb2b200_0, 8, 32; + %fork TD_hw4testbenchharness.tester.test, S_0xb05970; + %join; + %movi 8, 2, 5; + %set/v v0xb2b920_0, 8, 5; + %movi 8, 15, 32; + %set/v v0xb2b880_0, 8, 32; + %set/v v0xb2b7a0_0, 1, 1; + %movi 8, 2, 5; + %set/v v0xb2b650_0, 8, 5; + %movi 8, 2, 5; + %set/v v0xb2b700_0, 8, 5; + %movi 8, 15, 32; + %set/v v0xae5920_0, 8, 32; + %movi 8, 15, 32; + %set/v v0xb2b200_0, 8, 32; + %fork TD_hw4testbenchharness.tester.test, S_0xb05970; + %join; + %movi 8, 2, 5; + %set/v v0xb2b920_0, 8, 5; + %movi 8, 15, 32; + %set/v v0xb2b880_0, 8, 32; + %set/v v0xb2b7a0_0, 0, 1; + %movi 8, 2, 5; + %set/v v0xb2b650_0, 8, 5; + %movi 8, 3, 5; + %set/v v0xb2b700_0, 8, 5; + %set/v v0xae5920_0, 0, 32; + %set/v v0xb2b200_0, 0, 32; + %fork TD_hw4testbenchharness.tester.test, S_0xb05970; + %join; + %movi 8, 2, 5; + %set/v v0xb2b920_0, 8, 5; + %movi 8, 15, 32; + %set/v v0xb2b880_0, 8, 32; + %set/v v0xb2b7a0_0, 1, 1; + %movi 8, 1, 5; + %set/v v0xb2b650_0, 8, 5; + %movi 8, 3, 5; + %set/v v0xb2b700_0, 8, 5; + %set/v v0xae5920_0, 0, 32; + %set/v v0xb2b200_0, 0, 32; + %fork TD_hw4testbenchharness.tester.test, S_0xb05970; + %join; + %set/v v0xb2b920_0, 0, 5; + %movi 8, 10, 32; + %set/v v0xb2b880_0, 8, 32; + %set/v v0xb2b7a0_0, 1, 1; + %set/v v0xb2b650_0, 0, 5; + %set/v v0xb2b700_0, 0, 5; + %set/v v0xae5920_0, 0, 32; + %set/v v0xb2b200_0, 0, 32; + %fork TD_hw4testbenchharness.tester.test, S_0xb05970; + %join; + %movi 8, 7, 5; + %set/v v0xb2b920_0, 8, 5; + %movi 8, 10, 32; + %set/v v0xb2b880_0, 8, 32; + %set/v v0xb2b7a0_0, 1, 1; + %movi 8, 7, 5; + %set/v v0xb2b650_0, 8, 5; + %movi 8, 14, 5; + %set/v v0xb2b700_0, 8, 5; + %movi 8, 10, 32; + %set/v v0xae5920_0, 8, 32; + %set/v v0xb2b200_0, 0, 32; + %fork TD_hw4testbenchharness.tester.test, S_0xb05970; + %join; + %delay 5, 0; + %set/v v0xb2bbb0_0, 1, 1; + %jmp T_35; + .thread T_35; + .scope S_0xb18440; +T_36 ; + %set/v v0xb38de0_0, 0, 1; + %delay 10, 0; + %set/v v0xb38de0_0, 1, 1; + %delay 1000, 0; + %end; + .thread T_36; + .scope S_0xb18440; +T_37 ; + %wait E_0xaf6590; + %vpi_call 2 60 "$display", "DUT passed?: %b", v0xb38e60_0; + %jmp T_37; + .thread T_37; +# The file index is used to find the file name in the following table. +:file_names 9; + "N/A"; + ""; + "regfile.t.v"; + "./regfile.v"; + "./decoders.v"; + "./register32zero.v"; + "./register32.v"; + "./mux32to1by32.v"; + "./mux32to1by1.v"; diff --git a/regfile.t.v b/regfile.t.v new file mode 100644 index 0000000..b5aa9e6 --- /dev/null +++ b/regfile.t.v @@ -0,0 +1,219 @@ +//------------------------------------------------------------------------------ +// Test harness validates hw4testbench by connecting it to various functional +// or broken register files, and verifying that it correctly identifies each +//------------------------------------------------------------------------------ +`include "regfile.v" + +module hw4testbenchharness(); + + wire[31:0] ReadData1; // Data from first register read + wire[31:0] ReadData2; // Data from second register read + wire[31:0] WriteData; // Data to write to register + wire[4:0] ReadRegister1; // Address of first register to read + wire[4:0] ReadRegister2; // Address of second register to read + wire[4:0] WriteRegister; // Address of register to write + wire RegWrite; // Enable writing of register when High + wire Clk; // Clock (Positive Edge Triggered) + + reg begintest; // Set High to begin testing register file + wire dutpassed; // Indicates whether register file passed tests + + // Instantiate the register file being tested. DUT = Device Under Test + regfile DUT + ( + .ReadData1(ReadData1), + .ReadData2(ReadData2), + .WriteData(WriteData), + .ReadRegister1(ReadRegister1), + .ReadRegister2(ReadRegister2), + .WriteRegister(WriteRegister), + .RegWrite(RegWrite), + .Clk(Clk) + ); + + // Instantiate test bench to test the DUT + hw4testbench tester + ( + .begintest(begintest), + .endtest(endtest), + .dutpassed(dutpassed), + .ReadData1(ReadData1), + .ReadData2(ReadData2), + .WriteData(WriteData), + .ReadRegister1(ReadRegister1), + .ReadRegister2(ReadRegister2), + .WriteRegister(WriteRegister), + .RegWrite(RegWrite), + .Clk(Clk) + ); + + // Test harness asserts 'begintest' for 1000 time steps, starting at time 10 + initial begin + begintest=0; + #10; + begintest=1; + #1000; + end + + // Display test results ('dutpassed' signal) once 'endtest' goes high + always @(posedge endtest) begin + $display("DUT passed?: %b", dutpassed); + end + +endmodule + + +//------------------------------------------------------------------------------ +// Your HW4 test bench +// Generates signals to drive register file and passes them back up one +// layer to the test harness. This lets us plug in various working and +// broken register files to test. +// +// Once 'begintest' is asserted, begin testing the register file. +// Once your test is conclusive, set 'dutpassed' appropriately and then +// raise 'endtest'. +//------------------------------------------------------------------------------ + +module hw4testbench +( +// Test bench driver signal connections +input begintest, // Triggers start of testing +output reg endtest, // Raise once test completes +output reg dutpassed, // Signal test result + +// Register File DUT connections +input[31:0] ReadData1, +input[31:0] ReadData2, +output reg[31:0] WriteData, +output reg[4:0] ReadRegister1, +output reg[4:0] ReadRegister2, +output reg[4:0] WriteRegister, +output reg RegWrite, +output reg Clk +); + + + // Call this after every test to reset everything + task resetReg; + integer i; + begin + //$display("Resetting..."); + RegWrite=1; + WriteData=32'd0; + for (i=0;i<32; i=i+1) begin + WriteRegister=i; + #5 Clk=1; #5 Clk=0; + end + WriteData=0; + ReadRegister1=0; + ReadRegister2=0; + WriteRegister=0; + RegWrite=0; + end + endtask + + // Runs test and confirms that the results in ReadData are the same + // as the expected values + // Takes two expected values as inputs. + task test; + input expectedReadData1, expectedReadData2; + integer expectedReadData1, expectedReadData2; + integer i; + + begin + #5 Clk=1; #5 Clk=0; + if((ReadData1 != expectedReadData1) || (ReadData2 != expectedReadData2)) begin + $display("Test Case Failed"); + dutpassed=0; + end + $display("Expected: %2d, %2d", expectedReadData1, expectedReadData2); + $display("Got: %2d, %2d\n", ReadData1, ReadData2); + resetReg; + end + endtask + + // Initialize register driver signals + initial begin + WriteData=32'd0; + ReadRegister1=5'd0; + ReadRegister2=5'd0; + WriteRegister=5'd0; + RegWrite=0; + Clk=0; + end + + // Once 'begintest' is asserted, start running test cases + always @(posedge begintest) begin + endtest = 0; + dutpassed = 1; + #10 + + // Test Case 1: + // Write '42' to register 2, verify with Read Ports 1 and 2 + WriteRegister = 5'd2; + WriteData = 32'd42; + RegWrite = 1; + ReadRegister1 = 5'd2; + ReadRegister2 = 5'd2; + + test(42, 42); + + + // Test Case 2: + // Write '15' to register 2, verify with Read Ports 1 and 2 + WriteRegister = 5'd2; + WriteData = 32'd15; + RegWrite = 1; + ReadRegister1 = 5'd2; + ReadRegister2 = 5'd2; + + test(15, 15); + + // Test Case 3: + // Set RegWrite to false, verify that no registers are being written + WriteRegister = 5'd2; + WriteData = 32'd15; + RegWrite = 0; + ReadRegister1 = 5'd2; + ReadRegister2 = 5'd3; + + test(0, 0); + + // Test Case 4: + // Check if decoder is broken and all registers are being written to + WriteRegister = 5'd2; + WriteData = 32'd15; + RegWrite = 1; + ReadRegister1 = 5'd1; + ReadRegister2 = 5'd3; + + test(0, 0); + + // Test Case 5: + // Verify that register 0 is not an actual register but a constant 0 + WriteRegister = 5'd0; + WriteData = 32'd10; + RegWrite = 1; + ReadRegister1 = 5'd0; + ReadRegister2 = 5'd0; + + test(0, 0); + + // Test Case 6: + // Verify that register 0 is not an actual register but a constant 0 + WriteRegister = 5'd7; + WriteData = 32'd10; + RegWrite = 1; + ReadRegister1 = 5'd7; + ReadRegister2 = 5'd14; + + test(10, 0); + + + // All done! Wait a moment and signal test completion. + #5 + endtest = 1; + +end + +endmodule \ No newline at end of file diff --git a/regfile.v b/regfile.v new file mode 100644 index 0000000..5115346 --- /dev/null +++ b/regfile.v @@ -0,0 +1,71 @@ +//------------------------------------------------------------------------------ +// MIPS register file +// width: 32 bits +// depth: 32 words (reg[0] is static zero register) +// 2 asynchronous read ports +// 1 synchronous, positive edge triggered write port +//------------------------------------------------------------------------------ +`include "register32zero.v" +`include "register32.v" +`include "mux32to1by1.v" +`include "decoders.v" +`include "mux32to1by32.v" + + +module regfile +( +output[31:0] ReadData1, // Contents of first register read +output[31:0] ReadData2, // Contents of second register read +input[31:0] WriteData, // Contents to write to register +input[4:0] ReadRegister1, // Address of first register to read +input[4:0] ReadRegister2, // Address of second register to read +input[4:0] WriteRegister, // Address of register to write +input RegWrite, // Enable writing of register when High +input Clk // Clock (Positive Edge Triggered) +); + + + wire[31:0] decoder; + wire[31:0] reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; + wire[31:0] reg10, reg11, reg12, reg13, reg14, reg15, reg16, reg17, reg18, reg19; + wire[31:0] reg20, reg21, reg22, reg23, reg24, reg25, reg26, reg27, reg28, reg29; + wire[31:0] reg30, reg31; + + decoder1to32 dec(decoder, RegWrite, WriteRegister); + register32zero r0(reg0, WriteData, decoder[0], Clk); + register32 r1(reg1, WriteData, decoder[1], Clk); + register32 r2(reg2, WriteData, decoder[2], Clk); + register32 r3(reg3, WriteData, decoder[3], Clk); + register32 r4(reg4, WriteData, decoder[4], Clk); + register32 r5(reg5, WriteData, decoder[5], Clk); + register32 r6(reg6, WriteData, decoder[6], Clk); + register32 r7(reg7, WriteData, decoder[7], Clk); + register32 r8(reg8, WriteData, decoder[8], Clk); + register32 r9(reg9, WriteData, decoder[9], Clk); + register32 r10(reg10, WriteData, decoder[10], Clk); + register32 r11(reg11, WriteData, decoder[11], Clk); + register32 r12(reg12, WriteData, decoder[12], Clk); + register32 r13(reg13, WriteData, decoder[13], Clk); + register32 r14(reg14, WriteData, decoder[14], Clk); + register32 r15(reg15, WriteData, decoder[15], Clk); + register32 r16(reg16, WriteData, decoder[16], Clk); + register32 r17(reg17, WriteData, decoder[17], Clk); + register32 r18(reg18, WriteData, decoder[18], Clk); + register32 r19(reg19, WriteData, decoder[19], Clk); + register32 r20(reg20, WriteData, decoder[20], Clk); + register32 r21(reg21, WriteData, decoder[21], Clk); + register32 r22(reg22, WriteData, decoder[22], Clk); + register32 r23(reg23, WriteData, decoder[23], Clk); + register32 r24(reg24, WriteData, decoder[24], Clk); + register32 r25(reg25, WriteData, decoder[25], Clk); + register32 r26(reg26, WriteData, decoder[26], Clk); + register32 r27(reg27, WriteData, decoder[27], Clk); + register32 r28(reg28, WriteData, decoder[28], Clk); + register32 r29(reg29, WriteData, decoder[29], Clk); + register32 r30(reg30, WriteData, decoder[30], Clk); + register32 r31(reg31, WriteData, decoder[31], Clk); + + mux32to1by32 mux1(ReadData1, ReadRegister1, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23, reg24, reg25, reg26, reg27, reg28, reg29, reg30, reg31); + mux32to1by32 mux2(ReadData2, ReadRegister2, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23, reg24, reg25, reg26, reg27, reg28, reg29, reg30, reg31); + +endmodule \ No newline at end of file diff --git a/register.v b/register.v new file mode 100644 index 0000000..ea0c54a --- /dev/null +++ b/register.v @@ -0,0 +1,72 @@ +// This is the register we will use + +//------------------------------------------------------------------------------ +// MIPS register file +// width: 32 bits +// depth: 32 words (reg[0] is static zero register) +// 2 asynchronous read ports +// 1 synchronous, positive edge triggered write port +//------------------------------------------------------------------------------ +`include "register32zero.v" +`include "register32.v" +`include "mux32to1by1.v" +`include "decoders.v" +`include "mux32to1by32.v" + + +module regfile +( +output[31:0] ReadData1, // Contents of first register read +output[31:0] ReadData2, // Contents of second register read +input[31:0] WriteData, // Contents to write to register +input[4:0] ReadRegister1, // Address of first register to read +input[4:0] ReadRegister2, // Address of second register to read +input[4:0] WriteRegister, // Address of register to write +input RegWrite, // Enable writing of register when High +input Clk // Clock (Positive Edge Triggered) +); + + wire[31:0] decoder; + wire[31:0] reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9; + wire[31:0] reg10, reg11, reg12, reg13, reg14, reg15, reg16, reg17, reg18, reg19; + wire[31:0] reg20, reg21, reg22, reg23, reg24, reg25, reg26, reg27, reg28, reg29; + wire[31:0] reg30, reg31; + + decoder1to32 dec(decoder, RegWrite, WriteRegister); + register32zero r0(reg0, WriteData, decoder[0], Clk); + register32 r1(reg1, WriteData, decoder[1], Clk); + register32 r2(reg2, WriteData, decoder[2], Clk); + register32 r3(reg3, WriteData, decoder[3], Clk); + register32 r4(reg4, WriteData, decoder[4], Clk); + register32 r5(reg5, WriteData, decoder[5], Clk); + register32 r6(reg6, WriteData, decoder[6], Clk); + register32 r7(reg7, WriteData, decoder[7], Clk); + register32 r8(reg8, WriteData, decoder[8], Clk); + register32 r9(reg9, WriteData, decoder[9], Clk); + register32 r10(reg10, WriteData, decoder[10], Clk); + register32 r11(reg11, WriteData, decoder[11], Clk); + register32 r12(reg12, WriteData, decoder[12], Clk); + register32 r13(reg13, WriteData, decoder[13], Clk); + register32 r14(reg14, WriteData, decoder[14], Clk); + register32 r15(reg15, WriteData, decoder[15], Clk); + register32 r16(reg16, WriteData, decoder[16], Clk); + register32 r17(reg17, WriteData, decoder[17], Clk); + register32 r18(reg18, WriteData, decoder[18], Clk); + register32 r19(reg19, WriteData, decoder[19], Clk); + register32 r20(reg20, WriteData, decoder[20], Clk); + register32 r21(reg21, WriteData, decoder[21], Clk); + register32 r22(reg22, WriteData, decoder[22], Clk); + register32 r23(reg23, WriteData, decoder[23], Clk); + register32 r24(reg24, WriteData, decoder[24], Clk); + register32 r25(reg25, WriteData, decoder[25], Clk); + register32 r26(reg26, WriteData, decoder[26], Clk); + register32 r27(reg27, WriteData, decoder[27], Clk); + register32 r28(reg28, WriteData, decoder[28], Clk); + register32 r29(reg29, WriteData, decoder[29], Clk); + register32 r30(reg30, WriteData, decoder[30], Clk); + register32 r31(reg31, WriteData, decoder[31], Clk); + + mux32to1by32 mux1(ReadData1, ReadRegister1, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23, reg24, reg25, reg26, reg27, reg28, reg29, reg30, reg31); + mux32to1by32 mux2(ReadData2, ReadRegister2, reg0, reg1, reg2, reg3, reg4, reg5, reg6, reg7, reg8, reg9, reg10, reg11, reg12, reg13, reg14, reg15, reg16, reg17, reg18, reg19, reg20, reg21, reg22, reg23, reg24, reg25, reg26, reg27, reg28, reg29, reg30, reg31); + +endmodule \ No newline at end of file diff --git a/register32.v b/register32.v new file mode 100644 index 0000000..d8f1ec1 --- /dev/null +++ b/register32.v @@ -0,0 +1,14 @@ +module register32 +( +output reg[31:0] q, +input[31:0] d, +input wrenable, +input clk +); + + always @(posedge clk) begin + if (wrenable == 1) + q = d; + end + +endmodule diff --git a/register32test.t.v b/register32test.t.v new file mode 100644 index 0000000..6b43fd5 --- /dev/null +++ b/register32test.t.v @@ -0,0 +1,30 @@ +`timescale 1 ns / 1 ps +`include "regfile.v" +`include "register32.v" + +module register32test(); + wire[31:0] out; + reg[31:0] in; + reg wrenable, clk; + + register32 register(out, in, wrenable, clk); + + integer numTests = 2; + integer numTestsPassed = 0; + initial begin + wrenable = 1; + in=32'b0000000000000000000000000000001; #5000 + #5 clk=1; #5 clk=0; // Generate single clock pulse + if (in == out) begin + numTestsPassed = numTestsPassed + 1; + end + in=32'b0000000000011000000000000000001; #5000 + #5 clk=1; #5 clk=0; // Generate single clock pulse + if (in == out) begin + numTestsPassed = numTestsPassed + 1; + end + + $display("%2d / %2d tests passed.", numTestsPassed, numTests); + end + + endmodule \ No newline at end of file diff --git a/register32zero.v b/register32zero.v new file mode 100644 index 0000000..26e5147 --- /dev/null +++ b/register32zero.v @@ -0,0 +1,12 @@ +module register32zero +( +output reg[31:0] q, +input[31:0] d, +input wrenable, +input clk +); + always @(posedge clk) begin + q = 0; + end + +endmodule diff --git a/register32zeroTest.t.v b/register32zeroTest.t.v new file mode 100644 index 0000000..024e05b --- /dev/null +++ b/register32zeroTest.t.v @@ -0,0 +1,29 @@ +`timescale 1 ns / 1 ps +`include "register32zero.v" + +module register32test(); + wire[31:0] out; + reg[31:0] in; + reg wrenable, clk; + + register32zero zeroRegister(out, in, wrenable, clk); + + integer numTests = 2; + integer numTestsPassed = 0; + initial begin + wrenable = 1; + in=32'b1111000000000000000000000000001; #5000 + #5 clk=1; #5 clk=0; // Generate single clock pulse + if (out == 0) begin + numTestsPassed = numTestsPassed + 1; + end + in=32'b0000000000011000000000000000001; #5000 + #5 clk=1; #5 clk=0; // Generate single clock pulse + if (out == 0) begin + numTestsPassed = numTestsPassed + 1; + end + + $display("%2d / %2d tests passed.", numTestsPassed, numTests); + end + + endmodule \ No newline at end of file diff --git a/settings.mk b/settings.mk new file mode 100644 index 0000000..daedef0 --- /dev/null +++ b/settings.mk @@ -0,0 +1,18 @@ +# Project-specific settings + +## Assembly settings + +# Assembly program (minus .asm extension) +PROGRAM := fib_func + +# Memory image(s) to create from the assembly program +MEMDUMP := $(PROGRAM).text.hex + + +## Verilog settings + +# Top-level module/filename (minus .v/.t.v extension) +TOPLEVEL := cpu + +# All circuits included by the toplevel $(TOPLEVEL).t.v +CIRCUITS := $(TOPLEVEL).v counter.v diff --git a/slt.v b/slt.v new file mode 100644 index 0000000..2d79d3b --- /dev/null +++ b/slt.v @@ -0,0 +1,107 @@ +module single_slt + ( + output out, + input a, + input b, + input defaultCompare + ); + wire abxor; + wire bxorand; + wire xornot; + wire xornotand; + xor axb(abxor, a, b); + and baxb(bxorand, b, abxor); + not invxor(xornot, abxor); + and xorandinput(xornotand, xornot, defaultCompare); + or compare(out, bxorand, xornotand); +endmodule + +module single_slt_reversed + ( + output out, + input a, + input b, + input defaultCompare + ); + wire abxor; + wire axorand; + wire xornot; + wire xornotand; + xor axb(abxor, a, b); + and aaxb(axorand, a, abxor); + not invxor(xornot, abxor); + and xorandinput(xornotand, xornot, defaultCompare); + or compare(out, axorand, xornotand); +endmodule + +module full_slt_32bit + ( + output[31:0] out, + input[31:0] a, + input[31:0] b + ); + wire slt0; + wire slt1; + wire slt2; + wire slt3; + wire slt4; + wire slt5; + wire slt6; + wire slt7; + wire slt8; + wire slt9; + wire slt10; + wire slt11; + wire slt12; + wire slt13; + wire slt14; + wire slt15; + wire slt16; + wire slt17; + wire slt18; + wire slt19; + wire slt20; + wire slt21; + wire slt22; + wire slt23; + wire slt24; + wire slt25; + wire slt26; + wire slt27; + wire slt28; + wire slt29; + wire slt30; + single_slt bit0(slt0, a[0], b[0], 0); + single_slt bit1(slt1, a[1], b[1], slt0); + single_slt bit2(slt2, a[2], b[2], slt1); + single_slt bit3(slt3, a[3], b[3], slt2); + single_slt bit4(slt4, a[4], b[4], slt3); + single_slt bit5(slt5, a[5], b[5], slt4); + single_slt bit6(slt6, a[6], b[6], slt5); + single_slt bit7(slt7, a[7], b[7], slt6); + single_slt bit8(slt8, a[8], b[8], slt7); + single_slt bit9(slt9, a[9], b[9], slt8); + single_slt bit10(slt10, a[10], b[10], slt9); + single_slt bit11(slt11, a[11], b[11], slt10); + single_slt bit12(slt12, a[12], b[12], slt11); + single_slt bit13(slt13, a[13], b[13], slt12); + single_slt bit14(slt14, a[14], b[14], slt13); + single_slt bit15(slt15, a[15], b[15], slt14); + single_slt bit16(slt16, a[16], b[16], slt15); + single_slt bit17(slt17, a[17], b[17], slt16); + single_slt bit18(slt18, a[18], b[18], slt17); + single_slt bit19(slt19, a[19], b[19], slt18); + single_slt bit20(slt20, a[20], b[20], slt19); + single_slt bit21(slt21, a[21], b[21], slt20); + single_slt bit22(slt22, a[22], b[22], slt21); + single_slt bit23(slt23, a[23], b[23], slt22); + single_slt bit24(slt24, a[24], b[24], slt23); + single_slt bit25(slt25, a[25], b[25], slt24); + single_slt bit26(slt26, a[26], b[26], slt25); + single_slt bit27(slt27, a[27], b[27], slt26); + single_slt bit28(slt28, a[28], b[28], slt27); + single_slt bit29(slt29, a[29], b[29], slt28); + single_slt bit30(slt30, a[30], b[30], slt29); + assign out[31:1] = 0; + single_slt_reversed bit31(out[0], a[31], b[31], slt30); +endmodule diff --git a/subtractor1bit.v b/subtractor1bit.v new file mode 100644 index 0000000..71827a8 --- /dev/null +++ b/subtractor1bit.v @@ -0,0 +1,25 @@ +`define AND and +`define OR or +`define NOT not +`define XOR xor +`define NOR nor +`define NAND nand + +module Subtractor1bit +( + output diff, + output borrowout, + input a, + input b, + input borrowin +); + wire axorb; + `XOR(axorb, a, b); + `XOR(diff, axorb, borrowin); + wire nota, notaandb, notaxorb, notaxorbandborrowin; + `NOT(nota, a); + `AND(notaandb, nota, b); + `NOT(notaxorb, axorb); + `AND(notaxorbandborrowin, notaxorb, borrowin); + `OR(borrowout, notaandb, notaxorbandborrowin); +endmodule diff --git a/testInstructionDecode.t.out b/testInstructionDecode.t.out new file mode 100755 index 0000000..a30a529 --- /dev/null +++ b/testInstructionDecode.t.out @@ -0,0 +1,197 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1d30900 .scope module, "testInstructionDecode" "testInstructionDecode" 2 5; + .timescale 0 0; +v0x1d6f530_0 .net "Rd", 4 0, L_0x1d6fd70; 1 drivers +RS_0x7f0e569d70a8 .resolv tri, L_0x1d6fc30, L_0x1d70100, C4, C4; +v0x1d6f5d0_0 .net8 "Rs", 4 0, RS_0x7f0e569d70a8; 2 drivers +RS_0x7f0e569d70d8 .resolv tri, L_0x1d6fcd0, L_0x1d70230, C4, C4; +v0x1d6f650_0 .net8 "Rt", 4 0, RS_0x7f0e569d70d8; 2 drivers +v0x1d6f720_0 .net "funct", 5 0, L_0x1d6ffc0; 1 drivers +v0x1d6f7a0_0 .net "imm", 15 0, L_0x1d70360; 1 drivers +v0x1d6f820_0 .var "instruction", 31 0; +v0x1d6f8a0_0 .net "jump_target", 25 0, L_0x1d704a0; 1 drivers +RS_0x7f0e569d7078 .resolv tri, L_0x1d6fa70, L_0x1d70060, L_0x1d70400, C4; +v0x1d6f920_0 .net8 "opcode", 5 0, RS_0x7f0e569d7078; 3 drivers +v0x1d6f9f0_0 .net "shift", 4 0, L_0x1d6fe10; 1 drivers +S_0x1d6eba0 .scope task, "checkResult" "checkResult" 2 34, 2 34, S_0x1d30900; + .timescale 0 0; +v0x1d6ec90_0 .var "Rd", 4 0; +v0x1d6ed10_0 .var "Rs", 4 0; +v0x1d6edb0_0 .var "Rt", 4 0; +v0x1d6ee50_0 .var "exp_imm", 15 0; +v0x1d6eed0_0 .var "exp_jump_target", 25 0; +v0x1d6ef70_0 .var "exp_opcode", 5 0; +v0x1d6f050_0 .var "exp_rd", 4 0; +v0x1d6f0f0_0 .var "exp_rs", 4 0; +v0x1d6f1e0_0 .var "exp_rt", 4 0; +v0x1d6f280_0 .var "imm", 15 0; +v0x1d6f380_0 .var "jump_target", 25 0; +v0x1d6f420_0 .var "opcode", 5 0; +TD_testInstructionDecode.checkResult ; + %load/v 8, v0x1d6f420_0, 6; + %load/v 14, v0x1d6ef70_0, 6; + %cmp/u 8, 14, 6; + %mov 8, 4, 1; + %load/v 9, v0x1d6ed10_0, 5; + %load/v 14, v0x1d6f0f0_0, 5; + %cmp/u 9, 14, 5; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x1d6edb0_0, 5; + %load/v 14, v0x1d6f1e0_0, 5; + %cmp/u 9, 14, 5; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x1d6ec90_0, 5; + %load/v 14, v0x1d6f050_0, 5; + %cmp/u 9, 14, 5; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x1d6f280_0, 16; + %load/v 25, v0x1d6ee50_0, 16; + %cmp/u 9, 25, 16; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x1d6f380_0, 26; + %load/v 35, v0x1d6eed0_0, 26; + %cmp/u 9, 35, 26; + %mov 9, 4, 1; + %and 8, 9, 1; + %jmp/0xz T_0.0, 8; + %vpi_call 2 42 "$display", "Passed."; + %jmp T_0.1; +T_0.0 ; + %vpi_call 2 45 "$display", "Failed"; + %vpi_call 2 46 "$display", v0x1d6f420_0; +T_0.1 ; + %end; +S_0x1d6e5c0 .scope module, "ID_R" "instructionDecoderR" 2 17, 3 2, S_0x1d30900; + .timescale 0 0; +v0x1d6e6b0_0 .alias "Rd", 4 0, v0x1d6f530_0; +v0x1d6e730_0 .alias "Rs", 4 0, v0x1d6f5d0_0; +v0x1d6e7e0_0 .alias "Rt", 4 0, v0x1d6f650_0; +v0x1d6e890_0 .alias "funct", 5 0, v0x1d6f720_0; +v0x1d6e940_0 .net "instruction", 31 0, v0x1d6f820_0; 1 drivers +v0x1d6ea10_0 .alias "opcode", 5 0, v0x1d6f920_0; +v0x1d6eb20_0 .alias "shift", 4 0, v0x1d6f9f0_0; +L_0x1d6fa70 .part v0x1d6f820_0, 26, 6; +L_0x1d6fc30 .part v0x1d6f820_0, 21, 5; +L_0x1d6fcd0 .part v0x1d6f820_0, 16, 5; +L_0x1d6fd70 .part v0x1d6f820_0, 11, 5; +L_0x1d6fe10 .part v0x1d6f820_0, 6, 5; +L_0x1d6ffc0 .part v0x1d6f820_0, 0, 6; +S_0x1d6e140 .scope module, "ID_I" "instructionDecoderI" 2 24, 4 2, S_0x1d30900; + .timescale 0 0; +v0x1d6e230_0 .alias "Rs", 4 0, v0x1d6f5d0_0; +v0x1d6e2f0_0 .alias "Rt", 4 0, v0x1d6f650_0; +v0x1d6e390_0 .alias "imm", 15 0, v0x1d6f7a0_0; +v0x1d6e430_0 .alias "instruction", 31 0, v0x1d6e940_0; +v0x1d6e510_0 .alias "opcode", 5 0, v0x1d6f920_0; +L_0x1d70060 .part v0x1d6f820_0, 26, 6; +L_0x1d70100 .part v0x1d6f820_0, 21, 5; +L_0x1d70230 .part v0x1d6f820_0, 16, 5; +L_0x1d70360 .part v0x1d6f820_0, 0, 16; +S_0x1d30620 .scope module, "ID_J" "instructionDecoderJ" 2 29, 5 2, S_0x1d30900; + .timescale 0 0; +v0x1d510a0_0 .alias "instruction", 31 0, v0x1d6e940_0; +v0x1d6e000_0 .alias "jump_target", 25 0, v0x1d6f8a0_0; +v0x1d6e0a0_0 .alias "opcode", 5 0, v0x1d6f920_0; +L_0x1d70400 .part v0x1d6f820_0, 26, 6; +L_0x1d704a0 .part v0x1d6f820_0, 0, 26; + .scope S_0x1d30900; +T_1 ; + %set/v v0x1d6f820_0, 0, 32; + %delay 10, 0; + %set/v v0x1d6ef70_0, 0, 6; + %load/v 8, v0x1d6f920_0, 6; + %set/v v0x1d6f420_0, 8, 6; + %set/v v0x1d6f0f0_0, 0, 5; + %set/v v0x1d6f1e0_0, 0, 5; + %set/v v0x1d6f050_0, 0, 5; + %load/v 8, v0x1d6f5d0_0, 5; + %set/v v0x1d6ed10_0, 8, 5; + %load/v 8, v0x1d6f650_0, 5; + %set/v v0x1d6edb0_0, 8, 5; + %load/v 8, v0x1d6f530_0, 5; + %set/v v0x1d6ec90_0, 8, 5; + %set/v v0x1d6ee50_0, 0, 16; + %load/v 8, v0x1d6f7a0_0, 16; + %set/v v0x1d6f280_0, 8, 16; + %set/v v0x1d6eed0_0, 0, 26; + %load/v 8, v0x1d6f8a0_0, 26; + %set/v v0x1d6f380_0, 8, 26; + %fork TD_testInstructionDecode.checkResult, S_0x1d6eba0; + %join; + %movi 8, 1110773763, 32; + %set/v v0x1d6f820_0, 8, 32; + %delay 10, 0; + %movi 8, 16, 6; + %set/v v0x1d6ef70_0, 8, 6; + %load/v 8, v0x1d6f920_0, 6; + %set/v v0x1d6f420_0, 8, 6; + %movi 8, 17, 5; + %set/v v0x1d6f0f0_0, 8, 5; + %movi 8, 21, 5; + %set/v v0x1d6f1e0_0, 8, 5; + %movi 8, 2, 5; + %set/v v0x1d6f050_0, 8, 5; + %load/v 8, v0x1d6f5d0_0, 5; + %set/v v0x1d6ed10_0, 8, 5; + %load/v 8, v0x1d6f650_0, 5; + %set/v v0x1d6edb0_0, 8, 5; + %load/v 8, v0x1d6f530_0, 5; + %set/v v0x1d6ec90_0, 8, 5; + %movi 8, 4099, 16; + %set/v v0x1d6ee50_0, 8, 16; + %load/v 8, v0x1d6f7a0_0, 16; + %set/v v0x1d6f280_0, 8, 16; + %movi 8, 37031939, 26; + %set/v v0x1d6eed0_0, 8, 26; + %load/v 8, v0x1d6f8a0_0, 26; + %set/v v0x1d6f380_0, 8, 26; + %fork TD_testInstructionDecode.checkResult, S_0x1d6eba0; + %join; + %movi 8, 2863311530, 32; + %set/v v0x1d6f820_0, 8, 32; + %delay 10, 0; + %movi 8, 42, 6; + %set/v v0x1d6ef70_0, 8, 6; + %load/v 8, v0x1d6f920_0, 6; + %set/v v0x1d6f420_0, 8, 6; + %movi 8, 21, 5; + %set/v v0x1d6f0f0_0, 8, 5; + %movi 8, 10, 5; + %set/v v0x1d6f1e0_0, 8, 5; + %movi 8, 21, 5; + %set/v v0x1d6f050_0, 8, 5; + %load/v 8, v0x1d6f5d0_0, 5; + %set/v v0x1d6ed10_0, 8, 5; + %load/v 8, v0x1d6f650_0, 5; + %set/v v0x1d6edb0_0, 8, 5; + %load/v 8, v0x1d6f530_0, 5; + %set/v v0x1d6ec90_0, 8, 5; + %movi 8, 43690, 16; + %set/v v0x1d6ee50_0, 8, 16; + %load/v 8, v0x1d6f7a0_0, 16; + %set/v v0x1d6f280_0, 8, 16; + %movi 8, 44739242, 26; + %set/v v0x1d6eed0_0, 8, 26; + %load/v 8, v0x1d6f8a0_0, 26; + %set/v v0x1d6f380_0, 8, 26; + %fork TD_testInstructionDecode.checkResult, S_0x1d6eba0; + %join; + %end; + .thread T_1; +# The file index is used to find the file name in the following table. +:file_names 6; + "N/A"; + ""; + "testInstructionDecode.t.v"; + "./instructionDecoderR.v"; + "./instructionDecoderI.v"; + "./instructionDecoderJ.v"; diff --git a/testInstructionDecode.t.v b/testInstructionDecode.t.v new file mode 100644 index 0000000..f45ad90 --- /dev/null +++ b/testInstructionDecode.t.v @@ -0,0 +1,65 @@ +`include "instructionDecoderR.v" +`include "instructionDecoderI.v" +`include "instructionDecoderJ.v" + +module testInstructionDecode(); + reg[31:0] instruction; + + wire[5:0] opcode; + wire[4:0] Rs; + wire[4:0] Rt; + wire[4:0] Rd; + wire[4:0] shift; + wire[5:0] funct; + wire[15:0] imm; + wire[25:0] jump_target; + + instructionDecoderR ID_R(.instruction(instruction[31:0]), + .opcode(opcode), + .Rs(Rs), + .Rt(Rt), + .Rd(Rd), + .shift(shift), + .funct(funct)); + instructionDecoderI ID_I(.instruction(instruction[31:0]), + .opcode(opcode), + .Rs(Rs), + .Rt(Rt), + .imm(imm)); + instructionDecoderJ ID_J(.instruction(instruction[31:0]), + .opcode(opcode), + .jump_target(jump_target)); + + + task checkResult; + input[5:0] exp_opcode, opcode; + input[4:0] exp_rs, exp_rt, exp_rd, Rs, Rt, Rd; + input[15:0] exp_imm, imm; + input[25:0] exp_jump_target, jump_target; + + + if ((opcode == exp_opcode) && (Rs == exp_rs) && (Rt == exp_rt) && (Rd == exp_rd) && (imm == exp_imm) && (jump_target == exp_jump_target)) begin + $display("Passed."); + end + else begin + $display("Failed"); + $display(opcode); + end + endtask + + initial begin + instruction = 32'b00000000000000000000000000000000; #10 + checkResult(6'b000000, opcode, 5'b00000, 5'b00000, 5'b00000, Rs, Rt, Rd, + 16'b000000000000000, imm, + 26'b00000000000000000000000000, jump_target); + + instruction = 32'b01000010001101010001000000000011; #10 + checkResult(6'b010000, opcode, 5'b10001, 5'b10101, 5'b00010, Rs, Rt, Rd, + 16'b001000000000011, imm, + 26'b10001101010001000000000011, jump_target); + instruction = 32'b10101010101010101010101010101010; #10 + checkResult(6'b101010, opcode, 5'b10101, 5'b01010, 5'b10101, Rs, Rt, Rd, + 16'b1010101010101010, imm, + 26'b10101010101010101010101010, jump_target); + end +endmodule \ No newline at end of file diff --git a/testalu b/testalu new file mode 100755 index 0000000..961bf2b --- /dev/null +++ b/testalu @@ -0,0 +1,5180 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0xd88600 .scope module, "addressmux" "addressmux" 2 34; + .timescale 0 0; +v0xc5a830_0 .net "addr0", 4 0, C4; 0 drivers +v0xde0a70_0 .net "addr1", 4 0, C4; 0 drivers +v0xde0af0_0 .net "mux_address", 0 0, C4; 0 drivers +v0xddb750_0 .var "out", 0 0; +E_0xda7c80 .event edge, v0xde0af0_0, v0xde0a70_0, v0xc5a830_0; +S_0xd8d920 .scope module, "mux" "mux" 2 1; + .timescale 0 0; +P_0xc86678 .param/l "width" 2 2, +C4<0100000>; +v0xdd6430_0 .net "address", 0 0, C4; 0 drivers +v0xdd64f0_0 .net "input0", 31 0, C4; 0 drivers +v0xdc17b0_0 .net "input1", 31 0, C4; 0 drivers +v0xdc1850_0 .var "out", 31 0; +E_0xddb800 .event edge, v0xdd6430_0, v0xdc17b0_0, v0xdd64f0_0; +S_0xd92c40 .scope module, "testExecute" "testExecute" 3 11; + .timescale 0 0; +v0xed5b80_0 .var "ALU_OperandSource", 0 0; +v0xed5c50_0 .var "ALU_cmd", 2 0; +v0xed5cd0_0 .var "Da", 31 0; +v0xed5da0_0 .var "Db", 31 0; +v0xed5e70_0 .net "carryout", 0 0, L_0xf21290; 1 drivers +v0xed5f80_0 .var "imm", 15 0; +v0xed6000_0 .net "overflow", 0 0, L_0xf224d0; 1 drivers +RS_0x7f3fa01428e8/0/0 .resolv tri, L_0xf24800, L_0xf24de0, L_0xf25830, L_0xf261b0; +RS_0x7f3fa01428e8/0/4 .resolv tri, L_0xf26be0, L_0xf26750, L_0xf287a0, L_0xf27f90; +RS_0x7f3fa01428e8/0/8 .resolv tri, L_0xf29b10, L_0xf292f0, L_0xf2b7b0, L_0xf2c150; +RS_0x7f3fa01428e8/0/12 .resolv tri, L_0xf2cb40, L_0xf27320, L_0xf2cf00, L_0xf2c740; +RS_0x7f3fa01428e8/0/16 .resolv tri, L_0xf2f310, L_0xf2ea10, L_0xf304b0, L_0xf30a30; +RS_0x7f3fa01428e8/0/20 .resolv tri, L_0xf32550, L_0xf310b0, L_0xf32cd0, L_0xf32140; +RS_0x7f3fa01428e8/0/24 .resolv tri, L_0xf34150, L_0xf335e0, L_0xf35150, L_0xf34820; +RS_0x7f3fa01428e8/0/28 .resolv tri, L_0xf368d0, L_0xf35920, L_0xf37ee0, L_0xf39760; +RS_0x7f3fa01428e8/1/0 .resolv tri, RS_0x7f3fa01428e8/0/0, RS_0x7f3fa01428e8/0/4, RS_0x7f3fa01428e8/0/8, RS_0x7f3fa01428e8/0/12; +RS_0x7f3fa01428e8/1/4 .resolv tri, RS_0x7f3fa01428e8/0/16, RS_0x7f3fa01428e8/0/20, RS_0x7f3fa01428e8/0/24, RS_0x7f3fa01428e8/0/28; +RS_0x7f3fa01428e8 .resolv tri, RS_0x7f3fa01428e8/1/0, RS_0x7f3fa01428e8/1/4, C4, C4; +v0xed6080_0 .net8 "result", 31 0, RS_0x7f3fa01428e8; 32 drivers +v0xed61a0_0 .net "zero", 0 0, C4; 0 drivers +S_0xed5660 .scope task, "checkResult" "checkResult" 3 30, 3 30, S_0xd92c40; + .timescale 0 0; +v0xed5750_0 .var "carryout", 0 0; +v0xed57d0_0 .var "exp_carryout", 0 0; +v0xed5850_0 .var "exp_overflow", 0 0; +v0xed58d0_0 .var "exp_result", 31 0; +v0xed5980_0 .var "exp_zero", 0 0; +v0xed5a00_0 .var "overflow", 0 0; +v0xed5a80_0 .var "result", 31 0; +v0xed5b00_0 .var "zero", 0 0; +TD_testExecute.checkResult ; + %load/v 8, v0xed5a80_0, 32; + %load/v 40, v0xed58d0_0, 32; + %cmp/u 8, 40, 32; + %mov 8, 4, 1; + %load/v 9, v0xed5b00_0, 1; + %load/v 10, v0xed5980_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0xed5750_0, 1; + %load/v 10, v0xed57d0_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0xed5a00_0, 1; + %load/v 10, v0xed5850_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %jmp/0xz T_0.0, 8; + %vpi_call 3 41 "$display", "Passed."; + %jmp T_0.1; +T_0.0 ; + %vpi_call 3 44 "$display", "Failed"; + %vpi_call 3 45 "$display", "result: %d", v0xed5a80_0; + %vpi_call 3 46 "$display", "expected: %d", v0xed58d0_0; + %vpi_call 3 47 "$display", "zero %b, carryout %b, overflow %b", v0xed5b00_0, v0xed5750_0, v0xed5a00_0; +T_0.1 ; + %end; +S_0xdbc490 .scope module, "dut" "execute" 3 20, 4 5, S_0xd92c40; + .timescale 0 0; +v0xed4eb0_0 .net "ALU_OperandSource", 0 0, v0xed5b80_0; 1 drivers +v0xed4f30_0 .net "Da", 31 0, v0xed5cd0_0; 1 drivers +v0xed4fe0_0 .net "Db", 31 0, v0xed5da0_0; 1 drivers +v0xed5090_0 .net "Operand", 31 0, v0xed4e30_0; 1 drivers +v0xed5190_0 .alias "carryout", 0 0, v0xed5e70_0; +v0xed5210_0 .net "command", 2 0, v0xed5c50_0; 1 drivers +v0xed52d0_0 .var "extended_imm", 31 0; +v0xed5350_0 .net "imm", 15 0, v0xed5f80_0; 1 drivers +v0xed5420_0 .alias "overflow", 0 0, v0xed6000_0; +v0xed54a0_0 .alias "result", 31 0, v0xed6080_0; +v0xed55b0_0 .alias "zero", 0 0, v0xed61a0_0; +E_0xdbc580 .event edge, v0xed5350_0; +S_0xed4bc0 .scope module, "ALUSource" "mux2to1by32" 4 22, 2 17, S_0xdbc490; + .timescale 0 0; +v0xed4cb0_0 .alias "address", 0 0, v0xed4eb0_0; +v0xed4d30_0 .alias "input0", 31 0, v0xed4fe0_0; +v0xed4db0_0 .net "input1", 31 0, v0xed52d0_0; 1 drivers +v0xed4e30_0 .var "out", 31 0; +E_0xed16b0 .event edge, v0xed4cb0_0, v0xed4db0_0, v0xed4d30_0; +S_0xdb7170 .scope module, "Alu" "ALU" 4 28, 5 20, S_0xdbc490; + .timescale 0 0; +L_0xf224d0/d .functor XOR 1, L_0xf21290, L_0xefcff0, C4<0>, C4<0>; +L_0xf224d0 .delay (30,30,30) L_0xf224d0/d; +L_0xefd0e0/d .functor XOR 1, L_0xf21e90, L_0xf224d0, C4<0>, C4<0>; +L_0xefd0e0 .delay (30,30,30) L_0xefd0e0/d; +v0xec7d10_0 .net *"_s320", 0 0, L_0xefcff0; 1 drivers +v0xec7f50_0 .net *"_s323", 0 0, L_0xf21e90; 1 drivers +v0xec7fd0_0 .net *"_s325", 0 0, L_0xf21f30; 1 drivers +v0xec8050_0 .net *"_s327", 0 0, L_0xf21fd0; 1 drivers +v0xec80d0_0 .net *"_s329", 0 0, L_0xf24620; 1 drivers +v0xec8150_0 .net *"_s331", 0 0, L_0xf246c0; 1 drivers +v0xec81d0_0 .net *"_s333", 0 0, L_0xf24100; 1 drivers +v0xec8270_0 .net *"_s335", 0 0, L_0xf241a0; 1 drivers +v0xec8310_0 .net *"_s337", 0 0, L_0xf24240; 1 drivers +v0xec83b0_0 .net *"_s343", 0 0, L_0xf248f0; 1 drivers +v0xec8450_0 .net *"_s345", 0 0, L_0xf24990; 1 drivers +v0xec84f0_0 .net *"_s347", 0 0, L_0xf24a30; 1 drivers +v0xec8590_0 .net *"_s349", 0 0, L_0xf24ad0; 1 drivers +v0xec8630_0 .net *"_s350", 0 0, C4<0>; 1 drivers +v0xec8750_0 .net *"_s353", 0 0, L_0xf24bb0; 1 drivers +v0xec87f0_0 .net *"_s355", 0 0, L_0xf23530; 1 drivers +v0xec86b0_0 .net *"_s357", 0 0, L_0xf235d0; 1 drivers +v0xec8940_0 .net *"_s363", 0 0, L_0xf24f10; 1 drivers +v0xec8a60_0 .net *"_s365", 0 0, L_0xf24fb0; 1 drivers +v0xec8ae0_0 .net *"_s367", 0 0, L_0xf25050; 1 drivers +v0xec89c0_0 .net *"_s369", 0 0, L_0xf250f0; 1 drivers +v0xec8c10_0 .net *"_s370", 0 0, C4<0>; 1 drivers +v0xec8b60_0 .net *"_s373", 0 0, L_0xec8870; 1 drivers +v0xec8d50_0 .net *"_s375", 0 0, L_0xf256f0; 1 drivers +v0xec8cb0_0 .net *"_s377", 0 0, L_0xf25da0; 1 drivers +v0xec8ea0_0 .net *"_s383", 0 0, L_0xf25920; 1 drivers +v0xec8df0_0 .net *"_s385", 0 0, L_0xf259c0; 1 drivers +v0xec9000_0 .net *"_s387", 0 0, L_0xf25a60; 1 drivers +v0xec8f40_0 .net *"_s389", 0 0, L_0xf25b00; 1 drivers +v0xec9170_0 .net *"_s390", 0 0, C4<0>; 1 drivers +v0xec9080_0 .net *"_s393", 0 0, L_0xf25be0; 1 drivers +v0xec92f0_0 .net *"_s395", 0 0, L_0xf25c80; 1 drivers +v0xec91f0_0 .net *"_s397", 0 0, L_0xf251d0; 1 drivers +v0xec9480_0 .net *"_s403", 0 0, L_0xf262a0; 1 drivers +v0xec9370_0 .net *"_s405", 0 0, L_0xf26340; 1 drivers +v0xec9620_0 .net *"_s407", 0 0, L_0xf263e0; 1 drivers +v0xec9500_0 .net *"_s409", 0 0, L_0xf26480; 1 drivers +v0xec95a0_0 .net *"_s410", 0 0, C4<0>; 1 drivers +v0xec97e0_0 .net *"_s413", 0 0, L_0xf23ae0; 1 drivers +v0xec9860_0 .net *"_s415", 0 0, L_0xf23b80; 1 drivers +v0xec96a0_0 .net *"_s417", 0 0, L_0xf23c20; 1 drivers +v0xec9740_0 .net *"_s423", 0 0, L_0xf26cd0; 1 drivers +v0xec9a40_0 .net *"_s425", 0 0, L_0xf26d70; 1 drivers +v0xec9ac0_0 .net *"_s427", 0 0, L_0xf26e10; 1 drivers +v0xec98e0_0 .net *"_s429", 0 0, L_0xf26eb0; 1 drivers +v0xec9980_0 .net *"_s430", 0 0, C4<0>; 1 drivers +v0xec9cc0_0 .net *"_s433", 0 0, L_0xf26f50; 1 drivers +v0xec9d40_0 .net *"_s435", 0 0, L_0xf26ff0; 1 drivers +v0xec9b60_0 .net *"_s437", 0 0, L_0xf27090; 1 drivers +v0xec9c00_0 .net *"_s443", 0 0, L_0xf26900; 1 drivers +v0xec9f60_0 .net *"_s445", 0 0, L_0xf269a0; 1 drivers +v0xec9fe0_0 .net *"_s447", 0 0, L_0xf27b30; 1 drivers +v0xec9de0_0 .net *"_s449", 0 0, L_0xf27bd0; 1 drivers +v0xec9e80_0 .net *"_s450", 0 0, C4<0>; 1 drivers +v0xeca220_0 .net *"_s453", 0 0, L_0xf281b0; 1 drivers +v0xeca2a0_0 .net *"_s455", 0 0, L_0xf28250; 1 drivers +v0xeca060_0 .net *"_s457", 0 0, L_0xf282f0; 1 drivers +v0xeca100_0 .net *"_s463", 0 0, L_0xf28890; 1 drivers +v0xeca1a0_0 .net *"_s465", 0 0, L_0xf28930; 1 drivers +v0xeca520_0 .net *"_s467", 0 0, L_0xf289d0; 1 drivers +v0xeca340_0 .net *"_s469", 0 0, L_0xf28a70; 1 drivers +v0xeca3e0_0 .net *"_s470", 0 0, C4<0>; 1 drivers +v0xeca480_0 .net *"_s473", 0 0, L_0xf28b10; 1 drivers +v0xeca7c0_0 .net *"_s475", 0 0, L_0xf28bb0; 1 drivers +v0xeca5c0_0 .net *"_s477", 0 0, L_0xf28c50; 1 drivers +v0xeca660_0 .net *"_s483", 0 0, L_0xf28080; 1 drivers +v0xeca700_0 .net *"_s485", 0 0, L_0xf28e40; 1 drivers +v0xecaa60_0 .net *"_s487", 0 0, L_0xf28ee0; 1 drivers +v0xeca860_0 .net *"_s489", 0 0, L_0xf28f80; 1 drivers +v0xeca900_0 .net *"_s490", 0 0, C4<0>; 1 drivers +v0xeca9a0_0 .net *"_s493", 0 0, L_0xf29570; 1 drivers +v0xecad20_0 .net *"_s495", 0 0, L_0xf29610; 1 drivers +v0xecaae0_0 .net *"_s497", 0 0, L_0xf296b0; 1 drivers +v0xecab80_0 .net *"_s503", 0 0, L_0xf29c00; 1 drivers +v0xecac20_0 .net *"_s505", 0 0, L_0xf29ca0; 1 drivers +v0xecb000_0 .net *"_s507", 0 0, L_0xf29d40; 1 drivers +v0xecada0_0 .net *"_s509", 0 0, L_0xf29de0; 1 drivers +v0xecae40_0 .net *"_s510", 0 0, C4<0>; 1 drivers +v0xecaee0_0 .net *"_s513", 0 0, L_0xf29e80; 1 drivers +v0xecaf80_0 .net *"_s515", 0 0, L_0xf29f20; 1 drivers +v0xecb310_0 .net *"_s517", 0 0, L_0xf29fc0; 1 drivers +v0xecb390_0 .net *"_s523", 0 0, L_0xf293e0; 1 drivers +v0xecb0a0_0 .net *"_s525", 0 0, L_0xf29480; 1 drivers +v0xecb140_0 .net *"_s527", 0 0, L_0xf2a280; 1 drivers +v0xecb1e0_0 .net *"_s529", 0 0, L_0xf2a320; 1 drivers +v0xecb280_0 .net *"_s530", 0 0, C4<0>; 1 drivers +v0xecb6f0_0 .net *"_s533", 0 0, L_0xf2a920; 1 drivers +v0xecb790_0 .net *"_s535", 0 0, L_0xf2a9c0; 1 drivers +v0xecb430_0 .net *"_s537", 0 0, L_0xf2aa60; 1 drivers +v0xecb4d0_0 .net *"_s543", 0 0, L_0xf2b850; 1 drivers +v0xecb570_0 .net *"_s545", 0 0, L_0xf2af10; 1 drivers +v0xecb610_0 .net *"_s547", 0 0, L_0xf2afb0; 1 drivers +v0xecbb00_0 .net *"_s549", 0 0, L_0xf2b050; 1 drivers +v0xecbb80_0 .net *"_s550", 0 0, C4<0>; 1 drivers +v0xecb830_0 .net *"_s553", 0 0, L_0xf2b660; 1 drivers +v0xecb8d0_0 .net *"_s555", 0 0, L_0xf2b700; 1 drivers +v0xecb970_0 .net *"_s557", 0 0, L_0xf2a3c0; 1 drivers +v0xecba10_0 .net *"_s563", 0 0, L_0xf2b8f0; 1 drivers +v0xecbf20_0 .net *"_s565", 0 0, L_0xf2b990; 1 drivers +v0xecbfa0_0 .net *"_s567", 0 0, L_0xf2ba30; 1 drivers +v0xecbc00_0 .net *"_s569", 0 0, L_0xf2bad0; 1 drivers +v0xecbca0_0 .net *"_s570", 0 0, C4<0>; 1 drivers +v0xecbd40_0 .net *"_s573", 0 0, L_0xf2bb70; 1 drivers +v0xecbde0_0 .net *"_s575", 0 0, L_0xf2bc10; 1 drivers +v0xecbe80_0 .net *"_s577", 0 0, L_0xf2bcb0; 1 drivers +v0xecc370_0 .net *"_s583", 0 0, L_0xf2cbe0; 1 drivers +v0xecc040_0 .net *"_s585", 0 0, L_0xf2c1f0; 1 drivers +v0xecc0e0_0 .net *"_s587", 0 0, L_0xf2c290; 1 drivers +v0xecc180_0 .net *"_s589", 0 0, L_0xf2c330; 1 drivers +v0xecc220_0 .net *"_s590", 0 0, C4<0>; 1 drivers +v0xecc2c0_0 .net *"_s593", 0 0, L_0xf2c950; 1 drivers +v0xecc770_0 .net *"_s595", 0 0, L_0xf2c9f0; 1 drivers +v0xecc410_0 .net *"_s597", 0 0, L_0xf2b0f0; 1 drivers +v0xecc4b0_0 .net *"_s603", 0 0, L_0xf267f0; 1 drivers +v0xecc550_0 .net *"_s605", 0 0, L_0xf275d0; 1 drivers +v0xecc5f0_0 .net *"_s607", 0 0, L_0xf27670; 1 drivers +v0xecc690_0 .net *"_s609", 0 0, L_0xf27710; 1 drivers +v0xeccba0_0 .net *"_s610", 0 0, C4<0>; 1 drivers +v0xecc7f0_0 .net *"_s613", 0 0, L_0xf277f0; 1 drivers +v0xecc870_0 .net *"_s615", 0 0, L_0xf27890; 1 drivers +v0xecc910_0 .net *"_s617", 0 0, L_0xf27930; 1 drivers +v0xecc9b0_0 .net *"_s623", 0 0, L_0xf2cff0; 1 drivers +v0xecca50_0 .net *"_s625", 0 0, L_0xf2d090; 1 drivers +v0xeccaf0_0 .net *"_s627", 0 0, L_0xf2d130; 1 drivers +v0xecd010_0 .net *"_s629", 0 0, L_0xf2d1d0; 1 drivers +v0xecd0b0_0 .net *"_s630", 0 0, C4<0>; 1 drivers +v0xeccc20_0 .net *"_s633", 0 0, L_0xf2d270; 1 drivers +v0xeccca0_0 .net *"_s635", 0 0, L_0xf2d310; 1 drivers +v0xeccd40_0 .net *"_s637", 0 0, L_0xf2d3b0; 1 drivers +v0xeccde0_0 .net *"_s643", 0 0, L_0xf2c830; 1 drivers +v0xecce80_0 .net *"_s645", 0 0, L_0xf2e560; 1 drivers +v0xeccf20_0 .net *"_s647", 0 0, L_0xf2e600; 1 drivers +v0xecd560_0 .net *"_s649", 0 0, L_0xf2e6a0; 1 drivers +v0xecd5e0_0 .net *"_s650", 0 0, C4<0>; 1 drivers +v0xecd130_0 .net *"_s653", 0 0, L_0xf2ecd0; 1 drivers +v0xecd1d0_0 .net *"_s655", 0 0, L_0xf2ed70; 1 drivers +v0xecd270_0 .net *"_s657", 0 0, L_0xf2ee10; 1 drivers +v0xecd310_0 .net *"_s663", 0 0, L_0xf2fe20; 1 drivers +v0xecd3b0_0 .net *"_s665", 0 0, L_0xf2f400; 1 drivers +v0xecd450_0 .net *"_s667", 0 0, L_0xf2f4a0; 1 drivers +v0xecdad0_0 .net *"_s669", 0 0, L_0xf2f540; 1 drivers +v0xecdb50_0 .net *"_s670", 0 0, C4<0>; 1 drivers +v0xecd660_0 .net *"_s673", 0 0, L_0xf2fb80; 1 drivers +v0xecd700_0 .net *"_s675", 0 0, L_0xf2fc20; 1 drivers +v0xecd7a0_0 .net *"_s677", 0 0, L_0xf2fcc0; 1 drivers +v0xecd840_0 .net *"_s683", 0 0, L_0xf2eb00; 1 drivers +v0xecd8e0_0 .net *"_s685", 0 0, L_0xf2eba0; 1 drivers +v0xecd980_0 .net *"_s687", 0 0, L_0xf308f0; 1 drivers +v0xecda20_0 .net *"_s689", 0 0, L_0xf30990; 1 drivers +v0xece080_0 .net *"_s690", 0 0, C4<0>; 1 drivers +v0xecdbd0_0 .net *"_s693", 0 0, L_0xf2fec0; 1 drivers +v0xecdc70_0 .net *"_s695", 0 0, L_0xf2ff60; 1 drivers +v0xecdd10_0 .net *"_s697", 0 0, L_0xf30000; 1 drivers +v0xecddb0_0 .net *"_s703", 0 0, L_0xf305a0; 1 drivers +v0xecde50_0 .net *"_s705", 0 0, L_0xf30640; 1 drivers +v0xecdef0_0 .net *"_s707", 0 0, L_0xf306e0; 1 drivers +v0xecdf90_0 .net *"_s709", 0 0, L_0xf30780; 1 drivers +v0xece5f0_0 .net *"_s710", 0 0, C4<0>; 1 drivers +v0xece100_0 .net *"_s713", 0 0, L_0xf30820; 1 drivers +v0xece1a0_0 .net *"_s715", 0 0, L_0xf2f5e0; 1 drivers +v0xece240_0 .net *"_s717", 0 0, L_0xf2f680; 1 drivers +v0xece2e0_0 .net *"_s723", 0 0, L_0xf30b20; 1 drivers +v0xece380_0 .net *"_s725", 0 0, L_0xf30bc0; 1 drivers +v0xece420_0 .net *"_s727", 0 0, L_0xf30c60; 1 drivers +v0xece4c0_0 .net *"_s729", 0 0, L_0xf30d00; 1 drivers +v0xece560_0 .net *"_s730", 0 0, C4<0>; 1 drivers +v0xecebb0_0 .net *"_s733", 0 0, L_0xf31390; 1 drivers +v0xecec30_0 .net *"_s735", 0 0, L_0xf31430; 1 drivers +v0xece670_0 .net *"_s737", 0 0, L_0xf314d0; 1 drivers +v0xece710_0 .net *"_s743", 0 0, L_0xf325f0; 1 drivers +v0xece7b0_0 .net *"_s745", 0 0, L_0xf31a20; 1 drivers +v0xece850_0 .net *"_s747", 0 0, L_0xf31ac0; 1 drivers +v0xece8f0_0 .net *"_s749", 0 0, L_0xf31b60; 1 drivers +v0xece990_0 .net *"_s750", 0 0, C4<0>; 1 drivers +v0xecea30_0 .net *"_s753", 0 0, L_0xf32200; 1 drivers +v0xecead0_0 .net *"_s755", 0 0, L_0xf322a0; 1 drivers +v0xecf240_0 .net *"_s757", 0 0, L_0xf32340; 1 drivers +v0xecf2c0_0 .net *"_s763", 0 0, L_0xf311a0; 1 drivers +v0xececb0_0 .net *"_s765", 0 0, L_0xf31240; 1 drivers +v0xeced50_0 .net *"_s767", 0 0, L_0xf312e0; 1 drivers +v0xecedf0_0 .net *"_s769", 0 0, L_0xf331e0; 1 drivers +v0xecee90_0 .net *"_s770", 0 0, C4<0>; 1 drivers +v0xecef30_0 .net *"_s773", 0 0, L_0xf32690; 1 drivers +v0xecefd0_0 .net *"_s775", 0 0, L_0xf32730; 1 drivers +v0xecf070_0 .net *"_s777", 0 0, L_0xf327d0; 1 drivers +v0xecf110_0 .net *"_s783", 0 0, L_0xf32dc0; 1 drivers +v0xecf1b0_0 .net *"_s785", 0 0, L_0xf32e60; 1 drivers +v0xecf920_0 .net *"_s787", 0 0, L_0xf32f00; 1 drivers +v0xecf340_0 .net *"_s789", 0 0, L_0xf32fa0; 1 drivers +v0xecf3e0_0 .net *"_s790", 0 0, C4<0>; 1 drivers +v0xecf480_0 .net *"_s793", 0 0, L_0xf33080; 1 drivers +v0xecf520_0 .net *"_s795", 0 0, L_0xf33120; 1 drivers +v0xecf5c0_0 .net *"_s797", 0 0, L_0xf31c40; 1 drivers +v0xecf660_0 .net *"_s803", 0 0, L_0xf33280; 1 drivers +v0xecf700_0 .net *"_s805", 0 0, L_0xf33320; 1 drivers +v0xecf7a0_0 .net *"_s807", 0 0, L_0xf333c0; 1 drivers +v0xecf840_0 .net *"_s809", 0 0, L_0xf33460; 1 drivers +v0xecffd0_0 .net *"_s810", 0 0, C4<0>; 1 drivers +v0xecf9a0_0 .net *"_s813", 0 0, L_0xf33b10; 1 drivers +v0xecfa20_0 .net *"_s815", 0 0, L_0xf33bb0; 1 drivers +v0xecfac0_0 .net *"_s817", 0 0, L_0xf33c50; 1 drivers +v0xecfb60_0 .net *"_s823", 0 0, L_0xf34240; 1 drivers +v0xecfc00_0 .net *"_s825", 0 0, L_0xf342e0; 1 drivers +v0xecfca0_0 .net *"_s827", 0 0, L_0xf35010; 1 drivers +v0xecfd40_0 .net *"_s829", 0 0, L_0xf34380; 1 drivers +v0xecfde0_0 .net *"_s830", 0 0, C4<0>; 1 drivers +v0xecfe80_0 .net *"_s833", 0 0, L_0xf34a40; 1 drivers +v0xecff20_0 .net *"_s835", 0 0, L_0xf34ae0; 1 drivers +v0xed06e0_0 .net *"_s837", 0 0, L_0xf34b80; 1 drivers +v0xed0760_0 .net *"_s843", 0 0, L_0xf336d0; 1 drivers +v0xed0050_0 .net *"_s845", 0 0, L_0xf33770; 1 drivers +v0xed00f0_0 .net *"_s847", 0 0, L_0xf33810; 1 drivers +v0xed0190_0 .net *"_s849", 0 0, L_0xf338b0; 1 drivers +v0xed0230_0 .net *"_s850", 0 0, C4<0>; 1 drivers +v0xed02d0_0 .net *"_s853", 0 0, L_0xf33990; 1 drivers +v0xed0370_0 .net *"_s855", 0 0, L_0xf33a30; 1 drivers +v0xed0410_0 .net *"_s857", 0 0, L_0xf35d40; 1 drivers +v0xed04b0_0 .net *"_s863", 0 0, L_0xf35240; 1 drivers +v0xed0550_0 .net *"_s865", 0 0, L_0xf352e0; 1 drivers +v0xed05f0_0 .net *"_s867", 0 0, L_0xf35380; 1 drivers +v0xed0ed0_0 .net *"_s869", 0 0, L_0xf35420; 1 drivers +v0xed0f50_0 .net *"_s870", 0 0, C4<0>; 1 drivers +v0xed07e0_0 .net *"_s873", 0 0, L_0xf35ab0; 1 drivers +v0xed0880_0 .net *"_s875", 0 0, L_0xf35b50; 1 drivers +v0xed0920_0 .net *"_s877", 0 0, L_0xf35bf0; 1 drivers +v0xed09c0_0 .net *"_s883", 0 0, L_0xf34910; 1 drivers +v0xed0a60_0 .net *"_s885", 0 0, L_0xf36e40; 1 drivers +v0xed0b00_0 .net *"_s887", 0 0, L_0xf36150; 1 drivers +v0xed0ba0_0 .net *"_s889", 0 0, L_0xf361f0; 1 drivers +v0xed0c40_0 .net *"_s890", 0 0, C4<0>; 1 drivers +v0xed0ce0_0 .net *"_s893", 0 0, L_0xf36290; 1 drivers +v0xed0d80_0 .net *"_s895", 0 0, L_0xf36330; 1 drivers +v0xed0e20_0 .net *"_s897", 0 0, L_0xf363d0; 1 drivers +v0xed1720_0 .net *"_s903", 0 0, L_0xf369c0; 1 drivers +v0xed0fd0_0 .net *"_s905", 0 0, L_0xf36a60; 1 drivers +v0xed1070_0 .net *"_s907", 0 0, L_0xf36b00; 1 drivers +v0xed1110_0 .net *"_s909", 0 0, L_0xf36ba0; 1 drivers +v0xed11b0_0 .net *"_s910", 0 0, C4<0>; 1 drivers +v0xed1250_0 .net *"_s913", 0 0, L_0xf36c40; 1 drivers +v0xed12f0_0 .net *"_s915", 0 0, L_0xf36ce0; 1 drivers +v0xed1390_0 .net *"_s917", 0 0, L_0xf36d80; 1 drivers +v0xed1430_0 .net *"_s923", 0 0, L_0xf359c0; 1 drivers +v0xed14d0_0 .net *"_s925", 0 0, L_0xf273c0; 1 drivers +v0xed1570_0 .net *"_s927", 0 0, L_0xf27460; 1 drivers +v0xed1610_0 .net *"_s929", 0 0, L_0xf27500; 1 drivers +v0xed1f50_0 .net *"_s930", 0 0, C4<0>; 1 drivers +v0xed17a0_0 .net *"_s933", 0 0, L_0xf378f0; 1 drivers +v0xed1840_0 .net *"_s935", 0 0, L_0xf37990; 1 drivers +v0xed18e0_0 .net *"_s937", 0 0, L_0xf37a30; 1 drivers +v0xed1980_0 .net *"_s943", 0 0, L_0xf37fd0; 1 drivers +v0xed1a20_0 .net *"_s945", 0 0, L_0xf38070; 1 drivers +v0xed1ac0_0 .net *"_s947", 0 0, L_0xf38110; 1 drivers +v0xed1b60_0 .net *"_s949", 0 0, L_0xf39010; 1 drivers +v0xed1c00_0 .net *"_s950", 0 0, C4<0>; 1 drivers +v0xed1ca0_0 .net *"_s953", 0 0, L_0xf372f0; 1 drivers +v0xed1d40_0 .net *"_s955", 0 0, L_0xf37390; 1 drivers +v0xed1de0_0 .net *"_s957", 0 0, L_0xf37430; 1 drivers +v0xed1e80_0 .alias "carryout", 0 0, v0xed5e70_0; +v0xed27f0_0 .alias "command", 2 0, v0xed5210_0; +RS_0x7f3fa01427f8/0/0 .resolv tri, L_0xed82d0, L_0xedaa40, L_0xedd2a0, L_0xedf8c0; +RS_0x7f3fa01427f8/0/4 .resolv tri, L_0xede420, L_0xee4550, L_0xee4b90, L_0xee94a0; +RS_0x7f3fa01427f8/0/8 .resolv tri, L_0xee9a90, L_0xeee4a0, L_0xeeeae0, L_0xef3480; +RS_0x7f3fa01427f8/0/12 .resolv tri, L_0xef3b10, L_0xef8460, L_0xef8f60, L_0xee9390; +RS_0x7f3fa01427f8/0/16 .resolv tri, L_0xefd7f0, L_0xf01d40, L_0xf022b0, L_0xf06960; +RS_0x7f3fa01427f8/0/20 .resolv tri, L_0xf06f20, L_0xf0b630, L_0xf0bc40, L_0xf10540; +RS_0x7f3fa01427f8/0/24 .resolv tri, L_0xf10ba0, L_0xf15180, L_0xf15830, L_0xf19d60; +RS_0x7f3fa01427f8/0/28 .resolv tri, L_0xf1a460, L_0xf1ea20, L_0xf1f780, C4; +RS_0x7f3fa01427f8/1/0 .resolv tri, RS_0x7f3fa01427f8/0/0, RS_0x7f3fa01427f8/0/4, RS_0x7f3fa01427f8/0/8, RS_0x7f3fa01427f8/0/12; +RS_0x7f3fa01427f8/1/4 .resolv tri, RS_0x7f3fa01427f8/0/16, RS_0x7f3fa01427f8/0/20, RS_0x7f3fa01427f8/0/24, RS_0x7f3fa01427f8/0/28; +RS_0x7f3fa01427f8 .resolv tri, RS_0x7f3fa01427f8/1/0, RS_0x7f3fa01427f8/1/4, C4, C4; +v0xe8cf60_0 .net8 "cout", 31 0, RS_0x7f3fa01427f8; 31 drivers +v0xe8cfe0_0 .alias "operandA", 31 0, v0xed4f30_0; +v0xe8d080_0 .alias "operandB", 31 0, v0xed5090_0; +v0xe8d120_0 .alias "overflow", 0 0, v0xed6000_0; +v0xe8d1c0_0 .net "resMux0", 7 0, L_0xf242e0; 1 drivers +v0xe8d270_0 .net "resMux1", 7 0, L_0xf23670; 1 drivers +v0xe8d320_0 .net "resMux10", 7 0, L_0xf2ab00; 1 drivers +v0xe8d3d0_0 .net "resMux11", 7 0, L_0xf2a460; 1 drivers +v0xe8d480_0 .net "resMux12", 7 0, L_0xf2bd50; 1 drivers +v0xe8d530_0 .net "resMux13", 7 0, L_0xf2b190; 1 drivers +v0xe8d5e0_0 .net "resMux14", 7 0, L_0xf279d0; 1 drivers +v0xe8d690_0 .net "resMux15", 7 0, L_0xf2d450; 1 drivers +v0xed1fd0_0 .net "resMux16", 7 0, L_0xf2eeb0; 1 drivers +v0xed2050_0 .net "resMux17", 7 0, L_0xf2fd60; 1 drivers +v0xed20d0_0 .net "resMux18", 7 0, L_0xf300a0; 1 drivers +v0xed2150_0 .net "resMux19", 7 0, L_0xf2f720; 1 drivers +v0xed2200_0 .net "resMux2", 7 0, L_0xf25e40; 1 drivers +v0xed22b0_0 .net "resMux20", 7 0, L_0xf31570; 1 drivers +v0xed2360_0 .net "resMux21", 7 0, L_0xf323e0; 1 drivers +v0xed2410_0 .net "resMux22", 7 0, L_0xf32870; 1 drivers +v0xed24c0_0 .net "resMux23", 7 0, L_0xf31ce0; 1 drivers +v0xed2570_0 .net "resMux24", 7 0, L_0xf33cf0; 1 drivers +v0xed2620_0 .net "resMux25", 7 0, L_0xf34c20; 1 drivers +v0xed26d0_0 .net "resMux26", 7 0, L_0xf35de0; 1 drivers +v0xed4160_0 .net "resMux27", 7 0, L_0xf35c90; 1 drivers +v0xed3880_0 .net "resMux28", 7 0, L_0xf36470; 1 drivers +v0xed3930_0 .net "resMux29", 7 0, L_0xf354c0; 1 drivers +v0xed39e0_0 .net "resMux3", 7 0, L_0xf25270; 1 drivers +v0xed3a60_0 .net "resMux30", 7 0, L_0xf37ad0; 1 drivers +v0xed3b10_0 .net "resMux31", 7 0, L_0xf374d0; 1 drivers +v0xed3bc0_0 .net "resMux4", 7 0, L_0xf23cc0; 1 drivers +v0xed3c70_0 .net "resMux5", 7 0, L_0xf27130; 1 drivers +v0xed3d20_0 .net "resMux6", 7 0, L_0xf28390; 1 drivers +v0xed3dd0_0 .net "resMux7", 7 0, L_0xf28cf0; 1 drivers +v0xed3e80_0 .net "resMux8", 7 0, L_0xf29750; 1 drivers +v0xed3f30_0 .net "resMux9", 7 0, L_0xf2a060; 1 drivers +RS_0x7f3fa01428b8/0/0 .resolv tri, L_0xed8230, L_0xeda950, L_0xedd200, L_0xedf790; +RS_0x7f3fa01428b8/0/4 .resolv tri, L_0xee1dd0, L_0xee44b0, L_0xee6ce0, L_0xee92f0; +RS_0x7f3fa01428b8/0/8 .resolv tri, L_0xeebae0, L_0xeee400, L_0xef0be0, L_0xef33e0; +RS_0x7f3fa01428b8/0/12 .resolv tri, L_0xef5b90, L_0xef83c0, L_0xefada0, L_0xefceb0; +RS_0x7f3fa01428b8/0/16 .resolv tri, L_0xeff580, L_0xf01ca0, L_0xf042b0, L_0xf068c0; +RS_0x7f3fa01428b8/0/20 .resolv tri, L_0xf08fb0, L_0xf0b590, L_0xf0dcb0, L_0xf104a0; +RS_0x7f3fa01428b8/0/24 .resolv tri, L_0xf12be0, L_0xf150e0, L_0xf17670, L_0xf19cc0; +RS_0x7f3fa01428b8/0/28 .resolv tri, L_0xf1c370, L_0xf1e980, L_0xf21430, L_0xf23a40; +RS_0x7f3fa01428b8/1/0 .resolv tri, RS_0x7f3fa01428b8/0/0, RS_0x7f3fa01428b8/0/4, RS_0x7f3fa01428b8/0/8, RS_0x7f3fa01428b8/0/12; +RS_0x7f3fa01428b8/1/4 .resolv tri, RS_0x7f3fa01428b8/0/16, RS_0x7f3fa01428b8/0/20, RS_0x7f3fa01428b8/0/24, RS_0x7f3fa01428b8/0/28; +RS_0x7f3fa01428b8 .resolv tri, RS_0x7f3fa01428b8/1/0, RS_0x7f3fa01428b8/1/4, C4, C4; +v0xed3fe0_0 .net8 "res_premux", 31 0, RS_0x7f3fa01428b8; 32 drivers +v0xed4060_0 .alias "result", 31 0, v0xed6080_0; +v0xed40e0_0 .net "temp", 0 0, L_0xefd0e0; 1 drivers +v0xed4b40_0 .alias "zero", 0 0, v0xed61a0_0; +L_0xed8230 .part/pv L_0xed8050, 0, 1, 32; +L_0xed82d0 .part/pv L_0xed8140, 0, 1, 32; +L_0xed8370 .part v0xed5cd0_0, 0, 1; +L_0xed6c80 .part v0xed4e30_0, 0, 1; +L_0xeda950 .part/pv L_0xeda770, 1, 1, 32; +L_0xedaa40 .part/pv L_0xeda860, 1, 1, 32; +L_0xedab70 .part v0xed5cd0_0, 1, 1; +L_0xedae20 .part v0xed4e30_0, 1, 1; +L_0xedb0d0 .part RS_0x7f3fa01427f8, 0, 1; +L_0xedd200 .part/pv L_0xedd020, 2, 1, 32; +L_0xedd2a0 .part/pv L_0xedd110, 2, 1, 32; +L_0xedd3d0 .part v0xed5cd0_0, 2, 1; +L_0xedba70 .part v0xed4e30_0, 2, 1; +L_0xedbbd0 .part RS_0x7f3fa01427f8, 1, 1; +L_0xedf790 .part/pv L_0xedf5b0, 3, 1, 32; +L_0xedf8c0 .part/pv L_0xedf6a0, 3, 1, 32; +L_0xedf9f0 .part v0xed5cd0_0, 3, 1; +L_0xede2c0 .part v0xed4e30_0, 3, 1; +L_0xedfeb0 .part RS_0x7f3fa01427f8, 2, 1; +L_0xee1dd0 .part/pv L_0xee1bf0, 4, 1, 32; +L_0xede420 .part/pv L_0xee1ce0, 4, 1, 32; +L_0xee2030 .part v0xed5cd0_0, 4, 1; +L_0xee1e70 .part v0xed4e30_0, 4, 1; +L_0xee09c0 .part RS_0x7f3fa01427f8, 3, 1; +L_0xee44b0 .part/pv L_0xee42d0, 5, 1, 32; +L_0xee4550 .part/pv L_0xee43c0, 5, 1, 32; +L_0xee0860 .part v0xed5cd0_0, 5, 1; +L_0xee48e0 .part v0xed4e30_0, 5, 1; +L_0xee45f0 .part RS_0x7f3fa01427f8, 4, 1; +L_0xee6ce0 .part/pv L_0xee6b00, 6, 1, 32; +L_0xee4b90 .part/pv L_0xee6bf0, 6, 1, 32; +L_0xee6e80 .part v0xed5cd0_0, 6, 1; +L_0xee6d80 .part v0xed4e30_0, 6, 1; +L_0xee5780 .part RS_0x7f3fa01427f8, 5, 1; +L_0xee92f0 .part/pv L_0xee9110, 7, 1, 32; +L_0xee94a0 .part/pv L_0xee9200, 7, 1, 32; +L_0xee7340 .part v0xed5cd0_0, 7, 1; +L_0xee7d20 .part v0xed4e30_0, 7, 1; +L_0xee7e80 .part RS_0x7f3fa01427f8, 6, 1; +L_0xeebae0 .part/pv L_0xeeb900, 8, 1, 32; +L_0xee9a90 .part/pv L_0xeeb9f0, 8, 1, 32; +L_0xee9b30 .part v0xed5cd0_0, 8, 1; +L_0xee1f20 .part v0xed4e30_0, 8, 1; +L_0xeea420 .part RS_0x7f3fa01427f8, 7, 1; +L_0xeee400 .part/pv L_0xeee220, 9, 1, 32; +L_0xeee4a0 .part/pv L_0xeee310, 9, 1, 32; +L_0xeec460 .part v0xed5cd0_0, 9, 1; +L_0xeec500 .part v0xed4e30_0, 9, 1; +L_0xeecd30 .part RS_0x7f3fa01427f8, 8, 1; +L_0xef0be0 .part/pv L_0xef0a00, 10, 1, 32; +L_0xeeeae0 .part/pv L_0xef0af0, 10, 1, 32; +L_0xeeeb80 .part v0xed5cd0_0, 10, 1; +L_0xeef520 .part v0xed4e30_0, 10, 1; +L_0xeef680 .part RS_0x7f3fa01427f8, 9, 1; +L_0xef33e0 .part/pv L_0xef3200, 11, 1, 32; +L_0xef3480 .part/pv L_0xef32f0, 11, 1, 32; +L_0xef13f0 .part v0xed5cd0_0, 11, 1; +L_0xef1d30 .part v0xed4e30_0, 11, 1; +L_0xef1e90 .part RS_0x7f3fa01427f8, 10, 1; +L_0xef5b90 .part/pv L_0xef59b0, 12, 1, 32; +L_0xef3b10 .part/pv L_0xef5aa0, 12, 1, 32; +L_0xef3bb0 .part v0xed5cd0_0, 12, 1; +L_0xef3c50 .part v0xed4e30_0, 12, 1; +L_0xef44f0 .part RS_0x7f3fa01427f8, 11, 1; +L_0xef83c0 .part/pv L_0xef81e0, 13, 1, 32; +L_0xef8460 .part/pv L_0xef82d0, 13, 1, 32; +L_0xef6440 .part v0xed5cd0_0, 13, 1; +L_0xef6cf0 .part v0xed4e30_0, 13, 1; +L_0xee2ed0 .part RS_0x7f3fa01427f8, 12, 1; +L_0xefada0 .part/pv L_0xefabc0, 14, 1, 32; +L_0xef8f60 .part/pv L_0xefacb0, 14, 1, 32; +L_0xef9000 .part v0xed5cd0_0, 14, 1; +L_0xef90a0 .part v0xed4e30_0, 14, 1; +L_0xef96e0 .part RS_0x7f3fa01427f8, 13, 1; +L_0xefceb0 .part/pv L_0xefccd0, 15, 1, 32; +L_0xee9390 .part/pv L_0xefcdc0, 15, 1, 32; +L_0xefb290 .part v0xed5cd0_0, 15, 1; +L_0xefb900 .part v0xed4e30_0, 15, 1; +L_0xefba60 .part RS_0x7f3fa01427f8, 14, 1; +L_0xeff580 .part/pv L_0xeff3a0, 16, 1, 32; +L_0xefd7f0 .part/pv L_0xeff490, 16, 1, 32; +L_0xefd890 .part v0xed5cd0_0, 16, 1; +L_0xefdff0 .part v0xed4e30_0, 16, 1; +L_0xefe150 .part RS_0x7f3fa01427f8, 15, 1; +L_0xf01ca0 .part/pv L_0xf01ac0, 17, 1, 32; +L_0xf01d40 .part/pv L_0xf01bb0, 17, 1, 32; +L_0xeffcc0 .part v0xed5cd0_0, 17, 1; +L_0xf00740 .part v0xed4e30_0, 17, 1; +L_0xf008a0 .part RS_0x7f3fa01427f8, 16, 1; +L_0xf042b0 .part/pv L_0xf040d0, 18, 1, 32; +L_0xf022b0 .part/pv L_0xf041c0, 18, 1, 32; +L_0xf02350 .part v0xed5cd0_0, 18, 1; +L_0xf02d20 .part v0xed4e30_0, 18, 1; +L_0xf04560 .part RS_0x7f3fa01427f8, 17, 1; +L_0xf068c0 .part/pv L_0xf066e0, 19, 1, 32; +L_0xf06960 .part/pv L_0xf067d0, 19, 1, 32; +L_0xf04840 .part v0xed5cd0_0, 19, 1; +L_0xf05310 .part v0xed4e30_0, 19, 1; +L_0xf05470 .part RS_0x7f3fa01427f8, 18, 1; +L_0xf08fb0 .part/pv L_0xf08dd0, 20, 1, 32; +L_0xf06f20 .part/pv L_0xf08ec0, 20, 1, 32; +L_0xf06fc0 .part v0xed5cd0_0, 20, 1; +L_0xf07940 .part v0xed4e30_0, 20, 1; +L_0xf07aa0 .part RS_0x7f3fa01427f8, 19, 1; +L_0xf0b590 .part/pv L_0xf0b400, 21, 1, 32; +L_0xf0b630 .part/pv L_0xf0b4a0, 21, 1, 32; +L_0xf09590 .part v0xed5cd0_0, 21, 1; +L_0xf09840 .part v0xed4e30_0, 21, 1; +L_0xf0a000 .part RS_0x7f3fa01427f8, 20, 1; +L_0xf0dcb0 .part/pv L_0xf0dad0, 22, 1, 32; +L_0xf0bc40 .part/pv L_0xf0dbc0, 22, 1, 32; +L_0xf0bce0 .part v0xed5cd0_0, 22, 1; +L_0xf0c5f0 .part v0xed4e30_0, 22, 1; +L_0xf0c750 .part RS_0x7f3fa01427f8, 21, 1; +L_0xf104a0 .part/pv L_0xf102c0, 23, 1, 32; +L_0xf10540 .part/pv L_0xf103b0, 23, 1, 32; +L_0xf0e2f0 .part v0xed5cd0_0, 23, 1; +L_0xf0e5a0 .part v0xed4e30_0, 23, 1; +L_0xf0edf0 .part RS_0x7f3fa01427f8, 22, 1; +L_0xf12be0 .part/pv L_0xf12aa0, 24, 1, 32; +L_0xf10ba0 .part/pv L_0xf12b40, 24, 1, 32; +L_0xf10c40 .part v0xed5cd0_0, 24, 1; +L_0xf115c0 .part v0xed4e30_0, 24, 1; +L_0xf11720 .part RS_0x7f3fa01427f8, 23, 1; +L_0xf150e0 .part/pv L_0xf129f0, 25, 1, 32; +L_0xf15180 .part/pv L_0xf14ff0, 25, 1, 32; +L_0xf13270 .part v0xed5cd0_0, 25, 1; +L_0xf13b80 .part v0xed4e30_0, 25, 1; +L_0xf13ce0 .part RS_0x7f3fa01427f8, 24, 1; +L_0xf17670 .part/pv L_0xf174e0, 26, 1, 32; +L_0xf15830 .part/pv L_0xf17580, 26, 1, 32; +L_0xf158d0 .part v0xed5cd0_0, 26, 1; +L_0xf15b80 .part v0xed4e30_0, 26, 1; +L_0xf16080 .part RS_0x7f3fa01427f8, 25, 1; +L_0xf19cc0 .part/pv L_0xf173e0, 27, 1, 32; +L_0xf19d60 .part/pv L_0xf19bd0, 27, 1, 32; +L_0xf17d50 .part v0xed5cd0_0, 27, 1; +L_0xf18640 .part v0xed4e30_0, 27, 1; +L_0xf187a0 .part RS_0x7f3fa01427f8, 26, 1; +L_0xf1c370 .part/pv L_0xf19af0, 28, 1, 32; +L_0xf1a460 .part/pv L_0xf1c280, 28, 1, 32; +L_0xf1a500 .part v0xed5cd0_0, 28, 1; +L_0xf1a7b0 .part v0xed4e30_0, 28, 1; +L_0xf1aca0 .part RS_0x7f3fa01427f8, 27, 1; +L_0xf1e980 .part/pv L_0xf1c0e0, 29, 1, 32; +L_0xf1ea20 .part/pv L_0xf1e8e0, 29, 1, 32; +L_0xf1caa0 .part v0xed5cd0_0, 29, 1; +L_0xf1d360 .part v0xed4e30_0, 29, 1; +L_0xf1d4c0 .part RS_0x7f3fa01427f8, 28, 1; +L_0xf21430 .part/pv L_0xf1e7b0, 30, 1, 32; +L_0xf1f780 .part/pv L_0xf21340, 30, 1, 32; +L_0xf1f820 .part v0xed5cd0_0, 30, 1; +L_0xf1fdf0 .part v0xed4e30_0, 30, 1; +L_0xf1ff50 .part RS_0x7f3fa01427f8, 29, 1; +L_0xf23a40 .part/pv L_0xf211a0, 31, 1, 32; +L_0xefcf50 .part v0xed5cd0_0, 31, 1; +L_0xf22430 .part v0xed4e30_0, 31, 1; +L_0xf22590 .part RS_0x7f3fa01427f8, 30, 1; +L_0xefcff0 .part RS_0x7f3fa01427f8, 30, 1; +L_0xf21e90 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf21f30 .part RS_0x7f3fa01428b8, 0, 1; +L_0xf21fd0 .part RS_0x7f3fa01428b8, 0, 1; +L_0xf24620 .part RS_0x7f3fa01428b8, 0, 1; +L_0xf246c0 .part RS_0x7f3fa01428b8, 0, 1; +L_0xf24100 .part RS_0x7f3fa01428b8, 0, 1; +L_0xf241a0 .part RS_0x7f3fa01428b8, 0, 1; +L_0xf24240 .part RS_0x7f3fa01428b8, 0, 1; +LS_0xf242e0_0_0 .concat [ 1 1 1 1], L_0xf24240, L_0xf241a0, L_0xf24100, L_0xefd0e0; +LS_0xf242e0_0_4 .concat [ 1 1 1 1], L_0xf246c0, L_0xf24620, L_0xf21fd0, L_0xf21f30; +L_0xf242e0 .concat [ 4 4 0 0], LS_0xf242e0_0_0, LS_0xf242e0_0_4; +L_0xf24800 .part/pv L_0xf24760, 0, 1, 32; +L_0xf248f0 .part RS_0x7f3fa01428b8, 1, 1; +L_0xf24990 .part RS_0x7f3fa01428b8, 1, 1; +L_0xf24a30 .part RS_0x7f3fa01428b8, 1, 1; +L_0xf24ad0 .part RS_0x7f3fa01428b8, 1, 1; +L_0xf24bb0 .part RS_0x7f3fa01428b8, 1, 1; +L_0xf23530 .part RS_0x7f3fa01428b8, 1, 1; +L_0xf235d0 .part RS_0x7f3fa01428b8, 1, 1; +LS_0xf23670_0_0 .concat [ 1 1 1 1], L_0xf235d0, L_0xf23530, L_0xf24bb0, C4<0>; +LS_0xf23670_0_4 .concat [ 1 1 1 1], L_0xf24ad0, L_0xf24a30, L_0xf24990, L_0xf248f0; +L_0xf23670 .concat [ 4 4 0 0], LS_0xf23670_0_0, LS_0xf23670_0_4; +L_0xf24de0 .part/pv L_0xf24d40, 1, 1, 32; +L_0xf24f10 .part RS_0x7f3fa01428b8, 2, 1; +L_0xf24fb0 .part RS_0x7f3fa01428b8, 2, 1; +L_0xf25050 .part RS_0x7f3fa01428b8, 2, 1; +L_0xf250f0 .part RS_0x7f3fa01428b8, 2, 1; +L_0xec8870 .part RS_0x7f3fa01428b8, 2, 1; +L_0xf256f0 .part RS_0x7f3fa01428b8, 2, 1; +L_0xf25da0 .part RS_0x7f3fa01428b8, 2, 1; +LS_0xf25e40_0_0 .concat [ 1 1 1 1], L_0xf25da0, L_0xf256f0, L_0xec8870, C4<0>; +LS_0xf25e40_0_4 .concat [ 1 1 1 1], L_0xf250f0, L_0xf25050, L_0xf24fb0, L_0xf24f10; +L_0xf25e40 .concat [ 4 4 0 0], LS_0xf25e40_0_0, LS_0xf25e40_0_4; +L_0xf25830 .part/pv L_0xf25790, 2, 1, 32; +L_0xf25920 .part RS_0x7f3fa01428b8, 3, 1; +L_0xf259c0 .part RS_0x7f3fa01428b8, 3, 1; +L_0xf25a60 .part RS_0x7f3fa01428b8, 3, 1; +L_0xf25b00 .part RS_0x7f3fa01428b8, 3, 1; +L_0xf25be0 .part RS_0x7f3fa01428b8, 3, 1; +L_0xf25c80 .part RS_0x7f3fa01428b8, 3, 1; +L_0xf251d0 .part RS_0x7f3fa01428b8, 3, 1; +LS_0xf25270_0_0 .concat [ 1 1 1 1], L_0xf251d0, L_0xf25c80, L_0xf25be0, C4<0>; +LS_0xf25270_0_4 .concat [ 1 1 1 1], L_0xf25b00, L_0xf25a60, L_0xf259c0, L_0xf25920; +L_0xf25270 .concat [ 4 4 0 0], LS_0xf25270_0_0, LS_0xf25270_0_4; +L_0xf261b0 .part/pv L_0xf25630, 3, 1, 32; +L_0xf262a0 .part RS_0x7f3fa01428b8, 4, 1; +L_0xf26340 .part RS_0x7f3fa01428b8, 4, 1; +L_0xf263e0 .part RS_0x7f3fa01428b8, 4, 1; +L_0xf26480 .part RS_0x7f3fa01428b8, 4, 1; +L_0xf23ae0 .part RS_0x7f3fa01428b8, 4, 1; +L_0xf23b80 .part RS_0x7f3fa01428b8, 4, 1; +L_0xf23c20 .part RS_0x7f3fa01428b8, 4, 1; +LS_0xf23cc0_0_0 .concat [ 1 1 1 1], L_0xf23c20, L_0xf23b80, L_0xf23ae0, C4<0>; +LS_0xf23cc0_0_4 .concat [ 1 1 1 1], L_0xf26480, L_0xf263e0, L_0xf26340, L_0xf262a0; +L_0xf23cc0 .concat [ 4 4 0 0], LS_0xf23cc0_0_0, LS_0xf23cc0_0_4; +L_0xf26be0 .part/pv L_0xf26b40, 4, 1, 32; +L_0xf26cd0 .part RS_0x7f3fa01428b8, 5, 1; +L_0xf26d70 .part RS_0x7f3fa01428b8, 5, 1; +L_0xf26e10 .part RS_0x7f3fa01428b8, 5, 1; +L_0xf26eb0 .part RS_0x7f3fa01428b8, 5, 1; +L_0xf26f50 .part RS_0x7f3fa01428b8, 5, 1; +L_0xf26ff0 .part RS_0x7f3fa01428b8, 5, 1; +L_0xf27090 .part RS_0x7f3fa01428b8, 5, 1; +LS_0xf27130_0_0 .concat [ 1 1 1 1], L_0xf27090, L_0xf26ff0, L_0xf26f50, C4<0>; +LS_0xf27130_0_4 .concat [ 1 1 1 1], L_0xf26eb0, L_0xf26e10, L_0xf26d70, L_0xf26cd0; +L_0xf27130 .concat [ 4 4 0 0], LS_0xf27130_0_0, LS_0xf27130_0_4; +L_0xf26750 .part/pv L_0xf266b0, 5, 1, 32; +L_0xf26900 .part RS_0x7f3fa01428b8, 6, 1; +L_0xf269a0 .part RS_0x7f3fa01428b8, 6, 1; +L_0xf27b30 .part RS_0x7f3fa01428b8, 6, 1; +L_0xf27bd0 .part RS_0x7f3fa01428b8, 6, 1; +L_0xf281b0 .part RS_0x7f3fa01428b8, 6, 1; +L_0xf28250 .part RS_0x7f3fa01428b8, 6, 1; +L_0xf282f0 .part RS_0x7f3fa01428b8, 6, 1; +LS_0xf28390_0_0 .concat [ 1 1 1 1], L_0xf282f0, L_0xf28250, L_0xf281b0, C4<0>; +LS_0xf28390_0_4 .concat [ 1 1 1 1], L_0xf27bd0, L_0xf27b30, L_0xf269a0, L_0xf26900; +L_0xf28390 .concat [ 4 4 0 0], LS_0xf28390_0_0, LS_0xf28390_0_4; +L_0xf287a0 .part/pv L_0xf28700, 6, 1, 32; +L_0xf28890 .part RS_0x7f3fa01428b8, 7, 1; +L_0xf28930 .part RS_0x7f3fa01428b8, 7, 1; +L_0xf289d0 .part RS_0x7f3fa01428b8, 7, 1; +L_0xf28a70 .part RS_0x7f3fa01428b8, 7, 1; +L_0xf28b10 .part RS_0x7f3fa01428b8, 7, 1; +L_0xf28bb0 .part RS_0x7f3fa01428b8, 7, 1; +L_0xf28c50 .part RS_0x7f3fa01428b8, 7, 1; +LS_0xf28cf0_0_0 .concat [ 1 1 1 1], L_0xf28c50, L_0xf28bb0, L_0xf28b10, C4<0>; +LS_0xf28cf0_0_4 .concat [ 1 1 1 1], L_0xf28a70, L_0xf289d0, L_0xf28930, L_0xf28890; +L_0xf28cf0 .concat [ 4 4 0 0], LS_0xf28cf0_0_0, LS_0xf28cf0_0_4; +L_0xf27f90 .part/pv L_0xf27ef0, 7, 1, 32; +L_0xf28080 .part RS_0x7f3fa01428b8, 8, 1; +L_0xf28e40 .part RS_0x7f3fa01428b8, 8, 1; +L_0xf28ee0 .part RS_0x7f3fa01428b8, 8, 1; +L_0xf28f80 .part RS_0x7f3fa01428b8, 8, 1; +L_0xf29570 .part RS_0x7f3fa01428b8, 8, 1; +L_0xf29610 .part RS_0x7f3fa01428b8, 8, 1; +L_0xf296b0 .part RS_0x7f3fa01428b8, 8, 1; +LS_0xf29750_0_0 .concat [ 1 1 1 1], L_0xf296b0, L_0xf29610, L_0xf29570, C4<0>; +LS_0xf29750_0_4 .concat [ 1 1 1 1], L_0xf28f80, L_0xf28ee0, L_0xf28e40, L_0xf28080; +L_0xf29750 .concat [ 4 4 0 0], LS_0xf29750_0_0, LS_0xf29750_0_4; +L_0xf29b10 .part/pv L_0xf29a70, 8, 1, 32; +L_0xf29c00 .part RS_0x7f3fa01428b8, 9, 1; +L_0xf29ca0 .part RS_0x7f3fa01428b8, 9, 1; +L_0xf29d40 .part RS_0x7f3fa01428b8, 9, 1; +L_0xf29de0 .part RS_0x7f3fa01428b8, 9, 1; +L_0xf29e80 .part RS_0x7f3fa01428b8, 9, 1; +L_0xf29f20 .part RS_0x7f3fa01428b8, 9, 1; +L_0xf29fc0 .part RS_0x7f3fa01428b8, 9, 1; +LS_0xf2a060_0_0 .concat [ 1 1 1 1], L_0xf29fc0, L_0xf29f20, L_0xf29e80, C4<0>; +LS_0xf2a060_0_4 .concat [ 1 1 1 1], L_0xf29de0, L_0xf29d40, L_0xf29ca0, L_0xf29c00; +L_0xf2a060 .concat [ 4 4 0 0], LS_0xf2a060_0_0, LS_0xf2a060_0_4; +L_0xf292f0 .part/pv L_0xf29250, 9, 1, 32; +L_0xf293e0 .part RS_0x7f3fa01428b8, 10, 1; +L_0xf29480 .part RS_0x7f3fa01428b8, 10, 1; +L_0xf2a280 .part RS_0x7f3fa01428b8, 10, 1; +L_0xf2a320 .part RS_0x7f3fa01428b8, 10, 1; +L_0xf2a920 .part RS_0x7f3fa01428b8, 10, 1; +L_0xf2a9c0 .part RS_0x7f3fa01428b8, 10, 1; +L_0xf2aa60 .part RS_0x7f3fa01428b8, 10, 1; +LS_0xf2ab00_0_0 .concat [ 1 1 1 1], L_0xf2aa60, L_0xf2a9c0, L_0xf2a920, C4<0>; +LS_0xf2ab00_0_4 .concat [ 1 1 1 1], L_0xf2a320, L_0xf2a280, L_0xf29480, L_0xf293e0; +L_0xf2ab00 .concat [ 4 4 0 0], LS_0xf2ab00_0_0, LS_0xf2ab00_0_4; +L_0xf2b7b0 .part/pv L_0xf2ae70, 10, 1, 32; +L_0xf2b850 .part RS_0x7f3fa01428b8, 11, 1; +L_0xf2af10 .part RS_0x7f3fa01428b8, 11, 1; +L_0xf2afb0 .part RS_0x7f3fa01428b8, 11, 1; +L_0xf2b050 .part RS_0x7f3fa01428b8, 11, 1; +L_0xf2b660 .part RS_0x7f3fa01428b8, 11, 1; +L_0xf2b700 .part RS_0x7f3fa01428b8, 11, 1; +L_0xf2a3c0 .part RS_0x7f3fa01428b8, 11, 1; +LS_0xf2a460_0_0 .concat [ 1 1 1 1], L_0xf2a3c0, L_0xf2b700, L_0xf2b660, C4<0>; +LS_0xf2a460_0_4 .concat [ 1 1 1 1], L_0xf2b050, L_0xf2afb0, L_0xf2af10, L_0xf2b850; +L_0xf2a460 .concat [ 4 4 0 0], LS_0xf2a460_0_0, LS_0xf2a460_0_4; +L_0xf2c150 .part/pv L_0xf2a820, 11, 1, 32; +L_0xf2b8f0 .part RS_0x7f3fa01428b8, 12, 1; +L_0xf2b990 .part RS_0x7f3fa01428b8, 12, 1; +L_0xf2ba30 .part RS_0x7f3fa01428b8, 12, 1; +L_0xf2bad0 .part RS_0x7f3fa01428b8, 12, 1; +L_0xf2bb70 .part RS_0x7f3fa01428b8, 12, 1; +L_0xf2bc10 .part RS_0x7f3fa01428b8, 12, 1; +L_0xf2bcb0 .part RS_0x7f3fa01428b8, 12, 1; +LS_0xf2bd50_0_0 .concat [ 1 1 1 1], L_0xf2bcb0, L_0xf2bc10, L_0xf2bb70, C4<0>; +LS_0xf2bd50_0_4 .concat [ 1 1 1 1], L_0xf2bad0, L_0xf2ba30, L_0xf2b990, L_0xf2b8f0; +L_0xf2bd50 .concat [ 4 4 0 0], LS_0xf2bd50_0_0, LS_0xf2bd50_0_4; +L_0xf2cb40 .part/pv L_0xf2caa0, 12, 1, 32; +L_0xf2cbe0 .part RS_0x7f3fa01428b8, 13, 1; +L_0xf2c1f0 .part RS_0x7f3fa01428b8, 13, 1; +L_0xf2c290 .part RS_0x7f3fa01428b8, 13, 1; +L_0xf2c330 .part RS_0x7f3fa01428b8, 13, 1; +L_0xf2c950 .part RS_0x7f3fa01428b8, 13, 1; +L_0xf2c9f0 .part RS_0x7f3fa01428b8, 13, 1; +L_0xf2b0f0 .part RS_0x7f3fa01428b8, 13, 1; +LS_0xf2b190_0_0 .concat [ 1 1 1 1], L_0xf2b0f0, L_0xf2c9f0, L_0xf2c950, C4<0>; +LS_0xf2b190_0_4 .concat [ 1 1 1 1], L_0xf2c330, L_0xf2c290, L_0xf2c1f0, L_0xf2cbe0; +L_0xf2b190 .concat [ 4 4 0 0], LS_0xf2b190_0_0, LS_0xf2b190_0_4; +L_0xf27320 .part/pv L_0xf2b550, 13, 1, 32; +L_0xf267f0 .part RS_0x7f3fa01428b8, 14, 1; +L_0xf275d0 .part RS_0x7f3fa01428b8, 14, 1; +L_0xf27670 .part RS_0x7f3fa01428b8, 14, 1; +L_0xf27710 .part RS_0x7f3fa01428b8, 14, 1; +L_0xf277f0 .part RS_0x7f3fa01428b8, 14, 1; +L_0xf27890 .part RS_0x7f3fa01428b8, 14, 1; +L_0xf27930 .part RS_0x7f3fa01428b8, 14, 1; +LS_0xf279d0_0_0 .concat [ 1 1 1 1], L_0xf27930, L_0xf27890, L_0xf277f0, C4<0>; +LS_0xf279d0_0_4 .concat [ 1 1 1 1], L_0xf27710, L_0xf27670, L_0xf275d0, L_0xf267f0; +L_0xf279d0 .concat [ 4 4 0 0], LS_0xf279d0_0_0, LS_0xf279d0_0_4; +L_0xf2cf00 .part/pv L_0xf2ce60, 14, 1, 32; +L_0xf2cff0 .part RS_0x7f3fa01428b8, 15, 1; +L_0xf2d090 .part RS_0x7f3fa01428b8, 15, 1; +L_0xf2d130 .part RS_0x7f3fa01428b8, 15, 1; +L_0xf2d1d0 .part RS_0x7f3fa01428b8, 15, 1; +L_0xf2d270 .part RS_0x7f3fa01428b8, 15, 1; +L_0xf2d310 .part RS_0x7f3fa01428b8, 15, 1; +L_0xf2d3b0 .part RS_0x7f3fa01428b8, 15, 1; +LS_0xf2d450_0_0 .concat [ 1 1 1 1], L_0xf2d3b0, L_0xf2d310, L_0xf2d270, C4<0>; +LS_0xf2d450_0_4 .concat [ 1 1 1 1], L_0xf2d1d0, L_0xf2d130, L_0xf2d090, L_0xf2cff0; +L_0xf2d450 .concat [ 4 4 0 0], LS_0xf2d450_0_0, LS_0xf2d450_0_4; +L_0xf2c740 .part/pv L_0xf2c6a0, 15, 1, 32; +L_0xf2c830 .part RS_0x7f3fa01428b8, 16, 1; +L_0xf2e560 .part RS_0x7f3fa01428b8, 16, 1; +L_0xf2e600 .part RS_0x7f3fa01428b8, 16, 1; +L_0xf2e6a0 .part RS_0x7f3fa01428b8, 16, 1; +L_0xf2ecd0 .part RS_0x7f3fa01428b8, 16, 1; +L_0xf2ed70 .part RS_0x7f3fa01428b8, 16, 1; +L_0xf2ee10 .part RS_0x7f3fa01428b8, 16, 1; +LS_0xf2eeb0_0_0 .concat [ 1 1 1 1], L_0xf2ee10, L_0xf2ed70, L_0xf2ecd0, C4<0>; +LS_0xf2eeb0_0_4 .concat [ 1 1 1 1], L_0xf2e6a0, L_0xf2e600, L_0xf2e560, L_0xf2c830; +L_0xf2eeb0 .concat [ 4 4 0 0], LS_0xf2eeb0_0_0, LS_0xf2eeb0_0_4; +L_0xf2f310 .part/pv L_0xf2f270, 16, 1, 32; +L_0xf2fe20 .part RS_0x7f3fa01428b8, 17, 1; +L_0xf2f400 .part RS_0x7f3fa01428b8, 17, 1; +L_0xf2f4a0 .part RS_0x7f3fa01428b8, 17, 1; +L_0xf2f540 .part RS_0x7f3fa01428b8, 17, 1; +L_0xf2fb80 .part RS_0x7f3fa01428b8, 17, 1; +L_0xf2fc20 .part RS_0x7f3fa01428b8, 17, 1; +L_0xf2fcc0 .part RS_0x7f3fa01428b8, 17, 1; +LS_0xf2fd60_0_0 .concat [ 1 1 1 1], L_0xf2fcc0, L_0xf2fc20, L_0xf2fb80, C4<0>; +LS_0xf2fd60_0_4 .concat [ 1 1 1 1], L_0xf2f540, L_0xf2f4a0, L_0xf2f400, L_0xf2fe20; +L_0xf2fd60 .concat [ 4 4 0 0], LS_0xf2fd60_0_0, LS_0xf2fd60_0_4; +L_0xf2ea10 .part/pv L_0xf2e970, 17, 1, 32; +L_0xf2eb00 .part RS_0x7f3fa01428b8, 18, 1; +L_0xf2eba0 .part RS_0x7f3fa01428b8, 18, 1; +L_0xf308f0 .part RS_0x7f3fa01428b8, 18, 1; +L_0xf30990 .part RS_0x7f3fa01428b8, 18, 1; +L_0xf2fec0 .part RS_0x7f3fa01428b8, 18, 1; +L_0xf2ff60 .part RS_0x7f3fa01428b8, 18, 1; +L_0xf30000 .part RS_0x7f3fa01428b8, 18, 1; +LS_0xf300a0_0_0 .concat [ 1 1 1 1], L_0xf30000, L_0xf2ff60, L_0xf2fec0, C4<0>; +LS_0xf300a0_0_4 .concat [ 1 1 1 1], L_0xf30990, L_0xf308f0, L_0xf2eba0, L_0xf2eb00; +L_0xf300a0 .concat [ 4 4 0 0], LS_0xf300a0_0_0, LS_0xf300a0_0_4; +L_0xf304b0 .part/pv L_0xf30410, 18, 1, 32; +L_0xf305a0 .part RS_0x7f3fa01428b8, 19, 1; +L_0xf30640 .part RS_0x7f3fa01428b8, 19, 1; +L_0xf306e0 .part RS_0x7f3fa01428b8, 19, 1; +L_0xf30780 .part RS_0x7f3fa01428b8, 19, 1; +L_0xf30820 .part RS_0x7f3fa01428b8, 19, 1; +L_0xf2f5e0 .part RS_0x7f3fa01428b8, 19, 1; +L_0xf2f680 .part RS_0x7f3fa01428b8, 19, 1; +LS_0xf2f720_0_0 .concat [ 1 1 1 1], L_0xf2f680, L_0xf2f5e0, L_0xf30820, C4<0>; +LS_0xf2f720_0_4 .concat [ 1 1 1 1], L_0xf30780, L_0xf306e0, L_0xf30640, L_0xf305a0; +L_0xf2f720 .concat [ 4 4 0 0], LS_0xf2f720_0_0, LS_0xf2f720_0_4; +L_0xf30a30 .part/pv L_0xf2fae0, 19, 1, 32; +L_0xf30b20 .part RS_0x7f3fa01428b8, 20, 1; +L_0xf30bc0 .part RS_0x7f3fa01428b8, 20, 1; +L_0xf30c60 .part RS_0x7f3fa01428b8, 20, 1; +L_0xf30d00 .part RS_0x7f3fa01428b8, 20, 1; +L_0xf31390 .part RS_0x7f3fa01428b8, 20, 1; +L_0xf31430 .part RS_0x7f3fa01428b8, 20, 1; +L_0xf314d0 .part RS_0x7f3fa01428b8, 20, 1; +LS_0xf31570_0_0 .concat [ 1 1 1 1], L_0xf314d0, L_0xf31430, L_0xf31390, C4<0>; +LS_0xf31570_0_4 .concat [ 1 1 1 1], L_0xf30d00, L_0xf30c60, L_0xf30bc0, L_0xf30b20; +L_0xf31570 .concat [ 4 4 0 0], LS_0xf31570_0_0, LS_0xf31570_0_4; +L_0xf32550 .part/pv L_0xf31930, 20, 1, 32; +L_0xf325f0 .part RS_0x7f3fa01428b8, 21, 1; +L_0xf31a20 .part RS_0x7f3fa01428b8, 21, 1; +L_0xf31ac0 .part RS_0x7f3fa01428b8, 21, 1; +L_0xf31b60 .part RS_0x7f3fa01428b8, 21, 1; +L_0xf32200 .part RS_0x7f3fa01428b8, 21, 1; +L_0xf322a0 .part RS_0x7f3fa01428b8, 21, 1; +L_0xf32340 .part RS_0x7f3fa01428b8, 21, 1; +LS_0xf323e0_0_0 .concat [ 1 1 1 1], L_0xf32340, L_0xf322a0, L_0xf32200, C4<0>; +LS_0xf323e0_0_4 .concat [ 1 1 1 1], L_0xf31b60, L_0xf31ac0, L_0xf31a20, L_0xf325f0; +L_0xf323e0 .concat [ 4 4 0 0], LS_0xf323e0_0_0, LS_0xf323e0_0_4; +L_0xf310b0 .part/pv L_0xf31010, 21, 1, 32; +L_0xf311a0 .part RS_0x7f3fa01428b8, 22, 1; +L_0xf31240 .part RS_0x7f3fa01428b8, 22, 1; +L_0xf312e0 .part RS_0x7f3fa01428b8, 22, 1; +L_0xf331e0 .part RS_0x7f3fa01428b8, 22, 1; +L_0xf32690 .part RS_0x7f3fa01428b8, 22, 1; +L_0xf32730 .part RS_0x7f3fa01428b8, 22, 1; +L_0xf327d0 .part RS_0x7f3fa01428b8, 22, 1; +LS_0xf32870_0_0 .concat [ 1 1 1 1], L_0xf327d0, L_0xf32730, L_0xf32690, C4<0>; +LS_0xf32870_0_4 .concat [ 1 1 1 1], L_0xf331e0, L_0xf312e0, L_0xf31240, L_0xf311a0; +L_0xf32870 .concat [ 4 4 0 0], LS_0xf32870_0_0, LS_0xf32870_0_4; +L_0xf32cd0 .part/pv L_0xf32c30, 22, 1, 32; +L_0xf32dc0 .part RS_0x7f3fa01428b8, 23, 1; +L_0xf32e60 .part RS_0x7f3fa01428b8, 23, 1; +L_0xf32f00 .part RS_0x7f3fa01428b8, 23, 1; +L_0xf32fa0 .part RS_0x7f3fa01428b8, 23, 1; +L_0xf33080 .part RS_0x7f3fa01428b8, 23, 1; +L_0xf33120 .part RS_0x7f3fa01428b8, 23, 1; +L_0xf31c40 .part RS_0x7f3fa01428b8, 23, 1; +LS_0xf31ce0_0_0 .concat [ 1 1 1 1], L_0xf31c40, L_0xf33120, L_0xf33080, C4<0>; +LS_0xf31ce0_0_4 .concat [ 1 1 1 1], L_0xf32fa0, L_0xf32f00, L_0xf32e60, L_0xf32dc0; +L_0xf31ce0 .concat [ 4 4 0 0], LS_0xf31ce0_0_0, LS_0xf31ce0_0_4; +L_0xf32140 .part/pv L_0xf320a0, 23, 1, 32; +L_0xf33280 .part RS_0x7f3fa01428b8, 24, 1; +L_0xf33320 .part RS_0x7f3fa01428b8, 24, 1; +L_0xf333c0 .part RS_0x7f3fa01428b8, 24, 1; +L_0xf33460 .part RS_0x7f3fa01428b8, 24, 1; +L_0xf33b10 .part RS_0x7f3fa01428b8, 24, 1; +L_0xf33bb0 .part RS_0x7f3fa01428b8, 24, 1; +L_0xf33c50 .part RS_0x7f3fa01428b8, 24, 1; +LS_0xf33cf0_0_0 .concat [ 1 1 1 1], L_0xf33c50, L_0xf33bb0, L_0xf33b10, C4<0>; +LS_0xf33cf0_0_4 .concat [ 1 1 1 1], L_0xf33460, L_0xf333c0, L_0xf33320, L_0xf33280; +L_0xf33cf0 .concat [ 4 4 0 0], LS_0xf33cf0_0_0, LS_0xf33cf0_0_4; +L_0xf34150 .part/pv L_0xf340b0, 24, 1, 32; +L_0xf34240 .part RS_0x7f3fa01428b8, 25, 1; +L_0xf342e0 .part RS_0x7f3fa01428b8, 25, 1; +L_0xf35010 .part RS_0x7f3fa01428b8, 25, 1; +L_0xf34380 .part RS_0x7f3fa01428b8, 25, 1; +L_0xf34a40 .part RS_0x7f3fa01428b8, 25, 1; +L_0xf34ae0 .part RS_0x7f3fa01428b8, 25, 1; +L_0xf34b80 .part RS_0x7f3fa01428b8, 25, 1; +LS_0xf34c20_0_0 .concat [ 1 1 1 1], L_0xf34b80, L_0xf34ae0, L_0xf34a40, C4<0>; +LS_0xf34c20_0_4 .concat [ 1 1 1 1], L_0xf34380, L_0xf35010, L_0xf342e0, L_0xf34240; +L_0xf34c20 .concat [ 4 4 0 0], LS_0xf34c20_0_0, LS_0xf34c20_0_4; +L_0xf335e0 .part/pv L_0xf33540, 25, 1, 32; +L_0xf336d0 .part RS_0x7f3fa01428b8, 26, 1; +L_0xf33770 .part RS_0x7f3fa01428b8, 26, 1; +L_0xf33810 .part RS_0x7f3fa01428b8, 26, 1; +L_0xf338b0 .part RS_0x7f3fa01428b8, 26, 1; +L_0xf33990 .part RS_0x7f3fa01428b8, 26, 1; +L_0xf33a30 .part RS_0x7f3fa01428b8, 26, 1; +L_0xf35d40 .part RS_0x7f3fa01428b8, 26, 1; +LS_0xf35de0_0_0 .concat [ 1 1 1 1], L_0xf35d40, L_0xf33a30, L_0xf33990, C4<0>; +LS_0xf35de0_0_4 .concat [ 1 1 1 1], L_0xf338b0, L_0xf33810, L_0xf33770, L_0xf336d0; +L_0xf35de0 .concat [ 4 4 0 0], LS_0xf35de0_0_0, LS_0xf35de0_0_4; +L_0xf35150 .part/pv L_0xf350b0, 26, 1, 32; +L_0xf35240 .part RS_0x7f3fa01428b8, 27, 1; +L_0xf352e0 .part RS_0x7f3fa01428b8, 27, 1; +L_0xf35380 .part RS_0x7f3fa01428b8, 27, 1; +L_0xf35420 .part RS_0x7f3fa01428b8, 27, 1; +L_0xf35ab0 .part RS_0x7f3fa01428b8, 27, 1; +L_0xf35b50 .part RS_0x7f3fa01428b8, 27, 1; +L_0xf35bf0 .part RS_0x7f3fa01428b8, 27, 1; +LS_0xf35c90_0_0 .concat [ 1 1 1 1], L_0xf35bf0, L_0xf35b50, L_0xf35ab0, C4<0>; +LS_0xf35c90_0_4 .concat [ 1 1 1 1], L_0xf35420, L_0xf35380, L_0xf352e0, L_0xf35240; +L_0xf35c90 .concat [ 4 4 0 0], LS_0xf35c90_0_0, LS_0xf35c90_0_4; +L_0xf34820 .part/pv L_0xf34780, 27, 1, 32; +L_0xf34910 .part RS_0x7f3fa01428b8, 28, 1; +L_0xf36e40 .part RS_0x7f3fa01428b8, 28, 1; +L_0xf36150 .part RS_0x7f3fa01428b8, 28, 1; +L_0xf361f0 .part RS_0x7f3fa01428b8, 28, 1; +L_0xf36290 .part RS_0x7f3fa01428b8, 28, 1; +L_0xf36330 .part RS_0x7f3fa01428b8, 28, 1; +L_0xf363d0 .part RS_0x7f3fa01428b8, 28, 1; +LS_0xf36470_0_0 .concat [ 1 1 1 1], L_0xf363d0, L_0xf36330, L_0xf36290, C4<0>; +LS_0xf36470_0_4 .concat [ 1 1 1 1], L_0xf361f0, L_0xf36150, L_0xf36e40, L_0xf34910; +L_0xf36470 .concat [ 4 4 0 0], LS_0xf36470_0_0, LS_0xf36470_0_4; +L_0xf368d0 .part/pv L_0xf36830, 28, 1, 32; +L_0xf369c0 .part RS_0x7f3fa01428b8, 29, 1; +L_0xf36a60 .part RS_0x7f3fa01428b8, 29, 1; +L_0xf36b00 .part RS_0x7f3fa01428b8, 29, 1; +L_0xf36ba0 .part RS_0x7f3fa01428b8, 29, 1; +L_0xf36c40 .part RS_0x7f3fa01428b8, 29, 1; +L_0xf36ce0 .part RS_0x7f3fa01428b8, 29, 1; +L_0xf36d80 .part RS_0x7f3fa01428b8, 29, 1; +LS_0xf354c0_0_0 .concat [ 1 1 1 1], L_0xf36d80, L_0xf36ce0, L_0xf36c40, C4<0>; +LS_0xf354c0_0_4 .concat [ 1 1 1 1], L_0xf36ba0, L_0xf36b00, L_0xf36a60, L_0xf369c0; +L_0xf354c0 .concat [ 4 4 0 0], LS_0xf354c0_0_0, LS_0xf354c0_0_4; +L_0xf35920 .part/pv L_0xf35880, 29, 1, 32; +L_0xf359c0 .part RS_0x7f3fa01428b8, 30, 1; +L_0xf273c0 .part RS_0x7f3fa01428b8, 30, 1; +L_0xf27460 .part RS_0x7f3fa01428b8, 30, 1; +L_0xf27500 .part RS_0x7f3fa01428b8, 30, 1; +L_0xf378f0 .part RS_0x7f3fa01428b8, 30, 1; +L_0xf37990 .part RS_0x7f3fa01428b8, 30, 1; +L_0xf37a30 .part RS_0x7f3fa01428b8, 30, 1; +LS_0xf37ad0_0_0 .concat [ 1 1 1 1], L_0xf37a30, L_0xf37990, L_0xf378f0, C4<0>; +LS_0xf37ad0_0_4 .concat [ 1 1 1 1], L_0xf27500, L_0xf27460, L_0xf273c0, L_0xf359c0; +L_0xf37ad0 .concat [ 4 4 0 0], LS_0xf37ad0_0_0, LS_0xf37ad0_0_4; +L_0xf37ee0 .part/pv L_0xf37e40, 30, 1, 32; +L_0xf37fd0 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf38070 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf38110 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf39010 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf372f0 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf37390 .part RS_0x7f3fa01428b8, 31, 1; +L_0xf37430 .part RS_0x7f3fa01428b8, 31, 1; +LS_0xf374d0_0_0 .concat [ 1 1 1 1], L_0xf37430, L_0xf37390, L_0xf372f0, C4<0>; +LS_0xf374d0_0_4 .concat [ 1 1 1 1], L_0xf39010, L_0xf38110, L_0xf38070, L_0xf37fd0; +L_0xf374d0 .concat [ 4 4 0 0], LS_0xf374d0_0_0, LS_0xf374d0_0_4; +L_0xf39760 .part/pv L_0xf396c0, 31, 1, 32; +S_0xec52e0 .scope module, "a1" "ALU1bit" 5 33, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xed7140/d .functor XOR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed7140 .delay (30,30,30) L_0xed7140/d; +L_0xed76f0/d .functor AND 1, L_0xed8370, L_0xed6c80, C4<1>, C4<1>; +L_0xed76f0 .delay (30,30,30) L_0xed76f0/d; +L_0xed7790/d .functor NAND 1, L_0xed8370, L_0xed6c80, C4<1>, C4<1>; +L_0xed7790 .delay (20,20,20) L_0xed7790/d; +L_0xed7830/d .functor NOR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed7830 .delay (20,20,20) L_0xed7830/d; +L_0xed78d0/d .functor OR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed78d0 .delay (30,30,30) L_0xed78d0/d; +v0xec6f70_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xec7030_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xec70d0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xec7170_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xec71f0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xec7290_0 .net "a", 0 0, L_0xed8370; 1 drivers +v0xec7310_0 .net "b", 0 0, L_0xed6c80; 1 drivers +v0xec7390_0 .net "cin", 0 0, C4<0>; 1 drivers +v0xec7410_0 .net "cout", 0 0, L_0xed8140; 1 drivers +v0xec7490_0 .net "cout_ADD", 0 0, L_0xed68e0; 1 drivers +v0xec7570_0 .net "cout_SLT", 0 0, L_0xed75a0; 1 drivers +v0xec75f0_0 .net "cout_SUB", 0 0, L_0xed6450; 1 drivers +v0xec7670_0 .net "muxCout", 7 0, L_0xed7d80; 1 drivers +v0xec7720_0 .net "muxRes", 7 0, L_0xed7970; 1 drivers +v0xec7850_0 .alias "op", 2 0, v0xed5210_0; +v0xec78d0_0 .net "out", 0 0, L_0xed8050; 1 drivers +v0xec77a0_0 .net "res_ADD", 0 0, L_0xed63f0; 1 drivers +v0xec7a40_0 .net "res_AND", 0 0, L_0xed76f0; 1 drivers +v0xec7950_0 .net "res_NAND", 0 0, L_0xed7790; 1 drivers +v0xec7b60_0 .net "res_NOR", 0 0, L_0xed7830; 1 drivers +v0xec7ac0_0 .net "res_OR", 0 0, L_0xed78d0; 1 drivers +v0xec7c90_0 .net "res_SLT", 0 0, L_0xed7240; 1 drivers +v0xec7c10_0 .net "res_SUB", 0 0, L_0xed6b20; 1 drivers +v0xec7e00_0 .net "res_XOR", 0 0, L_0xed7140; 1 drivers +LS_0xed7970_0_0 .concat [ 1 1 1 1], L_0xed63f0, L_0xed6b20, L_0xed7140, L_0xed7240; +LS_0xed7970_0_4 .concat [ 1 1 1 1], L_0xed76f0, L_0xed7790, L_0xed7830, L_0xed78d0; +L_0xed7970 .concat [ 4 4 0 0], LS_0xed7970_0_0, LS_0xed7970_0_4; +LS_0xed7d80_0_0 .concat [ 1 1 1 1], L_0xed68e0, L_0xed6450, C4<0>, L_0xed75a0; +LS_0xed7d80_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xed7d80 .concat [ 4 4 0 0], LS_0xed7d80_0_0, LS_0xed7d80_0_4; +S_0xec66b0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xec52e0; + .timescale 0 0; +L_0xed6270/d .functor XOR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed6270 .delay (30,30,30) L_0xed6270/d; +L_0xed63f0/d .functor XOR 1, L_0xed6270, C4<0>, C4<0>, C4<0>; +L_0xed63f0 .delay (30,30,30) L_0xed63f0/d; +L_0xed64e0/d .functor AND 1, L_0xed8370, L_0xed6c80, C4<1>, C4<1>; +L_0xed64e0 .delay (30,30,30) L_0xed64e0/d; +L_0xed6580/d .functor OR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed6580 .delay (30,30,30) L_0xed6580/d; +L_0xed6620/d .functor NOT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0xed6620 .delay (10,10,10) L_0xed6620/d; +L_0xed66c0/d .functor AND 1, L_0xed64e0, L_0xed6620, C4<1>, C4<1>; +L_0xed66c0 .delay (30,30,30) L_0xed66c0/d; +L_0xed67f0/d .functor AND 1, L_0xed6580, C4<0>, C4<1>, C4<1>; +L_0xed67f0 .delay (30,30,30) L_0xed67f0/d; +L_0xed68e0/d .functor OR 1, L_0xed66c0, L_0xed67f0, C4<0>, C4<0>; +L_0xed68e0 .delay (30,30,30) L_0xed68e0/d; +v0xec67a0_0 .net "_carryin", 0 0, L_0xed6620; 1 drivers +v0xec6860_0 .alias "a", 0 0, v0xec7290_0; +v0xec68e0_0 .net "aandb", 0 0, L_0xed64e0; 1 drivers +v0xec6980_0 .net "aorb", 0 0, L_0xed6580; 1 drivers +v0xec6a00_0 .alias "b", 0 0, v0xec7310_0; +v0xec6ad0_0 .alias "carryin", 0 0, v0xec7390_0; +v0xec6ba0_0 .alias "carryout", 0 0, v0xec7490_0; +v0xec6c40_0 .net "outputIfCarryin", 0 0, L_0xed66c0; 1 drivers +v0xec6d30_0 .net "outputIf_Carryin", 0 0, L_0xed67f0; 1 drivers +v0xec6dd0_0 .net "s", 0 0, L_0xed6270; 1 drivers +v0xec6ed0_0 .alias "sum", 0 0, v0xec77a0_0; +S_0xec5f50 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xec52e0; + .timescale 0 0; +L_0xed6ac0 .functor XOR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed6b20 .functor XOR 1, L_0xed6ac0, C4<0>, C4<0>, C4<0>; +L_0xed6c20 .functor NOT 1, L_0xed8370, C4<0>, C4<0>, C4<0>; +L_0xed62d0 .functor AND 1, L_0xed6c20, L_0xed6c80, C4<1>, C4<1>; +L_0xed6330 .functor NOT 1, L_0xed6ac0, C4<0>, C4<0>, C4<0>; +L_0xed6390 .functor AND 1, L_0xed6330, C4<0>, C4<1>, C4<1>; +L_0xed6450 .functor OR 1, L_0xed62d0, L_0xed6390, C4<0>, C4<0>; +v0xec6040_0 .alias "a", 0 0, v0xec7290_0; +v0xec60e0_0 .net "axorb", 0 0, L_0xed6ac0; 1 drivers +v0xec6160_0 .alias "b", 0 0, v0xec7310_0; +v0xec6210_0 .alias "borrowin", 0 0, v0xec7390_0; +v0xec62f0_0 .alias "borrowout", 0 0, v0xec75f0_0; +v0xec6370_0 .alias "diff", 0 0, v0xec7c10_0; +v0xec63f0_0 .net "nota", 0 0, L_0xed6c20; 1 drivers +v0xec6470_0 .net "notaandb", 0 0, L_0xed62d0; 1 drivers +v0xec6510_0 .net "notaxorb", 0 0, L_0xed6330; 1 drivers +v0xec65b0_0 .net "notaxorbandborrowin", 0 0, L_0xed6390; 1 drivers +S_0xec5830 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xec52e0; + .timescale 0 0; +L_0xed71e0 .functor XOR 1, L_0xed8370, L_0xed6c80, C4<0>, C4<0>; +L_0xed7240 .functor XOR 1, L_0xed71e0, C4<0>, C4<0>, C4<0>; +L_0xed7340 .functor NOT 1, L_0xed8370, C4<0>, C4<0>, C4<0>; +L_0xed73a0 .functor AND 1, L_0xed7340, L_0xed6c80, C4<1>, C4<1>; +L_0xed7450 .functor NOT 1, L_0xed71e0, C4<0>, C4<0>, C4<0>; +L_0xed74b0 .functor AND 1, L_0xed7450, C4<0>, C4<1>, C4<1>; +L_0xed75a0 .functor OR 1, L_0xed73a0, L_0xed74b0, C4<0>, C4<0>; +v0xec5920_0 .alias "a", 0 0, v0xec7290_0; +v0xec59a0_0 .net "axorb", 0 0, L_0xed71e0; 1 drivers +v0xec5a40_0 .alias "b", 0 0, v0xec7310_0; +v0xec5ae0_0 .alias "borrowin", 0 0, v0xec7390_0; +v0xec5b90_0 .alias "borrowout", 0 0, v0xec7570_0; +v0xec5c30_0 .alias "diff", 0 0, v0xec7c90_0; +v0xec5cd0_0 .net "nota", 0 0, L_0xed7340; 1 drivers +v0xec5d70_0 .net "notaandb", 0 0, L_0xed73a0; 1 drivers +v0xec5e10_0 .net "notaxorb", 0 0, L_0xed7450; 1 drivers +v0xec5eb0_0 .net "notaxorbandborrowin", 0 0, L_0xed74b0; 1 drivers +S_0xec55c0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xec52e0; + .timescale 0 0; +v0xec56b0_0 .alias "address", 2 0, v0xed5210_0; +v0xec5730_0 .alias "inputs", 7 0, v0xec7720_0; +v0xec57b0_0 .alias "out", 0 0, v0xec78d0_0; +L_0xed8050 .part/v L_0xed7970, v0xed5c50_0, 1; +S_0xec53d0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xec52e0; + .timescale 0 0; +v0xec50a0_0 .alias "address", 2 0, v0xed5210_0; +v0xec54c0_0 .alias "inputs", 7 0, v0xec7670_0; +v0xec5540_0 .alias "out", 0 0, v0xec7410_0; +L_0xed8140 .part/v L_0xed7d80, v0xed5c50_0, 1; +S_0xec2670 .scope module, "a2" "ALU1bit" 5 34, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xed9780/d .functor XOR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed9780 .delay (30,30,30) L_0xed9780/d; +L_0xed9d90/d .functor AND 1, L_0xedab70, L_0xedae20, C4<1>, C4<1>; +L_0xed9d90 .delay (30,30,30) L_0xed9d90/d; +L_0xed9e50/d .functor NAND 1, L_0xedab70, L_0xedae20, C4<1>, C4<1>; +L_0xed9e50 .delay (20,20,20) L_0xed9e50/d; +L_0xed9f10/d .functor NOR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed9f10 .delay (20,20,20) L_0xed9f10/d; +L_0xed9fd0/d .functor OR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed9fd0 .delay (30,30,30) L_0xed9fd0/d; +v0xec4300_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xec43c0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xec4460_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xec4500_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xec4580_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xec4620_0 .net "a", 0 0, L_0xedab70; 1 drivers +v0xec46a0_0 .net "b", 0 0, L_0xedae20; 1 drivers +v0xec4720_0 .net "cin", 0 0, L_0xedb0d0; 1 drivers +v0xec47a0_0 .net "cout", 0 0, L_0xeda860; 1 drivers +v0xec4820_0 .net "cout_ADD", 0 0, L_0xed8ea0; 1 drivers +v0xec4900_0 .net "cout_SLT", 0 0, L_0xed9c40; 1 drivers +v0xec4980_0 .net "cout_SUB", 0 0, L_0xed89b0; 1 drivers +v0xec4a00_0 .net "muxCout", 7 0, L_0xeda4f0; 1 drivers +v0xec4ab0_0 .net "muxRes", 7 0, L_0xeda070; 1 drivers +v0xec4be0_0 .alias "op", 2 0, v0xed5210_0; +v0xec4c60_0 .net "out", 0 0, L_0xeda770; 1 drivers +v0xec4b30_0 .net "res_ADD", 0 0, L_0xed8950; 1 drivers +v0xec4dd0_0 .net "res_AND", 0 0, L_0xed9d90; 1 drivers +v0xec4ce0_0 .net "res_NAND", 0 0, L_0xed9e50; 1 drivers +v0xec4ef0_0 .net "res_NOR", 0 0, L_0xed9f10; 1 drivers +v0xec4e50_0 .net "res_OR", 0 0, L_0xed9fd0; 1 drivers +v0xec5020_0 .net "res_SLT", 0 0, L_0xed98a0; 1 drivers +v0xec4fa0_0 .net "res_SUB", 0 0, L_0xed9120; 1 drivers +v0xec5190_0 .net "res_XOR", 0 0, L_0xed9780; 1 drivers +LS_0xeda070_0_0 .concat [ 1 1 1 1], L_0xed8950, L_0xed9120, L_0xed9780, L_0xed98a0; +LS_0xeda070_0_4 .concat [ 1 1 1 1], L_0xed9d90, L_0xed9e50, L_0xed9f10, L_0xed9fd0; +L_0xeda070 .concat [ 4 4 0 0], LS_0xeda070_0_0, LS_0xeda070_0_4; +LS_0xeda4f0_0_0 .concat [ 1 1 1 1], L_0xed8ea0, L_0xed89b0, C4<0>, L_0xed9c40; +LS_0xeda4f0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xeda4f0 .concat [ 4 4 0 0], LS_0xeda4f0_0_0, LS_0xeda4f0_0_4; +S_0xec3a40 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xec2670; + .timescale 0 0; +L_0xed6e20/d .functor XOR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed6e20 .delay (30,30,30) L_0xed6e20/d; +L_0xed8950/d .functor XOR 1, L_0xed6e20, L_0xedb0d0, C4<0>, C4<0>; +L_0xed8950 .delay (30,30,30) L_0xed8950/d; +L_0xed8a80/d .functor AND 1, L_0xedab70, L_0xedae20, C4<1>, C4<1>; +L_0xed8a80 .delay (30,30,30) L_0xed8a80/d; +L_0xed8b20/d .functor OR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed8b20 .delay (30,30,30) L_0xed8b20/d; +L_0xed8bc0/d .functor NOT 1, L_0xedb0d0, C4<0>, C4<0>, C4<0>; +L_0xed8bc0 .delay (10,10,10) L_0xed8bc0/d; +L_0xed8c60/d .functor AND 1, L_0xed8a80, L_0xed8bc0, C4<1>, C4<1>; +L_0xed8c60 .delay (30,30,30) L_0xed8c60/d; +L_0xed8d90/d .functor AND 1, L_0xed8b20, L_0xedb0d0, C4<1>, C4<1>; +L_0xed8d90 .delay (30,30,30) L_0xed8d90/d; +L_0xed8ea0/d .functor OR 1, L_0xed8c60, L_0xed8d90, C4<0>, C4<0>; +L_0xed8ea0 .delay (30,30,30) L_0xed8ea0/d; +v0xec3b30_0 .net "_carryin", 0 0, L_0xed8bc0; 1 drivers +v0xec3bf0_0 .alias "a", 0 0, v0xec4620_0; +v0xec3c70_0 .net "aandb", 0 0, L_0xed8a80; 1 drivers +v0xec3d10_0 .net "aorb", 0 0, L_0xed8b20; 1 drivers +v0xec3d90_0 .alias "b", 0 0, v0xec46a0_0; +v0xec3e60_0 .alias "carryin", 0 0, v0xec4720_0; +v0xec3f30_0 .alias "carryout", 0 0, v0xec4820_0; +v0xec3fd0_0 .net "outputIfCarryin", 0 0, L_0xed8c60; 1 drivers +v0xec40c0_0 .net "outputIf_Carryin", 0 0, L_0xed8d90; 1 drivers +v0xec4160_0 .net "s", 0 0, L_0xed6e20; 1 drivers +v0xec4260_0 .alias "sum", 0 0, v0xec4b30_0; +S_0xec32e0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xec2670; + .timescale 0 0; +L_0xed90c0 .functor XOR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed9120 .functor XOR 1, L_0xed90c0, L_0xedb0d0, C4<0>, C4<0>; +L_0xed9240 .functor NOT 1, L_0xedab70, C4<0>, C4<0>, C4<0>; +L_0xed8830 .functor AND 1, L_0xed9240, L_0xedae20, C4<1>, C4<1>; +L_0xed8890 .functor NOT 1, L_0xed90c0, C4<0>, C4<0>, C4<0>; +L_0xed88f0 .functor AND 1, L_0xed8890, L_0xedb0d0, C4<1>, C4<1>; +L_0xed89b0 .functor OR 1, L_0xed8830, L_0xed88f0, C4<0>, C4<0>; +v0xec33d0_0 .alias "a", 0 0, v0xec4620_0; +v0xec3470_0 .net "axorb", 0 0, L_0xed90c0; 1 drivers +v0xec34f0_0 .alias "b", 0 0, v0xec46a0_0; +v0xec35a0_0 .alias "borrowin", 0 0, v0xec4720_0; +v0xec3680_0 .alias "borrowout", 0 0, v0xec4980_0; +v0xec3700_0 .alias "diff", 0 0, v0xec4fa0_0; +v0xec3780_0 .net "nota", 0 0, L_0xed9240; 1 drivers +v0xec3800_0 .net "notaandb", 0 0, L_0xed8830; 1 drivers +v0xec38a0_0 .net "notaxorb", 0 0, L_0xed8890; 1 drivers +v0xec3940_0 .net "notaxorbandborrowin", 0 0, L_0xed88f0; 1 drivers +S_0xec2bc0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xec2670; + .timescale 0 0; +L_0xed9820 .functor XOR 1, L_0xedab70, L_0xedae20, C4<0>, C4<0>; +L_0xed98a0 .functor XOR 1, L_0xed9820, L_0xedb0d0, C4<0>, C4<0>; +L_0xed99c0 .functor NOT 1, L_0xedab70, C4<0>, C4<0>, C4<0>; +L_0xed9a40 .functor AND 1, L_0xed99c0, L_0xedae20, C4<1>, C4<1>; +L_0xed9af0 .functor NOT 1, L_0xed9820, C4<0>, C4<0>, C4<0>; +L_0xed9b50 .functor AND 1, L_0xed9af0, L_0xedb0d0, C4<1>, C4<1>; +L_0xed9c40 .functor OR 1, L_0xed9a40, L_0xed9b50, C4<0>, C4<0>; +v0xec2cb0_0 .alias "a", 0 0, v0xec4620_0; +v0xec2d30_0 .net "axorb", 0 0, L_0xed9820; 1 drivers +v0xec2dd0_0 .alias "b", 0 0, v0xec46a0_0; +v0xec2e70_0 .alias "borrowin", 0 0, v0xec4720_0; +v0xec2f20_0 .alias "borrowout", 0 0, v0xec4900_0; +v0xec2fc0_0 .alias "diff", 0 0, v0xec5020_0; +v0xec3060_0 .net "nota", 0 0, L_0xed99c0; 1 drivers +v0xec3100_0 .net "notaandb", 0 0, L_0xed9a40; 1 drivers +v0xec31a0_0 .net "notaxorb", 0 0, L_0xed9af0; 1 drivers +v0xec3240_0 .net "notaxorbandborrowin", 0 0, L_0xed9b50; 1 drivers +S_0xec2950 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xec2670; + .timescale 0 0; +v0xec2a40_0 .alias "address", 2 0, v0xed5210_0; +v0xec2ac0_0 .alias "inputs", 7 0, v0xec4ab0_0; +v0xec2b40_0 .alias "out", 0 0, v0xec4c60_0; +L_0xeda770 .part/v L_0xeda070, v0xed5c50_0, 1; +S_0xec2760 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xec2670; + .timescale 0 0; +v0xec2430_0 .alias "address", 2 0, v0xed5210_0; +v0xec2850_0 .alias "inputs", 7 0, v0xec4a00_0; +v0xec28d0_0 .alias "out", 0 0, v0xec47a0_0; +L_0xeda860 .part/v L_0xeda4f0, v0xed5c50_0, 1; +S_0xebfa00 .scope module, "a3" "ALU1bit" 5 35, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xedbf30/d .functor XOR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xedbf30 .delay (30,30,30) L_0xedbf30/d; +L_0xedc4e0/d .functor AND 1, L_0xedd3d0, L_0xedba70, C4<1>, C4<1>; +L_0xedc4e0 .delay (30,30,30) L_0xedc4e0/d; +L_0xedc5a0/d .functor NAND 1, L_0xedd3d0, L_0xedba70, C4<1>, C4<1>; +L_0xedc5a0 .delay (20,20,20) L_0xedc5a0/d; +L_0xedc660/d .functor NOR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xedc660 .delay (20,20,20) L_0xedc660/d; +L_0xedc720/d .functor OR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xedc720 .delay (30,30,30) L_0xedc720/d; +v0xec1690_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xec1750_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xec17f0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xec1890_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xec1910_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xec19b0_0 .net "a", 0 0, L_0xedd3d0; 1 drivers +v0xec1a30_0 .net "b", 0 0, L_0xedba70; 1 drivers +v0xec1ab0_0 .net "cin", 0 0, L_0xedbbd0; 1 drivers +v0xec1b30_0 .net "cout", 0 0, L_0xedd110; 1 drivers +v0xec1bb0_0 .net "cout_ADD", 0 0, L_0xedb6d0; 1 drivers +v0xec1c90_0 .net "cout_SLT", 0 0, L_0xedc390; 1 drivers +v0xec1d10_0 .net "cout_SUB", 0 0, L_0xedb290; 1 drivers +v0xec1d90_0 .net "muxCout", 7 0, L_0xedcd50; 1 drivers +v0xec1e40_0 .net "muxRes", 7 0, L_0xedc7c0; 1 drivers +v0xec1f70_0 .alias "op", 2 0, v0xed5210_0; +v0xec1ff0_0 .net "out", 0 0, L_0xedd020; 1 drivers +v0xec1ec0_0 .net "res_ADD", 0 0, L_0xed94b0; 1 drivers +v0xec2160_0 .net "res_AND", 0 0, L_0xedc4e0; 1 drivers +v0xec2070_0 .net "res_NAND", 0 0, L_0xedc5a0; 1 drivers +v0xec2280_0 .net "res_NOR", 0 0, L_0xedc660; 1 drivers +v0xec21e0_0 .net "res_OR", 0 0, L_0xedc720; 1 drivers +v0xec23b0_0 .net "res_SLT", 0 0, L_0xedc030; 1 drivers +v0xec2330_0 .net "res_SUB", 0 0, L_0xedb910; 1 drivers +v0xec2520_0 .net "res_XOR", 0 0, L_0xedbf30; 1 drivers +LS_0xedc7c0_0_0 .concat [ 1 1 1 1], L_0xed94b0, L_0xedb910, L_0xedbf30, L_0xedc030; +LS_0xedc7c0_0_4 .concat [ 1 1 1 1], L_0xedc4e0, L_0xedc5a0, L_0xedc660, L_0xedc720; +L_0xedc7c0 .concat [ 4 4 0 0], LS_0xedc7c0_0_0, LS_0xedc7c0_0_4; +LS_0xedcd50_0_0 .concat [ 1 1 1 1], L_0xedb6d0, L_0xedb290, C4<0>, L_0xedc390; +LS_0xedcd50_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xedcd50 .concat [ 4 4 0 0], LS_0xedcd50_0_0, LS_0xedcd50_0_4; +S_0xec0dd0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xebfa00; + .timescale 0 0; +L_0xed9350/d .functor XOR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xed9350 .delay (30,30,30) L_0xed9350/d; +L_0xed94b0/d .functor XOR 1, L_0xed9350, L_0xedbbd0, C4<0>, C4<0>; +L_0xed94b0 .delay (30,30,30) L_0xed94b0/d; +L_0xedb360/d .functor AND 1, L_0xedd3d0, L_0xedba70, C4<1>, C4<1>; +L_0xedb360 .delay (30,30,30) L_0xedb360/d; +L_0xedb400/d .functor OR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xedb400 .delay (30,30,30) L_0xedb400/d; +L_0xedb4a0/d .functor NOT 1, L_0xedbbd0, C4<0>, C4<0>, C4<0>; +L_0xedb4a0 .delay (10,10,10) L_0xedb4a0/d; +L_0xedb540/d .functor AND 1, L_0xedb360, L_0xedb4a0, C4<1>, C4<1>; +L_0xedb540 .delay (30,30,30) L_0xedb540/d; +L_0xedb5e0/d .functor AND 1, L_0xedb400, L_0xedbbd0, C4<1>, C4<1>; +L_0xedb5e0 .delay (30,30,30) L_0xedb5e0/d; +L_0xedb6d0/d .functor OR 1, L_0xedb540, L_0xedb5e0, C4<0>, C4<0>; +L_0xedb6d0 .delay (30,30,30) L_0xedb6d0/d; +v0xec0ec0_0 .net "_carryin", 0 0, L_0xedb4a0; 1 drivers +v0xec0f80_0 .alias "a", 0 0, v0xec19b0_0; +v0xec1000_0 .net "aandb", 0 0, L_0xedb360; 1 drivers +v0xec10a0_0 .net "aorb", 0 0, L_0xedb400; 1 drivers +v0xec1120_0 .alias "b", 0 0, v0xec1a30_0; +v0xec11f0_0 .alias "carryin", 0 0, v0xec1ab0_0; +v0xec12c0_0 .alias "carryout", 0 0, v0xec1bb0_0; +v0xec1360_0 .net "outputIfCarryin", 0 0, L_0xedb540; 1 drivers +v0xec1450_0 .net "outputIf_Carryin", 0 0, L_0xedb5e0; 1 drivers +v0xec14f0_0 .net "s", 0 0, L_0xed9350; 1 drivers +v0xec15f0_0 .alias "sum", 0 0, v0xec1ec0_0; +S_0xec0670 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xebfa00; + .timescale 0 0; +L_0xedb8b0 .functor XOR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xedb910 .functor XOR 1, L_0xedb8b0, L_0xedbbd0, C4<0>, C4<0>; +L_0xedba10 .functor NOT 1, L_0xedd3d0, C4<0>, C4<0>, C4<0>; +L_0xedb170 .functor AND 1, L_0xedba10, L_0xedba70, C4<1>, C4<1>; +L_0xedb1d0 .functor NOT 1, L_0xedb8b0, C4<0>, C4<0>, C4<0>; +L_0xedb230 .functor AND 1, L_0xedb1d0, L_0xedbbd0, C4<1>, C4<1>; +L_0xedb290 .functor OR 1, L_0xedb170, L_0xedb230, C4<0>, C4<0>; +v0xec0760_0 .alias "a", 0 0, v0xec19b0_0; +v0xec0800_0 .net "axorb", 0 0, L_0xedb8b0; 1 drivers +v0xec0880_0 .alias "b", 0 0, v0xec1a30_0; +v0xec0930_0 .alias "borrowin", 0 0, v0xec1ab0_0; +v0xec0a10_0 .alias "borrowout", 0 0, v0xec1d10_0; +v0xec0a90_0 .alias "diff", 0 0, v0xec2330_0; +v0xec0b10_0 .net "nota", 0 0, L_0xedba10; 1 drivers +v0xec0b90_0 .net "notaandb", 0 0, L_0xedb170; 1 drivers +v0xec0c30_0 .net "notaxorb", 0 0, L_0xedb1d0; 1 drivers +v0xec0cd0_0 .net "notaxorbandborrowin", 0 0, L_0xedb230; 1 drivers +S_0xebff50 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xebfa00; + .timescale 0 0; +L_0xedbfd0 .functor XOR 1, L_0xedd3d0, L_0xedba70, C4<0>, C4<0>; +L_0xedc030 .functor XOR 1, L_0xedbfd0, L_0xedbbd0, C4<0>, C4<0>; +L_0xedc130 .functor NOT 1, L_0xedd3d0, C4<0>, C4<0>, C4<0>; +L_0xedc190 .functor AND 1, L_0xedc130, L_0xedba70, C4<1>, C4<1>; +L_0xedc240 .functor NOT 1, L_0xedbfd0, C4<0>, C4<0>, C4<0>; +L_0xedc2a0 .functor AND 1, L_0xedc240, L_0xedbbd0, C4<1>, C4<1>; +L_0xedc390 .functor OR 1, L_0xedc190, L_0xedc2a0, C4<0>, C4<0>; +v0xec0040_0 .alias "a", 0 0, v0xec19b0_0; +v0xec00c0_0 .net "axorb", 0 0, L_0xedbfd0; 1 drivers +v0xec0160_0 .alias "b", 0 0, v0xec1a30_0; +v0xec0200_0 .alias "borrowin", 0 0, v0xec1ab0_0; +v0xec02b0_0 .alias "borrowout", 0 0, v0xec1c90_0; +v0xec0350_0 .alias "diff", 0 0, v0xec23b0_0; +v0xec03f0_0 .net "nota", 0 0, L_0xedc130; 1 drivers +v0xec0490_0 .net "notaandb", 0 0, L_0xedc190; 1 drivers +v0xec0530_0 .net "notaxorb", 0 0, L_0xedc240; 1 drivers +v0xec05d0_0 .net "notaxorbandborrowin", 0 0, L_0xedc2a0; 1 drivers +S_0xebfce0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xebfa00; + .timescale 0 0; +v0xebfdd0_0 .alias "address", 2 0, v0xed5210_0; +v0xebfe50_0 .alias "inputs", 7 0, v0xec1e40_0; +v0xebfed0_0 .alias "out", 0 0, v0xec1ff0_0; +L_0xedd020 .part/v L_0xedc7c0, v0xed5c50_0, 1; +S_0xebfaf0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xebfa00; + .timescale 0 0; +v0xebf7c0_0 .alias "address", 2 0, v0xed5210_0; +v0xebfbe0_0 .alias "inputs", 7 0, v0xec1d90_0; +v0xebfc60_0 .alias "out", 0 0, v0xec1b30_0; +L_0xedd110 .part/v L_0xedcd50, v0xed5c50_0, 1; +S_0xebcd90 .scope module, "a4" "ALU1bit" 5 36, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xede780/d .functor XOR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xede780 .delay (30,30,30) L_0xede780/d; +L_0xeded90/d .functor AND 1, L_0xedf9f0, L_0xede2c0, C4<1>, C4<1>; +L_0xeded90 .delay (30,30,30) L_0xeded90/d; +L_0xedee50/d .functor NAND 1, L_0xedf9f0, L_0xede2c0, C4<1>, C4<1>; +L_0xedee50 .delay (20,20,20) L_0xedee50/d; +L_0xedef10/d .functor NOR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xedef10 .delay (20,20,20) L_0xedef10/d; +L_0xedefd0/d .functor OR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xedefd0 .delay (30,30,30) L_0xedefd0/d; +v0xebea20_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xebeae0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xebeb80_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xebec20_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xebeca0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xebed40_0 .net "a", 0 0, L_0xedf9f0; 1 drivers +v0xebedc0_0 .net "b", 0 0, L_0xede2c0; 1 drivers +v0xebee40_0 .net "cin", 0 0, L_0xedfeb0; 1 drivers +v0xebeec0_0 .net "cout", 0 0, L_0xedf6a0; 1 drivers +v0xebef40_0 .net "cout_ADD", 0 0, L_0xeddea0; 1 drivers +v0xebf020_0 .net "cout_SLT", 0 0, L_0xedec40; 1 drivers +v0xebf0a0_0 .net "cout_SUB", 0 0, L_0xedd9b0; 1 drivers +v0xebf120_0 .net "muxCout", 7 0, L_0xedf470; 1 drivers +v0xebf1d0_0 .net "muxRes", 7 0, L_0xedf070; 1 drivers +v0xebf300_0 .alias "op", 2 0, v0xed5210_0; +v0xebf380_0 .net "out", 0 0, L_0xedf5b0; 1 drivers +v0xebf250_0 .net "res_ADD", 0 0, L_0xedbc70; 1 drivers +v0xebf4f0_0 .net "res_AND", 0 0, L_0xeded90; 1 drivers +v0xebf400_0 .net "res_NAND", 0 0, L_0xedee50; 1 drivers +v0xebf610_0 .net "res_NOR", 0 0, L_0xedef10; 1 drivers +v0xebf570_0 .net "res_OR", 0 0, L_0xedefd0; 1 drivers +v0xebf740_0 .net "res_SLT", 0 0, L_0xede8a0; 1 drivers +v0xebf6c0_0 .net "res_SUB", 0 0, L_0xede120; 1 drivers +v0xebf8b0_0 .net "res_XOR", 0 0, L_0xede780; 1 drivers +LS_0xedf070_0_0 .concat [ 1 1 1 1], L_0xedbc70, L_0xede120, L_0xede780, L_0xede8a0; +LS_0xedf070_0_4 .concat [ 1 1 1 1], L_0xeded90, L_0xedee50, L_0xedef10, L_0xedefd0; +L_0xedf070 .concat [ 4 4 0 0], LS_0xedf070_0_0, LS_0xedf070_0_4; +LS_0xedf470_0_0 .concat [ 1 1 1 1], L_0xeddea0, L_0xedd9b0, C4<0>, L_0xedec40; +LS_0xedf470_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xedf470 .concat [ 4 4 0 0], LS_0xedf470_0_0, LS_0xedf470_0_4; +S_0xebe160 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xebcd90; + .timescale 0 0; +L_0xeda450/d .functor XOR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xeda450 .delay (30,30,30) L_0xeda450/d; +L_0xedbc70/d .functor XOR 1, L_0xeda450, L_0xedfeb0, C4<0>, C4<0>; +L_0xedbc70 .delay (30,30,30) L_0xedbc70/d; +L_0xeddaa0/d .functor AND 1, L_0xedf9f0, L_0xede2c0, C4<1>, C4<1>; +L_0xeddaa0 .delay (30,30,30) L_0xeddaa0/d; +L_0xeddb80/d .functor OR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xeddb80 .delay (30,30,30) L_0xeddb80/d; +L_0xeddc40/d .functor NOT 1, L_0xedfeb0, C4<0>, C4<0>, C4<0>; +L_0xeddc40 .delay (10,10,10) L_0xeddc40/d; +L_0xeddce0/d .functor AND 1, L_0xeddaa0, L_0xeddc40, C4<1>, C4<1>; +L_0xeddce0 .delay (30,30,30) L_0xeddce0/d; +L_0xeddde0/d .functor AND 1, L_0xeddb80, L_0xedfeb0, C4<1>, C4<1>; +L_0xeddde0 .delay (30,30,30) L_0xeddde0/d; +L_0xeddea0/d .functor OR 1, L_0xeddce0, L_0xeddde0, C4<0>, C4<0>; +L_0xeddea0 .delay (30,30,30) L_0xeddea0/d; +v0xebe250_0 .net "_carryin", 0 0, L_0xeddc40; 1 drivers +v0xebe310_0 .alias "a", 0 0, v0xebed40_0; +v0xebe390_0 .net "aandb", 0 0, L_0xeddaa0; 1 drivers +v0xebe430_0 .net "aorb", 0 0, L_0xeddb80; 1 drivers +v0xebe4b0_0 .alias "b", 0 0, v0xebedc0_0; +v0xebe580_0 .alias "carryin", 0 0, v0xebee40_0; +v0xebe650_0 .alias "carryout", 0 0, v0xebef40_0; +v0xebe6f0_0 .net "outputIfCarryin", 0 0, L_0xeddce0; 1 drivers +v0xebe7e0_0 .net "outputIf_Carryin", 0 0, L_0xeddde0; 1 drivers +v0xebe880_0 .net "s", 0 0, L_0xeda450; 1 drivers +v0xebe980_0 .alias "sum", 0 0, v0xebf250_0; +S_0xebda00 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xebcd90; + .timescale 0 0; +L_0xede0c0 .functor XOR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xede120 .functor XOR 1, L_0xede0c0, L_0xedfeb0, C4<0>, C4<0>; +L_0xede240 .functor NOT 1, L_0xedf9f0, C4<0>, C4<0>, C4<0>; +L_0xedd890 .functor AND 1, L_0xede240, L_0xede2c0, C4<1>, C4<1>; +L_0xedd8f0 .functor NOT 1, L_0xede0c0, C4<0>, C4<0>, C4<0>; +L_0xedd950 .functor AND 1, L_0xedd8f0, L_0xedfeb0, C4<1>, C4<1>; +L_0xedd9b0 .functor OR 1, L_0xedd890, L_0xedd950, C4<0>, C4<0>; +v0xebdaf0_0 .alias "a", 0 0, v0xebed40_0; +v0xebdb90_0 .net "axorb", 0 0, L_0xede0c0; 1 drivers +v0xebdc10_0 .alias "b", 0 0, v0xebedc0_0; +v0xebdcc0_0 .alias "borrowin", 0 0, v0xebee40_0; +v0xebdda0_0 .alias "borrowout", 0 0, v0xebf0a0_0; +v0xebde20_0 .alias "diff", 0 0, v0xebf6c0_0; +v0xebdea0_0 .net "nota", 0 0, L_0xede240; 1 drivers +v0xebdf20_0 .net "notaandb", 0 0, L_0xedd890; 1 drivers +v0xebdfc0_0 .net "notaxorb", 0 0, L_0xedd8f0; 1 drivers +v0xebe060_0 .net "notaxorbandborrowin", 0 0, L_0xedd950; 1 drivers +S_0xebd2e0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xebcd90; + .timescale 0 0; +L_0xede820 .functor XOR 1, L_0xedf9f0, L_0xede2c0, C4<0>, C4<0>; +L_0xede8a0 .functor XOR 1, L_0xede820, L_0xedfeb0, C4<0>, C4<0>; +L_0xede9c0 .functor NOT 1, L_0xedf9f0, C4<0>, C4<0>, C4<0>; +L_0xedea40 .functor AND 1, L_0xede9c0, L_0xede2c0, C4<1>, C4<1>; +L_0xedeaf0 .functor NOT 1, L_0xede820, C4<0>, C4<0>, C4<0>; +L_0xedeb50 .functor AND 1, L_0xedeaf0, L_0xedfeb0, C4<1>, C4<1>; +L_0xedec40 .functor OR 1, L_0xedea40, L_0xedeb50, C4<0>, C4<0>; +v0xebd3d0_0 .alias "a", 0 0, v0xebed40_0; +v0xebd450_0 .net "axorb", 0 0, L_0xede820; 1 drivers +v0xebd4f0_0 .alias "b", 0 0, v0xebedc0_0; +v0xebd590_0 .alias "borrowin", 0 0, v0xebee40_0; +v0xebd640_0 .alias "borrowout", 0 0, v0xebf020_0; +v0xebd6e0_0 .alias "diff", 0 0, v0xebf740_0; +v0xebd780_0 .net "nota", 0 0, L_0xede9c0; 1 drivers +v0xebd820_0 .net "notaandb", 0 0, L_0xedea40; 1 drivers +v0xebd8c0_0 .net "notaxorb", 0 0, L_0xedeaf0; 1 drivers +v0xebd960_0 .net "notaxorbandborrowin", 0 0, L_0xedeb50; 1 drivers +S_0xebd070 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xebcd90; + .timescale 0 0; +v0xebd160_0 .alias "address", 2 0, v0xed5210_0; +v0xebd1e0_0 .alias "inputs", 7 0, v0xebf1d0_0; +v0xebd260_0 .alias "out", 0 0, v0xebf380_0; +L_0xedf5b0 .part/v L_0xedf070, v0xed5c50_0, 1; +S_0xebce80 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xebcd90; + .timescale 0 0; +v0xebcb50_0 .alias "address", 2 0, v0xed5210_0; +v0xebcf70_0 .alias "inputs", 7 0, v0xebf120_0; +v0xebcff0_0 .alias "out", 0 0, v0xebeec0_0; +L_0xedf6a0 .part/v L_0xedf470, v0xed5c50_0, 1; +S_0xeba100 .scope module, "a5" "ALU1bit" 5 37, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xee0d80/d .functor XOR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xee0d80 .delay (30,30,30) L_0xee0d80/d; +L_0xee1330/d .functor AND 1, L_0xee2030, L_0xee1e70, C4<1>, C4<1>; +L_0xee1330 .delay (30,30,30) L_0xee1330/d; +L_0xee13d0/d .functor NAND 1, L_0xee2030, L_0xee1e70, C4<1>, C4<1>; +L_0xee13d0 .delay (20,20,20) L_0xee13d0/d; +L_0xee1470/d .functor NOR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xee1470 .delay (20,20,20) L_0xee1470/d; +L_0xee1530/d .functor OR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xee1530 .delay (30,30,30) L_0xee1530/d; +v0xebbdb0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xebbe70_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xebbf10_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xebbfb0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xebc030_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xebc0d0_0 .net "a", 0 0, L_0xee2030; 1 drivers +v0xebc150_0 .net "b", 0 0, L_0xee1e70; 1 drivers +v0xebc1d0_0 .net "cin", 0 0, L_0xee09c0; 1 drivers +v0xebc250_0 .net "cout", 0 0, L_0xee1ce0; 1 drivers +v0xebc2d0_0 .net "cout_ADD", 0 0, L_0xee04c0; 1 drivers +v0xebc3b0_0 .net "cout_SLT", 0 0, L_0xee11e0; 1 drivers +v0xebc430_0 .net "cout_SUB", 0 0, L_0xee0040; 1 drivers +v0xebc4b0_0 .net "muxCout", 7 0, L_0xee19c0; 1 drivers +v0xebc560_0 .net "muxRes", 7 0, L_0xee15d0; 1 drivers +v0xebc690_0 .alias "op", 2 0, v0xed5210_0; +v0xebc710_0 .net "out", 0 0, L_0xee1bf0; 1 drivers +v0xebc5e0_0 .net "res_ADD", 0 0, L_0xedffe0; 1 drivers +v0xebc880_0 .net "res_AND", 0 0, L_0xee1330; 1 drivers +v0xebc790_0 .net "res_NAND", 0 0, L_0xee13d0; 1 drivers +v0xebc9a0_0 .net "res_NOR", 0 0, L_0xee1470; 1 drivers +v0xebc900_0 .net "res_OR", 0 0, L_0xee1530; 1 drivers +v0xebcad0_0 .net "res_SLT", 0 0, L_0xee0e80; 1 drivers +v0xebca50_0 .net "res_SUB", 0 0, L_0xee0700; 1 drivers +v0xebcc40_0 .net "res_XOR", 0 0, L_0xee0d80; 1 drivers +LS_0xee15d0_0_0 .concat [ 1 1 1 1], L_0xedffe0, L_0xee0700, L_0xee0d80, L_0xee0e80; +LS_0xee15d0_0_4 .concat [ 1 1 1 1], L_0xee1330, L_0xee13d0, L_0xee1470, L_0xee1530; +L_0xee15d0 .concat [ 4 4 0 0], LS_0xee15d0_0_0, LS_0xee15d0_0_4; +LS_0xee19c0_0_0 .concat [ 1 1 1 1], L_0xee04c0, L_0xee0040, C4<0>, L_0xee11e0; +LS_0xee19c0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xee19c0 .concat [ 4 4 0 0], LS_0xee19c0_0_0, LS_0xee19c0_0_4; +S_0xebb4f0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xeba100; + .timescale 0 0; +L_0xede360/d .functor XOR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xede360 .delay (30,30,30) L_0xede360/d; +L_0xedffe0/d .functor XOR 1, L_0xede360, L_0xee09c0, C4<0>, C4<0>; +L_0xedffe0 .delay (30,30,30) L_0xedffe0/d; +L_0xee0110/d .functor AND 1, L_0xee2030, L_0xee1e70, C4<1>, C4<1>; +L_0xee0110 .delay (30,30,30) L_0xee0110/d; +L_0xee01b0/d .functor OR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xee01b0 .delay (30,30,30) L_0xee01b0/d; +L_0xee0250/d .functor NOT 1, L_0xee09c0, C4<0>, C4<0>, C4<0>; +L_0xee0250 .delay (10,10,10) L_0xee0250/d; +L_0xee02f0/d .functor AND 1, L_0xee0110, L_0xee0250, C4<1>, C4<1>; +L_0xee02f0 .delay (30,30,30) L_0xee02f0/d; +L_0xee03d0/d .functor AND 1, L_0xee01b0, L_0xee09c0, C4<1>, C4<1>; +L_0xee03d0 .delay (30,30,30) L_0xee03d0/d; +L_0xee04c0/d .functor OR 1, L_0xee02f0, L_0xee03d0, C4<0>, C4<0>; +L_0xee04c0 .delay (30,30,30) L_0xee04c0/d; +v0xebb5e0_0 .net "_carryin", 0 0, L_0xee0250; 1 drivers +v0xebb6a0_0 .alias "a", 0 0, v0xebc0d0_0; +v0xebb720_0 .net "aandb", 0 0, L_0xee0110; 1 drivers +v0xebb7c0_0 .net "aorb", 0 0, L_0xee01b0; 1 drivers +v0xebb840_0 .alias "b", 0 0, v0xebc150_0; +v0xebb910_0 .alias "carryin", 0 0, v0xebc1d0_0; +v0xebb9e0_0 .alias "carryout", 0 0, v0xebc2d0_0; +v0xebba80_0 .net "outputIfCarryin", 0 0, L_0xee02f0; 1 drivers +v0xebbb70_0 .net "outputIf_Carryin", 0 0, L_0xee03d0; 1 drivers +v0xebbc10_0 .net "s", 0 0, L_0xede360; 1 drivers +v0xebbd10_0 .alias "sum", 0 0, v0xebc5e0_0; +S_0xebad90 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xeba100; + .timescale 0 0; +L_0xee06a0 .functor XOR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xee0700 .functor XOR 1, L_0xee06a0, L_0xee09c0, C4<0>, C4<0>; +L_0xee0800 .functor NOT 1, L_0xee2030, C4<0>, C4<0>, C4<0>; +L_0xedf960 .functor AND 1, L_0xee0800, L_0xee1e70, C4<1>, C4<1>; +L_0xedff50 .functor NOT 1, L_0xee06a0, C4<0>, C4<0>, C4<0>; +L_0xee0ad0 .functor AND 1, L_0xedff50, L_0xee09c0, C4<1>, C4<1>; +L_0xee0040 .functor OR 1, L_0xedf960, L_0xee0ad0, C4<0>, C4<0>; +v0xebae80_0 .alias "a", 0 0, v0xebc0d0_0; +v0xebaf20_0 .net "axorb", 0 0, L_0xee06a0; 1 drivers +v0xebafa0_0 .alias "b", 0 0, v0xebc150_0; +v0xebb050_0 .alias "borrowin", 0 0, v0xebc1d0_0; +v0xebb130_0 .alias "borrowout", 0 0, v0xebc430_0; +v0xebb1b0_0 .alias "diff", 0 0, v0xebca50_0; +v0xebb230_0 .net "nota", 0 0, L_0xee0800; 1 drivers +v0xebb2b0_0 .net "notaandb", 0 0, L_0xedf960; 1 drivers +v0xebb350_0 .net "notaxorb", 0 0, L_0xedff50; 1 drivers +v0xebb3f0_0 .net "notaxorbandborrowin", 0 0, L_0xee0ad0; 1 drivers +S_0xeba650 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xeba100; + .timescale 0 0; +L_0xee0e20 .functor XOR 1, L_0xee2030, L_0xee1e70, C4<0>, C4<0>; +L_0xee0e80 .functor XOR 1, L_0xee0e20, L_0xee09c0, C4<0>, C4<0>; +L_0xee0f80 .functor NOT 1, L_0xee2030, C4<0>, C4<0>, C4<0>; +L_0xee0fe0 .functor AND 1, L_0xee0f80, L_0xee1e70, C4<1>, C4<1>; +L_0xee1090 .functor NOT 1, L_0xee0e20, C4<0>, C4<0>, C4<0>; +L_0xee10f0 .functor AND 1, L_0xee1090, L_0xee09c0, C4<1>, C4<1>; +L_0xee11e0 .functor OR 1, L_0xee0fe0, L_0xee10f0, C4<0>, C4<0>; +v0xeba740_0 .alias "a", 0 0, v0xebc0d0_0; +v0xeba7e0_0 .net "axorb", 0 0, L_0xee0e20; 1 drivers +v0xeba880_0 .alias "b", 0 0, v0xebc150_0; +v0xeba920_0 .alias "borrowin", 0 0, v0xebc1d0_0; +v0xeba9d0_0 .alias "borrowout", 0 0, v0xebc3b0_0; +v0xebaa70_0 .alias "diff", 0 0, v0xebcad0_0; +v0xebab10_0 .net "nota", 0 0, L_0xee0f80; 1 drivers +v0xebabb0_0 .net "notaandb", 0 0, L_0xee0fe0; 1 drivers +v0xebac50_0 .net "notaxorb", 0 0, L_0xee1090; 1 drivers +v0xebacf0_0 .net "notaxorbandborrowin", 0 0, L_0xee10f0; 1 drivers +S_0xeba3e0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xeba100; + .timescale 0 0; +v0xeba4d0_0 .alias "address", 2 0, v0xed5210_0; +v0xeba550_0 .alias "inputs", 7 0, v0xebc560_0; +v0xeba5d0_0 .alias "out", 0 0, v0xebc710_0; +L_0xee1bf0 .part/v L_0xee15d0, v0xed5c50_0, 1; +S_0xeba1f0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xeba100; + .timescale 0 0; +v0xeb9ef0_0 .alias "address", 2 0, v0xed5210_0; +v0xeba2e0_0 .alias "inputs", 7 0, v0xebc4b0_0; +v0xeba360_0 .alias "out", 0 0, v0xebc250_0; +L_0xee1ce0 .part/v L_0xee19c0, v0xed5c50_0, 1; +S_0xeb74a0 .scope module, "a6" "ALU1bit" 5 38, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xee33f0/d .functor XOR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee33f0 .delay (30,30,30) L_0xee33f0/d; +L_0xee39c0/d .functor AND 1, L_0xee0860, L_0xee48e0, C4<1>, C4<1>; +L_0xee39c0 .delay (30,30,30) L_0xee39c0/d; +L_0xee3a80/d .functor NAND 1, L_0xee0860, L_0xee48e0, C4<1>, C4<1>; +L_0xee3a80 .delay (20,20,20) L_0xee3a80/d; +L_0xee3b40/d .functor NOR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee3b40 .delay (20,20,20) L_0xee3b40/d; +L_0xee3c00/d .functor OR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee3c00 .delay (30,30,30) L_0xee3c00/d; +v0xeb9090_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xeb9110_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xeb9190_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xeb9210_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xeb9290_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xeb9330_0 .net "a", 0 0, L_0xee0860; 1 drivers +v0xeb93f0_0 .net "b", 0 0, L_0xee48e0; 1 drivers +v0xeb9470_0 .net "cin", 0 0, L_0xee45f0; 1 drivers +v0xeb94f0_0 .net "cout", 0 0, L_0xee43c0; 1 drivers +v0xeb9570_0 .net "cout_ADD", 0 0, L_0xee2ab0; 1 drivers +v0xeb9680_0 .net "cout_SLT", 0 0, L_0xee3870; 1 drivers +v0xeb9730_0 .net "cout_SUB", 0 0, L_0xee25e0; 1 drivers +v0xeb9850_0 .net "muxCout", 7 0, L_0xee1920; 1 drivers +v0xeb9900_0 .net "muxRes", 7 0, L_0xee3ca0; 1 drivers +v0xeb9a30_0 .alias "op", 2 0, v0xed5210_0; +v0xeb9ab0_0 .net "out", 0 0, L_0xee42d0; 1 drivers +v0xeb9980_0 .net "res_ADD", 0 0, L_0xee2580; 1 drivers +v0xeb9c20_0 .net "res_AND", 0 0, L_0xee39c0; 1 drivers +v0xeb9b30_0 .net "res_NAND", 0 0, L_0xee3a80; 1 drivers +v0xeb9d40_0 .net "res_NOR", 0 0, L_0xee3b40; 1 drivers +v0xeb9ca0_0 .net "res_OR", 0 0, L_0xee3c00; 1 drivers +v0xeb9e70_0 .net "res_SLT", 0 0, L_0xee34f0; 1 drivers +v0xeb9dc0_0 .net "res_SUB", 0 0, L_0xee2d30; 1 drivers +v0xeb9fb0_0 .net "res_XOR", 0 0, L_0xee33f0; 1 drivers +LS_0xee3ca0_0_0 .concat [ 1 1 1 1], L_0xee2580, L_0xee2d30, L_0xee33f0, L_0xee34f0; +LS_0xee3ca0_0_4 .concat [ 1 1 1 1], L_0xee39c0, L_0xee3a80, L_0xee3b40, L_0xee3c00; +L_0xee3ca0 .concat [ 4 4 0 0], LS_0xee3ca0_0_0, LS_0xee3ca0_0_4; +LS_0xee1920_0_0 .concat [ 1 1 1 1], L_0xee2ab0, L_0xee25e0, C4<0>, L_0xee3870; +LS_0xee1920_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xee1920 .concat [ 4 4 0 0], LS_0xee1920_0_0, LS_0xee1920_0_4; +S_0xeb8870 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xeb74a0; + .timescale 0 0; +L_0xee0a60/d .functor XOR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee0a60 .delay (30,30,30) L_0xee0a60/d; +L_0xee2580/d .functor XOR 1, L_0xee0a60, L_0xee45f0, C4<0>, C4<0>; +L_0xee2580 .delay (30,30,30) L_0xee2580/d; +L_0xee26b0/d .functor AND 1, L_0xee0860, L_0xee48e0, C4<1>, C4<1>; +L_0xee26b0 .delay (30,30,30) L_0xee26b0/d; +L_0xee2750/d .functor OR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee2750 .delay (30,30,30) L_0xee2750/d; +L_0xee27f0/d .functor NOT 1, L_0xee45f0, C4<0>, C4<0>, C4<0>; +L_0xee27f0 .delay (10,10,10) L_0xee27f0/d; +L_0xee2890/d .functor AND 1, L_0xee26b0, L_0xee27f0, C4<1>, C4<1>; +L_0xee2890 .delay (30,30,30) L_0xee2890/d; +L_0xee29c0/d .functor AND 1, L_0xee2750, L_0xee45f0, C4<1>, C4<1>; +L_0xee29c0 .delay (30,30,30) L_0xee29c0/d; +L_0xee2ab0/d .functor OR 1, L_0xee2890, L_0xee29c0, C4<0>, C4<0>; +L_0xee2ab0 .delay (30,30,30) L_0xee2ab0/d; +v0xeb8960_0 .net "_carryin", 0 0, L_0xee27f0; 1 drivers +v0xeb8a20_0 .alias "a", 0 0, v0xeb9330_0; +v0xeb8aa0_0 .net "aandb", 0 0, L_0xee26b0; 1 drivers +v0xeb8b40_0 .net "aorb", 0 0, L_0xee2750; 1 drivers +v0xeb8bc0_0 .alias "b", 0 0, v0xeb93f0_0; +v0xeb8c90_0 .alias "carryin", 0 0, v0xeb9470_0; +v0xeb8d60_0 .alias "carryout", 0 0, v0xeb9570_0; +v0xeb8e00_0 .net "outputIfCarryin", 0 0, L_0xee2890; 1 drivers +v0xeb8ef0_0 .net "outputIf_Carryin", 0 0, L_0xee29c0; 1 drivers +v0xeb8f90_0 .net "s", 0 0, L_0xee0a60; 1 drivers +v0xeb9010_0 .alias "sum", 0 0, v0xeb9980_0; +S_0xeb8110 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xeb74a0; + .timescale 0 0; +L_0xee2cb0 .functor XOR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee2d30 .functor XOR 1, L_0xee2cb0, L_0xee45f0, C4<0>, C4<0>; +L_0xee2e50 .functor NOT 1, L_0xee0860, C4<0>, C4<0>, C4<0>; +L_0xedd340 .functor AND 1, L_0xee2e50, L_0xee48e0, C4<1>, C4<1>; +L_0xee24f0 .functor NOT 1, L_0xee2cb0, C4<0>, C4<0>, C4<0>; +L_0xee3140 .functor AND 1, L_0xee24f0, L_0xee45f0, C4<1>, C4<1>; +L_0xee25e0 .functor OR 1, L_0xedd340, L_0xee3140, C4<0>, C4<0>; +v0xeb8200_0 .alias "a", 0 0, v0xeb9330_0; +v0xeb82a0_0 .net "axorb", 0 0, L_0xee2cb0; 1 drivers +v0xeb8320_0 .alias "b", 0 0, v0xeb93f0_0; +v0xeb83d0_0 .alias "borrowin", 0 0, v0xeb9470_0; +v0xeb84b0_0 .alias "borrowout", 0 0, v0xeb9730_0; +v0xeb8530_0 .alias "diff", 0 0, v0xeb9dc0_0; +v0xeb85b0_0 .net "nota", 0 0, L_0xee2e50; 1 drivers +v0xeb8630_0 .net "notaandb", 0 0, L_0xedd340; 1 drivers +v0xeb86d0_0 .net "notaxorb", 0 0, L_0xee24f0; 1 drivers +v0xeb8770_0 .net "notaxorbandborrowin", 0 0, L_0xee3140; 1 drivers +S_0xeb79f0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xeb74a0; + .timescale 0 0; +L_0xee3490 .functor XOR 1, L_0xee0860, L_0xee48e0, C4<0>, C4<0>; +L_0xee34f0 .functor XOR 1, L_0xee3490, L_0xee45f0, C4<0>, C4<0>; +L_0xee35f0 .functor NOT 1, L_0xee0860, C4<0>, C4<0>, C4<0>; +L_0xee3670 .functor AND 1, L_0xee35f0, L_0xee48e0, C4<1>, C4<1>; +L_0xee3720 .functor NOT 1, L_0xee3490, C4<0>, C4<0>, C4<0>; +L_0xee3780 .functor AND 1, L_0xee3720, L_0xee45f0, C4<1>, C4<1>; +L_0xee3870 .functor OR 1, L_0xee3670, L_0xee3780, C4<0>, C4<0>; +v0xeb7ae0_0 .alias "a", 0 0, v0xeb9330_0; +v0xeb7b60_0 .net "axorb", 0 0, L_0xee3490; 1 drivers +v0xeb7c00_0 .alias "b", 0 0, v0xeb93f0_0; +v0xeb7ca0_0 .alias "borrowin", 0 0, v0xeb9470_0; +v0xeb7d50_0 .alias "borrowout", 0 0, v0xeb9680_0; +v0xeb7df0_0 .alias "diff", 0 0, v0xeb9e70_0; +v0xeb7e90_0 .net "nota", 0 0, L_0xee35f0; 1 drivers +v0xeb7f30_0 .net "notaandb", 0 0, L_0xee3670; 1 drivers +v0xeb7fd0_0 .net "notaxorb", 0 0, L_0xee3720; 1 drivers +v0xeb8070_0 .net "notaxorbandborrowin", 0 0, L_0xee3780; 1 drivers +S_0xeb7780 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xeb74a0; + .timescale 0 0; +v0xeb7870_0 .alias "address", 2 0, v0xed5210_0; +v0xeb78f0_0 .alias "inputs", 7 0, v0xeb9900_0; +v0xeb7970_0 .alias "out", 0 0, v0xeb9ab0_0; +L_0xee42d0 .part/v L_0xee3ca0, v0xed5c50_0, 1; +S_0xeb7590 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xeb74a0; + .timescale 0 0; +v0xeb7260_0 .alias "address", 2 0, v0xed5210_0; +v0xeb7680_0 .alias "inputs", 7 0, v0xeb9850_0; +v0xeb7700_0 .alias "out", 0 0, v0xeb94f0_0; +L_0xee43c0 .part/v L_0xee1920, v0xed5c50_0, 1; +S_0xeb4830 .scope module, "a7" "ALU1bit" 5 39, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xee5b40/d .functor XOR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xee5b40 .delay (30,30,30) L_0xee5b40/d; +L_0xee6110/d .functor AND 1, L_0xee6e80, L_0xee6d80, C4<1>, C4<1>; +L_0xee6110 .delay (30,30,30) L_0xee6110/d; +L_0xee61d0/d .functor NAND 1, L_0xee6e80, L_0xee6d80, C4<1>, C4<1>; +L_0xee61d0 .delay (20,20,20) L_0xee61d0/d; +L_0xee6290/d .functor NOR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xee6290 .delay (20,20,20) L_0xee6290/d; +L_0xee6350/d .functor OR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xee6350 .delay (30,30,30) L_0xee6350/d; +v0xeb64c0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xeb6580_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xeb6620_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xeb66c0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xeb6740_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xeb67e0_0 .net "a", 0 0, L_0xee6e80; 1 drivers +v0xeb6860_0 .net "b", 0 0, L_0xee6d80; 1 drivers +v0xeb68e0_0 .net "cin", 0 0, L_0xee5780; 1 drivers +v0xeb6960_0 .net "cout", 0 0, L_0xee6bf0; 1 drivers +v0xeb69e0_0 .net "cout_ADD", 0 0, L_0xee5200; 1 drivers +v0xeb6ac0_0 .net "cout_SLT", 0 0, L_0xee5fc0; 1 drivers +v0xeb6b40_0 .net "cout_SUB", 0 0, L_0xee4d70; 1 drivers +v0xeb6bc0_0 .net "muxCout", 7 0, L_0xee6830; 1 drivers +v0xeb6c70_0 .net "muxRes", 7 0, L_0xee63f0; 1 drivers +v0xeb6da0_0 .alias "op", 2 0, v0xed5210_0; +v0xeb6e20_0 .net "out", 0 0, L_0xee6b00; 1 drivers +v0xeb6cf0_0 .net "res_ADD", 0 0, L_0xee4d10; 1 drivers +v0xeb6f90_0 .net "res_AND", 0 0, L_0xee6110; 1 drivers +v0xeb6ea0_0 .net "res_NAND", 0 0, L_0xee61d0; 1 drivers +v0xeb70b0_0 .net "res_NOR", 0 0, L_0xee6290; 1 drivers +v0xeb7010_0 .net "res_OR", 0 0, L_0xee6350; 1 drivers +v0xeb71e0_0 .net "res_SLT", 0 0, L_0xee5c40; 1 drivers +v0xeb7160_0 .net "res_SUB", 0 0, L_0xee5480; 1 drivers +v0xeb7350_0 .net "res_XOR", 0 0, L_0xee5b40; 1 drivers +LS_0xee63f0_0_0 .concat [ 1 1 1 1], L_0xee4d10, L_0xee5480, L_0xee5b40, L_0xee5c40; +LS_0xee63f0_0_4 .concat [ 1 1 1 1], L_0xee6110, L_0xee61d0, L_0xee6290, L_0xee6350; +L_0xee63f0 .concat [ 4 4 0 0], LS_0xee63f0_0_0, LS_0xee63f0_0_4; +LS_0xee6830_0_0 .concat [ 1 1 1 1], L_0xee5200, L_0xee4d70, C4<0>, L_0xee5fc0; +LS_0xee6830_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xee6830 .concat [ 4 4 0 0], LS_0xee6830_0_0, LS_0xee6830_0_4; +S_0xeb5c00 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xeb4830; + .timescale 0 0; +L_0xed92c0/d .functor XOR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xed92c0 .delay (30,30,30) L_0xed92c0/d; +L_0xee4d10/d .functor XOR 1, L_0xed92c0, L_0xee5780, C4<0>, C4<0>; +L_0xee4d10 .delay (30,30,30) L_0xee4d10/d; +L_0xee4e00/d .functor AND 1, L_0xee6e80, L_0xee6d80, C4<1>, C4<1>; +L_0xee4e00 .delay (30,30,30) L_0xee4e00/d; +L_0xee4ea0/d .functor OR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xee4ea0 .delay (30,30,30) L_0xee4ea0/d; +L_0xee4f40/d .functor NOT 1, L_0xee5780, C4<0>, C4<0>, C4<0>; +L_0xee4f40 .delay (10,10,10) L_0xee4f40/d; +L_0xee4fe0/d .functor AND 1, L_0xee4e00, L_0xee4f40, C4<1>, C4<1>; +L_0xee4fe0 .delay (30,30,30) L_0xee4fe0/d; +L_0xee5110/d .functor AND 1, L_0xee4ea0, L_0xee5780, C4<1>, C4<1>; +L_0xee5110 .delay (30,30,30) L_0xee5110/d; +L_0xee5200/d .functor OR 1, L_0xee4fe0, L_0xee5110, C4<0>, C4<0>; +L_0xee5200 .delay (30,30,30) L_0xee5200/d; +v0xeb5cf0_0 .net "_carryin", 0 0, L_0xee4f40; 1 drivers +v0xeb5db0_0 .alias "a", 0 0, v0xeb67e0_0; +v0xeb5e30_0 .net "aandb", 0 0, L_0xee4e00; 1 drivers +v0xeb5ed0_0 .net "aorb", 0 0, L_0xee4ea0; 1 drivers +v0xeb5f50_0 .alias "b", 0 0, v0xeb6860_0; +v0xeb6020_0 .alias "carryin", 0 0, v0xeb68e0_0; +v0xeb60f0_0 .alias "carryout", 0 0, v0xeb69e0_0; +v0xeb6190_0 .net "outputIfCarryin", 0 0, L_0xee4fe0; 1 drivers +v0xeb6280_0 .net "outputIf_Carryin", 0 0, L_0xee5110; 1 drivers +v0xeb6320_0 .net "s", 0 0, L_0xed92c0; 1 drivers +v0xeb6420_0 .alias "sum", 0 0, v0xeb6cf0_0; +S_0xeb54a0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xeb4830; + .timescale 0 0; +L_0xee5420 .functor XOR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xee5480 .functor XOR 1, L_0xee5420, L_0xee5780, C4<0>, C4<0>; +L_0xee55a0 .functor NOT 1, L_0xee6e80, C4<0>, C4<0>, C4<0>; +L_0xed9420 .functor AND 1, L_0xee55a0, L_0xee6d80, C4<1>, C4<1>; +L_0xee4c80 .functor NOT 1, L_0xee5420, C4<0>, C4<0>, C4<0>; +L_0xee5890 .functor AND 1, L_0xee4c80, L_0xee5780, C4<1>, C4<1>; +L_0xee4d70 .functor OR 1, L_0xed9420, L_0xee5890, C4<0>, C4<0>; +v0xeb5590_0 .alias "a", 0 0, v0xeb67e0_0; +v0xeb5630_0 .net "axorb", 0 0, L_0xee5420; 1 drivers +v0xeb56b0_0 .alias "b", 0 0, v0xeb6860_0; +v0xeb5760_0 .alias "borrowin", 0 0, v0xeb68e0_0; +v0xeb5840_0 .alias "borrowout", 0 0, v0xeb6b40_0; +v0xeb58c0_0 .alias "diff", 0 0, v0xeb7160_0; +v0xeb5940_0 .net "nota", 0 0, L_0xee55a0; 1 drivers +v0xeb59c0_0 .net "notaandb", 0 0, L_0xed9420; 1 drivers +v0xeb5a60_0 .net "notaxorb", 0 0, L_0xee4c80; 1 drivers +v0xeb5b00_0 .net "notaxorbandborrowin", 0 0, L_0xee5890; 1 drivers +S_0xeb4d80 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xeb4830; + .timescale 0 0; +L_0xee5be0 .functor XOR 1, L_0xee6e80, L_0xee6d80, C4<0>, C4<0>; +L_0xee5c40 .functor XOR 1, L_0xee5be0, L_0xee5780, C4<0>, C4<0>; +L_0xee5d40 .functor NOT 1, L_0xee6e80, C4<0>, C4<0>, C4<0>; +L_0xee5dc0 .functor AND 1, L_0xee5d40, L_0xee6d80, C4<1>, C4<1>; +L_0xee5e70 .functor NOT 1, L_0xee5be0, C4<0>, C4<0>, C4<0>; +L_0xee5ed0 .functor AND 1, L_0xee5e70, L_0xee5780, C4<1>, C4<1>; +L_0xee5fc0 .functor OR 1, L_0xee5dc0, L_0xee5ed0, C4<0>, C4<0>; +v0xeb4e70_0 .alias "a", 0 0, v0xeb67e0_0; +v0xeb4ef0_0 .net "axorb", 0 0, L_0xee5be0; 1 drivers +v0xeb4f90_0 .alias "b", 0 0, v0xeb6860_0; +v0xeb5030_0 .alias "borrowin", 0 0, v0xeb68e0_0; +v0xeb50e0_0 .alias "borrowout", 0 0, v0xeb6ac0_0; +v0xeb5180_0 .alias "diff", 0 0, v0xeb71e0_0; +v0xeb5220_0 .net "nota", 0 0, L_0xee5d40; 1 drivers +v0xeb52c0_0 .net "notaandb", 0 0, L_0xee5dc0; 1 drivers +v0xeb5360_0 .net "notaxorb", 0 0, L_0xee5e70; 1 drivers +v0xeb5400_0 .net "notaxorbandborrowin", 0 0, L_0xee5ed0; 1 drivers +S_0xeb4b10 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xeb4830; + .timescale 0 0; +v0xeb4c00_0 .alias "address", 2 0, v0xed5210_0; +v0xeb4c80_0 .alias "inputs", 7 0, v0xeb6c70_0; +v0xeb4d00_0 .alias "out", 0 0, v0xeb6e20_0; +L_0xee6b00 .part/v L_0xee63f0, v0xed5c50_0, 1; +S_0xeb4920 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xeb4830; + .timescale 0 0; +v0xeb45f0_0 .alias "address", 2 0, v0xed5210_0; +v0xeb4a10_0 .alias "inputs", 7 0, v0xeb6bc0_0; +v0xeb4a90_0 .alias "out", 0 0, v0xeb6960_0; +L_0xee6bf0 .part/v L_0xee6830, v0xed5c50_0, 1; +S_0xeb1bc0 .scope module, "a8" "ALU1bit" 5 40, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xee81f0/d .functor XOR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee81f0 .delay (30,30,30) L_0xee81f0/d; +L_0xee8800/d .functor AND 1, L_0xee7340, L_0xee7d20, C4<1>, C4<1>; +L_0xee8800 .delay (30,30,30) L_0xee8800/d; +L_0xee88c0/d .functor NAND 1, L_0xee7340, L_0xee7d20, C4<1>, C4<1>; +L_0xee88c0 .delay (20,20,20) L_0xee88c0/d; +L_0xee8980/d .functor NOR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee8980 .delay (20,20,20) L_0xee8980/d; +L_0xee8a40/d .functor OR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee8a40 .delay (30,30,30) L_0xee8a40/d; +v0xeb3850_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xeb3910_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xeb39b0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xeb3a50_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xeb3ad0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xeb3b70_0 .net "a", 0 0, L_0xee7340; 1 drivers +v0xeb3bf0_0 .net "b", 0 0, L_0xee7d20; 1 drivers +v0xeb3c70_0 .net "cin", 0 0, L_0xee7e80; 1 drivers +v0xeb3cf0_0 .net "cout", 0 0, L_0xee9200; 1 drivers +v0xeb3d70_0 .net "cout_ADD", 0 0, L_0xee7920; 1 drivers +v0xeb3e50_0 .net "cout_SLT", 0 0, L_0xee86b0; 1 drivers +v0xeb3ed0_0 .net "cout_SUB", 0 0, L_0xee74c0; 1 drivers +v0xeb3f50_0 .net "muxCout", 7 0, L_0xee6740; 1 drivers +v0xeb4000_0 .net "muxRes", 7 0, L_0xee8ae0; 1 drivers +v0xeb4130_0 .alias "op", 2 0, v0xed5210_0; +v0xeb41b0_0 .net "out", 0 0, L_0xee9110; 1 drivers +v0xeb4080_0 .net "res_ADD", 0 0, L_0xee5820; 1 drivers +v0xeb4320_0 .net "res_AND", 0 0, L_0xee8800; 1 drivers +v0xeb4230_0 .net "res_NAND", 0 0, L_0xee88c0; 1 drivers +v0xeb4440_0 .net "res_NOR", 0 0, L_0xee8980; 1 drivers +v0xeb43a0_0 .net "res_OR", 0 0, L_0xee8a40; 1 drivers +v0xeb4570_0 .net "res_SLT", 0 0, L_0xee8310; 1 drivers +v0xeb44f0_0 .net "res_SUB", 0 0, L_0xee7b80; 1 drivers +v0xeb46e0_0 .net "res_XOR", 0 0, L_0xee81f0; 1 drivers +LS_0xee8ae0_0_0 .concat [ 1 1 1 1], L_0xee5820, L_0xee7b80, L_0xee81f0, L_0xee8310; +LS_0xee8ae0_0_4 .concat [ 1 1 1 1], L_0xee8800, L_0xee88c0, L_0xee8980, L_0xee8a40; +L_0xee8ae0 .concat [ 4 4 0 0], LS_0xee8ae0_0_0, LS_0xee8ae0_0_4; +LS_0xee6740_0_0 .concat [ 1 1 1 1], L_0xee7920, L_0xee74c0, C4<0>, L_0xee86b0; +LS_0xee6740_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xee6740 .concat [ 4 4 0 0], LS_0xee6740_0_0, LS_0xee6740_0_4; +S_0xeb2f90 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xeb1bc0; + .timescale 0 0; +L_0xee6e20/d .functor XOR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee6e20 .delay (30,30,30) L_0xee6e20/d; +L_0xee5820/d .functor XOR 1, L_0xee6e20, L_0xee7e80, C4<0>, C4<0>; +L_0xee5820 .delay (30,30,30) L_0xee5820/d; +L_0xee56b0/d .functor AND 1, L_0xee7340, L_0xee7d20, C4<1>, C4<1>; +L_0xee56b0 .delay (30,30,30) L_0xee56b0/d; +L_0xee75c0/d .functor OR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee75c0 .delay (30,30,30) L_0xee75c0/d; +L_0xee7660/d .functor NOT 1, L_0xee7e80, C4<0>, C4<0>, C4<0>; +L_0xee7660 .delay (10,10,10) L_0xee7660/d; +L_0xee7700/d .functor AND 1, L_0xee56b0, L_0xee7660, C4<1>, C4<1>; +L_0xee7700 .delay (30,30,30) L_0xee7700/d; +L_0xee7830/d .functor AND 1, L_0xee75c0, L_0xee7e80, C4<1>, C4<1>; +L_0xee7830 .delay (30,30,30) L_0xee7830/d; +L_0xee7920/d .functor OR 1, L_0xee7700, L_0xee7830, C4<0>, C4<0>; +L_0xee7920 .delay (30,30,30) L_0xee7920/d; +v0xeb3080_0 .net "_carryin", 0 0, L_0xee7660; 1 drivers +v0xeb3140_0 .alias "a", 0 0, v0xeb3b70_0; +v0xeb31c0_0 .net "aandb", 0 0, L_0xee56b0; 1 drivers +v0xeb3260_0 .net "aorb", 0 0, L_0xee75c0; 1 drivers +v0xeb32e0_0 .alias "b", 0 0, v0xeb3bf0_0; +v0xeb33b0_0 .alias "carryin", 0 0, v0xeb3c70_0; +v0xeb3480_0 .alias "carryout", 0 0, v0xeb3d70_0; +v0xeb3520_0 .net "outputIfCarryin", 0 0, L_0xee7700; 1 drivers +v0xeb3610_0 .net "outputIf_Carryin", 0 0, L_0xee7830; 1 drivers +v0xeb36b0_0 .net "s", 0 0, L_0xee6e20; 1 drivers +v0xeb37b0_0 .alias "sum", 0 0, v0xeb4080_0; +S_0xeb2830 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xeb1bc0; + .timescale 0 0; +L_0xee7b00 .functor XOR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee7b80 .functor XOR 1, L_0xee7b00, L_0xee7e80, C4<0>, C4<0>; +L_0xee7ca0 .functor NOT 1, L_0xee7340, C4<0>, C4<0>, C4<0>; +L_0xee5620 .functor AND 1, L_0xee7ca0, L_0xee7d20, C4<1>, C4<1>; +L_0xee7460 .functor NOT 1, L_0xee7b00, C4<0>, C4<0>, C4<0>; +L_0xee7f90 .functor AND 1, L_0xee7460, L_0xee7e80, C4<1>, C4<1>; +L_0xee74c0 .functor OR 1, L_0xee5620, L_0xee7f90, C4<0>, C4<0>; +v0xeb2920_0 .alias "a", 0 0, v0xeb3b70_0; +v0xeb29c0_0 .net "axorb", 0 0, L_0xee7b00; 1 drivers +v0xeb2a40_0 .alias "b", 0 0, v0xeb3bf0_0; +v0xeb2af0_0 .alias "borrowin", 0 0, v0xeb3c70_0; +v0xeb2bd0_0 .alias "borrowout", 0 0, v0xeb3ed0_0; +v0xeb2c50_0 .alias "diff", 0 0, v0xeb44f0_0; +v0xeb2cd0_0 .net "nota", 0 0, L_0xee7ca0; 1 drivers +v0xeb2d50_0 .net "notaandb", 0 0, L_0xee5620; 1 drivers +v0xeb2df0_0 .net "notaxorb", 0 0, L_0xee7460; 1 drivers +v0xeb2e90_0 .net "notaxorbandborrowin", 0 0, L_0xee7f90; 1 drivers +S_0xeb2110 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xeb1bc0; + .timescale 0 0; +L_0xee8290 .functor XOR 1, L_0xee7340, L_0xee7d20, C4<0>, C4<0>; +L_0xee8310 .functor XOR 1, L_0xee8290, L_0xee7e80, C4<0>, C4<0>; +L_0xee8430 .functor NOT 1, L_0xee7340, C4<0>, C4<0>, C4<0>; +L_0xee84b0 .functor AND 1, L_0xee8430, L_0xee7d20, C4<1>, C4<1>; +L_0xee8560 .functor NOT 1, L_0xee8290, C4<0>, C4<0>, C4<0>; +L_0xee85c0 .functor AND 1, L_0xee8560, L_0xee7e80, C4<1>, C4<1>; +L_0xee86b0 .functor OR 1, L_0xee84b0, L_0xee85c0, C4<0>, C4<0>; +v0xeb2200_0 .alias "a", 0 0, v0xeb3b70_0; +v0xeb2280_0 .net "axorb", 0 0, L_0xee8290; 1 drivers +v0xeb2320_0 .alias "b", 0 0, v0xeb3bf0_0; +v0xeb23c0_0 .alias "borrowin", 0 0, v0xeb3c70_0; +v0xeb2470_0 .alias "borrowout", 0 0, v0xeb3e50_0; +v0xeb2510_0 .alias "diff", 0 0, v0xeb4570_0; +v0xeb25b0_0 .net "nota", 0 0, L_0xee8430; 1 drivers +v0xeb2650_0 .net "notaandb", 0 0, L_0xee84b0; 1 drivers +v0xeb26f0_0 .net "notaxorb", 0 0, L_0xee8560; 1 drivers +v0xeb2790_0 .net "notaxorbandborrowin", 0 0, L_0xee85c0; 1 drivers +S_0xeb1ea0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xeb1bc0; + .timescale 0 0; +v0xeb1f90_0 .alias "address", 2 0, v0xed5210_0; +v0xeb2010_0 .alias "inputs", 7 0, v0xeb4000_0; +v0xeb2090_0 .alias "out", 0 0, v0xeb41b0_0; +L_0xee9110 .part/v L_0xee8ae0, v0xed5c50_0, 1; +S_0xeb1cb0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xeb1bc0; + .timescale 0 0; +v0xeb1980_0 .alias "address", 2 0, v0xed5210_0; +v0xeb1da0_0 .alias "inputs", 7 0, v0xeb3f50_0; +v0xeb1e20_0 .alias "out", 0 0, v0xeb3cf0_0; +L_0xee9200 .part/v L_0xee6740, v0xed5c50_0, 1; +S_0xeaef50 .scope module, "a9" "ALU1bit" 5 41, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xeea940/d .functor XOR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xeea940 .delay (30,30,30) L_0xeea940/d; +L_0xeeaf10/d .functor AND 1, L_0xee9b30, L_0xee1f20, C4<1>, C4<1>; +L_0xeeaf10 .delay (30,30,30) L_0xeeaf10/d; +L_0xeeafd0/d .functor NAND 1, L_0xee9b30, L_0xee1f20, C4<1>, C4<1>; +L_0xeeafd0 .delay (20,20,20) L_0xeeafd0/d; +L_0xeeb090/d .functor NOR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xeeb090 .delay (20,20,20) L_0xeeb090/d; +L_0xeeb150/d .functor OR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xeeb150 .delay (30,30,30) L_0xeeb150/d; +v0xeb0be0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xeb0ca0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xeb0d40_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xeb0de0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xeb0e60_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xeb0f00_0 .net "a", 0 0, L_0xee9b30; 1 drivers +v0xeb0f80_0 .net "b", 0 0, L_0xee1f20; 1 drivers +v0xeb1000_0 .net "cin", 0 0, L_0xeea420; 1 drivers +v0xeb1080_0 .net "cout", 0 0, L_0xeeb9f0; 1 drivers +v0xeb1100_0 .net "cout_ADD", 0 0, L_0xeea000; 1 drivers +v0xeb11e0_0 .net "cout_SLT", 0 0, L_0xeeadc0; 1 drivers +v0xeb1260_0 .net "cout_SUB", 0 0, L_0xee9bd0; 1 drivers +v0xeb12e0_0 .net "muxCout", 7 0, L_0xeeb680; 1 drivers +v0xeb1390_0 .net "muxRes", 7 0, L_0xeeb1f0; 1 drivers +v0xeb14c0_0 .alias "op", 2 0, v0xed5210_0; +v0xeb1540_0 .net "out", 0 0, L_0xeeb900; 1 drivers +v0xeb1410_0 .net "res_ADD", 0 0, L_0xee9610; 1 drivers +v0xeb16b0_0 .net "res_AND", 0 0, L_0xeeaf10; 1 drivers +v0xeb15c0_0 .net "res_NAND", 0 0, L_0xeeafd0; 1 drivers +v0xeb17d0_0 .net "res_NOR", 0 0, L_0xeeb090; 1 drivers +v0xeb1730_0 .net "res_OR", 0 0, L_0xeeb150; 1 drivers +v0xeb1900_0 .net "res_SLT", 0 0, L_0xeeaa40; 1 drivers +v0xeb1880_0 .net "res_SUB", 0 0, L_0xeea280; 1 drivers +v0xeb1a70_0 .net "res_XOR", 0 0, L_0xeea940; 1 drivers +LS_0xeeb1f0_0_0 .concat [ 1 1 1 1], L_0xee9610, L_0xeea280, L_0xeea940, L_0xeeaa40; +LS_0xeeb1f0_0_4 .concat [ 1 1 1 1], L_0xeeaf10, L_0xeeafd0, L_0xeeb090, L_0xeeb150; +L_0xeeb1f0 .concat [ 4 4 0 0], LS_0xeeb1f0_0_0, LS_0xeeb1f0_0_4; +LS_0xeeb680_0_0 .concat [ 1 1 1 1], L_0xeea000, L_0xee9bd0, C4<0>, L_0xeeadc0; +LS_0xeeb680_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xeeb680 .concat [ 4 4 0 0], LS_0xeeb680_0_0, LS_0xeeb680_0_4; +S_0xeb0320 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xeaef50; + .timescale 0 0; +L_0xee7dc0/d .functor XOR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xee7dc0 .delay (30,30,30) L_0xee7dc0/d; +L_0xee9610/d .functor XOR 1, L_0xee7dc0, L_0xeea420, C4<0>, C4<0>; +L_0xee9610 .delay (30,30,30) L_0xee9610/d; +L_0xee73e0/d .functor AND 1, L_0xee9b30, L_0xee1f20, C4<1>, C4<1>; +L_0xee73e0 .delay (30,30,30) L_0xee73e0/d; +L_0xee9ca0/d .functor OR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xee9ca0 .delay (30,30,30) L_0xee9ca0/d; +L_0xee9d40/d .functor NOT 1, L_0xeea420, C4<0>, C4<0>, C4<0>; +L_0xee9d40 .delay (10,10,10) L_0xee9d40/d; +L_0xee9de0/d .functor AND 1, L_0xee73e0, L_0xee9d40, C4<1>, C4<1>; +L_0xee9de0 .delay (30,30,30) L_0xee9de0/d; +L_0xee9f10/d .functor AND 1, L_0xee9ca0, L_0xeea420, C4<1>, C4<1>; +L_0xee9f10 .delay (30,30,30) L_0xee9f10/d; +L_0xeea000/d .functor OR 1, L_0xee9de0, L_0xee9f10, C4<0>, C4<0>; +L_0xeea000 .delay (30,30,30) L_0xeea000/d; +v0xeb0410_0 .net "_carryin", 0 0, L_0xee9d40; 1 drivers +v0xeb04d0_0 .alias "a", 0 0, v0xeb0f00_0; +v0xeb0550_0 .net "aandb", 0 0, L_0xee73e0; 1 drivers +v0xeb05f0_0 .net "aorb", 0 0, L_0xee9ca0; 1 drivers +v0xeb0670_0 .alias "b", 0 0, v0xeb0f80_0; +v0xeb0740_0 .alias "carryin", 0 0, v0xeb1000_0; +v0xeb0810_0 .alias "carryout", 0 0, v0xeb1100_0; +v0xeb08b0_0 .net "outputIfCarryin", 0 0, L_0xee9de0; 1 drivers +v0xeb09a0_0 .net "outputIf_Carryin", 0 0, L_0xee9f10; 1 drivers +v0xeb0a40_0 .net "s", 0 0, L_0xee7dc0; 1 drivers +v0xeb0b40_0 .alias "sum", 0 0, v0xeb1410_0; +S_0xeafbc0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xeaef50; + .timescale 0 0; +L_0xeea200 .functor XOR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xeea280 .functor XOR 1, L_0xeea200, L_0xeea420, C4<0>, C4<0>; +L_0xeea3a0 .functor NOT 1, L_0xee9b30, C4<0>, C4<0>, C4<0>; +L_0xedf830 .functor AND 1, L_0xeea3a0, L_0xee1f20, C4<1>, C4<1>; +L_0xee9540 .functor NOT 1, L_0xeea200, C4<0>, C4<0>, C4<0>; +L_0xeea690 .functor AND 1, L_0xee9540, L_0xeea420, C4<1>, C4<1>; +L_0xee9bd0 .functor OR 1, L_0xedf830, L_0xeea690, C4<0>, C4<0>; +v0xeafcb0_0 .alias "a", 0 0, v0xeb0f00_0; +v0xeafd50_0 .net "axorb", 0 0, L_0xeea200; 1 drivers +v0xeafdd0_0 .alias "b", 0 0, v0xeb0f80_0; +v0xeafe80_0 .alias "borrowin", 0 0, v0xeb1000_0; +v0xeaff60_0 .alias "borrowout", 0 0, v0xeb1260_0; +v0xeaffe0_0 .alias "diff", 0 0, v0xeb1880_0; +v0xeb0060_0 .net "nota", 0 0, L_0xeea3a0; 1 drivers +v0xeb00e0_0 .net "notaandb", 0 0, L_0xedf830; 1 drivers +v0xeb0180_0 .net "notaxorb", 0 0, L_0xee9540; 1 drivers +v0xeb0220_0 .net "notaxorbandborrowin", 0 0, L_0xeea690; 1 drivers +S_0xeaf4a0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xeaef50; + .timescale 0 0; +L_0xeea9e0 .functor XOR 1, L_0xee9b30, L_0xee1f20, C4<0>, C4<0>; +L_0xeeaa40 .functor XOR 1, L_0xeea9e0, L_0xeea420, C4<0>, C4<0>; +L_0xeeab40 .functor NOT 1, L_0xee9b30, C4<0>, C4<0>, C4<0>; +L_0xeeabc0 .functor AND 1, L_0xeeab40, L_0xee1f20, C4<1>, C4<1>; +L_0xeeac70 .functor NOT 1, L_0xeea9e0, C4<0>, C4<0>, C4<0>; +L_0xeeacd0 .functor AND 1, L_0xeeac70, L_0xeea420, C4<1>, C4<1>; +L_0xeeadc0 .functor OR 1, L_0xeeabc0, L_0xeeacd0, C4<0>, C4<0>; +v0xeaf590_0 .alias "a", 0 0, v0xeb0f00_0; +v0xeaf610_0 .net "axorb", 0 0, L_0xeea9e0; 1 drivers +v0xeaf6b0_0 .alias "b", 0 0, v0xeb0f80_0; +v0xeaf750_0 .alias "borrowin", 0 0, v0xeb1000_0; +v0xeaf800_0 .alias "borrowout", 0 0, v0xeb11e0_0; +v0xeaf8a0_0 .alias "diff", 0 0, v0xeb1900_0; +v0xeaf940_0 .net "nota", 0 0, L_0xeeab40; 1 drivers +v0xeaf9e0_0 .net "notaandb", 0 0, L_0xeeabc0; 1 drivers +v0xeafa80_0 .net "notaxorb", 0 0, L_0xeeac70; 1 drivers +v0xeafb20_0 .net "notaxorbandborrowin", 0 0, L_0xeeacd0; 1 drivers +S_0xeaf230 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xeaef50; + .timescale 0 0; +v0xeaf320_0 .alias "address", 2 0, v0xed5210_0; +v0xeaf3a0_0 .alias "inputs", 7 0, v0xeb1390_0; +v0xeaf420_0 .alias "out", 0 0, v0xeb1540_0; +L_0xeeb900 .part/v L_0xeeb1f0, v0xed5c50_0, 1; +S_0xeaf040 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xeaef50; + .timescale 0 0; +v0xeaed10_0 .alias "address", 2 0, v0xed5210_0; +v0xeaf130_0 .alias "inputs", 7 0, v0xeb12e0_0; +v0xeaf1b0_0 .alias "out", 0 0, v0xeb1080_0; +L_0xeeb9f0 .part/v L_0xeeb680, v0xed5c50_0, 1; +S_0xeac2e0 .scope module, "a10" "ALU1bit" 5 42, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xeed250/d .functor XOR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xeed250 .delay (30,30,30) L_0xeed250/d; +L_0xeed820/d .functor AND 1, L_0xeec460, L_0xeec500, C4<1>, C4<1>; +L_0xeed820 .delay (30,30,30) L_0xeed820/d; +L_0xeed8e0/d .functor NAND 1, L_0xeec460, L_0xeec500, C4<1>, C4<1>; +L_0xeed8e0 .delay (20,20,20) L_0xeed8e0/d; +L_0xeed9a0/d .functor NOR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xeed9a0 .delay (20,20,20) L_0xeed9a0/d; +L_0xeeda60/d .functor OR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xeeda60 .delay (30,30,30) L_0xeeda60/d; +v0xeadf70_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xeae030_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xeae0d0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xeae170_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xeae1f0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xeae290_0 .net "a", 0 0, L_0xeec460; 1 drivers +v0xeae310_0 .net "b", 0 0, L_0xeec500; 1 drivers +v0xeae390_0 .net "cin", 0 0, L_0xeecd30; 1 drivers +v0xeae410_0 .net "cout", 0 0, L_0xeee310; 1 drivers +v0xeae490_0 .net "cout_ADD", 0 0, L_0xeec910; 1 drivers +v0xeae570_0 .net "cout_SLT", 0 0, L_0xeed6d0; 1 drivers +v0xeae5f0_0 .net "cout_SUB", 0 0, L_0xeec0f0; 1 drivers +v0xeae670_0 .net "muxCout", 7 0, L_0xeeb5c0; 1 drivers +v0xeae720_0 .net "muxRes", 7 0, L_0xeedb00; 1 drivers +v0xeae850_0 .alias "op", 2 0, v0xed5210_0; +v0xeae8d0_0 .net "out", 0 0, L_0xeee220; 1 drivers +v0xeae7a0_0 .net "res_ADD", 0 0, L_0xeea4c0; 1 drivers +v0xeaea40_0 .net "res_AND", 0 0, L_0xeed820; 1 drivers +v0xeae950_0 .net "res_NAND", 0 0, L_0xeed8e0; 1 drivers +v0xeaeb60_0 .net "res_NOR", 0 0, L_0xeed9a0; 1 drivers +v0xeaeac0_0 .net "res_OR", 0 0, L_0xeeda60; 1 drivers +v0xeaec90_0 .net "res_SLT", 0 0, L_0xeed350; 1 drivers +v0xeaec10_0 .net "res_SUB", 0 0, L_0xeecb90; 1 drivers +v0xeaee00_0 .net "res_XOR", 0 0, L_0xeed250; 1 drivers +LS_0xeedb00_0_0 .concat [ 1 1 1 1], L_0xeea4c0, L_0xeecb90, L_0xeed250, L_0xeed350; +LS_0xeedb00_0_4 .concat [ 1 1 1 1], L_0xeed820, L_0xeed8e0, L_0xeed9a0, L_0xeeda60; +L_0xeedb00 .concat [ 4 4 0 0], LS_0xeedb00_0_0, LS_0xeedb00_0_4; +LS_0xeeb5c0_0_0 .concat [ 1 1 1 1], L_0xeec910, L_0xeec0f0, C4<0>, L_0xeed6d0; +LS_0xeeb5c0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xeeb5c0 .concat [ 4 4 0 0], LS_0xeeb5c0_0_0, LS_0xeeb5c0_0_4; +S_0xead6b0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xeac2e0; + .timescale 0 0; +L_0xee1fc0/d .functor XOR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xee1fc0 .delay (30,30,30) L_0xee1fc0/d; +L_0xeea4c0/d .functor XOR 1, L_0xee1fc0, L_0xeecd30, C4<0>, C4<0>; +L_0xeea4c0 .delay (30,30,30) L_0xeea4c0/d; +L_0xeea610/d .functor AND 1, L_0xeec460, L_0xeec500, C4<1>, C4<1>; +L_0xeea610 .delay (30,30,30) L_0xeea610/d; +L_0xeebc50/d .functor OR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xeebc50 .delay (30,30,30) L_0xeebc50/d; +L_0xeec610/d .functor NOT 1, L_0xeecd30, C4<0>, C4<0>, C4<0>; +L_0xeec610 .delay (10,10,10) L_0xeec610/d; +L_0xeec6b0/d .functor AND 1, L_0xeea610, L_0xeec610, C4<1>, C4<1>; +L_0xeec6b0 .delay (30,30,30) L_0xeec6b0/d; +L_0xeec800/d .functor AND 1, L_0xeebc50, L_0xeecd30, C4<1>, C4<1>; +L_0xeec800 .delay (30,30,30) L_0xeec800/d; +L_0xeec910/d .functor OR 1, L_0xeec6b0, L_0xeec800, C4<0>, C4<0>; +L_0xeec910 .delay (30,30,30) L_0xeec910/d; +v0xead7a0_0 .net "_carryin", 0 0, L_0xeec610; 1 drivers +v0xead860_0 .alias "a", 0 0, v0xeae290_0; +v0xead8e0_0 .net "aandb", 0 0, L_0xeea610; 1 drivers +v0xead980_0 .net "aorb", 0 0, L_0xeebc50; 1 drivers +v0xeada00_0 .alias "b", 0 0, v0xeae310_0; +v0xeadad0_0 .alias "carryin", 0 0, v0xeae390_0; +v0xeadba0_0 .alias "carryout", 0 0, v0xeae490_0; +v0xeadc40_0 .net "outputIfCarryin", 0 0, L_0xeec6b0; 1 drivers +v0xeadd30_0 .net "outputIf_Carryin", 0 0, L_0xeec800; 1 drivers +v0xeaddd0_0 .net "s", 0 0, L_0xee1fc0; 1 drivers +v0xeaded0_0 .alias "sum", 0 0, v0xeae7a0_0; +S_0xeacf50 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xeac2e0; + .timescale 0 0; +L_0xeecb30 .functor XOR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xeecb90 .functor XOR 1, L_0xeecb30, L_0xeecd30, C4<0>, C4<0>; +L_0xeeccb0 .functor NOT 1, L_0xeec460, C4<0>, C4<0>, C4<0>; +L_0xeea580 .functor AND 1, L_0xeeccb0, L_0xeec500, C4<1>, C4<1>; +L_0xeebb80 .functor NOT 1, L_0xeecb30, C4<0>, C4<0>, C4<0>; +L_0xeecfa0 .functor AND 1, L_0xeebb80, L_0xeecd30, C4<1>, C4<1>; +L_0xeec0f0 .functor OR 1, L_0xeea580, L_0xeecfa0, C4<0>, C4<0>; +v0xead040_0 .alias "a", 0 0, v0xeae290_0; +v0xead0e0_0 .net "axorb", 0 0, L_0xeecb30; 1 drivers +v0xead160_0 .alias "b", 0 0, v0xeae310_0; +v0xead210_0 .alias "borrowin", 0 0, v0xeae390_0; +v0xead2f0_0 .alias "borrowout", 0 0, v0xeae5f0_0; +v0xead370_0 .alias "diff", 0 0, v0xeaec10_0; +v0xead3f0_0 .net "nota", 0 0, L_0xeeccb0; 1 drivers +v0xead470_0 .net "notaandb", 0 0, L_0xeea580; 1 drivers +v0xead510_0 .net "notaxorb", 0 0, L_0xeebb80; 1 drivers +v0xead5b0_0 .net "notaxorbandborrowin", 0 0, L_0xeecfa0; 1 drivers +S_0xeac830 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xeac2e0; + .timescale 0 0; +L_0xeed2f0 .functor XOR 1, L_0xeec460, L_0xeec500, C4<0>, C4<0>; +L_0xeed350 .functor XOR 1, L_0xeed2f0, L_0xeecd30, C4<0>, C4<0>; +L_0xeed450 .functor NOT 1, L_0xeec460, C4<0>, C4<0>, C4<0>; +L_0xeed4d0 .functor AND 1, L_0xeed450, L_0xeec500, C4<1>, C4<1>; +L_0xeed580 .functor NOT 1, L_0xeed2f0, C4<0>, C4<0>, C4<0>; +L_0xeed5e0 .functor AND 1, L_0xeed580, L_0xeecd30, C4<1>, C4<1>; +L_0xeed6d0 .functor OR 1, L_0xeed4d0, L_0xeed5e0, C4<0>, C4<0>; +v0xeac920_0 .alias "a", 0 0, v0xeae290_0; +v0xeac9a0_0 .net "axorb", 0 0, L_0xeed2f0; 1 drivers +v0xeaca40_0 .alias "b", 0 0, v0xeae310_0; +v0xeacae0_0 .alias "borrowin", 0 0, v0xeae390_0; +v0xeacb90_0 .alias "borrowout", 0 0, v0xeae570_0; +v0xeacc30_0 .alias "diff", 0 0, v0xeaec90_0; +v0xeaccd0_0 .net "nota", 0 0, L_0xeed450; 1 drivers +v0xeacd70_0 .net "notaandb", 0 0, L_0xeed4d0; 1 drivers +v0xeace10_0 .net "notaxorb", 0 0, L_0xeed580; 1 drivers +v0xeaceb0_0 .net "notaxorbandborrowin", 0 0, L_0xeed5e0; 1 drivers +S_0xeac5c0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xeac2e0; + .timescale 0 0; +v0xeac6b0_0 .alias "address", 2 0, v0xed5210_0; +v0xeac730_0 .alias "inputs", 7 0, v0xeae720_0; +v0xeac7b0_0 .alias "out", 0 0, v0xeae8d0_0; +L_0xeee220 .part/v L_0xeedb00, v0xed5c50_0, 1; +S_0xeac3d0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xeac2e0; + .timescale 0 0; +v0xeac0a0_0 .alias "address", 2 0, v0xed5210_0; +v0xeac4c0_0 .alias "inputs", 7 0, v0xeae670_0; +v0xeac540_0 .alias "out", 0 0, v0xeae410_0; +L_0xeee310 .part/v L_0xeeb5c0, v0xed5c50_0, 1; +S_0xea9670 .scope module, "a11" "ALU1bit" 5 43, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xeefa40/d .functor XOR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xeefa40 .delay (30,30,30) L_0xeefa40/d; +L_0xef0010/d .functor AND 1, L_0xeeeb80, L_0xeef520, C4<1>, C4<1>; +L_0xef0010 .delay (30,30,30) L_0xef0010/d; +L_0xef00d0/d .functor NAND 1, L_0xeeeb80, L_0xeef520, C4<1>, C4<1>; +L_0xef00d0 .delay (20,20,20) L_0xef00d0/d; +L_0xef0190/d .functor NOR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xef0190 .delay (20,20,20) L_0xef0190/d; +L_0xef0250/d .functor OR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xef0250 .delay (30,30,30) L_0xef0250/d; +v0xeab300_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xeab3c0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xeab460_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xeab500_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xeab580_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xeab620_0 .net "a", 0 0, L_0xeeeb80; 1 drivers +v0xeab6a0_0 .net "b", 0 0, L_0xeef520; 1 drivers +v0xeab720_0 .net "cin", 0 0, L_0xeef680; 1 drivers +v0xeab7a0_0 .net "cout", 0 0, L_0xef0af0; 1 drivers +v0xeab820_0 .net "cout_ADD", 0 0, L_0xeef100; 1 drivers +v0xeab900_0 .net "cout_SLT", 0 0, L_0xeefec0; 1 drivers +v0xeab980_0 .net "cout_SUB", 0 0, L_0xeeec70; 1 drivers +v0xeaba00_0 .net "muxCout", 7 0, L_0xeedf50; 1 drivers +v0xeabab0_0 .net "muxRes", 7 0, L_0xef02f0; 1 drivers +v0xeabbe0_0 .alias "op", 2 0, v0xed5210_0; +v0xeabc60_0 .net "out", 0 0, L_0xef0a00; 1 drivers +v0xeabb30_0 .net "res_ADD", 0 0, L_0xeee610; 1 drivers +v0xeabdd0_0 .net "res_AND", 0 0, L_0xef0010; 1 drivers +v0xeabce0_0 .net "res_NAND", 0 0, L_0xef00d0; 1 drivers +v0xeabef0_0 .net "res_NOR", 0 0, L_0xef0190; 1 drivers +v0xeabe50_0 .net "res_OR", 0 0, L_0xef0250; 1 drivers +v0xeac020_0 .net "res_SLT", 0 0, L_0xeefb40; 1 drivers +v0xeabfa0_0 .net "res_SUB", 0 0, L_0xeef380; 1 drivers +v0xeac190_0 .net "res_XOR", 0 0, L_0xeefa40; 1 drivers +LS_0xef02f0_0_0 .concat [ 1 1 1 1], L_0xeee610, L_0xeef380, L_0xeefa40, L_0xeefb40; +LS_0xef02f0_0_4 .concat [ 1 1 1 1], L_0xef0010, L_0xef00d0, L_0xef0190, L_0xef0250; +L_0xef02f0 .concat [ 4 4 0 0], LS_0xef02f0_0_0, LS_0xef02f0_0_4; +LS_0xeedf50_0_0 .concat [ 1 1 1 1], L_0xeef100, L_0xeeec70, C4<0>, L_0xeefec0; +LS_0xeedf50_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xeedf50 .concat [ 4 4 0 0], LS_0xeedf50_0_0, LS_0xeedf50_0_4; +S_0xeaaa40 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xea9670; + .timescale 0 0; +L_0xeecdd0/d .functor XOR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xeecdd0 .delay (30,30,30) L_0xeecdd0/d; +L_0xeee610/d .functor XOR 1, L_0xeecdd0, L_0xeef680, C4<0>, C4<0>; +L_0xeee610 .delay (30,30,30) L_0xeee610/d; +L_0xeecf20/d .functor AND 1, L_0xeeeb80, L_0xeef520, C4<1>, C4<1>; +L_0xeecf20 .delay (30,30,30) L_0xeecf20/d; +L_0xeeed40/d .functor OR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xeeed40 .delay (30,30,30) L_0xeeed40/d; +L_0xeeee00/d .functor NOT 1, L_0xeef680, C4<0>, C4<0>, C4<0>; +L_0xeeee00 .delay (10,10,10) L_0xeeee00/d; +L_0xeeeea0/d .functor AND 1, L_0xeecf20, L_0xeeee00, C4<1>, C4<1>; +L_0xeeeea0 .delay (30,30,30) L_0xeeeea0/d; +L_0xeeeff0/d .functor AND 1, L_0xeeed40, L_0xeef680, C4<1>, C4<1>; +L_0xeeeff0 .delay (30,30,30) L_0xeeeff0/d; +L_0xeef100/d .functor OR 1, L_0xeeeea0, L_0xeeeff0, C4<0>, C4<0>; +L_0xeef100 .delay (30,30,30) L_0xeef100/d; +v0xeaab30_0 .net "_carryin", 0 0, L_0xeeee00; 1 drivers +v0xeaabf0_0 .alias "a", 0 0, v0xeab620_0; +v0xeaac70_0 .net "aandb", 0 0, L_0xeecf20; 1 drivers +v0xeaad10_0 .net "aorb", 0 0, L_0xeeed40; 1 drivers +v0xeaad90_0 .alias "b", 0 0, v0xeab6a0_0; +v0xeaae60_0 .alias "carryin", 0 0, v0xeab720_0; +v0xeaaf30_0 .alias "carryout", 0 0, v0xeab820_0; +v0xeaafd0_0 .net "outputIfCarryin", 0 0, L_0xeeeea0; 1 drivers +v0xeab0c0_0 .net "outputIf_Carryin", 0 0, L_0xeeeff0; 1 drivers +v0xeab160_0 .net "s", 0 0, L_0xeecdd0; 1 drivers +v0xeab260_0 .alias "sum", 0 0, v0xeabb30_0; +S_0xeaa2e0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xea9670; + .timescale 0 0; +L_0xeef320 .functor XOR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xeef380 .functor XOR 1, L_0xeef320, L_0xeef680, C4<0>, C4<0>; +L_0xeef4a0 .functor NOT 1, L_0xeeeb80, C4<0>, C4<0>, C4<0>; +L_0xeece90 .functor AND 1, L_0xeef4a0, L_0xeef520, C4<1>, C4<1>; +L_0xeee540 .functor NOT 1, L_0xeef320, C4<0>, C4<0>, C4<0>; +L_0xeef790 .functor AND 1, L_0xeee540, L_0xeef680, C4<1>, C4<1>; +L_0xeeec70 .functor OR 1, L_0xeece90, L_0xeef790, C4<0>, C4<0>; +v0xeaa3d0_0 .alias "a", 0 0, v0xeab620_0; +v0xeaa470_0 .net "axorb", 0 0, L_0xeef320; 1 drivers +v0xeaa4f0_0 .alias "b", 0 0, v0xeab6a0_0; +v0xeaa5a0_0 .alias "borrowin", 0 0, v0xeab720_0; +v0xeaa680_0 .alias "borrowout", 0 0, v0xeab980_0; +v0xeaa700_0 .alias "diff", 0 0, v0xeabfa0_0; +v0xeaa780_0 .net "nota", 0 0, L_0xeef4a0; 1 drivers +v0xeaa800_0 .net "notaandb", 0 0, L_0xeece90; 1 drivers +v0xeaa8a0_0 .net "notaxorb", 0 0, L_0xeee540; 1 drivers +v0xeaa940_0 .net "notaxorbandborrowin", 0 0, L_0xeef790; 1 drivers +S_0xea9bc0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xea9670; + .timescale 0 0; +L_0xeefae0 .functor XOR 1, L_0xeeeb80, L_0xeef520, C4<0>, C4<0>; +L_0xeefb40 .functor XOR 1, L_0xeefae0, L_0xeef680, C4<0>, C4<0>; +L_0xeefc40 .functor NOT 1, L_0xeeeb80, C4<0>, C4<0>, C4<0>; +L_0xeefcc0 .functor AND 1, L_0xeefc40, L_0xeef520, C4<1>, C4<1>; +L_0xeefd70 .functor NOT 1, L_0xeefae0, C4<0>, C4<0>, C4<0>; +L_0xeefdd0 .functor AND 1, L_0xeefd70, L_0xeef680, C4<1>, C4<1>; +L_0xeefec0 .functor OR 1, L_0xeefcc0, L_0xeefdd0, C4<0>, C4<0>; +v0xea9cb0_0 .alias "a", 0 0, v0xeab620_0; +v0xea9d30_0 .net "axorb", 0 0, L_0xeefae0; 1 drivers +v0xea9dd0_0 .alias "b", 0 0, v0xeab6a0_0; +v0xea9e70_0 .alias "borrowin", 0 0, v0xeab720_0; +v0xea9f20_0 .alias "borrowout", 0 0, v0xeab900_0; +v0xea9fc0_0 .alias "diff", 0 0, v0xeac020_0; +v0xeaa060_0 .net "nota", 0 0, L_0xeefc40; 1 drivers +v0xeaa100_0 .net "notaandb", 0 0, L_0xeefcc0; 1 drivers +v0xeaa1a0_0 .net "notaxorb", 0 0, L_0xeefd70; 1 drivers +v0xeaa240_0 .net "notaxorbandborrowin", 0 0, L_0xeefdd0; 1 drivers +S_0xea9950 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xea9670; + .timescale 0 0; +v0xea9a40_0 .alias "address", 2 0, v0xed5210_0; +v0xea9ac0_0 .alias "inputs", 7 0, v0xeabab0_0; +v0xea9b40_0 .alias "out", 0 0, v0xeabc60_0; +L_0xef0a00 .part/v L_0xef02f0, v0xed5c50_0, 1; +S_0xea9760 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xea9670; + .timescale 0 0; +v0xea9430_0 .alias "address", 2 0, v0xed5210_0; +v0xea9850_0 .alias "inputs", 7 0, v0xeaba00_0; +v0xea98d0_0 .alias "out", 0 0, v0xeab7a0_0; +L_0xef0af0 .part/v L_0xeedf50, v0xed5c50_0, 1; +S_0xea6a00 .scope module, "a12" "ALU1bit" 5 44, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xef21f0/d .functor XOR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xef21f0 .delay (30,30,30) L_0xef21f0/d; +L_0xef2800/d .functor AND 1, L_0xef13f0, L_0xef1d30, C4<1>, C4<1>; +L_0xef2800 .delay (30,30,30) L_0xef2800/d; +L_0xef28c0/d .functor NAND 1, L_0xef13f0, L_0xef1d30, C4<1>, C4<1>; +L_0xef28c0 .delay (20,20,20) L_0xef28c0/d; +L_0xef2980/d .functor NOR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xef2980 .delay (20,20,20) L_0xef2980/d; +L_0xef2a40/d .functor OR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xef2a40 .delay (30,30,30) L_0xef2a40/d; +v0xea8690_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xea8750_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xea87f0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xea8890_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xea8910_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xea89b0_0 .net "a", 0 0, L_0xef13f0; 1 drivers +v0xea8a30_0 .net "b", 0 0, L_0xef1d30; 1 drivers +v0xea8ab0_0 .net "cin", 0 0, L_0xef1e90; 1 drivers +v0xea8b30_0 .net "cout", 0 0, L_0xef32f0; 1 drivers +v0xea8bb0_0 .net "cout_ADD", 0 0, L_0xef1910; 1 drivers +v0xea8c90_0 .net "cout_SLT", 0 0, L_0xef26b0; 1 drivers +v0xea8d10_0 .net "cout_SUB", 0 0, L_0xef1030; 1 drivers +v0xea8d90_0 .net "muxCout", 7 0, L_0xef06c0; 1 drivers +v0xea8e40_0 .net "muxRes", 7 0, L_0xef2ae0; 1 drivers +v0xea8f70_0 .alias "op", 2 0, v0xed5210_0; +v0xea8ff0_0 .net "out", 0 0, L_0xef3200; 1 drivers +v0xea8ec0_0 .net "res_ADD", 0 0, L_0xeef720; 1 drivers +v0xea9160_0 .net "res_AND", 0 0, L_0xef2800; 1 drivers +v0xea9070_0 .net "res_NAND", 0 0, L_0xef28c0; 1 drivers +v0xea9280_0 .net "res_NOR", 0 0, L_0xef2980; 1 drivers +v0xea91e0_0 .net "res_OR", 0 0, L_0xef2a40; 1 drivers +v0xea93b0_0 .net "res_SLT", 0 0, L_0xef2310; 1 drivers +v0xea9330_0 .net "res_SUB", 0 0, L_0xef1b90; 1 drivers +v0xea9520_0 .net "res_XOR", 0 0, L_0xef21f0; 1 drivers +LS_0xef2ae0_0_0 .concat [ 1 1 1 1], L_0xeef720, L_0xef1b90, L_0xef21f0, L_0xef2310; +LS_0xef2ae0_0_4 .concat [ 1 1 1 1], L_0xef2800, L_0xef28c0, L_0xef2980, L_0xef2a40; +L_0xef2ae0 .concat [ 4 4 0 0], LS_0xef2ae0_0_0, LS_0xef2ae0_0_4; +LS_0xef06c0_0_0 .concat [ 1 1 1 1], L_0xef1910, L_0xef1030, C4<0>, L_0xef26b0; +LS_0xef06c0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xef06c0 .concat [ 4 4 0 0], LS_0xef06c0_0_0, LS_0xef06c0_0_4; +S_0xea7dd0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xea6a00; + .timescale 0 0; +L_0xeef5c0/d .functor XOR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xeef5c0 .delay (30,30,30) L_0xeef5c0/d; +L_0xeef720/d .functor XOR 1, L_0xeef5c0, L_0xef1e90, C4<0>, C4<0>; +L_0xeef720 .delay (30,30,30) L_0xeef720/d; +L_0xef1100/d .functor AND 1, L_0xef13f0, L_0xef1d30, C4<1>, C4<1>; +L_0xef1100 .delay (30,30,30) L_0xef1100/d; +L_0xef15b0/d .functor OR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xef15b0 .delay (30,30,30) L_0xef15b0/d; +L_0xef1610/d .functor NOT 1, L_0xef1e90, C4<0>, C4<0>, C4<0>; +L_0xef1610 .delay (10,10,10) L_0xef1610/d; +L_0xef16b0/d .functor AND 1, L_0xef1100, L_0xef1610, C4<1>, C4<1>; +L_0xef16b0 .delay (30,30,30) L_0xef16b0/d; +L_0xef1800/d .functor AND 1, L_0xef15b0, L_0xef1e90, C4<1>, C4<1>; +L_0xef1800 .delay (30,30,30) L_0xef1800/d; +L_0xef1910/d .functor OR 1, L_0xef16b0, L_0xef1800, C4<0>, C4<0>; +L_0xef1910 .delay (30,30,30) L_0xef1910/d; +v0xea7ec0_0 .net "_carryin", 0 0, L_0xef1610; 1 drivers +v0xea7f80_0 .alias "a", 0 0, v0xea89b0_0; +v0xea8000_0 .net "aandb", 0 0, L_0xef1100; 1 drivers +v0xea80a0_0 .net "aorb", 0 0, L_0xef15b0; 1 drivers +v0xea8120_0 .alias "b", 0 0, v0xea8a30_0; +v0xea81f0_0 .alias "carryin", 0 0, v0xea8ab0_0; +v0xea82c0_0 .alias "carryout", 0 0, v0xea8bb0_0; +v0xea8360_0 .net "outputIfCarryin", 0 0, L_0xef16b0; 1 drivers +v0xea8450_0 .net "outputIf_Carryin", 0 0, L_0xef1800; 1 drivers +v0xea84f0_0 .net "s", 0 0, L_0xeef5c0; 1 drivers +v0xea85f0_0 .alias "sum", 0 0, v0xea8ec0_0; +S_0xea7670 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xea6a00; + .timescale 0 0; +L_0xef1b30 .functor XOR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xef1b90 .functor XOR 1, L_0xef1b30, L_0xef1e90, C4<0>, C4<0>; +L_0xef1cb0 .functor NOT 1, L_0xef13f0, C4<0>, C4<0>, C4<0>; +L_0xef0c80 .functor AND 1, L_0xef1cb0, L_0xef1d30, C4<1>, C4<1>; +L_0xef0ce0 .functor NOT 1, L_0xef1b30, C4<0>, C4<0>, C4<0>; +L_0xef0d40 .functor AND 1, L_0xef0ce0, L_0xef1e90, C4<1>, C4<1>; +L_0xef1030 .functor OR 1, L_0xef0c80, L_0xef0d40, C4<0>, C4<0>; +v0xea7760_0 .alias "a", 0 0, v0xea89b0_0; +v0xea7800_0 .net "axorb", 0 0, L_0xef1b30; 1 drivers +v0xea7880_0 .alias "b", 0 0, v0xea8a30_0; +v0xea7930_0 .alias "borrowin", 0 0, v0xea8ab0_0; +v0xea7a10_0 .alias "borrowout", 0 0, v0xea8d10_0; +v0xea7a90_0 .alias "diff", 0 0, v0xea9330_0; +v0xea7b10_0 .net "nota", 0 0, L_0xef1cb0; 1 drivers +v0xea7b90_0 .net "notaandb", 0 0, L_0xef0c80; 1 drivers +v0xea7c30_0 .net "notaxorb", 0 0, L_0xef0ce0; 1 drivers +v0xea7cd0_0 .net "notaxorbandborrowin", 0 0, L_0xef0d40; 1 drivers +S_0xea6f50 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xea6a00; + .timescale 0 0; +L_0xef2290 .functor XOR 1, L_0xef13f0, L_0xef1d30, C4<0>, C4<0>; +L_0xef2310 .functor XOR 1, L_0xef2290, L_0xef1e90, C4<0>, C4<0>; +L_0xef2430 .functor NOT 1, L_0xef13f0, C4<0>, C4<0>, C4<0>; +L_0xef24b0 .functor AND 1, L_0xef2430, L_0xef1d30, C4<1>, C4<1>; +L_0xef2560 .functor NOT 1, L_0xef2290, C4<0>, C4<0>, C4<0>; +L_0xef25c0 .functor AND 1, L_0xef2560, L_0xef1e90, C4<1>, C4<1>; +L_0xef26b0 .functor OR 1, L_0xef24b0, L_0xef25c0, C4<0>, C4<0>; +v0xea7040_0 .alias "a", 0 0, v0xea89b0_0; +v0xea70c0_0 .net "axorb", 0 0, L_0xef2290; 1 drivers +v0xea7160_0 .alias "b", 0 0, v0xea8a30_0; +v0xea7200_0 .alias "borrowin", 0 0, v0xea8ab0_0; +v0xea72b0_0 .alias "borrowout", 0 0, v0xea8c90_0; +v0xea7350_0 .alias "diff", 0 0, v0xea93b0_0; +v0xea73f0_0 .net "nota", 0 0, L_0xef2430; 1 drivers +v0xea7490_0 .net "notaandb", 0 0, L_0xef24b0; 1 drivers +v0xea7530_0 .net "notaxorb", 0 0, L_0xef2560; 1 drivers +v0xea75d0_0 .net "notaxorbandborrowin", 0 0, L_0xef25c0; 1 drivers +S_0xea6ce0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xea6a00; + .timescale 0 0; +v0xea6dd0_0 .alias "address", 2 0, v0xed5210_0; +v0xea6e50_0 .alias "inputs", 7 0, v0xea8e40_0; +v0xea6ed0_0 .alias "out", 0 0, v0xea8ff0_0; +L_0xef3200 .part/v L_0xef2ae0, v0xed5c50_0, 1; +S_0xea6af0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xea6a00; + .timescale 0 0; +v0xea67c0_0 .alias "address", 2 0, v0xed5210_0; +v0xea6be0_0 .alias "inputs", 7 0, v0xea8d90_0; +v0xea6c60_0 .alias "out", 0 0, v0xea8b30_0; +L_0xef32f0 .part/v L_0xef06c0, v0xed5c50_0, 1; +S_0xea3d90 .scope module, "a13" "ALU1bit" 5 45, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xef49b0/d .functor XOR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef49b0 .delay (30,30,30) L_0xef49b0/d; +L_0xef4fc0/d .functor AND 1, L_0xef3bb0, L_0xef3c50, C4<1>, C4<1>; +L_0xef4fc0 .delay (30,30,30) L_0xef4fc0/d; +L_0xef5080/d .functor NAND 1, L_0xef3bb0, L_0xef3c50, C4<1>, C4<1>; +L_0xef5080 .delay (20,20,20) L_0xef5080/d; +L_0xef5140/d .functor NOR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef5140 .delay (20,20,20) L_0xef5140/d; +L_0xef5200/d .functor OR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef5200 .delay (30,30,30) L_0xef5200/d; +v0xea5a20_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xea5ae0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xea5b80_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xea5c20_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xea5ca0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xea5d40_0 .net "a", 0 0, L_0xef3bb0; 1 drivers +v0xea5dc0_0 .net "b", 0 0, L_0xef3c50; 1 drivers +v0xea5e40_0 .net "cin", 0 0, L_0xef44f0; 1 drivers +v0xea5ec0_0 .net "cout", 0 0, L_0xef5aa0; 1 drivers +v0xea5f40_0 .net "cout_ADD", 0 0, L_0xef40d0; 1 drivers +v0xea6020_0 .net "cout_SLT", 0 0, L_0xef4e70; 1 drivers +v0xea60a0_0 .net "cout_SUB", 0 0, L_0xef3580; 1 drivers +v0xea6120_0 .net "muxCout", 7 0, L_0xef2f30; 1 drivers +v0xea61d0_0 .net "muxRes", 7 0, L_0xef52a0; 1 drivers +v0xea6300_0 .alias "op", 2 0, v0xed5210_0; +v0xea6380_0 .net "out", 0 0, L_0xef59b0; 1 drivers +v0xea6250_0 .net "res_ADD", 0 0, L_0xef3520; 1 drivers +v0xea64f0_0 .net "res_AND", 0 0, L_0xef4fc0; 1 drivers +v0xea6400_0 .net "res_NAND", 0 0, L_0xef5080; 1 drivers +v0xea6610_0 .net "res_NOR", 0 0, L_0xef5140; 1 drivers +v0xea6570_0 .net "res_OR", 0 0, L_0xef5200; 1 drivers +v0xea6740_0 .net "res_SLT", 0 0, L_0xef4ad0; 1 drivers +v0xea66c0_0 .net "res_SUB", 0 0, L_0xef4350; 1 drivers +v0xea68b0_0 .net "res_XOR", 0 0, L_0xef49b0; 1 drivers +LS_0xef52a0_0_0 .concat [ 1 1 1 1], L_0xef3520, L_0xef4350, L_0xef49b0, L_0xef4ad0; +LS_0xef52a0_0_4 .concat [ 1 1 1 1], L_0xef4fc0, L_0xef5080, L_0xef5140, L_0xef5200; +L_0xef52a0 .concat [ 4 4 0 0], LS_0xef52a0_0_0, LS_0xef52a0_0_4; +LS_0xef2f30_0_0 .concat [ 1 1 1 1], L_0xef40d0, L_0xef3580, C4<0>, L_0xef4e70; +LS_0xef2f30_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xef2f30 .concat [ 4 4 0 0], LS_0xef2f30_0_0, LS_0xef2f30_0_4; +S_0xea5160 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xea3d90; + .timescale 0 0; +L_0xef1dd0/d .functor XOR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef1dd0 .delay (30,30,30) L_0xef1dd0/d; +L_0xef3520/d .functor XOR 1, L_0xef1dd0, L_0xef44f0, C4<0>, C4<0>; +L_0xef3520 .delay (30,30,30) L_0xef3520/d; +L_0xef3670/d .functor AND 1, L_0xef3bb0, L_0xef3c50, C4<1>, C4<1>; +L_0xef3670 .delay (30,30,30) L_0xef3670/d; +L_0xef3d30/d .functor OR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef3d30 .delay (30,30,30) L_0xef3d30/d; +L_0xef3dd0/d .functor NOT 1, L_0xef44f0, C4<0>, C4<0>, C4<0>; +L_0xef3dd0 .delay (10,10,10) L_0xef3dd0/d; +L_0xef3e70/d .functor AND 1, L_0xef3670, L_0xef3dd0, C4<1>, C4<1>; +L_0xef3e70 .delay (30,30,30) L_0xef3e70/d; +L_0xef3fc0/d .functor AND 1, L_0xef3d30, L_0xef44f0, C4<1>, C4<1>; +L_0xef3fc0 .delay (30,30,30) L_0xef3fc0/d; +L_0xef40d0/d .functor OR 1, L_0xef3e70, L_0xef3fc0, C4<0>, C4<0>; +L_0xef40d0 .delay (30,30,30) L_0xef40d0/d; +v0xea5250_0 .net "_carryin", 0 0, L_0xef3dd0; 1 drivers +v0xea5310_0 .alias "a", 0 0, v0xea5d40_0; +v0xea5390_0 .net "aandb", 0 0, L_0xef3670; 1 drivers +v0xea5430_0 .net "aorb", 0 0, L_0xef3d30; 1 drivers +v0xea54b0_0 .alias "b", 0 0, v0xea5dc0_0; +v0xea5580_0 .alias "carryin", 0 0, v0xea5e40_0; +v0xea5650_0 .alias "carryout", 0 0, v0xea5f40_0; +v0xea56f0_0 .net "outputIfCarryin", 0 0, L_0xef3e70; 1 drivers +v0xea57e0_0 .net "outputIf_Carryin", 0 0, L_0xef3fc0; 1 drivers +v0xea5880_0 .net "s", 0 0, L_0xef1dd0; 1 drivers +v0xea5980_0 .alias "sum", 0 0, v0xea6250_0; +S_0xea4a00 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xea3d90; + .timescale 0 0; +L_0xef42f0 .functor XOR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef4350 .functor XOR 1, L_0xef42f0, L_0xef44f0, C4<0>, C4<0>; +L_0xef4470 .functor NOT 1, L_0xef3bb0, C4<0>, C4<0>, C4<0>; +L_0xef1490 .functor AND 1, L_0xef4470, L_0xef3c50, C4<1>, C4<1>; +L_0xef14f0 .functor NOT 1, L_0xef42f0, C4<0>, C4<0>, C4<0>; +L_0xef1550 .functor AND 1, L_0xef14f0, L_0xef44f0, C4<1>, C4<1>; +L_0xef3580 .functor OR 1, L_0xef1490, L_0xef1550, C4<0>, C4<0>; +v0xea4af0_0 .alias "a", 0 0, v0xea5d40_0; +v0xea4b90_0 .net "axorb", 0 0, L_0xef42f0; 1 drivers +v0xea4c10_0 .alias "b", 0 0, v0xea5dc0_0; +v0xea4cc0_0 .alias "borrowin", 0 0, v0xea5e40_0; +v0xea4da0_0 .alias "borrowout", 0 0, v0xea60a0_0; +v0xea4e20_0 .alias "diff", 0 0, v0xea66c0_0; +v0xea4ea0_0 .net "nota", 0 0, L_0xef4470; 1 drivers +v0xea4f20_0 .net "notaandb", 0 0, L_0xef1490; 1 drivers +v0xea4fc0_0 .net "notaxorb", 0 0, L_0xef14f0; 1 drivers +v0xea5060_0 .net "notaxorbandborrowin", 0 0, L_0xef1550; 1 drivers +S_0xea42e0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xea3d90; + .timescale 0 0; +L_0xef4a50 .functor XOR 1, L_0xef3bb0, L_0xef3c50, C4<0>, C4<0>; +L_0xef4ad0 .functor XOR 1, L_0xef4a50, L_0xef44f0, C4<0>, C4<0>; +L_0xef4bf0 .functor NOT 1, L_0xef3bb0, C4<0>, C4<0>, C4<0>; +L_0xef4c70 .functor AND 1, L_0xef4bf0, L_0xef3c50, C4<1>, C4<1>; +L_0xef4d20 .functor NOT 1, L_0xef4a50, C4<0>, C4<0>, C4<0>; +L_0xef4d80 .functor AND 1, L_0xef4d20, L_0xef44f0, C4<1>, C4<1>; +L_0xef4e70 .functor OR 1, L_0xef4c70, L_0xef4d80, C4<0>, C4<0>; +v0xea43d0_0 .alias "a", 0 0, v0xea5d40_0; +v0xea4450_0 .net "axorb", 0 0, L_0xef4a50; 1 drivers +v0xea44f0_0 .alias "b", 0 0, v0xea5dc0_0; +v0xea4590_0 .alias "borrowin", 0 0, v0xea5e40_0; +v0xea4640_0 .alias "borrowout", 0 0, v0xea6020_0; +v0xea46e0_0 .alias "diff", 0 0, v0xea6740_0; +v0xea4780_0 .net "nota", 0 0, L_0xef4bf0; 1 drivers +v0xea4820_0 .net "notaandb", 0 0, L_0xef4c70; 1 drivers +v0xea48c0_0 .net "notaxorb", 0 0, L_0xef4d20; 1 drivers +v0xea4960_0 .net "notaxorbandborrowin", 0 0, L_0xef4d80; 1 drivers +S_0xea4070 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xea3d90; + .timescale 0 0; +v0xea4160_0 .alias "address", 2 0, v0xed5210_0; +v0xea41e0_0 .alias "inputs", 7 0, v0xea61d0_0; +v0xea4260_0 .alias "out", 0 0, v0xea6380_0; +L_0xef59b0 .part/v L_0xef52a0, v0xed5c50_0, 1; +S_0xea3e80 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xea3d90; + .timescale 0 0; +v0xea3b50_0 .alias "address", 2 0, v0xed5210_0; +v0xea3f70_0 .alias "inputs", 7 0, v0xea6120_0; +v0xea3ff0_0 .alias "out", 0 0, v0xea5ec0_0; +L_0xef5aa0 .part/v L_0xef2f30, v0xed5c50_0, 1; +S_0xea1120 .scope module, "a14" "ALU1bit" 5 46, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xef7210/d .functor XOR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef7210 .delay (30,30,30) L_0xef7210/d; +L_0xef77e0/d .functor AND 1, L_0xef6440, L_0xef6cf0, C4<1>, C4<1>; +L_0xef77e0 .delay (30,30,30) L_0xef77e0/d; +L_0xef78a0/d .functor NAND 1, L_0xef6440, L_0xef6cf0, C4<1>, C4<1>; +L_0xef78a0 .delay (20,20,20) L_0xef78a0/d; +L_0xef7960/d .functor NOR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef7960 .delay (20,20,20) L_0xef7960/d; +L_0xef7a20/d .functor OR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef7a20 .delay (30,30,30) L_0xef7a20/d; +v0xea2db0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xea2e70_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xea2f10_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xea2fb0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xea3030_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xea30d0_0 .net "a", 0 0, L_0xef6440; 1 drivers +v0xea3150_0 .net "b", 0 0, L_0xef6cf0; 1 drivers +v0xea31d0_0 .net "cin", 0 0, L_0xee2ed0; 1 drivers +v0xea3250_0 .net "cout", 0 0, L_0xef82d0; 1 drivers +v0xea32d0_0 .net "cout_ADD", 0 0, L_0xef68d0; 1 drivers +v0xea33b0_0 .net "cout_SLT", 0 0, L_0xef7690; 1 drivers +v0xea3430_0 .net "cout_SUB", 0 0, L_0xef5d60; 1 drivers +v0xea34b0_0 .net "muxCout", 7 0, L_0xef5670; 1 drivers +v0xea3560_0 .net "muxRes", 7 0, L_0xef7ac0; 1 drivers +v0xea3690_0 .alias "op", 2 0, v0xed5210_0; +v0xea3710_0 .net "out", 0 0, L_0xef81e0; 1 drivers +v0xea35e0_0 .net "res_ADD", 0 0, L_0xef5d00; 1 drivers +v0xea3880_0 .net "res_AND", 0 0, L_0xef77e0; 1 drivers +v0xea3790_0 .net "res_NAND", 0 0, L_0xef78a0; 1 drivers +v0xea39a0_0 .net "res_NOR", 0 0, L_0xef7960; 1 drivers +v0xea3900_0 .net "res_OR", 0 0, L_0xef7a20; 1 drivers +v0xea3ad0_0 .net "res_SLT", 0 0, L_0xef7310; 1 drivers +v0xea3a50_0 .net "res_SUB", 0 0, L_0xef6b50; 1 drivers +v0xea3c40_0 .net "res_XOR", 0 0, L_0xef7210; 1 drivers +LS_0xef7ac0_0_0 .concat [ 1 1 1 1], L_0xef5d00, L_0xef6b50, L_0xef7210, L_0xef7310; +LS_0xef7ac0_0_4 .concat [ 1 1 1 1], L_0xef77e0, L_0xef78a0, L_0xef7960, L_0xef7a20; +L_0xef7ac0 .concat [ 4 4 0 0], LS_0xef7ac0_0_0, LS_0xef7ac0_0_4; +LS_0xef5670_0_0 .concat [ 1 1 1 1], L_0xef68d0, L_0xef5d60, C4<0>, L_0xef7690; +LS_0xef5670_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xef5670 .concat [ 4 4 0 0], LS_0xef5670_0_0, LS_0xef5670_0_4; +S_0xea24f0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xea1120; + .timescale 0 0; +L_0xef4590/d .functor XOR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef4590 .delay (30,30,30) L_0xef4590/d; +L_0xef5d00/d .functor XOR 1, L_0xef4590, L_0xee2ed0, C4<0>, C4<0>; +L_0xef5d00 .delay (30,30,30) L_0xef5d00/d; +L_0xef6030/d .functor AND 1, L_0xef6440, L_0xef6cf0, C4<1>, C4<1>; +L_0xef6030 .delay (30,30,30) L_0xef6030/d; +L_0xef60f0/d .functor OR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef60f0 .delay (30,30,30) L_0xef60f0/d; +L_0xef61b0/d .functor NOT 1, L_0xee2ed0, C4<0>, C4<0>, C4<0>; +L_0xef61b0 .delay (10,10,10) L_0xef61b0/d; +L_0xef6690/d .functor AND 1, L_0xef6030, L_0xef61b0, C4<1>, C4<1>; +L_0xef6690 .delay (30,30,30) L_0xef6690/d; +L_0xef67c0/d .functor AND 1, L_0xef60f0, L_0xee2ed0, C4<1>, C4<1>; +L_0xef67c0 .delay (30,30,30) L_0xef67c0/d; +L_0xef68d0/d .functor OR 1, L_0xef6690, L_0xef67c0, C4<0>, C4<0>; +L_0xef68d0 .delay (30,30,30) L_0xef68d0/d; +v0xea25e0_0 .net "_carryin", 0 0, L_0xef61b0; 1 drivers +v0xea26a0_0 .alias "a", 0 0, v0xea30d0_0; +v0xea2720_0 .net "aandb", 0 0, L_0xef6030; 1 drivers +v0xea27c0_0 .net "aorb", 0 0, L_0xef60f0; 1 drivers +v0xea2840_0 .alias "b", 0 0, v0xea3150_0; +v0xea2910_0 .alias "carryin", 0 0, v0xea31d0_0; +v0xea29e0_0 .alias "carryout", 0 0, v0xea32d0_0; +v0xea2a80_0 .net "outputIfCarryin", 0 0, L_0xef6690; 1 drivers +v0xea2b70_0 .net "outputIf_Carryin", 0 0, L_0xef67c0; 1 drivers +v0xea2c10_0 .net "s", 0 0, L_0xef4590; 1 drivers +v0xea2d10_0 .alias "sum", 0 0, v0xea35e0_0; +S_0xea1d90 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xea1120; + .timescale 0 0; +L_0xef6af0 .functor XOR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef6b50 .functor XOR 1, L_0xef6af0, L_0xee2ed0, C4<0>, C4<0>; +L_0xef6c70 .functor NOT 1, L_0xef6440, C4<0>, C4<0>, C4<0>; +L_0xef4650 .functor AND 1, L_0xef6c70, L_0xef6cf0, C4<1>, C4<1>; +L_0xef5c30 .functor NOT 1, L_0xef6af0, C4<0>, C4<0>, C4<0>; +L_0xef6f60 .functor AND 1, L_0xef5c30, L_0xee2ed0, C4<1>, C4<1>; +L_0xef5d60 .functor OR 1, L_0xef4650, L_0xef6f60, C4<0>, C4<0>; +v0xea1e80_0 .alias "a", 0 0, v0xea30d0_0; +v0xea1f20_0 .net "axorb", 0 0, L_0xef6af0; 1 drivers +v0xea1fa0_0 .alias "b", 0 0, v0xea3150_0; +v0xea2050_0 .alias "borrowin", 0 0, v0xea31d0_0; +v0xea2130_0 .alias "borrowout", 0 0, v0xea3430_0; +v0xea21b0_0 .alias "diff", 0 0, v0xea3a50_0; +v0xea2230_0 .net "nota", 0 0, L_0xef6c70; 1 drivers +v0xea22b0_0 .net "notaandb", 0 0, L_0xef4650; 1 drivers +v0xea2350_0 .net "notaxorb", 0 0, L_0xef5c30; 1 drivers +v0xea23f0_0 .net "notaxorbandborrowin", 0 0, L_0xef6f60; 1 drivers +S_0xea1670 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xea1120; + .timescale 0 0; +L_0xef72b0 .functor XOR 1, L_0xef6440, L_0xef6cf0, C4<0>, C4<0>; +L_0xef7310 .functor XOR 1, L_0xef72b0, L_0xee2ed0, C4<0>, C4<0>; +L_0xef7410 .functor NOT 1, L_0xef6440, C4<0>, C4<0>, C4<0>; +L_0xef7490 .functor AND 1, L_0xef7410, L_0xef6cf0, C4<1>, C4<1>; +L_0xef7540 .functor NOT 1, L_0xef72b0, C4<0>, C4<0>, C4<0>; +L_0xef75a0 .functor AND 1, L_0xef7540, L_0xee2ed0, C4<1>, C4<1>; +L_0xef7690 .functor OR 1, L_0xef7490, L_0xef75a0, C4<0>, C4<0>; +v0xea1760_0 .alias "a", 0 0, v0xea30d0_0; +v0xea17e0_0 .net "axorb", 0 0, L_0xef72b0; 1 drivers +v0xea1880_0 .alias "b", 0 0, v0xea3150_0; +v0xea1920_0 .alias "borrowin", 0 0, v0xea31d0_0; +v0xea19d0_0 .alias "borrowout", 0 0, v0xea33b0_0; +v0xea1a70_0 .alias "diff", 0 0, v0xea3ad0_0; +v0xea1b10_0 .net "nota", 0 0, L_0xef7410; 1 drivers +v0xea1bb0_0 .net "notaandb", 0 0, L_0xef7490; 1 drivers +v0xea1c50_0 .net "notaxorb", 0 0, L_0xef7540; 1 drivers +v0xea1cf0_0 .net "notaxorbandborrowin", 0 0, L_0xef75a0; 1 drivers +S_0xea1400 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xea1120; + .timescale 0 0; +v0xea14f0_0 .alias "address", 2 0, v0xed5210_0; +v0xea1570_0 .alias "inputs", 7 0, v0xea3560_0; +v0xea15f0_0 .alias "out", 0 0, v0xea3710_0; +L_0xef81e0 .part/v L_0xef7ac0, v0xed5c50_0, 1; +S_0xea1210 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xea1120; + .timescale 0 0; +v0xea0ee0_0 .alias "address", 2 0, v0xed5210_0; +v0xea1300_0 .alias "inputs", 7 0, v0xea34b0_0; +v0xea1380_0 .alias "out", 0 0, v0xea3250_0; +L_0xef82d0 .part/v L_0xef5670, v0xed5c50_0, 1; +S_0xe9e4b0 .scope module, "a15" "ALU1bit" 5 47, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xef9c00/d .functor XOR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xef9c00 .delay (30,30,30) L_0xef9c00/d; +L_0xefa1d0/d .functor AND 1, L_0xef9000, L_0xef90a0, C4<1>, C4<1>; +L_0xefa1d0 .delay (30,30,30) L_0xefa1d0/d; +L_0xefa290/d .functor NAND 1, L_0xef9000, L_0xef90a0, C4<1>, C4<1>; +L_0xefa290 .delay (20,20,20) L_0xefa290/d; +L_0xefa350/d .functor NOR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xefa350 .delay (20,20,20) L_0xefa350/d; +L_0xefa410/d .functor OR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xefa410 .delay (30,30,30) L_0xefa410/d; +v0xea0140_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xea0200_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xea02a0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xea0340_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xea03c0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xea0460_0 .net "a", 0 0, L_0xef9000; 1 drivers +v0xea04e0_0 .net "b", 0 0, L_0xef90a0; 1 drivers +v0xea0560_0 .net "cin", 0 0, L_0xef96e0; 1 drivers +v0xea05e0_0 .net "cout", 0 0, L_0xefacb0; 1 drivers +v0xea0660_0 .net "cout_ADD", 0 0, L_0xef92c0; 1 drivers +v0xea0740_0 .net "cout_SLT", 0 0, L_0xefa080; 1 drivers +v0xea07c0_0 .net "cout_SUB", 0 0, L_0xef64e0; 1 drivers +v0xea0840_0 .net "muxCout", 7 0, L_0xef7f10; 1 drivers +v0xea08f0_0 .net "muxRes", 7 0, L_0xefa4b0; 1 drivers +v0xea0a20_0 .alias "op", 2 0, v0xed5210_0; +v0xea0aa0_0 .net "out", 0 0, L_0xefabc0; 1 drivers +v0xea0970_0 .net "res_ADD", 0 0, L_0xee2f70; 1 drivers +v0xea0c10_0 .net "res_AND", 0 0, L_0xefa1d0; 1 drivers +v0xea0b20_0 .net "res_NAND", 0 0, L_0xefa290; 1 drivers +v0xea0d30_0 .net "res_NOR", 0 0, L_0xefa350; 1 drivers +v0xea0c90_0 .net "res_OR", 0 0, L_0xefa410; 1 drivers +v0xea0e60_0 .net "res_SLT", 0 0, L_0xef9d00; 1 drivers +v0xea0de0_0 .net "res_SUB", 0 0, L_0xef9540; 1 drivers +v0xea0fd0_0 .net "res_XOR", 0 0, L_0xef9c00; 1 drivers +LS_0xefa4b0_0_0 .concat [ 1 1 1 1], L_0xee2f70, L_0xef9540, L_0xef9c00, L_0xef9d00; +LS_0xefa4b0_0_4 .concat [ 1 1 1 1], L_0xefa1d0, L_0xefa290, L_0xefa350, L_0xefa410; +L_0xefa4b0 .concat [ 4 4 0 0], LS_0xefa4b0_0_0, LS_0xefa4b0_0_4; +LS_0xef7f10_0_0 .concat [ 1 1 1 1], L_0xef92c0, L_0xef64e0, C4<0>, L_0xefa080; +LS_0xef7f10_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xef7f10 .concat [ 4 4 0 0], LS_0xef7f10_0_0, LS_0xef7f10_0_4; +S_0xe9f880 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe9e4b0; + .timescale 0 0; +L_0xef6d90/d .functor XOR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xef6d90 .delay (30,30,30) L_0xef6d90/d; +L_0xee2f70/d .functor XOR 1, L_0xef6d90, L_0xef96e0, C4<0>, C4<0>; +L_0xee2f70 .delay (30,30,30) L_0xee2f70/d; +L_0xef6590/d .functor AND 1, L_0xef9000, L_0xef90a0, C4<1>, C4<1>; +L_0xef6590 .delay (30,30,30) L_0xef6590/d; +L_0xef6ee0/d .functor OR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xef6ee0 .delay (30,30,30) L_0xef6ee0/d; +L_0xef8540/d .functor NOT 1, L_0xef96e0, C4<0>, C4<0>, C4<0>; +L_0xef8540 .delay (10,10,10) L_0xef8540/d; +L_0xef85e0/d .functor AND 1, L_0xef6590, L_0xef8540, C4<1>, C4<1>; +L_0xef85e0 .delay (30,30,30) L_0xef85e0/d; +L_0xef91d0/d .functor AND 1, L_0xef6ee0, L_0xef96e0, C4<1>, C4<1>; +L_0xef91d0 .delay (30,30,30) L_0xef91d0/d; +L_0xef92c0/d .functor OR 1, L_0xef85e0, L_0xef91d0, C4<0>, C4<0>; +L_0xef92c0 .delay (30,30,30) L_0xef92c0/d; +v0xe9f970_0 .net "_carryin", 0 0, L_0xef8540; 1 drivers +v0xe9fa30_0 .alias "a", 0 0, v0xea0460_0; +v0xe9fab0_0 .net "aandb", 0 0, L_0xef6590; 1 drivers +v0xe9fb50_0 .net "aorb", 0 0, L_0xef6ee0; 1 drivers +v0xe9fbd0_0 .alias "b", 0 0, v0xea04e0_0; +v0xe9fca0_0 .alias "carryin", 0 0, v0xea0560_0; +v0xe9fd70_0 .alias "carryout", 0 0, v0xea0660_0; +v0xe9fe10_0 .net "outputIfCarryin", 0 0, L_0xef85e0; 1 drivers +v0xe9ff00_0 .net "outputIf_Carryin", 0 0, L_0xef91d0; 1 drivers +v0xe9ffa0_0 .net "s", 0 0, L_0xef6d90; 1 drivers +v0xea00a0_0 .alias "sum", 0 0, v0xea0970_0; +S_0xe9f120 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe9e4b0; + .timescale 0 0; +L_0xef94e0 .functor XOR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xef9540 .functor XOR 1, L_0xef94e0, L_0xef96e0, C4<0>, C4<0>; +L_0xef9660 .functor NOT 1, L_0xef9000, C4<0>, C4<0>, C4<0>; +L_0xef6e50 .functor AND 1, L_0xef9660, L_0xef90a0, C4<1>, C4<1>; +L_0xee3030 .functor NOT 1, L_0xef94e0, C4<0>, C4<0>, C4<0>; +L_0xef9950 .functor AND 1, L_0xee3030, L_0xef96e0, C4<1>, C4<1>; +L_0xef64e0 .functor OR 1, L_0xef6e50, L_0xef9950, C4<0>, C4<0>; +v0xe9f210_0 .alias "a", 0 0, v0xea0460_0; +v0xe9f2b0_0 .net "axorb", 0 0, L_0xef94e0; 1 drivers +v0xe9f330_0 .alias "b", 0 0, v0xea04e0_0; +v0xe9f3e0_0 .alias "borrowin", 0 0, v0xea0560_0; +v0xe9f4c0_0 .alias "borrowout", 0 0, v0xea07c0_0; +v0xe9f540_0 .alias "diff", 0 0, v0xea0de0_0; +v0xe9f5c0_0 .net "nota", 0 0, L_0xef9660; 1 drivers +v0xe9f640_0 .net "notaandb", 0 0, L_0xef6e50; 1 drivers +v0xe9f6e0_0 .net "notaxorb", 0 0, L_0xee3030; 1 drivers +v0xe9f780_0 .net "notaxorbandborrowin", 0 0, L_0xef9950; 1 drivers +S_0xe9ea00 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe9e4b0; + .timescale 0 0; +L_0xef9ca0 .functor XOR 1, L_0xef9000, L_0xef90a0, C4<0>, C4<0>; +L_0xef9d00 .functor XOR 1, L_0xef9ca0, L_0xef96e0, C4<0>, C4<0>; +L_0xef9e00 .functor NOT 1, L_0xef9000, C4<0>, C4<0>, C4<0>; +L_0xef9e80 .functor AND 1, L_0xef9e00, L_0xef90a0, C4<1>, C4<1>; +L_0xef9f30 .functor NOT 1, L_0xef9ca0, C4<0>, C4<0>, C4<0>; +L_0xef9f90 .functor AND 1, L_0xef9f30, L_0xef96e0, C4<1>, C4<1>; +L_0xefa080 .functor OR 1, L_0xef9e80, L_0xef9f90, C4<0>, C4<0>; +v0xe9eaf0_0 .alias "a", 0 0, v0xea0460_0; +v0xe9eb70_0 .net "axorb", 0 0, L_0xef9ca0; 1 drivers +v0xe9ec10_0 .alias "b", 0 0, v0xea04e0_0; +v0xe9ecb0_0 .alias "borrowin", 0 0, v0xea0560_0; +v0xe9ed60_0 .alias "borrowout", 0 0, v0xea0740_0; +v0xe9ee00_0 .alias "diff", 0 0, v0xea0e60_0; +v0xe9eea0_0 .net "nota", 0 0, L_0xef9e00; 1 drivers +v0xe9ef40_0 .net "notaandb", 0 0, L_0xef9e80; 1 drivers +v0xe9efe0_0 .net "notaxorb", 0 0, L_0xef9f30; 1 drivers +v0xe9f080_0 .net "notaxorbandborrowin", 0 0, L_0xef9f90; 1 drivers +S_0xe9e790 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe9e4b0; + .timescale 0 0; +v0xe9e880_0 .alias "address", 2 0, v0xed5210_0; +v0xe9e900_0 .alias "inputs", 7 0, v0xea08f0_0; +v0xe9e980_0 .alias "out", 0 0, v0xea0aa0_0; +L_0xefabc0 .part/v L_0xefa4b0, v0xed5c50_0, 1; +S_0xe9e5a0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe9e4b0; + .timescale 0 0; +v0xe9e270_0 .alias "address", 2 0, v0xed5210_0; +v0xe9e690_0 .alias "inputs", 7 0, v0xea0840_0; +v0xe9e710_0 .alias "out", 0 0, v0xea05e0_0; +L_0xefacb0 .part/v L_0xef7f10, v0xed5c50_0, 1; +S_0xe9b840 .scope module, "a16" "ALU1bit" 5 48, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xefbdd0/d .functor XOR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xefbdd0 .delay (30,30,30) L_0xefbdd0/d; +L_0xefc380/d .functor AND 1, L_0xefb290, L_0xefb900, C4<1>, C4<1>; +L_0xefc380 .delay (30,30,30) L_0xefc380/d; +L_0xefc420/d .functor NAND 1, L_0xefb290, L_0xefb900, C4<1>, C4<1>; +L_0xefc420 .delay (20,20,20) L_0xefc420/d; +L_0xefc4c0/d .functor NOR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xefc4c0 .delay (20,20,20) L_0xefc4c0/d; +L_0xefc560/d .functor OR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xefc560 .delay (30,30,30) L_0xefc560/d; +v0xe9d4d0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe9d590_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe9d630_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe9d6d0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe9d750_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe9d7f0_0 .net "a", 0 0, L_0xefb290; 1 drivers +v0xe9d870_0 .net "b", 0 0, L_0xefb900; 1 drivers +v0xe9d8f0_0 .net "cin", 0 0, L_0xefba60; 1 drivers +v0xe9d970_0 .net "cout", 0 0, L_0xefcdc0; 1 drivers +v0xe9d9f0_0 .net "cout_ADD", 0 0, L_0xef9780; 1 drivers +v0xe9dad0_0 .net "cout_SLT", 0 0, L_0xefc230; 1 drivers +v0xe9db50_0 .net "cout_SUB", 0 0, L_0xefb550; 1 drivers +v0xe9dbd0_0 .net "muxCout", 7 0, L_0xefa840; 1 drivers +v0xe9dc80_0 .net "muxRes", 7 0, L_0xefc600; 1 drivers +v0xe9ddb0_0 .alias "op", 2 0, v0xed5210_0; +v0xe9de30_0 .net "out", 0 0, L_0xefccd0; 1 drivers +v0xe9dd00_0 .net "res_ADD", 0 0, L_0xea0bb0; 1 drivers +v0xe9dfa0_0 .net "res_AND", 0 0, L_0xefc380; 1 drivers +v0xe9deb0_0 .net "res_NAND", 0 0, L_0xefc420; 1 drivers +v0xe9e0c0_0 .net "res_NOR", 0 0, L_0xefc4c0; 1 drivers +v0xe9e020_0 .net "res_OR", 0 0, L_0xefc560; 1 drivers +v0xe9e1f0_0 .net "res_SLT", 0 0, L_0xefbed0; 1 drivers +v0xe9e170_0 .net "res_SUB", 0 0, L_0xefb7a0; 1 drivers +v0xe9e360_0 .net "res_XOR", 0 0, L_0xefbdd0; 1 drivers +LS_0xefc600_0_0 .concat [ 1 1 1 1], L_0xea0bb0, L_0xefb7a0, L_0xefbdd0, L_0xefbed0; +LS_0xefc600_0_4 .concat [ 1 1 1 1], L_0xefc380, L_0xefc420, L_0xefc4c0, L_0xefc560; +L_0xefc600 .concat [ 4 4 0 0], LS_0xefc600_0_0, LS_0xefc600_0_4; +LS_0xefa840_0_0 .concat [ 1 1 1 1], L_0xef9780, L_0xefb550, C4<0>, L_0xefc230; +LS_0xefa840_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xefa840 .concat [ 4 4 0 0], LS_0xefa840_0_0, LS_0xefa840_0_4; +S_0xe9cc10 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe9b840; + .timescale 0 0; +L_0xe9f460/d .functor XOR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xe9f460 .delay (30,30,30) L_0xe9f460/d; +L_0xea0bb0/d .functor XOR 1, L_0xe9f460, L_0xefba60, C4<0>, C4<0>; +L_0xea0bb0 .delay (30,30,30) L_0xea0bb0/d; +L_0xea20d0/d .functor AND 1, L_0xefb290, L_0xefb900, C4<1>, C4<1>; +L_0xea20d0 .delay (30,30,30) L_0xea20d0/d; +L_0xea4d40/d .functor OR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xea4d40 .delay (30,30,30) L_0xea4d40/d; +L_0xea79b0/d .functor NOT 1, L_0xefba60, C4<0>, C4<0>, C4<0>; +L_0xea79b0 .delay (10,10,10) L_0xea79b0/d; +L_0xeaa620/d .functor AND 1, L_0xea20d0, L_0xea79b0, C4<1>, C4<1>; +L_0xeaa620 .delay (30,30,30) L_0xeaa620/d; +L_0xeaff00/d .functor AND 1, L_0xea4d40, L_0xefba60, C4<1>, C4<1>; +L_0xeaff00 .delay (30,30,30) L_0xeaff00/d; +L_0xef9780/d .functor OR 1, L_0xeaa620, L_0xeaff00, C4<0>, C4<0>; +L_0xef9780 .delay (30,30,30) L_0xef9780/d; +v0xe9cd00_0 .net "_carryin", 0 0, L_0xea79b0; 1 drivers +v0xe9cdc0_0 .alias "a", 0 0, v0xe9d7f0_0; +v0xe9ce40_0 .net "aandb", 0 0, L_0xea20d0; 1 drivers +v0xe9cee0_0 .net "aorb", 0 0, L_0xea4d40; 1 drivers +v0xe9cf60_0 .alias "b", 0 0, v0xe9d870_0; +v0xe9d030_0 .alias "carryin", 0 0, v0xe9d8f0_0; +v0xe9d100_0 .alias "carryout", 0 0, v0xe9d9f0_0; +v0xe9d1a0_0 .net "outputIfCarryin", 0 0, L_0xeaa620; 1 drivers +v0xe9d290_0 .net "outputIf_Carryin", 0 0, L_0xeaff00; 1 drivers +v0xe9d330_0 .net "s", 0 0, L_0xe9f460; 1 drivers +v0xe9d430_0 .alias "sum", 0 0, v0xe9dd00_0; +S_0xe9c4b0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe9b840; + .timescale 0 0; +L_0xefb740 .functor XOR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xefb7a0 .functor XOR 1, L_0xefb740, L_0xefba60, C4<0>, C4<0>; +L_0xefb8a0 .functor NOT 1, L_0xefb290, C4<0>, C4<0>, C4<0>; +L_0xef9840 .functor AND 1, L_0xefb8a0, L_0xefb900, C4<1>, C4<1>; +L_0xefb4f0 .functor NOT 1, L_0xefb740, C4<0>, C4<0>, C4<0>; +L_0xefbb70 .functor AND 1, L_0xefb4f0, L_0xefba60, C4<1>, C4<1>; +L_0xefb550 .functor OR 1, L_0xef9840, L_0xefbb70, C4<0>, C4<0>; +v0xe9c5a0_0 .alias "a", 0 0, v0xe9d7f0_0; +v0xe9c640_0 .net "axorb", 0 0, L_0xefb740; 1 drivers +v0xe9c6c0_0 .alias "b", 0 0, v0xe9d870_0; +v0xe9c770_0 .alias "borrowin", 0 0, v0xe9d8f0_0; +v0xe9c850_0 .alias "borrowout", 0 0, v0xe9db50_0; +v0xe9c8d0_0 .alias "diff", 0 0, v0xe9e170_0; +v0xe9c950_0 .net "nota", 0 0, L_0xefb8a0; 1 drivers +v0xe9c9d0_0 .net "notaandb", 0 0, L_0xef9840; 1 drivers +v0xe9ca70_0 .net "notaxorb", 0 0, L_0xefb4f0; 1 drivers +v0xe9cb10_0 .net "notaxorbandborrowin", 0 0, L_0xefbb70; 1 drivers +S_0xe9bd90 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe9b840; + .timescale 0 0; +L_0xefbe70 .functor XOR 1, L_0xefb290, L_0xefb900, C4<0>, C4<0>; +L_0xefbed0 .functor XOR 1, L_0xefbe70, L_0xefba60, C4<0>, C4<0>; +L_0xefbfd0 .functor NOT 1, L_0xefb290, C4<0>, C4<0>, C4<0>; +L_0xefc030 .functor AND 1, L_0xefbfd0, L_0xefb900, C4<1>, C4<1>; +L_0xefc0e0 .functor NOT 1, L_0xefbe70, C4<0>, C4<0>, C4<0>; +L_0xefc140 .functor AND 1, L_0xefc0e0, L_0xefba60, C4<1>, C4<1>; +L_0xefc230 .functor OR 1, L_0xefc030, L_0xefc140, C4<0>, C4<0>; +v0xe9be80_0 .alias "a", 0 0, v0xe9d7f0_0; +v0xe9bf00_0 .net "axorb", 0 0, L_0xefbe70; 1 drivers +v0xe9bfa0_0 .alias "b", 0 0, v0xe9d870_0; +v0xe9c040_0 .alias "borrowin", 0 0, v0xe9d8f0_0; +v0xe9c0f0_0 .alias "borrowout", 0 0, v0xe9dad0_0; +v0xe9c190_0 .alias "diff", 0 0, v0xe9e1f0_0; +v0xe9c230_0 .net "nota", 0 0, L_0xefbfd0; 1 drivers +v0xe9c2d0_0 .net "notaandb", 0 0, L_0xefc030; 1 drivers +v0xe9c370_0 .net "notaxorb", 0 0, L_0xefc0e0; 1 drivers +v0xe9c410_0 .net "notaxorbandborrowin", 0 0, L_0xefc140; 1 drivers +S_0xe9bb20 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe9b840; + .timescale 0 0; +v0xe9bc10_0 .alias "address", 2 0, v0xed5210_0; +v0xe9bc90_0 .alias "inputs", 7 0, v0xe9dc80_0; +v0xe9bd10_0 .alias "out", 0 0, v0xe9de30_0; +L_0xefccd0 .part/v L_0xefc600, v0xed5c50_0, 1; +S_0xe9b930 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe9b840; + .timescale 0 0; +v0xe9b600_0 .alias "address", 2 0, v0xed5210_0; +v0xe9ba20_0 .alias "inputs", 7 0, v0xe9dbd0_0; +v0xe9baa0_0 .alias "out", 0 0, v0xe9d970_0; +L_0xefcdc0 .part/v L_0xefa840, v0xed5c50_0, 1; +S_0xe98bd0 .scope module, "a17" "ALU1bit" 5 49, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xefe4b0/d .functor XOR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xefe4b0 .delay (30,30,30) L_0xefe4b0/d; +L_0xefea60/d .functor AND 1, L_0xefd890, L_0xefdff0, C4<1>, C4<1>; +L_0xefea60 .delay (30,30,30) L_0xefea60/d; +L_0xefeb00/d .functor NAND 1, L_0xefd890, L_0xefdff0, C4<1>, C4<1>; +L_0xefeb00 .delay (20,20,20) L_0xefeb00/d; +L_0xefeba0/d .functor NOR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xefeba0 .delay (20,20,20) L_0xefeba0/d; +L_0xefec40/d .functor OR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xefec40 .delay (30,30,30) L_0xefec40/d; +v0xe9a860_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe9a920_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe9a9c0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe9aa60_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe9aae0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe9ab80_0 .net "a", 0 0, L_0xefd890; 1 drivers +v0xe9ac00_0 .net "b", 0 0, L_0xefdff0; 1 drivers +v0xe9ac80_0 .net "cin", 0 0, L_0xefe150; 1 drivers +v0xe9ad00_0 .net "cout", 0 0, L_0xeff490; 1 drivers +v0xe9ad80_0 .net "cout_ADD", 0 0, L_0xefdc50; 1 drivers +v0xe9ae60_0 .net "cout_SLT", 0 0, L_0xefe910; 1 drivers +v0xe9aee0_0 .net "cout_SUB", 0 0, L_0xefd160; 1 drivers +v0xe9af60_0 .net "muxCout", 7 0, L_0xefc9d0; 1 drivers +v0xe9b010_0 .net "muxRes", 7 0, L_0xefece0; 1 drivers +v0xe9b140_0 .alias "op", 2 0, v0xed5210_0; +v0xe9b1c0_0 .net "out", 0 0, L_0xeff3a0; 1 drivers +v0xe9b090_0 .net "res_ADD", 0 0, L_0xefb9a0; 1 drivers +v0xe9b330_0 .net "res_AND", 0 0, L_0xefea60; 1 drivers +v0xe9b240_0 .net "res_NAND", 0 0, L_0xefeb00; 1 drivers +v0xe9b450_0 .net "res_NOR", 0 0, L_0xefeba0; 1 drivers +v0xe9b3b0_0 .net "res_OR", 0 0, L_0xefec40; 1 drivers +v0xe9b580_0 .net "res_SLT", 0 0, L_0xefe5b0; 1 drivers +v0xe9b500_0 .net "res_SUB", 0 0, L_0xefde90; 1 drivers +v0xe9b6f0_0 .net "res_XOR", 0 0, L_0xefe4b0; 1 drivers +LS_0xefece0_0_0 .concat [ 1 1 1 1], L_0xefb9a0, L_0xefde90, L_0xefe4b0, L_0xefe5b0; +LS_0xefece0_0_4 .concat [ 1 1 1 1], L_0xefea60, L_0xefeb00, L_0xefeba0, L_0xefec40; +L_0xefece0 .concat [ 4 4 0 0], LS_0xefece0_0_0, LS_0xefece0_0_4; +LS_0xefc9d0_0_0 .concat [ 1 1 1 1], L_0xefdc50, L_0xefd160, C4<0>, L_0xefe910; +LS_0xefc9d0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xefc9d0 .concat [ 4 4 0 0], LS_0xefc9d0_0_0, LS_0xefc9d0_0_4; +S_0xe99fa0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe98bd0; + .timescale 0 0; +L_0xee9430/d .functor XOR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xee9430 .delay (30,30,30) L_0xee9430/d; +L_0xefb9a0/d .functor XOR 1, L_0xee9430, L_0xefe150, C4<0>, C4<0>; +L_0xefb9a0 .delay (30,30,30) L_0xefb9a0/d; +L_0xefd230/d .functor AND 1, L_0xefd890, L_0xefdff0, C4<1>, C4<1>; +L_0xefd230 .delay (30,30,30) L_0xefd230/d; +L_0xefd2f0/d .functor OR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xefd2f0 .delay (30,30,30) L_0xefd2f0/d; +L_0xefbb00/d .functor NOT 1, L_0xefe150, C4<0>, C4<0>, C4<0>; +L_0xefbb00 .delay (10,10,10) L_0xefbb00/d; +L_0xefda70/d .functor AND 1, L_0xefd230, L_0xefbb00, C4<1>, C4<1>; +L_0xefda70 .delay (30,30,30) L_0xefda70/d; +L_0xefdb60/d .functor AND 1, L_0xefd2f0, L_0xefe150, C4<1>, C4<1>; +L_0xefdb60 .delay (30,30,30) L_0xefdb60/d; +L_0xefdc50/d .functor OR 1, L_0xefda70, L_0xefdb60, C4<0>, C4<0>; +L_0xefdc50 .delay (30,30,30) L_0xefdc50/d; +v0xe9a090_0 .net "_carryin", 0 0, L_0xefbb00; 1 drivers +v0xe9a150_0 .alias "a", 0 0, v0xe9ab80_0; +v0xe9a1d0_0 .net "aandb", 0 0, L_0xefd230; 1 drivers +v0xe9a270_0 .net "aorb", 0 0, L_0xefd2f0; 1 drivers +v0xe9a2f0_0 .alias "b", 0 0, v0xe9ac00_0; +v0xe9a3c0_0 .alias "carryin", 0 0, v0xe9ac80_0; +v0xe9a490_0 .alias "carryout", 0 0, v0xe9ad80_0; +v0xe9a530_0 .net "outputIfCarryin", 0 0, L_0xefda70; 1 drivers +v0xe9a620_0 .net "outputIf_Carryin", 0 0, L_0xefdb60; 1 drivers +v0xe9a6c0_0 .net "s", 0 0, L_0xee9430; 1 drivers +v0xe9a7c0_0 .alias "sum", 0 0, v0xe9b090_0; +S_0xe99840 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe98bd0; + .timescale 0 0; +L_0xefde30 .functor XOR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xefde90 .functor XOR 1, L_0xefde30, L_0xefe150, C4<0>, C4<0>; +L_0xefdf90 .functor NOT 1, L_0xefd890, C4<0>, C4<0>, C4<0>; +L_0xefb330 .functor AND 1, L_0xefdf90, L_0xefdff0, C4<1>, C4<1>; +L_0xefb390 .functor NOT 1, L_0xefde30, C4<0>, C4<0>, C4<0>; +L_0xefb3f0 .functor AND 1, L_0xefb390, L_0xefe150, C4<1>, C4<1>; +L_0xefd160 .functor OR 1, L_0xefb330, L_0xefb3f0, C4<0>, C4<0>; +v0xe99930_0 .alias "a", 0 0, v0xe9ab80_0; +v0xe999d0_0 .net "axorb", 0 0, L_0xefde30; 1 drivers +v0xe99a50_0 .alias "b", 0 0, v0xe9ac00_0; +v0xe99b00_0 .alias "borrowin", 0 0, v0xe9ac80_0; +v0xe99be0_0 .alias "borrowout", 0 0, v0xe9aee0_0; +v0xe99c60_0 .alias "diff", 0 0, v0xe9b500_0; +v0xe99ce0_0 .net "nota", 0 0, L_0xefdf90; 1 drivers +v0xe99d60_0 .net "notaandb", 0 0, L_0xefb330; 1 drivers +v0xe99e00_0 .net "notaxorb", 0 0, L_0xefb390; 1 drivers +v0xe99ea0_0 .net "notaxorbandborrowin", 0 0, L_0xefb3f0; 1 drivers +S_0xe99120 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe98bd0; + .timescale 0 0; +L_0xefe550 .functor XOR 1, L_0xefd890, L_0xefdff0, C4<0>, C4<0>; +L_0xefe5b0 .functor XOR 1, L_0xefe550, L_0xefe150, C4<0>, C4<0>; +L_0xefe6b0 .functor NOT 1, L_0xefd890, C4<0>, C4<0>, C4<0>; +L_0xefe710 .functor AND 1, L_0xefe6b0, L_0xefdff0, C4<1>, C4<1>; +L_0xefe7c0 .functor NOT 1, L_0xefe550, C4<0>, C4<0>, C4<0>; +L_0xefe820 .functor AND 1, L_0xefe7c0, L_0xefe150, C4<1>, C4<1>; +L_0xefe910 .functor OR 1, L_0xefe710, L_0xefe820, C4<0>, C4<0>; +v0xe99210_0 .alias "a", 0 0, v0xe9ab80_0; +v0xe99290_0 .net "axorb", 0 0, L_0xefe550; 1 drivers +v0xe99330_0 .alias "b", 0 0, v0xe9ac00_0; +v0xe993d0_0 .alias "borrowin", 0 0, v0xe9ac80_0; +v0xe99480_0 .alias "borrowout", 0 0, v0xe9ae60_0; +v0xe99520_0 .alias "diff", 0 0, v0xe9b580_0; +v0xe995c0_0 .net "nota", 0 0, L_0xefe6b0; 1 drivers +v0xe99660_0 .net "notaandb", 0 0, L_0xefe710; 1 drivers +v0xe99700_0 .net "notaxorb", 0 0, L_0xefe7c0; 1 drivers +v0xe997a0_0 .net "notaxorbandborrowin", 0 0, L_0xefe820; 1 drivers +S_0xe98eb0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe98bd0; + .timescale 0 0; +v0xe98fa0_0 .alias "address", 2 0, v0xed5210_0; +v0xe99020_0 .alias "inputs", 7 0, v0xe9b010_0; +v0xe990a0_0 .alias "out", 0 0, v0xe9b1c0_0; +L_0xeff3a0 .part/v L_0xefece0, v0xed5c50_0, 1; +S_0xe98cc0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe98bd0; + .timescale 0 0; +v0xe98990_0 .alias "address", 2 0, v0xed5210_0; +v0xe98db0_0 .alias "inputs", 7 0, v0xe9af60_0; +v0xe98e30_0 .alias "out", 0 0, v0xe9ad00_0; +L_0xeff490 .part/v L_0xefc9d0, v0xed5c50_0, 1; +S_0xe95f90 .scope module, "a18" "ALU1bit" 5 50, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf00c00/d .functor XOR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xf00c00 .delay (30,30,30) L_0xf00c00/d; +L_0xf011b0/d .functor AND 1, L_0xeffcc0, L_0xf00740, C4<1>, C4<1>; +L_0xf011b0 .delay (30,30,30) L_0xf011b0/d; +L_0xf01210/d .functor NAND 1, L_0xeffcc0, L_0xf00740, C4<1>, C4<1>; +L_0xf01210 .delay (20,20,20) L_0xf01210/d; +L_0xf012b0/d .functor NOR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xf012b0 .delay (20,20,20) L_0xf012b0/d; +L_0xf01350/d .functor OR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xf01350 .delay (30,30,30) L_0xf01350/d; +v0xe97c20_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe97ce0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe97d80_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe97e20_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe97ea0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe97f40_0 .net "a", 0 0, L_0xeffcc0; 1 drivers +v0xe97fc0_0 .net "b", 0 0, L_0xf00740; 1 drivers +v0xe98040_0 .net "cin", 0 0, L_0xf008a0; 1 drivers +v0xe980c0_0 .net "cout", 0 0, L_0xf01bb0; 1 drivers +v0xe98140_0 .net "cout_ADD", 0 0, L_0xf003a0; 1 drivers +v0xe981c0_0 .net "cout_SLT", 0 0, L_0xf01060; 1 drivers +v0xe98240_0 .net "cout_SUB", 0 0, L_0xefff70; 1 drivers +v0xe982f0_0 .net "muxCout", 7 0, L_0xeff070; 1 drivers +v0xe983a0_0 .net "muxRes", 7 0, L_0xf013f0; 1 drivers +v0xe984d0_0 .alias "op", 2 0, v0xed5210_0; +v0xe98550_0 .net "out", 0 0, L_0xf01ac0; 1 drivers +v0xe98420_0 .net "res_ADD", 0 0, L_0xefe090; 1 drivers +v0xe986c0_0 .net "res_AND", 0 0, L_0xf011b0; 1 drivers +v0xe985d0_0 .net "res_NAND", 0 0, L_0xf01210; 1 drivers +v0xe987e0_0 .net "res_NOR", 0 0, L_0xf012b0; 1 drivers +v0xe98740_0 .net "res_OR", 0 0, L_0xf01350; 1 drivers +v0xe98910_0 .net "res_SLT", 0 0, L_0xf00d00; 1 drivers +v0xe98890_0 .net "res_SUB", 0 0, L_0xf005e0; 1 drivers +v0xe98a80_0 .net "res_XOR", 0 0, L_0xf00c00; 1 drivers +LS_0xf013f0_0_0 .concat [ 1 1 1 1], L_0xefe090, L_0xf005e0, L_0xf00c00, L_0xf00d00; +LS_0xf013f0_0_4 .concat [ 1 1 1 1], L_0xf011b0, L_0xf01210, L_0xf012b0, L_0xf01350; +L_0xf013f0 .concat [ 4 4 0 0], LS_0xf013f0_0_0, LS_0xf013f0_0_4; +LS_0xeff070_0_0 .concat [ 1 1 1 1], L_0xf003a0, L_0xefff70, C4<0>, L_0xf01060; +LS_0xeff070_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xeff070 .concat [ 4 4 0 0], LS_0xeff070_0_0, LS_0xeff070_0_4; +S_0xe97360 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe95f90; + .timescale 0 0; +L_0xe9b2d0/d .functor XOR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xe9b2d0 .delay (30,30,30) L_0xe9b2d0/d; +L_0xefe090/d .functor XOR 1, L_0xe9b2d0, L_0xf008a0, C4<0>, C4<0>; +L_0xefe090 .delay (30,30,30) L_0xefe090/d; +L_0xeff830/d .functor AND 1, L_0xeffcc0, L_0xf00740, C4<1>, C4<1>; +L_0xeff830 .delay (30,30,30) L_0xeff830/d; +L_0xf00040/d .functor OR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xf00040 .delay (30,30,30) L_0xf00040/d; +L_0xf000e0/d .functor NOT 1, L_0xf008a0, C4<0>, C4<0>, C4<0>; +L_0xf000e0 .delay (10,10,10) L_0xf000e0/d; +L_0xf00180/d .functor AND 1, L_0xeff830, L_0xf000e0, C4<1>, C4<1>; +L_0xf00180 .delay (30,30,30) L_0xf00180/d; +L_0xf002b0/d .functor AND 1, L_0xf00040, L_0xf008a0, C4<1>, C4<1>; +L_0xf002b0 .delay (30,30,30) L_0xf002b0/d; +L_0xf003a0/d .functor OR 1, L_0xf00180, L_0xf002b0, C4<0>, C4<0>; +L_0xf003a0 .delay (30,30,30) L_0xf003a0/d; +v0xe97450_0 .net "_carryin", 0 0, L_0xf000e0; 1 drivers +v0xe97510_0 .alias "a", 0 0, v0xe97f40_0; +v0xe97590_0 .net "aandb", 0 0, L_0xeff830; 1 drivers +v0xe97630_0 .net "aorb", 0 0, L_0xf00040; 1 drivers +v0xe976b0_0 .alias "b", 0 0, v0xe97fc0_0; +v0xe97780_0 .alias "carryin", 0 0, v0xe98040_0; +v0xe97850_0 .alias "carryout", 0 0, v0xe98140_0; +v0xe978f0_0 .net "outputIfCarryin", 0 0, L_0xf00180; 1 drivers +v0xe979e0_0 .net "outputIf_Carryin", 0 0, L_0xf002b0; 1 drivers +v0xe97a80_0 .net "s", 0 0, L_0xe9b2d0; 1 drivers +v0xe97b80_0 .alias "sum", 0 0, v0xe98420_0; +S_0xe96c00 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe95f90; + .timescale 0 0; +L_0xf00580 .functor XOR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xf005e0 .functor XOR 1, L_0xf00580, L_0xf008a0, C4<0>, C4<0>; +L_0xf006e0 .functor NOT 1, L_0xeffcc0, C4<0>, C4<0>, C4<0>; +L_0xefd930 .functor AND 1, L_0xf006e0, L_0xf00740, C4<1>, C4<1>; +L_0xefd990 .functor NOT 1, L_0xf00580, C4<0>, C4<0>, C4<0>; +L_0xefd9f0 .functor AND 1, L_0xefd990, L_0xf008a0, C4<1>, C4<1>; +L_0xefff70 .functor OR 1, L_0xefd930, L_0xefd9f0, C4<0>, C4<0>; +v0xe96cf0_0 .alias "a", 0 0, v0xe97f40_0; +v0xe96d90_0 .net "axorb", 0 0, L_0xf00580; 1 drivers +v0xe96e10_0 .alias "b", 0 0, v0xe97fc0_0; +v0xe96ec0_0 .alias "borrowin", 0 0, v0xe98040_0; +v0xe96fa0_0 .alias "borrowout", 0 0, v0xe98240_0; +v0xe97020_0 .alias "diff", 0 0, v0xe98890_0; +v0xe970a0_0 .net "nota", 0 0, L_0xf006e0; 1 drivers +v0xe97120_0 .net "notaandb", 0 0, L_0xefd930; 1 drivers +v0xe971c0_0 .net "notaxorb", 0 0, L_0xefd990; 1 drivers +v0xe97260_0 .net "notaxorbandborrowin", 0 0, L_0xefd9f0; 1 drivers +S_0xe964e0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe95f90; + .timescale 0 0; +L_0xf00ca0 .functor XOR 1, L_0xeffcc0, L_0xf00740, C4<0>, C4<0>; +L_0xf00d00 .functor XOR 1, L_0xf00ca0, L_0xf008a0, C4<0>, C4<0>; +L_0xf00e00 .functor NOT 1, L_0xeffcc0, C4<0>, C4<0>, C4<0>; +L_0xf00e60 .functor AND 1, L_0xf00e00, L_0xf00740, C4<1>, C4<1>; +L_0xf00f10 .functor NOT 1, L_0xf00ca0, C4<0>, C4<0>, C4<0>; +L_0xf00f70 .functor AND 1, L_0xf00f10, L_0xf008a0, C4<1>, C4<1>; +L_0xf01060 .functor OR 1, L_0xf00e60, L_0xf00f70, C4<0>, C4<0>; +v0xe965d0_0 .alias "a", 0 0, v0xe97f40_0; +v0xe96650_0 .net "axorb", 0 0, L_0xf00ca0; 1 drivers +v0xe966f0_0 .alias "b", 0 0, v0xe97fc0_0; +v0xe96790_0 .alias "borrowin", 0 0, v0xe98040_0; +v0xe96840_0 .alias "borrowout", 0 0, v0xe981c0_0; +v0xe968e0_0 .alias "diff", 0 0, v0xe98910_0; +v0xe96980_0 .net "nota", 0 0, L_0xf00e00; 1 drivers +v0xe96a20_0 .net "notaandb", 0 0, L_0xf00e60; 1 drivers +v0xe96ac0_0 .net "notaxorb", 0 0, L_0xf00f10; 1 drivers +v0xe96b60_0 .net "notaxorbandborrowin", 0 0, L_0xf00f70; 1 drivers +S_0xe96270 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe95f90; + .timescale 0 0; +v0xe96360_0 .alias "address", 2 0, v0xed5210_0; +v0xe963e0_0 .alias "inputs", 7 0, v0xe983a0_0; +v0xe96460_0 .alias "out", 0 0, v0xe98550_0; +L_0xf01ac0 .part/v L_0xf013f0, v0xed5c50_0, 1; +S_0xe96080 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe95f90; + .timescale 0 0; +v0xe95d50_0 .alias "address", 2 0, v0xed5210_0; +v0xe96170_0 .alias "inputs", 7 0, v0xe982f0_0; +v0xe961f0_0 .alias "out", 0 0, v0xe980c0_0; +L_0xf01bb0 .part/v L_0xeff070, v0xed5c50_0, 1; +S_0xe93320 .scope module, "a19" "ALU1bit" 5 51, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf03190/d .functor XOR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf03190 .delay (30,30,30) L_0xf03190/d; +L_0xf03740/d .functor AND 1, L_0xf02350, L_0xf02d20, C4<1>, C4<1>; +L_0xf03740 .delay (30,30,30) L_0xf03740/d; +L_0xf037e0/d .functor NAND 1, L_0xf02350, L_0xf02d20, C4<1>, C4<1>; +L_0xf037e0 .delay (20,20,20) L_0xf037e0/d; +L_0xf03880/d .functor NOR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf03880 .delay (20,20,20) L_0xf03880/d; +L_0xf03920/d .functor OR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf03920 .delay (30,30,30) L_0xf03920/d; +v0xe94fb0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe95070_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe95110_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe951b0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe95230_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe952d0_0 .net "a", 0 0, L_0xf02350; 1 drivers +v0xe95350_0 .net "b", 0 0, L_0xf02d20; 1 drivers +v0xe953d0_0 .net "cin", 0 0, L_0xf04560; 1 drivers +v0xe95450_0 .net "cout", 0 0, L_0xf041c0; 1 drivers +v0xe954d0_0 .net "cout_ADD", 0 0, L_0xf02980; 1 drivers +v0xe955b0_0 .net "cout_SLT", 0 0, L_0xf035f0; 1 drivers +v0xe95630_0 .net "cout_SUB", 0 0, L_0xf01fe0; 1 drivers +v0xe956b0_0 .net "muxCout", 7 0, L_0xf01800; 1 drivers +v0xe95760_0 .net "muxRes", 7 0, L_0xf039c0; 1 drivers +v0xe95890_0 .alias "op", 2 0, v0xed5210_0; +v0xe95910_0 .net "out", 0 0, L_0xf040d0; 1 drivers +v0xe957e0_0 .net "res_ADD", 0 0, L_0xf01f60; 1 drivers +v0xe95a80_0 .net "res_AND", 0 0, L_0xf03740; 1 drivers +v0xe95990_0 .net "res_NAND", 0 0, L_0xf037e0; 1 drivers +v0xe95ba0_0 .net "res_NOR", 0 0, L_0xf03880; 1 drivers +v0xe95b00_0 .net "res_OR", 0 0, L_0xf03920; 1 drivers +v0xe95cd0_0 .net "res_SLT", 0 0, L_0xf03290; 1 drivers +v0xe95c50_0 .net "res_SUB", 0 0, L_0xf02bc0; 1 drivers +v0xe95e40_0 .net "res_XOR", 0 0, L_0xf03190; 1 drivers +LS_0xf039c0_0_0 .concat [ 1 1 1 1], L_0xf01f60, L_0xf02bc0, L_0xf03190, L_0xf03290; +LS_0xf039c0_0_4 .concat [ 1 1 1 1], L_0xf03740, L_0xf037e0, L_0xf03880, L_0xf03920; +L_0xf039c0 .concat [ 4 4 0 0], LS_0xf039c0_0_0, LS_0xf039c0_0_4; +LS_0xf01800_0_0 .concat [ 1 1 1 1], L_0xf02980, L_0xf01fe0, C4<0>, L_0xf035f0; +LS_0xf01800_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf01800 .concat [ 4 4 0 0], LS_0xf01800_0_0, LS_0xf01800_0_4; +S_0xe946f0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe93320; + .timescale 0 0; +L_0xf007e0/d .functor XOR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf007e0 .delay (30,30,30) L_0xf007e0/d; +L_0xf01f60/d .functor XOR 1, L_0xf007e0, L_0xf04560, C4<0>, C4<0>; +L_0xf01f60 .delay (30,30,30) L_0xf01f60/d; +L_0xf02580/d .functor AND 1, L_0xf02350, L_0xf02d20, C4<1>, C4<1>; +L_0xf02580 .delay (30,30,30) L_0xf02580/d; +L_0xf02620/d .functor OR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf02620 .delay (30,30,30) L_0xf02620/d; +L_0xf026c0/d .functor NOT 1, L_0xf04560, C4<0>, C4<0>, C4<0>; +L_0xf026c0 .delay (10,10,10) L_0xf026c0/d; +L_0xf02760/d .functor AND 1, L_0xf02580, L_0xf026c0, C4<1>, C4<1>; +L_0xf02760 .delay (30,30,30) L_0xf02760/d; +L_0xf02890/d .functor AND 1, L_0xf02620, L_0xf04560, C4<1>, C4<1>; +L_0xf02890 .delay (30,30,30) L_0xf02890/d; +L_0xf02980/d .functor OR 1, L_0xf02760, L_0xf02890, C4<0>, C4<0>; +L_0xf02980 .delay (30,30,30) L_0xf02980/d; +v0xe947e0_0 .net "_carryin", 0 0, L_0xf026c0; 1 drivers +v0xe948a0_0 .alias "a", 0 0, v0xe952d0_0; +v0xe94920_0 .net "aandb", 0 0, L_0xf02580; 1 drivers +v0xe949c0_0 .net "aorb", 0 0, L_0xf02620; 1 drivers +v0xe94a40_0 .alias "b", 0 0, v0xe95350_0; +v0xe94b10_0 .alias "carryin", 0 0, v0xe953d0_0; +v0xe94be0_0 .alias "carryout", 0 0, v0xe954d0_0; +v0xe94c80_0 .net "outputIfCarryin", 0 0, L_0xf02760; 1 drivers +v0xe94d70_0 .net "outputIf_Carryin", 0 0, L_0xf02890; 1 drivers +v0xe94e10_0 .net "s", 0 0, L_0xf007e0; 1 drivers +v0xe94f10_0 .alias "sum", 0 0, v0xe957e0_0; +S_0xe93f90 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe93320; + .timescale 0 0; +L_0xf02b60 .functor XOR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf02bc0 .functor XOR 1, L_0xf02b60, L_0xf04560, C4<0>, C4<0>; +L_0xf02cc0 .functor NOT 1, L_0xf02350, C4<0>, C4<0>, C4<0>; +L_0xf01de0 .functor AND 1, L_0xf02cc0, L_0xf02d20, C4<1>, C4<1>; +L_0xf01e40 .functor NOT 1, L_0xf02b60, C4<0>, C4<0>, C4<0>; +L_0xf01ea0 .functor AND 1, L_0xf01e40, L_0xf04560, C4<1>, C4<1>; +L_0xf01fe0 .functor OR 1, L_0xf01de0, L_0xf01ea0, C4<0>, C4<0>; +v0xe94080_0 .alias "a", 0 0, v0xe952d0_0; +v0xe94120_0 .net "axorb", 0 0, L_0xf02b60; 1 drivers +v0xe941a0_0 .alias "b", 0 0, v0xe95350_0; +v0xe94250_0 .alias "borrowin", 0 0, v0xe953d0_0; +v0xe94330_0 .alias "borrowout", 0 0, v0xe95630_0; +v0xe943b0_0 .alias "diff", 0 0, v0xe95c50_0; +v0xe94430_0 .net "nota", 0 0, L_0xf02cc0; 1 drivers +v0xe944b0_0 .net "notaandb", 0 0, L_0xf01de0; 1 drivers +v0xe94550_0 .net "notaxorb", 0 0, L_0xf01e40; 1 drivers +v0xe945f0_0 .net "notaxorbandborrowin", 0 0, L_0xf01ea0; 1 drivers +S_0xe93870 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe93320; + .timescale 0 0; +L_0xf03230 .functor XOR 1, L_0xf02350, L_0xf02d20, C4<0>, C4<0>; +L_0xf03290 .functor XOR 1, L_0xf03230, L_0xf04560, C4<0>, C4<0>; +L_0xf03390 .functor NOT 1, L_0xf02350, C4<0>, C4<0>, C4<0>; +L_0xf033f0 .functor AND 1, L_0xf03390, L_0xf02d20, C4<1>, C4<1>; +L_0xf034a0 .functor NOT 1, L_0xf03230, C4<0>, C4<0>, C4<0>; +L_0xf03500 .functor AND 1, L_0xf034a0, L_0xf04560, C4<1>, C4<1>; +L_0xf035f0 .functor OR 1, L_0xf033f0, L_0xf03500, C4<0>, C4<0>; +v0xe93960_0 .alias "a", 0 0, v0xe952d0_0; +v0xe939e0_0 .net "axorb", 0 0, L_0xf03230; 1 drivers +v0xe93a80_0 .alias "b", 0 0, v0xe95350_0; +v0xe93b20_0 .alias "borrowin", 0 0, v0xe953d0_0; +v0xe93bd0_0 .alias "borrowout", 0 0, v0xe955b0_0; +v0xe93c70_0 .alias "diff", 0 0, v0xe95cd0_0; +v0xe93d10_0 .net "nota", 0 0, L_0xf03390; 1 drivers +v0xe93db0_0 .net "notaandb", 0 0, L_0xf033f0; 1 drivers +v0xe93e50_0 .net "notaxorb", 0 0, L_0xf034a0; 1 drivers +v0xe93ef0_0 .net "notaxorbandborrowin", 0 0, L_0xf03500; 1 drivers +S_0xe93600 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe93320; + .timescale 0 0; +v0xe936f0_0 .alias "address", 2 0, v0xed5210_0; +v0xe93770_0 .alias "inputs", 7 0, v0xe95760_0; +v0xe937f0_0 .alias "out", 0 0, v0xe95910_0; +L_0xf040d0 .part/v L_0xf039c0, v0xed5c50_0, 1; +S_0xe93410 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe93320; + .timescale 0 0; +v0xe930e0_0 .alias "address", 2 0, v0xed5210_0; +v0xe93500_0 .alias "inputs", 7 0, v0xe956b0_0; +v0xe93580_0 .alias "out", 0 0, v0xe95450_0; +L_0xf041c0 .part/v L_0xf01800, v0xed5c50_0, 1; +S_0xe906b0 .scope module, "a20" "ALU1bit" 5 52, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf05830/d .functor XOR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf05830 .delay (30,30,30) L_0xf05830/d; +L_0xf05de0/d .functor AND 1, L_0xf04840, L_0xf05310, C4<1>, C4<1>; +L_0xf05de0 .delay (30,30,30) L_0xf05de0/d; +L_0xf05e80/d .functor NAND 1, L_0xf04840, L_0xf05310, C4<1>, C4<1>; +L_0xf05e80 .delay (20,20,20) L_0xf05e80/d; +L_0xf05f20/d .functor NOR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf05f20 .delay (20,20,20) L_0xf05f20/d; +L_0xf05fc0/d .functor OR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf05fc0 .delay (30,30,30) L_0xf05fc0/d; +v0xe92340_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe92400_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe924a0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe92540_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe925c0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe92660_0 .net "a", 0 0, L_0xf04840; 1 drivers +v0xe926e0_0 .net "b", 0 0, L_0xf05310; 1 drivers +v0xe92760_0 .net "cin", 0 0, L_0xf05470; 1 drivers +v0xe927e0_0 .net "cout", 0 0, L_0xf067d0; 1 drivers +v0xe92860_0 .net "cout_ADD", 0 0, L_0xf04f70; 1 drivers +v0xe92940_0 .net "cout_SLT", 0 0, L_0xf05c90; 1 drivers +v0xe929c0_0 .net "cout_SUB", 0 0, L_0xf04b40; 1 drivers +v0xe92a40_0 .net "muxCout", 7 0, L_0xf03d10; 1 drivers +v0xe92af0_0 .net "muxRes", 7 0, L_0xf06060; 1 drivers +v0xe92c20_0 .alias "op", 2 0, v0xed5210_0; +v0xe92ca0_0 .net "out", 0 0, L_0xf066e0; 1 drivers +v0xe92b70_0 .net "res_ADD", 0 0, L_0xf024a0; 1 drivers +v0xe92e10_0 .net "res_AND", 0 0, L_0xf05de0; 1 drivers +v0xe92d20_0 .net "res_NAND", 0 0, L_0xf05e80; 1 drivers +v0xe92f30_0 .net "res_NOR", 0 0, L_0xf05f20; 1 drivers +v0xe92e90_0 .net "res_OR", 0 0, L_0xf05fc0; 1 drivers +v0xe93060_0 .net "res_SLT", 0 0, L_0xf05930; 1 drivers +v0xe92fe0_0 .net "res_SUB", 0 0, L_0xf051b0; 1 drivers +v0xe931d0_0 .net "res_XOR", 0 0, L_0xf05830; 1 drivers +LS_0xf06060_0_0 .concat [ 1 1 1 1], L_0xf024a0, L_0xf051b0, L_0xf05830, L_0xf05930; +LS_0xf06060_0_4 .concat [ 1 1 1 1], L_0xf05de0, L_0xf05e80, L_0xf05f20, L_0xf05fc0; +L_0xf06060 .concat [ 4 4 0 0], LS_0xf06060_0_0, LS_0xf06060_0_4; +LS_0xf03d10_0_0 .concat [ 1 1 1 1], L_0xf04f70, L_0xf04b40, C4<0>, L_0xf05c90; +LS_0xf03d10_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf03d10 .concat [ 4 4 0 0], LS_0xf03d10_0_0, LS_0xf03d10_0_4; +S_0xe91a80 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe906b0; + .timescale 0 0; +L_0xf02dc0/d .functor XOR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf02dc0 .delay (30,30,30) L_0xf02dc0/d; +L_0xf024a0/d .functor XOR 1, L_0xf02dc0, L_0xf05470, C4<0>, C4<0>; +L_0xf024a0 .delay (30,30,30) L_0xf024a0/d; +L_0xf02f10/d .functor AND 1, L_0xf04840, L_0xf05310, C4<1>, C4<1>; +L_0xf02f10 .delay (30,30,30) L_0xf02f10/d; +L_0xf04c10/d .functor OR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf04c10 .delay (30,30,30) L_0xf04c10/d; +L_0xf04cb0/d .functor NOT 1, L_0xf05470, C4<0>, C4<0>, C4<0>; +L_0xf04cb0 .delay (10,10,10) L_0xf04cb0/d; +L_0xf04d50/d .functor AND 1, L_0xf02f10, L_0xf04cb0, C4<1>, C4<1>; +L_0xf04d50 .delay (30,30,30) L_0xf04d50/d; +L_0xf04e80/d .functor AND 1, L_0xf04c10, L_0xf05470, C4<1>, C4<1>; +L_0xf04e80 .delay (30,30,30) L_0xf04e80/d; +L_0xf04f70/d .functor OR 1, L_0xf04d50, L_0xf04e80, C4<0>, C4<0>; +L_0xf04f70 .delay (30,30,30) L_0xf04f70/d; +v0xe91b70_0 .net "_carryin", 0 0, L_0xf04cb0; 1 drivers +v0xe91c30_0 .alias "a", 0 0, v0xe92660_0; +v0xe91cb0_0 .net "aandb", 0 0, L_0xf02f10; 1 drivers +v0xe91d50_0 .net "aorb", 0 0, L_0xf04c10; 1 drivers +v0xe91dd0_0 .alias "b", 0 0, v0xe926e0_0; +v0xe91ea0_0 .alias "carryin", 0 0, v0xe92760_0; +v0xe91f70_0 .alias "carryout", 0 0, v0xe92860_0; +v0xe92010_0 .net "outputIfCarryin", 0 0, L_0xf04d50; 1 drivers +v0xe92100_0 .net "outputIf_Carryin", 0 0, L_0xf04e80; 1 drivers +v0xe921a0_0 .net "s", 0 0, L_0xf02dc0; 1 drivers +v0xe922a0_0 .alias "sum", 0 0, v0xe92b70_0; +S_0xe91320 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe906b0; + .timescale 0 0; +L_0xf05150 .functor XOR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf051b0 .functor XOR 1, L_0xf05150, L_0xf05470, C4<0>, C4<0>; +L_0xf052b0 .functor NOT 1, L_0xf04840, C4<0>, C4<0>, C4<0>; +L_0xf02e80 .functor AND 1, L_0xf052b0, L_0xf05310, C4<1>, C4<1>; +L_0xf023f0 .functor NOT 1, L_0xf05150, C4<0>, C4<0>, C4<0>; +L_0xf05580 .functor AND 1, L_0xf023f0, L_0xf05470, C4<1>, C4<1>; +L_0xf04b40 .functor OR 1, L_0xf02e80, L_0xf05580, C4<0>, C4<0>; +v0xe91410_0 .alias "a", 0 0, v0xe92660_0; +v0xe914b0_0 .net "axorb", 0 0, L_0xf05150; 1 drivers +v0xe91530_0 .alias "b", 0 0, v0xe926e0_0; +v0xe915e0_0 .alias "borrowin", 0 0, v0xe92760_0; +v0xe916c0_0 .alias "borrowout", 0 0, v0xe929c0_0; +v0xe91740_0 .alias "diff", 0 0, v0xe92fe0_0; +v0xe917c0_0 .net "nota", 0 0, L_0xf052b0; 1 drivers +v0xe91840_0 .net "notaandb", 0 0, L_0xf02e80; 1 drivers +v0xe918e0_0 .net "notaxorb", 0 0, L_0xf023f0; 1 drivers +v0xe91980_0 .net "notaxorbandborrowin", 0 0, L_0xf05580; 1 drivers +S_0xe90c00 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe906b0; + .timescale 0 0; +L_0xf058d0 .functor XOR 1, L_0xf04840, L_0xf05310, C4<0>, C4<0>; +L_0xf05930 .functor XOR 1, L_0xf058d0, L_0xf05470, C4<0>, C4<0>; +L_0xf05a30 .functor NOT 1, L_0xf04840, C4<0>, C4<0>, C4<0>; +L_0xf05a90 .functor AND 1, L_0xf05a30, L_0xf05310, C4<1>, C4<1>; +L_0xf05b40 .functor NOT 1, L_0xf058d0, C4<0>, C4<0>, C4<0>; +L_0xf05ba0 .functor AND 1, L_0xf05b40, L_0xf05470, C4<1>, C4<1>; +L_0xf05c90 .functor OR 1, L_0xf05a90, L_0xf05ba0, C4<0>, C4<0>; +v0xe90cf0_0 .alias "a", 0 0, v0xe92660_0; +v0xe90d70_0 .net "axorb", 0 0, L_0xf058d0; 1 drivers +v0xe90e10_0 .alias "b", 0 0, v0xe926e0_0; +v0xe90eb0_0 .alias "borrowin", 0 0, v0xe92760_0; +v0xe90f60_0 .alias "borrowout", 0 0, v0xe92940_0; +v0xe91000_0 .alias "diff", 0 0, v0xe93060_0; +v0xe910a0_0 .net "nota", 0 0, L_0xf05a30; 1 drivers +v0xe91140_0 .net "notaandb", 0 0, L_0xf05a90; 1 drivers +v0xe911e0_0 .net "notaxorb", 0 0, L_0xf05b40; 1 drivers +v0xe91280_0 .net "notaxorbandborrowin", 0 0, L_0xf05ba0; 1 drivers +S_0xe90990 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe906b0; + .timescale 0 0; +v0xe90a80_0 .alias "address", 2 0, v0xed5210_0; +v0xe90b00_0 .alias "inputs", 7 0, v0xe92af0_0; +v0xe90b80_0 .alias "out", 0 0, v0xe92ca0_0; +L_0xf066e0 .part/v L_0xf06060, v0xed5c50_0, 1; +S_0xe907a0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe906b0; + .timescale 0 0; +v0xe90470_0 .alias "address", 2 0, v0xed5210_0; +v0xe90890_0 .alias "inputs", 7 0, v0xe92a40_0; +v0xe90910_0 .alias "out", 0 0, v0xe927e0_0; +L_0xf067d0 .part/v L_0xf03d10, v0xed5c50_0, 1; +S_0xe8d9c0 .scope module, "a21" "ALU1bit" 5 53, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf07e00/d .functor XOR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf07e00 .delay (30,30,30) L_0xf07e00/d; +L_0xf08430/d .functor AND 1, L_0xf06fc0, L_0xf07940, C4<1>, C4<1>; +L_0xf08430 .delay (30,30,30) L_0xf08430/d; +L_0xf084f0/d .functor NAND 1, L_0xf06fc0, L_0xf07940, C4<1>, C4<1>; +L_0xf084f0 .delay (20,20,20) L_0xf084f0/d; +L_0xf085b0/d .functor NOR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf085b0 .delay (20,20,20) L_0xf085b0/d; +L_0xf08670/d .functor OR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf08670 .delay (30,30,30) L_0xf08670/d; +v0xe8f660_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe8f720_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe8f7c0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe8f860_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe8f8e0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe8f980_0 .net "a", 0 0, L_0xf06fc0; 1 drivers +v0xe8fa00_0 .net "b", 0 0, L_0xf07940; 1 drivers +v0xe8fa80_0 .net "cin", 0 0, L_0xf07aa0; 1 drivers +v0xe8fb00_0 .net "cout", 0 0, L_0xf08ec0; 1 drivers +v0xe8fb80_0 .net "cout_ADD", 0 0, L_0xf07560; 1 drivers +v0xe8fc60_0 .net "cout_SLT", 0 0, L_0xf082e0; 1 drivers +v0xe8fce0_0 .net "cout_SUB", 0 0, L_0xf06be0; 1 drivers +v0xe8fdd0_0 .net "muxCout", 7 0, L_0xf06430; 1 drivers +v0xe8fe80_0 .net "muxRes", 7 0, L_0xf08710; 1 drivers +v0xe8ffb0_0 .alias "op", 2 0, v0xed5210_0; +v0xe90030_0 .net "out", 0 0, L_0xf08dd0; 1 drivers +v0xe8ff00_0 .net "res_ADD", 0 0, L_0xf06b60; 1 drivers +v0xe901a0_0 .net "res_AND", 0 0, L_0xf08430; 1 drivers +v0xe900b0_0 .net "res_NAND", 0 0, L_0xf084f0; 1 drivers +v0xe902c0_0 .net "res_NOR", 0 0, L_0xf085b0; 1 drivers +v0xe90220_0 .net "res_OR", 0 0, L_0xf08670; 1 drivers +v0xe903f0_0 .net "res_SLT", 0 0, L_0xf07f20; 1 drivers +v0xe90370_0 .net "res_SUB", 0 0, L_0xf077a0; 1 drivers +v0xe90560_0 .net "res_XOR", 0 0, L_0xf07e00; 1 drivers +LS_0xf08710_0_0 .concat [ 1 1 1 1], L_0xf06b60, L_0xf077a0, L_0xf07e00, L_0xf07f20; +LS_0xf08710_0_4 .concat [ 1 1 1 1], L_0xf08430, L_0xf084f0, L_0xf085b0, L_0xf08670; +L_0xf08710 .concat [ 4 4 0 0], LS_0xf08710_0_0, LS_0xf08710_0_4; +LS_0xf06430_0_0 .concat [ 1 1 1 1], L_0xf07560, L_0xf06be0, C4<0>, L_0xf082e0; +LS_0xf06430_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf06430 .concat [ 4 4 0 0], LS_0xf06430_0_0, LS_0xf06430_0_4; +S_0xe8eda0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe8d9c0; + .timescale 0 0; +L_0xf053b0/d .functor XOR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf053b0 .delay (30,30,30) L_0xf053b0/d; +L_0xf06b60/d .functor XOR 1, L_0xf053b0, L_0xf07aa0, C4<0>, C4<0>; +L_0xf06b60 .delay (30,30,30) L_0xf06b60/d; +L_0xf05510/d .functor AND 1, L_0xf06fc0, L_0xf07940, C4<1>, C4<1>; +L_0xf05510 .delay (30,30,30) L_0xf05510/d; +L_0xf07240/d .functor OR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf07240 .delay (30,30,30) L_0xf07240/d; +L_0xf072a0/d .functor NOT 1, L_0xf07aa0, C4<0>, C4<0>, C4<0>; +L_0xf072a0 .delay (10,10,10) L_0xf072a0/d; +L_0xf07340/d .functor AND 1, L_0xf05510, L_0xf072a0, C4<1>, C4<1>; +L_0xf07340 .delay (30,30,30) L_0xf07340/d; +L_0xf07470/d .functor AND 1, L_0xf07240, L_0xf07aa0, C4<1>, C4<1>; +L_0xf07470 .delay (30,30,30) L_0xf07470/d; +L_0xf07560/d .functor OR 1, L_0xf07340, L_0xf07470, C4<0>, C4<0>; +L_0xf07560 .delay (30,30,30) L_0xf07560/d; +v0xe8ee90_0 .net "_carryin", 0 0, L_0xf072a0; 1 drivers +v0xe8ef50_0 .alias "a", 0 0, v0xe8f980_0; +v0xe8efd0_0 .net "aandb", 0 0, L_0xf05510; 1 drivers +v0xe8f070_0 .net "aorb", 0 0, L_0xf07240; 1 drivers +v0xe8f0f0_0 .alias "b", 0 0, v0xe8fa00_0; +v0xe8f1c0_0 .alias "carryin", 0 0, v0xe8fa80_0; +v0xe8f290_0 .alias "carryout", 0 0, v0xe8fb80_0; +v0xe8f330_0 .net "outputIfCarryin", 0 0, L_0xf07340; 1 drivers +v0xe8f420_0 .net "outputIf_Carryin", 0 0, L_0xf07470; 1 drivers +v0xe8f4c0_0 .net "s", 0 0, L_0xf053b0; 1 drivers +v0xe8f5c0_0 .alias "sum", 0 0, v0xe8ff00_0; +S_0xe8e610 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe8d9c0; + .timescale 0 0; +L_0xf07740 .functor XOR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf077a0 .functor XOR 1, L_0xf07740, L_0xf07aa0, C4<0>, C4<0>; +L_0xf078c0 .functor NOT 1, L_0xf06fc0, C4<0>, C4<0>, C4<0>; +L_0xf06a00 .functor AND 1, L_0xf078c0, L_0xf07940, C4<1>, C4<1>; +L_0xf06a60 .functor NOT 1, L_0xf07740, C4<0>, C4<0>, C4<0>; +L_0xf06ac0 .functor AND 1, L_0xf06a60, L_0xf07aa0, C4<1>, C4<1>; +L_0xf06be0 .functor OR 1, L_0xf06a00, L_0xf06ac0, C4<0>, C4<0>; +v0xe8e700_0 .alias "a", 0 0, v0xe8f980_0; +v0xe8e7d0_0 .net "axorb", 0 0, L_0xf07740; 1 drivers +v0xe8e850_0 .alias "b", 0 0, v0xe8fa00_0; +v0xe8e900_0 .alias "borrowin", 0 0, v0xe8fa80_0; +v0xe8e9e0_0 .alias "borrowout", 0 0, v0xe8fce0_0; +v0xe8ea60_0 .alias "diff", 0 0, v0xe90370_0; +v0xe8eae0_0 .net "nota", 0 0, L_0xf078c0; 1 drivers +v0xe8eb60_0 .net "notaandb", 0 0, L_0xf06a00; 1 drivers +v0xe8ec00_0 .net "notaxorb", 0 0, L_0xf06a60; 1 drivers +v0xe8eca0_0 .net "notaxorbandborrowin", 0 0, L_0xf06ac0; 1 drivers +S_0xe8df10 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe8d9c0; + .timescale 0 0; +L_0xf07ea0 .functor XOR 1, L_0xf06fc0, L_0xf07940, C4<0>, C4<0>; +L_0xf07f20 .functor XOR 1, L_0xf07ea0, L_0xf07aa0, C4<0>, C4<0>; +L_0xf08040 .functor NOT 1, L_0xf06fc0, C4<0>, C4<0>, C4<0>; +L_0xf080c0 .functor AND 1, L_0xf08040, L_0xf07940, C4<1>, C4<1>; +L_0xf08190 .functor NOT 1, L_0xf07ea0, C4<0>, C4<0>, C4<0>; +L_0xf081f0 .functor AND 1, L_0xf08190, L_0xf07aa0, C4<1>, C4<1>; +L_0xf082e0 .functor OR 1, L_0xf080c0, L_0xf081f0, C4<0>, C4<0>; +v0xe8e000_0 .alias "a", 0 0, v0xe8f980_0; +v0xe8e080_0 .net "axorb", 0 0, L_0xf07ea0; 1 drivers +v0xe8e100_0 .alias "b", 0 0, v0xe8fa00_0; +v0xe8e180_0 .alias "borrowin", 0 0, v0xe8fa80_0; +v0xe8e200_0 .alias "borrowout", 0 0, v0xe8fc60_0; +v0xe8e280_0 .alias "diff", 0 0, v0xe903f0_0; +v0xe8e300_0 .net "nota", 0 0, L_0xf08040; 1 drivers +v0xe8e380_0 .net "notaandb", 0 0, L_0xf080c0; 1 drivers +v0xe8e470_0 .net "notaxorb", 0 0, L_0xf08190; 1 drivers +v0xe8e510_0 .net "notaxorbandborrowin", 0 0, L_0xf081f0; 1 drivers +S_0xe8dca0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe8d9c0; + .timescale 0 0; +v0xe8dd90_0 .alias "address", 2 0, v0xed5210_0; +v0xe8de10_0 .alias "inputs", 7 0, v0xe8fe80_0; +v0xe8de90_0 .alias "out", 0 0, v0xe90030_0; +L_0xf08dd0 .part/v L_0xf08710, v0xed5c50_0, 1; +S_0xe8dab0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe8d9c0; + .timescale 0 0; +v0xe6ee30_0 .alias "address", 2 0, v0xed5210_0; +v0xe8dba0_0 .alias "inputs", 7 0, v0xe8fdd0_0; +v0xe8dc20_0 .alias "out", 0 0, v0xe8fb00_0; +L_0xf08ec0 .part/v L_0xf06430, v0xed5c50_0, 1; +S_0xe8a970 .scope module, "a22" "ALU1bit" 5 54, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf0a4c0/d .functor XOR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf0a4c0 .delay (30,30,30) L_0xf0a4c0/d; +L_0xf0aa50/d .functor AND 1, L_0xf09590, L_0xf09840, C4<1>, C4<1>; +L_0xf0aa50 .delay (30,30,30) L_0xf0aa50/d; +L_0xf0ab10/d .functor NAND 1, L_0xf09590, L_0xf09840, C4<1>, C4<1>; +L_0xf0ab10 .delay (20,20,20) L_0xf0ab10/d; +L_0xf0abd0/d .functor NOR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf0abd0 .delay (20,20,20) L_0xf0abd0/d; +L_0xf0ac90/d .functor OR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf0ac90 .delay (30,30,30) L_0xf0ac90/d; +v0xe8c600_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe8c6c0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe8c760_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe8c800_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe8c880_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe8c920_0 .net "a", 0 0, L_0xf09590; 1 drivers +v0xe8c9a0_0 .net "b", 0 0, L_0xf09840; 1 drivers +v0xe8ca20_0 .net "cin", 0 0, L_0xf0a000; 1 drivers +v0xe8caa0_0 .net "cout", 0 0, L_0xf0b4a0; 1 drivers +v0xe8cb20_0 .net "cout_ADD", 0 0, L_0xf09c60; 1 drivers +v0xe8cc00_0 .net "cout_SLT", 0 0, L_0xf0a900; 1 drivers +v0xe8cc80_0 .net "cout_SUB", 0 0, L_0xf070e0; 1 drivers +v0xe8cd00_0 .net "muxCout", 7 0, L_0xf08a60; 1 drivers +v0xe8cdb0_0 .net "muxRes", 7 0, L_0xf0ad30; 1 drivers +v0xe8cee0_0 .alias "op", 2 0, v0xed5210_0; +v0xe6eb20_0 .net "out", 0 0, L_0xf0b400; 1 drivers +v0xe8ce30_0 .net "res_ADD", 0 0, L_0xf07060; 1 drivers +v0xe6ec90_0 .net "res_AND", 0 0, L_0xf0aa50; 1 drivers +v0xe6eba0_0 .net "res_NAND", 0 0, L_0xf0ab10; 1 drivers +v0xe6edb0_0 .net "res_NOR", 0 0, L_0xf0abd0; 1 drivers +v0xe6ed10_0 .net "res_OR", 0 0, L_0xf0ac90; 1 drivers +v0xe8d770_0 .net "res_SLT", 0 0, L_0xf0a5c0; 1 drivers +v0xe8d7f0_0 .net "res_SUB", 0 0, L_0xf09ea0; 1 drivers +v0xe8d870_0 .net "res_XOR", 0 0, L_0xf0a4c0; 1 drivers +LS_0xf0ad30_0_0 .concat [ 1 1 1 1], L_0xf07060, L_0xf09ea0, L_0xf0a4c0, L_0xf0a5c0; +LS_0xf0ad30_0_4 .concat [ 1 1 1 1], L_0xf0aa50, L_0xf0ab10, L_0xf0abd0, L_0xf0ac90; +L_0xf0ad30 .concat [ 4 4 0 0], LS_0xf0ad30_0_0, LS_0xf0ad30_0_4; +LS_0xf08a60_0_0 .concat [ 1 1 1 1], L_0xf09c60, L_0xf070e0, C4<0>, L_0xf0a900; +LS_0xf08a60_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf08a60 .concat [ 4 4 0 0], LS_0xf08a60_0_0, LS_0xf08a60_0_4; +S_0xe8bd40 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe8a970; + .timescale 0 0; +L_0xf079e0/d .functor XOR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf079e0 .delay (30,30,30) L_0xf079e0/d; +L_0xf07060/d .functor XOR 1, L_0xf079e0, L_0xf0a000, C4<0>, C4<0>; +L_0xf07060 .delay (30,30,30) L_0xf07060/d; +L_0xf098e0/d .functor AND 1, L_0xf09590, L_0xf09840, C4<1>, C4<1>; +L_0xf098e0 .delay (30,30,30) L_0xf098e0/d; +L_0xf09940/d .functor OR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf09940 .delay (30,30,30) L_0xf09940/d; +L_0xf099e0/d .functor NOT 1, L_0xf0a000, C4<0>, C4<0>, C4<0>; +L_0xf099e0 .delay (10,10,10) L_0xf099e0/d; +L_0xf09a80/d .functor AND 1, L_0xf098e0, L_0xf099e0, C4<1>, C4<1>; +L_0xf09a80 .delay (30,30,30) L_0xf09a80/d; +L_0xf09b70/d .functor AND 1, L_0xf09940, L_0xf0a000, C4<1>, C4<1>; +L_0xf09b70 .delay (30,30,30) L_0xf09b70/d; +L_0xf09c60/d .functor OR 1, L_0xf09a80, L_0xf09b70, C4<0>, C4<0>; +L_0xf09c60 .delay (30,30,30) L_0xf09c60/d; +v0xe8be30_0 .net "_carryin", 0 0, L_0xf099e0; 1 drivers +v0xe8bef0_0 .alias "a", 0 0, v0xe8c920_0; +v0xe8bf70_0 .net "aandb", 0 0, L_0xf098e0; 1 drivers +v0xe8c010_0 .net "aorb", 0 0, L_0xf09940; 1 drivers +v0xe8c090_0 .alias "b", 0 0, v0xe8c9a0_0; +v0xe8c160_0 .alias "carryin", 0 0, v0xe8ca20_0; +v0xe8c230_0 .alias "carryout", 0 0, v0xe8cb20_0; +v0xe8c2d0_0 .net "outputIfCarryin", 0 0, L_0xf09a80; 1 drivers +v0xe8c3c0_0 .net "outputIf_Carryin", 0 0, L_0xf09b70; 1 drivers +v0xe8c460_0 .net "s", 0 0, L_0xf079e0; 1 drivers +v0xe8c560_0 .alias "sum", 0 0, v0xe8ce30_0; +S_0xe8b5e0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe8a970; + .timescale 0 0; +L_0xf09e40 .functor XOR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf09ea0 .functor XOR 1, L_0xf09e40, L_0xf0a000, C4<0>, C4<0>; +L_0xf09fa0 .functor NOT 1, L_0xf09590, C4<0>, C4<0>, C4<0>; +L_0xf09260 .functor AND 1, L_0xf09fa0, L_0xf09840, C4<1>, C4<1>; +L_0xf092c0 .functor NOT 1, L_0xf09e40, C4<0>, C4<0>, C4<0>; +L_0xf09320 .functor AND 1, L_0xf092c0, L_0xf0a000, C4<1>, C4<1>; +L_0xf070e0 .functor OR 1, L_0xf09260, L_0xf09320, C4<0>, C4<0>; +v0xe8b6d0_0 .alias "a", 0 0, v0xe8c920_0; +v0xe8b770_0 .net "axorb", 0 0, L_0xf09e40; 1 drivers +v0xe8b7f0_0 .alias "b", 0 0, v0xe8c9a0_0; +v0xe8b8a0_0 .alias "borrowin", 0 0, v0xe8ca20_0; +v0xe8b980_0 .alias "borrowout", 0 0, v0xe8cc80_0; +v0xe8ba00_0 .alias "diff", 0 0, v0xe8d7f0_0; +v0xe8ba80_0 .net "nota", 0 0, L_0xf09fa0; 1 drivers +v0xe8bb00_0 .net "notaandb", 0 0, L_0xf09260; 1 drivers +v0xe8bba0_0 .net "notaxorb", 0 0, L_0xf092c0; 1 drivers +v0xe8bc40_0 .net "notaxorbandborrowin", 0 0, L_0xf09320; 1 drivers +S_0xe8aec0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe8a970; + .timescale 0 0; +L_0xf0a560 .functor XOR 1, L_0xf09590, L_0xf09840, C4<0>, C4<0>; +L_0xf0a5c0 .functor XOR 1, L_0xf0a560, L_0xf0a000, C4<0>, C4<0>; +L_0xf0a6c0 .functor NOT 1, L_0xf09590, C4<0>, C4<0>, C4<0>; +L_0xf0a740 .functor AND 1, L_0xf0a6c0, L_0xf09840, C4<1>, C4<1>; +L_0xf0a7f0 .functor NOT 1, L_0xf0a560, C4<0>, C4<0>, C4<0>; +L_0xf0a850 .functor AND 1, L_0xf0a7f0, L_0xf0a000, C4<1>, C4<1>; +L_0xf0a900 .functor OR 1, L_0xf0a740, L_0xf0a850, C4<0>, C4<0>; +v0xe8afb0_0 .alias "a", 0 0, v0xe8c920_0; +v0xe8b030_0 .net "axorb", 0 0, L_0xf0a560; 1 drivers +v0xe8b0d0_0 .alias "b", 0 0, v0xe8c9a0_0; +v0xe8b170_0 .alias "borrowin", 0 0, v0xe8ca20_0; +v0xe8b220_0 .alias "borrowout", 0 0, v0xe8cc00_0; +v0xe8b2c0_0 .alias "diff", 0 0, v0xe8d770_0; +v0xe8b360_0 .net "nota", 0 0, L_0xf0a6c0; 1 drivers +v0xe8b400_0 .net "notaandb", 0 0, L_0xf0a740; 1 drivers +v0xe8b4a0_0 .net "notaxorb", 0 0, L_0xf0a7f0; 1 drivers +v0xe8b540_0 .net "notaxorbandborrowin", 0 0, L_0xf0a850; 1 drivers +S_0xe8ac50 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe8a970; + .timescale 0 0; +v0xe8ad40_0 .alias "address", 2 0, v0xed5210_0; +v0xe8adc0_0 .alias "inputs", 7 0, v0xe8cdb0_0; +v0xe8ae40_0 .alias "out", 0 0, v0xe6eb20_0; +L_0xf0b400 .part/v L_0xf0ad30, v0xed5c50_0, 1; +S_0xe8aa60 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe8a970; + .timescale 0 0; +v0xe8a730_0 .alias "address", 2 0, v0xed5210_0; +v0xe8ab50_0 .alias "inputs", 7 0, v0xe8cd00_0; +v0xe8abd0_0 .alias "out", 0 0, v0xe8caa0_0; +L_0xf0b4a0 .part/v L_0xf08a60, v0xed5c50_0, 1; +S_0xe87d00 .scope module, "a23" "ALU1bit" 5 55, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf0cb10/d .functor XOR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0cb10 .delay (30,30,30) L_0xf0cb10/d; +L_0xf0d0e0/d .functor AND 1, L_0xf0bce0, L_0xf0c5f0, C4<1>, C4<1>; +L_0xf0d0e0 .delay (30,30,30) L_0xf0d0e0/d; +L_0xf0d1a0/d .functor NAND 1, L_0xf0bce0, L_0xf0c5f0, C4<1>, C4<1>; +L_0xf0d1a0 .delay (20,20,20) L_0xf0d1a0/d; +L_0xf0d260/d .functor NOR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0d260 .delay (20,20,20) L_0xf0d260/d; +L_0xf0d320/d .functor OR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0d320 .delay (30,30,30) L_0xf0d320/d; +v0xe89990_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe89a50_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe89af0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe89b90_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe89c10_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe89cb0_0 .net "a", 0 0, L_0xf0bce0; 1 drivers +v0xe89d30_0 .net "b", 0 0, L_0xf0c5f0; 1 drivers +v0xe89db0_0 .net "cin", 0 0, L_0xf0c750; 1 drivers +v0xe89e30_0 .net "cout", 0 0, L_0xf0dbc0; 1 drivers +v0xe89eb0_0 .net "cout_ADD", 0 0, L_0xf0c230; 1 drivers +v0xe89f90_0 .net "cout_SLT", 0 0, L_0xf0cf90; 1 drivers +v0xe8a010_0 .net "cout_SUB", 0 0, L_0xf0b820; 1 drivers +v0xe8a090_0 .net "muxCout", 7 0, L_0xf0b180; 1 drivers +v0xe8a140_0 .net "muxRes", 7 0, L_0xf0d3c0; 1 drivers +v0xe8a270_0 .alias "op", 2 0, v0xed5210_0; +v0xe8a2f0_0 .net "out", 0 0, L_0xf0dad0; 1 drivers +v0xe8a1c0_0 .net "res_ADD", 0 0, L_0xf0b7a0; 1 drivers +v0xe8a460_0 .net "res_AND", 0 0, L_0xf0d0e0; 1 drivers +v0xe8a370_0 .net "res_NAND", 0 0, L_0xf0d1a0; 1 drivers +v0xe8a580_0 .net "res_NOR", 0 0, L_0xf0d260; 1 drivers +v0xe8a4e0_0 .net "res_OR", 0 0, L_0xf0d320; 1 drivers +v0xe8a6b0_0 .net "res_SLT", 0 0, L_0xf0cc10; 1 drivers +v0xe8a630_0 .net "res_SUB", 0 0, L_0xf0c470; 1 drivers +v0xe8a820_0 .net "res_XOR", 0 0, L_0xf0cb10; 1 drivers +LS_0xf0d3c0_0_0 .concat [ 1 1 1 1], L_0xf0b7a0, L_0xf0c470, L_0xf0cb10, L_0xf0cc10; +LS_0xf0d3c0_0_4 .concat [ 1 1 1 1], L_0xf0d0e0, L_0xf0d1a0, L_0xf0d260, L_0xf0d320; +L_0xf0d3c0 .concat [ 4 4 0 0], LS_0xf0d3c0_0_0, LS_0xf0d3c0_0_4; +LS_0xf0b180_0_0 .concat [ 1 1 1 1], L_0xf0c230, L_0xf0b820, C4<0>, L_0xf0cf90; +LS_0xf0b180_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf0b180 .concat [ 4 4 0 0], LS_0xf0b180_0_0, LS_0xf0b180_0_4; +S_0xe890d0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe87d00; + .timescale 0 0; +L_0xf0a0a0/d .functor XOR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0a0a0 .delay (30,30,30) L_0xf0a0a0/d; +L_0xf0b7a0/d .functor XOR 1, L_0xf0a0a0, L_0xf0c750, C4<0>, C4<0>; +L_0xf0b7a0 .delay (30,30,30) L_0xf0b7a0/d; +L_0xf0b930/d .functor AND 1, L_0xf0bce0, L_0xf0c5f0, C4<1>, C4<1>; +L_0xf0b930 .delay (30,30,30) L_0xf0b930/d; +L_0xf0a1f0/d .functor OR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0a1f0 .delay (30,30,30) L_0xf0a1f0/d; +L_0xf0bfb0/d .functor NOT 1, L_0xf0c750, C4<0>, C4<0>, C4<0>; +L_0xf0bfb0 .delay (10,10,10) L_0xf0bfb0/d; +L_0xf0c050/d .functor AND 1, L_0xf0b930, L_0xf0bfb0, C4<1>, C4<1>; +L_0xf0c050 .delay (30,30,30) L_0xf0c050/d; +L_0xf0c140/d .functor AND 1, L_0xf0a1f0, L_0xf0c750, C4<1>, C4<1>; +L_0xf0c140 .delay (30,30,30) L_0xf0c140/d; +L_0xf0c230/d .functor OR 1, L_0xf0c050, L_0xf0c140, C4<0>, C4<0>; +L_0xf0c230 .delay (30,30,30) L_0xf0c230/d; +v0xe891c0_0 .net "_carryin", 0 0, L_0xf0bfb0; 1 drivers +v0xe89280_0 .alias "a", 0 0, v0xe89cb0_0; +v0xe89300_0 .net "aandb", 0 0, L_0xf0b930; 1 drivers +v0xe893a0_0 .net "aorb", 0 0, L_0xf0a1f0; 1 drivers +v0xe89420_0 .alias "b", 0 0, v0xe89d30_0; +v0xe894f0_0 .alias "carryin", 0 0, v0xe89db0_0; +v0xe895c0_0 .alias "carryout", 0 0, v0xe89eb0_0; +v0xe89660_0 .net "outputIfCarryin", 0 0, L_0xf0c050; 1 drivers +v0xe89750_0 .net "outputIf_Carryin", 0 0, L_0xf0c140; 1 drivers +v0xe897f0_0 .net "s", 0 0, L_0xf0a0a0; 1 drivers +v0xe898f0_0 .alias "sum", 0 0, v0xe8a1c0_0; +S_0xe88970 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe87d00; + .timescale 0 0; +L_0xf0c410 .functor XOR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0c470 .functor XOR 1, L_0xf0c410, L_0xf0c750, C4<0>, C4<0>; +L_0xf0c570 .functor NOT 1, L_0xf0bce0, C4<0>, C4<0>, C4<0>; +L_0xf0a160 .functor AND 1, L_0xf0c570, L_0xf0c5f0, C4<1>, C4<1>; +L_0xf0b6d0 .functor NOT 1, L_0xf0c410, C4<0>, C4<0>, C4<0>; +L_0xf0c860 .functor AND 1, L_0xf0b6d0, L_0xf0c750, C4<1>, C4<1>; +L_0xf0b820 .functor OR 1, L_0xf0a160, L_0xf0c860, C4<0>, C4<0>; +v0xe88a60_0 .alias "a", 0 0, v0xe89cb0_0; +v0xe88b00_0 .net "axorb", 0 0, L_0xf0c410; 1 drivers +v0xe88b80_0 .alias "b", 0 0, v0xe89d30_0; +v0xe88c30_0 .alias "borrowin", 0 0, v0xe89db0_0; +v0xe88d10_0 .alias "borrowout", 0 0, v0xe8a010_0; +v0xe88d90_0 .alias "diff", 0 0, v0xe8a630_0; +v0xe88e10_0 .net "nota", 0 0, L_0xf0c570; 1 drivers +v0xe88e90_0 .net "notaandb", 0 0, L_0xf0a160; 1 drivers +v0xe88f30_0 .net "notaxorb", 0 0, L_0xf0b6d0; 1 drivers +v0xe88fd0_0 .net "notaxorbandborrowin", 0 0, L_0xf0c860; 1 drivers +S_0xe88250 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe87d00; + .timescale 0 0; +L_0xf0cbb0 .functor XOR 1, L_0xf0bce0, L_0xf0c5f0, C4<0>, C4<0>; +L_0xf0cc10 .functor XOR 1, L_0xf0cbb0, L_0xf0c750, C4<0>, C4<0>; +L_0xf0cd10 .functor NOT 1, L_0xf0bce0, C4<0>, C4<0>, C4<0>; +L_0xf0cd90 .functor AND 1, L_0xf0cd10, L_0xf0c5f0, C4<1>, C4<1>; +L_0xf0ce40 .functor NOT 1, L_0xf0cbb0, C4<0>, C4<0>, C4<0>; +L_0xf0cea0 .functor AND 1, L_0xf0ce40, L_0xf0c750, C4<1>, C4<1>; +L_0xf0cf90 .functor OR 1, L_0xf0cd90, L_0xf0cea0, C4<0>, C4<0>; +v0xe88340_0 .alias "a", 0 0, v0xe89cb0_0; +v0xe883c0_0 .net "axorb", 0 0, L_0xf0cbb0; 1 drivers +v0xe88460_0 .alias "b", 0 0, v0xe89d30_0; +v0xe88500_0 .alias "borrowin", 0 0, v0xe89db0_0; +v0xe885b0_0 .alias "borrowout", 0 0, v0xe89f90_0; +v0xe88650_0 .alias "diff", 0 0, v0xe8a6b0_0; +v0xe886f0_0 .net "nota", 0 0, L_0xf0cd10; 1 drivers +v0xe88790_0 .net "notaandb", 0 0, L_0xf0cd90; 1 drivers +v0xe88830_0 .net "notaxorb", 0 0, L_0xf0ce40; 1 drivers +v0xe888d0_0 .net "notaxorbandborrowin", 0 0, L_0xf0cea0; 1 drivers +S_0xe87fe0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe87d00; + .timescale 0 0; +v0xe880d0_0 .alias "address", 2 0, v0xed5210_0; +v0xe88150_0 .alias "inputs", 7 0, v0xe8a140_0; +v0xe881d0_0 .alias "out", 0 0, v0xe8a2f0_0; +L_0xf0dad0 .part/v L_0xf0d3c0, v0xed5c50_0, 1; +S_0xe87df0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe87d00; + .timescale 0 0; +v0xe87ac0_0 .alias "address", 2 0, v0xed5210_0; +v0xe87ee0_0 .alias "inputs", 7 0, v0xe8a090_0; +v0xe87f60_0 .alias "out", 0 0, v0xe89e30_0; +L_0xf0dbc0 .part/v L_0xf0b180, v0xed5c50_0, 1; +S_0xe85090 .scope module, "a24" "ALU1bit" 5 56, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf0f2b0/d .functor XOR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0f2b0 .delay (30,30,30) L_0xf0f2b0/d; +L_0xf0f8c0/d .functor AND 1, L_0xf0e2f0, L_0xf0e5a0, C4<1>, C4<1>; +L_0xf0f8c0 .delay (30,30,30) L_0xf0f8c0/d; +L_0xf0f980/d .functor NAND 1, L_0xf0e2f0, L_0xf0e5a0, C4<1>, C4<1>; +L_0xf0f980 .delay (20,20,20) L_0xf0f980/d; +L_0xf0fa40/d .functor NOR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0fa40 .delay (20,20,20) L_0xf0fa40/d; +L_0xf0fb00/d .functor OR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0fb00 .delay (30,30,30) L_0xf0fb00/d; +v0xe86d20_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe86de0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe86e80_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe86f20_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe86fa0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe87040_0 .net "a", 0 0, L_0xf0e2f0; 1 drivers +v0xe870c0_0 .net "b", 0 0, L_0xf0e5a0; 1 drivers +v0xe87140_0 .net "cin", 0 0, L_0xf0edf0; 1 drivers +v0xe871c0_0 .net "cout", 0 0, L_0xf103b0; 1 drivers +v0xe87240_0 .net "cout_ADD", 0 0, L_0xf0e9d0; 1 drivers +v0xe87320_0 .net "cout_SLT", 0 0, L_0xf0f770; 1 drivers +v0xe873a0_0 .net "cout_SUB", 0 0, L_0xf0df10; 1 drivers +v0xe87420_0 .net "muxCout", 7 0, L_0xf0d790; 1 drivers +v0xe874d0_0 .net "muxRes", 7 0, L_0xf0fba0; 1 drivers +v0xe87600_0 .alias "op", 2 0, v0xed5210_0; +v0xe87680_0 .net "out", 0 0, L_0xf102c0; 1 drivers +v0xe87550_0 .net "res_ADD", 0 0, L_0xf0deb0; 1 drivers +v0xe877f0_0 .net "res_AND", 0 0, L_0xf0f8c0; 1 drivers +v0xe87700_0 .net "res_NAND", 0 0, L_0xf0f980; 1 drivers +v0xe87910_0 .net "res_NOR", 0 0, L_0xf0fa40; 1 drivers +v0xe87870_0 .net "res_OR", 0 0, L_0xf0fb00; 1 drivers +v0xe87a40_0 .net "res_SLT", 0 0, L_0xf0f3d0; 1 drivers +v0xe879c0_0 .net "res_SUB", 0 0, L_0xf0ec50; 1 drivers +v0xe87bb0_0 .net "res_XOR", 0 0, L_0xf0f2b0; 1 drivers +LS_0xf0fba0_0_0 .concat [ 1 1 1 1], L_0xf0deb0, L_0xf0ec50, L_0xf0f2b0, L_0xf0f3d0; +LS_0xf0fba0_0_4 .concat [ 1 1 1 1], L_0xf0f8c0, L_0xf0f980, L_0xf0fa40, L_0xf0fb00; +L_0xf0fba0 .concat [ 4 4 0 0], LS_0xf0fba0_0_0, LS_0xf0fba0_0_4; +LS_0xf0d790_0_0 .concat [ 1 1 1 1], L_0xf0e9d0, L_0xf0df10, C4<0>, L_0xf0f770; +LS_0xf0d790_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf0d790 .concat [ 4 4 0 0], LS_0xf0d790_0_0, LS_0xf0d790_0_4; +S_0xe86460 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe85090; + .timescale 0 0; +L_0xf0c690/d .functor XOR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0c690 .delay (30,30,30) L_0xf0c690/d; +L_0xf0deb0/d .functor XOR 1, L_0xf0c690, L_0xf0edf0, C4<0>, C4<0>; +L_0xf0deb0 .delay (30,30,30) L_0xf0deb0/d; +L_0xf0e000/d .functor AND 1, L_0xf0e2f0, L_0xf0e5a0, C4<1>, C4<1>; +L_0xf0e000 .delay (30,30,30) L_0xf0e000/d; +L_0xf0c7f0/d .functor OR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0c7f0 .delay (30,30,30) L_0xf0c7f0/d; +L_0xf0e6d0/d .functor NOT 1, L_0xf0edf0, C4<0>, C4<0>, C4<0>; +L_0xf0e6d0 .delay (10,10,10) L_0xf0e6d0/d; +L_0xf0e770/d .functor AND 1, L_0xf0e000, L_0xf0e6d0, C4<1>, C4<1>; +L_0xf0e770 .delay (30,30,30) L_0xf0e770/d; +L_0xf0e8c0/d .functor AND 1, L_0xf0c7f0, L_0xf0edf0, C4<1>, C4<1>; +L_0xf0e8c0 .delay (30,30,30) L_0xf0e8c0/d; +L_0xf0e9d0/d .functor OR 1, L_0xf0e770, L_0xf0e8c0, C4<0>, C4<0>; +L_0xf0e9d0 .delay (30,30,30) L_0xf0e9d0/d; +v0xe86550_0 .net "_carryin", 0 0, L_0xf0e6d0; 1 drivers +v0xe86610_0 .alias "a", 0 0, v0xe87040_0; +v0xe86690_0 .net "aandb", 0 0, L_0xf0e000; 1 drivers +v0xe86730_0 .net "aorb", 0 0, L_0xf0c7f0; 1 drivers +v0xe867b0_0 .alias "b", 0 0, v0xe870c0_0; +v0xe86880_0 .alias "carryin", 0 0, v0xe87140_0; +v0xe86950_0 .alias "carryout", 0 0, v0xe87240_0; +v0xe869f0_0 .net "outputIfCarryin", 0 0, L_0xf0e770; 1 drivers +v0xe86ae0_0 .net "outputIf_Carryin", 0 0, L_0xf0e8c0; 1 drivers +v0xe86b80_0 .net "s", 0 0, L_0xf0c690; 1 drivers +v0xe86c80_0 .alias "sum", 0 0, v0xe87550_0; +S_0xe85d00 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe85090; + .timescale 0 0; +L_0xf0ebf0 .functor XOR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0ec50 .functor XOR 1, L_0xf0ebf0, L_0xf0edf0, C4<0>, C4<0>; +L_0xf0ed70 .functor NOT 1, L_0xf0e2f0, C4<0>, C4<0>, C4<0>; +L_0xf0dd50 .functor AND 1, L_0xf0ed70, L_0xf0e5a0, C4<1>, C4<1>; +L_0xf0ddb0 .functor NOT 1, L_0xf0ebf0, C4<0>, C4<0>, C4<0>; +L_0xf0de10 .functor AND 1, L_0xf0ddb0, L_0xf0edf0, C4<1>, C4<1>; +L_0xf0df10 .functor OR 1, L_0xf0dd50, L_0xf0de10, C4<0>, C4<0>; +v0xe85df0_0 .alias "a", 0 0, v0xe87040_0; +v0xe85e90_0 .net "axorb", 0 0, L_0xf0ebf0; 1 drivers +v0xe85f10_0 .alias "b", 0 0, v0xe870c0_0; +v0xe85fc0_0 .alias "borrowin", 0 0, v0xe87140_0; +v0xe860a0_0 .alias "borrowout", 0 0, v0xe873a0_0; +v0xe86120_0 .alias "diff", 0 0, v0xe879c0_0; +v0xe861a0_0 .net "nota", 0 0, L_0xf0ed70; 1 drivers +v0xe86220_0 .net "notaandb", 0 0, L_0xf0dd50; 1 drivers +v0xe862c0_0 .net "notaxorb", 0 0, L_0xf0ddb0; 1 drivers +v0xe86360_0 .net "notaxorbandborrowin", 0 0, L_0xf0de10; 1 drivers +S_0xe855e0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe85090; + .timescale 0 0; +L_0xf0f350 .functor XOR 1, L_0xf0e2f0, L_0xf0e5a0, C4<0>, C4<0>; +L_0xf0f3d0 .functor XOR 1, L_0xf0f350, L_0xf0edf0, C4<0>, C4<0>; +L_0xf0f4f0 .functor NOT 1, L_0xf0e2f0, C4<0>, C4<0>, C4<0>; +L_0xf0f570 .functor AND 1, L_0xf0f4f0, L_0xf0e5a0, C4<1>, C4<1>; +L_0xf0f620 .functor NOT 1, L_0xf0f350, C4<0>, C4<0>, C4<0>; +L_0xf0f680 .functor AND 1, L_0xf0f620, L_0xf0edf0, C4<1>, C4<1>; +L_0xf0f770 .functor OR 1, L_0xf0f570, L_0xf0f680, C4<0>, C4<0>; +v0xe856d0_0 .alias "a", 0 0, v0xe87040_0; +v0xe85750_0 .net "axorb", 0 0, L_0xf0f350; 1 drivers +v0xe857f0_0 .alias "b", 0 0, v0xe870c0_0; +v0xe85890_0 .alias "borrowin", 0 0, v0xe87140_0; +v0xe85940_0 .alias "borrowout", 0 0, v0xe87320_0; +v0xe859e0_0 .alias "diff", 0 0, v0xe87a40_0; +v0xe85a80_0 .net "nota", 0 0, L_0xf0f4f0; 1 drivers +v0xe85b20_0 .net "notaandb", 0 0, L_0xf0f570; 1 drivers +v0xe85bc0_0 .net "notaxorb", 0 0, L_0xf0f620; 1 drivers +v0xe85c60_0 .net "notaxorbandborrowin", 0 0, L_0xf0f680; 1 drivers +S_0xe85370 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe85090; + .timescale 0 0; +v0xe85460_0 .alias "address", 2 0, v0xed5210_0; +v0xe854e0_0 .alias "inputs", 7 0, v0xe874d0_0; +v0xe85560_0 .alias "out", 0 0, v0xe87680_0; +L_0xf102c0 .part/v L_0xf0fba0, v0xed5c50_0, 1; +S_0xe85180 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe85090; + .timescale 0 0; +v0xe84e50_0 .alias "address", 2 0, v0xed5210_0; +v0xe85270_0 .alias "inputs", 7 0, v0xe87420_0; +v0xe852f0_0 .alias "out", 0 0, v0xe871c0_0; +L_0xf103b0 .part/v L_0xf0d790, v0xed5c50_0, 1; +S_0xe82420 .scope module, "a25" "ALU1bit" 5 57, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf11ae0/d .functor XOR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf11ae0 .delay (30,30,30) L_0xf11ae0/d; +L_0xf120b0/d .functor AND 1, L_0xf10c40, L_0xf115c0, C4<1>, C4<1>; +L_0xf120b0 .delay (30,30,30) L_0xf120b0/d; +L_0xf12170/d .functor NAND 1, L_0xf10c40, L_0xf115c0, C4<1>, C4<1>; +L_0xf12170 .delay (20,20,20) L_0xf12170/d; +L_0xf12230/d .functor NOR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf12230 .delay (20,20,20) L_0xf12230/d; +L_0xf122f0/d .functor OR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf122f0 .delay (30,30,30) L_0xf122f0/d; +v0xe840b0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe84170_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe84210_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe842b0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe84330_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe843d0_0 .net "a", 0 0, L_0xf10c40; 1 drivers +v0xe84450_0 .net "b", 0 0, L_0xf115c0; 1 drivers +v0xe844d0_0 .net "cin", 0 0, L_0xf11720; 1 drivers +v0xe84550_0 .net "cout", 0 0, L_0xf12b40; 1 drivers +v0xe845d0_0 .net "cout_ADD", 0 0, L_0xf111a0; 1 drivers +v0xe846b0_0 .net "cout_SLT", 0 0, L_0xf11f60; 1 drivers +v0xe84730_0 .net "cout_SUB", 0 0, L_0xf10710; 1 drivers +v0xe847b0_0 .net "muxCout", 7 0, L_0xf0fff0; 1 drivers +v0xe84860_0 .net "muxRes", 7 0, L_0xf12390; 1 drivers +v0xe84990_0 .alias "op", 2 0, v0xed5210_0; +v0xe84a10_0 .net "out", 0 0, L_0xf12aa0; 1 drivers +v0xe848e0_0 .net "res_ADD", 0 0, L_0xf106b0; 1 drivers +v0xe84b80_0 .net "res_AND", 0 0, L_0xf120b0; 1 drivers +v0xe84a90_0 .net "res_NAND", 0 0, L_0xf12170; 1 drivers +v0xe84ca0_0 .net "res_NOR", 0 0, L_0xf12230; 1 drivers +v0xe84c00_0 .net "res_OR", 0 0, L_0xf122f0; 1 drivers +v0xe84dd0_0 .net "res_SLT", 0 0, L_0xf11be0; 1 drivers +v0xe84d50_0 .net "res_SUB", 0 0, L_0xf11420; 1 drivers +v0xe84f40_0 .net "res_XOR", 0 0, L_0xf11ae0; 1 drivers +LS_0xf12390_0_0 .concat [ 1 1 1 1], L_0xf106b0, L_0xf11420, L_0xf11ae0, L_0xf11be0; +LS_0xf12390_0_4 .concat [ 1 1 1 1], L_0xf120b0, L_0xf12170, L_0xf12230, L_0xf122f0; +L_0xf12390 .concat [ 4 4 0 0], LS_0xf12390_0_0, LS_0xf12390_0_4; +LS_0xf0fff0_0_0 .concat [ 1 1 1 1], L_0xf111a0, L_0xf10710, C4<0>, L_0xf11f60; +LS_0xf0fff0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf0fff0 .concat [ 4 4 0 0], LS_0xf0fff0_0_0, LS_0xf0fff0_0_4; +S_0xe837f0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe82420; + .timescale 0 0; +L_0xf0ee90/d .functor XOR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf0ee90 .delay (30,30,30) L_0xf0ee90/d; +L_0xf106b0/d .functor XOR 1, L_0xf0ee90, L_0xf11720, C4<0>, C4<0>; +L_0xf106b0 .delay (30,30,30) L_0xf106b0/d; +L_0xf10800/d .functor AND 1, L_0xf10c40, L_0xf115c0, C4<1>, C4<1>; +L_0xf10800 .delay (30,30,30) L_0xf10800/d; +L_0xf108c0/d .functor OR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf108c0 .delay (30,30,30) L_0xf108c0/d; +L_0xf0efe0/d .functor NOT 1, L_0xf11720, C4<0>, C4<0>, C4<0>; +L_0xf0efe0 .delay (10,10,10) L_0xf0efe0/d; +L_0xf10f60/d .functor AND 1, L_0xf10800, L_0xf0efe0, C4<1>, C4<1>; +L_0xf10f60 .delay (30,30,30) L_0xf10f60/d; +L_0xf11090/d .functor AND 1, L_0xf108c0, L_0xf11720, C4<1>, C4<1>; +L_0xf11090 .delay (30,30,30) L_0xf11090/d; +L_0xf111a0/d .functor OR 1, L_0xf10f60, L_0xf11090, C4<0>, C4<0>; +L_0xf111a0 .delay (30,30,30) L_0xf111a0/d; +v0xe838e0_0 .net "_carryin", 0 0, L_0xf0efe0; 1 drivers +v0xe839a0_0 .alias "a", 0 0, v0xe843d0_0; +v0xe83a20_0 .net "aandb", 0 0, L_0xf10800; 1 drivers +v0xe83ac0_0 .net "aorb", 0 0, L_0xf108c0; 1 drivers +v0xe83b40_0 .alias "b", 0 0, v0xe84450_0; +v0xe83c10_0 .alias "carryin", 0 0, v0xe844d0_0; +v0xe83ce0_0 .alias "carryout", 0 0, v0xe845d0_0; +v0xe83d80_0 .net "outputIfCarryin", 0 0, L_0xf10f60; 1 drivers +v0xe83e70_0 .net "outputIf_Carryin", 0 0, L_0xf11090; 1 drivers +v0xe83f10_0 .net "s", 0 0, L_0xf0ee90; 1 drivers +v0xe84010_0 .alias "sum", 0 0, v0xe848e0_0; +S_0xe83090 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe82420; + .timescale 0 0; +L_0xf113c0 .functor XOR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf11420 .functor XOR 1, L_0xf113c0, L_0xf11720, C4<0>, C4<0>; +L_0xf11540 .functor NOT 1, L_0xf10c40, C4<0>, C4<0>, C4<0>; +L_0xf0ef50 .functor AND 1, L_0xf11540, L_0xf115c0, C4<1>, C4<1>; +L_0xf105e0 .functor NOT 1, L_0xf113c0, C4<0>, C4<0>, C4<0>; +L_0xf11830 .functor AND 1, L_0xf105e0, L_0xf11720, C4<1>, C4<1>; +L_0xf10710 .functor OR 1, L_0xf0ef50, L_0xf11830, C4<0>, C4<0>; +v0xe83180_0 .alias "a", 0 0, v0xe843d0_0; +v0xe83220_0 .net "axorb", 0 0, L_0xf113c0; 1 drivers +v0xe832a0_0 .alias "b", 0 0, v0xe84450_0; +v0xe83350_0 .alias "borrowin", 0 0, v0xe844d0_0; +v0xe83430_0 .alias "borrowout", 0 0, v0xe84730_0; +v0xe834b0_0 .alias "diff", 0 0, v0xe84d50_0; +v0xe83530_0 .net "nota", 0 0, L_0xf11540; 1 drivers +v0xe835b0_0 .net "notaandb", 0 0, L_0xf0ef50; 1 drivers +v0xe83650_0 .net "notaxorb", 0 0, L_0xf105e0; 1 drivers +v0xe836f0_0 .net "notaxorbandborrowin", 0 0, L_0xf11830; 1 drivers +S_0xe82970 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe82420; + .timescale 0 0; +L_0xf11b80 .functor XOR 1, L_0xf10c40, L_0xf115c0, C4<0>, C4<0>; +L_0xf11be0 .functor XOR 1, L_0xf11b80, L_0xf11720, C4<0>, C4<0>; +L_0xf11ce0 .functor NOT 1, L_0xf10c40, C4<0>, C4<0>, C4<0>; +L_0xf11d60 .functor AND 1, L_0xf11ce0, L_0xf115c0, C4<1>, C4<1>; +L_0xf11e10 .functor NOT 1, L_0xf11b80, C4<0>, C4<0>, C4<0>; +L_0xf11e70 .functor AND 1, L_0xf11e10, L_0xf11720, C4<1>, C4<1>; +L_0xf11f60 .functor OR 1, L_0xf11d60, L_0xf11e70, C4<0>, C4<0>; +v0xe82a60_0 .alias "a", 0 0, v0xe843d0_0; +v0xe82ae0_0 .net "axorb", 0 0, L_0xf11b80; 1 drivers +v0xe82b80_0 .alias "b", 0 0, v0xe84450_0; +v0xe82c20_0 .alias "borrowin", 0 0, v0xe844d0_0; +v0xe82cd0_0 .alias "borrowout", 0 0, v0xe846b0_0; +v0xe82d70_0 .alias "diff", 0 0, v0xe84dd0_0; +v0xe82e10_0 .net "nota", 0 0, L_0xf11ce0; 1 drivers +v0xe82eb0_0 .net "notaandb", 0 0, L_0xf11d60; 1 drivers +v0xe82f50_0 .net "notaxorb", 0 0, L_0xf11e10; 1 drivers +v0xe82ff0_0 .net "notaxorbandborrowin", 0 0, L_0xf11e70; 1 drivers +S_0xe82700 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe82420; + .timescale 0 0; +v0xe827f0_0 .alias "address", 2 0, v0xed5210_0; +v0xe82870_0 .alias "inputs", 7 0, v0xe84860_0; +v0xe828f0_0 .alias "out", 0 0, v0xe84a10_0; +L_0xf12aa0 .part/v L_0xf12390, v0xed5c50_0, 1; +S_0xe82510 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe82420; + .timescale 0 0; +v0xe821e0_0 .alias "address", 2 0, v0xed5210_0; +v0xe82600_0 .alias "inputs", 7 0, v0xe847b0_0; +v0xe82680_0 .alias "out", 0 0, v0xe84550_0; +L_0xf12b40 .part/v L_0xf0fff0, v0xed5c50_0, 1; +S_0xe7f7b0 .scope module, "a26" "ALU1bit" 5 58, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf14040/d .functor XOR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xf14040 .delay (30,30,30) L_0xf14040/d; +L_0xf145f0/d .functor AND 1, L_0xf13270, L_0xf13b80, C4<1>, C4<1>; +L_0xf145f0 .delay (30,30,30) L_0xf145f0/d; +L_0xf14690/d .functor NAND 1, L_0xf13270, L_0xf13b80, C4<1>, C4<1>; +L_0xf14690 .delay (20,20,20) L_0xf14690/d; +L_0xf14730/d .functor NOR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xf14730 .delay (20,20,20) L_0xf14730/d; +L_0xf147d0/d .functor OR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xf147d0 .delay (30,30,30) L_0xf147d0/d; +v0xe81440_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe81500_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe815a0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe81640_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe816c0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe81760_0 .net "a", 0 0, L_0xf13270; 1 drivers +v0xe817e0_0 .net "b", 0 0, L_0xf13b80; 1 drivers +v0xe81860_0 .net "cin", 0 0, L_0xf13ce0; 1 drivers +v0xe818e0_0 .net "cout", 0 0, L_0xf14ff0; 1 drivers +v0xe81960_0 .net "cout_ADD", 0 0, L_0xf137e0; 1 drivers +v0xe81a40_0 .net "cout_SLT", 0 0, L_0xf144a0; 1 drivers +v0xe81ac0_0 .net "cout_SUB", 0 0, L_0xf12de0; 1 drivers +v0xe81b40_0 .net "muxCout", 7 0, L_0xf12720; 1 drivers +v0xe81bf0_0 .net "muxRes", 7 0, L_0xf14870; 1 drivers +v0xe81d20_0 .alias "op", 2 0, v0xed5210_0; +v0xe81da0_0 .net "out", 0 0, L_0xf129f0; 1 drivers +v0xe81c70_0 .net "res_ADD", 0 0, L_0xe8b920; 1 drivers +v0xe81f10_0 .net "res_AND", 0 0, L_0xf145f0; 1 drivers +v0xe81e20_0 .net "res_NAND", 0 0, L_0xf14690; 1 drivers +v0xe82030_0 .net "res_NOR", 0 0, L_0xf14730; 1 drivers +v0xe81f90_0 .net "res_OR", 0 0, L_0xf147d0; 1 drivers +v0xe82160_0 .net "res_SLT", 0 0, L_0xf14140; 1 drivers +v0xe820e0_0 .net "res_SUB", 0 0, L_0xf13a20; 1 drivers +v0xe822d0_0 .net "res_XOR", 0 0, L_0xf14040; 1 drivers +LS_0xf14870_0_0 .concat [ 1 1 1 1], L_0xe8b920, L_0xf13a20, L_0xf14040, L_0xf14140; +LS_0xf14870_0_4 .concat [ 1 1 1 1], L_0xf145f0, L_0xf14690, L_0xf14730, L_0xf147d0; +L_0xf14870 .concat [ 4 4 0 0], LS_0xf14870_0_0, LS_0xf14870_0_4; +LS_0xf12720_0_0 .concat [ 1 1 1 1], L_0xf137e0, L_0xf12de0, C4<0>, L_0xf144a0; +LS_0xf12720_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf12720 .concat [ 4 4 0 0], LS_0xf12720_0_0, LS_0xf12720_0_4; +S_0xe80b80 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe7f7b0; + .timescale 0 0; +L_0xe8a400/d .functor XOR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xe8a400 .delay (30,30,30) L_0xe8a400/d; +L_0xe8b920/d .functor XOR 1, L_0xe8a400, L_0xf13ce0, C4<0>, C4<0>; +L_0xe8b920 .delay (30,30,30) L_0xe8b920/d; +L_0xf12ef0/d .functor AND 1, L_0xf13270, L_0xf13b80, C4<1>, C4<1>; +L_0xf12ef0 .delay (30,30,30) L_0xf12ef0/d; +L_0xf12fb0/d .functor OR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xf12fb0 .delay (30,30,30) L_0xf12fb0/d; +L_0xf10ef0/d .functor NOT 1, L_0xf13ce0, C4<0>, C4<0>, C4<0>; +L_0xf10ef0 .delay (10,10,10) L_0xf10ef0/d; +L_0xf117c0/d .functor AND 1, L_0xf12ef0, L_0xf10ef0, C4<1>, C4<1>; +L_0xf117c0 .delay (30,30,30) L_0xf117c0/d; +L_0xf136f0/d .functor AND 1, L_0xf12fb0, L_0xf13ce0, C4<1>, C4<1>; +L_0xf136f0 .delay (30,30,30) L_0xf136f0/d; +L_0xf137e0/d .functor OR 1, L_0xf117c0, L_0xf136f0, C4<0>, C4<0>; +L_0xf137e0 .delay (30,30,30) L_0xf137e0/d; +v0xe80c70_0 .net "_carryin", 0 0, L_0xf10ef0; 1 drivers +v0xe80d30_0 .alias "a", 0 0, v0xe81760_0; +v0xe80db0_0 .net "aandb", 0 0, L_0xf12ef0; 1 drivers +v0xe80e50_0 .net "aorb", 0 0, L_0xf12fb0; 1 drivers +v0xe80ed0_0 .alias "b", 0 0, v0xe817e0_0; +v0xe80fa0_0 .alias "carryin", 0 0, v0xe81860_0; +v0xe81070_0 .alias "carryout", 0 0, v0xe81960_0; +v0xe81110_0 .net "outputIfCarryin", 0 0, L_0xf117c0; 1 drivers +v0xe81200_0 .net "outputIf_Carryin", 0 0, L_0xf136f0; 1 drivers +v0xe812a0_0 .net "s", 0 0, L_0xe8a400; 1 drivers +v0xe813a0_0 .alias "sum", 0 0, v0xe81c70_0; +S_0xe80420 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe7f7b0; + .timescale 0 0; +L_0xf139c0 .functor XOR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xf13a20 .functor XOR 1, L_0xf139c0, L_0xf13ce0, C4<0>, C4<0>; +L_0xf13b20 .functor NOT 1, L_0xf13270, C4<0>, C4<0>, C4<0>; +L_0xf12c80 .functor AND 1, L_0xf13b20, L_0xf13b80, C4<1>, C4<1>; +L_0xf12ce0 .functor NOT 1, L_0xf139c0, C4<0>, C4<0>, C4<0>; +L_0xf12d40 .functor AND 1, L_0xf12ce0, L_0xf13ce0, C4<1>, C4<1>; +L_0xf12de0 .functor OR 1, L_0xf12c80, L_0xf12d40, C4<0>, C4<0>; +v0xe80510_0 .alias "a", 0 0, v0xe81760_0; +v0xe805b0_0 .net "axorb", 0 0, L_0xf139c0; 1 drivers +v0xe80630_0 .alias "b", 0 0, v0xe817e0_0; +v0xe806e0_0 .alias "borrowin", 0 0, v0xe81860_0; +v0xe807c0_0 .alias "borrowout", 0 0, v0xe81ac0_0; +v0xe80840_0 .alias "diff", 0 0, v0xe820e0_0; +v0xe808c0_0 .net "nota", 0 0, L_0xf13b20; 1 drivers +v0xe80940_0 .net "notaandb", 0 0, L_0xf12c80; 1 drivers +v0xe809e0_0 .net "notaxorb", 0 0, L_0xf12ce0; 1 drivers +v0xe80a80_0 .net "notaxorbandborrowin", 0 0, L_0xf12d40; 1 drivers +S_0xe7fd00 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe7f7b0; + .timescale 0 0; +L_0xf140e0 .functor XOR 1, L_0xf13270, L_0xf13b80, C4<0>, C4<0>; +L_0xf14140 .functor XOR 1, L_0xf140e0, L_0xf13ce0, C4<0>, C4<0>; +L_0xf14240 .functor NOT 1, L_0xf13270, C4<0>, C4<0>, C4<0>; +L_0xf142a0 .functor AND 1, L_0xf14240, L_0xf13b80, C4<1>, C4<1>; +L_0xf14350 .functor NOT 1, L_0xf140e0, C4<0>, C4<0>, C4<0>; +L_0xf143b0 .functor AND 1, L_0xf14350, L_0xf13ce0, C4<1>, C4<1>; +L_0xf144a0 .functor OR 1, L_0xf142a0, L_0xf143b0, C4<0>, C4<0>; +v0xe7fdf0_0 .alias "a", 0 0, v0xe81760_0; +v0xe7fe70_0 .net "axorb", 0 0, L_0xf140e0; 1 drivers +v0xe7ff10_0 .alias "b", 0 0, v0xe817e0_0; +v0xe7ffb0_0 .alias "borrowin", 0 0, v0xe81860_0; +v0xe80060_0 .alias "borrowout", 0 0, v0xe81a40_0; +v0xe80100_0 .alias "diff", 0 0, v0xe82160_0; +v0xe801a0_0 .net "nota", 0 0, L_0xf14240; 1 drivers +v0xe80240_0 .net "notaandb", 0 0, L_0xf142a0; 1 drivers +v0xe802e0_0 .net "notaxorb", 0 0, L_0xf14350; 1 drivers +v0xe80380_0 .net "notaxorbandborrowin", 0 0, L_0xf143b0; 1 drivers +S_0xe7fa90 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe7f7b0; + .timescale 0 0; +v0xe7fb80_0 .alias "address", 2 0, v0xed5210_0; +v0xe7fc00_0 .alias "inputs", 7 0, v0xe81bf0_0; +v0xe7fc80_0 .alias "out", 0 0, v0xe81da0_0; +L_0xf129f0 .part/v L_0xf14870, v0xed5c50_0, 1; +S_0xe7f8a0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe7f7b0; + .timescale 0 0; +v0xe7f570_0 .alias "address", 2 0, v0xed5210_0; +v0xe7f990_0 .alias "inputs", 7 0, v0xe81b40_0; +v0xe7fa10_0 .alias "out", 0 0, v0xe818e0_0; +L_0xf14ff0 .part/v L_0xf12720, v0xed5c50_0, 1; +S_0xe7cb40 .scope module, "a27" "ALU1bit" 5 59, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf16550/d .functor XOR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xf16550 .delay (30,30,30) L_0xf16550/d; +L_0xf16b00/d .functor AND 1, L_0xf158d0, L_0xf15b80, C4<1>, C4<1>; +L_0xf16b00 .delay (30,30,30) L_0xf16b00/d; +L_0xf16ba0/d .functor NAND 1, L_0xf158d0, L_0xf15b80, C4<1>, C4<1>; +L_0xf16ba0 .delay (20,20,20) L_0xf16ba0/d; +L_0xf16c40/d .functor NOR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xf16c40 .delay (20,20,20) L_0xf16c40/d; +L_0xf16ce0/d .functor OR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xf16ce0 .delay (30,30,30) L_0xf16ce0/d; +v0xe7e7d0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe7e890_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe7e930_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe7e9d0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe7ea50_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe7eaf0_0 .net "a", 0 0, L_0xf158d0; 1 drivers +v0xe7eb70_0 .net "b", 0 0, L_0xf15b80; 1 drivers +v0xe7ebf0_0 .net "cin", 0 0, L_0xf16080; 1 drivers +v0xe7ec70_0 .net "cout", 0 0, L_0xf17580; 1 drivers +v0xe7ecf0_0 .net "cout_ADD", 0 0, L_0xf15d30; 1 drivers +v0xe7edd0_0 .net "cout_SLT", 0 0, L_0xf169b0; 1 drivers +v0xe7ee50_0 .net "cout_SUB", 0 0, L_0xf16450; 1 drivers +v0xe7eed0_0 .net "muxCout", 7 0, L_0xf14c40; 1 drivers +v0xe7ef80_0 .net "muxRes", 7 0, L_0xf16d80; 1 drivers +v0xe7f0b0_0 .alias "op", 2 0, v0xed5210_0; +v0xe7f130_0 .net "out", 0 0, L_0xf174e0; 1 drivers +v0xe7f000_0 .net "res_ADD", 0 0, L_0xf13c20; 1 drivers +v0xe7f2a0_0 .net "res_AND", 0 0, L_0xf16b00; 1 drivers +v0xe7f1b0_0 .net "res_NAND", 0 0, L_0xf16ba0; 1 drivers +v0xe7f3c0_0 .net "res_NOR", 0 0, L_0xf16c40; 1 drivers +v0xe7f320_0 .net "res_OR", 0 0, L_0xf16ce0; 1 drivers +v0xe7f4f0_0 .net "res_SLT", 0 0, L_0xf16650; 1 drivers +v0xe7f470_0 .net "res_SUB", 0 0, L_0xf15f20; 1 drivers +v0xe7f660_0 .net "res_XOR", 0 0, L_0xf16550; 1 drivers +LS_0xf16d80_0_0 .concat [ 1 1 1 1], L_0xf13c20, L_0xf15f20, L_0xf16550, L_0xf16650; +LS_0xf16d80_0_4 .concat [ 1 1 1 1], L_0xf16b00, L_0xf16ba0, L_0xf16c40, L_0xf16ce0; +L_0xf16d80 .concat [ 4 4 0 0], LS_0xf16d80_0_0, LS_0xf16d80_0_4; +LS_0xf14c40_0_0 .concat [ 1 1 1 1], L_0xf15d30, L_0xf16450, C4<0>, L_0xf169b0; +LS_0xf14c40_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf14c40 .concat [ 4 4 0 0], LS_0xf14c40_0_0, LS_0xf14c40_0_4; +S_0xe7df10 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe7cb40; + .timescale 0 0; +L_0xe81eb0/d .functor XOR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xe81eb0 .delay (30,30,30) L_0xe81eb0/d; +L_0xf13c20/d .functor XOR 1, L_0xe81eb0, L_0xf16080, C4<0>, C4<0>; +L_0xf13c20 .delay (30,30,30) L_0xf13c20/d; +L_0xf15310/d .functor AND 1, L_0xf158d0, L_0xf15b80, C4<1>, C4<1>; +L_0xf15310 .delay (30,30,30) L_0xf15310/d; +L_0xf153d0/d .functor OR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xf153d0 .delay (30,30,30) L_0xf153d0/d; +L_0xf15490/d .functor NOT 1, L_0xf16080, C4<0>, C4<0>, C4<0>; +L_0xf15490 .delay (10,10,10) L_0xf15490/d; +L_0xf15530/d .functor AND 1, L_0xf15310, L_0xf15490, C4<1>, C4<1>; +L_0xf15530 .delay (30,30,30) L_0xf15530/d; +L_0xf15c40/d .functor AND 1, L_0xf153d0, L_0xf16080, C4<1>, C4<1>; +L_0xf15c40 .delay (30,30,30) L_0xf15c40/d; +L_0xf15d30/d .functor OR 1, L_0xf15530, L_0xf15c40, C4<0>, C4<0>; +L_0xf15d30 .delay (30,30,30) L_0xf15d30/d; +v0xe7e000_0 .net "_carryin", 0 0, L_0xf15490; 1 drivers +v0xe7e0c0_0 .alias "a", 0 0, v0xe7eaf0_0; +v0xe7e140_0 .net "aandb", 0 0, L_0xf15310; 1 drivers +v0xe7e1e0_0 .net "aorb", 0 0, L_0xf153d0; 1 drivers +v0xe7e260_0 .alias "b", 0 0, v0xe7eb70_0; +v0xe7e330_0 .alias "carryin", 0 0, v0xe7ebf0_0; +v0xe7e400_0 .alias "carryout", 0 0, v0xe7ecf0_0; +v0xe7e4a0_0 .net "outputIfCarryin", 0 0, L_0xf15530; 1 drivers +v0xe7e590_0 .net "outputIf_Carryin", 0 0, L_0xf15c40; 1 drivers +v0xe7e630_0 .net "s", 0 0, L_0xe81eb0; 1 drivers +v0xe7e730_0 .alias "sum", 0 0, v0xe7f000_0; +S_0xe7d7b0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe7cb40; + .timescale 0 0; +L_0xf15ec0 .functor XOR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xf15f20 .functor XOR 1, L_0xf15ec0, L_0xf16080, C4<0>, C4<0>; +L_0xf16020 .functor NOT 1, L_0xf158d0, C4<0>, C4<0>, C4<0>; +L_0xf13520 .functor AND 1, L_0xf16020, L_0xf15b80, C4<1>, C4<1>; +L_0xf13580 .functor NOT 1, L_0xf15ec0, C4<0>, C4<0>, C4<0>; +L_0xf135e0 .functor AND 1, L_0xf13580, L_0xf16080, C4<1>, C4<1>; +L_0xf16450 .functor OR 1, L_0xf13520, L_0xf135e0, C4<0>, C4<0>; +v0xe7d8a0_0 .alias "a", 0 0, v0xe7eaf0_0; +v0xe7d940_0 .net "axorb", 0 0, L_0xf15ec0; 1 drivers +v0xe7d9c0_0 .alias "b", 0 0, v0xe7eb70_0; +v0xe7da70_0 .alias "borrowin", 0 0, v0xe7ebf0_0; +v0xe7db50_0 .alias "borrowout", 0 0, v0xe7ee50_0; +v0xe7dbd0_0 .alias "diff", 0 0, v0xe7f470_0; +v0xe7dc50_0 .net "nota", 0 0, L_0xf16020; 1 drivers +v0xe7dcd0_0 .net "notaandb", 0 0, L_0xf13520; 1 drivers +v0xe7dd70_0 .net "notaxorb", 0 0, L_0xf13580; 1 drivers +v0xe7de10_0 .net "notaxorbandborrowin", 0 0, L_0xf135e0; 1 drivers +S_0xe7d090 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe7cb40; + .timescale 0 0; +L_0xf165f0 .functor XOR 1, L_0xf158d0, L_0xf15b80, C4<0>, C4<0>; +L_0xf16650 .functor XOR 1, L_0xf165f0, L_0xf16080, C4<0>, C4<0>; +L_0xf16750 .functor NOT 1, L_0xf158d0, C4<0>, C4<0>, C4<0>; +L_0xf167b0 .functor AND 1, L_0xf16750, L_0xf15b80, C4<1>, C4<1>; +L_0xf16860 .functor NOT 1, L_0xf165f0, C4<0>, C4<0>, C4<0>; +L_0xf168c0 .functor AND 1, L_0xf16860, L_0xf16080, C4<1>, C4<1>; +L_0xf169b0 .functor OR 1, L_0xf167b0, L_0xf168c0, C4<0>, C4<0>; +v0xe7d180_0 .alias "a", 0 0, v0xe7eaf0_0; +v0xe7d200_0 .net "axorb", 0 0, L_0xf165f0; 1 drivers +v0xe7d2a0_0 .alias "b", 0 0, v0xe7eb70_0; +v0xe7d340_0 .alias "borrowin", 0 0, v0xe7ebf0_0; +v0xe7d3f0_0 .alias "borrowout", 0 0, v0xe7edd0_0; +v0xe7d490_0 .alias "diff", 0 0, v0xe7f4f0_0; +v0xe7d530_0 .net "nota", 0 0, L_0xf16750; 1 drivers +v0xe7d5d0_0 .net "notaandb", 0 0, L_0xf167b0; 1 drivers +v0xe7d670_0 .net "notaxorb", 0 0, L_0xf16860; 1 drivers +v0xe7d710_0 .net "notaxorbandborrowin", 0 0, L_0xf168c0; 1 drivers +S_0xe7ce20 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe7cb40; + .timescale 0 0; +v0xe7cf10_0 .alias "address", 2 0, v0xed5210_0; +v0xe7cf90_0 .alias "inputs", 7 0, v0xe7ef80_0; +v0xe7d010_0 .alias "out", 0 0, v0xe7f130_0; +L_0xf174e0 .part/v L_0xf16d80, v0xed5c50_0, 1; +S_0xe7cc30 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe7cb40; + .timescale 0 0; +v0xe7c900_0 .alias "address", 2 0, v0xed5210_0; +v0xe7cd20_0 .alias "inputs", 7 0, v0xe7eed0_0; +v0xe7cda0_0 .alias "out", 0 0, v0xe7ec70_0; +L_0xf17580 .part/v L_0xf14c40, v0xed5c50_0, 1; +S_0xe79e90 .scope module, "a28" "ALU1bit" 5 60, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf18b60/d .functor XOR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xf18b60 .delay (30,30,30) L_0xf18b60/d; +L_0xf19130/d .functor AND 1, L_0xf17d50, L_0xf18640, C4<1>, C4<1>; +L_0xf19130 .delay (30,30,30) L_0xf19130/d; +L_0xf191f0/d .functor NAND 1, L_0xf17d50, L_0xf18640, C4<1>, C4<1>; +L_0xf191f0 .delay (20,20,20) L_0xf191f0/d; +L_0xf192b0/d .functor NOR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xf192b0 .delay (20,20,20) L_0xf192b0/d; +L_0xf19370/d .functor OR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xf19370 .delay (30,30,30) L_0xf19370/d; +v0xe7bb60_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe7bc20_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe7bcc0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe7bd60_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe7bde0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe7be80_0 .net "a", 0 0, L_0xf17d50; 1 drivers +v0xe7bf00_0 .net "b", 0 0, L_0xf18640; 1 drivers +v0xe7bf80_0 .net "cin", 0 0, L_0xf187a0; 1 drivers +v0xe7c000_0 .net "cout", 0 0, L_0xf19bd0; 1 drivers +v0xe7c080_0 .net "cout_ADD", 0 0, L_0xf18280; 1 drivers +v0xe7c160_0 .net "cout_SLT", 0 0, L_0xf18fe0; 1 drivers +v0xe7c1e0_0 .net "cout_SUB", 0 0, L_0xf177c0; 1 drivers +v0xe7c260_0 .net "muxCout", 7 0, L_0xf17110; 1 drivers +v0xe7c310_0 .net "muxRes", 7 0, L_0xf19410; 1 drivers +v0xe7c440_0 .alias "op", 2 0, v0xed5210_0; +v0xe7c4c0_0 .net "out", 0 0, L_0xf173e0; 1 drivers +v0xe7c390_0 .net "res_ADD", 0 0, L_0xe7daf0; 1 drivers +v0xe7c630_0 .net "res_AND", 0 0, L_0xf19130; 1 drivers +v0xe7c540_0 .net "res_NAND", 0 0, L_0xf191f0; 1 drivers +v0xe7c750_0 .net "res_NOR", 0 0, L_0xf192b0; 1 drivers +v0xe7c6b0_0 .net "res_OR", 0 0, L_0xf19370; 1 drivers +v0xe7c880_0 .net "res_SLT", 0 0, L_0xf18c60; 1 drivers +v0xe7c800_0 .net "res_SUB", 0 0, L_0xf184c0; 1 drivers +v0xe7c9f0_0 .net "res_XOR", 0 0, L_0xf18b60; 1 drivers +LS_0xf19410_0_0 .concat [ 1 1 1 1], L_0xe7daf0, L_0xf184c0, L_0xf18b60, L_0xf18c60; +LS_0xf19410_0_4 .concat [ 1 1 1 1], L_0xf19130, L_0xf191f0, L_0xf192b0, L_0xf19370; +L_0xf19410 .concat [ 4 4 0 0], LS_0xf19410_0_0, LS_0xf19410_0_4; +LS_0xf17110_0_0 .concat [ 1 1 1 1], L_0xf18280, L_0xf177c0, C4<0>, L_0xf18fe0; +LS_0xf17110_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf17110 .concat [ 4 4 0 0], LS_0xf17110_0_0, LS_0xf17110_0_4; +S_0xe7b2a0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe79e90; + .timescale 0 0; +L_0xe7f240/d .functor XOR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xe7f240 .delay (30,30,30) L_0xe7f240/d; +L_0xe7daf0/d .functor XOR 1, L_0xe7f240, L_0xf187a0, C4<0>, C4<0>; +L_0xe7daf0 .delay (30,30,30) L_0xe7daf0/d; +L_0xf178d0/d .functor AND 1, L_0xf17d50, L_0xf18640, C4<1>, C4<1>; +L_0xf178d0 .delay (30,30,30) L_0xf178d0/d; +L_0xf17990/d .functor OR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xf17990 .delay (30,30,30) L_0xf17990/d; +L_0xf17a50/d .functor NOT 1, L_0xf187a0, C4<0>, C4<0>, C4<0>; +L_0xf17a50 .delay (10,10,10) L_0xf17a50/d; +L_0xf16120/d .functor AND 1, L_0xf178d0, L_0xf17a50, C4<1>, C4<1>; +L_0xf16120 .delay (30,30,30) L_0xf16120/d; +L_0xf18190/d .functor AND 1, L_0xf17990, L_0xf187a0, C4<1>, C4<1>; +L_0xf18190 .delay (30,30,30) L_0xf18190/d; +L_0xf18280/d .functor OR 1, L_0xf16120, L_0xf18190, C4<0>, C4<0>; +L_0xf18280 .delay (30,30,30) L_0xf18280/d; +v0xe7b390_0 .net "_carryin", 0 0, L_0xf17a50; 1 drivers +v0xe7b450_0 .alias "a", 0 0, v0xe7be80_0; +v0xe7b4d0_0 .net "aandb", 0 0, L_0xf178d0; 1 drivers +v0xe7b570_0 .net "aorb", 0 0, L_0xf17990; 1 drivers +v0xe7b5f0_0 .alias "b", 0 0, v0xe7bf00_0; +v0xe7b6c0_0 .alias "carryin", 0 0, v0xe7bf80_0; +v0xe7b790_0 .alias "carryout", 0 0, v0xe7c080_0; +v0xe7b830_0 .net "outputIfCarryin", 0 0, L_0xf16120; 1 drivers +v0xe7b920_0 .net "outputIf_Carryin", 0 0, L_0xf18190; 1 drivers +v0xe7b9c0_0 .net "s", 0 0, L_0xe7f240; 1 drivers +v0xe7bac0_0 .alias "sum", 0 0, v0xe7c390_0; +S_0xe7ab40 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe79e90; + .timescale 0 0; +L_0xf18460 .functor XOR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xf184c0 .functor XOR 1, L_0xf18460, L_0xf187a0, C4<0>, C4<0>; +L_0xf185c0 .functor NOT 1, L_0xf17d50, C4<0>, C4<0>, C4<0>; +L_0xf161e0 .functor AND 1, L_0xf185c0, L_0xf18640, C4<1>, C4<1>; +L_0xf17710 .functor NOT 1, L_0xf18460, C4<0>, C4<0>, C4<0>; +L_0xf188b0 .functor AND 1, L_0xf17710, L_0xf187a0, C4<1>, C4<1>; +L_0xf177c0 .functor OR 1, L_0xf161e0, L_0xf188b0, C4<0>, C4<0>; +v0xe7ac30_0 .alias "a", 0 0, v0xe7be80_0; +v0xe7acd0_0 .net "axorb", 0 0, L_0xf18460; 1 drivers +v0xe7ad50_0 .alias "b", 0 0, v0xe7bf00_0; +v0xe7ae00_0 .alias "borrowin", 0 0, v0xe7bf80_0; +v0xe7aee0_0 .alias "borrowout", 0 0, v0xe7c1e0_0; +v0xe7af60_0 .alias "diff", 0 0, v0xe7c800_0; +v0xe7afe0_0 .net "nota", 0 0, L_0xf185c0; 1 drivers +v0xe7b060_0 .net "notaandb", 0 0, L_0xf161e0; 1 drivers +v0xe7b100_0 .net "notaxorb", 0 0, L_0xf17710; 1 drivers +v0xe7b1a0_0 .net "notaxorbandborrowin", 0 0, L_0xf188b0; 1 drivers +S_0xe7a3e0 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe79e90; + .timescale 0 0; +L_0xf18c00 .functor XOR 1, L_0xf17d50, L_0xf18640, C4<0>, C4<0>; +L_0xf18c60 .functor XOR 1, L_0xf18c00, L_0xf187a0, C4<0>, C4<0>; +L_0xf18d60 .functor NOT 1, L_0xf17d50, C4<0>, C4<0>, C4<0>; +L_0xf18de0 .functor AND 1, L_0xf18d60, L_0xf18640, C4<1>, C4<1>; +L_0xf18e90 .functor NOT 1, L_0xf18c00, C4<0>, C4<0>, C4<0>; +L_0xf18ef0 .functor AND 1, L_0xf18e90, L_0xf187a0, C4<1>, C4<1>; +L_0xf18fe0 .functor OR 1, L_0xf18de0, L_0xf18ef0, C4<0>, C4<0>; +v0xe7a4d0_0 .alias "a", 0 0, v0xe7be80_0; +v0xe7a590_0 .net "axorb", 0 0, L_0xf18c00; 1 drivers +v0xe7a630_0 .alias "b", 0 0, v0xe7bf00_0; +v0xe7a6d0_0 .alias "borrowin", 0 0, v0xe7bf80_0; +v0xe7a780_0 .alias "borrowout", 0 0, v0xe7c160_0; +v0xe7a820_0 .alias "diff", 0 0, v0xe7c880_0; +v0xe7a8c0_0 .net "nota", 0 0, L_0xf18d60; 1 drivers +v0xe7a960_0 .net "notaandb", 0 0, L_0xf18de0; 1 drivers +v0xe7aa00_0 .net "notaxorb", 0 0, L_0xf18e90; 1 drivers +v0xe7aaa0_0 .net "notaxorbandborrowin", 0 0, L_0xf18ef0; 1 drivers +S_0xe7a170 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe79e90; + .timescale 0 0; +v0xe7a260_0 .alias "address", 2 0, v0xed5210_0; +v0xe7a2e0_0 .alias "inputs", 7 0, v0xe7c310_0; +v0xe7a360_0 .alias "out", 0 0, v0xe7c4c0_0; +L_0xf173e0 .part/v L_0xf19410, v0xed5c50_0, 1; +S_0xe79f80 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe79e90; + .timescale 0 0; +v0xe79c80_0 .alias "address", 2 0, v0xed5210_0; +v0xe7a070_0 .alias "inputs", 7 0, v0xe7c260_0; +v0xe7a0f0_0 .alias "out", 0 0, v0xe7c000_0; +L_0xf19bd0 .part/v L_0xf17110, v0xed5c50_0, 1; +S_0xe77220 .scope module, "a29" "ALU1bit" 5 61, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf1b170/d .functor XOR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xf1b170 .delay (30,30,30) L_0xf1b170/d; +L_0xf1b7a0/d .functor AND 1, L_0xf1a500, L_0xf1a7b0, C4<1>, C4<1>; +L_0xf1b7a0 .delay (30,30,30) L_0xf1b7a0/d; +L_0xf1b860/d .functor NAND 1, L_0xf1a500, L_0xf1a7b0, C4<1>, C4<1>; +L_0xf1b860 .delay (20,20,20) L_0xf1b860/d; +L_0xf1b920/d .functor NOR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xf1b920 .delay (20,20,20) L_0xf1b920/d; +L_0xf1b9e0/d .functor OR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xf1b9e0 .delay (30,30,30) L_0xf1b9e0/d; +v0xe78ea0_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe78f60_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe79000_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe790a0_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe79120_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe791c0_0 .net "a", 0 0, L_0xf1a500; 1 drivers +v0xe79240_0 .net "b", 0 0, L_0xf1a7b0; 1 drivers +v0xe792c0_0 .net "cin", 0 0, L_0xf1aca0; 1 drivers +v0xe79340_0 .net "cout", 0 0, L_0xf1c280; 1 drivers +v0xe793c0_0 .net "cout_ADD", 0 0, L_0xf1a950; 1 drivers +v0xe794a0_0 .net "cout_SLT", 0 0, L_0xf1b650; 1 drivers +v0xe79520_0 .net "cout_SUB", 0 0, L_0xf1b070; 1 drivers +v0xe79610_0 .net "muxCout", 7 0, L_0xf19820; 1 drivers +v0xe79690_0 .net "muxRes", 7 0, L_0xf1ba80; 1 drivers +v0xe797c0_0 .alias "op", 2 0, v0xed5210_0; +v0xe79840_0 .net "out", 0 0, L_0xf19af0; 1 drivers +v0xe79710_0 .net "res_ADD", 0 0, L_0xe7ae80; 1 drivers +v0xe799b0_0 .net "res_AND", 0 0, L_0xf1b7a0; 1 drivers +v0xe798c0_0 .net "res_NAND", 0 0, L_0xf1b860; 1 drivers +v0xe79ad0_0 .net "res_NOR", 0 0, L_0xf1b920; 1 drivers +v0xe79a30_0 .net "res_OR", 0 0, L_0xf1b9e0; 1 drivers +v0xe79c00_0 .net "res_SLT", 0 0, L_0xf1b2b0; 1 drivers +v0xe79b80_0 .net "res_SUB", 0 0, L_0xf1ab40; 1 drivers +v0xe79d40_0 .net "res_XOR", 0 0, L_0xf1b170; 1 drivers +LS_0xf1ba80_0_0 .concat [ 1 1 1 1], L_0xe7ae80, L_0xf1ab40, L_0xf1b170, L_0xf1b2b0; +LS_0xf1ba80_0_4 .concat [ 1 1 1 1], L_0xf1b7a0, L_0xf1b860, L_0xf1b920, L_0xf1b9e0; +L_0xf1ba80 .concat [ 4 4 0 0], LS_0xf1ba80_0_0, LS_0xf1ba80_0_4; +LS_0xf19820_0_0 .concat [ 1 1 1 1], L_0xf1a950, L_0xf1b070, C4<0>, L_0xf1b650; +LS_0xf19820_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf19820 .concat [ 4 4 0 0], LS_0xf19820_0_0, LS_0xf19820_0_4; +S_0xe785e0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe77220; + .timescale 0 0; +L_0xe7c5d0/d .functor XOR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xe7c5d0 .delay (30,30,30) L_0xe7c5d0/d; +L_0xe7ae80/d .functor XOR 1, L_0xe7c5d0, L_0xf1aca0, C4<0>, C4<0>; +L_0xe7ae80 .delay (30,30,30) L_0xe7ae80/d; +L_0xf19f10/d .functor AND 1, L_0xf1a500, L_0xf1a7b0, C4<1>, C4<1>; +L_0xf19f10 .delay (30,30,30) L_0xf19f10/d; +L_0xf19fd0/d .functor OR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xf19fd0 .delay (30,30,30) L_0xf19fd0/d; +L_0xf1a090/d .functor NOT 1, L_0xf1aca0, C4<0>, C4<0>, C4<0>; +L_0xf1a090 .delay (10,10,10) L_0xf1a090/d; +L_0xf1a130/d .functor AND 1, L_0xf19f10, L_0xf1a090, C4<1>, C4<1>; +L_0xf1a130 .delay (30,30,30) L_0xf1a130/d; +L_0xf18840/d .functor AND 1, L_0xf19fd0, L_0xf1aca0, C4<1>, C4<1>; +L_0xf18840 .delay (30,30,30) L_0xf18840/d; +L_0xf1a950/d .functor OR 1, L_0xf1a130, L_0xf18840, C4<0>, C4<0>; +L_0xf1a950 .delay (30,30,30) L_0xf1a950/d; +v0xe786d0_0 .net "_carryin", 0 0, L_0xf1a090; 1 drivers +v0xe78790_0 .alias "a", 0 0, v0xe791c0_0; +v0xe78810_0 .net "aandb", 0 0, L_0xf19f10; 1 drivers +v0xe788b0_0 .net "aorb", 0 0, L_0xf19fd0; 1 drivers +v0xe78930_0 .alias "b", 0 0, v0xe79240_0; +v0xe78a00_0 .alias "carryin", 0 0, v0xe792c0_0; +v0xe78ad0_0 .alias "carryout", 0 0, v0xe793c0_0; +v0xe78b70_0 .net "outputIfCarryin", 0 0, L_0xf1a130; 1 drivers +v0xe78c60_0 .net "outputIf_Carryin", 0 0, L_0xf18840; 1 drivers +v0xe78d00_0 .net "s", 0 0, L_0xe7c5d0; 1 drivers +v0xe78e00_0 .alias "sum", 0 0, v0xe79710_0; +S_0xe77e90 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe77220; + .timescale 0 0; +L_0xf1aae0 .functor XOR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xf1ab40 .functor XOR 1, L_0xf1aae0, L_0xf1aca0, C4<0>, C4<0>; +L_0xf1ac40 .functor NOT 1, L_0xf1a500, C4<0>, C4<0>, C4<0>; +L_0xf18000 .functor AND 1, L_0xf1ac40, L_0xf1a7b0, C4<1>, C4<1>; +L_0xf18060 .functor NOT 1, L_0xf1aae0, C4<0>, C4<0>, C4<0>; +L_0xf180c0 .functor AND 1, L_0xf18060, L_0xf1aca0, C4<1>, C4<1>; +L_0xf1b070 .functor OR 1, L_0xf18000, L_0xf180c0, C4<0>, C4<0>; +v0xe77f80_0 .alias "a", 0 0, v0xe791c0_0; +v0xe78020_0 .net "axorb", 0 0, L_0xf1aae0; 1 drivers +v0xe780a0_0 .alias "b", 0 0, v0xe79240_0; +v0xe78150_0 .alias "borrowin", 0 0, v0xe792c0_0; +v0xe78200_0 .alias "borrowout", 0 0, v0xe79520_0; +v0xe78280_0 .alias "diff", 0 0, v0xe79b80_0; +v0xe78300_0 .net "nota", 0 0, L_0xf1ac40; 1 drivers +v0xe783a0_0 .net "notaandb", 0 0, L_0xf18000; 1 drivers +v0xe78440_0 .net "notaxorb", 0 0, L_0xf18060; 1 drivers +v0xe784e0_0 .net "notaxorbandborrowin", 0 0, L_0xf180c0; 1 drivers +S_0xe77770 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe77220; + .timescale 0 0; +L_0xf1b230 .functor XOR 1, L_0xf1a500, L_0xf1a7b0, C4<0>, C4<0>; +L_0xf1b2b0 .functor XOR 1, L_0xf1b230, L_0xf1aca0, C4<0>, C4<0>; +L_0xf1b3d0 .functor NOT 1, L_0xf1a500, C4<0>, C4<0>, C4<0>; +L_0xf1b450 .functor AND 1, L_0xf1b3d0, L_0xf1a7b0, C4<1>, C4<1>; +L_0xf1b500 .functor NOT 1, L_0xf1b230, C4<0>, C4<0>, C4<0>; +L_0xf1b560 .functor AND 1, L_0xf1b500, L_0xf1aca0, C4<1>, C4<1>; +L_0xf1b650 .functor OR 1, L_0xf1b450, L_0xf1b560, C4<0>, C4<0>; +v0xe77860_0 .alias "a", 0 0, v0xe791c0_0; +v0xe778e0_0 .net "axorb", 0 0, L_0xf1b230; 1 drivers +v0xe77960_0 .alias "b", 0 0, v0xe79240_0; +v0xe779e0_0 .alias "borrowin", 0 0, v0xe792c0_0; +v0xe77a60_0 .alias "borrowout", 0 0, v0xe794a0_0; +v0xe77ae0_0 .alias "diff", 0 0, v0xe79c00_0; +v0xe77b60_0 .net "nota", 0 0, L_0xf1b3d0; 1 drivers +v0xe77c00_0 .net "notaandb", 0 0, L_0xf1b450; 1 drivers +v0xe77cf0_0 .net "notaxorb", 0 0, L_0xf1b500; 1 drivers +v0xe77d90_0 .net "notaxorbandborrowin", 0 0, L_0xf1b560; 1 drivers +S_0xe77500 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe77220; + .timescale 0 0; +v0xe775f0_0 .alias "address", 2 0, v0xed5210_0; +v0xe77670_0 .alias "inputs", 7 0, v0xe79690_0; +v0xe776f0_0 .alias "out", 0 0, v0xe79840_0; +L_0xf19af0 .part/v L_0xf1ba80, v0xed5c50_0, 1; +S_0xe77310 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe77220; + .timescale 0 0; +v0xe77010_0 .alias "address", 2 0, v0xed5210_0; +v0xe77400_0 .alias "inputs", 7 0, v0xe79610_0; +v0xe77480_0 .alias "out", 0 0, v0xe79340_0; +L_0xf1c280 .part/v L_0xf19820, v0xed5c50_0, 1; +S_0xe745e0 .scope module, "a30" "ALU1bit" 5 62, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf1d880/d .functor XOR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xf1d880 .delay (30,30,30) L_0xf1d880/d; +L_0xf1ddf0/d .functor AND 1, L_0xf1caa0, L_0xf1d360, C4<1>, C4<1>; +L_0xf1ddf0 .delay (30,30,30) L_0xf1ddf0/d; +L_0xf1deb0/d .functor NAND 1, L_0xf1caa0, L_0xf1d360, C4<1>, C4<1>; +L_0xf1deb0 .delay (20,20,20) L_0xf1deb0/d; +L_0xf1df70/d .functor NOR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xf1df70 .delay (20,20,20) L_0xf1df70/d; +L_0xf1e030/d .functor OR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xf1e030 .delay (30,30,30) L_0xf1e030/d; +v0xe76270_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe76330_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe763d0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe76470_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe764f0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe76590_0 .net "a", 0 0, L_0xf1caa0; 1 drivers +v0xe76610_0 .net "b", 0 0, L_0xf1d360; 1 drivers +v0xe76690_0 .net "cin", 0 0, L_0xf1d4c0; 1 drivers +v0xe76710_0 .net "cout", 0 0, L_0xf1e8e0; 1 drivers +v0xe76790_0 .net "cout_ADD", 0 0, L_0xf1cfc0; 1 drivers +v0xe76870_0 .net "cout_SLT", 0 0, L_0xf1dca0; 1 drivers +v0xe768f0_0 .net "cout_SUB", 0 0, L_0xf1c4e0; 1 drivers +v0xe76970_0 .net "muxCout", 7 0, L_0xf1be10; 1 drivers +v0xe76a20_0 .net "muxRes", 7 0, L_0xf1e0d0; 1 drivers +v0xe76b50_0 .alias "op", 2 0, v0xed5210_0; +v0xe76bd0_0 .net "out", 0 0, L_0xf1c0e0; 1 drivers +v0xe76aa0_0 .net "res_ADD", 0 0, L_0xe76810; 1 drivers +v0xe76d40_0 .net "res_AND", 0 0, L_0xf1ddf0; 1 drivers +v0xe76c50_0 .net "res_NAND", 0 0, L_0xf1deb0; 1 drivers +v0xe76e60_0 .net "res_NOR", 0 0, L_0xf1df70; 1 drivers +v0xe76dc0_0 .net "res_OR", 0 0, L_0xf1e030; 1 drivers +v0xe76f90_0 .net "res_SLT", 0 0, L_0xf1d980; 1 drivers +v0xe76ee0_0 .net "res_SUB", 0 0, L_0xf1d200; 1 drivers +v0xe770d0_0 .net "res_XOR", 0 0, L_0xf1d880; 1 drivers +LS_0xf1e0d0_0_0 .concat [ 1 1 1 1], L_0xe76810, L_0xf1d200, L_0xf1d880, L_0xf1d980; +LS_0xf1e0d0_0_4 .concat [ 1 1 1 1], L_0xf1ddf0, L_0xf1deb0, L_0xf1df70, L_0xf1e030; +L_0xf1e0d0 .concat [ 4 4 0 0], LS_0xf1e0d0_0_0, LS_0xf1e0d0_0_4; +LS_0xf1be10_0_0 .concat [ 1 1 1 1], L_0xf1cfc0, L_0xf1c4e0, C4<0>, L_0xf1dca0; +LS_0xf1be10_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf1be10 .concat [ 4 4 0 0], LS_0xf1be10_0_0, LS_0xf1be10_0_4; +S_0xe759b0 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe745e0; + .timescale 0 0; +L_0xe79950/d .functor XOR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xe79950 .delay (30,30,30) L_0xe79950/d; +L_0xe76810/d .functor XOR 1, L_0xe79950, L_0xf1d4c0, C4<0>, C4<0>; +L_0xe76810 .delay (30,30,30) L_0xe76810/d; +L_0xf1c5f0/d .functor AND 1, L_0xf1caa0, L_0xf1d360, C4<1>, C4<1>; +L_0xf1c5f0 .delay (30,30,30) L_0xf1c5f0/d; +L_0xf1c6b0/d .functor OR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xf1c6b0 .delay (30,30,30) L_0xf1c6b0/d; +L_0xf1c770/d .functor NOT 1, L_0xf1d4c0, C4<0>, C4<0>, C4<0>; +L_0xf1c770 .delay (10,10,10) L_0xf1c770/d; +L_0xf1a850/d .functor AND 1, L_0xf1c5f0, L_0xf1c770, C4<1>, C4<1>; +L_0xf1a850 .delay (30,30,30) L_0xf1a850/d; +L_0xf1c810/d .functor AND 1, L_0xf1c6b0, L_0xf1d4c0, C4<1>, C4<1>; +L_0xf1c810 .delay (30,30,30) L_0xf1c810/d; +L_0xf1cfc0/d .functor OR 1, L_0xf1a850, L_0xf1c810, C4<0>, C4<0>; +L_0xf1cfc0 .delay (30,30,30) L_0xf1cfc0/d; +v0xe75aa0_0 .net "_carryin", 0 0, L_0xf1c770; 1 drivers +v0xe75b60_0 .alias "a", 0 0, v0xe76590_0; +v0xe75be0_0 .net "aandb", 0 0, L_0xf1c5f0; 1 drivers +v0xe75c80_0 .net "aorb", 0 0, L_0xf1c6b0; 1 drivers +v0xe75d00_0 .alias "b", 0 0, v0xe76610_0; +v0xe75dd0_0 .alias "carryin", 0 0, v0xe76690_0; +v0xe75ea0_0 .alias "carryout", 0 0, v0xe76790_0; +v0xe75f40_0 .net "outputIfCarryin", 0 0, L_0xf1a850; 1 drivers +v0xe76030_0 .net "outputIf_Carryin", 0 0, L_0xf1c810; 1 drivers +v0xe760d0_0 .net "s", 0 0, L_0xe79950; 1 drivers +v0xe761d0_0 .alias "sum", 0 0, v0xe76aa0_0; +S_0xe75250 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe745e0; + .timescale 0 0; +L_0xf1d1a0 .functor XOR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xf1d200 .functor XOR 1, L_0xf1d1a0, L_0xf1d4c0, C4<0>, C4<0>; +L_0xf1d300 .functor NOT 1, L_0xf1caa0, C4<0>, C4<0>, C4<0>; +L_0xf1ae00 .functor AND 1, L_0xf1d300, L_0xf1d360, C4<1>, C4<1>; +L_0xf1c410 .functor NOT 1, L_0xf1d1a0, C4<0>, C4<0>, C4<0>; +L_0xf1d5d0 .functor AND 1, L_0xf1c410, L_0xf1d4c0, C4<1>, C4<1>; +L_0xf1c4e0 .functor OR 1, L_0xf1ae00, L_0xf1d5d0, C4<0>, C4<0>; +v0xe75340_0 .alias "a", 0 0, v0xe76590_0; +v0xe753e0_0 .net "axorb", 0 0, L_0xf1d1a0; 1 drivers +v0xe75460_0 .alias "b", 0 0, v0xe76610_0; +v0xe75510_0 .alias "borrowin", 0 0, v0xe76690_0; +v0xe755f0_0 .alias "borrowout", 0 0, v0xe768f0_0; +v0xe75670_0 .alias "diff", 0 0, v0xe76ee0_0; +v0xe756f0_0 .net "nota", 0 0, L_0xf1d300; 1 drivers +v0xe75770_0 .net "notaandb", 0 0, L_0xf1ae00; 1 drivers +v0xe75810_0 .net "notaxorb", 0 0, L_0xf1c410; 1 drivers +v0xe758b0_0 .net "notaxorbandborrowin", 0 0, L_0xf1d5d0; 1 drivers +S_0xe74b30 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe745e0; + .timescale 0 0; +L_0xf1d920 .functor XOR 1, L_0xf1caa0, L_0xf1d360, C4<0>, C4<0>; +L_0xf1d980 .functor XOR 1, L_0xf1d920, L_0xf1d4c0, C4<0>, C4<0>; +L_0xf1da80 .functor NOT 1, L_0xf1caa0, C4<0>, C4<0>, C4<0>; +L_0xf1dae0 .functor AND 1, L_0xf1da80, L_0xf1d360, C4<1>, C4<1>; +L_0xf1db90 .functor NOT 1, L_0xf1d920, C4<0>, C4<0>, C4<0>; +L_0xf1dbf0 .functor AND 1, L_0xf1db90, L_0xf1d4c0, C4<1>, C4<1>; +L_0xf1dca0 .functor OR 1, L_0xf1dae0, L_0xf1dbf0, C4<0>, C4<0>; +v0xe74c20_0 .alias "a", 0 0, v0xe76590_0; +v0xe74ca0_0 .net "axorb", 0 0, L_0xf1d920; 1 drivers +v0xe74d40_0 .alias "b", 0 0, v0xe76610_0; +v0xe74de0_0 .alias "borrowin", 0 0, v0xe76690_0; +v0xe74e90_0 .alias "borrowout", 0 0, v0xe76870_0; +v0xe74f30_0 .alias "diff", 0 0, v0xe76f90_0; +v0xe74fd0_0 .net "nota", 0 0, L_0xf1da80; 1 drivers +v0xe75070_0 .net "notaandb", 0 0, L_0xf1dae0; 1 drivers +v0xe75110_0 .net "notaxorb", 0 0, L_0xf1db90; 1 drivers +v0xe751b0_0 .net "notaxorbandborrowin", 0 0, L_0xf1dbf0; 1 drivers +S_0xe748c0 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe745e0; + .timescale 0 0; +v0xe749b0_0 .alias "address", 2 0, v0xed5210_0; +v0xe74a30_0 .alias "inputs", 7 0, v0xe76a20_0; +v0xe74ab0_0 .alias "out", 0 0, v0xe76bd0_0; +L_0xf1c0e0 .part/v L_0xf1e0d0, v0xed5c50_0, 1; +S_0xe746d0 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe745e0; + .timescale 0 0; +v0xe743a0_0 .alias "address", 2 0, v0xed5210_0; +v0xe747c0_0 .alias "inputs", 7 0, v0xe76970_0; +v0xe74840_0 .alias "out", 0 0, v0xe76710_0; +L_0xf1e8e0 .part/v L_0xf1be10, v0xed5c50_0, 1; +S_0xe71930 .scope module, "a31" "ALU1bit" 5 63, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf202b0/d .functor XOR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xf202b0 .delay (30,30,30) L_0xf202b0/d; +L_0xf20860/d .functor AND 1, L_0xf1f820, L_0xf1fdf0, C4<1>, C4<1>; +L_0xf20860 .delay (30,30,30) L_0xf20860/d; +L_0xf20920/d .functor NAND 1, L_0xf1f820, L_0xf1fdf0, C4<1>, C4<1>; +L_0xf20920 .delay (20,20,20) L_0xf20920/d; +L_0xf209e0/d .functor NOR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xf209e0 .delay (20,20,20) L_0xf209e0/d; +L_0xf20aa0/d .functor OR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xf20aa0 .delay (30,30,30) L_0xf20aa0/d; +v0xe73600_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe736c0_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe73760_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe73800_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe73880_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe73920_0 .net "a", 0 0, L_0xf1f820; 1 drivers +v0xe739a0_0 .net "b", 0 0, L_0xf1fdf0; 1 drivers +v0xe73a20_0 .net "cin", 0 0, L_0xf1ff50; 1 drivers +v0xe73aa0_0 .net "cout", 0 0, L_0xf21340; 1 drivers +v0xe73b20_0 .net "cout_ADD", 0 0, L_0xf1ed40; 1 drivers +v0xe73c00_0 .net "cout_SLT", 0 0, L_0xf20710; 1 drivers +v0xe73c80_0 .net "cout_SUB", 0 0, L_0xef8d50; 1 drivers +v0xe73d00_0 .net "muxCout", 7 0, L_0xf1e4e0; 1 drivers +v0xe73db0_0 .net "muxRes", 7 0, L_0xf20b40; 1 drivers +v0xe73ee0_0 .alias "op", 2 0, v0xed5210_0; +v0xe73f60_0 .net "out", 0 0, L_0xf1e7b0; 1 drivers +v0xe73e30_0 .net "res_ADD", 0 0, L_0xe75590; 1 drivers +v0xe740d0_0 .net "res_AND", 0 0, L_0xf20860; 1 drivers +v0xe73fe0_0 .net "res_NAND", 0 0, L_0xf20920; 1 drivers +v0xe741f0_0 .net "res_NOR", 0 0, L_0xf209e0; 1 drivers +v0xe74150_0 .net "res_OR", 0 0, L_0xf20aa0; 1 drivers +v0xe74320_0 .net "res_SLT", 0 0, L_0xf203b0; 1 drivers +v0xe742a0_0 .net "res_SUB", 0 0, L_0xf1fc90; 1 drivers +v0xe74490_0 .net "res_XOR", 0 0, L_0xf202b0; 1 drivers +LS_0xf20b40_0_0 .concat [ 1 1 1 1], L_0xe75590, L_0xf1fc90, L_0xf202b0, L_0xf203b0; +LS_0xf20b40_0_4 .concat [ 1 1 1 1], L_0xf20860, L_0xf20920, L_0xf209e0, L_0xf20aa0; +L_0xf20b40 .concat [ 4 4 0 0], LS_0xf20b40_0_0, LS_0xf20b40_0_4; +LS_0xf1e4e0_0_0 .concat [ 1 1 1 1], L_0xf1ed40, L_0xef8d50, C4<0>, L_0xf20710; +LS_0xf1e4e0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf1e4e0 .concat [ 4 4 0 0], LS_0xf1e4e0_0_0, LS_0xf1e4e0_0_4; +S_0xe72d40 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe71930; + .timescale 0 0; +L_0xe76ce0/d .functor XOR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xe76ce0 .delay (30,30,30) L_0xe76ce0/d; +L_0xe75590/d .functor XOR 1, L_0xe76ce0, L_0xf1ff50, C4<0>, C4<0>; +L_0xe75590 .delay (30,30,30) L_0xe75590/d; +L_0xef8e20/d .functor AND 1, L_0xf1f820, L_0xf1fdf0, C4<1>, C4<1>; +L_0xef8e20 .delay (30,30,30) L_0xef8e20/d; +L_0xf1d400/d .functor OR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xf1d400 .delay (30,30,30) L_0xf1d400/d; +L_0xef8ee0/d .functor NOT 1, L_0xf1ff50, C4<0>, C4<0>, C4<0>; +L_0xef8ee0 .delay (10,10,10) L_0xef8ee0/d; +L_0xf1eb00/d .functor AND 1, L_0xef8e20, L_0xef8ee0, C4<1>, C4<1>; +L_0xf1eb00 .delay (30,30,30) L_0xf1eb00/d; +L_0xf1ec30/d .functor AND 1, L_0xf1d400, L_0xf1ff50, C4<1>, C4<1>; +L_0xf1ec30 .delay (30,30,30) L_0xf1ec30/d; +L_0xf1ed40/d .functor OR 1, L_0xf1eb00, L_0xf1ec30, C4<0>, C4<0>; +L_0xf1ed40 .delay (30,30,30) L_0xf1ed40/d; +v0xe72e30_0 .net "_carryin", 0 0, L_0xef8ee0; 1 drivers +v0xe72ef0_0 .alias "a", 0 0, v0xe73920_0; +v0xe72f70_0 .net "aandb", 0 0, L_0xef8e20; 1 drivers +v0xe73010_0 .net "aorb", 0 0, L_0xf1d400; 1 drivers +v0xe73090_0 .alias "b", 0 0, v0xe739a0_0; +v0xe73160_0 .alias "carryin", 0 0, v0xe73a20_0; +v0xe73230_0 .alias "carryout", 0 0, v0xe73b20_0; +v0xe732d0_0 .net "outputIfCarryin", 0 0, L_0xf1eb00; 1 drivers +v0xe733c0_0 .net "outputIf_Carryin", 0 0, L_0xf1ec30; 1 drivers +v0xe73460_0 .net "s", 0 0, L_0xe76ce0; 1 drivers +v0xe73560_0 .alias "sum", 0 0, v0xe73e30_0; +S_0xe725e0 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe71930; + .timescale 0 0; +L_0xf1fc30 .functor XOR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xf1fc90 .functor XOR 1, L_0xf1fc30, L_0xf1ff50, C4<0>, C4<0>; +L_0xf1fd90 .functor NOT 1, L_0xf1f820, C4<0>, C4<0>, C4<0>; +L_0xf1cd50 .functor AND 1, L_0xf1fd90, L_0xf1fdf0, C4<1>, C4<1>; +L_0xf1cdb0 .functor NOT 1, L_0xf1fc30, C4<0>, C4<0>, C4<0>; +L_0xf1ce10 .functor AND 1, L_0xf1cdb0, L_0xf1ff50, C4<1>, C4<1>; +L_0xef8d50 .functor OR 1, L_0xf1cd50, L_0xf1ce10, C4<0>, C4<0>; +v0xe726d0_0 .alias "a", 0 0, v0xe73920_0; +v0xe72770_0 .net "axorb", 0 0, L_0xf1fc30; 1 drivers +v0xe727f0_0 .alias "b", 0 0, v0xe739a0_0; +v0xe728a0_0 .alias "borrowin", 0 0, v0xe73a20_0; +v0xe72980_0 .alias "borrowout", 0 0, v0xe73c80_0; +v0xe72a00_0 .alias "diff", 0 0, v0xe742a0_0; +v0xe72a80_0 .net "nota", 0 0, L_0xf1fd90; 1 drivers +v0xe72b00_0 .net "notaandb", 0 0, L_0xf1cd50; 1 drivers +v0xe72ba0_0 .net "notaxorb", 0 0, L_0xf1cdb0; 1 drivers +v0xe72c40_0 .net "notaxorbandborrowin", 0 0, L_0xf1ce10; 1 drivers +S_0xe71e80 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe71930; + .timescale 0 0; +L_0xf20350 .functor XOR 1, L_0xf1f820, L_0xf1fdf0, C4<0>, C4<0>; +L_0xf203b0 .functor XOR 1, L_0xf20350, L_0xf1ff50, C4<0>, C4<0>; +L_0xf204b0 .functor NOT 1, L_0xf1f820, C4<0>, C4<0>, C4<0>; +L_0xf20510 .functor AND 1, L_0xf204b0, L_0xf1fdf0, C4<1>, C4<1>; +L_0xf205c0 .functor NOT 1, L_0xf20350, C4<0>, C4<0>, C4<0>; +L_0xf20620 .functor AND 1, L_0xf205c0, L_0xf1ff50, C4<1>, C4<1>; +L_0xf20710 .functor OR 1, L_0xf20510, L_0xf20620, C4<0>, C4<0>; +v0xe71f70_0 .alias "a", 0 0, v0xe73920_0; +v0xe72030_0 .net "axorb", 0 0, L_0xf20350; 1 drivers +v0xe720d0_0 .alias "b", 0 0, v0xe739a0_0; +v0xe72170_0 .alias "borrowin", 0 0, v0xe73a20_0; +v0xe72220_0 .alias "borrowout", 0 0, v0xe73c00_0; +v0xe722c0_0 .alias "diff", 0 0, v0xe74320_0; +v0xe72360_0 .net "nota", 0 0, L_0xf204b0; 1 drivers +v0xe72400_0 .net "notaandb", 0 0, L_0xf20510; 1 drivers +v0xe724a0_0 .net "notaxorb", 0 0, L_0xf205c0; 1 drivers +v0xe72540_0 .net "notaxorbandborrowin", 0 0, L_0xf20620; 1 drivers +S_0xe71c10 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe71930; + .timescale 0 0; +v0xe71d00_0 .alias "address", 2 0, v0xed5210_0; +v0xe71d80_0 .alias "inputs", 7 0, v0xe73db0_0; +v0xe71e00_0 .alias "out", 0 0, v0xe73f60_0; +L_0xf1e7b0 .part/v L_0xf20b40, v0xed5c50_0, 1; +S_0xe71a20 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe71930; + .timescale 0 0; +v0xe716f0_0 .alias "address", 2 0, v0xed5210_0; +v0xe71b10_0 .alias "inputs", 7 0, v0xe73d00_0; +v0xe71b90_0 .alias "out", 0 0, v0xe73aa0_0; +L_0xf21340 .part/v L_0xf1e4e0, v0xed5c50_0, 1; +S_0xe6e8a0 .scope module, "a32" "ALU1bit" 5 64, 6 23, S_0xdb7170; + .timescale 0 0; +L_0xf228f0/d .functor XOR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xf228f0 .delay (30,30,30) L_0xf228f0/d; +L_0xf22f00/d .functor AND 1, L_0xefcf50, L_0xf22430, C4<1>, C4<1>; +L_0xf22f00 .delay (30,30,30) L_0xf22f00/d; +L_0xf22fc0/d .functor NAND 1, L_0xefcf50, L_0xf22430, C4<1>, C4<1>; +L_0xf22fc0 .delay (20,20,20) L_0xf22fc0/d; +L_0xf23080/d .functor NOR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xf23080 .delay (20,20,20) L_0xf23080/d; +L_0xf23140/d .functor OR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xf23140 .delay (30,30,30) L_0xf23140/d; +v0xe70940_0 .net *"_s11", 0 0, C4<0>; 1 drivers +v0xe70a00_0 .net *"_s13", 0 0, C4<0>; 1 drivers +v0xe70aa0_0 .net *"_s15", 0 0, C4<0>; 1 drivers +v0xe70b40_0 .net *"_s7", 0 0, C4<0>; 1 drivers +v0xe70bc0_0 .net *"_s9", 0 0, C4<0>; 1 drivers +v0xe70c60_0 .net "a", 0 0, L_0xefcf50; 1 drivers +v0xe70ce0_0 .net "b", 0 0, L_0xf22430; 1 drivers +v0xe70d60_0 .net "cin", 0 0, L_0xf22590; 1 drivers +v0xe70de0_0 .alias "cout", 0 0, v0xed5e70_0; +v0xe70e60_0 .net "cout_ADD", 0 0, L_0xf22090; 1 drivers +v0xe70f40_0 .net "cout_SLT", 0 0, L_0xf22db0; 1 drivers +v0xe70fc0_0 .net "cout_SUB", 0 0, L_0xf214d0; 1 drivers +v0xe710b0_0 .net "muxCout", 7 0, L_0xf20ed0; 1 drivers +v0xe71160_0 .net "muxRes", 7 0, L_0xf231e0; 1 drivers +v0xe71290_0 .alias "op", 2 0, v0xed5210_0; +v0xe71310_0 .net "out", 0 0, L_0xf211a0; 1 drivers +v0xe711e0_0 .net "res_ADD", 0 0, L_0xe72920; 1 drivers +v0xe71420_0 .net "res_AND", 0 0, L_0xf22f00; 1 drivers +v0xe71390_0 .net "res_NAND", 0 0, L_0xf22fc0; 1 drivers +v0xe71540_0 .net "res_NOR", 0 0, L_0xf23080; 1 drivers +v0xe714a0_0 .net "res_OR", 0 0, L_0xf23140; 1 drivers +v0xe71670_0 .net "res_SLT", 0 0, L_0xf22a10; 1 drivers +v0xe715f0_0 .net "res_SUB", 0 0, L_0xf222d0; 1 drivers +v0xe717e0_0 .net "res_XOR", 0 0, L_0xf228f0; 1 drivers +LS_0xf231e0_0_0 .concat [ 1 1 1 1], L_0xe72920, L_0xf222d0, L_0xf228f0, L_0xf22a10; +LS_0xf231e0_0_4 .concat [ 1 1 1 1], L_0xf22f00, L_0xf22fc0, L_0xf23080, L_0xf23140; +L_0xf231e0 .concat [ 4 4 0 0], LS_0xf231e0_0_0, LS_0xf231e0_0_4; +LS_0xf20ed0_0_0 .concat [ 1 1 1 1], L_0xf22090, L_0xf214d0, C4<0>, L_0xf22db0; +LS_0xf20ed0_0_4 .concat [ 1 1 1 1], C4<0>, C4<0>, C4<0>, C4<0>; +L_0xf20ed0 .concat [ 4 4 0 0], LS_0xf20ed0_0_0, LS_0xf20ed0_0_4; +S_0xe70080 .scope module, "adder" "Adder1bit" 6 35, 7 8, S_0xe6e8a0; + .timescale 0 0; +L_0xe74070/d .functor XOR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xe74070 .delay (30,30,30) L_0xe74070/d; +L_0xe72920/d .functor XOR 1, L_0xe74070, L_0xf22590, C4<0>, C4<0>; +L_0xe72920 .delay (30,30,30) L_0xe72920/d; +L_0xf215a0/d .functor AND 1, L_0xefcf50, L_0xf22430, C4<1>, C4<1>; +L_0xf215a0 .delay (30,30,30) L_0xf215a0/d; +L_0xf21660/d .functor OR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xf21660 .delay (30,30,30) L_0xf21660/d; +L_0xf21720/d .functor NOT 1, L_0xf22590, C4<0>, C4<0>, C4<0>; +L_0xf21720 .delay (10,10,10) L_0xf21720/d; +L_0xf217c0/d .functor AND 1, L_0xf215a0, L_0xf21720, C4<1>, C4<1>; +L_0xf217c0 .delay (30,30,30) L_0xf217c0/d; +L_0xf21910/d .functor AND 1, L_0xf21660, L_0xf22590, C4<1>, C4<1>; +L_0xf21910 .delay (30,30,30) L_0xf21910/d; +L_0xf22090/d .functor OR 1, L_0xf217c0, L_0xf21910, C4<0>, C4<0>; +L_0xf22090 .delay (30,30,30) L_0xf22090/d; +v0xe70170_0 .net "_carryin", 0 0, L_0xf21720; 1 drivers +v0xe70230_0 .alias "a", 0 0, v0xe70c60_0; +v0xe702b0_0 .net "aandb", 0 0, L_0xf215a0; 1 drivers +v0xe70350_0 .net "aorb", 0 0, L_0xf21660; 1 drivers +v0xe703d0_0 .alias "b", 0 0, v0xe70ce0_0; +v0xe704a0_0 .alias "carryin", 0 0, v0xe70d60_0; +v0xe70570_0 .alias "carryout", 0 0, v0xe70e60_0; +v0xe70610_0 .net "outputIfCarryin", 0 0, L_0xf217c0; 1 drivers +v0xe70700_0 .net "outputIf_Carryin", 0 0, L_0xf21910; 1 drivers +v0xe707a0_0 .net "s", 0 0, L_0xe74070; 1 drivers +v0xe708a0_0 .alias "sum", 0 0, v0xe711e0_0; +S_0xe6f930 .scope module, "subtractor" "Subtractor1bit" 6 40, 8 8, S_0xe6e8a0; + .timescale 0 0; +L_0xf22270 .functor XOR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xf222d0 .functor XOR 1, L_0xf22270, L_0xf22590, C4<0>, C4<0>; +L_0xf223d0 .functor NOT 1, L_0xefcf50, C4<0>, C4<0>, C4<0>; +L_0xf1fad0 .functor AND 1, L_0xf223d0, L_0xf22430, C4<1>, C4<1>; +L_0xf1fb30 .functor NOT 1, L_0xf22270, C4<0>, C4<0>, C4<0>; +L_0xf1fb90 .functor AND 1, L_0xf1fb30, L_0xf22590, C4<1>, C4<1>; +L_0xf214d0 .functor OR 1, L_0xf1fad0, L_0xf1fb90, C4<0>, C4<0>; +v0xe6fa20_0 .alias "a", 0 0, v0xe70c60_0; +v0xe6fac0_0 .net "axorb", 0 0, L_0xf22270; 1 drivers +v0xe6fb60_0 .alias "b", 0 0, v0xe70ce0_0; +v0xe6fbe0_0 .alias "borrowin", 0 0, v0xe70d60_0; +v0xe6fcc0_0 .alias "borrowout", 0 0, v0xe70fc0_0; +v0xe6fd40_0 .alias "diff", 0 0, v0xe715f0_0; +v0xe6fdc0_0 .net "nota", 0 0, L_0xf223d0; 1 drivers +v0xe6fe40_0 .net "notaandb", 0 0, L_0xf1fad0; 1 drivers +v0xe6fee0_0 .net "notaxorb", 0 0, L_0xf1fb30; 1 drivers +v0xe6ff80_0 .net "notaxorbandborrowin", 0 0, L_0xf1fb90; 1 drivers +S_0xe6f120 .scope module, "slt" "Subtractor1bit" 6 49, 8 8, S_0xe6e8a0; + .timescale 0 0; +L_0xf22990 .functor XOR 1, L_0xefcf50, L_0xf22430, C4<0>, C4<0>; +L_0xf22a10 .functor XOR 1, L_0xf22990, L_0xf22590, C4<0>, C4<0>; +L_0xf22b30 .functor NOT 1, L_0xefcf50, C4<0>, C4<0>, C4<0>; +L_0xf22bb0 .functor AND 1, L_0xf22b30, L_0xf22430, C4<1>, C4<1>; +L_0xf22c60 .functor NOT 1, L_0xf22990, C4<0>, C4<0>, C4<0>; +L_0xf22cc0 .functor AND 1, L_0xf22c60, L_0xf22590, C4<1>, C4<1>; +L_0xf22db0 .functor OR 1, L_0xf22bb0, L_0xf22cc0, C4<0>, C4<0>; +v0xe6f210_0 .alias "a", 0 0, v0xe70c60_0; +v0xe6f290_0 .net "axorb", 0 0, L_0xf22990; 1 drivers +v0xe6f330_0 .alias "b", 0 0, v0xe70ce0_0; +v0xe6f3d0_0 .alias "borrowin", 0 0, v0xe70d60_0; +v0xe6f480_0 .alias "borrowout", 0 0, v0xe70f40_0; +v0xe6f520_0 .alias "diff", 0 0, v0xe71670_0; +v0xe6f600_0 .net "nota", 0 0, L_0xf22b30; 1 drivers +v0xe6f6a0_0 .net "notaandb", 0 0, L_0xf22bb0; 1 drivers +v0xe6f790_0 .net "notaxorb", 0 0, L_0xf22c60; 1 drivers +v0xe6f830_0 .net "notaxorbandborrowin", 0 0, L_0xf22cc0; 1 drivers +S_0xe6ef30 .scope module, "mux1" "MUX3bit" 6 70, 9 1, S_0xe6e8a0; + .timescale 0 0; +v0xe6bd80_0 .alias "address", 2 0, v0xed5210_0; +v0xe6f020_0 .alias "inputs", 7 0, v0xe71160_0; +v0xe6f0a0_0 .alias "out", 0 0, v0xe71310_0; +L_0xf211a0 .part/v L_0xf231e0, v0xed5c50_0, 1; +S_0xe6e990 .scope module, "mux2" "MUX3bit" 6 71, 9 1, S_0xe6e8a0; + .timescale 0 0; +v0xe6ea80_0 .alias "address", 2 0, v0xed5210_0; +v0xe6bc40_0 .alias "inputs", 7 0, v0xe710b0_0; +v0xe6bce0_0 .alias "out", 0 0, v0xed5e70_0; +L_0xf21290 .part/v L_0xf20ed0, v0xed5c50_0, 1; +S_0xe6e5d0 .scope module, "mux0" "MUX3bit" 5 77, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6e6c0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6e760_0 .alias "inputs", 7 0, v0xe8d1c0_0; +v0xe6e800_0 .net "out", 0 0, L_0xf24760; 1 drivers +L_0xf24760 .part/v L_0xf242e0, v0xed5c50_0, 1; +S_0xe6e300 .scope module, "mux1" "MUX3bit" 5 79, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6e3f0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6e490_0 .alias "inputs", 7 0, v0xe8d270_0; +v0xe6e530_0 .net "out", 0 0, L_0xf24d40; 1 drivers +L_0xf24d40 .part/v L_0xf23670, v0xed5c50_0, 1; +S_0xe6e030 .scope module, "mux2" "MUX3bit" 5 81, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6e120_0 .alias "address", 2 0, v0xed5210_0; +v0xe6e1c0_0 .alias "inputs", 7 0, v0xed2200_0; +v0xe6e260_0 .net "out", 0 0, L_0xf25790; 1 drivers +L_0xf25790 .part/v L_0xf25e40, v0xed5c50_0, 1; +S_0xe6dd60 .scope module, "mux3" "MUX3bit" 5 83, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6de50_0 .alias "address", 2 0, v0xed5210_0; +v0xe6def0_0 .alias "inputs", 7 0, v0xed39e0_0; +v0xe6df90_0 .net "out", 0 0, L_0xf25630; 1 drivers +L_0xf25630 .part/v L_0xf25270, v0xed5c50_0, 1; +S_0xe6da90 .scope module, "mux4" "MUX3bit" 5 85, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6db80_0 .alias "address", 2 0, v0xed5210_0; +v0xe6dc20_0 .alias "inputs", 7 0, v0xed3bc0_0; +v0xe6dcc0_0 .net "out", 0 0, L_0xf26b40; 1 drivers +L_0xf26b40 .part/v L_0xf23cc0, v0xed5c50_0, 1; +S_0xe6d7c0 .scope module, "mux5" "MUX3bit" 5 87, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6d8b0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6d950_0 .alias "inputs", 7 0, v0xed3c70_0; +v0xe6d9f0_0 .net "out", 0 0, L_0xf266b0; 1 drivers +L_0xf266b0 .part/v L_0xf27130, v0xed5c50_0, 1; +S_0xe6d4f0 .scope module, "mux6" "MUX3bit" 5 89, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6d5e0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6d680_0 .alias "inputs", 7 0, v0xed3d20_0; +v0xe6d720_0 .net "out", 0 0, L_0xf28700; 1 drivers +L_0xf28700 .part/v L_0xf28390, v0xed5c50_0, 1; +S_0xe6d220 .scope module, "mux7" "MUX3bit" 5 91, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6d310_0 .alias "address", 2 0, v0xed5210_0; +v0xe6d3b0_0 .alias "inputs", 7 0, v0xed3dd0_0; +v0xe6d450_0 .net "out", 0 0, L_0xf27ef0; 1 drivers +L_0xf27ef0 .part/v L_0xf28cf0, v0xed5c50_0, 1; +S_0xe6cf50 .scope module, "mux8" "MUX3bit" 5 93, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6d040_0 .alias "address", 2 0, v0xed5210_0; +v0xe6d0e0_0 .alias "inputs", 7 0, v0xed3e80_0; +v0xe6d180_0 .net "out", 0 0, L_0xf29a70; 1 drivers +L_0xf29a70 .part/v L_0xf29750, v0xed5c50_0, 1; +S_0xe6cc80 .scope module, "mux9" "MUX3bit" 5 95, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6cd70_0 .alias "address", 2 0, v0xed5210_0; +v0xe6ce10_0 .alias "inputs", 7 0, v0xed3f30_0; +v0xe6ceb0_0 .net "out", 0 0, L_0xf29250; 1 drivers +L_0xf29250 .part/v L_0xf2a060, v0xed5c50_0, 1; +S_0xe6c9b0 .scope module, "mux10" "MUX3bit" 5 97, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6caa0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6cb40_0 .alias "inputs", 7 0, v0xe8d320_0; +v0xe6cbe0_0 .net "out", 0 0, L_0xf2ae70; 1 drivers +L_0xf2ae70 .part/v L_0xf2ab00, v0xed5c50_0, 1; +S_0xe6c6e0 .scope module, "mux11" "MUX3bit" 5 99, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6c7d0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6c870_0 .alias "inputs", 7 0, v0xe8d3d0_0; +v0xe6c910_0 .net "out", 0 0, L_0xf2a820; 1 drivers +L_0xf2a820 .part/v L_0xf2a460, v0xed5c50_0, 1; +S_0xe6c410 .scope module, "mux12" "MUX3bit" 5 101, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6c500_0 .alias "address", 2 0, v0xed5210_0; +v0xe6c5a0_0 .alias "inputs", 7 0, v0xe8d480_0; +v0xe6c640_0 .net "out", 0 0, L_0xf2caa0; 1 drivers +L_0xf2caa0 .part/v L_0xf2bd50, v0xed5c50_0, 1; +S_0xe6c140 .scope module, "mux13" "MUX3bit" 5 103, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6c230_0 .alias "address", 2 0, v0xed5210_0; +v0xe6c2d0_0 .alias "inputs", 7 0, v0xe8d530_0; +v0xe6c370_0 .net "out", 0 0, L_0xf2b550; 1 drivers +L_0xf2b550 .part/v L_0xf2b190, v0xed5c50_0, 1; +S_0xe6be70 .scope module, "mux14" "MUX3bit" 5 105, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6bf60_0 .alias "address", 2 0, v0xed5210_0; +v0xe6c000_0 .alias "inputs", 7 0, v0xe8d5e0_0; +v0xe6c0a0_0 .net "out", 0 0, L_0xf2ce60; 1 drivers +L_0xf2ce60 .part/v L_0xf279d0, v0xed5c50_0, 1; +S_0xe6bab0 .scope module, "mux15" "MUX3bit" 5 107, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6bba0_0 .alias "address", 2 0, v0xed5210_0; +v0xc7e0d0_0 .alias "inputs", 7 0, v0xe8d690_0; +v0xc7e170_0 .net "out", 0 0, L_0xf2c6a0; 1 drivers +L_0xf2c6a0 .part/v L_0xf2d450, v0xed5c50_0, 1; +S_0xe6b820 .scope module, "mux16" "MUX3bit" 5 109, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6b910_0 .alias "address", 2 0, v0xed5210_0; +v0xe6b990_0 .alias "inputs", 7 0, v0xed1fd0_0; +v0xe6ba10_0 .net "out", 0 0, L_0xf2f270; 1 drivers +L_0xf2f270 .part/v L_0xf2eeb0, v0xed5c50_0, 1; +S_0xe6b5b0 .scope module, "mux17" "MUX3bit" 5 111, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6b6a0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6b720_0 .alias "inputs", 7 0, v0xed2050_0; +v0xe6b7a0_0 .net "out", 0 0, L_0xf2e970; 1 drivers +L_0xf2e970 .part/v L_0xf2fd60, v0xed5c50_0, 1; +S_0xe6b340 .scope module, "mux18" "MUX3bit" 5 113, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6b430_0 .alias "address", 2 0, v0xed5210_0; +v0xe6b4b0_0 .alias "inputs", 7 0, v0xed20d0_0; +v0xe6b530_0 .net "out", 0 0, L_0xf30410; 1 drivers +L_0xf30410 .part/v L_0xf300a0, v0xed5c50_0, 1; +S_0xe6b0d0 .scope module, "mux19" "MUX3bit" 5 115, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6b1c0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6b240_0 .alias "inputs", 7 0, v0xed2150_0; +v0xe6b2c0_0 .net "out", 0 0, L_0xf2fae0; 1 drivers +L_0xf2fae0 .part/v L_0xf2f720, v0xed5c50_0, 1; +S_0xe6ae60 .scope module, "mux20" "MUX3bit" 5 117, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6af50_0 .alias "address", 2 0, v0xed5210_0; +v0xe6afd0_0 .alias "inputs", 7 0, v0xed22b0_0; +v0xe6b050_0 .net "out", 0 0, L_0xf31930; 1 drivers +L_0xf31930 .part/v L_0xf31570, v0xed5c50_0, 1; +S_0xcbd0c0 .scope module, "mux21" "MUX3bit" 5 119, 9 1, S_0xdb7170; + .timescale 0 0; +v0xe6ace0_0 .alias "address", 2 0, v0xed5210_0; +v0xe6ad60_0 .alias "inputs", 7 0, v0xed2360_0; +v0xe6ade0_0 .net "out", 0 0, L_0xf31010; 1 drivers +L_0xf31010 .part/v L_0xf323e0, v0xed5c50_0, 1; +S_0xc7f830 .scope module, "mux22" "MUX3bit" 5 121, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc7f920_0 .alias "address", 2 0, v0xed5210_0; +v0xcbcf80_0 .alias "inputs", 7 0, v0xed2410_0; +v0xcbd020_0 .net "out", 0 0, L_0xf32c30; 1 drivers +L_0xf32c30 .part/v L_0xf32870, v0xed5c50_0, 1; +S_0xc7df60 .scope module, "mux23" "MUX3bit" 5 123, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc7e050_0 .alias "address", 2 0, v0xed5210_0; +v0xc82270_0 .alias "inputs", 7 0, v0xed24c0_0; +v0xc7f790_0 .net "out", 0 0, L_0xf320a0; 1 drivers +L_0xf320a0 .part/v L_0xf31ce0, v0xed5c50_0, 1; +S_0xcba490 .scope module, "mux24" "MUX3bit" 5 125, 9 1, S_0xdb7170; + .timescale 0 0; +v0xcba580_0 .alias "address", 2 0, v0xed5210_0; +v0xcba600_0 .alias "inputs", 7 0, v0xed2570_0; +v0xcba6a0_0 .net "out", 0 0, L_0xf340b0; 1 drivers +L_0xf340b0 .part/v L_0xf33cf0, v0xed5c50_0, 1; +S_0xc80cc0 .scope module, "mux25" "MUX3bit" 5 127, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc80db0_0 .alias "address", 2 0, v0xed5210_0; +v0xc80e30_0 .alias "inputs", 7 0, v0xed2620_0; +v0xc80ed0_0 .net "out", 0 0, L_0xf33540; 1 drivers +L_0xf33540 .part/v L_0xf34c20, v0xed5c50_0, 1; +S_0xc85770 .scope module, "mux26" "MUX3bit" 5 129, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc85860_0 .alias "address", 2 0, v0xed5210_0; +v0xc858e0_0 .alias "inputs", 7 0, v0xed26d0_0; +v0xc85980_0 .net "out", 0 0, L_0xf350b0; 1 drivers +L_0xf350b0 .part/v L_0xf35de0, v0xed5c50_0, 1; +S_0xc82fd0 .scope module, "mux27" "MUX3bit" 5 131, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc821d0_0 .alias "address", 2 0, v0xed5210_0; +v0xc82300_0 .alias "inputs", 7 0, v0xed4160_0; +v0xc823a0_0 .net "out", 0 0, L_0xf34780; 1 drivers +L_0xf34780 .part/v L_0xf35c90, v0xed5c50_0, 1; +S_0xc87780 .scope module, "mux28" "MUX3bit" 5 133, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc87870_0 .alias "address", 2 0, v0xed5210_0; +v0xc82e90_0 .alias "inputs", 7 0, v0xed3880_0; +v0xc82f30_0 .net "out", 0 0, L_0xf36830; 1 drivers +L_0xf36830 .part/v L_0xf36470, v0xed5c50_0, 1; +S_0xc8bd90 .scope module, "mux29" "MUX3bit" 5 135, 9 1, S_0xdb7170; + .timescale 0 0; +v0xc8be80_0 .alias "address", 2 0, v0xed5210_0; +v0xc8bf70_0 .alias "inputs", 7 0, v0xed3930_0; +v0xc876e0_0 .net "out", 0 0, L_0xf35880; 1 drivers +L_0xf35880 .part/v L_0xf354c0, v0xed5c50_0, 1; +S_0xd79d70 .scope module, "mux30" "MUX3bit" 5 137, 9 1, S_0xdb7170; + .timescale 0 0; +v0xd79e60_0 .alias "address", 2 0, v0xed5210_0; +v0xd79f30_0 .alias "inputs", 7 0, v0xed3a60_0; +v0xd82a70_0 .net "out", 0 0, L_0xf37e40; 1 drivers +L_0xf37e40 .part/v L_0xf37ad0, v0xed5c50_0, 1; +S_0xd78950 .scope module, "mux31" "MUX3bit" 5 139, 9 1, S_0xdb7170; + .timescale 0 0; +v0xd7d9e0_0 .alias "address", 2 0, v0xed5210_0; +v0xd7daa0_0 .alias "inputs", 7 0, v0xed3b10_0; +v0xd829d0_0 .net "out", 0 0, L_0xf396c0; 1 drivers +L_0xf396c0 .part/v L_0xf374d0, v0xed5c50_0, 1; + .scope S_0xd88600; +T_1 ; + %wait E_0xda7c80; + %load/v 8, v0xde0af0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_1.1, 6; + %jmp T_1.2; +T_1.0 ; + %load/v 8, v0xc5a830_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0xddb750_0, 0, 8; + %jmp T_1.2; +T_1.1 ; + %load/v 8, v0xde0a70_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0xddb750_0, 0, 8; + %jmp T_1.2; +T_1.2 ; + %jmp T_1; + .thread T_1, $push; + .scope S_0xd8d920; +T_2 ; + %wait E_0xddb800; + %load/v 8, v0xdd6430_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_2.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_2.1, 6; + %jmp T_2.2; +T_2.0 ; + %load/v 8, v0xdd64f0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0xdc1850_0, 0, 8; + %jmp T_2.2; +T_2.1 ; + %load/v 8, v0xdc17b0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0xdc1850_0, 0, 8; + %jmp T_2.2; +T_2.2 ; + %jmp T_2; + .thread T_2, $push; + .scope S_0xed4bc0; +T_3 ; + %wait E_0xed16b0; + %load/v 8, v0xed4cb0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_3.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_3.1, 6; + %jmp T_3.2; +T_3.0 ; + %load/v 8, v0xed4d30_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0xed4e30_0, 0, 8; + %jmp T_3.2; +T_3.1 ; + %load/v 8, v0xed4db0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0xed4e30_0, 0, 8; + %jmp T_3.2; +T_3.2 ; + %jmp T_3; + .thread T_3, $push; + .scope S_0xdbc490; +T_4 ; + %wait E_0xdbc580; + %load/v 8, v0xed5350_0, 16; + %ix/load 1, 15, 0; + %mov 4, 0, 1; + %jmp/1 T_4.0, 4; + %load/x1p 56, v0xed5350_0, 1; + %jmp T_4.1; +T_4.0 ; + %mov 56, 2, 1; +T_4.1 ; + %mov 40, 56, 1; Move signal select into place + %mov 55, 40, 1; Repetition 16 + %mov 54, 40, 1; Repetition 15 + %mov 53, 40, 1; Repetition 14 + %mov 52, 40, 1; Repetition 13 + %mov 51, 40, 1; Repetition 12 + %mov 50, 40, 1; Repetition 11 + %mov 49, 40, 1; Repetition 10 + %mov 48, 40, 1; Repetition 9 + %mov 47, 40, 1; Repetition 8 + %mov 46, 40, 1; Repetition 7 + %mov 45, 40, 1; Repetition 6 + %mov 44, 40, 1; Repetition 5 + %mov 43, 40, 1; Repetition 4 + %mov 42, 40, 1; Repetition 3 + %mov 41, 40, 1; Repetition 2 + %mov 24, 40, 16; + %ix/load 0, 32, 0; + %assign/v0 v0xed52d0_0, 0, 8; + %jmp T_4; + .thread T_4, $push; + .scope S_0xd92c40; +T_5 ; + %movi 8, 500, 32; + %set/v v0xed5cd0_0, 8, 32; + %movi 8, 612, 32; + %set/v v0xed5da0_0, 8, 32; + %movi 8, 90, 16; + %set/v v0xed5f80_0, 8, 16; + %set/v v0xed5b80_0, 0, 1; + %set/v v0xed5c50_0, 0, 3; + %delay 1000, 0; + %movi 8, 1112, 32; + %set/v v0xed58d0_0, 8, 32; + %set/v v0xed5980_0, 0, 1; + %set/v v0xed57d0_0, 0, 1; + %set/v v0xed5850_0, 0, 1; + %load/v 8, v0xed6080_0, 32; + %set/v v0xed5a80_0, 8, 32; + %load/v 8, v0xed61a0_0, 1; + %set/v v0xed5b00_0, 8, 1; + %load/v 8, v0xed5e70_0, 1; + %set/v v0xed5750_0, 8, 1; + %load/v 8, v0xed6000_0, 1; + %set/v v0xed5a00_0, 8, 1; + %fork TD_testExecute.checkResult, S_0xed5660; + %join; + %set/v v0xed5b80_0, 1, 1; + %delay 1000, 0; + %movi 8, 590, 32; + %set/v v0xed58d0_0, 8, 32; + %set/v v0xed5980_0, 0, 1; + %set/v v0xed57d0_0, 0, 1; + %set/v v0xed5850_0, 0, 1; + %load/v 8, v0xed6080_0, 32; + %set/v v0xed5a80_0, 8, 32; + %load/v 8, v0xed61a0_0, 1; + %set/v v0xed5b00_0, 8, 1; + %load/v 8, v0xed5e70_0, 1; + %set/v v0xed5750_0, 8, 1; + %load/v 8, v0xed6000_0, 1; + %set/v v0xed5a00_0, 8, 1; + %fork TD_testExecute.checkResult, S_0xed5660; + %join; + %movi 8, 65036, 16; + %set/v v0xed5f80_0, 8, 16; + %delay 10000, 0; + %set/v v0xed58d0_0, 0, 32; + %set/v v0xed5980_0, 1, 1; + %set/v v0xed57d0_0, 1, 1; + %set/v v0xed5850_0, 0, 1; + %load/v 8, v0xed6080_0, 32; + %set/v v0xed5a80_0, 8, 32; + %load/v 8, v0xed61a0_0, 1; + %set/v v0xed5b00_0, 8, 1; + %load/v 8, v0xed5e70_0, 1; + %set/v v0xed5750_0, 8, 1; + %load/v 8, v0xed6000_0, 1; + %set/v v0xed5a00_0, 8, 1; + %fork TD_testExecute.checkResult, S_0xed5660; + %join; + %end; + .thread T_5; +# The file index is used to find the file name in the following table. +:file_names 10; + "N/A"; + ""; + "./mux.v"; + "execute.t.v"; + "./execute.v"; + "./alu.v"; + "./alu1bit.v"; + "./adder1bit.v"; + "./subtractor1bit.v"; + "./mux3bit.v"; diff --git a/testcpu b/testcpu new file mode 100755 index 0000000..d7bfd7f --- /dev/null +++ b/testcpu @@ -0,0 +1,5607 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1870ea0 .scope module, "addressmux" "addressmux" 2 35; + .timescale 0 0; +v0x173ead0_0 .net "addr0", 4 0, C4; 0 drivers +v0x1855050_0 .net "addr1", 4 0, C4; 0 drivers +v0x18550d0_0 .net "mux_address", 0 0, C4; 0 drivers +v0x18538c0_0 .var "out", 0 0; +E_0x17d52c0 .event edge, v0x18550d0_0, v0x1855050_0, v0x173ead0_0; +S_0x1873270 .scope module, "behavioralFullAdder" "behavioralFullAdder" 3 3; + .timescale 0 0; +v0x1853640_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x18521a0_0 .net *"_s11", 1 0, L_0x192fda0; 1 drivers +v0x1852240_0 .net *"_s13", 1 0, L_0x192ff10; 1 drivers +v0x187c3f0_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x187b820_0 .net *"_s17", 1 0, L_0x1930000; 1 drivers +v0x187b8c0_0 .net *"_s3", 1 0, L_0x192fbc0; 1 drivers +v0x186bfb0_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x186c030_0 .net *"_s7", 1 0, L_0x192fcb0; 1 drivers +v0x187ac50_0 .net "a", 0 0, C4; 0 drivers +v0x187acd0_0 .net "b", 0 0, C4; 0 drivers +v0x187a080_0 .net "carryin", 0 0, C4; 0 drivers +v0x187a120_0 .net "carryout", 0 0, L_0x192fa30; 1 drivers +v0x1879540_0 .net "sum", 0 0, L_0x192fad0; 1 drivers +L_0x192fa30 .part L_0x1930000, 1, 1; +L_0x192fad0 .part L_0x1930000, 0, 1; +L_0x192fbc0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x192fcb0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x192fda0 .arith/sum 2, L_0x192fbc0, L_0x192fcb0; +L_0x192ff10 .concat [ 1 1 0 0], C4, C4<0>; +L_0x1930000 .arith/sum 2, L_0x192fda0, L_0x192ff10; +S_0x1854900 .scope module, "cpu_test" "cpu_test" 4 7; + .timescale 0 0; +v0x192eff0_0 .var "clk", 0 0; +v0x192f070_0 .var "reset", 0 0; +E_0x1878900 .event edge, v0x1929bb0_0; +S_0x1877d10 .scope module, "CPU" "cpu" 4 17, 5 18, S_0x1854900; + .timescale 0 0; +L_0x192c780 .functor AND 1, v0x192d040_0, L_0x1930190, C4<1>, C4<1>; +v0x192d610_0 .net "ALU_OperandSource", 0 0, v0x192cc50_0; 1 drivers +v0x192d690_0 .net "ALU_result", 31 0, v0x191c500_0; 1 drivers +v0x192d7a0_0 .net "Da", 31 0, L_0x1936840; 1 drivers +v0x192d820_0 .net "Db", 31 0, L_0x192a690; 1 drivers +v0x192d8a0_0 .net "Rd", 4 0, L_0x19317f0; 1 drivers +RS_0x7f69333e5578 .resolv tri, L_0x19315a0, L_0x1931a70, C4, C4; +v0x192d920_0 .net8 "Rs", 4 0, RS_0x7f69333e5578; 2 drivers +RS_0x7f69333d2468 .resolv tri, L_0x1931750, L_0x1931b10, C4, C4; +v0x192da30_0 .net8 "Rt", 4 0, RS_0x7f69333d2468; 2 drivers +v0x192dab0_0 .net *"_s2", 0 0, L_0x1930190; 1 drivers +v0x192db30_0 .net "branch_taken", 0 0, L_0x192c780; 1 drivers +v0x192dc00_0 .net "carryout", 0 0, v0x18ee520_0; 1 drivers +v0x192dc80_0 .net "clk", 0 0, v0x192eff0_0; 1 drivers +v0x192dd00_0 .net "command", 2 0, v0x192cf40_0; 1 drivers +v0x192de80_0 .net "dataOut", 31 0, L_0x199abc0; 1 drivers +v0x192df00_0 .net "funct", 5 0, L_0x1931930; 1 drivers +v0x192e050_0 .net "imm", 15 0, L_0x1931bb0; 1 drivers +v0x192e0d0_0 .net "instruction", 31 0, L_0x1930590; 1 drivers +v0x192df80_0 .net "is_branch", 0 0, v0x192d040_0; 1 drivers +v0x192e1e0_0 .net "is_jump", 0 0, v0x192d1a0_0; 1 drivers +v0x192e150_0 .net "isjr", 0 0, v0x192d0f0_0; 1 drivers +v0x192e350_0 .net "jump_target", 25 0, v0x18711f0_0; 1 drivers +v0x192e480_0 .net "linkToPC", 0 0, v0x192d270_0; 1 drivers +v0x192e500_0 .net "memoryRead", 0 0, v0x192d340_0; 1 drivers +v0x192e3d0_0 .net "memoryToRegister", 0 0, v0x192d410_0; 1 drivers +v0x192e690_0 .net "memoryWrite", 0 0, v0x192d490_0; 1 drivers +RS_0x7f69333e6298 .resolv tri, L_0x1931500, L_0x19319d0, L_0x1931640, C4; +v0x192e7e0_0 .net8 "opcode", 5 0, RS_0x7f69333e6298; 3 drivers +v0x192e8f0_0 .net "overflow", 0 0, v0x191c580_0; 1 drivers +v0x192e710_0 .net "pc", 31 0, v0x192b260_0; 1 drivers +v0x192eae0_0 .net "regAddr", 4 0, v0x18759a0_0; 1 drivers +v0x192e970_0 .net "reg_to_write", 4 0, v0x18735a0_0; 1 drivers +v0x192ec50_0 .net "shift", 4 0, L_0x1931890; 1 drivers +v0x192eb60_0 .net "tempWriteData", 31 0, v0x18816a0_0; 1 drivers +v0x192edd0_0 .net "temp_jump_target", 25 0, L_0x1931e60; 1 drivers +v0x192ecd0_0 .net "writeData", 31 0, v0x186e390_0; 1 drivers +v0x192ed50_0 .net "writeReg", 0 0, v0x192d590_0; 1 drivers +v0x192ef70_0 .net "zero", 0 0, v0x191c960_0; 1 drivers +L_0x1930190 .reduce/nor v0x191c960_0; +L_0x199ac70 .part L_0x1936840, 2, 26; +S_0x192ce00 .scope module, "CPU_control" "control" 5 47, 6 28, S_0x1877d10; + .timescale 0 0; +v0x192cc50_0 .var "ALUoperandSource", 0 0; +v0x192cf40_0 .var "command", 2 0; +v0x192cfc0_0 .alias "funct", 5 0, v0x192df00_0; +v0x192d040_0 .var "isbranch", 0 0; +v0x192d0f0_0 .var "isjr", 0 0; +v0x192d1a0_0 .var "isjump", 0 0; +v0x192d270_0 .var "linkToPC", 0 0; +v0x192d340_0 .var "memoryRead", 0 0; +v0x192d410_0 .var "memoryToRegister", 0 0; +v0x192d490_0 .var "memoryWrite", 0 0; +v0x192d510_0 .alias "opcode", 5 0, v0x192e7e0_0; +v0x192d590_0 .var "writeReg", 0 0; +E_0x192b9b0 .event edge, v0x192a720_0, v0x192a030_0; +S_0x192a970 .scope module, "IF" "ifetch" 5 64, 7 6, S_0x1877d10; + .timescale 0 0; +v0x192c160_0 .net "_", 0 0, L_0x1931100; 1 drivers +v0x192c200_0 .net *"_s10", 1 0, C4<00>; 1 drivers +v0x192c280_0 .net *"_s15", 3 0, L_0x1931250; 1 drivers +v0x192c320_0 .net *"_s16", 1 0, C4<00>; 1 drivers +v0x192c3d0_0 .net *"_s7", 0 0, L_0x1930740; 1 drivers +v0x192c470_0 .net *"_s8", 13 0, L_0x1930870; 1 drivers +v0x192c510_0 .alias "branch_addr", 15 0, v0x192e050_0; +v0x192c590_0 .var "branch_addr_full", 31 0; +v0x192c680_0 .alias "clk", 0 0, v0x192dc80_0; +v0x192c700_0 .alias "increased_pc", 31 0, v0x192e710_0; +v0x192c7e0_0 .alias "is_branch", 0 0, v0x192db30_0; +v0x192c860_0 .alias "is_jump", 0 0, v0x192e1e0_0; +v0x192c910_0 .alias "jump_addr", 25 0, v0x192e350_0; +v0x192c9c0_0 .alias "out", 31 0, v0x192e0d0_0; +v0x192cb50_0 .var "pc", 31 0; +v0x192cbd0_0 .net "pc_next", 31 0, v0x192ad00_0; 1 drivers +v0x192ca40_0 .net "to_add", 31 0, v0x192b930_0; 1 drivers +v0x192cce0_0 .net "write_pc", 0 0, C4<1>; 1 drivers +E_0x1929540 .event posedge, v0x187d040_0; +L_0x1930740 .part L_0x1931bb0, 15, 1; +LS_0x1930870_0_0 .concat [ 1 1 1 1], L_0x1930740, L_0x1930740, L_0x1930740, L_0x1930740; +LS_0x1930870_0_4 .concat [ 1 1 1 1], L_0x1930740, L_0x1930740, L_0x1930740, L_0x1930740; +LS_0x1930870_0_8 .concat [ 1 1 1 1], L_0x1930740, L_0x1930740, L_0x1930740, L_0x1930740; +LS_0x1930870_0_12 .concat [ 1 1 0 0], L_0x1930740, L_0x1930740; +L_0x1930870 .concat [ 4 4 4 2], LS_0x1930870_0_0, LS_0x1930870_0_4, LS_0x1930870_0_8, LS_0x1930870_0_12; +L_0x1930b60 .concat [ 2 16 14 0], C4<00>, L_0x1931bb0, L_0x1930870; +L_0x1931250 .part v0x192cb50_0, 28, 4; +L_0x19312f0 .concat [ 2 26 4 0], C4<00>, v0x18711f0_0, L_0x1931250; +S_0x192b9e0 .scope module, "program_mem" "memory" 7 22, 8 42, S_0x192a970; + .timescale 0 0; +L_0x1930590 .functor BUFZ 32, L_0x1930280, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x192bb00_0 .net "Addr", 31 0, v0x192cb50_0; 1 drivers +v0x192bbd0_0 .net "DataIn", 31 0, C4<00000000000000000000000000000000>; 1 drivers +v0x192bc50_0 .alias "DataOut", 31 0, v0x192e0d0_0; +v0x192bcd0_0 .net *"_s0", 31 0, L_0x1930280; 1 drivers +v0x192bd80_0 .net *"_s2", 1 0, C4<00>; 1 drivers +v0x192be20_0 .net *"_s5", 29 0, L_0x1930360; 1 drivers +v0x192bec0_0 .net *"_s6", 31 0, L_0x1930400; 1 drivers +v0x192bf60_0 .alias "clk", 0 0, v0x192dc80_0; +v0x192bfe0 .array "mem", 0 4095, 31 0; +v0x192c060_0 .net "regWE", 0 0, C4<0>; 1 drivers +E_0x192bad0 .event edge, v0x192b110_0; +L_0x1930280 .array/port v0x192bfe0, L_0x1930400; +L_0x1930360 .part v0x192cb50_0, 2, 30; +L_0x1930400 .concat [ 30 2 0 0], L_0x1930360, C4<00>; +S_0x192b600 .scope module, "should_branch" "mux2to1by32" 7 28, 2 18, S_0x192a970; + .timescale 0 0; +v0x192b730_0 .alias "address", 0 0, v0x192db30_0; +v0x192b7f0_0 .net "input0", 31 0, C4<00000000000000000000000000000100>; 1 drivers +v0x192b890_0 .net "input1", 31 0, L_0x1930b60; 1 drivers +v0x192b930_0 .var "out", 31 0; +E_0x192ac50 .event edge, v0x192b730_0, v0x192b890_0, v0x192b7f0_0; +S_0x192adb0 .scope module, "add_to_pc" "add32bit" 7 33, 9 3, S_0x192a970; + .timescale 0 0; +L_0x1930cd0 .functor XNOR 1, L_0x1930d60, L_0x1930ee0, C4<0>, C4<0>; +L_0x1930f80 .functor XOR 1, v0x192b330_0, L_0x1931010, C4<0>, C4<0>; +L_0x1931100 .functor AND 1, L_0x1930f80, L_0x1930cd0, C4<1>, C4<1>; +v0x192af10_0 .net *"_s1", 0 0, L_0x1930d60; 1 drivers +v0x192afd0_0 .net *"_s3", 0 0, L_0x1930ee0; 1 drivers +v0x192b070_0 .net *"_s5", 0 0, L_0x1931010; 1 drivers +v0x192b110_0 .alias "a", 31 0, v0x192bb00_0; +v0x192b1c0_0 .alias "b", 31 0, v0x192ca40_0; +v0x192b260_0 .var "c", 31 0; +v0x192b330_0 .var "carry", 0 0; +v0x192b3d0_0 .net "carryXorSign", 0 0, L_0x1930f80; 1 drivers +v0x192b4c0_0 .alias "overflow", 0 0, v0x192c160_0; +v0x192b560_0 .net "sameSign", 0 0, L_0x1930cd0; 1 drivers +E_0x192aea0 .event edge, v0x192b1c0_0, v0x192b110_0; +L_0x1930d60 .part v0x192cb50_0, 31, 1; +L_0x1930ee0 .part v0x192b930_0, 31, 1; +L_0x1931010 .part v0x192b260_0, 31, 1; +S_0x192aa60 .scope module, "should_jump" "mux2to1by32" 7 38, 2 18, S_0x192a970; + .timescale 0 0; +v0x192ab50_0 .alias "address", 0 0, v0x192e1e0_0; +v0x192abd0_0 .alias "input0", 31 0, v0x192e710_0; +v0x192ac80_0 .net "input1", 31 0, L_0x19312f0; 1 drivers +v0x192ad00_0 .var "out", 31 0; +E_0x19296e0 .event edge, v0x192ab50_0, v0x192ac80_0, v0x186e2f0_0; +S_0x192a420 .scope module, "ID_R" "instructionDecoderR" 5 76, 10 2, S_0x1877d10; + .timescale 0 0; +v0x192a510_0 .alias "Rd", 4 0, v0x192d8a0_0; +v0x192a590_0 .alias "Rs", 4 0, v0x192d920_0; +v0x192a610_0 .alias "Rt", 4 0, v0x192da30_0; +v0x192a720_0 .alias "funct", 5 0, v0x192df00_0; +v0x192a7a0_0 .alias "instruction", 31 0, v0x192e0d0_0; +v0x192a820_0 .alias "opcode", 5 0, v0x192e7e0_0; +v0x192a8f0_0 .alias "shift", 4 0, v0x192ec50_0; +L_0x1931500 .part L_0x1930590, 26, 6; +L_0x19315a0 .part L_0x1930590, 21, 5; +L_0x1931750 .part L_0x1930590, 16, 5; +L_0x19317f0 .part L_0x1930590, 11, 5; +L_0x1931890 .part L_0x1930590, 6, 5; +L_0x1931930 .part L_0x1930590, 0, 6; +S_0x192a0b0 .scope module, "ID_I" "instructionDecoderI" 5 77, 11 2, S_0x1877d10; + .timescale 0 0; +v0x192a1a0_0 .alias "Rs", 4 0, v0x192d920_0; +v0x192a220_0 .alias "Rt", 4 0, v0x192da30_0; +v0x192a2a0_0 .alias "imm", 15 0, v0x192e050_0; +v0x192a320_0 .alias "instruction", 31 0, v0x192e0d0_0; +v0x192a3a0_0 .alias "opcode", 5 0, v0x192e7e0_0; +L_0x19319d0 .part L_0x1930590, 26, 6; +L_0x1931a70 .part L_0x1930590, 21, 5; +L_0x1931b10 .part L_0x1930590, 16, 5; +L_0x1931bb0 .part L_0x1930590, 0, 16; +S_0x1929ec0 .scope module, "ID_J" "instructionDecoderJ" 5 78, 12 2, S_0x1877d10; + .timescale 0 0; +v0x1929bb0_0 .alias "instruction", 31 0, v0x192e0d0_0; +v0x1929fb0_0 .alias "jump_target", 25 0, v0x192edd0_0; +v0x192a030_0 .alias "opcode", 5 0, v0x192e7e0_0; +L_0x1931640 .part L_0x1930590, 26, 6; +L_0x1931e60 .part L_0x1930590, 0, 26; +S_0x191d410 .scope module, "regfile" "regfile" 5 83, 13 15, S_0x1877d10; + .timescale 0 0; +v0x1928550_0 .alias "Clk", 0 0, v0x192dc80_0; +v0x19285d0_0 .alias "ReadData1", 31 0, v0x192d7a0_0; +v0x1928650_0 .alias "ReadData2", 31 0, v0x192d820_0; +v0x1928760_0 .alias "ReadRegister1", 4 0, v0x192d920_0; +v0x19287e0_0 .alias "ReadRegister2", 4 0, v0x192da30_0; +v0x1928860_0 .alias "RegWrite", 0 0, v0x192ed50_0; +v0x19288e0_0 .alias "WriteData", 31 0, v0x192ecd0_0; +v0x1928960_0 .alias "WriteRegister", 4 0, v0x192eae0_0; +v0x19289e0_0 .net "decoder", 31 0, L_0x1932030; 1 drivers +v0x1928a60_0 .net "reg0", 31 0, v0x1924400_0; 1 drivers +v0x1928ae0_0 .net "reg1", 31 0, v0x19278d0_0; 1 drivers +v0x1928b60_0 .net "reg10", 31 0, v0x1925a70_0; 1 drivers +v0x1928c50_0 .net "reg11", 31 0, v0x1925710_0; 1 drivers +v0x1928cd0_0 .net "reg12", 31 0, v0x19253b0_0; 1 drivers +v0x1928dd0_0 .net "reg13", 31 0, v0x1925050_0; 1 drivers +v0x1928e50_0 .net "reg14", 31 0, v0x1924cf0_0; 1 drivers +v0x1928d50_0 .net "reg15", 31 0, v0x1924990_0; 1 drivers +v0x1928f60_0 .net "reg16", 31 0, v0x19227e0_0; 1 drivers +v0x1928ed0_0 .net "reg17", 31 0, v0x19240a0_0; 1 drivers +v0x1929080_0 .net "reg18", 31 0, v0x1923d40_0; 1 drivers +v0x1928fe0_0 .net "reg19", 31 0, v0x19239e0_0; 1 drivers +v0x19291b0_0 .net "reg2", 31 0, v0x1927570_0; 1 drivers +v0x1929100_0 .net "reg20", 31 0, v0x1923680_0; 1 drivers +v0x19292f0_0 .net "reg21", 31 0, v0x1923320_0; 1 drivers +v0x1929230_0 .net "reg22", 31 0, v0x1922fc0_0; 1 drivers +v0x1929440_0 .net "reg23", 31 0, v0x1922c60_0; 1 drivers +v0x1929370_0 .net "reg24", 31 0, v0x1921a70_0; 1 drivers +v0x19295a0_0 .net "reg25", 31 0, v0x1922480_0; 1 drivers +v0x19294c0_0 .net "reg26", 31 0, v0x1922120_0; 1 drivers +v0x1929710_0 .net "reg27", 31 0, v0x1921e10_0; 1 drivers +v0x1929620_0 .net "reg28", 31 0, v0x1921b00_0; 1 drivers +v0x1929890_0 .net "reg29", 31 0, v0x1921680_0; 1 drivers +v0x1929790_0 .net "reg3", 31 0, v0x1927210_0; 1 drivers +v0x1929810_0 .net "reg30", 31 0, v0x1921340_0; 1 drivers +v0x1929a30_0 .net "reg31", 31 0, v0x1921050_0; 1 drivers +v0x1929ab0_0 .net "reg4", 31 0, v0x1926eb0_0; 1 drivers +v0x1929910_0 .net "reg5", 31 0, v0x1926b50_0; 1 drivers +v0x1929990_0 .net "reg6", 31 0, v0x19267f0_0; 1 drivers +v0x1929c70_0 .net "reg7", 31 0, v0x1926490_0; 1 drivers +v0x1929cf0_0 .net "reg8", 31 0, v0x1926130_0; 1 drivers +v0x1929b30_0 .net "reg9", 31 0, v0x1925dd0_0; 1 drivers +L_0x1932200 .part L_0x1932030, 0, 1; +L_0x19322a0 .part L_0x1932030, 1, 1; +L_0x19323d0 .part L_0x1932030, 2, 1; +L_0x1932470 .part L_0x1932030, 3, 1; +L_0x1932570 .part L_0x1932030, 4, 1; +L_0x1932640 .part L_0x1932030, 5, 1; +L_0x1932820 .part L_0x1932030, 6, 1; +L_0x19328c0 .part L_0x1932030, 7, 1; +L_0x1932960 .part L_0x1932030, 8, 1; +L_0x1932a30 .part L_0x1932030, 9, 1; +L_0x1932b60 .part L_0x1932030, 10, 1; +L_0x1932c30 .part L_0x1932030, 11, 1; +L_0x1932d00 .part L_0x1932030, 12, 1; +L_0x1932dd0 .part L_0x1932030, 13, 1; +L_0x19330b0 .part L_0x1932030, 14, 1; +L_0x1933150 .part L_0x1932030, 15, 1; +L_0x1933280 .part L_0x1932030, 16, 1; +L_0x1933320 .part L_0x1932030, 17, 1; +L_0x1933490 .part L_0x1932030, 18, 1; +L_0x1933530 .part L_0x1932030, 19, 1; +L_0x19333f0 .part L_0x1932030, 20, 1; +L_0x1933680 .part L_0x1932030, 21, 1; +L_0x19335d0 .part L_0x1932030, 22, 1; +L_0x1933840 .part L_0x1932030, 23, 1; +L_0x1933750 .part L_0x1932030, 24, 1; +L_0x1933a10 .part L_0x1932030, 25, 1; +L_0x1933910 .part L_0x1932030, 26, 1; +L_0x1933bc0 .part L_0x1932030, 27, 1; +L_0x1933ae0 .part L_0x1932030, 28, 1; +L_0x1933d80 .part L_0x1932030, 29, 1; +L_0x1933c90 .part L_0x1932030, 30, 1; +L_0x1932fa0 .part L_0x1932030, 31, 1; +S_0x1924550 .scope module, "dec" "decoder1to32" 13 34, 14 4, S_0x191d410; + .timescale 0 0; +v0x1924640_0 .net *"_s0", 31 0, L_0x1931f00; 1 drivers +v0x1924700_0 .net *"_s3", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x19283d0_0 .alias "address", 4 0, v0x192eae0_0; +v0x1928450_0 .alias "enable", 0 0, v0x192ed50_0; +v0x19284d0_0 .alias "out", 31 0, v0x19289e0_0; +L_0x1931f00 .concat [ 1 31 0 0], v0x192d590_0, C4<0000000000000000000000000000000>; +L_0x1932030 .shift/l 32, L_0x1931f00, v0x18759a0_0; +S_0x1927a20 .scope module, "r0" "register32zero" 13 35, 15 1, S_0x191d410; + .timescale 0 0; +v0x1927b10_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1924380_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1924400_0 .var "q", 31 0; +v0x19244d0_0 .net "wrenable", 0 0, L_0x1932200; 1 drivers +S_0x19276c0 .scope module, "r1" "register32" 13 36, 16 1, S_0x191d410; + .timescale 0 0; +v0x19277b0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1927850_0 .alias "d", 31 0, v0x192ecd0_0; +v0x19278d0_0 .var "q", 31 0; +v0x19279a0_0 .net "wrenable", 0 0, L_0x19322a0; 1 drivers +S_0x1927360 .scope module, "r2" "register32" 13 37, 16 1, S_0x191d410; + .timescale 0 0; +v0x1927450_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19274f0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1927570_0 .var "q", 31 0; +v0x1927640_0 .net "wrenable", 0 0, L_0x19323d0; 1 drivers +S_0x1927000 .scope module, "r3" "register32" 13 38, 16 1, S_0x191d410; + .timescale 0 0; +v0x19270f0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1927190_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1927210_0 .var "q", 31 0; +v0x19272e0_0 .net "wrenable", 0 0, L_0x1932470; 1 drivers +S_0x1926ca0 .scope module, "r4" "register32" 13 39, 16 1, S_0x191d410; + .timescale 0 0; +v0x1926d90_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1926e30_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1926eb0_0 .var "q", 31 0; +v0x1926f80_0 .net "wrenable", 0 0, L_0x1932570; 1 drivers +S_0x1926940 .scope module, "r5" "register32" 13 40, 16 1, S_0x191d410; + .timescale 0 0; +v0x1926a30_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1926ad0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1926b50_0 .var "q", 31 0; +v0x1926c20_0 .net "wrenable", 0 0, L_0x1932640; 1 drivers +S_0x19265e0 .scope module, "r6" "register32" 13 41, 16 1, S_0x191d410; + .timescale 0 0; +v0x19266d0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1926770_0 .alias "d", 31 0, v0x192ecd0_0; +v0x19267f0_0 .var "q", 31 0; +v0x19268c0_0 .net "wrenable", 0 0, L_0x1932820; 1 drivers +S_0x1926280 .scope module, "r7" "register32" 13 42, 16 1, S_0x191d410; + .timescale 0 0; +v0x1926370_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1926410_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1926490_0 .var "q", 31 0; +v0x1926560_0 .net "wrenable", 0 0, L_0x19328c0; 1 drivers +S_0x1925f20 .scope module, "r8" "register32" 13 43, 16 1, S_0x191d410; + .timescale 0 0; +v0x1926010_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19260b0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1926130_0 .var "q", 31 0; +v0x1926200_0 .net "wrenable", 0 0, L_0x1932960; 1 drivers +S_0x1925bc0 .scope module, "r9" "register32" 13 44, 16 1, S_0x191d410; + .timescale 0 0; +v0x1925cb0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1925d50_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1925dd0_0 .var "q", 31 0; +v0x1925ea0_0 .net "wrenable", 0 0, L_0x1932a30; 1 drivers +S_0x1925860 .scope module, "r10" "register32" 13 45, 16 1, S_0x191d410; + .timescale 0 0; +v0x1925950_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19259f0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1925a70_0 .var "q", 31 0; +v0x1925b40_0 .net "wrenable", 0 0, L_0x1932b60; 1 drivers +S_0x1925500 .scope module, "r11" "register32" 13 46, 16 1, S_0x191d410; + .timescale 0 0; +v0x19255f0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1925690_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1925710_0 .var "q", 31 0; +v0x19257e0_0 .net "wrenable", 0 0, L_0x1932c30; 1 drivers +S_0x19251a0 .scope module, "r12" "register32" 13 47, 16 1, S_0x191d410; + .timescale 0 0; +v0x1925290_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1925330_0 .alias "d", 31 0, v0x192ecd0_0; +v0x19253b0_0 .var "q", 31 0; +v0x1925480_0 .net "wrenable", 0 0, L_0x1932d00; 1 drivers +S_0x1924e40 .scope module, "r13" "register32" 13 48, 16 1, S_0x191d410; + .timescale 0 0; +v0x1924f30_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1924fd0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1925050_0 .var "q", 31 0; +v0x1925120_0 .net "wrenable", 0 0, L_0x1932dd0; 1 drivers +S_0x1924ae0 .scope module, "r14" "register32" 13 49, 16 1, S_0x191d410; + .timescale 0 0; +v0x1924bd0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1924c70_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1924cf0_0 .var "q", 31 0; +v0x1924dc0_0 .net "wrenable", 0 0, L_0x19330b0; 1 drivers +S_0x19247a0 .scope module, "r15" "register32" 13 50, 16 1, S_0x191d410; + .timescale 0 0; +v0x1924890_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1924910_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1924990_0 .var "q", 31 0; +v0x1924a60_0 .net "wrenable", 0 0, L_0x1933150; 1 drivers +S_0x19241f0 .scope module, "r16" "register32" 13 51, 16 1, S_0x191d410; + .timescale 0 0; +v0x19242e0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1922760_0 .alias "d", 31 0, v0x192ecd0_0; +v0x19227e0_0 .var "q", 31 0; +v0x19228b0_0 .net "wrenable", 0 0, L_0x1933280; 1 drivers +S_0x1923e90 .scope module, "r17" "register32" 13 52, 16 1, S_0x191d410; + .timescale 0 0; +v0x1923f80_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1924020_0 .alias "d", 31 0, v0x192ecd0_0; +v0x19240a0_0 .var "q", 31 0; +v0x1924170_0 .net "wrenable", 0 0, L_0x1933320; 1 drivers +S_0x1923b30 .scope module, "r18" "register32" 13 53, 16 1, S_0x191d410; + .timescale 0 0; +v0x1923c20_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1923cc0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1923d40_0 .var "q", 31 0; +v0x1923e10_0 .net "wrenable", 0 0, L_0x1933490; 1 drivers +S_0x19237d0 .scope module, "r19" "register32" 13 54, 16 1, S_0x191d410; + .timescale 0 0; +v0x19238c0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1923960_0 .alias "d", 31 0, v0x192ecd0_0; +v0x19239e0_0 .var "q", 31 0; +v0x1923ab0_0 .net "wrenable", 0 0, L_0x1933530; 1 drivers +S_0x1923470 .scope module, "r20" "register32" 13 55, 16 1, S_0x191d410; + .timescale 0 0; +v0x1923560_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1923600_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1923680_0 .var "q", 31 0; +v0x1923750_0 .net "wrenable", 0 0, L_0x19333f0; 1 drivers +S_0x1923110 .scope module, "r21" "register32" 13 56, 16 1, S_0x191d410; + .timescale 0 0; +v0x1923200_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19232a0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1923320_0 .var "q", 31 0; +v0x19233f0_0 .net "wrenable", 0 0, L_0x1933680; 1 drivers +S_0x1922db0 .scope module, "r22" "register32" 13 57, 16 1, S_0x191d410; + .timescale 0 0; +v0x1922ea0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1922f40_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1922fc0_0 .var "q", 31 0; +v0x1923090_0 .net "wrenable", 0 0, L_0x19335d0; 1 drivers +S_0x1922a50 .scope module, "r23" "register32" 13 58, 16 1, S_0x191d410; + .timescale 0 0; +v0x1922b40_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1922be0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1922c60_0 .var "q", 31 0; +v0x1922d30_0 .net "wrenable", 0 0, L_0x1933840; 1 drivers +S_0x19225d0 .scope module, "r24" "register32" 13 59, 16 1, S_0x191d410; + .timescale 0 0; +v0x19226c0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1921960_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1921a70_0 .var "q", 31 0; +v0x19229d0_0 .net "wrenable", 0 0, L_0x1933750; 1 drivers +S_0x1922270 .scope module, "r25" "register32" 13 60, 16 1, S_0x191d410; + .timescale 0 0; +v0x1922360_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1922400_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1922480_0 .var "q", 31 0; +v0x1922550_0 .net "wrenable", 0 0, L_0x1933a10; 1 drivers +S_0x1921f10 .scope module, "r26" "register32" 13 61, 16 1, S_0x191d410; + .timescale 0 0; +v0x1922000_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19220a0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1922120_0 .var "q", 31 0; +v0x19221f0_0 .net "wrenable", 0 0, L_0x1933910; 1 drivers +S_0x1921c00 .scope module, "r27" "register32" 13 62, 16 1, S_0x191d410; + .timescale 0 0; +v0x1921cf0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1921d90_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1921e10_0 .var "q", 31 0; +v0x1921e90_0 .net "wrenable", 0 0, L_0x1933bc0; 1 drivers +S_0x19217d0 .scope module, "r28" "register32" 13 63, 16 1, S_0x191d410; + .timescale 0 0; +v0x19218c0_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19219f0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1921b00_0 .var "q", 31 0; +v0x1921b80_0 .net "wrenable", 0 0, L_0x1933ae0; 1 drivers +S_0x1921490 .scope module, "r29" "register32" 13 64, 16 1, S_0x191d410; + .timescale 0 0; +v0x1921580_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1921600_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1921680_0 .var "q", 31 0; +v0x1921750_0 .net "wrenable", 0 0, L_0x1933d80; 1 drivers +S_0x1921150 .scope module, "r30" "register32" 13 65, 16 1, S_0x191d410; + .timescale 0 0; +v0x1921240_0 .alias "clk", 0 0, v0x192dc80_0; +v0x19212c0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1921340_0 .var "q", 31 0; +v0x1921410_0 .net "wrenable", 0 0, L_0x1933c90; 1 drivers +S_0x1920b40 .scope module, "r31" "register32" 13 66, 16 1, S_0x191d410; + .timescale 0 0; +v0x1920f20_0 .alias "clk", 0 0, v0x192dc80_0; +v0x1920fa0_0 .alias "d", 31 0, v0x192ecd0_0; +v0x1921050_0 .var "q", 31 0; +v0x19210d0_0 .net "wrenable", 0 0, L_0x1932fa0; 1 drivers +E_0x191e8a0 .event negedge, v0x187d040_0; +S_0x191ec60 .scope module, "mux1" "mux32to1by32" 13 68, 17 1, S_0x191d410; + .timescale 0 0; +L_0x1932b00 .functor BUFZ 32, v0x1924400_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x192dd80 .functor BUFZ 32, v0x19278d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1932f30 .functor BUFZ 32, v0x1927570_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1932710 .functor BUFZ 32, v0x1927210_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934550 .functor BUFZ 32, v0x1926eb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934670 .functor BUFZ 32, v0x1926b50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19347d0 .functor BUFZ 32, v0x19267f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19348c0 .functor BUFZ 32, v0x1926490_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19349e0 .functor BUFZ 32, v0x1926130_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934b00 .functor BUFZ 32, v0x1925dd0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934c80 .functor BUFZ 32, v0x1925a70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934da0 .functor BUFZ 32, v0x1925710_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934c20 .functor BUFZ 32, v0x19253b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1934ff0 .functor BUFZ 32, v0x1925050_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935190 .functor BUFZ 32, v0x1924cf0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19352b0 .functor BUFZ 32, v0x1924990_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935460 .functor BUFZ 32, v0x19227e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935580 .functor BUFZ 32, v0x19240a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19353d0 .functor BUFZ 32, v0x1923d40_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19357d0 .functor BUFZ 32, v0x19239e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19356a0 .functor BUFZ 32, v0x1923680_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935a30 .functor BUFZ 32, v0x1923320_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19358f0 .functor BUFZ 32, v0x1922fc0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935ca0 .functor BUFZ 32, v0x1922c60_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935b50 .functor BUFZ 32, v0x1921a70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935f20 .functor BUFZ 32, v0x1922480_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1935dc0 .functor BUFZ 32, v0x1922120_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936180 .functor BUFZ 32, v0x1921e10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936010 .functor BUFZ 32, v0x1921b00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19363f0 .functor BUFZ 32, v0x1921680_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936270 .functor BUFZ 32, v0x1921340_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936300 .functor BUFZ 32, v0x1921050_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936840 .functor BUFZ 32, L_0x19364e0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x191f360_0 .net *"_s96", 31 0, L_0x19364e0; 1 drivers +v0x191f400_0 .alias "address", 4 0, v0x192d920_0; +v0x191f4a0_0 .alias "input0", 31 0, v0x1928a60_0; +v0x191f520_0 .alias "input1", 31 0, v0x1928ae0_0; +v0x191f5d0_0 .alias "input10", 31 0, v0x1928b60_0; +v0x191f680_0 .alias "input11", 31 0, v0x1928c50_0; +v0x191f700_0 .alias "input12", 31 0, v0x1928cd0_0; +v0x191f7b0_0 .alias "input13", 31 0, v0x1928dd0_0; +v0x191f860_0 .alias "input14", 31 0, v0x1928e50_0; +v0x191f910_0 .alias "input15", 31 0, v0x1928d50_0; +v0x191f9c0_0 .alias "input16", 31 0, v0x1928f60_0; +v0x191fa70_0 .alias "input17", 31 0, v0x1928ed0_0; +v0x191fb20_0 .alias "input18", 31 0, v0x1929080_0; +v0x191fbd0_0 .alias "input19", 31 0, v0x1928fe0_0; +v0x191fd00_0 .alias "input2", 31 0, v0x19291b0_0; +v0x191fdb0_0 .alias "input20", 31 0, v0x1929100_0; +v0x191fc50_0 .alias "input21", 31 0, v0x19292f0_0; +v0x191ff20_0 .alias "input22", 31 0, v0x1929230_0; +v0x1920040_0 .alias "input23", 31 0, v0x1929440_0; +v0x19200c0_0 .alias "input24", 31 0, v0x1929370_0; +v0x191ffa0_0 .alias "input25", 31 0, v0x19295a0_0; +v0x1920220_0 .alias "input26", 31 0, v0x19294c0_0; +v0x1920170_0 .alias "input27", 31 0, v0x1929710_0; +v0x1920360_0 .alias "input28", 31 0, v0x1929620_0; +v0x19202a0_0 .alias "input29", 31 0, v0x1929890_0; +v0x19204b0_0 .alias "input3", 31 0, v0x1929790_0; +v0x1920410_0 .alias "input30", 31 0, v0x1929810_0; +v0x1920640_0 .alias "input31", 31 0, v0x1929a30_0; +v0x1920530_0 .alias "input4", 31 0, v0x1929ab0_0; +v0x19207b0_0 .alias "input5", 31 0, v0x1929910_0; +v0x19206c0_0 .alias "input6", 31 0, v0x1929990_0; +v0x1920930_0 .alias "input7", 31 0, v0x1929c70_0; +v0x1920830_0 .alias "input8", 31 0, v0x1929cf0_0; +v0x1920ac0_0 .alias "input9", 31 0, v0x1929b30_0; +v0x19209b0 .array "mux", 0 31; +v0x19209b0_0 .net v0x19209b0 0, 31 0, L_0x1932b00; 1 drivers +v0x19209b0_1 .net v0x19209b0 1, 31 0, L_0x192dd80; 1 drivers +v0x19209b0_2 .net v0x19209b0 2, 31 0, L_0x1932f30; 1 drivers +v0x19209b0_3 .net v0x19209b0 3, 31 0, L_0x1932710; 1 drivers +v0x19209b0_4 .net v0x19209b0 4, 31 0, L_0x1934550; 1 drivers +v0x19209b0_5 .net v0x19209b0 5, 31 0, L_0x1934670; 1 drivers +v0x19209b0_6 .net v0x19209b0 6, 31 0, L_0x19347d0; 1 drivers +v0x19209b0_7 .net v0x19209b0 7, 31 0, L_0x19348c0; 1 drivers +v0x19209b0_8 .net v0x19209b0 8, 31 0, L_0x19349e0; 1 drivers +v0x19209b0_9 .net v0x19209b0 9, 31 0, L_0x1934b00; 1 drivers +v0x19209b0_10 .net v0x19209b0 10, 31 0, L_0x1934c80; 1 drivers +v0x19209b0_11 .net v0x19209b0 11, 31 0, L_0x1934da0; 1 drivers +v0x19209b0_12 .net v0x19209b0 12, 31 0, L_0x1934c20; 1 drivers +v0x19209b0_13 .net v0x19209b0 13, 31 0, L_0x1934ff0; 1 drivers +v0x19209b0_14 .net v0x19209b0 14, 31 0, L_0x1935190; 1 drivers +v0x19209b0_15 .net v0x19209b0 15, 31 0, L_0x19352b0; 1 drivers +v0x19209b0_16 .net v0x19209b0 16, 31 0, L_0x1935460; 1 drivers +v0x19209b0_17 .net v0x19209b0 17, 31 0, L_0x1935580; 1 drivers +v0x19209b0_18 .net v0x19209b0 18, 31 0, L_0x19353d0; 1 drivers +v0x19209b0_19 .net v0x19209b0 19, 31 0, L_0x19357d0; 1 drivers +v0x19209b0_20 .net v0x19209b0 20, 31 0, L_0x19356a0; 1 drivers +v0x19209b0_21 .net v0x19209b0 21, 31 0, L_0x1935a30; 1 drivers +v0x19209b0_22 .net v0x19209b0 22, 31 0, L_0x19358f0; 1 drivers +v0x19209b0_23 .net v0x19209b0 23, 31 0, L_0x1935ca0; 1 drivers +v0x19209b0_24 .net v0x19209b0 24, 31 0, L_0x1935b50; 1 drivers +v0x19209b0_25 .net v0x19209b0 25, 31 0, L_0x1935f20; 1 drivers +v0x19209b0_26 .net v0x19209b0 26, 31 0, L_0x1935dc0; 1 drivers +v0x19209b0_27 .net v0x19209b0 27, 31 0, L_0x1936180; 1 drivers +v0x19209b0_28 .net v0x19209b0 28, 31 0, L_0x1936010; 1 drivers +v0x19209b0_29 .net v0x19209b0 29, 31 0, L_0x19363f0; 1 drivers +v0x19209b0_30 .net v0x19209b0 30, 31 0, L_0x1936270; 1 drivers +v0x19209b0_31 .net v0x19209b0 31, 31 0, L_0x1936300; 1 drivers +v0x1920d70_0 .alias "out", 31 0, v0x192d7a0_0; +L_0x19364e0 .array/port v0x19209b0, RS_0x7f69333e5578; +S_0x191d500 .scope module, "mux2" "mux32to1by32" 13 69, 17 1, S_0x191d410; + .timescale 0 0; +L_0x19368a0 .functor BUFZ 32, v0x1924400_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936900 .functor BUFZ 32, v0x19278d0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936960 .functor BUFZ 32, v0x1927570_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19369f0 .functor BUFZ 32, v0x1927210_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936ab0 .functor BUFZ 32, v0x1926eb0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936b40 .functor BUFZ 32, v0x1926b50_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936bd0 .functor BUFZ 32, v0x19267f0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936c30 .functor BUFZ 32, v0x1926490_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936c90 .functor BUFZ 32, v0x1926130_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936d20 .functor BUFZ 32, v0x1925dd0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936e10 .functor BUFZ 32, v0x1925a70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936ea0 .functor BUFZ 32, v0x1925710_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936db0 .functor BUFZ 32, v0x19253b0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936f60 .functor BUFZ 32, v0x1925050_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1936ff0 .functor BUFZ 32, v0x1924cf0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937080 .functor BUFZ 32, v0x1924990_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19371a0 .functor BUFZ 32, v0x19227e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937230 .functor BUFZ 32, v0x19240a0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937110 .functor BUFZ 32, v0x1923d40_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937360 .functor BUFZ 32, v0x19239e0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19372c0 .functor BUFZ 32, v0x1923680_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19374a0 .functor BUFZ 32, v0x1923320_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19373f0 .functor BUFZ 32, v0x1922fc0_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19375f0 .functor BUFZ 32, v0x1922c60_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937530 .functor BUFZ 32, v0x1921a70_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937750 .functor BUFZ 32, v0x1922480_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937680 .functor BUFZ 32, v0x1922120_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937890 .functor BUFZ 32, v0x1921e10_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19377b0 .functor BUFZ 32, v0x1921b00_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19379e0 .functor BUFZ 32, v0x1921680_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x19378f0 .functor BUFZ 32, v0x1921340_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x1937980 .functor BUFZ 32, v0x1921050_0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +L_0x192a690 .functor BUFZ 32, L_0x1937a40, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x191d5f0_0 .net *"_s96", 31 0, L_0x1937a40; 1 drivers +v0x191d670_0 .alias "address", 4 0, v0x192da30_0; +v0x191d720_0 .alias "input0", 31 0, v0x1928a60_0; +v0x191d7a0_0 .alias "input1", 31 0, v0x1928ae0_0; +v0x191d850_0 .alias "input10", 31 0, v0x1928b60_0; +v0x191d8d0_0 .alias "input11", 31 0, v0x1928c50_0; +v0x191d950_0 .alias "input12", 31 0, v0x1928cd0_0; +v0x191d9d0_0 .alias "input13", 31 0, v0x1928dd0_0; +v0x191da50_0 .alias "input14", 31 0, v0x1928e50_0; +v0x191dad0_0 .alias "input15", 31 0, v0x1928d50_0; +v0x191dbb0_0 .alias "input16", 31 0, v0x1928f60_0; +v0x191dc50_0 .alias "input17", 31 0, v0x1928ed0_0; +v0x191dcf0_0 .alias "input18", 31 0, v0x1929080_0; +v0x191dd90_0 .alias "input19", 31 0, v0x1928fe0_0; +v0x191deb0_0 .alias "input2", 31 0, v0x19291b0_0; +v0x191df50_0 .alias "input20", 31 0, v0x1929100_0; +v0x191de10_0 .alias "input21", 31 0, v0x19292f0_0; +v0x191e0a0_0 .alias "input22", 31 0, v0x1929230_0; +v0x191e1c0_0 .alias "input23", 31 0, v0x1929440_0; +v0x191e240_0 .alias "input24", 31 0, v0x1929370_0; +v0x191e120_0 .alias "input25", 31 0, v0x19295a0_0; +v0x191e370_0 .alias "input26", 31 0, v0x19294c0_0; +v0x191e2c0_0 .alias "input27", 31 0, v0x1929710_0; +v0x191e4b0_0 .alias "input28", 31 0, v0x1929620_0; +v0x191e410_0 .alias "input29", 31 0, v0x1929890_0; +v0x191e600_0 .alias "input3", 31 0, v0x1929790_0; +v0x191e550_0 .alias "input30", 31 0, v0x1929810_0; +v0x191e760_0 .alias "input31", 31 0, v0x1929a30_0; +v0x191e6a0_0 .alias "input4", 31 0, v0x1929ab0_0; +v0x191e8d0_0 .alias "input5", 31 0, v0x1929910_0; +v0x191e7e0_0 .alias "input6", 31 0, v0x1929990_0; +v0x191ea50_0 .alias "input7", 31 0, v0x1929c70_0; +v0x191e950_0 .alias "input8", 31 0, v0x1929cf0_0; +v0x191ebe0_0 .alias "input9", 31 0, v0x1929b30_0; +v0x191ead0 .array "mux", 0 31; +v0x191ead0_0 .net v0x191ead0 0, 31 0, L_0x19368a0; 1 drivers +v0x191ead0_1 .net v0x191ead0 1, 31 0, L_0x1936900; 1 drivers +v0x191ead0_2 .net v0x191ead0 2, 31 0, L_0x1936960; 1 drivers +v0x191ead0_3 .net v0x191ead0 3, 31 0, L_0x19369f0; 1 drivers +v0x191ead0_4 .net v0x191ead0 4, 31 0, L_0x1936ab0; 1 drivers +v0x191ead0_5 .net v0x191ead0 5, 31 0, L_0x1936b40; 1 drivers +v0x191ead0_6 .net v0x191ead0 6, 31 0, L_0x1936bd0; 1 drivers +v0x191ead0_7 .net v0x191ead0 7, 31 0, L_0x1936c30; 1 drivers +v0x191ead0_8 .net v0x191ead0 8, 31 0, L_0x1936c90; 1 drivers +v0x191ead0_9 .net v0x191ead0 9, 31 0, L_0x1936d20; 1 drivers +v0x191ead0_10 .net v0x191ead0 10, 31 0, L_0x1936e10; 1 drivers +v0x191ead0_11 .net v0x191ead0 11, 31 0, L_0x1936ea0; 1 drivers +v0x191ead0_12 .net v0x191ead0 12, 31 0, L_0x1936db0; 1 drivers +v0x191ead0_13 .net v0x191ead0 13, 31 0, L_0x1936f60; 1 drivers +v0x191ead0_14 .net v0x191ead0 14, 31 0, L_0x1936ff0; 1 drivers +v0x191ead0_15 .net v0x191ead0 15, 31 0, L_0x1937080; 1 drivers +v0x191ead0_16 .net v0x191ead0 16, 31 0, L_0x19371a0; 1 drivers +v0x191ead0_17 .net v0x191ead0 17, 31 0, L_0x1937230; 1 drivers +v0x191ead0_18 .net v0x191ead0 18, 31 0, L_0x1937110; 1 drivers +v0x191ead0_19 .net v0x191ead0 19, 31 0, L_0x1937360; 1 drivers +v0x191ead0_20 .net v0x191ead0 20, 31 0, L_0x19372c0; 1 drivers +v0x191ead0_21 .net v0x191ead0 21, 31 0, L_0x19374a0; 1 drivers +v0x191ead0_22 .net v0x191ead0 22, 31 0, L_0x19373f0; 1 drivers +v0x191ead0_23 .net v0x191ead0 23, 31 0, L_0x19375f0; 1 drivers +v0x191ead0_24 .net v0x191ead0 24, 31 0, L_0x1937530; 1 drivers +v0x191ead0_25 .net v0x191ead0 25, 31 0, L_0x1937750; 1 drivers +v0x191ead0_26 .net v0x191ead0 26, 31 0, L_0x1937680; 1 drivers +v0x191ead0_27 .net v0x191ead0 27, 31 0, L_0x1937890; 1 drivers +v0x191ead0_28 .net v0x191ead0 28, 31 0, L_0x19377b0; 1 drivers +v0x191ead0_29 .net v0x191ead0 29, 31 0, L_0x19379e0; 1 drivers +v0x191ead0_30 .net v0x191ead0 30, 31 0, L_0x19378f0; 1 drivers +v0x191ead0_31 .net v0x191ead0 31, 31 0, L_0x1937980; 1 drivers +v0x191f1b0_0 .alias "out", 31 0, v0x192d820_0; +L_0x1937a40 .array/port v0x191ead0, RS_0x7f69333d2468; +S_0x1846a00 .scope module, "exe" "execute" 5 87, 18 4, S_0x1877d10; + .timescale 0 0; +v0x191cd70_0 .alias "ALU_OperandSource", 0 0, v0x192d610_0; +v0x191ce20_0 .alias "Da", 31 0, v0x192d7a0_0; +v0x18ee410_0 .alias "Db", 31 0, v0x192d820_0; +v0x191cfb0_0 .net "Operand", 31 0, v0x191ccc0_0; 1 drivers +v0x191d030_0 .alias "carryout", 0 0, v0x192dc00_0; +v0x191d0e0_0 .alias "command", 2 0, v0x192dd00_0; +v0x191d160_0 .var "extended_imm", 31 0; +v0x191d1e0_0 .alias "imm", 15 0, v0x192e050_0; +v0x191d260_0 .alias "overflow", 0 0, v0x192e8f0_0; +v0x191d2e0_0 .alias "result", 31 0, v0x192d690_0; +v0x191d360_0 .alias "zero", 0 0, v0x192ef70_0; +E_0x184ed90 .event edge, v0x191d1e0_0; +S_0x191ca70 .scope module, "ALUSource" "mux2to1by32" 18 21, 2 18, S_0x1846a00; + .timescale 0 0; +v0x191c830_0 .alias "address", 0 0, v0x192d610_0; +v0x191cb90_0 .alias "input0", 31 0, v0x192d820_0; +v0x191cc40_0 .net "input1", 31 0, v0x191d160_0; 1 drivers +v0x191ccc0_0 .var "out", 31 0; +E_0x191cb60 .event edge, v0x191c830_0, v0x191cc40_0, v0x187f330_0; +S_0x182e070 .scope module, "Alu" "ALUcontrolLUT" 18 27, 19 11, S_0x1846a00; + .timescale 0 0; +v0x191bc40_0 .alias "ALUcommand", 2 0, v0x192dd00_0; +v0x191bcf0_0 .alias "a", 31 0, v0x192d7a0_0; +v0x191c170_0 .net "adder_cout", 0 0, L_0x1967f90; 1 drivers +v0x191c1f0_0 .net "adder_flag", 0 0, L_0x19696e0; 1 drivers +RS_0x7f69333e4798/0/0 .resolv tri, L_0x194c090, L_0x1950490, L_0x19547a0, L_0x1958a50; +RS_0x7f69333e4798/0/4 .resolv tri, L_0x195ce60, L_0x1961150, L_0x1965470, L_0x19697e0; +RS_0x7f69333e4798 .resolv tri, RS_0x7f69333e4798/0/0, RS_0x7f69333e4798/0/4, C4, C4; +v0x191c270_0 .net8 "addsub", 31 0, RS_0x7f69333e4798; 8 drivers +RS_0x7f69333d70b8/0/0 .resolv tri, L_0x197c820, L_0x197cb50, L_0x197ce80, L_0x197d240; +RS_0x7f69333d70b8/0/4 .resolv tri, L_0x197d5f0, L_0x197d940, L_0x197dda0, L_0x197e140; +RS_0x7f69333d70b8/0/8 .resolv tri, L_0x197e1e0, L_0x197e870, L_0x197e910, L_0x197ef50; +RS_0x7f69333d70b8/0/12 .resolv tri, L_0x197eff0, L_0x197f600, L_0x197f6a0, L_0x197fe60; +RS_0x7f69333d70b8/0/16 .resolv tri, L_0x197ff00, L_0x1980300, L_0x1980490, L_0x1980a10; +RS_0x7f69333d70b8/0/20 .resolv tri, L_0x1980b80, L_0x19810f0, L_0x1981290, L_0x19817e0; +RS_0x7f69333d70b8/0/24 .resolv tri, L_0x1981960, L_0x1982150, L_0x19821f0, L_0x1982880; +RS_0x7f69333d70b8/0/28 .resolv tri, L_0x1982920, L_0x1982f70, L_0x19832f0, L_0x1983010; +RS_0x7f69333d70b8/1/0 .resolv tri, RS_0x7f69333d70b8/0/0, RS_0x7f69333d70b8/0/4, RS_0x7f69333d70b8/0/8, RS_0x7f69333d70b8/0/12; +RS_0x7f69333d70b8/1/4 .resolv tri, RS_0x7f69333d70b8/0/16, RS_0x7f69333d70b8/0/20, RS_0x7f69333d70b8/0/24, RS_0x7f69333d70b8/0/28; +RS_0x7f69333d70b8 .resolv tri, RS_0x7f69333d70b8/1/0, RS_0x7f69333d70b8/1/4, C4, C4; +v0x191c2f0_0 .net8 "andin", 31 0, RS_0x7f69333d70b8; 32 drivers +v0x191c370_0 .alias "b", 31 0, v0x191cfb0_0; +v0x18ee520_0 .var "cout", 0 0; +v0x191c500_0 .var "finalsignal", 31 0; +v0x191c580_0 .var "flag", 0 0; +RS_0x7f69333d5e88/0/0 .resolv tri, L_0x19837a0, L_0x1983ef0, L_0x1984170, L_0x1984530; +RS_0x7f69333d5e88/0/4 .resolv tri, L_0x19848e0, L_0x1984c30, L_0x1985090, L_0x1985430; +RS_0x7f69333d5e88/0/8 .resolv tri, L_0x19854d0, L_0x1985b60, L_0x1985c00, L_0x1986240; +RS_0x7f69333d5e88/0/12 .resolv tri, L_0x19862e0, L_0x1975140, L_0x19751e0, L_0x1987990; +RS_0x7f69333d5e88/0/16 .resolv tri, L_0x1987a30, L_0x1987e30, L_0x1987fc0, L_0x1988540; +RS_0x7f69333d5e88/0/20 .resolv tri, L_0x19886b0, L_0x1988c20, L_0x1988dc0, L_0x1989310; +RS_0x7f69333d5e88/0/24 .resolv tri, L_0x1989490, L_0x1989c80, L_0x1989d20, L_0x198a3b0; +RS_0x7f69333d5e88/0/28 .resolv tri, L_0x198a450, L_0x198aaa0, L_0x198ae20, L_0x198ab40; +RS_0x7f69333d5e88/1/0 .resolv tri, RS_0x7f69333d5e88/0/0, RS_0x7f69333d5e88/0/4, RS_0x7f69333d5e88/0/8, RS_0x7f69333d5e88/0/12; +RS_0x7f69333d5e88/1/4 .resolv tri, RS_0x7f69333d5e88/0/16, RS_0x7f69333d5e88/0/20, RS_0x7f69333d5e88/0/24, RS_0x7f69333d5e88/0/28; +RS_0x7f69333d5e88 .resolv tri, RS_0x7f69333d5e88/1/0, RS_0x7f69333d5e88/1/4, C4, C4; +v0x191c600_0 .net8 "nandin", 31 0, RS_0x7f69333d5e88; 32 drivers +RS_0x7f69333d4c58/0/0 .resolv tri, L_0x198b2d0, L_0x198ba20, L_0x198bca0, L_0x198c060; +RS_0x7f69333d4c58/0/4 .resolv tri, L_0x198c410, L_0x198c760, L_0x198cbc0, L_0x198cf60; +RS_0x7f69333d4c58/0/8 .resolv tri, L_0x198d000, L_0x198d690, L_0x198d730, L_0x198dd70; +RS_0x7f69333d4c58/0/12 .resolv tri, L_0x198de10, L_0x198e420, L_0x198e4c0, L_0x198ec80; +RS_0x7f69333d4c58/0/16 .resolv tri, L_0x198ed20, L_0x198f120, L_0x198f2b0, L_0x198f830; +RS_0x7f69333d4c58/0/20 .resolv tri, L_0x198f9a0, L_0x198ff10, L_0x19900b0, L_0x1990600; +RS_0x7f69333d4c58/0/24 .resolv tri, L_0x1990780, L_0x1990f70, L_0x1991010, L_0x19916a0; +RS_0x7f69333d4c58/0/28 .resolv tri, L_0x1991740, L_0x1991d90, L_0x1992110, L_0x198ea40; +RS_0x7f69333d4c58/1/0 .resolv tri, RS_0x7f69333d4c58/0/0, RS_0x7f69333d4c58/0/4, RS_0x7f69333d4c58/0/8, RS_0x7f69333d4c58/0/12; +RS_0x7f69333d4c58/1/4 .resolv tri, RS_0x7f69333d4c58/0/16, RS_0x7f69333d4c58/0/20, RS_0x7f69333d4c58/0/24, RS_0x7f69333d4c58/0/28; +RS_0x7f69333d4c58 .resolv tri, RS_0x7f69333d4c58/1/0, RS_0x7f69333d4c58/1/4, C4, C4; +v0x191c680_0 .net8 "norin", 31 0, RS_0x7f69333d4c58; 32 drivers +RS_0x7f69333d3a28/0/0 .resolv tri, L_0x1992030, L_0x1992ab0, L_0x1992de0, L_0x1993190; +RS_0x7f69333d3a28/0/4 .resolv tri, L_0x1993540, L_0x1993890, L_0x1993cf0, L_0x1994090; +RS_0x7f69333d3a28/0/8 .resolv tri, L_0x1994130, L_0x19947c0, L_0x1994860, L_0x1994ea0; +RS_0x7f69333d3a28/0/12 .resolv tri, L_0x1994f40, L_0x1995550, L_0x19955f0, L_0x1995db0; +RS_0x7f69333d3a28/0/16 .resolv tri, L_0x1995e50, L_0x1996250, L_0x19963e0, L_0x1996960; +RS_0x7f69333d3a28/0/20 .resolv tri, L_0x1996ad0, L_0x19971f0, L_0x1997290, L_0x1978a70; +RS_0x7f69333d3a28/0/24 .resolv tri, L_0x1978b10, L_0x1979190, L_0x19794f0, L_0x1979320; +RS_0x7f69333d3a28/0/28 .resolv tri, L_0x19994b0, L_0x1999ce0, L_0x199a060, L_0x1999d80; +RS_0x7f69333d3a28/1/0 .resolv tri, RS_0x7f69333d3a28/0/0, RS_0x7f69333d3a28/0/4, RS_0x7f69333d3a28/0/8, RS_0x7f69333d3a28/0/12; +RS_0x7f69333d3a28/1/4 .resolv tri, RS_0x7f69333d3a28/0/16, RS_0x7f69333d3a28/0/20, RS_0x7f69333d3a28/0/24, RS_0x7f69333d3a28/0/28; +RS_0x7f69333d3a28 .resolv tri, RS_0x7f69333d3a28/1/0, RS_0x7f69333d3a28/1/4, C4, C4; +v0x191c700_0 .net8 "orin", 31 0, RS_0x7f69333d3a28; 32 drivers +RS_0x7f69333d9b48 .resolv tri, L_0x197baa0, L_0x197c510, C4, C4; +v0x191c7b0_0 .net8 "slt", 31 0, RS_0x7f69333d9b48; 2 drivers +RS_0x7f69333dad78/0/0 .resolv tri, L_0x1965800, L_0x1969d90, L_0x196a0c0, L_0x196a480; +RS_0x7f69333dad78/0/4 .resolv tri, L_0x196a7c0, L_0x196aa90, L_0x196aef0, L_0x196b290; +RS_0x7f69333dad78/0/8 .resolv tri, L_0x196b330, L_0x196b9c0, L_0x196ba60, L_0x196c0a0; +RS_0x7f69333dad78/0/12 .resolv tri, L_0x196c140, L_0x196c850, L_0x196c8f0, L_0x196d100; +RS_0x7f69333dad78/0/16 .resolv tri, L_0x196d1a0, L_0x196d500, L_0x196d690, L_0x196dc10; +RS_0x7f69333dad78/0/20 .resolv tri, L_0x196dd80, L_0x196e2f0, L_0x196e490, L_0x196e9e0; +RS_0x7f69333dad78/0/24 .resolv tri, L_0x196eb60, L_0x196f350, L_0x196f3f0, L_0x196fa80; +RS_0x7f69333dad78/0/28 .resolv tri, L_0x196fb20, L_0x1970170, L_0x19704f0, L_0x196ce70; +RS_0x7f69333dad78/1/0 .resolv tri, RS_0x7f69333dad78/0/0, RS_0x7f69333dad78/0/4, RS_0x7f69333dad78/0/8, RS_0x7f69333dad78/0/12; +RS_0x7f69333dad78/1/4 .resolv tri, RS_0x7f69333dad78/0/16, RS_0x7f69333dad78/0/20, RS_0x7f69333dad78/0/24, RS_0x7f69333dad78/0/28; +RS_0x7f69333dad78 .resolv tri, RS_0x7f69333dad78/1/0, RS_0x7f69333dad78/1/4, C4, C4; +v0x191c8b0_0 .net8 "xorin", 31 0, RS_0x7f69333dad78; 32 drivers +v0x191c960_0 .var "zeroflag", 0 0; +E_0x187fff0/0 .event edge, v0x16ca1c0_0, v0x18f3ca0_0, v0x16cb060_0, v0x18dd9e0_0; +E_0x187fff0/1 .event edge, v0x18e17e0_0, v0x18ee5b0_0, v0x191b310_0, v0x191b150_0; +E_0x187fff0 .event/or E_0x187fff0/0, E_0x187fff0/1; +S_0x18f3d40 .scope module, "addsub0" "adder_subtracter" 19 34, 20 175, S_0x182e070; + .timescale 0 0; +L_0x1937e30 .functor NOT 1, L_0x1937e90, C4<0>, C4<0>, C4<0>; +L_0x1937fd0 .functor NOT 1, L_0x1938030, C4<0>, C4<0>, C4<0>; +L_0x1938200 .functor NOT 1, L_0x1938260, C4<0>, C4<0>, C4<0>; +L_0x19383a0 .functor NOT 1, L_0x1938400, C4<0>, C4<0>, C4<0>; +L_0x1938540 .functor NOT 1, L_0x19385a0, C4<0>, C4<0>, C4<0>; +L_0x1938740 .functor NOT 1, L_0x19387a0, C4<0>, C4<0>, C4<0>; +L_0x1938640 .functor NOT 1, L_0x1938b60, C4<0>, C4<0>, C4<0>; +L_0x191c490 .functor NOT 1, L_0x1938ca0, C4<0>, C4<0>, C4<0>; +L_0x1938de0 .functor NOT 1, L_0x1938e40, C4<0>, C4<0>, C4<0>; +L_0x1938170 .functor NOT 1, L_0x1939080, C4<0>, C4<0>, C4<0>; +L_0x19391d0 .functor NOT 1, L_0x1939230, C4<0>, C4<0>, C4<0>; +L_0x1939390 .functor NOT 1, L_0x19393f0, C4<0>, C4<0>, C4<0>; +L_0x1939020 .functor NOT 1, L_0x1939560, C4<0>, C4<0>, C4<0>; +L_0x19396e0 .functor NOT 1, L_0x1939740, C4<0>, C4<0>, C4<0>; +L_0x1938a50 .functor NOT 1, L_0x1938ab0, C4<0>, C4<0>, C4<0>; +L_0x1939be0 .functor NOT 1, L_0x1939cd0, C4<0>, C4<0>, C4<0>; +L_0x1939b80 .functor NOT 1, L_0x1939f20, C4<0>, C4<0>, C4<0>; +L_0x1939e60 .functor NOT 1, L_0x193a220, C4<0>, C4<0>, C4<0>; +L_0x193a0b0 .functor NOT 1, L_0x193a440, C4<0>, C4<0>, C4<0>; +L_0x193a360 .functor NOT 1, L_0x193a180, C4<0>, C4<0>, C4<0>; +L_0x193a5d0 .functor NOT 1, L_0x193a960, C4<0>, C4<0>, C4<0>; +L_0x193a860 .functor NOT 1, L_0x193a6c0, C4<0>, C4<0>, C4<0>; +L_0x1919860 .functor NOT 1, L_0x193aa50, C4<0>, C4<0>, C4<0>; +L_0x19388e0 .functor NOT 1, L_0x193ab40, C4<0>, C4<0>, C4<0>; +L_0x193b170 .functor NOT 1, L_0x193b4b0, C4<0>, C4<0>, C4<0>; +L_0x193b3c0 .functor NOT 1, L_0x193b220, C4<0>, C4<0>, C4<0>; +L_0x193b5f0 .functor NOT 1, L_0x193b980, C4<0>, C4<0>, C4<0>; +L_0x193b870 .functor NOT 1, L_0x193b6f0, C4<0>, C4<0>, C4<0>; +L_0x193bac0 .functor NOT 1, L_0x193bea0, C4<0>, C4<0>, C4<0>; +L_0x193bd70 .functor NOT 1, L_0x193bbc0, C4<0>, C4<0>, C4<0>; +L_0x1935110 .functor NOT 1, L_0x193bfe0, C4<0>, C4<0>, C4<0>; +L_0x193c2c0 .functor NOT 1, L_0x193c320, C4<0>, C4<0>, C4<0>; +v0x1917de0_0 .net "_", 0 0, L_0x194bf40; 1 drivers +v0x1918420_0 .net "_1", 0 0, L_0x1950340; 1 drivers +v0x19184a0_0 .net "_2", 0 0, L_0x1954650; 1 drivers +v0x1918550_0 .net "_3", 0 0, L_0x1958900; 1 drivers +v0x1918600_0 .net "_4", 0 0, L_0x195cd10; 1 drivers +v0x19186b0_0 .net "_5", 0 0, L_0x1961000; 1 drivers +v0x1918770_0 .net "_6", 0 0, L_0x1965320; 1 drivers +v0x1918820_0 .net *"_s0", 0 0, L_0x1937e30; 1 drivers +v0x19188f0_0 .net *"_s100", 0 0, L_0x193b3c0; 1 drivers +v0x1918970_0 .net *"_s103", 0 0, L_0x193b220; 1 drivers +v0x1918a50_0 .net *"_s104", 0 0, L_0x193b5f0; 1 drivers +v0x1918ad0_0 .net *"_s107", 0 0, L_0x193b980; 1 drivers +v0x1918bc0_0 .net *"_s108", 0 0, L_0x193b870; 1 drivers +v0x1918c40_0 .net *"_s11", 0 0, L_0x1938260; 1 drivers +v0x1918d40_0 .net *"_s111", 0 0, L_0x193b6f0; 1 drivers +v0x1918de0_0 .net *"_s112", 0 0, L_0x193bac0; 1 drivers +v0x1918cc0_0 .net *"_s115", 0 0, L_0x193bea0; 1 drivers +v0x1918f30_0 .net *"_s116", 0 0, L_0x193bd70; 1 drivers +v0x1919050_0 .net *"_s119", 0 0, L_0x193bbc0; 1 drivers +v0x19190d0_0 .net *"_s12", 0 0, L_0x19383a0; 1 drivers +v0x1918fb0_0 .net *"_s120", 0 0, L_0x1935110; 1 drivers +v0x1919200_0 .net *"_s123", 0 0, L_0x193bfe0; 1 drivers +v0x1919150_0 .net *"_s124", 0 0, L_0x193c2c0; 1 drivers +v0x1919340_0 .net *"_s127", 0 0, L_0x193c320; 1 drivers +v0x19192a0_0 .net *"_s15", 0 0, L_0x1938400; 1 drivers +v0x1919490_0 .net *"_s16", 0 0, L_0x1938540; 1 drivers +v0x19193e0_0 .net *"_s19", 0 0, L_0x19385a0; 1 drivers +v0x19195f0_0 .net *"_s20", 0 0, L_0x1938740; 1 drivers +v0x1919530_0 .net *"_s23", 0 0, L_0x19387a0; 1 drivers +v0x1919760_0 .net *"_s24", 0 0, L_0x1938640; 1 drivers +v0x1919670_0 .net *"_s27", 0 0, L_0x1938b60; 1 drivers +v0x19198e0_0 .net *"_s28", 0 0, L_0x191c490; 1 drivers +v0x19197e0_0 .net *"_s3", 0 0, L_0x1937e90; 1 drivers +v0x1919a70_0 .net *"_s31", 0 0, L_0x1938ca0; 1 drivers +v0x1919960_0 .net *"_s32", 0 0, L_0x1938de0; 1 drivers +v0x1919c10_0 .net *"_s35", 0 0, L_0x1938e40; 1 drivers +v0x1919af0_0 .net *"_s36", 0 0, L_0x1938170; 1 drivers +v0x1919b90_0 .net *"_s39", 0 0, L_0x1939080; 1 drivers +v0x1919dd0_0 .net *"_s4", 0 0, L_0x1937fd0; 1 drivers +v0x1919e50_0 .net *"_s40", 0 0, L_0x19391d0; 1 drivers +v0x1919c90_0 .net *"_s43", 0 0, L_0x1939230; 1 drivers +v0x1919d30_0 .net *"_s44", 0 0, L_0x1939390; 1 drivers +v0x191a030_0 .net *"_s47", 0 0, L_0x19393f0; 1 drivers +v0x191a0b0_0 .net *"_s48", 0 0, L_0x1939020; 1 drivers +v0x1919ed0_0 .net *"_s51", 0 0, L_0x1939560; 1 drivers +v0x1919f70_0 .net *"_s52", 0 0, L_0x19396e0; 1 drivers +v0x191a2b0_0 .net *"_s55", 0 0, L_0x1939740; 1 drivers +v0x191a330_0 .net *"_s56", 0 0, L_0x1938a50; 1 drivers +v0x191a150_0 .net *"_s59", 0 0, L_0x1938ab0; 1 drivers +v0x191a1f0_0 .net *"_s60", 0 0, L_0x1939be0; 1 drivers +v0x191a550_0 .net *"_s63", 0 0, L_0x1939cd0; 1 drivers +v0x191a5d0_0 .net *"_s64", 0 0, L_0x1939b80; 1 drivers +v0x191a3d0_0 .net *"_s67", 0 0, L_0x1939f20; 1 drivers +v0x191a470_0 .net *"_s68", 0 0, L_0x1939e60; 1 drivers +v0x191a810_0 .net *"_s7", 0 0, L_0x1938030; 1 drivers +v0x191a890_0 .net *"_s71", 0 0, L_0x193a220; 1 drivers +v0x191a650_0 .net *"_s72", 0 0, L_0x193a0b0; 1 drivers +v0x191a6f0_0 .net *"_s75", 0 0, L_0x193a440; 1 drivers +v0x191a790_0 .net *"_s76", 0 0, L_0x193a360; 1 drivers +v0x191ab10_0 .net *"_s79", 0 0, L_0x193a180; 1 drivers +v0x191a930_0 .net *"_s8", 0 0, L_0x1938200; 1 drivers +v0x191a9d0_0 .net *"_s80", 0 0, L_0x193a5d0; 1 drivers +v0x191aa70_0 .net *"_s83", 0 0, L_0x193a960; 1 drivers +v0x191adb0_0 .net *"_s84", 0 0, L_0x193a860; 1 drivers +v0x191abb0_0 .net *"_s87", 0 0, L_0x193a6c0; 1 drivers +v0x191ac50_0 .net *"_s88", 0 0, L_0x1919860; 1 drivers +v0x191acf0_0 .net *"_s91", 0 0, L_0x193aa50; 1 drivers +v0x191b050_0 .net *"_s92", 0 0, L_0x19388e0; 1 drivers +v0x191ae50_0 .net *"_s95", 0 0, L_0x193ab40; 1 drivers +v0x191aef0_0 .net *"_s96", 0 0, L_0x193b170; 1 drivers +v0x191af90_0 .net *"_s99", 0 0, L_0x193b4b0; 1 drivers +v0x191b310_0 .alias "ans", 31 0, v0x191c270_0; +v0x191b0d0_0 .alias "carryout", 0 0, v0x191c170_0; +v0x191b150_0 .alias "command", 2 0, v0x192dd00_0; +v0x191b1f0_0 .net "cout0", 0 0, L_0x194a7b0; 1 drivers +v0x191b5f0_0 .net "cout1", 0 0, L_0x194ec30; 1 drivers +v0x191b420_0 .net "cout2", 0 0, L_0x1952f40; 1 drivers +v0x191b530_0 .net "cout3", 0 0, L_0x1957170; 1 drivers +v0x191b980_0 .net "cout4", 0 0, L_0x195b600; 1 drivers +v0x191ba90_0 .net "cout5", 0 0, L_0x195f8f0; 1 drivers +v0x191b700_0 .net "cout6", 0 0, L_0x1963c10; 1 drivers +RS_0x7f69333e3b68/0/0 .resolv tri, L_0x1943010, L_0x193c710, L_0x1943350, L_0x193c410; +RS_0x7f69333e3b68/0/4 .resolv tri, L_0x193c550, L_0x1944410, L_0x1944600, L_0x19441d0; +RS_0x7f69333e3b68/0/8 .resolv tri, L_0x19446f0, L_0x1944890, L_0x1944c30, L_0x1944e20; +RS_0x7f69333e3b68/0/12 .resolv tri, L_0x1945280, L_0x1945420, L_0x1945610, L_0x1945700; +RS_0x7f69333e3b68/0/16 .resolv tri, L_0x19458f0, L_0x1945ae0, L_0x1945f70, L_0x1946120; +RS_0x7f69333e3b68/0/20 .resolv tri, L_0x1946310, L_0x1945cd0, L_0x19464b0, L_0x1946970; +RS_0x7f69333e3b68/0/24 .resolv tri, L_0x1946b60, L_0x19466a0, L_0x1946890, L_0x1946d50; +RS_0x7f69333e3b68/0/28 .resolv tri, L_0x19470a0, L_0x1947590, L_0x1947780, L_0x1947820; +RS_0x7f69333e3b68/1/0 .resolv tri, RS_0x7f69333e3b68/0/0, RS_0x7f69333e3b68/0/4, RS_0x7f69333e3b68/0/8, RS_0x7f69333e3b68/0/12; +RS_0x7f69333e3b68/1/4 .resolv tri, RS_0x7f69333e3b68/0/16, RS_0x7f69333e3b68/0/20, RS_0x7f69333e3b68/0/24, RS_0x7f69333e3b68/0/28; +RS_0x7f69333e3b68 .resolv tri, RS_0x7f69333e3b68/1/0, RS_0x7f69333e3b68/1/4, C4, C4; +v0x191b810_0 .net8 "finalB", 31 0, RS_0x7f69333e3b68; 32 drivers +RS_0x7f69333e3508/0/0 .resolv tri, L_0x1937d90, L_0x1937f30, L_0x19380d0, L_0x1938300; +RS_0x7f69333e3508/0/4 .resolv tri, L_0x19384a0, L_0x19386a0, L_0x191c3f0, L_0x1938c00; +RS_0x7f69333e3508/0/8 .resolv tri, L_0x1938d40, L_0x1938f80, L_0x1938ee0, L_0x1939120; +RS_0x7f69333e3508/0/12 .resolv tri, L_0x19392d0, L_0x1939490, L_0x1939600, L_0x19397e0; +RS_0x7f69333e3508/0/16 .resolv tri, L_0x1939ae0, L_0x1939dc0, L_0x193a010, L_0x193a2c0; +RS_0x7f69333e3508/0/20 .resolv tri, L_0x193a530, L_0x193a7c0, L_0x19389b0, L_0x1938840; +RS_0x7f69333e3508/0/24 .resolv tri, L_0x193b0d0, L_0x193b320, L_0x193b550, L_0x193b7d0; +RS_0x7f69333e3508/0/28 .resolv tri, L_0x193ba20, L_0x193bcd0, L_0x193bf40, L_0x193c220; +RS_0x7f69333e3508/1/0 .resolv tri, RS_0x7f69333e3508/0/0, RS_0x7f69333e3508/0/4, RS_0x7f69333e3508/0/8, RS_0x7f69333e3508/0/12; +RS_0x7f69333e3508/1/4 .resolv tri, RS_0x7f69333e3508/0/16, RS_0x7f69333e3508/0/20, RS_0x7f69333e3508/0/24, RS_0x7f69333e3508/0/28; +RS_0x7f69333e3508 .resolv tri, RS_0x7f69333e3508/1/0, RS_0x7f69333e3508/1/4, C4, C4; +v0x191bdb0_0 .net8 "invertedB", 31 0, RS_0x7f69333e3508; 32 drivers +v0x191be30_0 .alias "opA", 31 0, v0x192d7a0_0; +v0x191bb10_0 .alias "opB", 31 0, v0x191cfb0_0; +v0x191bb90_0 .alias "overflow", 0 0, v0x191c1f0_0; +L_0x1937d90 .part/pv L_0x1937e30, 0, 1, 32; +L_0x1937e90 .part v0x191ccc0_0, 0, 1; +L_0x1937f30 .part/pv L_0x1937fd0, 1, 1, 32; +L_0x1938030 .part v0x191ccc0_0, 1, 1; +L_0x19380d0 .part/pv L_0x1938200, 2, 1, 32; +L_0x1938260 .part v0x191ccc0_0, 2, 1; +L_0x1938300 .part/pv L_0x19383a0, 3, 1, 32; +L_0x1938400 .part v0x191ccc0_0, 3, 1; +L_0x19384a0 .part/pv L_0x1938540, 4, 1, 32; +L_0x19385a0 .part v0x191ccc0_0, 4, 1; +L_0x19386a0 .part/pv L_0x1938740, 5, 1, 32; +L_0x19387a0 .part v0x191ccc0_0, 5, 1; +L_0x191c3f0 .part/pv L_0x1938640, 6, 1, 32; +L_0x1938b60 .part v0x191ccc0_0, 6, 1; +L_0x1938c00 .part/pv L_0x191c490, 7, 1, 32; +L_0x1938ca0 .part v0x191ccc0_0, 7, 1; +L_0x1938d40 .part/pv L_0x1938de0, 8, 1, 32; +L_0x1938e40 .part v0x191ccc0_0, 8, 1; +L_0x1938f80 .part/pv L_0x1938170, 9, 1, 32; +L_0x1939080 .part v0x191ccc0_0, 9, 1; +L_0x1938ee0 .part/pv L_0x19391d0, 10, 1, 32; +L_0x1939230 .part v0x191ccc0_0, 10, 1; +L_0x1939120 .part/pv L_0x1939390, 11, 1, 32; +L_0x19393f0 .part v0x191ccc0_0, 11, 1; +L_0x19392d0 .part/pv L_0x1939020, 12, 1, 32; +L_0x1939560 .part v0x191ccc0_0, 12, 1; +L_0x1939490 .part/pv L_0x19396e0, 13, 1, 32; +L_0x1939740 .part v0x191ccc0_0, 13, 1; +L_0x1939600 .part/pv L_0x1938a50, 14, 1, 32; +L_0x1938ab0 .part v0x191ccc0_0, 14, 1; +L_0x19397e0 .part/pv L_0x1939be0, 15, 1, 32; +L_0x1939cd0 .part v0x191ccc0_0, 15, 1; +L_0x1939ae0 .part/pv L_0x1939b80, 16, 1, 32; +L_0x1939f20 .part v0x191ccc0_0, 16, 1; +L_0x1939dc0 .part/pv L_0x1939e60, 17, 1, 32; +L_0x193a220 .part v0x191ccc0_0, 17, 1; +L_0x193a010 .part/pv L_0x193a0b0, 18, 1, 32; +L_0x193a440 .part v0x191ccc0_0, 18, 1; +L_0x193a2c0 .part/pv L_0x193a360, 19, 1, 32; +L_0x193a180 .part v0x191ccc0_0, 19, 1; +L_0x193a530 .part/pv L_0x193a5d0, 20, 1, 32; +L_0x193a960 .part v0x191ccc0_0, 20, 1; +L_0x193a7c0 .part/pv L_0x193a860, 21, 1, 32; +L_0x193a6c0 .part v0x191ccc0_0, 21, 1; +L_0x19389b0 .part/pv L_0x1919860, 22, 1, 32; +L_0x193aa50 .part v0x191ccc0_0, 22, 1; +L_0x1938840 .part/pv L_0x19388e0, 23, 1, 32; +L_0x193ab40 .part v0x191ccc0_0, 23, 1; +L_0x193b0d0 .part/pv L_0x193b170, 24, 1, 32; +L_0x193b4b0 .part v0x191ccc0_0, 24, 1; +L_0x193b320 .part/pv L_0x193b3c0, 25, 1, 32; +L_0x193b220 .part v0x191ccc0_0, 25, 1; +L_0x193b550 .part/pv L_0x193b5f0, 26, 1, 32; +L_0x193b980 .part v0x191ccc0_0, 26, 1; +L_0x193b7d0 .part/pv L_0x193b870, 27, 1, 32; +L_0x193b6f0 .part v0x191ccc0_0, 27, 1; +L_0x193ba20 .part/pv L_0x193bac0, 28, 1, 32; +L_0x193bea0 .part v0x191ccc0_0, 28, 1; +L_0x193bcd0 .part/pv L_0x193bd70, 29, 1, 32; +L_0x193bbc0 .part v0x191ccc0_0, 29, 1; +L_0x193bf40 .part/pv L_0x1935110, 30, 1, 32; +L_0x193bfe0 .part v0x191ccc0_0, 30, 1; +L_0x193c220 .part/pv L_0x193c2c0, 31, 1, 32; +L_0x193c320 .part v0x191ccc0_0, 31, 1; +L_0x1947a10 .part v0x192cf40_0, 0, 1; +RS_0x7f69333e1ca8 .resolv tri, L_0x1948940, L_0x1949590, L_0x194a2d0, L_0x194af30; +L_0x194c090 .part/pv RS_0x7f69333e1ca8, 0, 4, 32; +L_0x19398d0 .part L_0x1936840, 0, 4; +L_0x1939970 .part RS_0x7f69333e3b68, 0, 4; +L_0x1939a10 .part v0x192cf40_0, 0, 1; +RS_0x7f69333e0ec8 .resolv tri, L_0x194cdc0, L_0x194da10, L_0x194e750, L_0x194f3b0; +L_0x1950490 .part/pv RS_0x7f69333e0ec8, 4, 4, 32; +L_0x194c180 .part L_0x1936840, 4, 4; +L_0x194c220 .part RS_0x7f69333e3b68, 4, 4; +RS_0x7f69333e00e8 .resolv tri, L_0x19510d0, L_0x1951d20, L_0x1952a60, L_0x19536c0; +L_0x19547a0 .part/pv RS_0x7f69333e00e8, 8, 4, 32; +L_0x19548d0 .part L_0x1936840, 8, 4; +L_0x1950530 .part RS_0x7f69333e3b68, 8, 4; +RS_0x7f69333df308 .resolv tri, L_0x1955350, L_0x1955fa0, L_0x1956c90, L_0x19578f0; +L_0x1958a50 .part/pv RS_0x7f69333df308, 12, 4, 32; +L_0x1954970 .part L_0x1936840, 12, 4; +L_0x191cea0 .part RS_0x7f69333e3b68, 12, 4; +RS_0x7f69333de528 .resolv tri, L_0x1959790, L_0x195a3e0, L_0x195b120, L_0x195bd80; +L_0x195ce60 .part/pv RS_0x7f69333de528, 16, 4, 32; +L_0x195cf00 .part L_0x1936840, 16, 4; +L_0x1958f70 .part RS_0x7f69333e3b68, 16, 4; +RS_0x7f69333dd748 .resolv tri, L_0x195da80, L_0x195e6d0, L_0x195f410, L_0x1960070; +L_0x1961150 .part/pv RS_0x7f69333dd748, 20, 4, 32; +L_0x195cfa0 .part L_0x1936840, 20, 4; +L_0x195d040 .part RS_0x7f69333e3b68, 20, 4; +RS_0x7f69333dc968 .resolv tri, L_0x1961da0, L_0x19629f0, L_0x1963730, L_0x1964390; +L_0x1965470 .part/pv RS_0x7f69333dc968, 24, 4, 32; +L_0x1965620 .part L_0x1936840, 24, 4; +L_0x19611f0 .part RS_0x7f69333e3b68, 24, 4; +RS_0x7f69333dbb88 .resolv tri, L_0x1966130, L_0x1966d70, L_0x1967ab0, L_0x1968750; +L_0x19697e0 .part/pv RS_0x7f69333dbb88, 28, 4, 32; +L_0x19656c0 .part L_0x1936840, 28, 4; +L_0x1965760 .part RS_0x7f69333e3b68, 28, 4; +S_0x1911670 .scope module, "addsubmux" "muxtype1" 20 235, 20 3, S_0x18f3d40; + .timescale 0 0; +L_0x193c120 .functor NOT 1, L_0x1947a10, C4<0>, C4<0>, C4<0>; +L_0x193c180 .functor AND 1, L_0x193c980, L_0x193c120, C4<1>, C4<1>; +L_0x193ca70 .functor AND 1, L_0x193cad0, L_0x193c120, C4<1>, C4<1>; +L_0x193cbc0 .functor AND 1, L_0x193ccb0, L_0x193c120, C4<1>, C4<1>; +L_0x193cd50 .functor AND 1, L_0x193cdb0, L_0x193c120, C4<1>, C4<1>; +L_0x193cea0 .functor AND 1, L_0x193cf00, L_0x193c120, C4<1>, C4<1>; +L_0x193cff0 .functor AND 1, L_0x193d050, L_0x193c120, C4<1>, C4<1>; +L_0x193d140 .functor AND 1, L_0x193d2b0, L_0x193c120, C4<1>, C4<1>; +L_0x193d3a0 .functor AND 1, L_0x193d400, L_0x193c120, C4<1>, C4<1>; +L_0x193d540 .functor AND 1, L_0x193d5a0, L_0x193c120, C4<1>, C4<1>; +L_0x193d690 .functor AND 1, L_0x193d6f0, L_0x193c120, C4<1>, C4<1>; +L_0x193d840 .functor AND 1, L_0x193d910, L_0x193c120, C4<1>, C4<1>; +L_0x193cc20 .functor AND 1, L_0x193d9b0, L_0x193c120, C4<1>, C4<1>; +L_0x193d7e0 .functor AND 1, L_0x193db90, L_0x193c120, C4<1>, C4<1>; +L_0x193dc80 .functor AND 1, L_0x193dce0, L_0x193c120, C4<1>, C4<1>; +L_0x193de50 .functor AND 1, L_0x193e0c0, L_0x193c120, C4<1>, C4<1>; +L_0x193e160 .functor AND 1, L_0x193e1f0, L_0x193c120, C4<1>, C4<1>; +L_0x193e370 .functor AND 1, L_0x193e4a0, L_0x193c120, C4<1>, C4<1>; +L_0x193e540 .functor AND 1, L_0x193e5a0, L_0x193c120, C4<1>, C4<1>; +L_0x193e2e0 .functor AND 1, L_0x193e400, L_0x193c120, C4<1>, C4<1>; +L_0x193e860 .functor AND 1, L_0x193e8f0, L_0x193c120, C4<1>, C4<1>; +L_0x193e690 .functor AND 1, L_0x193e760, L_0x193c120, C4<1>, C4<1>; +L_0x193eba0 .functor AND 1, L_0x193ec30, L_0x193c120, C4<1>, C4<1>; +L_0x1915fb0 .functor AND 1, L_0x193e9e0, L_0x193c120, C4<1>, C4<1>; +L_0x193ea80 .functor AND 1, L_0x193ad90, L_0x193c120, C4<1>, C4<1>; +L_0x193d8a0 .functor AND 1, L_0x193b030, L_0x193c120, C4<1>, C4<1>; +L_0x193daa0 .functor AND 1, L_0x193acc0, L_0x193c120, C4<1>, C4<1>; +L_0x193ae80 .functor AND 1, L_0x193aee0, L_0x193c120, C4<1>, C4<1>; +L_0x193afd0 .functor AND 1, L_0x193f750, L_0x193c120, C4<1>, C4<1>; +L_0x193f580 .functor AND 1, L_0x193f610, L_0x193c120, C4<1>, C4<1>; +L_0x193fa30 .functor AND 1, L_0x193fa90, L_0x193c120, C4<1>, C4<1>; +L_0x193f840 .functor AND 1, L_0x193dfc0, L_0x193c120, C4<1>, C4<1>; +L_0x193f900 .functor AND 1, L_0x193f990, L_0x193c120, C4<1>, C4<1>; +L_0x193fb30 .functor AND 1, L_0x193deb0, L_0x1947a10, C4<1>, C4<1>; +L_0x19402c0 .functor AND 1, L_0x1940320, L_0x1947a10, C4<1>, C4<1>; +L_0x1940090 .functor AND 1, L_0x1940120, L_0x1947a10, C4<1>, C4<1>; +L_0x19401c0 .functor AND 1, L_0x19406f0, L_0x1947a10, C4<1>, C4<1>; +L_0x1940410 .functor AND 1, L_0x19405c0, L_0x1947a10, C4<1>, C4<1>; +L_0x19404a0 .functor AND 1, L_0x1940a00, L_0x1947a10, C4<1>, C4<1>; +L_0x1940790 .functor AND 1, L_0x1940820, L_0x1947a10, C4<1>, C4<1>; +L_0x1940910 .functor AND 1, L_0x1940e90, L_0x1947a10, C4<1>, C4<1>; +L_0x1940530 .functor AND 1, L_0x1940af0, L_0x1947a10, C4<1>, C4<1>; +L_0x1940d40 .functor AND 1, L_0x1940dd0, L_0x1947a10, C4<1>, C4<1>; +L_0x1940f30 .functor AND 1, L_0x1940f90, L_0x1947a10, C4<1>, C4<1>; +L_0x1941080 .functor AND 1, L_0x19410e0, L_0x1947a10, C4<1>, C4<1>; +L_0x19411e0 .functor AND 1, L_0x1941270, L_0x1947a10, C4<1>, C4<1>; +L_0x1941360 .functor AND 1, L_0x19413f0, L_0x1947a10, C4<1>, C4<1>; +L_0x1941490 .functor AND 1, L_0x1941520, L_0x1947a10, C4<1>, C4<1>; +L_0x1941610 .functor AND 1, L_0x19416a0, L_0x1947a10, C4<1>, C4<1>; +L_0x1940c30 .functor AND 1, L_0x19417f0, L_0x1947a10, C4<1>, C4<1>; +L_0x19418e0 .functor AND 1, L_0x1941b80, L_0x1947a10, C4<1>, C4<1>; +L_0x1941c70 .functor AND 1, L_0x1941d00, L_0x1947a10, C4<1>, C4<1>; +L_0x1941df0 .functor AND 1, L_0x1941e80, L_0x1947a10, C4<1>, C4<1>; +L_0x1941f70 .functor AND 1, L_0x19421c0, L_0x1947a10, C4<1>, C4<1>; +L_0x19422b0 .functor AND 1, L_0x1942540, L_0x1947a10, C4<1>, C4<1>; +L_0x1940cc0 .functor AND 1, L_0x1942390, L_0x1947a10, C4<1>, C4<1>; +L_0x1942480 .functor AND 1, L_0x1942000, L_0x1947a10, C4<1>, C4<1>; +L_0x19420f0 .functor AND 1, L_0x19425e0, L_0x1947a10, C4<1>, C4<1>; +L_0x19426d0 .functor AND 1, L_0x1942730, L_0x1947a10, C4<1>, C4<1>; +L_0x1942820 .functor AND 1, L_0x1942a70, L_0x1947a10, C4<1>, C4<1>; +L_0x1942b60 .functor AND 1, L_0x1942bf0, L_0x1947a10, C4<1>, C4<1>; +L_0x1942f10 .functor AND 1, L_0x1942880, L_0x1947a10, C4<1>, C4<1>; +L_0x1942970 .functor AND 1, L_0x1943170, L_0x1947a10, C4<1>, C4<1>; +L_0x1942ce0 .functor AND 1, L_0x1942d70, L_0x1947a10, C4<1>, C4<1>; +L_0x1942e60 .functor AND 1, L_0x1942f70, L_0x1947a10, C4<1>, C4<1>; +L_0x1943100 .functor OR 1, L_0x193c180, L_0x193fb30, C4<0>, C4<0>; +L_0x193c7b0 .functor OR 1, L_0x193ca70, L_0x19402c0, C4<0>, C4<0>; +L_0x1941a00 .functor OR 1, L_0x193cbc0, L_0x1940090, C4<0>, C4<0>; +L_0x19433f0 .functor OR 1, L_0x193cd50, L_0x19401c0, C4<0>, C4<0>; +L_0x1944080 .functor OR 1, L_0x193cea0, L_0x1940410, C4<0>, C4<0>; +L_0x19444b0 .functor OR 1, L_0x193cff0, L_0x19404a0, C4<0>, C4<0>; +L_0x1941970 .functor OR 1, L_0x193d140, L_0x1940790, C4<0>, C4<0>; +L_0x1944270 .functor OR 1, L_0x193d3a0, L_0x1940910, C4<0>, C4<0>; +L_0x1944790 .functor OR 1, L_0x193d540, L_0x1940530, C4<0>, C4<0>; +L_0x1944ae0 .functor OR 1, L_0x193d690, L_0x1940d40, C4<0>, C4<0>; +L_0x1944cd0 .functor OR 1, L_0x193d840, L_0x1940f30, C4<0>, C4<0>; +L_0x1945130 .functor OR 1, L_0x193cc20, L_0x1941080, C4<0>, C4<0>; +L_0x1945320 .functor OR 1, L_0x193d7e0, L_0x19411e0, C4<0>, C4<0>; +L_0x19454c0 .functor OR 1, L_0x193dc80, L_0x1941360, C4<0>, C4<0>; +L_0x19450d0 .functor OR 1, L_0x193de50, L_0x1941490, C4<0>, C4<0>; +L_0x19457a0 .functor OR 1, L_0x193e160, L_0x1941610, C4<0>, C4<0>; +L_0x1945990 .functor OR 1, L_0x193e370, L_0x1940c30, C4<0>, C4<0>; +L_0x1945e20 .functor OR 1, L_0x193e540, L_0x19418e0, C4<0>, C4<0>; +L_0x1946010 .functor OR 1, L_0x193e2e0, L_0x1941c70, C4<0>, C4<0>; +L_0x19461c0 .functor OR 1, L_0x193e860, L_0x1941df0, C4<0>, C4<0>; +L_0x1945b80 .functor OR 1, L_0x193e690, L_0x1941f70, C4<0>, C4<0>; +L_0x1945d70 .functor OR 1, L_0x193eba0, L_0x19422b0, C4<0>, C4<0>; +L_0x1946550 .functor OR 1, L_0x1915fb0, L_0x1940cc0, C4<0>, C4<0>; +L_0x1946a10 .functor OR 1, L_0x193ea80, L_0x1942480, C4<0>, C4<0>; +L_0x1946f00 .functor OR 1, L_0x193d8a0, L_0x19420f0, C4<0>, C4<0>; +L_0x1946740 .functor OR 1, L_0x193daa0, L_0x19426d0, C4<0>, C4<0>; +L_0x1946c00 .functor OR 1, L_0x193ae80, L_0x1942820, C4<0>, C4<0>; +L_0x1946df0 .functor OR 1, L_0x193afd0, L_0x1942b60, C4<0>, C4<0>; +L_0x1947140 .functor OR 1, L_0x193f580, L_0x1942f10, C4<0>, C4<0>; +L_0x1947630 .functor OR 1, L_0x193fa30, L_0x1942970, C4<0>, C4<0>; +L_0x19424e0 .functor OR 1, L_0x193f840, L_0x1942ce0, C4<0>, C4<0>; +L_0x19478c0 .functor OR 1, L_0x193f900, L_0x1942e60, C4<0>, C4<0>; +v0x1911760_0 .net *"_s1", 0 0, L_0x193c980; 1 drivers +v0x1911820_0 .net *"_s101", 0 0, L_0x1941d00; 1 drivers +v0x19118c0_0 .net *"_s103", 0 0, L_0x1941e80; 1 drivers +v0x1911960_0 .net *"_s105", 0 0, L_0x19421c0; 1 drivers +v0x19119e0_0 .net *"_s107", 0 0, L_0x1942540; 1 drivers +v0x1911a80_0 .net *"_s109", 0 0, L_0x1942390; 1 drivers +v0x1911b20_0 .net *"_s11", 0 0, L_0x193d050; 1 drivers +v0x1911bc0_0 .net *"_s111", 0 0, L_0x1942000; 1 drivers +v0x1911cb0_0 .net *"_s113", 0 0, L_0x19425e0; 1 drivers +v0x1911d50_0 .net *"_s115", 0 0, L_0x1942730; 1 drivers +v0x1911df0_0 .net *"_s117", 0 0, L_0x1942a70; 1 drivers +v0x1911e90_0 .net *"_s119", 0 0, L_0x1942bf0; 1 drivers +v0x1911f30_0 .net *"_s121", 0 0, L_0x1942880; 1 drivers +v0x1911fd0_0 .net *"_s123", 0 0, L_0x1943170; 1 drivers +v0x19120f0_0 .net *"_s125", 0 0, L_0x1942d70; 1 drivers +v0x1912190_0 .net *"_s127", 0 0, L_0x1942f70; 1 drivers +v0x1912050_0 .net *"_s128", 0 0, L_0x1943100; 1 drivers +v0x19122e0_0 .net *"_s13", 0 0, L_0x193d2b0; 1 drivers +v0x1912400_0 .net *"_s130", 0 0, L_0x193c7b0; 1 drivers +v0x1912480_0 .net *"_s132", 0 0, L_0x1941a00; 1 drivers +v0x1912360_0 .net *"_s134", 0 0, L_0x19433f0; 1 drivers +v0x19125b0_0 .net *"_s136", 0 0, L_0x1944080; 1 drivers +v0x1912500_0 .net *"_s138", 0 0, L_0x19444b0; 1 drivers +v0x19126f0_0 .net *"_s140", 0 0, L_0x1941970; 1 drivers +v0x1912650_0 .net *"_s142", 0 0, L_0x1944270; 1 drivers +v0x1912840_0 .net *"_s144", 0 0, L_0x1944790; 1 drivers +v0x1912790_0 .net *"_s146", 0 0, L_0x1944ae0; 1 drivers +v0x19129a0_0 .net *"_s148", 0 0, L_0x1944cd0; 1 drivers +v0x19128e0_0 .net *"_s15", 0 0, L_0x193d400; 1 drivers +v0x1912b10_0 .net *"_s150", 0 0, L_0x1945130; 1 drivers +v0x1912a20_0 .net *"_s152", 0 0, L_0x1945320; 1 drivers +v0x1912c90_0 .net *"_s154", 0 0, L_0x19454c0; 1 drivers +v0x1912b90_0 .net *"_s156", 0 0, L_0x19450d0; 1 drivers +v0x1912e20_0 .net *"_s158", 0 0, L_0x19457a0; 1 drivers +v0x1912d10_0 .net *"_s160", 0 0, L_0x1945990; 1 drivers +v0x1912fc0_0 .net *"_s162", 0 0, L_0x1945e20; 1 drivers +v0x1912ea0_0 .net *"_s164", 0 0, L_0x1946010; 1 drivers +v0x1912f40_0 .net *"_s166", 0 0, L_0x19461c0; 1 drivers +v0x1913180_0 .net *"_s168", 0 0, L_0x1945b80; 1 drivers +v0x1913200_0 .net *"_s17", 0 0, L_0x193d5a0; 1 drivers +v0x1913040_0 .net *"_s170", 0 0, L_0x1945d70; 1 drivers +v0x19130c0_0 .net *"_s172", 0 0, L_0x1946550; 1 drivers +v0x19133e0_0 .net *"_s174", 0 0, L_0x1946a10; 1 drivers +v0x1913460_0 .net *"_s176", 0 0, L_0x1946f00; 1 drivers +v0x1913280_0 .net *"_s178", 0 0, L_0x1946740; 1 drivers +v0x1913320_0 .net *"_s180", 0 0, L_0x1946c00; 1 drivers +v0x1913660_0 .net *"_s182", 0 0, L_0x1946df0; 1 drivers +v0x19136e0_0 .net *"_s184", 0 0, L_0x1947140; 1 drivers +v0x19134e0_0 .net *"_s186", 0 0, L_0x1947630; 1 drivers +v0x1913580_0 .net *"_s188", 0 0, L_0x19424e0; 1 drivers +v0x1913900_0 .net *"_s19", 0 0, L_0x193d6f0; 1 drivers +v0x1913980_0 .net *"_s190", 0 0, L_0x19478c0; 1 drivers +v0x1913760_0 .net *"_s21", 0 0, L_0x193d910; 1 drivers +v0x1913800_0 .net *"_s23", 0 0, L_0x193d9b0; 1 drivers +v0x1913bc0_0 .net *"_s25", 0 0, L_0x193db90; 1 drivers +v0x1913c40_0 .net *"_s27", 0 0, L_0x193dce0; 1 drivers +v0x1913a00_0 .net *"_s29", 0 0, L_0x193e0c0; 1 drivers +v0x1913a80_0 .net *"_s3", 0 0, L_0x193cad0; 1 drivers +v0x1913b20_0 .net *"_s31", 0 0, L_0x193e1f0; 1 drivers +v0x1913ea0_0 .net *"_s33", 0 0, L_0x193e4a0; 1 drivers +v0x1913cc0_0 .net *"_s35", 0 0, L_0x193e5a0; 1 drivers +v0x1913d60_0 .net *"_s37", 0 0, L_0x193e400; 1 drivers +v0x1913e00_0 .net *"_s39", 0 0, L_0x193e8f0; 1 drivers +v0x1914120_0 .net *"_s41", 0 0, L_0x193e760; 1 drivers +v0x1913f20_0 .net *"_s43", 0 0, L_0x193ec30; 1 drivers +v0x1913fa0_0 .net *"_s45", 0 0, L_0x193e9e0; 1 drivers +v0x1914040_0 .net *"_s47", 0 0, L_0x193ad90; 1 drivers +v0x19143c0_0 .net *"_s49", 0 0, L_0x193b030; 1 drivers +v0x19141a0_0 .net *"_s5", 0 0, L_0x193ccb0; 1 drivers +v0x1914220_0 .net *"_s51", 0 0, L_0x193acc0; 1 drivers +v0x19142c0_0 .net *"_s53", 0 0, L_0x193aee0; 1 drivers +v0x1914680_0 .net *"_s55", 0 0, L_0x193f750; 1 drivers +v0x1914440_0 .net *"_s57", 0 0, L_0x193f610; 1 drivers +v0x19144e0_0 .net *"_s59", 0 0, L_0x193fa90; 1 drivers +v0x1914580_0 .net *"_s61", 0 0, L_0x193dfc0; 1 drivers +v0x1914960_0 .net *"_s63", 0 0, L_0x193f990; 1 drivers +v0x1914700_0 .net *"_s65", 0 0, L_0x193deb0; 1 drivers +v0x1914780_0 .net *"_s67", 0 0, L_0x1940320; 1 drivers +v0x1914820_0 .net *"_s69", 0 0, L_0x1940120; 1 drivers +v0x19148c0_0 .net *"_s7", 0 0, L_0x193cdb0; 1 drivers +v0x1914c70_0 .net *"_s71", 0 0, L_0x19406f0; 1 drivers +v0x1914cf0_0 .net *"_s73", 0 0, L_0x19405c0; 1 drivers +v0x19149e0_0 .net *"_s75", 0 0, L_0x1940a00; 1 drivers +v0x1914a60_0 .net *"_s77", 0 0, L_0x1940820; 1 drivers +v0x1914b00_0 .net *"_s79", 0 0, L_0x1940e90; 1 drivers +v0x1914ba0_0 .net *"_s81", 0 0, L_0x1940af0; 1 drivers +v0x1915030_0 .net *"_s83", 0 0, L_0x1940dd0; 1 drivers +v0x19150b0_0 .net *"_s85", 0 0, L_0x1940f90; 1 drivers +v0x1914d70_0 .net *"_s87", 0 0, L_0x19410e0; 1 drivers +v0x1914e10_0 .net *"_s89", 0 0, L_0x1941270; 1 drivers +v0x1914eb0_0 .net *"_s9", 0 0, L_0x193cf00; 1 drivers +v0x1914f50_0 .net *"_s91", 0 0, L_0x19413f0; 1 drivers +v0x1915420_0 .net *"_s93", 0 0, L_0x1941520; 1 drivers +v0x19154a0_0 .net *"_s95", 0 0, L_0x19416a0; 1 drivers +v0x1915130_0 .net *"_s97", 0 0, L_0x19417f0; 1 drivers +v0x19151d0_0 .net *"_s99", 0 0, L_0x1941b80; 1 drivers +v0x1915270_0 .net "address", 0 0, L_0x1947a10; 1 drivers +v0x1915310_0 .alias "in0", 31 0, v0x191cfb0_0; +v0x1915390_0 .net "in00addr", 0 0, L_0x193c180; 1 drivers +v0x1915840_0 .net "in010addr", 0 0, L_0x193d840; 1 drivers +v0x1915520_0 .net "in011addr", 0 0, L_0x193cc20; 1 drivers +v0x19155c0_0 .net "in012addr", 0 0, L_0x193d7e0; 1 drivers +v0x1915660_0 .net "in013addr", 0 0, L_0x193dc80; 1 drivers +v0x1915700_0 .net "in014addr", 0 0, L_0x193de50; 1 drivers +v0x19157a0_0 .net "in015addr", 0 0, L_0x193e160; 1 drivers +v0x1915c10_0 .net "in016addr", 0 0, L_0x193e370; 1 drivers +v0x19158c0_0 .net "in017addr", 0 0, L_0x193e540; 1 drivers +v0x1915960_0 .net "in018addr", 0 0, L_0x193e2e0; 1 drivers +v0x1915a00_0 .net "in019addr", 0 0, L_0x193e860; 1 drivers +v0x1915aa0_0 .net "in01addr", 0 0, L_0x193ca70; 1 drivers +v0x1915b40_0 .net "in020addr", 0 0, L_0x193e690; 1 drivers +v0x1916010_0 .net "in021addr", 0 0, L_0x193eba0; 1 drivers +v0x1915c90_0 .net "in022addr", 0 0, L_0x1915fb0; 1 drivers +v0x1915d30_0 .net "in023addr", 0 0, L_0x193ea80; 1 drivers +v0x1915dd0_0 .net "in024addr", 0 0, L_0x193d8a0; 1 drivers +v0x1915e70_0 .net "in025addr", 0 0, L_0x193daa0; 1 drivers +v0x1915f10_0 .net "in026addr", 0 0, L_0x193ae80; 1 drivers +v0x1916440_0 .net "in027addr", 0 0, L_0x193afd0; 1 drivers +v0x1916090_0 .net "in028addr", 0 0, L_0x193f580; 1 drivers +v0x1916130_0 .net "in029addr", 0 0, L_0x193fa30; 1 drivers +v0x19161d0_0 .net "in02addr", 0 0, L_0x193cbc0; 1 drivers +v0x1916270_0 .net "in030addr", 0 0, L_0x193f840; 1 drivers +v0x1916310_0 .net "in031addr", 0 0, L_0x193f900; 1 drivers +v0x19163b0_0 .net "in03addr", 0 0, L_0x193cd50; 1 drivers +v0x19168b0_0 .net "in04addr", 0 0, L_0x193cea0; 1 drivers +v0x1916930_0 .net "in05addr", 0 0, L_0x193cff0; 1 drivers +v0x19164c0_0 .net "in06addr", 0 0, L_0x193d140; 1 drivers +v0x1916540_0 .net "in07addr", 0 0, L_0x193d3a0; 1 drivers +v0x19165e0_0 .net "in08addr", 0 0, L_0x193d540; 1 drivers +v0x1916680_0 .net "in09addr", 0 0, L_0x193d690; 1 drivers +v0x1916720_0 .alias "in1", 31 0, v0x191bdb0_0; +v0x19167c0_0 .net "in10addr", 0 0, L_0x193fb30; 1 drivers +v0x1916de0_0 .net "in110addr", 0 0, L_0x1940f30; 1 drivers +v0x1916e60_0 .net "in111addr", 0 0, L_0x1941080; 1 drivers +v0x19169b0_0 .net "in112addr", 0 0, L_0x19411e0; 1 drivers +v0x1916a50_0 .net "in113addr", 0 0, L_0x1941360; 1 drivers +v0x1916af0_0 .net "in114addr", 0 0, L_0x1941490; 1 drivers +v0x1916b90_0 .net "in115addr", 0 0, L_0x1941610; 1 drivers +v0x1916c30_0 .net "in116addr", 0 0, L_0x1940c30; 1 drivers +v0x1916cd0_0 .net "in117addr", 0 0, L_0x19418e0; 1 drivers +v0x1917350_0 .net "in118addr", 0 0, L_0x1941c70; 1 drivers +v0x19173d0_0 .net "in119addr", 0 0, L_0x1941df0; 1 drivers +v0x1916ee0_0 .net "in11addr", 0 0, L_0x19402c0; 1 drivers +v0x1916f80_0 .net "in120addr", 0 0, L_0x1941f70; 1 drivers +v0x1917020_0 .net "in121addr", 0 0, L_0x19422b0; 1 drivers +v0x19170c0_0 .net "in122addr", 0 0, L_0x1940cc0; 1 drivers +v0x1917160_0 .net "in123addr", 0 0, L_0x1942480; 1 drivers +v0x1917200_0 .net "in124addr", 0 0, L_0x19420f0; 1 drivers +v0x19172a0_0 .net "in125addr", 0 0, L_0x19426d0; 1 drivers +v0x1917900_0 .net "in126addr", 0 0, L_0x1942820; 1 drivers +v0x1917450_0 .net "in127addr", 0 0, L_0x1942b60; 1 drivers +v0x19174f0_0 .net "in128addr", 0 0, L_0x1942f10; 1 drivers +v0x1917590_0 .net "in129addr", 0 0, L_0x1942970; 1 drivers +v0x1917630_0 .net "in12addr", 0 0, L_0x1940090; 1 drivers +v0x19176d0_0 .net "in130addr", 0 0, L_0x1942ce0; 1 drivers +v0x1917770_0 .net "in131addr", 0 0, L_0x1942e60; 1 drivers +v0x1917810_0 .net "in13addr", 0 0, L_0x19401c0; 1 drivers +v0x1917e70_0 .net "in14addr", 0 0, L_0x1940410; 1 drivers +v0x1917980_0 .net "in15addr", 0 0, L_0x19404a0; 1 drivers +v0x1917a20_0 .net "in16addr", 0 0, L_0x1940790; 1 drivers +v0x1917ac0_0 .net "in17addr", 0 0, L_0x1940910; 1 drivers +v0x1917b60_0 .net "in18addr", 0 0, L_0x1940530; 1 drivers +v0x1917c00_0 .net "in19addr", 0 0, L_0x1940d40; 1 drivers +v0x1917ca0_0 .net "invaddr", 0 0, L_0x193c120; 1 drivers +v0x1917d40_0 .alias "out", 31 0, v0x191b810_0; +L_0x193c980 .part v0x191ccc0_0, 0, 1; +L_0x193cad0 .part v0x191ccc0_0, 1, 1; +L_0x193ccb0 .part v0x191ccc0_0, 2, 1; +L_0x193cdb0 .part v0x191ccc0_0, 3, 1; +L_0x193cf00 .part v0x191ccc0_0, 4, 1; +L_0x193d050 .part v0x191ccc0_0, 5, 1; +L_0x193d2b0 .part v0x191ccc0_0, 6, 1; +L_0x193d400 .part v0x191ccc0_0, 7, 1; +L_0x193d5a0 .part v0x191ccc0_0, 8, 1; +L_0x193d6f0 .part v0x191ccc0_0, 9, 1; +L_0x193d910 .part v0x191ccc0_0, 10, 1; +L_0x193d9b0 .part v0x191ccc0_0, 11, 1; +L_0x193db90 .part v0x191ccc0_0, 12, 1; +L_0x193dce0 .part v0x191ccc0_0, 13, 1; +L_0x193e0c0 .part v0x191ccc0_0, 14, 1; +L_0x193e1f0 .part v0x191ccc0_0, 15, 1; +L_0x193e4a0 .part v0x191ccc0_0, 16, 1; +L_0x193e5a0 .part v0x191ccc0_0, 17, 1; +L_0x193e400 .part v0x191ccc0_0, 18, 1; +L_0x193e8f0 .part v0x191ccc0_0, 19, 1; +L_0x193e760 .part v0x191ccc0_0, 20, 1; +L_0x193ec30 .part v0x191ccc0_0, 21, 1; +L_0x193e9e0 .part v0x191ccc0_0, 22, 1; +L_0x193ad90 .part v0x191ccc0_0, 23, 1; +L_0x193b030 .part v0x191ccc0_0, 24, 1; +L_0x193acc0 .part v0x191ccc0_0, 25, 1; +L_0x193aee0 .part v0x191ccc0_0, 26, 1; +L_0x193f750 .part v0x191ccc0_0, 27, 1; +L_0x193f610 .part v0x191ccc0_0, 28, 1; +L_0x193fa90 .part v0x191ccc0_0, 29, 1; +L_0x193dfc0 .part v0x191ccc0_0, 30, 1; +L_0x193f990 .part v0x191ccc0_0, 31, 1; +L_0x193deb0 .part RS_0x7f69333e3508, 0, 1; +L_0x1940320 .part RS_0x7f69333e3508, 1, 1; +L_0x1940120 .part RS_0x7f69333e3508, 2, 1; +L_0x19406f0 .part RS_0x7f69333e3508, 3, 1; +L_0x19405c0 .part RS_0x7f69333e3508, 4, 1; +L_0x1940a00 .part RS_0x7f69333e3508, 5, 1; +L_0x1940820 .part RS_0x7f69333e3508, 6, 1; +L_0x1940e90 .part RS_0x7f69333e3508, 7, 1; +L_0x1940af0 .part RS_0x7f69333e3508, 8, 1; +L_0x1940dd0 .part RS_0x7f69333e3508, 9, 1; +L_0x1940f90 .part RS_0x7f69333e3508, 10, 1; +L_0x19410e0 .part RS_0x7f69333e3508, 11, 1; +L_0x1941270 .part RS_0x7f69333e3508, 12, 1; +L_0x19413f0 .part RS_0x7f69333e3508, 13, 1; +L_0x1941520 .part RS_0x7f69333e3508, 14, 1; +L_0x19416a0 .part RS_0x7f69333e3508, 15, 1; +L_0x19417f0 .part RS_0x7f69333e3508, 16, 1; +L_0x1941b80 .part RS_0x7f69333e3508, 17, 1; +L_0x1941d00 .part RS_0x7f69333e3508, 18, 1; +L_0x1941e80 .part RS_0x7f69333e3508, 19, 1; +L_0x19421c0 .part RS_0x7f69333e3508, 20, 1; +L_0x1942540 .part RS_0x7f69333e3508, 21, 1; +L_0x1942390 .part RS_0x7f69333e3508, 22, 1; +L_0x1942000 .part RS_0x7f69333e3508, 23, 1; +L_0x19425e0 .part RS_0x7f69333e3508, 24, 1; +L_0x1942730 .part RS_0x7f69333e3508, 25, 1; +L_0x1942a70 .part RS_0x7f69333e3508, 26, 1; +L_0x1942bf0 .part RS_0x7f69333e3508, 27, 1; +L_0x1942880 .part RS_0x7f69333e3508, 28, 1; +L_0x1943170 .part RS_0x7f69333e3508, 29, 1; +L_0x1942d70 .part RS_0x7f69333e3508, 30, 1; +L_0x1942f70 .part RS_0x7f69333e3508, 31, 1; +L_0x1943010 .part/pv L_0x1943100, 0, 1, 32; +L_0x193c710 .part/pv L_0x193c7b0, 1, 1, 32; +L_0x1943350 .part/pv L_0x1941a00, 2, 1, 32; +L_0x193c410 .part/pv L_0x19433f0, 3, 1, 32; +L_0x193c550 .part/pv L_0x1944080, 4, 1, 32; +L_0x1944410 .part/pv L_0x19444b0, 5, 1, 32; +L_0x1944600 .part/pv L_0x1941970, 6, 1, 32; +L_0x19441d0 .part/pv L_0x1944270, 7, 1, 32; +L_0x19446f0 .part/pv L_0x1944790, 8, 1, 32; +L_0x1944890 .part/pv L_0x1944ae0, 9, 1, 32; +L_0x1944c30 .part/pv L_0x1944cd0, 10, 1, 32; +L_0x1944e20 .part/pv L_0x1945130, 11, 1, 32; +L_0x1945280 .part/pv L_0x1945320, 12, 1, 32; +L_0x1945420 .part/pv L_0x19454c0, 13, 1, 32; +L_0x1945610 .part/pv L_0x19450d0, 14, 1, 32; +L_0x1945700 .part/pv L_0x19457a0, 15, 1, 32; +L_0x19458f0 .part/pv L_0x1945990, 16, 1, 32; +L_0x1945ae0 .part/pv L_0x1945e20, 17, 1, 32; +L_0x1945f70 .part/pv L_0x1946010, 18, 1, 32; +L_0x1946120 .part/pv L_0x19461c0, 19, 1, 32; +L_0x1946310 .part/pv L_0x1945b80, 20, 1, 32; +L_0x1945cd0 .part/pv L_0x1945d70, 21, 1, 32; +L_0x19464b0 .part/pv L_0x1946550, 22, 1, 32; +L_0x1946970 .part/pv L_0x1946a10, 23, 1, 32; +L_0x1946b60 .part/pv L_0x1946f00, 24, 1, 32; +L_0x19466a0 .part/pv L_0x1946740, 25, 1, 32; +L_0x1946890 .part/pv L_0x1946c00, 26, 1, 32; +L_0x1946d50 .part/pv L_0x1946df0, 27, 1, 32; +L_0x19470a0 .part/pv L_0x1947140, 28, 1, 32; +L_0x1947590 .part/pv L_0x1947630, 29, 1, 32; +L_0x1947780 .part/pv L_0x19424e0, 30, 1, 32; +L_0x1947820 .part/pv L_0x19478c0, 31, 1, 32; +S_0x190db60 .scope module, "adder0" "FullAdder4bit" 20 237, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x194acf0 .functor AND 1, L_0x194b330, L_0x194b3d0, C4<1>, C4<1>; +L_0x194b4f0 .functor NOR 1, L_0x194b550, L_0x194b5f0, C4<0>, C4<0>; +L_0x194b770 .functor AND 1, L_0x194b7d0, L_0x194b8c0, C4<1>, C4<1>; +L_0x194b6e0 .functor NOR 1, L_0x194ba50, L_0x194bc50, C4<0>, C4<0>; +L_0x194b9b0 .functor OR 1, L_0x194acf0, L_0x194b4f0, C4<0>, C4<0>; +L_0x194be40 .functor NOR 1, L_0x194b770, L_0x194b6e0, C4<0>, C4<0>; +L_0x194bf40 .functor AND 1, L_0x194b9b0, L_0x194be40, C4<1>, C4<1>; +v0x1910750_0 .net *"_s25", 0 0, L_0x194b330; 1 drivers +v0x1910810_0 .net *"_s27", 0 0, L_0x194b3d0; 1 drivers +v0x19108b0_0 .net *"_s29", 0 0, L_0x194b550; 1 drivers +v0x1910950_0 .net *"_s31", 0 0, L_0x194b5f0; 1 drivers +v0x19109d0_0 .net *"_s33", 0 0, L_0x194b7d0; 1 drivers +v0x1910a70_0 .net *"_s35", 0 0, L_0x194b8c0; 1 drivers +v0x1910b10_0 .net *"_s37", 0 0, L_0x194ba50; 1 drivers +v0x1910bb0_0 .net *"_s39", 0 0, L_0x194bc50; 1 drivers +v0x1910c50_0 .net "a", 3 0, L_0x19398d0; 1 drivers +v0x1910cf0_0 .net "aandb", 0 0, L_0x194acf0; 1 drivers +v0x1910d90_0 .net "abandnoror", 0 0, L_0x194b9b0; 1 drivers +v0x1910e30_0 .net "anorb", 0 0, L_0x194b4f0; 1 drivers +v0x1910ed0_0 .net "b", 3 0, L_0x1939970; 1 drivers +v0x1910f70_0 .net "bandsum", 0 0, L_0x194b770; 1 drivers +v0x1911090_0 .net "bnorsum", 0 0, L_0x194b6e0; 1 drivers +v0x1911130_0 .net "bsumandnornor", 0 0, L_0x194be40; 1 drivers +v0x1910ff0_0 .net "carryin", 0 0, L_0x1939a10; 1 drivers +v0x1911260_0 .alias "carryout", 0 0, v0x191b1f0_0; +v0x19111b0_0 .net "carryout1", 0 0, L_0x1944f60; 1 drivers +v0x1911380_0 .net "carryout2", 0 0, L_0x1948dd0; 1 drivers +v0x19114b0_0 .net "carryout3", 0 0, L_0x1949b10; 1 drivers +v0x1911530_0 .alias "overflow", 0 0, v0x1917de0_0; +v0x1911400_0 .net8 "sum", 3 0, RS_0x7f69333e1ca8; 4 drivers +L_0x1948940 .part/pv L_0x1948870, 0, 1, 4; +L_0x1948a30 .part L_0x19398d0, 0, 1; +L_0x1948ad0 .part L_0x1939970, 0, 1; +L_0x1949590 .part/pv L_0x1947430, 1, 1, 4; +L_0x19496d0 .part L_0x19398d0, 1, 1; +L_0x19497c0 .part L_0x1939970, 1, 1; +L_0x194a2d0 .part/pv L_0x1949040, 2, 1, 4; +L_0x194a3c0 .part L_0x19398d0, 2, 1; +L_0x194a4b0 .part L_0x1939970, 2, 1; +L_0x194af30 .part/pv L_0x1949d80, 3, 1, 4; +L_0x194b060 .part L_0x19398d0, 3, 1; +L_0x194b190 .part L_0x1939970, 3, 1; +L_0x194b330 .part L_0x19398d0, 3, 1; +L_0x194b3d0 .part L_0x1939970, 3, 1; +L_0x194b550 .part L_0x19398d0, 3, 1; +L_0x194b5f0 .part L_0x1939970, 3, 1; +L_0x194b7d0 .part L_0x1939970, 3, 1; +L_0x194b8c0 .part RS_0x7f69333e1ca8, 3, 1; +L_0x194ba50 .part L_0x1939970, 3, 1; +L_0x194bc50 .part RS_0x7f69333e1ca8, 3, 1; +S_0x190fcc0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x190db60; + .timescale 0 0; +L_0x1947ab0 .functor AND 1, L_0x1948a30, L_0x1948ad0, C4<1>, C4<1>; +L_0x1947b10 .functor AND 1, L_0x1948a30, L_0x1939a10, C4<1>, C4<1>; +L_0x1916840 .functor AND 1, L_0x1948ad0, L_0x1939a10, C4<1>, C4<1>; +L_0x193db00 .functor OR 1, L_0x1947ab0, L_0x1947b10, C4<0>, C4<0>; +L_0x1944f60 .functor OR 1, L_0x193db00, L_0x1916840, C4<0>, C4<0>; +L_0x1945060 .functor OR 1, L_0x1948a30, L_0x1948ad0, C4<0>, C4<0>; +L_0x1947290 .functor OR 1, L_0x1945060, L_0x1939a10, C4<0>, C4<0>; +L_0x19473d0 .functor NOT 1, L_0x1944f60, C4<0>, C4<0>, C4<0>; +L_0x19474c0 .functor AND 1, L_0x19473d0, L_0x1947290, C4<1>, C4<1>; +L_0x1948630 .functor AND 1, L_0x1948a30, L_0x1948ad0, C4<1>, C4<1>; +L_0x1948810 .functor AND 1, L_0x1948630, L_0x1939a10, C4<1>, C4<1>; +L_0x1948870 .functor OR 1, L_0x19474c0, L_0x1948810, C4<0>, C4<0>; +v0x190fdb0_0 .net "a", 0 0, L_0x1948a30; 1 drivers +v0x190fe70_0 .net "ab", 0 0, L_0x1947ab0; 1 drivers +v0x190ff10_0 .net "acarryin", 0 0, L_0x1947b10; 1 drivers +v0x190ffb0_0 .net "andall", 0 0, L_0x1948810; 1 drivers +v0x1910030_0 .net "andsingleintermediate", 0 0, L_0x1948630; 1 drivers +v0x19100d0_0 .net "andsumintermediate", 0 0, L_0x19474c0; 1 drivers +v0x1910170_0 .net "b", 0 0, L_0x1948ad0; 1 drivers +v0x1910210_0 .net "bcarryin", 0 0, L_0x1916840; 1 drivers +v0x19102b0_0 .alias "carryin", 0 0, v0x1910ff0_0; +v0x1910350_0 .alias "carryout", 0 0, v0x19111b0_0; +v0x19103d0_0 .net "invcarryout", 0 0, L_0x19473d0; 1 drivers +v0x1910450_0 .net "orall", 0 0, L_0x1947290; 1 drivers +v0x19104f0_0 .net "orpairintermediate", 0 0, L_0x193db00; 1 drivers +v0x1910590_0 .net "orsingleintermediate", 0 0, L_0x1945060; 1 drivers +v0x19106b0_0 .net "sum", 0 0, L_0x1948870; 1 drivers +S_0x190f230 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x190db60; + .timescale 0 0; +L_0x19487b0 .functor AND 1, L_0x19496d0, L_0x19497c0, C4<1>, C4<1>; +L_0x1948b70 .functor AND 1, L_0x19496d0, L_0x1944f60, C4<1>, C4<1>; +L_0x1948c20 .functor AND 1, L_0x19497c0, L_0x1944f60, C4<1>, C4<1>; +L_0x1948cd0 .functor OR 1, L_0x19487b0, L_0x1948b70, C4<0>, C4<0>; +L_0x1948dd0 .functor OR 1, L_0x1948cd0, L_0x1948c20, C4<0>, C4<0>; +L_0x1948ed0 .functor OR 1, L_0x19496d0, L_0x19497c0, C4<0>, C4<0>; +L_0x1948f30 .functor OR 1, L_0x1948ed0, L_0x1944f60, C4<0>, C4<0>; +L_0x1948fe0 .functor NOT 1, L_0x1948dd0, C4<0>, C4<0>, C4<0>; +L_0x19490d0 .functor AND 1, L_0x1948fe0, L_0x1948f30, C4<1>, C4<1>; +L_0x19491d0 .functor AND 1, L_0x19496d0, L_0x19497c0, C4<1>, C4<1>; +L_0x19493b0 .functor AND 1, L_0x19491d0, L_0x1944f60, C4<1>, C4<1>; +L_0x1947430 .functor OR 1, L_0x19490d0, L_0x19493b0, C4<0>, C4<0>; +v0x190f320_0 .net "a", 0 0, L_0x19496d0; 1 drivers +v0x190f3e0_0 .net "ab", 0 0, L_0x19487b0; 1 drivers +v0x190f480_0 .net "acarryin", 0 0, L_0x1948b70; 1 drivers +v0x190f520_0 .net "andall", 0 0, L_0x19493b0; 1 drivers +v0x190f5a0_0 .net "andsingleintermediate", 0 0, L_0x19491d0; 1 drivers +v0x190f640_0 .net "andsumintermediate", 0 0, L_0x19490d0; 1 drivers +v0x190f6e0_0 .net "b", 0 0, L_0x19497c0; 1 drivers +v0x190f780_0 .net "bcarryin", 0 0, L_0x1948c20; 1 drivers +v0x190f820_0 .alias "carryin", 0 0, v0x19111b0_0; +v0x190f8c0_0 .alias "carryout", 0 0, v0x1911380_0; +v0x190f940_0 .net "invcarryout", 0 0, L_0x1948fe0; 1 drivers +v0x190f9c0_0 .net "orall", 0 0, L_0x1948f30; 1 drivers +v0x190fa60_0 .net "orpairintermediate", 0 0, L_0x1948cd0; 1 drivers +v0x190fb00_0 .net "orsingleintermediate", 0 0, L_0x1948ed0; 1 drivers +v0x190fc20_0 .net "sum", 0 0, L_0x1947430; 1 drivers +S_0x190e750 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x190db60; + .timescale 0 0; +L_0x1949350 .functor AND 1, L_0x194a3c0, L_0x194a4b0, C4<1>, C4<1>; +L_0x19498b0 .functor AND 1, L_0x194a3c0, L_0x1948dd0, C4<1>, C4<1>; +L_0x1949960 .functor AND 1, L_0x194a4b0, L_0x1948dd0, C4<1>, C4<1>; +L_0x1949a10 .functor OR 1, L_0x1949350, L_0x19498b0, C4<0>, C4<0>; +L_0x1949b10 .functor OR 1, L_0x1949a10, L_0x1949960, C4<0>, C4<0>; +L_0x1949c10 .functor OR 1, L_0x194a3c0, L_0x194a4b0, C4<0>, C4<0>; +L_0x1949c70 .functor OR 1, L_0x1949c10, L_0x1948dd0, C4<0>, C4<0>; +L_0x1949d20 .functor NOT 1, L_0x1949b10, C4<0>, C4<0>, C4<0>; +L_0x1949e10 .functor AND 1, L_0x1949d20, L_0x1949c70, C4<1>, C4<1>; +L_0x1949f10 .functor AND 1, L_0x194a3c0, L_0x194a4b0, C4<1>, C4<1>; +L_0x194a0f0 .functor AND 1, L_0x1949f10, L_0x1948dd0, C4<1>, C4<1>; +L_0x1949040 .functor OR 1, L_0x1949e10, L_0x194a0f0, C4<0>, C4<0>; +v0x190e840_0 .net "a", 0 0, L_0x194a3c0; 1 drivers +v0x190e900_0 .net "ab", 0 0, L_0x1949350; 1 drivers +v0x190e9a0_0 .net "acarryin", 0 0, L_0x19498b0; 1 drivers +v0x190ea40_0 .net "andall", 0 0, L_0x194a0f0; 1 drivers +v0x190eac0_0 .net "andsingleintermediate", 0 0, L_0x1949f10; 1 drivers +v0x190eb60_0 .net "andsumintermediate", 0 0, L_0x1949e10; 1 drivers +v0x190ec00_0 .net "b", 0 0, L_0x194a4b0; 1 drivers +v0x190eca0_0 .net "bcarryin", 0 0, L_0x1949960; 1 drivers +v0x190ed90_0 .alias "carryin", 0 0, v0x1911380_0; +v0x190ee30_0 .alias "carryout", 0 0, v0x19114b0_0; +v0x190eeb0_0 .net "invcarryout", 0 0, L_0x1949d20; 1 drivers +v0x190ef30_0 .net "orall", 0 0, L_0x1949c70; 1 drivers +v0x190efd0_0 .net "orpairintermediate", 0 0, L_0x1949a10; 1 drivers +v0x190f070_0 .net "orsingleintermediate", 0 0, L_0x1949c10; 1 drivers +v0x190f190_0 .net "sum", 0 0, L_0x1949040; 1 drivers +S_0x190dc50 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x190db60; + .timescale 0 0; +L_0x194a090 .functor AND 1, L_0x194b060, L_0x194b190, C4<1>, C4<1>; +L_0x194a550 .functor AND 1, L_0x194b060, L_0x1949b10, C4<1>, C4<1>; +L_0x194a600 .functor AND 1, L_0x194b190, L_0x1949b10, C4<1>, C4<1>; +L_0x194a6b0 .functor OR 1, L_0x194a090, L_0x194a550, C4<0>, C4<0>; +L_0x194a7b0 .functor OR 1, L_0x194a6b0, L_0x194a600, C4<0>, C4<0>; +L_0x194a8b0 .functor OR 1, L_0x194b060, L_0x194b190, C4<0>, C4<0>; +L_0x194a910 .functor OR 1, L_0x194a8b0, L_0x1949b10, C4<0>, C4<0>; +L_0x194a9c0 .functor NOT 1, L_0x194a7b0, C4<0>, C4<0>, C4<0>; +L_0x194aa70 .functor AND 1, L_0x194a9c0, L_0x194a910, C4<1>, C4<1>; +L_0x194ab70 .functor AND 1, L_0x194b060, L_0x194b190, C4<1>, C4<1>; +L_0x194ad50 .functor AND 1, L_0x194ab70, L_0x1949b10, C4<1>, C4<1>; +L_0x1949d80 .functor OR 1, L_0x194aa70, L_0x194ad50, C4<0>, C4<0>; +v0x190dd40_0 .net "a", 0 0, L_0x194b060; 1 drivers +v0x190de00_0 .net "ab", 0 0, L_0x194a090; 1 drivers +v0x190dea0_0 .net "acarryin", 0 0, L_0x194a550; 1 drivers +v0x190df40_0 .net "andall", 0 0, L_0x194ad50; 1 drivers +v0x190dfc0_0 .net "andsingleintermediate", 0 0, L_0x194ab70; 1 drivers +v0x190e060_0 .net "andsumintermediate", 0 0, L_0x194aa70; 1 drivers +v0x190e100_0 .net "b", 0 0, L_0x194b190; 1 drivers +v0x190e1a0_0 .net "bcarryin", 0 0, L_0x194a600; 1 drivers +v0x190e290_0 .alias "carryin", 0 0, v0x19114b0_0; +v0x190e330_0 .alias "carryout", 0 0, v0x191b1f0_0; +v0x190e3b0_0 .net "invcarryout", 0 0, L_0x194a9c0; 1 drivers +v0x190e450_0 .net "orall", 0 0, L_0x194a910; 1 drivers +v0x190e4f0_0 .net "orpairintermediate", 0 0, L_0x194a6b0; 1 drivers +v0x190e590_0 .net "orsingleintermediate", 0 0, L_0x194a8b0; 1 drivers +v0x190e6b0_0 .net "sum", 0 0, L_0x1949d80; 1 drivers +S_0x190a050 .scope module, "adder1" "FullAdder4bit" 20 238, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x194f170 .functor AND 1, L_0x194f7b0, L_0x194f850, C4<1>, C4<1>; +L_0x194f8f0 .functor NOR 1, L_0x194f950, L_0x194f9f0, C4<0>, C4<0>; +L_0x194fb70 .functor AND 1, L_0x194fbd0, L_0x194fcc0, C4<1>, C4<1>; +L_0x194fae0 .functor NOR 1, L_0x194fe50, L_0x1950050, C4<0>, C4<0>; +L_0x194fdb0 .functor OR 1, L_0x194f170, L_0x194f8f0, C4<0>, C4<0>; +L_0x1950240 .functor NOR 1, L_0x194fb70, L_0x194fae0, C4<0>, C4<0>; +L_0x1950340 .functor AND 1, L_0x194fdb0, L_0x1950240, C4<1>, C4<1>; +v0x190cc40_0 .net *"_s25", 0 0, L_0x194f7b0; 1 drivers +v0x190cd00_0 .net *"_s27", 0 0, L_0x194f850; 1 drivers +v0x190cda0_0 .net *"_s29", 0 0, L_0x194f950; 1 drivers +v0x190ce40_0 .net *"_s31", 0 0, L_0x194f9f0; 1 drivers +v0x190cec0_0 .net *"_s33", 0 0, L_0x194fbd0; 1 drivers +v0x190cf60_0 .net *"_s35", 0 0, L_0x194fcc0; 1 drivers +v0x190d000_0 .net *"_s37", 0 0, L_0x194fe50; 1 drivers +v0x190d0a0_0 .net *"_s39", 0 0, L_0x1950050; 1 drivers +v0x190d140_0 .net "a", 3 0, L_0x194c180; 1 drivers +v0x190d1e0_0 .net "aandb", 0 0, L_0x194f170; 1 drivers +v0x190d280_0 .net "abandnoror", 0 0, L_0x194fdb0; 1 drivers +v0x190d320_0 .net "anorb", 0 0, L_0x194f8f0; 1 drivers +v0x190d3c0_0 .net "b", 3 0, L_0x194c220; 1 drivers +v0x190d460_0 .net "bandsum", 0 0, L_0x194fb70; 1 drivers +v0x190d580_0 .net "bnorsum", 0 0, L_0x194fae0; 1 drivers +v0x190d620_0 .net "bsumandnornor", 0 0, L_0x1950240; 1 drivers +v0x190d4e0_0 .alias "carryin", 0 0, v0x191b1f0_0; +v0x190d750_0 .alias "carryout", 0 0, v0x191b5f0_0; +v0x190d6a0_0 .net "carryout1", 0 0, L_0x194c720; 1 drivers +v0x190d870_0 .net "carryout2", 0 0, L_0x194d250; 1 drivers +v0x190d9a0_0 .net "carryout3", 0 0, L_0x194df90; 1 drivers +v0x190da20_0 .alias "overflow", 0 0, v0x1918420_0; +v0x190d8f0_0 .net8 "sum", 3 0, RS_0x7f69333e0ec8; 4 drivers +L_0x194cdc0 .part/pv L_0x194cd60, 0, 1, 4; +L_0x194ceb0 .part L_0x194c180, 0, 1; +L_0x194cf50 .part L_0x194c220, 0, 1; +L_0x194da10 .part/pv L_0x194c990, 1, 1, 4; +L_0x194db50 .part L_0x194c180, 1, 1; +L_0x194dc40 .part L_0x194c220, 1, 1; +L_0x194e750 .part/pv L_0x194d4c0, 2, 1, 4; +L_0x194e840 .part L_0x194c180, 2, 1; +L_0x194e930 .part L_0x194c220, 2, 1; +L_0x194f3b0 .part/pv L_0x194e200, 3, 1, 4; +L_0x194f4e0 .part L_0x194c180, 3, 1; +L_0x194f610 .part L_0x194c220, 3, 1; +L_0x194f7b0 .part L_0x194c180, 3, 1; +L_0x194f850 .part L_0x194c220, 3, 1; +L_0x194f950 .part L_0x194c180, 3, 1; +L_0x194f9f0 .part L_0x194c220, 3, 1; +L_0x194fbd0 .part L_0x194c220, 3, 1; +L_0x194fcc0 .part RS_0x7f69333e0ec8, 3, 1; +L_0x194fe50 .part L_0x194c220, 3, 1; +L_0x1950050 .part RS_0x7f69333e0ec8, 3, 1; +S_0x190c1b0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x190a050; + .timescale 0 0; +L_0x194c3b0 .functor AND 1, L_0x194ceb0, L_0x194cf50, C4<1>, C4<1>; +L_0x194c410 .functor AND 1, L_0x194ceb0, L_0x194a7b0, C4<1>, C4<1>; +L_0x194c4c0 .functor AND 1, L_0x194cf50, L_0x194a7b0, C4<1>, C4<1>; +L_0x191b270 .functor OR 1, L_0x194c3b0, L_0x194c410, C4<0>, C4<0>; +L_0x194c720 .functor OR 1, L_0x191b270, L_0x194c4c0, C4<0>, C4<0>; +L_0x194c820 .functor OR 1, L_0x194ceb0, L_0x194cf50, C4<0>, C4<0>; +L_0x194c880 .functor OR 1, L_0x194c820, L_0x194a7b0, C4<0>, C4<0>; +L_0x194c930 .functor NOT 1, L_0x194c720, C4<0>, C4<0>, C4<0>; +L_0x194ca20 .functor AND 1, L_0x194c930, L_0x194c880, C4<1>, C4<1>; +L_0x194cb20 .functor AND 1, L_0x194ceb0, L_0x194cf50, C4<1>, C4<1>; +L_0x194cd00 .functor AND 1, L_0x194cb20, L_0x194a7b0, C4<1>, C4<1>; +L_0x194cd60 .functor OR 1, L_0x194ca20, L_0x194cd00, C4<0>, C4<0>; +v0x190c2a0_0 .net "a", 0 0, L_0x194ceb0; 1 drivers +v0x190c360_0 .net "ab", 0 0, L_0x194c3b0; 1 drivers +v0x190c400_0 .net "acarryin", 0 0, L_0x194c410; 1 drivers +v0x190c4a0_0 .net "andall", 0 0, L_0x194cd00; 1 drivers +v0x190c520_0 .net "andsingleintermediate", 0 0, L_0x194cb20; 1 drivers +v0x190c5c0_0 .net "andsumintermediate", 0 0, L_0x194ca20; 1 drivers +v0x190c660_0 .net "b", 0 0, L_0x194cf50; 1 drivers +v0x190c700_0 .net "bcarryin", 0 0, L_0x194c4c0; 1 drivers +v0x190c7a0_0 .alias "carryin", 0 0, v0x191b1f0_0; +v0x190c840_0 .alias "carryout", 0 0, v0x190d6a0_0; +v0x190c8c0_0 .net "invcarryout", 0 0, L_0x194c930; 1 drivers +v0x190c940_0 .net "orall", 0 0, L_0x194c880; 1 drivers +v0x190c9e0_0 .net "orpairintermediate", 0 0, L_0x191b270; 1 drivers +v0x190ca80_0 .net "orsingleintermediate", 0 0, L_0x194c820; 1 drivers +v0x190cba0_0 .net "sum", 0 0, L_0x194cd60; 1 drivers +S_0x190b720 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x190a050; + .timescale 0 0; +L_0x194cca0 .functor AND 1, L_0x194db50, L_0x194dc40, C4<1>, C4<1>; +L_0x194cff0 .functor AND 1, L_0x194db50, L_0x194c720, C4<1>, C4<1>; +L_0x194d0a0 .functor AND 1, L_0x194dc40, L_0x194c720, C4<1>, C4<1>; +L_0x194d150 .functor OR 1, L_0x194cca0, L_0x194cff0, C4<0>, C4<0>; +L_0x194d250 .functor OR 1, L_0x194d150, L_0x194d0a0, C4<0>, C4<0>; +L_0x194d350 .functor OR 1, L_0x194db50, L_0x194dc40, C4<0>, C4<0>; +L_0x194d3b0 .functor OR 1, L_0x194d350, L_0x194c720, C4<0>, C4<0>; +L_0x194d460 .functor NOT 1, L_0x194d250, C4<0>, C4<0>, C4<0>; +L_0x194d550 .functor AND 1, L_0x194d460, L_0x194d3b0, C4<1>, C4<1>; +L_0x194d650 .functor AND 1, L_0x194db50, L_0x194dc40, C4<1>, C4<1>; +L_0x194d830 .functor AND 1, L_0x194d650, L_0x194c720, C4<1>, C4<1>; +L_0x194c990 .functor OR 1, L_0x194d550, L_0x194d830, C4<0>, C4<0>; +v0x190b810_0 .net "a", 0 0, L_0x194db50; 1 drivers +v0x190b8d0_0 .net "ab", 0 0, L_0x194cca0; 1 drivers +v0x190b970_0 .net "acarryin", 0 0, L_0x194cff0; 1 drivers +v0x190ba10_0 .net "andall", 0 0, L_0x194d830; 1 drivers +v0x190ba90_0 .net "andsingleintermediate", 0 0, L_0x194d650; 1 drivers +v0x190bb30_0 .net "andsumintermediate", 0 0, L_0x194d550; 1 drivers +v0x190bbd0_0 .net "b", 0 0, L_0x194dc40; 1 drivers +v0x190bc70_0 .net "bcarryin", 0 0, L_0x194d0a0; 1 drivers +v0x190bd10_0 .alias "carryin", 0 0, v0x190d6a0_0; +v0x190bdb0_0 .alias "carryout", 0 0, v0x190d870_0; +v0x190be30_0 .net "invcarryout", 0 0, L_0x194d460; 1 drivers +v0x190beb0_0 .net "orall", 0 0, L_0x194d3b0; 1 drivers +v0x190bf50_0 .net "orpairintermediate", 0 0, L_0x194d150; 1 drivers +v0x190bff0_0 .net "orsingleintermediate", 0 0, L_0x194d350; 1 drivers +v0x190c110_0 .net "sum", 0 0, L_0x194c990; 1 drivers +S_0x190ac40 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x190a050; + .timescale 0 0; +L_0x194d7d0 .functor AND 1, L_0x194e840, L_0x194e930, C4<1>, C4<1>; +L_0x194dd30 .functor AND 1, L_0x194e840, L_0x194d250, C4<1>, C4<1>; +L_0x194dde0 .functor AND 1, L_0x194e930, L_0x194d250, C4<1>, C4<1>; +L_0x194de90 .functor OR 1, L_0x194d7d0, L_0x194dd30, C4<0>, C4<0>; +L_0x194df90 .functor OR 1, L_0x194de90, L_0x194dde0, C4<0>, C4<0>; +L_0x194e090 .functor OR 1, L_0x194e840, L_0x194e930, C4<0>, C4<0>; +L_0x194e0f0 .functor OR 1, L_0x194e090, L_0x194d250, C4<0>, C4<0>; +L_0x194e1a0 .functor NOT 1, L_0x194df90, C4<0>, C4<0>, C4<0>; +L_0x194e290 .functor AND 1, L_0x194e1a0, L_0x194e0f0, C4<1>, C4<1>; +L_0x194e390 .functor AND 1, L_0x194e840, L_0x194e930, C4<1>, C4<1>; +L_0x194e570 .functor AND 1, L_0x194e390, L_0x194d250, C4<1>, C4<1>; +L_0x194d4c0 .functor OR 1, L_0x194e290, L_0x194e570, C4<0>, C4<0>; +v0x190ad30_0 .net "a", 0 0, L_0x194e840; 1 drivers +v0x190adf0_0 .net "ab", 0 0, L_0x194d7d0; 1 drivers +v0x190ae90_0 .net "acarryin", 0 0, L_0x194dd30; 1 drivers +v0x190af30_0 .net "andall", 0 0, L_0x194e570; 1 drivers +v0x190afb0_0 .net "andsingleintermediate", 0 0, L_0x194e390; 1 drivers +v0x190b050_0 .net "andsumintermediate", 0 0, L_0x194e290; 1 drivers +v0x190b0f0_0 .net "b", 0 0, L_0x194e930; 1 drivers +v0x190b190_0 .net "bcarryin", 0 0, L_0x194dde0; 1 drivers +v0x190b280_0 .alias "carryin", 0 0, v0x190d870_0; +v0x190b320_0 .alias "carryout", 0 0, v0x190d9a0_0; +v0x190b3a0_0 .net "invcarryout", 0 0, L_0x194e1a0; 1 drivers +v0x190b420_0 .net "orall", 0 0, L_0x194e0f0; 1 drivers +v0x190b4c0_0 .net "orpairintermediate", 0 0, L_0x194de90; 1 drivers +v0x190b560_0 .net "orsingleintermediate", 0 0, L_0x194e090; 1 drivers +v0x190b680_0 .net "sum", 0 0, L_0x194d4c0; 1 drivers +S_0x190a140 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x190a050; + .timescale 0 0; +L_0x194e510 .functor AND 1, L_0x194f4e0, L_0x194f610, C4<1>, C4<1>; +L_0x194e9d0 .functor AND 1, L_0x194f4e0, L_0x194df90, C4<1>, C4<1>; +L_0x194ea80 .functor AND 1, L_0x194f610, L_0x194df90, C4<1>, C4<1>; +L_0x194eb30 .functor OR 1, L_0x194e510, L_0x194e9d0, C4<0>, C4<0>; +L_0x194ec30 .functor OR 1, L_0x194eb30, L_0x194ea80, C4<0>, C4<0>; +L_0x194ed30 .functor OR 1, L_0x194f4e0, L_0x194f610, C4<0>, C4<0>; +L_0x194ed90 .functor OR 1, L_0x194ed30, L_0x194df90, C4<0>, C4<0>; +L_0x194ee40 .functor NOT 1, L_0x194ec30, C4<0>, C4<0>, C4<0>; +L_0x194eef0 .functor AND 1, L_0x194ee40, L_0x194ed90, C4<1>, C4<1>; +L_0x194eff0 .functor AND 1, L_0x194f4e0, L_0x194f610, C4<1>, C4<1>; +L_0x194f1d0 .functor AND 1, L_0x194eff0, L_0x194df90, C4<1>, C4<1>; +L_0x194e200 .functor OR 1, L_0x194eef0, L_0x194f1d0, C4<0>, C4<0>; +v0x190a230_0 .net "a", 0 0, L_0x194f4e0; 1 drivers +v0x190a2f0_0 .net "ab", 0 0, L_0x194e510; 1 drivers +v0x190a390_0 .net "acarryin", 0 0, L_0x194e9d0; 1 drivers +v0x190a430_0 .net "andall", 0 0, L_0x194f1d0; 1 drivers +v0x190a4b0_0 .net "andsingleintermediate", 0 0, L_0x194eff0; 1 drivers +v0x190a550_0 .net "andsumintermediate", 0 0, L_0x194eef0; 1 drivers +v0x190a5f0_0 .net "b", 0 0, L_0x194f610; 1 drivers +v0x190a690_0 .net "bcarryin", 0 0, L_0x194ea80; 1 drivers +v0x190a780_0 .alias "carryin", 0 0, v0x190d9a0_0; +v0x190a820_0 .alias "carryout", 0 0, v0x191b5f0_0; +v0x190a8a0_0 .net "invcarryout", 0 0, L_0x194ee40; 1 drivers +v0x190a940_0 .net "orall", 0 0, L_0x194ed90; 1 drivers +v0x190a9e0_0 .net "orpairintermediate", 0 0, L_0x194eb30; 1 drivers +v0x190aa80_0 .net "orsingleintermediate", 0 0, L_0x194ed30; 1 drivers +v0x190aba0_0 .net "sum", 0 0, L_0x194e200; 1 drivers +S_0x1906540 .scope module, "adder2" "FullAdder4bit" 20 239, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x1953480 .functor AND 1, L_0x1953ac0, L_0x1953b60, C4<1>, C4<1>; +L_0x1953c00 .functor NOR 1, L_0x1953c60, L_0x1953d00, C4<0>, C4<0>; +L_0x1953e80 .functor AND 1, L_0x1953ee0, L_0x1953fd0, C4<1>, C4<1>; +L_0x1953df0 .functor NOR 1, L_0x1954160, L_0x1954360, C4<0>, C4<0>; +L_0x19540c0 .functor OR 1, L_0x1953480, L_0x1953c00, C4<0>, C4<0>; +L_0x1954550 .functor NOR 1, L_0x1953e80, L_0x1953df0, C4<0>, C4<0>; +L_0x1954650 .functor AND 1, L_0x19540c0, L_0x1954550, C4<1>, C4<1>; +v0x1909130_0 .net *"_s25", 0 0, L_0x1953ac0; 1 drivers +v0x19091f0_0 .net *"_s27", 0 0, L_0x1953b60; 1 drivers +v0x1909290_0 .net *"_s29", 0 0, L_0x1953c60; 1 drivers +v0x1909330_0 .net *"_s31", 0 0, L_0x1953d00; 1 drivers +v0x19093b0_0 .net *"_s33", 0 0, L_0x1953ee0; 1 drivers +v0x1909450_0 .net *"_s35", 0 0, L_0x1953fd0; 1 drivers +v0x19094f0_0 .net *"_s37", 0 0, L_0x1954160; 1 drivers +v0x1909590_0 .net *"_s39", 0 0, L_0x1954360; 1 drivers +v0x1909630_0 .net "a", 3 0, L_0x19548d0; 1 drivers +v0x19096d0_0 .net "aandb", 0 0, L_0x1953480; 1 drivers +v0x1909770_0 .net "abandnoror", 0 0, L_0x19540c0; 1 drivers +v0x1909810_0 .net "anorb", 0 0, L_0x1953c00; 1 drivers +v0x19098b0_0 .net "b", 3 0, L_0x1950530; 1 drivers +v0x1909950_0 .net "bandsum", 0 0, L_0x1953e80; 1 drivers +v0x1909a70_0 .net "bnorsum", 0 0, L_0x1953df0; 1 drivers +v0x1909b10_0 .net "bsumandnornor", 0 0, L_0x1954550; 1 drivers +v0x19099d0_0 .alias "carryin", 0 0, v0x191b5f0_0; +v0x1909c40_0 .alias "carryout", 0 0, v0x191b420_0; +v0x1909b90_0 .net "carryout1", 0 0, L_0x1950a30; 1 drivers +v0x1909d60_0 .net "carryout2", 0 0, L_0x1951560; 1 drivers +v0x1909e90_0 .net "carryout3", 0 0, L_0x19522a0; 1 drivers +v0x1909f10_0 .alias "overflow", 0 0, v0x19184a0_0; +v0x1909de0_0 .net8 "sum", 3 0, RS_0x7f69333e00e8; 4 drivers +L_0x19510d0 .part/pv L_0x1951070, 0, 1, 4; +L_0x19511c0 .part L_0x19548d0, 0, 1; +L_0x1951260 .part L_0x1950530, 0, 1; +L_0x1951d20 .part/pv L_0x1950ca0, 1, 1, 4; +L_0x1951e60 .part L_0x19548d0, 1, 1; +L_0x1951f50 .part L_0x1950530, 1, 1; +L_0x1952a60 .part/pv L_0x19517d0, 2, 1, 4; +L_0x1952b50 .part L_0x19548d0, 2, 1; +L_0x1952c40 .part L_0x1950530, 2, 1; +L_0x19536c0 .part/pv L_0x1952510, 3, 1, 4; +L_0x19537f0 .part L_0x19548d0, 3, 1; +L_0x1953920 .part L_0x1950530, 3, 1; +L_0x1953ac0 .part L_0x19548d0, 3, 1; +L_0x1953b60 .part L_0x1950530, 3, 1; +L_0x1953c60 .part L_0x19548d0, 3, 1; +L_0x1953d00 .part L_0x1950530, 3, 1; +L_0x1953ee0 .part L_0x1950530, 3, 1; +L_0x1953fd0 .part RS_0x7f69333e00e8, 3, 1; +L_0x1954160 .part L_0x1950530, 3, 1; +L_0x1954360 .part RS_0x7f69333e00e8, 3, 1; +S_0x19086a0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1906540; + .timescale 0 0; +L_0x194c2c0 .functor AND 1, L_0x19511c0, L_0x1951260, C4<1>, C4<1>; +L_0x194c320 .functor AND 1, L_0x19511c0, L_0x194ec30, C4<1>, C4<1>; +L_0x19507d0 .functor AND 1, L_0x1951260, L_0x194ec30, C4<1>, C4<1>; +L_0x191b390 .functor OR 1, L_0x194c2c0, L_0x194c320, C4<0>, C4<0>; +L_0x1950a30 .functor OR 1, L_0x191b390, L_0x19507d0, C4<0>, C4<0>; +L_0x1950b30 .functor OR 1, L_0x19511c0, L_0x1951260, C4<0>, C4<0>; +L_0x1950b90 .functor OR 1, L_0x1950b30, L_0x194ec30, C4<0>, C4<0>; +L_0x1950c40 .functor NOT 1, L_0x1950a30, C4<0>, C4<0>, C4<0>; +L_0x1950d30 .functor AND 1, L_0x1950c40, L_0x1950b90, C4<1>, C4<1>; +L_0x1950e30 .functor AND 1, L_0x19511c0, L_0x1951260, C4<1>, C4<1>; +L_0x1951010 .functor AND 1, L_0x1950e30, L_0x194ec30, C4<1>, C4<1>; +L_0x1951070 .functor OR 1, L_0x1950d30, L_0x1951010, C4<0>, C4<0>; +v0x1908790_0 .net "a", 0 0, L_0x19511c0; 1 drivers +v0x1908850_0 .net "ab", 0 0, L_0x194c2c0; 1 drivers +v0x19088f0_0 .net "acarryin", 0 0, L_0x194c320; 1 drivers +v0x1908990_0 .net "andall", 0 0, L_0x1951010; 1 drivers +v0x1908a10_0 .net "andsingleintermediate", 0 0, L_0x1950e30; 1 drivers +v0x1908ab0_0 .net "andsumintermediate", 0 0, L_0x1950d30; 1 drivers +v0x1908b50_0 .net "b", 0 0, L_0x1951260; 1 drivers +v0x1908bf0_0 .net "bcarryin", 0 0, L_0x19507d0; 1 drivers +v0x1908c90_0 .alias "carryin", 0 0, v0x191b5f0_0; +v0x1908d30_0 .alias "carryout", 0 0, v0x1909b90_0; +v0x1908db0_0 .net "invcarryout", 0 0, L_0x1950c40; 1 drivers +v0x1908e30_0 .net "orall", 0 0, L_0x1950b90; 1 drivers +v0x1908ed0_0 .net "orpairintermediate", 0 0, L_0x191b390; 1 drivers +v0x1908f70_0 .net "orsingleintermediate", 0 0, L_0x1950b30; 1 drivers +v0x1909090_0 .net "sum", 0 0, L_0x1951070; 1 drivers +S_0x1907c10 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1906540; + .timescale 0 0; +L_0x1950fb0 .functor AND 1, L_0x1951e60, L_0x1951f50, C4<1>, C4<1>; +L_0x1951300 .functor AND 1, L_0x1951e60, L_0x1950a30, C4<1>, C4<1>; +L_0x19513b0 .functor AND 1, L_0x1951f50, L_0x1950a30, C4<1>, C4<1>; +L_0x1951460 .functor OR 1, L_0x1950fb0, L_0x1951300, C4<0>, C4<0>; +L_0x1951560 .functor OR 1, L_0x1951460, L_0x19513b0, C4<0>, C4<0>; +L_0x1951660 .functor OR 1, L_0x1951e60, L_0x1951f50, C4<0>, C4<0>; +L_0x19516c0 .functor OR 1, L_0x1951660, L_0x1950a30, C4<0>, C4<0>; +L_0x1951770 .functor NOT 1, L_0x1951560, C4<0>, C4<0>, C4<0>; +L_0x1951860 .functor AND 1, L_0x1951770, L_0x19516c0, C4<1>, C4<1>; +L_0x1951960 .functor AND 1, L_0x1951e60, L_0x1951f50, C4<1>, C4<1>; +L_0x1951b40 .functor AND 1, L_0x1951960, L_0x1950a30, C4<1>, C4<1>; +L_0x1950ca0 .functor OR 1, L_0x1951860, L_0x1951b40, C4<0>, C4<0>; +v0x1907d00_0 .net "a", 0 0, L_0x1951e60; 1 drivers +v0x1907dc0_0 .net "ab", 0 0, L_0x1950fb0; 1 drivers +v0x1907e60_0 .net "acarryin", 0 0, L_0x1951300; 1 drivers +v0x1907f00_0 .net "andall", 0 0, L_0x1951b40; 1 drivers +v0x1907f80_0 .net "andsingleintermediate", 0 0, L_0x1951960; 1 drivers +v0x1908020_0 .net "andsumintermediate", 0 0, L_0x1951860; 1 drivers +v0x19080c0_0 .net "b", 0 0, L_0x1951f50; 1 drivers +v0x1908160_0 .net "bcarryin", 0 0, L_0x19513b0; 1 drivers +v0x1908200_0 .alias "carryin", 0 0, v0x1909b90_0; +v0x19082a0_0 .alias "carryout", 0 0, v0x1909d60_0; +v0x1908320_0 .net "invcarryout", 0 0, L_0x1951770; 1 drivers +v0x19083a0_0 .net "orall", 0 0, L_0x19516c0; 1 drivers +v0x1908440_0 .net "orpairintermediate", 0 0, L_0x1951460; 1 drivers +v0x19084e0_0 .net "orsingleintermediate", 0 0, L_0x1951660; 1 drivers +v0x1908600_0 .net "sum", 0 0, L_0x1950ca0; 1 drivers +S_0x1907130 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1906540; + .timescale 0 0; +L_0x1951ae0 .functor AND 1, L_0x1952b50, L_0x1952c40, C4<1>, C4<1>; +L_0x1952040 .functor AND 1, L_0x1952b50, L_0x1951560, C4<1>, C4<1>; +L_0x19520f0 .functor AND 1, L_0x1952c40, L_0x1951560, C4<1>, C4<1>; +L_0x19521a0 .functor OR 1, L_0x1951ae0, L_0x1952040, C4<0>, C4<0>; +L_0x19522a0 .functor OR 1, L_0x19521a0, L_0x19520f0, C4<0>, C4<0>; +L_0x19523a0 .functor OR 1, L_0x1952b50, L_0x1952c40, C4<0>, C4<0>; +L_0x1952400 .functor OR 1, L_0x19523a0, L_0x1951560, C4<0>, C4<0>; +L_0x19524b0 .functor NOT 1, L_0x19522a0, C4<0>, C4<0>, C4<0>; +L_0x19525a0 .functor AND 1, L_0x19524b0, L_0x1952400, C4<1>, C4<1>; +L_0x19526a0 .functor AND 1, L_0x1952b50, L_0x1952c40, C4<1>, C4<1>; +L_0x1952880 .functor AND 1, L_0x19526a0, L_0x1951560, C4<1>, C4<1>; +L_0x19517d0 .functor OR 1, L_0x19525a0, L_0x1952880, C4<0>, C4<0>; +v0x1907220_0 .net "a", 0 0, L_0x1952b50; 1 drivers +v0x19072e0_0 .net "ab", 0 0, L_0x1951ae0; 1 drivers +v0x1907380_0 .net "acarryin", 0 0, L_0x1952040; 1 drivers +v0x1907420_0 .net "andall", 0 0, L_0x1952880; 1 drivers +v0x19074a0_0 .net "andsingleintermediate", 0 0, L_0x19526a0; 1 drivers +v0x1907540_0 .net "andsumintermediate", 0 0, L_0x19525a0; 1 drivers +v0x19075e0_0 .net "b", 0 0, L_0x1952c40; 1 drivers +v0x1907680_0 .net "bcarryin", 0 0, L_0x19520f0; 1 drivers +v0x1907770_0 .alias "carryin", 0 0, v0x1909d60_0; +v0x1907810_0 .alias "carryout", 0 0, v0x1909e90_0; +v0x1907890_0 .net "invcarryout", 0 0, L_0x19524b0; 1 drivers +v0x1907910_0 .net "orall", 0 0, L_0x1952400; 1 drivers +v0x19079b0_0 .net "orpairintermediate", 0 0, L_0x19521a0; 1 drivers +v0x1907a50_0 .net "orsingleintermediate", 0 0, L_0x19523a0; 1 drivers +v0x1907b70_0 .net "sum", 0 0, L_0x19517d0; 1 drivers +S_0x1906630 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1906540; + .timescale 0 0; +L_0x1952820 .functor AND 1, L_0x19537f0, L_0x1953920, C4<1>, C4<1>; +L_0x1952ce0 .functor AND 1, L_0x19537f0, L_0x19522a0, C4<1>, C4<1>; +L_0x1952d90 .functor AND 1, L_0x1953920, L_0x19522a0, C4<1>, C4<1>; +L_0x1952e40 .functor OR 1, L_0x1952820, L_0x1952ce0, C4<0>, C4<0>; +L_0x1952f40 .functor OR 1, L_0x1952e40, L_0x1952d90, C4<0>, C4<0>; +L_0x1953040 .functor OR 1, L_0x19537f0, L_0x1953920, C4<0>, C4<0>; +L_0x19530a0 .functor OR 1, L_0x1953040, L_0x19522a0, C4<0>, C4<0>; +L_0x1953150 .functor NOT 1, L_0x1952f40, C4<0>, C4<0>, C4<0>; +L_0x1953200 .functor AND 1, L_0x1953150, L_0x19530a0, C4<1>, C4<1>; +L_0x1953300 .functor AND 1, L_0x19537f0, L_0x1953920, C4<1>, C4<1>; +L_0x19534e0 .functor AND 1, L_0x1953300, L_0x19522a0, C4<1>, C4<1>; +L_0x1952510 .functor OR 1, L_0x1953200, L_0x19534e0, C4<0>, C4<0>; +v0x1906720_0 .net "a", 0 0, L_0x19537f0; 1 drivers +v0x19067e0_0 .net "ab", 0 0, L_0x1952820; 1 drivers +v0x1906880_0 .net "acarryin", 0 0, L_0x1952ce0; 1 drivers +v0x1906920_0 .net "andall", 0 0, L_0x19534e0; 1 drivers +v0x19069a0_0 .net "andsingleintermediate", 0 0, L_0x1953300; 1 drivers +v0x1906a40_0 .net "andsumintermediate", 0 0, L_0x1953200; 1 drivers +v0x1906ae0_0 .net "b", 0 0, L_0x1953920; 1 drivers +v0x1906b80_0 .net "bcarryin", 0 0, L_0x1952d90; 1 drivers +v0x1906c70_0 .alias "carryin", 0 0, v0x1909e90_0; +v0x1906d10_0 .alias "carryout", 0 0, v0x191b420_0; +v0x1906d90_0 .net "invcarryout", 0 0, L_0x1953150; 1 drivers +v0x1906e30_0 .net "orall", 0 0, L_0x19530a0; 1 drivers +v0x1906ed0_0 .net "orpairintermediate", 0 0, L_0x1952e40; 1 drivers +v0x1906f70_0 .net "orsingleintermediate", 0 0, L_0x1953040; 1 drivers +v0x1907090_0 .net "sum", 0 0, L_0x1952510; 1 drivers +S_0x1902a30 .scope module, "adder3" "FullAdder4bit" 20 240, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x19576b0 .functor AND 1, L_0x1957cf0, L_0x1957d90, C4<1>, C4<1>; +L_0x1957eb0 .functor NOR 1, L_0x1957f10, L_0x1957fb0, C4<0>, C4<0>; +L_0x1958130 .functor AND 1, L_0x1958190, L_0x1958280, C4<1>, C4<1>; +L_0x19580a0 .functor NOR 1, L_0x1958410, L_0x1958610, C4<0>, C4<0>; +L_0x1958370 .functor OR 1, L_0x19576b0, L_0x1957eb0, C4<0>, C4<0>; +L_0x1958800 .functor NOR 1, L_0x1958130, L_0x19580a0, C4<0>, C4<0>; +L_0x1958900 .functor AND 1, L_0x1958370, L_0x1958800, C4<1>, C4<1>; +v0x1905620_0 .net *"_s25", 0 0, L_0x1957cf0; 1 drivers +v0x19056e0_0 .net *"_s27", 0 0, L_0x1957d90; 1 drivers +v0x1905780_0 .net *"_s29", 0 0, L_0x1957f10; 1 drivers +v0x1905820_0 .net *"_s31", 0 0, L_0x1957fb0; 1 drivers +v0x19058a0_0 .net *"_s33", 0 0, L_0x1958190; 1 drivers +v0x1905940_0 .net *"_s35", 0 0, L_0x1958280; 1 drivers +v0x19059e0_0 .net *"_s37", 0 0, L_0x1958410; 1 drivers +v0x1905a80_0 .net *"_s39", 0 0, L_0x1958610; 1 drivers +v0x1905b20_0 .net "a", 3 0, L_0x1954970; 1 drivers +v0x1905bc0_0 .net "aandb", 0 0, L_0x19576b0; 1 drivers +v0x1905c60_0 .net "abandnoror", 0 0, L_0x1958370; 1 drivers +v0x1905d00_0 .net "anorb", 0 0, L_0x1957eb0; 1 drivers +v0x1905da0_0 .net "b", 3 0, L_0x191cea0; 1 drivers +v0x1905e40_0 .net "bandsum", 0 0, L_0x1958130; 1 drivers +v0x1905f60_0 .net "bnorsum", 0 0, L_0x19580a0; 1 drivers +v0x1906000_0 .net "bsumandnornor", 0 0, L_0x1958800; 1 drivers +v0x1905ec0_0 .alias "carryin", 0 0, v0x191b420_0; +v0x1906130_0 .alias "carryout", 0 0, v0x191b530_0; +v0x1906080_0 .net "carryout1", 0 0, L_0x1954d80; 1 drivers +v0x1906250_0 .net "carryout2", 0 0, L_0x19557e0; 1 drivers +v0x1906380_0 .net "carryout3", 0 0, L_0x19564d0; 1 drivers +v0x1906400_0 .alias "overflow", 0 0, v0x1918550_0; +v0x19062d0_0 .net8 "sum", 3 0, RS_0x7f69333df308; 4 drivers +L_0x1955350 .part/pv L_0x1955280, 0, 1, 4; +L_0x1955440 .part L_0x1954970, 0, 1; +L_0x19554e0 .part L_0x191cea0, 0, 1; +L_0x1955fa0 .part/pv L_0x1953a10, 1, 1, 4; +L_0x1956090 .part L_0x1954970, 1, 1; +L_0x1956180 .part L_0x191cea0, 1, 1; +L_0x1956c90 .part/pv L_0x1955a50, 2, 1, 4; +L_0x1956d80 .part L_0x1954970, 2, 1; +L_0x1956e70 .part L_0x191cea0, 2, 1; +L_0x19578f0 .part/pv L_0x1956740, 3, 1, 4; +L_0x1957a20 .part L_0x1954970, 3, 1; +L_0x1957b50 .part L_0x191cea0, 3, 1; +L_0x1957cf0 .part L_0x1954970, 3, 1; +L_0x1957d90 .part L_0x191cea0, 3, 1; +L_0x1957f10 .part L_0x1954970, 3, 1; +L_0x1957fb0 .part L_0x191cea0, 3, 1; +L_0x1958190 .part L_0x191cea0, 3, 1; +L_0x1958280 .part RS_0x7f69333df308, 3, 1; +L_0x1958410 .part L_0x191cea0, 3, 1; +L_0x1958610 .part RS_0x7f69333df308, 3, 1; +S_0x1904b90 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1902a30; + .timescale 0 0; +L_0x19505d0 .functor AND 1, L_0x1955440, L_0x19554e0, C4<1>, C4<1>; +L_0x1950630 .functor AND 1, L_0x1955440, L_0x1952f40, C4<1>, C4<1>; +L_0x1950690 .functor AND 1, L_0x19554e0, L_0x1952f40, C4<1>, C4<1>; +L_0x191b4a0 .functor OR 1, L_0x19505d0, L_0x1950630, C4<0>, C4<0>; +L_0x1954d80 .functor OR 1, L_0x191b4a0, L_0x1950690, C4<0>, C4<0>; +L_0x1954e80 .functor OR 1, L_0x1955440, L_0x19554e0, C4<0>, C4<0>; +L_0x1954ee0 .functor OR 1, L_0x1954e80, L_0x1952f40, C4<0>, C4<0>; +L_0x1954f90 .functor NOT 1, L_0x1954d80, C4<0>, C4<0>, C4<0>; +L_0x194b470 .functor AND 1, L_0x1954f90, L_0x1954ee0, C4<1>, C4<1>; +L_0x1955040 .functor AND 1, L_0x1955440, L_0x19554e0, C4<1>, C4<1>; +L_0x1955220 .functor AND 1, L_0x1955040, L_0x1952f40, C4<1>, C4<1>; +L_0x1955280 .functor OR 1, L_0x194b470, L_0x1955220, C4<0>, C4<0>; +v0x1904c80_0 .net "a", 0 0, L_0x1955440; 1 drivers +v0x1904d40_0 .net "ab", 0 0, L_0x19505d0; 1 drivers +v0x1904de0_0 .net "acarryin", 0 0, L_0x1950630; 1 drivers +v0x1904e80_0 .net "andall", 0 0, L_0x1955220; 1 drivers +v0x1904f00_0 .net "andsingleintermediate", 0 0, L_0x1955040; 1 drivers +v0x1904fa0_0 .net "andsumintermediate", 0 0, L_0x194b470; 1 drivers +v0x1905040_0 .net "b", 0 0, L_0x19554e0; 1 drivers +v0x19050e0_0 .net "bcarryin", 0 0, L_0x1950690; 1 drivers +v0x1905180_0 .alias "carryin", 0 0, v0x191b420_0; +v0x1905220_0 .alias "carryout", 0 0, v0x1906080_0; +v0x19052a0_0 .net "invcarryout", 0 0, L_0x1954f90; 1 drivers +v0x1905320_0 .net "orall", 0 0, L_0x1954ee0; 1 drivers +v0x19053c0_0 .net "orpairintermediate", 0 0, L_0x191b4a0; 1 drivers +v0x1905460_0 .net "orsingleintermediate", 0 0, L_0x1954e80; 1 drivers +v0x1905580_0 .net "sum", 0 0, L_0x1955280; 1 drivers +S_0x1904100 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1902a30; + .timescale 0 0; +L_0x19551c0 .functor AND 1, L_0x1956090, L_0x1956180, C4<1>, C4<1>; +L_0x1955580 .functor AND 1, L_0x1956090, L_0x1954d80, C4<1>, C4<1>; +L_0x1955630 .functor AND 1, L_0x1956180, L_0x1954d80, C4<1>, C4<1>; +L_0x19556e0 .functor OR 1, L_0x19551c0, L_0x1955580, C4<0>, C4<0>; +L_0x19557e0 .functor OR 1, L_0x19556e0, L_0x1955630, C4<0>, C4<0>; +L_0x19558e0 .functor OR 1, L_0x1956090, L_0x1956180, C4<0>, C4<0>; +L_0x1955940 .functor OR 1, L_0x19558e0, L_0x1954d80, C4<0>, C4<0>; +L_0x19559f0 .functor NOT 1, L_0x19557e0, C4<0>, C4<0>, C4<0>; +L_0x1955ae0 .functor AND 1, L_0x19559f0, L_0x1955940, C4<1>, C4<1>; +L_0x1955be0 .functor AND 1, L_0x1956090, L_0x1956180, C4<1>, C4<1>; +L_0x1955dc0 .functor AND 1, L_0x1955be0, L_0x1954d80, C4<1>, C4<1>; +L_0x1953a10 .functor OR 1, L_0x1955ae0, L_0x1955dc0, C4<0>, C4<0>; +v0x19041f0_0 .net "a", 0 0, L_0x1956090; 1 drivers +v0x19042b0_0 .net "ab", 0 0, L_0x19551c0; 1 drivers +v0x1904350_0 .net "acarryin", 0 0, L_0x1955580; 1 drivers +v0x19043f0_0 .net "andall", 0 0, L_0x1955dc0; 1 drivers +v0x1904470_0 .net "andsingleintermediate", 0 0, L_0x1955be0; 1 drivers +v0x1904510_0 .net "andsumintermediate", 0 0, L_0x1955ae0; 1 drivers +v0x19045b0_0 .net "b", 0 0, L_0x1956180; 1 drivers +v0x1904650_0 .net "bcarryin", 0 0, L_0x1955630; 1 drivers +v0x19046f0_0 .alias "carryin", 0 0, v0x1906080_0; +v0x1904790_0 .alias "carryout", 0 0, v0x1906250_0; +v0x1904810_0 .net "invcarryout", 0 0, L_0x19559f0; 1 drivers +v0x1904890_0 .net "orall", 0 0, L_0x1955940; 1 drivers +v0x1904930_0 .net "orpairintermediate", 0 0, L_0x19556e0; 1 drivers +v0x19049d0_0 .net "orsingleintermediate", 0 0, L_0x19558e0; 1 drivers +v0x1904af0_0 .net "sum", 0 0, L_0x1953a10; 1 drivers +S_0x1903620 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1902a30; + .timescale 0 0; +L_0x1955d60 .functor AND 1, L_0x1956d80, L_0x1956e70, C4<1>, C4<1>; +L_0x1956270 .functor AND 1, L_0x1956d80, L_0x19557e0, C4<1>, C4<1>; +L_0x1956320 .functor AND 1, L_0x1956e70, L_0x19557e0, C4<1>, C4<1>; +L_0x19563d0 .functor OR 1, L_0x1955d60, L_0x1956270, C4<0>, C4<0>; +L_0x19564d0 .functor OR 1, L_0x19563d0, L_0x1956320, C4<0>, C4<0>; +L_0x19565d0 .functor OR 1, L_0x1956d80, L_0x1956e70, C4<0>, C4<0>; +L_0x1956630 .functor OR 1, L_0x19565d0, L_0x19557e0, C4<0>, C4<0>; +L_0x19566e0 .functor NOT 1, L_0x19564d0, C4<0>, C4<0>, C4<0>; +L_0x19567d0 .functor AND 1, L_0x19566e0, L_0x1956630, C4<1>, C4<1>; +L_0x19568d0 .functor AND 1, L_0x1956d80, L_0x1956e70, C4<1>, C4<1>; +L_0x1956ab0 .functor AND 1, L_0x19568d0, L_0x19557e0, C4<1>, C4<1>; +L_0x1955a50 .functor OR 1, L_0x19567d0, L_0x1956ab0, C4<0>, C4<0>; +v0x1903710_0 .net "a", 0 0, L_0x1956d80; 1 drivers +v0x19037d0_0 .net "ab", 0 0, L_0x1955d60; 1 drivers +v0x1903870_0 .net "acarryin", 0 0, L_0x1956270; 1 drivers +v0x1903910_0 .net "andall", 0 0, L_0x1956ab0; 1 drivers +v0x1903990_0 .net "andsingleintermediate", 0 0, L_0x19568d0; 1 drivers +v0x1903a30_0 .net "andsumintermediate", 0 0, L_0x19567d0; 1 drivers +v0x1903ad0_0 .net "b", 0 0, L_0x1956e70; 1 drivers +v0x1903b70_0 .net "bcarryin", 0 0, L_0x1956320; 1 drivers +v0x1903c60_0 .alias "carryin", 0 0, v0x1906250_0; +v0x1903d00_0 .alias "carryout", 0 0, v0x1906380_0; +v0x1903d80_0 .net "invcarryout", 0 0, L_0x19566e0; 1 drivers +v0x1903e00_0 .net "orall", 0 0, L_0x1956630; 1 drivers +v0x1903ea0_0 .net "orpairintermediate", 0 0, L_0x19563d0; 1 drivers +v0x1903f40_0 .net "orsingleintermediate", 0 0, L_0x19565d0; 1 drivers +v0x1904060_0 .net "sum", 0 0, L_0x1955a50; 1 drivers +S_0x1902b20 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1902a30; + .timescale 0 0; +L_0x1956a50 .functor AND 1, L_0x1957a20, L_0x1957b50, C4<1>, C4<1>; +L_0x1956f10 .functor AND 1, L_0x1957a20, L_0x19564d0, C4<1>, C4<1>; +L_0x1956fc0 .functor AND 1, L_0x1957b50, L_0x19564d0, C4<1>, C4<1>; +L_0x1957070 .functor OR 1, L_0x1956a50, L_0x1956f10, C4<0>, C4<0>; +L_0x1957170 .functor OR 1, L_0x1957070, L_0x1956fc0, C4<0>, C4<0>; +L_0x1957270 .functor OR 1, L_0x1957a20, L_0x1957b50, C4<0>, C4<0>; +L_0x19572d0 .functor OR 1, L_0x1957270, L_0x19564d0, C4<0>, C4<0>; +L_0x1957380 .functor NOT 1, L_0x1957170, C4<0>, C4<0>, C4<0>; +L_0x1957430 .functor AND 1, L_0x1957380, L_0x19572d0, C4<1>, C4<1>; +L_0x1957530 .functor AND 1, L_0x1957a20, L_0x1957b50, C4<1>, C4<1>; +L_0x1957710 .functor AND 1, L_0x1957530, L_0x19564d0, C4<1>, C4<1>; +L_0x1956740 .functor OR 1, L_0x1957430, L_0x1957710, C4<0>, C4<0>; +v0x1902c10_0 .net "a", 0 0, L_0x1957a20; 1 drivers +v0x1902cd0_0 .net "ab", 0 0, L_0x1956a50; 1 drivers +v0x1902d70_0 .net "acarryin", 0 0, L_0x1956f10; 1 drivers +v0x1902e10_0 .net "andall", 0 0, L_0x1957710; 1 drivers +v0x1902e90_0 .net "andsingleintermediate", 0 0, L_0x1957530; 1 drivers +v0x1902f30_0 .net "andsumintermediate", 0 0, L_0x1957430; 1 drivers +v0x1902fd0_0 .net "b", 0 0, L_0x1957b50; 1 drivers +v0x1903070_0 .net "bcarryin", 0 0, L_0x1956fc0; 1 drivers +v0x1903160_0 .alias "carryin", 0 0, v0x1906380_0; +v0x1903200_0 .alias "carryout", 0 0, v0x191b530_0; +v0x1903280_0 .net "invcarryout", 0 0, L_0x1957380; 1 drivers +v0x1903320_0 .net "orall", 0 0, L_0x19572d0; 1 drivers +v0x19033c0_0 .net "orpairintermediate", 0 0, L_0x1957070; 1 drivers +v0x1903460_0 .net "orsingleintermediate", 0 0, L_0x1957270; 1 drivers +v0x1903580_0 .net "sum", 0 0, L_0x1956740; 1 drivers +S_0x18fef20 .scope module, "adder4" "FullAdder4bit" 20 241, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x195bb40 .functor AND 1, L_0x195c180, L_0x195c220, C4<1>, C4<1>; +L_0x195c2c0 .functor NOR 1, L_0x195c320, L_0x195c3c0, C4<0>, C4<0>; +L_0x195c540 .functor AND 1, L_0x195c5a0, L_0x195c690, C4<1>, C4<1>; +L_0x195c4b0 .functor NOR 1, L_0x195c820, L_0x195ca20, C4<0>, C4<0>; +L_0x195c780 .functor OR 1, L_0x195bb40, L_0x195c2c0, C4<0>, C4<0>; +L_0x195cc10 .functor NOR 1, L_0x195c540, L_0x195c4b0, C4<0>, C4<0>; +L_0x195cd10 .functor AND 1, L_0x195c780, L_0x195cc10, C4<1>, C4<1>; +v0x1901b10_0 .net *"_s25", 0 0, L_0x195c180; 1 drivers +v0x1901bd0_0 .net *"_s27", 0 0, L_0x195c220; 1 drivers +v0x1901c70_0 .net *"_s29", 0 0, L_0x195c320; 1 drivers +v0x1901d10_0 .net *"_s31", 0 0, L_0x195c3c0; 1 drivers +v0x1901d90_0 .net *"_s33", 0 0, L_0x195c5a0; 1 drivers +v0x1901e30_0 .net *"_s35", 0 0, L_0x195c690; 1 drivers +v0x1901ed0_0 .net *"_s37", 0 0, L_0x195c820; 1 drivers +v0x1901f70_0 .net *"_s39", 0 0, L_0x195ca20; 1 drivers +v0x1902010_0 .net "a", 3 0, L_0x195cf00; 1 drivers +v0x19020b0_0 .net "aandb", 0 0, L_0x195bb40; 1 drivers +v0x1902150_0 .net "abandnoror", 0 0, L_0x195c780; 1 drivers +v0x19021f0_0 .net "anorb", 0 0, L_0x195c2c0; 1 drivers +v0x1902290_0 .net "b", 3 0, L_0x1958f70; 1 drivers +v0x1902330_0 .net "bandsum", 0 0, L_0x195c540; 1 drivers +v0x1902450_0 .net "bnorsum", 0 0, L_0x195c4b0; 1 drivers +v0x19024f0_0 .net "bsumandnornor", 0 0, L_0x195cc10; 1 drivers +v0x19023b0_0 .alias "carryin", 0 0, v0x191b530_0; +v0x1902620_0 .alias "carryout", 0 0, v0x191b980_0; +v0x1902570_0 .net "carryout1", 0 0, L_0x1958c50; 1 drivers +v0x1902740_0 .net "carryout2", 0 0, L_0x1959c20; 1 drivers +v0x1902870_0 .net "carryout3", 0 0, L_0x195a960; 1 drivers +v0x19028f0_0 .alias "overflow", 0 0, v0x1918600_0; +v0x19027c0_0 .net8 "sum", 3 0, RS_0x7f69333de528; 4 drivers +L_0x1959790 .part/pv L_0x1959730, 0, 1, 4; +L_0x1959880 .part L_0x195cf00, 0, 1; +L_0x1959920 .part L_0x1958f70, 0, 1; +L_0x195a3e0 .part/pv L_0x1959360, 1, 1, 4; +L_0x195a520 .part L_0x195cf00, 1, 1; +L_0x195a610 .part L_0x1958f70, 1, 1; +L_0x195b120 .part/pv L_0x1959e90, 2, 1, 4; +L_0x195b210 .part L_0x195cf00, 2, 1; +L_0x195b300 .part L_0x1958f70, 2, 1; +L_0x195bd80 .part/pv L_0x195abd0, 3, 1, 4; +L_0x195beb0 .part L_0x195cf00, 3, 1; +L_0x195bfe0 .part L_0x1958f70, 3, 1; +L_0x195c180 .part L_0x195cf00, 3, 1; +L_0x195c220 .part L_0x1958f70, 3, 1; +L_0x195c320 .part L_0x195cf00, 3, 1; +L_0x195c3c0 .part L_0x1958f70, 3, 1; +L_0x195c5a0 .part L_0x1958f70, 3, 1; +L_0x195c690 .part RS_0x7f69333de528, 3, 1; +L_0x195c820 .part L_0x1958f70, 3, 1; +L_0x195ca20 .part RS_0x7f69333de528, 3, 1; +S_0x1901080 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x18fef20; + .timescale 0 0; +L_0x191cf40 .functor AND 1, L_0x1959880, L_0x1959920, C4<1>, C4<1>; +L_0x1954a10 .functor AND 1, L_0x1959880, L_0x1957170, C4<1>, C4<1>; +L_0x1954ac0 .functor AND 1, L_0x1959920, L_0x1957170, C4<1>, C4<1>; +L_0x1954b70 .functor OR 1, L_0x191cf40, L_0x1954a10, C4<0>, C4<0>; +L_0x1958c50 .functor OR 1, L_0x1954b70, L_0x1954ac0, C4<0>, C4<0>; +L_0x19591f0 .functor OR 1, L_0x1959880, L_0x1959920, C4<0>, C4<0>; +L_0x1959250 .functor OR 1, L_0x19591f0, L_0x1957170, C4<0>, C4<0>; +L_0x1959300 .functor NOT 1, L_0x1958c50, C4<0>, C4<0>, C4<0>; +L_0x19593f0 .functor AND 1, L_0x1959300, L_0x1959250, C4<1>, C4<1>; +L_0x19594f0 .functor AND 1, L_0x1959880, L_0x1959920, C4<1>, C4<1>; +L_0x19596d0 .functor AND 1, L_0x19594f0, L_0x1957170, C4<1>, C4<1>; +L_0x1959730 .functor OR 1, L_0x19593f0, L_0x19596d0, C4<0>, C4<0>; +v0x1901170_0 .net "a", 0 0, L_0x1959880; 1 drivers +v0x1901230_0 .net "ab", 0 0, L_0x191cf40; 1 drivers +v0x19012d0_0 .net "acarryin", 0 0, L_0x1954a10; 1 drivers +v0x1901370_0 .net "andall", 0 0, L_0x19596d0; 1 drivers +v0x19013f0_0 .net "andsingleintermediate", 0 0, L_0x19594f0; 1 drivers +v0x1901490_0 .net "andsumintermediate", 0 0, L_0x19593f0; 1 drivers +v0x1901530_0 .net "b", 0 0, L_0x1959920; 1 drivers +v0x19015d0_0 .net "bcarryin", 0 0, L_0x1954ac0; 1 drivers +v0x1901670_0 .alias "carryin", 0 0, v0x191b530_0; +v0x1901710_0 .alias "carryout", 0 0, v0x1902570_0; +v0x1901790_0 .net "invcarryout", 0 0, L_0x1959300; 1 drivers +v0x1901810_0 .net "orall", 0 0, L_0x1959250; 1 drivers +v0x19018b0_0 .net "orpairintermediate", 0 0, L_0x1954b70; 1 drivers +v0x1901950_0 .net "orsingleintermediate", 0 0, L_0x19591f0; 1 drivers +v0x1901a70_0 .net "sum", 0 0, L_0x1959730; 1 drivers +S_0x19005f0 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x18fef20; + .timescale 0 0; +L_0x1959670 .functor AND 1, L_0x195a520, L_0x195a610, C4<1>, C4<1>; +L_0x19599c0 .functor AND 1, L_0x195a520, L_0x1958c50, C4<1>, C4<1>; +L_0x1959a70 .functor AND 1, L_0x195a610, L_0x1958c50, C4<1>, C4<1>; +L_0x1959b20 .functor OR 1, L_0x1959670, L_0x19599c0, C4<0>, C4<0>; +L_0x1959c20 .functor OR 1, L_0x1959b20, L_0x1959a70, C4<0>, C4<0>; +L_0x1959d20 .functor OR 1, L_0x195a520, L_0x195a610, C4<0>, C4<0>; +L_0x1959d80 .functor OR 1, L_0x1959d20, L_0x1958c50, C4<0>, C4<0>; +L_0x1959e30 .functor NOT 1, L_0x1959c20, C4<0>, C4<0>, C4<0>; +L_0x1959f20 .functor AND 1, L_0x1959e30, L_0x1959d80, C4<1>, C4<1>; +L_0x195a020 .functor AND 1, L_0x195a520, L_0x195a610, C4<1>, C4<1>; +L_0x195a200 .functor AND 1, L_0x195a020, L_0x1958c50, C4<1>, C4<1>; +L_0x1959360 .functor OR 1, L_0x1959f20, L_0x195a200, C4<0>, C4<0>; +v0x19006e0_0 .net "a", 0 0, L_0x195a520; 1 drivers +v0x19007a0_0 .net "ab", 0 0, L_0x1959670; 1 drivers +v0x1900840_0 .net "acarryin", 0 0, L_0x19599c0; 1 drivers +v0x19008e0_0 .net "andall", 0 0, L_0x195a200; 1 drivers +v0x1900960_0 .net "andsingleintermediate", 0 0, L_0x195a020; 1 drivers +v0x1900a00_0 .net "andsumintermediate", 0 0, L_0x1959f20; 1 drivers +v0x1900aa0_0 .net "b", 0 0, L_0x195a610; 1 drivers +v0x1900b40_0 .net "bcarryin", 0 0, L_0x1959a70; 1 drivers +v0x1900be0_0 .alias "carryin", 0 0, v0x1902570_0; +v0x1900c80_0 .alias "carryout", 0 0, v0x1902740_0; +v0x1900d00_0 .net "invcarryout", 0 0, L_0x1959e30; 1 drivers +v0x1900d80_0 .net "orall", 0 0, L_0x1959d80; 1 drivers +v0x1900e20_0 .net "orpairintermediate", 0 0, L_0x1959b20; 1 drivers +v0x1900ec0_0 .net "orsingleintermediate", 0 0, L_0x1959d20; 1 drivers +v0x1900fe0_0 .net "sum", 0 0, L_0x1959360; 1 drivers +S_0x18ffb10 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x18fef20; + .timescale 0 0; +L_0x195a1a0 .functor AND 1, L_0x195b210, L_0x195b300, C4<1>, C4<1>; +L_0x195a700 .functor AND 1, L_0x195b210, L_0x1959c20, C4<1>, C4<1>; +L_0x195a7b0 .functor AND 1, L_0x195b300, L_0x1959c20, C4<1>, C4<1>; +L_0x195a860 .functor OR 1, L_0x195a1a0, L_0x195a700, C4<0>, C4<0>; +L_0x195a960 .functor OR 1, L_0x195a860, L_0x195a7b0, C4<0>, C4<0>; +L_0x195aa60 .functor OR 1, L_0x195b210, L_0x195b300, C4<0>, C4<0>; +L_0x195aac0 .functor OR 1, L_0x195aa60, L_0x1959c20, C4<0>, C4<0>; +L_0x195ab70 .functor NOT 1, L_0x195a960, C4<0>, C4<0>, C4<0>; +L_0x195ac60 .functor AND 1, L_0x195ab70, L_0x195aac0, C4<1>, C4<1>; +L_0x195ad60 .functor AND 1, L_0x195b210, L_0x195b300, C4<1>, C4<1>; +L_0x195af40 .functor AND 1, L_0x195ad60, L_0x1959c20, C4<1>, C4<1>; +L_0x1959e90 .functor OR 1, L_0x195ac60, L_0x195af40, C4<0>, C4<0>; +v0x18ffc00_0 .net "a", 0 0, L_0x195b210; 1 drivers +v0x18ffcc0_0 .net "ab", 0 0, L_0x195a1a0; 1 drivers +v0x18ffd60_0 .net "acarryin", 0 0, L_0x195a700; 1 drivers +v0x18ffe00_0 .net "andall", 0 0, L_0x195af40; 1 drivers +v0x18ffe80_0 .net "andsingleintermediate", 0 0, L_0x195ad60; 1 drivers +v0x18fff20_0 .net "andsumintermediate", 0 0, L_0x195ac60; 1 drivers +v0x18fffc0_0 .net "b", 0 0, L_0x195b300; 1 drivers +v0x1900060_0 .net "bcarryin", 0 0, L_0x195a7b0; 1 drivers +v0x1900150_0 .alias "carryin", 0 0, v0x1902740_0; +v0x19001f0_0 .alias "carryout", 0 0, v0x1902870_0; +v0x1900270_0 .net "invcarryout", 0 0, L_0x195ab70; 1 drivers +v0x19002f0_0 .net "orall", 0 0, L_0x195aac0; 1 drivers +v0x1900390_0 .net "orpairintermediate", 0 0, L_0x195a860; 1 drivers +v0x1900430_0 .net "orsingleintermediate", 0 0, L_0x195aa60; 1 drivers +v0x1900550_0 .net "sum", 0 0, L_0x1959e90; 1 drivers +S_0x18ff010 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x18fef20; + .timescale 0 0; +L_0x195aee0 .functor AND 1, L_0x195beb0, L_0x195bfe0, C4<1>, C4<1>; +L_0x195b3a0 .functor AND 1, L_0x195beb0, L_0x195a960, C4<1>, C4<1>; +L_0x195b450 .functor AND 1, L_0x195bfe0, L_0x195a960, C4<1>, C4<1>; +L_0x195b500 .functor OR 1, L_0x195aee0, L_0x195b3a0, C4<0>, C4<0>; +L_0x195b600 .functor OR 1, L_0x195b500, L_0x195b450, C4<0>, C4<0>; +L_0x195b700 .functor OR 1, L_0x195beb0, L_0x195bfe0, C4<0>, C4<0>; +L_0x195b760 .functor OR 1, L_0x195b700, L_0x195a960, C4<0>, C4<0>; +L_0x195b810 .functor NOT 1, L_0x195b600, C4<0>, C4<0>, C4<0>; +L_0x195b8c0 .functor AND 1, L_0x195b810, L_0x195b760, C4<1>, C4<1>; +L_0x195b9c0 .functor AND 1, L_0x195beb0, L_0x195bfe0, C4<1>, C4<1>; +L_0x195bba0 .functor AND 1, L_0x195b9c0, L_0x195a960, C4<1>, C4<1>; +L_0x195abd0 .functor OR 1, L_0x195b8c0, L_0x195bba0, C4<0>, C4<0>; +v0x18ff100_0 .net "a", 0 0, L_0x195beb0; 1 drivers +v0x18ff1c0_0 .net "ab", 0 0, L_0x195aee0; 1 drivers +v0x18ff260_0 .net "acarryin", 0 0, L_0x195b3a0; 1 drivers +v0x18ff300_0 .net "andall", 0 0, L_0x195bba0; 1 drivers +v0x18ff380_0 .net "andsingleintermediate", 0 0, L_0x195b9c0; 1 drivers +v0x18ff420_0 .net "andsumintermediate", 0 0, L_0x195b8c0; 1 drivers +v0x18ff4c0_0 .net "b", 0 0, L_0x195bfe0; 1 drivers +v0x18ff560_0 .net "bcarryin", 0 0, L_0x195b450; 1 drivers +v0x18ff650_0 .alias "carryin", 0 0, v0x1902870_0; +v0x18ff6f0_0 .alias "carryout", 0 0, v0x191b980_0; +v0x18ff770_0 .net "invcarryout", 0 0, L_0x195b810; 1 drivers +v0x18ff810_0 .net "orall", 0 0, L_0x195b760; 1 drivers +v0x18ff8b0_0 .net "orpairintermediate", 0 0, L_0x195b500; 1 drivers +v0x18ff950_0 .net "orsingleintermediate", 0 0, L_0x195b700; 1 drivers +v0x18ffa70_0 .net "sum", 0 0, L_0x195abd0; 1 drivers +S_0x18fb410 .scope module, "adder5" "FullAdder4bit" 20 242, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x195fe30 .functor AND 1, L_0x1960470, L_0x1960510, C4<1>, C4<1>; +L_0x19605b0 .functor NOR 1, L_0x1960610, L_0x19606b0, C4<0>, C4<0>; +L_0x1960830 .functor AND 1, L_0x1960890, L_0x1960980, C4<1>, C4<1>; +L_0x19607a0 .functor NOR 1, L_0x1960b10, L_0x1960d10, C4<0>, C4<0>; +L_0x1960a70 .functor OR 1, L_0x195fe30, L_0x19605b0, C4<0>, C4<0>; +L_0x1960f00 .functor NOR 1, L_0x1960830, L_0x19607a0, C4<0>, C4<0>; +L_0x1961000 .functor AND 1, L_0x1960a70, L_0x1960f00, C4<1>, C4<1>; +v0x18fe000_0 .net *"_s25", 0 0, L_0x1960470; 1 drivers +v0x18fe0c0_0 .net *"_s27", 0 0, L_0x1960510; 1 drivers +v0x18fe160_0 .net *"_s29", 0 0, L_0x1960610; 1 drivers +v0x18fe200_0 .net *"_s31", 0 0, L_0x19606b0; 1 drivers +v0x18fe280_0 .net *"_s33", 0 0, L_0x1960890; 1 drivers +v0x18fe320_0 .net *"_s35", 0 0, L_0x1960980; 1 drivers +v0x18fe3c0_0 .net *"_s37", 0 0, L_0x1960b10; 1 drivers +v0x18fe460_0 .net *"_s39", 0 0, L_0x1960d10; 1 drivers +v0x18fe500_0 .net "a", 3 0, L_0x195cfa0; 1 drivers +v0x18fe5a0_0 .net "aandb", 0 0, L_0x195fe30; 1 drivers +v0x18fe640_0 .net "abandnoror", 0 0, L_0x1960a70; 1 drivers +v0x18fe6e0_0 .net "anorb", 0 0, L_0x19605b0; 1 drivers +v0x18fe780_0 .net "b", 3 0, L_0x195d040; 1 drivers +v0x18fe820_0 .net "bandsum", 0 0, L_0x1960830; 1 drivers +v0x18fe940_0 .net "bnorsum", 0 0, L_0x19607a0; 1 drivers +v0x18fe9e0_0 .net "bsumandnornor", 0 0, L_0x1960f00; 1 drivers +v0x18fe8a0_0 .alias "carryin", 0 0, v0x191b980_0; +v0x18feb10_0 .alias "carryout", 0 0, v0x191ba90_0; +v0x18fea60_0 .net "carryout1", 0 0, L_0x195d3e0; 1 drivers +v0x18fec30_0 .net "carryout2", 0 0, L_0x195df10; 1 drivers +v0x18fed60_0 .net "carryout3", 0 0, L_0x195ec50; 1 drivers +v0x18fede0_0 .alias "overflow", 0 0, v0x19186b0_0; +v0x18fecb0_0 .net8 "sum", 3 0, RS_0x7f69333dd748; 4 drivers +L_0x195da80 .part/pv L_0x195da20, 0, 1, 4; +L_0x195db70 .part L_0x195cfa0, 0, 1; +L_0x195dc10 .part L_0x195d040, 0, 1; +L_0x195e6d0 .part/pv L_0x195d650, 1, 1, 4; +L_0x195e810 .part L_0x195cfa0, 1, 1; +L_0x195e900 .part L_0x195d040, 1, 1; +L_0x195f410 .part/pv L_0x195e180, 2, 1, 4; +L_0x195f500 .part L_0x195cfa0, 2, 1; +L_0x195f5f0 .part L_0x195d040, 2, 1; +L_0x1960070 .part/pv L_0x195eec0, 3, 1, 4; +L_0x19601a0 .part L_0x195cfa0, 3, 1; +L_0x19602d0 .part L_0x195d040, 3, 1; +L_0x1960470 .part L_0x195cfa0, 3, 1; +L_0x1960510 .part L_0x195d040, 3, 1; +L_0x1960610 .part L_0x195cfa0, 3, 1; +L_0x19606b0 .part L_0x195d040, 3, 1; +L_0x1960890 .part L_0x195d040, 3, 1; +L_0x1960980 .part RS_0x7f69333dd748, 3, 1; +L_0x1960b10 .part L_0x195d040, 3, 1; +L_0x1960d10 .part RS_0x7f69333dd748, 3, 1; +S_0x18fd570 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x18fb410; + .timescale 0 0; +L_0x1959010 .functor AND 1, L_0x195db70, L_0x195dc10, C4<1>, C4<1>; +L_0x1959070 .functor AND 1, L_0x195db70, L_0x195b600, C4<1>, C4<1>; +L_0x1959120 .functor AND 1, L_0x195dc10, L_0x195b600, C4<1>, C4<1>; +L_0x191ba00 .functor OR 1, L_0x1959010, L_0x1959070, C4<0>, C4<0>; +L_0x195d3e0 .functor OR 1, L_0x191ba00, L_0x1959120, C4<0>, C4<0>; +L_0x195d4e0 .functor OR 1, L_0x195db70, L_0x195dc10, C4<0>, C4<0>; +L_0x195d540 .functor OR 1, L_0x195d4e0, L_0x195b600, C4<0>, C4<0>; +L_0x195d5f0 .functor NOT 1, L_0x195d3e0, C4<0>, C4<0>, C4<0>; +L_0x195d6e0 .functor AND 1, L_0x195d5f0, L_0x195d540, C4<1>, C4<1>; +L_0x195d7e0 .functor AND 1, L_0x195db70, L_0x195dc10, C4<1>, C4<1>; +L_0x195d9c0 .functor AND 1, L_0x195d7e0, L_0x195b600, C4<1>, C4<1>; +L_0x195da20 .functor OR 1, L_0x195d6e0, L_0x195d9c0, C4<0>, C4<0>; +v0x18fd660_0 .net "a", 0 0, L_0x195db70; 1 drivers +v0x18fd720_0 .net "ab", 0 0, L_0x1959010; 1 drivers +v0x18fd7c0_0 .net "acarryin", 0 0, L_0x1959070; 1 drivers +v0x18fd860_0 .net "andall", 0 0, L_0x195d9c0; 1 drivers +v0x18fd8e0_0 .net "andsingleintermediate", 0 0, L_0x195d7e0; 1 drivers +v0x18fd980_0 .net "andsumintermediate", 0 0, L_0x195d6e0; 1 drivers +v0x18fda20_0 .net "b", 0 0, L_0x195dc10; 1 drivers +v0x18fdac0_0 .net "bcarryin", 0 0, L_0x1959120; 1 drivers +v0x18fdb60_0 .alias "carryin", 0 0, v0x191b980_0; +v0x18fdc00_0 .alias "carryout", 0 0, v0x18fea60_0; +v0x18fdc80_0 .net "invcarryout", 0 0, L_0x195d5f0; 1 drivers +v0x18fdd00_0 .net "orall", 0 0, L_0x195d540; 1 drivers +v0x18fdda0_0 .net "orpairintermediate", 0 0, L_0x191ba00; 1 drivers +v0x18fde40_0 .net "orsingleintermediate", 0 0, L_0x195d4e0; 1 drivers +v0x18fdf60_0 .net "sum", 0 0, L_0x195da20; 1 drivers +S_0x18fcae0 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x18fb410; + .timescale 0 0; +L_0x195d960 .functor AND 1, L_0x195e810, L_0x195e900, C4<1>, C4<1>; +L_0x195dcb0 .functor AND 1, L_0x195e810, L_0x195d3e0, C4<1>, C4<1>; +L_0x195dd60 .functor AND 1, L_0x195e900, L_0x195d3e0, C4<1>, C4<1>; +L_0x195de10 .functor OR 1, L_0x195d960, L_0x195dcb0, C4<0>, C4<0>; +L_0x195df10 .functor OR 1, L_0x195de10, L_0x195dd60, C4<0>, C4<0>; +L_0x195e010 .functor OR 1, L_0x195e810, L_0x195e900, C4<0>, C4<0>; +L_0x195e070 .functor OR 1, L_0x195e010, L_0x195d3e0, C4<0>, C4<0>; +L_0x195e120 .functor NOT 1, L_0x195df10, C4<0>, C4<0>, C4<0>; +L_0x195e210 .functor AND 1, L_0x195e120, L_0x195e070, C4<1>, C4<1>; +L_0x195e310 .functor AND 1, L_0x195e810, L_0x195e900, C4<1>, C4<1>; +L_0x195e4f0 .functor AND 1, L_0x195e310, L_0x195d3e0, C4<1>, C4<1>; +L_0x195d650 .functor OR 1, L_0x195e210, L_0x195e4f0, C4<0>, C4<0>; +v0x18fcbd0_0 .net "a", 0 0, L_0x195e810; 1 drivers +v0x18fcc90_0 .net "ab", 0 0, L_0x195d960; 1 drivers +v0x18fcd30_0 .net "acarryin", 0 0, L_0x195dcb0; 1 drivers +v0x18fcdd0_0 .net "andall", 0 0, L_0x195e4f0; 1 drivers +v0x18fce50_0 .net "andsingleintermediate", 0 0, L_0x195e310; 1 drivers +v0x18fcef0_0 .net "andsumintermediate", 0 0, L_0x195e210; 1 drivers +v0x18fcf90_0 .net "b", 0 0, L_0x195e900; 1 drivers +v0x18fd030_0 .net "bcarryin", 0 0, L_0x195dd60; 1 drivers +v0x18fd0d0_0 .alias "carryin", 0 0, v0x18fea60_0; +v0x18fd170_0 .alias "carryout", 0 0, v0x18fec30_0; +v0x18fd1f0_0 .net "invcarryout", 0 0, L_0x195e120; 1 drivers +v0x18fd270_0 .net "orall", 0 0, L_0x195e070; 1 drivers +v0x18fd310_0 .net "orpairintermediate", 0 0, L_0x195de10; 1 drivers +v0x18fd3b0_0 .net "orsingleintermediate", 0 0, L_0x195e010; 1 drivers +v0x18fd4d0_0 .net "sum", 0 0, L_0x195d650; 1 drivers +S_0x18fc000 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x18fb410; + .timescale 0 0; +L_0x195e490 .functor AND 1, L_0x195f500, L_0x195f5f0, C4<1>, C4<1>; +L_0x195e9f0 .functor AND 1, L_0x195f500, L_0x195df10, C4<1>, C4<1>; +L_0x195eaa0 .functor AND 1, L_0x195f5f0, L_0x195df10, C4<1>, C4<1>; +L_0x195eb50 .functor OR 1, L_0x195e490, L_0x195e9f0, C4<0>, C4<0>; +L_0x195ec50 .functor OR 1, L_0x195eb50, L_0x195eaa0, C4<0>, C4<0>; +L_0x195ed50 .functor OR 1, L_0x195f500, L_0x195f5f0, C4<0>, C4<0>; +L_0x195edb0 .functor OR 1, L_0x195ed50, L_0x195df10, C4<0>, C4<0>; +L_0x195ee60 .functor NOT 1, L_0x195ec50, C4<0>, C4<0>, C4<0>; +L_0x195ef50 .functor AND 1, L_0x195ee60, L_0x195edb0, C4<1>, C4<1>; +L_0x195f050 .functor AND 1, L_0x195f500, L_0x195f5f0, C4<1>, C4<1>; +L_0x195f230 .functor AND 1, L_0x195f050, L_0x195df10, C4<1>, C4<1>; +L_0x195e180 .functor OR 1, L_0x195ef50, L_0x195f230, C4<0>, C4<0>; +v0x18fc0f0_0 .net "a", 0 0, L_0x195f500; 1 drivers +v0x18fc1b0_0 .net "ab", 0 0, L_0x195e490; 1 drivers +v0x18fc250_0 .net "acarryin", 0 0, L_0x195e9f0; 1 drivers +v0x18fc2f0_0 .net "andall", 0 0, L_0x195f230; 1 drivers +v0x18fc370_0 .net "andsingleintermediate", 0 0, L_0x195f050; 1 drivers +v0x18fc410_0 .net "andsumintermediate", 0 0, L_0x195ef50; 1 drivers +v0x18fc4b0_0 .net "b", 0 0, L_0x195f5f0; 1 drivers +v0x18fc550_0 .net "bcarryin", 0 0, L_0x195eaa0; 1 drivers +v0x18fc640_0 .alias "carryin", 0 0, v0x18fec30_0; +v0x18fc6e0_0 .alias "carryout", 0 0, v0x18fed60_0; +v0x18fc760_0 .net "invcarryout", 0 0, L_0x195ee60; 1 drivers +v0x18fc7e0_0 .net "orall", 0 0, L_0x195edb0; 1 drivers +v0x18fc880_0 .net "orpairintermediate", 0 0, L_0x195eb50; 1 drivers +v0x18fc920_0 .net "orsingleintermediate", 0 0, L_0x195ed50; 1 drivers +v0x18fca40_0 .net "sum", 0 0, L_0x195e180; 1 drivers +S_0x18fb500 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x18fb410; + .timescale 0 0; +L_0x195f1d0 .functor AND 1, L_0x19601a0, L_0x19602d0, C4<1>, C4<1>; +L_0x195f690 .functor AND 1, L_0x19601a0, L_0x195ec50, C4<1>, C4<1>; +L_0x195f740 .functor AND 1, L_0x19602d0, L_0x195ec50, C4<1>, C4<1>; +L_0x195f7f0 .functor OR 1, L_0x195f1d0, L_0x195f690, C4<0>, C4<0>; +L_0x195f8f0 .functor OR 1, L_0x195f7f0, L_0x195f740, C4<0>, C4<0>; +L_0x195f9f0 .functor OR 1, L_0x19601a0, L_0x19602d0, C4<0>, C4<0>; +L_0x195fa50 .functor OR 1, L_0x195f9f0, L_0x195ec50, C4<0>, C4<0>; +L_0x195fb00 .functor NOT 1, L_0x195f8f0, C4<0>, C4<0>, C4<0>; +L_0x195fbb0 .functor AND 1, L_0x195fb00, L_0x195fa50, C4<1>, C4<1>; +L_0x195fcb0 .functor AND 1, L_0x19601a0, L_0x19602d0, C4<1>, C4<1>; +L_0x195fe90 .functor AND 1, L_0x195fcb0, L_0x195ec50, C4<1>, C4<1>; +L_0x195eec0 .functor OR 1, L_0x195fbb0, L_0x195fe90, C4<0>, C4<0>; +v0x18fb5f0_0 .net "a", 0 0, L_0x19601a0; 1 drivers +v0x18fb6b0_0 .net "ab", 0 0, L_0x195f1d0; 1 drivers +v0x18fb750_0 .net "acarryin", 0 0, L_0x195f690; 1 drivers +v0x18fb7f0_0 .net "andall", 0 0, L_0x195fe90; 1 drivers +v0x18fb870_0 .net "andsingleintermediate", 0 0, L_0x195fcb0; 1 drivers +v0x18fb910_0 .net "andsumintermediate", 0 0, L_0x195fbb0; 1 drivers +v0x18fb9b0_0 .net "b", 0 0, L_0x19602d0; 1 drivers +v0x18fba50_0 .net "bcarryin", 0 0, L_0x195f740; 1 drivers +v0x18fbb40_0 .alias "carryin", 0 0, v0x18fed60_0; +v0x18fbbe0_0 .alias "carryout", 0 0, v0x191ba90_0; +v0x18fbc60_0 .net "invcarryout", 0 0, L_0x195fb00; 1 drivers +v0x18fbd00_0 .net "orall", 0 0, L_0x195fa50; 1 drivers +v0x18fbda0_0 .net "orpairintermediate", 0 0, L_0x195f7f0; 1 drivers +v0x18fbe40_0 .net "orsingleintermediate", 0 0, L_0x195f9f0; 1 drivers +v0x18fbf60_0 .net "sum", 0 0, L_0x195eec0; 1 drivers +S_0x18f7940 .scope module, "adder6" "FullAdder4bit" 20 243, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x1964150 .functor AND 1, L_0x1964790, L_0x1964830, C4<1>, C4<1>; +L_0x19648d0 .functor NOR 1, L_0x1964930, L_0x19649d0, C4<0>, C4<0>; +L_0x1964b50 .functor AND 1, L_0x1964bb0, L_0x1964ca0, C4<1>, C4<1>; +L_0x1964ac0 .functor NOR 1, L_0x1964e30, L_0x1965030, C4<0>, C4<0>; +L_0x1964d90 .functor OR 1, L_0x1964150, L_0x19648d0, C4<0>, C4<0>; +L_0x1965220 .functor NOR 1, L_0x1964b50, L_0x1964ac0, C4<0>, C4<0>; +L_0x1965320 .functor AND 1, L_0x1964d90, L_0x1965220, C4<1>, C4<1>; +v0x18fa4f0_0 .net *"_s25", 0 0, L_0x1964790; 1 drivers +v0x18fa5b0_0 .net *"_s27", 0 0, L_0x1964830; 1 drivers +v0x18fa650_0 .net *"_s29", 0 0, L_0x1964930; 1 drivers +v0x18fa6f0_0 .net *"_s31", 0 0, L_0x19649d0; 1 drivers +v0x18fa770_0 .net *"_s33", 0 0, L_0x1964bb0; 1 drivers +v0x18fa810_0 .net *"_s35", 0 0, L_0x1964ca0; 1 drivers +v0x18fa8b0_0 .net *"_s37", 0 0, L_0x1964e30; 1 drivers +v0x18fa950_0 .net *"_s39", 0 0, L_0x1965030; 1 drivers +v0x18fa9f0_0 .net "a", 3 0, L_0x1965620; 1 drivers +v0x18faa90_0 .net "aandb", 0 0, L_0x1964150; 1 drivers +v0x18fab30_0 .net "abandnoror", 0 0, L_0x1964d90; 1 drivers +v0x18fabd0_0 .net "anorb", 0 0, L_0x19648d0; 1 drivers +v0x18fac70_0 .net "b", 3 0, L_0x19611f0; 1 drivers +v0x18fad10_0 .net "bandsum", 0 0, L_0x1964b50; 1 drivers +v0x18fae30_0 .net "bnorsum", 0 0, L_0x1964ac0; 1 drivers +v0x18faed0_0 .net "bsumandnornor", 0 0, L_0x1965220; 1 drivers +v0x18fad90_0 .alias "carryin", 0 0, v0x191ba90_0; +v0x18fb000_0 .alias "carryout", 0 0, v0x191b700_0; +v0x18faf50_0 .net "carryout1", 0 0, L_0x1961700; 1 drivers +v0x18fb120_0 .net "carryout2", 0 0, L_0x1962230; 1 drivers +v0x18fb250_0 .net "carryout3", 0 0, L_0x1962f70; 1 drivers +v0x18fb2d0_0 .alias "overflow", 0 0, v0x1918770_0; +v0x18fb1a0_0 .net8 "sum", 3 0, RS_0x7f69333dc968; 4 drivers +L_0x1961da0 .part/pv L_0x1961d40, 0, 1, 4; +L_0x1961e90 .part L_0x1965620, 0, 1; +L_0x1961f30 .part L_0x19611f0, 0, 1; +L_0x19629f0 .part/pv L_0x1961970, 1, 1, 4; +L_0x1962b30 .part L_0x1965620, 1, 1; +L_0x1962c20 .part L_0x19611f0, 1, 1; +L_0x1963730 .part/pv L_0x19624a0, 2, 1, 4; +L_0x1963820 .part L_0x1965620, 2, 1; +L_0x1963910 .part L_0x19611f0, 2, 1; +L_0x1964390 .part/pv L_0x19631e0, 3, 1, 4; +L_0x19644c0 .part L_0x1965620, 3, 1; +L_0x19645f0 .part L_0x19611f0, 3, 1; +L_0x1964790 .part L_0x1965620, 3, 1; +L_0x1964830 .part L_0x19611f0, 3, 1; +L_0x1964930 .part L_0x1965620, 3, 1; +L_0x19649d0 .part L_0x19611f0, 3, 1; +L_0x1964bb0 .part L_0x19611f0, 3, 1; +L_0x1964ca0 .part RS_0x7f69333dc968, 3, 1; +L_0x1964e30 .part L_0x19611f0, 3, 1; +L_0x1965030 .part RS_0x7f69333dc968, 3, 1; +S_0x18f9a60 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x18f7940; + .timescale 0 0; +L_0x195d0e0 .functor AND 1, L_0x1961e90, L_0x1961f30, C4<1>, C4<1>; +L_0x195d140 .functor AND 1, L_0x1961e90, L_0x195f8f0, C4<1>, C4<1>; +L_0x19614a0 .functor AND 1, L_0x1961f30, L_0x195f8f0, C4<1>, C4<1>; +L_0x191b670 .functor OR 1, L_0x195d0e0, L_0x195d140, C4<0>, C4<0>; +L_0x1961700 .functor OR 1, L_0x191b670, L_0x19614a0, C4<0>, C4<0>; +L_0x1961800 .functor OR 1, L_0x1961e90, L_0x1961f30, C4<0>, C4<0>; +L_0x1961860 .functor OR 1, L_0x1961800, L_0x195f8f0, C4<0>, C4<0>; +L_0x1961910 .functor NOT 1, L_0x1961700, C4<0>, C4<0>, C4<0>; +L_0x1961a00 .functor AND 1, L_0x1961910, L_0x1961860, C4<1>, C4<1>; +L_0x1961b00 .functor AND 1, L_0x1961e90, L_0x1961f30, C4<1>, C4<1>; +L_0x1961ce0 .functor AND 1, L_0x1961b00, L_0x195f8f0, C4<1>, C4<1>; +L_0x1961d40 .functor OR 1, L_0x1961a00, L_0x1961ce0, C4<0>, C4<0>; +v0x18f9b50_0 .net "a", 0 0, L_0x1961e90; 1 drivers +v0x18f9c10_0 .net "ab", 0 0, L_0x195d0e0; 1 drivers +v0x18f9cb0_0 .net "acarryin", 0 0, L_0x195d140; 1 drivers +v0x18f9d50_0 .net "andall", 0 0, L_0x1961ce0; 1 drivers +v0x18f9dd0_0 .net "andsingleintermediate", 0 0, L_0x1961b00; 1 drivers +v0x18f9e70_0 .net "andsumintermediate", 0 0, L_0x1961a00; 1 drivers +v0x18f9f10_0 .net "b", 0 0, L_0x1961f30; 1 drivers +v0x18f9fb0_0 .net "bcarryin", 0 0, L_0x19614a0; 1 drivers +v0x18fa050_0 .alias "carryin", 0 0, v0x191ba90_0; +v0x18fa0f0_0 .alias "carryout", 0 0, v0x18faf50_0; +v0x18fa170_0 .net "invcarryout", 0 0, L_0x1961910; 1 drivers +v0x18fa1f0_0 .net "orall", 0 0, L_0x1961860; 1 drivers +v0x18fa290_0 .net "orpairintermediate", 0 0, L_0x191b670; 1 drivers +v0x18fa330_0 .net "orsingleintermediate", 0 0, L_0x1961800; 1 drivers +v0x18fa450_0 .net "sum", 0 0, L_0x1961d40; 1 drivers +S_0x18f8fd0 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x18f7940; + .timescale 0 0; +L_0x1961c80 .functor AND 1, L_0x1962b30, L_0x1962c20, C4<1>, C4<1>; +L_0x1961fd0 .functor AND 1, L_0x1962b30, L_0x1961700, C4<1>, C4<1>; +L_0x1962080 .functor AND 1, L_0x1962c20, L_0x1961700, C4<1>, C4<1>; +L_0x1962130 .functor OR 1, L_0x1961c80, L_0x1961fd0, C4<0>, C4<0>; +L_0x1962230 .functor OR 1, L_0x1962130, L_0x1962080, C4<0>, C4<0>; +L_0x1962330 .functor OR 1, L_0x1962b30, L_0x1962c20, C4<0>, C4<0>; +L_0x1962390 .functor OR 1, L_0x1962330, L_0x1961700, C4<0>, C4<0>; +L_0x1962440 .functor NOT 1, L_0x1962230, C4<0>, C4<0>, C4<0>; +L_0x1962530 .functor AND 1, L_0x1962440, L_0x1962390, C4<1>, C4<1>; +L_0x1962630 .functor AND 1, L_0x1962b30, L_0x1962c20, C4<1>, C4<1>; +L_0x1962810 .functor AND 1, L_0x1962630, L_0x1961700, C4<1>, C4<1>; +L_0x1961970 .functor OR 1, L_0x1962530, L_0x1962810, C4<0>, C4<0>; +v0x18f90c0_0 .net "a", 0 0, L_0x1962b30; 1 drivers +v0x18f9180_0 .net "ab", 0 0, L_0x1961c80; 1 drivers +v0x18f9220_0 .net "acarryin", 0 0, L_0x1961fd0; 1 drivers +v0x18f92c0_0 .net "andall", 0 0, L_0x1962810; 1 drivers +v0x18f9340_0 .net "andsingleintermediate", 0 0, L_0x1962630; 1 drivers +v0x18f93e0_0 .net "andsumintermediate", 0 0, L_0x1962530; 1 drivers +v0x18f9480_0 .net "b", 0 0, L_0x1962c20; 1 drivers +v0x18f9520_0 .net "bcarryin", 0 0, L_0x1962080; 1 drivers +v0x18f95c0_0 .alias "carryin", 0 0, v0x18faf50_0; +v0x18f9660_0 .alias "carryout", 0 0, v0x18fb120_0; +v0x18f96e0_0 .net "invcarryout", 0 0, L_0x1962440; 1 drivers +v0x18f9760_0 .net "orall", 0 0, L_0x1962390; 1 drivers +v0x18f9800_0 .net "orpairintermediate", 0 0, L_0x1962130; 1 drivers +v0x18f98a0_0 .net "orsingleintermediate", 0 0, L_0x1962330; 1 drivers +v0x18f99c0_0 .net "sum", 0 0, L_0x1961970; 1 drivers +S_0x18f84f0 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x18f7940; + .timescale 0 0; +L_0x19627b0 .functor AND 1, L_0x1963820, L_0x1963910, C4<1>, C4<1>; +L_0x1962d10 .functor AND 1, L_0x1963820, L_0x1962230, C4<1>, C4<1>; +L_0x1962dc0 .functor AND 1, L_0x1963910, L_0x1962230, C4<1>, C4<1>; +L_0x1962e70 .functor OR 1, L_0x19627b0, L_0x1962d10, C4<0>, C4<0>; +L_0x1962f70 .functor OR 1, L_0x1962e70, L_0x1962dc0, C4<0>, C4<0>; +L_0x1963070 .functor OR 1, L_0x1963820, L_0x1963910, C4<0>, C4<0>; +L_0x19630d0 .functor OR 1, L_0x1963070, L_0x1962230, C4<0>, C4<0>; +L_0x1963180 .functor NOT 1, L_0x1962f70, C4<0>, C4<0>, C4<0>; +L_0x1963270 .functor AND 1, L_0x1963180, L_0x19630d0, C4<1>, C4<1>; +L_0x1963370 .functor AND 1, L_0x1963820, L_0x1963910, C4<1>, C4<1>; +L_0x1963550 .functor AND 1, L_0x1963370, L_0x1962230, C4<1>, C4<1>; +L_0x19624a0 .functor OR 1, L_0x1963270, L_0x1963550, C4<0>, C4<0>; +v0x18f85e0_0 .net "a", 0 0, L_0x1963820; 1 drivers +v0x18f86a0_0 .net "ab", 0 0, L_0x19627b0; 1 drivers +v0x18f8740_0 .net "acarryin", 0 0, L_0x1962d10; 1 drivers +v0x18f87e0_0 .net "andall", 0 0, L_0x1963550; 1 drivers +v0x18f8860_0 .net "andsingleintermediate", 0 0, L_0x1963370; 1 drivers +v0x18f8900_0 .net "andsumintermediate", 0 0, L_0x1963270; 1 drivers +v0x18f89a0_0 .net "b", 0 0, L_0x1963910; 1 drivers +v0x18f8a40_0 .net "bcarryin", 0 0, L_0x1962dc0; 1 drivers +v0x18f8b30_0 .alias "carryin", 0 0, v0x18fb120_0; +v0x18f8bd0_0 .alias "carryout", 0 0, v0x18fb250_0; +v0x18f8c50_0 .net "invcarryout", 0 0, L_0x1963180; 1 drivers +v0x18f8cd0_0 .net "orall", 0 0, L_0x19630d0; 1 drivers +v0x18f8d70_0 .net "orpairintermediate", 0 0, L_0x1962e70; 1 drivers +v0x18f8e10_0 .net "orsingleintermediate", 0 0, L_0x1963070; 1 drivers +v0x18f8f30_0 .net "sum", 0 0, L_0x19624a0; 1 drivers +S_0x18f7a30 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x18f7940; + .timescale 0 0; +L_0x19634f0 .functor AND 1, L_0x19644c0, L_0x19645f0, C4<1>, C4<1>; +L_0x19639b0 .functor AND 1, L_0x19644c0, L_0x1962f70, C4<1>, C4<1>; +L_0x1963a60 .functor AND 1, L_0x19645f0, L_0x1962f70, C4<1>, C4<1>; +L_0x1963b10 .functor OR 1, L_0x19634f0, L_0x19639b0, C4<0>, C4<0>; +L_0x1963c10 .functor OR 1, L_0x1963b10, L_0x1963a60, C4<0>, C4<0>; +L_0x1963d10 .functor OR 1, L_0x19644c0, L_0x19645f0, C4<0>, C4<0>; +L_0x1963d70 .functor OR 1, L_0x1963d10, L_0x1962f70, C4<0>, C4<0>; +L_0x1963e20 .functor NOT 1, L_0x1963c10, C4<0>, C4<0>, C4<0>; +L_0x1963ed0 .functor AND 1, L_0x1963e20, L_0x1963d70, C4<1>, C4<1>; +L_0x1963fd0 .functor AND 1, L_0x19644c0, L_0x19645f0, C4<1>, C4<1>; +L_0x19641b0 .functor AND 1, L_0x1963fd0, L_0x1962f70, C4<1>, C4<1>; +L_0x19631e0 .functor OR 1, L_0x1963ed0, L_0x19641b0, C4<0>, C4<0>; +v0x18f7b20_0 .net "a", 0 0, L_0x19644c0; 1 drivers +v0x18f7ba0_0 .net "ab", 0 0, L_0x19634f0; 1 drivers +v0x18f7c40_0 .net "acarryin", 0 0, L_0x19639b0; 1 drivers +v0x18f7ce0_0 .net "andall", 0 0, L_0x19641b0; 1 drivers +v0x18f7d60_0 .net "andsingleintermediate", 0 0, L_0x1963fd0; 1 drivers +v0x18f7e00_0 .net "andsumintermediate", 0 0, L_0x1963ed0; 1 drivers +v0x18f7ea0_0 .net "b", 0 0, L_0x19645f0; 1 drivers +v0x18f7f40_0 .net "bcarryin", 0 0, L_0x1963a60; 1 drivers +v0x18f8030_0 .alias "carryin", 0 0, v0x18fb250_0; +v0x18f80d0_0 .alias "carryout", 0 0, v0x191b700_0; +v0x18f8150_0 .net "invcarryout", 0 0, L_0x1963e20; 1 drivers +v0x18f81f0_0 .net "orall", 0 0, L_0x1963d70; 1 drivers +v0x18f8290_0 .net "orpairintermediate", 0 0, L_0x1963b10; 1 drivers +v0x18f8330_0 .net "orsingleintermediate", 0 0, L_0x1963d10; 1 drivers +v0x18f8450_0 .net "sum", 0 0, L_0x19631e0; 1 drivers +S_0x18f42c0 .scope module, "adder7" "FullAdder4bit" 20 244, 3 47, S_0x18f3d40; + .timescale 0 0; +L_0x1968510 .functor AND 1, L_0x1968b50, L_0x1968bf0, C4<1>, C4<1>; +L_0x1968c90 .functor NOR 1, L_0x1968cf0, L_0x1968d90, C4<0>, C4<0>; +L_0x1968f10 .functor AND 1, L_0x1968f70, L_0x1969060, C4<1>, C4<1>; +L_0x1968e80 .functor NOR 1, L_0x19691f0, L_0x19693f0, C4<0>, C4<0>; +L_0x1969150 .functor OR 1, L_0x1968510, L_0x1968c90, C4<0>, C4<0>; +L_0x19695e0 .functor NOR 1, L_0x1968f10, L_0x1968e80, C4<0>, C4<0>; +L_0x19696e0 .functor AND 1, L_0x1969150, L_0x19695e0, C4<1>, C4<1>; +v0x18f69a0_0 .net *"_s25", 0 0, L_0x1968b50; 1 drivers +v0x18f6a60_0 .net *"_s27", 0 0, L_0x1968bf0; 1 drivers +v0x18f6b00_0 .net *"_s29", 0 0, L_0x1968cf0; 1 drivers +v0x18f6ba0_0 .net *"_s31", 0 0, L_0x1968d90; 1 drivers +v0x18f6c50_0 .net *"_s33", 0 0, L_0x1968f70; 1 drivers +v0x18f6cf0_0 .net *"_s35", 0 0, L_0x1969060; 1 drivers +v0x18f6d90_0 .net *"_s37", 0 0, L_0x19691f0; 1 drivers +v0x18f6e30_0 .net *"_s39", 0 0, L_0x19693f0; 1 drivers +v0x18f6ed0_0 .net "a", 3 0, L_0x19656c0; 1 drivers +v0x18f6f70_0 .net "aandb", 0 0, L_0x1968510; 1 drivers +v0x18f7010_0 .net "abandnoror", 0 0, L_0x1969150; 1 drivers +v0x18f70b0_0 .net "anorb", 0 0, L_0x1968c90; 1 drivers +v0x18f7150_0 .net "b", 3 0, L_0x1965760; 1 drivers +v0x18f71f0_0 .net "bandsum", 0 0, L_0x1968f10; 1 drivers +v0x18f7310_0 .net "bnorsum", 0 0, L_0x1968e80; 1 drivers +v0x18f73b0_0 .net "bsumandnornor", 0 0, L_0x19695e0; 1 drivers +v0x18f7270_0 .alias "carryin", 0 0, v0x191b700_0; +v0x18f74e0_0 .alias "carryout", 0 0, v0x191c170_0; +v0x18f7600_0 .net "carryout1", 0 0, L_0x1965a90; 1 drivers +v0x18f7680_0 .net "carryout2", 0 0, L_0x19665c0; 1 drivers +v0x18f7560_0 .net "carryout3", 0 0, L_0x19672f0; 1 drivers +v0x18f7800_0 .alias "overflow", 0 0, v0x191c1f0_0; +v0x18f7700_0 .net8 "sum", 3 0, RS_0x7f69333dbb88; 4 drivers +L_0x1966130 .part/pv L_0x19660d0, 0, 1, 4; +L_0x1966220 .part L_0x19656c0, 0, 1; +L_0x19662c0 .part L_0x1965760, 0, 1; +L_0x1966d70 .part/pv L_0x1965d00, 1, 1, 4; +L_0x1966eb0 .part L_0x19656c0, 1, 1; +L_0x1966fa0 .part L_0x1965760, 1, 1; +L_0x1967ab0 .part/pv L_0x1966830, 2, 1, 4; +L_0x1967ba0 .part L_0x19656c0, 2, 1; +L_0x1967c90 .part L_0x1965760, 2, 1; +L_0x1968750 .part/pv L_0x1967560, 3, 1, 4; +L_0x1968880 .part L_0x19656c0, 3, 1; +L_0x19689b0 .part L_0x1965760, 3, 1; +L_0x1968b50 .part L_0x19656c0, 3, 1; +L_0x1968bf0 .part L_0x1965760, 3, 1; +L_0x1968cf0 .part L_0x19656c0, 3, 1; +L_0x1968d90 .part L_0x1965760, 3, 1; +L_0x1968f70 .part L_0x1965760, 3, 1; +L_0x1969060 .part RS_0x7f69333dbb88, 3, 1; +L_0x19691f0 .part L_0x1965760, 3, 1; +L_0x19693f0 .part RS_0x7f69333dbb88, 3, 1; +S_0x18f5ee0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x18f42c0; + .timescale 0 0; +L_0x1961290 .functor AND 1, L_0x1966220, L_0x19662c0, C4<1>, C4<1>; +L_0x19612f0 .functor AND 1, L_0x1966220, L_0x1963c10, C4<1>, C4<1>; +L_0x19613a0 .functor AND 1, L_0x19662c0, L_0x1963c10, C4<1>, C4<1>; +L_0x1954840 .functor OR 1, L_0x1961290, L_0x19612f0, C4<0>, C4<0>; +L_0x1965a90 .functor OR 1, L_0x1954840, L_0x19613a0, C4<0>, C4<0>; +L_0x1965b90 .functor OR 1, L_0x1966220, L_0x19662c0, C4<0>, C4<0>; +L_0x1965bf0 .functor OR 1, L_0x1965b90, L_0x1963c10, C4<0>, C4<0>; +L_0x1965ca0 .functor NOT 1, L_0x1965a90, C4<0>, C4<0>, C4<0>; +L_0x1965d90 .functor AND 1, L_0x1965ca0, L_0x1965bf0, C4<1>, C4<1>; +L_0x1965e90 .functor AND 1, L_0x1966220, L_0x19662c0, C4<1>, C4<1>; +L_0x1966070 .functor AND 1, L_0x1965e90, L_0x1963c10, C4<1>, C4<1>; +L_0x19660d0 .functor OR 1, L_0x1965d90, L_0x1966070, C4<0>, C4<0>; +v0x18f5fd0_0 .net "a", 0 0, L_0x1966220; 1 drivers +v0x18f6090_0 .net "ab", 0 0, L_0x1961290; 1 drivers +v0x18f6130_0 .net "acarryin", 0 0, L_0x19612f0; 1 drivers +v0x18f61d0_0 .net "andall", 0 0, L_0x1966070; 1 drivers +v0x18f6280_0 .net "andsingleintermediate", 0 0, L_0x1965e90; 1 drivers +v0x18f6320_0 .net "andsumintermediate", 0 0, L_0x1965d90; 1 drivers +v0x18f63c0_0 .net "b", 0 0, L_0x19662c0; 1 drivers +v0x18f6460_0 .net "bcarryin", 0 0, L_0x19613a0; 1 drivers +v0x18f6500_0 .alias "carryin", 0 0, v0x191b700_0; +v0x18f65a0_0 .alias "carryout", 0 0, v0x18f7600_0; +v0x18f6620_0 .net "invcarryout", 0 0, L_0x1965ca0; 1 drivers +v0x18f66a0_0 .net "orall", 0 0, L_0x1965bf0; 1 drivers +v0x18f6740_0 .net "orpairintermediate", 0 0, L_0x1954840; 1 drivers +v0x18f67e0_0 .net "orsingleintermediate", 0 0, L_0x1965b90; 1 drivers +v0x18f6900_0 .net "sum", 0 0, L_0x19660d0; 1 drivers +S_0x18f5590 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x18f42c0; + .timescale 0 0; +L_0x1966010 .functor AND 1, L_0x1966eb0, L_0x1966fa0, C4<1>, C4<1>; +L_0x1966360 .functor AND 1, L_0x1966eb0, L_0x1965a90, C4<1>, C4<1>; +L_0x1966410 .functor AND 1, L_0x1966fa0, L_0x1965a90, C4<1>, C4<1>; +L_0x19664c0 .functor OR 1, L_0x1966010, L_0x1966360, C4<0>, C4<0>; +L_0x19665c0 .functor OR 1, L_0x19664c0, L_0x1966410, C4<0>, C4<0>; +L_0x19666c0 .functor OR 1, L_0x1966eb0, L_0x1966fa0, C4<0>, C4<0>; +L_0x1966720 .functor OR 1, L_0x19666c0, L_0x1965a90, C4<0>, C4<0>; +L_0x19667d0 .functor NOT 1, L_0x19665c0, C4<0>, C4<0>, C4<0>; +L_0x18f7460 .functor AND 1, L_0x19667d0, L_0x1966720, C4<1>, C4<1>; +L_0x19669b0 .functor AND 1, L_0x1966eb0, L_0x1966fa0, C4<1>, C4<1>; +L_0x1966b90 .functor AND 1, L_0x19669b0, L_0x1965a90, C4<1>, C4<1>; +L_0x1965d00 .functor OR 1, L_0x18f7460, L_0x1966b90, C4<0>, C4<0>; +v0x18f5680_0 .net "a", 0 0, L_0x1966eb0; 1 drivers +v0x18f5700_0 .net "ab", 0 0, L_0x1966010; 1 drivers +v0x18f5780_0 .net "acarryin", 0 0, L_0x1966360; 1 drivers +v0x18f5800_0 .net "andall", 0 0, L_0x1966b90; 1 drivers +v0x18f5880_0 .net "andsingleintermediate", 0 0, L_0x19669b0; 1 drivers +v0x18f5900_0 .net "andsumintermediate", 0 0, L_0x18f7460; 1 drivers +v0x18f5980_0 .net "b", 0 0, L_0x1966fa0; 1 drivers +v0x18f5a00_0 .net "bcarryin", 0 0, L_0x1966410; 1 drivers +v0x18f5a80_0 .alias "carryin", 0 0, v0x18f7600_0; +v0x18f5b00_0 .alias "carryout", 0 0, v0x18f7680_0; +v0x18f5b80_0 .net "invcarryout", 0 0, L_0x19667d0; 1 drivers +v0x18f5c00_0 .net "orall", 0 0, L_0x1966720; 1 drivers +v0x18f5c80_0 .net "orpairintermediate", 0 0, L_0x19664c0; 1 drivers +v0x18f5d20_0 .net "orsingleintermediate", 0 0, L_0x19666c0; 1 drivers +v0x18f5e40_0 .net "sum", 0 0, L_0x1965d00; 1 drivers +S_0x18f4ca0 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x18f42c0; + .timescale 0 0; +L_0x1966b30 .functor AND 1, L_0x1967ba0, L_0x1967c90, C4<1>, C4<1>; +L_0x1967090 .functor AND 1, L_0x1967ba0, L_0x19665c0, C4<1>, C4<1>; +L_0x1967140 .functor AND 1, L_0x1967c90, L_0x19665c0, C4<1>, C4<1>; +L_0x19671f0 .functor OR 1, L_0x1966b30, L_0x1967090, C4<0>, C4<0>; +L_0x19672f0 .functor OR 1, L_0x19671f0, L_0x1967140, C4<0>, C4<0>; +L_0x19673f0 .functor OR 1, L_0x1967ba0, L_0x1967c90, C4<0>, C4<0>; +L_0x1967450 .functor OR 1, L_0x19673f0, L_0x19665c0, C4<0>, C4<0>; +L_0x1967500 .functor NOT 1, L_0x19672f0, C4<0>, C4<0>, C4<0>; +L_0x19675f0 .functor AND 1, L_0x1967500, L_0x1967450, C4<1>, C4<1>; +L_0x19676f0 .functor AND 1, L_0x1967ba0, L_0x1967c90, C4<1>, C4<1>; +L_0x19678d0 .functor AND 1, L_0x19676f0, L_0x19665c0, C4<1>, C4<1>; +L_0x1966830 .functor OR 1, L_0x19675f0, L_0x19678d0, C4<0>, C4<0>; +v0x18f4d90_0 .net "a", 0 0, L_0x1967ba0; 1 drivers +v0x18f4e10_0 .net "ab", 0 0, L_0x1966b30; 1 drivers +v0x18f4e90_0 .net "acarryin", 0 0, L_0x1967090; 1 drivers +v0x18f4f10_0 .net "andall", 0 0, L_0x19678d0; 1 drivers +v0x18f4f90_0 .net "andsingleintermediate", 0 0, L_0x19676f0; 1 drivers +v0x18f5010_0 .net "andsumintermediate", 0 0, L_0x19675f0; 1 drivers +v0x18f5090_0 .net "b", 0 0, L_0x1967c90; 1 drivers +v0x18f5110_0 .net "bcarryin", 0 0, L_0x1967140; 1 drivers +v0x18f5190_0 .alias "carryin", 0 0, v0x18f7680_0; +v0x18f5210_0 .alias "carryout", 0 0, v0x18f7560_0; +v0x18f5290_0 .net "invcarryout", 0 0, L_0x1967500; 1 drivers +v0x18f5310_0 .net "orall", 0 0, L_0x1967450; 1 drivers +v0x18f5390_0 .net "orpairintermediate", 0 0, L_0x19671f0; 1 drivers +v0x18f5410_0 .net "orsingleintermediate", 0 0, L_0x19673f0; 1 drivers +v0x18f5510_0 .net "sum", 0 0, L_0x1966830; 1 drivers +S_0x18f43b0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x18f42c0; + .timescale 0 0; +L_0x1967870 .functor AND 1, L_0x1968880, L_0x19689b0, C4<1>, C4<1>; +L_0x1967d30 .functor AND 1, L_0x1968880, L_0x19672f0, C4<1>, C4<1>; +L_0x1967de0 .functor AND 1, L_0x19689b0, L_0x19672f0, C4<1>, C4<1>; +L_0x1967e90 .functor OR 1, L_0x1967870, L_0x1967d30, C4<0>, C4<0>; +L_0x1967f90 .functor OR 1, L_0x1967e90, L_0x1967de0, C4<0>, C4<0>; +L_0x19680d0 .functor OR 1, L_0x1968880, L_0x19689b0, C4<0>, C4<0>; +L_0x1968130 .functor OR 1, L_0x19680d0, L_0x19672f0, C4<0>, C4<0>; +L_0x19681e0 .functor NOT 1, L_0x1967f90, C4<0>, C4<0>, C4<0>; +L_0x1968290 .functor AND 1, L_0x19681e0, L_0x1968130, C4<1>, C4<1>; +L_0x1968390 .functor AND 1, L_0x1968880, L_0x19689b0, C4<1>, C4<1>; +L_0x1968570 .functor AND 1, L_0x1968390, L_0x19672f0, C4<1>, C4<1>; +L_0x1967560 .functor OR 1, L_0x1968290, L_0x1968570, C4<0>, C4<0>; +v0x18f44a0_0 .net "a", 0 0, L_0x1968880; 1 drivers +v0x18f4520_0 .net "ab", 0 0, L_0x1967870; 1 drivers +v0x18f45a0_0 .net "acarryin", 0 0, L_0x1967d30; 1 drivers +v0x18f4620_0 .net "andall", 0 0, L_0x1968570; 1 drivers +v0x18f46a0_0 .net "andsingleintermediate", 0 0, L_0x1968390; 1 drivers +v0x18f4720_0 .net "andsumintermediate", 0 0, L_0x1968290; 1 drivers +v0x18f47a0_0 .net "b", 0 0, L_0x19689b0; 1 drivers +v0x18f4820_0 .net "bcarryin", 0 0, L_0x1967de0; 1 drivers +v0x18f48a0_0 .alias "carryin", 0 0, v0x18f7560_0; +v0x18f4920_0 .alias "carryout", 0 0, v0x191c170_0; +v0x18f49a0_0 .net "invcarryout", 0 0, L_0x19681e0; 1 drivers +v0x18f4a20_0 .net "orall", 0 0, L_0x1968130; 1 drivers +v0x18f4aa0_0 .net "orpairintermediate", 0 0, L_0x1967e90; 1 drivers +v0x18f4b20_0 .net "orsingleintermediate", 0 0, L_0x19680d0; 1 drivers +v0x18f4c20_0 .net "sum", 0 0, L_0x1967560; 1 drivers +S_0x18f0120 .scope module, "xor0" "xor_32bit" 19 35, 21 1, S_0x182e070; + .timescale 0 0; +L_0x19658f0 .functor XOR 1, L_0x1969bb0, L_0x1969ca0, C4<0>, C4<0>; +L_0x1969e30 .functor XOR 1, L_0x1969ee0, L_0x1969fd0, C4<0>, C4<0>; +L_0x196a1f0 .functor XOR 1, L_0x196a250, L_0x196a390, C4<0>, C4<0>; +L_0x196a580 .functor XOR 1, L_0x196a5e0, L_0x196a6d0, C4<0>, C4<0>; +L_0x196a520 .functor XOR 1, L_0x196a8b0, L_0x196a9a0, C4<0>, C4<0>; +L_0x196abc0 .functor XOR 1, L_0x196ac70, L_0x196ad60, C4<0>, C4<0>; +L_0x196ab30 .functor XOR 1, L_0x196b0a0, L_0x196ae50, C4<0>, C4<0>; +L_0x196b190 .functor XOR 1, L_0x196b440, L_0x196b530, C4<0>, C4<0>; +L_0x196b6f0 .functor XOR 1, L_0x196b7a0, L_0x196b620, C4<0>, C4<0>; +L_0x196b890 .functor XOR 1, L_0x196bbb0, L_0x196bc50, C4<0>, C4<0>; +L_0x196be40 .functor XOR 1, L_0x196bea0, L_0x196bd40, C4<0>, C4<0>; +L_0x196bf90 .functor XOR 1, L_0x196c260, L_0x1958d60, C4<0>, C4<0>; +L_0x193f8a0 .functor XOR 1, L_0x196c710, L_0x196c7b0, C4<0>, C4<0>; +L_0x1958e00 .functor XOR 1, L_0x196ca40, L_0x196cb30, C4<0>, C4<0>; +L_0x196c990 .functor XOR 1, L_0x196af90, L_0x196cc20, C4<0>, C4<0>; +L_0x196cd10 .functor XOR 1, L_0x196cfe0, L_0x196d320, C4<0>, C4<0>; +L_0x196d240 .functor XOR 1, L_0x196d5a0, L_0x196d410, C4<0>, C4<0>; +L_0x196d840 .functor XOR 1, L_0x196d990, L_0x196da30, C4<0>, C4<0>; +L_0x196d730 .functor XOR 1, L_0x196dce0, L_0x196db20, C4<0>, C4<0>; +L_0x196df60 .functor XOR 1, L_0x196d8f0, L_0x196e110, C4<0>, C4<0>; +L_0x196de20 .functor XOR 1, L_0x196e3f0, L_0x196e200, C4<0>, C4<0>; +L_0x196e390 .functor XOR 1, L_0x196e010, L_0x196e800, C4<0>, C4<0>; +L_0x196e530 .functor XOR 1, L_0x196e5e0, L_0x196e8f0, C4<0>, C4<0>; +L_0x196ea80 .functor XOR 1, L_0x196e6f0, L_0x196ef10, C4<0>, C4<0>; +L_0x196ec00 .functor XOR 1, L_0x196ecb0, L_0x196f260, C4<0>, C4<0>; +L_0x196f000 .functor XOR 1, L_0x196f190, L_0x196f660, C4<0>, C4<0>; +L_0x196f490 .functor XOR 1, L_0x196f540, L_0x196f990, C4<0>, C4<0>; +L_0x196f700 .functor XOR 1, L_0x196f0b0, L_0x196f8f0, C4<0>, C4<0>; +L_0x196fbc0 .functor XOR 1, L_0x196fc70, L_0x19700d0, C4<0>, C4<0>; +L_0x196fe10 .functor XOR 1, L_0x196f7b0, L_0x196ffc0, C4<0>, C4<0>; +L_0x18f1470 .functor XOR 1, L_0x1968aa0, L_0x196cd80, C4<0>, C4<0>; +L_0x196cf10 .functor XOR 1, L_0x196fec0, L_0x1970370, C4<0>, C4<0>; +v0x18f0210_0 .net *"_s0", 0 0, L_0x19658f0; 1 drivers +v0x18f0290_0 .net *"_s101", 0 0, L_0x196d410; 1 drivers +v0x18f0310_0 .net *"_s102", 0 0, L_0x196d840; 1 drivers +v0x18f0390_0 .net *"_s105", 0 0, L_0x196d990; 1 drivers +v0x18f0410_0 .net *"_s107", 0 0, L_0x196da30; 1 drivers +v0x18f0490_0 .net *"_s108", 0 0, L_0x196d730; 1 drivers +v0x18f0510_0 .net *"_s11", 0 0, L_0x1969fd0; 1 drivers +v0x18f0590_0 .net *"_s111", 0 0, L_0x196dce0; 1 drivers +v0x18f0680_0 .net *"_s113", 0 0, L_0x196db20; 1 drivers +v0x18f0720_0 .net *"_s114", 0 0, L_0x196df60; 1 drivers +v0x18f07c0_0 .net *"_s117", 0 0, L_0x196d8f0; 1 drivers +v0x18f0860_0 .net *"_s119", 0 0, L_0x196e110; 1 drivers +v0x18f0900_0 .net *"_s12", 0 0, L_0x196a1f0; 1 drivers +v0x18f09a0_0 .net *"_s120", 0 0, L_0x196de20; 1 drivers +v0x18f0ac0_0 .net *"_s123", 0 0, L_0x196e3f0; 1 drivers +v0x18f0b60_0 .net *"_s125", 0 0, L_0x196e200; 1 drivers +v0x18f0a20_0 .net *"_s126", 0 0, L_0x196e390; 1 drivers +v0x18f0cb0_0 .net *"_s129", 0 0, L_0x196e010; 1 drivers +v0x18f0dd0_0 .net *"_s131", 0 0, L_0x196e800; 1 drivers +v0x18f0e50_0 .net *"_s132", 0 0, L_0x196e530; 1 drivers +v0x18f0d30_0 .net *"_s135", 0 0, L_0x196e5e0; 1 drivers +v0x18f0f80_0 .net *"_s137", 0 0, L_0x196e8f0; 1 drivers +v0x18f0ed0_0 .net *"_s138", 0 0, L_0x196ea80; 1 drivers +v0x18f10c0_0 .net *"_s141", 0 0, L_0x196e6f0; 1 drivers +v0x18f1020_0 .net *"_s143", 0 0, L_0x196ef10; 1 drivers +v0x18f1210_0 .net *"_s144", 0 0, L_0x196ec00; 1 drivers +v0x18f1160_0 .net *"_s147", 0 0, L_0x196ecb0; 1 drivers +v0x18f1370_0 .net *"_s149", 0 0, L_0x196f260; 1 drivers +v0x18f12b0_0 .net *"_s15", 0 0, L_0x196a250; 1 drivers +v0x18f14e0_0 .net *"_s150", 0 0, L_0x196f000; 1 drivers +v0x18f13f0_0 .net *"_s153", 0 0, L_0x196f190; 1 drivers +v0x18f1660_0 .net *"_s155", 0 0, L_0x196f660; 1 drivers +v0x18f1560_0 .net *"_s156", 0 0, L_0x196f490; 1 drivers +v0x18f17f0_0 .net *"_s159", 0 0, L_0x196f540; 1 drivers +v0x18f16e0_0 .net *"_s161", 0 0, L_0x196f990; 1 drivers +v0x18f1990_0 .net *"_s162", 0 0, L_0x196f700; 1 drivers +v0x18f1870_0 .net *"_s165", 0 0, L_0x196f0b0; 1 drivers +v0x18f1910_0 .net *"_s167", 0 0, L_0x196f8f0; 1 drivers +v0x18f1b50_0 .net *"_s168", 0 0, L_0x196fbc0; 1 drivers +v0x18f1bd0_0 .net *"_s17", 0 0, L_0x196a390; 1 drivers +v0x18f1a10_0 .net *"_s171", 0 0, L_0x196fc70; 1 drivers +v0x18f1ab0_0 .net *"_s173", 0 0, L_0x19700d0; 1 drivers +v0x18f1db0_0 .net *"_s174", 0 0, L_0x196fe10; 1 drivers +v0x18f1e30_0 .net *"_s177", 0 0, L_0x196f7b0; 1 drivers +v0x16cb160_0 .net *"_s179", 0 0, L_0x196ffc0; 1 drivers +v0x1742da0_0 .net *"_s18", 0 0, L_0x196a580; 1 drivers +v0x18f1c50_0 .net *"_s180", 0 0, L_0x18f1470; 1 drivers +v0x18f1cf0_0 .net *"_s183", 0 0, L_0x1968aa0; 1 drivers +v0x18f2040_0 .net *"_s185", 0 0, L_0x196cd80; 1 drivers +v0x18f20c0_0 .net *"_s186", 0 0, L_0x196cf10; 1 drivers +v0x18f1eb0_0 .net *"_s189", 0 0, L_0x196fec0; 1 drivers +v0x18f1f50_0 .net *"_s191", 0 0, L_0x1970370; 1 drivers +v0x18f22f0_0 .net *"_s21", 0 0, L_0x196a5e0; 1 drivers +v0x18f2370_0 .net *"_s23", 0 0, L_0x196a6d0; 1 drivers +v0x18f2140_0 .net *"_s24", 0 0, L_0x196a520; 1 drivers +v0x18f21e0_0 .net *"_s27", 0 0, L_0x196a8b0; 1 drivers +v0x18f25c0_0 .net *"_s29", 0 0, L_0x196a9a0; 1 drivers +v0x18f2640_0 .net *"_s3", 0 0, L_0x1969bb0; 1 drivers +v0x18f23f0_0 .net *"_s30", 0 0, L_0x196abc0; 1 drivers +v0x18f2490_0 .net *"_s33", 0 0, L_0x196ac70; 1 drivers +v0x18f2530_0 .net *"_s35", 0 0, L_0x196ad60; 1 drivers +v0x18f28b0_0 .net *"_s36", 0 0, L_0x196ab30; 1 drivers +v0x18f26c0_0 .net *"_s39", 0 0, L_0x196b0a0; 1 drivers +v0x18f2760_0 .net *"_s41", 0 0, L_0x196ae50; 1 drivers +v0x18f2800_0 .net *"_s42", 0 0, L_0x196b190; 1 drivers +v0x18f2b40_0 .net *"_s45", 0 0, L_0x196b440; 1 drivers +v0x18f2930_0 .net *"_s47", 0 0, L_0x196b530; 1 drivers +v0x18f29d0_0 .net *"_s48", 0 0, L_0x196b6f0; 1 drivers +v0x18f2a70_0 .net *"_s5", 0 0, L_0x1969ca0; 1 drivers +v0x18f2df0_0 .net *"_s51", 0 0, L_0x196b7a0; 1 drivers +v0x18f2bc0_0 .net *"_s53", 0 0, L_0x196b620; 1 drivers +v0x18f2c60_0 .net *"_s54", 0 0, L_0x196b890; 1 drivers +v0x18f2d00_0 .net *"_s57", 0 0, L_0x196bbb0; 1 drivers +v0x18f30c0_0 .net *"_s59", 0 0, L_0x196bc50; 1 drivers +v0x18f2e70_0 .net *"_s6", 0 0, L_0x1969e30; 1 drivers +v0x18f2f10_0 .net *"_s60", 0 0, L_0x196be40; 1 drivers +v0x18f2fb0_0 .net *"_s63", 0 0, L_0x196bea0; 1 drivers +v0x18f33b0_0 .net *"_s65", 0 0, L_0x196bd40; 1 drivers +v0x18f3140_0 .net *"_s66", 0 0, L_0x196bf90; 1 drivers +v0x18f31e0_0 .net *"_s69", 0 0, L_0x196c260; 1 drivers +v0x18f3280_0 .net *"_s71", 0 0, L_0x1958d60; 1 drivers +v0x18f3320_0 .net *"_s72", 0 0, L_0x193f8a0; 1 drivers +v0x18f36d0_0 .net *"_s75", 0 0, L_0x196c710; 1 drivers +v0x18f3750_0 .net *"_s77", 0 0, L_0x196c7b0; 1 drivers +v0x18f3430_0 .net *"_s78", 0 0, L_0x1958e00; 1 drivers +v0x18f34d0_0 .net *"_s81", 0 0, L_0x196ca40; 1 drivers +v0x18f3570_0 .net *"_s83", 0 0, L_0x196cb30; 1 drivers +v0x18f3610_0 .net *"_s84", 0 0, L_0x196c990; 1 drivers +v0x18f3aa0_0 .net *"_s87", 0 0, L_0x196af90; 1 drivers +v0x18f3b20_0 .net *"_s89", 0 0, L_0x196cc20; 1 drivers +v0x18f37d0_0 .net *"_s9", 0 0, L_0x1969ee0; 1 drivers +v0x18f3870_0 .net *"_s90", 0 0, L_0x196cd10; 1 drivers +v0x18f3910_0 .net *"_s93", 0 0, L_0x196cfe0; 1 drivers +v0x18f39b0_0 .net *"_s95", 0 0, L_0x196d320; 1 drivers +v0x18f3ea0_0 .net *"_s96", 0 0, L_0x196d240; 1 drivers +v0x18f3f20_0 .net *"_s99", 0 0, L_0x196d5a0; 1 drivers +v0x18f3ba0_0 .alias "a", 31 0, v0x192d7a0_0; +v0x18f3c20_0 .alias "b", 31 0, v0x191cfb0_0; +v0x18f3ca0_0 .alias "out", 31 0, v0x191c8b0_0; +L_0x1965800 .part/pv L_0x19658f0, 0, 1, 32; +L_0x1969bb0 .part L_0x1936840, 0, 1; +L_0x1969ca0 .part v0x191ccc0_0, 0, 1; +L_0x1969d90 .part/pv L_0x1969e30, 1, 1, 32; +L_0x1969ee0 .part L_0x1936840, 1, 1; +L_0x1969fd0 .part v0x191ccc0_0, 1, 1; +L_0x196a0c0 .part/pv L_0x196a1f0, 2, 1, 32; +L_0x196a250 .part L_0x1936840, 2, 1; +L_0x196a390 .part v0x191ccc0_0, 2, 1; +L_0x196a480 .part/pv L_0x196a580, 3, 1, 32; +L_0x196a5e0 .part L_0x1936840, 3, 1; +L_0x196a6d0 .part v0x191ccc0_0, 3, 1; +L_0x196a7c0 .part/pv L_0x196a520, 4, 1, 32; +L_0x196a8b0 .part L_0x1936840, 4, 1; +L_0x196a9a0 .part v0x191ccc0_0, 4, 1; +L_0x196aa90 .part/pv L_0x196abc0, 5, 1, 32; +L_0x196ac70 .part L_0x1936840, 5, 1; +L_0x196ad60 .part v0x191ccc0_0, 5, 1; +L_0x196aef0 .part/pv L_0x196ab30, 6, 1, 32; +L_0x196b0a0 .part L_0x1936840, 6, 1; +L_0x196ae50 .part v0x191ccc0_0, 6, 1; +L_0x196b290 .part/pv L_0x196b190, 7, 1, 32; +L_0x196b440 .part L_0x1936840, 7, 1; +L_0x196b530 .part v0x191ccc0_0, 7, 1; +L_0x196b330 .part/pv L_0x196b6f0, 8, 1, 32; +L_0x196b7a0 .part L_0x1936840, 8, 1; +L_0x196b620 .part v0x191ccc0_0, 8, 1; +L_0x196b9c0 .part/pv L_0x196b890, 9, 1, 32; +L_0x196bbb0 .part L_0x1936840, 9, 1; +L_0x196bc50 .part v0x191ccc0_0, 9, 1; +L_0x196ba60 .part/pv L_0x196be40, 10, 1, 32; +L_0x196bea0 .part L_0x1936840, 10, 1; +L_0x196bd40 .part v0x191ccc0_0, 10, 1; +L_0x196c0a0 .part/pv L_0x196bf90, 11, 1, 32; +L_0x196c260 .part L_0x1936840, 11, 1; +L_0x1958d60 .part v0x191ccc0_0, 11, 1; +L_0x196c140 .part/pv L_0x193f8a0, 12, 1, 32; +L_0x196c710 .part L_0x1936840, 12, 1; +L_0x196c7b0 .part v0x191ccc0_0, 12, 1; +L_0x196c850 .part/pv L_0x1958e00, 13, 1, 32; +L_0x196ca40 .part L_0x1936840, 13, 1; +L_0x196cb30 .part v0x191ccc0_0, 13, 1; +L_0x196c8f0 .part/pv L_0x196c990, 14, 1, 32; +L_0x196af90 .part L_0x1936840, 14, 1; +L_0x196cc20 .part v0x191ccc0_0, 14, 1; +L_0x196d100 .part/pv L_0x196cd10, 15, 1, 32; +L_0x196cfe0 .part L_0x1936840, 15, 1; +L_0x196d320 .part v0x191ccc0_0, 15, 1; +L_0x196d1a0 .part/pv L_0x196d240, 16, 1, 32; +L_0x196d5a0 .part L_0x1936840, 16, 1; +L_0x196d410 .part v0x191ccc0_0, 16, 1; +L_0x196d500 .part/pv L_0x196d840, 17, 1, 32; +L_0x196d990 .part L_0x1936840, 17, 1; +L_0x196da30 .part v0x191ccc0_0, 17, 1; +L_0x196d690 .part/pv L_0x196d730, 18, 1, 32; +L_0x196dce0 .part L_0x1936840, 18, 1; +L_0x196db20 .part v0x191ccc0_0, 18, 1; +L_0x196dc10 .part/pv L_0x196df60, 19, 1, 32; +L_0x196d8f0 .part L_0x1936840, 19, 1; +L_0x196e110 .part v0x191ccc0_0, 19, 1; +L_0x196dd80 .part/pv L_0x196de20, 20, 1, 32; +L_0x196e3f0 .part L_0x1936840, 20, 1; +L_0x196e200 .part v0x191ccc0_0, 20, 1; +L_0x196e2f0 .part/pv L_0x196e390, 21, 1, 32; +L_0x196e010 .part L_0x1936840, 21, 1; +L_0x196e800 .part v0x191ccc0_0, 21, 1; +L_0x196e490 .part/pv L_0x196e530, 22, 1, 32; +L_0x196e5e0 .part L_0x1936840, 22, 1; +L_0x196e8f0 .part v0x191ccc0_0, 22, 1; +L_0x196e9e0 .part/pv L_0x196ea80, 23, 1, 32; +L_0x196e6f0 .part L_0x1936840, 23, 1; +L_0x196ef10 .part v0x191ccc0_0, 23, 1; +L_0x196eb60 .part/pv L_0x196ec00, 24, 1, 32; +L_0x196ecb0 .part L_0x1936840, 24, 1; +L_0x196f260 .part v0x191ccc0_0, 24, 1; +L_0x196f350 .part/pv L_0x196f000, 25, 1, 32; +L_0x196f190 .part L_0x1936840, 25, 1; +L_0x196f660 .part v0x191ccc0_0, 25, 1; +L_0x196f3f0 .part/pv L_0x196f490, 26, 1, 32; +L_0x196f540 .part L_0x1936840, 26, 1; +L_0x196f990 .part v0x191ccc0_0, 26, 1; +L_0x196fa80 .part/pv L_0x196f700, 27, 1, 32; +L_0x196f0b0 .part L_0x1936840, 27, 1; +L_0x196f8f0 .part v0x191ccc0_0, 27, 1; +L_0x196fb20 .part/pv L_0x196fbc0, 28, 1, 32; +L_0x196fc70 .part L_0x1936840, 28, 1; +L_0x19700d0 .part v0x191ccc0_0, 28, 1; +L_0x1970170 .part/pv L_0x196fe10, 29, 1, 32; +L_0x196f7b0 .part L_0x1936840, 29, 1; +L_0x196ffc0 .part v0x191ccc0_0, 29, 1; +L_0x19704f0 .part/pv L_0x18f1470, 30, 1, 32; +L_0x1968aa0 .part L_0x1936840, 30, 1; +L_0x196cd80 .part v0x191ccc0_0, 30, 1; +L_0x196ce70 .part/pv L_0x196cf10, 31, 1, 32; +L_0x196fec0 .part L_0x1936840, 31, 1; +L_0x1970370 .part v0x191ccc0_0, 31, 1; +S_0x18e1cb0 .scope module, "slt0" "full_slt_32bit" 19 36, 22 37, S_0x182e070; + .timescale 0 0; +v0x18ee2d0_0 .net/s *"_s128", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x18ee390_0 .alias "a", 31 0, v0x192d7a0_0; +v0x18ee4a0_0 .alias "b", 31 0, v0x191cfb0_0; +v0x18ee5b0_0 .alias "out", 31 0, v0x191c7b0_0; +v0x18ee660_0 .net "slt0", 0 0, L_0x1970ec0; 1 drivers +v0x18ee6e0_0 .net "slt1", 0 0, L_0x19714b0; 1 drivers +v0x18ee760_0 .net "slt10", 0 0, L_0x1974600; 1 drivers +v0x18ee830_0 .net "slt11", 0 0, L_0x1974b50; 1 drivers +v0x18ee950_0 .net "slt12", 0 0, L_0x196c610; 1 drivers +v0x18eea20_0 .net "slt13", 0 0, L_0x1975960; 1 drivers +v0x18eeaa0_0 .net "slt14", 0 0, L_0x1975ed0; 1 drivers +v0x18eeb70_0 .net "slt15", 0 0, L_0x1976450; 1 drivers +v0x18eec40_0 .net "slt16", 0 0, L_0x19769e0; 1 drivers +v0x18eed10_0 .net "slt17", 0 0, L_0x1976f30; 1 drivers +v0x18eee60_0 .net "slt18", 0 0, L_0x1977490; 1 drivers +v0x18eef30_0 .net "slt19", 0 0, L_0x1977a00; 1 drivers +v0x18eed90_0 .net "slt2", 0 0, L_0x19719f0; 1 drivers +v0x18ef0e0_0 .net "slt20", 0 0, L_0x1977f80; 1 drivers +v0x18ef200_0 .net "slt21", 0 0, L_0x1978510; 1 drivers +v0x18ef2d0_0 .net "slt22", 0 0, L_0x193f030; 1 drivers +v0x18ef400_0 .net "slt23", 0 0, L_0x19797f0; 1 drivers +v0x18ef480_0 .net "slt24", 0 0, L_0x1979d60; 1 drivers +v0x18ef5c0_0 .net "slt25", 0 0, L_0x197a2e0; 1 drivers +v0x18ef640_0 .net "slt26", 0 0, L_0x18ef3a0; 1 drivers +v0x18ef790_0 .net "slt27", 0 0, L_0x197adb0; 1 drivers +v0x18ef810_0 .net "slt28", 0 0, L_0x197b300; 1 drivers +v0x18ef710_0 .net "slt29", 0 0, L_0x197b860; 1 drivers +v0x18ef9c0_0 .net "slt3", 0 0, L_0x1971f30; 1 drivers +v0x18ef8e0_0 .net "slt30", 0 0, L_0x197bdd0; 1 drivers +v0x18efb80_0 .net "slt4", 0 0, L_0x19724c0; 1 drivers +v0x18efa90_0 .net "slt5", 0 0, L_0x1972a10; 1 drivers +v0x18efd50_0 .net "slt6", 0 0, L_0x1972f60; 1 drivers +v0x18efc50_0 .net "slt7", 0 0, L_0x1973520; 1 drivers +v0x18eff30_0 .net "slt8", 0 0, L_0x1973af0; 1 drivers +v0x18efe20_0 .net "slt9", 0 0, L_0x1974070; 1 drivers +L_0x1970fc0 .part L_0x1936840, 0, 1; +L_0x19710b0 .part v0x191ccc0_0, 0, 1; +L_0x1971560 .part L_0x1936840, 1, 1; +L_0x1971650 .part v0x191ccc0_0, 1, 1; +L_0x1971aa0 .part L_0x1936840, 2, 1; +L_0x1971b90 .part v0x191ccc0_0, 2, 1; +L_0x1971fe0 .part L_0x1936840, 3, 1; +L_0x19720d0 .part v0x191ccc0_0, 3, 1; +L_0x1972570 .part L_0x1936840, 4, 1; +L_0x1972660 .part v0x191ccc0_0, 4, 1; +L_0x1972ac0 .part L_0x1936840, 5, 1; +L_0x1972bb0 .part v0x191ccc0_0, 5, 1; +L_0x1973010 .part L_0x1936840, 6, 1; +L_0x1973100 .part v0x191ccc0_0, 6, 1; +L_0x19735d0 .part L_0x1936840, 7, 1; +L_0x19736c0 .part v0x191ccc0_0, 7, 1; +L_0x1973ba0 .part L_0x1936840, 8, 1; +L_0x1973c90 .part v0x191ccc0_0, 8, 1; +L_0x1974120 .part L_0x1936840, 9, 1; +L_0x1974210 .part v0x191ccc0_0, 9, 1; +L_0x19746b0 .part L_0x1936840, 10, 1; +L_0x19747a0 .part v0x191ccc0_0, 10, 1; +L_0x1974c00 .part L_0x1936840, 11, 1; +L_0x196c300 .part v0x191ccc0_0, 11, 1; +L_0x1975500 .part L_0x1936840, 12, 1; +L_0x19755a0 .part v0x191ccc0_0, 12, 1; +L_0x1975a10 .part L_0x1936840, 13, 1; +L_0x1975b00 .part v0x191ccc0_0, 13, 1; +L_0x1975f80 .part L_0x1936840, 14, 1; +L_0x1976070 .part v0x191ccc0_0, 14, 1; +L_0x1976500 .part L_0x1936840, 15, 1; +L_0x19765f0 .part v0x191ccc0_0, 15, 1; +L_0x1976a90 .part L_0x1936840, 16, 1; +L_0x1976b80 .part v0x191ccc0_0, 16, 1; +L_0x1976fe0 .part L_0x1936840, 17, 1; +L_0x19770d0 .part v0x191ccc0_0, 17, 1; +L_0x1977540 .part L_0x1936840, 18, 1; +L_0x1977630 .part v0x191ccc0_0, 18, 1; +L_0x1977ab0 .part L_0x1936840, 19, 1; +L_0x1977ba0 .part v0x191ccc0_0, 19, 1; +L_0x1978030 .part L_0x1936840, 20, 1; +L_0x1978120 .part v0x191ccc0_0, 20, 1; +L_0x19785c0 .part L_0x1936840, 21, 1; +L_0x19786b0 .part v0x191ccc0_0, 21, 1; +L_0x193f0e0 .part L_0x1936840, 22, 1; +L_0x193f1d0 .part v0x191ccc0_0, 22, 1; +L_0x19798a0 .part L_0x1936840, 23, 1; +L_0x1979990 .part v0x191ccc0_0, 23, 1; +L_0x1979e10 .part L_0x1936840, 24, 1; +L_0x1979f00 .part v0x191ccc0_0, 24, 1; +L_0x197a390 .part L_0x1936840, 25, 1; +L_0x197a480 .part v0x191ccc0_0, 25, 1; +L_0x197a910 .part L_0x1936840, 26, 1; +L_0x197aa00 .part v0x191ccc0_0, 26, 1; +L_0x197ae60 .part L_0x1936840, 27, 1; +L_0x197af50 .part v0x191ccc0_0, 27, 1; +L_0x197b3b0 .part L_0x1936840, 28, 1; +L_0x197b4a0 .part v0x191ccc0_0, 28, 1; +L_0x197b910 .part L_0x1936840, 29, 1; +L_0x197ba00 .part v0x191ccc0_0, 29, 1; +L_0x197be80 .part L_0x1936840, 30, 1; +L_0x197bf70 .part v0x191ccc0_0, 30, 1; +L_0x197baa0 .part/pv C4<0000000000000000000000000000000>, 1, 31, 32; +L_0x197c510 .part/pv L_0x197c460, 0, 1, 32; +L_0x197c010 .part L_0x1936840, 31, 1; +L_0x197c0b0 .part v0x191ccc0_0, 31, 1; +S_0x18edca0 .scope module, "bit0" "single_slt" 22 74, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1970460 .functor XOR 1, L_0x1970fc0, L_0x19710b0, C4<0>, C4<0>; +L_0x1970cb0 .functor AND 1, L_0x19710b0, L_0x1970460, C4<1>, C4<1>; +L_0x1970db0 .functor NOT 1, L_0x1970460, C4<0>, C4<0>, C4<0>; +L_0x1970e10 .functor AND 1, L_0x1970db0, C4<0>, C4<1>, C4<1>; +L_0x1970ec0 .functor OR 1, L_0x1970cb0, L_0x1970e10, C4<0>, C4<0>; +v0x18edd90_0 .net "a", 0 0, L_0x1970fc0; 1 drivers +v0x18ede50_0 .net "abxor", 0 0, L_0x1970460; 1 drivers +v0x18edef0_0 .net "b", 0 0, L_0x19710b0; 1 drivers +v0x18edf90_0 .net "bxorand", 0 0, L_0x1970cb0; 1 drivers +v0x18ee040_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x18ee0e0_0 .alias "out", 0 0, v0x18ee660_0; +v0x18ee160_0 .net "xornot", 0 0, L_0x1970db0; 1 drivers +v0x18ee1e0_0 .net "xornotand", 0 0, L_0x1970e10; 1 drivers +S_0x18ed670 .scope module, "bit1" "single_slt" 22 75, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19314a0 .functor XOR 1, L_0x1971560, L_0x1971650, C4<0>, C4<0>; +L_0x1971210 .functor AND 1, L_0x1971650, L_0x19314a0, C4<1>, C4<1>; +L_0x1971310 .functor NOT 1, L_0x19314a0, C4<0>, C4<0>, C4<0>; +L_0x1971370 .functor AND 1, L_0x1971310, L_0x1970ec0, C4<1>, C4<1>; +L_0x19714b0 .functor OR 1, L_0x1971210, L_0x1971370, C4<0>, C4<0>; +v0x18ed760_0 .net "a", 0 0, L_0x1971560; 1 drivers +v0x18ed820_0 .net "abxor", 0 0, L_0x19314a0; 1 drivers +v0x18ed8c0_0 .net "b", 0 0, L_0x1971650; 1 drivers +v0x18ed960_0 .net "bxorand", 0 0, L_0x1971210; 1 drivers +v0x18eda10_0 .alias "defaultCompare", 0 0, v0x18ee660_0; +v0x18edab0_0 .alias "out", 0 0, v0x18ee6e0_0; +v0x18edb30_0 .net "xornot", 0 0, L_0x1971310; 1 drivers +v0x18edbb0_0 .net "xornotand", 0 0, L_0x1971370; 1 drivers +S_0x18ed040 .scope module, "bit2" "single_slt" 22 76, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19716f0 .functor XOR 1, L_0x1971aa0, L_0x1971b90, C4<0>, C4<0>; +L_0x1971750 .functor AND 1, L_0x1971b90, L_0x19716f0, C4<1>, C4<1>; +L_0x1971850 .functor NOT 1, L_0x19716f0, C4<0>, C4<0>, C4<0>; +L_0x19718b0 .functor AND 1, L_0x1971850, L_0x19714b0, C4<1>, C4<1>; +L_0x19719f0 .functor OR 1, L_0x1971750, L_0x19718b0, C4<0>, C4<0>; +v0x18ed130_0 .net "a", 0 0, L_0x1971aa0; 1 drivers +v0x18ed1f0_0 .net "abxor", 0 0, L_0x19716f0; 1 drivers +v0x18ed290_0 .net "b", 0 0, L_0x1971b90; 1 drivers +v0x18ed330_0 .net "bxorand", 0 0, L_0x1971750; 1 drivers +v0x18ed3e0_0 .alias "defaultCompare", 0 0, v0x18ee6e0_0; +v0x18ed480_0 .alias "out", 0 0, v0x18eed90_0; +v0x18ed500_0 .net "xornot", 0 0, L_0x1971850; 1 drivers +v0x18ed580_0 .net "xornotand", 0 0, L_0x19718b0; 1 drivers +S_0x18eca10 .scope module, "bit3" "single_slt" 22 77, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1971c30 .functor XOR 1, L_0x1971fe0, L_0x19720d0, C4<0>, C4<0>; +L_0x1971c90 .functor AND 1, L_0x19720d0, L_0x1971c30, C4<1>, C4<1>; +L_0x1971d90 .functor NOT 1, L_0x1971c30, C4<0>, C4<0>, C4<0>; +L_0x1971df0 .functor AND 1, L_0x1971d90, L_0x19719f0, C4<1>, C4<1>; +L_0x1971f30 .functor OR 1, L_0x1971c90, L_0x1971df0, C4<0>, C4<0>; +v0x18ecb00_0 .net "a", 0 0, L_0x1971fe0; 1 drivers +v0x18ecbc0_0 .net "abxor", 0 0, L_0x1971c30; 1 drivers +v0x18ecc60_0 .net "b", 0 0, L_0x19720d0; 1 drivers +v0x18ecd00_0 .net "bxorand", 0 0, L_0x1971c90; 1 drivers +v0x18ecdb0_0 .alias "defaultCompare", 0 0, v0x18eed90_0; +v0x18ece50_0 .alias "out", 0 0, v0x18ef9c0_0; +v0x18eced0_0 .net "xornot", 0 0, L_0x1971d90; 1 drivers +v0x18ecf50_0 .net "xornotand", 0 0, L_0x1971df0; 1 drivers +S_0x18ec3e0 .scope module, "bit4" "single_slt" 22 78, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19721c0 .functor XOR 1, L_0x1972570, L_0x1972660, C4<0>, C4<0>; +L_0x1972220 .functor AND 1, L_0x1972660, L_0x19721c0, C4<1>, C4<1>; +L_0x1972320 .functor NOT 1, L_0x19721c0, C4<0>, C4<0>, C4<0>; +L_0x1972380 .functor AND 1, L_0x1972320, L_0x1971f30, C4<1>, C4<1>; +L_0x19724c0 .functor OR 1, L_0x1972220, L_0x1972380, C4<0>, C4<0>; +v0x18ec4d0_0 .net "a", 0 0, L_0x1972570; 1 drivers +v0x18ec590_0 .net "abxor", 0 0, L_0x19721c0; 1 drivers +v0x18ec630_0 .net "b", 0 0, L_0x1972660; 1 drivers +v0x18ec6d0_0 .net "bxorand", 0 0, L_0x1972220; 1 drivers +v0x18ec780_0 .alias "defaultCompare", 0 0, v0x18ef9c0_0; +v0x18ec820_0 .alias "out", 0 0, v0x18efb80_0; +v0x18ec8a0_0 .net "xornot", 0 0, L_0x1972320; 1 drivers +v0x18ec920_0 .net "xornotand", 0 0, L_0x1972380; 1 drivers +S_0x18ebdb0 .scope module, "bit5" "single_slt" 22 79, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1972760 .functor XOR 1, L_0x1972ac0, L_0x1972bb0, C4<0>, C4<0>; +L_0x19727c0 .functor AND 1, L_0x1972bb0, L_0x1972760, C4<1>, C4<1>; +L_0x1972870 .functor NOT 1, L_0x1972760, C4<0>, C4<0>, C4<0>; +L_0x19728d0 .functor AND 1, L_0x1972870, L_0x19724c0, C4<1>, C4<1>; +L_0x1972a10 .functor OR 1, L_0x19727c0, L_0x19728d0, C4<0>, C4<0>; +v0x18ebea0_0 .net "a", 0 0, L_0x1972ac0; 1 drivers +v0x18ebf60_0 .net "abxor", 0 0, L_0x1972760; 1 drivers +v0x18ec000_0 .net "b", 0 0, L_0x1972bb0; 1 drivers +v0x18ec0a0_0 .net "bxorand", 0 0, L_0x19727c0; 1 drivers +v0x18ec150_0 .alias "defaultCompare", 0 0, v0x18efb80_0; +v0x18ec1f0_0 .alias "out", 0 0, v0x18efa90_0; +v0x18ec270_0 .net "xornot", 0 0, L_0x1972870; 1 drivers +v0x18ec2f0_0 .net "xornotand", 0 0, L_0x19728d0; 1 drivers +S_0x18eb780 .scope module, "bit6" "single_slt" 22 80, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1972700 .functor XOR 1, L_0x1973010, L_0x1973100, C4<0>, C4<0>; +L_0x1972cc0 .functor AND 1, L_0x1973100, L_0x1972700, C4<1>, C4<1>; +L_0x1972dc0 .functor NOT 1, L_0x1972700, C4<0>, C4<0>, C4<0>; +L_0x1972e20 .functor AND 1, L_0x1972dc0, L_0x1972a10, C4<1>, C4<1>; +L_0x1972f60 .functor OR 1, L_0x1972cc0, L_0x1972e20, C4<0>, C4<0>; +v0x18eb870_0 .net "a", 0 0, L_0x1973010; 1 drivers +v0x18eb930_0 .net "abxor", 0 0, L_0x1972700; 1 drivers +v0x18eb9d0_0 .net "b", 0 0, L_0x1973100; 1 drivers +v0x18eba70_0 .net "bxorand", 0 0, L_0x1972cc0; 1 drivers +v0x18ebb20_0 .alias "defaultCompare", 0 0, v0x18efa90_0; +v0x18ebbc0_0 .alias "out", 0 0, v0x18efd50_0; +v0x18ebc40_0 .net "xornot", 0 0, L_0x1972dc0; 1 drivers +v0x18ebcc0_0 .net "xornotand", 0 0, L_0x1972e20; 1 drivers +S_0x18eb150 .scope module, "bit7" "single_slt" 22 81, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1973220 .functor XOR 1, L_0x19735d0, L_0x19736c0, C4<0>, C4<0>; +L_0x1973280 .functor AND 1, L_0x19736c0, L_0x1973220, C4<1>, C4<1>; +L_0x1973380 .functor NOT 1, L_0x1973220, C4<0>, C4<0>, C4<0>; +L_0x19733e0 .functor AND 1, L_0x1973380, L_0x1972f60, C4<1>, C4<1>; +L_0x1973520 .functor OR 1, L_0x1973280, L_0x19733e0, C4<0>, C4<0>; +v0x18eb240_0 .net "a", 0 0, L_0x19735d0; 1 drivers +v0x18eb300_0 .net "abxor", 0 0, L_0x1973220; 1 drivers +v0x18eb3a0_0 .net "b", 0 0, L_0x19736c0; 1 drivers +v0x18eb440_0 .net "bxorand", 0 0, L_0x1973280; 1 drivers +v0x18eb4f0_0 .alias "defaultCompare", 0 0, v0x18efd50_0; +v0x18eb590_0 .alias "out", 0 0, v0x18efc50_0; +v0x18eb610_0 .net "xornot", 0 0, L_0x1973380; 1 drivers +v0x18eb690_0 .net "xornotand", 0 0, L_0x19733e0; 1 drivers +S_0x18eab20 .scope module, "bit8" "single_slt" 22 82, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19737f0 .functor XOR 1, L_0x1973ba0, L_0x1973c90, C4<0>, C4<0>; +L_0x1973850 .functor AND 1, L_0x1973c90, L_0x19737f0, C4<1>, C4<1>; +L_0x1973950 .functor NOT 1, L_0x19737f0, C4<0>, C4<0>, C4<0>; +L_0x19739b0 .functor AND 1, L_0x1973950, L_0x1973520, C4<1>, C4<1>; +L_0x1973af0 .functor OR 1, L_0x1973850, L_0x19739b0, C4<0>, C4<0>; +v0x18eac10_0 .net "a", 0 0, L_0x1973ba0; 1 drivers +v0x18eacd0_0 .net "abxor", 0 0, L_0x19737f0; 1 drivers +v0x18ead70_0 .net "b", 0 0, L_0x1973c90; 1 drivers +v0x18eae10_0 .net "bxorand", 0 0, L_0x1973850; 1 drivers +v0x18eaec0_0 .alias "defaultCompare", 0 0, v0x18efc50_0; +v0x18eaf60_0 .alias "out", 0 0, v0x18eff30_0; +v0x18eafe0_0 .net "xornot", 0 0, L_0x1973950; 1 drivers +v0x18eb060_0 .net "xornotand", 0 0, L_0x19739b0; 1 drivers +S_0x18ea4f0 .scope module, "bit9" "single_slt" 22 83, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1973760 .functor XOR 1, L_0x1974120, L_0x1974210, C4<0>, C4<0>; +L_0x1973dd0 .functor AND 1, L_0x1974210, L_0x1973760, C4<1>, C4<1>; +L_0x1973ed0 .functor NOT 1, L_0x1973760, C4<0>, C4<0>, C4<0>; +L_0x1973f30 .functor AND 1, L_0x1973ed0, L_0x1973af0, C4<1>, C4<1>; +L_0x1974070 .functor OR 1, L_0x1973dd0, L_0x1973f30, C4<0>, C4<0>; +v0x18ea5e0_0 .net "a", 0 0, L_0x1974120; 1 drivers +v0x18ea6a0_0 .net "abxor", 0 0, L_0x1973760; 1 drivers +v0x18ea740_0 .net "b", 0 0, L_0x1974210; 1 drivers +v0x18ea7e0_0 .net "bxorand", 0 0, L_0x1973dd0; 1 drivers +v0x18ea890_0 .alias "defaultCompare", 0 0, v0x18eff30_0; +v0x18ea930_0 .alias "out", 0 0, v0x18efe20_0; +v0x18ea9b0_0 .net "xornot", 0 0, L_0x1973ed0; 1 drivers +v0x18eaa30_0 .net "xornotand", 0 0, L_0x1973f30; 1 drivers +S_0x18e9ec0 .scope module, "bit10" "single_slt" 22 84, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1973d30 .functor XOR 1, L_0x19746b0, L_0x19747a0, C4<0>, C4<0>; +L_0x1974360 .functor AND 1, L_0x19747a0, L_0x1973d30, C4<1>, C4<1>; +L_0x1974460 .functor NOT 1, L_0x1973d30, C4<0>, C4<0>, C4<0>; +L_0x19744c0 .functor AND 1, L_0x1974460, L_0x1974070, C4<1>, C4<1>; +L_0x1974600 .functor OR 1, L_0x1974360, L_0x19744c0, C4<0>, C4<0>; +v0x18e9fb0_0 .net "a", 0 0, L_0x19746b0; 1 drivers +v0x18ea070_0 .net "abxor", 0 0, L_0x1973d30; 1 drivers +v0x18ea110_0 .net "b", 0 0, L_0x19747a0; 1 drivers +v0x18ea1b0_0 .net "bxorand", 0 0, L_0x1974360; 1 drivers +v0x18ea260_0 .alias "defaultCompare", 0 0, v0x18efe20_0; +v0x18ea300_0 .alias "out", 0 0, v0x18ee760_0; +v0x18ea380_0 .net "xornot", 0 0, L_0x1974460; 1 drivers +v0x18ea400_0 .net "xornotand", 0 0, L_0x19744c0; 1 drivers +S_0x18e9890 .scope module, "bit11" "single_slt" 22 85, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19742b0 .functor XOR 1, L_0x1974c00, L_0x196c300, C4<0>, C4<0>; +L_0x1974900 .functor AND 1, L_0x196c300, L_0x19742b0, C4<1>, C4<1>; +L_0x19749b0 .functor NOT 1, L_0x19742b0, C4<0>, C4<0>, C4<0>; +L_0x1974a10 .functor AND 1, L_0x19749b0, L_0x1974600, C4<1>, C4<1>; +L_0x1974b50 .functor OR 1, L_0x1974900, L_0x1974a10, C4<0>, C4<0>; +v0x18e9980_0 .net "a", 0 0, L_0x1974c00; 1 drivers +v0x18e9a40_0 .net "abxor", 0 0, L_0x19742b0; 1 drivers +v0x18e9ae0_0 .net "b", 0 0, L_0x196c300; 1 drivers +v0x18e9b80_0 .net "bxorand", 0 0, L_0x1974900; 1 drivers +v0x18e9c30_0 .alias "defaultCompare", 0 0, v0x18ee760_0; +v0x18e9cd0_0 .alias "out", 0 0, v0x18ee830_0; +v0x18e9d50_0 .net "xornot", 0 0, L_0x19749b0; 1 drivers +v0x18e9dd0_0 .net "xornotand", 0 0, L_0x1974a10; 1 drivers +S_0x18e9260 .scope module, "bit12" "single_slt" 22 86, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1972c50 .functor XOR 1, L_0x1975500, L_0x19755a0, C4<0>, C4<0>; +L_0x19731a0 .functor AND 1, L_0x19755a0, L_0x1972c50, C4<1>, C4<1>; +L_0x196c470 .functor NOT 1, L_0x1972c50, C4<0>, C4<0>, C4<0>; +L_0x196c4d0 .functor AND 1, L_0x196c470, L_0x1974b50, C4<1>, C4<1>; +L_0x196c610 .functor OR 1, L_0x19731a0, L_0x196c4d0, C4<0>, C4<0>; +v0x18e9350_0 .net "a", 0 0, L_0x1975500; 1 drivers +v0x18e9410_0 .net "abxor", 0 0, L_0x1972c50; 1 drivers +v0x18e94b0_0 .net "b", 0 0, L_0x19755a0; 1 drivers +v0x18e9550_0 .net "bxorand", 0 0, L_0x19731a0; 1 drivers +v0x18e9600_0 .alias "defaultCompare", 0 0, v0x18ee830_0; +v0x18e96a0_0 .alias "out", 0 0, v0x18ee950_0; +v0x18e9720_0 .net "xornot", 0 0, L_0x196c470; 1 drivers +v0x18e97a0_0 .net "xornotand", 0 0, L_0x196c4d0; 1 drivers +S_0x18e8c30 .scope module, "bit13" "single_slt" 22 87, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x196c3a0 .functor XOR 1, L_0x1975a10, L_0x1975b00, C4<0>, C4<0>; +L_0x196c400 .functor AND 1, L_0x1975b00, L_0x196c3a0, C4<1>, C4<1>; +L_0x19757c0 .functor NOT 1, L_0x196c3a0, C4<0>, C4<0>, C4<0>; +L_0x1975820 .functor AND 1, L_0x19757c0, L_0x196c610, C4<1>, C4<1>; +L_0x1975960 .functor OR 1, L_0x196c400, L_0x1975820, C4<0>, C4<0>; +v0x18e8d20_0 .net "a", 0 0, L_0x1975a10; 1 drivers +v0x18e8de0_0 .net "abxor", 0 0, L_0x196c3a0; 1 drivers +v0x18e8e80_0 .net "b", 0 0, L_0x1975b00; 1 drivers +v0x18e8f20_0 .net "bxorand", 0 0, L_0x196c400; 1 drivers +v0x18e8fd0_0 .alias "defaultCompare", 0 0, v0x18ee950_0; +v0x18e9070_0 .alias "out", 0 0, v0x18eea20_0; +v0x18e90f0_0 .net "xornot", 0 0, L_0x19757c0; 1 drivers +v0x18e9170_0 .net "xornotand", 0 0, L_0x1975820; 1 drivers +S_0x18e8600 .scope module, "bit14" "single_slt" 22 88, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1975640 .functor XOR 1, L_0x1975f80, L_0x1976070, C4<0>, C4<0>; +L_0x19756a0 .functor AND 1, L_0x1976070, L_0x1975640, C4<1>, C4<1>; +L_0x1975d30 .functor NOT 1, L_0x1975640, C4<0>, C4<0>, C4<0>; +L_0x1975d90 .functor AND 1, L_0x1975d30, L_0x1975960, C4<1>, C4<1>; +L_0x1975ed0 .functor OR 1, L_0x19756a0, L_0x1975d90, C4<0>, C4<0>; +v0x18e86f0_0 .net "a", 0 0, L_0x1975f80; 1 drivers +v0x18e87b0_0 .net "abxor", 0 0, L_0x1975640; 1 drivers +v0x18e8850_0 .net "b", 0 0, L_0x1976070; 1 drivers +v0x18e88f0_0 .net "bxorand", 0 0, L_0x19756a0; 1 drivers +v0x18e89a0_0 .alias "defaultCompare", 0 0, v0x18eea20_0; +v0x18e8a40_0 .alias "out", 0 0, v0x18eeaa0_0; +v0x18e8ac0_0 .net "xornot", 0 0, L_0x1975d30; 1 drivers +v0x18e8b40_0 .net "xornotand", 0 0, L_0x1975d90; 1 drivers +S_0x18e7fd0 .scope module, "bit15" "single_slt" 22 89, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1975ba0 .functor XOR 1, L_0x1976500, L_0x19765f0, C4<0>, C4<0>; +L_0x1975c00 .functor AND 1, L_0x19765f0, L_0x1975ba0, C4<1>, C4<1>; +L_0x19762b0 .functor NOT 1, L_0x1975ba0, C4<0>, C4<0>, C4<0>; +L_0x1976310 .functor AND 1, L_0x19762b0, L_0x1975ed0, C4<1>, C4<1>; +L_0x1976450 .functor OR 1, L_0x1975c00, L_0x1976310, C4<0>, C4<0>; +v0x18e80c0_0 .net "a", 0 0, L_0x1976500; 1 drivers +v0x18e8180_0 .net "abxor", 0 0, L_0x1975ba0; 1 drivers +v0x18e8220_0 .net "b", 0 0, L_0x19765f0; 1 drivers +v0x18e82c0_0 .net "bxorand", 0 0, L_0x1975c00; 1 drivers +v0x18e8370_0 .alias "defaultCompare", 0 0, v0x18eeaa0_0; +v0x18e8410_0 .alias "out", 0 0, v0x18eeb70_0; +v0x18e8490_0 .net "xornot", 0 0, L_0x19762b0; 1 drivers +v0x18e8510_0 .net "xornotand", 0 0, L_0x1976310; 1 drivers +S_0x18e79a0 .scope module, "bit16" "single_slt" 22 90, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1976110 .functor XOR 1, L_0x1976a90, L_0x1976b80, C4<0>, C4<0>; +L_0x1976170 .functor AND 1, L_0x1976b80, L_0x1976110, C4<1>, C4<1>; +L_0x1976840 .functor NOT 1, L_0x1976110, C4<0>, C4<0>, C4<0>; +L_0x19768a0 .functor AND 1, L_0x1976840, L_0x1976450, C4<1>, C4<1>; +L_0x19769e0 .functor OR 1, L_0x1976170, L_0x19768a0, C4<0>, C4<0>; +v0x18e7a90_0 .net "a", 0 0, L_0x1976a90; 1 drivers +v0x18e7b50_0 .net "abxor", 0 0, L_0x1976110; 1 drivers +v0x18e7bf0_0 .net "b", 0 0, L_0x1976b80; 1 drivers +v0x18e7c90_0 .net "bxorand", 0 0, L_0x1976170; 1 drivers +v0x18e7d40_0 .alias "defaultCompare", 0 0, v0x18eeb70_0; +v0x18e7de0_0 .alias "out", 0 0, v0x18eec40_0; +v0x18e7e60_0 .net "xornot", 0 0, L_0x1976840; 1 drivers +v0x18e7ee0_0 .net "xornotand", 0 0, L_0x19768a0; 1 drivers +S_0x18e7370 .scope module, "bit17" "single_slt" 22 91, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1976690 .functor XOR 1, L_0x1976fe0, L_0x19770d0, C4<0>, C4<0>; +L_0x19766f0 .functor AND 1, L_0x19770d0, L_0x1976690, C4<1>, C4<1>; +L_0x1976d90 .functor NOT 1, L_0x1976690, C4<0>, C4<0>, C4<0>; +L_0x1976df0 .functor AND 1, L_0x1976d90, L_0x19769e0, C4<1>, C4<1>; +L_0x1976f30 .functor OR 1, L_0x19766f0, L_0x1976df0, C4<0>, C4<0>; +v0x18e7460_0 .net "a", 0 0, L_0x1976fe0; 1 drivers +v0x18e7520_0 .net "abxor", 0 0, L_0x1976690; 1 drivers +v0x18e75c0_0 .net "b", 0 0, L_0x19770d0; 1 drivers +v0x18e7660_0 .net "bxorand", 0 0, L_0x19766f0; 1 drivers +v0x18e7710_0 .alias "defaultCompare", 0 0, v0x18eec40_0; +v0x18e77b0_0 .alias "out", 0 0, v0x18eed10_0; +v0x18e7830_0 .net "xornot", 0 0, L_0x1976d90; 1 drivers +v0x18e78b0_0 .net "xornotand", 0 0, L_0x1976df0; 1 drivers +S_0x18e6d40 .scope module, "bit18" "single_slt" 22 92, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1976c20 .functor XOR 1, L_0x1977540, L_0x1977630, C4<0>, C4<0>; +L_0x1976c80 .functor AND 1, L_0x1977630, L_0x1976c20, C4<1>, C4<1>; +L_0x19772f0 .functor NOT 1, L_0x1976c20, C4<0>, C4<0>, C4<0>; +L_0x1977350 .functor AND 1, L_0x19772f0, L_0x1976f30, C4<1>, C4<1>; +L_0x1977490 .functor OR 1, L_0x1976c80, L_0x1977350, C4<0>, C4<0>; +v0x18e6e30_0 .net "a", 0 0, L_0x1977540; 1 drivers +v0x18e6ef0_0 .net "abxor", 0 0, L_0x1976c20; 1 drivers +v0x18e6f90_0 .net "b", 0 0, L_0x1977630; 1 drivers +v0x18e7030_0 .net "bxorand", 0 0, L_0x1976c80; 1 drivers +v0x18e70e0_0 .alias "defaultCompare", 0 0, v0x18eed10_0; +v0x18e7180_0 .alias "out", 0 0, v0x18eee60_0; +v0x18e7200_0 .net "xornot", 0 0, L_0x19772f0; 1 drivers +v0x18e7280_0 .net "xornotand", 0 0, L_0x1977350; 1 drivers +S_0x18e6710 .scope module, "bit19" "single_slt" 22 93, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1977170 .functor XOR 1, L_0x1977ab0, L_0x1977ba0, C4<0>, C4<0>; +L_0x19771d0 .functor AND 1, L_0x1977ba0, L_0x1977170, C4<1>, C4<1>; +L_0x1977860 .functor NOT 1, L_0x1977170, C4<0>, C4<0>, C4<0>; +L_0x19778c0 .functor AND 1, L_0x1977860, L_0x1977490, C4<1>, C4<1>; +L_0x1977a00 .functor OR 1, L_0x19771d0, L_0x19778c0, C4<0>, C4<0>; +v0x18e6800_0 .net "a", 0 0, L_0x1977ab0; 1 drivers +v0x18e68c0_0 .net "abxor", 0 0, L_0x1977170; 1 drivers +v0x18e6960_0 .net "b", 0 0, L_0x1977ba0; 1 drivers +v0x18e6a00_0 .net "bxorand", 0 0, L_0x19771d0; 1 drivers +v0x18e6ab0_0 .alias "defaultCompare", 0 0, v0x18eee60_0; +v0x18e6b50_0 .alias "out", 0 0, v0x18eef30_0; +v0x18e6bd0_0 .net "xornot", 0 0, L_0x1977860; 1 drivers +v0x18e6c50_0 .net "xornotand", 0 0, L_0x19778c0; 1 drivers +S_0x18e60e0 .scope module, "bit20" "single_slt" 22 94, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19776d0 .functor XOR 1, L_0x1978030, L_0x1978120, C4<0>, C4<0>; +L_0x1977730 .functor AND 1, L_0x1978120, L_0x19776d0, C4<1>, C4<1>; +L_0x1977de0 .functor NOT 1, L_0x19776d0, C4<0>, C4<0>, C4<0>; +L_0x1977e40 .functor AND 1, L_0x1977de0, L_0x1977a00, C4<1>, C4<1>; +L_0x1977f80 .functor OR 1, L_0x1977730, L_0x1977e40, C4<0>, C4<0>; +v0x18e61d0_0 .net "a", 0 0, L_0x1978030; 1 drivers +v0x18e6290_0 .net "abxor", 0 0, L_0x19776d0; 1 drivers +v0x18e6330_0 .net "b", 0 0, L_0x1978120; 1 drivers +v0x18e63d0_0 .net "bxorand", 0 0, L_0x1977730; 1 drivers +v0x18e6480_0 .alias "defaultCompare", 0 0, v0x18eef30_0; +v0x18e6520_0 .alias "out", 0 0, v0x18ef0e0_0; +v0x18e65a0_0 .net "xornot", 0 0, L_0x1977de0; 1 drivers +v0x18e6620_0 .net "xornotand", 0 0, L_0x1977e40; 1 drivers +S_0x18e5ab0 .scope module, "bit21" "single_slt" 22 95, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1977c40 .functor XOR 1, L_0x19785c0, L_0x19786b0, C4<0>, C4<0>; +L_0x1977ca0 .functor AND 1, L_0x19786b0, L_0x1977c40, C4<1>, C4<1>; +L_0x1978370 .functor NOT 1, L_0x1977c40, C4<0>, C4<0>, C4<0>; +L_0x19783d0 .functor AND 1, L_0x1978370, L_0x1977f80, C4<1>, C4<1>; +L_0x1978510 .functor OR 1, L_0x1977ca0, L_0x19783d0, C4<0>, C4<0>; +v0x18e5ba0_0 .net "a", 0 0, L_0x19785c0; 1 drivers +v0x18e5c60_0 .net "abxor", 0 0, L_0x1977c40; 1 drivers +v0x18e5d00_0 .net "b", 0 0, L_0x19786b0; 1 drivers +v0x18e5da0_0 .net "bxorand", 0 0, L_0x1977ca0; 1 drivers +v0x18e5e50_0 .alias "defaultCompare", 0 0, v0x18ef0e0_0; +v0x18e5ef0_0 .alias "out", 0 0, v0x18ef200_0; +v0x18e5f70_0 .net "xornot", 0 0, L_0x1978370; 1 drivers +v0x18e5ff0_0 .net "xornotand", 0 0, L_0x19783d0; 1 drivers +S_0x18e5480 .scope module, "bit22" "single_slt" 22 96, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x19781c0 .functor XOR 1, L_0x193f0e0, L_0x193f1d0, C4<0>, C4<0>; +L_0x1978220 .functor AND 1, L_0x193f1d0, L_0x19781c0, C4<1>, C4<1>; +L_0x193ee90 .functor NOT 1, L_0x19781c0, C4<0>, C4<0>, C4<0>; +L_0x193eef0 .functor AND 1, L_0x193ee90, L_0x1978510, C4<1>, C4<1>; +L_0x193f030 .functor OR 1, L_0x1978220, L_0x193eef0, C4<0>, C4<0>; +v0x18e5570_0 .net "a", 0 0, L_0x193f0e0; 1 drivers +v0x18e5630_0 .net "abxor", 0 0, L_0x19781c0; 1 drivers +v0x18e56d0_0 .net "b", 0 0, L_0x193f1d0; 1 drivers +v0x18e5770_0 .net "bxorand", 0 0, L_0x1978220; 1 drivers +v0x18e5820_0 .alias "defaultCompare", 0 0, v0x18ef200_0; +v0x18e58c0_0 .alias "out", 0 0, v0x18ef2d0_0; +v0x18e5940_0 .net "xornot", 0 0, L_0x193ee90; 1 drivers +v0x18e59c0_0 .net "xornotand", 0 0, L_0x193eef0; 1 drivers +S_0x18e4e50 .scope module, "bit23" "single_slt" 22 97, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x193f3f0 .functor XOR 1, L_0x19798a0, L_0x1979990, C4<0>, C4<0>; +L_0x193f450 .functor AND 1, L_0x1979990, L_0x193f3f0, C4<1>, C4<1>; +L_0x193ed70 .functor NOT 1, L_0x193f3f0, C4<0>, C4<0>, C4<0>; +L_0x193edd0 .functor AND 1, L_0x193ed70, L_0x193f030, C4<1>, C4<1>; +L_0x19797f0 .functor OR 1, L_0x193f450, L_0x193edd0, C4<0>, C4<0>; +v0x18e4f40_0 .net "a", 0 0, L_0x19798a0; 1 drivers +v0x18e5000_0 .net "abxor", 0 0, L_0x193f3f0; 1 drivers +v0x18e50a0_0 .net "b", 0 0, L_0x1979990; 1 drivers +v0x18e5140_0 .net "bxorand", 0 0, L_0x193f450; 1 drivers +v0x18e51f0_0 .alias "defaultCompare", 0 0, v0x18ef2d0_0; +v0x18e5290_0 .alias "out", 0 0, v0x18ef400_0; +v0x18e5310_0 .net "xornot", 0 0, L_0x193ed70; 1 drivers +v0x18e5390_0 .net "xornotand", 0 0, L_0x193edd0; 1 drivers +S_0x18e4820 .scope module, "bit24" "single_slt" 22 98, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x193f270 .functor XOR 1, L_0x1979e10, L_0x1979f00, C4<0>, C4<0>; +L_0x193f2d0 .functor AND 1, L_0x1979f00, L_0x193f270, C4<1>, C4<1>; +L_0x1979bc0 .functor NOT 1, L_0x193f270, C4<0>, C4<0>, C4<0>; +L_0x1979c20 .functor AND 1, L_0x1979bc0, L_0x19797f0, C4<1>, C4<1>; +L_0x1979d60 .functor OR 1, L_0x193f2d0, L_0x1979c20, C4<0>, C4<0>; +v0x18e4910_0 .net "a", 0 0, L_0x1979e10; 1 drivers +v0x18e49d0_0 .net "abxor", 0 0, L_0x193f270; 1 drivers +v0x18e4a70_0 .net "b", 0 0, L_0x1979f00; 1 drivers +v0x18e4b10_0 .net "bxorand", 0 0, L_0x193f2d0; 1 drivers +v0x18e4bc0_0 .alias "defaultCompare", 0 0, v0x18ef400_0; +v0x18e4c60_0 .alias "out", 0 0, v0x18ef480_0; +v0x18e4ce0_0 .net "xornot", 0 0, L_0x1979bc0; 1 drivers +v0x18e4d60_0 .net "xornotand", 0 0, L_0x1979c20; 1 drivers +S_0x18e41f0 .scope module, "bit25" "single_slt" 22 99, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1979a30 .functor XOR 1, L_0x197a390, L_0x197a480, C4<0>, C4<0>; +L_0x1979a90 .functor AND 1, L_0x197a480, L_0x1979a30, C4<1>, C4<1>; +L_0x197a140 .functor NOT 1, L_0x1979a30, C4<0>, C4<0>, C4<0>; +L_0x197a1a0 .functor AND 1, L_0x197a140, L_0x1979d60, C4<1>, C4<1>; +L_0x197a2e0 .functor OR 1, L_0x1979a90, L_0x197a1a0, C4<0>, C4<0>; +v0x18e42e0_0 .net "a", 0 0, L_0x197a390; 1 drivers +v0x18e43a0_0 .net "abxor", 0 0, L_0x1979a30; 1 drivers +v0x18e4440_0 .net "b", 0 0, L_0x197a480; 1 drivers +v0x18e44e0_0 .net "bxorand", 0 0, L_0x1979a90; 1 drivers +v0x18e4590_0 .alias "defaultCompare", 0 0, v0x18ef480_0; +v0x18e4630_0 .alias "out", 0 0, v0x18ef5c0_0; +v0x18e46b0_0 .net "xornot", 0 0, L_0x197a140; 1 drivers +v0x18e4730_0 .net "xornotand", 0 0, L_0x197a1a0; 1 drivers +S_0x18e3bc0 .scope module, "bit26" "single_slt" 22 100, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x1979fa0 .functor XOR 1, L_0x197a910, L_0x197aa00, C4<0>, C4<0>; +L_0x197a000 .functor AND 1, L_0x197aa00, L_0x1979fa0, C4<1>, C4<1>; +L_0x197a6d0 .functor NOT 1, L_0x1979fa0, C4<0>, C4<0>, C4<0>; +L_0x197a730 .functor AND 1, L_0x197a6d0, L_0x197a2e0, C4<1>, C4<1>; +L_0x18ef3a0 .functor OR 1, L_0x197a000, L_0x197a730, C4<0>, C4<0>; +v0x18e3cb0_0 .net "a", 0 0, L_0x197a910; 1 drivers +v0x18e3d70_0 .net "abxor", 0 0, L_0x1979fa0; 1 drivers +v0x18e3e10_0 .net "b", 0 0, L_0x197aa00; 1 drivers +v0x18e3eb0_0 .net "bxorand", 0 0, L_0x197a000; 1 drivers +v0x18e3f60_0 .alias "defaultCompare", 0 0, v0x18ef5c0_0; +v0x18e4000_0 .alias "out", 0 0, v0x18ef640_0; +v0x18e4080_0 .net "xornot", 0 0, L_0x197a6d0; 1 drivers +v0x18e4100_0 .net "xornotand", 0 0, L_0x197a730; 1 drivers +S_0x18e3590 .scope module, "bit27" "single_slt" 22 101, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x197a520 .functor XOR 1, L_0x197ae60, L_0x197af50, C4<0>, C4<0>; +L_0x197a580 .functor AND 1, L_0x197af50, L_0x197a520, C4<1>, C4<1>; +L_0x197ac60 .functor NOT 1, L_0x197a520, C4<0>, C4<0>, C4<0>; +L_0x197acc0 .functor AND 1, L_0x197ac60, L_0x18ef3a0, C4<1>, C4<1>; +L_0x197adb0 .functor OR 1, L_0x197a580, L_0x197acc0, C4<0>, C4<0>; +v0x18e3680_0 .net "a", 0 0, L_0x197ae60; 1 drivers +v0x18e3740_0 .net "abxor", 0 0, L_0x197a520; 1 drivers +v0x18e37e0_0 .net "b", 0 0, L_0x197af50; 1 drivers +v0x18e3880_0 .net "bxorand", 0 0, L_0x197a580; 1 drivers +v0x18e3930_0 .alias "defaultCompare", 0 0, v0x18ef640_0; +v0x18e39d0_0 .alias "out", 0 0, v0x18ef790_0; +v0x18e3a50_0 .net "xornot", 0 0, L_0x197ac60; 1 drivers +v0x18e3ad0_0 .net "xornotand", 0 0, L_0x197acc0; 1 drivers +S_0x18e2f90 .scope module, "bit28" "single_slt" 22 102, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x197aaa0 .functor XOR 1, L_0x197b3b0, L_0x197b4a0, C4<0>, C4<0>; +L_0x197ab00 .functor AND 1, L_0x197b4a0, L_0x197aaa0, C4<1>, C4<1>; +L_0x197ac00 .functor NOT 1, L_0x197aaa0, C4<0>, C4<0>, C4<0>; +L_0x197b1c0 .functor AND 1, L_0x197ac00, L_0x197adb0, C4<1>, C4<1>; +L_0x197b300 .functor OR 1, L_0x197ab00, L_0x197b1c0, C4<0>, C4<0>; +v0x18e3080_0 .net "a", 0 0, L_0x197b3b0; 1 drivers +v0x18e3140_0 .net "abxor", 0 0, L_0x197aaa0; 1 drivers +v0x18e31e0_0 .net "b", 0 0, L_0x197b4a0; 1 drivers +v0x18e3280_0 .net "bxorand", 0 0, L_0x197ab00; 1 drivers +v0x18e3300_0 .alias "defaultCompare", 0 0, v0x18ef790_0; +v0x18e33a0_0 .alias "out", 0 0, v0x18ef810_0; +v0x18e3420_0 .net "xornot", 0 0, L_0x197ac00; 1 drivers +v0x18e34a0_0 .net "xornotand", 0 0, L_0x197b1c0; 1 drivers +S_0x18e2990 .scope module, "bit29" "single_slt" 22 103, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x197aff0 .functor XOR 1, L_0x197b910, L_0x197ba00, C4<0>, C4<0>; +L_0x197b050 .functor AND 1, L_0x197ba00, L_0x197aff0, C4<1>, C4<1>; +L_0x197b150 .functor NOT 1, L_0x197aff0, C4<0>, C4<0>, C4<0>; +L_0x197b720 .functor AND 1, L_0x197b150, L_0x197b300, C4<1>, C4<1>; +L_0x197b860 .functor OR 1, L_0x197b050, L_0x197b720, C4<0>, C4<0>; +v0x18e2a80_0 .net "a", 0 0, L_0x197b910; 1 drivers +v0x18e2b40_0 .net "abxor", 0 0, L_0x197aff0; 1 drivers +v0x18e2be0_0 .net "b", 0 0, L_0x197ba00; 1 drivers +v0x18e2c80_0 .net "bxorand", 0 0, L_0x197b050; 1 drivers +v0x18e2d00_0 .alias "defaultCompare", 0 0, v0x18ef810_0; +v0x18e2da0_0 .alias "out", 0 0, v0x18ef710_0; +v0x18e2e20_0 .net "xornot", 0 0, L_0x197b150; 1 drivers +v0x18e2ea0_0 .net "xornotand", 0 0, L_0x197b720; 1 drivers +S_0x18e2390 .scope module, "bit30" "single_slt" 22 104, 22 1, S_0x18e1cb0; + .timescale 0 0; +L_0x197b540 .functor XOR 1, L_0x197be80, L_0x197bf70, C4<0>, C4<0>; +L_0x197b5a0 .functor AND 1, L_0x197bf70, L_0x197b540, C4<1>, C4<1>; +L_0x197b6a0 .functor NOT 1, L_0x197b540, C4<0>, C4<0>, C4<0>; +L_0x197bc90 .functor AND 1, L_0x197b6a0, L_0x197b860, C4<1>, C4<1>; +L_0x197bdd0 .functor OR 1, L_0x197b5a0, L_0x197bc90, C4<0>, C4<0>; +v0x18e2480_0 .net "a", 0 0, L_0x197be80; 1 drivers +v0x18e2540_0 .net "abxor", 0 0, L_0x197b540; 1 drivers +v0x18e25e0_0 .net "b", 0 0, L_0x197bf70; 1 drivers +v0x18e2680_0 .net "bxorand", 0 0, L_0x197b5a0; 1 drivers +v0x18e2700_0 .alias "defaultCompare", 0 0, v0x18ef710_0; +v0x18e27a0_0 .alias "out", 0 0, v0x18ef8e0_0; +v0x18e2820_0 .net "xornot", 0 0, L_0x197b6a0; 1 drivers +v0x18e28a0_0 .net "xornotand", 0 0, L_0x197bc90; 1 drivers +S_0x18e1da0 .scope module, "bit31" "single_slt_reversed" 22 106, 22 19, S_0x18e1cb0; + .timescale 0 0; +L_0x197bbe0 .functor XOR 1, L_0x197c010, L_0x197c0b0, C4<0>, C4<0>; +L_0x197c210 .functor AND 1, L_0x197c010, L_0x197bbe0, C4<1>, C4<1>; +L_0x197c2c0 .functor NOT 1, L_0x197bbe0, C4<0>, C4<0>, C4<0>; +L_0x197c320 .functor AND 1, L_0x197c2c0, L_0x197bdd0, C4<1>, C4<1>; +L_0x197c460 .functor OR 1, L_0x197c210, L_0x197c320, C4<0>, C4<0>; +v0x18e1e90_0 .net "a", 0 0, L_0x197c010; 1 drivers +v0x18e1f50_0 .net "abxor", 0 0, L_0x197bbe0; 1 drivers +v0x18e1ff0_0 .net "axorand", 0 0, L_0x197c210; 1 drivers +v0x18e2090_0 .net "b", 0 0, L_0x197c0b0; 1 drivers +v0x18e2110_0 .alias "defaultCompare", 0 0, v0x18ef8e0_0; +v0x18e21b0_0 .net "out", 0 0, L_0x197c460; 1 drivers +v0x18e2250_0 .net "xornot", 0 0, L_0x197c2c0; 1 drivers +v0x18e22f0_0 .net "xornotand", 0 0, L_0x197c320; 1 drivers +S_0x18dda60 .scope module, "and0" "and_32bit" 19 37, 23 1, S_0x182e070; + .timescale 0 0; +L_0x197c8c0 .functor AND 1, L_0x197c970, L_0x197ca60, C4<1>, C4<1>; +L_0x197cbf0 .functor AND 1, L_0x197cca0, L_0x197cd90, C4<1>, C4<1>; +L_0x197cfb0 .functor AND 1, L_0x197d010, L_0x197d150, C4<1>, C4<1>; +L_0x197d340 .functor AND 1, L_0x197d3a0, L_0x197d490, C4<1>, C4<1>; +L_0x197d2e0 .functor AND 1, L_0x197d6e0, L_0x197d850, C4<1>, C4<1>; +L_0x197da70 .functor AND 1, L_0x197db20, L_0x197dc10, C4<1>, C4<1>; +L_0x197d9e0 .functor AND 1, L_0x197df50, L_0x197dd00, C4<1>, C4<1>; +L_0x197e040 .functor AND 1, L_0x197e2f0, L_0x197e3e0, C4<1>, C4<1>; +L_0x197e5a0 .functor AND 1, L_0x197e650, L_0x197e4d0, C4<1>, C4<1>; +L_0x197e740 .functor AND 1, L_0x197ea60, L_0x197eb00, C4<1>, C4<1>; +L_0x197ecf0 .functor AND 1, L_0x197ed50, L_0x197ebf0, C4<1>, C4<1>; +L_0x197ee40 .functor AND 1, L_0x197f110, L_0x197f1b0, C4<1>, C4<1>; +L_0x197ea00 .functor AND 1, L_0x197f3d0, L_0x197f2a0, C4<1>, C4<1>; +L_0x197f4c0 .functor AND 1, L_0x197f7f0, L_0x197f890, C4<1>, C4<1>; +L_0x197f740 .functor AND 1, L_0x197de40, L_0x197f980, C4<1>, C4<1>; +L_0x197fa70 .functor AND 1, L_0x1980080, L_0x1980120, C4<1>, C4<1>; +L_0x197ffa0 .functor AND 1, L_0x19803a0, L_0x1980210, C4<1>, C4<1>; +L_0x1980640 .functor AND 1, L_0x1980790, L_0x1980830, C4<1>, C4<1>; +L_0x1980530 .functor AND 1, L_0x1980ae0, L_0x1980920, C4<1>, C4<1>; +L_0x1980d60 .functor AND 1, L_0x19806f0, L_0x1980f10, C4<1>, C4<1>; +L_0x1980c20 .functor AND 1, L_0x19811f0, L_0x1981000, C4<1>, C4<1>; +L_0x1981190 .functor AND 1, L_0x1980e10, L_0x1981600, C4<1>, C4<1>; +L_0x1981330 .functor AND 1, L_0x19813e0, L_0x19816f0, C4<1>, C4<1>; +L_0x1981880 .functor AND 1, L_0x19814f0, L_0x1981d10, C4<1>, C4<1>; +L_0x1981a00 .functor AND 1, L_0x1981ab0, L_0x1982060, C4<1>, C4<1>; +L_0x1981e00 .functor AND 1, L_0x1981f90, L_0x1982460, C4<1>, C4<1>; +L_0x1982290 .functor AND 1, L_0x1982340, L_0x1982790, C4<1>, C4<1>; +L_0x1982500 .functor AND 1, L_0x1981eb0, L_0x19826f0, C4<1>, C4<1>; +L_0x19829c0 .functor AND 1, L_0x1982a70, L_0x1982ed0, C4<1>, C4<1>; +L_0x1982c10 .functor AND 1, L_0x19825b0, L_0x1982dc0, C4<1>, C4<1>; +L_0x18dee70 .functor AND 1, L_0x197fae0, L_0x197fbd0, C4<1>, C4<1>; +L_0x19830b0 .functor AND 1, L_0x1982cc0, L_0x1983aa0, C4<1>, C4<1>; +v0x18ddb50_0 .net *"_s0", 0 0, L_0x197c8c0; 1 drivers +v0x18ddbf0_0 .net *"_s101", 0 0, L_0x1980210; 1 drivers +v0x18ddc90_0 .net *"_s102", 0 0, L_0x1980640; 1 drivers +v0x18ddd30_0 .net *"_s105", 0 0, L_0x1980790; 1 drivers +v0x18dddb0_0 .net *"_s107", 0 0, L_0x1980830; 1 drivers +v0x18dde50_0 .net *"_s108", 0 0, L_0x1980530; 1 drivers +v0x18ddef0_0 .net *"_s11", 0 0, L_0x197cd90; 1 drivers +v0x18ddf90_0 .net *"_s111", 0 0, L_0x1980ae0; 1 drivers +v0x18de080_0 .net *"_s113", 0 0, L_0x1980920; 1 drivers +v0x18de120_0 .net *"_s114", 0 0, L_0x1980d60; 1 drivers +v0x18de1c0_0 .net *"_s117", 0 0, L_0x19806f0; 1 drivers +v0x18de260_0 .net *"_s119", 0 0, L_0x1980f10; 1 drivers +v0x18de300_0 .net *"_s12", 0 0, L_0x197cfb0; 1 drivers +v0x18de3a0_0 .net *"_s120", 0 0, L_0x1980c20; 1 drivers +v0x18de4c0_0 .net *"_s123", 0 0, L_0x19811f0; 1 drivers +v0x18de560_0 .net *"_s125", 0 0, L_0x1981000; 1 drivers +v0x18de420_0 .net *"_s126", 0 0, L_0x1981190; 1 drivers +v0x18de6b0_0 .net *"_s129", 0 0, L_0x1980e10; 1 drivers +v0x18de7d0_0 .net *"_s131", 0 0, L_0x1981600; 1 drivers +v0x18de850_0 .net *"_s132", 0 0, L_0x1981330; 1 drivers +v0x18de730_0 .net *"_s135", 0 0, L_0x19813e0; 1 drivers +v0x18de980_0 .net *"_s137", 0 0, L_0x19816f0; 1 drivers +v0x18de8d0_0 .net *"_s138", 0 0, L_0x1981880; 1 drivers +v0x18deac0_0 .net *"_s141", 0 0, L_0x19814f0; 1 drivers +v0x18dea20_0 .net *"_s143", 0 0, L_0x1981d10; 1 drivers +v0x18dec10_0 .net *"_s144", 0 0, L_0x1981a00; 1 drivers +v0x18deb60_0 .net *"_s147", 0 0, L_0x1981ab0; 1 drivers +v0x18ded70_0 .net *"_s149", 0 0, L_0x1982060; 1 drivers +v0x18decb0_0 .net *"_s15", 0 0, L_0x197d010; 1 drivers +v0x18deee0_0 .net *"_s150", 0 0, L_0x1981e00; 1 drivers +v0x18dedf0_0 .net *"_s153", 0 0, L_0x1981f90; 1 drivers +v0x18df060_0 .net *"_s155", 0 0, L_0x1982460; 1 drivers +v0x18def60_0 .net *"_s156", 0 0, L_0x1982290; 1 drivers +v0x18df1f0_0 .net *"_s159", 0 0, L_0x1982340; 1 drivers +v0x18df0e0_0 .net *"_s161", 0 0, L_0x1982790; 1 drivers +v0x18df390_0 .net *"_s162", 0 0, L_0x1982500; 1 drivers +v0x18df270_0 .net *"_s165", 0 0, L_0x1981eb0; 1 drivers +v0x18df310_0 .net *"_s167", 0 0, L_0x19826f0; 1 drivers +v0x18df550_0 .net *"_s168", 0 0, L_0x19829c0; 1 drivers +v0x18df5d0_0 .net *"_s17", 0 0, L_0x197d150; 1 drivers +v0x18df410_0 .net *"_s171", 0 0, L_0x1982a70; 1 drivers +v0x18df4b0_0 .net *"_s173", 0 0, L_0x1982ed0; 1 drivers +v0x18df7b0_0 .net *"_s174", 0 0, L_0x1982c10; 1 drivers +v0x18df830_0 .net *"_s177", 0 0, L_0x19825b0; 1 drivers +v0x18df650_0 .net *"_s179", 0 0, L_0x1982dc0; 1 drivers +v0x18df6f0_0 .net *"_s18", 0 0, L_0x197d340; 1 drivers +v0x18dfa30_0 .net *"_s180", 0 0, L_0x18dee70; 1 drivers +v0x18dfab0_0 .net *"_s183", 0 0, L_0x197fae0; 1 drivers +v0x18df8d0_0 .net *"_s185", 0 0, L_0x197fbd0; 1 drivers +v0x18df970_0 .net *"_s186", 0 0, L_0x19830b0; 1 drivers +v0x18dfcd0_0 .net *"_s189", 0 0, L_0x1982cc0; 1 drivers +v0x18dfd50_0 .net *"_s191", 0 0, L_0x1983aa0; 1 drivers +v0x18dfb50_0 .net *"_s21", 0 0, L_0x197d3a0; 1 drivers +v0x18dfbf0_0 .net *"_s23", 0 0, L_0x197d490; 1 drivers +v0x18dff90_0 .net *"_s24", 0 0, L_0x197d2e0; 1 drivers +v0x18e0010_0 .net *"_s27", 0 0, L_0x197d6e0; 1 drivers +v0x18dfdd0_0 .net *"_s29", 0 0, L_0x197d850; 1 drivers +v0x18dfe70_0 .net *"_s3", 0 0, L_0x197c970; 1 drivers +v0x18dff10_0 .net *"_s30", 0 0, L_0x197da70; 1 drivers +v0x18e0290_0 .net *"_s33", 0 0, L_0x197db20; 1 drivers +v0x18e00b0_0 .net *"_s35", 0 0, L_0x197dc10; 1 drivers +v0x18e0150_0 .net *"_s36", 0 0, L_0x197d9e0; 1 drivers +v0x18e01f0_0 .net *"_s39", 0 0, L_0x197df50; 1 drivers +v0x18e0530_0 .net *"_s41", 0 0, L_0x197dd00; 1 drivers +v0x18e0330_0 .net *"_s42", 0 0, L_0x197e040; 1 drivers +v0x18e03d0_0 .net *"_s45", 0 0, L_0x197e2f0; 1 drivers +v0x18e0470_0 .net *"_s47", 0 0, L_0x197e3e0; 1 drivers +v0x18e07d0_0 .net *"_s48", 0 0, L_0x197e5a0; 1 drivers +v0x18e05d0_0 .net *"_s5", 0 0, L_0x197ca60; 1 drivers +v0x18e0670_0 .net *"_s51", 0 0, L_0x197e650; 1 drivers +v0x18e0710_0 .net *"_s53", 0 0, L_0x197e4d0; 1 drivers +v0x18e0a90_0 .net *"_s54", 0 0, L_0x197e740; 1 drivers +v0x18e0850_0 .net *"_s57", 0 0, L_0x197ea60; 1 drivers +v0x18e08f0_0 .net *"_s59", 0 0, L_0x197eb00; 1 drivers +v0x18e0990_0 .net *"_s6", 0 0, L_0x197cbf0; 1 drivers +v0x18e0d70_0 .net *"_s60", 0 0, L_0x197ecf0; 1 drivers +v0x18e0b10_0 .net *"_s63", 0 0, L_0x197ed50; 1 drivers +v0x18e0bb0_0 .net *"_s65", 0 0, L_0x197ebf0; 1 drivers +v0x18e0c50_0 .net *"_s66", 0 0, L_0x197ee40; 1 drivers +v0x18e0cf0_0 .net *"_s69", 0 0, L_0x197f110; 1 drivers +v0x18e1080_0 .net *"_s71", 0 0, L_0x197f1b0; 1 drivers +v0x18e1100_0 .net *"_s72", 0 0, L_0x197ea00; 1 drivers +v0x18e0e10_0 .net *"_s75", 0 0, L_0x197f3d0; 1 drivers +v0x18e0eb0_0 .net *"_s77", 0 0, L_0x197f2a0; 1 drivers +v0x18e0f50_0 .net *"_s78", 0 0, L_0x197f4c0; 1 drivers +v0x18e0ff0_0 .net *"_s81", 0 0, L_0x197f7f0; 1 drivers +v0x18e1460_0 .net *"_s83", 0 0, L_0x197f890; 1 drivers +v0x18e1500_0 .net *"_s84", 0 0, L_0x197f740; 1 drivers +v0x18e11a0_0 .net *"_s87", 0 0, L_0x197de40; 1 drivers +v0x18e1240_0 .net *"_s89", 0 0, L_0x197f980; 1 drivers +v0x18e12e0_0 .net *"_s9", 0 0, L_0x197cca0; 1 drivers +v0x18e1380_0 .net *"_s90", 0 0, L_0x197fa70; 1 drivers +v0x18e1870_0 .net *"_s93", 0 0, L_0x1980080; 1 drivers +v0x18e18f0_0 .net *"_s95", 0 0, L_0x1980120; 1 drivers +v0x18e15a0_0 .net *"_s96", 0 0, L_0x197ffa0; 1 drivers +v0x18e1640_0 .net *"_s99", 0 0, L_0x19803a0; 1 drivers +v0x18e16e0_0 .alias "a", 31 0, v0x192d7a0_0; +v0x18e1760_0 .alias "b", 31 0, v0x191cfb0_0; +v0x18e17e0_0 .alias "out", 31 0, v0x191c2f0_0; +L_0x197c820 .part/pv L_0x197c8c0, 0, 1, 32; +L_0x197c970 .part L_0x1936840, 0, 1; +L_0x197ca60 .part v0x191ccc0_0, 0, 1; +L_0x197cb50 .part/pv L_0x197cbf0, 1, 1, 32; +L_0x197cca0 .part L_0x1936840, 1, 1; +L_0x197cd90 .part v0x191ccc0_0, 1, 1; +L_0x197ce80 .part/pv L_0x197cfb0, 2, 1, 32; +L_0x197d010 .part L_0x1936840, 2, 1; +L_0x197d150 .part v0x191ccc0_0, 2, 1; +L_0x197d240 .part/pv L_0x197d340, 3, 1, 32; +L_0x197d3a0 .part L_0x1936840, 3, 1; +L_0x197d490 .part v0x191ccc0_0, 3, 1; +L_0x197d5f0 .part/pv L_0x197d2e0, 4, 1, 32; +L_0x197d6e0 .part L_0x1936840, 4, 1; +L_0x197d850 .part v0x191ccc0_0, 4, 1; +L_0x197d940 .part/pv L_0x197da70, 5, 1, 32; +L_0x197db20 .part L_0x1936840, 5, 1; +L_0x197dc10 .part v0x191ccc0_0, 5, 1; +L_0x197dda0 .part/pv L_0x197d9e0, 6, 1, 32; +L_0x197df50 .part L_0x1936840, 6, 1; +L_0x197dd00 .part v0x191ccc0_0, 6, 1; +L_0x197e140 .part/pv L_0x197e040, 7, 1, 32; +L_0x197e2f0 .part L_0x1936840, 7, 1; +L_0x197e3e0 .part v0x191ccc0_0, 7, 1; +L_0x197e1e0 .part/pv L_0x197e5a0, 8, 1, 32; +L_0x197e650 .part L_0x1936840, 8, 1; +L_0x197e4d0 .part v0x191ccc0_0, 8, 1; +L_0x197e870 .part/pv L_0x197e740, 9, 1, 32; +L_0x197ea60 .part L_0x1936840, 9, 1; +L_0x197eb00 .part v0x191ccc0_0, 9, 1; +L_0x197e910 .part/pv L_0x197ecf0, 10, 1, 32; +L_0x197ed50 .part L_0x1936840, 10, 1; +L_0x197ebf0 .part v0x191ccc0_0, 10, 1; +L_0x197ef50 .part/pv L_0x197ee40, 11, 1, 32; +L_0x197f110 .part L_0x1936840, 11, 1; +L_0x197f1b0 .part v0x191ccc0_0, 11, 1; +L_0x197eff0 .part/pv L_0x197ea00, 12, 1, 32; +L_0x197f3d0 .part L_0x1936840, 12, 1; +L_0x197f2a0 .part v0x191ccc0_0, 12, 1; +L_0x197f600 .part/pv L_0x197f4c0, 13, 1, 32; +L_0x197f7f0 .part L_0x1936840, 13, 1; +L_0x197f890 .part v0x191ccc0_0, 13, 1; +L_0x197f6a0 .part/pv L_0x197f740, 14, 1, 32; +L_0x197de40 .part L_0x1936840, 14, 1; +L_0x197f980 .part v0x191ccc0_0, 14, 1; +L_0x197fe60 .part/pv L_0x197fa70, 15, 1, 32; +L_0x1980080 .part L_0x1936840, 15, 1; +L_0x1980120 .part v0x191ccc0_0, 15, 1; +L_0x197ff00 .part/pv L_0x197ffa0, 16, 1, 32; +L_0x19803a0 .part L_0x1936840, 16, 1; +L_0x1980210 .part v0x191ccc0_0, 16, 1; +L_0x1980300 .part/pv L_0x1980640, 17, 1, 32; +L_0x1980790 .part L_0x1936840, 17, 1; +L_0x1980830 .part v0x191ccc0_0, 17, 1; +L_0x1980490 .part/pv L_0x1980530, 18, 1, 32; +L_0x1980ae0 .part L_0x1936840, 18, 1; +L_0x1980920 .part v0x191ccc0_0, 18, 1; +L_0x1980a10 .part/pv L_0x1980d60, 19, 1, 32; +L_0x19806f0 .part L_0x1936840, 19, 1; +L_0x1980f10 .part v0x191ccc0_0, 19, 1; +L_0x1980b80 .part/pv L_0x1980c20, 20, 1, 32; +L_0x19811f0 .part L_0x1936840, 20, 1; +L_0x1981000 .part v0x191ccc0_0, 20, 1; +L_0x19810f0 .part/pv L_0x1981190, 21, 1, 32; +L_0x1980e10 .part L_0x1936840, 21, 1; +L_0x1981600 .part v0x191ccc0_0, 21, 1; +L_0x1981290 .part/pv L_0x1981330, 22, 1, 32; +L_0x19813e0 .part L_0x1936840, 22, 1; +L_0x19816f0 .part v0x191ccc0_0, 22, 1; +L_0x19817e0 .part/pv L_0x1981880, 23, 1, 32; +L_0x19814f0 .part L_0x1936840, 23, 1; +L_0x1981d10 .part v0x191ccc0_0, 23, 1; +L_0x1981960 .part/pv L_0x1981a00, 24, 1, 32; +L_0x1981ab0 .part L_0x1936840, 24, 1; +L_0x1982060 .part v0x191ccc0_0, 24, 1; +L_0x1982150 .part/pv L_0x1981e00, 25, 1, 32; +L_0x1981f90 .part L_0x1936840, 25, 1; +L_0x1982460 .part v0x191ccc0_0, 25, 1; +L_0x19821f0 .part/pv L_0x1982290, 26, 1, 32; +L_0x1982340 .part L_0x1936840, 26, 1; +L_0x1982790 .part v0x191ccc0_0, 26, 1; +L_0x1982880 .part/pv L_0x1982500, 27, 1, 32; +L_0x1981eb0 .part L_0x1936840, 27, 1; +L_0x19826f0 .part v0x191ccc0_0, 27, 1; +L_0x1982920 .part/pv L_0x19829c0, 28, 1, 32; +L_0x1982a70 .part L_0x1936840, 28, 1; +L_0x1982ed0 .part v0x191ccc0_0, 28, 1; +L_0x1982f70 .part/pv L_0x1982c10, 29, 1, 32; +L_0x19825b0 .part L_0x1936840, 29, 1; +L_0x1982dc0 .part v0x191ccc0_0, 29, 1; +L_0x19832f0 .part/pv L_0x18dee70, 30, 1, 32; +L_0x197fae0 .part L_0x1936840, 30, 1; +L_0x197fbd0 .part v0x191ccc0_0, 30, 1; +L_0x1983010 .part/pv L_0x19830b0, 31, 1, 32; +L_0x1982cc0 .part L_0x1936840, 31, 1; +L_0x1983aa0 .part v0x191ccc0_0, 31, 1; +S_0x17155e0 .scope module, "nand0" "nand_32bit" 19 38, 24 1, S_0x182e070; + .timescale 0 0; +L_0x1983890 .functor NAND 1, L_0x1983940, L_0x1983e50, C4<1>, C4<1>; +L_0x197d7d0 .functor NAND 1, L_0x1983f90, L_0x1984080, C4<1>, C4<1>; +L_0x19842a0 .functor NAND 1, L_0x1984300, L_0x1984440, C4<1>, C4<1>; +L_0x1984630 .functor NAND 1, L_0x1984690, L_0x1984780, C4<1>, C4<1>; +L_0x19845d0 .functor NAND 1, L_0x19849d0, L_0x1984b40, C4<1>, C4<1>; +L_0x1984d60 .functor NAND 1, L_0x1984e10, L_0x1984f00, C4<1>, C4<1>; +L_0x1984cd0 .functor NAND 1, L_0x1985240, L_0x1984ff0, C4<1>, C4<1>; +L_0x1985330 .functor NAND 1, L_0x19855e0, L_0x19856d0, C4<1>, C4<1>; +L_0x1985890 .functor NAND 1, L_0x1985940, L_0x19857c0, C4<1>, C4<1>; +L_0x1985a30 .functor NAND 1, L_0x1985d50, L_0x1985df0, C4<1>, C4<1>; +L_0x1985fe0 .functor NAND 1, L_0x1986040, L_0x1985ee0, C4<1>, C4<1>; +L_0x1986130 .functor NAND 1, L_0x1986400, L_0x1974cf0, C4<1>, C4<1>; +L_0x1985cf0 .functor NAND 1, L_0x1974f10, L_0x1974de0, C4<1>, C4<1>; +L_0x1984ac0 .functor NAND 1, L_0x1975330, L_0x1975420, C4<1>, C4<1>; +L_0x1975280 .functor NAND 1, L_0x1985130, L_0x19874b0, C4<1>, C4<1>; +L_0x19875a0 .functor NAND 1, L_0x1987bb0, L_0x1987c50, C4<1>, C4<1>; +L_0x1987ad0 .functor NAND 1, L_0x1987ed0, L_0x1987d40, C4<1>, C4<1>; +L_0x1988170 .functor NAND 1, L_0x19882c0, L_0x1988360, C4<1>, C4<1>; +L_0x1988060 .functor NAND 1, L_0x1988610, L_0x1988450, C4<1>, C4<1>; +L_0x1988890 .functor NAND 1, L_0x1988220, L_0x1988a40, C4<1>, C4<1>; +L_0x1988750 .functor NAND 1, L_0x1988d20, L_0x1988b30, C4<1>, C4<1>; +L_0x1988cc0 .functor NAND 1, L_0x1988940, L_0x1989130, C4<1>, C4<1>; +L_0x1988e60 .functor NAND 1, L_0x1988f10, L_0x1989220, C4<1>, C4<1>; +L_0x19893b0 .functor NAND 1, L_0x1989020, L_0x1989840, C4<1>, C4<1>; +L_0x1989530 .functor NAND 1, L_0x19895e0, L_0x1989b90, C4<1>, C4<1>; +L_0x1989930 .functor NAND 1, L_0x1989ac0, L_0x1989f90, C4<1>, C4<1>; +L_0x1989dc0 .functor NAND 1, L_0x1989e70, L_0x198a2c0, C4<1>, C4<1>; +L_0x198a030 .functor NAND 1, L_0x19899e0, L_0x198a220, C4<1>, C4<1>; +L_0x198a4f0 .functor NAND 1, L_0x198a5a0, L_0x198aa00, C4<1>, C4<1>; +L_0x198a740 .functor NAND 1, L_0x198a0e0, L_0x198a8f0, C4<1>, C4<1>; +L_0x18dac70 .functor NAND 1, L_0x1987610, L_0x1987700, C4<1>, C4<1>; +L_0x198abe0 .functor NAND 1, L_0x198a7f0, L_0x198b5d0, C4<1>, C4<1>; +v0x17156d0_0 .net *"_s0", 0 0, L_0x1983890; 1 drivers +v0x1715770_0 .net *"_s101", 0 0, L_0x1987d40; 1 drivers +v0x16cb0e0_0 .net *"_s102", 0 0, L_0x1988170; 1 drivers +v0x173a9d0_0 .net *"_s105", 0 0, L_0x19882c0; 1 drivers +v0x173aa50_0 .net *"_s107", 0 0, L_0x1988360; 1 drivers +v0x173aaf0_0 .net *"_s108", 0 0, L_0x1988060; 1 drivers +v0x173ab90_0 .net *"_s11", 0 0, L_0x1984080; 1 drivers +v0x18d9fa0_0 .net *"_s111", 0 0, L_0x1988610; 1 drivers +v0x18da020_0 .net *"_s113", 0 0, L_0x1988450; 1 drivers +v0x18da0a0_0 .net *"_s114", 0 0, L_0x1988890; 1 drivers +v0x18da120_0 .net *"_s117", 0 0, L_0x1988220; 1 drivers +v0x18da1a0_0 .net *"_s119", 0 0, L_0x1988a40; 1 drivers +v0x18da220_0 .net *"_s12", 0 0, L_0x19842a0; 1 drivers +v0x18da2a0_0 .net *"_s120", 0 0, L_0x1988750; 1 drivers +v0x18da3a0_0 .net *"_s123", 0 0, L_0x1988d20; 1 drivers +v0x18da420_0 .net *"_s125", 0 0, L_0x1988b30; 1 drivers +v0x18da320_0 .net *"_s126", 0 0, L_0x1988cc0; 1 drivers +v0x18da530_0 .net *"_s129", 0 0, L_0x1988940; 1 drivers +v0x18da4a0_0 .net *"_s131", 0 0, L_0x1989130; 1 drivers +v0x18da650_0 .net *"_s132", 0 0, L_0x1988e60; 1 drivers +v0x18da5b0_0 .net *"_s135", 0 0, L_0x1988f10; 1 drivers +v0x18da780_0 .net *"_s137", 0 0, L_0x1989220; 1 drivers +v0x18da6d0_0 .net *"_s138", 0 0, L_0x19893b0; 1 drivers +v0x18da8c0_0 .net *"_s141", 0 0, L_0x1989020; 1 drivers +v0x18da800_0 .net *"_s143", 0 0, L_0x1989840; 1 drivers +v0x18daa10_0 .net *"_s144", 0 0, L_0x1989530; 1 drivers +v0x18da940_0 .net *"_s147", 0 0, L_0x19895e0; 1 drivers +v0x18dab70_0 .net *"_s149", 0 0, L_0x1989b90; 1 drivers +v0x18daa90_0 .net *"_s15", 0 0, L_0x1984300; 1 drivers +v0x18dace0_0 .net *"_s150", 0 0, L_0x1989930; 1 drivers +v0x18dabf0_0 .net *"_s153", 0 0, L_0x1989ac0; 1 drivers +v0x18dae60_0 .net *"_s155", 0 0, L_0x1989f90; 1 drivers +v0x18dad60_0 .net *"_s156", 0 0, L_0x1989dc0; 1 drivers +v0x18dade0_0 .net *"_s159", 0 0, L_0x1989e70; 1 drivers +v0x18db000_0 .net *"_s161", 0 0, L_0x198a2c0; 1 drivers +v0x18db080_0 .net *"_s162", 0 0, L_0x198a030; 1 drivers +v0x18daee0_0 .net *"_s165", 0 0, L_0x19899e0; 1 drivers +v0x18daf80_0 .net *"_s167", 0 0, L_0x198a220; 1 drivers +v0x18db240_0 .net *"_s168", 0 0, L_0x198a4f0; 1 drivers +v0x18db2c0_0 .net *"_s17", 0 0, L_0x1984440; 1 drivers +v0x18db120_0 .net *"_s171", 0 0, L_0x198a5a0; 1 drivers +v0x18db1c0_0 .net *"_s173", 0 0, L_0x198aa00; 1 drivers +v0x18db4c0_0 .net *"_s174", 0 0, L_0x198a740; 1 drivers +v0x18db560_0 .net *"_s177", 0 0, L_0x198a0e0; 1 drivers +v0x18db360_0 .net *"_s179", 0 0, L_0x198a8f0; 1 drivers +v0x18db400_0 .net *"_s18", 0 0, L_0x1984630; 1 drivers +v0x18db760_0 .net *"_s180", 0 0, L_0x18dac70; 1 drivers +v0x18db800_0 .net *"_s183", 0 0, L_0x1987610; 1 drivers +v0x18db600_0 .net *"_s185", 0 0, L_0x1987700; 1 drivers +v0x18db6a0_0 .net *"_s186", 0 0, L_0x198abe0; 1 drivers +v0x18dba20_0 .net *"_s189", 0 0, L_0x198a7f0; 1 drivers +v0x18dbaa0_0 .net *"_s191", 0 0, L_0x198b5d0; 1 drivers +v0x18db8a0_0 .net *"_s21", 0 0, L_0x1984690; 1 drivers +v0x18db940_0 .net *"_s23", 0 0, L_0x1984780; 1 drivers +v0x18dbce0_0 .net *"_s24", 0 0, L_0x19845d0; 1 drivers +v0x18dbd60_0 .net *"_s27", 0 0, L_0x19849d0; 1 drivers +v0x18dbb20_0 .net *"_s29", 0 0, L_0x1984b40; 1 drivers +v0x18dbbc0_0 .net *"_s3", 0 0, L_0x1983940; 1 drivers +v0x18dbc60_0 .net *"_s30", 0 0, L_0x1984d60; 1 drivers +v0x18dbfe0_0 .net *"_s33", 0 0, L_0x1984e10; 1 drivers +v0x18dbe00_0 .net *"_s35", 0 0, L_0x1984f00; 1 drivers +v0x18dbea0_0 .net *"_s36", 0 0, L_0x1984cd0; 1 drivers +v0x18dbf40_0 .net *"_s39", 0 0, L_0x1985240; 1 drivers +v0x18dc280_0 .net *"_s41", 0 0, L_0x1984ff0; 1 drivers +v0x18dc080_0 .net *"_s42", 0 0, L_0x1985330; 1 drivers +v0x18dc120_0 .net *"_s45", 0 0, L_0x19855e0; 1 drivers +v0x18dc1c0_0 .net *"_s47", 0 0, L_0x19856d0; 1 drivers +v0x18dc520_0 .net *"_s48", 0 0, L_0x1985890; 1 drivers +v0x18dc320_0 .net *"_s5", 0 0, L_0x1983e50; 1 drivers +v0x18dc3c0_0 .net *"_s51", 0 0, L_0x1985940; 1 drivers +v0x18dc460_0 .net *"_s53", 0 0, L_0x19857c0; 1 drivers +v0x18dc7e0_0 .net *"_s54", 0 0, L_0x1985a30; 1 drivers +v0x18dc5a0_0 .net *"_s57", 0 0, L_0x1985d50; 1 drivers +v0x18dc640_0 .net *"_s59", 0 0, L_0x1985df0; 1 drivers +v0x18dc6e0_0 .net *"_s6", 0 0, L_0x197d7d0; 1 drivers +v0x18dcac0_0 .net *"_s60", 0 0, L_0x1985fe0; 1 drivers +v0x18dc860_0 .net *"_s63", 0 0, L_0x1986040; 1 drivers +v0x18dc900_0 .net *"_s65", 0 0, L_0x1985ee0; 1 drivers +v0x18dc9a0_0 .net *"_s66", 0 0, L_0x1986130; 1 drivers +v0x18dca40_0 .net *"_s69", 0 0, L_0x1986400; 1 drivers +v0x18dcdd0_0 .net *"_s71", 0 0, L_0x1974cf0; 1 drivers +v0x18dce50_0 .net *"_s72", 0 0, L_0x1985cf0; 1 drivers +v0x18dcb60_0 .net *"_s75", 0 0, L_0x1974f10; 1 drivers +v0x18dcc00_0 .net *"_s77", 0 0, L_0x1974de0; 1 drivers +v0x18dcca0_0 .net *"_s78", 0 0, L_0x1984ac0; 1 drivers +v0x18dcd40_0 .net *"_s81", 0 0, L_0x1975330; 1 drivers +v0x18dd1b0_0 .net *"_s83", 0 0, L_0x1975420; 1 drivers +v0x18dd250_0 .net *"_s84", 0 0, L_0x1975280; 1 drivers +v0x18dcef0_0 .net *"_s87", 0 0, L_0x1985130; 1 drivers +v0x18dcf90_0 .net *"_s89", 0 0, L_0x19874b0; 1 drivers +v0x18dd030_0 .net *"_s9", 0 0, L_0x1983f90; 1 drivers +v0x18dd0d0_0 .net *"_s90", 0 0, L_0x19875a0; 1 drivers +v0x18dd5c0_0 .net *"_s93", 0 0, L_0x1987bb0; 1 drivers +v0x18dd640_0 .net *"_s95", 0 0, L_0x1987c50; 1 drivers +v0x18dd2f0_0 .net *"_s96", 0 0, L_0x1987ad0; 1 drivers +v0x18dd390_0 .net *"_s99", 0 0, L_0x1987ed0; 1 drivers +v0x18dd430_0 .alias "a", 31 0, v0x192d7a0_0; +v0x18dd4b0_0 .alias "b", 31 0, v0x191cfb0_0; +v0x18dd9e0_0 .alias "out", 31 0, v0x191c600_0; +L_0x19837a0 .part/pv L_0x1983890, 0, 1, 32; +L_0x1983940 .part L_0x1936840, 0, 1; +L_0x1983e50 .part v0x191ccc0_0, 0, 1; +L_0x1983ef0 .part/pv L_0x197d7d0, 1, 1, 32; +L_0x1983f90 .part L_0x1936840, 1, 1; +L_0x1984080 .part v0x191ccc0_0, 1, 1; +L_0x1984170 .part/pv L_0x19842a0, 2, 1, 32; +L_0x1984300 .part L_0x1936840, 2, 1; +L_0x1984440 .part v0x191ccc0_0, 2, 1; +L_0x1984530 .part/pv L_0x1984630, 3, 1, 32; +L_0x1984690 .part L_0x1936840, 3, 1; +L_0x1984780 .part v0x191ccc0_0, 3, 1; +L_0x19848e0 .part/pv L_0x19845d0, 4, 1, 32; +L_0x19849d0 .part L_0x1936840, 4, 1; +L_0x1984b40 .part v0x191ccc0_0, 4, 1; +L_0x1984c30 .part/pv L_0x1984d60, 5, 1, 32; +L_0x1984e10 .part L_0x1936840, 5, 1; +L_0x1984f00 .part v0x191ccc0_0, 5, 1; +L_0x1985090 .part/pv L_0x1984cd0, 6, 1, 32; +L_0x1985240 .part L_0x1936840, 6, 1; +L_0x1984ff0 .part v0x191ccc0_0, 6, 1; +L_0x1985430 .part/pv L_0x1985330, 7, 1, 32; +L_0x19855e0 .part L_0x1936840, 7, 1; +L_0x19856d0 .part v0x191ccc0_0, 7, 1; +L_0x19854d0 .part/pv L_0x1985890, 8, 1, 32; +L_0x1985940 .part L_0x1936840, 8, 1; +L_0x19857c0 .part v0x191ccc0_0, 8, 1; +L_0x1985b60 .part/pv L_0x1985a30, 9, 1, 32; +L_0x1985d50 .part L_0x1936840, 9, 1; +L_0x1985df0 .part v0x191ccc0_0, 9, 1; +L_0x1985c00 .part/pv L_0x1985fe0, 10, 1, 32; +L_0x1986040 .part L_0x1936840, 10, 1; +L_0x1985ee0 .part v0x191ccc0_0, 10, 1; +L_0x1986240 .part/pv L_0x1986130, 11, 1, 32; +L_0x1986400 .part L_0x1936840, 11, 1; +L_0x1974cf0 .part v0x191ccc0_0, 11, 1; +L_0x19862e0 .part/pv L_0x1985cf0, 12, 1, 32; +L_0x1974f10 .part L_0x1936840, 12, 1; +L_0x1974de0 .part v0x191ccc0_0, 12, 1; +L_0x1975140 .part/pv L_0x1984ac0, 13, 1, 32; +L_0x1975330 .part L_0x1936840, 13, 1; +L_0x1975420 .part v0x191ccc0_0, 13, 1; +L_0x19751e0 .part/pv L_0x1975280, 14, 1, 32; +L_0x1985130 .part L_0x1936840, 14, 1; +L_0x19874b0 .part v0x191ccc0_0, 14, 1; +L_0x1987990 .part/pv L_0x19875a0, 15, 1, 32; +L_0x1987bb0 .part L_0x1936840, 15, 1; +L_0x1987c50 .part v0x191ccc0_0, 15, 1; +L_0x1987a30 .part/pv L_0x1987ad0, 16, 1, 32; +L_0x1987ed0 .part L_0x1936840, 16, 1; +L_0x1987d40 .part v0x191ccc0_0, 16, 1; +L_0x1987e30 .part/pv L_0x1988170, 17, 1, 32; +L_0x19882c0 .part L_0x1936840, 17, 1; +L_0x1988360 .part v0x191ccc0_0, 17, 1; +L_0x1987fc0 .part/pv L_0x1988060, 18, 1, 32; +L_0x1988610 .part L_0x1936840, 18, 1; +L_0x1988450 .part v0x191ccc0_0, 18, 1; +L_0x1988540 .part/pv L_0x1988890, 19, 1, 32; +L_0x1988220 .part L_0x1936840, 19, 1; +L_0x1988a40 .part v0x191ccc0_0, 19, 1; +L_0x19886b0 .part/pv L_0x1988750, 20, 1, 32; +L_0x1988d20 .part L_0x1936840, 20, 1; +L_0x1988b30 .part v0x191ccc0_0, 20, 1; +L_0x1988c20 .part/pv L_0x1988cc0, 21, 1, 32; +L_0x1988940 .part L_0x1936840, 21, 1; +L_0x1989130 .part v0x191ccc0_0, 21, 1; +L_0x1988dc0 .part/pv L_0x1988e60, 22, 1, 32; +L_0x1988f10 .part L_0x1936840, 22, 1; +L_0x1989220 .part v0x191ccc0_0, 22, 1; +L_0x1989310 .part/pv L_0x19893b0, 23, 1, 32; +L_0x1989020 .part L_0x1936840, 23, 1; +L_0x1989840 .part v0x191ccc0_0, 23, 1; +L_0x1989490 .part/pv L_0x1989530, 24, 1, 32; +L_0x19895e0 .part L_0x1936840, 24, 1; +L_0x1989b90 .part v0x191ccc0_0, 24, 1; +L_0x1989c80 .part/pv L_0x1989930, 25, 1, 32; +L_0x1989ac0 .part L_0x1936840, 25, 1; +L_0x1989f90 .part v0x191ccc0_0, 25, 1; +L_0x1989d20 .part/pv L_0x1989dc0, 26, 1, 32; +L_0x1989e70 .part L_0x1936840, 26, 1; +L_0x198a2c0 .part v0x191ccc0_0, 26, 1; +L_0x198a3b0 .part/pv L_0x198a030, 27, 1, 32; +L_0x19899e0 .part L_0x1936840, 27, 1; +L_0x198a220 .part v0x191ccc0_0, 27, 1; +L_0x198a450 .part/pv L_0x198a4f0, 28, 1, 32; +L_0x198a5a0 .part L_0x1936840, 28, 1; +L_0x198aa00 .part v0x191ccc0_0, 28, 1; +L_0x198aaa0 .part/pv L_0x198a740, 29, 1, 32; +L_0x198a0e0 .part L_0x1936840, 29, 1; +L_0x198a8f0 .part v0x191ccc0_0, 29, 1; +L_0x198ae20 .part/pv L_0x18dac70, 30, 1, 32; +L_0x1987610 .part L_0x1936840, 30, 1; +L_0x1987700 .part v0x191ccc0_0, 30, 1; +L_0x198ab40 .part/pv L_0x198abe0, 31, 1, 32; +L_0x198a7f0 .part L_0x1936840, 31, 1; +L_0x198b5d0 .part v0x191ccc0_0, 31, 1; +S_0x16a3c90 .scope module, "nor0" "nor_32bit" 19 39, 25 1, S_0x182e070; + .timescale 0 0; +L_0x198b3c0 .functor NOR 1, L_0x198b470, L_0x198b980, C4<0>, C4<0>; +L_0x1975050 .functor NOR 1, L_0x198bac0, L_0x198bbb0, C4<0>, C4<0>; +L_0x198bdd0 .functor NOR 1, L_0x198be30, L_0x198bf70, C4<0>, C4<0>; +L_0x198c160 .functor NOR 1, L_0x198c1c0, L_0x198c2b0, C4<0>, C4<0>; +L_0x198c100 .functor NOR 1, L_0x198c500, L_0x198c670, C4<0>, C4<0>; +L_0x198c890 .functor NOR 1, L_0x198c940, L_0x198ca30, C4<0>, C4<0>; +L_0x198c800 .functor NOR 1, L_0x198cd70, L_0x198cb20, C4<0>, C4<0>; +L_0x198ce60 .functor NOR 1, L_0x198d110, L_0x198d200, C4<0>, C4<0>; +L_0x198d3c0 .functor NOR 1, L_0x198d470, L_0x198d2f0, C4<0>, C4<0>; +L_0x198d560 .functor NOR 1, L_0x198d880, L_0x198d920, C4<0>, C4<0>; +L_0x198db10 .functor NOR 1, L_0x198db70, L_0x198da10, C4<0>, C4<0>; +L_0x198dc60 .functor NOR 1, L_0x198df30, L_0x198dfd0, C4<0>, C4<0>; +L_0x198d820 .functor NOR 1, L_0x198e1f0, L_0x198e0c0, C4<0>, C4<0>; +L_0x198e2e0 .functor NOR 1, L_0x198e610, L_0x198e6b0, C4<0>, C4<0>; +L_0x198e560 .functor NOR 1, L_0x198cc60, L_0x198e7a0, C4<0>, C4<0>; +L_0x198e890 .functor NOR 1, L_0x198eea0, L_0x198ef40, C4<0>, C4<0>; +L_0x198edc0 .functor NOR 1, L_0x198f1c0, L_0x198f030, C4<0>, C4<0>; +L_0x198f460 .functor NOR 1, L_0x198f5b0, L_0x198f650, C4<0>, C4<0>; +L_0x198f350 .functor NOR 1, L_0x198f900, L_0x198f740, C4<0>, C4<0>; +L_0x198fb80 .functor NOR 1, L_0x198f510, L_0x198fd30, C4<0>, C4<0>; +L_0x198fa40 .functor NOR 1, L_0x1990010, L_0x198fe20, C4<0>, C4<0>; +L_0x198ffb0 .functor NOR 1, L_0x198fc30, L_0x1990420, C4<0>, C4<0>; +L_0x1990150 .functor NOR 1, L_0x1990200, L_0x1990510, C4<0>, C4<0>; +L_0x19906a0 .functor NOR 1, L_0x1990310, L_0x1990b30, C4<0>, C4<0>; +L_0x1990820 .functor NOR 1, L_0x19908d0, L_0x1990e80, C4<0>, C4<0>; +L_0x1990c20 .functor NOR 1, L_0x1990db0, L_0x1991280, C4<0>, C4<0>; +L_0x19910b0 .functor NOR 1, L_0x1991160, L_0x19915b0, C4<0>, C4<0>; +L_0x1991320 .functor NOR 1, L_0x1990cd0, L_0x1991510, C4<0>, C4<0>; +L_0x19917e0 .functor NOR 1, L_0x1991890, L_0x1991cf0, C4<0>, C4<0>; +L_0x1991a30 .functor NOR 1, L_0x19913d0, L_0x1991be0, C4<0>, C4<0>; +L_0x169b830 .functor NOR 1, L_0x198e900, L_0x198e9a0, C4<0>, C4<0>; +L_0x16b3220 .functor NOR 1, L_0x1991ae0, L_0x1991f40, C4<0>, C4<0>; +v0x16a3d80_0 .net *"_s0", 0 0, L_0x198b3c0; 1 drivers +v0x1742be0_0 .net *"_s101", 0 0, L_0x198f030; 1 drivers +v0x1742c80_0 .net *"_s102", 0 0, L_0x198f460; 1 drivers +v0x1742d20_0 .net *"_s105", 0 0, L_0x198f5b0; 1 drivers +v0x174bd30_0 .net *"_s107", 0 0, L_0x198f650; 1 drivers +v0x174bdd0_0 .net *"_s108", 0 0, L_0x198f350; 1 drivers +v0x174be70_0 .net *"_s11", 0 0, L_0x198bbb0; 1 drivers +v0x16b2470_0 .net *"_s111", 0 0, L_0x198f900; 1 drivers +v0x16b2510_0 .net *"_s113", 0 0, L_0x198f740; 1 drivers +v0x16b25b0_0 .net *"_s114", 0 0, L_0x198fb80; 1 drivers +v0x16b2650_0 .net *"_s117", 0 0, L_0x198f510; 1 drivers +v0x1698510_0 .net *"_s119", 0 0, L_0x198fd30; 1 drivers +v0x1698590_0 .net *"_s12", 0 0, L_0x198bdd0; 1 drivers +v0x1698630_0 .net *"_s120", 0 0, L_0x198fa40; 1 drivers +v0x16f7ff0_0 .net *"_s123", 0 0, L_0x1990010; 1 drivers +v0x16f8090_0 .net *"_s125", 0 0, L_0x198fe20; 1 drivers +v0x16986b0_0 .net *"_s126", 0 0, L_0x198ffb0; 1 drivers +v0x16f81e0_0 .net *"_s129", 0 0, L_0x198fc30; 1 drivers +v0x16f8110_0 .net *"_s131", 0 0, L_0x1990420; 1 drivers +v0x16a0030_0 .net *"_s132", 0 0, L_0x1990150; 1 drivers +v0x169ff90_0 .net *"_s135", 0 0, L_0x1990200; 1 drivers +v0x16a0160_0 .net *"_s137", 0 0, L_0x1990510; 1 drivers +v0x16a00b0_0 .net *"_s138", 0 0, L_0x19906a0; 1 drivers +v0x173ff30_0 .net *"_s141", 0 0, L_0x1990310; 1 drivers +v0x1740080_0 .net *"_s143", 0 0, L_0x1990b30; 1 drivers +v0x173fe70_0 .net *"_s144", 0 0, L_0x1990820; 1 drivers +v0x173ffb0_0 .net *"_s147", 0 0, L_0x19908d0; 1 drivers +v0x1741be0_0 .net *"_s149", 0 0, L_0x1990e80; 1 drivers +v0x1741b00_0 .net *"_s15", 0 0, L_0x198be30; 1 drivers +v0x173d6a0_0 .net *"_s150", 0 0, L_0x1990c20; 1 drivers +v0x173d740_0 .net *"_s153", 0 0, L_0x1990db0; 1 drivers +v0x173d7e0_0 .net *"_s155", 0 0, L_0x1991280; 1 drivers +v0x173d860_0 .net *"_s156", 0 0, L_0x19910b0; 1 drivers +v0x1741c60_0 .net *"_s159", 0 0, L_0x1991160; 1 drivers +v0x1741ce0_0 .net *"_s161", 0 0, L_0x19915b0; 1 drivers +v0x16607b0_0 .net *"_s162", 0 0, L_0x1991320; 1 drivers +v0x1660830_0 .net *"_s165", 0 0, L_0x1990cd0; 1 drivers +v0x1660690_0 .net *"_s167", 0 0, L_0x1991510; 1 drivers +v0x1660710_0 .net *"_s168", 0 0, L_0x19917e0; 1 drivers +v0x1696920_0 .net *"_s17", 0 0, L_0x198bf70; 1 drivers +v0x16969a0_0 .net *"_s171", 0 0, L_0x1991890; 1 drivers +v0x169a0f0_0 .net *"_s173", 0 0, L_0x1991cf0; 1 drivers +v0x169a170_0 .net *"_s174", 0 0, L_0x1991a30; 1 drivers +v0x169b890_0 .net *"_s177", 0 0, L_0x19913d0; 1 drivers +v0x169b910_0 .net *"_s179", 0 0, L_0x1991be0; 1 drivers +v0x16b18e0_0 .net *"_s18", 0 0, L_0x198c160; 1 drivers +v0x16b1960_0 .net *"_s180", 0 0, L_0x169b830; 1 drivers +v0x16b3280_0 .net *"_s183", 0 0, L_0x198e900; 1 drivers +v0x16b3300_0 .net *"_s185", 0 0, L_0x198e9a0; 1 drivers +v0x16d2450_0 .net *"_s186", 0 0, L_0x16b3220; 1 drivers +v0x16d24d0_0 .net *"_s189", 0 0, L_0x1991ae0; 1 drivers +v0x170c6a0_0 .net *"_s191", 0 0, L_0x1991f40; 1 drivers +v0x171e870_0 .net *"_s21", 0 0, L_0x198c1c0; 1 drivers +v0x16967e0_0 .net *"_s23", 0 0, L_0x198c2b0; 1 drivers +v0x1696860_0 .net *"_s24", 0 0, L_0x198c100; 1 drivers +v0x1727960_0 .net *"_s27", 0 0, L_0x198c500; 1 drivers +v0x16bce60_0 .net *"_s29", 0 0, L_0x198c670; 1 drivers +v0x1699fa0_0 .net *"_s3", 0 0, L_0x198b470; 1 drivers +v0x16b0740_0 .net *"_s30", 0 0, L_0x198c890; 1 drivers +v0x169a020_0 .net *"_s33", 0 0, L_0x198c940; 1 drivers +v0x16af700_0 .net *"_s35", 0 0, L_0x198ca30; 1 drivers +v0x169b730_0 .net *"_s36", 0 0, L_0x198c800; 1 drivers +v0x16f5140_0 .net *"_s39", 0 0, L_0x198cd70; 1 drivers +v0x169b7b0_0 .net *"_s41", 0 0, L_0x198cb20; 1 drivers +v0x16f6960_0 .net *"_s42", 0 0, L_0x198ce60; 1 drivers +v0x16b1770_0 .net *"_s45", 0 0, L_0x198d110; 1 drivers +v0x16b17f0_0 .net *"_s47", 0 0, L_0x198d200; 1 drivers +v0x16b3100_0 .net *"_s48", 0 0, L_0x198d3c0; 1 drivers +v0x16b31a0_0 .net *"_s5", 0 0, L_0x198b980; 1 drivers +v0x16d22c0_0 .net *"_s51", 0 0, L_0x198d470; 1 drivers +v0x16d2340_0 .net *"_s53", 0 0, L_0x198d2f0; 1 drivers +v0x16d23c0_0 .net *"_s54", 0 0, L_0x198d560; 1 drivers +v0x170c500_0 .net *"_s57", 0 0, L_0x198d880; 1 drivers +v0x170c5a0_0 .net *"_s59", 0 0, L_0x198d920; 1 drivers +v0x170c620_0 .net *"_s6", 0 0, L_0x1975050; 1 drivers +v0x171e6c0_0 .net *"_s60", 0 0, L_0x198db10; 1 drivers +v0x171e740_0 .net *"_s63", 0 0, L_0x198db70; 1 drivers +v0x171e7e0_0 .net *"_s65", 0 0, L_0x198da10; 1 drivers +v0x17277a0_0 .net *"_s66", 0 0, L_0x198dc60; 1 drivers +v0x1727820_0 .net *"_s69", 0 0, L_0x198df30; 1 drivers +v0x17278c0_0 .net *"_s71", 0 0, L_0x198dfd0; 1 drivers +v0x16bcc90_0 .net *"_s72", 0 0, L_0x198d820; 1 drivers +v0x16bcd30_0 .net *"_s75", 0 0, L_0x198e1f0; 1 drivers +v0x16bcdd0_0 .net *"_s77", 0 0, L_0x198e0c0; 1 drivers +v0x16b0560_0 .net *"_s78", 0 0, L_0x198e2e0; 1 drivers +v0x16b0600_0 .net *"_s81", 0 0, L_0x198e610; 1 drivers +v0x16b06a0_0 .net *"_s83", 0 0, L_0x198e6b0; 1 drivers +v0x16af510_0 .net *"_s84", 0 0, L_0x198e560; 1 drivers +v0x16af5b0_0 .net *"_s87", 0 0, L_0x198cc60; 1 drivers +v0x16af650_0 .net *"_s89", 0 0, L_0x198e7a0; 1 drivers +v0x16f4f40_0 .net *"_s9", 0 0, L_0x198bac0; 1 drivers +v0x16f4fe0_0 .net *"_s90", 0 0, L_0x198e890; 1 drivers +v0x16f5080_0 .net *"_s93", 0 0, L_0x198eea0; 1 drivers +v0x16f6750_0 .net *"_s95", 0 0, L_0x198ef40; 1 drivers +v0x16f67d0_0 .net *"_s96", 0 0, L_0x198edc0; 1 drivers +v0x16f6870_0 .net *"_s99", 0 0, L_0x198f1c0; 1 drivers +v0x16caf60_0 .alias "a", 31 0, v0x192d7a0_0; +v0x16cafe0_0 .alias "b", 31 0, v0x191cfb0_0; +v0x16cb060_0 .alias "out", 31 0, v0x191c680_0; +L_0x198b2d0 .part/pv L_0x198b3c0, 0, 1, 32; +L_0x198b470 .part L_0x1936840, 0, 1; +L_0x198b980 .part v0x191ccc0_0, 0, 1; +L_0x198ba20 .part/pv L_0x1975050, 1, 1, 32; +L_0x198bac0 .part L_0x1936840, 1, 1; +L_0x198bbb0 .part v0x191ccc0_0, 1, 1; +L_0x198bca0 .part/pv L_0x198bdd0, 2, 1, 32; +L_0x198be30 .part L_0x1936840, 2, 1; +L_0x198bf70 .part v0x191ccc0_0, 2, 1; +L_0x198c060 .part/pv L_0x198c160, 3, 1, 32; +L_0x198c1c0 .part L_0x1936840, 3, 1; +L_0x198c2b0 .part v0x191ccc0_0, 3, 1; +L_0x198c410 .part/pv L_0x198c100, 4, 1, 32; +L_0x198c500 .part L_0x1936840, 4, 1; +L_0x198c670 .part v0x191ccc0_0, 4, 1; +L_0x198c760 .part/pv L_0x198c890, 5, 1, 32; +L_0x198c940 .part L_0x1936840, 5, 1; +L_0x198ca30 .part v0x191ccc0_0, 5, 1; +L_0x198cbc0 .part/pv L_0x198c800, 6, 1, 32; +L_0x198cd70 .part L_0x1936840, 6, 1; +L_0x198cb20 .part v0x191ccc0_0, 6, 1; +L_0x198cf60 .part/pv L_0x198ce60, 7, 1, 32; +L_0x198d110 .part L_0x1936840, 7, 1; +L_0x198d200 .part v0x191ccc0_0, 7, 1; +L_0x198d000 .part/pv L_0x198d3c0, 8, 1, 32; +L_0x198d470 .part L_0x1936840, 8, 1; +L_0x198d2f0 .part v0x191ccc0_0, 8, 1; +L_0x198d690 .part/pv L_0x198d560, 9, 1, 32; +L_0x198d880 .part L_0x1936840, 9, 1; +L_0x198d920 .part v0x191ccc0_0, 9, 1; +L_0x198d730 .part/pv L_0x198db10, 10, 1, 32; +L_0x198db70 .part L_0x1936840, 10, 1; +L_0x198da10 .part v0x191ccc0_0, 10, 1; +L_0x198dd70 .part/pv L_0x198dc60, 11, 1, 32; +L_0x198df30 .part L_0x1936840, 11, 1; +L_0x198dfd0 .part v0x191ccc0_0, 11, 1; +L_0x198de10 .part/pv L_0x198d820, 12, 1, 32; +L_0x198e1f0 .part L_0x1936840, 12, 1; +L_0x198e0c0 .part v0x191ccc0_0, 12, 1; +L_0x198e420 .part/pv L_0x198e2e0, 13, 1, 32; +L_0x198e610 .part L_0x1936840, 13, 1; +L_0x198e6b0 .part v0x191ccc0_0, 13, 1; +L_0x198e4c0 .part/pv L_0x198e560, 14, 1, 32; +L_0x198cc60 .part L_0x1936840, 14, 1; +L_0x198e7a0 .part v0x191ccc0_0, 14, 1; +L_0x198ec80 .part/pv L_0x198e890, 15, 1, 32; +L_0x198eea0 .part L_0x1936840, 15, 1; +L_0x198ef40 .part v0x191ccc0_0, 15, 1; +L_0x198ed20 .part/pv L_0x198edc0, 16, 1, 32; +L_0x198f1c0 .part L_0x1936840, 16, 1; +L_0x198f030 .part v0x191ccc0_0, 16, 1; +L_0x198f120 .part/pv L_0x198f460, 17, 1, 32; +L_0x198f5b0 .part L_0x1936840, 17, 1; +L_0x198f650 .part v0x191ccc0_0, 17, 1; +L_0x198f2b0 .part/pv L_0x198f350, 18, 1, 32; +L_0x198f900 .part L_0x1936840, 18, 1; +L_0x198f740 .part v0x191ccc0_0, 18, 1; +L_0x198f830 .part/pv L_0x198fb80, 19, 1, 32; +L_0x198f510 .part L_0x1936840, 19, 1; +L_0x198fd30 .part v0x191ccc0_0, 19, 1; +L_0x198f9a0 .part/pv L_0x198fa40, 20, 1, 32; +L_0x1990010 .part L_0x1936840, 20, 1; +L_0x198fe20 .part v0x191ccc0_0, 20, 1; +L_0x198ff10 .part/pv L_0x198ffb0, 21, 1, 32; +L_0x198fc30 .part L_0x1936840, 21, 1; +L_0x1990420 .part v0x191ccc0_0, 21, 1; +L_0x19900b0 .part/pv L_0x1990150, 22, 1, 32; +L_0x1990200 .part L_0x1936840, 22, 1; +L_0x1990510 .part v0x191ccc0_0, 22, 1; +L_0x1990600 .part/pv L_0x19906a0, 23, 1, 32; +L_0x1990310 .part L_0x1936840, 23, 1; +L_0x1990b30 .part v0x191ccc0_0, 23, 1; +L_0x1990780 .part/pv L_0x1990820, 24, 1, 32; +L_0x19908d0 .part L_0x1936840, 24, 1; +L_0x1990e80 .part v0x191ccc0_0, 24, 1; +L_0x1990f70 .part/pv L_0x1990c20, 25, 1, 32; +L_0x1990db0 .part L_0x1936840, 25, 1; +L_0x1991280 .part v0x191ccc0_0, 25, 1; +L_0x1991010 .part/pv L_0x19910b0, 26, 1, 32; +L_0x1991160 .part L_0x1936840, 26, 1; +L_0x19915b0 .part v0x191ccc0_0, 26, 1; +L_0x19916a0 .part/pv L_0x1991320, 27, 1, 32; +L_0x1990cd0 .part L_0x1936840, 27, 1; +L_0x1991510 .part v0x191ccc0_0, 27, 1; +L_0x1991740 .part/pv L_0x19917e0, 28, 1, 32; +L_0x1991890 .part L_0x1936840, 28, 1; +L_0x1991cf0 .part v0x191ccc0_0, 28, 1; +L_0x1991d90 .part/pv L_0x1991a30, 29, 1, 32; +L_0x19913d0 .part L_0x1936840, 29, 1; +L_0x1991be0 .part v0x191ccc0_0, 29, 1; +L_0x1992110 .part/pv L_0x169b830, 30, 1, 32; +L_0x198e900 .part L_0x1936840, 30, 1; +L_0x198e9a0 .part v0x191ccc0_0, 30, 1; +L_0x198ea40 .part/pv L_0x16b3220, 31, 1, 32; +L_0x1991ae0 .part L_0x1936840, 31, 1; +L_0x1991f40 .part v0x191ccc0_0, 31, 1; +S_0x1825de0 .scope module, "or0" "or_32bit" 19 40, 26 1, S_0x182e070; + .timescale 0 0; +L_0x198c3a0 .functor OR 1, L_0x19928d0, L_0x19929c0, C4<0>, C4<0>; +L_0x1992b50 .functor OR 1, L_0x1992c00, L_0x1992cf0, C4<0>, C4<0>; +L_0x1991b80 .functor OR 1, L_0x1992f60, L_0x19930a0, C4<0>, C4<0>; +L_0x1993290 .functor OR 1, L_0x19932f0, L_0x19933e0, C4<0>, C4<0>; +L_0x1993230 .functor OR 1, L_0x1993630, L_0x19937a0, C4<0>, C4<0>; +L_0x19939c0 .functor OR 1, L_0x1993a70, L_0x1993b60, C4<0>, C4<0>; +L_0x1993930 .functor OR 1, L_0x1993ea0, L_0x1993c50, C4<0>, C4<0>; +L_0x1993f90 .functor OR 1, L_0x1994240, L_0x1994330, C4<0>, C4<0>; +L_0x19944f0 .functor OR 1, L_0x19945a0, L_0x1994420, C4<0>, C4<0>; +L_0x1994690 .functor OR 1, L_0x19949b0, L_0x1994a50, C4<0>, C4<0>; +L_0x1994c40 .functor OR 1, L_0x1994ca0, L_0x1994b40, C4<0>, C4<0>; +L_0x1994d90 .functor OR 1, L_0x1995060, L_0x1995100, C4<0>, C4<0>; +L_0x1994950 .functor OR 1, L_0x1995320, L_0x19951f0, C4<0>, C4<0>; +L_0x1995410 .functor OR 1, L_0x1995740, L_0x19957e0, C4<0>, C4<0>; +L_0x1995690 .functor OR 1, L_0x1993d90, L_0x19958d0, C4<0>, C4<0>; +L_0x19959c0 .functor OR 1, L_0x1995fd0, L_0x1996070, C4<0>, C4<0>; +L_0x1995ef0 .functor OR 1, L_0x19962f0, L_0x1996160, C4<0>, C4<0>; +L_0x1996590 .functor OR 1, L_0x19966e0, L_0x1996780, C4<0>, C4<0>; +L_0x1996480 .functor OR 1, L_0x1996a30, L_0x1996870, C4<0>, C4<0>; +L_0x1996cb0 .functor OR 1, L_0x1996640, L_0x1996e60, C4<0>, C4<0>; +L_0x1996b70 .functor OR 1, L_0x1996bd0, L_0x1997150, C4<0>, C4<0>; +L_0x19934d0 .functor OR 1, L_0x1996d60, L_0x1997010, C4<0>, C4<0>; +L_0x1997330 .functor OR 1, L_0x1997390, L_0x1978980, C4<0>, C4<0>; +L_0x1978750 .functor OR 1, L_0x19788d0, L_0x1978d50, C4<0>, C4<0>; +L_0x1978bb0 .functor OR 1, L_0x1978c60, L_0x19790a0, C4<0>, C4<0>; +L_0x1996fa0 .functor OR 1, L_0x1978800, L_0x1978fc0, C4<0>, C4<0>; +L_0x1979590 .functor OR 1, L_0x1979640, L_0x1979230, C4<0>, C4<0>; +L_0x19793c0 .functor OR 1, L_0x1978e90, L_0x1999890, C4<0>, C4<0>; +L_0x1999550 .functor OR 1, L_0x1999600, L_0x1999c40, C4<0>, C4<0>; +L_0x1999980 .functor OR 1, L_0x1999750, L_0x1999b30, C4<0>, C4<0>; +L_0x1995a30 .functor OR 1, L_0x1995a90, L_0x1995b30, C4<0>, C4<0>; +L_0x1999e20 .functor OR 1, L_0x1999a30, L_0x199a810, C4<0>, C4<0>; +v0x18209a0_0 .net *"_s0", 0 0, L_0x198c3a0; 1 drivers +v0x1820a60_0 .net *"_s101", 0 0, L_0x1996160; 1 drivers +v0x1828c50_0 .net *"_s102", 0 0, L_0x1996590; 1 drivers +v0x1828cf0_0 .net *"_s105", 0 0, L_0x19966e0; 1 drivers +v0x18415c0_0 .net *"_s107", 0 0, L_0x1996780; 1 drivers +v0x1841640_0 .net *"_s108", 0 0, L_0x1996480; 1 drivers +v0x1849870_0 .net *"_s11", 0 0, L_0x1992cf0; 1 drivers +v0x18498f0_0 .net *"_s111", 0 0, L_0x1996a30; 1 drivers +v0x18d87a0_0 .net *"_s113", 0 0, L_0x1996870; 1 drivers +v0x18d8820_0 .net *"_s114", 0 0, L_0x1996cb0; 1 drivers +v0x17d2270_0 .net *"_s117", 0 0, L_0x1996640; 1 drivers +v0x17d2310_0 .net *"_s119", 0 0, L_0x1996e60; 1 drivers +v0x17f0c10_0 .net *"_s12", 0 0, L_0x1991b80; 1 drivers +v0x1770690_0 .net *"_s120", 0 0, L_0x1996b70; 1 drivers +v0x1775940_0 .net *"_s123", 0 0, L_0x1996bd0; 1 drivers +v0x17759e0_0 .net *"_s125", 0 0, L_0x1997150; 1 drivers +v0x1770710_0 .net *"_s126", 0 0, L_0x19934d0; 1 drivers +v0x181b5d0_0 .net *"_s129", 0 0, L_0x1996d60; 1 drivers +v0x181b500_0 .net *"_s131", 0 0, L_0x1997010; 1 drivers +v0x18341d0_0 .net *"_s132", 0 0, L_0x1997330; 1 drivers +v0x183c520_0 .net *"_s135", 0 0, L_0x1997390; 1 drivers +v0x1834130_0 .net *"_s137", 0 0, L_0x1978980; 1 drivers +v0x1854e10_0 .net *"_s138", 0 0, L_0x1978750; 1 drivers +v0x183c470_0 .net *"_s141", 0 0, L_0x19788d0; 1 drivers +v0x187cd90_0 .net *"_s143", 0 0, L_0x1978d50; 1 drivers +v0x1854d50_0 .net *"_s144", 0 0, L_0x1978bb0; 1 drivers +v0x187ccc0_0 .net *"_s147", 0 0, L_0x1978c60; 1 drivers +v0x187b520_0 .net *"_s149", 0 0, L_0x19790a0; 1 drivers +v0x187b5c0_0 .net *"_s15", 0 0, L_0x1992f60; 1 drivers +v0x187a950_0 .net *"_s150", 0 0, L_0x1996fa0; 1 drivers +v0x187a9d0_0 .net *"_s153", 0 0, L_0x1978800; 1 drivers +v0x187c0f0_0 .net *"_s155", 0 0, L_0x1978fc0; 1 drivers +v0x18791b0_0 .net *"_s156", 0 0, L_0x1979590; 1 drivers +v0x1879250_0 .net *"_s159", 0 0, L_0x1979640; 1 drivers +v0x1879d80_0 .net *"_s161", 0 0, L_0x1979230; 1 drivers +v0x1877a10_0 .net *"_s162", 0 0, L_0x19793c0; 1 drivers +v0x1877a90_0 .net *"_s165", 0 0, L_0x1978e90; 1 drivers +v0x1876e40_0 .net *"_s167", 0 0, L_0x1999890; 1 drivers +v0x1876ec0_0 .net *"_s168", 0 0, L_0x1999550; 1 drivers +v0x18785e0_0 .net *"_s17", 0 0, L_0x19930a0; 1 drivers +v0x1878680_0 .net *"_s171", 0 0, L_0x1999600; 1 drivers +v0x18756a0_0 .net *"_s173", 0 0, L_0x1999c40; 1 drivers +v0x1875720_0 .net *"_s174", 0 0, L_0x1999980; 1 drivers +v0x1873ed0_0 .net *"_s177", 0 0, L_0x1999750; 1 drivers +v0x1873f50_0 .net *"_s179", 0 0, L_0x1999b30; 1 drivers +v0x18813a0_0 .net *"_s18", 0 0, L_0x1993290; 1 drivers +v0x1881440_0 .net *"_s180", 0 0, L_0x1995a30; 1 drivers +v0x18807d0_0 .net *"_s183", 0 0, L_0x1995a90; 1 drivers +v0x186b300_0 .net *"_s185", 0 0, L_0x1995b30; 1 drivers +v0x1880850_0 .net *"_s186", 0 0, L_0x1999e20; 1 drivers +v0x17309f0_0 .net *"_s189", 0 0, L_0x1999a30; 1 drivers +v0x187fc00_0 .net *"_s191", 0 0, L_0x199a810; 1 drivers +v0x187fc80_0 .net *"_s21", 0 0, L_0x19932f0; 1 drivers +v0x16ce1c0_0 .net *"_s23", 0 0, L_0x19933e0; 1 drivers +v0x169e2b0_0 .net *"_s24", 0 0, L_0x1993230; 1 drivers +v0x187f030_0 .net *"_s27", 0 0, L_0x1993630; 1 drivers +v0x16e89b0_0 .net *"_s29", 0 0, L_0x19937a0; 1 drivers +v0x187f0b0_0 .net *"_s3", 0 0, L_0x19928d0; 1 drivers +v0x169ce40_0 .net *"_s30", 0 0, L_0x19939c0; 1 drivers +v0x187e460_0 .net *"_s33", 0 0, L_0x1993a70; 1 drivers +v0x1703610_0 .net *"_s35", 0 0, L_0x1993b60; 1 drivers +v0x187e4e0_0 .net *"_s36", 0 0, L_0x1993930; 1 drivers +v0x16ca280_0 .net *"_s39", 0 0, L_0x1993ea0; 1 drivers +v0x187d890_0 .net *"_s41", 0 0, L_0x1993c50; 1 drivers +v0x16a3ea0_0 .net *"_s42", 0 0, L_0x1993f90; 1 drivers +v0x187d910_0 .net *"_s45", 0 0, L_0x1994240; 1 drivers +v0x18d23b0_0 .net *"_s47", 0 0, L_0x1994330; 1 drivers +v0x18d2450_0 .net *"_s48", 0 0, L_0x19944f0; 1 drivers +v0x1876270_0 .net *"_s5", 0 0, L_0x19929c0; 1 drivers +v0x1876310_0 .net *"_s51", 0 0, L_0x19945a0; 1 drivers +v0x17cec90_0 .net *"_s53", 0 0, L_0x1994420; 1 drivers +v0x17ced30_0 .net *"_s54", 0 0, L_0x1994690; 1 drivers +v0x16b7170_0 .net *"_s57", 0 0, L_0x19949b0; 1 drivers +v0x16b7210_0 .net *"_s59", 0 0, L_0x1994a50; 1 drivers +v0x17525e0_0 .net *"_s6", 0 0, L_0x1992b50; 1 drivers +v0x1752680_0 .net *"_s60", 0 0, L_0x1994c40; 1 drivers +v0x186b170_0 .net *"_s63", 0 0, L_0x1994ca0; 1 drivers +v0x186b210_0 .net *"_s65", 0 0, L_0x1994b40; 1 drivers +v0x1730850_0 .net *"_s66", 0 0, L_0x1994d90; 1 drivers +v0x17308d0_0 .net *"_s69", 0 0, L_0x1995060; 1 drivers +v0x1730970_0 .net *"_s71", 0 0, L_0x1995100; 1 drivers +v0x16ce010_0 .net *"_s72", 0 0, L_0x1994950; 1 drivers +v0x16ce090_0 .net *"_s75", 0 0, L_0x1995320; 1 drivers +v0x16ce130_0 .net *"_s77", 0 0, L_0x19951f0; 1 drivers +v0x169e0f0_0 .net *"_s78", 0 0, L_0x1995410; 1 drivers +v0x169e190_0 .net *"_s81", 0 0, L_0x1995740; 1 drivers +v0x169e230_0 .net *"_s83", 0 0, L_0x19957e0; 1 drivers +v0x16e87e0_0 .net *"_s84", 0 0, L_0x1995690; 1 drivers +v0x16e8880_0 .net *"_s87", 0 0, L_0x1993d90; 1 drivers +v0x16e8920_0 .net *"_s89", 0 0, L_0x19958d0; 1 drivers +v0x169cc60_0 .net *"_s9", 0 0, L_0x1992c00; 1 drivers +v0x169cd00_0 .net *"_s90", 0 0, L_0x19959c0; 1 drivers +v0x169cda0_0 .net *"_s93", 0 0, L_0x1995fd0; 1 drivers +v0x1703420_0 .net *"_s95", 0 0, L_0x1996070; 1 drivers +v0x17034c0_0 .net *"_s96", 0 0, L_0x1995ef0; 1 drivers +v0x1703560_0 .net *"_s99", 0 0, L_0x19962f0; 1 drivers +v0x16ca080_0 .alias "a", 31 0, v0x192d7a0_0; +v0x16ca120_0 .alias "b", 31 0, v0x191cfb0_0; +v0x16ca1c0_0 .alias "out", 31 0, v0x191c700_0; +L_0x1992030 .part/pv L_0x198c3a0, 0, 1, 32; +L_0x19928d0 .part L_0x1936840, 0, 1; +L_0x19929c0 .part v0x191ccc0_0, 0, 1; +L_0x1992ab0 .part/pv L_0x1992b50, 1, 1, 32; +L_0x1992c00 .part L_0x1936840, 1, 1; +L_0x1992cf0 .part v0x191ccc0_0, 1, 1; +L_0x1992de0 .part/pv L_0x1991b80, 2, 1, 32; +L_0x1992f60 .part L_0x1936840, 2, 1; +L_0x19930a0 .part v0x191ccc0_0, 2, 1; +L_0x1993190 .part/pv L_0x1993290, 3, 1, 32; +L_0x19932f0 .part L_0x1936840, 3, 1; +L_0x19933e0 .part v0x191ccc0_0, 3, 1; +L_0x1993540 .part/pv L_0x1993230, 4, 1, 32; +L_0x1993630 .part L_0x1936840, 4, 1; +L_0x19937a0 .part v0x191ccc0_0, 4, 1; +L_0x1993890 .part/pv L_0x19939c0, 5, 1, 32; +L_0x1993a70 .part L_0x1936840, 5, 1; +L_0x1993b60 .part v0x191ccc0_0, 5, 1; +L_0x1993cf0 .part/pv L_0x1993930, 6, 1, 32; +L_0x1993ea0 .part L_0x1936840, 6, 1; +L_0x1993c50 .part v0x191ccc0_0, 6, 1; +L_0x1994090 .part/pv L_0x1993f90, 7, 1, 32; +L_0x1994240 .part L_0x1936840, 7, 1; +L_0x1994330 .part v0x191ccc0_0, 7, 1; +L_0x1994130 .part/pv L_0x19944f0, 8, 1, 32; +L_0x19945a0 .part L_0x1936840, 8, 1; +L_0x1994420 .part v0x191ccc0_0, 8, 1; +L_0x19947c0 .part/pv L_0x1994690, 9, 1, 32; +L_0x19949b0 .part L_0x1936840, 9, 1; +L_0x1994a50 .part v0x191ccc0_0, 9, 1; +L_0x1994860 .part/pv L_0x1994c40, 10, 1, 32; +L_0x1994ca0 .part L_0x1936840, 10, 1; +L_0x1994b40 .part v0x191ccc0_0, 10, 1; +L_0x1994ea0 .part/pv L_0x1994d90, 11, 1, 32; +L_0x1995060 .part L_0x1936840, 11, 1; +L_0x1995100 .part v0x191ccc0_0, 11, 1; +L_0x1994f40 .part/pv L_0x1994950, 12, 1, 32; +L_0x1995320 .part L_0x1936840, 12, 1; +L_0x19951f0 .part v0x191ccc0_0, 12, 1; +L_0x1995550 .part/pv L_0x1995410, 13, 1, 32; +L_0x1995740 .part L_0x1936840, 13, 1; +L_0x19957e0 .part v0x191ccc0_0, 13, 1; +L_0x19955f0 .part/pv L_0x1995690, 14, 1, 32; +L_0x1993d90 .part L_0x1936840, 14, 1; +L_0x19958d0 .part v0x191ccc0_0, 14, 1; +L_0x1995db0 .part/pv L_0x19959c0, 15, 1, 32; +L_0x1995fd0 .part L_0x1936840, 15, 1; +L_0x1996070 .part v0x191ccc0_0, 15, 1; +L_0x1995e50 .part/pv L_0x1995ef0, 16, 1, 32; +L_0x19962f0 .part L_0x1936840, 16, 1; +L_0x1996160 .part v0x191ccc0_0, 16, 1; +L_0x1996250 .part/pv L_0x1996590, 17, 1, 32; +L_0x19966e0 .part L_0x1936840, 17, 1; +L_0x1996780 .part v0x191ccc0_0, 17, 1; +L_0x19963e0 .part/pv L_0x1996480, 18, 1, 32; +L_0x1996a30 .part L_0x1936840, 18, 1; +L_0x1996870 .part v0x191ccc0_0, 18, 1; +L_0x1996960 .part/pv L_0x1996cb0, 19, 1, 32; +L_0x1996640 .part L_0x1936840, 19, 1; +L_0x1996e60 .part v0x191ccc0_0, 19, 1; +L_0x1996ad0 .part/pv L_0x1996b70, 20, 1, 32; +L_0x1996bd0 .part L_0x1936840, 20, 1; +L_0x1997150 .part v0x191ccc0_0, 20, 1; +L_0x19971f0 .part/pv L_0x19934d0, 21, 1, 32; +L_0x1996d60 .part L_0x1936840, 21, 1; +L_0x1997010 .part v0x191ccc0_0, 21, 1; +L_0x1997290 .part/pv L_0x1997330, 22, 1, 32; +L_0x1997390 .part L_0x1936840, 22, 1; +L_0x1978980 .part v0x191ccc0_0, 22, 1; +L_0x1978a70 .part/pv L_0x1978750, 23, 1, 32; +L_0x19788d0 .part L_0x1936840, 23, 1; +L_0x1978d50 .part v0x191ccc0_0, 23, 1; +L_0x1978b10 .part/pv L_0x1978bb0, 24, 1, 32; +L_0x1978c60 .part L_0x1936840, 24, 1; +L_0x19790a0 .part v0x191ccc0_0, 24, 1; +L_0x1979190 .part/pv L_0x1996fa0, 25, 1, 32; +L_0x1978800 .part L_0x1936840, 25, 1; +L_0x1978fc0 .part v0x191ccc0_0, 25, 1; +L_0x19794f0 .part/pv L_0x1979590, 26, 1, 32; +L_0x1979640 .part L_0x1936840, 26, 1; +L_0x1979230 .part v0x191ccc0_0, 26, 1; +L_0x1979320 .part/pv L_0x19793c0, 27, 1, 32; +L_0x1978e90 .part L_0x1936840, 27, 1; +L_0x1999890 .part v0x191ccc0_0, 27, 1; +L_0x19994b0 .part/pv L_0x1999550, 28, 1, 32; +L_0x1999600 .part L_0x1936840, 28, 1; +L_0x1999c40 .part v0x191ccc0_0, 28, 1; +L_0x1999ce0 .part/pv L_0x1999980, 29, 1, 32; +L_0x1999750 .part L_0x1936840, 29, 1; +L_0x1999b30 .part v0x191ccc0_0, 29, 1; +L_0x199a060 .part/pv L_0x1995a30, 30, 1, 32; +L_0x1995a90 .part L_0x1936840, 30, 1; +L_0x1995b30 .part v0x191ccc0_0, 30, 1; +L_0x1999d80 .part/pv L_0x1999e20, 31, 1, 32; +L_0x1999a30 .part L_0x1936840, 31, 1; +L_0x199a810 .part v0x191ccc0_0, 31, 1; +S_0x1880ad0 .scope module, "memory0" "memory" 5 91, 8 42, S_0x1877d10; + .timescale 0 0; +L_0x199abc0 .functor BUFZ 32, L_0x199a510, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x187ff00_0 .alias "Addr", 31 0, v0x192d690_0; +v0x187f330_0 .alias "DataIn", 31 0, v0x192d820_0; +v0x187f3b0_0 .alias "DataOut", 31 0, v0x192de80_0; +v0x187e760_0 .net *"_s0", 31 0, L_0x199a510; 1 drivers +v0x187db90_0 .net *"_s2", 1 0, C4<00>; 1 drivers +v0x187dc10_0 .net *"_s5", 29 0, L_0x199a5b0; 1 drivers +v0x187cfc0_0 .net *"_s6", 31 0, L_0x199a650; 1 drivers +v0x187d040_0 .alias "clk", 0 0, v0x192dc80_0; +v0x184ec90 .array "mem", 0 4095, 31 0; +v0x184ed10_0 .alias "regWE", 0 0, v0x192e690_0; +E_0x1880bc0 .event edge, v0x186cb70_0; +L_0x199a510 .array/port v0x184ec90, L_0x199a650; +L_0x199a5b0 .part v0x191c500_0, 2, 30; +L_0x199a650 .concat [ 30 2 0 0], L_0x199a5b0, C4<00>; +S_0x186d730 .scope module, "ToReg" "mux" 5 92, 2 1, S_0x1877d10; + .timescale 0 0; +P_0x18829d8 .param/l "width" 2 2, +C4<0100000>; +v0x1882730_0 .alias "address", 0 0, v0x192e3d0_0; +v0x186cb70_0 .alias "input0", 31 0, v0x192d690_0; +v0x186cc10_0 .alias "input1", 31 0, v0x192de80_0; +v0x18816a0_0 .var "out", 31 0; +E_0x186d820 .event edge, v0x1882730_0, v0x186cc10_0, v0x186cb70_0; +S_0x1870630 .scope module, "dataOrPC" "mux" 5 96, 2 1, S_0x1877d10; + .timescale 0 0; +P_0x18712a8 .param/l "width" 2 2, +C4<0100000>; +v0x186fb10_0 .alias "address", 0 0, v0x192e480_0; +v0x186ef00_0 .alias "input0", 31 0, v0x192eb60_0; +v0x186e2f0_0 .alias "input1", 31 0, v0x192e710_0; +v0x186e390_0 .var "out", 31 0; +E_0x1870720 .event edge, v0x1877140_0, v0x186e2f0_0, v0x186ef00_0; +S_0x1872710 .scope module, "jumpto" "mux" 5 100, 2 1, S_0x1877d10; + .timescale 0 0; +P_0x1873688 .param/l "width" 2 2, +C4<011010>; +v0x1871e90_0 .alias "address", 0 0, v0x192e150_0; +v0x1871b30_0 .alias "input0", 25 0, v0x192edd0_0; +v0x1871bd0_0 .net "input1", 25 0, L_0x199ac70; 1 drivers +v0x18711f0_0 .var "out", 25 0; +E_0x1872800 .event edge, v0x1871e90_0, v0x1871bd0_0, v0x1871b30_0; +S_0x1874dd0 .scope module, "Rd_or_Rt" "mux" 5 103, 2 1, S_0x1877d10; + .timescale 0 0; +P_0x1877228 .param/l "width" 2 2, +C4<0101>; +v0x1874b10_0 .alias "address", 0 0, v0x192e500_0; +v0x18741d0_0 .alias "input0", 4 0, v0x192d8a0_0; +v0x1874250_0 .alias "input1", 4 0, v0x192da30_0; +v0x18735a0_0 .var "out", 4 0; +E_0x1874ec0 .event edge, v0x1874b10_0, v0x1874250_0, v0x18741d0_0; +S_0x186bd30 .scope module, "writeRA" "mux" 5 107, 2 1, S_0x1877d10; + .timescale 0 0; +P_0x187c478 .param/l "width" 2 2, +C4<0101>; +v0x1877140_0 .alias "address", 0 0, v0x192e480_0; +v0x1876570_0 .alias "input0", 4 0, v0x192e970_0; +v0x1876610_0 .net "input1", 4 0, C4<11111>; 1 drivers +v0x18759a0_0 .var "out", 4 0; +E_0x186be20 .event edge, v0x1877140_0, v0x1876610_0, v0x1876570_0; +S_0x183c020 .scope module, "dff" "dff" 27 9; + .timescale 0 0; +P_0x16f8628 .param/l "width" 27 10, +C4<01000>; +v0x192f0f0_0 .net "ce", 0 0, C4; 0 drivers +v0x192f170_0 .net "clk", 0 0, C4; 0 drivers +v0x192f1f0_0 .net "dataIn", 7 0, C4; 0 drivers +v0x192f270_0 .net "dataOut", 7 0, v0x192f2f0_0; 1 drivers +v0x192f2f0_0 .var "mem", 7 0; +E_0x191d3e0 .event posedge, v0x192f170_0; +S_0x181b0b0 .scope module, "instruction_memory" "instruction_memory" 8 3; + .timescale 0 0; +L_0x199ae10 .functor BUFZ 32, L_0x199ad70, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; +v0x192f370_0 .net "Addr", 31 0, C4; 0 drivers +v0x192f430_0 .net "DataIn", 31 0, C4; 0 drivers +v0x192f4d0_0 .net "DataOut", 31 0, L_0x199ae10; 1 drivers +v0x192f570_0 .net *"_s0", 31 0, L_0x199ad70; 1 drivers +v0x192f5f0_0 .net "clk", 0 0, C4; 0 drivers +v0x192f690 .array "mem", 0 4095, 31 0; +v0x192f710_0 .net "regWE", 0 0, C4; 0 drivers +E_0x1881750 .event edge, v0x192f370_0; +L_0x199ad70 .array/port v0x192f690, C4; +S_0x18d7bd0 .scope module, "mux32to1by1" "mux32to1by1" 28 1; + .timescale 0 0; +v0x192f7b0_0 .net "address", 4 0, C4; 0 drivers +v0x192f870_0 .net "inputs", 31 0, C4; 0 drivers +v0x192f910_0 .net "mux", 0 0, C4; 0 drivers +v0x192f9b0_0 .net "out", 0 0, L_0x199aec0; 1 drivers +L_0x199aec0 .part/v C4, C4, 1; + .scope S_0x1870ea0; +T_0 ; + %wait E_0x17d52c0; + %load/v 8, v0x18550d0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_0.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_0.1, 6; + %jmp T_0.2; +T_0.0 ; + %load/v 8, v0x173ead0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x18538c0_0, 0, 8; + %jmp T_0.2; +T_0.1 ; + %load/v 8, v0x1855050_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x18538c0_0, 0, 8; + %jmp T_0.2; +T_0.2 ; + %jmp T_0; + .thread T_0, $push; + .scope S_0x192ce00; +T_1 ; + %wait E_0x192b9b0; + %load/v 8, v0x192d510_0, 6; + %cmpi/u 8, 0, 6; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 35, 6; + %jmp/1 T_1.1, 6; + %cmpi/u 8, 43, 6; + %jmp/1 T_1.2, 6; + %cmpi/u 8, 2, 6; + %jmp/1 T_1.3, 6; + %cmpi/u 8, 3, 6; + %jmp/1 T_1.4, 6; + %cmpi/u 8, 5, 6; + %jmp/1 T_1.5, 6; + %cmpi/u 8, 14, 6; + %jmp/1 T_1.6, 6; + %cmpi/u 8, 8, 6; + %jmp/1 T_1.7, 6; + %jmp T_1.8; +T_1.0 ; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 0, 1; + %set/v v0x192d340_0, 0, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %set/v v0x192d0f0_0, 0, 1; + %load/v 8, v0x192cfc0_0, 6; + %cmpi/u 8, 8, 6; + %jmp/1 T_1.9, 6; + %cmpi/u 8, 32, 6; + %jmp/1 T_1.10, 6; + %cmpi/u 8, 34, 6; + %jmp/1 T_1.11, 6; + %cmpi/u 8, 42, 6; + %jmp/1 T_1.12, 6; + %jmp T_1.13; +T_1.9 ; + %set/v v0x192d590_0, 0, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 1, 1; + %set/v v0x192d0f0_0, 1, 1; + %jmp T_1.13; +T_1.10 ; + %set/v v0x192d590_0, 1, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 0, 1; + %jmp T_1.13; +T_1.11 ; + %set/v v0x192d590_0, 1, 1; + %movi 8, 1, 3; + %set/v v0x192cf40_0, 8, 3; + %set/v v0x192d1a0_0, 0, 1; + %jmp T_1.13; +T_1.12 ; + %set/v v0x192d590_0, 1, 1; + %movi 8, 2, 3; + %set/v v0x192cf40_0, 8, 3; + %set/v v0x192d1a0_0, 0, 1; + %jmp T_1.13; +T_1.13 ; + %jmp T_1.8; +T_1.1 ; + %set/v v0x192d590_0, 1, 1; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 0, 1; + %set/v v0x192d340_0, 1, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 1, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 0, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %jmp T_1.8; +T_1.2 ; + %set/v v0x192d590_0, 0, 1; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 1, 1; + %set/v v0x192d340_0, 0, 1; + %set/v v0x192d490_0, 1, 1; + %set/v v0x192d410_0, 0, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 0, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %jmp T_1.8; +T_1.3 ; + %set/v v0x192d590_0, 0, 1; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 0, 1; + %set/v v0x192d340_0, 0, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 0, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 1, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %jmp T_1.8; +T_1.4 ; + %set/v v0x192d590_0, 1, 1; + %set/v v0x192d270_0, 1, 1; + %set/v v0x192cc50_0, 0, 1; + %set/v v0x192d340_0, 0, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 0, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 1, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %jmp T_1.8; +T_1.5 ; + %set/v v0x192d590_0, 0, 1; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 0, 1; + %set/v v0x192d340_0, 1, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 0, 1; + %movi 8, 1, 3; + %set/v v0x192cf40_0, 8, 3; + %set/v v0x192d1a0_0, 0, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 1, 1; + %jmp T_1.8; +T_1.6 ; + %set/v v0x192d590_0, 1, 1; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 1, 1; + %set/v v0x192d340_0, 1, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 0, 1; + %movi 8, 3, 3; + %set/v v0x192cf40_0, 8, 3; + %set/v v0x192d1a0_0, 0, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %jmp T_1.8; +T_1.7 ; + %set/v v0x192d590_0, 1, 1; + %set/v v0x192d270_0, 0, 1; + %set/v v0x192cc50_0, 1, 1; + %set/v v0x192d340_0, 1, 1; + %set/v v0x192d490_0, 0, 1; + %set/v v0x192d410_0, 0, 1; + %set/v v0x192cf40_0, 0, 3; + %set/v v0x192d1a0_0, 0, 1; + %set/v v0x192d0f0_0, 0, 1; + %set/v v0x192d040_0, 0, 1; + %jmp T_1.8; +T_1.8 ; + %jmp T_1; + .thread T_1, $push; + .scope S_0x192b9e0; +T_2 ; + %wait E_0x192bad0; + %load/v 8, v0x192c060_0, 1; + %jmp/0xz T_2.0, 8; + %load/v 8, v0x192bbd0_0, 32; + %ix/getv 3, v0x192bb00_0; + %jmp/1 t_0, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x192bfe0, 0, 8; +t_0 ; +T_2.0 ; + %jmp T_2; + .thread T_2, $push; + .scope S_0x192b600; +T_3 ; + %wait E_0x192ac50; + %load/v 8, v0x192b730_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_3.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_3.1, 6; + %jmp T_3.2; +T_3.0 ; + %load/v 8, v0x192b7f0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x192b930_0, 0, 8; + %jmp T_3.2; +T_3.1 ; + %load/v 8, v0x192b890_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x192b930_0, 0, 8; + %jmp T_3.2; +T_3.2 ; + %jmp T_3; + .thread T_3, $push; + .scope S_0x192adb0; +T_4 ; + %wait E_0x192aea0; + %load/v 8, v0x192b110_0, 32; + %mov 40, 0, 1; + %load/v 41, v0x192b1c0_0, 32; + %mov 73, 0, 1; + %add 8, 41, 33; + %set/v v0x192b260_0, 8, 32; + %set/v v0x192b330_0, 40, 1; + %jmp T_4; + .thread T_4, $push; + .scope S_0x192aa60; +T_5 ; + %wait E_0x19296e0; + %load/v 8, v0x192ab50_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_5.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_5.1, 6; + %jmp T_5.2; +T_5.0 ; + %load/v 8, v0x192abd0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x192ad00_0, 0, 8; + %jmp T_5.2; +T_5.1 ; + %load/v 8, v0x192ac80_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x192ad00_0, 0, 8; + %jmp T_5.2; +T_5.2 ; + %jmp T_5; + .thread T_5, $push; + .scope S_0x192a970; +T_6 ; + %set/v v0x192cb50_0, 0, 32; + %end; + .thread T_6; + .scope S_0x192a970; +T_7 ; + %movi 8, 4, 32; + %set/v v0x192c590_0, 8, 32; + %end; + .thread T_7; + .scope S_0x192a970; +T_8 ; + %wait E_0x1929540; + %load/v 8, v0x192cce0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_8.0, 4; + %load/v 8, v0x192cbd0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x192cb50_0, 0, 8; +T_8.0 ; + %jmp T_8; + .thread T_8; + .scope S_0x1927a20; +T_9 ; + %wait E_0x191e8a0; + %set/v v0x1924400_0, 0, 32; + %jmp T_9; + .thread T_9; + .scope S_0x19276c0; +T_10 ; + %wait E_0x191e8a0; + %load/v 8, v0x19279a0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_10.0, 4; + %load/v 8, v0x1927850_0, 32; + %set/v v0x19278d0_0, 8, 32; +T_10.0 ; + %jmp T_10; + .thread T_10; + .scope S_0x1927360; +T_11 ; + %wait E_0x191e8a0; + %load/v 8, v0x1927640_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_11.0, 4; + %load/v 8, v0x19274f0_0, 32; + %set/v v0x1927570_0, 8, 32; +T_11.0 ; + %jmp T_11; + .thread T_11; + .scope S_0x1927000; +T_12 ; + %wait E_0x191e8a0; + %load/v 8, v0x19272e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_12.0, 4; + %load/v 8, v0x1927190_0, 32; + %set/v v0x1927210_0, 8, 32; +T_12.0 ; + %jmp T_12; + .thread T_12; + .scope S_0x1926ca0; +T_13 ; + %wait E_0x191e8a0; + %load/v 8, v0x1926f80_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_13.0, 4; + %load/v 8, v0x1926e30_0, 32; + %set/v v0x1926eb0_0, 8, 32; +T_13.0 ; + %jmp T_13; + .thread T_13; + .scope S_0x1926940; +T_14 ; + %wait E_0x191e8a0; + %load/v 8, v0x1926c20_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_14.0, 4; + %load/v 8, v0x1926ad0_0, 32; + %set/v v0x1926b50_0, 8, 32; +T_14.0 ; + %jmp T_14; + .thread T_14; + .scope S_0x19265e0; +T_15 ; + %wait E_0x191e8a0; + %load/v 8, v0x19268c0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_15.0, 4; + %load/v 8, v0x1926770_0, 32; + %set/v v0x19267f0_0, 8, 32; +T_15.0 ; + %jmp T_15; + .thread T_15; + .scope S_0x1926280; +T_16 ; + %wait E_0x191e8a0; + %load/v 8, v0x1926560_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_16.0, 4; + %load/v 8, v0x1926410_0, 32; + %set/v v0x1926490_0, 8, 32; +T_16.0 ; + %jmp T_16; + .thread T_16; + .scope S_0x1925f20; +T_17 ; + %wait E_0x191e8a0; + %load/v 8, v0x1926200_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_17.0, 4; + %load/v 8, v0x19260b0_0, 32; + %set/v v0x1926130_0, 8, 32; +T_17.0 ; + %jmp T_17; + .thread T_17; + .scope S_0x1925bc0; +T_18 ; + %wait E_0x191e8a0; + %load/v 8, v0x1925ea0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_18.0, 4; + %load/v 8, v0x1925d50_0, 32; + %set/v v0x1925dd0_0, 8, 32; +T_18.0 ; + %jmp T_18; + .thread T_18; + .scope S_0x1925860; +T_19 ; + %wait E_0x191e8a0; + %load/v 8, v0x1925b40_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_19.0, 4; + %load/v 8, v0x19259f0_0, 32; + %set/v v0x1925a70_0, 8, 32; +T_19.0 ; + %jmp T_19; + .thread T_19; + .scope S_0x1925500; +T_20 ; + %wait E_0x191e8a0; + %load/v 8, v0x19257e0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_20.0, 4; + %load/v 8, v0x1925690_0, 32; + %set/v v0x1925710_0, 8, 32; +T_20.0 ; + %jmp T_20; + .thread T_20; + .scope S_0x19251a0; +T_21 ; + %wait E_0x191e8a0; + %load/v 8, v0x1925480_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_21.0, 4; + %load/v 8, v0x1925330_0, 32; + %set/v v0x19253b0_0, 8, 32; +T_21.0 ; + %jmp T_21; + .thread T_21; + .scope S_0x1924e40; +T_22 ; + %wait E_0x191e8a0; + %load/v 8, v0x1925120_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_22.0, 4; + %load/v 8, v0x1924fd0_0, 32; + %set/v v0x1925050_0, 8, 32; +T_22.0 ; + %jmp T_22; + .thread T_22; + .scope S_0x1924ae0; +T_23 ; + %wait E_0x191e8a0; + %load/v 8, v0x1924dc0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_23.0, 4; + %load/v 8, v0x1924c70_0, 32; + %set/v v0x1924cf0_0, 8, 32; +T_23.0 ; + %jmp T_23; + .thread T_23; + .scope S_0x19247a0; +T_24 ; + %wait E_0x191e8a0; + %load/v 8, v0x1924a60_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_24.0, 4; + %load/v 8, v0x1924910_0, 32; + %set/v v0x1924990_0, 8, 32; +T_24.0 ; + %jmp T_24; + .thread T_24; + .scope S_0x19241f0; +T_25 ; + %wait E_0x191e8a0; + %load/v 8, v0x19228b0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_25.0, 4; + %load/v 8, v0x1922760_0, 32; + %set/v v0x19227e0_0, 8, 32; +T_25.0 ; + %jmp T_25; + .thread T_25; + .scope S_0x1923e90; +T_26 ; + %wait E_0x191e8a0; + %load/v 8, v0x1924170_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_26.0, 4; + %load/v 8, v0x1924020_0, 32; + %set/v v0x19240a0_0, 8, 32; +T_26.0 ; + %jmp T_26; + .thread T_26; + .scope S_0x1923b30; +T_27 ; + %wait E_0x191e8a0; + %load/v 8, v0x1923e10_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_27.0, 4; + %load/v 8, v0x1923cc0_0, 32; + %set/v v0x1923d40_0, 8, 32; +T_27.0 ; + %jmp T_27; + .thread T_27; + .scope S_0x19237d0; +T_28 ; + %wait E_0x191e8a0; + %load/v 8, v0x1923ab0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_28.0, 4; + %load/v 8, v0x1923960_0, 32; + %set/v v0x19239e0_0, 8, 32; +T_28.0 ; + %jmp T_28; + .thread T_28; + .scope S_0x1923470; +T_29 ; + %wait E_0x191e8a0; + %load/v 8, v0x1923750_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_29.0, 4; + %load/v 8, v0x1923600_0, 32; + %set/v v0x1923680_0, 8, 32; +T_29.0 ; + %jmp T_29; + .thread T_29; + .scope S_0x1923110; +T_30 ; + %wait E_0x191e8a0; + %load/v 8, v0x19233f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_30.0, 4; + %load/v 8, v0x19232a0_0, 32; + %set/v v0x1923320_0, 8, 32; +T_30.0 ; + %jmp T_30; + .thread T_30; + .scope S_0x1922db0; +T_31 ; + %wait E_0x191e8a0; + %load/v 8, v0x1923090_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_31.0, 4; + %load/v 8, v0x1922f40_0, 32; + %set/v v0x1922fc0_0, 8, 32; +T_31.0 ; + %jmp T_31; + .thread T_31; + .scope S_0x1922a50; +T_32 ; + %wait E_0x191e8a0; + %load/v 8, v0x1922d30_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_32.0, 4; + %load/v 8, v0x1922be0_0, 32; + %set/v v0x1922c60_0, 8, 32; +T_32.0 ; + %jmp T_32; + .thread T_32; + .scope S_0x19225d0; +T_33 ; + %wait E_0x191e8a0; + %load/v 8, v0x19229d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_33.0, 4; + %load/v 8, v0x1921960_0, 32; + %set/v v0x1921a70_0, 8, 32; +T_33.0 ; + %jmp T_33; + .thread T_33; + .scope S_0x1922270; +T_34 ; + %wait E_0x191e8a0; + %load/v 8, v0x1922550_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_34.0, 4; + %load/v 8, v0x1922400_0, 32; + %set/v v0x1922480_0, 8, 32; +T_34.0 ; + %jmp T_34; + .thread T_34; + .scope S_0x1921f10; +T_35 ; + %wait E_0x191e8a0; + %load/v 8, v0x19221f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_35.0, 4; + %load/v 8, v0x19220a0_0, 32; + %set/v v0x1922120_0, 8, 32; +T_35.0 ; + %jmp T_35; + .thread T_35; + .scope S_0x1921c00; +T_36 ; + %wait E_0x191e8a0; + %load/v 8, v0x1921e90_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_36.0, 4; + %load/v 8, v0x1921d90_0, 32; + %set/v v0x1921e10_0, 8, 32; +T_36.0 ; + %jmp T_36; + .thread T_36; + .scope S_0x19217d0; +T_37 ; + %wait E_0x191e8a0; + %load/v 8, v0x1921b80_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_37.0, 4; + %load/v 8, v0x19219f0_0, 32; + %set/v v0x1921b00_0, 8, 32; +T_37.0 ; + %jmp T_37; + .thread T_37; + .scope S_0x1921490; +T_38 ; + %wait E_0x191e8a0; + %load/v 8, v0x1921750_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_38.0, 4; + %load/v 8, v0x1921600_0, 32; + %set/v v0x1921680_0, 8, 32; +T_38.0 ; + %jmp T_38; + .thread T_38; + .scope S_0x1921150; +T_39 ; + %wait E_0x191e8a0; + %load/v 8, v0x1921410_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_39.0, 4; + %load/v 8, v0x19212c0_0, 32; + %set/v v0x1921340_0, 8, 32; +T_39.0 ; + %jmp T_39; + .thread T_39; + .scope S_0x1920b40; +T_40 ; + %wait E_0x191e8a0; + %load/v 8, v0x19210d0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_40.0, 4; + %load/v 8, v0x1920fa0_0, 32; + %set/v v0x1921050_0, 8, 32; +T_40.0 ; + %jmp T_40; + .thread T_40; + .scope S_0x191ca70; +T_41 ; + %wait E_0x191cb60; + %load/v 8, v0x191c830_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_41.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_41.1, 6; + %jmp T_41.2; +T_41.0 ; + %load/v 8, v0x191cb90_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191ccc0_0, 0, 8; + %jmp T_41.2; +T_41.1 ; + %load/v 8, v0x191cc40_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191ccc0_0, 0, 8; + %jmp T_41.2; +T_41.2 ; + %jmp T_41; + .thread T_41, $push; + .scope S_0x182e070; +T_42 ; + %wait E_0x187fff0; + %load/v 8, v0x191bc40_0, 3; + %cmpi/u 8, 0, 3; + %jmp/1 T_42.0, 6; + %cmpi/u 8, 1, 3; + %jmp/1 T_42.1, 6; + %cmpi/u 8, 2, 3; + %jmp/1 T_42.2, 6; + %cmpi/u 8, 3, 3; + %jmp/1 T_42.3, 6; + %cmpi/u 8, 4, 3; + %jmp/1 T_42.4, 6; + %cmpi/u 8, 5, 3; + %jmp/1 T_42.5, 6; + %cmpi/u 8, 6, 3; + %jmp/1 T_42.6, 6; + %cmpi/u 8, 7, 3; + %jmp/1 T_42.7, 6; + %jmp T_42.8; +T_42.0 ; + %load/v 8, v0x191c270_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %load/v 8, v0x191c170_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 8; + %load/v 8, v0x191c1f0_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 8; + %jmp T_42.8; +T_42.1 ; + %load/v 8, v0x191c270_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %load/v 8, v0x191c170_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 8; + %load/v 8, v0x191c1f0_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 8; + %jmp T_42.8; +T_42.2 ; + %load/v 8, v0x191c8b0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 0; + %jmp T_42.8; +T_42.3 ; + %load/v 8, v0x191c7b0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 0; + %jmp T_42.8; +T_42.4 ; + %load/v 8, v0x191c2f0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 0; + %jmp T_42.8; +T_42.5 ; + %load/v 8, v0x191c600_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 0; + %jmp T_42.8; +T_42.6 ; + %load/v 8, v0x191c680_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 0; + %jmp T_42.8; +T_42.7 ; + %load/v 8, v0x191c700_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x191c500_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x18ee520_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x191c580_0, 0, 0; + %jmp T_42.8; +T_42.8 ; + %jmp T_42; + .thread T_42, $push; + .scope S_0x182e070; +T_43 ; + %wait E_0x1880bc0; + %load/v 8, v0x191c500_0, 32; + %cmpi/u 8, 0, 32; + %jmp/0xz T_43.0, 4; + %ix/load 0, 1, 0; + %assign/v0 v0x191c960_0, 0, 1; + %jmp T_43.1; +T_43.0 ; + %ix/load 0, 1, 0; + %assign/v0 v0x191c960_0, 0, 0; +T_43.1 ; + %jmp T_43; + .thread T_43, $push; + .scope S_0x1846a00; +T_44 ; + %wait E_0x184ed90; + %load/v 8, v0x191d1e0_0, 16; + %ix/load 1, 15, 0; + %mov 4, 0, 1; + %jmp/1 T_44.0, 4; + %load/x1p 56, v0x191d1e0_0, 1; + %jmp T_44.1; +T_44.0 ; + %mov 56, 2, 1; +T_44.1 ; + %mov 40, 56, 1; Move signal select into place + %mov 55, 40, 1; Repetition 16 + %mov 54, 40, 1; Repetition 15 + %mov 53, 40, 1; Repetition 14 + %mov 52, 40, 1; Repetition 13 + %mov 51, 40, 1; Repetition 12 + %mov 50, 40, 1; Repetition 11 + %mov 49, 40, 1; Repetition 10 + %mov 48, 40, 1; Repetition 9 + %mov 47, 40, 1; Repetition 8 + %mov 46, 40, 1; Repetition 7 + %mov 45, 40, 1; Repetition 6 + %mov 44, 40, 1; Repetition 5 + %mov 43, 40, 1; Repetition 4 + %mov 42, 40, 1; Repetition 3 + %mov 41, 40, 1; Repetition 2 + %mov 24, 40, 16; + %ix/load 0, 32, 0; + %assign/v0 v0x191d160_0, 0, 8; + %jmp T_44; + .thread T_44, $push; + .scope S_0x1880ad0; +T_45 ; + %wait E_0x1880bc0; + %load/v 8, v0x184ed10_0, 1; + %jmp/0xz T_45.0, 8; + %load/v 8, v0x187f330_0, 32; + %ix/getv 3, v0x187ff00_0; + %jmp/1 t_1, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x184ec90, 0, 8; +t_1 ; +T_45.0 ; + %jmp T_45; + .thread T_45, $push; + .scope S_0x186d730; +T_46 ; + %wait E_0x186d820; + %load/v 8, v0x1882730_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_46.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_46.1, 6; + %jmp T_46.2; +T_46.0 ; + %load/v 8, v0x186cb70_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x18816a0_0, 0, 8; + %jmp T_46.2; +T_46.1 ; + %load/v 8, v0x186cc10_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x18816a0_0, 0, 8; + %jmp T_46.2; +T_46.2 ; + %jmp T_46; + .thread T_46, $push; + .scope S_0x1870630; +T_47 ; + %wait E_0x1870720; + %load/v 8, v0x186fb10_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_47.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_47.1, 6; + %jmp T_47.2; +T_47.0 ; + %load/v 8, v0x186ef00_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x186e390_0, 0, 8; + %jmp T_47.2; +T_47.1 ; + %load/v 8, v0x186e2f0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x186e390_0, 0, 8; + %jmp T_47.2; +T_47.2 ; + %jmp T_47; + .thread T_47, $push; + .scope S_0x1872710; +T_48 ; + %wait E_0x1872800; + %load/v 8, v0x1871e90_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_48.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_48.1, 6; + %jmp T_48.2; +T_48.0 ; + %load/v 8, v0x1871b30_0, 26; + %ix/load 0, 26, 0; + %assign/v0 v0x18711f0_0, 0, 8; + %jmp T_48.2; +T_48.1 ; + %load/v 8, v0x1871bd0_0, 26; + %ix/load 0, 26, 0; + %assign/v0 v0x18711f0_0, 0, 8; + %jmp T_48.2; +T_48.2 ; + %jmp T_48; + .thread T_48, $push; + .scope S_0x1874dd0; +T_49 ; + %wait E_0x1874ec0; + %load/v 8, v0x1874b10_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_49.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_49.1, 6; + %jmp T_49.2; +T_49.0 ; + %load/v 8, v0x18741d0_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x18735a0_0, 0, 8; + %jmp T_49.2; +T_49.1 ; + %load/v 8, v0x1874250_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x18735a0_0, 0, 8; + %jmp T_49.2; +T_49.2 ; + %jmp T_49; + .thread T_49, $push; + .scope S_0x186bd30; +T_50 ; + %wait E_0x186be20; + %load/v 8, v0x1877140_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_50.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_50.1, 6; + %jmp T_50.2; +T_50.0 ; + %load/v 8, v0x1876570_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x18759a0_0, 0, 8; + %jmp T_50.2; +T_50.1 ; + %load/v 8, v0x1876610_0, 5; + %ix/load 0, 5, 0; + %assign/v0 v0x18759a0_0, 0, 8; + %jmp T_50.2; +T_50.2 ; + %jmp T_50; + .thread T_50, $push; + .scope S_0x1854900; +T_51 ; + %set/v v0x192eff0_0, 0, 1; + %end; + .thread T_51; + .scope S_0x1854900; +T_52 ; + %delay 10, 0; + %load/v 8, v0x192eff0_0, 1; + %inv 8, 1; + %set/v v0x192eff0_0, 8, 1; + %jmp T_52; + .thread T_52; + .scope S_0x1854900; +T_53 ; + %wait E_0x1878900; + %load/v 8, v0x192e0d0_0, 32; + %mov 40, 2, 31; + %movi 71, 0, 1; + %cmp/u 8, 40, 32; + %jmp/0xz T_53.0, 6; + %vpi_call 4 25 "$finish"; +T_53.0 ; + %jmp T_53; + .thread T_53, $push; + .scope S_0x1854900; +T_54 ; + %vpi_call 4 48 "$readmemh", "ben_fib_mem", v0x184ec90; + %vpi_call 4 50 "$readmemh", "ben_fib_mem", v0x192bfe0; + %vpi_call 4 55 "$dumpfile", "dump_fn"; + %vpi_call 4 56 "$dumpvars"; + %set/v v0x192f070_0, 0, 1; + %delay 10, 0; + %set/v v0x192f070_0, 1, 1; + %delay 10, 0; + %set/v v0x192f070_0, 0, 1; + %delay 10, 0; + %vpi_call 4 68 "$display", "Time | PC | Instruction"; + %movi 8, 3, 3; +T_54.0 %cmp/s 0, 8, 3; + %jmp/0xz T_54.1, 5; + %add 8, 1, 3; + %vpi_call 4 70 "$display", "%4t | %h | %h", $time, v0x192e710_0, v0x192e0d0_0; + %delay 20, 0; + %jmp T_54.0; +T_54.1 ; + %vpi_call 4 72 "$display", "... more execution (see waveform)"; + %delay 2000, 0; + %vpi_call 4 77 "$finish"; + %end; + .thread T_54; + .scope S_0x183c020; +T_55 ; + %wait E_0x191d3e0; + %load/v 8, v0x192f0f0_0, 1; + %mov 9, 0, 2; + %cmpi/u 8, 1, 3; + %jmp/0xz T_55.0, 4; + %load/v 8, v0x192f1f0_0, 8; + %ix/load 0, 8, 0; + %assign/v0 v0x192f2f0_0, 0, 8; +T_55.0 ; + %jmp T_55; + .thread T_55; + .scope S_0x181b0b0; +T_56 ; + %wait E_0x1881750; + %load/v 8, v0x192f710_0, 1; + %jmp/0xz T_56.0, 8; + %load/v 8, v0x192f430_0, 32; + %ix/getv 3, v0x192f370_0; + %jmp/1 t_2, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x192f690, 0, 8; +t_2 ; +T_56.0 ; + %jmp T_56; + .thread T_56, $push; +# The file index is used to find the file name in the following table. +:file_names 29; + "N/A"; + ""; + "./mux.v"; + "./adder.v"; + "cpu.t.v"; + "./cpu.v"; + "./control.v"; + "./ifetch.v"; + "./memory.v"; + "./add32bit.v"; + "./instructionDecoderR.v"; + "./instructionDecoderI.v"; + "./instructionDecoderJ.v"; + "./regfile.v"; + "./decoders.v"; + "./register32zero.v"; + "./register32.v"; + "./mux32to1by32.v"; + "./execute.v"; + "./aluK.v"; + "./adder_subtracter.v"; + "./xor_32bit.v"; + "./slt.v"; + "./and_32bit.v"; + "./nand_32bit.v"; + "./nor_32bit.v"; + "./or_32bit.v"; + "./dff.v"; + "./mux32to1by1.v"; diff --git a/testdm b/testdm new file mode 100755 index 0000000..03af903 --- /dev/null +++ b/testdm @@ -0,0 +1,80 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2613fc0 .scope module, "testDM" "testDM" 2 5; + .timescale 0 0; +v0x26290e0_0 .var "WrEn", 0 0; +v0x26291b0_0 .var "address", 6 0; +v0x2629260_0 .var "dIn", 31 0; +v0x2629310_0 .net "dOut", 31 0, v0x2628f10_0; 1 drivers +S_0x26140b0 .scope module, "DM" "datamemory" 2 12, 3 8, S_0x2613fc0; + .timescale 0 0; +P_0x2614508 .param/l "addresswidth" 3 10, +C4<0111>; +P_0x2614530 .param/l "depth" 3 11, +C4<010000000>; +P_0x2614558 .param/l "width" 3 12, +C4<0100000>; +v0x2615fb0_0 .net "address", 6 0, v0x26291b0_0; 1 drivers +v0x2628e70_0 .net "dataIn", 31 0, v0x2629260_0; 1 drivers +v0x2628f10_0 .var "dataOut", 31 0; +v0x2628fb0 .array "memory", 0 127, 31 0; +v0x2629060_0 .net "writeEnable", 0 0, v0x26290e0_0; 1 drivers +E_0x25f1140 .event edge, v0x2628e70_0, v0x2615fb0_0, v0x2629060_0; + .scope S_0x26140b0; +T_0 ; + %wait E_0x25f1140; + %load/v 8, v0x2629060_0, 1; + %jmp/0xz T_0.0, 8; + %load/v 8, v0x2628e70_0, 32; + %ix/getv 3, v0x2615fb0_0; + %jmp/1 t_0, 4; + %ix/load 0, 32, 0; word width + %ix/load 1, 0, 0; part off + %assign/av v0x2628fb0, 0, 8; +t_0 ; +T_0.0 ; + %ix/getv 3, v0x2615fb0_0; + %load/av 8, v0x2628fb0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x2628f10_0, 0, 8; + %jmp T_0; + .thread T_0, $push; + .scope S_0x2613fc0; +T_1 ; + %set/v v0x26290e0_0, 1, 1; + %movi 8, 20, 32; + %set/v v0x2629260_0, 8, 32; + %movi 8, 5, 7; + %set/v v0x26291b0_0, 8, 7; + %delay 15, 0; + %vpi_call 2 19 "$display", "%b", v0x2629310_0; + %set/v v0x26290e0_0, 0, 1; + %movi 8, 20, 32; + %set/v v0x2629260_0, 8, 32; + %movi 8, 5, 7; + %set/v v0x26291b0_0, 8, 7; + %delay 15, 0; + %vpi_call 2 25 "$display", "%b", v0x2629310_0; + %set/v v0x26290e0_0, 1, 1; + %movi 8, 15, 32; + %set/v v0x2629260_0, 8, 32; + %movi 8, 7, 7; + %set/v v0x26291b0_0, 8, 7; + %delay 15, 0; + %vpi_call 2 31 "$display", "%b", v0x2629310_0; + %set/v v0x26290e0_0, 0, 1; + %movi 8, 30, 32; + %set/v v0x2629260_0, 8, 32; + %movi 8, 7, 7; + %set/v v0x26291b0_0, 8, 7; + %delay 15, 0; + %vpi_call 2 37 "$display", "%b", v0x2629310_0; + %end; + .thread T_1; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "datamemory.t.v"; + "./datamemory.v"; diff --git a/testexec b/testexec new file mode 100755 index 0000000..f8106c3 --- /dev/null +++ b/testexec @@ -0,0 +1,4164 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x1e1db00 .scope module, "addressmux" "addressmux" 2 35; + .timescale 0 0; +v0x1cd5b70_0 .net "addr0", 4 0, C4; 0 drivers +v0x1eb55e0_0 .net "addr1", 4 0, C4; 0 drivers +v0x1eb5680_0 .net "mux_address", 0 0, C4; 0 drivers +v0x1eb5720_0 .var "out", 0 0; +E_0x1e20a50 .event edge, v0x1eb5680_0, v0x1eb55e0_0, v0x1cd5b70_0; +S_0x1e11170 .scope module, "behavioralFullAdder" "behavioralFullAdder" 3 3; + .timescale 0 0; +v0x1eb57d0_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x1eb5890_0 .net *"_s11", 1 0, L_0x1f03a00; 1 drivers +v0x1eb5930_0 .net *"_s13", 1 0, L_0x1f03ba0; 1 drivers +v0x1eb59d0_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x1eb5a80_0 .net *"_s17", 1 0, L_0x1f03d10; 1 drivers +v0x1eb5b20_0 .net *"_s3", 1 0, L_0x1f037c0; 1 drivers +v0x1eb5c00_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x1eb5ca0_0 .net *"_s7", 1 0, L_0x1f038b0; 1 drivers +v0x1eb5d90_0 .net "a", 0 0, C4; 0 drivers +v0x1eb5e30_0 .net "b", 0 0, C4; 0 drivers +v0x1eb5f30_0 .net "carryin", 0 0, C4; 0 drivers +v0x1eb5fd0_0 .net "carryout", 0 0, L_0x1f03630; 1 drivers +v0x1eb60e0_0 .net "sum", 0 0, L_0x1f036d0; 1 drivers +L_0x1f03630 .part L_0x1f03d10, 1, 1; +L_0x1f036d0 .part L_0x1f03d10, 0, 1; +L_0x1f037c0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x1f038b0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x1f03a00 .arith/sum 2, L_0x1f037c0, L_0x1f038b0; +L_0x1f03ba0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x1f03d10 .arith/sum 2, L_0x1f03a00, L_0x1f03ba0; +S_0x1dfcea0 .scope module, "mux" "mux" 2 1; + .timescale 0 0; +P_0x1d6fd88 .param/l "width" 2 2, +C4<0100000>; +v0x1eb61c0_0 .net "address", 0 0, C4; 0 drivers +v0x1eb6280_0 .net "input0", 31 0, C4; 0 drivers +v0x1eb6320_0 .net "input1", 31 0, C4; 0 drivers +v0x1eb63c0_0 .var "out", 31 0; +E_0x1eb5a50 .event edge, v0x1eb61c0_0, v0x1eb6320_0, v0x1eb6280_0; +S_0x1df01b0 .scope module, "testExecute" "testExecute" 4 11; + .timescale 0 0; +v0x1f030a0_0 .var "ALU_OperandSource", 0 0; +v0x1f03140_0 .var "ALU_cmd", 2 0; +v0x1f031c0_0 .var "Da", 31 0; +v0x1f03240_0 .var "Db", 31 0; +v0x1f032c0_0 .net "carryout", 0 0, v0x1ed3970_0; 1 drivers +v0x1f03340_0 .var "imm", 15 0; +v0x1f033c0_0 .net "overflow", 0 0, v0x1f01c30_0; 1 drivers +v0x1f03440_0 .net "result", 31 0, v0x1f01bb0_0; 1 drivers +v0x1f03560_0 .net "zero", 0 0, v0x1f02070_0; 1 drivers +S_0x1f02b80 .scope task, "checkResult" "checkResult" 4 30, 4 30, S_0x1df01b0; + .timescale 0 0; +v0x1f02c70_0 .var "carryout", 0 0; +v0x1f02cf0_0 .var "exp_carryout", 0 0; +v0x1f02d70_0 .var "exp_overflow", 0 0; +v0x1f02df0_0 .var "exp_result", 31 0; +v0x1f02ea0_0 .var "exp_zero", 0 0; +v0x1f02f20_0 .var "overflow", 0 0; +v0x1f02fa0_0 .var "result", 31 0; +v0x1f03020_0 .var "zero", 0 0; +TD_testExecute.checkResult ; + %load/v 8, v0x1f02fa0_0, 32; + %load/v 40, v0x1f02df0_0, 32; + %cmp/u 8, 40, 32; + %mov 8, 4, 1; + %load/v 9, v0x1f03020_0, 1; + %load/v 10, v0x1f02ea0_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x1f02c70_0, 1; + %load/v 10, v0x1f02cf0_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x1f02f20_0, 1; + %load/v 10, v0x1f02d70_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %jmp/0xz T_0.0, 8; + %vpi_call 4 41 "$display", "Passed."; + %jmp T_0.1; +T_0.0 ; + %vpi_call 4 44 "$display", "Failed"; + %vpi_call 4 45 "$display", "result: %d", v0x1f02fa0_0; + %vpi_call 4 46 "$display", "expected: %d", v0x1f02df0_0; + %vpi_call 4 47 "$display", "zero %b, carryout %b, overflow %b", v0x1f03020_0, v0x1f02c70_0, v0x1f02f20_0; +T_0.1 ; + %end; +S_0x1eb6470 .scope module, "dut" "execute" 4 20, 5 5, S_0x1df01b0; + .timescale 0 0; +v0x1f02450_0 .net "ALU_OperandSource", 0 0, v0x1f030a0_0; 1 drivers +v0x1f02500_0 .net "Da", 31 0, v0x1f031c0_0; 1 drivers +v0x1ed3860_0 .net "Db", 31 0, v0x1f03240_0; 1 drivers +v0x1f026c0_0 .net "Operand", 31 0, v0x1f023a0_0; 1 drivers +v0x1f02770_0 .alias "carryout", 0 0, v0x1f032c0_0; +v0x1f02820_0 .net "command", 2 0, v0x1f03140_0; 1 drivers +v0x1f028a0_0 .var "extended_imm", 31 0; +v0x1f02920_0 .net "imm", 15 0, v0x1f03340_0; 1 drivers +v0x1f029a0_0 .alias "overflow", 0 0, v0x1f033c0_0; +v0x1f02a20_0 .alias "result", 31 0, v0x1f03440_0; +v0x1f02ad0_0 .alias "zero", 0 0, v0x1f03560_0; +E_0x1eb6560 .event edge, v0x1f02920_0; +S_0x1f02180 .scope module, "ALUSource" "mux2to1by32" 5 22, 2 18, S_0x1eb6470; + .timescale 0 0; +v0x1f01f10_0 .alias "address", 0 0, v0x1f02450_0; +v0x1f022a0_0 .alias "input0", 31 0, v0x1ed3860_0; +v0x1f02320_0 .net "input1", 31 0, v0x1f028a0_0; 1 drivers +v0x1f023a0_0 .var "out", 31 0; +E_0x1f02270 .event edge, v0x1f01f10_0, v0x1f02320_0, v0x1f022a0_0; +S_0x1eb65d0 .scope module, "Alu" "ALUcontrolLUT" 5 28, 6 11, S_0x1eb6470; + .timescale 0 0; +v0x1f012f0_0 .alias "ALUcommand", 2 0, v0x1f02820_0; +v0x1f013a0_0 .alias "a", 31 0, v0x1f02500_0; +v0x1f01820_0 .net "adder_cout", 0 0, L_0x1f34a10; 1 drivers +v0x1f018a0_0 .net "adder_flag", 0 0, L_0x1f35fc0; 1 drivers +RS_0x7fdf889713d8/0/0 .resolv tri, L_0x1f18a90, L_0x1f1ce90, L_0x1f211a0, L_0x1f254f0; +RS_0x7fdf889713d8/0/4 .resolv tri, L_0x1f297d0, L_0x1f2dac0, L_0x1f31de0, L_0x1f36070; +RS_0x7fdf889713d8 .resolv tri, RS_0x7fdf889713d8/0/0, RS_0x7fdf889713d8/0/4, C4, C4; +v0x1f01920_0 .net8 "addsub", 31 0, RS_0x7fdf889713d8; 8 drivers +RS_0x7fdf88963cf8/0/0 .resolv tri, L_0x1f49210, L_0x1f49540, L_0x1f49870, L_0x1f49c30; +RS_0x7fdf88963cf8/0/4 .resolv tri, L_0x1f49fe0, L_0x1f4a330, L_0x1f4a790, L_0x1f4ab30; +RS_0x7fdf88963cf8/0/8 .resolv tri, L_0x1f4abd0, L_0x1f4b260, L_0x1f4b300, L_0x1f4b940; +RS_0x7fdf88963cf8/0/12 .resolv tri, L_0x1f4b9e0, L_0x1f4bff0, L_0x1f4c090, L_0x1f4c850; +RS_0x7fdf88963cf8/0/16 .resolv tri, L_0x1f4c8f0, L_0x1f4ccf0, L_0x1f4ce80, L_0x1f4d400; +RS_0x7fdf88963cf8/0/20 .resolv tri, L_0x1f4d570, L_0x1f4dae0, L_0x1f4dc80, L_0x1f4e1d0; +RS_0x7fdf88963cf8/0/24 .resolv tri, L_0x1f4e350, L_0x1f4eb40, L_0x1f4ebe0, L_0x1f4f270; +RS_0x7fdf88963cf8/0/28 .resolv tri, L_0x1f4f310, L_0x1f4f960, L_0x1f4fce0, L_0x1f4fa00; +RS_0x7fdf88963cf8/1/0 .resolv tri, RS_0x7fdf88963cf8/0/0, RS_0x7fdf88963cf8/0/4, RS_0x7fdf88963cf8/0/8, RS_0x7fdf88963cf8/0/12; +RS_0x7fdf88963cf8/1/4 .resolv tri, RS_0x7fdf88963cf8/0/16, RS_0x7fdf88963cf8/0/20, RS_0x7fdf88963cf8/0/24, RS_0x7fdf88963cf8/0/28; +RS_0x7fdf88963cf8 .resolv tri, RS_0x7fdf88963cf8/1/0, RS_0x7fdf88963cf8/1/4, C4, C4; +v0x1f019a0_0 .net8 "andin", 31 0, RS_0x7fdf88963cf8; 32 drivers +v0x1f01a20_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ed3970_0 .var "cout", 0 0; +v0x1f01bb0_0 .var "finalsignal", 31 0; +v0x1f01c30_0 .var "flag", 0 0; +RS_0x7fdf88962ac8/0/0 .resolv tri, L_0x1f50190, L_0x1f508e0, L_0x1f50b60, L_0x1f50f20; +RS_0x7fdf88962ac8/0/4 .resolv tri, L_0x1f512d0, L_0x1f51620, L_0x1f51a80, L_0x1f51e20; +RS_0x7fdf88962ac8/0/8 .resolv tri, L_0x1f51ec0, L_0x1f52550, L_0x1f525f0, L_0x1f52c30; +RS_0x7fdf88962ac8/0/12 .resolv tri, L_0x1f52cd0, L_0x1f532e0, L_0x1f53380, L_0x1f428a0; +RS_0x7fdf88962ac8/0/16 .resolv tri, L_0x1f42940, L_0x1f42bb0, L_0x1f549e0, L_0x1f54eb0; +RS_0x7fdf88962ac8/0/20 .resolv tri, L_0x1f55020, L_0x1f55590, L_0x1f55730, L_0x1f55c80; +RS_0x7fdf88962ac8/0/24 .resolv tri, L_0x1f55e00, L_0x1f565f0, L_0x1f56690, L_0x1f56d20; +RS_0x7fdf88962ac8/0/28 .resolv tri, L_0x1f57070, L_0x1f56eb0, L_0x1f57250, L_0x1f537a0; +RS_0x7fdf88962ac8/1/0 .resolv tri, RS_0x7fdf88962ac8/0/0, RS_0x7fdf88962ac8/0/4, RS_0x7fdf88962ac8/0/8, RS_0x7fdf88962ac8/0/12; +RS_0x7fdf88962ac8/1/4 .resolv tri, RS_0x7fdf88962ac8/0/16, RS_0x7fdf88962ac8/0/20, RS_0x7fdf88962ac8/0/24, RS_0x7fdf88962ac8/0/28; +RS_0x7fdf88962ac8 .resolv tri, RS_0x7fdf88962ac8/1/0, RS_0x7fdf88962ac8/1/4, C4, C4; +v0x1f01cb0_0 .net8 "nandin", 31 0, RS_0x7fdf88962ac8; 32 drivers +RS_0x7fdf88961898/0/0 .resolv tri, L_0x1f57820, L_0x1f582f0, L_0x1f58620, L_0x1f589e0; +RS_0x7fdf88961898/0/4 .resolv tri, L_0x1f58d90, L_0x1f590e0, L_0x1f59540, L_0x1f598e0; +RS_0x7fdf88961898/0/8 .resolv tri, L_0x1f59980, L_0x1f5a010, L_0x1f5a0b0, L_0x1f5a6f0; +RS_0x7fdf88961898/0/12 .resolv tri, L_0x1f5a790, L_0x1f5ada0, L_0x1f5ae40, L_0x1f5b600; +RS_0x7fdf88961898/0/16 .resolv tri, L_0x1f5b6a0, L_0x1f5baa0, L_0x1f5bc30, L_0x1f5c1b0; +RS_0x7fdf88961898/0/20 .resolv tri, L_0x1f5c320, L_0x1f5c890, L_0x1f5ca30, L_0x1f5cf80; +RS_0x7fdf88961898/0/24 .resolv tri, L_0x1f5d100, L_0x1f5d8f0, L_0x1f5d990, L_0x1f5e020; +RS_0x7fdf88961898/0/28 .resolv tri, L_0x1f5e0c0, L_0x1f5e710, L_0x1f5ea90, L_0x1f5e7b0; +RS_0x7fdf88961898/1/0 .resolv tri, RS_0x7fdf88961898/0/0, RS_0x7fdf88961898/0/4, RS_0x7fdf88961898/0/8, RS_0x7fdf88961898/0/12; +RS_0x7fdf88961898/1/4 .resolv tri, RS_0x7fdf88961898/0/16, RS_0x7fdf88961898/0/20, RS_0x7fdf88961898/0/24, RS_0x7fdf88961898/0/28; +RS_0x7fdf88961898 .resolv tri, RS_0x7fdf88961898/1/0, RS_0x7fdf88961898/1/4, C4, C4; +v0x1f01d30_0 .net8 "norin", 31 0, RS_0x7fdf88961898; 32 drivers +RS_0x7fdf88960668/0/0 .resolv tri, L_0x1f5ef40, L_0x1f5f690, L_0x1f5f910, L_0x1f5fcd0; +RS_0x7fdf88960668/0/4 .resolv tri, L_0x1f60080, L_0x1f603d0, L_0x1f60830, L_0x1f60bd0; +RS_0x7fdf88960668/0/8 .resolv tri, L_0x1f60c70, L_0x1f61300, L_0x1f613a0, L_0x1f619e0; +RS_0x7fdf88960668/0/12 .resolv tri, L_0x1f61a80, L_0x1f62090, L_0x1f62130, L_0x1f628f0; +RS_0x7fdf88960668/0/16 .resolv tri, L_0x1f62990, L_0x1f62d90, L_0x1f62f20, L_0x1f634a0; +RS_0x7fdf88960668/0/20 .resolv tri, L_0x1f63610, L_0x1f63b80, L_0x1f63d20, L_0x1f45460; +RS_0x7fdf88960668/0/24 .resolv tri, L_0x1f45500, L_0x1f45ae0, L_0x1f45ee0, L_0x1f45c70; +RS_0x7fdf88960668/0/28 .resolv tri, L_0x1f66190, L_0x1f66970, L_0x1f66cf0, L_0x1f66a10; +RS_0x7fdf88960668/1/0 .resolv tri, RS_0x7fdf88960668/0/0, RS_0x7fdf88960668/0/4, RS_0x7fdf88960668/0/8, RS_0x7fdf88960668/0/12; +RS_0x7fdf88960668/1/4 .resolv tri, RS_0x7fdf88960668/0/16, RS_0x7fdf88960668/0/20, RS_0x7fdf88960668/0/24, RS_0x7fdf88960668/0/28; +RS_0x7fdf88960668 .resolv tri, RS_0x7fdf88960668/1/0, RS_0x7fdf88960668/1/4, C4, C4; +v0x1f01de0_0 .net8 "orin", 31 0, RS_0x7fdf88960668; 32 drivers +RS_0x7fdf88966788 .resolv tri, L_0x1f48490, L_0x1f48f00, C4, C4; +v0x1f01e90_0 .net8 "slt", 31 0, RS_0x7fdf88966788; 2 drivers +RS_0x7fdf889679b8/0/0 .resolv tri, L_0x1f32380, L_0x1f36620, L_0x1f36950, L_0x1f36d10; +RS_0x7fdf889679b8/0/4 .resolv tri, L_0x1f370c0, L_0x1f37410, L_0x1f37870, L_0x1f37c10; +RS_0x7fdf889679b8/0/8 .resolv tri, L_0x1f37cb0, L_0x1f38340, L_0x1f383e0, L_0x1f38a20; +RS_0x7fdf889679b8/0/12 .resolv tri, L_0x1f38ac0, L_0x1f390d0, L_0x1f39170, L_0x1f39450; +RS_0x7fdf889679b8/0/16 .resolv tri, L_0x1f39bd0, L_0x1f39f30, L_0x1f3a0c0, L_0x1f3a640; +RS_0x7fdf889679b8/0/20 .resolv tri, L_0x1f3a7b0, L_0x1f3ad20, L_0x1f3aec0, L_0x1f3b410; +RS_0x7fdf889679b8/0/24 .resolv tri, L_0x1f3b590, L_0x1f3bd80, L_0x1f3be20, L_0x1f3c4b0; +RS_0x7fdf889679b8/0/28 .resolv tri, L_0x1f3c550, L_0x1f3cba0, L_0x1f3cf20, L_0x1f3cc40; +RS_0x7fdf889679b8/1/0 .resolv tri, RS_0x7fdf889679b8/0/0, RS_0x7fdf889679b8/0/4, RS_0x7fdf889679b8/0/8, RS_0x7fdf889679b8/0/12; +RS_0x7fdf889679b8/1/4 .resolv tri, RS_0x7fdf889679b8/0/16, RS_0x7fdf889679b8/0/20, RS_0x7fdf889679b8/0/24, RS_0x7fdf889679b8/0/28; +RS_0x7fdf889679b8 .resolv tri, RS_0x7fdf889679b8/1/0, RS_0x7fdf889679b8/1/4, C4, C4; +v0x1f01fc0_0 .net8 "xorin", 31 0, RS_0x7fdf889679b8; 32 drivers +v0x1f02070_0 .var "zeroflag", 0 0; +E_0x1eb66c0 .event edge, v0x1f01bb0_0; +E_0x1eb6730/0 .event edge, v0x1ebaa50_0, v0x1ed9300_0, v0x1ebe820_0, v0x1ec2ee0_0; +E_0x1eb6730/1 .event edge, v0x1ec6ce0_0, v0x1ed3a00_0, v0x1f009c0_0, v0x1f00800_0; +E_0x1eb6730 .event/or E_0x1eb6730/0, E_0x1eb6730/1; +S_0x1ed97d0 .scope module, "addsub0" "adder_subtracter" 6 34, 7 175, S_0x1eb65d0; + .timescale 0 0; +L_0x1f03f40 .functor NOT 1, L_0x1f03ff0, C4<0>, C4<0>, C4<0>; +L_0x1f04180 .functor NOT 1, L_0x1f04230, C4<0>, C4<0>, C4<0>; +L_0x1f04450 .functor NOT 1, L_0x1f044b0, C4<0>, C4<0>, C4<0>; +L_0x1f04640 .functor NOT 1, L_0x1f046f0, C4<0>, C4<0>, C4<0>; +L_0x1f048d0 .functor NOT 1, L_0x1f04980, C4<0>, C4<0>, C4<0>; +L_0x1f04b70 .functor NOT 1, L_0x1f04bd0, C4<0>, C4<0>, C4<0>; +L_0x1f04a70 .functor NOT 1, L_0x1f04fe0, C4<0>, C4<0>, C4<0>; +L_0x1f051a0 .functor NOT 1, L_0x1f052a0, C4<0>, C4<0>, C4<0>; +L_0x1f054c0 .functor NOT 1, L_0x1f05570, C4<0>, C4<0>, C4<0>; +L_0x1f05390 .functor NOT 1, L_0x1f05850, C4<0>, C4<0>, C4<0>; +L_0x1f059a0 .functor NOT 1, L_0x1f05a50, C4<0>, C4<0>, C4<0>; +L_0x1f05c00 .functor NOT 1, L_0x1f05cb0, C4<0>, C4<0>, C4<0>; +L_0x1f057f0 .functor NOT 1, L_0x1f05ec0, C4<0>, C4<0>, C4<0>; +L_0x1f06090 .functor NOT 1, L_0x1f06140, C4<0>, C4<0>, C4<0>; +L_0x1f04ed0 .functor NOT 1, L_0x1f06530, C4<0>, C4<0>, C4<0>; +L_0x1f066d0 .functor NOT 1, L_0x1f067c0, C4<0>, C4<0>, C4<0>; +L_0x1f06670 .functor NOT 1, L_0x1f06a10, C4<0>, C4<0>, C4<0>; +L_0x1f06950 .functor NOT 1, L_0x1f06d10, C4<0>, C4<0>, C4<0>; +L_0x1f06ba0 .functor NOT 1, L_0x1f06f30, C4<0>, C4<0>, C4<0>; +L_0x1f06e50 .functor NOT 1, L_0x1f06c70, C4<0>, C4<0>, C4<0>; +L_0x1f070c0 .functor NOT 1, L_0x1f07450, C4<0>, C4<0>, C4<0>; +L_0x1f07350 .functor NOT 1, L_0x1f071b0, C4<0>, C4<0>, C4<0>; +L_0x1efef10 .functor NOT 1, L_0x1f07540, C4<0>, C4<0>, C4<0>; +L_0x1f03aa0 .functor NOT 1, L_0x1f07630, C4<0>, C4<0>, C4<0>; +L_0x1f07c60 .functor NOT 1, L_0x1f07fa0, C4<0>, C4<0>, C4<0>; +L_0x1f07eb0 .functor NOT 1, L_0x1f07d10, C4<0>, C4<0>, C4<0>; +L_0x1f080e0 .functor NOT 1, L_0x1f08470, C4<0>, C4<0>, C4<0>; +L_0x1f08360 .functor NOT 1, L_0x1f081e0, C4<0>, C4<0>, C4<0>; +L_0x1f085b0 .functor NOT 1, L_0x1f08990, C4<0>, C4<0>, C4<0>; +L_0x1f08860 .functor NOT 1, L_0x1f086b0, C4<0>, C4<0>, C4<0>; +L_0x1f05080 .functor NOT 1, L_0x1f08ad0, C4<0>, C4<0>, C4<0>; +L_0x1f08db0 .functor NOT 1, L_0x1f08e10, C4<0>, C4<0>, C4<0>; +v0x1efd5d0_0 .net "_", 0 0, L_0x1f18940; 1 drivers +v0x1efdc10_0 .net "_1", 0 0, L_0x1f1cd40; 1 drivers +v0x1efdc90_0 .net "_2", 0 0, L_0x1f21050; 1 drivers +v0x1efdd10_0 .net "_3", 0 0, L_0x1f253a0; 1 drivers +v0x1efdd90_0 .net "_4", 0 0, L_0x1f29680; 1 drivers +v0x1efde10_0 .net "_5", 0 0, L_0x1f2d970; 1 drivers +v0x1efde90_0 .net "_6", 0 0, L_0x1f31c90; 1 drivers +v0x1efdf10_0 .net *"_s0", 0 0, L_0x1f03f40; 1 drivers +v0x1efdfe0_0 .net *"_s100", 0 0, L_0x1f07eb0; 1 drivers +v0x1efe060_0 .net *"_s103", 0 0, L_0x1f07d10; 1 drivers +v0x1efe140_0 .net *"_s104", 0 0, L_0x1f080e0; 1 drivers +v0x1efe1c0_0 .net *"_s107", 0 0, L_0x1f08470; 1 drivers +v0x1efe2b0_0 .net *"_s108", 0 0, L_0x1f08360; 1 drivers +v0x1efe330_0 .net *"_s11", 0 0, L_0x1f044b0; 1 drivers +v0x1efe430_0 .net *"_s111", 0 0, L_0x1f081e0; 1 drivers +v0x1efe4b0_0 .net *"_s112", 0 0, L_0x1f085b0; 1 drivers +v0x1efe3b0_0 .net *"_s115", 0 0, L_0x1f08990; 1 drivers +v0x1efe5e0_0 .net *"_s116", 0 0, L_0x1f08860; 1 drivers +v0x1efe700_0 .net *"_s119", 0 0, L_0x1f086b0; 1 drivers +v0x1efe780_0 .net *"_s12", 0 0, L_0x1f04640; 1 drivers +v0x1efe660_0 .net *"_s120", 0 0, L_0x1f05080; 1 drivers +v0x1efe8b0_0 .net *"_s123", 0 0, L_0x1f08ad0; 1 drivers +v0x1efe800_0 .net *"_s124", 0 0, L_0x1f08db0; 1 drivers +v0x1efe9f0_0 .net *"_s127", 0 0, L_0x1f08e10; 1 drivers +v0x1efe950_0 .net *"_s15", 0 0, L_0x1f046f0; 1 drivers +v0x1efeb40_0 .net *"_s16", 0 0, L_0x1f048d0; 1 drivers +v0x1efea90_0 .net *"_s19", 0 0, L_0x1f04980; 1 drivers +v0x1efeca0_0 .net *"_s20", 0 0, L_0x1f04b70; 1 drivers +v0x1efebe0_0 .net *"_s23", 0 0, L_0x1f04bd0; 1 drivers +v0x1efee10_0 .net *"_s24", 0 0, L_0x1f04a70; 1 drivers +v0x1efed20_0 .net *"_s27", 0 0, L_0x1f04fe0; 1 drivers +v0x1efef90_0 .net *"_s28", 0 0, L_0x1f051a0; 1 drivers +v0x1efee90_0 .net *"_s3", 0 0, L_0x1f03ff0; 1 drivers +v0x1eff120_0 .net *"_s31", 0 0, L_0x1f052a0; 1 drivers +v0x1eff010_0 .net *"_s32", 0 0, L_0x1f054c0; 1 drivers +v0x1eff2c0_0 .net *"_s35", 0 0, L_0x1f05570; 1 drivers +v0x1eff1a0_0 .net *"_s36", 0 0, L_0x1f05390; 1 drivers +v0x1eff240_0 .net *"_s39", 0 0, L_0x1f05850; 1 drivers +v0x1eff480_0 .net *"_s4", 0 0, L_0x1f04180; 1 drivers +v0x1eff500_0 .net *"_s40", 0 0, L_0x1f059a0; 1 drivers +v0x1eff340_0 .net *"_s43", 0 0, L_0x1f05a50; 1 drivers +v0x1eff3e0_0 .net *"_s44", 0 0, L_0x1f05c00; 1 drivers +v0x1eff6e0_0 .net *"_s47", 0 0, L_0x1f05cb0; 1 drivers +v0x1eff760_0 .net *"_s48", 0 0, L_0x1f057f0; 1 drivers +v0x1eff580_0 .net *"_s51", 0 0, L_0x1f05ec0; 1 drivers +v0x1eff620_0 .net *"_s52", 0 0, L_0x1f06090; 1 drivers +v0x1eff960_0 .net *"_s55", 0 0, L_0x1f06140; 1 drivers +v0x1eff9e0_0 .net *"_s56", 0 0, L_0x1f04ed0; 1 drivers +v0x1eff800_0 .net *"_s59", 0 0, L_0x1f06530; 1 drivers +v0x1eff8a0_0 .net *"_s60", 0 0, L_0x1f066d0; 1 drivers +v0x1effc00_0 .net *"_s63", 0 0, L_0x1f067c0; 1 drivers +v0x1effc80_0 .net *"_s64", 0 0, L_0x1f06670; 1 drivers +v0x1effa80_0 .net *"_s67", 0 0, L_0x1f06a10; 1 drivers +v0x1effb20_0 .net *"_s68", 0 0, L_0x1f06950; 1 drivers +v0x1effec0_0 .net *"_s7", 0 0, L_0x1f04230; 1 drivers +v0x1efff40_0 .net *"_s71", 0 0, L_0x1f06d10; 1 drivers +v0x1effd00_0 .net *"_s72", 0 0, L_0x1f06ba0; 1 drivers +v0x1effda0_0 .net *"_s75", 0 0, L_0x1f06f30; 1 drivers +v0x1effe40_0 .net *"_s76", 0 0, L_0x1f06e50; 1 drivers +v0x1f001c0_0 .net *"_s79", 0 0, L_0x1f06c70; 1 drivers +v0x1efffe0_0 .net *"_s8", 0 0, L_0x1f04450; 1 drivers +v0x1f00080_0 .net *"_s80", 0 0, L_0x1f070c0; 1 drivers +v0x1f00120_0 .net *"_s83", 0 0, L_0x1f07450; 1 drivers +v0x1f00460_0 .net *"_s84", 0 0, L_0x1f07350; 1 drivers +v0x1f00260_0 .net *"_s87", 0 0, L_0x1f071b0; 1 drivers +v0x1f00300_0 .net *"_s88", 0 0, L_0x1efef10; 1 drivers +v0x1f003a0_0 .net *"_s91", 0 0, L_0x1f07540; 1 drivers +v0x1f00700_0 .net *"_s92", 0 0, L_0x1f03aa0; 1 drivers +v0x1f00500_0 .net *"_s95", 0 0, L_0x1f07630; 1 drivers +v0x1f005a0_0 .net *"_s96", 0 0, L_0x1f07c60; 1 drivers +v0x1f00640_0 .net *"_s99", 0 0, L_0x1f07fa0; 1 drivers +v0x1f009c0_0 .alias "ans", 31 0, v0x1f01920_0; +v0x1f00780_0 .alias "carryout", 0 0, v0x1f01820_0; +v0x1f00800_0 .alias "command", 2 0, v0x1f02820_0; +v0x1f008a0_0 .net "cout0", 0 0, L_0x1f171b0; 1 drivers +v0x1f00ca0_0 .net "cout1", 0 0, L_0x1f1b630; 1 drivers +v0x1f00ad0_0 .net "cout2", 0 0, L_0x1f1f940; 1 drivers +v0x1f00be0_0 .net "cout3", 0 0, L_0x1f23c90; 1 drivers +v0x1f01030_0 .net "cout4", 0 0, L_0x1f27f70; 1 drivers +v0x1f01140_0 .net "cout5", 0 0, L_0x1f2c260; 1 drivers +v0x1f00db0_0 .net "cout6", 0 0, L_0x1f30580; 1 drivers +RS_0x7fdf889707a8/0/0 .resolv tri, L_0x1f0fce0, L_0x1f0ff20, L_0x1f09270, L_0x1f0fad0; +RS_0x7fdf889707a8/0/4 .resolv tri, L_0x1f08f00, L_0x1f10c00, L_0x1f11030, L_0x1f114d0; +RS_0x7fdf889707a8/0/8 .resolv tri, L_0x1f10df0, L_0x1f11280, L_0x1f11570, L_0x1f11700; +RS_0x7fdf889707a8/0/12 .resolv tri, L_0x1f11a10, L_0x1f11c00, L_0x1f12070, L_0x1f12160; +RS_0x7fdf889707a8/0/16 .resolv tri, L_0x1f11da0, L_0x1f126f0, L_0x1f128e0, L_0x1f12350; +RS_0x7fdf889707a8/0/20 .resolv tri, L_0x1f12b10, L_0x1f12d00, L_0x1f131b0, L_0x1f133a0; +RS_0x7fdf889707a8/0/24 .resolv tri, L_0x1f12e90, L_0x1f134a0, L_0x1f13690, L_0x1f13880; +RS_0x7fdf889707a8/0/28 .resolv tri, L_0x1f13b00, L_0x1f13ff0, L_0x1f141e0, L_0x1f0c610; +RS_0x7fdf889707a8/1/0 .resolv tri, RS_0x7fdf889707a8/0/0, RS_0x7fdf889707a8/0/4, RS_0x7fdf889707a8/0/8, RS_0x7fdf889707a8/0/12; +RS_0x7fdf889707a8/1/4 .resolv tri, RS_0x7fdf889707a8/0/16, RS_0x7fdf889707a8/0/20, RS_0x7fdf889707a8/0/24, RS_0x7fdf889707a8/0/28; +RS_0x7fdf889707a8 .resolv tri, RS_0x7fdf889707a8/1/0, RS_0x7fdf889707a8/1/4, C4, C4; +v0x1f00ec0_0 .net8 "finalB", 31 0, RS_0x7fdf889707a8; 32 drivers +RS_0x7fdf88970148/0/0 .resolv tri, L_0x1f03e50, L_0x1f040e0, L_0x1f04320, L_0x1f045a0; +RS_0x7fdf88970148/0/4 .resolv tri, L_0x1f04830, L_0x1f04ad0, L_0x1f01aa0, L_0x1f05100; +RS_0x7fdf88970148/0/8 .resolv tri, L_0x1f05420, L_0x1f05700, L_0x1f05660, L_0x1f058f0; +RS_0x7fdf88970148/0/12 .resolv tri, L_0x1f05b40, L_0x1f05da0, L_0x1f05fb0, L_0x1f06230; +RS_0x7fdf88970148/0/16 .resolv tri, L_0x1f065d0, L_0x1f068b0, L_0x1f06b00, L_0x1f06db0; +RS_0x7fdf88970148/0/20 .resolv tri, L_0x1f07020, L_0x1f072b0, L_0x1f04e30, L_0x1f04cc0; +RS_0x7fdf88970148/0/24 .resolv tri, L_0x1f07bc0, L_0x1f07e10, L_0x1f08040, L_0x1f082c0; +RS_0x7fdf88970148/0/28 .resolv tri, L_0x1f08510, L_0x1f087c0, L_0x1f08a30, L_0x1f08d10; +RS_0x7fdf88970148/1/0 .resolv tri, RS_0x7fdf88970148/0/0, RS_0x7fdf88970148/0/4, RS_0x7fdf88970148/0/8, RS_0x7fdf88970148/0/12; +RS_0x7fdf88970148/1/4 .resolv tri, RS_0x7fdf88970148/0/16, RS_0x7fdf88970148/0/20, RS_0x7fdf88970148/0/24, RS_0x7fdf88970148/0/28; +RS_0x7fdf88970148 .resolv tri, RS_0x7fdf88970148/1/0, RS_0x7fdf88970148/1/4, C4, C4; +v0x1f01460_0 .net8 "invertedB", 31 0, RS_0x7fdf88970148; 32 drivers +v0x1f014e0_0 .alias "opA", 31 0, v0x1f02500_0; +v0x1f011c0_0 .alias "opB", 31 0, v0x1f026c0_0; +v0x1f01240_0 .alias "overflow", 0 0, v0x1f018a0_0; +L_0x1f03e50 .part/pv L_0x1f03f40, 0, 1, 32; +L_0x1f03ff0 .part v0x1f023a0_0, 0, 1; +L_0x1f040e0 .part/pv L_0x1f04180, 1, 1, 32; +L_0x1f04230 .part v0x1f023a0_0, 1, 1; +L_0x1f04320 .part/pv L_0x1f04450, 2, 1, 32; +L_0x1f044b0 .part v0x1f023a0_0, 2, 1; +L_0x1f045a0 .part/pv L_0x1f04640, 3, 1, 32; +L_0x1f046f0 .part v0x1f023a0_0, 3, 1; +L_0x1f04830 .part/pv L_0x1f048d0, 4, 1, 32; +L_0x1f04980 .part v0x1f023a0_0, 4, 1; +L_0x1f04ad0 .part/pv L_0x1f04b70, 5, 1, 32; +L_0x1f04bd0 .part v0x1f023a0_0, 5, 1; +L_0x1f01aa0 .part/pv L_0x1f04a70, 6, 1, 32; +L_0x1f04fe0 .part v0x1f023a0_0, 6, 1; +L_0x1f05100 .part/pv L_0x1f051a0, 7, 1, 32; +L_0x1f052a0 .part v0x1f023a0_0, 7, 1; +L_0x1f05420 .part/pv L_0x1f054c0, 8, 1, 32; +L_0x1f05570 .part v0x1f023a0_0, 8, 1; +L_0x1f05700 .part/pv L_0x1f05390, 9, 1, 32; +L_0x1f05850 .part v0x1f023a0_0, 9, 1; +L_0x1f05660 .part/pv L_0x1f059a0, 10, 1, 32; +L_0x1f05a50 .part v0x1f023a0_0, 10, 1; +L_0x1f058f0 .part/pv L_0x1f05c00, 11, 1, 32; +L_0x1f05cb0 .part v0x1f023a0_0, 11, 1; +L_0x1f05b40 .part/pv L_0x1f057f0, 12, 1, 32; +L_0x1f05ec0 .part v0x1f023a0_0, 12, 1; +L_0x1f05da0 .part/pv L_0x1f06090, 13, 1, 32; +L_0x1f06140 .part v0x1f023a0_0, 13, 1; +L_0x1f05fb0 .part/pv L_0x1f04ed0, 14, 1, 32; +L_0x1f06530 .part v0x1f023a0_0, 14, 1; +L_0x1f06230 .part/pv L_0x1f066d0, 15, 1, 32; +L_0x1f067c0 .part v0x1f023a0_0, 15, 1; +L_0x1f065d0 .part/pv L_0x1f06670, 16, 1, 32; +L_0x1f06a10 .part v0x1f023a0_0, 16, 1; +L_0x1f068b0 .part/pv L_0x1f06950, 17, 1, 32; +L_0x1f06d10 .part v0x1f023a0_0, 17, 1; +L_0x1f06b00 .part/pv L_0x1f06ba0, 18, 1, 32; +L_0x1f06f30 .part v0x1f023a0_0, 18, 1; +L_0x1f06db0 .part/pv L_0x1f06e50, 19, 1, 32; +L_0x1f06c70 .part v0x1f023a0_0, 19, 1; +L_0x1f07020 .part/pv L_0x1f070c0, 20, 1, 32; +L_0x1f07450 .part v0x1f023a0_0, 20, 1; +L_0x1f072b0 .part/pv L_0x1f07350, 21, 1, 32; +L_0x1f071b0 .part v0x1f023a0_0, 21, 1; +L_0x1f04e30 .part/pv L_0x1efef10, 22, 1, 32; +L_0x1f07540 .part v0x1f023a0_0, 22, 1; +L_0x1f04cc0 .part/pv L_0x1f03aa0, 23, 1, 32; +L_0x1f07630 .part v0x1f023a0_0, 23, 1; +L_0x1f07bc0 .part/pv L_0x1f07c60, 24, 1, 32; +L_0x1f07fa0 .part v0x1f023a0_0, 24, 1; +L_0x1f07e10 .part/pv L_0x1f07eb0, 25, 1, 32; +L_0x1f07d10 .part v0x1f023a0_0, 25, 1; +L_0x1f08040 .part/pv L_0x1f080e0, 26, 1, 32; +L_0x1f08470 .part v0x1f023a0_0, 26, 1; +L_0x1f082c0 .part/pv L_0x1f08360, 27, 1, 32; +L_0x1f081e0 .part v0x1f023a0_0, 27, 1; +L_0x1f08510 .part/pv L_0x1f085b0, 28, 1, 32; +L_0x1f08990 .part v0x1f023a0_0, 28, 1; +L_0x1f087c0 .part/pv L_0x1f08860, 29, 1, 32; +L_0x1f086b0 .part v0x1f023a0_0, 29, 1; +L_0x1f08a30 .part/pv L_0x1f05080, 30, 1, 32; +L_0x1f08ad0 .part v0x1f023a0_0, 30, 1; +L_0x1f08d10 .part/pv L_0x1f08db0, 31, 1, 32; +L_0x1f08e10 .part v0x1f023a0_0, 31, 1; +L_0x1f14370 .part v0x1f03140_0, 0, 1; +RS_0x7fdf8896e8e8 .resolv tri, L_0x1f15340, L_0x1f15f90, L_0x1f16cd0, L_0x1f17930; +L_0x1f18a90 .part/pv RS_0x7fdf8896e8e8, 0, 4, 32; +L_0x1f06320 .part v0x1f031c0_0, 0, 4; +L_0x1f063c0 .part RS_0x7fdf889707a8, 0, 4; +L_0x1f06460 .part v0x1f03140_0, 0, 1; +RS_0x7fdf8896db08 .resolv tri, L_0x1f197c0, L_0x1f1a410, L_0x1f1b150, L_0x1f1bdb0; +L_0x1f1ce90 .part/pv RS_0x7fdf8896db08, 4, 4, 32; +L_0x1f18b80 .part v0x1f031c0_0, 4, 4; +L_0x1f18c20 .part RS_0x7fdf889707a8, 4, 4; +RS_0x7fdf8896cd28 .resolv tri, L_0x1f1dad0, L_0x1f1e720, L_0x1f1f460, L_0x1f200c0; +L_0x1f211a0 .part/pv RS_0x7fdf8896cd28, 8, 4, 32; +L_0x1f212d0 .part v0x1f031c0_0, 8, 4; +L_0x1f1cf30 .part RS_0x7fdf889707a8, 8, 4; +RS_0x7fdf8896bf48 .resolv tri, L_0x1f21e20, L_0x1f22a70, L_0x1f237b0, L_0x1f24410; +L_0x1f254f0 .part/pv RS_0x7fdf8896bf48, 12, 4, 32; +L_0x1f21370 .part v0x1f031c0_0, 12, 4; +L_0x1f21410 .part RS_0x7fdf889707a8, 12, 4; +RS_0x7fdf8896b168 .resolv tri, L_0x1f26100, L_0x1f26d50, L_0x1f27a90, L_0x1f286f0; +L_0x1f297d0 .part/pv RS_0x7fdf8896b168, 16, 4, 32; +L_0x1f29870 .part v0x1f031c0_0, 16, 4; +L_0x1f25590 .part RS_0x7fdf889707a8, 16, 4; +RS_0x7fdf8896a388 .resolv tri, L_0x1f2a3f0, L_0x1f2b040, L_0x1f2bd80, L_0x1f2c9e0; +L_0x1f2dac0 .part/pv RS_0x7fdf8896a388, 20, 4, 32; +L_0x1f29910 .part v0x1f031c0_0, 20, 4; +L_0x1f299b0 .part RS_0x7fdf889707a8, 20, 4; +RS_0x7fdf889695a8 .resolv tri, L_0x1f2e710, L_0x1f2f360, L_0x1f300a0, L_0x1f30d00; +L_0x1f31de0 .part/pv RS_0x7fdf889695a8, 24, 4, 32; +L_0x1f31f90 .part v0x1f031c0_0, 24, 4; +L_0x1f02580 .part RS_0x7fdf889707a8, 24, 4; +RS_0x7fdf889687c8 .resolv tri, L_0x1f32ba0, L_0x1f337f0, L_0x1f34530, L_0x1f351d0; +L_0x1f36070 .part/pv RS_0x7fdf889687c8, 28, 4, 32; +L_0x1f32240 .part v0x1f031c0_0, 28, 4; +L_0x1f322e0 .part RS_0x7fdf889707a8, 28, 4; +S_0x1ef6d60 .scope module, "addsubmux" "muxtype1" 7 235, 7 3, S_0x1ed97d0; + .timescale 0 0; +L_0x1f08910 .functor NOT 1, L_0x1f14370, C4<0>, C4<0>, C4<0>; +L_0x1f08c10 .functor AND 1, L_0x1f09420, L_0x1f08910, C4<1>, C4<1>; +L_0x1f094c0 .functor AND 1, L_0x1f09520, L_0x1f08910, C4<1>, C4<1>; +L_0x1f09610 .functor AND 1, L_0x1f09700, L_0x1f08910, C4<1>, C4<1>; +L_0x1f097a0 .functor AND 1, L_0x1f09800, L_0x1f08910, C4<1>, C4<1>; +L_0x1f098f0 .functor AND 1, L_0x1f09950, L_0x1f08910, C4<1>, C4<1>; +L_0x1f09a40 .functor AND 1, L_0x1f09aa0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f09b90 .functor AND 1, L_0x1f09d00, L_0x1f08910, C4<1>, C4<1>; +L_0x1f09df0 .functor AND 1, L_0x1f09e50, L_0x1f08910, C4<1>, C4<1>; +L_0x1f09f90 .functor AND 1, L_0x1f09ff0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a0e0 .functor AND 1, L_0x1f0a140, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a290 .functor AND 1, L_0x1f0a360, L_0x1f08910, C4<1>, C4<1>; +L_0x1f09670 .functor AND 1, L_0x1f0a400, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a230 .functor AND 1, L_0x1f0a5e0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a6d0 .functor AND 1, L_0x1f0a730, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a8a0 .functor AND 1, L_0x1f0ab40, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0abe0 .functor AND 1, L_0x1f0ac40, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0adc0 .functor AND 1, L_0x1f0aec0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0af60 .functor AND 1, L_0x1f0afc0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0ad30 .functor AND 1, L_0x1f0ae20, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0b280 .functor AND 1, L_0x1f0b310, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0b0b0 .functor AND 1, L_0x1f0b180, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0b5c0 .functor AND 1, L_0x1f0b650, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a2f0 .functor AND 1, L_0x1f0b400, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0b4a0 .functor AND 1, L_0x1f07880, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a820 .functor AND 1, L_0x1f07b20, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0a540 .functor AND 1, L_0x1f077b0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f07970 .functor AND 1, L_0x1f07a00, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0c170 .functor AND 1, L_0x1f0c1d0, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0bfa0 .functor AND 1, L_0x1f0c030, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0c4b0 .functor AND 1, L_0x1f0c510, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0c2c0 .functor AND 1, L_0x1f0aa40, L_0x1f08910, C4<1>, C4<1>; +L_0x1efb780 .functor AND 1, L_0x1f0c380, L_0x1f08910, C4<1>, C4<1>; +L_0x1f0c5b0 .functor AND 1, L_0x1f0a930, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0cd40 .functor AND 1, L_0x1f0cda0, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0cac0 .functor AND 1, L_0x1f0cc20, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0cb50 .functor AND 1, L_0x1f0d170, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0ce90 .functor AND 1, L_0x1f0d040, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0cf20 .functor AND 1, L_0x1f0d480, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0d210 .functor AND 1, L_0x1f0d2a0, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0d390 .functor AND 1, L_0x1f0d910, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0cfb0 .functor AND 1, L_0x1f0d570, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0d7c0 .functor AND 1, L_0x1f0d850, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0d9b0 .functor AND 1, L_0x1f0da10, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0db00 .functor AND 1, L_0x1f0db60, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0dc60 .functor AND 1, L_0x1f0dcf0, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0dde0 .functor AND 1, L_0x1f0de70, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0df10 .functor AND 1, L_0x1f0dfa0, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0e090 .functor AND 1, L_0x1f0e120, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0d6b0 .functor AND 1, L_0x1f0e270, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0e360 .functor AND 1, L_0x1f0e600, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0e6f0 .functor AND 1, L_0x1f0e900, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0e9f0 .functor AND 1, L_0x1f0ec60, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0eaa0 .functor AND 1, L_0x1f0eb30, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0d740 .functor AND 1, L_0x1f0e750, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0e840 .functor AND 1, L_0x1f0ed00, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0edf0 .functor AND 1, L_0x1f0ee80, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0ef70 .functor AND 1, L_0x1f0f1e0, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0f2d0 .functor AND 1, L_0x1f0f330, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0f3d0 .functor AND 1, L_0x1f0f460, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0f550 .functor AND 1, L_0x1f0f000, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0f0f0 .functor AND 1, L_0x1f0f620, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0f710 .functor AND 1, L_0x1f0f770, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0f860 .functor AND 1, L_0x1f0f8f0, L_0x1f14370, C4<1>, C4<1>; +L_0x1eb5ba0 .functor AND 1, L_0x1f0f9e0, L_0x1f14370, C4<1>, C4<1>; +L_0x1f0fdd0 .functor OR 1, L_0x1f08c10, L_0x1f0c5b0, C4<0>, C4<0>; +L_0x1f09120 .functor OR 1, L_0x1f094c0, L_0x1f0cd40, C4<0>, C4<0>; +L_0x1f0e480 .functor OR 1, L_0x1f09610, L_0x1f0cac0, C4<0>, C4<0>; +L_0x1f0e580 .functor OR 1, L_0x1f097a0, L_0x1f0cb50, C4<0>, C4<0>; +L_0x1f08fa0 .functor OR 1, L_0x1f098f0, L_0x1f0ce90, C4<0>, C4<0>; +L_0x1f10ee0 .functor OR 1, L_0x1f09a40, L_0x1f0cf20, C4<0>, C4<0>; +L_0x1f0fc60 .functor OR 1, L_0x1f09b90, L_0x1f0d210, C4<0>, C4<0>; +L_0x1f10ca0 .functor OR 1, L_0x1f09df0, L_0x1f0d390, C4<0>, C4<0>; +L_0x1f117c0 .functor OR 1, L_0x1f09f90, L_0x1f0cfb0, C4<0>, C4<0>; +L_0x1f11320 .functor OR 1, L_0x1f0a0e0, L_0x1f0d7c0, C4<0>, C4<0>; +L_0x1f11470 .functor OR 1, L_0x1f0a290, L_0x1f0d9b0, C4<0>, C4<0>; +L_0x1f118c0 .functor OR 1, L_0x1f09670, L_0x1f0db00, C4<0>, C4<0>; +L_0x1f11ab0 .functor OR 1, L_0x1f0a230, L_0x1f0dc60, C4<0>, C4<0>; +L_0x1f11f20 .functor OR 1, L_0x1f0a6d0, L_0x1f0dde0, C4<0>, C4<0>; +L_0x1f110d0 .functor OR 1, L_0x1f0a8a0, L_0x1f0df10, C4<0>, C4<0>; +L_0x1f11ca0 .functor OR 1, L_0x1f0abe0, L_0x1f0e090, C4<0>, C4<0>; +L_0x1f11e40 .functor OR 1, L_0x1f0adc0, L_0x1f0d6b0, C4<0>, C4<0>; +L_0x1f12790 .functor OR 1, L_0x1f0af60, L_0x1f0e360, C4<0>, C4<0>; +L_0x1f12200 .functor OR 1, L_0x1f0ad30, L_0x1f0e6f0, C4<0>, C4<0>; +L_0x1f123f0 .functor OR 1, L_0x1f0b280, L_0x1f0e9f0, C4<0>, C4<0>; +L_0x1f12bb0 .functor OR 1, L_0x1f0b0b0, L_0x1f0eaa0, C4<0>, C4<0>; +L_0x1f13060 .functor OR 1, L_0x1f0b5c0, L_0x1f0d740, C4<0>, C4<0>; +L_0x1f13250 .functor OR 1, L_0x1f0a2f0, L_0x1f0e840, C4<0>, C4<0>; +L_0x1f13440 .functor OR 1, L_0x1f0b4a0, L_0x1f0edf0, C4<0>, C4<0>; +L_0x1f12f30 .functor OR 1, L_0x1f0a820, L_0x1f0ef70, C4<0>, C4<0>; +L_0x1f13540 .functor OR 1, L_0x1f0a540, L_0x1f0f2d0, C4<0>, C4<0>; +L_0x1f13730 .functor OR 1, L_0x1f07970, L_0x1f0f3d0, C4<0>, C4<0>; +L_0x1f13920 .functor OR 1, L_0x1f0c170, L_0x1f0f550, C4<0>, C4<0>; +L_0x1f13ba0 .functor OR 1, L_0x1f0bfa0, L_0x1f0f0f0, C4<0>, C4<0>; +L_0x1f14090 .functor OR 1, L_0x1f0c4b0, L_0x1f0f710, C4<0>, C4<0>; +L_0x1f0f150 .functor OR 1, L_0x1f0c2c0, L_0x1f0f860, C4<0>, C4<0>; +L_0x1f0e8a0 .functor OR 1, L_0x1efb780, L_0x1eb5ba0, C4<0>, C4<0>; +v0x1ef6e50_0 .net *"_s1", 0 0, L_0x1f09420; 1 drivers +v0x1ef6f10_0 .net *"_s101", 0 0, L_0x1f0e900; 1 drivers +v0x1ef6fb0_0 .net *"_s103", 0 0, L_0x1f0ec60; 1 drivers +v0x1ef7050_0 .net *"_s105", 0 0, L_0x1f0eb30; 1 drivers +v0x1ef70d0_0 .net *"_s107", 0 0, L_0x1f0e750; 1 drivers +v0x1ef7170_0 .net *"_s109", 0 0, L_0x1f0ed00; 1 drivers +v0x1ef7210_0 .net *"_s11", 0 0, L_0x1f09aa0; 1 drivers +v0x1ef72b0_0 .net *"_s111", 0 0, L_0x1f0ee80; 1 drivers +v0x1ef73a0_0 .net *"_s113", 0 0, L_0x1f0f1e0; 1 drivers +v0x1ef7440_0 .net *"_s115", 0 0, L_0x1f0f330; 1 drivers +v0x1ef74e0_0 .net *"_s117", 0 0, L_0x1f0f460; 1 drivers +v0x1ef7580_0 .net *"_s119", 0 0, L_0x1f0f000; 1 drivers +v0x1ef7620_0 .net *"_s121", 0 0, L_0x1f0f620; 1 drivers +v0x1ef76c0_0 .net *"_s123", 0 0, L_0x1f0f770; 1 drivers +v0x1ef77e0_0 .net *"_s125", 0 0, L_0x1f0f8f0; 1 drivers +v0x1ef7880_0 .net *"_s127", 0 0, L_0x1f0f9e0; 1 drivers +v0x1ef7740_0 .net *"_s128", 0 0, L_0x1f0fdd0; 1 drivers +v0x1ef79d0_0 .net *"_s13", 0 0, L_0x1f09d00; 1 drivers +v0x1ef7af0_0 .net *"_s130", 0 0, L_0x1f09120; 1 drivers +v0x1ef7b70_0 .net *"_s132", 0 0, L_0x1f0e480; 1 drivers +v0x1ef7a50_0 .net *"_s134", 0 0, L_0x1f0e580; 1 drivers +v0x1ef7ca0_0 .net *"_s136", 0 0, L_0x1f08fa0; 1 drivers +v0x1ef7bf0_0 .net *"_s138", 0 0, L_0x1f10ee0; 1 drivers +v0x1ef7de0_0 .net *"_s140", 0 0, L_0x1f0fc60; 1 drivers +v0x1ef7d40_0 .net *"_s142", 0 0, L_0x1f10ca0; 1 drivers +v0x1ef7f30_0 .net *"_s144", 0 0, L_0x1f117c0; 1 drivers +v0x1ef7e80_0 .net *"_s146", 0 0, L_0x1f11320; 1 drivers +v0x1ef8090_0 .net *"_s148", 0 0, L_0x1f11470; 1 drivers +v0x1ef7fd0_0 .net *"_s15", 0 0, L_0x1f09e50; 1 drivers +v0x1ef8200_0 .net *"_s150", 0 0, L_0x1f118c0; 1 drivers +v0x1ef8110_0 .net *"_s152", 0 0, L_0x1f11ab0; 1 drivers +v0x1ef8380_0 .net *"_s154", 0 0, L_0x1f11f20; 1 drivers +v0x1ef8280_0 .net *"_s156", 0 0, L_0x1f110d0; 1 drivers +v0x1ef8510_0 .net *"_s158", 0 0, L_0x1f11ca0; 1 drivers +v0x1ef8400_0 .net *"_s160", 0 0, L_0x1f11e40; 1 drivers +v0x1ef86b0_0 .net *"_s162", 0 0, L_0x1f12790; 1 drivers +v0x1ef8590_0 .net *"_s164", 0 0, L_0x1f12200; 1 drivers +v0x1ef8630_0 .net *"_s166", 0 0, L_0x1f123f0; 1 drivers +v0x1ef8870_0 .net *"_s168", 0 0, L_0x1f12bb0; 1 drivers +v0x1ef88f0_0 .net *"_s17", 0 0, L_0x1f09ff0; 1 drivers +v0x1ef8730_0 .net *"_s170", 0 0, L_0x1f13060; 1 drivers +v0x1ef87d0_0 .net *"_s172", 0 0, L_0x1f13250; 1 drivers +v0x1ef8ad0_0 .net *"_s174", 0 0, L_0x1f13440; 1 drivers +v0x1ef8b50_0 .net *"_s176", 0 0, L_0x1f12f30; 1 drivers +v0x1ef8970_0 .net *"_s178", 0 0, L_0x1f13540; 1 drivers +v0x1ef8a10_0 .net *"_s180", 0 0, L_0x1f13730; 1 drivers +v0x1ef8d50_0 .net *"_s182", 0 0, L_0x1f13920; 1 drivers +v0x1ef8dd0_0 .net *"_s184", 0 0, L_0x1f13ba0; 1 drivers +v0x1ef8bf0_0 .net *"_s186", 0 0, L_0x1f14090; 1 drivers +v0x1ef8c90_0 .net *"_s188", 0 0, L_0x1f0f150; 1 drivers +v0x1ef8ff0_0 .net *"_s19", 0 0, L_0x1f0a140; 1 drivers +v0x1ef9070_0 .net *"_s190", 0 0, L_0x1f0e8a0; 1 drivers +v0x1ef8e70_0 .net *"_s21", 0 0, L_0x1f0a360; 1 drivers +v0x1ef8f10_0 .net *"_s23", 0 0, L_0x1f0a400; 1 drivers +v0x1ef92b0_0 .net *"_s25", 0 0, L_0x1f0a5e0; 1 drivers +v0x1ef9330_0 .net *"_s27", 0 0, L_0x1f0a730; 1 drivers +v0x1ef90f0_0 .net *"_s29", 0 0, L_0x1f0ab40; 1 drivers +v0x1ef9190_0 .net *"_s3", 0 0, L_0x1f09520; 1 drivers +v0x1ef9230_0 .net *"_s31", 0 0, L_0x1f0ac40; 1 drivers +v0x1ef95b0_0 .net *"_s33", 0 0, L_0x1f0aec0; 1 drivers +v0x1ef93d0_0 .net *"_s35", 0 0, L_0x1f0afc0; 1 drivers +v0x1ef9470_0 .net *"_s37", 0 0, L_0x1f0ae20; 1 drivers +v0x1ef9510_0 .net *"_s39", 0 0, L_0x1f0b310; 1 drivers +v0x1ef9850_0 .net *"_s41", 0 0, L_0x1f0b180; 1 drivers +v0x1ef9650_0 .net *"_s43", 0 0, L_0x1f0b650; 1 drivers +v0x1ef96f0_0 .net *"_s45", 0 0, L_0x1f0b400; 1 drivers +v0x1ef9790_0 .net *"_s47", 0 0, L_0x1f07880; 1 drivers +v0x1ef9af0_0 .net *"_s49", 0 0, L_0x1f07b20; 1 drivers +v0x1ef98f0_0 .net *"_s5", 0 0, L_0x1f09700; 1 drivers +v0x1ef9990_0 .net *"_s51", 0 0, L_0x1f077b0; 1 drivers +v0x1ef9a30_0 .net *"_s53", 0 0, L_0x1f07a00; 1 drivers +v0x1ef9db0_0 .net *"_s55", 0 0, L_0x1f0c1d0; 1 drivers +v0x1ef9b70_0 .net *"_s57", 0 0, L_0x1f0c030; 1 drivers +v0x1ef9c10_0 .net *"_s59", 0 0, L_0x1f0c510; 1 drivers +v0x1ef9cb0_0 .net *"_s61", 0 0, L_0x1f0aa40; 1 drivers +v0x1efa090_0 .net *"_s63", 0 0, L_0x1f0c380; 1 drivers +v0x1ef9e30_0 .net *"_s65", 0 0, L_0x1f0a930; 1 drivers +v0x1ef9ed0_0 .net *"_s67", 0 0, L_0x1f0cda0; 1 drivers +v0x1ef9f70_0 .net *"_s69", 0 0, L_0x1f0cc20; 1 drivers +v0x1efa010_0 .net *"_s7", 0 0, L_0x1f09800; 1 drivers +v0x1efa3a0_0 .net *"_s71", 0 0, L_0x1f0d170; 1 drivers +v0x1efa420_0 .net *"_s73", 0 0, L_0x1f0d040; 1 drivers +v0x1efa130_0 .net *"_s75", 0 0, L_0x1f0d480; 1 drivers +v0x1efa1d0_0 .net *"_s77", 0 0, L_0x1f0d2a0; 1 drivers +v0x1efa270_0 .net *"_s79", 0 0, L_0x1f0d910; 1 drivers +v0x1efa310_0 .net *"_s81", 0 0, L_0x1f0d570; 1 drivers +v0x1efa780_0 .net *"_s83", 0 0, L_0x1f0d850; 1 drivers +v0x1efa820_0 .net *"_s85", 0 0, L_0x1f0da10; 1 drivers +v0x1efa4c0_0 .net *"_s87", 0 0, L_0x1f0db60; 1 drivers +v0x1efa560_0 .net *"_s89", 0 0, L_0x1f0dcf0; 1 drivers +v0x1efa600_0 .net *"_s9", 0 0, L_0x1f09950; 1 drivers +v0x1efa6a0_0 .net *"_s91", 0 0, L_0x1f0de70; 1 drivers +v0x1efab90_0 .net *"_s93", 0 0, L_0x1f0dfa0; 1 drivers +v0x1efac10_0 .net *"_s95", 0 0, L_0x1f0e120; 1 drivers +v0x1efa8c0_0 .net *"_s97", 0 0, L_0x1f0e270; 1 drivers +v0x1efa960_0 .net *"_s99", 0 0, L_0x1f0e600; 1 drivers +v0x1efaa00_0 .net "address", 0 0, L_0x1f14370; 1 drivers +v0x1efaaa0_0 .alias "in0", 31 0, v0x1f026c0_0; +v0x1efafb0_0 .net "in00addr", 0 0, L_0x1f08c10; 1 drivers +v0x1efb030_0 .net "in010addr", 0 0, L_0x1f0a290; 1 drivers +v0x1efac90_0 .net "in011addr", 0 0, L_0x1f09670; 1 drivers +v0x1efad30_0 .net "in012addr", 0 0, L_0x1f0a230; 1 drivers +v0x1efadd0_0 .net "in013addr", 0 0, L_0x1f0a6d0; 1 drivers +v0x1efae70_0 .net "in014addr", 0 0, L_0x1f0a8a0; 1 drivers +v0x1efaf10_0 .net "in015addr", 0 0, L_0x1f0abe0; 1 drivers +v0x1efb400_0 .net "in016addr", 0 0, L_0x1f0adc0; 1 drivers +v0x1efb0b0_0 .net "in017addr", 0 0, L_0x1f0af60; 1 drivers +v0x1efb150_0 .net "in018addr", 0 0, L_0x1f0ad30; 1 drivers +v0x1efb1f0_0 .net "in019addr", 0 0, L_0x1f0b280; 1 drivers +v0x1efb290_0 .net "in01addr", 0 0, L_0x1f094c0; 1 drivers +v0x1efb330_0 .net "in020addr", 0 0, L_0x1f0b0b0; 1 drivers +v0x1efb800_0 .net "in021addr", 0 0, L_0x1f0b5c0; 1 drivers +v0x1efb480_0 .net "in022addr", 0 0, L_0x1f0a2f0; 1 drivers +v0x1efb520_0 .net "in023addr", 0 0, L_0x1f0b4a0; 1 drivers +v0x1efb5c0_0 .net "in024addr", 0 0, L_0x1f0a820; 1 drivers +v0x1efb660_0 .net "in025addr", 0 0, L_0x1f0a540; 1 drivers +v0x1efb700_0 .net "in026addr", 0 0, L_0x1f07970; 1 drivers +v0x1efbc30_0 .net "in027addr", 0 0, L_0x1f0c170; 1 drivers +v0x1efb880_0 .net "in028addr", 0 0, L_0x1f0bfa0; 1 drivers +v0x1efb920_0 .net "in029addr", 0 0, L_0x1f0c4b0; 1 drivers +v0x1efb9c0_0 .net "in02addr", 0 0, L_0x1f09610; 1 drivers +v0x1efba60_0 .net "in030addr", 0 0, L_0x1f0c2c0; 1 drivers +v0x1efbb00_0 .net "in031addr", 0 0, L_0x1efb780; 1 drivers +v0x1efbba0_0 .net "in03addr", 0 0, L_0x1f097a0; 1 drivers +v0x1efc0a0_0 .net "in04addr", 0 0, L_0x1f098f0; 1 drivers +v0x1efc120_0 .net "in05addr", 0 0, L_0x1f09a40; 1 drivers +v0x1efbcb0_0 .net "in06addr", 0 0, L_0x1f09b90; 1 drivers +v0x1efbd50_0 .net "in07addr", 0 0, L_0x1f09df0; 1 drivers +v0x1efbdf0_0 .net "in08addr", 0 0, L_0x1f09f90; 1 drivers +v0x1efbe90_0 .net "in09addr", 0 0, L_0x1f0a0e0; 1 drivers +v0x1efbf30_0 .alias "in1", 31 0, v0x1f01460_0; +v0x1efbfd0_0 .net "in10addr", 0 0, L_0x1f0c5b0; 1 drivers +v0x1efc5d0_0 .net "in110addr", 0 0, L_0x1f0d9b0; 1 drivers +v0x1efc650_0 .net "in111addr", 0 0, L_0x1f0db00; 1 drivers +v0x1efc1a0_0 .net "in112addr", 0 0, L_0x1f0dc60; 1 drivers +v0x1efc240_0 .net "in113addr", 0 0, L_0x1f0dde0; 1 drivers +v0x1efc2e0_0 .net "in114addr", 0 0, L_0x1f0df10; 1 drivers +v0x1efc380_0 .net "in115addr", 0 0, L_0x1f0e090; 1 drivers +v0x1efc420_0 .net "in116addr", 0 0, L_0x1f0d6b0; 1 drivers +v0x1efc4c0_0 .net "in117addr", 0 0, L_0x1f0e360; 1 drivers +v0x1efcb40_0 .net "in118addr", 0 0, L_0x1f0e6f0; 1 drivers +v0x1efcbc0_0 .net "in119addr", 0 0, L_0x1f0e9f0; 1 drivers +v0x1efc6d0_0 .net "in11addr", 0 0, L_0x1f0cd40; 1 drivers +v0x1efc770_0 .net "in120addr", 0 0, L_0x1f0eaa0; 1 drivers +v0x1efc810_0 .net "in121addr", 0 0, L_0x1f0d740; 1 drivers +v0x1efc8b0_0 .net "in122addr", 0 0, L_0x1f0e840; 1 drivers +v0x1efc950_0 .net "in123addr", 0 0, L_0x1f0edf0; 1 drivers +v0x1efc9f0_0 .net "in124addr", 0 0, L_0x1f0ef70; 1 drivers +v0x1efca90_0 .net "in125addr", 0 0, L_0x1f0f2d0; 1 drivers +v0x1efd0f0_0 .net "in126addr", 0 0, L_0x1f0f3d0; 1 drivers +v0x1efcc40_0 .net "in127addr", 0 0, L_0x1f0f550; 1 drivers +v0x1efccc0_0 .net "in128addr", 0 0, L_0x1f0f0f0; 1 drivers +v0x1efcd60_0 .net "in129addr", 0 0, L_0x1f0f710; 1 drivers +v0x1efce00_0 .net "in12addr", 0 0, L_0x1f0cac0; 1 drivers +v0x1efcea0_0 .net "in130addr", 0 0, L_0x1f0f860; 1 drivers +v0x1efcf40_0 .net "in131addr", 0 0, L_0x1eb5ba0; 1 drivers +v0x1efcfe0_0 .net "in13addr", 0 0, L_0x1f0cb50; 1 drivers +v0x1efd660_0 .net "in14addr", 0 0, L_0x1f0ce90; 1 drivers +v0x1efd170_0 .net "in15addr", 0 0, L_0x1f0cf20; 1 drivers +v0x1efd210_0 .net "in16addr", 0 0, L_0x1f0d210; 1 drivers +v0x1efd2b0_0 .net "in17addr", 0 0, L_0x1f0d390; 1 drivers +v0x1efd350_0 .net "in18addr", 0 0, L_0x1f0cfb0; 1 drivers +v0x1efd3f0_0 .net "in19addr", 0 0, L_0x1f0d7c0; 1 drivers +v0x1efd490_0 .net "invaddr", 0 0, L_0x1f08910; 1 drivers +v0x1efd530_0 .alias "out", 31 0, v0x1f00ec0_0; +L_0x1f09420 .part v0x1f023a0_0, 0, 1; +L_0x1f09520 .part v0x1f023a0_0, 1, 1; +L_0x1f09700 .part v0x1f023a0_0, 2, 1; +L_0x1f09800 .part v0x1f023a0_0, 3, 1; +L_0x1f09950 .part v0x1f023a0_0, 4, 1; +L_0x1f09aa0 .part v0x1f023a0_0, 5, 1; +L_0x1f09d00 .part v0x1f023a0_0, 6, 1; +L_0x1f09e50 .part v0x1f023a0_0, 7, 1; +L_0x1f09ff0 .part v0x1f023a0_0, 8, 1; +L_0x1f0a140 .part v0x1f023a0_0, 9, 1; +L_0x1f0a360 .part v0x1f023a0_0, 10, 1; +L_0x1f0a400 .part v0x1f023a0_0, 11, 1; +L_0x1f0a5e0 .part v0x1f023a0_0, 12, 1; +L_0x1f0a730 .part v0x1f023a0_0, 13, 1; +L_0x1f0ab40 .part v0x1f023a0_0, 14, 1; +L_0x1f0ac40 .part v0x1f023a0_0, 15, 1; +L_0x1f0aec0 .part v0x1f023a0_0, 16, 1; +L_0x1f0afc0 .part v0x1f023a0_0, 17, 1; +L_0x1f0ae20 .part v0x1f023a0_0, 18, 1; +L_0x1f0b310 .part v0x1f023a0_0, 19, 1; +L_0x1f0b180 .part v0x1f023a0_0, 20, 1; +L_0x1f0b650 .part v0x1f023a0_0, 21, 1; +L_0x1f0b400 .part v0x1f023a0_0, 22, 1; +L_0x1f07880 .part v0x1f023a0_0, 23, 1; +L_0x1f07b20 .part v0x1f023a0_0, 24, 1; +L_0x1f077b0 .part v0x1f023a0_0, 25, 1; +L_0x1f07a00 .part v0x1f023a0_0, 26, 1; +L_0x1f0c1d0 .part v0x1f023a0_0, 27, 1; +L_0x1f0c030 .part v0x1f023a0_0, 28, 1; +L_0x1f0c510 .part v0x1f023a0_0, 29, 1; +L_0x1f0aa40 .part v0x1f023a0_0, 30, 1; +L_0x1f0c380 .part v0x1f023a0_0, 31, 1; +L_0x1f0a930 .part RS_0x7fdf88970148, 0, 1; +L_0x1f0cda0 .part RS_0x7fdf88970148, 1, 1; +L_0x1f0cc20 .part RS_0x7fdf88970148, 2, 1; +L_0x1f0d170 .part RS_0x7fdf88970148, 3, 1; +L_0x1f0d040 .part RS_0x7fdf88970148, 4, 1; +L_0x1f0d480 .part RS_0x7fdf88970148, 5, 1; +L_0x1f0d2a0 .part RS_0x7fdf88970148, 6, 1; +L_0x1f0d910 .part RS_0x7fdf88970148, 7, 1; +L_0x1f0d570 .part RS_0x7fdf88970148, 8, 1; +L_0x1f0d850 .part RS_0x7fdf88970148, 9, 1; +L_0x1f0da10 .part RS_0x7fdf88970148, 10, 1; +L_0x1f0db60 .part RS_0x7fdf88970148, 11, 1; +L_0x1f0dcf0 .part RS_0x7fdf88970148, 12, 1; +L_0x1f0de70 .part RS_0x7fdf88970148, 13, 1; +L_0x1f0dfa0 .part RS_0x7fdf88970148, 14, 1; +L_0x1f0e120 .part RS_0x7fdf88970148, 15, 1; +L_0x1f0e270 .part RS_0x7fdf88970148, 16, 1; +L_0x1f0e600 .part RS_0x7fdf88970148, 17, 1; +L_0x1f0e900 .part RS_0x7fdf88970148, 18, 1; +L_0x1f0ec60 .part RS_0x7fdf88970148, 19, 1; +L_0x1f0eb30 .part RS_0x7fdf88970148, 20, 1; +L_0x1f0e750 .part RS_0x7fdf88970148, 21, 1; +L_0x1f0ed00 .part RS_0x7fdf88970148, 22, 1; +L_0x1f0ee80 .part RS_0x7fdf88970148, 23, 1; +L_0x1f0f1e0 .part RS_0x7fdf88970148, 24, 1; +L_0x1f0f330 .part RS_0x7fdf88970148, 25, 1; +L_0x1f0f460 .part RS_0x7fdf88970148, 26, 1; +L_0x1f0f000 .part RS_0x7fdf88970148, 27, 1; +L_0x1f0f620 .part RS_0x7fdf88970148, 28, 1; +L_0x1f0f770 .part RS_0x7fdf88970148, 29, 1; +L_0x1f0f8f0 .part RS_0x7fdf88970148, 30, 1; +L_0x1f0f9e0 .part RS_0x7fdf88970148, 31, 1; +L_0x1f0fce0 .part/pv L_0x1f0fdd0, 0, 1, 32; +L_0x1f0ff20 .part/pv L_0x1f09120, 1, 1, 32; +L_0x1f09270 .part/pv L_0x1f0e480, 2, 1, 32; +L_0x1f0fad0 .part/pv L_0x1f0e580, 3, 1, 32; +L_0x1f08f00 .part/pv L_0x1f08fa0, 4, 1, 32; +L_0x1f10c00 .part/pv L_0x1f10ee0, 5, 1, 32; +L_0x1f11030 .part/pv L_0x1f0fc60, 6, 1, 32; +L_0x1f114d0 .part/pv L_0x1f10ca0, 7, 1, 32; +L_0x1f10df0 .part/pv L_0x1f117c0, 8, 1, 32; +L_0x1f11280 .part/pv L_0x1f11320, 9, 1, 32; +L_0x1f11570 .part/pv L_0x1f11470, 10, 1, 32; +L_0x1f11700 .part/pv L_0x1f118c0, 11, 1, 32; +L_0x1f11a10 .part/pv L_0x1f11ab0, 12, 1, 32; +L_0x1f11c00 .part/pv L_0x1f11f20, 13, 1, 32; +L_0x1f12070 .part/pv L_0x1f110d0, 14, 1, 32; +L_0x1f12160 .part/pv L_0x1f11ca0, 15, 1, 32; +L_0x1f11da0 .part/pv L_0x1f11e40, 16, 1, 32; +L_0x1f126f0 .part/pv L_0x1f12790, 17, 1, 32; +L_0x1f128e0 .part/pv L_0x1f12200, 18, 1, 32; +L_0x1f12350 .part/pv L_0x1f123f0, 19, 1, 32; +L_0x1f12b10 .part/pv L_0x1f12bb0, 20, 1, 32; +L_0x1f12d00 .part/pv L_0x1f13060, 21, 1, 32; +L_0x1f131b0 .part/pv L_0x1f13250, 22, 1, 32; +L_0x1f133a0 .part/pv L_0x1f13440, 23, 1, 32; +L_0x1f12e90 .part/pv L_0x1f12f30, 24, 1, 32; +L_0x1f134a0 .part/pv L_0x1f13540, 25, 1, 32; +L_0x1f13690 .part/pv L_0x1f13730, 26, 1, 32; +L_0x1f13880 .part/pv L_0x1f13920, 27, 1, 32; +L_0x1f13b00 .part/pv L_0x1f13ba0, 28, 1, 32; +L_0x1f13ff0 .part/pv L_0x1f14090, 29, 1, 32; +L_0x1f141e0 .part/pv L_0x1f0f150, 30, 1, 32; +L_0x1f0c610 .part/pv L_0x1f0e8a0, 31, 1, 32; +S_0x1ef35b0 .scope module, "adder0" "FullAdder4bit" 7 237, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f176f0 .functor AND 1, L_0x1f17d30, L_0x1f17dd0, C4<1>, C4<1>; +L_0x1f17ef0 .functor NOR 1, L_0x1f17f50, L_0x1f17ff0, C4<0>, C4<0>; +L_0x1f18170 .functor AND 1, L_0x1f181d0, L_0x1f182c0, C4<1>, C4<1>; +L_0x1f180e0 .functor NOR 1, L_0x1f18450, L_0x1f18650, C4<0>, C4<0>; +L_0x1f183b0 .functor OR 1, L_0x1f176f0, L_0x1f17ef0, C4<0>, C4<0>; +L_0x1f18840 .functor NOR 1, L_0x1f18170, L_0x1f180e0, C4<0>, C4<0>; +L_0x1f18940 .functor AND 1, L_0x1f183b0, L_0x1f18840, C4<1>, C4<1>; +v0x1ef5e40_0 .net *"_s25", 0 0, L_0x1f17d30; 1 drivers +v0x1ef5f00_0 .net *"_s27", 0 0, L_0x1f17dd0; 1 drivers +v0x1ef5fa0_0 .net *"_s29", 0 0, L_0x1f17f50; 1 drivers +v0x1ef6040_0 .net *"_s31", 0 0, L_0x1f17ff0; 1 drivers +v0x1ef60c0_0 .net *"_s33", 0 0, L_0x1f181d0; 1 drivers +v0x1ef6160_0 .net *"_s35", 0 0, L_0x1f182c0; 1 drivers +v0x1ef6200_0 .net *"_s37", 0 0, L_0x1f18450; 1 drivers +v0x1ef62a0_0 .net *"_s39", 0 0, L_0x1f18650; 1 drivers +v0x1ef6340_0 .net "a", 3 0, L_0x1f06320; 1 drivers +v0x1ef63e0_0 .net "aandb", 0 0, L_0x1f176f0; 1 drivers +v0x1ef6480_0 .net "abandnoror", 0 0, L_0x1f183b0; 1 drivers +v0x1ef6520_0 .net "anorb", 0 0, L_0x1f17ef0; 1 drivers +v0x1ef65c0_0 .net "b", 3 0, L_0x1f063c0; 1 drivers +v0x1ef6660_0 .net "bandsum", 0 0, L_0x1f18170; 1 drivers +v0x1ef6780_0 .net "bnorsum", 0 0, L_0x1f180e0; 1 drivers +v0x1ef6820_0 .net "bsumandnornor", 0 0, L_0x1f18840; 1 drivers +v0x1ef66e0_0 .net "carryin", 0 0, L_0x1f06460; 1 drivers +v0x1ef6950_0 .alias "carryout", 0 0, v0x1f008a0_0; +v0x1ef68a0_0 .net "carryout1", 0 0, L_0x1f12530; 1 drivers +v0x1ef6a70_0 .net "carryout2", 0 0, L_0x1f157d0; 1 drivers +v0x1ef6ba0_0 .net "carryout3", 0 0, L_0x1f16510; 1 drivers +v0x1ef6c20_0 .alias "overflow", 0 0, v0x1efd5d0_0; +v0x1ef6af0_0 .net8 "sum", 3 0, RS_0x7fdf8896e8e8; 4 drivers +L_0x1f15340 .part/pv L_0x1f15270, 0, 1, 4; +L_0x1f15430 .part L_0x1f06320, 0, 1; +L_0x1f154d0 .part L_0x1f063c0, 0, 1; +L_0x1f15f90 .part/pv L_0x1f13e30, 1, 1, 4; +L_0x1f160d0 .part L_0x1f06320, 1, 1; +L_0x1f161c0 .part L_0x1f063c0, 1, 1; +L_0x1f16cd0 .part/pv L_0x1f15a40, 2, 1, 4; +L_0x1f16dc0 .part L_0x1f06320, 2, 1; +L_0x1f16eb0 .part L_0x1f063c0, 2, 1; +L_0x1f17930 .part/pv L_0x1f16780, 3, 1, 4; +L_0x1f17a60 .part L_0x1f06320, 3, 1; +L_0x1f17b90 .part L_0x1f063c0, 3, 1; +L_0x1f17d30 .part L_0x1f06320, 3, 1; +L_0x1f17dd0 .part L_0x1f063c0, 3, 1; +L_0x1f17f50 .part L_0x1f06320, 3, 1; +L_0x1f17ff0 .part L_0x1f063c0, 3, 1; +L_0x1f181d0 .part L_0x1f063c0, 3, 1; +L_0x1f182c0 .part RS_0x7fdf8896e8e8, 3, 1; +L_0x1f18450 .part L_0x1f063c0, 3, 1; +L_0x1f18650 .part RS_0x7fdf8896e8e8, 3, 1; +S_0x1ef5390 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1ef35b0; + .timescale 0 0; +L_0x1f144a0 .functor AND 1, L_0x1f15430, L_0x1f154d0, C4<1>, C4<1>; +L_0x1f14500 .functor AND 1, L_0x1f15430, L_0x1f06460, C4<1>, C4<1>; +L_0x1f145b0 .functor AND 1, L_0x1f154d0, L_0x1f06460, C4<1>, C4<1>; +L_0x1f0b500 .functor OR 1, L_0x1f144a0, L_0x1f14500, C4<0>, C4<0>; +L_0x1f12530 .functor OR 1, L_0x1f0b500, L_0x1f145b0, C4<0>, C4<0>; +L_0x1f12630 .functor OR 1, L_0x1f15430, L_0x1f154d0, C4<0>, C4<0>; +L_0x1f12690 .functor OR 1, L_0x1f12630, L_0x1f06460, C4<0>, C4<0>; +L_0x1f13dd0 .functor NOT 1, L_0x1f12530, C4<0>, C4<0>, C4<0>; +L_0x1f13ec0 .functor AND 1, L_0x1f13dd0, L_0x1f12690, C4<1>, C4<1>; +L_0x1f13f70 .functor AND 1, L_0x1f15430, L_0x1f154d0, C4<1>, C4<1>; +L_0x1f15210 .functor AND 1, L_0x1f13f70, L_0x1f06460, C4<1>, C4<1>; +L_0x1f15270 .functor OR 1, L_0x1f13ec0, L_0x1f15210, C4<0>, C4<0>; +v0x1ef5480_0 .net "a", 0 0, L_0x1f15430; 1 drivers +v0x1ef5520_0 .net "ab", 0 0, L_0x1f144a0; 1 drivers +v0x1ef55c0_0 .net "acarryin", 0 0, L_0x1f14500; 1 drivers +v0x1ef5660_0 .net "andall", 0 0, L_0x1f15210; 1 drivers +v0x1ef5700_0 .net "andsingleintermediate", 0 0, L_0x1f13f70; 1 drivers +v0x1ef57a0_0 .net "andsumintermediate", 0 0, L_0x1f13ec0; 1 drivers +v0x1ef5840_0 .net "b", 0 0, L_0x1f154d0; 1 drivers +v0x1ef58e0_0 .net "bcarryin", 0 0, L_0x1f145b0; 1 drivers +v0x1ef5980_0 .alias "carryin", 0 0, v0x1ef66e0_0; +v0x1ef5a20_0 .alias "carryout", 0 0, v0x1ef68a0_0; +v0x1ef5aa0_0 .net "invcarryout", 0 0, L_0x1f13dd0; 1 drivers +v0x1ef5b40_0 .net "orall", 0 0, L_0x1f12690; 1 drivers +v0x1ef5be0_0 .net "orpairintermediate", 0 0, L_0x1f0b500; 1 drivers +v0x1ef5c80_0 .net "orsingleintermediate", 0 0, L_0x1f12630; 1 drivers +v0x1ef5da0_0 .net "sum", 0 0, L_0x1f15270; 1 drivers +S_0x1ef4a50 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1ef35b0; + .timescale 0 0; +L_0x1f151b0 .functor AND 1, L_0x1f160d0, L_0x1f161c0, C4<1>, C4<1>; +L_0x1f15570 .functor AND 1, L_0x1f160d0, L_0x1f12530, C4<1>, C4<1>; +L_0x1f15620 .functor AND 1, L_0x1f161c0, L_0x1f12530, C4<1>, C4<1>; +L_0x1f156d0 .functor OR 1, L_0x1f151b0, L_0x1f15570, C4<0>, C4<0>; +L_0x1f157d0 .functor OR 1, L_0x1f156d0, L_0x1f15620, C4<0>, C4<0>; +L_0x1f158d0 .functor OR 1, L_0x1f160d0, L_0x1f161c0, C4<0>, C4<0>; +L_0x1f15930 .functor OR 1, L_0x1f158d0, L_0x1f12530, C4<0>, C4<0>; +L_0x1f159e0 .functor NOT 1, L_0x1f157d0, C4<0>, C4<0>, C4<0>; +L_0x1f15ad0 .functor AND 1, L_0x1f159e0, L_0x1f15930, C4<1>, C4<1>; +L_0x1f15bd0 .functor AND 1, L_0x1f160d0, L_0x1f161c0, C4<1>, C4<1>; +L_0x1f15db0 .functor AND 1, L_0x1f15bd0, L_0x1f12530, C4<1>, C4<1>; +L_0x1f13e30 .functor OR 1, L_0x1f15ad0, L_0x1f15db0, C4<0>, C4<0>; +v0x1ef4b40_0 .net "a", 0 0, L_0x1f160d0; 1 drivers +v0x1ef4bc0_0 .net "ab", 0 0, L_0x1f151b0; 1 drivers +v0x1ef4c40_0 .net "acarryin", 0 0, L_0x1f15570; 1 drivers +v0x1ef4cc0_0 .net "andall", 0 0, L_0x1f15db0; 1 drivers +v0x1ef4d40_0 .net "andsingleintermediate", 0 0, L_0x1f15bd0; 1 drivers +v0x1ef4dc0_0 .net "andsumintermediate", 0 0, L_0x1f15ad0; 1 drivers +v0x1ef4e40_0 .net "b", 0 0, L_0x1f161c0; 1 drivers +v0x1ef4ec0_0 .net "bcarryin", 0 0, L_0x1f15620; 1 drivers +v0x1ef4f90_0 .alias "carryin", 0 0, v0x1ef68a0_0; +v0x1ef5010_0 .alias "carryout", 0 0, v0x1ef6a70_0; +v0x1ef5090_0 .net "invcarryout", 0 0, L_0x1f159e0; 1 drivers +v0x1ef5110_0 .net "orall", 0 0, L_0x1f15930; 1 drivers +v0x1ef5190_0 .net "orpairintermediate", 0 0, L_0x1f156d0; 1 drivers +v0x1ef5210_0 .net "orsingleintermediate", 0 0, L_0x1f158d0; 1 drivers +v0x1ef5310_0 .net "sum", 0 0, L_0x1f13e30; 1 drivers +S_0x1ef4160 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1ef35b0; + .timescale 0 0; +L_0x1f15d50 .functor AND 1, L_0x1f16dc0, L_0x1f16eb0, C4<1>, C4<1>; +L_0x1f162b0 .functor AND 1, L_0x1f16dc0, L_0x1f157d0, C4<1>, C4<1>; +L_0x1f16360 .functor AND 1, L_0x1f16eb0, L_0x1f157d0, C4<1>, C4<1>; +L_0x1f16410 .functor OR 1, L_0x1f15d50, L_0x1f162b0, C4<0>, C4<0>; +L_0x1f16510 .functor OR 1, L_0x1f16410, L_0x1f16360, C4<0>, C4<0>; +L_0x1f16610 .functor OR 1, L_0x1f16dc0, L_0x1f16eb0, C4<0>, C4<0>; +L_0x1f16670 .functor OR 1, L_0x1f16610, L_0x1f157d0, C4<0>, C4<0>; +L_0x1f16720 .functor NOT 1, L_0x1f16510, C4<0>, C4<0>, C4<0>; +L_0x1f16810 .functor AND 1, L_0x1f16720, L_0x1f16670, C4<1>, C4<1>; +L_0x1f16910 .functor AND 1, L_0x1f16dc0, L_0x1f16eb0, C4<1>, C4<1>; +L_0x1f16af0 .functor AND 1, L_0x1f16910, L_0x1f157d0, C4<1>, C4<1>; +L_0x1f15a40 .functor OR 1, L_0x1f16810, L_0x1f16af0, C4<0>, C4<0>; +v0x1ef4250_0 .net "a", 0 0, L_0x1f16dc0; 1 drivers +v0x1ef42d0_0 .net "ab", 0 0, L_0x1f15d50; 1 drivers +v0x1ef4350_0 .net "acarryin", 0 0, L_0x1f162b0; 1 drivers +v0x1ef43d0_0 .net "andall", 0 0, L_0x1f16af0; 1 drivers +v0x1ef4450_0 .net "andsingleintermediate", 0 0, L_0x1f16910; 1 drivers +v0x1ef44d0_0 .net "andsumintermediate", 0 0, L_0x1f16810; 1 drivers +v0x1ef4550_0 .net "b", 0 0, L_0x1f16eb0; 1 drivers +v0x1ef45d0_0 .net "bcarryin", 0 0, L_0x1f16360; 1 drivers +v0x1ef4650_0 .alias "carryin", 0 0, v0x1ef6a70_0; +v0x1ef46d0_0 .alias "carryout", 0 0, v0x1ef6ba0_0; +v0x1ef4750_0 .net "invcarryout", 0 0, L_0x1f16720; 1 drivers +v0x1ef47d0_0 .net "orall", 0 0, L_0x1f16670; 1 drivers +v0x1ef4850_0 .net "orpairintermediate", 0 0, L_0x1f16410; 1 drivers +v0x1ef48d0_0 .net "orsingleintermediate", 0 0, L_0x1f16610; 1 drivers +v0x1ef49d0_0 .net "sum", 0 0, L_0x1f15a40; 1 drivers +S_0x1ef36a0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1ef35b0; + .timescale 0 0; +L_0x1f16a90 .functor AND 1, L_0x1f17a60, L_0x1f17b90, C4<1>, C4<1>; +L_0x1f16f50 .functor AND 1, L_0x1f17a60, L_0x1f16510, C4<1>, C4<1>; +L_0x1f17000 .functor AND 1, L_0x1f17b90, L_0x1f16510, C4<1>, C4<1>; +L_0x1f170b0 .functor OR 1, L_0x1f16a90, L_0x1f16f50, C4<0>, C4<0>; +L_0x1f171b0 .functor OR 1, L_0x1f170b0, L_0x1f17000, C4<0>, C4<0>; +L_0x1f172b0 .functor OR 1, L_0x1f17a60, L_0x1f17b90, C4<0>, C4<0>; +L_0x1f17310 .functor OR 1, L_0x1f172b0, L_0x1f16510, C4<0>, C4<0>; +L_0x1f173c0 .functor NOT 1, L_0x1f171b0, C4<0>, C4<0>, C4<0>; +L_0x1f17470 .functor AND 1, L_0x1f173c0, L_0x1f17310, C4<1>, C4<1>; +L_0x1f17570 .functor AND 1, L_0x1f17a60, L_0x1f17b90, C4<1>, C4<1>; +L_0x1f17750 .functor AND 1, L_0x1f17570, L_0x1f16510, C4<1>, C4<1>; +L_0x1f16780 .functor OR 1, L_0x1f17470, L_0x1f17750, C4<0>, C4<0>; +v0x1ef3790_0 .net "a", 0 0, L_0x1f17a60; 1 drivers +v0x1ef3850_0 .net "ab", 0 0, L_0x1f16a90; 1 drivers +v0x1ef38f0_0 .net "acarryin", 0 0, L_0x1f16f50; 1 drivers +v0x1ef3990_0 .net "andall", 0 0, L_0x1f17750; 1 drivers +v0x1ef3a10_0 .net "andsingleintermediate", 0 0, L_0x1f17570; 1 drivers +v0x1ef3ab0_0 .net "andsumintermediate", 0 0, L_0x1f17470; 1 drivers +v0x1ef3b50_0 .net "b", 0 0, L_0x1f17b90; 1 drivers +v0x1ef3bf0_0 .net "bcarryin", 0 0, L_0x1f17000; 1 drivers +v0x1ef3ce0_0 .alias "carryin", 0 0, v0x1ef6ba0_0; +v0x1ef3d80_0 .alias "carryout", 0 0, v0x1f008a0_0; +v0x1ef3e00_0 .net "invcarryout", 0 0, L_0x1f173c0; 1 drivers +v0x1ef3ea0_0 .net "orall", 0 0, L_0x1f17310; 1 drivers +v0x1ef3f40_0 .net "orpairintermediate", 0 0, L_0x1f170b0; 1 drivers +v0x1ef3fe0_0 .net "orsingleintermediate", 0 0, L_0x1f172b0; 1 drivers +v0x1ef40e0_0 .net "sum", 0 0, L_0x1f16780; 1 drivers +S_0x1eefaa0 .scope module, "adder1" "FullAdder4bit" 7 238, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f1bb70 .functor AND 1, L_0x1f1c1b0, L_0x1f1c250, C4<1>, C4<1>; +L_0x1f1c2f0 .functor NOR 1, L_0x1f1c350, L_0x1f1c3f0, C4<0>, C4<0>; +L_0x1f1c570 .functor AND 1, L_0x1f1c5d0, L_0x1f1c6c0, C4<1>, C4<1>; +L_0x1f1c4e0 .functor NOR 1, L_0x1f1c850, L_0x1f1ca50, C4<0>, C4<0>; +L_0x1f1c7b0 .functor OR 1, L_0x1f1bb70, L_0x1f1c2f0, C4<0>, C4<0>; +L_0x1f1cc40 .functor NOR 1, L_0x1f1c570, L_0x1f1c4e0, C4<0>, C4<0>; +L_0x1f1cd40 .functor AND 1, L_0x1f1c7b0, L_0x1f1cc40, C4<1>, C4<1>; +v0x1ef2690_0 .net *"_s25", 0 0, L_0x1f1c1b0; 1 drivers +v0x1ef2750_0 .net *"_s27", 0 0, L_0x1f1c250; 1 drivers +v0x1ef27f0_0 .net *"_s29", 0 0, L_0x1f1c350; 1 drivers +v0x1ef2890_0 .net *"_s31", 0 0, L_0x1f1c3f0; 1 drivers +v0x1ef2910_0 .net *"_s33", 0 0, L_0x1f1c5d0; 1 drivers +v0x1ef29b0_0 .net *"_s35", 0 0, L_0x1f1c6c0; 1 drivers +v0x1ef2a50_0 .net *"_s37", 0 0, L_0x1f1c850; 1 drivers +v0x1ef2af0_0 .net *"_s39", 0 0, L_0x1f1ca50; 1 drivers +v0x1ef2b90_0 .net "a", 3 0, L_0x1f18b80; 1 drivers +v0x1ef2c30_0 .net "aandb", 0 0, L_0x1f1bb70; 1 drivers +v0x1ef2cd0_0 .net "abandnoror", 0 0, L_0x1f1c7b0; 1 drivers +v0x1ef2d70_0 .net "anorb", 0 0, L_0x1f1c2f0; 1 drivers +v0x1ef2e10_0 .net "b", 3 0, L_0x1f18c20; 1 drivers +v0x1ef2eb0_0 .net "bandsum", 0 0, L_0x1f1c570; 1 drivers +v0x1ef2fd0_0 .net "bnorsum", 0 0, L_0x1f1c4e0; 1 drivers +v0x1ef3070_0 .net "bsumandnornor", 0 0, L_0x1f1cc40; 1 drivers +v0x1ef2f30_0 .alias "carryin", 0 0, v0x1f008a0_0; +v0x1ef31a0_0 .alias "carryout", 0 0, v0x1f00ca0_0; +v0x1ef30f0_0 .net "carryout1", 0 0, L_0x1f19120; 1 drivers +v0x1ef32c0_0 .net "carryout2", 0 0, L_0x1f19c50; 1 drivers +v0x1ef33f0_0 .net "carryout3", 0 0, L_0x1f1a990; 1 drivers +v0x1ef3470_0 .alias "overflow", 0 0, v0x1efdc10_0; +v0x1ef3340_0 .net8 "sum", 3 0, RS_0x7fdf8896db08; 4 drivers +L_0x1f197c0 .part/pv L_0x1f19760, 0, 1, 4; +L_0x1f198b0 .part L_0x1f18b80, 0, 1; +L_0x1f19950 .part L_0x1f18c20, 0, 1; +L_0x1f1a410 .part/pv L_0x1f19390, 1, 1, 4; +L_0x1f1a550 .part L_0x1f18b80, 1, 1; +L_0x1f1a640 .part L_0x1f18c20, 1, 1; +L_0x1f1b150 .part/pv L_0x1f19ec0, 2, 1, 4; +L_0x1f1b240 .part L_0x1f18b80, 2, 1; +L_0x1f1b330 .part L_0x1f18c20, 2, 1; +L_0x1f1bdb0 .part/pv L_0x1f1ac00, 3, 1, 4; +L_0x1f1bee0 .part L_0x1f18b80, 3, 1; +L_0x1f1c010 .part L_0x1f18c20, 3, 1; +L_0x1f1c1b0 .part L_0x1f18b80, 3, 1; +L_0x1f1c250 .part L_0x1f18c20, 3, 1; +L_0x1f1c350 .part L_0x1f18b80, 3, 1; +L_0x1f1c3f0 .part L_0x1f18c20, 3, 1; +L_0x1f1c5d0 .part L_0x1f18c20, 3, 1; +L_0x1f1c6c0 .part RS_0x7fdf8896db08, 3, 1; +L_0x1f1c850 .part L_0x1f18c20, 3, 1; +L_0x1f1ca50 .part RS_0x7fdf8896db08, 3, 1; +S_0x1ef1c00 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1eefaa0; + .timescale 0 0; +L_0x1f18db0 .functor AND 1, L_0x1f198b0, L_0x1f19950, C4<1>, C4<1>; +L_0x1f18e10 .functor AND 1, L_0x1f198b0, L_0x1f171b0, C4<1>, C4<1>; +L_0x1f18ec0 .functor AND 1, L_0x1f19950, L_0x1f171b0, C4<1>, C4<1>; +L_0x1f00920 .functor OR 1, L_0x1f18db0, L_0x1f18e10, C4<0>, C4<0>; +L_0x1f19120 .functor OR 1, L_0x1f00920, L_0x1f18ec0, C4<0>, C4<0>; +L_0x1f19220 .functor OR 1, L_0x1f198b0, L_0x1f19950, C4<0>, C4<0>; +L_0x1f19280 .functor OR 1, L_0x1f19220, L_0x1f171b0, C4<0>, C4<0>; +L_0x1f19330 .functor NOT 1, L_0x1f19120, C4<0>, C4<0>, C4<0>; +L_0x1f19420 .functor AND 1, L_0x1f19330, L_0x1f19280, C4<1>, C4<1>; +L_0x1f19520 .functor AND 1, L_0x1f198b0, L_0x1f19950, C4<1>, C4<1>; +L_0x1f19700 .functor AND 1, L_0x1f19520, L_0x1f171b0, C4<1>, C4<1>; +L_0x1f19760 .functor OR 1, L_0x1f19420, L_0x1f19700, C4<0>, C4<0>; +v0x1ef1cf0_0 .net "a", 0 0, L_0x1f198b0; 1 drivers +v0x1ef1db0_0 .net "ab", 0 0, L_0x1f18db0; 1 drivers +v0x1ef1e50_0 .net "acarryin", 0 0, L_0x1f18e10; 1 drivers +v0x1ef1ef0_0 .net "andall", 0 0, L_0x1f19700; 1 drivers +v0x1ef1f70_0 .net "andsingleintermediate", 0 0, L_0x1f19520; 1 drivers +v0x1ef2010_0 .net "andsumintermediate", 0 0, L_0x1f19420; 1 drivers +v0x1ef20b0_0 .net "b", 0 0, L_0x1f19950; 1 drivers +v0x1ef2150_0 .net "bcarryin", 0 0, L_0x1f18ec0; 1 drivers +v0x1ef21f0_0 .alias "carryin", 0 0, v0x1f008a0_0; +v0x1ef2290_0 .alias "carryout", 0 0, v0x1ef30f0_0; +v0x1ef2310_0 .net "invcarryout", 0 0, L_0x1f19330; 1 drivers +v0x1ef2390_0 .net "orall", 0 0, L_0x1f19280; 1 drivers +v0x1ef2430_0 .net "orpairintermediate", 0 0, L_0x1f00920; 1 drivers +v0x1ef24d0_0 .net "orsingleintermediate", 0 0, L_0x1f19220; 1 drivers +v0x1ef25f0_0 .net "sum", 0 0, L_0x1f19760; 1 drivers +S_0x1ef1170 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1eefaa0; + .timescale 0 0; +L_0x1f196a0 .functor AND 1, L_0x1f1a550, L_0x1f1a640, C4<1>, C4<1>; +L_0x1f199f0 .functor AND 1, L_0x1f1a550, L_0x1f19120, C4<1>, C4<1>; +L_0x1f19aa0 .functor AND 1, L_0x1f1a640, L_0x1f19120, C4<1>, C4<1>; +L_0x1f19b50 .functor OR 1, L_0x1f196a0, L_0x1f199f0, C4<0>, C4<0>; +L_0x1f19c50 .functor OR 1, L_0x1f19b50, L_0x1f19aa0, C4<0>, C4<0>; +L_0x1f19d50 .functor OR 1, L_0x1f1a550, L_0x1f1a640, C4<0>, C4<0>; +L_0x1f19db0 .functor OR 1, L_0x1f19d50, L_0x1f19120, C4<0>, C4<0>; +L_0x1f19e60 .functor NOT 1, L_0x1f19c50, C4<0>, C4<0>, C4<0>; +L_0x1f19f50 .functor AND 1, L_0x1f19e60, L_0x1f19db0, C4<1>, C4<1>; +L_0x1f1a050 .functor AND 1, L_0x1f1a550, L_0x1f1a640, C4<1>, C4<1>; +L_0x1f1a230 .functor AND 1, L_0x1f1a050, L_0x1f19120, C4<1>, C4<1>; +L_0x1f19390 .functor OR 1, L_0x1f19f50, L_0x1f1a230, C4<0>, C4<0>; +v0x1ef1260_0 .net "a", 0 0, L_0x1f1a550; 1 drivers +v0x1ef1320_0 .net "ab", 0 0, L_0x1f196a0; 1 drivers +v0x1ef13c0_0 .net "acarryin", 0 0, L_0x1f199f0; 1 drivers +v0x1ef1460_0 .net "andall", 0 0, L_0x1f1a230; 1 drivers +v0x1ef14e0_0 .net "andsingleintermediate", 0 0, L_0x1f1a050; 1 drivers +v0x1ef1580_0 .net "andsumintermediate", 0 0, L_0x1f19f50; 1 drivers +v0x1ef1620_0 .net "b", 0 0, L_0x1f1a640; 1 drivers +v0x1ef16c0_0 .net "bcarryin", 0 0, L_0x1f19aa0; 1 drivers +v0x1ef1760_0 .alias "carryin", 0 0, v0x1ef30f0_0; +v0x1ef1800_0 .alias "carryout", 0 0, v0x1ef32c0_0; +v0x1ef1880_0 .net "invcarryout", 0 0, L_0x1f19e60; 1 drivers +v0x1ef1900_0 .net "orall", 0 0, L_0x1f19db0; 1 drivers +v0x1ef19a0_0 .net "orpairintermediate", 0 0, L_0x1f19b50; 1 drivers +v0x1ef1a40_0 .net "orsingleintermediate", 0 0, L_0x1f19d50; 1 drivers +v0x1ef1b60_0 .net "sum", 0 0, L_0x1f19390; 1 drivers +S_0x1ef0690 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1eefaa0; + .timescale 0 0; +L_0x1f1a1d0 .functor AND 1, L_0x1f1b240, L_0x1f1b330, C4<1>, C4<1>; +L_0x1f1a730 .functor AND 1, L_0x1f1b240, L_0x1f19c50, C4<1>, C4<1>; +L_0x1f1a7e0 .functor AND 1, L_0x1f1b330, L_0x1f19c50, C4<1>, C4<1>; +L_0x1f1a890 .functor OR 1, L_0x1f1a1d0, L_0x1f1a730, C4<0>, C4<0>; +L_0x1f1a990 .functor OR 1, L_0x1f1a890, L_0x1f1a7e0, C4<0>, C4<0>; +L_0x1f1aa90 .functor OR 1, L_0x1f1b240, L_0x1f1b330, C4<0>, C4<0>; +L_0x1f1aaf0 .functor OR 1, L_0x1f1aa90, L_0x1f19c50, C4<0>, C4<0>; +L_0x1f1aba0 .functor NOT 1, L_0x1f1a990, C4<0>, C4<0>, C4<0>; +L_0x1f1ac90 .functor AND 1, L_0x1f1aba0, L_0x1f1aaf0, C4<1>, C4<1>; +L_0x1f1ad90 .functor AND 1, L_0x1f1b240, L_0x1f1b330, C4<1>, C4<1>; +L_0x1f1af70 .functor AND 1, L_0x1f1ad90, L_0x1f19c50, C4<1>, C4<1>; +L_0x1f19ec0 .functor OR 1, L_0x1f1ac90, L_0x1f1af70, C4<0>, C4<0>; +v0x1ef0780_0 .net "a", 0 0, L_0x1f1b240; 1 drivers +v0x1ef0840_0 .net "ab", 0 0, L_0x1f1a1d0; 1 drivers +v0x1ef08e0_0 .net "acarryin", 0 0, L_0x1f1a730; 1 drivers +v0x1ef0980_0 .net "andall", 0 0, L_0x1f1af70; 1 drivers +v0x1ef0a00_0 .net "andsingleintermediate", 0 0, L_0x1f1ad90; 1 drivers +v0x1ef0aa0_0 .net "andsumintermediate", 0 0, L_0x1f1ac90; 1 drivers +v0x1ef0b40_0 .net "b", 0 0, L_0x1f1b330; 1 drivers +v0x1ef0be0_0 .net "bcarryin", 0 0, L_0x1f1a7e0; 1 drivers +v0x1ef0cd0_0 .alias "carryin", 0 0, v0x1ef32c0_0; +v0x1ef0d70_0 .alias "carryout", 0 0, v0x1ef33f0_0; +v0x1ef0df0_0 .net "invcarryout", 0 0, L_0x1f1aba0; 1 drivers +v0x1ef0e70_0 .net "orall", 0 0, L_0x1f1aaf0; 1 drivers +v0x1ef0f10_0 .net "orpairintermediate", 0 0, L_0x1f1a890; 1 drivers +v0x1ef0fb0_0 .net "orsingleintermediate", 0 0, L_0x1f1aa90; 1 drivers +v0x1ef10d0_0 .net "sum", 0 0, L_0x1f19ec0; 1 drivers +S_0x1eefb90 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1eefaa0; + .timescale 0 0; +L_0x1f1af10 .functor AND 1, L_0x1f1bee0, L_0x1f1c010, C4<1>, C4<1>; +L_0x1f1b3d0 .functor AND 1, L_0x1f1bee0, L_0x1f1a990, C4<1>, C4<1>; +L_0x1f1b480 .functor AND 1, L_0x1f1c010, L_0x1f1a990, C4<1>, C4<1>; +L_0x1f1b530 .functor OR 1, L_0x1f1af10, L_0x1f1b3d0, C4<0>, C4<0>; +L_0x1f1b630 .functor OR 1, L_0x1f1b530, L_0x1f1b480, C4<0>, C4<0>; +L_0x1f1b730 .functor OR 1, L_0x1f1bee0, L_0x1f1c010, C4<0>, C4<0>; +L_0x1f1b790 .functor OR 1, L_0x1f1b730, L_0x1f1a990, C4<0>, C4<0>; +L_0x1f1b840 .functor NOT 1, L_0x1f1b630, C4<0>, C4<0>, C4<0>; +L_0x1f1b8f0 .functor AND 1, L_0x1f1b840, L_0x1f1b790, C4<1>, C4<1>; +L_0x1f1b9f0 .functor AND 1, L_0x1f1bee0, L_0x1f1c010, C4<1>, C4<1>; +L_0x1f1bbd0 .functor AND 1, L_0x1f1b9f0, L_0x1f1a990, C4<1>, C4<1>; +L_0x1f1ac00 .functor OR 1, L_0x1f1b8f0, L_0x1f1bbd0, C4<0>, C4<0>; +v0x1eefc80_0 .net "a", 0 0, L_0x1f1bee0; 1 drivers +v0x1eefd40_0 .net "ab", 0 0, L_0x1f1af10; 1 drivers +v0x1eefde0_0 .net "acarryin", 0 0, L_0x1f1b3d0; 1 drivers +v0x1eefe80_0 .net "andall", 0 0, L_0x1f1bbd0; 1 drivers +v0x1eeff00_0 .net "andsingleintermediate", 0 0, L_0x1f1b9f0; 1 drivers +v0x1eeffa0_0 .net "andsumintermediate", 0 0, L_0x1f1b8f0; 1 drivers +v0x1ef0040_0 .net "b", 0 0, L_0x1f1c010; 1 drivers +v0x1ef00e0_0 .net "bcarryin", 0 0, L_0x1f1b480; 1 drivers +v0x1ef01d0_0 .alias "carryin", 0 0, v0x1ef33f0_0; +v0x1ef0270_0 .alias "carryout", 0 0, v0x1f00ca0_0; +v0x1ef02f0_0 .net "invcarryout", 0 0, L_0x1f1b840; 1 drivers +v0x1ef0390_0 .net "orall", 0 0, L_0x1f1b790; 1 drivers +v0x1ef0430_0 .net "orpairintermediate", 0 0, L_0x1f1b530; 1 drivers +v0x1ef04d0_0 .net "orsingleintermediate", 0 0, L_0x1f1b730; 1 drivers +v0x1ef05f0_0 .net "sum", 0 0, L_0x1f1ac00; 1 drivers +S_0x1eebf90 .scope module, "adder2" "FullAdder4bit" 7 239, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f1fe80 .functor AND 1, L_0x1f204c0, L_0x1f20560, C4<1>, C4<1>; +L_0x1f20600 .functor NOR 1, L_0x1f20660, L_0x1f20700, C4<0>, C4<0>; +L_0x1f20880 .functor AND 1, L_0x1f208e0, L_0x1f209d0, C4<1>, C4<1>; +L_0x1f207f0 .functor NOR 1, L_0x1f20b60, L_0x1f20d60, C4<0>, C4<0>; +L_0x1f20ac0 .functor OR 1, L_0x1f1fe80, L_0x1f20600, C4<0>, C4<0>; +L_0x1f20f50 .functor NOR 1, L_0x1f20880, L_0x1f207f0, C4<0>, C4<0>; +L_0x1f21050 .functor AND 1, L_0x1f20ac0, L_0x1f20f50, C4<1>, C4<1>; +v0x1eeeb80_0 .net *"_s25", 0 0, L_0x1f204c0; 1 drivers +v0x1eeec40_0 .net *"_s27", 0 0, L_0x1f20560; 1 drivers +v0x1eeece0_0 .net *"_s29", 0 0, L_0x1f20660; 1 drivers +v0x1eeed80_0 .net *"_s31", 0 0, L_0x1f20700; 1 drivers +v0x1eeee00_0 .net *"_s33", 0 0, L_0x1f208e0; 1 drivers +v0x1eeeea0_0 .net *"_s35", 0 0, L_0x1f209d0; 1 drivers +v0x1eeef40_0 .net *"_s37", 0 0, L_0x1f20b60; 1 drivers +v0x1eeefe0_0 .net *"_s39", 0 0, L_0x1f20d60; 1 drivers +v0x1eef080_0 .net "a", 3 0, L_0x1f212d0; 1 drivers +v0x1eef120_0 .net "aandb", 0 0, L_0x1f1fe80; 1 drivers +v0x1eef1c0_0 .net "abandnoror", 0 0, L_0x1f20ac0; 1 drivers +v0x1eef260_0 .net "anorb", 0 0, L_0x1f20600; 1 drivers +v0x1eef300_0 .net "b", 3 0, L_0x1f1cf30; 1 drivers +v0x1eef3a0_0 .net "bandsum", 0 0, L_0x1f20880; 1 drivers +v0x1eef4c0_0 .net "bnorsum", 0 0, L_0x1f207f0; 1 drivers +v0x1eef560_0 .net "bsumandnornor", 0 0, L_0x1f20f50; 1 drivers +v0x1eef420_0 .alias "carryin", 0 0, v0x1f00ca0_0; +v0x1eef690_0 .alias "carryout", 0 0, v0x1f00ad0_0; +v0x1eef5e0_0 .net "carryout1", 0 0, L_0x1f1d430; 1 drivers +v0x1eef7b0_0 .net "carryout2", 0 0, L_0x1f1df60; 1 drivers +v0x1eef8e0_0 .net "carryout3", 0 0, L_0x1f1eca0; 1 drivers +v0x1eef960_0 .alias "overflow", 0 0, v0x1efdc90_0; +v0x1eef830_0 .net8 "sum", 3 0, RS_0x7fdf8896cd28; 4 drivers +L_0x1f1dad0 .part/pv L_0x1f1da70, 0, 1, 4; +L_0x1f1dbc0 .part L_0x1f212d0, 0, 1; +L_0x1f1dc60 .part L_0x1f1cf30, 0, 1; +L_0x1f1e720 .part/pv L_0x1f1d6a0, 1, 1, 4; +L_0x1f1e860 .part L_0x1f212d0, 1, 1; +L_0x1f1e950 .part L_0x1f1cf30, 1, 1; +L_0x1f1f460 .part/pv L_0x1f1e1d0, 2, 1, 4; +L_0x1f1f550 .part L_0x1f212d0, 2, 1; +L_0x1f1f640 .part L_0x1f1cf30, 2, 1; +L_0x1f200c0 .part/pv L_0x1f1ef10, 3, 1, 4; +L_0x1f201f0 .part L_0x1f212d0, 3, 1; +L_0x1f20320 .part L_0x1f1cf30, 3, 1; +L_0x1f204c0 .part L_0x1f212d0, 3, 1; +L_0x1f20560 .part L_0x1f1cf30, 3, 1; +L_0x1f20660 .part L_0x1f212d0, 3, 1; +L_0x1f20700 .part L_0x1f1cf30, 3, 1; +L_0x1f208e0 .part L_0x1f1cf30, 3, 1; +L_0x1f209d0 .part RS_0x7fdf8896cd28, 3, 1; +L_0x1f20b60 .part L_0x1f1cf30, 3, 1; +L_0x1f20d60 .part RS_0x7fdf8896cd28, 3, 1; +S_0x1eee0f0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1eebf90; + .timescale 0 0; +L_0x1f18cc0 .functor AND 1, L_0x1f1dbc0, L_0x1f1dc60, C4<1>, C4<1>; +L_0x1f18d20 .functor AND 1, L_0x1f1dbc0, L_0x1f1b630, C4<1>, C4<1>; +L_0x1f1d1d0 .functor AND 1, L_0x1f1dc60, L_0x1f1b630, C4<1>, C4<1>; +L_0x1f00a40 .functor OR 1, L_0x1f18cc0, L_0x1f18d20, C4<0>, C4<0>; +L_0x1f1d430 .functor OR 1, L_0x1f00a40, L_0x1f1d1d0, C4<0>, C4<0>; +L_0x1f1d530 .functor OR 1, L_0x1f1dbc0, L_0x1f1dc60, C4<0>, C4<0>; +L_0x1f1d590 .functor OR 1, L_0x1f1d530, L_0x1f1b630, C4<0>, C4<0>; +L_0x1f1d640 .functor NOT 1, L_0x1f1d430, C4<0>, C4<0>, C4<0>; +L_0x1f1d730 .functor AND 1, L_0x1f1d640, L_0x1f1d590, C4<1>, C4<1>; +L_0x1f1d830 .functor AND 1, L_0x1f1dbc0, L_0x1f1dc60, C4<1>, C4<1>; +L_0x1f1da10 .functor AND 1, L_0x1f1d830, L_0x1f1b630, C4<1>, C4<1>; +L_0x1f1da70 .functor OR 1, L_0x1f1d730, L_0x1f1da10, C4<0>, C4<0>; +v0x1eee1e0_0 .net "a", 0 0, L_0x1f1dbc0; 1 drivers +v0x1eee2a0_0 .net "ab", 0 0, L_0x1f18cc0; 1 drivers +v0x1eee340_0 .net "acarryin", 0 0, L_0x1f18d20; 1 drivers +v0x1eee3e0_0 .net "andall", 0 0, L_0x1f1da10; 1 drivers +v0x1eee460_0 .net "andsingleintermediate", 0 0, L_0x1f1d830; 1 drivers +v0x1eee500_0 .net "andsumintermediate", 0 0, L_0x1f1d730; 1 drivers +v0x1eee5a0_0 .net "b", 0 0, L_0x1f1dc60; 1 drivers +v0x1eee640_0 .net "bcarryin", 0 0, L_0x1f1d1d0; 1 drivers +v0x1eee6e0_0 .alias "carryin", 0 0, v0x1f00ca0_0; +v0x1eee780_0 .alias "carryout", 0 0, v0x1eef5e0_0; +v0x1eee800_0 .net "invcarryout", 0 0, L_0x1f1d640; 1 drivers +v0x1eee880_0 .net "orall", 0 0, L_0x1f1d590; 1 drivers +v0x1eee920_0 .net "orpairintermediate", 0 0, L_0x1f00a40; 1 drivers +v0x1eee9c0_0 .net "orsingleintermediate", 0 0, L_0x1f1d530; 1 drivers +v0x1eeeae0_0 .net "sum", 0 0, L_0x1f1da70; 1 drivers +S_0x1eed660 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1eebf90; + .timescale 0 0; +L_0x1f1d9b0 .functor AND 1, L_0x1f1e860, L_0x1f1e950, C4<1>, C4<1>; +L_0x1f1dd00 .functor AND 1, L_0x1f1e860, L_0x1f1d430, C4<1>, C4<1>; +L_0x1f1ddb0 .functor AND 1, L_0x1f1e950, L_0x1f1d430, C4<1>, C4<1>; +L_0x1f1de60 .functor OR 1, L_0x1f1d9b0, L_0x1f1dd00, C4<0>, C4<0>; +L_0x1f1df60 .functor OR 1, L_0x1f1de60, L_0x1f1ddb0, C4<0>, C4<0>; +L_0x1f1e060 .functor OR 1, L_0x1f1e860, L_0x1f1e950, C4<0>, C4<0>; +L_0x1f1e0c0 .functor OR 1, L_0x1f1e060, L_0x1f1d430, C4<0>, C4<0>; +L_0x1f1e170 .functor NOT 1, L_0x1f1df60, C4<0>, C4<0>, C4<0>; +L_0x1f1e260 .functor AND 1, L_0x1f1e170, L_0x1f1e0c0, C4<1>, C4<1>; +L_0x1f1e360 .functor AND 1, L_0x1f1e860, L_0x1f1e950, C4<1>, C4<1>; +L_0x1f1e540 .functor AND 1, L_0x1f1e360, L_0x1f1d430, C4<1>, C4<1>; +L_0x1f1d6a0 .functor OR 1, L_0x1f1e260, L_0x1f1e540, C4<0>, C4<0>; +v0x1eed750_0 .net "a", 0 0, L_0x1f1e860; 1 drivers +v0x1eed810_0 .net "ab", 0 0, L_0x1f1d9b0; 1 drivers +v0x1eed8b0_0 .net "acarryin", 0 0, L_0x1f1dd00; 1 drivers +v0x1eed950_0 .net "andall", 0 0, L_0x1f1e540; 1 drivers +v0x1eed9d0_0 .net "andsingleintermediate", 0 0, L_0x1f1e360; 1 drivers +v0x1eeda70_0 .net "andsumintermediate", 0 0, L_0x1f1e260; 1 drivers +v0x1eedb10_0 .net "b", 0 0, L_0x1f1e950; 1 drivers +v0x1eedbb0_0 .net "bcarryin", 0 0, L_0x1f1ddb0; 1 drivers +v0x1eedc50_0 .alias "carryin", 0 0, v0x1eef5e0_0; +v0x1eedcf0_0 .alias "carryout", 0 0, v0x1eef7b0_0; +v0x1eedd70_0 .net "invcarryout", 0 0, L_0x1f1e170; 1 drivers +v0x1eeddf0_0 .net "orall", 0 0, L_0x1f1e0c0; 1 drivers +v0x1eede90_0 .net "orpairintermediate", 0 0, L_0x1f1de60; 1 drivers +v0x1eedf30_0 .net "orsingleintermediate", 0 0, L_0x1f1e060; 1 drivers +v0x1eee050_0 .net "sum", 0 0, L_0x1f1d6a0; 1 drivers +S_0x1eecb80 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1eebf90; + .timescale 0 0; +L_0x1f1e4e0 .functor AND 1, L_0x1f1f550, L_0x1f1f640, C4<1>, C4<1>; +L_0x1f1ea40 .functor AND 1, L_0x1f1f550, L_0x1f1df60, C4<1>, C4<1>; +L_0x1f1eaf0 .functor AND 1, L_0x1f1f640, L_0x1f1df60, C4<1>, C4<1>; +L_0x1f1eba0 .functor OR 1, L_0x1f1e4e0, L_0x1f1ea40, C4<0>, C4<0>; +L_0x1f1eca0 .functor OR 1, L_0x1f1eba0, L_0x1f1eaf0, C4<0>, C4<0>; +L_0x1f1eda0 .functor OR 1, L_0x1f1f550, L_0x1f1f640, C4<0>, C4<0>; +L_0x1f1ee00 .functor OR 1, L_0x1f1eda0, L_0x1f1df60, C4<0>, C4<0>; +L_0x1f1eeb0 .functor NOT 1, L_0x1f1eca0, C4<0>, C4<0>, C4<0>; +L_0x1f1efa0 .functor AND 1, L_0x1f1eeb0, L_0x1f1ee00, C4<1>, C4<1>; +L_0x1f1f0a0 .functor AND 1, L_0x1f1f550, L_0x1f1f640, C4<1>, C4<1>; +L_0x1f1f280 .functor AND 1, L_0x1f1f0a0, L_0x1f1df60, C4<1>, C4<1>; +L_0x1f1e1d0 .functor OR 1, L_0x1f1efa0, L_0x1f1f280, C4<0>, C4<0>; +v0x1eecc70_0 .net "a", 0 0, L_0x1f1f550; 1 drivers +v0x1eecd30_0 .net "ab", 0 0, L_0x1f1e4e0; 1 drivers +v0x1eecdd0_0 .net "acarryin", 0 0, L_0x1f1ea40; 1 drivers +v0x1eece70_0 .net "andall", 0 0, L_0x1f1f280; 1 drivers +v0x1eecef0_0 .net "andsingleintermediate", 0 0, L_0x1f1f0a0; 1 drivers +v0x1eecf90_0 .net "andsumintermediate", 0 0, L_0x1f1efa0; 1 drivers +v0x1eed030_0 .net "b", 0 0, L_0x1f1f640; 1 drivers +v0x1eed0d0_0 .net "bcarryin", 0 0, L_0x1f1eaf0; 1 drivers +v0x1eed1c0_0 .alias "carryin", 0 0, v0x1eef7b0_0; +v0x1eed260_0 .alias "carryout", 0 0, v0x1eef8e0_0; +v0x1eed2e0_0 .net "invcarryout", 0 0, L_0x1f1eeb0; 1 drivers +v0x1eed360_0 .net "orall", 0 0, L_0x1f1ee00; 1 drivers +v0x1eed400_0 .net "orpairintermediate", 0 0, L_0x1f1eba0; 1 drivers +v0x1eed4a0_0 .net "orsingleintermediate", 0 0, L_0x1f1eda0; 1 drivers +v0x1eed5c0_0 .net "sum", 0 0, L_0x1f1e1d0; 1 drivers +S_0x1eec080 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1eebf90; + .timescale 0 0; +L_0x1f1f220 .functor AND 1, L_0x1f201f0, L_0x1f20320, C4<1>, C4<1>; +L_0x1f1f6e0 .functor AND 1, L_0x1f201f0, L_0x1f1eca0, C4<1>, C4<1>; +L_0x1f1f790 .functor AND 1, L_0x1f20320, L_0x1f1eca0, C4<1>, C4<1>; +L_0x1f1f840 .functor OR 1, L_0x1f1f220, L_0x1f1f6e0, C4<0>, C4<0>; +L_0x1f1f940 .functor OR 1, L_0x1f1f840, L_0x1f1f790, C4<0>, C4<0>; +L_0x1f1fa40 .functor OR 1, L_0x1f201f0, L_0x1f20320, C4<0>, C4<0>; +L_0x1f1faa0 .functor OR 1, L_0x1f1fa40, L_0x1f1eca0, C4<0>, C4<0>; +L_0x1f1fb50 .functor NOT 1, L_0x1f1f940, C4<0>, C4<0>, C4<0>; +L_0x1f1fc00 .functor AND 1, L_0x1f1fb50, L_0x1f1faa0, C4<1>, C4<1>; +L_0x1f1fd00 .functor AND 1, L_0x1f201f0, L_0x1f20320, C4<1>, C4<1>; +L_0x1f1fee0 .functor AND 1, L_0x1f1fd00, L_0x1f1eca0, C4<1>, C4<1>; +L_0x1f1ef10 .functor OR 1, L_0x1f1fc00, L_0x1f1fee0, C4<0>, C4<0>; +v0x1eec170_0 .net "a", 0 0, L_0x1f201f0; 1 drivers +v0x1eec230_0 .net "ab", 0 0, L_0x1f1f220; 1 drivers +v0x1eec2d0_0 .net "acarryin", 0 0, L_0x1f1f6e0; 1 drivers +v0x1eec370_0 .net "andall", 0 0, L_0x1f1fee0; 1 drivers +v0x1eec3f0_0 .net "andsingleintermediate", 0 0, L_0x1f1fd00; 1 drivers +v0x1eec490_0 .net "andsumintermediate", 0 0, L_0x1f1fc00; 1 drivers +v0x1eec530_0 .net "b", 0 0, L_0x1f20320; 1 drivers +v0x1eec5d0_0 .net "bcarryin", 0 0, L_0x1f1f790; 1 drivers +v0x1eec6c0_0 .alias "carryin", 0 0, v0x1eef8e0_0; +v0x1eec760_0 .alias "carryout", 0 0, v0x1f00ad0_0; +v0x1eec7e0_0 .net "invcarryout", 0 0, L_0x1f1fb50; 1 drivers +v0x1eec880_0 .net "orall", 0 0, L_0x1f1faa0; 1 drivers +v0x1eec920_0 .net "orpairintermediate", 0 0, L_0x1f1f840; 1 drivers +v0x1eec9c0_0 .net "orsingleintermediate", 0 0, L_0x1f1fa40; 1 drivers +v0x1eecae0_0 .net "sum", 0 0, L_0x1f1ef10; 1 drivers +S_0x1ee8480 .scope module, "adder3" "FullAdder4bit" 7 240, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f241d0 .functor AND 1, L_0x1f24810, L_0x1f248b0, C4<1>, C4<1>; +L_0x1f24950 .functor NOR 1, L_0x1f249b0, L_0x1f24a50, C4<0>, C4<0>; +L_0x1f24bd0 .functor AND 1, L_0x1f24c30, L_0x1f24d20, C4<1>, C4<1>; +L_0x1f24b40 .functor NOR 1, L_0x1f24eb0, L_0x1f250b0, C4<0>, C4<0>; +L_0x1f24e10 .functor OR 1, L_0x1f241d0, L_0x1f24950, C4<0>, C4<0>; +L_0x1f252a0 .functor NOR 1, L_0x1f24bd0, L_0x1f24b40, C4<0>, C4<0>; +L_0x1f253a0 .functor AND 1, L_0x1f24e10, L_0x1f252a0, C4<1>, C4<1>; +v0x1eeb070_0 .net *"_s25", 0 0, L_0x1f24810; 1 drivers +v0x1eeb130_0 .net *"_s27", 0 0, L_0x1f248b0; 1 drivers +v0x1eeb1d0_0 .net *"_s29", 0 0, L_0x1f249b0; 1 drivers +v0x1eeb270_0 .net *"_s31", 0 0, L_0x1f24a50; 1 drivers +v0x1eeb2f0_0 .net *"_s33", 0 0, L_0x1f24c30; 1 drivers +v0x1eeb390_0 .net *"_s35", 0 0, L_0x1f24d20; 1 drivers +v0x1eeb430_0 .net *"_s37", 0 0, L_0x1f24eb0; 1 drivers +v0x1eeb4d0_0 .net *"_s39", 0 0, L_0x1f250b0; 1 drivers +v0x1eeb570_0 .net "a", 3 0, L_0x1f21370; 1 drivers +v0x1eeb610_0 .net "aandb", 0 0, L_0x1f241d0; 1 drivers +v0x1eeb6b0_0 .net "abandnoror", 0 0, L_0x1f24e10; 1 drivers +v0x1eeb750_0 .net "anorb", 0 0, L_0x1f24950; 1 drivers +v0x1eeb7f0_0 .net "b", 3 0, L_0x1f21410; 1 drivers +v0x1eeb890_0 .net "bandsum", 0 0, L_0x1f24bd0; 1 drivers +v0x1eeb9b0_0 .net "bnorsum", 0 0, L_0x1f24b40; 1 drivers +v0x1eeba50_0 .net "bsumandnornor", 0 0, L_0x1f252a0; 1 drivers +v0x1eeb910_0 .alias "carryin", 0 0, v0x1f00ad0_0; +v0x1eebb80_0 .alias "carryout", 0 0, v0x1f00be0_0; +v0x1eebad0_0 .net "carryout1", 0 0, L_0x1f21780; 1 drivers +v0x1eebca0_0 .net "carryout2", 0 0, L_0x1f222b0; 1 drivers +v0x1eebdd0_0 .net "carryout3", 0 0, L_0x1f22ff0; 1 drivers +v0x1eebe50_0 .alias "overflow", 0 0, v0x1efdd10_0; +v0x1eebd20_0 .net8 "sum", 3 0, RS_0x7fdf8896bf48; 4 drivers +L_0x1f21e20 .part/pv L_0x1f21dc0, 0, 1, 4; +L_0x1f21f10 .part L_0x1f21370, 0, 1; +L_0x1f21fb0 .part L_0x1f21410, 0, 1; +L_0x1f22a70 .part/pv L_0x1f219f0, 1, 1, 4; +L_0x1f22bb0 .part L_0x1f21370, 1, 1; +L_0x1f22ca0 .part L_0x1f21410, 1, 1; +L_0x1f237b0 .part/pv L_0x1f22520, 2, 1, 4; +L_0x1f238a0 .part L_0x1f21370, 2, 1; +L_0x1f23990 .part L_0x1f21410, 2, 1; +L_0x1f24410 .part/pv L_0x1f23260, 3, 1, 4; +L_0x1f24540 .part L_0x1f21370, 3, 1; +L_0x1f24670 .part L_0x1f21410, 3, 1; +L_0x1f24810 .part L_0x1f21370, 3, 1; +L_0x1f248b0 .part L_0x1f21410, 3, 1; +L_0x1f249b0 .part L_0x1f21370, 3, 1; +L_0x1f24a50 .part L_0x1f21410, 3, 1; +L_0x1f24c30 .part L_0x1f21410, 3, 1; +L_0x1f24d20 .part RS_0x7fdf8896bf48, 3, 1; +L_0x1f24eb0 .part L_0x1f21410, 3, 1; +L_0x1f250b0 .part RS_0x7fdf8896bf48, 3, 1; +S_0x1eea5e0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1ee8480; + .timescale 0 0; +L_0x1f1cfd0 .functor AND 1, L_0x1f21f10, L_0x1f21fb0, C4<1>, C4<1>; +L_0x1f1d030 .functor AND 1, L_0x1f21f10, L_0x1f1f940, C4<1>, C4<1>; +L_0x1f1d090 .functor AND 1, L_0x1f21fb0, L_0x1f1f940, C4<1>, C4<1>; +L_0x1f00b50 .functor OR 1, L_0x1f1cfd0, L_0x1f1d030, C4<0>, C4<0>; +L_0x1f21780 .functor OR 1, L_0x1f00b50, L_0x1f1d090, C4<0>, C4<0>; +L_0x1f21880 .functor OR 1, L_0x1f21f10, L_0x1f21fb0, C4<0>, C4<0>; +L_0x1f218e0 .functor OR 1, L_0x1f21880, L_0x1f1f940, C4<0>, C4<0>; +L_0x1f21990 .functor NOT 1, L_0x1f21780, C4<0>, C4<0>, C4<0>; +L_0x1f21a80 .functor AND 1, L_0x1f21990, L_0x1f218e0, C4<1>, C4<1>; +L_0x1f21b80 .functor AND 1, L_0x1f21f10, L_0x1f21fb0, C4<1>, C4<1>; +L_0x1f21d60 .functor AND 1, L_0x1f21b80, L_0x1f1f940, C4<1>, C4<1>; +L_0x1f21dc0 .functor OR 1, L_0x1f21a80, L_0x1f21d60, C4<0>, C4<0>; +v0x1eea6d0_0 .net "a", 0 0, L_0x1f21f10; 1 drivers +v0x1eea790_0 .net "ab", 0 0, L_0x1f1cfd0; 1 drivers +v0x1eea830_0 .net "acarryin", 0 0, L_0x1f1d030; 1 drivers +v0x1eea8d0_0 .net "andall", 0 0, L_0x1f21d60; 1 drivers +v0x1eea950_0 .net "andsingleintermediate", 0 0, L_0x1f21b80; 1 drivers +v0x1eea9f0_0 .net "andsumintermediate", 0 0, L_0x1f21a80; 1 drivers +v0x1eeaa90_0 .net "b", 0 0, L_0x1f21fb0; 1 drivers +v0x1eeab30_0 .net "bcarryin", 0 0, L_0x1f1d090; 1 drivers +v0x1eeabd0_0 .alias "carryin", 0 0, v0x1f00ad0_0; +v0x1eeac70_0 .alias "carryout", 0 0, v0x1eebad0_0; +v0x1eeacf0_0 .net "invcarryout", 0 0, L_0x1f21990; 1 drivers +v0x1eead70_0 .net "orall", 0 0, L_0x1f218e0; 1 drivers +v0x1eeae10_0 .net "orpairintermediate", 0 0, L_0x1f00b50; 1 drivers +v0x1eeaeb0_0 .net "orsingleintermediate", 0 0, L_0x1f21880; 1 drivers +v0x1eeafd0_0 .net "sum", 0 0, L_0x1f21dc0; 1 drivers +S_0x1ee9b50 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1ee8480; + .timescale 0 0; +L_0x1f21d00 .functor AND 1, L_0x1f22bb0, L_0x1f22ca0, C4<1>, C4<1>; +L_0x1f22050 .functor AND 1, L_0x1f22bb0, L_0x1f21780, C4<1>, C4<1>; +L_0x1f22100 .functor AND 1, L_0x1f22ca0, L_0x1f21780, C4<1>, C4<1>; +L_0x1f221b0 .functor OR 1, L_0x1f21d00, L_0x1f22050, C4<0>, C4<0>; +L_0x1f222b0 .functor OR 1, L_0x1f221b0, L_0x1f22100, C4<0>, C4<0>; +L_0x1f223b0 .functor OR 1, L_0x1f22bb0, L_0x1f22ca0, C4<0>, C4<0>; +L_0x1f22410 .functor OR 1, L_0x1f223b0, L_0x1f21780, C4<0>, C4<0>; +L_0x1f224c0 .functor NOT 1, L_0x1f222b0, C4<0>, C4<0>, C4<0>; +L_0x1f225b0 .functor AND 1, L_0x1f224c0, L_0x1f22410, C4<1>, C4<1>; +L_0x1f226b0 .functor AND 1, L_0x1f22bb0, L_0x1f22ca0, C4<1>, C4<1>; +L_0x1f22890 .functor AND 1, L_0x1f226b0, L_0x1f21780, C4<1>, C4<1>; +L_0x1f219f0 .functor OR 1, L_0x1f225b0, L_0x1f22890, C4<0>, C4<0>; +v0x1ee9c40_0 .net "a", 0 0, L_0x1f22bb0; 1 drivers +v0x1ee9d00_0 .net "ab", 0 0, L_0x1f21d00; 1 drivers +v0x1ee9da0_0 .net "acarryin", 0 0, L_0x1f22050; 1 drivers +v0x1ee9e40_0 .net "andall", 0 0, L_0x1f22890; 1 drivers +v0x1ee9ec0_0 .net "andsingleintermediate", 0 0, L_0x1f226b0; 1 drivers +v0x1ee9f60_0 .net "andsumintermediate", 0 0, L_0x1f225b0; 1 drivers +v0x1eea000_0 .net "b", 0 0, L_0x1f22ca0; 1 drivers +v0x1eea0a0_0 .net "bcarryin", 0 0, L_0x1f22100; 1 drivers +v0x1eea140_0 .alias "carryin", 0 0, v0x1eebad0_0; +v0x1eea1e0_0 .alias "carryout", 0 0, v0x1eebca0_0; +v0x1eea260_0 .net "invcarryout", 0 0, L_0x1f224c0; 1 drivers +v0x1eea2e0_0 .net "orall", 0 0, L_0x1f22410; 1 drivers +v0x1eea380_0 .net "orpairintermediate", 0 0, L_0x1f221b0; 1 drivers +v0x1eea420_0 .net "orsingleintermediate", 0 0, L_0x1f223b0; 1 drivers +v0x1eea540_0 .net "sum", 0 0, L_0x1f219f0; 1 drivers +S_0x1ee9070 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1ee8480; + .timescale 0 0; +L_0x1f22830 .functor AND 1, L_0x1f238a0, L_0x1f23990, C4<1>, C4<1>; +L_0x1f22d90 .functor AND 1, L_0x1f238a0, L_0x1f222b0, C4<1>, C4<1>; +L_0x1f22e40 .functor AND 1, L_0x1f23990, L_0x1f222b0, C4<1>, C4<1>; +L_0x1f22ef0 .functor OR 1, L_0x1f22830, L_0x1f22d90, C4<0>, C4<0>; +L_0x1f22ff0 .functor OR 1, L_0x1f22ef0, L_0x1f22e40, C4<0>, C4<0>; +L_0x1f230f0 .functor OR 1, L_0x1f238a0, L_0x1f23990, C4<0>, C4<0>; +L_0x1f23150 .functor OR 1, L_0x1f230f0, L_0x1f222b0, C4<0>, C4<0>; +L_0x1f23200 .functor NOT 1, L_0x1f22ff0, C4<0>, C4<0>, C4<0>; +L_0x1f232f0 .functor AND 1, L_0x1f23200, L_0x1f23150, C4<1>, C4<1>; +L_0x1f233f0 .functor AND 1, L_0x1f238a0, L_0x1f23990, C4<1>, C4<1>; +L_0x1f235d0 .functor AND 1, L_0x1f233f0, L_0x1f222b0, C4<1>, C4<1>; +L_0x1f22520 .functor OR 1, L_0x1f232f0, L_0x1f235d0, C4<0>, C4<0>; +v0x1ee9160_0 .net "a", 0 0, L_0x1f238a0; 1 drivers +v0x1ee9220_0 .net "ab", 0 0, L_0x1f22830; 1 drivers +v0x1ee92c0_0 .net "acarryin", 0 0, L_0x1f22d90; 1 drivers +v0x1ee9360_0 .net "andall", 0 0, L_0x1f235d0; 1 drivers +v0x1ee93e0_0 .net "andsingleintermediate", 0 0, L_0x1f233f0; 1 drivers +v0x1ee9480_0 .net "andsumintermediate", 0 0, L_0x1f232f0; 1 drivers +v0x1ee9520_0 .net "b", 0 0, L_0x1f23990; 1 drivers +v0x1ee95c0_0 .net "bcarryin", 0 0, L_0x1f22e40; 1 drivers +v0x1ee96b0_0 .alias "carryin", 0 0, v0x1eebca0_0; +v0x1ee9750_0 .alias "carryout", 0 0, v0x1eebdd0_0; +v0x1ee97d0_0 .net "invcarryout", 0 0, L_0x1f23200; 1 drivers +v0x1ee9850_0 .net "orall", 0 0, L_0x1f23150; 1 drivers +v0x1ee98f0_0 .net "orpairintermediate", 0 0, L_0x1f22ef0; 1 drivers +v0x1ee9990_0 .net "orsingleintermediate", 0 0, L_0x1f230f0; 1 drivers +v0x1ee9ab0_0 .net "sum", 0 0, L_0x1f22520; 1 drivers +S_0x1ee8570 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1ee8480; + .timescale 0 0; +L_0x1f23570 .functor AND 1, L_0x1f24540, L_0x1f24670, C4<1>, C4<1>; +L_0x1f23a30 .functor AND 1, L_0x1f24540, L_0x1f22ff0, C4<1>, C4<1>; +L_0x1f23ae0 .functor AND 1, L_0x1f24670, L_0x1f22ff0, C4<1>, C4<1>; +L_0x1f23b90 .functor OR 1, L_0x1f23570, L_0x1f23a30, C4<0>, C4<0>; +L_0x1f23c90 .functor OR 1, L_0x1f23b90, L_0x1f23ae0, C4<0>, C4<0>; +L_0x1f23d90 .functor OR 1, L_0x1f24540, L_0x1f24670, C4<0>, C4<0>; +L_0x1f23df0 .functor OR 1, L_0x1f23d90, L_0x1f22ff0, C4<0>, C4<0>; +L_0x1f23ea0 .functor NOT 1, L_0x1f23c90, C4<0>, C4<0>, C4<0>; +L_0x1f23f50 .functor AND 1, L_0x1f23ea0, L_0x1f23df0, C4<1>, C4<1>; +L_0x1f24050 .functor AND 1, L_0x1f24540, L_0x1f24670, C4<1>, C4<1>; +L_0x1f24230 .functor AND 1, L_0x1f24050, L_0x1f22ff0, C4<1>, C4<1>; +L_0x1f23260 .functor OR 1, L_0x1f23f50, L_0x1f24230, C4<0>, C4<0>; +v0x1ee8660_0 .net "a", 0 0, L_0x1f24540; 1 drivers +v0x1ee8720_0 .net "ab", 0 0, L_0x1f23570; 1 drivers +v0x1ee87c0_0 .net "acarryin", 0 0, L_0x1f23a30; 1 drivers +v0x1ee8860_0 .net "andall", 0 0, L_0x1f24230; 1 drivers +v0x1ee88e0_0 .net "andsingleintermediate", 0 0, L_0x1f24050; 1 drivers +v0x1ee8980_0 .net "andsumintermediate", 0 0, L_0x1f23f50; 1 drivers +v0x1ee8a20_0 .net "b", 0 0, L_0x1f24670; 1 drivers +v0x1ee8ac0_0 .net "bcarryin", 0 0, L_0x1f23ae0; 1 drivers +v0x1ee8bb0_0 .alias "carryin", 0 0, v0x1eebdd0_0; +v0x1ee8c50_0 .alias "carryout", 0 0, v0x1f00be0_0; +v0x1ee8cd0_0 .net "invcarryout", 0 0, L_0x1f23ea0; 1 drivers +v0x1ee8d70_0 .net "orall", 0 0, L_0x1f23df0; 1 drivers +v0x1ee8e10_0 .net "orpairintermediate", 0 0, L_0x1f23b90; 1 drivers +v0x1ee8eb0_0 .net "orsingleintermediate", 0 0, L_0x1f23d90; 1 drivers +v0x1ee8fd0_0 .net "sum", 0 0, L_0x1f23260; 1 drivers +S_0x1ee4970 .scope module, "adder4" "FullAdder4bit" 7 241, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f284b0 .functor AND 1, L_0x1f28af0, L_0x1f28b90, C4<1>, C4<1>; +L_0x1f28c30 .functor NOR 1, L_0x1f28c90, L_0x1f28d30, C4<0>, C4<0>; +L_0x1f28eb0 .functor AND 1, L_0x1f28f10, L_0x1f29000, C4<1>, C4<1>; +L_0x1f28e20 .functor NOR 1, L_0x1f29190, L_0x1f29390, C4<0>, C4<0>; +L_0x1f290f0 .functor OR 1, L_0x1f284b0, L_0x1f28c30, C4<0>, C4<0>; +L_0x1f29580 .functor NOR 1, L_0x1f28eb0, L_0x1f28e20, C4<0>, C4<0>; +L_0x1f29680 .functor AND 1, L_0x1f290f0, L_0x1f29580, C4<1>, C4<1>; +v0x1ee7560_0 .net *"_s25", 0 0, L_0x1f28af0; 1 drivers +v0x1ee7620_0 .net *"_s27", 0 0, L_0x1f28b90; 1 drivers +v0x1ee76c0_0 .net *"_s29", 0 0, L_0x1f28c90; 1 drivers +v0x1ee7760_0 .net *"_s31", 0 0, L_0x1f28d30; 1 drivers +v0x1ee77e0_0 .net *"_s33", 0 0, L_0x1f28f10; 1 drivers +v0x1ee7880_0 .net *"_s35", 0 0, L_0x1f29000; 1 drivers +v0x1ee7920_0 .net *"_s37", 0 0, L_0x1f29190; 1 drivers +v0x1ee79c0_0 .net *"_s39", 0 0, L_0x1f29390; 1 drivers +v0x1ee7a60_0 .net "a", 3 0, L_0x1f29870; 1 drivers +v0x1ee7b00_0 .net "aandb", 0 0, L_0x1f284b0; 1 drivers +v0x1ee7ba0_0 .net "abandnoror", 0 0, L_0x1f290f0; 1 drivers +v0x1ee7c40_0 .net "anorb", 0 0, L_0x1f28c30; 1 drivers +v0x1ee7ce0_0 .net "b", 3 0, L_0x1f25590; 1 drivers +v0x1ee7d80_0 .net "bandsum", 0 0, L_0x1f28eb0; 1 drivers +v0x1ee7ea0_0 .net "bnorsum", 0 0, L_0x1f28e20; 1 drivers +v0x1ee7f40_0 .net "bsumandnornor", 0 0, L_0x1f29580; 1 drivers +v0x1ee7e00_0 .alias "carryin", 0 0, v0x1f00be0_0; +v0x1ee8070_0 .alias "carryout", 0 0, v0x1f01030_0; +v0x1ee7fc0_0 .net "carryout1", 0 0, L_0x1f25a70; 1 drivers +v0x1ee8190_0 .net "carryout2", 0 0, L_0x1f26590; 1 drivers +v0x1ee82c0_0 .net "carryout3", 0 0, L_0x1f272d0; 1 drivers +v0x1ee8340_0 .alias "overflow", 0 0, v0x1efdd90_0; +v0x1ee8210_0 .net8 "sum", 3 0, RS_0x7fdf8896b168; 4 drivers +L_0x1f26100 .part/pv L_0x1f26050, 0, 1, 4; +L_0x1f261f0 .part L_0x1f29870, 0, 1; +L_0x1f26290 .part L_0x1f25590, 0, 1; +L_0x1f26d50 .part/pv L_0x1f25ce0, 1, 1, 4; +L_0x1f26e90 .part L_0x1f29870, 1, 1; +L_0x1f26f80 .part L_0x1f25590, 1, 1; +L_0x1f27a90 .part/pv L_0x1f26800, 2, 1, 4; +L_0x1f27b80 .part L_0x1f29870, 2, 1; +L_0x1f27c70 .part L_0x1f25590, 2, 1; +L_0x1f286f0 .part/pv L_0x1f27540, 3, 1, 4; +L_0x1f28820 .part L_0x1f29870, 3, 1; +L_0x1f28950 .part L_0x1f25590, 3, 1; +L_0x1f28af0 .part L_0x1f29870, 3, 1; +L_0x1f28b90 .part L_0x1f25590, 3, 1; +L_0x1f28c90 .part L_0x1f29870, 3, 1; +L_0x1f28d30 .part L_0x1f25590, 3, 1; +L_0x1f28f10 .part L_0x1f25590, 3, 1; +L_0x1f29000 .part RS_0x7fdf8896b168, 3, 1; +L_0x1f29190 .part L_0x1f25590, 3, 1; +L_0x1f29390 .part RS_0x7fdf8896b168, 3, 1; +S_0x1ee6ad0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1ee4970; + .timescale 0 0; +L_0x1f214b0 .functor AND 1, L_0x1f261f0, L_0x1f26290, C4<1>, C4<1>; +L_0x1f21510 .functor AND 1, L_0x1f261f0, L_0x1f23c90, C4<1>, C4<1>; +L_0x1f25810 .functor AND 1, L_0x1f26290, L_0x1f23c90, C4<1>, C4<1>; +L_0x1f00fa0 .functor OR 1, L_0x1f214b0, L_0x1f21510, C4<0>, C4<0>; +L_0x1f25a70 .functor OR 1, L_0x1f00fa0, L_0x1f25810, C4<0>, C4<0>; +L_0x1f25b70 .functor OR 1, L_0x1f261f0, L_0x1f26290, C4<0>, C4<0>; +L_0x1f25bd0 .functor OR 1, L_0x1f25b70, L_0x1f23c90, C4<0>, C4<0>; +L_0x1f25c80 .functor NOT 1, L_0x1f25a70, C4<0>, C4<0>, C4<0>; +L_0x1f25d70 .functor AND 1, L_0x1f25c80, L_0x1f25bd0, C4<1>, C4<1>; +L_0x1f25e70 .functor AND 1, L_0x1f261f0, L_0x1f26290, C4<1>, C4<1>; +L_0x1f25ff0 .functor AND 1, L_0x1f25e70, L_0x1f23c90, C4<1>, C4<1>; +L_0x1f26050 .functor OR 1, L_0x1f25d70, L_0x1f25ff0, C4<0>, C4<0>; +v0x1ee6bc0_0 .net "a", 0 0, L_0x1f261f0; 1 drivers +v0x1ee6c80_0 .net "ab", 0 0, L_0x1f214b0; 1 drivers +v0x1ee6d20_0 .net "acarryin", 0 0, L_0x1f21510; 1 drivers +v0x1ee6dc0_0 .net "andall", 0 0, L_0x1f25ff0; 1 drivers +v0x1ee6e40_0 .net "andsingleintermediate", 0 0, L_0x1f25e70; 1 drivers +v0x1ee6ee0_0 .net "andsumintermediate", 0 0, L_0x1f25d70; 1 drivers +v0x1ee6f80_0 .net "b", 0 0, L_0x1f26290; 1 drivers +v0x1ee7020_0 .net "bcarryin", 0 0, L_0x1f25810; 1 drivers +v0x1ee70c0_0 .alias "carryin", 0 0, v0x1f00be0_0; +v0x1ee7160_0 .alias "carryout", 0 0, v0x1ee7fc0_0; +v0x1ee71e0_0 .net "invcarryout", 0 0, L_0x1f25c80; 1 drivers +v0x1ee7260_0 .net "orall", 0 0, L_0x1f25bd0; 1 drivers +v0x1ee7300_0 .net "orpairintermediate", 0 0, L_0x1f00fa0; 1 drivers +v0x1ee73a0_0 .net "orsingleintermediate", 0 0, L_0x1f25b70; 1 drivers +v0x1ee74c0_0 .net "sum", 0 0, L_0x1f26050; 1 drivers +S_0x1ee6040 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1ee4970; + .timescale 0 0; +L_0x1f21570 .functor AND 1, L_0x1f26e90, L_0x1f26f80, C4<1>, C4<1>; +L_0x1f26330 .functor AND 1, L_0x1f26e90, L_0x1f25a70, C4<1>, C4<1>; +L_0x1f263e0 .functor AND 1, L_0x1f26f80, L_0x1f25a70, C4<1>, C4<1>; +L_0x1f26490 .functor OR 1, L_0x1f21570, L_0x1f26330, C4<0>, C4<0>; +L_0x1f26590 .functor OR 1, L_0x1f26490, L_0x1f263e0, C4<0>, C4<0>; +L_0x1f26690 .functor OR 1, L_0x1f26e90, L_0x1f26f80, C4<0>, C4<0>; +L_0x1f266f0 .functor OR 1, L_0x1f26690, L_0x1f25a70, C4<0>, C4<0>; +L_0x1f267a0 .functor NOT 1, L_0x1f26590, C4<0>, C4<0>, C4<0>; +L_0x1f26890 .functor AND 1, L_0x1f267a0, L_0x1f266f0, C4<1>, C4<1>; +L_0x1f26990 .functor AND 1, L_0x1f26e90, L_0x1f26f80, C4<1>, C4<1>; +L_0x1f26b70 .functor AND 1, L_0x1f26990, L_0x1f25a70, C4<1>, C4<1>; +L_0x1f25ce0 .functor OR 1, L_0x1f26890, L_0x1f26b70, C4<0>, C4<0>; +v0x1ee6130_0 .net "a", 0 0, L_0x1f26e90; 1 drivers +v0x1ee61f0_0 .net "ab", 0 0, L_0x1f21570; 1 drivers +v0x1ee6290_0 .net "acarryin", 0 0, L_0x1f26330; 1 drivers +v0x1ee6330_0 .net "andall", 0 0, L_0x1f26b70; 1 drivers +v0x1ee63b0_0 .net "andsingleintermediate", 0 0, L_0x1f26990; 1 drivers +v0x1ee6450_0 .net "andsumintermediate", 0 0, L_0x1f26890; 1 drivers +v0x1ee64f0_0 .net "b", 0 0, L_0x1f26f80; 1 drivers +v0x1ee6590_0 .net "bcarryin", 0 0, L_0x1f263e0; 1 drivers +v0x1ee6630_0 .alias "carryin", 0 0, v0x1ee7fc0_0; +v0x1ee66d0_0 .alias "carryout", 0 0, v0x1ee8190_0; +v0x1ee6750_0 .net "invcarryout", 0 0, L_0x1f267a0; 1 drivers +v0x1ee67d0_0 .net "orall", 0 0, L_0x1f266f0; 1 drivers +v0x1ee6870_0 .net "orpairintermediate", 0 0, L_0x1f26490; 1 drivers +v0x1ee6910_0 .net "orsingleintermediate", 0 0, L_0x1f26690; 1 drivers +v0x1ee6a30_0 .net "sum", 0 0, L_0x1f25ce0; 1 drivers +S_0x1ee5560 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1ee4970; + .timescale 0 0; +L_0x1f26b10 .functor AND 1, L_0x1f27b80, L_0x1f27c70, C4<1>, C4<1>; +L_0x1f27070 .functor AND 1, L_0x1f27b80, L_0x1f26590, C4<1>, C4<1>; +L_0x1f27120 .functor AND 1, L_0x1f27c70, L_0x1f26590, C4<1>, C4<1>; +L_0x1f271d0 .functor OR 1, L_0x1f26b10, L_0x1f27070, C4<0>, C4<0>; +L_0x1f272d0 .functor OR 1, L_0x1f271d0, L_0x1f27120, C4<0>, C4<0>; +L_0x1f273d0 .functor OR 1, L_0x1f27b80, L_0x1f27c70, C4<0>, C4<0>; +L_0x1f27430 .functor OR 1, L_0x1f273d0, L_0x1f26590, C4<0>, C4<0>; +L_0x1f274e0 .functor NOT 1, L_0x1f272d0, C4<0>, C4<0>, C4<0>; +L_0x1f275d0 .functor AND 1, L_0x1f274e0, L_0x1f27430, C4<1>, C4<1>; +L_0x1f276d0 .functor AND 1, L_0x1f27b80, L_0x1f27c70, C4<1>, C4<1>; +L_0x1f278b0 .functor AND 1, L_0x1f276d0, L_0x1f26590, C4<1>, C4<1>; +L_0x1f26800 .functor OR 1, L_0x1f275d0, L_0x1f278b0, C4<0>, C4<0>; +v0x1ee5650_0 .net "a", 0 0, L_0x1f27b80; 1 drivers +v0x1ee5710_0 .net "ab", 0 0, L_0x1f26b10; 1 drivers +v0x1ee57b0_0 .net "acarryin", 0 0, L_0x1f27070; 1 drivers +v0x1ee5850_0 .net "andall", 0 0, L_0x1f278b0; 1 drivers +v0x1ee58d0_0 .net "andsingleintermediate", 0 0, L_0x1f276d0; 1 drivers +v0x1ee5970_0 .net "andsumintermediate", 0 0, L_0x1f275d0; 1 drivers +v0x1ee5a10_0 .net "b", 0 0, L_0x1f27c70; 1 drivers +v0x1ee5ab0_0 .net "bcarryin", 0 0, L_0x1f27120; 1 drivers +v0x1ee5ba0_0 .alias "carryin", 0 0, v0x1ee8190_0; +v0x1ee5c40_0 .alias "carryout", 0 0, v0x1ee82c0_0; +v0x1ee5cc0_0 .net "invcarryout", 0 0, L_0x1f274e0; 1 drivers +v0x1ee5d40_0 .net "orall", 0 0, L_0x1f27430; 1 drivers +v0x1ee5de0_0 .net "orpairintermediate", 0 0, L_0x1f271d0; 1 drivers +v0x1ee5e80_0 .net "orsingleintermediate", 0 0, L_0x1f273d0; 1 drivers +v0x1ee5fa0_0 .net "sum", 0 0, L_0x1f26800; 1 drivers +S_0x1ee4a60 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1ee4970; + .timescale 0 0; +L_0x1f27850 .functor AND 1, L_0x1f28820, L_0x1f28950, C4<1>, C4<1>; +L_0x1f27d10 .functor AND 1, L_0x1f28820, L_0x1f272d0, C4<1>, C4<1>; +L_0x1f27dc0 .functor AND 1, L_0x1f28950, L_0x1f272d0, C4<1>, C4<1>; +L_0x1f27e70 .functor OR 1, L_0x1f27850, L_0x1f27d10, C4<0>, C4<0>; +L_0x1f27f70 .functor OR 1, L_0x1f27e70, L_0x1f27dc0, C4<0>, C4<0>; +L_0x1f28070 .functor OR 1, L_0x1f28820, L_0x1f28950, C4<0>, C4<0>; +L_0x1f280d0 .functor OR 1, L_0x1f28070, L_0x1f272d0, C4<0>, C4<0>; +L_0x1f28180 .functor NOT 1, L_0x1f27f70, C4<0>, C4<0>, C4<0>; +L_0x1f28230 .functor AND 1, L_0x1f28180, L_0x1f280d0, C4<1>, C4<1>; +L_0x1f28330 .functor AND 1, L_0x1f28820, L_0x1f28950, C4<1>, C4<1>; +L_0x1f28510 .functor AND 1, L_0x1f28330, L_0x1f272d0, C4<1>, C4<1>; +L_0x1f27540 .functor OR 1, L_0x1f28230, L_0x1f28510, C4<0>, C4<0>; +v0x1ee4b50_0 .net "a", 0 0, L_0x1f28820; 1 drivers +v0x1ee4c10_0 .net "ab", 0 0, L_0x1f27850; 1 drivers +v0x1ee4cb0_0 .net "acarryin", 0 0, L_0x1f27d10; 1 drivers +v0x1ee4d50_0 .net "andall", 0 0, L_0x1f28510; 1 drivers +v0x1ee4dd0_0 .net "andsingleintermediate", 0 0, L_0x1f28330; 1 drivers +v0x1ee4e70_0 .net "andsumintermediate", 0 0, L_0x1f28230; 1 drivers +v0x1ee4f10_0 .net "b", 0 0, L_0x1f28950; 1 drivers +v0x1ee4fb0_0 .net "bcarryin", 0 0, L_0x1f27dc0; 1 drivers +v0x1ee50a0_0 .alias "carryin", 0 0, v0x1ee82c0_0; +v0x1ee5140_0 .alias "carryout", 0 0, v0x1f01030_0; +v0x1ee51c0_0 .net "invcarryout", 0 0, L_0x1f28180; 1 drivers +v0x1ee5260_0 .net "orall", 0 0, L_0x1f280d0; 1 drivers +v0x1ee5300_0 .net "orpairintermediate", 0 0, L_0x1f27e70; 1 drivers +v0x1ee53a0_0 .net "orsingleintermediate", 0 0, L_0x1f28070; 1 drivers +v0x1ee54c0_0 .net "sum", 0 0, L_0x1f27540; 1 drivers +S_0x1ee0e60 .scope module, "adder5" "FullAdder4bit" 7 242, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f2c7a0 .functor AND 1, L_0x1f2cde0, L_0x1f2ce80, C4<1>, C4<1>; +L_0x1f2cf20 .functor NOR 1, L_0x1f2cf80, L_0x1f2d020, C4<0>, C4<0>; +L_0x1f2d1a0 .functor AND 1, L_0x1f2d200, L_0x1f2d2f0, C4<1>, C4<1>; +L_0x1f2d110 .functor NOR 1, L_0x1f2d480, L_0x1f2d680, C4<0>, C4<0>; +L_0x1f2d3e0 .functor OR 1, L_0x1f2c7a0, L_0x1f2cf20, C4<0>, C4<0>; +L_0x1f2d870 .functor NOR 1, L_0x1f2d1a0, L_0x1f2d110, C4<0>, C4<0>; +L_0x1f2d970 .functor AND 1, L_0x1f2d3e0, L_0x1f2d870, C4<1>, C4<1>; +v0x1ee3a50_0 .net *"_s25", 0 0, L_0x1f2cde0; 1 drivers +v0x1ee3b10_0 .net *"_s27", 0 0, L_0x1f2ce80; 1 drivers +v0x1ee3bb0_0 .net *"_s29", 0 0, L_0x1f2cf80; 1 drivers +v0x1ee3c50_0 .net *"_s31", 0 0, L_0x1f2d020; 1 drivers +v0x1ee3cd0_0 .net *"_s33", 0 0, L_0x1f2d200; 1 drivers +v0x1ee3d70_0 .net *"_s35", 0 0, L_0x1f2d2f0; 1 drivers +v0x1ee3e10_0 .net *"_s37", 0 0, L_0x1f2d480; 1 drivers +v0x1ee3eb0_0 .net *"_s39", 0 0, L_0x1f2d680; 1 drivers +v0x1ee3f50_0 .net "a", 3 0, L_0x1f29910; 1 drivers +v0x1ee3ff0_0 .net "aandb", 0 0, L_0x1f2c7a0; 1 drivers +v0x1ee4090_0 .net "abandnoror", 0 0, L_0x1f2d3e0; 1 drivers +v0x1ee4130_0 .net "anorb", 0 0, L_0x1f2cf20; 1 drivers +v0x1ee41d0_0 .net "b", 3 0, L_0x1f299b0; 1 drivers +v0x1ee4270_0 .net "bandsum", 0 0, L_0x1f2d1a0; 1 drivers +v0x1ee4390_0 .net "bnorsum", 0 0, L_0x1f2d110; 1 drivers +v0x1ee4430_0 .net "bsumandnornor", 0 0, L_0x1f2d870; 1 drivers +v0x1ee42f0_0 .alias "carryin", 0 0, v0x1f01030_0; +v0x1ee4560_0 .alias "carryout", 0 0, v0x1f01140_0; +v0x1ee44b0_0 .net "carryout1", 0 0, L_0x1f29d50; 1 drivers +v0x1ee4680_0 .net "carryout2", 0 0, L_0x1f2a880; 1 drivers +v0x1ee47b0_0 .net "carryout3", 0 0, L_0x1f2b5c0; 1 drivers +v0x1ee4830_0 .alias "overflow", 0 0, v0x1efde10_0; +v0x1ee4700_0 .net8 "sum", 3 0, RS_0x7fdf8896a388; 4 drivers +L_0x1f2a3f0 .part/pv L_0x1f2a390, 0, 1, 4; +L_0x1f2a4e0 .part L_0x1f29910, 0, 1; +L_0x1f2a580 .part L_0x1f299b0, 0, 1; +L_0x1f2b040 .part/pv L_0x1f29fc0, 1, 1, 4; +L_0x1f2b180 .part L_0x1f29910, 1, 1; +L_0x1f2b270 .part L_0x1f299b0, 1, 1; +L_0x1f2bd80 .part/pv L_0x1f2aaf0, 2, 1, 4; +L_0x1f2be70 .part L_0x1f29910, 2, 1; +L_0x1f2bf60 .part L_0x1f299b0, 2, 1; +L_0x1f2c9e0 .part/pv L_0x1f2b830, 3, 1, 4; +L_0x1f2cb10 .part L_0x1f29910, 3, 1; +L_0x1f2cc40 .part L_0x1f299b0, 3, 1; +L_0x1f2cde0 .part L_0x1f29910, 3, 1; +L_0x1f2ce80 .part L_0x1f299b0, 3, 1; +L_0x1f2cf80 .part L_0x1f29910, 3, 1; +L_0x1f2d020 .part L_0x1f299b0, 3, 1; +L_0x1f2d200 .part L_0x1f299b0, 3, 1; +L_0x1f2d2f0 .part RS_0x7fdf8896a388, 3, 1; +L_0x1f2d480 .part L_0x1f299b0, 3, 1; +L_0x1f2d680 .part RS_0x7fdf8896a388, 3, 1; +S_0x1ee2fc0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1ee0e60; + .timescale 0 0; +L_0x1f25630 .functor AND 1, L_0x1f2a4e0, L_0x1f2a580, C4<1>, C4<1>; +L_0x1f25690 .functor AND 1, L_0x1f2a4e0, L_0x1f27f70, C4<1>, C4<1>; +L_0x1f25740 .functor AND 1, L_0x1f2a580, L_0x1f27f70, C4<1>, C4<1>; +L_0x1f010b0 .functor OR 1, L_0x1f25630, L_0x1f25690, C4<0>, C4<0>; +L_0x1f29d50 .functor OR 1, L_0x1f010b0, L_0x1f25740, C4<0>, C4<0>; +L_0x1f29e50 .functor OR 1, L_0x1f2a4e0, L_0x1f2a580, C4<0>, C4<0>; +L_0x1f29eb0 .functor OR 1, L_0x1f29e50, L_0x1f27f70, C4<0>, C4<0>; +L_0x1f29f60 .functor NOT 1, L_0x1f29d50, C4<0>, C4<0>, C4<0>; +L_0x1f2a050 .functor AND 1, L_0x1f29f60, L_0x1f29eb0, C4<1>, C4<1>; +L_0x1f2a150 .functor AND 1, L_0x1f2a4e0, L_0x1f2a580, C4<1>, C4<1>; +L_0x1f2a330 .functor AND 1, L_0x1f2a150, L_0x1f27f70, C4<1>, C4<1>; +L_0x1f2a390 .functor OR 1, L_0x1f2a050, L_0x1f2a330, C4<0>, C4<0>; +v0x1ee30b0_0 .net "a", 0 0, L_0x1f2a4e0; 1 drivers +v0x1ee3170_0 .net "ab", 0 0, L_0x1f25630; 1 drivers +v0x1ee3210_0 .net "acarryin", 0 0, L_0x1f25690; 1 drivers +v0x1ee32b0_0 .net "andall", 0 0, L_0x1f2a330; 1 drivers +v0x1ee3330_0 .net "andsingleintermediate", 0 0, L_0x1f2a150; 1 drivers +v0x1ee33d0_0 .net "andsumintermediate", 0 0, L_0x1f2a050; 1 drivers +v0x1ee3470_0 .net "b", 0 0, L_0x1f2a580; 1 drivers +v0x1ee3510_0 .net "bcarryin", 0 0, L_0x1f25740; 1 drivers +v0x1ee35b0_0 .alias "carryin", 0 0, v0x1f01030_0; +v0x1ee3650_0 .alias "carryout", 0 0, v0x1ee44b0_0; +v0x1ee36d0_0 .net "invcarryout", 0 0, L_0x1f29f60; 1 drivers +v0x1ee3750_0 .net "orall", 0 0, L_0x1f29eb0; 1 drivers +v0x1ee37f0_0 .net "orpairintermediate", 0 0, L_0x1f010b0; 1 drivers +v0x1ee3890_0 .net "orsingleintermediate", 0 0, L_0x1f29e50; 1 drivers +v0x1ee39b0_0 .net "sum", 0 0, L_0x1f2a390; 1 drivers +S_0x1ee2530 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1ee0e60; + .timescale 0 0; +L_0x1f2a2d0 .functor AND 1, L_0x1f2b180, L_0x1f2b270, C4<1>, C4<1>; +L_0x1f2a620 .functor AND 1, L_0x1f2b180, L_0x1f29d50, C4<1>, C4<1>; +L_0x1f2a6d0 .functor AND 1, L_0x1f2b270, L_0x1f29d50, C4<1>, C4<1>; +L_0x1f2a780 .functor OR 1, L_0x1f2a2d0, L_0x1f2a620, C4<0>, C4<0>; +L_0x1f2a880 .functor OR 1, L_0x1f2a780, L_0x1f2a6d0, C4<0>, C4<0>; +L_0x1f2a980 .functor OR 1, L_0x1f2b180, L_0x1f2b270, C4<0>, C4<0>; +L_0x1f2a9e0 .functor OR 1, L_0x1f2a980, L_0x1f29d50, C4<0>, C4<0>; +L_0x1f2aa90 .functor NOT 1, L_0x1f2a880, C4<0>, C4<0>, C4<0>; +L_0x1f2ab80 .functor AND 1, L_0x1f2aa90, L_0x1f2a9e0, C4<1>, C4<1>; +L_0x1f2ac80 .functor AND 1, L_0x1f2b180, L_0x1f2b270, C4<1>, C4<1>; +L_0x1f2ae60 .functor AND 1, L_0x1f2ac80, L_0x1f29d50, C4<1>, C4<1>; +L_0x1f29fc0 .functor OR 1, L_0x1f2ab80, L_0x1f2ae60, C4<0>, C4<0>; +v0x1ee2620_0 .net "a", 0 0, L_0x1f2b180; 1 drivers +v0x1ee26e0_0 .net "ab", 0 0, L_0x1f2a2d0; 1 drivers +v0x1ee2780_0 .net "acarryin", 0 0, L_0x1f2a620; 1 drivers +v0x1ee2820_0 .net "andall", 0 0, L_0x1f2ae60; 1 drivers +v0x1ee28a0_0 .net "andsingleintermediate", 0 0, L_0x1f2ac80; 1 drivers +v0x1ee2940_0 .net "andsumintermediate", 0 0, L_0x1f2ab80; 1 drivers +v0x1ee29e0_0 .net "b", 0 0, L_0x1f2b270; 1 drivers +v0x1ee2a80_0 .net "bcarryin", 0 0, L_0x1f2a6d0; 1 drivers +v0x1ee2b20_0 .alias "carryin", 0 0, v0x1ee44b0_0; +v0x1ee2bc0_0 .alias "carryout", 0 0, v0x1ee4680_0; +v0x1ee2c40_0 .net "invcarryout", 0 0, L_0x1f2aa90; 1 drivers +v0x1ee2cc0_0 .net "orall", 0 0, L_0x1f2a9e0; 1 drivers +v0x1ee2d60_0 .net "orpairintermediate", 0 0, L_0x1f2a780; 1 drivers +v0x1ee2e00_0 .net "orsingleintermediate", 0 0, L_0x1f2a980; 1 drivers +v0x1ee2f20_0 .net "sum", 0 0, L_0x1f29fc0; 1 drivers +S_0x1ee1a50 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1ee0e60; + .timescale 0 0; +L_0x1f2ae00 .functor AND 1, L_0x1f2be70, L_0x1f2bf60, C4<1>, C4<1>; +L_0x1f2b360 .functor AND 1, L_0x1f2be70, L_0x1f2a880, C4<1>, C4<1>; +L_0x1f2b410 .functor AND 1, L_0x1f2bf60, L_0x1f2a880, C4<1>, C4<1>; +L_0x1f2b4c0 .functor OR 1, L_0x1f2ae00, L_0x1f2b360, C4<0>, C4<0>; +L_0x1f2b5c0 .functor OR 1, L_0x1f2b4c0, L_0x1f2b410, C4<0>, C4<0>; +L_0x1f2b6c0 .functor OR 1, L_0x1f2be70, L_0x1f2bf60, C4<0>, C4<0>; +L_0x1f2b720 .functor OR 1, L_0x1f2b6c0, L_0x1f2a880, C4<0>, C4<0>; +L_0x1f2b7d0 .functor NOT 1, L_0x1f2b5c0, C4<0>, C4<0>, C4<0>; +L_0x1f2b8c0 .functor AND 1, L_0x1f2b7d0, L_0x1f2b720, C4<1>, C4<1>; +L_0x1f2b9c0 .functor AND 1, L_0x1f2be70, L_0x1f2bf60, C4<1>, C4<1>; +L_0x1f2bba0 .functor AND 1, L_0x1f2b9c0, L_0x1f2a880, C4<1>, C4<1>; +L_0x1f2aaf0 .functor OR 1, L_0x1f2b8c0, L_0x1f2bba0, C4<0>, C4<0>; +v0x1ee1b40_0 .net "a", 0 0, L_0x1f2be70; 1 drivers +v0x1ee1c00_0 .net "ab", 0 0, L_0x1f2ae00; 1 drivers +v0x1ee1ca0_0 .net "acarryin", 0 0, L_0x1f2b360; 1 drivers +v0x1ee1d40_0 .net "andall", 0 0, L_0x1f2bba0; 1 drivers +v0x1ee1dc0_0 .net "andsingleintermediate", 0 0, L_0x1f2b9c0; 1 drivers +v0x1ee1e60_0 .net "andsumintermediate", 0 0, L_0x1f2b8c0; 1 drivers +v0x1ee1f00_0 .net "b", 0 0, L_0x1f2bf60; 1 drivers +v0x1ee1fa0_0 .net "bcarryin", 0 0, L_0x1f2b410; 1 drivers +v0x1ee2090_0 .alias "carryin", 0 0, v0x1ee4680_0; +v0x1ee2130_0 .alias "carryout", 0 0, v0x1ee47b0_0; +v0x1ee21b0_0 .net "invcarryout", 0 0, L_0x1f2b7d0; 1 drivers +v0x1ee2230_0 .net "orall", 0 0, L_0x1f2b720; 1 drivers +v0x1ee22d0_0 .net "orpairintermediate", 0 0, L_0x1f2b4c0; 1 drivers +v0x1ee2370_0 .net "orsingleintermediate", 0 0, L_0x1f2b6c0; 1 drivers +v0x1ee2490_0 .net "sum", 0 0, L_0x1f2aaf0; 1 drivers +S_0x1ee0f50 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1ee0e60; + .timescale 0 0; +L_0x1f2bb40 .functor AND 1, L_0x1f2cb10, L_0x1f2cc40, C4<1>, C4<1>; +L_0x1f2c000 .functor AND 1, L_0x1f2cb10, L_0x1f2b5c0, C4<1>, C4<1>; +L_0x1f2c0b0 .functor AND 1, L_0x1f2cc40, L_0x1f2b5c0, C4<1>, C4<1>; +L_0x1f2c160 .functor OR 1, L_0x1f2bb40, L_0x1f2c000, C4<0>, C4<0>; +L_0x1f2c260 .functor OR 1, L_0x1f2c160, L_0x1f2c0b0, C4<0>, C4<0>; +L_0x1f2c360 .functor OR 1, L_0x1f2cb10, L_0x1f2cc40, C4<0>, C4<0>; +L_0x1f2c3c0 .functor OR 1, L_0x1f2c360, L_0x1f2b5c0, C4<0>, C4<0>; +L_0x1f2c470 .functor NOT 1, L_0x1f2c260, C4<0>, C4<0>, C4<0>; +L_0x1f2c520 .functor AND 1, L_0x1f2c470, L_0x1f2c3c0, C4<1>, C4<1>; +L_0x1f2c620 .functor AND 1, L_0x1f2cb10, L_0x1f2cc40, C4<1>, C4<1>; +L_0x1f2c800 .functor AND 1, L_0x1f2c620, L_0x1f2b5c0, C4<1>, C4<1>; +L_0x1f2b830 .functor OR 1, L_0x1f2c520, L_0x1f2c800, C4<0>, C4<0>; +v0x1ee1040_0 .net "a", 0 0, L_0x1f2cb10; 1 drivers +v0x1ee1100_0 .net "ab", 0 0, L_0x1f2bb40; 1 drivers +v0x1ee11a0_0 .net "acarryin", 0 0, L_0x1f2c000; 1 drivers +v0x1ee1240_0 .net "andall", 0 0, L_0x1f2c800; 1 drivers +v0x1ee12c0_0 .net "andsingleintermediate", 0 0, L_0x1f2c620; 1 drivers +v0x1ee1360_0 .net "andsumintermediate", 0 0, L_0x1f2c520; 1 drivers +v0x1ee1400_0 .net "b", 0 0, L_0x1f2cc40; 1 drivers +v0x1ee14a0_0 .net "bcarryin", 0 0, L_0x1f2c0b0; 1 drivers +v0x1ee1590_0 .alias "carryin", 0 0, v0x1ee47b0_0; +v0x1ee1630_0 .alias "carryout", 0 0, v0x1f01140_0; +v0x1ee16b0_0 .net "invcarryout", 0 0, L_0x1f2c470; 1 drivers +v0x1ee1750_0 .net "orall", 0 0, L_0x1f2c3c0; 1 drivers +v0x1ee17f0_0 .net "orpairintermediate", 0 0, L_0x1f2c160; 1 drivers +v0x1ee1890_0 .net "orsingleintermediate", 0 0, L_0x1f2c360; 1 drivers +v0x1ee19b0_0 .net "sum", 0 0, L_0x1f2b830; 1 drivers +S_0x1edd350 .scope module, "adder6" "FullAdder4bit" 7 243, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f30ac0 .functor AND 1, L_0x1f31100, L_0x1f311a0, C4<1>, C4<1>; +L_0x1f31240 .functor NOR 1, L_0x1f312a0, L_0x1f31340, C4<0>, C4<0>; +L_0x1f314c0 .functor AND 1, L_0x1f31520, L_0x1f31610, C4<1>, C4<1>; +L_0x1f31430 .functor NOR 1, L_0x1f317a0, L_0x1f319a0, C4<0>, C4<0>; +L_0x1f31700 .functor OR 1, L_0x1f30ac0, L_0x1f31240, C4<0>, C4<0>; +L_0x1f31b90 .functor NOR 1, L_0x1f314c0, L_0x1f31430, C4<0>, C4<0>; +L_0x1f31c90 .functor AND 1, L_0x1f31700, L_0x1f31b90, C4<1>, C4<1>; +v0x1edff40_0 .net *"_s25", 0 0, L_0x1f31100; 1 drivers +v0x1ee0000_0 .net *"_s27", 0 0, L_0x1f311a0; 1 drivers +v0x1ee00a0_0 .net *"_s29", 0 0, L_0x1f312a0; 1 drivers +v0x1ee0140_0 .net *"_s31", 0 0, L_0x1f31340; 1 drivers +v0x1ee01c0_0 .net *"_s33", 0 0, L_0x1f31520; 1 drivers +v0x1ee0260_0 .net *"_s35", 0 0, L_0x1f31610; 1 drivers +v0x1ee0300_0 .net *"_s37", 0 0, L_0x1f317a0; 1 drivers +v0x1ee03a0_0 .net *"_s39", 0 0, L_0x1f319a0; 1 drivers +v0x1ee0440_0 .net "a", 3 0, L_0x1f31f90; 1 drivers +v0x1ee04e0_0 .net "aandb", 0 0, L_0x1f30ac0; 1 drivers +v0x1ee0580_0 .net "abandnoror", 0 0, L_0x1f31700; 1 drivers +v0x1ee0620_0 .net "anorb", 0 0, L_0x1f31240; 1 drivers +v0x1ee06c0_0 .net "b", 3 0, L_0x1f02580; 1 drivers +v0x1ee0760_0 .net "bandsum", 0 0, L_0x1f314c0; 1 drivers +v0x1ee0880_0 .net "bnorsum", 0 0, L_0x1f31430; 1 drivers +v0x1ee0920_0 .net "bsumandnornor", 0 0, L_0x1f31b90; 1 drivers +v0x1ee07e0_0 .alias "carryin", 0 0, v0x1f01140_0; +v0x1ee0a50_0 .alias "carryout", 0 0, v0x1f00db0_0; +v0x1ee09a0_0 .net "carryout1", 0 0, L_0x1f2e070; 1 drivers +v0x1ee0b70_0 .net "carryout2", 0 0, L_0x1f2eba0; 1 drivers +v0x1ee0ca0_0 .net "carryout3", 0 0, L_0x1f2f8e0; 1 drivers +v0x1ee0d20_0 .alias "overflow", 0 0, v0x1efde90_0; +v0x1ee0bf0_0 .net8 "sum", 3 0, RS_0x7fdf889695a8; 4 drivers +L_0x1f2e710 .part/pv L_0x1f2e6b0, 0, 1, 4; +L_0x1f2e800 .part L_0x1f31f90, 0, 1; +L_0x1f2e8a0 .part L_0x1f02580, 0, 1; +L_0x1f2f360 .part/pv L_0x1f2e2e0, 1, 1, 4; +L_0x1f2f4a0 .part L_0x1f31f90, 1, 1; +L_0x1f2f590 .part L_0x1f02580, 1, 1; +L_0x1f300a0 .part/pv L_0x1f2ee10, 2, 1, 4; +L_0x1f30190 .part L_0x1f31f90, 2, 1; +L_0x1f30280 .part L_0x1f02580, 2, 1; +L_0x1f30d00 .part/pv L_0x1f2fb50, 3, 1, 4; +L_0x1f30e30 .part L_0x1f31f90, 3, 1; +L_0x1f30f60 .part L_0x1f02580, 3, 1; +L_0x1f31100 .part L_0x1f31f90, 3, 1; +L_0x1f311a0 .part L_0x1f02580, 3, 1; +L_0x1f312a0 .part L_0x1f31f90, 3, 1; +L_0x1f31340 .part L_0x1f02580, 3, 1; +L_0x1f31520 .part L_0x1f02580, 3, 1; +L_0x1f31610 .part RS_0x7fdf889695a8, 3, 1; +L_0x1f317a0 .part L_0x1f02580, 3, 1; +L_0x1f319a0 .part RS_0x7fdf889695a8, 3, 1; +S_0x1edf4b0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1edd350; + .timescale 0 0; +L_0x1f29a50 .functor AND 1, L_0x1f2e800, L_0x1f2e8a0, C4<1>, C4<1>; +L_0x1f29ab0 .functor AND 1, L_0x1f2e800, L_0x1f2c260, C4<1>, C4<1>; +L_0x1f2de10 .functor AND 1, L_0x1f2e8a0, L_0x1f2c260, C4<1>, C4<1>; +L_0x1f00d20 .functor OR 1, L_0x1f29a50, L_0x1f29ab0, C4<0>, C4<0>; +L_0x1f2e070 .functor OR 1, L_0x1f00d20, L_0x1f2de10, C4<0>, C4<0>; +L_0x1f2e170 .functor OR 1, L_0x1f2e800, L_0x1f2e8a0, C4<0>, C4<0>; +L_0x1f2e1d0 .functor OR 1, L_0x1f2e170, L_0x1f2c260, C4<0>, C4<0>; +L_0x1f2e280 .functor NOT 1, L_0x1f2e070, C4<0>, C4<0>, C4<0>; +L_0x1f2e370 .functor AND 1, L_0x1f2e280, L_0x1f2e1d0, C4<1>, C4<1>; +L_0x1f2e470 .functor AND 1, L_0x1f2e800, L_0x1f2e8a0, C4<1>, C4<1>; +L_0x1f2e650 .functor AND 1, L_0x1f2e470, L_0x1f2c260, C4<1>, C4<1>; +L_0x1f2e6b0 .functor OR 1, L_0x1f2e370, L_0x1f2e650, C4<0>, C4<0>; +v0x1edf5a0_0 .net "a", 0 0, L_0x1f2e800; 1 drivers +v0x1edf660_0 .net "ab", 0 0, L_0x1f29a50; 1 drivers +v0x1edf700_0 .net "acarryin", 0 0, L_0x1f29ab0; 1 drivers +v0x1edf7a0_0 .net "andall", 0 0, L_0x1f2e650; 1 drivers +v0x1edf820_0 .net "andsingleintermediate", 0 0, L_0x1f2e470; 1 drivers +v0x1edf8c0_0 .net "andsumintermediate", 0 0, L_0x1f2e370; 1 drivers +v0x1edf960_0 .net "b", 0 0, L_0x1f2e8a0; 1 drivers +v0x1edfa00_0 .net "bcarryin", 0 0, L_0x1f2de10; 1 drivers +v0x1edfaa0_0 .alias "carryin", 0 0, v0x1f01140_0; +v0x1edfb40_0 .alias "carryout", 0 0, v0x1ee09a0_0; +v0x1edfbc0_0 .net "invcarryout", 0 0, L_0x1f2e280; 1 drivers +v0x1edfc40_0 .net "orall", 0 0, L_0x1f2e1d0; 1 drivers +v0x1edfce0_0 .net "orpairintermediate", 0 0, L_0x1f00d20; 1 drivers +v0x1edfd80_0 .net "orsingleintermediate", 0 0, L_0x1f2e170; 1 drivers +v0x1edfea0_0 .net "sum", 0 0, L_0x1f2e6b0; 1 drivers +S_0x1edea20 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1edd350; + .timescale 0 0; +L_0x1f2e5f0 .functor AND 1, L_0x1f2f4a0, L_0x1f2f590, C4<1>, C4<1>; +L_0x1f2e940 .functor AND 1, L_0x1f2f4a0, L_0x1f2e070, C4<1>, C4<1>; +L_0x1f2e9f0 .functor AND 1, L_0x1f2f590, L_0x1f2e070, C4<1>, C4<1>; +L_0x1f2eaa0 .functor OR 1, L_0x1f2e5f0, L_0x1f2e940, C4<0>, C4<0>; +L_0x1f2eba0 .functor OR 1, L_0x1f2eaa0, L_0x1f2e9f0, C4<0>, C4<0>; +L_0x1f2eca0 .functor OR 1, L_0x1f2f4a0, L_0x1f2f590, C4<0>, C4<0>; +L_0x1f2ed00 .functor OR 1, L_0x1f2eca0, L_0x1f2e070, C4<0>, C4<0>; +L_0x1f2edb0 .functor NOT 1, L_0x1f2eba0, C4<0>, C4<0>, C4<0>; +L_0x1f2eea0 .functor AND 1, L_0x1f2edb0, L_0x1f2ed00, C4<1>, C4<1>; +L_0x1f2efa0 .functor AND 1, L_0x1f2f4a0, L_0x1f2f590, C4<1>, C4<1>; +L_0x1f2f180 .functor AND 1, L_0x1f2efa0, L_0x1f2e070, C4<1>, C4<1>; +L_0x1f2e2e0 .functor OR 1, L_0x1f2eea0, L_0x1f2f180, C4<0>, C4<0>; +v0x1edeb10_0 .net "a", 0 0, L_0x1f2f4a0; 1 drivers +v0x1edebd0_0 .net "ab", 0 0, L_0x1f2e5f0; 1 drivers +v0x1edec70_0 .net "acarryin", 0 0, L_0x1f2e940; 1 drivers +v0x1eded10_0 .net "andall", 0 0, L_0x1f2f180; 1 drivers +v0x1eded90_0 .net "andsingleintermediate", 0 0, L_0x1f2efa0; 1 drivers +v0x1edee30_0 .net "andsumintermediate", 0 0, L_0x1f2eea0; 1 drivers +v0x1edeed0_0 .net "b", 0 0, L_0x1f2f590; 1 drivers +v0x1edef70_0 .net "bcarryin", 0 0, L_0x1f2e9f0; 1 drivers +v0x1edf010_0 .alias "carryin", 0 0, v0x1ee09a0_0; +v0x1edf0b0_0 .alias "carryout", 0 0, v0x1ee0b70_0; +v0x1edf130_0 .net "invcarryout", 0 0, L_0x1f2edb0; 1 drivers +v0x1edf1b0_0 .net "orall", 0 0, L_0x1f2ed00; 1 drivers +v0x1edf250_0 .net "orpairintermediate", 0 0, L_0x1f2eaa0; 1 drivers +v0x1edf2f0_0 .net "orsingleintermediate", 0 0, L_0x1f2eca0; 1 drivers +v0x1edf410_0 .net "sum", 0 0, L_0x1f2e2e0; 1 drivers +S_0x1eddf40 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1edd350; + .timescale 0 0; +L_0x1f2f120 .functor AND 1, L_0x1f30190, L_0x1f30280, C4<1>, C4<1>; +L_0x1f2f680 .functor AND 1, L_0x1f30190, L_0x1f2eba0, C4<1>, C4<1>; +L_0x1f2f730 .functor AND 1, L_0x1f30280, L_0x1f2eba0, C4<1>, C4<1>; +L_0x1f2f7e0 .functor OR 1, L_0x1f2f120, L_0x1f2f680, C4<0>, C4<0>; +L_0x1f2f8e0 .functor OR 1, L_0x1f2f7e0, L_0x1f2f730, C4<0>, C4<0>; +L_0x1f2f9e0 .functor OR 1, L_0x1f30190, L_0x1f30280, C4<0>, C4<0>; +L_0x1f2fa40 .functor OR 1, L_0x1f2f9e0, L_0x1f2eba0, C4<0>, C4<0>; +L_0x1f2faf0 .functor NOT 1, L_0x1f2f8e0, C4<0>, C4<0>, C4<0>; +L_0x1f2fbe0 .functor AND 1, L_0x1f2faf0, L_0x1f2fa40, C4<1>, C4<1>; +L_0x1f2fce0 .functor AND 1, L_0x1f30190, L_0x1f30280, C4<1>, C4<1>; +L_0x1f2fec0 .functor AND 1, L_0x1f2fce0, L_0x1f2eba0, C4<1>, C4<1>; +L_0x1f2ee10 .functor OR 1, L_0x1f2fbe0, L_0x1f2fec0, C4<0>, C4<0>; +v0x1ede030_0 .net "a", 0 0, L_0x1f30190; 1 drivers +v0x1ede0f0_0 .net "ab", 0 0, L_0x1f2f120; 1 drivers +v0x1ede190_0 .net "acarryin", 0 0, L_0x1f2f680; 1 drivers +v0x1ede230_0 .net "andall", 0 0, L_0x1f2fec0; 1 drivers +v0x1ede2b0_0 .net "andsingleintermediate", 0 0, L_0x1f2fce0; 1 drivers +v0x1ede350_0 .net "andsumintermediate", 0 0, L_0x1f2fbe0; 1 drivers +v0x1ede3f0_0 .net "b", 0 0, L_0x1f30280; 1 drivers +v0x1ede490_0 .net "bcarryin", 0 0, L_0x1f2f730; 1 drivers +v0x1ede580_0 .alias "carryin", 0 0, v0x1ee0b70_0; +v0x1ede620_0 .alias "carryout", 0 0, v0x1ee0ca0_0; +v0x1ede6a0_0 .net "invcarryout", 0 0, L_0x1f2faf0; 1 drivers +v0x1ede720_0 .net "orall", 0 0, L_0x1f2fa40; 1 drivers +v0x1ede7c0_0 .net "orpairintermediate", 0 0, L_0x1f2f7e0; 1 drivers +v0x1ede860_0 .net "orsingleintermediate", 0 0, L_0x1f2f9e0; 1 drivers +v0x1ede980_0 .net "sum", 0 0, L_0x1f2ee10; 1 drivers +S_0x1edd440 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1edd350; + .timescale 0 0; +L_0x1f2fe60 .functor AND 1, L_0x1f30e30, L_0x1f30f60, C4<1>, C4<1>; +L_0x1f30320 .functor AND 1, L_0x1f30e30, L_0x1f2f8e0, C4<1>, C4<1>; +L_0x1f303d0 .functor AND 1, L_0x1f30f60, L_0x1f2f8e0, C4<1>, C4<1>; +L_0x1f30480 .functor OR 1, L_0x1f2fe60, L_0x1f30320, C4<0>, C4<0>; +L_0x1f30580 .functor OR 1, L_0x1f30480, L_0x1f303d0, C4<0>, C4<0>; +L_0x1f30680 .functor OR 1, L_0x1f30e30, L_0x1f30f60, C4<0>, C4<0>; +L_0x1f306e0 .functor OR 1, L_0x1f30680, L_0x1f2f8e0, C4<0>, C4<0>; +L_0x1f30790 .functor NOT 1, L_0x1f30580, C4<0>, C4<0>, C4<0>; +L_0x1f30840 .functor AND 1, L_0x1f30790, L_0x1f306e0, C4<1>, C4<1>; +L_0x1f30940 .functor AND 1, L_0x1f30e30, L_0x1f30f60, C4<1>, C4<1>; +L_0x1f30b20 .functor AND 1, L_0x1f30940, L_0x1f2f8e0, C4<1>, C4<1>; +L_0x1f2fb50 .functor OR 1, L_0x1f30840, L_0x1f30b20, C4<0>, C4<0>; +v0x1edd530_0 .net "a", 0 0, L_0x1f30e30; 1 drivers +v0x1edd5d0_0 .net "ab", 0 0, L_0x1f2fe60; 1 drivers +v0x1edd670_0 .net "acarryin", 0 0, L_0x1f30320; 1 drivers +v0x1edd710_0 .net "andall", 0 0, L_0x1f30b20; 1 drivers +v0x1edd7b0_0 .net "andsingleintermediate", 0 0, L_0x1f30940; 1 drivers +v0x1edd850_0 .net "andsumintermediate", 0 0, L_0x1f30840; 1 drivers +v0x1edd8f0_0 .net "b", 0 0, L_0x1f30f60; 1 drivers +v0x1edd990_0 .net "bcarryin", 0 0, L_0x1f303d0; 1 drivers +v0x1edda80_0 .alias "carryin", 0 0, v0x1ee0ca0_0; +v0x1eddb20_0 .alias "carryout", 0 0, v0x1f00db0_0; +v0x1eddba0_0 .net "invcarryout", 0 0, L_0x1f30790; 1 drivers +v0x1eddc40_0 .net "orall", 0 0, L_0x1f306e0; 1 drivers +v0x1eddce0_0 .net "orpairintermediate", 0 0, L_0x1f30480; 1 drivers +v0x1eddd80_0 .net "orsingleintermediate", 0 0, L_0x1f30680; 1 drivers +v0x1eddea0_0 .net "sum", 0 0, L_0x1f2fb50; 1 drivers +S_0x1ed98c0 .scope module, "adder7" "FullAdder4bit" 7 244, 3 47, S_0x1ed97d0; + .timescale 0 0; +L_0x1f34f90 .functor AND 1, L_0x1f355d0, L_0x1f35670, C4<1>, C4<1>; +L_0x1f35710 .functor NOR 1, L_0x1f35770, L_0x1f35810, C4<0>, C4<0>; +L_0x1f35990 .functor AND 1, L_0x1f359f0, L_0x1f35ae0, C4<1>, C4<1>; +L_0x1f35900 .functor NOR 1, L_0x1f35c70, L_0x1f35e70, C4<0>, C4<0>; +L_0x1f35bd0 .functor OR 1, L_0x1f34f90, L_0x1f35710, C4<0>, C4<0>; +L_0x1f17e70 .functor NOR 1, L_0x1f35990, L_0x1f35900, C4<0>, C4<0>; +L_0x1f35fc0 .functor AND 1, L_0x1f35bd0, L_0x1f17e70, C4<1>, C4<1>; +v0x1edc430_0 .net *"_s25", 0 0, L_0x1f355d0; 1 drivers +v0x1edc4f0_0 .net *"_s27", 0 0, L_0x1f35670; 1 drivers +v0x1edc590_0 .net *"_s29", 0 0, L_0x1f35770; 1 drivers +v0x1edc630_0 .net *"_s31", 0 0, L_0x1f35810; 1 drivers +v0x1edc6b0_0 .net *"_s33", 0 0, L_0x1f359f0; 1 drivers +v0x1edc750_0 .net *"_s35", 0 0, L_0x1f35ae0; 1 drivers +v0x1edc7f0_0 .net *"_s37", 0 0, L_0x1f35c70; 1 drivers +v0x1edc890_0 .net *"_s39", 0 0, L_0x1f35e70; 1 drivers +v0x1edc930_0 .net "a", 3 0, L_0x1f32240; 1 drivers +v0x1edc9d0_0 .net "aandb", 0 0, L_0x1f34f90; 1 drivers +v0x1edca70_0 .net "abandnoror", 0 0, L_0x1f35bd0; 1 drivers +v0x1edcb10_0 .net "anorb", 0 0, L_0x1f35710; 1 drivers +v0x1edcbb0_0 .net "b", 3 0, L_0x1f322e0; 1 drivers +v0x1edcc50_0 .net "bandsum", 0 0, L_0x1f35990; 1 drivers +v0x1edcd70_0 .net "bnorsum", 0 0, L_0x1f35900; 1 drivers +v0x1edce10_0 .net "bsumandnornor", 0 0, L_0x1f17e70; 1 drivers +v0x1edccd0_0 .alias "carryin", 0 0, v0x1f00db0_0; +v0x1edcf40_0 .alias "carryout", 0 0, v0x1f01820_0; +v0x1edce90_0 .net "carryout1", 0 0, L_0x1f32500; 1 drivers +v0x1edd060_0 .net "carryout2", 0 0, L_0x1f33030; 1 drivers +v0x1edd190_0 .net "carryout3", 0 0, L_0x1f33d70; 1 drivers +v0x1edd210_0 .alias "overflow", 0 0, v0x1f018a0_0; +v0x1edd0e0_0 .net8 "sum", 3 0, RS_0x7fdf889687c8; 4 drivers +L_0x1f32ba0 .part/pv L_0x1f32b40, 0, 1, 4; +L_0x1f32c90 .part L_0x1f32240, 0, 1; +L_0x1f32d30 .part L_0x1f322e0, 0, 1; +L_0x1f337f0 .part/pv L_0x1f32770, 1, 1, 4; +L_0x1f33930 .part L_0x1f32240, 1, 1; +L_0x1f33a20 .part L_0x1f322e0, 1, 1; +L_0x1f34530 .part/pv L_0x1f332a0, 2, 1, 4; +L_0x1f34620 .part L_0x1f32240, 2, 1; +L_0x1f34710 .part L_0x1f322e0, 2, 1; +L_0x1f351d0 .part/pv L_0x1f33fe0, 3, 1, 4; +L_0x1f35300 .part L_0x1f32240, 3, 1; +L_0x1f35430 .part L_0x1f322e0, 3, 1; +L_0x1f355d0 .part L_0x1f32240, 3, 1; +L_0x1f35670 .part L_0x1f322e0, 3, 1; +L_0x1f35770 .part L_0x1f32240, 3, 1; +L_0x1f35810 .part L_0x1f322e0, 3, 1; +L_0x1f359f0 .part L_0x1f322e0, 3, 1; +L_0x1f35ae0 .part RS_0x7fdf889687c8, 3, 1; +L_0x1f35c70 .part L_0x1f322e0, 3, 1; +L_0x1f35e70 .part RS_0x7fdf889687c8, 3, 1; +S_0x1edb9a0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x1ed98c0; + .timescale 0 0; +L_0x1f02620 .functor AND 1, L_0x1f32c90, L_0x1f32d30, C4<1>, C4<1>; +L_0x1f21240 .functor AND 1, L_0x1f32c90, L_0x1f30580, C4<1>, C4<1>; +L_0x1f2dbb0 .functor AND 1, L_0x1f32d30, L_0x1f30580, C4<1>, C4<1>; +L_0x1f00e30 .functor OR 1, L_0x1f02620, L_0x1f21240, C4<0>, C4<0>; +L_0x1f32500 .functor OR 1, L_0x1f00e30, L_0x1f2dbb0, C4<0>, C4<0>; +L_0x1f32600 .functor OR 1, L_0x1f32c90, L_0x1f32d30, C4<0>, C4<0>; +L_0x1f32660 .functor OR 1, L_0x1f32600, L_0x1f30580, C4<0>, C4<0>; +L_0x1f32710 .functor NOT 1, L_0x1f32500, C4<0>, C4<0>, C4<0>; +L_0x1f32800 .functor AND 1, L_0x1f32710, L_0x1f32660, C4<1>, C4<1>; +L_0x1f32900 .functor AND 1, L_0x1f32c90, L_0x1f32d30, C4<1>, C4<1>; +L_0x1f32ae0 .functor AND 1, L_0x1f32900, L_0x1f30580, C4<1>, C4<1>; +L_0x1f32b40 .functor OR 1, L_0x1f32800, L_0x1f32ae0, C4<0>, C4<0>; +v0x1edba90_0 .net "a", 0 0, L_0x1f32c90; 1 drivers +v0x1edbb50_0 .net "ab", 0 0, L_0x1f02620; 1 drivers +v0x1edbbf0_0 .net "acarryin", 0 0, L_0x1f21240; 1 drivers +v0x1edbc90_0 .net "andall", 0 0, L_0x1f32ae0; 1 drivers +v0x1edbd10_0 .net "andsingleintermediate", 0 0, L_0x1f32900; 1 drivers +v0x1edbdb0_0 .net "andsumintermediate", 0 0, L_0x1f32800; 1 drivers +v0x1edbe50_0 .net "b", 0 0, L_0x1f32d30; 1 drivers +v0x1edbef0_0 .net "bcarryin", 0 0, L_0x1f2dbb0; 1 drivers +v0x1edbf90_0 .alias "carryin", 0 0, v0x1f00db0_0; +v0x1edc030_0 .alias "carryout", 0 0, v0x1edce90_0; +v0x1edc0b0_0 .net "invcarryout", 0 0, L_0x1f32710; 1 drivers +v0x1edc130_0 .net "orall", 0 0, L_0x1f32660; 1 drivers +v0x1edc1d0_0 .net "orpairintermediate", 0 0, L_0x1f00e30; 1 drivers +v0x1edc270_0 .net "orsingleintermediate", 0 0, L_0x1f32600; 1 drivers +v0x1edc390_0 .net "sum", 0 0, L_0x1f32b40; 1 drivers +S_0x1edaf10 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x1ed98c0; + .timescale 0 0; +L_0x1f32a80 .functor AND 1, L_0x1f33930, L_0x1f33a20, C4<1>, C4<1>; +L_0x1f32dd0 .functor AND 1, L_0x1f33930, L_0x1f32500, C4<1>, C4<1>; +L_0x1f32e80 .functor AND 1, L_0x1f33a20, L_0x1f32500, C4<1>, C4<1>; +L_0x1f32f30 .functor OR 1, L_0x1f32a80, L_0x1f32dd0, C4<0>, C4<0>; +L_0x1f33030 .functor OR 1, L_0x1f32f30, L_0x1f32e80, C4<0>, C4<0>; +L_0x1f33130 .functor OR 1, L_0x1f33930, L_0x1f33a20, C4<0>, C4<0>; +L_0x1f33190 .functor OR 1, L_0x1f33130, L_0x1f32500, C4<0>, C4<0>; +L_0x1f33240 .functor NOT 1, L_0x1f33030, C4<0>, C4<0>, C4<0>; +L_0x1f33330 .functor AND 1, L_0x1f33240, L_0x1f33190, C4<1>, C4<1>; +L_0x1f33430 .functor AND 1, L_0x1f33930, L_0x1f33a20, C4<1>, C4<1>; +L_0x1f33610 .functor AND 1, L_0x1f33430, L_0x1f32500, C4<1>, C4<1>; +L_0x1f32770 .functor OR 1, L_0x1f33330, L_0x1f33610, C4<0>, C4<0>; +v0x1edb000_0 .net "a", 0 0, L_0x1f33930; 1 drivers +v0x1edb0c0_0 .net "ab", 0 0, L_0x1f32a80; 1 drivers +v0x1edb160_0 .net "acarryin", 0 0, L_0x1f32dd0; 1 drivers +v0x1edb200_0 .net "andall", 0 0, L_0x1f33610; 1 drivers +v0x1edb280_0 .net "andsingleintermediate", 0 0, L_0x1f33430; 1 drivers +v0x1edb320_0 .net "andsumintermediate", 0 0, L_0x1f33330; 1 drivers +v0x1edb3c0_0 .net "b", 0 0, L_0x1f33a20; 1 drivers +v0x1edb460_0 .net "bcarryin", 0 0, L_0x1f32e80; 1 drivers +v0x1edb500_0 .alias "carryin", 0 0, v0x1edce90_0; +v0x1edb5a0_0 .alias "carryout", 0 0, v0x1edd060_0; +v0x1edb620_0 .net "invcarryout", 0 0, L_0x1f33240; 1 drivers +v0x1edb6a0_0 .net "orall", 0 0, L_0x1f33190; 1 drivers +v0x1edb740_0 .net "orpairintermediate", 0 0, L_0x1f32f30; 1 drivers +v0x1edb7e0_0 .net "orsingleintermediate", 0 0, L_0x1f33130; 1 drivers +v0x1edb900_0 .net "sum", 0 0, L_0x1f32770; 1 drivers +S_0x1eda480 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x1ed98c0; + .timescale 0 0; +L_0x1f335b0 .functor AND 1, L_0x1f34620, L_0x1f34710, C4<1>, C4<1>; +L_0x1f33b10 .functor AND 1, L_0x1f34620, L_0x1f33030, C4<1>, C4<1>; +L_0x1f33bc0 .functor AND 1, L_0x1f34710, L_0x1f33030, C4<1>, C4<1>; +L_0x1f33c70 .functor OR 1, L_0x1f335b0, L_0x1f33b10, C4<0>, C4<0>; +L_0x1f33d70 .functor OR 1, L_0x1f33c70, L_0x1f33bc0, C4<0>, C4<0>; +L_0x1f33e70 .functor OR 1, L_0x1f34620, L_0x1f34710, C4<0>, C4<0>; +L_0x1f33ed0 .functor OR 1, L_0x1f33e70, L_0x1f33030, C4<0>, C4<0>; +L_0x1f33f80 .functor NOT 1, L_0x1f33d70, C4<0>, C4<0>, C4<0>; +L_0x1f34070 .functor AND 1, L_0x1f33f80, L_0x1f33ed0, C4<1>, C4<1>; +L_0x1f34170 .functor AND 1, L_0x1f34620, L_0x1f34710, C4<1>, C4<1>; +L_0x1f34350 .functor AND 1, L_0x1f34170, L_0x1f33030, C4<1>, C4<1>; +L_0x1f332a0 .functor OR 1, L_0x1f34070, L_0x1f34350, C4<0>, C4<0>; +v0x1eda570_0 .net "a", 0 0, L_0x1f34620; 1 drivers +v0x1eda630_0 .net "ab", 0 0, L_0x1f335b0; 1 drivers +v0x1eda6d0_0 .net "acarryin", 0 0, L_0x1f33b10; 1 drivers +v0x1eda770_0 .net "andall", 0 0, L_0x1f34350; 1 drivers +v0x1eda7f0_0 .net "andsingleintermediate", 0 0, L_0x1f34170; 1 drivers +v0x1eda890_0 .net "andsumintermediate", 0 0, L_0x1f34070; 1 drivers +v0x1eda930_0 .net "b", 0 0, L_0x1f34710; 1 drivers +v0x1eda9d0_0 .net "bcarryin", 0 0, L_0x1f33bc0; 1 drivers +v0x1edaa70_0 .alias "carryin", 0 0, v0x1edd060_0; +v0x1edab10_0 .alias "carryout", 0 0, v0x1edd190_0; +v0x1edab90_0 .net "invcarryout", 0 0, L_0x1f33f80; 1 drivers +v0x1edac10_0 .net "orall", 0 0, L_0x1f33ed0; 1 drivers +v0x1edacb0_0 .net "orpairintermediate", 0 0, L_0x1f33c70; 1 drivers +v0x1edad50_0 .net "orsingleintermediate", 0 0, L_0x1f33e70; 1 drivers +v0x1edae70_0 .net "sum", 0 0, L_0x1f332a0; 1 drivers +S_0x1ed99b0 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x1ed98c0; + .timescale 0 0; +L_0x1f342f0 .functor AND 1, L_0x1f35300, L_0x1f35430, C4<1>, C4<1>; +L_0x1f347b0 .functor AND 1, L_0x1f35300, L_0x1f33d70, C4<1>, C4<1>; +L_0x1f34860 .functor AND 1, L_0x1f35430, L_0x1f33d70, C4<1>, C4<1>; +L_0x1f34910 .functor OR 1, L_0x1f342f0, L_0x1f347b0, C4<0>, C4<0>; +L_0x1f34a10 .functor OR 1, L_0x1f34910, L_0x1f34860, C4<0>, C4<0>; +L_0x1f34b50 .functor OR 1, L_0x1f35300, L_0x1f35430, C4<0>, C4<0>; +L_0x1f34bb0 .functor OR 1, L_0x1f34b50, L_0x1f33d70, C4<0>, C4<0>; +L_0x1f34c60 .functor NOT 1, L_0x1f34a10, C4<0>, C4<0>, C4<0>; +L_0x1f34d10 .functor AND 1, L_0x1f34c60, L_0x1f34bb0, C4<1>, C4<1>; +L_0x1f34e10 .functor AND 1, L_0x1f35300, L_0x1f35430, C4<1>, C4<1>; +L_0x1f34ff0 .functor AND 1, L_0x1f34e10, L_0x1f33d70, C4<1>, C4<1>; +L_0x1f33fe0 .functor OR 1, L_0x1f34d10, L_0x1f34ff0, C4<0>, C4<0>; +v0x1ed9aa0_0 .net "a", 0 0, L_0x1f35300; 1 drivers +v0x1ed9b60_0 .net "ab", 0 0, L_0x1f342f0; 1 drivers +v0x1ed9c00_0 .net "acarryin", 0 0, L_0x1f347b0; 1 drivers +v0x1ed9ca0_0 .net "andall", 0 0, L_0x1f34ff0; 1 drivers +v0x1ed9d20_0 .net "andsingleintermediate", 0 0, L_0x1f34e10; 1 drivers +v0x1ed9dc0_0 .net "andsumintermediate", 0 0, L_0x1f34d10; 1 drivers +v0x1ed9e60_0 .net "b", 0 0, L_0x1f35430; 1 drivers +v0x1ed9f00_0 .net "bcarryin", 0 0, L_0x1f34860; 1 drivers +v0x1ed9fa0_0 .alias "carryin", 0 0, v0x1edd190_0; +v0x1eda040_0 .alias "carryout", 0 0, v0x1f01820_0; +v0x1eda0e0_0 .net "invcarryout", 0 0, L_0x1f34c60; 1 drivers +v0x1eda180_0 .net "orall", 0 0, L_0x1f34bb0; 1 drivers +v0x1eda220_0 .net "orpairintermediate", 0 0, L_0x1f34910; 1 drivers +v0x1eda2c0_0 .net "orsingleintermediate", 0 0, L_0x1f34b50; 1 drivers +v0x1eda3e0_0 .net "sum", 0 0, L_0x1f33fe0; 1 drivers +S_0x1ed5640 .scope module, "xor0" "xor_32bit" 6 35, 8 1, S_0x1eb65d0; + .timescale 0 0; +L_0x1f32470 .functor XOR 1, L_0x1f36440, L_0x1f36530, C4<0>, C4<0>; +L_0x1f366c0 .functor XOR 1, L_0x1f36770, L_0x1f36860, C4<0>, C4<0>; +L_0x1f36a80 .functor XOR 1, L_0x1f36ae0, L_0x1f36c20, C4<0>, C4<0>; +L_0x1f36e10 .functor XOR 1, L_0x1f36e70, L_0x1f36f60, C4<0>, C4<0>; +L_0x1f36db0 .functor XOR 1, L_0x1f371b0, L_0x1f37320, C4<0>, C4<0>; +L_0x1f37540 .functor XOR 1, L_0x1f375f0, L_0x1f376e0, C4<0>, C4<0>; +L_0x1f374b0 .functor XOR 1, L_0x1f37a20, L_0x1f377d0, C4<0>, C4<0>; +L_0x1f37b10 .functor XOR 1, L_0x1f37dc0, L_0x1f37eb0, C4<0>, C4<0>; +L_0x1f38070 .functor XOR 1, L_0x1f38120, L_0x1f37fa0, C4<0>, C4<0>; +L_0x1f38210 .functor XOR 1, L_0x1f38530, L_0x1f385d0, C4<0>, C4<0>; +L_0x1f387c0 .functor XOR 1, L_0x1f38820, L_0x1f386c0, C4<0>, C4<0>; +L_0x1f38910 .functor XOR 1, L_0x1f38be0, L_0x1f38c80, C4<0>, C4<0>; +L_0x1f384d0 .functor XOR 1, L_0x1f38ea0, L_0x1f38d70, C4<0>, C4<0>; +L_0x1f38f90 .functor XOR 1, L_0x1f392c0, L_0x1f39360, C4<0>, C4<0>; +L_0x1f39210 .functor XOR 1, L_0x1f37910, L_0x1f321a0, C4<0>, C4<0>; +L_0x1f37050 .functor XOR 1, L_0x1f320c0, L_0x1f39d50, C4<0>, C4<0>; +L_0x1f39c70 .functor XOR 1, L_0x1f39fd0, L_0x1f39e40, C4<0>, C4<0>; +L_0x1f3a270 .functor XOR 1, L_0x1f3a3c0, L_0x1f3a460, C4<0>, C4<0>; +L_0x1f3a160 .functor XOR 1, L_0x1f3a710, L_0x1f3a550, C4<0>, C4<0>; +L_0x1f3a990 .functor XOR 1, L_0x1f3a320, L_0x1f3ab40, C4<0>, C4<0>; +L_0x1f3a850 .functor XOR 1, L_0x1f3ae20, L_0x1f3ac30, C4<0>, C4<0>; +L_0x1f3adc0 .functor XOR 1, L_0x1f3aa40, L_0x1f3b230, C4<0>, C4<0>; +L_0x1f3af60 .functor XOR 1, L_0x1f3b010, L_0x1f3b320, C4<0>, C4<0>; +L_0x1f3b4b0 .functor XOR 1, L_0x1f3b120, L_0x1f3b940, C4<0>, C4<0>; +L_0x1f3b630 .functor XOR 1, L_0x1f3b6e0, L_0x1f3bc90, C4<0>, C4<0>; +L_0x1f3ba30 .functor XOR 1, L_0x1f3bbc0, L_0x1f3c090, C4<0>, C4<0>; +L_0x1f3bec0 .functor XOR 1, L_0x1f3bf70, L_0x1f3c3c0, C4<0>, C4<0>; +L_0x1f3c130 .functor XOR 1, L_0x1f3bae0, L_0x1f3c320, C4<0>, C4<0>; +L_0x1f3c5f0 .functor XOR 1, L_0x1f3c6a0, L_0x1f3cb00, C4<0>, C4<0>; +L_0x1f3c840 .functor XOR 1, L_0x1f3c1e0, L_0x1f3c9f0, C4<0>, C4<0>; +L_0x1ed3ef0 .functor XOR 1, L_0x1f39590, L_0x1f39680, C4<0>, C4<0>; +L_0x1f3cce0 .functor XOR 1, L_0x1f3ce50, L_0x1f3c8f0, C4<0>, C4<0>; +v0x1ed5730_0 .net *"_s0", 0 0, L_0x1f32470; 1 drivers +v0x1ed57b0_0 .net *"_s101", 0 0, L_0x1f39e40; 1 drivers +v0x1ed5830_0 .net *"_s102", 0 0, L_0x1f3a270; 1 drivers +v0x1ed58b0_0 .net *"_s105", 0 0, L_0x1f3a3c0; 1 drivers +v0x1ed5930_0 .net *"_s107", 0 0, L_0x1f3a460; 1 drivers +v0x1ed59b0_0 .net *"_s108", 0 0, L_0x1f3a160; 1 drivers +v0x1ed5a30_0 .net *"_s11", 0 0, L_0x1f36860; 1 drivers +v0x1ed5ab0_0 .net *"_s111", 0 0, L_0x1f3a710; 1 drivers +v0x1ed5ba0_0 .net *"_s113", 0 0, L_0x1f3a550; 1 drivers +v0x1ed5c40_0 .net *"_s114", 0 0, L_0x1f3a990; 1 drivers +v0x1ed5ce0_0 .net *"_s117", 0 0, L_0x1f3a320; 1 drivers +v0x1ed5d80_0 .net *"_s119", 0 0, L_0x1f3ab40; 1 drivers +v0x1ed5e20_0 .net *"_s12", 0 0, L_0x1f36a80; 1 drivers +v0x1ed5ec0_0 .net *"_s120", 0 0, L_0x1f3a850; 1 drivers +v0x1ed5fe0_0 .net *"_s123", 0 0, L_0x1f3ae20; 1 drivers +v0x1ed6080_0 .net *"_s125", 0 0, L_0x1f3ac30; 1 drivers +v0x1ed5f40_0 .net *"_s126", 0 0, L_0x1f3adc0; 1 drivers +v0x1ed61d0_0 .net *"_s129", 0 0, L_0x1f3aa40; 1 drivers +v0x1ed62f0_0 .net *"_s131", 0 0, L_0x1f3b230; 1 drivers +v0x1ed6370_0 .net *"_s132", 0 0, L_0x1f3af60; 1 drivers +v0x1ed6250_0 .net *"_s135", 0 0, L_0x1f3b010; 1 drivers +v0x1ed64a0_0 .net *"_s137", 0 0, L_0x1f3b320; 1 drivers +v0x1ed63f0_0 .net *"_s138", 0 0, L_0x1f3b4b0; 1 drivers +v0x1ed65e0_0 .net *"_s141", 0 0, L_0x1f3b120; 1 drivers +v0x1ed6540_0 .net *"_s143", 0 0, L_0x1f3b940; 1 drivers +v0x1ed6730_0 .net *"_s144", 0 0, L_0x1f3b630; 1 drivers +v0x1ed6680_0 .net *"_s147", 0 0, L_0x1f3b6e0; 1 drivers +v0x1ed6890_0 .net *"_s149", 0 0, L_0x1f3bc90; 1 drivers +v0x1ed67d0_0 .net *"_s15", 0 0, L_0x1f36ae0; 1 drivers +v0x1ed6a00_0 .net *"_s150", 0 0, L_0x1f3ba30; 1 drivers +v0x1ed6910_0 .net *"_s153", 0 0, L_0x1f3bbc0; 1 drivers +v0x1ed6b80_0 .net *"_s155", 0 0, L_0x1f3c090; 1 drivers +v0x1ed6a80_0 .net *"_s156", 0 0, L_0x1f3bec0; 1 drivers +v0x1ed6d10_0 .net *"_s159", 0 0, L_0x1f3bf70; 1 drivers +v0x1ed6c00_0 .net *"_s161", 0 0, L_0x1f3c3c0; 1 drivers +v0x1ed6eb0_0 .net *"_s162", 0 0, L_0x1f3c130; 1 drivers +v0x1ed6d90_0 .net *"_s165", 0 0, L_0x1f3bae0; 1 drivers +v0x1ed6e30_0 .net *"_s167", 0 0, L_0x1f3c320; 1 drivers +v0x1ed7070_0 .net *"_s168", 0 0, L_0x1f3c5f0; 1 drivers +v0x1ed70f0_0 .net *"_s17", 0 0, L_0x1f36c20; 1 drivers +v0x1ed6f30_0 .net *"_s171", 0 0, L_0x1f3c6a0; 1 drivers +v0x1ed6fd0_0 .net *"_s173", 0 0, L_0x1f3cb00; 1 drivers +v0x1ed72d0_0 .net *"_s174", 0 0, L_0x1f3c840; 1 drivers +v0x1ed7350_0 .net *"_s177", 0 0, L_0x1f3c1e0; 1 drivers +v0x1ed7170_0 .net *"_s179", 0 0, L_0x1f3c9f0; 1 drivers +v0x1ed7210_0 .net *"_s18", 0 0, L_0x1f36e10; 1 drivers +v0x1ed7550_0 .net *"_s180", 0 0, L_0x1ed3ef0; 1 drivers +v0x1ed75d0_0 .net *"_s183", 0 0, L_0x1f39590; 1 drivers +v0x1ed73f0_0 .net *"_s185", 0 0, L_0x1f39680; 1 drivers +v0x1ed7490_0 .net *"_s186", 0 0, L_0x1f3cce0; 1 drivers +v0x1ed77f0_0 .net *"_s189", 0 0, L_0x1f3ce50; 1 drivers +v0x1ed7870_0 .net *"_s191", 0 0, L_0x1f3c8f0; 1 drivers +v0x1ed7670_0 .net *"_s21", 0 0, L_0x1f36e70; 1 drivers +v0x1ed7710_0 .net *"_s23", 0 0, L_0x1f36f60; 1 drivers +v0x1ed7ab0_0 .net *"_s24", 0 0, L_0x1f36db0; 1 drivers +v0x1ed7b30_0 .net *"_s27", 0 0, L_0x1f371b0; 1 drivers +v0x1ed78f0_0 .net *"_s29", 0 0, L_0x1f37320; 1 drivers +v0x1ed7990_0 .net *"_s3", 0 0, L_0x1f36440; 1 drivers +v0x1ed7a30_0 .net *"_s30", 0 0, L_0x1f37540; 1 drivers +v0x1ed7db0_0 .net *"_s33", 0 0, L_0x1f375f0; 1 drivers +v0x1ed7bd0_0 .net *"_s35", 0 0, L_0x1f376e0; 1 drivers +v0x1ed7c70_0 .net *"_s36", 0 0, L_0x1f374b0; 1 drivers +v0x1ed7d10_0 .net *"_s39", 0 0, L_0x1f37a20; 1 drivers +v0x1ed8050_0 .net *"_s41", 0 0, L_0x1f377d0; 1 drivers +v0x1ed7e50_0 .net *"_s42", 0 0, L_0x1f37b10; 1 drivers +v0x1ed7ef0_0 .net *"_s45", 0 0, L_0x1f37dc0; 1 drivers +v0x1ed7f90_0 .net *"_s47", 0 0, L_0x1f37eb0; 1 drivers +v0x1ed82f0_0 .net *"_s48", 0 0, L_0x1f38070; 1 drivers +v0x1ed80f0_0 .net *"_s5", 0 0, L_0x1f36530; 1 drivers +v0x1ed8190_0 .net *"_s51", 0 0, L_0x1f38120; 1 drivers +v0x1ed8230_0 .net *"_s53", 0 0, L_0x1f37fa0; 1 drivers +v0x1ed85b0_0 .net *"_s54", 0 0, L_0x1f38210; 1 drivers +v0x1ed8370_0 .net *"_s57", 0 0, L_0x1f38530; 1 drivers +v0x1ed8410_0 .net *"_s59", 0 0, L_0x1f385d0; 1 drivers +v0x1ed84b0_0 .net *"_s6", 0 0, L_0x1f366c0; 1 drivers +v0x1ed8890_0 .net *"_s60", 0 0, L_0x1f387c0; 1 drivers +v0x1ed8630_0 .net *"_s63", 0 0, L_0x1f38820; 1 drivers +v0x1ed86d0_0 .net *"_s65", 0 0, L_0x1f386c0; 1 drivers +v0x1ed8770_0 .net *"_s66", 0 0, L_0x1f38910; 1 drivers +v0x1ed8810_0 .net *"_s69", 0 0, L_0x1f38be0; 1 drivers +v0x1ed8ba0_0 .net *"_s71", 0 0, L_0x1f38c80; 1 drivers +v0x1ed8c20_0 .net *"_s72", 0 0, L_0x1f384d0; 1 drivers +v0x1ed8930_0 .net *"_s75", 0 0, L_0x1f38ea0; 1 drivers +v0x1ed89d0_0 .net *"_s77", 0 0, L_0x1f38d70; 1 drivers +v0x1ed8a70_0 .net *"_s78", 0 0, L_0x1f38f90; 1 drivers +v0x1ed8b10_0 .net *"_s81", 0 0, L_0x1f392c0; 1 drivers +v0x1ed8f80_0 .net *"_s83", 0 0, L_0x1f39360; 1 drivers +v0x1ed9020_0 .net *"_s84", 0 0, L_0x1f39210; 1 drivers +v0x1ed8cc0_0 .net *"_s87", 0 0, L_0x1f37910; 1 drivers +v0x1ed8d60_0 .net *"_s89", 0 0, L_0x1f321a0; 1 drivers +v0x1ed8e00_0 .net *"_s9", 0 0, L_0x1f36770; 1 drivers +v0x1ed8ea0_0 .net *"_s90", 0 0, L_0x1f37050; 1 drivers +v0x1ed9390_0 .net *"_s93", 0 0, L_0x1f320c0; 1 drivers +v0x1ed9410_0 .net *"_s95", 0 0, L_0x1f39d50; 1 drivers +v0x1ed90c0_0 .net *"_s96", 0 0, L_0x1f39c70; 1 drivers +v0x1ed9160_0 .net *"_s99", 0 0, L_0x1f39fd0; 1 drivers +v0x1ed9200_0 .alias "a", 31 0, v0x1f02500_0; +v0x1ed9280_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ed9300_0 .alias "out", 31 0, v0x1f01fc0_0; +L_0x1f32380 .part/pv L_0x1f32470, 0, 1, 32; +L_0x1f36440 .part v0x1f031c0_0, 0, 1; +L_0x1f36530 .part v0x1f023a0_0, 0, 1; +L_0x1f36620 .part/pv L_0x1f366c0, 1, 1, 32; +L_0x1f36770 .part v0x1f031c0_0, 1, 1; +L_0x1f36860 .part v0x1f023a0_0, 1, 1; +L_0x1f36950 .part/pv L_0x1f36a80, 2, 1, 32; +L_0x1f36ae0 .part v0x1f031c0_0, 2, 1; +L_0x1f36c20 .part v0x1f023a0_0, 2, 1; +L_0x1f36d10 .part/pv L_0x1f36e10, 3, 1, 32; +L_0x1f36e70 .part v0x1f031c0_0, 3, 1; +L_0x1f36f60 .part v0x1f023a0_0, 3, 1; +L_0x1f370c0 .part/pv L_0x1f36db0, 4, 1, 32; +L_0x1f371b0 .part v0x1f031c0_0, 4, 1; +L_0x1f37320 .part v0x1f023a0_0, 4, 1; +L_0x1f37410 .part/pv L_0x1f37540, 5, 1, 32; +L_0x1f375f0 .part v0x1f031c0_0, 5, 1; +L_0x1f376e0 .part v0x1f023a0_0, 5, 1; +L_0x1f37870 .part/pv L_0x1f374b0, 6, 1, 32; +L_0x1f37a20 .part v0x1f031c0_0, 6, 1; +L_0x1f377d0 .part v0x1f023a0_0, 6, 1; +L_0x1f37c10 .part/pv L_0x1f37b10, 7, 1, 32; +L_0x1f37dc0 .part v0x1f031c0_0, 7, 1; +L_0x1f37eb0 .part v0x1f023a0_0, 7, 1; +L_0x1f37cb0 .part/pv L_0x1f38070, 8, 1, 32; +L_0x1f38120 .part v0x1f031c0_0, 8, 1; +L_0x1f37fa0 .part v0x1f023a0_0, 8, 1; +L_0x1f38340 .part/pv L_0x1f38210, 9, 1, 32; +L_0x1f38530 .part v0x1f031c0_0, 9, 1; +L_0x1f385d0 .part v0x1f023a0_0, 9, 1; +L_0x1f383e0 .part/pv L_0x1f387c0, 10, 1, 32; +L_0x1f38820 .part v0x1f031c0_0, 10, 1; +L_0x1f386c0 .part v0x1f023a0_0, 10, 1; +L_0x1f38a20 .part/pv L_0x1f38910, 11, 1, 32; +L_0x1f38be0 .part v0x1f031c0_0, 11, 1; +L_0x1f38c80 .part v0x1f023a0_0, 11, 1; +L_0x1f38ac0 .part/pv L_0x1f384d0, 12, 1, 32; +L_0x1f38ea0 .part v0x1f031c0_0, 12, 1; +L_0x1f38d70 .part v0x1f023a0_0, 12, 1; +L_0x1f390d0 .part/pv L_0x1f38f90, 13, 1, 32; +L_0x1f392c0 .part v0x1f031c0_0, 13, 1; +L_0x1f39360 .part v0x1f023a0_0, 13, 1; +L_0x1f39170 .part/pv L_0x1f39210, 14, 1, 32; +L_0x1f37910 .part v0x1f031c0_0, 14, 1; +L_0x1f321a0 .part v0x1f023a0_0, 14, 1; +L_0x1f39450 .part/pv L_0x1f37050, 15, 1, 32; +L_0x1f320c0 .part v0x1f031c0_0, 15, 1; +L_0x1f39d50 .part v0x1f023a0_0, 15, 1; +L_0x1f39bd0 .part/pv L_0x1f39c70, 16, 1, 32; +L_0x1f39fd0 .part v0x1f031c0_0, 16, 1; +L_0x1f39e40 .part v0x1f023a0_0, 16, 1; +L_0x1f39f30 .part/pv L_0x1f3a270, 17, 1, 32; +L_0x1f3a3c0 .part v0x1f031c0_0, 17, 1; +L_0x1f3a460 .part v0x1f023a0_0, 17, 1; +L_0x1f3a0c0 .part/pv L_0x1f3a160, 18, 1, 32; +L_0x1f3a710 .part v0x1f031c0_0, 18, 1; +L_0x1f3a550 .part v0x1f023a0_0, 18, 1; +L_0x1f3a640 .part/pv L_0x1f3a990, 19, 1, 32; +L_0x1f3a320 .part v0x1f031c0_0, 19, 1; +L_0x1f3ab40 .part v0x1f023a0_0, 19, 1; +L_0x1f3a7b0 .part/pv L_0x1f3a850, 20, 1, 32; +L_0x1f3ae20 .part v0x1f031c0_0, 20, 1; +L_0x1f3ac30 .part v0x1f023a0_0, 20, 1; +L_0x1f3ad20 .part/pv L_0x1f3adc0, 21, 1, 32; +L_0x1f3aa40 .part v0x1f031c0_0, 21, 1; +L_0x1f3b230 .part v0x1f023a0_0, 21, 1; +L_0x1f3aec0 .part/pv L_0x1f3af60, 22, 1, 32; +L_0x1f3b010 .part v0x1f031c0_0, 22, 1; +L_0x1f3b320 .part v0x1f023a0_0, 22, 1; +L_0x1f3b410 .part/pv L_0x1f3b4b0, 23, 1, 32; +L_0x1f3b120 .part v0x1f031c0_0, 23, 1; +L_0x1f3b940 .part v0x1f023a0_0, 23, 1; +L_0x1f3b590 .part/pv L_0x1f3b630, 24, 1, 32; +L_0x1f3b6e0 .part v0x1f031c0_0, 24, 1; +L_0x1f3bc90 .part v0x1f023a0_0, 24, 1; +L_0x1f3bd80 .part/pv L_0x1f3ba30, 25, 1, 32; +L_0x1f3bbc0 .part v0x1f031c0_0, 25, 1; +L_0x1f3c090 .part v0x1f023a0_0, 25, 1; +L_0x1f3be20 .part/pv L_0x1f3bec0, 26, 1, 32; +L_0x1f3bf70 .part v0x1f031c0_0, 26, 1; +L_0x1f3c3c0 .part v0x1f023a0_0, 26, 1; +L_0x1f3c4b0 .part/pv L_0x1f3c130, 27, 1, 32; +L_0x1f3bae0 .part v0x1f031c0_0, 27, 1; +L_0x1f3c320 .part v0x1f023a0_0, 27, 1; +L_0x1f3c550 .part/pv L_0x1f3c5f0, 28, 1, 32; +L_0x1f3c6a0 .part v0x1f031c0_0, 28, 1; +L_0x1f3cb00 .part v0x1f023a0_0, 28, 1; +L_0x1f3cba0 .part/pv L_0x1f3c840, 29, 1, 32; +L_0x1f3c1e0 .part v0x1f031c0_0, 29, 1; +L_0x1f3c9f0 .part v0x1f023a0_0, 29, 1; +L_0x1f3cf20 .part/pv L_0x1ed3ef0, 30, 1, 32; +L_0x1f39590 .part v0x1f031c0_0, 30, 1; +L_0x1f39680 .part v0x1f023a0_0, 30, 1; +L_0x1f3cc40 .part/pv L_0x1f3cce0, 31, 1, 32; +L_0x1f3ce50 .part v0x1f031c0_0, 31, 1; +L_0x1f3c8f0 .part v0x1f023a0_0, 31, 1; +S_0x1ec71b0 .scope module, "slt0" "full_slt_32bit" 6 36, 9 37, S_0x1eb65d0; + .timescale 0 0; +v0x1ed3720_0 .net/s *"_s128", 30 0, C4<0000000000000000000000000000000>; 1 drivers +v0x1ed37e0_0 .alias "a", 31 0, v0x1f02500_0; +v0x1ed38f0_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ed3a00_0 .alias "out", 31 0, v0x1f01e90_0; +v0x1ed3ab0_0 .net "slt0", 0 0, L_0x1f3d8f0; 1 drivers +v0x1ed3b30_0 .net "slt1", 0 0, L_0x1f3ded0; 1 drivers +v0x1ed3bb0_0 .net "slt10", 0 0, L_0x1f41020; 1 drivers +v0x1ed3c80_0 .net "slt11", 0 0, L_0x1f41570; 1 drivers +v0x1ed3da0_0 .net "slt12", 0 0, L_0x1f41ac0; 1 drivers +v0x1ed3e70_0 .net "slt13", 0 0, L_0x1f42020; 1 drivers +v0x1ed3f50_0 .net "slt14", 0 0, L_0x1f42590; 1 drivers +v0x1ed4020_0 .net "slt15", 0 0, L_0x1f39ab0; 1 drivers +v0x1ed4160_0 .net "slt16", 0 0, L_0x1f433d0; 1 drivers +v0x1ed4230_0 .net "slt17", 0 0, L_0x1f43920; 1 drivers +v0x1ed4380_0 .net "slt18", 0 0, L_0x1f43e80; 1 drivers +v0x1ed4450_0 .net "slt19", 0 0, L_0x1f443f0; 1 drivers +v0x1ed42b0_0 .net "slt2", 0 0, L_0x1f3e410; 1 drivers +v0x1ed4600_0 .net "slt20", 0 0, L_0x1f44970; 1 drivers +v0x1ed4720_0 .net "slt21", 0 0, L_0x1f44f00; 1 drivers +v0x1ed47f0_0 .net "slt22", 0 0, L_0x1f0ba50; 1 drivers +v0x1ed4920_0 .net "slt23", 0 0, L_0x1f461e0; 1 drivers +v0x1ed49a0_0 .net "slt24", 0 0, L_0x1f46750; 1 drivers +v0x1ed4ae0_0 .net "slt25", 0 0, L_0x1f46cd0; 1 drivers +v0x1ed4b60_0 .net "slt26", 0 0, L_0x1ed48c0; 1 drivers +v0x1ed4cb0_0 .net "slt27", 0 0, L_0x1f477a0; 1 drivers +v0x1ed4d30_0 .net "slt28", 0 0, L_0x1f47cf0; 1 drivers +v0x1ed4c30_0 .net "slt29", 0 0, L_0x1f48250; 1 drivers +v0x1ed4ee0_0 .net "slt3", 0 0, L_0x1f3e950; 1 drivers +v0x1ed4e00_0 .net "slt30", 0 0, L_0x1f487c0; 1 drivers +v0x1ed50a0_0 .net "slt4", 0 0, L_0x1f3eee0; 1 drivers +v0x1ed4fb0_0 .net "slt5", 0 0, L_0x1f3f430; 1 drivers +v0x1ed5270_0 .net "slt6", 0 0, L_0x1f3f980; 1 drivers +v0x1ed5170_0 .net "slt7", 0 0, L_0x1f3ff40; 1 drivers +v0x1ed5450_0 .net "slt8", 0 0, L_0x1f40510; 1 drivers +v0x1ed5340_0 .net "slt9", 0 0, L_0x1f40a90; 1 drivers +L_0x1f3d9f0 .part v0x1f031c0_0, 0, 1; +L_0x1f3dae0 .part v0x1f023a0_0, 0, 1; +L_0x1f3df80 .part v0x1f031c0_0, 1, 1; +L_0x1f3e070 .part v0x1f023a0_0, 1, 1; +L_0x1f3e4c0 .part v0x1f031c0_0, 2, 1; +L_0x1f3e5b0 .part v0x1f023a0_0, 2, 1; +L_0x1f3ea00 .part v0x1f031c0_0, 3, 1; +L_0x1f3eaf0 .part v0x1f023a0_0, 3, 1; +L_0x1f3ef90 .part v0x1f031c0_0, 4, 1; +L_0x1f3f080 .part v0x1f023a0_0, 4, 1; +L_0x1f3f4e0 .part v0x1f031c0_0, 5, 1; +L_0x1f3f5d0 .part v0x1f023a0_0, 5, 1; +L_0x1f3fa30 .part v0x1f031c0_0, 6, 1; +L_0x1f3fb20 .part v0x1f023a0_0, 6, 1; +L_0x1f3fff0 .part v0x1f031c0_0, 7, 1; +L_0x1f400e0 .part v0x1f023a0_0, 7, 1; +L_0x1f405c0 .part v0x1f031c0_0, 8, 1; +L_0x1f406b0 .part v0x1f023a0_0, 8, 1; +L_0x1f40b40 .part v0x1f031c0_0, 9, 1; +L_0x1f40c30 .part v0x1f023a0_0, 9, 1; +L_0x1f410d0 .part v0x1f031c0_0, 10, 1; +L_0x1f411c0 .part v0x1f023a0_0, 10, 1; +L_0x1f41620 .part v0x1f031c0_0, 11, 1; +L_0x1f41710 .part v0x1f023a0_0, 11, 1; +L_0x1f41b70 .part v0x1f031c0_0, 12, 1; +L_0x1f41c60 .part v0x1f023a0_0, 12, 1; +L_0x1f420d0 .part v0x1f031c0_0, 13, 1; +L_0x1f421c0 .part v0x1f023a0_0, 13, 1; +L_0x1f42640 .part v0x1f031c0_0, 14, 1; +L_0x1f397c0 .part v0x1f023a0_0, 14, 1; +L_0x1f42f40 .part v0x1f031c0_0, 15, 1; +L_0x1f42fe0 .part v0x1f023a0_0, 15, 1; +L_0x1f43480 .part v0x1f031c0_0, 16, 1; +L_0x1f43570 .part v0x1f023a0_0, 16, 1; +L_0x1f439d0 .part v0x1f031c0_0, 17, 1; +L_0x1f43ac0 .part v0x1f023a0_0, 17, 1; +L_0x1f43f30 .part v0x1f031c0_0, 18, 1; +L_0x1f44020 .part v0x1f023a0_0, 18, 1; +L_0x1f444a0 .part v0x1f031c0_0, 19, 1; +L_0x1f44590 .part v0x1f023a0_0, 19, 1; +L_0x1f44a20 .part v0x1f031c0_0, 20, 1; +L_0x1f44b10 .part v0x1f023a0_0, 20, 1; +L_0x1f44fb0 .part v0x1f031c0_0, 21, 1; +L_0x1f450a0 .part v0x1f023a0_0, 21, 1; +L_0x1f0bb00 .part v0x1f031c0_0, 22, 1; +L_0x1f0bbf0 .part v0x1f023a0_0, 22, 1; +L_0x1f46290 .part v0x1f031c0_0, 23, 1; +L_0x1f46380 .part v0x1f023a0_0, 23, 1; +L_0x1f46800 .part v0x1f031c0_0, 24, 1; +L_0x1f468f0 .part v0x1f023a0_0, 24, 1; +L_0x1f46d80 .part v0x1f031c0_0, 25, 1; +L_0x1f46e70 .part v0x1f023a0_0, 25, 1; +L_0x1f47300 .part v0x1f031c0_0, 26, 1; +L_0x1f473f0 .part v0x1f023a0_0, 26, 1; +L_0x1f47850 .part v0x1f031c0_0, 27, 1; +L_0x1f47940 .part v0x1f023a0_0, 27, 1; +L_0x1f47da0 .part v0x1f031c0_0, 28, 1; +L_0x1f47e90 .part v0x1f023a0_0, 28, 1; +L_0x1f48300 .part v0x1f031c0_0, 29, 1; +L_0x1f483f0 .part v0x1f023a0_0, 29, 1; +L_0x1f48870 .part v0x1f031c0_0, 30, 1; +L_0x1f48960 .part v0x1f023a0_0, 30, 1; +L_0x1f48490 .part/pv C4<0000000000000000000000000000000>, 1, 31, 32; +L_0x1f48f00 .part/pv L_0x1f48e50, 0, 1, 32; +L_0x1f48a00 .part v0x1f031c0_0, 31, 1; +L_0x1f48aa0 .part v0x1f023a0_0, 31, 1; +S_0x1ed3130 .scope module, "bit0" "single_slt" 9 74, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f372a0 .functor XOR 1, L_0x1f3d9f0, L_0x1f3dae0, C4<0>, C4<0>; +L_0x1f3d6e0 .functor AND 1, L_0x1f3dae0, L_0x1f372a0, C4<1>, C4<1>; +L_0x1f3d7e0 .functor NOT 1, L_0x1f372a0, C4<0>, C4<0>, C4<0>; +L_0x1f3d840 .functor AND 1, L_0x1f3d7e0, C4<0>, C4<1>, C4<1>; +L_0x1f3d8f0 .functor OR 1, L_0x1f3d6e0, L_0x1f3d840, C4<0>, C4<0>; +v0x1ed3220_0 .net "a", 0 0, L_0x1f3d9f0; 1 drivers +v0x1ed32a0_0 .net "abxor", 0 0, L_0x1f372a0; 1 drivers +v0x1ed3340_0 .net "b", 0 0, L_0x1f3dae0; 1 drivers +v0x1ed33e0_0 .net "bxorand", 0 0, L_0x1f3d6e0; 1 drivers +v0x1ed3490_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x1ed3530_0 .alias "out", 0 0, v0x1ed3ab0_0; +v0x1ed35b0_0 .net "xornot", 0 0, L_0x1f3d7e0; 1 drivers +v0x1ed3630_0 .net "xornotand", 0 0, L_0x1f3d840; 1 drivers +S_0x1ed2b70 .scope module, "bit1" "single_slt" 9 75, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3dbd0 .functor XOR 1, L_0x1f3df80, L_0x1f3e070, C4<0>, C4<0>; +L_0x1f3dc30 .functor AND 1, L_0x1f3e070, L_0x1f3dbd0, C4<1>, C4<1>; +L_0x1f3dd30 .functor NOT 1, L_0x1f3dbd0, C4<0>, C4<0>, C4<0>; +L_0x1f3dd90 .functor AND 1, L_0x1f3dd30, L_0x1f3d8f0, C4<1>, C4<1>; +L_0x1f3ded0 .functor OR 1, L_0x1f3dc30, L_0x1f3dd90, C4<0>, C4<0>; +v0x1ed2c60_0 .net "a", 0 0, L_0x1f3df80; 1 drivers +v0x1ed2d20_0 .net "abxor", 0 0, L_0x1f3dbd0; 1 drivers +v0x1ed2dc0_0 .net "b", 0 0, L_0x1f3e070; 1 drivers +v0x1ed2e60_0 .net "bxorand", 0 0, L_0x1f3dc30; 1 drivers +v0x1ed2f10_0 .alias "defaultCompare", 0 0, v0x1ed3ab0_0; +v0x1ed2fb0_0 .alias "out", 0 0, v0x1ed3b30_0; +v0x1ed3030_0 .net "xornot", 0 0, L_0x1f3dd30; 1 drivers +v0x1ed30b0_0 .net "xornotand", 0 0, L_0x1f3dd90; 1 drivers +S_0x1ed2540 .scope module, "bit2" "single_slt" 9 76, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3e110 .functor XOR 1, L_0x1f3e4c0, L_0x1f3e5b0, C4<0>, C4<0>; +L_0x1f3e170 .functor AND 1, L_0x1f3e5b0, L_0x1f3e110, C4<1>, C4<1>; +L_0x1f3e270 .functor NOT 1, L_0x1f3e110, C4<0>, C4<0>, C4<0>; +L_0x1f3e2d0 .functor AND 1, L_0x1f3e270, L_0x1f3ded0, C4<1>, C4<1>; +L_0x1f3e410 .functor OR 1, L_0x1f3e170, L_0x1f3e2d0, C4<0>, C4<0>; +v0x1ed2630_0 .net "a", 0 0, L_0x1f3e4c0; 1 drivers +v0x1ed26f0_0 .net "abxor", 0 0, L_0x1f3e110; 1 drivers +v0x1ed2790_0 .net "b", 0 0, L_0x1f3e5b0; 1 drivers +v0x1ed2830_0 .net "bxorand", 0 0, L_0x1f3e170; 1 drivers +v0x1ed28e0_0 .alias "defaultCompare", 0 0, v0x1ed3b30_0; +v0x1ed2980_0 .alias "out", 0 0, v0x1ed42b0_0; +v0x1ed2a00_0 .net "xornot", 0 0, L_0x1f3e270; 1 drivers +v0x1ed2a80_0 .net "xornotand", 0 0, L_0x1f3e2d0; 1 drivers +S_0x1ed1f10 .scope module, "bit3" "single_slt" 9 77, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3e650 .functor XOR 1, L_0x1f3ea00, L_0x1f3eaf0, C4<0>, C4<0>; +L_0x1f3e6b0 .functor AND 1, L_0x1f3eaf0, L_0x1f3e650, C4<1>, C4<1>; +L_0x1f3e7b0 .functor NOT 1, L_0x1f3e650, C4<0>, C4<0>, C4<0>; +L_0x1f3e810 .functor AND 1, L_0x1f3e7b0, L_0x1f3e410, C4<1>, C4<1>; +L_0x1f3e950 .functor OR 1, L_0x1f3e6b0, L_0x1f3e810, C4<0>, C4<0>; +v0x1ed2000_0 .net "a", 0 0, L_0x1f3ea00; 1 drivers +v0x1ed20c0_0 .net "abxor", 0 0, L_0x1f3e650; 1 drivers +v0x1ed2160_0 .net "b", 0 0, L_0x1f3eaf0; 1 drivers +v0x1ed2200_0 .net "bxorand", 0 0, L_0x1f3e6b0; 1 drivers +v0x1ed22b0_0 .alias "defaultCompare", 0 0, v0x1ed42b0_0; +v0x1ed2350_0 .alias "out", 0 0, v0x1ed4ee0_0; +v0x1ed23d0_0 .net "xornot", 0 0, L_0x1f3e7b0; 1 drivers +v0x1ed2450_0 .net "xornotand", 0 0, L_0x1f3e810; 1 drivers +S_0x1ed18e0 .scope module, "bit4" "single_slt" 9 78, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3ebe0 .functor XOR 1, L_0x1f3ef90, L_0x1f3f080, C4<0>, C4<0>; +L_0x1f3ec40 .functor AND 1, L_0x1f3f080, L_0x1f3ebe0, C4<1>, C4<1>; +L_0x1f3ed40 .functor NOT 1, L_0x1f3ebe0, C4<0>, C4<0>, C4<0>; +L_0x1f3eda0 .functor AND 1, L_0x1f3ed40, L_0x1f3e950, C4<1>, C4<1>; +L_0x1f3eee0 .functor OR 1, L_0x1f3ec40, L_0x1f3eda0, C4<0>, C4<0>; +v0x1ed19d0_0 .net "a", 0 0, L_0x1f3ef90; 1 drivers +v0x1ed1a90_0 .net "abxor", 0 0, L_0x1f3ebe0; 1 drivers +v0x1ed1b30_0 .net "b", 0 0, L_0x1f3f080; 1 drivers +v0x1ed1bd0_0 .net "bxorand", 0 0, L_0x1f3ec40; 1 drivers +v0x1ed1c80_0 .alias "defaultCompare", 0 0, v0x1ed4ee0_0; +v0x1ed1d20_0 .alias "out", 0 0, v0x1ed50a0_0; +v0x1ed1da0_0 .net "xornot", 0 0, L_0x1f3ed40; 1 drivers +v0x1ed1e20_0 .net "xornotand", 0 0, L_0x1f3eda0; 1 drivers +S_0x1ed12b0 .scope module, "bit5" "single_slt" 9 79, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3f180 .functor XOR 1, L_0x1f3f4e0, L_0x1f3f5d0, C4<0>, C4<0>; +L_0x1f3f1e0 .functor AND 1, L_0x1f3f5d0, L_0x1f3f180, C4<1>, C4<1>; +L_0x1f3f290 .functor NOT 1, L_0x1f3f180, C4<0>, C4<0>, C4<0>; +L_0x1f3f2f0 .functor AND 1, L_0x1f3f290, L_0x1f3eee0, C4<1>, C4<1>; +L_0x1f3f430 .functor OR 1, L_0x1f3f1e0, L_0x1f3f2f0, C4<0>, C4<0>; +v0x1ed13a0_0 .net "a", 0 0, L_0x1f3f4e0; 1 drivers +v0x1ed1460_0 .net "abxor", 0 0, L_0x1f3f180; 1 drivers +v0x1ed1500_0 .net "b", 0 0, L_0x1f3f5d0; 1 drivers +v0x1ed15a0_0 .net "bxorand", 0 0, L_0x1f3f1e0; 1 drivers +v0x1ed1650_0 .alias "defaultCompare", 0 0, v0x1ed50a0_0; +v0x1ed16f0_0 .alias "out", 0 0, v0x1ed4fb0_0; +v0x1ed1770_0 .net "xornot", 0 0, L_0x1f3f290; 1 drivers +v0x1ed17f0_0 .net "xornotand", 0 0, L_0x1f3f2f0; 1 drivers +S_0x1ed0c80 .scope module, "bit6" "single_slt" 9 80, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3f120 .functor XOR 1, L_0x1f3fa30, L_0x1f3fb20, C4<0>, C4<0>; +L_0x1f3f6e0 .functor AND 1, L_0x1f3fb20, L_0x1f3f120, C4<1>, C4<1>; +L_0x1f3f7e0 .functor NOT 1, L_0x1f3f120, C4<0>, C4<0>, C4<0>; +L_0x1f3f840 .functor AND 1, L_0x1f3f7e0, L_0x1f3f430, C4<1>, C4<1>; +L_0x1f3f980 .functor OR 1, L_0x1f3f6e0, L_0x1f3f840, C4<0>, C4<0>; +v0x1ed0d70_0 .net "a", 0 0, L_0x1f3fa30; 1 drivers +v0x1ed0e30_0 .net "abxor", 0 0, L_0x1f3f120; 1 drivers +v0x1ed0ed0_0 .net "b", 0 0, L_0x1f3fb20; 1 drivers +v0x1ed0f70_0 .net "bxorand", 0 0, L_0x1f3f6e0; 1 drivers +v0x1ed1020_0 .alias "defaultCompare", 0 0, v0x1ed4fb0_0; +v0x1ed10c0_0 .alias "out", 0 0, v0x1ed5270_0; +v0x1ed1140_0 .net "xornot", 0 0, L_0x1f3f7e0; 1 drivers +v0x1ed11c0_0 .net "xornotand", 0 0, L_0x1f3f840; 1 drivers +S_0x1ed0650 .scope module, "bit7" "single_slt" 9 81, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3fc40 .functor XOR 1, L_0x1f3fff0, L_0x1f400e0, C4<0>, C4<0>; +L_0x1f3fca0 .functor AND 1, L_0x1f400e0, L_0x1f3fc40, C4<1>, C4<1>; +L_0x1f3fda0 .functor NOT 1, L_0x1f3fc40, C4<0>, C4<0>, C4<0>; +L_0x1f3fe00 .functor AND 1, L_0x1f3fda0, L_0x1f3f980, C4<1>, C4<1>; +L_0x1f3ff40 .functor OR 1, L_0x1f3fca0, L_0x1f3fe00, C4<0>, C4<0>; +v0x1ed0740_0 .net "a", 0 0, L_0x1f3fff0; 1 drivers +v0x1ed0800_0 .net "abxor", 0 0, L_0x1f3fc40; 1 drivers +v0x1ed08a0_0 .net "b", 0 0, L_0x1f400e0; 1 drivers +v0x1ed0940_0 .net "bxorand", 0 0, L_0x1f3fca0; 1 drivers +v0x1ed09f0_0 .alias "defaultCompare", 0 0, v0x1ed5270_0; +v0x1ed0a90_0 .alias "out", 0 0, v0x1ed5170_0; +v0x1ed0b10_0 .net "xornot", 0 0, L_0x1f3fda0; 1 drivers +v0x1ed0b90_0 .net "xornotand", 0 0, L_0x1f3fe00; 1 drivers +S_0x1ed0020 .scope module, "bit8" "single_slt" 9 82, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f40210 .functor XOR 1, L_0x1f405c0, L_0x1f406b0, C4<0>, C4<0>; +L_0x1f40270 .functor AND 1, L_0x1f406b0, L_0x1f40210, C4<1>, C4<1>; +L_0x1f40370 .functor NOT 1, L_0x1f40210, C4<0>, C4<0>, C4<0>; +L_0x1f403d0 .functor AND 1, L_0x1f40370, L_0x1f3ff40, C4<1>, C4<1>; +L_0x1f40510 .functor OR 1, L_0x1f40270, L_0x1f403d0, C4<0>, C4<0>; +v0x1ed0110_0 .net "a", 0 0, L_0x1f405c0; 1 drivers +v0x1ed01d0_0 .net "abxor", 0 0, L_0x1f40210; 1 drivers +v0x1ed0270_0 .net "b", 0 0, L_0x1f406b0; 1 drivers +v0x1ed0310_0 .net "bxorand", 0 0, L_0x1f40270; 1 drivers +v0x1ed03c0_0 .alias "defaultCompare", 0 0, v0x1ed5170_0; +v0x1ed0460_0 .alias "out", 0 0, v0x1ed5450_0; +v0x1ed04e0_0 .net "xornot", 0 0, L_0x1f40370; 1 drivers +v0x1ed0560_0 .net "xornotand", 0 0, L_0x1f403d0; 1 drivers +S_0x1ecf9f0 .scope module, "bit9" "single_slt" 9 83, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f40180 .functor XOR 1, L_0x1f40b40, L_0x1f40c30, C4<0>, C4<0>; +L_0x1f407f0 .functor AND 1, L_0x1f40c30, L_0x1f40180, C4<1>, C4<1>; +L_0x1f408f0 .functor NOT 1, L_0x1f40180, C4<0>, C4<0>, C4<0>; +L_0x1f40950 .functor AND 1, L_0x1f408f0, L_0x1f40510, C4<1>, C4<1>; +L_0x1f40a90 .functor OR 1, L_0x1f407f0, L_0x1f40950, C4<0>, C4<0>; +v0x1ecfae0_0 .net "a", 0 0, L_0x1f40b40; 1 drivers +v0x1ecfba0_0 .net "abxor", 0 0, L_0x1f40180; 1 drivers +v0x1ecfc40_0 .net "b", 0 0, L_0x1f40c30; 1 drivers +v0x1ecfce0_0 .net "bxorand", 0 0, L_0x1f407f0; 1 drivers +v0x1ecfd90_0 .alias "defaultCompare", 0 0, v0x1ed5450_0; +v0x1ecfe30_0 .alias "out", 0 0, v0x1ed5340_0; +v0x1ecfeb0_0 .net "xornot", 0 0, L_0x1f408f0; 1 drivers +v0x1ecff30_0 .net "xornotand", 0 0, L_0x1f40950; 1 drivers +S_0x1ecf3c0 .scope module, "bit10" "single_slt" 9 84, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f40750 .functor XOR 1, L_0x1f410d0, L_0x1f411c0, C4<0>, C4<0>; +L_0x1f40d80 .functor AND 1, L_0x1f411c0, L_0x1f40750, C4<1>, C4<1>; +L_0x1f40e80 .functor NOT 1, L_0x1f40750, C4<0>, C4<0>, C4<0>; +L_0x1f40ee0 .functor AND 1, L_0x1f40e80, L_0x1f40a90, C4<1>, C4<1>; +L_0x1f41020 .functor OR 1, L_0x1f40d80, L_0x1f40ee0, C4<0>, C4<0>; +v0x1ecf4b0_0 .net "a", 0 0, L_0x1f410d0; 1 drivers +v0x1ecf570_0 .net "abxor", 0 0, L_0x1f40750; 1 drivers +v0x1ecf610_0 .net "b", 0 0, L_0x1f411c0; 1 drivers +v0x1ecf6b0_0 .net "bxorand", 0 0, L_0x1f40d80; 1 drivers +v0x1ecf760_0 .alias "defaultCompare", 0 0, v0x1ed5340_0; +v0x1ecf800_0 .alias "out", 0 0, v0x1ed3bb0_0; +v0x1ecf880_0 .net "xornot", 0 0, L_0x1f40e80; 1 drivers +v0x1ecf900_0 .net "xornotand", 0 0, L_0x1f40ee0; 1 drivers +S_0x1eced90 .scope module, "bit11" "single_slt" 9 85, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f40cd0 .functor XOR 1, L_0x1f41620, L_0x1f41710, C4<0>, C4<0>; +L_0x1f41320 .functor AND 1, L_0x1f41710, L_0x1f40cd0, C4<1>, C4<1>; +L_0x1f413d0 .functor NOT 1, L_0x1f40cd0, C4<0>, C4<0>, C4<0>; +L_0x1f41430 .functor AND 1, L_0x1f413d0, L_0x1f41020, C4<1>, C4<1>; +L_0x1f41570 .functor OR 1, L_0x1f41320, L_0x1f41430, C4<0>, C4<0>; +v0x1ecee80_0 .net "a", 0 0, L_0x1f41620; 1 drivers +v0x1ecef40_0 .net "abxor", 0 0, L_0x1f40cd0; 1 drivers +v0x1ecefe0_0 .net "b", 0 0, L_0x1f41710; 1 drivers +v0x1ecf080_0 .net "bxorand", 0 0, L_0x1f41320; 1 drivers +v0x1ecf130_0 .alias "defaultCompare", 0 0, v0x1ed3bb0_0; +v0x1ecf1d0_0 .alias "out", 0 0, v0x1ed3c80_0; +v0x1ecf250_0 .net "xornot", 0 0, L_0x1f413d0; 1 drivers +v0x1ecf2d0_0 .net "xornotand", 0 0, L_0x1f41430; 1 drivers +S_0x1ece760 .scope module, "bit12" "single_slt" 9 86, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f41260 .functor XOR 1, L_0x1f41b70, L_0x1f41c60, C4<0>, C4<0>; +L_0x1f412c0 .functor AND 1, L_0x1f41c60, L_0x1f41260, C4<1>, C4<1>; +L_0x1f41920 .functor NOT 1, L_0x1f41260, C4<0>, C4<0>, C4<0>; +L_0x1f41980 .functor AND 1, L_0x1f41920, L_0x1f41570, C4<1>, C4<1>; +L_0x1f41ac0 .functor OR 1, L_0x1f412c0, L_0x1f41980, C4<0>, C4<0>; +v0x1ece850_0 .net "a", 0 0, L_0x1f41b70; 1 drivers +v0x1ece910_0 .net "abxor", 0 0, L_0x1f41260; 1 drivers +v0x1ece9b0_0 .net "b", 0 0, L_0x1f41c60; 1 drivers +v0x1ecea50_0 .net "bxorand", 0 0, L_0x1f412c0; 1 drivers +v0x1eceb00_0 .alias "defaultCompare", 0 0, v0x1ed3c80_0; +v0x1eceba0_0 .alias "out", 0 0, v0x1ed3da0_0; +v0x1ecec20_0 .net "xornot", 0 0, L_0x1f41920; 1 drivers +v0x1ececa0_0 .net "xornotand", 0 0, L_0x1f41980; 1 drivers +S_0x1ece130 .scope module, "bit13" "single_slt" 9 87, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f417b0 .functor XOR 1, L_0x1f420d0, L_0x1f421c0, C4<0>, C4<0>; +L_0x1f41810 .functor AND 1, L_0x1f421c0, L_0x1f417b0, C4<1>, C4<1>; +L_0x1f41e80 .functor NOT 1, L_0x1f417b0, C4<0>, C4<0>, C4<0>; +L_0x1f41ee0 .functor AND 1, L_0x1f41e80, L_0x1f41ac0, C4<1>, C4<1>; +L_0x1f42020 .functor OR 1, L_0x1f41810, L_0x1f41ee0, C4<0>, C4<0>; +v0x1ece220_0 .net "a", 0 0, L_0x1f420d0; 1 drivers +v0x1ece2e0_0 .net "abxor", 0 0, L_0x1f417b0; 1 drivers +v0x1ece380_0 .net "b", 0 0, L_0x1f421c0; 1 drivers +v0x1ece420_0 .net "bxorand", 0 0, L_0x1f41810; 1 drivers +v0x1ece4d0_0 .alias "defaultCompare", 0 0, v0x1ed3da0_0; +v0x1ece570_0 .alias "out", 0 0, v0x1ed3e70_0; +v0x1ece5f0_0 .net "xornot", 0 0, L_0x1f41e80; 1 drivers +v0x1ece670_0 .net "xornotand", 0 0, L_0x1f41ee0; 1 drivers +S_0x1ecdb00 .scope module, "bit14" "single_slt" 9 88, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f41d00 .functor XOR 1, L_0x1f42640, L_0x1f397c0, C4<0>, C4<0>; +L_0x1f41d60 .functor AND 1, L_0x1f397c0, L_0x1f41d00, C4<1>, C4<1>; +L_0x1f423f0 .functor NOT 1, L_0x1f41d00, C4<0>, C4<0>, C4<0>; +L_0x1f42450 .functor AND 1, L_0x1f423f0, L_0x1f42020, C4<1>, C4<1>; +L_0x1f42590 .functor OR 1, L_0x1f41d60, L_0x1f42450, C4<0>, C4<0>; +v0x1ecdbf0_0 .net "a", 0 0, L_0x1f42640; 1 drivers +v0x1ecdcb0_0 .net "abxor", 0 0, L_0x1f41d00; 1 drivers +v0x1ecdd50_0 .net "b", 0 0, L_0x1f397c0; 1 drivers +v0x1ecddf0_0 .net "bxorand", 0 0, L_0x1f41d60; 1 drivers +v0x1ecdea0_0 .alias "defaultCompare", 0 0, v0x1ed3e70_0; +v0x1ecdf40_0 .alias "out", 0 0, v0x1ed3f50_0; +v0x1ecdfc0_0 .net "xornot", 0 0, L_0x1f423f0; 1 drivers +v0x1ece040_0 .net "xornotand", 0 0, L_0x1f42450; 1 drivers +S_0x1ecd4d0 .scope module, "bit15" "single_slt" 9 89, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f3f670 .functor XOR 1, L_0x1f42f40, L_0x1f42fe0, C4<0>, C4<0>; +L_0x1f3fbc0 .functor AND 1, L_0x1f42fe0, L_0x1f3f670, C4<1>, C4<1>; +L_0x1f39960 .functor NOT 1, L_0x1f3f670, C4<0>, C4<0>, C4<0>; +L_0x1f399c0 .functor AND 1, L_0x1f39960, L_0x1f42590, C4<1>, C4<1>; +L_0x1f39ab0 .functor OR 1, L_0x1f3fbc0, L_0x1f399c0, C4<0>, C4<0>; +v0x1ecd5c0_0 .net "a", 0 0, L_0x1f42f40; 1 drivers +v0x1ecd680_0 .net "abxor", 0 0, L_0x1f3f670; 1 drivers +v0x1ecd720_0 .net "b", 0 0, L_0x1f42fe0; 1 drivers +v0x1ecd7c0_0 .net "bxorand", 0 0, L_0x1f3fbc0; 1 drivers +v0x1ecd870_0 .alias "defaultCompare", 0 0, v0x1ed3f50_0; +v0x1ecd910_0 .alias "out", 0 0, v0x1ed4020_0; +v0x1ecd990_0 .net "xornot", 0 0, L_0x1f39960; 1 drivers +v0x1ecda10_0 .net "xornotand", 0 0, L_0x1f399c0; 1 drivers +S_0x1eccea0 .scope module, "bit16" "single_slt" 9 90, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f39860 .functor XOR 1, L_0x1f43480, L_0x1f43570, C4<0>, C4<0>; +L_0x1f398c0 .functor AND 1, L_0x1f43570, L_0x1f39860, C4<1>, C4<1>; +L_0x1f43230 .functor NOT 1, L_0x1f39860, C4<0>, C4<0>, C4<0>; +L_0x1f43290 .functor AND 1, L_0x1f43230, L_0x1f39ab0, C4<1>, C4<1>; +L_0x1f433d0 .functor OR 1, L_0x1f398c0, L_0x1f43290, C4<0>, C4<0>; +v0x1eccf90_0 .net "a", 0 0, L_0x1f43480; 1 drivers +v0x1ecd050_0 .net "abxor", 0 0, L_0x1f39860; 1 drivers +v0x1ecd0f0_0 .net "b", 0 0, L_0x1f43570; 1 drivers +v0x1ecd190_0 .net "bxorand", 0 0, L_0x1f398c0; 1 drivers +v0x1ecd240_0 .alias "defaultCompare", 0 0, v0x1ed4020_0; +v0x1ecd2e0_0 .alias "out", 0 0, v0x1ed4160_0; +v0x1ecd360_0 .net "xornot", 0 0, L_0x1f43230; 1 drivers +v0x1ecd3e0_0 .net "xornotand", 0 0, L_0x1f43290; 1 drivers +S_0x1ecc870 .scope module, "bit17" "single_slt" 9 91, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f43080 .functor XOR 1, L_0x1f439d0, L_0x1f43ac0, C4<0>, C4<0>; +L_0x1f430e0 .functor AND 1, L_0x1f43ac0, L_0x1f43080, C4<1>, C4<1>; +L_0x1f43780 .functor NOT 1, L_0x1f43080, C4<0>, C4<0>, C4<0>; +L_0x1f437e0 .functor AND 1, L_0x1f43780, L_0x1f433d0, C4<1>, C4<1>; +L_0x1f43920 .functor OR 1, L_0x1f430e0, L_0x1f437e0, C4<0>, C4<0>; +v0x1ecc960_0 .net "a", 0 0, L_0x1f439d0; 1 drivers +v0x1ecca20_0 .net "abxor", 0 0, L_0x1f43080; 1 drivers +v0x1eccac0_0 .net "b", 0 0, L_0x1f43ac0; 1 drivers +v0x1eccb60_0 .net "bxorand", 0 0, L_0x1f430e0; 1 drivers +v0x1eccc10_0 .alias "defaultCompare", 0 0, v0x1ed4160_0; +v0x1ecccb0_0 .alias "out", 0 0, v0x1ed4230_0; +v0x1eccd30_0 .net "xornot", 0 0, L_0x1f43780; 1 drivers +v0x1eccdb0_0 .net "xornotand", 0 0, L_0x1f437e0; 1 drivers +S_0x1ecc240 .scope module, "bit18" "single_slt" 9 92, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f43610 .functor XOR 1, L_0x1f43f30, L_0x1f44020, C4<0>, C4<0>; +L_0x1f43670 .functor AND 1, L_0x1f44020, L_0x1f43610, C4<1>, C4<1>; +L_0x1f43ce0 .functor NOT 1, L_0x1f43610, C4<0>, C4<0>, C4<0>; +L_0x1f43d40 .functor AND 1, L_0x1f43ce0, L_0x1f43920, C4<1>, C4<1>; +L_0x1f43e80 .functor OR 1, L_0x1f43670, L_0x1f43d40, C4<0>, C4<0>; +v0x1ecc330_0 .net "a", 0 0, L_0x1f43f30; 1 drivers +v0x1ecc3f0_0 .net "abxor", 0 0, L_0x1f43610; 1 drivers +v0x1ecc490_0 .net "b", 0 0, L_0x1f44020; 1 drivers +v0x1ecc530_0 .net "bxorand", 0 0, L_0x1f43670; 1 drivers +v0x1ecc5e0_0 .alias "defaultCompare", 0 0, v0x1ed4230_0; +v0x1ecc680_0 .alias "out", 0 0, v0x1ed4380_0; +v0x1ecc700_0 .net "xornot", 0 0, L_0x1f43ce0; 1 drivers +v0x1ecc780_0 .net "xornotand", 0 0, L_0x1f43d40; 1 drivers +S_0x1ecbc10 .scope module, "bit19" "single_slt" 9 93, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f43b60 .functor XOR 1, L_0x1f444a0, L_0x1f44590, C4<0>, C4<0>; +L_0x1f43bc0 .functor AND 1, L_0x1f44590, L_0x1f43b60, C4<1>, C4<1>; +L_0x1f44250 .functor NOT 1, L_0x1f43b60, C4<0>, C4<0>, C4<0>; +L_0x1f442b0 .functor AND 1, L_0x1f44250, L_0x1f43e80, C4<1>, C4<1>; +L_0x1f443f0 .functor OR 1, L_0x1f43bc0, L_0x1f442b0, C4<0>, C4<0>; +v0x1ecbd00_0 .net "a", 0 0, L_0x1f444a0; 1 drivers +v0x1ecbdc0_0 .net "abxor", 0 0, L_0x1f43b60; 1 drivers +v0x1ecbe60_0 .net "b", 0 0, L_0x1f44590; 1 drivers +v0x1ecbf00_0 .net "bxorand", 0 0, L_0x1f43bc0; 1 drivers +v0x1ecbfb0_0 .alias "defaultCompare", 0 0, v0x1ed4380_0; +v0x1ecc050_0 .alias "out", 0 0, v0x1ed4450_0; +v0x1ecc0d0_0 .net "xornot", 0 0, L_0x1f44250; 1 drivers +v0x1ecc150_0 .net "xornotand", 0 0, L_0x1f442b0; 1 drivers +S_0x1ecb5e0 .scope module, "bit20" "single_slt" 9 94, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f440c0 .functor XOR 1, L_0x1f44a20, L_0x1f44b10, C4<0>, C4<0>; +L_0x1f44120 .functor AND 1, L_0x1f44b10, L_0x1f440c0, C4<1>, C4<1>; +L_0x1f447d0 .functor NOT 1, L_0x1f440c0, C4<0>, C4<0>, C4<0>; +L_0x1f44830 .functor AND 1, L_0x1f447d0, L_0x1f443f0, C4<1>, C4<1>; +L_0x1f44970 .functor OR 1, L_0x1f44120, L_0x1f44830, C4<0>, C4<0>; +v0x1ecb6d0_0 .net "a", 0 0, L_0x1f44a20; 1 drivers +v0x1ecb790_0 .net "abxor", 0 0, L_0x1f440c0; 1 drivers +v0x1ecb830_0 .net "b", 0 0, L_0x1f44b10; 1 drivers +v0x1ecb8d0_0 .net "bxorand", 0 0, L_0x1f44120; 1 drivers +v0x1ecb980_0 .alias "defaultCompare", 0 0, v0x1ed4450_0; +v0x1ecba20_0 .alias "out", 0 0, v0x1ed4600_0; +v0x1ecbaa0_0 .net "xornot", 0 0, L_0x1f447d0; 1 drivers +v0x1ecbb20_0 .net "xornotand", 0 0, L_0x1f44830; 1 drivers +S_0x1ecafb0 .scope module, "bit21" "single_slt" 9 95, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f44630 .functor XOR 1, L_0x1f44fb0, L_0x1f450a0, C4<0>, C4<0>; +L_0x1f44690 .functor AND 1, L_0x1f450a0, L_0x1f44630, C4<1>, C4<1>; +L_0x1f44d60 .functor NOT 1, L_0x1f44630, C4<0>, C4<0>, C4<0>; +L_0x1f44dc0 .functor AND 1, L_0x1f44d60, L_0x1f44970, C4<1>, C4<1>; +L_0x1f44f00 .functor OR 1, L_0x1f44690, L_0x1f44dc0, C4<0>, C4<0>; +v0x1ecb0a0_0 .net "a", 0 0, L_0x1f44fb0; 1 drivers +v0x1ecb160_0 .net "abxor", 0 0, L_0x1f44630; 1 drivers +v0x1ecb200_0 .net "b", 0 0, L_0x1f450a0; 1 drivers +v0x1ecb2a0_0 .net "bxorand", 0 0, L_0x1f44690; 1 drivers +v0x1ecb350_0 .alias "defaultCompare", 0 0, v0x1ed4600_0; +v0x1ecb3f0_0 .alias "out", 0 0, v0x1ed4720_0; +v0x1ecb470_0 .net "xornot", 0 0, L_0x1f44d60; 1 drivers +v0x1ecb4f0_0 .net "xornotand", 0 0, L_0x1f44dc0; 1 drivers +S_0x1eca980 .scope module, "bit22" "single_slt" 9 96, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f44bb0 .functor XOR 1, L_0x1f0bb00, L_0x1f0bbf0, C4<0>, C4<0>; +L_0x1f44c10 .functor AND 1, L_0x1f0bbf0, L_0x1f44bb0, C4<1>, C4<1>; +L_0x1f0b8b0 .functor NOT 1, L_0x1f44bb0, C4<0>, C4<0>, C4<0>; +L_0x1f0b910 .functor AND 1, L_0x1f0b8b0, L_0x1f44f00, C4<1>, C4<1>; +L_0x1f0ba50 .functor OR 1, L_0x1f44c10, L_0x1f0b910, C4<0>, C4<0>; +v0x1ecaa70_0 .net "a", 0 0, L_0x1f0bb00; 1 drivers +v0x1ecab30_0 .net "abxor", 0 0, L_0x1f44bb0; 1 drivers +v0x1ecabd0_0 .net "b", 0 0, L_0x1f0bbf0; 1 drivers +v0x1ecac70_0 .net "bxorand", 0 0, L_0x1f44c10; 1 drivers +v0x1ecad20_0 .alias "defaultCompare", 0 0, v0x1ed4720_0; +v0x1ecadc0_0 .alias "out", 0 0, v0x1ed47f0_0; +v0x1ecae40_0 .net "xornot", 0 0, L_0x1f0b8b0; 1 drivers +v0x1ecaec0_0 .net "xornotand", 0 0, L_0x1f0b910; 1 drivers +S_0x1eca350 .scope module, "bit23" "single_slt" 9 97, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f0be10 .functor XOR 1, L_0x1f46290, L_0x1f46380, C4<0>, C4<0>; +L_0x1f0be70 .functor AND 1, L_0x1f46380, L_0x1f0be10, C4<1>, C4<1>; +L_0x1f0b790 .functor NOT 1, L_0x1f0be10, C4<0>, C4<0>, C4<0>; +L_0x1f0b7f0 .functor AND 1, L_0x1f0b790, L_0x1f0ba50, C4<1>, C4<1>; +L_0x1f461e0 .functor OR 1, L_0x1f0be70, L_0x1f0b7f0, C4<0>, C4<0>; +v0x1eca440_0 .net "a", 0 0, L_0x1f46290; 1 drivers +v0x1eca500_0 .net "abxor", 0 0, L_0x1f0be10; 1 drivers +v0x1eca5a0_0 .net "b", 0 0, L_0x1f46380; 1 drivers +v0x1eca640_0 .net "bxorand", 0 0, L_0x1f0be70; 1 drivers +v0x1eca6f0_0 .alias "defaultCompare", 0 0, v0x1ed47f0_0; +v0x1eca790_0 .alias "out", 0 0, v0x1ed4920_0; +v0x1eca810_0 .net "xornot", 0 0, L_0x1f0b790; 1 drivers +v0x1eca890_0 .net "xornotand", 0 0, L_0x1f0b7f0; 1 drivers +S_0x1ec9d20 .scope module, "bit24" "single_slt" 9 98, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f0bc90 .functor XOR 1, L_0x1f46800, L_0x1f468f0, C4<0>, C4<0>; +L_0x1f0bcf0 .functor AND 1, L_0x1f468f0, L_0x1f0bc90, C4<1>, C4<1>; +L_0x1f465b0 .functor NOT 1, L_0x1f0bc90, C4<0>, C4<0>, C4<0>; +L_0x1f46610 .functor AND 1, L_0x1f465b0, L_0x1f461e0, C4<1>, C4<1>; +L_0x1f46750 .functor OR 1, L_0x1f0bcf0, L_0x1f46610, C4<0>, C4<0>; +v0x1ec9e10_0 .net "a", 0 0, L_0x1f46800; 1 drivers +v0x1ec9ed0_0 .net "abxor", 0 0, L_0x1f0bc90; 1 drivers +v0x1ec9f70_0 .net "b", 0 0, L_0x1f468f0; 1 drivers +v0x1eca010_0 .net "bxorand", 0 0, L_0x1f0bcf0; 1 drivers +v0x1eca0c0_0 .alias "defaultCompare", 0 0, v0x1ed4920_0; +v0x1eca160_0 .alias "out", 0 0, v0x1ed49a0_0; +v0x1eca1e0_0 .net "xornot", 0 0, L_0x1f465b0; 1 drivers +v0x1eca260_0 .net "xornotand", 0 0, L_0x1f46610; 1 drivers +S_0x1ec96f0 .scope module, "bit25" "single_slt" 9 99, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f46420 .functor XOR 1, L_0x1f46d80, L_0x1f46e70, C4<0>, C4<0>; +L_0x1f46480 .functor AND 1, L_0x1f46e70, L_0x1f46420, C4<1>, C4<1>; +L_0x1f46b30 .functor NOT 1, L_0x1f46420, C4<0>, C4<0>, C4<0>; +L_0x1f46b90 .functor AND 1, L_0x1f46b30, L_0x1f46750, C4<1>, C4<1>; +L_0x1f46cd0 .functor OR 1, L_0x1f46480, L_0x1f46b90, C4<0>, C4<0>; +v0x1ec97e0_0 .net "a", 0 0, L_0x1f46d80; 1 drivers +v0x1ec98a0_0 .net "abxor", 0 0, L_0x1f46420; 1 drivers +v0x1ec9940_0 .net "b", 0 0, L_0x1f46e70; 1 drivers +v0x1ec99e0_0 .net "bxorand", 0 0, L_0x1f46480; 1 drivers +v0x1ec9a90_0 .alias "defaultCompare", 0 0, v0x1ed49a0_0; +v0x1ec9b30_0 .alias "out", 0 0, v0x1ed4ae0_0; +v0x1ec9bb0_0 .net "xornot", 0 0, L_0x1f46b30; 1 drivers +v0x1ec9c30_0 .net "xornotand", 0 0, L_0x1f46b90; 1 drivers +S_0x1ec90c0 .scope module, "bit26" "single_slt" 9 100, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f46990 .functor XOR 1, L_0x1f47300, L_0x1f473f0, C4<0>, C4<0>; +L_0x1f469f0 .functor AND 1, L_0x1f473f0, L_0x1f46990, C4<1>, C4<1>; +L_0x1f470c0 .functor NOT 1, L_0x1f46990, C4<0>, C4<0>, C4<0>; +L_0x1f47120 .functor AND 1, L_0x1f470c0, L_0x1f46cd0, C4<1>, C4<1>; +L_0x1ed48c0 .functor OR 1, L_0x1f469f0, L_0x1f47120, C4<0>, C4<0>; +v0x1ec91b0_0 .net "a", 0 0, L_0x1f47300; 1 drivers +v0x1ec9270_0 .net "abxor", 0 0, L_0x1f46990; 1 drivers +v0x1ec9310_0 .net "b", 0 0, L_0x1f473f0; 1 drivers +v0x1ec93b0_0 .net "bxorand", 0 0, L_0x1f469f0; 1 drivers +v0x1ec9460_0 .alias "defaultCompare", 0 0, v0x1ed4ae0_0; +v0x1ec9500_0 .alias "out", 0 0, v0x1ed4b60_0; +v0x1ec9580_0 .net "xornot", 0 0, L_0x1f470c0; 1 drivers +v0x1ec9600_0 .net "xornotand", 0 0, L_0x1f47120; 1 drivers +S_0x1ec8a90 .scope module, "bit27" "single_slt" 9 101, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f46f10 .functor XOR 1, L_0x1f47850, L_0x1f47940, C4<0>, C4<0>; +L_0x1f46f70 .functor AND 1, L_0x1f47940, L_0x1f46f10, C4<1>, C4<1>; +L_0x1f47650 .functor NOT 1, L_0x1f46f10, C4<0>, C4<0>, C4<0>; +L_0x1f476b0 .functor AND 1, L_0x1f47650, L_0x1ed48c0, C4<1>, C4<1>; +L_0x1f477a0 .functor OR 1, L_0x1f46f70, L_0x1f476b0, C4<0>, C4<0>; +v0x1ec8b80_0 .net "a", 0 0, L_0x1f47850; 1 drivers +v0x1ec8c40_0 .net "abxor", 0 0, L_0x1f46f10; 1 drivers +v0x1ec8ce0_0 .net "b", 0 0, L_0x1f47940; 1 drivers +v0x1ec8d80_0 .net "bxorand", 0 0, L_0x1f46f70; 1 drivers +v0x1ec8e30_0 .alias "defaultCompare", 0 0, v0x1ed4b60_0; +v0x1ec8ed0_0 .alias "out", 0 0, v0x1ed4cb0_0; +v0x1ec8f50_0 .net "xornot", 0 0, L_0x1f47650; 1 drivers +v0x1ec8fd0_0 .net "xornotand", 0 0, L_0x1f476b0; 1 drivers +S_0x1ec8490 .scope module, "bit28" "single_slt" 9 102, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f47490 .functor XOR 1, L_0x1f47da0, L_0x1f47e90, C4<0>, C4<0>; +L_0x1f474f0 .functor AND 1, L_0x1f47e90, L_0x1f47490, C4<1>, C4<1>; +L_0x1f475f0 .functor NOT 1, L_0x1f47490, C4<0>, C4<0>, C4<0>; +L_0x1f47bb0 .functor AND 1, L_0x1f475f0, L_0x1f477a0, C4<1>, C4<1>; +L_0x1f47cf0 .functor OR 1, L_0x1f474f0, L_0x1f47bb0, C4<0>, C4<0>; +v0x1ec8580_0 .net "a", 0 0, L_0x1f47da0; 1 drivers +v0x1ec8640_0 .net "abxor", 0 0, L_0x1f47490; 1 drivers +v0x1ec86e0_0 .net "b", 0 0, L_0x1f47e90; 1 drivers +v0x1ec8780_0 .net "bxorand", 0 0, L_0x1f474f0; 1 drivers +v0x1ec8800_0 .alias "defaultCompare", 0 0, v0x1ed4cb0_0; +v0x1ec88a0_0 .alias "out", 0 0, v0x1ed4d30_0; +v0x1ec8920_0 .net "xornot", 0 0, L_0x1f475f0; 1 drivers +v0x1ec89a0_0 .net "xornotand", 0 0, L_0x1f47bb0; 1 drivers +S_0x1ec7e90 .scope module, "bit29" "single_slt" 9 103, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f479e0 .functor XOR 1, L_0x1f48300, L_0x1f483f0, C4<0>, C4<0>; +L_0x1f47a40 .functor AND 1, L_0x1f483f0, L_0x1f479e0, C4<1>, C4<1>; +L_0x1f47b40 .functor NOT 1, L_0x1f479e0, C4<0>, C4<0>, C4<0>; +L_0x1f48110 .functor AND 1, L_0x1f47b40, L_0x1f47cf0, C4<1>, C4<1>; +L_0x1f48250 .functor OR 1, L_0x1f47a40, L_0x1f48110, C4<0>, C4<0>; +v0x1ec7f80_0 .net "a", 0 0, L_0x1f48300; 1 drivers +v0x1ec8040_0 .net "abxor", 0 0, L_0x1f479e0; 1 drivers +v0x1ec80e0_0 .net "b", 0 0, L_0x1f483f0; 1 drivers +v0x1ec8180_0 .net "bxorand", 0 0, L_0x1f47a40; 1 drivers +v0x1ec8200_0 .alias "defaultCompare", 0 0, v0x1ed4d30_0; +v0x1ec82a0_0 .alias "out", 0 0, v0x1ed4c30_0; +v0x1ec8320_0 .net "xornot", 0 0, L_0x1f47b40; 1 drivers +v0x1ec83a0_0 .net "xornotand", 0 0, L_0x1f48110; 1 drivers +S_0x1ec7890 .scope module, "bit30" "single_slt" 9 104, 9 1, S_0x1ec71b0; + .timescale 0 0; +L_0x1f47f30 .functor XOR 1, L_0x1f48870, L_0x1f48960, C4<0>, C4<0>; +L_0x1f47f90 .functor AND 1, L_0x1f48960, L_0x1f47f30, C4<1>, C4<1>; +L_0x1f48090 .functor NOT 1, L_0x1f47f30, C4<0>, C4<0>, C4<0>; +L_0x1f48680 .functor AND 1, L_0x1f48090, L_0x1f48250, C4<1>, C4<1>; +L_0x1f487c0 .functor OR 1, L_0x1f47f90, L_0x1f48680, C4<0>, C4<0>; +v0x1ec7980_0 .net "a", 0 0, L_0x1f48870; 1 drivers +v0x1ec7a40_0 .net "abxor", 0 0, L_0x1f47f30; 1 drivers +v0x1ec7ae0_0 .net "b", 0 0, L_0x1f48960; 1 drivers +v0x1ec7b80_0 .net "bxorand", 0 0, L_0x1f47f90; 1 drivers +v0x1ec7c00_0 .alias "defaultCompare", 0 0, v0x1ed4c30_0; +v0x1ec7ca0_0 .alias "out", 0 0, v0x1ed4e00_0; +v0x1ec7d20_0 .net "xornot", 0 0, L_0x1f48090; 1 drivers +v0x1ec7da0_0 .net "xornotand", 0 0, L_0x1f48680; 1 drivers +S_0x1ec72a0 .scope module, "bit31" "single_slt_reversed" 9 106, 9 19, S_0x1ec71b0; + .timescale 0 0; +L_0x1f485d0 .functor XOR 1, L_0x1f48a00, L_0x1f48aa0, C4<0>, C4<0>; +L_0x1f48c00 .functor AND 1, L_0x1f48a00, L_0x1f485d0, C4<1>, C4<1>; +L_0x1f48cb0 .functor NOT 1, L_0x1f485d0, C4<0>, C4<0>, C4<0>; +L_0x1f48d10 .functor AND 1, L_0x1f48cb0, L_0x1f487c0, C4<1>, C4<1>; +L_0x1f48e50 .functor OR 1, L_0x1f48c00, L_0x1f48d10, C4<0>, C4<0>; +v0x1ec7390_0 .net "a", 0 0, L_0x1f48a00; 1 drivers +v0x1ec7450_0 .net "abxor", 0 0, L_0x1f485d0; 1 drivers +v0x1ec74f0_0 .net "axorand", 0 0, L_0x1f48c00; 1 drivers +v0x1ec7590_0 .net "b", 0 0, L_0x1f48aa0; 1 drivers +v0x1ec7610_0 .alias "defaultCompare", 0 0, v0x1ed4e00_0; +v0x1ec76b0_0 .net "out", 0 0, L_0x1f48e50; 1 drivers +v0x1ec7750_0 .net "xornot", 0 0, L_0x1f48cb0; 1 drivers +v0x1ec77f0_0 .net "xornotand", 0 0, L_0x1f48d10; 1 drivers +S_0x1ec2f60 .scope module, "and0" "and_32bit" 6 37, 10 1, S_0x1eb65d0; + .timescale 0 0; +L_0x1f492b0 .functor AND 1, L_0x1f49360, L_0x1f49450, C4<1>, C4<1>; +L_0x1f495e0 .functor AND 1, L_0x1f49690, L_0x1f49780, C4<1>, C4<1>; +L_0x1f499a0 .functor AND 1, L_0x1f49a00, L_0x1f49b40, C4<1>, C4<1>; +L_0x1f49d30 .functor AND 1, L_0x1f49d90, L_0x1f49e80, C4<1>, C4<1>; +L_0x1f49cd0 .functor AND 1, L_0x1f4a0d0, L_0x1f4a240, C4<1>, C4<1>; +L_0x1f4a460 .functor AND 1, L_0x1f4a510, L_0x1f4a600, C4<1>, C4<1>; +L_0x1f4a3d0 .functor AND 1, L_0x1f4a940, L_0x1f4a6f0, C4<1>, C4<1>; +L_0x1f4aa30 .functor AND 1, L_0x1f4ace0, L_0x1f4add0, C4<1>, C4<1>; +L_0x1f4af90 .functor AND 1, L_0x1f4b040, L_0x1f4aec0, C4<1>, C4<1>; +L_0x1f4b130 .functor AND 1, L_0x1f4b450, L_0x1f4b4f0, C4<1>, C4<1>; +L_0x1f4b6e0 .functor AND 1, L_0x1f4b740, L_0x1f4b5e0, C4<1>, C4<1>; +L_0x1f4b830 .functor AND 1, L_0x1f4bb00, L_0x1f4bba0, C4<1>, C4<1>; +L_0x1f4b3f0 .functor AND 1, L_0x1f4bdc0, L_0x1f4bc90, C4<1>, C4<1>; +L_0x1f4beb0 .functor AND 1, L_0x1f4c1e0, L_0x1f4c280, C4<1>, C4<1>; +L_0x1f4c130 .functor AND 1, L_0x1f4a830, L_0x1f4c370, C4<1>, C4<1>; +L_0x1f4c460 .functor AND 1, L_0x1f4ca70, L_0x1f4cb10, C4<1>, C4<1>; +L_0x1f4c990 .functor AND 1, L_0x1f4cd90, L_0x1f4cc00, C4<1>, C4<1>; +L_0x1f4d030 .functor AND 1, L_0x1f4d180, L_0x1f4d220, C4<1>, C4<1>; +L_0x1f4cf20 .functor AND 1, L_0x1f4d4d0, L_0x1f4d310, C4<1>, C4<1>; +L_0x1f4d750 .functor AND 1, L_0x1f4d0e0, L_0x1f4d900, C4<1>, C4<1>; +L_0x1f4d610 .functor AND 1, L_0x1f4dbe0, L_0x1f4d9f0, C4<1>, C4<1>; +L_0x1f4db80 .functor AND 1, L_0x1f4d800, L_0x1f4dff0, C4<1>, C4<1>; +L_0x1f4dd20 .functor AND 1, L_0x1f4ddd0, L_0x1f4e0e0, C4<1>, C4<1>; +L_0x1f4e270 .functor AND 1, L_0x1f4dee0, L_0x1f4e700, C4<1>, C4<1>; +L_0x1f4e3f0 .functor AND 1, L_0x1f4e4a0, L_0x1f4ea50, C4<1>, C4<1>; +L_0x1f4e7f0 .functor AND 1, L_0x1f4e980, L_0x1f4ee50, C4<1>, C4<1>; +L_0x1f4ec80 .functor AND 1, L_0x1f4ed30, L_0x1f4f180, C4<1>, C4<1>; +L_0x1f4eef0 .functor AND 1, L_0x1f4e8a0, L_0x1f4f0e0, C4<1>, C4<1>; +L_0x1f4f3b0 .functor AND 1, L_0x1f4f460, L_0x1f4f8c0, C4<1>, C4<1>; +L_0x1f4f600 .functor AND 1, L_0x1f4efa0, L_0x1f4f7b0, C4<1>, C4<1>; +L_0x1ec4370 .functor AND 1, L_0x1f4c4d0, L_0x1f4c5c0, C4<1>, C4<1>; +L_0x1f4faa0 .functor AND 1, L_0x1f4f6b0, L_0x1f50490, C4<1>, C4<1>; +v0x1ec3050_0 .net *"_s0", 0 0, L_0x1f492b0; 1 drivers +v0x1ec30f0_0 .net *"_s101", 0 0, L_0x1f4cc00; 1 drivers +v0x1ec3190_0 .net *"_s102", 0 0, L_0x1f4d030; 1 drivers +v0x1ec3230_0 .net *"_s105", 0 0, L_0x1f4d180; 1 drivers +v0x1ec32b0_0 .net *"_s107", 0 0, L_0x1f4d220; 1 drivers +v0x1ec3350_0 .net *"_s108", 0 0, L_0x1f4cf20; 1 drivers +v0x1ec33f0_0 .net *"_s11", 0 0, L_0x1f49780; 1 drivers +v0x1ec3490_0 .net *"_s111", 0 0, L_0x1f4d4d0; 1 drivers +v0x1ec3580_0 .net *"_s113", 0 0, L_0x1f4d310; 1 drivers +v0x1ec3620_0 .net *"_s114", 0 0, L_0x1f4d750; 1 drivers +v0x1ec36c0_0 .net *"_s117", 0 0, L_0x1f4d0e0; 1 drivers +v0x1ec3760_0 .net *"_s119", 0 0, L_0x1f4d900; 1 drivers +v0x1ec3800_0 .net *"_s12", 0 0, L_0x1f499a0; 1 drivers +v0x1ec38a0_0 .net *"_s120", 0 0, L_0x1f4d610; 1 drivers +v0x1ec39c0_0 .net *"_s123", 0 0, L_0x1f4dbe0; 1 drivers +v0x1ec3a60_0 .net *"_s125", 0 0, L_0x1f4d9f0; 1 drivers +v0x1ec3920_0 .net *"_s126", 0 0, L_0x1f4db80; 1 drivers +v0x1ec3bb0_0 .net *"_s129", 0 0, L_0x1f4d800; 1 drivers +v0x1ec3cd0_0 .net *"_s131", 0 0, L_0x1f4dff0; 1 drivers +v0x1ec3d50_0 .net *"_s132", 0 0, L_0x1f4dd20; 1 drivers +v0x1ec3c30_0 .net *"_s135", 0 0, L_0x1f4ddd0; 1 drivers +v0x1ec3e80_0 .net *"_s137", 0 0, L_0x1f4e0e0; 1 drivers +v0x1ec3dd0_0 .net *"_s138", 0 0, L_0x1f4e270; 1 drivers +v0x1ec3fc0_0 .net *"_s141", 0 0, L_0x1f4dee0; 1 drivers +v0x1ec3f20_0 .net *"_s143", 0 0, L_0x1f4e700; 1 drivers +v0x1ec4110_0 .net *"_s144", 0 0, L_0x1f4e3f0; 1 drivers +v0x1ec4060_0 .net *"_s147", 0 0, L_0x1f4e4a0; 1 drivers +v0x1ec4270_0 .net *"_s149", 0 0, L_0x1f4ea50; 1 drivers +v0x1ec41b0_0 .net *"_s15", 0 0, L_0x1f49a00; 1 drivers +v0x1ec43e0_0 .net *"_s150", 0 0, L_0x1f4e7f0; 1 drivers +v0x1ec42f0_0 .net *"_s153", 0 0, L_0x1f4e980; 1 drivers +v0x1ec4560_0 .net *"_s155", 0 0, L_0x1f4ee50; 1 drivers +v0x1ec4460_0 .net *"_s156", 0 0, L_0x1f4ec80; 1 drivers +v0x1ec46f0_0 .net *"_s159", 0 0, L_0x1f4ed30; 1 drivers +v0x1ec45e0_0 .net *"_s161", 0 0, L_0x1f4f180; 1 drivers +v0x1ec4890_0 .net *"_s162", 0 0, L_0x1f4eef0; 1 drivers +v0x1ec4770_0 .net *"_s165", 0 0, L_0x1f4e8a0; 1 drivers +v0x1ec4810_0 .net *"_s167", 0 0, L_0x1f4f0e0; 1 drivers +v0x1ec4a50_0 .net *"_s168", 0 0, L_0x1f4f3b0; 1 drivers +v0x1ec4ad0_0 .net *"_s17", 0 0, L_0x1f49b40; 1 drivers +v0x1ec4910_0 .net *"_s171", 0 0, L_0x1f4f460; 1 drivers +v0x1ec49b0_0 .net *"_s173", 0 0, L_0x1f4f8c0; 1 drivers +v0x1ec4cb0_0 .net *"_s174", 0 0, L_0x1f4f600; 1 drivers +v0x1ec4d30_0 .net *"_s177", 0 0, L_0x1f4efa0; 1 drivers +v0x1ec4b50_0 .net *"_s179", 0 0, L_0x1f4f7b0; 1 drivers +v0x1ec4bf0_0 .net *"_s18", 0 0, L_0x1f49d30; 1 drivers +v0x1ec4f30_0 .net *"_s180", 0 0, L_0x1ec4370; 1 drivers +v0x1ec4fb0_0 .net *"_s183", 0 0, L_0x1f4c4d0; 1 drivers +v0x1ec4dd0_0 .net *"_s185", 0 0, L_0x1f4c5c0; 1 drivers +v0x1ec4e70_0 .net *"_s186", 0 0, L_0x1f4faa0; 1 drivers +v0x1ec51d0_0 .net *"_s189", 0 0, L_0x1f4f6b0; 1 drivers +v0x1ec5250_0 .net *"_s191", 0 0, L_0x1f50490; 1 drivers +v0x1ec5050_0 .net *"_s21", 0 0, L_0x1f49d90; 1 drivers +v0x1ec50f0_0 .net *"_s23", 0 0, L_0x1f49e80; 1 drivers +v0x1ec5490_0 .net *"_s24", 0 0, L_0x1f49cd0; 1 drivers +v0x1ec5510_0 .net *"_s27", 0 0, L_0x1f4a0d0; 1 drivers +v0x1ec52d0_0 .net *"_s29", 0 0, L_0x1f4a240; 1 drivers +v0x1ec5370_0 .net *"_s3", 0 0, L_0x1f49360; 1 drivers +v0x1ec5410_0 .net *"_s30", 0 0, L_0x1f4a460; 1 drivers +v0x1ec5790_0 .net *"_s33", 0 0, L_0x1f4a510; 1 drivers +v0x1ec55b0_0 .net *"_s35", 0 0, L_0x1f4a600; 1 drivers +v0x1ec5650_0 .net *"_s36", 0 0, L_0x1f4a3d0; 1 drivers +v0x1ec56f0_0 .net *"_s39", 0 0, L_0x1f4a940; 1 drivers +v0x1ec5a30_0 .net *"_s41", 0 0, L_0x1f4a6f0; 1 drivers +v0x1ec5830_0 .net *"_s42", 0 0, L_0x1f4aa30; 1 drivers +v0x1ec58d0_0 .net *"_s45", 0 0, L_0x1f4ace0; 1 drivers +v0x1ec5970_0 .net *"_s47", 0 0, L_0x1f4add0; 1 drivers +v0x1ec5cd0_0 .net *"_s48", 0 0, L_0x1f4af90; 1 drivers +v0x1ec5ad0_0 .net *"_s5", 0 0, L_0x1f49450; 1 drivers +v0x1ec5b70_0 .net *"_s51", 0 0, L_0x1f4b040; 1 drivers +v0x1ec5c10_0 .net *"_s53", 0 0, L_0x1f4aec0; 1 drivers +v0x1ec5f90_0 .net *"_s54", 0 0, L_0x1f4b130; 1 drivers +v0x1ec5d50_0 .net *"_s57", 0 0, L_0x1f4b450; 1 drivers +v0x1ec5df0_0 .net *"_s59", 0 0, L_0x1f4b4f0; 1 drivers +v0x1ec5e90_0 .net *"_s6", 0 0, L_0x1f495e0; 1 drivers +v0x1ec6270_0 .net *"_s60", 0 0, L_0x1f4b6e0; 1 drivers +v0x1ec6010_0 .net *"_s63", 0 0, L_0x1f4b740; 1 drivers +v0x1ec60b0_0 .net *"_s65", 0 0, L_0x1f4b5e0; 1 drivers +v0x1ec6150_0 .net *"_s66", 0 0, L_0x1f4b830; 1 drivers +v0x1ec61f0_0 .net *"_s69", 0 0, L_0x1f4bb00; 1 drivers +v0x1ec6580_0 .net *"_s71", 0 0, L_0x1f4bba0; 1 drivers +v0x1ec6600_0 .net *"_s72", 0 0, L_0x1f4b3f0; 1 drivers +v0x1ec6310_0 .net *"_s75", 0 0, L_0x1f4bdc0; 1 drivers +v0x1ec63b0_0 .net *"_s77", 0 0, L_0x1f4bc90; 1 drivers +v0x1ec6450_0 .net *"_s78", 0 0, L_0x1f4beb0; 1 drivers +v0x1ec64f0_0 .net *"_s81", 0 0, L_0x1f4c1e0; 1 drivers +v0x1ec6960_0 .net *"_s83", 0 0, L_0x1f4c280; 1 drivers +v0x1ec6a00_0 .net *"_s84", 0 0, L_0x1f4c130; 1 drivers +v0x1ec66a0_0 .net *"_s87", 0 0, L_0x1f4a830; 1 drivers +v0x1ec6740_0 .net *"_s89", 0 0, L_0x1f4c370; 1 drivers +v0x1ec67e0_0 .net *"_s9", 0 0, L_0x1f49690; 1 drivers +v0x1ec6880_0 .net *"_s90", 0 0, L_0x1f4c460; 1 drivers +v0x1ec6d70_0 .net *"_s93", 0 0, L_0x1f4ca70; 1 drivers +v0x1ec6df0_0 .net *"_s95", 0 0, L_0x1f4cb10; 1 drivers +v0x1ec6aa0_0 .net *"_s96", 0 0, L_0x1f4c990; 1 drivers +v0x1ec6b40_0 .net *"_s99", 0 0, L_0x1f4cd90; 1 drivers +v0x1ec6be0_0 .alias "a", 31 0, v0x1f02500_0; +v0x1ec6c60_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ec6ce0_0 .alias "out", 31 0, v0x1f019a0_0; +L_0x1f49210 .part/pv L_0x1f492b0, 0, 1, 32; +L_0x1f49360 .part v0x1f031c0_0, 0, 1; +L_0x1f49450 .part v0x1f023a0_0, 0, 1; +L_0x1f49540 .part/pv L_0x1f495e0, 1, 1, 32; +L_0x1f49690 .part v0x1f031c0_0, 1, 1; +L_0x1f49780 .part v0x1f023a0_0, 1, 1; +L_0x1f49870 .part/pv L_0x1f499a0, 2, 1, 32; +L_0x1f49a00 .part v0x1f031c0_0, 2, 1; +L_0x1f49b40 .part v0x1f023a0_0, 2, 1; +L_0x1f49c30 .part/pv L_0x1f49d30, 3, 1, 32; +L_0x1f49d90 .part v0x1f031c0_0, 3, 1; +L_0x1f49e80 .part v0x1f023a0_0, 3, 1; +L_0x1f49fe0 .part/pv L_0x1f49cd0, 4, 1, 32; +L_0x1f4a0d0 .part v0x1f031c0_0, 4, 1; +L_0x1f4a240 .part v0x1f023a0_0, 4, 1; +L_0x1f4a330 .part/pv L_0x1f4a460, 5, 1, 32; +L_0x1f4a510 .part v0x1f031c0_0, 5, 1; +L_0x1f4a600 .part v0x1f023a0_0, 5, 1; +L_0x1f4a790 .part/pv L_0x1f4a3d0, 6, 1, 32; +L_0x1f4a940 .part v0x1f031c0_0, 6, 1; +L_0x1f4a6f0 .part v0x1f023a0_0, 6, 1; +L_0x1f4ab30 .part/pv L_0x1f4aa30, 7, 1, 32; +L_0x1f4ace0 .part v0x1f031c0_0, 7, 1; +L_0x1f4add0 .part v0x1f023a0_0, 7, 1; +L_0x1f4abd0 .part/pv L_0x1f4af90, 8, 1, 32; +L_0x1f4b040 .part v0x1f031c0_0, 8, 1; +L_0x1f4aec0 .part v0x1f023a0_0, 8, 1; +L_0x1f4b260 .part/pv L_0x1f4b130, 9, 1, 32; +L_0x1f4b450 .part v0x1f031c0_0, 9, 1; +L_0x1f4b4f0 .part v0x1f023a0_0, 9, 1; +L_0x1f4b300 .part/pv L_0x1f4b6e0, 10, 1, 32; +L_0x1f4b740 .part v0x1f031c0_0, 10, 1; +L_0x1f4b5e0 .part v0x1f023a0_0, 10, 1; +L_0x1f4b940 .part/pv L_0x1f4b830, 11, 1, 32; +L_0x1f4bb00 .part v0x1f031c0_0, 11, 1; +L_0x1f4bba0 .part v0x1f023a0_0, 11, 1; +L_0x1f4b9e0 .part/pv L_0x1f4b3f0, 12, 1, 32; +L_0x1f4bdc0 .part v0x1f031c0_0, 12, 1; +L_0x1f4bc90 .part v0x1f023a0_0, 12, 1; +L_0x1f4bff0 .part/pv L_0x1f4beb0, 13, 1, 32; +L_0x1f4c1e0 .part v0x1f031c0_0, 13, 1; +L_0x1f4c280 .part v0x1f023a0_0, 13, 1; +L_0x1f4c090 .part/pv L_0x1f4c130, 14, 1, 32; +L_0x1f4a830 .part v0x1f031c0_0, 14, 1; +L_0x1f4c370 .part v0x1f023a0_0, 14, 1; +L_0x1f4c850 .part/pv L_0x1f4c460, 15, 1, 32; +L_0x1f4ca70 .part v0x1f031c0_0, 15, 1; +L_0x1f4cb10 .part v0x1f023a0_0, 15, 1; +L_0x1f4c8f0 .part/pv L_0x1f4c990, 16, 1, 32; +L_0x1f4cd90 .part v0x1f031c0_0, 16, 1; +L_0x1f4cc00 .part v0x1f023a0_0, 16, 1; +L_0x1f4ccf0 .part/pv L_0x1f4d030, 17, 1, 32; +L_0x1f4d180 .part v0x1f031c0_0, 17, 1; +L_0x1f4d220 .part v0x1f023a0_0, 17, 1; +L_0x1f4ce80 .part/pv L_0x1f4cf20, 18, 1, 32; +L_0x1f4d4d0 .part v0x1f031c0_0, 18, 1; +L_0x1f4d310 .part v0x1f023a0_0, 18, 1; +L_0x1f4d400 .part/pv L_0x1f4d750, 19, 1, 32; +L_0x1f4d0e0 .part v0x1f031c0_0, 19, 1; +L_0x1f4d900 .part v0x1f023a0_0, 19, 1; +L_0x1f4d570 .part/pv L_0x1f4d610, 20, 1, 32; +L_0x1f4dbe0 .part v0x1f031c0_0, 20, 1; +L_0x1f4d9f0 .part v0x1f023a0_0, 20, 1; +L_0x1f4dae0 .part/pv L_0x1f4db80, 21, 1, 32; +L_0x1f4d800 .part v0x1f031c0_0, 21, 1; +L_0x1f4dff0 .part v0x1f023a0_0, 21, 1; +L_0x1f4dc80 .part/pv L_0x1f4dd20, 22, 1, 32; +L_0x1f4ddd0 .part v0x1f031c0_0, 22, 1; +L_0x1f4e0e0 .part v0x1f023a0_0, 22, 1; +L_0x1f4e1d0 .part/pv L_0x1f4e270, 23, 1, 32; +L_0x1f4dee0 .part v0x1f031c0_0, 23, 1; +L_0x1f4e700 .part v0x1f023a0_0, 23, 1; +L_0x1f4e350 .part/pv L_0x1f4e3f0, 24, 1, 32; +L_0x1f4e4a0 .part v0x1f031c0_0, 24, 1; +L_0x1f4ea50 .part v0x1f023a0_0, 24, 1; +L_0x1f4eb40 .part/pv L_0x1f4e7f0, 25, 1, 32; +L_0x1f4e980 .part v0x1f031c0_0, 25, 1; +L_0x1f4ee50 .part v0x1f023a0_0, 25, 1; +L_0x1f4ebe0 .part/pv L_0x1f4ec80, 26, 1, 32; +L_0x1f4ed30 .part v0x1f031c0_0, 26, 1; +L_0x1f4f180 .part v0x1f023a0_0, 26, 1; +L_0x1f4f270 .part/pv L_0x1f4eef0, 27, 1, 32; +L_0x1f4e8a0 .part v0x1f031c0_0, 27, 1; +L_0x1f4f0e0 .part v0x1f023a0_0, 27, 1; +L_0x1f4f310 .part/pv L_0x1f4f3b0, 28, 1, 32; +L_0x1f4f460 .part v0x1f031c0_0, 28, 1; +L_0x1f4f8c0 .part v0x1f023a0_0, 28, 1; +L_0x1f4f960 .part/pv L_0x1f4f600, 29, 1, 32; +L_0x1f4efa0 .part v0x1f031c0_0, 29, 1; +L_0x1f4f7b0 .part v0x1f023a0_0, 29, 1; +L_0x1f4fce0 .part/pv L_0x1ec4370, 30, 1, 32; +L_0x1f4c4d0 .part v0x1f031c0_0, 30, 1; +L_0x1f4c5c0 .part v0x1f023a0_0, 30, 1; +L_0x1f4fa00 .part/pv L_0x1f4faa0, 31, 1, 32; +L_0x1f4f6b0 .part v0x1f031c0_0, 31, 1; +L_0x1f50490 .part v0x1f023a0_0, 31, 1; +S_0x1ebecd0 .scope module, "nand0" "nand_32bit" 6 38, 11 1, S_0x1eb65d0; + .timescale 0 0; +L_0x1f50280 .functor NAND 1, L_0x1f50330, L_0x1f50840, C4<1>, C4<1>; +L_0x1f4a1c0 .functor NAND 1, L_0x1f50980, L_0x1f50a70, C4<1>, C4<1>; +L_0x1f50c90 .functor NAND 1, L_0x1f50cf0, L_0x1f50e30, C4<1>, C4<1>; +L_0x1f51020 .functor NAND 1, L_0x1f51080, L_0x1f51170, C4<1>, C4<1>; +L_0x1f50fc0 .functor NAND 1, L_0x1f513c0, L_0x1f51530, C4<1>, C4<1>; +L_0x1f51750 .functor NAND 1, L_0x1f51800, L_0x1f518f0, C4<1>, C4<1>; +L_0x1f516c0 .functor NAND 1, L_0x1f51c30, L_0x1f519e0, C4<1>, C4<1>; +L_0x1f51d20 .functor NAND 1, L_0x1f51fd0, L_0x1f520c0, C4<1>, C4<1>; +L_0x1f52280 .functor NAND 1, L_0x1f52330, L_0x1f521b0, C4<1>, C4<1>; +L_0x1f52420 .functor NAND 1, L_0x1f52740, L_0x1f527e0, C4<1>, C4<1>; +L_0x1f529d0 .functor NAND 1, L_0x1f52a30, L_0x1f528d0, C4<1>, C4<1>; +L_0x1f52b20 .functor NAND 1, L_0x1f52df0, L_0x1f52e90, C4<1>, C4<1>; +L_0x1f526e0 .functor NAND 1, L_0x1f530b0, L_0x1f52f80, C4<1>, C4<1>; +L_0x1f531a0 .functor NAND 1, L_0x1f534d0, L_0x1f53570, C4<1>, C4<1>; +L_0x1f53420 .functor NAND 1, L_0x1f51b20, L_0x1f53660, C4<1>, C4<1>; +L_0x1f00f40 .functor NAND 1, L_0x1f427c0, L_0x1f42ac0, C4<1>, C4<1>; +L_0x1f429e0 .functor NAND 1, L_0x1f42d40, L_0x1f42e30, C4<1>, C4<1>; +L_0x1f42c50 .functor NAND 1, L_0x1f54c30, L_0x1f54cd0, C4<1>, C4<1>; +L_0x1f54a80 .functor NAND 1, L_0x1f54f80, L_0x1f54dc0, C4<1>, C4<1>; +L_0x1f55200 .functor NAND 1, L_0x1f54b90, L_0x1f553b0, C4<1>, C4<1>; +L_0x1f550c0 .functor NAND 1, L_0x1f55690, L_0x1f554a0, C4<1>, C4<1>; +L_0x1f55630 .functor NAND 1, L_0x1f552b0, L_0x1f55aa0, C4<1>, C4<1>; +L_0x1f557d0 .functor NAND 1, L_0x1f55880, L_0x1f55b90, C4<1>, C4<1>; +L_0x1f55d20 .functor NAND 1, L_0x1f55990, L_0x1f561b0, C4<1>, C4<1>; +L_0x1f55ea0 .functor NAND 1, L_0x1f55f50, L_0x1f56500, C4<1>, C4<1>; +L_0x1f562a0 .functor NAND 1, L_0x1f56430, L_0x1f56900, C4<1>, C4<1>; +L_0x1f56730 .functor NAND 1, L_0x1f567e0, L_0x1f56c30, C4<1>, C4<1>; +L_0x1f514b0 .functor NAND 1, L_0x1f56350, L_0x1f56ae0, C4<1>, C4<1>; +L_0x1f56bd0 .functor NAND 1, L_0x1f57160, L_0x1f56dc0, C4<1>, C4<1>; +L_0x1f56f50 .functor NAND 1, L_0x1f569a0, L_0x1f57620, C4<1>, C4<1>; +L_0x1ec00c0 .functor NAND 1, L_0x1f57340, L_0x1f57430, C4<1>, C4<1>; +L_0x1f53840 .functor NAND 1, L_0x1f538f0, L_0x1f57570, C4<1>, C4<1>; +v0x1ebedc0_0 .net *"_s0", 0 0, L_0x1f50280; 1 drivers +v0x1ebee60_0 .net *"_s101", 0 0, L_0x1f42e30; 1 drivers +v0x1ebef00_0 .net *"_s102", 0 0, L_0x1f42c50; 1 drivers +v0x1ebefa0_0 .net *"_s105", 0 0, L_0x1f54c30; 1 drivers +v0x1ebf050_0 .net *"_s107", 0 0, L_0x1f54cd0; 1 drivers +v0x1ebf0f0_0 .net *"_s108", 0 0, L_0x1f54a80; 1 drivers +v0x1ebf190_0 .net *"_s11", 0 0, L_0x1f50a70; 1 drivers +v0x1ebf230_0 .net *"_s111", 0 0, L_0x1f54f80; 1 drivers +v0x1ebf2d0_0 .net *"_s113", 0 0, L_0x1f54dc0; 1 drivers +v0x1ebf370_0 .net *"_s114", 0 0, L_0x1f55200; 1 drivers +v0x1ebf410_0 .net *"_s117", 0 0, L_0x1f54b90; 1 drivers +v0x1ebf4b0_0 .net *"_s119", 0 0, L_0x1f553b0; 1 drivers +v0x1ebf550_0 .net *"_s12", 0 0, L_0x1f50c90; 1 drivers +v0x1ebf5f0_0 .net *"_s120", 0 0, L_0x1f550c0; 1 drivers +v0x1ebf710_0 .net *"_s123", 0 0, L_0x1f55690; 1 drivers +v0x1ebf7b0_0 .net *"_s125", 0 0, L_0x1f554a0; 1 drivers +v0x1ebf670_0 .net *"_s126", 0 0, L_0x1f55630; 1 drivers +v0x1ebf900_0 .net *"_s129", 0 0, L_0x1f552b0; 1 drivers +v0x1ebfa20_0 .net *"_s131", 0 0, L_0x1f55aa0; 1 drivers +v0x1ebfaa0_0 .net *"_s132", 0 0, L_0x1f557d0; 1 drivers +v0x1ebf980_0 .net *"_s135", 0 0, L_0x1f55880; 1 drivers +v0x1ebfbd0_0 .net *"_s137", 0 0, L_0x1f55b90; 1 drivers +v0x1ebfb20_0 .net *"_s138", 0 0, L_0x1f55d20; 1 drivers +v0x1ebfd10_0 .net *"_s141", 0 0, L_0x1f55990; 1 drivers +v0x1ebfc70_0 .net *"_s143", 0 0, L_0x1f561b0; 1 drivers +v0x1ebfe60_0 .net *"_s144", 0 0, L_0x1f55ea0; 1 drivers +v0x1ebfdb0_0 .net *"_s147", 0 0, L_0x1f55f50; 1 drivers +v0x1ebffc0_0 .net *"_s149", 0 0, L_0x1f56500; 1 drivers +v0x1ebff00_0 .net *"_s15", 0 0, L_0x1f50cf0; 1 drivers +v0x1ec0130_0 .net *"_s150", 0 0, L_0x1f562a0; 1 drivers +v0x1ec0040_0 .net *"_s153", 0 0, L_0x1f56430; 1 drivers +v0x1ec02b0_0 .net *"_s155", 0 0, L_0x1f56900; 1 drivers +v0x1ec01b0_0 .net *"_s156", 0 0, L_0x1f56730; 1 drivers +v0x1ec0440_0 .net *"_s159", 0 0, L_0x1f567e0; 1 drivers +v0x1ec0330_0 .net *"_s161", 0 0, L_0x1f56c30; 1 drivers +v0x1ec05e0_0 .net *"_s162", 0 0, L_0x1f514b0; 1 drivers +v0x1ec04c0_0 .net *"_s165", 0 0, L_0x1f56350; 1 drivers +v0x1ec0560_0 .net *"_s167", 0 0, L_0x1f56ae0; 1 drivers +v0x1ec07a0_0 .net *"_s168", 0 0, L_0x1f56bd0; 1 drivers +v0x1ec0820_0 .net *"_s17", 0 0, L_0x1f50e30; 1 drivers +v0x1ec0660_0 .net *"_s171", 0 0, L_0x1f57160; 1 drivers +v0x1ec0700_0 .net *"_s173", 0 0, L_0x1f56dc0; 1 drivers +v0x1ec0a00_0 .net *"_s174", 0 0, L_0x1f56f50; 1 drivers +v0x1ec0a80_0 .net *"_s177", 0 0, L_0x1f569a0; 1 drivers +v0x1ec08a0_0 .net *"_s179", 0 0, L_0x1f57620; 1 drivers +v0x1ec0940_0 .net *"_s18", 0 0, L_0x1f51020; 1 drivers +v0x1ec0c80_0 .net *"_s180", 0 0, L_0x1ec00c0; 1 drivers +v0x1ec0d00_0 .net *"_s183", 0 0, L_0x1f57340; 1 drivers +v0x1ec0b20_0 .net *"_s185", 0 0, L_0x1f57430; 1 drivers +v0x1ec0bc0_0 .net *"_s186", 0 0, L_0x1f53840; 1 drivers +v0x1ec0f20_0 .net *"_s189", 0 0, L_0x1f538f0; 1 drivers +v0x1ec0fa0_0 .net *"_s191", 0 0, L_0x1f57570; 1 drivers +v0x1ec0da0_0 .net *"_s21", 0 0, L_0x1f51080; 1 drivers +v0x1ec0e40_0 .net *"_s23", 0 0, L_0x1f51170; 1 drivers +v0x1ec11e0_0 .net *"_s24", 0 0, L_0x1f50fc0; 1 drivers +v0x1ec1260_0 .net *"_s27", 0 0, L_0x1f513c0; 1 drivers +v0x1ec1020_0 .net *"_s29", 0 0, L_0x1f51530; 1 drivers +v0x1ec10c0_0 .net *"_s3", 0 0, L_0x1f50330; 1 drivers +v0x1ec1160_0 .net *"_s30", 0 0, L_0x1f51750; 1 drivers +v0x1ec14e0_0 .net *"_s33", 0 0, L_0x1f51800; 1 drivers +v0x1ec1300_0 .net *"_s35", 0 0, L_0x1f518f0; 1 drivers +v0x1ec13a0_0 .net *"_s36", 0 0, L_0x1f516c0; 1 drivers +v0x1ec1440_0 .net *"_s39", 0 0, L_0x1f51c30; 1 drivers +v0x1ec1780_0 .net *"_s41", 0 0, L_0x1f519e0; 1 drivers +v0x1ec1580_0 .net *"_s42", 0 0, L_0x1f51d20; 1 drivers +v0x1ec1620_0 .net *"_s45", 0 0, L_0x1f51fd0; 1 drivers +v0x1ec16c0_0 .net *"_s47", 0 0, L_0x1f520c0; 1 drivers +v0x1ec1a20_0 .net *"_s48", 0 0, L_0x1f52280; 1 drivers +v0x1ec1820_0 .net *"_s5", 0 0, L_0x1f50840; 1 drivers +v0x1ec18c0_0 .net *"_s51", 0 0, L_0x1f52330; 1 drivers +v0x1ec1960_0 .net *"_s53", 0 0, L_0x1f521b0; 1 drivers +v0x1ec1ce0_0 .net *"_s54", 0 0, L_0x1f52420; 1 drivers +v0x1ec1aa0_0 .net *"_s57", 0 0, L_0x1f52740; 1 drivers +v0x1ec1b40_0 .net *"_s59", 0 0, L_0x1f527e0; 1 drivers +v0x1ec1be0_0 .net *"_s6", 0 0, L_0x1f4a1c0; 1 drivers +v0x1ec1fc0_0 .net *"_s60", 0 0, L_0x1f529d0; 1 drivers +v0x1ec1d60_0 .net *"_s63", 0 0, L_0x1f52a30; 1 drivers +v0x1ec1e00_0 .net *"_s65", 0 0, L_0x1f528d0; 1 drivers +v0x1ec1ea0_0 .net *"_s66", 0 0, L_0x1f52b20; 1 drivers +v0x1ec1f40_0 .net *"_s69", 0 0, L_0x1f52df0; 1 drivers +v0x1ec22d0_0 .net *"_s71", 0 0, L_0x1f52e90; 1 drivers +v0x1ec2350_0 .net *"_s72", 0 0, L_0x1f526e0; 1 drivers +v0x1ec2060_0 .net *"_s75", 0 0, L_0x1f530b0; 1 drivers +v0x1ec2100_0 .net *"_s77", 0 0, L_0x1f52f80; 1 drivers +v0x1ec21a0_0 .net *"_s78", 0 0, L_0x1f531a0; 1 drivers +v0x1ec2240_0 .net *"_s81", 0 0, L_0x1f534d0; 1 drivers +v0x1ec26b0_0 .net *"_s83", 0 0, L_0x1f53570; 1 drivers +v0x1ec2750_0 .net *"_s84", 0 0, L_0x1f53420; 1 drivers +v0x1ec23f0_0 .net *"_s87", 0 0, L_0x1f51b20; 1 drivers +v0x1ec2490_0 .net *"_s89", 0 0, L_0x1f53660; 1 drivers +v0x1ec2530_0 .net *"_s9", 0 0, L_0x1f50980; 1 drivers +v0x1ec25d0_0 .net *"_s90", 0 0, L_0x1f00f40; 1 drivers +v0x1ec2ac0_0 .net *"_s93", 0 0, L_0x1f427c0; 1 drivers +v0x1ec2b40_0 .net *"_s95", 0 0, L_0x1f42ac0; 1 drivers +v0x1ec27f0_0 .net *"_s96", 0 0, L_0x1f429e0; 1 drivers +v0x1ec2890_0 .net *"_s99", 0 0, L_0x1f42d40; 1 drivers +v0x1ec2930_0 .alias "a", 31 0, v0x1f02500_0; +v0x1ec29b0_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ec2ee0_0 .alias "out", 31 0, v0x1f01cb0_0; +L_0x1f50190 .part/pv L_0x1f50280, 0, 1, 32; +L_0x1f50330 .part v0x1f031c0_0, 0, 1; +L_0x1f50840 .part v0x1f023a0_0, 0, 1; +L_0x1f508e0 .part/pv L_0x1f4a1c0, 1, 1, 32; +L_0x1f50980 .part v0x1f031c0_0, 1, 1; +L_0x1f50a70 .part v0x1f023a0_0, 1, 1; +L_0x1f50b60 .part/pv L_0x1f50c90, 2, 1, 32; +L_0x1f50cf0 .part v0x1f031c0_0, 2, 1; +L_0x1f50e30 .part v0x1f023a0_0, 2, 1; +L_0x1f50f20 .part/pv L_0x1f51020, 3, 1, 32; +L_0x1f51080 .part v0x1f031c0_0, 3, 1; +L_0x1f51170 .part v0x1f023a0_0, 3, 1; +L_0x1f512d0 .part/pv L_0x1f50fc0, 4, 1, 32; +L_0x1f513c0 .part v0x1f031c0_0, 4, 1; +L_0x1f51530 .part v0x1f023a0_0, 4, 1; +L_0x1f51620 .part/pv L_0x1f51750, 5, 1, 32; +L_0x1f51800 .part v0x1f031c0_0, 5, 1; +L_0x1f518f0 .part v0x1f023a0_0, 5, 1; +L_0x1f51a80 .part/pv L_0x1f516c0, 6, 1, 32; +L_0x1f51c30 .part v0x1f031c0_0, 6, 1; +L_0x1f519e0 .part v0x1f023a0_0, 6, 1; +L_0x1f51e20 .part/pv L_0x1f51d20, 7, 1, 32; +L_0x1f51fd0 .part v0x1f031c0_0, 7, 1; +L_0x1f520c0 .part v0x1f023a0_0, 7, 1; +L_0x1f51ec0 .part/pv L_0x1f52280, 8, 1, 32; +L_0x1f52330 .part v0x1f031c0_0, 8, 1; +L_0x1f521b0 .part v0x1f023a0_0, 8, 1; +L_0x1f52550 .part/pv L_0x1f52420, 9, 1, 32; +L_0x1f52740 .part v0x1f031c0_0, 9, 1; +L_0x1f527e0 .part v0x1f023a0_0, 9, 1; +L_0x1f525f0 .part/pv L_0x1f529d0, 10, 1, 32; +L_0x1f52a30 .part v0x1f031c0_0, 10, 1; +L_0x1f528d0 .part v0x1f023a0_0, 10, 1; +L_0x1f52c30 .part/pv L_0x1f52b20, 11, 1, 32; +L_0x1f52df0 .part v0x1f031c0_0, 11, 1; +L_0x1f52e90 .part v0x1f023a0_0, 11, 1; +L_0x1f52cd0 .part/pv L_0x1f526e0, 12, 1, 32; +L_0x1f530b0 .part v0x1f031c0_0, 12, 1; +L_0x1f52f80 .part v0x1f023a0_0, 12, 1; +L_0x1f532e0 .part/pv L_0x1f531a0, 13, 1, 32; +L_0x1f534d0 .part v0x1f031c0_0, 13, 1; +L_0x1f53570 .part v0x1f023a0_0, 13, 1; +L_0x1f53380 .part/pv L_0x1f53420, 14, 1, 32; +L_0x1f51b20 .part v0x1f031c0_0, 14, 1; +L_0x1f53660 .part v0x1f023a0_0, 14, 1; +L_0x1f428a0 .part/pv L_0x1f00f40, 15, 1, 32; +L_0x1f427c0 .part v0x1f031c0_0, 15, 1; +L_0x1f42ac0 .part v0x1f023a0_0, 15, 1; +L_0x1f42940 .part/pv L_0x1f429e0, 16, 1, 32; +L_0x1f42d40 .part v0x1f031c0_0, 16, 1; +L_0x1f42e30 .part v0x1f023a0_0, 16, 1; +L_0x1f42bb0 .part/pv L_0x1f42c50, 17, 1, 32; +L_0x1f54c30 .part v0x1f031c0_0, 17, 1; +L_0x1f54cd0 .part v0x1f023a0_0, 17, 1; +L_0x1f549e0 .part/pv L_0x1f54a80, 18, 1, 32; +L_0x1f54f80 .part v0x1f031c0_0, 18, 1; +L_0x1f54dc0 .part v0x1f023a0_0, 18, 1; +L_0x1f54eb0 .part/pv L_0x1f55200, 19, 1, 32; +L_0x1f54b90 .part v0x1f031c0_0, 19, 1; +L_0x1f553b0 .part v0x1f023a0_0, 19, 1; +L_0x1f55020 .part/pv L_0x1f550c0, 20, 1, 32; +L_0x1f55690 .part v0x1f031c0_0, 20, 1; +L_0x1f554a0 .part v0x1f023a0_0, 20, 1; +L_0x1f55590 .part/pv L_0x1f55630, 21, 1, 32; +L_0x1f552b0 .part v0x1f031c0_0, 21, 1; +L_0x1f55aa0 .part v0x1f023a0_0, 21, 1; +L_0x1f55730 .part/pv L_0x1f557d0, 22, 1, 32; +L_0x1f55880 .part v0x1f031c0_0, 22, 1; +L_0x1f55b90 .part v0x1f023a0_0, 22, 1; +L_0x1f55c80 .part/pv L_0x1f55d20, 23, 1, 32; +L_0x1f55990 .part v0x1f031c0_0, 23, 1; +L_0x1f561b0 .part v0x1f023a0_0, 23, 1; +L_0x1f55e00 .part/pv L_0x1f55ea0, 24, 1, 32; +L_0x1f55f50 .part v0x1f031c0_0, 24, 1; +L_0x1f56500 .part v0x1f023a0_0, 24, 1; +L_0x1f565f0 .part/pv L_0x1f562a0, 25, 1, 32; +L_0x1f56430 .part v0x1f031c0_0, 25, 1; +L_0x1f56900 .part v0x1f023a0_0, 25, 1; +L_0x1f56690 .part/pv L_0x1f56730, 26, 1, 32; +L_0x1f567e0 .part v0x1f031c0_0, 26, 1; +L_0x1f56c30 .part v0x1f023a0_0, 26, 1; +L_0x1f56d20 .part/pv L_0x1f514b0, 27, 1, 32; +L_0x1f56350 .part v0x1f031c0_0, 27, 1; +L_0x1f56ae0 .part v0x1f023a0_0, 27, 1; +L_0x1f57070 .part/pv L_0x1f56bd0, 28, 1, 32; +L_0x1f57160 .part v0x1f031c0_0, 28, 1; +L_0x1f56dc0 .part v0x1f023a0_0, 28, 1; +L_0x1f56eb0 .part/pv L_0x1f56f50, 29, 1, 32; +L_0x1f569a0 .part v0x1f031c0_0, 29, 1; +L_0x1f57620 .part v0x1f023a0_0, 29, 1; +L_0x1f57250 .part/pv L_0x1ec00c0, 30, 1, 32; +L_0x1f57340 .part v0x1f031c0_0, 30, 1; +L_0x1f57430 .part v0x1f023a0_0, 30, 1; +L_0x1f537a0 .part/pv L_0x1f53840, 31, 1, 32; +L_0x1f538f0 .part v0x1f031c0_0, 31, 1; +L_0x1f57570 .part v0x1f023a0_0, 31, 1; +S_0x1ebaad0 .scope module, "nor0" "nor_32bit" 6 39, 12 1, S_0x1eb65d0; + .timescale 0 0; +L_0x1f57910 .functor NOR 1, L_0x1f58110, L_0x1f58200, C4<0>, C4<0>; +L_0x1f58390 .functor NOR 1, L_0x1f58440, L_0x1f58530, C4<0>, C4<0>; +L_0x1f58750 .functor NOR 1, L_0x1f587b0, L_0x1f588f0, C4<0>, C4<0>; +L_0x1f58ae0 .functor NOR 1, L_0x1f58b40, L_0x1f58c30, C4<0>, C4<0>; +L_0x1f58a80 .functor NOR 1, L_0x1f58e80, L_0x1f58ff0, C4<0>, C4<0>; +L_0x1f59210 .functor NOR 1, L_0x1f592c0, L_0x1f593b0, C4<0>, C4<0>; +L_0x1f59180 .functor NOR 1, L_0x1f596f0, L_0x1f594a0, C4<0>, C4<0>; +L_0x1f597e0 .functor NOR 1, L_0x1f59a90, L_0x1f59b80, C4<0>, C4<0>; +L_0x1f59d40 .functor NOR 1, L_0x1f59df0, L_0x1f59c70, C4<0>, C4<0>; +L_0x1f59ee0 .functor NOR 1, L_0x1f5a200, L_0x1f5a2a0, C4<0>, C4<0>; +L_0x1f5a490 .functor NOR 1, L_0x1f5a4f0, L_0x1f5a390, C4<0>, C4<0>; +L_0x1f5a5e0 .functor NOR 1, L_0x1f5a8b0, L_0x1f5a950, C4<0>, C4<0>; +L_0x1f5a1a0 .functor NOR 1, L_0x1f5ab70, L_0x1f5aa40, C4<0>, C4<0>; +L_0x1f5ac60 .functor NOR 1, L_0x1f5af90, L_0x1f5b030, C4<0>, C4<0>; +L_0x1f5aee0 .functor NOR 1, L_0x1f595e0, L_0x1f5b120, C4<0>, C4<0>; +L_0x1f5b210 .functor NOR 1, L_0x1f5b820, L_0x1f5b8c0, C4<0>, C4<0>; +L_0x1f5b740 .functor NOR 1, L_0x1f5bb40, L_0x1f5b9b0, C4<0>, C4<0>; +L_0x1f5bde0 .functor NOR 1, L_0x1f5bf30, L_0x1f5bfd0, C4<0>, C4<0>; +L_0x1f5bcd0 .functor NOR 1, L_0x1f5c280, L_0x1f5c0c0, C4<0>, C4<0>; +L_0x1f5c500 .functor NOR 1, L_0x1f5be90, L_0x1f5c6b0, C4<0>, C4<0>; +L_0x1f5c3c0 .functor NOR 1, L_0x1f5c990, L_0x1f5c7a0, C4<0>, C4<0>; +L_0x1f5c930 .functor NOR 1, L_0x1f5c5b0, L_0x1f5cda0, C4<0>, C4<0>; +L_0x1f5cad0 .functor NOR 1, L_0x1f5cb80, L_0x1f5ce90, C4<0>, C4<0>; +L_0x1f5d020 .functor NOR 1, L_0x1f5cc90, L_0x1f5d4b0, C4<0>, C4<0>; +L_0x1f5d1a0 .functor NOR 1, L_0x1f5d250, L_0x1f5d800, C4<0>, C4<0>; +L_0x1f5d5a0 .functor NOR 1, L_0x1f5d730, L_0x1f5dc00, C4<0>, C4<0>; +L_0x1f5da30 .functor NOR 1, L_0x1f5dae0, L_0x1f5df30, C4<0>, C4<0>; +L_0x1f5dca0 .functor NOR 1, L_0x1f5d650, L_0x1f5de90, C4<0>, C4<0>; +L_0x1f5e160 .functor NOR 1, L_0x1f5e210, L_0x1f5e670, C4<0>, C4<0>; +L_0x1f5e3b0 .functor NOR 1, L_0x1f5dd50, L_0x1f5e560, C4<0>, C4<0>; +L_0x1ebbeb0 .functor NOR 1, L_0x1f5b280, L_0x1f5b370, C4<0>, C4<0>; +L_0x1f5e850 .functor NOR 1, L_0x1f5e460, L_0x1f5f240, C4<0>, C4<0>; +v0x1ebabc0_0 .net *"_s0", 0 0, L_0x1f57910; 1 drivers +v0x1ebac60_0 .net *"_s101", 0 0, L_0x1f5b9b0; 1 drivers +v0x1ebad00_0 .net *"_s102", 0 0, L_0x1f5bde0; 1 drivers +v0x1ebada0_0 .net *"_s105", 0 0, L_0x1f5bf30; 1 drivers +v0x1ebae40_0 .net *"_s107", 0 0, L_0x1f5bfd0; 1 drivers +v0x1ebaee0_0 .net *"_s108", 0 0, L_0x1f5bcd0; 1 drivers +v0x1ebaf80_0 .net *"_s11", 0 0, L_0x1f58530; 1 drivers +v0x1ebb020_0 .net *"_s111", 0 0, L_0x1f5c280; 1 drivers +v0x1ebb0c0_0 .net *"_s113", 0 0, L_0x1f5c0c0; 1 drivers +v0x1ebb160_0 .net *"_s114", 0 0, L_0x1f5c500; 1 drivers +v0x1ebb200_0 .net *"_s117", 0 0, L_0x1f5be90; 1 drivers +v0x1ebb2a0_0 .net *"_s119", 0 0, L_0x1f5c6b0; 1 drivers +v0x1ebb340_0 .net *"_s12", 0 0, L_0x1f58750; 1 drivers +v0x1ebb3e0_0 .net *"_s120", 0 0, L_0x1f5c3c0; 1 drivers +v0x1ebb500_0 .net *"_s123", 0 0, L_0x1f5c990; 1 drivers +v0x1ebb5a0_0 .net *"_s125", 0 0, L_0x1f5c7a0; 1 drivers +v0x1ebb460_0 .net *"_s126", 0 0, L_0x1f5c930; 1 drivers +v0x1ebb6f0_0 .net *"_s129", 0 0, L_0x1f5c5b0; 1 drivers +v0x1ebb810_0 .net *"_s131", 0 0, L_0x1f5cda0; 1 drivers +v0x1ebb890_0 .net *"_s132", 0 0, L_0x1f5cad0; 1 drivers +v0x1ebb770_0 .net *"_s135", 0 0, L_0x1f5cb80; 1 drivers +v0x1ebb9c0_0 .net *"_s137", 0 0, L_0x1f5ce90; 1 drivers +v0x1ebb910_0 .net *"_s138", 0 0, L_0x1f5d020; 1 drivers +v0x1ebbb00_0 .net *"_s141", 0 0, L_0x1f5cc90; 1 drivers +v0x1ebba60_0 .net *"_s143", 0 0, L_0x1f5d4b0; 1 drivers +v0x1ebbc50_0 .net *"_s144", 0 0, L_0x1f5d1a0; 1 drivers +v0x1ebbba0_0 .net *"_s147", 0 0, L_0x1f5d250; 1 drivers +v0x1ebbdb0_0 .net *"_s149", 0 0, L_0x1f5d800; 1 drivers +v0x1ebbcf0_0 .net *"_s15", 0 0, L_0x1f587b0; 1 drivers +v0x1ebbf20_0 .net *"_s150", 0 0, L_0x1f5d5a0; 1 drivers +v0x1ebbe30_0 .net *"_s153", 0 0, L_0x1f5d730; 1 drivers +v0x1ebc0a0_0 .net *"_s155", 0 0, L_0x1f5dc00; 1 drivers +v0x1ebbfa0_0 .net *"_s156", 0 0, L_0x1f5da30; 1 drivers +v0x1ebc230_0 .net *"_s159", 0 0, L_0x1f5dae0; 1 drivers +v0x1ebc120_0 .net *"_s161", 0 0, L_0x1f5df30; 1 drivers +v0x1ebc3d0_0 .net *"_s162", 0 0, L_0x1f5dca0; 1 drivers +v0x1ebc2b0_0 .net *"_s165", 0 0, L_0x1f5d650; 1 drivers +v0x1ebc350_0 .net *"_s167", 0 0, L_0x1f5de90; 1 drivers +v0x1ebc590_0 .net *"_s168", 0 0, L_0x1f5e160; 1 drivers +v0x1ebc610_0 .net *"_s17", 0 0, L_0x1f588f0; 1 drivers +v0x1ebc450_0 .net *"_s171", 0 0, L_0x1f5e210; 1 drivers +v0x1ebc4f0_0 .net *"_s173", 0 0, L_0x1f5e670; 1 drivers +v0x1ebc7f0_0 .net *"_s174", 0 0, L_0x1f5e3b0; 1 drivers +v0x1ebc870_0 .net *"_s177", 0 0, L_0x1f5dd50; 1 drivers +v0x1ebc690_0 .net *"_s179", 0 0, L_0x1f5e560; 1 drivers +v0x1ebc730_0 .net *"_s18", 0 0, L_0x1f58ae0; 1 drivers +v0x1ebca70_0 .net *"_s180", 0 0, L_0x1ebbeb0; 1 drivers +v0x1ebcaf0_0 .net *"_s183", 0 0, L_0x1f5b280; 1 drivers +v0x1ebc910_0 .net *"_s185", 0 0, L_0x1f5b370; 1 drivers +v0x1ebc9b0_0 .net *"_s186", 0 0, L_0x1f5e850; 1 drivers +v0x1ebcd10_0 .net *"_s189", 0 0, L_0x1f5e460; 1 drivers +v0x1ebcd90_0 .net *"_s191", 0 0, L_0x1f5f240; 1 drivers +v0x1ebcb90_0 .net *"_s21", 0 0, L_0x1f58b40; 1 drivers +v0x1ebcc30_0 .net *"_s23", 0 0, L_0x1f58c30; 1 drivers +v0x1ebcfd0_0 .net *"_s24", 0 0, L_0x1f58a80; 1 drivers +v0x1ebd050_0 .net *"_s27", 0 0, L_0x1f58e80; 1 drivers +v0x1ebce10_0 .net *"_s29", 0 0, L_0x1f58ff0; 1 drivers +v0x1ebceb0_0 .net *"_s3", 0 0, L_0x1f58110; 1 drivers +v0x1ebcf50_0 .net *"_s30", 0 0, L_0x1f59210; 1 drivers +v0x1ebd2d0_0 .net *"_s33", 0 0, L_0x1f592c0; 1 drivers +v0x1ebd0f0_0 .net *"_s35", 0 0, L_0x1f593b0; 1 drivers +v0x1ebd190_0 .net *"_s36", 0 0, L_0x1f59180; 1 drivers +v0x1ebd230_0 .net *"_s39", 0 0, L_0x1f596f0; 1 drivers +v0x1ebd570_0 .net *"_s41", 0 0, L_0x1f594a0; 1 drivers +v0x1ebd370_0 .net *"_s42", 0 0, L_0x1f597e0; 1 drivers +v0x1ebd410_0 .net *"_s45", 0 0, L_0x1f59a90; 1 drivers +v0x1ebd4b0_0 .net *"_s47", 0 0, L_0x1f59b80; 1 drivers +v0x1ebd810_0 .net *"_s48", 0 0, L_0x1f59d40; 1 drivers +v0x1ebd610_0 .net *"_s5", 0 0, L_0x1f58200; 1 drivers +v0x1ebd6b0_0 .net *"_s51", 0 0, L_0x1f59df0; 1 drivers +v0x1ebd750_0 .net *"_s53", 0 0, L_0x1f59c70; 1 drivers +v0x1ebdad0_0 .net *"_s54", 0 0, L_0x1f59ee0; 1 drivers +v0x1ebd890_0 .net *"_s57", 0 0, L_0x1f5a200; 1 drivers +v0x1ebd930_0 .net *"_s59", 0 0, L_0x1f5a2a0; 1 drivers +v0x1ebd9d0_0 .net *"_s6", 0 0, L_0x1f58390; 1 drivers +v0x1ebddb0_0 .net *"_s60", 0 0, L_0x1f5a490; 1 drivers +v0x1ebdb50_0 .net *"_s63", 0 0, L_0x1f5a4f0; 1 drivers +v0x1ebdbf0_0 .net *"_s65", 0 0, L_0x1f5a390; 1 drivers +v0x1ebdc90_0 .net *"_s66", 0 0, L_0x1f5a5e0; 1 drivers +v0x1ebdd30_0 .net *"_s69", 0 0, L_0x1f5a8b0; 1 drivers +v0x1ebe0c0_0 .net *"_s71", 0 0, L_0x1f5a950; 1 drivers +v0x1ebe140_0 .net *"_s72", 0 0, L_0x1f5a1a0; 1 drivers +v0x1ebde50_0 .net *"_s75", 0 0, L_0x1f5ab70; 1 drivers +v0x1ebdef0_0 .net *"_s77", 0 0, L_0x1f5aa40; 1 drivers +v0x1ebdf90_0 .net *"_s78", 0 0, L_0x1f5ac60; 1 drivers +v0x1ebe030_0 .net *"_s81", 0 0, L_0x1f5af90; 1 drivers +v0x1ebe4a0_0 .net *"_s83", 0 0, L_0x1f5b030; 1 drivers +v0x1ebe540_0 .net *"_s84", 0 0, L_0x1f5aee0; 1 drivers +v0x1ebe1e0_0 .net *"_s87", 0 0, L_0x1f595e0; 1 drivers +v0x1ebe280_0 .net *"_s89", 0 0, L_0x1f5b120; 1 drivers +v0x1ebe320_0 .net *"_s9", 0 0, L_0x1f58440; 1 drivers +v0x1ebe3c0_0 .net *"_s90", 0 0, L_0x1f5b210; 1 drivers +v0x1ebe8b0_0 .net *"_s93", 0 0, L_0x1f5b820; 1 drivers +v0x1ebe930_0 .net *"_s95", 0 0, L_0x1f5b8c0; 1 drivers +v0x1ebe5e0_0 .net *"_s96", 0 0, L_0x1f5b740; 1 drivers +v0x1ebe680_0 .net *"_s99", 0 0, L_0x1f5bb40; 1 drivers +v0x1ebe720_0 .alias "a", 31 0, v0x1f02500_0; +v0x1ebe7a0_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ebe820_0 .alias "out", 31 0, v0x1f01d30_0; +L_0x1f57820 .part/pv L_0x1f57910, 0, 1, 32; +L_0x1f58110 .part v0x1f031c0_0, 0, 1; +L_0x1f58200 .part v0x1f023a0_0, 0, 1; +L_0x1f582f0 .part/pv L_0x1f58390, 1, 1, 32; +L_0x1f58440 .part v0x1f031c0_0, 1, 1; +L_0x1f58530 .part v0x1f023a0_0, 1, 1; +L_0x1f58620 .part/pv L_0x1f58750, 2, 1, 32; +L_0x1f587b0 .part v0x1f031c0_0, 2, 1; +L_0x1f588f0 .part v0x1f023a0_0, 2, 1; +L_0x1f589e0 .part/pv L_0x1f58ae0, 3, 1, 32; +L_0x1f58b40 .part v0x1f031c0_0, 3, 1; +L_0x1f58c30 .part v0x1f023a0_0, 3, 1; +L_0x1f58d90 .part/pv L_0x1f58a80, 4, 1, 32; +L_0x1f58e80 .part v0x1f031c0_0, 4, 1; +L_0x1f58ff0 .part v0x1f023a0_0, 4, 1; +L_0x1f590e0 .part/pv L_0x1f59210, 5, 1, 32; +L_0x1f592c0 .part v0x1f031c0_0, 5, 1; +L_0x1f593b0 .part v0x1f023a0_0, 5, 1; +L_0x1f59540 .part/pv L_0x1f59180, 6, 1, 32; +L_0x1f596f0 .part v0x1f031c0_0, 6, 1; +L_0x1f594a0 .part v0x1f023a0_0, 6, 1; +L_0x1f598e0 .part/pv L_0x1f597e0, 7, 1, 32; +L_0x1f59a90 .part v0x1f031c0_0, 7, 1; +L_0x1f59b80 .part v0x1f023a0_0, 7, 1; +L_0x1f59980 .part/pv L_0x1f59d40, 8, 1, 32; +L_0x1f59df0 .part v0x1f031c0_0, 8, 1; +L_0x1f59c70 .part v0x1f023a0_0, 8, 1; +L_0x1f5a010 .part/pv L_0x1f59ee0, 9, 1, 32; +L_0x1f5a200 .part v0x1f031c0_0, 9, 1; +L_0x1f5a2a0 .part v0x1f023a0_0, 9, 1; +L_0x1f5a0b0 .part/pv L_0x1f5a490, 10, 1, 32; +L_0x1f5a4f0 .part v0x1f031c0_0, 10, 1; +L_0x1f5a390 .part v0x1f023a0_0, 10, 1; +L_0x1f5a6f0 .part/pv L_0x1f5a5e0, 11, 1, 32; +L_0x1f5a8b0 .part v0x1f031c0_0, 11, 1; +L_0x1f5a950 .part v0x1f023a0_0, 11, 1; +L_0x1f5a790 .part/pv L_0x1f5a1a0, 12, 1, 32; +L_0x1f5ab70 .part v0x1f031c0_0, 12, 1; +L_0x1f5aa40 .part v0x1f023a0_0, 12, 1; +L_0x1f5ada0 .part/pv L_0x1f5ac60, 13, 1, 32; +L_0x1f5af90 .part v0x1f031c0_0, 13, 1; +L_0x1f5b030 .part v0x1f023a0_0, 13, 1; +L_0x1f5ae40 .part/pv L_0x1f5aee0, 14, 1, 32; +L_0x1f595e0 .part v0x1f031c0_0, 14, 1; +L_0x1f5b120 .part v0x1f023a0_0, 14, 1; +L_0x1f5b600 .part/pv L_0x1f5b210, 15, 1, 32; +L_0x1f5b820 .part v0x1f031c0_0, 15, 1; +L_0x1f5b8c0 .part v0x1f023a0_0, 15, 1; +L_0x1f5b6a0 .part/pv L_0x1f5b740, 16, 1, 32; +L_0x1f5bb40 .part v0x1f031c0_0, 16, 1; +L_0x1f5b9b0 .part v0x1f023a0_0, 16, 1; +L_0x1f5baa0 .part/pv L_0x1f5bde0, 17, 1, 32; +L_0x1f5bf30 .part v0x1f031c0_0, 17, 1; +L_0x1f5bfd0 .part v0x1f023a0_0, 17, 1; +L_0x1f5bc30 .part/pv L_0x1f5bcd0, 18, 1, 32; +L_0x1f5c280 .part v0x1f031c0_0, 18, 1; +L_0x1f5c0c0 .part v0x1f023a0_0, 18, 1; +L_0x1f5c1b0 .part/pv L_0x1f5c500, 19, 1, 32; +L_0x1f5be90 .part v0x1f031c0_0, 19, 1; +L_0x1f5c6b0 .part v0x1f023a0_0, 19, 1; +L_0x1f5c320 .part/pv L_0x1f5c3c0, 20, 1, 32; +L_0x1f5c990 .part v0x1f031c0_0, 20, 1; +L_0x1f5c7a0 .part v0x1f023a0_0, 20, 1; +L_0x1f5c890 .part/pv L_0x1f5c930, 21, 1, 32; +L_0x1f5c5b0 .part v0x1f031c0_0, 21, 1; +L_0x1f5cda0 .part v0x1f023a0_0, 21, 1; +L_0x1f5ca30 .part/pv L_0x1f5cad0, 22, 1, 32; +L_0x1f5cb80 .part v0x1f031c0_0, 22, 1; +L_0x1f5ce90 .part v0x1f023a0_0, 22, 1; +L_0x1f5cf80 .part/pv L_0x1f5d020, 23, 1, 32; +L_0x1f5cc90 .part v0x1f031c0_0, 23, 1; +L_0x1f5d4b0 .part v0x1f023a0_0, 23, 1; +L_0x1f5d100 .part/pv L_0x1f5d1a0, 24, 1, 32; +L_0x1f5d250 .part v0x1f031c0_0, 24, 1; +L_0x1f5d800 .part v0x1f023a0_0, 24, 1; +L_0x1f5d8f0 .part/pv L_0x1f5d5a0, 25, 1, 32; +L_0x1f5d730 .part v0x1f031c0_0, 25, 1; +L_0x1f5dc00 .part v0x1f023a0_0, 25, 1; +L_0x1f5d990 .part/pv L_0x1f5da30, 26, 1, 32; +L_0x1f5dae0 .part v0x1f031c0_0, 26, 1; +L_0x1f5df30 .part v0x1f023a0_0, 26, 1; +L_0x1f5e020 .part/pv L_0x1f5dca0, 27, 1, 32; +L_0x1f5d650 .part v0x1f031c0_0, 27, 1; +L_0x1f5de90 .part v0x1f023a0_0, 27, 1; +L_0x1f5e0c0 .part/pv L_0x1f5e160, 28, 1, 32; +L_0x1f5e210 .part v0x1f031c0_0, 28, 1; +L_0x1f5e670 .part v0x1f023a0_0, 28, 1; +L_0x1f5e710 .part/pv L_0x1f5e3b0, 29, 1, 32; +L_0x1f5dd50 .part v0x1f031c0_0, 29, 1; +L_0x1f5e560 .part v0x1f023a0_0, 29, 1; +L_0x1f5ea90 .part/pv L_0x1ebbeb0, 30, 1, 32; +L_0x1f5b280 .part v0x1f031c0_0, 30, 1; +L_0x1f5b370 .part v0x1f023a0_0, 30, 1; +L_0x1f5e7b0 .part/pv L_0x1f5e850, 31, 1, 32; +L_0x1f5e460 .part v0x1f031c0_0, 31, 1; +L_0x1f5f240 .part v0x1f023a0_0, 31, 1; +S_0x1eb6760 .scope module, "or0" "or_32bit" 6 40, 13 1, S_0x1eb65d0; + .timescale 0 0; +L_0x1f5f030 .functor OR 1, L_0x1f5f0e0, L_0x1f5f5f0, C4<0>, C4<0>; +L_0x1f58f70 .functor OR 1, L_0x1f5f730, L_0x1f5f820, C4<0>, C4<0>; +L_0x1f5fa40 .functor OR 1, L_0x1f5faa0, L_0x1f5fbe0, C4<0>, C4<0>; +L_0x1f5fdd0 .functor OR 1, L_0x1f5fe30, L_0x1f5ff20, C4<0>, C4<0>; +L_0x1f5fd70 .functor OR 1, L_0x1f60170, L_0x1f602e0, C4<0>, C4<0>; +L_0x1f60500 .functor OR 1, L_0x1f605b0, L_0x1f606a0, C4<0>, C4<0>; +L_0x1f60470 .functor OR 1, L_0x1f609e0, L_0x1f60790, C4<0>, C4<0>; +L_0x1f60ad0 .functor OR 1, L_0x1f60d80, L_0x1f60e70, C4<0>, C4<0>; +L_0x1f61030 .functor OR 1, L_0x1f610e0, L_0x1f60f60, C4<0>, C4<0>; +L_0x1f611d0 .functor OR 1, L_0x1f614f0, L_0x1f61590, C4<0>, C4<0>; +L_0x1f61780 .functor OR 1, L_0x1f617e0, L_0x1f61680, C4<0>, C4<0>; +L_0x1f618d0 .functor OR 1, L_0x1f61ba0, L_0x1f61c40, C4<0>, C4<0>; +L_0x1f61490 .functor OR 1, L_0x1f61e60, L_0x1f61d30, C4<0>, C4<0>; +L_0x1f61f50 .functor OR 1, L_0x1f62280, L_0x1f62320, C4<0>, C4<0>; +L_0x1f621d0 .functor OR 1, L_0x1f608d0, L_0x1f62410, C4<0>, C4<0>; +L_0x1f62500 .functor OR 1, L_0x1f62b10, L_0x1f62bb0, C4<0>, C4<0>; +L_0x1f62a30 .functor OR 1, L_0x1f62e30, L_0x1f62ca0, C4<0>, C4<0>; +L_0x1f630d0 .functor OR 1, L_0x1f63220, L_0x1f632c0, C4<0>, C4<0>; +L_0x1f62fc0 .functor OR 1, L_0x1f63570, L_0x1f633b0, C4<0>, C4<0>; +L_0x1f637f0 .functor OR 1, L_0x1f63180, L_0x1f639a0, C4<0>, C4<0>; +L_0x1f636b0 .functor OR 1, L_0x1f63c80, L_0x1f63a90, C4<0>, C4<0>; +L_0x1f63c20 .functor OR 1, L_0x1f638a0, L_0x1f64090, C4<0>, C4<0>; +L_0x1f63dc0 .functor OR 1, L_0x1f63e70, L_0x1f45370, C4<0>, C4<0>; +L_0x1f60260 .functor OR 1, L_0x1f63f80, L_0x1f452b0, C4<0>, C4<0>; +L_0x1f455a0 .functor OR 1, L_0x1f45650, L_0x1f459f0, C4<0>, C4<0>; +L_0x1f45790 .functor OR 1, L_0x1f45920, L_0x1f45df0, C4<0>, C4<0>; +L_0x1f45f80 .functor OR 1, L_0x1f46030, L_0x1f45b80, C4<0>, C4<0>; +L_0x1f45d10 .functor OR 1, L_0x1f45840, L_0x1f66520, C4<0>, C4<0>; +L_0x1f66230 .functor OR 1, L_0x1f662e0, L_0x1f668d0, C4<0>, C4<0>; +L_0x1f66610 .functor OR 1, L_0x1f66430, L_0x1f667c0, C4<0>, C4<0>; +L_0x1eb7c30 .functor OR 1, L_0x1f62570, L_0x1f62660, C4<0>, C4<0>; +L_0x1f66ab0 .functor OR 1, L_0x1f666c0, L_0x1f674a0, C4<0>, C4<0>; +v0x1eb6850_0 .net *"_s0", 0 0, L_0x1f5f030; 1 drivers +v0x1eb6910_0 .net *"_s101", 0 0, L_0x1f62ca0; 1 drivers +v0x1eb69b0_0 .net *"_s102", 0 0, L_0x1f630d0; 1 drivers +v0x1eb6a50_0 .net *"_s105", 0 0, L_0x1f63220; 1 drivers +v0x1eb6b00_0 .net *"_s107", 0 0, L_0x1f632c0; 1 drivers +v0x1eb6ba0_0 .net *"_s108", 0 0, L_0x1f62fc0; 1 drivers +v0x1eb6c40_0 .net *"_s11", 0 0, L_0x1f5f820; 1 drivers +v0x1eb6ce0_0 .net *"_s111", 0 0, L_0x1f63570; 1 drivers +v0x1eb6dd0_0 .net *"_s113", 0 0, L_0x1f633b0; 1 drivers +v0x1eb6e70_0 .net *"_s114", 0 0, L_0x1f637f0; 1 drivers +v0x1eb6f10_0 .net *"_s117", 0 0, L_0x1f63180; 1 drivers +v0x1eb6fb0_0 .net *"_s119", 0 0, L_0x1f639a0; 1 drivers +v0x1eb70c0_0 .net *"_s12", 0 0, L_0x1f5fa40; 1 drivers +v0x1eb7160_0 .net *"_s120", 0 0, L_0x1f636b0; 1 drivers +v0x1eb7280_0 .net *"_s123", 0 0, L_0x1f63c80; 1 drivers +v0x1eb7320_0 .net *"_s125", 0 0, L_0x1f63a90; 1 drivers +v0x1eb71e0_0 .net *"_s126", 0 0, L_0x1f63c20; 1 drivers +v0x1eb7470_0 .net *"_s129", 0 0, L_0x1f638a0; 1 drivers +v0x1eb7590_0 .net *"_s131", 0 0, L_0x1f64090; 1 drivers +v0x1eb7610_0 .net *"_s132", 0 0, L_0x1f63dc0; 1 drivers +v0x1eb74f0_0 .net *"_s135", 0 0, L_0x1f63e70; 1 drivers +v0x1eb7740_0 .net *"_s137", 0 0, L_0x1f45370; 1 drivers +v0x1eb7690_0 .net *"_s138", 0 0, L_0x1f60260; 1 drivers +v0x1eb7880_0 .net *"_s141", 0 0, L_0x1f63f80; 1 drivers +v0x1eb77e0_0 .net *"_s143", 0 0, L_0x1f452b0; 1 drivers +v0x1eb79d0_0 .net *"_s144", 0 0, L_0x1f455a0; 1 drivers +v0x1eb7920_0 .net *"_s147", 0 0, L_0x1f45650; 1 drivers +v0x1eb7b30_0 .net *"_s149", 0 0, L_0x1f459f0; 1 drivers +v0x1eb7a70_0 .net *"_s15", 0 0, L_0x1f5faa0; 1 drivers +v0x1eb7ca0_0 .net *"_s150", 0 0, L_0x1f45790; 1 drivers +v0x1eb7bb0_0 .net *"_s153", 0 0, L_0x1f45920; 1 drivers +v0x1eb7e20_0 .net *"_s155", 0 0, L_0x1f45df0; 1 drivers +v0x1eb7d20_0 .net *"_s156", 0 0, L_0x1f45f80; 1 drivers +v0x1eb7fb0_0 .net *"_s159", 0 0, L_0x1f46030; 1 drivers +v0x1eb7ea0_0 .net *"_s161", 0 0, L_0x1f45b80; 1 drivers +v0x1eb8150_0 .net *"_s162", 0 0, L_0x1f45d10; 1 drivers +v0x1eb8030_0 .net *"_s165", 0 0, L_0x1f45840; 1 drivers +v0x1eb80d0_0 .net *"_s167", 0 0, L_0x1f66520; 1 drivers +v0x1eb8310_0 .net *"_s168", 0 0, L_0x1f66230; 1 drivers +v0x1eb8390_0 .net *"_s17", 0 0, L_0x1f5fbe0; 1 drivers +v0x1eb81d0_0 .net *"_s171", 0 0, L_0x1f662e0; 1 drivers +v0x1eb8270_0 .net *"_s173", 0 0, L_0x1f668d0; 1 drivers +v0x1eb8570_0 .net *"_s174", 0 0, L_0x1f66610; 1 drivers +v0x1eb85f0_0 .net *"_s177", 0 0, L_0x1f66430; 1 drivers +v0x1eb8410_0 .net *"_s179", 0 0, L_0x1f667c0; 1 drivers +v0x1eb84b0_0 .net *"_s18", 0 0, L_0x1f5fdd0; 1 drivers +v0x1eb87f0_0 .net *"_s180", 0 0, L_0x1eb7c30; 1 drivers +v0x1eb8870_0 .net *"_s183", 0 0, L_0x1f62570; 1 drivers +v0x1eb8690_0 .net *"_s185", 0 0, L_0x1f62660; 1 drivers +v0x1eb8730_0 .net *"_s186", 0 0, L_0x1f66ab0; 1 drivers +v0x1eb8a90_0 .net *"_s189", 0 0, L_0x1f666c0; 1 drivers +v0x1eb8b10_0 .net *"_s191", 0 0, L_0x1f674a0; 1 drivers +v0x1eb8910_0 .net *"_s21", 0 0, L_0x1f5fe30; 1 drivers +v0x1eb89b0_0 .net *"_s23", 0 0, L_0x1f5ff20; 1 drivers +v0x1eb8d50_0 .net *"_s24", 0 0, L_0x1f5fd70; 1 drivers +v0x1eb8dd0_0 .net *"_s27", 0 0, L_0x1f60170; 1 drivers +v0x1eb8b90_0 .net *"_s29", 0 0, L_0x1f602e0; 1 drivers +v0x1eb8c30_0 .net *"_s3", 0 0, L_0x1f5f0e0; 1 drivers +v0x1eb8cd0_0 .net *"_s30", 0 0, L_0x1f60500; 1 drivers +v0x1eb9050_0 .net *"_s33", 0 0, L_0x1f605b0; 1 drivers +v0x1eb8e70_0 .net *"_s35", 0 0, L_0x1f606a0; 1 drivers +v0x1eb8f10_0 .net *"_s36", 0 0, L_0x1f60470; 1 drivers +v0x1eb8fb0_0 .net *"_s39", 0 0, L_0x1f609e0; 1 drivers +v0x1eb92f0_0 .net *"_s41", 0 0, L_0x1f60790; 1 drivers +v0x1eb90f0_0 .net *"_s42", 0 0, L_0x1f60ad0; 1 drivers +v0x1eb9190_0 .net *"_s45", 0 0, L_0x1f60d80; 1 drivers +v0x1eb9230_0 .net *"_s47", 0 0, L_0x1f60e70; 1 drivers +v0x1eb9590_0 .net *"_s48", 0 0, L_0x1f61030; 1 drivers +v0x1eb9390_0 .net *"_s5", 0 0, L_0x1f5f5f0; 1 drivers +v0x1eb9430_0 .net *"_s51", 0 0, L_0x1f610e0; 1 drivers +v0x1eb94d0_0 .net *"_s53", 0 0, L_0x1f60f60; 1 drivers +v0x1eb9850_0 .net *"_s54", 0 0, L_0x1f611d0; 1 drivers +v0x1eb9610_0 .net *"_s57", 0 0, L_0x1f614f0; 1 drivers +v0x1eb96b0_0 .net *"_s59", 0 0, L_0x1f61590; 1 drivers +v0x1eb9750_0 .net *"_s6", 0 0, L_0x1f58f70; 1 drivers +v0x1eb9b30_0 .net *"_s60", 0 0, L_0x1f61780; 1 drivers +v0x1eb98d0_0 .net *"_s63", 0 0, L_0x1f617e0; 1 drivers +v0x1eb9970_0 .net *"_s65", 0 0, L_0x1f61680; 1 drivers +v0x1eb9a10_0 .net *"_s66", 0 0, L_0x1f618d0; 1 drivers +v0x1eb9ab0_0 .net *"_s69", 0 0, L_0x1f61ba0; 1 drivers +v0x1eb9e40_0 .net *"_s71", 0 0, L_0x1f61c40; 1 drivers +v0x1eb9ec0_0 .net *"_s72", 0 0, L_0x1f61490; 1 drivers +v0x1eb9bd0_0 .net *"_s75", 0 0, L_0x1f61e60; 1 drivers +v0x1eb9c70_0 .net *"_s77", 0 0, L_0x1f61d30; 1 drivers +v0x1eb9d10_0 .net *"_s78", 0 0, L_0x1f61f50; 1 drivers +v0x1eb9db0_0 .net *"_s81", 0 0, L_0x1f62280; 1 drivers +v0x1eba220_0 .net *"_s83", 0 0, L_0x1f62320; 1 drivers +v0x1eba2c0_0 .net *"_s84", 0 0, L_0x1f621d0; 1 drivers +v0x1eb9f60_0 .net *"_s87", 0 0, L_0x1f608d0; 1 drivers +v0x1eba000_0 .net *"_s89", 0 0, L_0x1f62410; 1 drivers +v0x1eba0a0_0 .net *"_s9", 0 0, L_0x1f5f730; 1 drivers +v0x1eba140_0 .net *"_s90", 0 0, L_0x1f62500; 1 drivers +v0x1eba630_0 .net *"_s93", 0 0, L_0x1f62b10; 1 drivers +v0x1eba6b0_0 .net *"_s95", 0 0, L_0x1f62bb0; 1 drivers +v0x1eba360_0 .net *"_s96", 0 0, L_0x1f62a30; 1 drivers +v0x1eba400_0 .net *"_s99", 0 0, L_0x1f62e30; 1 drivers +v0x1eba4a0_0 .alias "a", 31 0, v0x1f02500_0; +v0x1eba540_0 .alias "b", 31 0, v0x1f026c0_0; +v0x1ebaa50_0 .alias "out", 31 0, v0x1f01de0_0; +L_0x1f5ef40 .part/pv L_0x1f5f030, 0, 1, 32; +L_0x1f5f0e0 .part v0x1f031c0_0, 0, 1; +L_0x1f5f5f0 .part v0x1f023a0_0, 0, 1; +L_0x1f5f690 .part/pv L_0x1f58f70, 1, 1, 32; +L_0x1f5f730 .part v0x1f031c0_0, 1, 1; +L_0x1f5f820 .part v0x1f023a0_0, 1, 1; +L_0x1f5f910 .part/pv L_0x1f5fa40, 2, 1, 32; +L_0x1f5faa0 .part v0x1f031c0_0, 2, 1; +L_0x1f5fbe0 .part v0x1f023a0_0, 2, 1; +L_0x1f5fcd0 .part/pv L_0x1f5fdd0, 3, 1, 32; +L_0x1f5fe30 .part v0x1f031c0_0, 3, 1; +L_0x1f5ff20 .part v0x1f023a0_0, 3, 1; +L_0x1f60080 .part/pv L_0x1f5fd70, 4, 1, 32; +L_0x1f60170 .part v0x1f031c0_0, 4, 1; +L_0x1f602e0 .part v0x1f023a0_0, 4, 1; +L_0x1f603d0 .part/pv L_0x1f60500, 5, 1, 32; +L_0x1f605b0 .part v0x1f031c0_0, 5, 1; +L_0x1f606a0 .part v0x1f023a0_0, 5, 1; +L_0x1f60830 .part/pv L_0x1f60470, 6, 1, 32; +L_0x1f609e0 .part v0x1f031c0_0, 6, 1; +L_0x1f60790 .part v0x1f023a0_0, 6, 1; +L_0x1f60bd0 .part/pv L_0x1f60ad0, 7, 1, 32; +L_0x1f60d80 .part v0x1f031c0_0, 7, 1; +L_0x1f60e70 .part v0x1f023a0_0, 7, 1; +L_0x1f60c70 .part/pv L_0x1f61030, 8, 1, 32; +L_0x1f610e0 .part v0x1f031c0_0, 8, 1; +L_0x1f60f60 .part v0x1f023a0_0, 8, 1; +L_0x1f61300 .part/pv L_0x1f611d0, 9, 1, 32; +L_0x1f614f0 .part v0x1f031c0_0, 9, 1; +L_0x1f61590 .part v0x1f023a0_0, 9, 1; +L_0x1f613a0 .part/pv L_0x1f61780, 10, 1, 32; +L_0x1f617e0 .part v0x1f031c0_0, 10, 1; +L_0x1f61680 .part v0x1f023a0_0, 10, 1; +L_0x1f619e0 .part/pv L_0x1f618d0, 11, 1, 32; +L_0x1f61ba0 .part v0x1f031c0_0, 11, 1; +L_0x1f61c40 .part v0x1f023a0_0, 11, 1; +L_0x1f61a80 .part/pv L_0x1f61490, 12, 1, 32; +L_0x1f61e60 .part v0x1f031c0_0, 12, 1; +L_0x1f61d30 .part v0x1f023a0_0, 12, 1; +L_0x1f62090 .part/pv L_0x1f61f50, 13, 1, 32; +L_0x1f62280 .part v0x1f031c0_0, 13, 1; +L_0x1f62320 .part v0x1f023a0_0, 13, 1; +L_0x1f62130 .part/pv L_0x1f621d0, 14, 1, 32; +L_0x1f608d0 .part v0x1f031c0_0, 14, 1; +L_0x1f62410 .part v0x1f023a0_0, 14, 1; +L_0x1f628f0 .part/pv L_0x1f62500, 15, 1, 32; +L_0x1f62b10 .part v0x1f031c0_0, 15, 1; +L_0x1f62bb0 .part v0x1f023a0_0, 15, 1; +L_0x1f62990 .part/pv L_0x1f62a30, 16, 1, 32; +L_0x1f62e30 .part v0x1f031c0_0, 16, 1; +L_0x1f62ca0 .part v0x1f023a0_0, 16, 1; +L_0x1f62d90 .part/pv L_0x1f630d0, 17, 1, 32; +L_0x1f63220 .part v0x1f031c0_0, 17, 1; +L_0x1f632c0 .part v0x1f023a0_0, 17, 1; +L_0x1f62f20 .part/pv L_0x1f62fc0, 18, 1, 32; +L_0x1f63570 .part v0x1f031c0_0, 18, 1; +L_0x1f633b0 .part v0x1f023a0_0, 18, 1; +L_0x1f634a0 .part/pv L_0x1f637f0, 19, 1, 32; +L_0x1f63180 .part v0x1f031c0_0, 19, 1; +L_0x1f639a0 .part v0x1f023a0_0, 19, 1; +L_0x1f63610 .part/pv L_0x1f636b0, 20, 1, 32; +L_0x1f63c80 .part v0x1f031c0_0, 20, 1; +L_0x1f63a90 .part v0x1f023a0_0, 20, 1; +L_0x1f63b80 .part/pv L_0x1f63c20, 21, 1, 32; +L_0x1f638a0 .part v0x1f031c0_0, 21, 1; +L_0x1f64090 .part v0x1f023a0_0, 21, 1; +L_0x1f63d20 .part/pv L_0x1f63dc0, 22, 1, 32; +L_0x1f63e70 .part v0x1f031c0_0, 22, 1; +L_0x1f45370 .part v0x1f023a0_0, 22, 1; +L_0x1f45460 .part/pv L_0x1f60260, 23, 1, 32; +L_0x1f63f80 .part v0x1f031c0_0, 23, 1; +L_0x1f452b0 .part v0x1f023a0_0, 23, 1; +L_0x1f45500 .part/pv L_0x1f455a0, 24, 1, 32; +L_0x1f45650 .part v0x1f031c0_0, 24, 1; +L_0x1f459f0 .part v0x1f023a0_0, 24, 1; +L_0x1f45ae0 .part/pv L_0x1f45790, 25, 1, 32; +L_0x1f45920 .part v0x1f031c0_0, 25, 1; +L_0x1f45df0 .part v0x1f023a0_0, 25, 1; +L_0x1f45ee0 .part/pv L_0x1f45f80, 26, 1, 32; +L_0x1f46030 .part v0x1f031c0_0, 26, 1; +L_0x1f45b80 .part v0x1f023a0_0, 26, 1; +L_0x1f45c70 .part/pv L_0x1f45d10, 27, 1, 32; +L_0x1f45840 .part v0x1f031c0_0, 27, 1; +L_0x1f66520 .part v0x1f023a0_0, 27, 1; +L_0x1f66190 .part/pv L_0x1f66230, 28, 1, 32; +L_0x1f662e0 .part v0x1f031c0_0, 28, 1; +L_0x1f668d0 .part v0x1f023a0_0, 28, 1; +L_0x1f66970 .part/pv L_0x1f66610, 29, 1, 32; +L_0x1f66430 .part v0x1f031c0_0, 29, 1; +L_0x1f667c0 .part v0x1f023a0_0, 29, 1; +L_0x1f66cf0 .part/pv L_0x1eb7c30, 30, 1, 32; +L_0x1f62570 .part v0x1f031c0_0, 30, 1; +L_0x1f62660 .part v0x1f023a0_0, 30, 1; +L_0x1f66a10 .part/pv L_0x1f66ab0, 31, 1, 32; +L_0x1f666c0 .part v0x1f031c0_0, 31, 1; +L_0x1f674a0 .part v0x1f023a0_0, 31, 1; + .scope S_0x1e1db00; +T_1 ; + %wait E_0x1e20a50; + %load/v 8, v0x1eb5680_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_1.1, 6; + %jmp T_1.2; +T_1.0 ; + %load/v 8, v0x1cd5b70_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x1eb5720_0, 0, 8; + %jmp T_1.2; +T_1.1 ; + %load/v 8, v0x1eb55e0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x1eb5720_0, 0, 8; + %jmp T_1.2; +T_1.2 ; + %jmp T_1; + .thread T_1, $push; + .scope S_0x1dfcea0; +T_2 ; + %wait E_0x1eb5a50; + %load/v 8, v0x1eb61c0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_2.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_2.1, 6; + %jmp T_2.2; +T_2.0 ; + %load/v 8, v0x1eb6280_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1eb63c0_0, 0, 8; + %jmp T_2.2; +T_2.1 ; + %load/v 8, v0x1eb6320_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1eb63c0_0, 0, 8; + %jmp T_2.2; +T_2.2 ; + %jmp T_2; + .thread T_2, $push; + .scope S_0x1f02180; +T_3 ; + %wait E_0x1f02270; + %load/v 8, v0x1f01f10_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_3.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_3.1, 6; + %jmp T_3.2; +T_3.0 ; + %load/v 8, v0x1f022a0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f023a0_0, 0, 8; + %jmp T_3.2; +T_3.1 ; + %load/v 8, v0x1f02320_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f023a0_0, 0, 8; + %jmp T_3.2; +T_3.2 ; + %jmp T_3; + .thread T_3, $push; + .scope S_0x1eb65d0; +T_4 ; + %wait E_0x1eb6730; + %load/v 8, v0x1f012f0_0, 3; + %cmpi/u 8, 0, 3; + %jmp/1 T_4.0, 6; + %cmpi/u 8, 1, 3; + %jmp/1 T_4.1, 6; + %cmpi/u 8, 2, 3; + %jmp/1 T_4.2, 6; + %cmpi/u 8, 3, 3; + %jmp/1 T_4.3, 6; + %cmpi/u 8, 4, 3; + %jmp/1 T_4.4, 6; + %cmpi/u 8, 5, 3; + %jmp/1 T_4.5, 6; + %cmpi/u 8, 6, 3; + %jmp/1 T_4.6, 6; + %cmpi/u 8, 7, 3; + %jmp/1 T_4.7, 6; + %jmp T_4.8; +T_4.0 ; + %load/v 8, v0x1f01920_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %load/v 8, v0x1f01820_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 8; + %load/v 8, v0x1f018a0_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 8; + %jmp T_4.8; +T_4.1 ; + %load/v 8, v0x1f01920_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %load/v 8, v0x1f01820_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 8; + %load/v 8, v0x1f018a0_0, 1; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 8; + %jmp T_4.8; +T_4.2 ; + %load/v 8, v0x1f01fc0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 0; + %jmp T_4.8; +T_4.3 ; + %load/v 8, v0x1f01e90_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 0; + %jmp T_4.8; +T_4.4 ; + %load/v 8, v0x1f019a0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 0; + %jmp T_4.8; +T_4.5 ; + %load/v 8, v0x1f01cb0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 0; + %jmp T_4.8; +T_4.6 ; + %load/v 8, v0x1f01d30_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 0; + %jmp T_4.8; +T_4.7 ; + %load/v 8, v0x1f01de0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x1f01bb0_0, 0, 8; + %ix/load 0, 1, 0; + %assign/v0 v0x1ed3970_0, 0, 0; + %ix/load 0, 1, 0; + %assign/v0 v0x1f01c30_0, 0, 0; + %jmp T_4.8; +T_4.8 ; + %jmp T_4; + .thread T_4, $push; + .scope S_0x1eb65d0; +T_5 ; + %wait E_0x1eb66c0; + %load/v 8, v0x1f01bb0_0, 32; + %cmpi/u 8, 0, 32; + %jmp/0xz T_5.0, 4; + %ix/load 0, 1, 0; + %assign/v0 v0x1f02070_0, 0, 1; + %jmp T_5.1; +T_5.0 ; + %ix/load 0, 1, 0; + %assign/v0 v0x1f02070_0, 0, 0; +T_5.1 ; + %jmp T_5; + .thread T_5, $push; + .scope S_0x1eb6470; +T_6 ; + %wait E_0x1eb6560; + %load/v 8, v0x1f02920_0, 16; + %ix/load 1, 15, 0; + %mov 4, 0, 1; + %jmp/1 T_6.0, 4; + %load/x1p 56, v0x1f02920_0, 1; + %jmp T_6.1; +T_6.0 ; + %mov 56, 2, 1; +T_6.1 ; + %mov 40, 56, 1; Move signal select into place + %mov 55, 40, 1; Repetition 16 + %mov 54, 40, 1; Repetition 15 + %mov 53, 40, 1; Repetition 14 + %mov 52, 40, 1; Repetition 13 + %mov 51, 40, 1; Repetition 12 + %mov 50, 40, 1; Repetition 11 + %mov 49, 40, 1; Repetition 10 + %mov 48, 40, 1; Repetition 9 + %mov 47, 40, 1; Repetition 8 + %mov 46, 40, 1; Repetition 7 + %mov 45, 40, 1; Repetition 6 + %mov 44, 40, 1; Repetition 5 + %mov 43, 40, 1; Repetition 4 + %mov 42, 40, 1; Repetition 3 + %mov 41, 40, 1; Repetition 2 + %mov 24, 40, 16; + %ix/load 0, 32, 0; + %assign/v0 v0x1f028a0_0, 0, 8; + %jmp T_6; + .thread T_6, $push; + .scope S_0x1df01b0; +T_7 ; + %vpi_call 4 53 "$dumpfile", "dump_exec.vcd"; + %vpi_call 4 54 "$dumpvars"; + %movi 8, 500, 32; + %set/v v0x1f031c0_0, 8, 32; + %movi 8, 612, 32; + %set/v v0x1f03240_0, 8, 32; + %movi 8, 90, 16; + %set/v v0x1f03340_0, 8, 16; + %set/v v0x1f030a0_0, 0, 1; + %set/v v0x1f03140_0, 0, 3; + %delay 1000, 0; + %movi 8, 1112, 32; + %set/v v0x1f02df0_0, 8, 32; + %set/v v0x1f02ea0_0, 0, 1; + %set/v v0x1f02cf0_0, 0, 1; + %set/v v0x1f02d70_0, 0, 1; + %load/v 8, v0x1f03440_0, 32; + %set/v v0x1f02fa0_0, 8, 32; + %load/v 8, v0x1f03560_0, 1; + %set/v v0x1f03020_0, 8, 1; + %load/v 8, v0x1f032c0_0, 1; + %set/v v0x1f02c70_0, 8, 1; + %load/v 8, v0x1f033c0_0, 1; + %set/v v0x1f02f20_0, 8, 1; + %fork TD_testExecute.checkResult, S_0x1f02b80; + %join; + %delay 500, 0; + %set/v v0x1f030a0_0, 1, 1; + %delay 1000, 0; + %movi 8, 590, 32; + %set/v v0x1f02df0_0, 8, 32; + %set/v v0x1f02ea0_0, 0, 1; + %set/v v0x1f02cf0_0, 0, 1; + %set/v v0x1f02d70_0, 0, 1; + %load/v 8, v0x1f03440_0, 32; + %set/v v0x1f02fa0_0, 8, 32; + %load/v 8, v0x1f03560_0, 1; + %set/v v0x1f03020_0, 8, 1; + %load/v 8, v0x1f032c0_0, 1; + %set/v v0x1f02c70_0, 8, 1; + %load/v 8, v0x1f033c0_0, 1; + %set/v v0x1f02f20_0, 8, 1; + %fork TD_testExecute.checkResult, S_0x1f02b80; + %join; + %movi 8, 65036, 16; + %set/v v0x1f03340_0, 8, 16; + %delay 1000, 0; + %set/v v0x1f02df0_0, 0, 32; + %set/v v0x1f02ea0_0, 1, 1; + %set/v v0x1f02cf0_0, 1, 1; + %set/v v0x1f02d70_0, 0, 1; + %load/v 8, v0x1f03440_0, 32; + %set/v v0x1f02fa0_0, 8, 32; + %load/v 8, v0x1f03560_0, 1; + %set/v v0x1f03020_0, 8, 1; + %load/v 8, v0x1f032c0_0, 1; + %set/v v0x1f02c70_0, 8, 1; + %load/v 8, v0x1f033c0_0, 1; + %set/v v0x1f02f20_0, 8, 1; + %fork TD_testExecute.checkResult, S_0x1f02b80; + %join; + %delay 3000, 0; + %end; + .thread T_7; +# The file index is used to find the file name in the following table. +:file_names 14; + "N/A"; + ""; + "./mux.v"; + "./adder.v"; + "execute.t.v"; + "./execute.v"; + "./aluK.v"; + "./adder_subtracter.v"; + "./xor_32bit.v"; + "./slt.v"; + "./and_32bit.v"; + "./nand_32bit.v"; + "./nor_32bit.v"; + "./or_32bit.v"; diff --git a/testreg.t.v b/testreg.t.v new file mode 100644 index 0000000..6e1279d --- /dev/null +++ b/testreg.t.v @@ -0,0 +1,556 @@ +//------------------------------------------------------------------------------ +// Test harness validates hw4testbench by connecting it to various functional +// or broken register files, and verifying that it correctly identifies each +//------------------------------------------------------------------------------ +`include "register.v" +module hw4testbenchharness(); + + wire[31:0] ReadData1; // Data from first register read + wire[31:0] ReadData2; // Data from second register read + wire[31:0] WriteData; // Data to write to register + wire[4:0] ReadRegister1; // Address of first register to read + wire[4:0] ReadRegister2; // Address of second register to read + wire[4:0] WriteRegister; // Address of register to write + wire RegWrite; // Enable writing of register when High + wire Clk; // Clock (Positive Edge Triggered) + + reg begintest; // Set High to begin testing register file + wire dutpassed; // Indicates whether register file passed tests + + // Instantiate the register file being tested. DUT = Device Under Test + regfile DUT + ( + .ReadData1(ReadData1), + .ReadData2(ReadData2), + .WriteData(WriteData), + .ReadRegister1(ReadRegister1), + .ReadRegister2(ReadRegister2), + .WriteRegister(WriteRegister), + .RegWrite(RegWrite), + .Clk(Clk) + ); + + // Instantiate test bench to test the DUT + hw4testbench tester + ( + .begintest(begintest), + .endtest(endtest), + .dutpassed(dutpassed), + .ReadData1(ReadData1), + .ReadData2(ReadData2), + .WriteData(WriteData), + .ReadRegister1(ReadRegister1), + .ReadRegister2(ReadRegister2), + .WriteRegister(WriteRegister), + .RegWrite(RegWrite), + .Clk(Clk) + ); + + // Test harness asserts 'begintest' for 1000 time steps, starting at time 10 + initial begin + begintest=0; + #10; + begintest=1; + #1000; + end + + // Display test results ('dutpassed' signal) once 'endtest' goes high + always @(posedge endtest) begin + $display("DUT passed?: %b", dutpassed); + end + +endmodule + + +//------------------------------------------------------------------------------ +// Your HW4 test bench +// Generates signals to drive register file and passes them back up one +// layer to the test harness. This lets us plug in various working and +// broken register files to test. +// +// Once 'begintest' is asserted, begin testing the register file. +// Once your test is conclusive, set 'dutpassed' appropriately and then +// raise 'endtest'. +//------------------------------------------------------------------------------ + +module hw4testbench +( +// Test bench driver signal connections +input begintest, // Triggers start of testing +output reg endtest, // Raise once test completes +output reg dutpassed, // Signal test result + +// Register File DUT connections +input[31:0] ReadData1, +input[31:0] ReadData2, +output reg[31:0] WriteData, +output reg[4:0] ReadRegister1, +output reg[4:0] ReadRegister2, +output reg[4:0] WriteRegister, +output reg RegWrite, +output reg Clk +); + + // Initialize register driver signals + initial begin + WriteData=32'd0; + ReadRegister1=5'd0; + ReadRegister2=5'd0; + WriteRegister=5'd0; + RegWrite=0; + Clk=0; + end + + // Once 'begintest' is asserted, start running test cases + always @(posedge begintest) begin + endtest = 0; + dutpassed = 1; + #10 + + // Test Case 1: + // Write '42' to register 2, verify with Read Ports 1 and 2 + WriteRegister = 5'd2; + WriteData = 32'd42; + RegWrite = 1; + ReadRegister1 = 5'd2; + ReadRegister2 = 5'd2; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1 !== 42) || (ReadData2 !== 42)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 1 Failed"); + end + +// Test Case 2: + // Double check the zero register :) (#4 on the github) + WriteRegister = 5'd0; + WriteData = 32'd12; + RegWrite = 1; + ReadRegister1 = 5'd0; + ReadRegister2 = 5'd0; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1 !== 0) || (ReadData2 !== 0)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 2 Failed"); + end + +// Test Case 3: + // Write Enable is broken/ignored (#2 on the github) + WriteRegister = 5'd30; + WriteData = 32'd30; + RegWrite = 0; + ReadRegister1 = 5'd30; + ReadRegister2 = 5'd30; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1==32'd30) || (ReadData2==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 3 Failed"); + end + +// Test Case 4: + // Port 2 is not broken (#5 on the github) + WriteRegister = 5'd12; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd12; + ReadRegister2 = 5'd15; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 4 Failed"); + end + + + WriteRegister = 5'd1; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd1; + ReadRegister2 = 5'd1; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd2; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd2; + ReadRegister2 = 5'd2; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd3; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd3; + ReadRegister2 = 5'd3; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd4; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd4; + ReadRegister2 = 5'd4; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd5; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd5; + ReadRegister2 = 5'd5; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd6; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd6; + ReadRegister2 = 5'd6; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd7; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd7; + ReadRegister2 = 5'd7; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd8; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd8; + ReadRegister2 = 5'd8; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd9; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd9; + ReadRegister2 = 5'd9; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd10; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd10; + ReadRegister2 = 5'd10; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd11; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd11; + ReadRegister2 = 5'd11; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd12; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd12; + ReadRegister2 = 5'd12; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd13; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd13; + ReadRegister2 = 5'd13; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd14; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd14; + ReadRegister2 = 5'd14; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd15; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd15; + ReadRegister2 = 5'd15; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd16; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd16; + ReadRegister2 = 5'd16; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd17; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd17; + ReadRegister2 = 5'd17; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd18; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd18; + ReadRegister2 = 5'd18; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd19; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd19; + ReadRegister2 = 5'd19; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd20; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd20; + ReadRegister2 = 5'd20; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd21; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd21; + ReadRegister2 = 5'd21; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd22; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd22; + ReadRegister2 = 5'd22; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd23; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd23; + ReadRegister2 = 5'd23; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd24; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd24; + ReadRegister2 = 5'd24; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd25; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd25; + ReadRegister2 = 5'd25; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd26; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd26; + ReadRegister2 = 5'd26; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd27; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd27; + ReadRegister2 = 5'd27; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd28; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd28; + ReadRegister2 = 5'd28; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + WriteRegister = 5'd29; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd29; + ReadRegister2 = 5'd29; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd30; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd30; + ReadRegister2 = 5'd30; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + WriteRegister = 5'd31; + WriteData = 32'd30; + RegWrite = 1; + ReadRegister1 = 5'd31; + ReadRegister2 = 5'd31; + #5 Clk=1; #5 Clk=0; // Generate single clock pulse + // Verify expectations and report test result + if((ReadData1!==32'd30) || (ReadData2!==32'd30)) begin + dutpassed = 0; // Set to 'false' on failure + $display("Test Case 5 Failed"); + end + + + // All done! Wait a moment and signal test completion. + #5 + endtest = 1; + +end + +endmodule \ No newline at end of file diff --git a/text b/text new file mode 100644 index 0000000..db6f900 --- /dev/null +++ b/text @@ -0,0 +1,58 @@ +20040004 +2005000a +0c000006 +00022020 +0c00002c +08000039 +23bdfff4 +afbf0008 +afb00004 +afb10000 +00058820 +0c000016 +00028020 +00112020 +0c000016 +00028820 +02111020 +8fb10000 +8fb00004 +8fbf0008 +23bd000c +03e00008 +20010000 +14240002 +00001020 +03e00008 +20010001 +14240002 +00041020 +03e00008 +23bdfff8 +afbf0004 +afb00000 +00048020 +2084ffff +0c000016 +2204fffe +00028020 +0c000016 +00501020 +8fbf0004 +8fb00000 +23bd0008 +03e00008 +23bdfff8 +afbf0004 +afb00000 +00048020 +24020004 +20042000 +0000000c +24020001 +00102020 +0000000c +8fbf0004 +8fb00000 +23bd0008 +08000039 diff --git a/textexec b/textexec new file mode 100755 index 0000000..1475610 --- /dev/null +++ b/textexec @@ -0,0 +1,4125 @@ +#! /usr/bin/vvp +:ivl_version "0.9.7 " "(v0_9_7)"; +:vpi_time_precision + 0; +:vpi_module "system"; +:vpi_module "v2005_math"; +:vpi_module "va_math"; +S_0x2149ce0 .scope module, "addressmux" "addressmux" 2 35; + .timescale 0 0; +v0x2002bd0_0 .net "addr0", 4 0, C4; 0 drivers +v0x21e0500_0 .net "addr1", 4 0, C4; 0 drivers +v0x21e05a0_0 .net "mux_address", 0 0, C4; 0 drivers +v0x21e0640_0 .var "out", 0 0; +E_0x214cc30 .event edge, v0x21e05a0_0, v0x21e0500_0, v0x2002bd0_0; +S_0x2141940 .scope module, "behavioralFullAdder" "behavioralFullAdder" 3 3; + .timescale 0 0; +v0x21e06f0_0 .net *"_s10", 0 0, C4<0>; 1 drivers +v0x21e07b0_0 .net *"_s11", 1 0, L_0x222e7f0; 1 drivers +v0x21e0850_0 .net *"_s13", 1 0, L_0x222e990; 1 drivers +v0x21e08f0_0 .net *"_s16", 0 0, C4<0>; 1 drivers +v0x21e09a0_0 .net *"_s17", 1 0, L_0x222eb00; 1 drivers +v0x21e0a40_0 .net *"_s3", 1 0, L_0x222e5b0; 1 drivers +v0x21e0b20_0 .net *"_s6", 0 0, C4<0>; 1 drivers +v0x21e0bc0_0 .net *"_s7", 1 0, L_0x222e6a0; 1 drivers +v0x21e0cb0_0 .net "a", 0 0, C4; 0 drivers +v0x21e0d50_0 .net "b", 0 0, C4; 0 drivers +v0x21e0e50_0 .net "carryin", 0 0, C4; 0 drivers +v0x21e0ef0_0 .net "carryout", 0 0, L_0x222e420; 1 drivers +v0x21e1000_0 .net "sum", 0 0, L_0x222e4c0; 1 drivers +L_0x222e420 .part L_0x222eb00, 1, 1; +L_0x222e4c0 .part L_0x222eb00, 0, 1; +L_0x222e5b0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x222e6a0 .concat [ 1 1 0 0], C4, C4<0>; +L_0x222e7f0 .arith/sum 2, L_0x222e5b0, L_0x222e6a0; +L_0x222e990 .concat [ 1 1 0 0], C4, C4<0>; +L_0x222eb00 .arith/sum 2, L_0x222e7f0, L_0x222e990; +S_0x2129060 .scope module, "mux" "mux" 2 1; + .timescale 0 0; +P_0x209c3e8 .param/l "width" 2 2, +C4<0100000>; +v0x21e10e0_0 .net "address", 0 0, C4; 0 drivers +v0x21e11a0_0 .net "input0", 31 0, C4; 0 drivers +v0x21e1240_0 .net "input1", 31 0, C4; 0 drivers +v0x21e12e0_0 .var "out", 31 0; +E_0x21e0970 .event edge, v0x21e10e0_0, v0x21e1240_0, v0x21e11a0_0; +S_0x211f2b0 .scope module, "testExecute" "testExecute" 4 11; + .timescale 0 0; +v0x222de90_0 .var "ALU_OperandSource", 0 0; +v0x222df30_0 .var "ALU_cmd", 2 0; +v0x222dfb0_0 .var "Da", 31 0; +v0x222e030_0 .var "Db", 31 0; +v0x222e0b0_0 .net "carryout", 0 0, v0x21fe820_0; 1 drivers +v0x222e130_0 .var "imm", 15 0; +v0x222e1b0_0 .net "overflow", 0 0, v0x222ca20_0; 1 drivers +v0x222e230_0 .net "result", 31 0, v0x222c9a0_0; 1 drivers +v0x222e350_0 .net "zero", 0 0, v0x222ce60_0; 1 drivers +S_0x222d970 .scope task, "checkResult" "checkResult" 4 30, 4 30, S_0x211f2b0; + .timescale 0 0; +v0x222da60_0 .var "carryout", 0 0; +v0x222dae0_0 .var "exp_carryout", 0 0; +v0x222db60_0 .var "exp_overflow", 0 0; +v0x222dbe0_0 .var "exp_result", 31 0; +v0x222dc90_0 .var "exp_zero", 0 0; +v0x222dd10_0 .var "overflow", 0 0; +v0x222dd90_0 .var "result", 31 0; +v0x222de10_0 .var "zero", 0 0; +TD_testExecute.checkResult ; + %load/v 8, v0x222dd90_0, 32; + %load/v 40, v0x222dbe0_0, 32; + %cmp/u 8, 40, 32; + %mov 8, 4, 1; + %load/v 9, v0x222de10_0, 1; + %load/v 10, v0x222dc90_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x222da60_0, 1; + %load/v 10, v0x222dae0_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %load/v 9, v0x222dd10_0, 1; + %load/v 10, v0x222db60_0, 1; + %cmp/u 9, 10, 1; + %mov 9, 4, 1; + %and 8, 9, 1; + %jmp/0xz T_0.0, 8; + %vpi_call 4 41 "$display", "Passed."; + %jmp T_0.1; +T_0.0 ; + %vpi_call 4 44 "$display", "Failed"; + %vpi_call 4 45 "$display", "result: %d", v0x222dd90_0; + %vpi_call 4 46 "$display", "expected: %d", v0x222dbe0_0; + %vpi_call 4 47 "$display", "zero %b, carryout %b, overflow %b", v0x222de10_0, v0x222da60_0, v0x222dd10_0; +T_0.1 ; + %end; +S_0x21e1390 .scope module, "dut" "execute" 4 20, 5 5, S_0x211f2b0; + .timescale 0 0; +v0x222d240_0 .net "ALU_OperandSource", 0 0, v0x222de90_0; 1 drivers +v0x222d2f0_0 .net "Da", 31 0, v0x222dfb0_0; 1 drivers +v0x21fe710_0 .net "Db", 31 0, v0x222e030_0; 1 drivers +v0x222d4b0_0 .net "Operand", 31 0, v0x222d190_0; 1 drivers +v0x222d560_0 .alias "carryout", 0 0, v0x222e0b0_0; +v0x222d610_0 .net "command", 2 0, v0x222df30_0; 1 drivers +v0x222d690_0 .var "extended_imm", 31 0; +v0x222d710_0 .net "imm", 15 0, v0x222e130_0; 1 drivers +v0x222d790_0 .alias "overflow", 0 0, v0x222e1b0_0; +v0x222d810_0 .alias "result", 31 0, v0x222e230_0; +v0x222d8c0_0 .alias "zero", 0 0, v0x222e350_0; +E_0x21e1480 .event edge, v0x222d710_0; +S_0x222cf70 .scope module, "ALUSource" "mux2to1by32" 5 22, 2 18, S_0x21e1390; + .timescale 0 0; +v0x222cd00_0 .alias "address", 0 0, v0x222d240_0; +v0x222d090_0 .alias "input0", 31 0, v0x21fe710_0; +v0x222d110_0 .net "input1", 31 0, v0x222d690_0; 1 drivers +v0x222d190_0 .var "out", 31 0; +E_0x222d060 .event edge, v0x222cd00_0, v0x222d110_0, v0x222d090_0; +S_0x21e14f0 .scope module, "Alu" "ALUcontrolLUT" 5 28, 6 11, S_0x21e1390; + .timescale 0 0; +v0x222c0e0_0 .alias "ALUcommand", 2 0, v0x222d610_0; +v0x222c190_0 .alias "a", 31 0, v0x222d2f0_0; +v0x222c610_0 .net "adder_cout", 0 0, L_0x225f780; 1 drivers +v0x222c690_0 .net "adder_flag", 0 0, L_0x2260ed0; 1 drivers +RS_0x7ff1c0ed73a8/0/0 .resolv tri, L_0x2243850, L_0x2247c00, L_0x224bf10, L_0x2250260; +RS_0x7ff1c0ed73a8/0/4 .resolv tri, L_0x2254540, L_0x2258830, L_0x225cb50, L_0x2260fd0; +RS_0x7ff1c0ed73a8 .resolv tri, RS_0x7ff1c0ed73a8/0/0, RS_0x7ff1c0ed73a8/0/4, C4, C4; +v0x222c710_0 .net8 "addsub", 31 0, RS_0x7ff1c0ed73a8; 8 drivers +RS_0x7ff1c0ec9cf8/0/0 .resolv tri, L_0x2273930, L_0x22742b0, L_0x22745e0, L_0x22749a0; +RS_0x7ff1c0ec9cf8/0/4 .resolv tri, L_0x2274d50, L_0x22750a0, L_0x2275500, L_0x22758a0; +RS_0x7ff1c0ec9cf8/0/8 .resolv tri, L_0x2275940, L_0x2275fd0, L_0x2276070, L_0x22766b0; +RS_0x7ff1c0ec9cf8/0/12 .resolv tri, L_0x2276750, L_0x2276d60, L_0x2276e00, L_0x22775c0; +RS_0x7ff1c0ec9cf8/0/16 .resolv tri, L_0x2277660, L_0x2277a60, L_0x2277bf0, L_0x2278170; +RS_0x7ff1c0ec9cf8/0/20 .resolv tri, L_0x22782e0, L_0x2278850, L_0x22789f0, L_0x2278f40; +RS_0x7ff1c0ec9cf8/0/24 .resolv tri, L_0x22790c0, L_0x22798b0, L_0x2279950, L_0x2279fe0; +RS_0x7ff1c0ec9cf8/0/28 .resolv tri, L_0x227a080, L_0x227a6d0, L_0x227aa50, L_0x227a770; +RS_0x7ff1c0ec9cf8/1/0 .resolv tri, RS_0x7ff1c0ec9cf8/0/0, RS_0x7ff1c0ec9cf8/0/4, RS_0x7ff1c0ec9cf8/0/8, RS_0x7ff1c0ec9cf8/0/12; +RS_0x7ff1c0ec9cf8/1/4 .resolv tri, RS_0x7ff1c0ec9cf8/0/16, RS_0x7ff1c0ec9cf8/0/20, RS_0x7ff1c0ec9cf8/0/24, RS_0x7ff1c0ec9cf8/0/28; +RS_0x7ff1c0ec9cf8 .resolv tri, RS_0x7ff1c0ec9cf8/1/0, RS_0x7ff1c0ec9cf8/1/4, C4, C4; +v0x222c790_0 .net8 "andin", 31 0, RS_0x7ff1c0ec9cf8; 32 drivers +v0x222c810_0 .alias "b", 31 0, v0x222d4b0_0; +v0x21fe820_0 .var "cout", 0 0; +v0x222c9a0_0 .var "finalsignal", 31 0; +v0x222ca20_0 .var "flag", 0 0; +RS_0x7ff1c0ec8ac8/0/0 .resolv tri, L_0x227af00, L_0x227b650, L_0x227b8d0, L_0x227bc90; +RS_0x7ff1c0ec8ac8/0/4 .resolv tri, L_0x227c040, L_0x227c390, L_0x227c7f0, L_0x227cb90; +RS_0x7ff1c0ec8ac8/0/8 .resolv tri, L_0x227cc30, L_0x227d2c0, L_0x227d360, L_0x227d9a0; +RS_0x7ff1c0ec8ac8/0/12 .resolv tri, L_0x227da40, L_0x227e050, L_0x227e0f0, L_0x226d730; +RS_0x7ff1c0ec8ac8/0/16 .resolv tri, L_0x226d7d0, L_0x226da40, L_0x227f750, L_0x227fc20; +RS_0x7ff1c0ec8ac8/0/20 .resolv tri, L_0x227fd90, L_0x2280300, L_0x22804a0, L_0x22809f0; +RS_0x7ff1c0ec8ac8/0/24 .resolv tri, L_0x2280b70, L_0x2281360, L_0x2281400, L_0x2281a90; +RS_0x7ff1c0ec8ac8/0/28 .resolv tri, L_0x2281b30, L_0x2282180, L_0x2282500, L_0x2282220; +RS_0x7ff1c0ec8ac8/1/0 .resolv tri, RS_0x7ff1c0ec8ac8/0/0, RS_0x7ff1c0ec8ac8/0/4, RS_0x7ff1c0ec8ac8/0/8, RS_0x7ff1c0ec8ac8/0/12; +RS_0x7ff1c0ec8ac8/1/4 .resolv tri, RS_0x7ff1c0ec8ac8/0/16, RS_0x7ff1c0ec8ac8/0/20, RS_0x7ff1c0ec8ac8/0/24, RS_0x7ff1c0ec8ac8/0/28; +RS_0x7ff1c0ec8ac8 .resolv tri, RS_0x7ff1c0ec8ac8/1/0, RS_0x7ff1c0ec8ac8/1/4, C4, C4; +v0x222caa0_0 .net8 "nandin", 31 0, RS_0x7ff1c0ec8ac8; 32 drivers +RS_0x7ff1c0ec7898/0/0 .resolv tri, L_0x2282cc0, L_0x2283040, L_0x2283370, L_0x2283730; +RS_0x7ff1c0ec7898/0/4 .resolv tri, L_0x2283ae0, L_0x2283e30, L_0x22841f0, L_0x2284590; +RS_0x7ff1c0ec7898/0/8 .resolv tri, L_0x2284630, L_0x2284cc0, L_0x2284d60, L_0x22853a0; +RS_0x7ff1c0ec7898/0/12 .resolv tri, L_0x2285440, L_0x2285ac0, L_0x2285b60, L_0x2286370; +RS_0x7ff1c0ec7898/0/16 .resolv tri, L_0x2286410, L_0x2286770, L_0x2286900, L_0x2286e80; +RS_0x7ff1c0ec7898/0/20 .resolv tri, L_0x2286ff0, L_0x2287560, L_0x2287700, L_0x2287c50; +RS_0x7ff1c0ec7898/0/24 .resolv tri, L_0x2287dd0, L_0x22885c0, L_0x2288660, L_0x2288cf0; +RS_0x7ff1c0ec7898/0/28 .resolv tri, L_0x2288d90, L_0x22893e0, L_0x2289760, L_0x2286130; +RS_0x7ff1c0ec7898/1/0 .resolv tri, RS_0x7ff1c0ec7898/0/0, RS_0x7ff1c0ec7898/0/4, RS_0x7ff1c0ec7898/0/8, RS_0x7ff1c0ec7898/0/12; +RS_0x7ff1c0ec7898/1/4 .resolv tri, RS_0x7ff1c0ec7898/0/16, RS_0x7ff1c0ec7898/0/20, RS_0x7ff1c0ec7898/0/24, RS_0x7ff1c0ec7898/0/28; +RS_0x7ff1c0ec7898 .resolv tri, RS_0x7ff1c0ec7898/1/0, RS_0x7ff1c0ec7898/1/4, C4, C4; +v0x222cb20_0 .net8 "norin", 31 0, RS_0x7ff1c0ec7898; 32 drivers +RS_0x7ff1c0ec6668/0/0 .resolv tri, L_0x2289f20, L_0x228a2a0, L_0x228a5d0, L_0x228a990; +RS_0x7ff1c0ec6668/0/4 .resolv tri, L_0x228ad40, L_0x228b090, L_0x228b4f0, L_0x228b890; +RS_0x7ff1c0ec6668/0/8 .resolv tri, L_0x228b930, L_0x228bfc0, L_0x228c060, L_0x228c6a0; +RS_0x7ff1c0ec6668/0/12 .resolv tri, L_0x228c740, L_0x228cd50, L_0x228cdf0, L_0x228d5b0; +RS_0x7ff1c0ec6668/0/16 .resolv tri, L_0x228d650, L_0x228da50, L_0x228dbe0, L_0x228e160; +RS_0x7ff1c0ec6668/0/20 .resolv tri, L_0x228e2d0, L_0x228e840, L_0x228e9e0, L_0x22702a0; +RS_0x7ff1c0ec6668/0/24 .resolv tri, L_0x2270340, L_0x2270920, L_0x2270d20, L_0x2270ab0; +RS_0x7ff1c0ec6668/0/28 .resolv tri, L_0x2290e50, L_0x2291630, L_0x22919b0, L_0x22916d0; +RS_0x7ff1c0ec6668/1/0 .resolv tri, RS_0x7ff1c0ec6668/0/0, RS_0x7ff1c0ec6668/0/4, RS_0x7ff1c0ec6668/0/8, RS_0x7ff1c0ec6668/0/12; +RS_0x7ff1c0ec6668/1/4 .resolv tri, RS_0x7ff1c0ec6668/0/16, RS_0x7ff1c0ec6668/0/20, RS_0x7ff1c0ec6668/0/24, RS_0x7ff1c0ec6668/0/28; +RS_0x7ff1c0ec6668 .resolv tri, RS_0x7ff1c0ec6668/1/0, RS_0x7ff1c0ec6668/1/4, C4, C4; +v0x222cbd0_0 .net8 "orin", 31 0, RS_0x7ff1c0ec6668; 32 drivers +v0x222cc80_0 .net "slt", 31 0, L_0x2273c30; 1 drivers +RS_0x7ff1c0ecd988/0/0 .resolv tri, L_0x225d0f0, L_0x2261580, L_0x22618b0, L_0x2261c70; +RS_0x7ff1c0ecd988/0/4 .resolv tri, L_0x2261fb0, L_0x2262280, L_0x22626e0, L_0x2262a80; +RS_0x7ff1c0ecd988/0/8 .resolv tri, L_0x2262b20, L_0x2263070, L_0x2263110, L_0x22636f0; +RS_0x7ff1c0ecd988/0/12 .resolv tri, L_0x2263790, L_0x2263df0, L_0x2263e90, L_0x22641c0; +RS_0x7ff1c0ecd988/0/16 .resolv tri, L_0x2264940, L_0x2264c50, L_0x2264de0, L_0x2265360; +RS_0x7ff1c0ecd988/0/20 .resolv tri, L_0x22654d0, L_0x2265a40, L_0x2265be0, L_0x2266130; +RS_0x7ff1c0ecd988/0/24 .resolv tri, L_0x22662b0, L_0x2266aa0, L_0x2266b40, L_0x22671d0; +RS_0x7ff1c0ecd988/0/28 .resolv tri, L_0x2267270, L_0x22678c0, L_0x2267c40, L_0x22679b0; +RS_0x7ff1c0ecd988/1/0 .resolv tri, RS_0x7ff1c0ecd988/0/0, RS_0x7ff1c0ecd988/0/4, RS_0x7ff1c0ecd988/0/8, RS_0x7ff1c0ecd988/0/12; +RS_0x7ff1c0ecd988/1/4 .resolv tri, RS_0x7ff1c0ecd988/0/16, RS_0x7ff1c0ecd988/0/20, RS_0x7ff1c0ecd988/0/24, RS_0x7ff1c0ecd988/0/28; +RS_0x7ff1c0ecd988 .resolv tri, RS_0x7ff1c0ecd988/1/0, RS_0x7ff1c0ecd988/1/4, C4, C4; +v0x222cdb0_0 .net8 "xorin", 31 0, RS_0x7ff1c0ecd988; 32 drivers +v0x222ce60_0 .var "zeroflag", 0 0; +E_0x21e15e0 .event edge, v0x21e53e0_0, v0x21e5340_0, v0x222b5f0_0; +S_0x22043a0 .scope module, "addsub0" "adder_subtracter" 6 34, 7 175, S_0x21e14f0; + .timescale 0 0; +L_0x222ed30 .functor NOT 1, L_0x222ede0, C4<0>, C4<0>, C4<0>; +L_0x222ef70 .functor NOT 1, L_0x222f020, C4<0>, C4<0>, C4<0>; +L_0x222f240 .functor NOT 1, L_0x222f2a0, C4<0>, C4<0>, C4<0>; +L_0x222f430 .functor NOT 1, L_0x222f4e0, C4<0>, C4<0>, C4<0>; +L_0x222f6c0 .functor NOT 1, L_0x222f770, C4<0>, C4<0>, C4<0>; +L_0x222f960 .functor NOT 1, L_0x222f9c0, C4<0>, C4<0>, C4<0>; +L_0x222f860 .functor NOT 1, L_0x222fdd0, C4<0>, C4<0>, C4<0>; +L_0x222ff90 .functor NOT 1, L_0x2230090, C4<0>, C4<0>, C4<0>; +L_0x22302b0 .functor NOT 1, L_0x2230360, C4<0>, C4<0>, C4<0>; +L_0x2230180 .functor NOT 1, L_0x2230640, C4<0>, C4<0>, C4<0>; +L_0x2230790 .functor NOT 1, L_0x2230840, C4<0>, C4<0>, C4<0>; +L_0x22309f0 .functor NOT 1, L_0x2230aa0, C4<0>, C4<0>, C4<0>; +L_0x22305e0 .functor NOT 1, L_0x2230cb0, C4<0>, C4<0>, C4<0>; +L_0x2230e80 .functor NOT 1, L_0x2230f30, C4<0>, C4<0>, C4<0>; +L_0x222fcc0 .functor NOT 1, L_0x2231320, C4<0>, C4<0>, C4<0>; +L_0x22314c0 .functor NOT 1, L_0x22315b0, C4<0>, C4<0>, C4<0>; +L_0x2231460 .functor NOT 1, L_0x2231800, C4<0>, C4<0>, C4<0>; +L_0x2231740 .functor NOT 1, L_0x2231b00, C4<0>, C4<0>, C4<0>; +L_0x2231990 .functor NOT 1, L_0x2231d20, C4<0>, C4<0>, C4<0>; +L_0x2231c40 .functor NOT 1, L_0x2231a60, C4<0>, C4<0>, C4<0>; +L_0x2231eb0 .functor NOT 1, L_0x2232240, C4<0>, C4<0>, C4<0>; +L_0x2232140 .functor NOT 1, L_0x2231fa0, C4<0>, C4<0>, C4<0>; +L_0x2229d00 .functor NOT 1, L_0x2232330, C4<0>, C4<0>, C4<0>; +L_0x222e890 .functor NOT 1, L_0x2232420, C4<0>, C4<0>, C4<0>; +L_0x2232a50 .functor NOT 1, L_0x2232d90, C4<0>, C4<0>, C4<0>; +L_0x2232ca0 .functor NOT 1, L_0x2232b00, C4<0>, C4<0>, C4<0>; +L_0x2232ed0 .functor NOT 1, L_0x2233260, C4<0>, C4<0>, C4<0>; +L_0x2233150 .functor NOT 1, L_0x2232fd0, C4<0>, C4<0>, C4<0>; +L_0x22333a0 .functor NOT 1, L_0x2233780, C4<0>, C4<0>, C4<0>; +L_0x2233650 .functor NOT 1, L_0x22334a0, C4<0>, C4<0>, C4<0>; +L_0x222fe70 .functor NOT 1, L_0x22338c0, C4<0>, C4<0>, C4<0>; +L_0x2233ba0 .functor NOT 1, L_0x2233c00, C4<0>, C4<0>, C4<0>; +v0x22283a0_0 .net "_", 0 0, L_0x2243700; 1 drivers +v0x22289e0_0 .net "_1", 0 0, L_0x2247ab0; 1 drivers +v0x2228a60_0 .net "_2", 0 0, L_0x224bdc0; 1 drivers +v0x2228ae0_0 .net "_3", 0 0, L_0x2250110; 1 drivers +v0x2228b60_0 .net "_4", 0 0, L_0x22543f0; 1 drivers +v0x2228be0_0 .net "_5", 0 0, L_0x22586e0; 1 drivers +v0x2228c60_0 .net "_6", 0 0, L_0x225ca00; 1 drivers +v0x2228ce0_0 .net *"_s0", 0 0, L_0x222ed30; 1 drivers +v0x2228db0_0 .net *"_s100", 0 0, L_0x2232ca0; 1 drivers +v0x2228e30_0 .net *"_s103", 0 0, L_0x2232b00; 1 drivers +v0x2228f10_0 .net *"_s104", 0 0, L_0x2232ed0; 1 drivers +v0x2228f90_0 .net *"_s107", 0 0, L_0x2233260; 1 drivers +v0x2229080_0 .net *"_s108", 0 0, L_0x2233150; 1 drivers +v0x2229100_0 .net *"_s11", 0 0, L_0x222f2a0; 1 drivers +v0x2229200_0 .net *"_s111", 0 0, L_0x2232fd0; 1 drivers +v0x2229280_0 .net *"_s112", 0 0, L_0x22333a0; 1 drivers +v0x2229180_0 .net *"_s115", 0 0, L_0x2233780; 1 drivers +v0x22293d0_0 .net *"_s116", 0 0, L_0x2233650; 1 drivers +v0x22294f0_0 .net *"_s119", 0 0, L_0x22334a0; 1 drivers +v0x2229570_0 .net *"_s12", 0 0, L_0x222f430; 1 drivers +v0x2229450_0 .net *"_s120", 0 0, L_0x222fe70; 1 drivers +v0x22296a0_0 .net *"_s123", 0 0, L_0x22338c0; 1 drivers +v0x22295f0_0 .net *"_s124", 0 0, L_0x2233ba0; 1 drivers +v0x22297e0_0 .net *"_s127", 0 0, L_0x2233c00; 1 drivers +v0x2229740_0 .net *"_s15", 0 0, L_0x222f4e0; 1 drivers +v0x2229930_0 .net *"_s16", 0 0, L_0x222f6c0; 1 drivers +v0x2229880_0 .net *"_s19", 0 0, L_0x222f770; 1 drivers +v0x2229a90_0 .net *"_s20", 0 0, L_0x222f960; 1 drivers +v0x22299d0_0 .net *"_s23", 0 0, L_0x222f9c0; 1 drivers +v0x2229c00_0 .net *"_s24", 0 0, L_0x222f860; 1 drivers +v0x2229b10_0 .net *"_s27", 0 0, L_0x222fdd0; 1 drivers +v0x2229d80_0 .net *"_s28", 0 0, L_0x222ff90; 1 drivers +v0x2229c80_0 .net *"_s3", 0 0, L_0x222ede0; 1 drivers +v0x2229f10_0 .net *"_s31", 0 0, L_0x2230090; 1 drivers +v0x2229e00_0 .net *"_s32", 0 0, L_0x22302b0; 1 drivers +v0x222a0b0_0 .net *"_s35", 0 0, L_0x2230360; 1 drivers +v0x2229f90_0 .net *"_s36", 0 0, L_0x2230180; 1 drivers +v0x222a030_0 .net *"_s39", 0 0, L_0x2230640; 1 drivers +v0x222a270_0 .net *"_s4", 0 0, L_0x222ef70; 1 drivers +v0x222a2f0_0 .net *"_s40", 0 0, L_0x2230790; 1 drivers +v0x222a130_0 .net *"_s43", 0 0, L_0x2230840; 1 drivers +v0x222a1d0_0 .net *"_s44", 0 0, L_0x22309f0; 1 drivers +v0x222a4d0_0 .net *"_s47", 0 0, L_0x2230aa0; 1 drivers +v0x222a550_0 .net *"_s48", 0 0, L_0x22305e0; 1 drivers +v0x222a370_0 .net *"_s51", 0 0, L_0x2230cb0; 1 drivers +v0x222a410_0 .net *"_s52", 0 0, L_0x2230e80; 1 drivers +v0x222a750_0 .net *"_s55", 0 0, L_0x2230f30; 1 drivers +v0x222a7d0_0 .net *"_s56", 0 0, L_0x222fcc0; 1 drivers +v0x222a5f0_0 .net *"_s59", 0 0, L_0x2231320; 1 drivers +v0x222a690_0 .net *"_s60", 0 0, L_0x22314c0; 1 drivers +v0x222a9f0_0 .net *"_s63", 0 0, L_0x22315b0; 1 drivers +v0x222aa70_0 .net *"_s64", 0 0, L_0x2231460; 1 drivers +v0x222a870_0 .net *"_s67", 0 0, L_0x2231800; 1 drivers +v0x222a910_0 .net *"_s68", 0 0, L_0x2231740; 1 drivers +v0x222acb0_0 .net *"_s7", 0 0, L_0x222f020; 1 drivers +v0x222ad30_0 .net *"_s71", 0 0, L_0x2231b00; 1 drivers +v0x222aaf0_0 .net *"_s72", 0 0, L_0x2231990; 1 drivers +v0x222ab90_0 .net *"_s75", 0 0, L_0x2231d20; 1 drivers +v0x222ac30_0 .net *"_s76", 0 0, L_0x2231c40; 1 drivers +v0x222afb0_0 .net *"_s79", 0 0, L_0x2231a60; 1 drivers +v0x222add0_0 .net *"_s8", 0 0, L_0x222f240; 1 drivers +v0x222ae70_0 .net *"_s80", 0 0, L_0x2231eb0; 1 drivers +v0x222af10_0 .net *"_s83", 0 0, L_0x2232240; 1 drivers +v0x222b250_0 .net *"_s84", 0 0, L_0x2232140; 1 drivers +v0x222b050_0 .net *"_s87", 0 0, L_0x2231fa0; 1 drivers +v0x222b0f0_0 .net *"_s88", 0 0, L_0x2229d00; 1 drivers +v0x222b190_0 .net *"_s91", 0 0, L_0x2232330; 1 drivers +v0x222b4f0_0 .net *"_s92", 0 0, L_0x222e890; 1 drivers +v0x222b2f0_0 .net *"_s95", 0 0, L_0x2232420; 1 drivers +v0x222b390_0 .net *"_s96", 0 0, L_0x2232a50; 1 drivers +v0x222b430_0 .net *"_s99", 0 0, L_0x2232d90; 1 drivers +v0x222b7b0_0 .alias "ans", 31 0, v0x222c710_0; +v0x222b570_0 .alias "carryout", 0 0, v0x222c610_0; +v0x222b5f0_0 .alias "command", 2 0, v0x222d610_0; +v0x222b690_0 .net "cout0", 0 0, L_0x2241f70; 1 drivers +v0x222ba90_0 .net "cout1", 0 0, L_0x22463a0; 1 drivers +v0x222b8c0_0 .net "cout2", 0 0, L_0x224a6b0; 1 drivers +v0x222b9d0_0 .net "cout3", 0 0, L_0x224ea00; 1 drivers +v0x222be20_0 .net "cout4", 0 0, L_0x2252ce0; 1 drivers +v0x222bf30_0 .net "cout5", 0 0, L_0x2256fd0; 1 drivers +v0x222bba0_0 .net "cout6", 0 0, L_0x225b2f0; 1 drivers +RS_0x7ff1c0ed6778/0/0 .resolv tri, L_0x223ab00, L_0x2233f10, L_0x22391e0, L_0x223a8f0; +RS_0x7ff1c0ed6778/0/4 .resolv tri, L_0x2233cf0, L_0x223b9f0, L_0x223be20, L_0x223c070; +RS_0x7ff1c0ed6778/0/8 .resolv tri, L_0x223ba90, L_0x223bc30, L_0x223c450, L_0x223c640; +RS_0x7ff1c0ed6778/0/12 .resolv tri, L_0x223caa0, L_0x223cc40, L_0x223ce30, L_0x223cf20; +RS_0x7ff1c0ed6778/0/16 .resolv tri, L_0x223d110, L_0x223d300, L_0x223d790, L_0x223d940; +RS_0x7ff1c0ed6778/0/20 .resolv tri, L_0x223db30, L_0x223d4f0, L_0x223dcd0, L_0x223e190; +RS_0x7ff1c0ed6778/0/24 .resolv tri, L_0x223e380, L_0x223dec0, L_0x223e0b0, L_0x223e570; +RS_0x7ff1c0ed6778/0/28 .resolv tri, L_0x223e8c0, L_0x223edb0, L_0x223efa0, L_0x2237400; +RS_0x7ff1c0ed6778/1/0 .resolv tri, RS_0x7ff1c0ed6778/0/0, RS_0x7ff1c0ed6778/0/4, RS_0x7ff1c0ed6778/0/8, RS_0x7ff1c0ed6778/0/12; +RS_0x7ff1c0ed6778/1/4 .resolv tri, RS_0x7ff1c0ed6778/0/16, RS_0x7ff1c0ed6778/0/20, RS_0x7ff1c0ed6778/0/24, RS_0x7ff1c0ed6778/0/28; +RS_0x7ff1c0ed6778 .resolv tri, RS_0x7ff1c0ed6778/1/0, RS_0x7ff1c0ed6778/1/4, C4, C4; +v0x222bcb0_0 .net8 "finalB", 31 0, RS_0x7ff1c0ed6778; 32 drivers +RS_0x7ff1c0ed6118/0/0 .resolv tri, L_0x222ec40, L_0x222eed0, L_0x222f110, L_0x222f390; +RS_0x7ff1c0ed6118/0/4 .resolv tri, L_0x222f620, L_0x222f8c0, L_0x222c890, L_0x222fef0; +RS_0x7ff1c0ed6118/0/8 .resolv tri, L_0x2230210, L_0x22304f0, L_0x2230450, L_0x22306e0; +RS_0x7ff1c0ed6118/0/12 .resolv tri, L_0x2230930, L_0x2230b90, L_0x2230da0, L_0x2231020; +RS_0x7ff1c0ed6118/0/16 .resolv tri, L_0x22313c0, L_0x22316a0, L_0x22318f0, L_0x2231ba0; +RS_0x7ff1c0ed6118/0/20 .resolv tri, L_0x2231e10, L_0x22320a0, L_0x222fc20, L_0x222fab0; +RS_0x7ff1c0ed6118/0/24 .resolv tri, L_0x22329b0, L_0x2232c00, L_0x2232e30, L_0x22330b0; +RS_0x7ff1c0ed6118/0/28 .resolv tri, L_0x2233300, L_0x22335b0, L_0x2233820, L_0x2233b00; +RS_0x7ff1c0ed6118/1/0 .resolv tri, RS_0x7ff1c0ed6118/0/0, RS_0x7ff1c0ed6118/0/4, RS_0x7ff1c0ed6118/0/8, RS_0x7ff1c0ed6118/0/12; +RS_0x7ff1c0ed6118/1/4 .resolv tri, RS_0x7ff1c0ed6118/0/16, RS_0x7ff1c0ed6118/0/20, RS_0x7ff1c0ed6118/0/24, RS_0x7ff1c0ed6118/0/28; +RS_0x7ff1c0ed6118 .resolv tri, RS_0x7ff1c0ed6118/1/0, RS_0x7ff1c0ed6118/1/4, C4, C4; +v0x222c250_0 .net8 "invertedB", 31 0, RS_0x7ff1c0ed6118; 32 drivers +v0x222c2d0_0 .alias "opA", 31 0, v0x222d2f0_0; +v0x222bfb0_0 .alias "opB", 31 0, v0x222d4b0_0; +v0x222c030_0 .alias "overflow", 0 0, v0x222c690_0; +L_0x222ec40 .part/pv L_0x222ed30, 0, 1, 32; +L_0x222ede0 .part v0x222d190_0, 0, 1; +L_0x222eed0 .part/pv L_0x222ef70, 1, 1, 32; +L_0x222f020 .part v0x222d190_0, 1, 1; +L_0x222f110 .part/pv L_0x222f240, 2, 1, 32; +L_0x222f2a0 .part v0x222d190_0, 2, 1; +L_0x222f390 .part/pv L_0x222f430, 3, 1, 32; +L_0x222f4e0 .part v0x222d190_0, 3, 1; +L_0x222f620 .part/pv L_0x222f6c0, 4, 1, 32; +L_0x222f770 .part v0x222d190_0, 4, 1; +L_0x222f8c0 .part/pv L_0x222f960, 5, 1, 32; +L_0x222f9c0 .part v0x222d190_0, 5, 1; +L_0x222c890 .part/pv L_0x222f860, 6, 1, 32; +L_0x222fdd0 .part v0x222d190_0, 6, 1; +L_0x222fef0 .part/pv L_0x222ff90, 7, 1, 32; +L_0x2230090 .part v0x222d190_0, 7, 1; +L_0x2230210 .part/pv L_0x22302b0, 8, 1, 32; +L_0x2230360 .part v0x222d190_0, 8, 1; +L_0x22304f0 .part/pv L_0x2230180, 9, 1, 32; +L_0x2230640 .part v0x222d190_0, 9, 1; +L_0x2230450 .part/pv L_0x2230790, 10, 1, 32; +L_0x2230840 .part v0x222d190_0, 10, 1; +L_0x22306e0 .part/pv L_0x22309f0, 11, 1, 32; +L_0x2230aa0 .part v0x222d190_0, 11, 1; +L_0x2230930 .part/pv L_0x22305e0, 12, 1, 32; +L_0x2230cb0 .part v0x222d190_0, 12, 1; +L_0x2230b90 .part/pv L_0x2230e80, 13, 1, 32; +L_0x2230f30 .part v0x222d190_0, 13, 1; +L_0x2230da0 .part/pv L_0x222fcc0, 14, 1, 32; +L_0x2231320 .part v0x222d190_0, 14, 1; +L_0x2231020 .part/pv L_0x22314c0, 15, 1, 32; +L_0x22315b0 .part v0x222d190_0, 15, 1; +L_0x22313c0 .part/pv L_0x2231460, 16, 1, 32; +L_0x2231800 .part v0x222d190_0, 16, 1; +L_0x22316a0 .part/pv L_0x2231740, 17, 1, 32; +L_0x2231b00 .part v0x222d190_0, 17, 1; +L_0x22318f0 .part/pv L_0x2231990, 18, 1, 32; +L_0x2231d20 .part v0x222d190_0, 18, 1; +L_0x2231ba0 .part/pv L_0x2231c40, 19, 1, 32; +L_0x2231a60 .part v0x222d190_0, 19, 1; +L_0x2231e10 .part/pv L_0x2231eb0, 20, 1, 32; +L_0x2232240 .part v0x222d190_0, 20, 1; +L_0x22320a0 .part/pv L_0x2232140, 21, 1, 32; +L_0x2231fa0 .part v0x222d190_0, 21, 1; +L_0x222fc20 .part/pv L_0x2229d00, 22, 1, 32; +L_0x2232330 .part v0x222d190_0, 22, 1; +L_0x222fab0 .part/pv L_0x222e890, 23, 1, 32; +L_0x2232420 .part v0x222d190_0, 23, 1; +L_0x22329b0 .part/pv L_0x2232a50, 24, 1, 32; +L_0x2232d90 .part v0x222d190_0, 24, 1; +L_0x2232c00 .part/pv L_0x2232ca0, 25, 1, 32; +L_0x2232b00 .part v0x222d190_0, 25, 1; +L_0x2232e30 .part/pv L_0x2232ed0, 26, 1, 32; +L_0x2233260 .part v0x222d190_0, 26, 1; +L_0x22330b0 .part/pv L_0x2233150, 27, 1, 32; +L_0x2232fd0 .part v0x222d190_0, 27, 1; +L_0x2233300 .part/pv L_0x22333a0, 28, 1, 32; +L_0x2233780 .part v0x222d190_0, 28, 1; +L_0x22335b0 .part/pv L_0x2233650, 29, 1, 32; +L_0x22334a0 .part v0x222d190_0, 29, 1; +L_0x2233820 .part/pv L_0x222fe70, 30, 1, 32; +L_0x22338c0 .part v0x222d190_0, 30, 1; +L_0x2233b00 .part/pv L_0x2233ba0, 31, 1, 32; +L_0x2233c00 .part v0x222d190_0, 31, 1; +L_0x223f130 .part v0x222df30_0, 0, 1; +RS_0x7ff1c0ed48b8 .resolv tri, L_0x2240100, L_0x2240d50, L_0x2241a90, L_0x22426f0; +L_0x2243850 .part/pv RS_0x7ff1c0ed48b8, 0, 4, 32; +L_0x2231110 .part v0x222dfb0_0, 0, 4; +L_0x22311b0 .part RS_0x7ff1c0ed6778, 0, 4; +L_0x2231250 .part v0x222df30_0, 0, 1; +RS_0x7ff1c0ed3ad8 .resolv tri, L_0x2244530, L_0x2245180, L_0x2245ec0, L_0x2246b20; +L_0x2247c00 .part/pv RS_0x7ff1c0ed3ad8, 4, 4, 32; +L_0x2243940 .part v0x222dfb0_0, 4, 4; +L_0x22439e0 .part RS_0x7ff1c0ed6778, 4, 4; +RS_0x7ff1c0ed2cf8 .resolv tri, L_0x2248840, L_0x2249490, L_0x224a1d0, L_0x224ae30; +L_0x224bf10 .part/pv RS_0x7ff1c0ed2cf8, 8, 4, 32; +L_0x224c040 .part v0x222dfb0_0, 8, 4; +L_0x2247ca0 .part RS_0x7ff1c0ed6778, 8, 4; +RS_0x7ff1c0ed1f18 .resolv tri, L_0x224cb90, L_0x224d7e0, L_0x224e520, L_0x224f180; +L_0x2250260 .part/pv RS_0x7ff1c0ed1f18, 12, 4, 32; +L_0x224c0e0 .part v0x222dfb0_0, 12, 4; +L_0x224c180 .part RS_0x7ff1c0ed6778, 12, 4; +RS_0x7ff1c0ed1138 .resolv tri, L_0x2250e70, L_0x2251ac0, L_0x2252800, L_0x2253460; +L_0x2254540 .part/pv RS_0x7ff1c0ed1138, 16, 4, 32; +L_0x22545e0 .part v0x222dfb0_0, 16, 4; +L_0x2250300 .part RS_0x7ff1c0ed6778, 16, 4; +RS_0x7ff1c0ed0358 .resolv tri, L_0x2255160, L_0x2255db0, L_0x2256af0, L_0x2257750; +L_0x2258830 .part/pv RS_0x7ff1c0ed0358, 20, 4, 32; +L_0x2254680 .part v0x222dfb0_0, 20, 4; +L_0x2254720 .part RS_0x7ff1c0ed6778, 20, 4; +RS_0x7ff1c0ecf578 .resolv tri, L_0x2259480, L_0x225a0d0, L_0x225ae10, L_0x225ba70; +L_0x225cb50 .part/pv RS_0x7ff1c0ecf578, 24, 4, 32; +L_0x225cd00 .part v0x222dfb0_0, 24, 4; +L_0x222d370 .part RS_0x7ff1c0ed6778, 24, 4; +RS_0x7ff1c0ece798 .resolv tri, L_0x225d910, L_0x225e560, L_0x225f2a0, L_0x225ff40; +L_0x2260fd0 .part/pv RS_0x7ff1c0ece798, 28, 4, 32; +L_0x225cfb0 .part v0x222dfb0_0, 28, 4; +L_0x225d050 .part RS_0x7ff1c0ed6778, 28, 4; +S_0x2221ad0 .scope module, "addsubmux" "muxtype1" 7 235, 7 3, S_0x22043a0; + .timescale 0 0; +L_0x2233700 .functor NOT 1, L_0x223f130, C4<0>, C4<0>, C4<0>; +L_0x2233a00 .functor AND 1, L_0x2234210, L_0x2233700, C4<1>, C4<1>; +L_0x22342b0 .functor AND 1, L_0x2234310, L_0x2233700, C4<1>, C4<1>; +L_0x2234400 .functor AND 1, L_0x22344f0, L_0x2233700, C4<1>, C4<1>; +L_0x2234590 .functor AND 1, L_0x22345f0, L_0x2233700, C4<1>, C4<1>; +L_0x22346e0 .functor AND 1, L_0x2234740, L_0x2233700, C4<1>, C4<1>; +L_0x2234830 .functor AND 1, L_0x2234890, L_0x2233700, C4<1>, C4<1>; +L_0x2234980 .functor AND 1, L_0x2234af0, L_0x2233700, C4<1>, C4<1>; +L_0x2234be0 .functor AND 1, L_0x2234c40, L_0x2233700, C4<1>, C4<1>; +L_0x2234d80 .functor AND 1, L_0x2234de0, L_0x2233700, C4<1>, C4<1>; +L_0x2234ed0 .functor AND 1, L_0x2234f30, L_0x2233700, C4<1>, C4<1>; +L_0x2235080 .functor AND 1, L_0x2235150, L_0x2233700, C4<1>, C4<1>; +L_0x2234460 .functor AND 1, L_0x22351f0, L_0x2233700, C4<1>, C4<1>; +L_0x2235020 .functor AND 1, L_0x22353d0, L_0x2233700, C4<1>, C4<1>; +L_0x22354c0 .functor AND 1, L_0x2235520, L_0x2233700, C4<1>, C4<1>; +L_0x2235690 .functor AND 1, L_0x2235930, L_0x2233700, C4<1>, C4<1>; +L_0x22359d0 .functor AND 1, L_0x2235a30, L_0x2233700, C4<1>, C4<1>; +L_0x2235bb0 .functor AND 1, L_0x2235cb0, L_0x2233700, C4<1>, C4<1>; +L_0x2235d50 .functor AND 1, L_0x2235db0, L_0x2233700, C4<1>, C4<1>; +L_0x2235b20 .functor AND 1, L_0x2235c10, L_0x2233700, C4<1>, C4<1>; +L_0x2236070 .functor AND 1, L_0x2236100, L_0x2233700, C4<1>, C4<1>; +L_0x2235ea0 .functor AND 1, L_0x2235f70, L_0x2233700, C4<1>, C4<1>; +L_0x22363b0 .functor AND 1, L_0x2236440, L_0x2233700, C4<1>, C4<1>; +L_0x22350e0 .functor AND 1, L_0x22361f0, L_0x2233700, C4<1>, C4<1>; +L_0x2236290 .functor AND 1, L_0x2232670, L_0x2233700, C4<1>, C4<1>; +L_0x2235610 .functor AND 1, L_0x2232910, L_0x2233700, C4<1>, C4<1>; +L_0x2235330 .functor AND 1, L_0x22325a0, L_0x2233700, C4<1>, C4<1>; +L_0x2232760 .functor AND 1, L_0x22327f0, L_0x2233700, C4<1>, C4<1>; +L_0x2236f60 .functor AND 1, L_0x2236fc0, L_0x2233700, C4<1>, C4<1>; +L_0x2236d90 .functor AND 1, L_0x2236e20, L_0x2233700, C4<1>, C4<1>; +L_0x22372a0 .functor AND 1, L_0x2237300, L_0x2233700, C4<1>, C4<1>; +L_0x22370b0 .functor AND 1, L_0x2235830, L_0x2233700, C4<1>, C4<1>; +L_0x2226550 .functor AND 1, L_0x2237170, L_0x2233700, C4<1>, C4<1>; +L_0x22373a0 .functor AND 1, L_0x2235720, L_0x223f130, C4<1>, C4<1>; +L_0x2237b30 .functor AND 1, L_0x2237b90, L_0x223f130, C4<1>, C4<1>; +L_0x22378b0 .functor AND 1, L_0x2237a10, L_0x223f130, C4<1>, C4<1>; +L_0x2237940 .functor AND 1, L_0x2237f60, L_0x223f130, C4<1>, C4<1>; +L_0x2237c80 .functor AND 1, L_0x2237e30, L_0x223f130, C4<1>, C4<1>; +L_0x2237d10 .functor AND 1, L_0x2238270, L_0x223f130, C4<1>, C4<1>; +L_0x2238000 .functor AND 1, L_0x2238090, L_0x223f130, C4<1>, C4<1>; +L_0x2238180 .functor AND 1, L_0x2238700, L_0x223f130, C4<1>, C4<1>; +L_0x2237da0 .functor AND 1, L_0x2238360, L_0x223f130, C4<1>, C4<1>; +L_0x22385b0 .functor AND 1, L_0x2238640, L_0x223f130, C4<1>, C4<1>; +L_0x22387a0 .functor AND 1, L_0x2238800, L_0x223f130, C4<1>, C4<1>; +L_0x22388f0 .functor AND 1, L_0x2238950, L_0x223f130, C4<1>, C4<1>; +L_0x2238a50 .functor AND 1, L_0x2238ae0, L_0x223f130, C4<1>, C4<1>; +L_0x2238bd0 .functor AND 1, L_0x2238c60, L_0x223f130, C4<1>, C4<1>; +L_0x2238d00 .functor AND 1, L_0x2238d90, L_0x223f130, C4<1>, C4<1>; +L_0x2238e80 .functor AND 1, L_0x2238f10, L_0x223f130, C4<1>, C4<1>; +L_0x22384a0 .functor AND 1, L_0x2239060, L_0x223f130, C4<1>, C4<1>; +L_0x2239150 .functor AND 1, L_0x22393f0, L_0x223f130, C4<1>, C4<1>; +L_0x22394e0 .functor AND 1, L_0x22396f0, L_0x223f130, C4<1>, C4<1>; +L_0x22397e0 .functor AND 1, L_0x2239a50, L_0x223f130, C4<1>, C4<1>; +L_0x2239870 .functor AND 1, L_0x22398d0, L_0x223f130, C4<1>, C4<1>; +L_0x22399c0 .functor AND 1, L_0x2239540, L_0x223f130, C4<1>, C4<1>; +L_0x2239630 .functor AND 1, L_0x2239af0, L_0x223f130, C4<1>, C4<1>; +L_0x2239be0 .functor AND 1, L_0x2239c40, L_0x223f130, C4<1>, C4<1>; +L_0x2239d30 .functor AND 1, L_0x2239fa0, L_0x223f130, C4<1>, C4<1>; +L_0x223a090 .functor AND 1, L_0x223a120, L_0x223f130, C4<1>, C4<1>; +L_0x223a1c0 .functor AND 1, L_0x223a220, L_0x223f130, C4<1>, C4<1>; +L_0x223a310 .functor AND 1, L_0x2239dc0, L_0x223f130, C4<1>, C4<1>; +L_0x2239e60 .functor AND 1, L_0x223a410, L_0x223f130, C4<1>, C4<1>; +L_0x223a500 .functor AND 1, L_0x223a590, L_0x223f130, C4<1>, C4<1>; +L_0x223a680 .functor AND 1, L_0x223a710, L_0x223f130, C4<1>, C4<1>; +L_0x2239f20 .functor AND 1, L_0x223a800, L_0x223f130, C4<1>, C4<1>; +L_0x223abf0 .functor OR 1, L_0x2233a00, L_0x22373a0, C4<0>, C4<0>; +L_0x223ad40 .functor OR 1, L_0x22342b0, L_0x2237b30, C4<0>, C4<0>; +L_0x22340a0 .functor OR 1, L_0x2234400, L_0x22378b0, C4<0>, C4<0>; +L_0x223a990 .functor OR 1, L_0x2234590, L_0x2237940, C4<0>, C4<0>; +L_0x2233d90 .functor OR 1, L_0x22346e0, L_0x2237c80, C4<0>, C4<0>; +L_0x223bcd0 .functor OR 1, L_0x2234830, L_0x2237d10, C4<0>, C4<0>; +L_0x2239280 .functor OR 1, L_0x2234980, L_0x2238000, C4<0>, C4<0>; +L_0x223c110 .functor OR 1, L_0x2234be0, L_0x2238180, C4<0>, C4<0>; +L_0x223bb30 .functor OR 1, L_0x2234d80, L_0x2237da0, C4<0>, C4<0>; +L_0x223c300 .functor OR 1, L_0x2234ed0, L_0x22385b0, C4<0>, C4<0>; +L_0x223c4f0 .functor OR 1, L_0x2235080, L_0x22387a0, C4<0>, C4<0>; +L_0x223c950 .functor OR 1, L_0x2234460, L_0x22388f0, C4<0>, C4<0>; +L_0x223cb40 .functor OR 1, L_0x2235020, L_0x2238a50, C4<0>, C4<0>; +L_0x223cce0 .functor OR 1, L_0x22354c0, L_0x2238bd0, C4<0>, C4<0>; +L_0x223c8f0 .functor OR 1, L_0x2235690, L_0x2238d00, C4<0>, C4<0>; +L_0x223cfc0 .functor OR 1, L_0x22359d0, L_0x2238e80, C4<0>, C4<0>; +L_0x223d1b0 .functor OR 1, L_0x2235bb0, L_0x22384a0, C4<0>, C4<0>; +L_0x223d640 .functor OR 1, L_0x2235d50, L_0x2239150, C4<0>, C4<0>; +L_0x223d830 .functor OR 1, L_0x2235b20, L_0x22394e0, C4<0>, C4<0>; +L_0x223d9e0 .functor OR 1, L_0x2236070, L_0x22397e0, C4<0>, C4<0>; +L_0x223d3a0 .functor OR 1, L_0x2235ea0, L_0x2239870, C4<0>, C4<0>; +L_0x223d590 .functor OR 1, L_0x22363b0, L_0x22399c0, C4<0>, C4<0>; +L_0x223dd70 .functor OR 1, L_0x22350e0, L_0x2239630, C4<0>, C4<0>; +L_0x223e230 .functor OR 1, L_0x2236290, L_0x2239be0, C4<0>, C4<0>; +L_0x223e720 .functor OR 1, L_0x2235610, L_0x2239d30, C4<0>, C4<0>; +L_0x223df60 .functor OR 1, L_0x2235330, L_0x223a090, C4<0>, C4<0>; +L_0x223e420 .functor OR 1, L_0x2232760, L_0x223a1c0, C4<0>, C4<0>; +L_0x223e610 .functor OR 1, L_0x2236f60, L_0x223a310, C4<0>, C4<0>; +L_0x223e960 .functor OR 1, L_0x2236d90, L_0x2239e60, C4<0>, C4<0>; +L_0x223ee50 .functor OR 1, L_0x22372a0, L_0x223a500, C4<0>, C4<0>; +L_0x2239ec0 .functor OR 1, L_0x22370b0, L_0x223a680, C4<0>, C4<0>; +L_0x2239690 .functor OR 1, L_0x2226550, L_0x2239f20, C4<0>, C4<0>; +v0x2221bc0_0 .net *"_s1", 0 0, L_0x2234210; 1 drivers +v0x2221c80_0 .net *"_s101", 0 0, L_0x22396f0; 1 drivers +v0x2221d20_0 .net *"_s103", 0 0, L_0x2239a50; 1 drivers +v0x2221dc0_0 .net *"_s105", 0 0, L_0x22398d0; 1 drivers +v0x2221e40_0 .net *"_s107", 0 0, L_0x2239540; 1 drivers +v0x2221ee0_0 .net *"_s109", 0 0, L_0x2239af0; 1 drivers +v0x2221f80_0 .net *"_s11", 0 0, L_0x2234890; 1 drivers +v0x2222020_0 .net *"_s111", 0 0, L_0x2239c40; 1 drivers +v0x2222110_0 .net *"_s113", 0 0, L_0x2239fa0; 1 drivers +v0x22221b0_0 .net *"_s115", 0 0, L_0x223a120; 1 drivers +v0x22222b0_0 .net *"_s117", 0 0, L_0x223a220; 1 drivers +v0x2222350_0 .net *"_s119", 0 0, L_0x2239dc0; 1 drivers +v0x22223f0_0 .net *"_s121", 0 0, L_0x223a410; 1 drivers +v0x2222490_0 .net *"_s123", 0 0, L_0x223a590; 1 drivers +v0x22225b0_0 .net *"_s125", 0 0, L_0x223a710; 1 drivers +v0x2222650_0 .net *"_s127", 0 0, L_0x223a800; 1 drivers +v0x2222510_0 .net *"_s128", 0 0, L_0x223abf0; 1 drivers +v0x22227a0_0 .net *"_s13", 0 0, L_0x2234af0; 1 drivers +v0x22228c0_0 .net *"_s130", 0 0, L_0x223ad40; 1 drivers +v0x2222940_0 .net *"_s132", 0 0, L_0x22340a0; 1 drivers +v0x2222820_0 .net *"_s134", 0 0, L_0x223a990; 1 drivers +v0x2222a70_0 .net *"_s136", 0 0, L_0x2233d90; 1 drivers +v0x22229c0_0 .net *"_s138", 0 0, L_0x223bcd0; 1 drivers +v0x2222bb0_0 .net *"_s140", 0 0, L_0x2239280; 1 drivers +v0x2222b10_0 .net *"_s142", 0 0, L_0x223c110; 1 drivers +v0x2222d00_0 .net *"_s144", 0 0, L_0x223bb30; 1 drivers +v0x2222c50_0 .net *"_s146", 0 0, L_0x223c300; 1 drivers +v0x2222e60_0 .net *"_s148", 0 0, L_0x223c4f0; 1 drivers +v0x2222da0_0 .net *"_s15", 0 0, L_0x2234c40; 1 drivers +v0x2222fd0_0 .net *"_s150", 0 0, L_0x223c950; 1 drivers +v0x2222ee0_0 .net *"_s152", 0 0, L_0x223cb40; 1 drivers +v0x2223150_0 .net *"_s154", 0 0, L_0x223cce0; 1 drivers +v0x2223050_0 .net *"_s156", 0 0, L_0x223c8f0; 1 drivers +v0x22232e0_0 .net *"_s158", 0 0, L_0x223cfc0; 1 drivers +v0x22231d0_0 .net *"_s160", 0 0, L_0x223d1b0; 1 drivers +v0x2223480_0 .net *"_s162", 0 0, L_0x223d640; 1 drivers +v0x2223360_0 .net *"_s164", 0 0, L_0x223d830; 1 drivers +v0x2223400_0 .net *"_s166", 0 0, L_0x223d9e0; 1 drivers +v0x2223640_0 .net *"_s168", 0 0, L_0x223d3a0; 1 drivers +v0x22236c0_0 .net *"_s17", 0 0, L_0x2234de0; 1 drivers +v0x2223500_0 .net *"_s170", 0 0, L_0x223d590; 1 drivers +v0x22235a0_0 .net *"_s172", 0 0, L_0x223dd70; 1 drivers +v0x22238a0_0 .net *"_s174", 0 0, L_0x223e230; 1 drivers +v0x2223920_0 .net *"_s176", 0 0, L_0x223e720; 1 drivers +v0x2223740_0 .net *"_s178", 0 0, L_0x223df60; 1 drivers +v0x22237e0_0 .net *"_s180", 0 0, L_0x223e420; 1 drivers +v0x2223b20_0 .net *"_s182", 0 0, L_0x223e610; 1 drivers +v0x2223ba0_0 .net *"_s184", 0 0, L_0x223e960; 1 drivers +v0x22239c0_0 .net *"_s186", 0 0, L_0x223ee50; 1 drivers +v0x2223a60_0 .net *"_s188", 0 0, L_0x2239ec0; 1 drivers +v0x2223dc0_0 .net *"_s19", 0 0, L_0x2234f30; 1 drivers +v0x2223e40_0 .net *"_s190", 0 0, L_0x2239690; 1 drivers +v0x2223c40_0 .net *"_s21", 0 0, L_0x2235150; 1 drivers +v0x2223ce0_0 .net *"_s23", 0 0, L_0x22351f0; 1 drivers +v0x2224080_0 .net *"_s25", 0 0, L_0x22353d0; 1 drivers +v0x2224100_0 .net *"_s27", 0 0, L_0x2235520; 1 drivers +v0x2223ec0_0 .net *"_s29", 0 0, L_0x2235930; 1 drivers +v0x2223f60_0 .net *"_s3", 0 0, L_0x2234310; 1 drivers +v0x2224000_0 .net *"_s31", 0 0, L_0x2235a30; 1 drivers +v0x2224380_0 .net *"_s33", 0 0, L_0x2235cb0; 1 drivers +v0x22241a0_0 .net *"_s35", 0 0, L_0x2235db0; 1 drivers +v0x2224240_0 .net *"_s37", 0 0, L_0x2235c10; 1 drivers +v0x22242e0_0 .net *"_s39", 0 0, L_0x2236100; 1 drivers +v0x2224620_0 .net *"_s41", 0 0, L_0x2235f70; 1 drivers +v0x2224420_0 .net *"_s43", 0 0, L_0x2236440; 1 drivers +v0x22244c0_0 .net *"_s45", 0 0, L_0x22361f0; 1 drivers +v0x2224560_0 .net *"_s47", 0 0, L_0x2232670; 1 drivers +v0x22248c0_0 .net *"_s49", 0 0, L_0x2232910; 1 drivers +v0x22246c0_0 .net *"_s5", 0 0, L_0x22344f0; 1 drivers +v0x2224760_0 .net *"_s51", 0 0, L_0x22325a0; 1 drivers +v0x2224800_0 .net *"_s53", 0 0, L_0x22327f0; 1 drivers +v0x2224b80_0 .net *"_s55", 0 0, L_0x2236fc0; 1 drivers +v0x2224940_0 .net *"_s57", 0 0, L_0x2236e20; 1 drivers +v0x22249e0_0 .net *"_s59", 0 0, L_0x2237300; 1 drivers +v0x2224a80_0 .net *"_s61", 0 0, L_0x2235830; 1 drivers +v0x2224e60_0 .net *"_s63", 0 0, L_0x2237170; 1 drivers +v0x2224c00_0 .net *"_s65", 0 0, L_0x2235720; 1 drivers +v0x2224ca0_0 .net *"_s67", 0 0, L_0x2237b90; 1 drivers +v0x2224d40_0 .net *"_s69", 0 0, L_0x2237a10; 1 drivers +v0x2224de0_0 .net *"_s7", 0 0, L_0x22345f0; 1 drivers +v0x2225170_0 .net *"_s71", 0 0, L_0x2237f60; 1 drivers +v0x22251f0_0 .net *"_s73", 0 0, L_0x2237e30; 1 drivers +v0x2224f00_0 .net *"_s75", 0 0, L_0x2238270; 1 drivers +v0x2224fa0_0 .net *"_s77", 0 0, L_0x2238090; 1 drivers +v0x2225040_0 .net *"_s79", 0 0, L_0x2238700; 1 drivers +v0x22250e0_0 .net *"_s81", 0 0, L_0x2238360; 1 drivers +v0x2225550_0 .net *"_s83", 0 0, L_0x2238640; 1 drivers +v0x22255f0_0 .net *"_s85", 0 0, L_0x2238800; 1 drivers +v0x2225290_0 .net *"_s87", 0 0, L_0x2238950; 1 drivers +v0x2225330_0 .net *"_s89", 0 0, L_0x2238ae0; 1 drivers +v0x22253d0_0 .net *"_s9", 0 0, L_0x2234740; 1 drivers +v0x2225470_0 .net *"_s91", 0 0, L_0x2238c60; 1 drivers +v0x2225960_0 .net *"_s93", 0 0, L_0x2238d90; 1 drivers +v0x22259e0_0 .net *"_s95", 0 0, L_0x2238f10; 1 drivers +v0x2225690_0 .net *"_s97", 0 0, L_0x2239060; 1 drivers +v0x2225730_0 .net *"_s99", 0 0, L_0x22393f0; 1 drivers +v0x22257d0_0 .net "address", 0 0, L_0x223f130; 1 drivers +v0x2225870_0 .alias "in0", 31 0, v0x222d4b0_0; +v0x2225d80_0 .net "in00addr", 0 0, L_0x2233a00; 1 drivers +v0x2225e00_0 .net "in010addr", 0 0, L_0x2235080; 1 drivers +v0x2225a60_0 .net "in011addr", 0 0, L_0x2234460; 1 drivers +v0x2225b00_0 .net "in012addr", 0 0, L_0x2235020; 1 drivers +v0x2225ba0_0 .net "in013addr", 0 0, L_0x22354c0; 1 drivers +v0x2225c40_0 .net "in014addr", 0 0, L_0x2235690; 1 drivers +v0x2225ce0_0 .net "in015addr", 0 0, L_0x22359d0; 1 drivers +v0x22261d0_0 .net "in016addr", 0 0, L_0x2235bb0; 1 drivers +v0x2225e80_0 .net "in017addr", 0 0, L_0x2235d50; 1 drivers +v0x2225f20_0 .net "in018addr", 0 0, L_0x2235b20; 1 drivers +v0x2225fc0_0 .net "in019addr", 0 0, L_0x2236070; 1 drivers +v0x2226060_0 .net "in01addr", 0 0, L_0x22342b0; 1 drivers +v0x2226100_0 .net "in020addr", 0 0, L_0x2235ea0; 1 drivers +v0x22265d0_0 .net "in021addr", 0 0, L_0x22363b0; 1 drivers +v0x2226250_0 .net "in022addr", 0 0, L_0x22350e0; 1 drivers +v0x22262f0_0 .net "in023addr", 0 0, L_0x2236290; 1 drivers +v0x2226390_0 .net "in024addr", 0 0, L_0x2235610; 1 drivers +v0x2226430_0 .net "in025addr", 0 0, L_0x2235330; 1 drivers +v0x22264d0_0 .net "in026addr", 0 0, L_0x2232760; 1 drivers +v0x2226a00_0 .net "in027addr", 0 0, L_0x2236f60; 1 drivers +v0x2226650_0 .net "in028addr", 0 0, L_0x2236d90; 1 drivers +v0x22266f0_0 .net "in029addr", 0 0, L_0x22372a0; 1 drivers +v0x2226790_0 .net "in02addr", 0 0, L_0x2234400; 1 drivers +v0x2226830_0 .net "in030addr", 0 0, L_0x22370b0; 1 drivers +v0x22268d0_0 .net "in031addr", 0 0, L_0x2226550; 1 drivers +v0x2226970_0 .net "in03addr", 0 0, L_0x2234590; 1 drivers +v0x2226e70_0 .net "in04addr", 0 0, L_0x22346e0; 1 drivers +v0x2226ef0_0 .net "in05addr", 0 0, L_0x2234830; 1 drivers +v0x2226a80_0 .net "in06addr", 0 0, L_0x2234980; 1 drivers +v0x2226b20_0 .net "in07addr", 0 0, L_0x2234be0; 1 drivers +v0x2226bc0_0 .net "in08addr", 0 0, L_0x2234d80; 1 drivers +v0x2226c60_0 .net "in09addr", 0 0, L_0x2234ed0; 1 drivers +v0x2226d00_0 .alias "in1", 31 0, v0x222c250_0; +v0x2226da0_0 .net "in10addr", 0 0, L_0x22373a0; 1 drivers +v0x22273a0_0 .net "in110addr", 0 0, L_0x22387a0; 1 drivers +v0x2227420_0 .net "in111addr", 0 0, L_0x22388f0; 1 drivers +v0x2226f70_0 .net "in112addr", 0 0, L_0x2238a50; 1 drivers +v0x2227010_0 .net "in113addr", 0 0, L_0x2238bd0; 1 drivers +v0x22270b0_0 .net "in114addr", 0 0, L_0x2238d00; 1 drivers +v0x2227150_0 .net "in115addr", 0 0, L_0x2238e80; 1 drivers +v0x22271f0_0 .net "in116addr", 0 0, L_0x22384a0; 1 drivers +v0x2227290_0 .net "in117addr", 0 0, L_0x2239150; 1 drivers +v0x2227910_0 .net "in118addr", 0 0, L_0x22394e0; 1 drivers +v0x2227990_0 .net "in119addr", 0 0, L_0x22397e0; 1 drivers +v0x22274a0_0 .net "in11addr", 0 0, L_0x2237b30; 1 drivers +v0x2227520_0 .net "in120addr", 0 0, L_0x2239870; 1 drivers +v0x22275c0_0 .net "in121addr", 0 0, L_0x22399c0; 1 drivers +v0x2227660_0 .net "in122addr", 0 0, L_0x2239630; 1 drivers +v0x2227700_0 .net "in123addr", 0 0, L_0x2239be0; 1 drivers +v0x22277a0_0 .net "in124addr", 0 0, L_0x2239d30; 1 drivers +v0x2227840_0 .net "in125addr", 0 0, L_0x223a090; 1 drivers +v0x2227ec0_0 .net "in126addr", 0 0, L_0x223a1c0; 1 drivers +v0x2227a10_0 .net "in127addr", 0 0, L_0x223a310; 1 drivers +v0x2227ab0_0 .net "in128addr", 0 0, L_0x2239e60; 1 drivers +v0x2227b50_0 .net "in129addr", 0 0, L_0x223a500; 1 drivers +v0x2227bf0_0 .net "in12addr", 0 0, L_0x22378b0; 1 drivers +v0x2227c90_0 .net "in130addr", 0 0, L_0x223a680; 1 drivers +v0x2227d30_0 .net "in131addr", 0 0, L_0x2239f20; 1 drivers +v0x2227dd0_0 .net "in13addr", 0 0, L_0x2237940; 1 drivers +v0x2228430_0 .net "in14addr", 0 0, L_0x2237c80; 1 drivers +v0x2227f40_0 .net "in15addr", 0 0, L_0x2237d10; 1 drivers +v0x2227fe0_0 .net "in16addr", 0 0, L_0x2238000; 1 drivers +v0x2228080_0 .net "in17addr", 0 0, L_0x2238180; 1 drivers +v0x2228120_0 .net "in18addr", 0 0, L_0x2237da0; 1 drivers +v0x22281c0_0 .net "in19addr", 0 0, L_0x22385b0; 1 drivers +v0x2228260_0 .net "invaddr", 0 0, L_0x2233700; 1 drivers +v0x2228300_0 .alias "out", 31 0, v0x222bcb0_0; +L_0x2234210 .part v0x222d190_0, 0, 1; +L_0x2234310 .part v0x222d190_0, 1, 1; +L_0x22344f0 .part v0x222d190_0, 2, 1; +L_0x22345f0 .part v0x222d190_0, 3, 1; +L_0x2234740 .part v0x222d190_0, 4, 1; +L_0x2234890 .part v0x222d190_0, 5, 1; +L_0x2234af0 .part v0x222d190_0, 6, 1; +L_0x2234c40 .part v0x222d190_0, 7, 1; +L_0x2234de0 .part v0x222d190_0, 8, 1; +L_0x2234f30 .part v0x222d190_0, 9, 1; +L_0x2235150 .part v0x222d190_0, 10, 1; +L_0x22351f0 .part v0x222d190_0, 11, 1; +L_0x22353d0 .part v0x222d190_0, 12, 1; +L_0x2235520 .part v0x222d190_0, 13, 1; +L_0x2235930 .part v0x222d190_0, 14, 1; +L_0x2235a30 .part v0x222d190_0, 15, 1; +L_0x2235cb0 .part v0x222d190_0, 16, 1; +L_0x2235db0 .part v0x222d190_0, 17, 1; +L_0x2235c10 .part v0x222d190_0, 18, 1; +L_0x2236100 .part v0x222d190_0, 19, 1; +L_0x2235f70 .part v0x222d190_0, 20, 1; +L_0x2236440 .part v0x222d190_0, 21, 1; +L_0x22361f0 .part v0x222d190_0, 22, 1; +L_0x2232670 .part v0x222d190_0, 23, 1; +L_0x2232910 .part v0x222d190_0, 24, 1; +L_0x22325a0 .part v0x222d190_0, 25, 1; +L_0x22327f0 .part v0x222d190_0, 26, 1; +L_0x2236fc0 .part v0x222d190_0, 27, 1; +L_0x2236e20 .part v0x222d190_0, 28, 1; +L_0x2237300 .part v0x222d190_0, 29, 1; +L_0x2235830 .part v0x222d190_0, 30, 1; +L_0x2237170 .part v0x222d190_0, 31, 1; +L_0x2235720 .part RS_0x7ff1c0ed6118, 0, 1; +L_0x2237b90 .part RS_0x7ff1c0ed6118, 1, 1; +L_0x2237a10 .part RS_0x7ff1c0ed6118, 2, 1; +L_0x2237f60 .part RS_0x7ff1c0ed6118, 3, 1; +L_0x2237e30 .part RS_0x7ff1c0ed6118, 4, 1; +L_0x2238270 .part RS_0x7ff1c0ed6118, 5, 1; +L_0x2238090 .part RS_0x7ff1c0ed6118, 6, 1; +L_0x2238700 .part RS_0x7ff1c0ed6118, 7, 1; +L_0x2238360 .part RS_0x7ff1c0ed6118, 8, 1; +L_0x2238640 .part RS_0x7ff1c0ed6118, 9, 1; +L_0x2238800 .part RS_0x7ff1c0ed6118, 10, 1; +L_0x2238950 .part RS_0x7ff1c0ed6118, 11, 1; +L_0x2238ae0 .part RS_0x7ff1c0ed6118, 12, 1; +L_0x2238c60 .part RS_0x7ff1c0ed6118, 13, 1; +L_0x2238d90 .part RS_0x7ff1c0ed6118, 14, 1; +L_0x2238f10 .part RS_0x7ff1c0ed6118, 15, 1; +L_0x2239060 .part RS_0x7ff1c0ed6118, 16, 1; +L_0x22393f0 .part RS_0x7ff1c0ed6118, 17, 1; +L_0x22396f0 .part RS_0x7ff1c0ed6118, 18, 1; +L_0x2239a50 .part RS_0x7ff1c0ed6118, 19, 1; +L_0x22398d0 .part RS_0x7ff1c0ed6118, 20, 1; +L_0x2239540 .part RS_0x7ff1c0ed6118, 21, 1; +L_0x2239af0 .part RS_0x7ff1c0ed6118, 22, 1; +L_0x2239c40 .part RS_0x7ff1c0ed6118, 23, 1; +L_0x2239fa0 .part RS_0x7ff1c0ed6118, 24, 1; +L_0x223a120 .part RS_0x7ff1c0ed6118, 25, 1; +L_0x223a220 .part RS_0x7ff1c0ed6118, 26, 1; +L_0x2239dc0 .part RS_0x7ff1c0ed6118, 27, 1; +L_0x223a410 .part RS_0x7ff1c0ed6118, 28, 1; +L_0x223a590 .part RS_0x7ff1c0ed6118, 29, 1; +L_0x223a710 .part RS_0x7ff1c0ed6118, 30, 1; +L_0x223a800 .part RS_0x7ff1c0ed6118, 31, 1; +L_0x223ab00 .part/pv L_0x223abf0, 0, 1, 32; +L_0x2233f10 .part/pv L_0x223ad40, 1, 1, 32; +L_0x22391e0 .part/pv L_0x22340a0, 2, 1, 32; +L_0x223a8f0 .part/pv L_0x223a990, 3, 1, 32; +L_0x2233cf0 .part/pv L_0x2233d90, 4, 1, 32; +L_0x223b9f0 .part/pv L_0x223bcd0, 5, 1, 32; +L_0x223be20 .part/pv L_0x2239280, 6, 1, 32; +L_0x223c070 .part/pv L_0x223c110, 7, 1, 32; +L_0x223ba90 .part/pv L_0x223bb30, 8, 1, 32; +L_0x223bc30 .part/pv L_0x223c300, 9, 1, 32; +L_0x223c450 .part/pv L_0x223c4f0, 10, 1, 32; +L_0x223c640 .part/pv L_0x223c950, 11, 1, 32; +L_0x223caa0 .part/pv L_0x223cb40, 12, 1, 32; +L_0x223cc40 .part/pv L_0x223cce0, 13, 1, 32; +L_0x223ce30 .part/pv L_0x223c8f0, 14, 1, 32; +L_0x223cf20 .part/pv L_0x223cfc0, 15, 1, 32; +L_0x223d110 .part/pv L_0x223d1b0, 16, 1, 32; +L_0x223d300 .part/pv L_0x223d640, 17, 1, 32; +L_0x223d790 .part/pv L_0x223d830, 18, 1, 32; +L_0x223d940 .part/pv L_0x223d9e0, 19, 1, 32; +L_0x223db30 .part/pv L_0x223d3a0, 20, 1, 32; +L_0x223d4f0 .part/pv L_0x223d590, 21, 1, 32; +L_0x223dcd0 .part/pv L_0x223dd70, 22, 1, 32; +L_0x223e190 .part/pv L_0x223e230, 23, 1, 32; +L_0x223e380 .part/pv L_0x223e720, 24, 1, 32; +L_0x223dec0 .part/pv L_0x223df60, 25, 1, 32; +L_0x223e0b0 .part/pv L_0x223e420, 26, 1, 32; +L_0x223e570 .part/pv L_0x223e610, 27, 1, 32; +L_0x223e8c0 .part/pv L_0x223e960, 28, 1, 32; +L_0x223edb0 .part/pv L_0x223ee50, 29, 1, 32; +L_0x223efa0 .part/pv L_0x2239ec0, 30, 1, 32; +L_0x2237400 .part/pv L_0x2239690, 31, 1, 32; +S_0x221e080 .scope module, "adder0" "FullAdder4bit" 7 237, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x22424b0 .functor AND 1, L_0x2242af0, L_0x2242b90, C4<1>, C4<1>; +L_0x2242cb0 .functor NOR 1, L_0x2242d10, L_0x2242db0, C4<0>, C4<0>; +L_0x2242f30 .functor AND 1, L_0x2242f90, L_0x2243080, C4<1>, C4<1>; +L_0x2242ea0 .functor NOR 1, L_0x2243210, L_0x2243410, C4<0>, C4<0>; +L_0x2243170 .functor OR 1, L_0x22424b0, L_0x2242cb0, C4<0>, C4<0>; +L_0x2243600 .functor NOR 1, L_0x2242f30, L_0x2242ea0, C4<0>, C4<0>; +L_0x2243700 .functor AND 1, L_0x2243170, L_0x2243600, C4<1>, C4<1>; +v0x2220c70_0 .net *"_s25", 0 0, L_0x2242af0; 1 drivers +v0x2220d30_0 .net *"_s27", 0 0, L_0x2242b90; 1 drivers +v0x2220dd0_0 .net *"_s29", 0 0, L_0x2242d10; 1 drivers +v0x2220e70_0 .net *"_s31", 0 0, L_0x2242db0; 1 drivers +v0x2220ef0_0 .net *"_s33", 0 0, L_0x2242f90; 1 drivers +v0x2220f90_0 .net *"_s35", 0 0, L_0x2243080; 1 drivers +v0x2221010_0 .net *"_s37", 0 0, L_0x2243210; 1 drivers +v0x2221090_0 .net *"_s39", 0 0, L_0x2243410; 1 drivers +v0x2221110_0 .net "a", 3 0, L_0x2231110; 1 drivers +v0x2221190_0 .net "aandb", 0 0, L_0x22424b0; 1 drivers +v0x2221210_0 .net "abandnoror", 0 0, L_0x2243170; 1 drivers +v0x2221290_0 .net "anorb", 0 0, L_0x2242cb0; 1 drivers +v0x2221330_0 .net "b", 3 0, L_0x22311b0; 1 drivers +v0x22213d0_0 .net "bandsum", 0 0, L_0x2242f30; 1 drivers +v0x22214f0_0 .net "bnorsum", 0 0, L_0x2242ea0; 1 drivers +v0x2221590_0 .net "bsumandnornor", 0 0, L_0x2243600; 1 drivers +v0x2221450_0 .net "carryin", 0 0, L_0x2231250; 1 drivers +v0x22216c0_0 .alias "carryout", 0 0, v0x222b690_0; +v0x2221610_0 .net "carryout1", 0 0, L_0x223c730; 1 drivers +v0x22217e0_0 .net "carryout2", 0 0, L_0x2240590; 1 drivers +v0x2221910_0 .net "carryout3", 0 0, L_0x22412d0; 1 drivers +v0x2221990_0 .alias "overflow", 0 0, v0x22283a0_0; +v0x2221860_0 .net8 "sum", 3 0, RS_0x7ff1c0ed48b8; 4 drivers +L_0x2240100 .part/pv L_0x2240030, 0, 1, 4; +L_0x22401f0 .part L_0x2231110, 0, 1; +L_0x2240290 .part L_0x22311b0, 0, 1; +L_0x2240d50 .part/pv L_0x223ebf0, 1, 1, 4; +L_0x2240e90 .part L_0x2231110, 1, 1; +L_0x2240f80 .part L_0x22311b0, 1, 1; +L_0x2241a90 .part/pv L_0x2240800, 2, 1, 4; +L_0x2241b80 .part L_0x2231110, 2, 1; +L_0x2241c70 .part L_0x22311b0, 2, 1; +L_0x22426f0 .part/pv L_0x2241540, 3, 1, 4; +L_0x2242820 .part L_0x2231110, 3, 1; +L_0x2242950 .part L_0x22311b0, 3, 1; +L_0x2242af0 .part L_0x2231110, 3, 1; +L_0x2242b90 .part L_0x22311b0, 3, 1; +L_0x2242d10 .part L_0x2231110, 3, 1; +L_0x2242db0 .part L_0x22311b0, 3, 1; +L_0x2242f90 .part L_0x22311b0, 3, 1; +L_0x2243080 .part RS_0x7ff1c0ed48b8, 3, 1; +L_0x2243210 .part L_0x22311b0, 3, 1; +L_0x2243410 .part RS_0x7ff1c0ed48b8, 3, 1; +S_0x22201e0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x221e080; + .timescale 0 0; +L_0x223f260 .functor AND 1, L_0x22401f0, L_0x2240290, C4<1>, C4<1>; +L_0x223f2c0 .functor AND 1, L_0x22401f0, L_0x2231250, C4<1>, C4<1>; +L_0x223f370 .functor AND 1, L_0x2240290, L_0x2231250, C4<1>, C4<1>; +L_0x22362f0 .functor OR 1, L_0x223f260, L_0x223f2c0, C4<0>, C4<0>; +L_0x223c730 .functor OR 1, L_0x22362f0, L_0x223f370, C4<0>, C4<0>; +L_0x223c830 .functor OR 1, L_0x22401f0, L_0x2240290, C4<0>, C4<0>; +L_0x223c890 .functor OR 1, L_0x223c830, L_0x2231250, C4<0>, C4<0>; +L_0x223eb90 .functor NOT 1, L_0x223c730, C4<0>, C4<0>, C4<0>; +L_0x223ec80 .functor AND 1, L_0x223eb90, L_0x223c890, C4<1>, C4<1>; +L_0x223ed30 .functor AND 1, L_0x22401f0, L_0x2240290, C4<1>, C4<1>; +L_0x223ffd0 .functor AND 1, L_0x223ed30, L_0x2231250, C4<1>, C4<1>; +L_0x2240030 .functor OR 1, L_0x223ec80, L_0x223ffd0, C4<0>, C4<0>; +v0x22202d0_0 .net "a", 0 0, L_0x22401f0; 1 drivers +v0x2220390_0 .net "ab", 0 0, L_0x223f260; 1 drivers +v0x2220430_0 .net "acarryin", 0 0, L_0x223f2c0; 1 drivers +v0x22204d0_0 .net "andall", 0 0, L_0x223ffd0; 1 drivers +v0x2220550_0 .net "andsingleintermediate", 0 0, L_0x223ed30; 1 drivers +v0x22205f0_0 .net "andsumintermediate", 0 0, L_0x223ec80; 1 drivers +v0x2220690_0 .net "b", 0 0, L_0x2240290; 1 drivers +v0x2220730_0 .net "bcarryin", 0 0, L_0x223f370; 1 drivers +v0x22207d0_0 .alias "carryin", 0 0, v0x2221450_0; +v0x2220870_0 .alias "carryout", 0 0, v0x2221610_0; +v0x22208f0_0 .net "invcarryout", 0 0, L_0x223eb90; 1 drivers +v0x2220970_0 .net "orall", 0 0, L_0x223c890; 1 drivers +v0x2220a10_0 .net "orpairintermediate", 0 0, L_0x22362f0; 1 drivers +v0x2220ab0_0 .net "orsingleintermediate", 0 0, L_0x223c830; 1 drivers +v0x2220bd0_0 .net "sum", 0 0, L_0x2240030; 1 drivers +S_0x221f750 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x221e080; + .timescale 0 0; +L_0x223ff70 .functor AND 1, L_0x2240e90, L_0x2240f80, C4<1>, C4<1>; +L_0x2240330 .functor AND 1, L_0x2240e90, L_0x223c730, C4<1>, C4<1>; +L_0x22403e0 .functor AND 1, L_0x2240f80, L_0x223c730, C4<1>, C4<1>; +L_0x2240490 .functor OR 1, L_0x223ff70, L_0x2240330, C4<0>, C4<0>; +L_0x2240590 .functor OR 1, L_0x2240490, L_0x22403e0, C4<0>, C4<0>; +L_0x2240690 .functor OR 1, L_0x2240e90, L_0x2240f80, C4<0>, C4<0>; +L_0x22406f0 .functor OR 1, L_0x2240690, L_0x223c730, C4<0>, C4<0>; +L_0x22407a0 .functor NOT 1, L_0x2240590, C4<0>, C4<0>, C4<0>; +L_0x2240890 .functor AND 1, L_0x22407a0, L_0x22406f0, C4<1>, C4<1>; +L_0x2240990 .functor AND 1, L_0x2240e90, L_0x2240f80, C4<1>, C4<1>; +L_0x2240b70 .functor AND 1, L_0x2240990, L_0x223c730, C4<1>, C4<1>; +L_0x223ebf0 .functor OR 1, L_0x2240890, L_0x2240b70, C4<0>, C4<0>; +v0x221f840_0 .net "a", 0 0, L_0x2240e90; 1 drivers +v0x221f900_0 .net "ab", 0 0, L_0x223ff70; 1 drivers +v0x221f9a0_0 .net "acarryin", 0 0, L_0x2240330; 1 drivers +v0x221fa40_0 .net "andall", 0 0, L_0x2240b70; 1 drivers +v0x221fac0_0 .net "andsingleintermediate", 0 0, L_0x2240990; 1 drivers +v0x221fb60_0 .net "andsumintermediate", 0 0, L_0x2240890; 1 drivers +v0x221fc00_0 .net "b", 0 0, L_0x2240f80; 1 drivers +v0x221fca0_0 .net "bcarryin", 0 0, L_0x22403e0; 1 drivers +v0x221fd40_0 .alias "carryin", 0 0, v0x2221610_0; +v0x221fde0_0 .alias "carryout", 0 0, v0x22217e0_0; +v0x221fe60_0 .net "invcarryout", 0 0, L_0x22407a0; 1 drivers +v0x221fee0_0 .net "orall", 0 0, L_0x22406f0; 1 drivers +v0x221ff80_0 .net "orpairintermediate", 0 0, L_0x2240490; 1 drivers +v0x2220020_0 .net "orsingleintermediate", 0 0, L_0x2240690; 1 drivers +v0x2220140_0 .net "sum", 0 0, L_0x223ebf0; 1 drivers +S_0x221ec70 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x221e080; + .timescale 0 0; +L_0x2240b10 .functor AND 1, L_0x2241b80, L_0x2241c70, C4<1>, C4<1>; +L_0x2241070 .functor AND 1, L_0x2241b80, L_0x2240590, C4<1>, C4<1>; +L_0x2241120 .functor AND 1, L_0x2241c70, L_0x2240590, C4<1>, C4<1>; +L_0x22411d0 .functor OR 1, L_0x2240b10, L_0x2241070, C4<0>, C4<0>; +L_0x22412d0 .functor OR 1, L_0x22411d0, L_0x2241120, C4<0>, C4<0>; +L_0x22413d0 .functor OR 1, L_0x2241b80, L_0x2241c70, C4<0>, C4<0>; +L_0x2241430 .functor OR 1, L_0x22413d0, L_0x2240590, C4<0>, C4<0>; +L_0x22414e0 .functor NOT 1, L_0x22412d0, C4<0>, C4<0>, C4<0>; +L_0x22415d0 .functor AND 1, L_0x22414e0, L_0x2241430, C4<1>, C4<1>; +L_0x22416d0 .functor AND 1, L_0x2241b80, L_0x2241c70, C4<1>, C4<1>; +L_0x22418b0 .functor AND 1, L_0x22416d0, L_0x2240590, C4<1>, C4<1>; +L_0x2240800 .functor OR 1, L_0x22415d0, L_0x22418b0, C4<0>, C4<0>; +v0x221ed60_0 .net "a", 0 0, L_0x2241b80; 1 drivers +v0x221ee20_0 .net "ab", 0 0, L_0x2240b10; 1 drivers +v0x221eec0_0 .net "acarryin", 0 0, L_0x2241070; 1 drivers +v0x221ef60_0 .net "andall", 0 0, L_0x22418b0; 1 drivers +v0x221efe0_0 .net "andsingleintermediate", 0 0, L_0x22416d0; 1 drivers +v0x221f080_0 .net "andsumintermediate", 0 0, L_0x22415d0; 1 drivers +v0x221f120_0 .net "b", 0 0, L_0x2241c70; 1 drivers +v0x221f1c0_0 .net "bcarryin", 0 0, L_0x2241120; 1 drivers +v0x221f2b0_0 .alias "carryin", 0 0, v0x22217e0_0; +v0x221f350_0 .alias "carryout", 0 0, v0x2221910_0; +v0x221f3d0_0 .net "invcarryout", 0 0, L_0x22414e0; 1 drivers +v0x221f450_0 .net "orall", 0 0, L_0x2241430; 1 drivers +v0x221f4f0_0 .net "orpairintermediate", 0 0, L_0x22411d0; 1 drivers +v0x221f590_0 .net "orsingleintermediate", 0 0, L_0x22413d0; 1 drivers +v0x221f6b0_0 .net "sum", 0 0, L_0x2240800; 1 drivers +S_0x221e170 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x221e080; + .timescale 0 0; +L_0x2241850 .functor AND 1, L_0x2242820, L_0x2242950, C4<1>, C4<1>; +L_0x2241d10 .functor AND 1, L_0x2242820, L_0x22412d0, C4<1>, C4<1>; +L_0x2241dc0 .functor AND 1, L_0x2242950, L_0x22412d0, C4<1>, C4<1>; +L_0x2241e70 .functor OR 1, L_0x2241850, L_0x2241d10, C4<0>, C4<0>; +L_0x2241f70 .functor OR 1, L_0x2241e70, L_0x2241dc0, C4<0>, C4<0>; +L_0x2242070 .functor OR 1, L_0x2242820, L_0x2242950, C4<0>, C4<0>; +L_0x22420d0 .functor OR 1, L_0x2242070, L_0x22412d0, C4<0>, C4<0>; +L_0x2242180 .functor NOT 1, L_0x2241f70, C4<0>, C4<0>, C4<0>; +L_0x2242230 .functor AND 1, L_0x2242180, L_0x22420d0, C4<1>, C4<1>; +L_0x2242330 .functor AND 1, L_0x2242820, L_0x2242950, C4<1>, C4<1>; +L_0x2242510 .functor AND 1, L_0x2242330, L_0x22412d0, C4<1>, C4<1>; +L_0x2241540 .functor OR 1, L_0x2242230, L_0x2242510, C4<0>, C4<0>; +v0x221e260_0 .net "a", 0 0, L_0x2242820; 1 drivers +v0x221e320_0 .net "ab", 0 0, L_0x2241850; 1 drivers +v0x221e3c0_0 .net "acarryin", 0 0, L_0x2241d10; 1 drivers +v0x221e460_0 .net "andall", 0 0, L_0x2242510; 1 drivers +v0x221e4e0_0 .net "andsingleintermediate", 0 0, L_0x2242330; 1 drivers +v0x221e580_0 .net "andsumintermediate", 0 0, L_0x2242230; 1 drivers +v0x221e620_0 .net "b", 0 0, L_0x2242950; 1 drivers +v0x221e6c0_0 .net "bcarryin", 0 0, L_0x2241dc0; 1 drivers +v0x221e7b0_0 .alias "carryin", 0 0, v0x2221910_0; +v0x221e850_0 .alias "carryout", 0 0, v0x222b690_0; +v0x221e8d0_0 .net "invcarryout", 0 0, L_0x2242180; 1 drivers +v0x221e970_0 .net "orall", 0 0, L_0x22420d0; 1 drivers +v0x221ea10_0 .net "orpairintermediate", 0 0, L_0x2241e70; 1 drivers +v0x221eab0_0 .net "orsingleintermediate", 0 0, L_0x2242070; 1 drivers +v0x221ebd0_0 .net "sum", 0 0, L_0x2241540; 1 drivers +S_0x221a570 .scope module, "adder1" "FullAdder4bit" 7 238, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x22468e0 .functor AND 1, L_0x2246f20, L_0x2246fc0, C4<1>, C4<1>; +L_0x2247060 .functor NOR 1, L_0x22470c0, L_0x2247160, C4<0>, C4<0>; +L_0x22472e0 .functor AND 1, L_0x2247340, L_0x2247430, C4<1>, C4<1>; +L_0x2247250 .functor NOR 1, L_0x22475c0, L_0x22477c0, C4<0>, C4<0>; +L_0x2247520 .functor OR 1, L_0x22468e0, L_0x2247060, C4<0>, C4<0>; +L_0x22479b0 .functor NOR 1, L_0x22472e0, L_0x2247250, C4<0>, C4<0>; +L_0x2247ab0 .functor AND 1, L_0x2247520, L_0x22479b0, C4<1>, C4<1>; +v0x221d160_0 .net *"_s25", 0 0, L_0x2246f20; 1 drivers +v0x221d220_0 .net *"_s27", 0 0, L_0x2246fc0; 1 drivers +v0x221d2c0_0 .net *"_s29", 0 0, L_0x22470c0; 1 drivers +v0x221d360_0 .net *"_s31", 0 0, L_0x2247160; 1 drivers +v0x221d3e0_0 .net *"_s33", 0 0, L_0x2247340; 1 drivers +v0x221d480_0 .net *"_s35", 0 0, L_0x2247430; 1 drivers +v0x221d520_0 .net *"_s37", 0 0, L_0x22475c0; 1 drivers +v0x221d5c0_0 .net *"_s39", 0 0, L_0x22477c0; 1 drivers +v0x221d660_0 .net "a", 3 0, L_0x2243940; 1 drivers +v0x221d700_0 .net "aandb", 0 0, L_0x22468e0; 1 drivers +v0x221d7a0_0 .net "abandnoror", 0 0, L_0x2247520; 1 drivers +v0x221d840_0 .net "anorb", 0 0, L_0x2247060; 1 drivers +v0x221d8e0_0 .net "b", 3 0, L_0x22439e0; 1 drivers +v0x221d980_0 .net "bandsum", 0 0, L_0x22472e0; 1 drivers +v0x221daa0_0 .net "bnorsum", 0 0, L_0x2247250; 1 drivers +v0x221db40_0 .net "bsumandnornor", 0 0, L_0x22479b0; 1 drivers +v0x221da00_0 .alias "carryin", 0 0, v0x222b690_0; +v0x221dc70_0 .alias "carryout", 0 0, v0x222ba90_0; +v0x221dbc0_0 .net "carryout1", 0 0, L_0x2243ee0; 1 drivers +v0x221dd90_0 .net "carryout2", 0 0, L_0x22449c0; 1 drivers +v0x221dec0_0 .net "carryout3", 0 0, L_0x2245700; 1 drivers +v0x221df40_0 .alias "overflow", 0 0, v0x22289e0_0; +v0x221de10_0 .net8 "sum", 3 0, RS_0x7ff1c0ed3ad8; 4 drivers +L_0x2244530 .part/pv L_0x22444d0, 0, 1, 4; +L_0x2244620 .part L_0x2243940, 0, 1; +L_0x22446c0 .part L_0x22439e0, 0, 1; +L_0x2245180 .part/pv L_0x2244150, 1, 1, 4; +L_0x22452c0 .part L_0x2243940, 1, 1; +L_0x22453b0 .part L_0x22439e0, 1, 1; +L_0x2245ec0 .part/pv L_0x2244c30, 2, 1, 4; +L_0x2245fb0 .part L_0x2243940, 2, 1; +L_0x22460a0 .part L_0x22439e0, 2, 1; +L_0x2246b20 .part/pv L_0x2245970, 3, 1, 4; +L_0x2246c50 .part L_0x2243940, 3, 1; +L_0x2246d80 .part L_0x22439e0, 3, 1; +L_0x2246f20 .part L_0x2243940, 3, 1; +L_0x2246fc0 .part L_0x22439e0, 3, 1; +L_0x22470c0 .part L_0x2243940, 3, 1; +L_0x2247160 .part L_0x22439e0, 3, 1; +L_0x2247340 .part L_0x22439e0, 3, 1; +L_0x2247430 .part RS_0x7ff1c0ed3ad8, 3, 1; +L_0x22475c0 .part L_0x22439e0, 3, 1; +L_0x22477c0 .part RS_0x7ff1c0ed3ad8, 3, 1; +S_0x221c6d0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x221a570; + .timescale 0 0; +L_0x2243b70 .functor AND 1, L_0x2244620, L_0x22446c0, C4<1>, C4<1>; +L_0x2243bd0 .functor AND 1, L_0x2244620, L_0x2241f70, C4<1>, C4<1>; +L_0x2243c80 .functor AND 1, L_0x22446c0, L_0x2241f70, C4<1>, C4<1>; +L_0x222b710 .functor OR 1, L_0x2243b70, L_0x2243bd0, C4<0>, C4<0>; +L_0x2243ee0 .functor OR 1, L_0x222b710, L_0x2243c80, C4<0>, C4<0>; +L_0x2243fe0 .functor OR 1, L_0x2244620, L_0x22446c0, C4<0>, C4<0>; +L_0x2244040 .functor OR 1, L_0x2243fe0, L_0x2241f70, C4<0>, C4<0>; +L_0x22440f0 .functor NOT 1, L_0x2243ee0, C4<0>, C4<0>, C4<0>; +L_0x22441e0 .functor AND 1, L_0x22440f0, L_0x2244040, C4<1>, C4<1>; +L_0x2244290 .functor AND 1, L_0x2244620, L_0x22446c0, C4<1>, C4<1>; +L_0x2244470 .functor AND 1, L_0x2244290, L_0x2241f70, C4<1>, C4<1>; +L_0x22444d0 .functor OR 1, L_0x22441e0, L_0x2244470, C4<0>, C4<0>; +v0x221c7c0_0 .net "a", 0 0, L_0x2244620; 1 drivers +v0x221c880_0 .net "ab", 0 0, L_0x2243b70; 1 drivers +v0x221c920_0 .net "acarryin", 0 0, L_0x2243bd0; 1 drivers +v0x221c9c0_0 .net "andall", 0 0, L_0x2244470; 1 drivers +v0x221ca40_0 .net "andsingleintermediate", 0 0, L_0x2244290; 1 drivers +v0x221cae0_0 .net "andsumintermediate", 0 0, L_0x22441e0; 1 drivers +v0x221cb80_0 .net "b", 0 0, L_0x22446c0; 1 drivers +v0x221cc20_0 .net "bcarryin", 0 0, L_0x2243c80; 1 drivers +v0x221ccc0_0 .alias "carryin", 0 0, v0x222b690_0; +v0x221cd60_0 .alias "carryout", 0 0, v0x221dbc0_0; +v0x221cde0_0 .net "invcarryout", 0 0, L_0x22440f0; 1 drivers +v0x221ce60_0 .net "orall", 0 0, L_0x2244040; 1 drivers +v0x221cf00_0 .net "orpairintermediate", 0 0, L_0x222b710; 1 drivers +v0x221cfa0_0 .net "orsingleintermediate", 0 0, L_0x2243fe0; 1 drivers +v0x221d0c0_0 .net "sum", 0 0, L_0x22444d0; 1 drivers +S_0x221bc40 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x221a570; + .timescale 0 0; +L_0x2244410 .functor AND 1, L_0x22452c0, L_0x22453b0, C4<1>, C4<1>; +L_0x2244760 .functor AND 1, L_0x22452c0, L_0x2243ee0, C4<1>, C4<1>; +L_0x2244810 .functor AND 1, L_0x22453b0, L_0x2243ee0, C4<1>, C4<1>; +L_0x22448c0 .functor OR 1, L_0x2244410, L_0x2244760, C4<0>, C4<0>; +L_0x22449c0 .functor OR 1, L_0x22448c0, L_0x2244810, C4<0>, C4<0>; +L_0x2244ac0 .functor OR 1, L_0x22452c0, L_0x22453b0, C4<0>, C4<0>; +L_0x2244b20 .functor OR 1, L_0x2244ac0, L_0x2243ee0, C4<0>, C4<0>; +L_0x2244bd0 .functor NOT 1, L_0x22449c0, C4<0>, C4<0>, C4<0>; +L_0x2244cc0 .functor AND 1, L_0x2244bd0, L_0x2244b20, C4<1>, C4<1>; +L_0x2244dc0 .functor AND 1, L_0x22452c0, L_0x22453b0, C4<1>, C4<1>; +L_0x2244fa0 .functor AND 1, L_0x2244dc0, L_0x2243ee0, C4<1>, C4<1>; +L_0x2244150 .functor OR 1, L_0x2244cc0, L_0x2244fa0, C4<0>, C4<0>; +v0x221bd30_0 .net "a", 0 0, L_0x22452c0; 1 drivers +v0x221bdf0_0 .net "ab", 0 0, L_0x2244410; 1 drivers +v0x221be90_0 .net "acarryin", 0 0, L_0x2244760; 1 drivers +v0x221bf30_0 .net "andall", 0 0, L_0x2244fa0; 1 drivers +v0x221bfb0_0 .net "andsingleintermediate", 0 0, L_0x2244dc0; 1 drivers +v0x221c050_0 .net "andsumintermediate", 0 0, L_0x2244cc0; 1 drivers +v0x221c0f0_0 .net "b", 0 0, L_0x22453b0; 1 drivers +v0x221c190_0 .net "bcarryin", 0 0, L_0x2244810; 1 drivers +v0x221c230_0 .alias "carryin", 0 0, v0x221dbc0_0; +v0x221c2d0_0 .alias "carryout", 0 0, v0x221dd90_0; +v0x221c350_0 .net "invcarryout", 0 0, L_0x2244bd0; 1 drivers +v0x221c3d0_0 .net "orall", 0 0, L_0x2244b20; 1 drivers +v0x221c470_0 .net "orpairintermediate", 0 0, L_0x22448c0; 1 drivers +v0x221c510_0 .net "orsingleintermediate", 0 0, L_0x2244ac0; 1 drivers +v0x221c630_0 .net "sum", 0 0, L_0x2244150; 1 drivers +S_0x221b160 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x221a570; + .timescale 0 0; +L_0x2244f40 .functor AND 1, L_0x2245fb0, L_0x22460a0, C4<1>, C4<1>; +L_0x22454a0 .functor AND 1, L_0x2245fb0, L_0x22449c0, C4<1>, C4<1>; +L_0x2245550 .functor AND 1, L_0x22460a0, L_0x22449c0, C4<1>, C4<1>; +L_0x2245600 .functor OR 1, L_0x2244f40, L_0x22454a0, C4<0>, C4<0>; +L_0x2245700 .functor OR 1, L_0x2245600, L_0x2245550, C4<0>, C4<0>; +L_0x2245800 .functor OR 1, L_0x2245fb0, L_0x22460a0, C4<0>, C4<0>; +L_0x2245860 .functor OR 1, L_0x2245800, L_0x22449c0, C4<0>, C4<0>; +L_0x2245910 .functor NOT 1, L_0x2245700, C4<0>, C4<0>, C4<0>; +L_0x2245a00 .functor AND 1, L_0x2245910, L_0x2245860, C4<1>, C4<1>; +L_0x2245b00 .functor AND 1, L_0x2245fb0, L_0x22460a0, C4<1>, C4<1>; +L_0x2245ce0 .functor AND 1, L_0x2245b00, L_0x22449c0, C4<1>, C4<1>; +L_0x2244c30 .functor OR 1, L_0x2245a00, L_0x2245ce0, C4<0>, C4<0>; +v0x221b250_0 .net "a", 0 0, L_0x2245fb0; 1 drivers +v0x221b310_0 .net "ab", 0 0, L_0x2244f40; 1 drivers +v0x221b3b0_0 .net "acarryin", 0 0, L_0x22454a0; 1 drivers +v0x221b450_0 .net "andall", 0 0, L_0x2245ce0; 1 drivers +v0x221b4d0_0 .net "andsingleintermediate", 0 0, L_0x2245b00; 1 drivers +v0x221b570_0 .net "andsumintermediate", 0 0, L_0x2245a00; 1 drivers +v0x221b610_0 .net "b", 0 0, L_0x22460a0; 1 drivers +v0x221b6b0_0 .net "bcarryin", 0 0, L_0x2245550; 1 drivers +v0x221b7a0_0 .alias "carryin", 0 0, v0x221dd90_0; +v0x221b840_0 .alias "carryout", 0 0, v0x221dec0_0; +v0x221b8c0_0 .net "invcarryout", 0 0, L_0x2245910; 1 drivers +v0x221b940_0 .net "orall", 0 0, L_0x2245860; 1 drivers +v0x221b9e0_0 .net "orpairintermediate", 0 0, L_0x2245600; 1 drivers +v0x221ba80_0 .net "orsingleintermediate", 0 0, L_0x2245800; 1 drivers +v0x221bba0_0 .net "sum", 0 0, L_0x2244c30; 1 drivers +S_0x221a660 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x221a570; + .timescale 0 0; +L_0x2245c80 .functor AND 1, L_0x2246c50, L_0x2246d80, C4<1>, C4<1>; +L_0x2246140 .functor AND 1, L_0x2246c50, L_0x2245700, C4<1>, C4<1>; +L_0x22461f0 .functor AND 1, L_0x2246d80, L_0x2245700, C4<1>, C4<1>; +L_0x22462a0 .functor OR 1, L_0x2245c80, L_0x2246140, C4<0>, C4<0>; +L_0x22463a0 .functor OR 1, L_0x22462a0, L_0x22461f0, C4<0>, C4<0>; +L_0x22464a0 .functor OR 1, L_0x2246c50, L_0x2246d80, C4<0>, C4<0>; +L_0x2246500 .functor OR 1, L_0x22464a0, L_0x2245700, C4<0>, C4<0>; +L_0x22465b0 .functor NOT 1, L_0x22463a0, C4<0>, C4<0>, C4<0>; +L_0x2246660 .functor AND 1, L_0x22465b0, L_0x2246500, C4<1>, C4<1>; +L_0x2246760 .functor AND 1, L_0x2246c50, L_0x2246d80, C4<1>, C4<1>; +L_0x2246940 .functor AND 1, L_0x2246760, L_0x2245700, C4<1>, C4<1>; +L_0x2245970 .functor OR 1, L_0x2246660, L_0x2246940, C4<0>, C4<0>; +v0x221a750_0 .net "a", 0 0, L_0x2246c50; 1 drivers +v0x221a810_0 .net "ab", 0 0, L_0x2245c80; 1 drivers +v0x221a8b0_0 .net "acarryin", 0 0, L_0x2246140; 1 drivers +v0x221a950_0 .net "andall", 0 0, L_0x2246940; 1 drivers +v0x221a9d0_0 .net "andsingleintermediate", 0 0, L_0x2246760; 1 drivers +v0x221aa70_0 .net "andsumintermediate", 0 0, L_0x2246660; 1 drivers +v0x221ab10_0 .net "b", 0 0, L_0x2246d80; 1 drivers +v0x221abb0_0 .net "bcarryin", 0 0, L_0x22461f0; 1 drivers +v0x221aca0_0 .alias "carryin", 0 0, v0x221dec0_0; +v0x221ad40_0 .alias "carryout", 0 0, v0x222ba90_0; +v0x221adc0_0 .net "invcarryout", 0 0, L_0x22465b0; 1 drivers +v0x221ae60_0 .net "orall", 0 0, L_0x2246500; 1 drivers +v0x221af00_0 .net "orpairintermediate", 0 0, L_0x22462a0; 1 drivers +v0x221afa0_0 .net "orsingleintermediate", 0 0, L_0x22464a0; 1 drivers +v0x221b0c0_0 .net "sum", 0 0, L_0x2245970; 1 drivers +S_0x2216a60 .scope module, "adder2" "FullAdder4bit" 7 239, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x224abf0 .functor AND 1, L_0x224b230, L_0x224b2d0, C4<1>, C4<1>; +L_0x224b370 .functor NOR 1, L_0x224b3d0, L_0x224b470, C4<0>, C4<0>; +L_0x224b5f0 .functor AND 1, L_0x224b650, L_0x224b740, C4<1>, C4<1>; +L_0x224b560 .functor NOR 1, L_0x224b8d0, L_0x224bad0, C4<0>, C4<0>; +L_0x224b830 .functor OR 1, L_0x224abf0, L_0x224b370, C4<0>, C4<0>; +L_0x224bcc0 .functor NOR 1, L_0x224b5f0, L_0x224b560, C4<0>, C4<0>; +L_0x224bdc0 .functor AND 1, L_0x224b830, L_0x224bcc0, C4<1>, C4<1>; +v0x2219650_0 .net *"_s25", 0 0, L_0x224b230; 1 drivers +v0x2219710_0 .net *"_s27", 0 0, L_0x224b2d0; 1 drivers +v0x22197b0_0 .net *"_s29", 0 0, L_0x224b3d0; 1 drivers +v0x2219850_0 .net *"_s31", 0 0, L_0x224b470; 1 drivers +v0x22198d0_0 .net *"_s33", 0 0, L_0x224b650; 1 drivers +v0x2219970_0 .net *"_s35", 0 0, L_0x224b740; 1 drivers +v0x2219a10_0 .net *"_s37", 0 0, L_0x224b8d0; 1 drivers +v0x2219ab0_0 .net *"_s39", 0 0, L_0x224bad0; 1 drivers +v0x2219b50_0 .net "a", 3 0, L_0x224c040; 1 drivers +v0x2219bf0_0 .net "aandb", 0 0, L_0x224abf0; 1 drivers +v0x2219c90_0 .net "abandnoror", 0 0, L_0x224b830; 1 drivers +v0x2219d30_0 .net "anorb", 0 0, L_0x224b370; 1 drivers +v0x2219dd0_0 .net "b", 3 0, L_0x2247ca0; 1 drivers +v0x2219e70_0 .net "bandsum", 0 0, L_0x224b5f0; 1 drivers +v0x2219f90_0 .net "bnorsum", 0 0, L_0x224b560; 1 drivers +v0x221a030_0 .net "bsumandnornor", 0 0, L_0x224bcc0; 1 drivers +v0x2219ef0_0 .alias "carryin", 0 0, v0x222ba90_0; +v0x221a160_0 .alias "carryout", 0 0, v0x222b8c0_0; +v0x221a0b0_0 .net "carryout1", 0 0, L_0x22481a0; 1 drivers +v0x221a280_0 .net "carryout2", 0 0, L_0x2248cd0; 1 drivers +v0x221a3b0_0 .net "carryout3", 0 0, L_0x2249a10; 1 drivers +v0x221a430_0 .alias "overflow", 0 0, v0x2228a60_0; +v0x221a300_0 .net8 "sum", 3 0, RS_0x7ff1c0ed2cf8; 4 drivers +L_0x2248840 .part/pv L_0x22487e0, 0, 1, 4; +L_0x2248930 .part L_0x224c040, 0, 1; +L_0x22489d0 .part L_0x2247ca0, 0, 1; +L_0x2249490 .part/pv L_0x2248410, 1, 1, 4; +L_0x22495d0 .part L_0x224c040, 1, 1; +L_0x22496c0 .part L_0x2247ca0, 1, 1; +L_0x224a1d0 .part/pv L_0x2248f40, 2, 1, 4; +L_0x224a2c0 .part L_0x224c040, 2, 1; +L_0x224a3b0 .part L_0x2247ca0, 2, 1; +L_0x224ae30 .part/pv L_0x2249c80, 3, 1, 4; +L_0x224af60 .part L_0x224c040, 3, 1; +L_0x224b090 .part L_0x2247ca0, 3, 1; +L_0x224b230 .part L_0x224c040, 3, 1; +L_0x224b2d0 .part L_0x2247ca0, 3, 1; +L_0x224b3d0 .part L_0x224c040, 3, 1; +L_0x224b470 .part L_0x2247ca0, 3, 1; +L_0x224b650 .part L_0x2247ca0, 3, 1; +L_0x224b740 .part RS_0x7ff1c0ed2cf8, 3, 1; +L_0x224b8d0 .part L_0x2247ca0, 3, 1; +L_0x224bad0 .part RS_0x7ff1c0ed2cf8, 3, 1; +S_0x2218bc0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2216a60; + .timescale 0 0; +L_0x2243a80 .functor AND 1, L_0x2248930, L_0x22489d0, C4<1>, C4<1>; +L_0x2243ae0 .functor AND 1, L_0x2248930, L_0x22463a0, C4<1>, C4<1>; +L_0x2247f40 .functor AND 1, L_0x22489d0, L_0x22463a0, C4<1>, C4<1>; +L_0x222b830 .functor OR 1, L_0x2243a80, L_0x2243ae0, C4<0>, C4<0>; +L_0x22481a0 .functor OR 1, L_0x222b830, L_0x2247f40, C4<0>, C4<0>; +L_0x22482a0 .functor OR 1, L_0x2248930, L_0x22489d0, C4<0>, C4<0>; +L_0x2248300 .functor OR 1, L_0x22482a0, L_0x22463a0, C4<0>, C4<0>; +L_0x22483b0 .functor NOT 1, L_0x22481a0, C4<0>, C4<0>, C4<0>; +L_0x22484a0 .functor AND 1, L_0x22483b0, L_0x2248300, C4<1>, C4<1>; +L_0x22485a0 .functor AND 1, L_0x2248930, L_0x22489d0, C4<1>, C4<1>; +L_0x2248780 .functor AND 1, L_0x22485a0, L_0x22463a0, C4<1>, C4<1>; +L_0x22487e0 .functor OR 1, L_0x22484a0, L_0x2248780, C4<0>, C4<0>; +v0x2218cb0_0 .net "a", 0 0, L_0x2248930; 1 drivers +v0x2218d70_0 .net "ab", 0 0, L_0x2243a80; 1 drivers +v0x2218e10_0 .net "acarryin", 0 0, L_0x2243ae0; 1 drivers +v0x2218eb0_0 .net "andall", 0 0, L_0x2248780; 1 drivers +v0x2218f30_0 .net "andsingleintermediate", 0 0, L_0x22485a0; 1 drivers +v0x2218fd0_0 .net "andsumintermediate", 0 0, L_0x22484a0; 1 drivers +v0x2219070_0 .net "b", 0 0, L_0x22489d0; 1 drivers +v0x2219110_0 .net "bcarryin", 0 0, L_0x2247f40; 1 drivers +v0x22191b0_0 .alias "carryin", 0 0, v0x222ba90_0; +v0x2219250_0 .alias "carryout", 0 0, v0x221a0b0_0; +v0x22192d0_0 .net "invcarryout", 0 0, L_0x22483b0; 1 drivers +v0x2219350_0 .net "orall", 0 0, L_0x2248300; 1 drivers +v0x22193f0_0 .net "orpairintermediate", 0 0, L_0x222b830; 1 drivers +v0x2219490_0 .net "orsingleintermediate", 0 0, L_0x22482a0; 1 drivers +v0x22195b0_0 .net "sum", 0 0, L_0x22487e0; 1 drivers +S_0x2218130 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2216a60; + .timescale 0 0; +L_0x2248720 .functor AND 1, L_0x22495d0, L_0x22496c0, C4<1>, C4<1>; +L_0x2248a70 .functor AND 1, L_0x22495d0, L_0x22481a0, C4<1>, C4<1>; +L_0x2248b20 .functor AND 1, L_0x22496c0, L_0x22481a0, C4<1>, C4<1>; +L_0x2248bd0 .functor OR 1, L_0x2248720, L_0x2248a70, C4<0>, C4<0>; +L_0x2248cd0 .functor OR 1, L_0x2248bd0, L_0x2248b20, C4<0>, C4<0>; +L_0x2248dd0 .functor OR 1, L_0x22495d0, L_0x22496c0, C4<0>, C4<0>; +L_0x2248e30 .functor OR 1, L_0x2248dd0, L_0x22481a0, C4<0>, C4<0>; +L_0x2248ee0 .functor NOT 1, L_0x2248cd0, C4<0>, C4<0>, C4<0>; +L_0x2248fd0 .functor AND 1, L_0x2248ee0, L_0x2248e30, C4<1>, C4<1>; +L_0x22490d0 .functor AND 1, L_0x22495d0, L_0x22496c0, C4<1>, C4<1>; +L_0x22492b0 .functor AND 1, L_0x22490d0, L_0x22481a0, C4<1>, C4<1>; +L_0x2248410 .functor OR 1, L_0x2248fd0, L_0x22492b0, C4<0>, C4<0>; +v0x2218220_0 .net "a", 0 0, L_0x22495d0; 1 drivers +v0x22182e0_0 .net "ab", 0 0, L_0x2248720; 1 drivers +v0x2218380_0 .net "acarryin", 0 0, L_0x2248a70; 1 drivers +v0x2218420_0 .net "andall", 0 0, L_0x22492b0; 1 drivers +v0x22184a0_0 .net "andsingleintermediate", 0 0, L_0x22490d0; 1 drivers +v0x2218540_0 .net "andsumintermediate", 0 0, L_0x2248fd0; 1 drivers +v0x22185e0_0 .net "b", 0 0, L_0x22496c0; 1 drivers +v0x2218680_0 .net "bcarryin", 0 0, L_0x2248b20; 1 drivers +v0x2218720_0 .alias "carryin", 0 0, v0x221a0b0_0; +v0x22187c0_0 .alias "carryout", 0 0, v0x221a280_0; +v0x2218840_0 .net "invcarryout", 0 0, L_0x2248ee0; 1 drivers +v0x22188c0_0 .net "orall", 0 0, L_0x2248e30; 1 drivers +v0x2218960_0 .net "orpairintermediate", 0 0, L_0x2248bd0; 1 drivers +v0x2218a00_0 .net "orsingleintermediate", 0 0, L_0x2248dd0; 1 drivers +v0x2218b20_0 .net "sum", 0 0, L_0x2248410; 1 drivers +S_0x2217650 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2216a60; + .timescale 0 0; +L_0x2249250 .functor AND 1, L_0x224a2c0, L_0x224a3b0, C4<1>, C4<1>; +L_0x22497b0 .functor AND 1, L_0x224a2c0, L_0x2248cd0, C4<1>, C4<1>; +L_0x2249860 .functor AND 1, L_0x224a3b0, L_0x2248cd0, C4<1>, C4<1>; +L_0x2249910 .functor OR 1, L_0x2249250, L_0x22497b0, C4<0>, C4<0>; +L_0x2249a10 .functor OR 1, L_0x2249910, L_0x2249860, C4<0>, C4<0>; +L_0x2249b10 .functor OR 1, L_0x224a2c0, L_0x224a3b0, C4<0>, C4<0>; +L_0x2249b70 .functor OR 1, L_0x2249b10, L_0x2248cd0, C4<0>, C4<0>; +L_0x2249c20 .functor NOT 1, L_0x2249a10, C4<0>, C4<0>, C4<0>; +L_0x2249d10 .functor AND 1, L_0x2249c20, L_0x2249b70, C4<1>, C4<1>; +L_0x2249e10 .functor AND 1, L_0x224a2c0, L_0x224a3b0, C4<1>, C4<1>; +L_0x2249ff0 .functor AND 1, L_0x2249e10, L_0x2248cd0, C4<1>, C4<1>; +L_0x2248f40 .functor OR 1, L_0x2249d10, L_0x2249ff0, C4<0>, C4<0>; +v0x2217740_0 .net "a", 0 0, L_0x224a2c0; 1 drivers +v0x2217800_0 .net "ab", 0 0, L_0x2249250; 1 drivers +v0x22178a0_0 .net "acarryin", 0 0, L_0x22497b0; 1 drivers +v0x2217940_0 .net "andall", 0 0, L_0x2249ff0; 1 drivers +v0x22179c0_0 .net "andsingleintermediate", 0 0, L_0x2249e10; 1 drivers +v0x2217a60_0 .net "andsumintermediate", 0 0, L_0x2249d10; 1 drivers +v0x2217b00_0 .net "b", 0 0, L_0x224a3b0; 1 drivers +v0x2217ba0_0 .net "bcarryin", 0 0, L_0x2249860; 1 drivers +v0x2217c90_0 .alias "carryin", 0 0, v0x221a280_0; +v0x2217d30_0 .alias "carryout", 0 0, v0x221a3b0_0; +v0x2217db0_0 .net "invcarryout", 0 0, L_0x2249c20; 1 drivers +v0x2217e30_0 .net "orall", 0 0, L_0x2249b70; 1 drivers +v0x2217ed0_0 .net "orpairintermediate", 0 0, L_0x2249910; 1 drivers +v0x2217f70_0 .net "orsingleintermediate", 0 0, L_0x2249b10; 1 drivers +v0x2218090_0 .net "sum", 0 0, L_0x2248f40; 1 drivers +S_0x2216b50 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2216a60; + .timescale 0 0; +L_0x2249f90 .functor AND 1, L_0x224af60, L_0x224b090, C4<1>, C4<1>; +L_0x224a450 .functor AND 1, L_0x224af60, L_0x2249a10, C4<1>, C4<1>; +L_0x224a500 .functor AND 1, L_0x224b090, L_0x2249a10, C4<1>, C4<1>; +L_0x224a5b0 .functor OR 1, L_0x2249f90, L_0x224a450, C4<0>, C4<0>; +L_0x224a6b0 .functor OR 1, L_0x224a5b0, L_0x224a500, C4<0>, C4<0>; +L_0x224a7b0 .functor OR 1, L_0x224af60, L_0x224b090, C4<0>, C4<0>; +L_0x224a810 .functor OR 1, L_0x224a7b0, L_0x2249a10, C4<0>, C4<0>; +L_0x224a8c0 .functor NOT 1, L_0x224a6b0, C4<0>, C4<0>, C4<0>; +L_0x224a970 .functor AND 1, L_0x224a8c0, L_0x224a810, C4<1>, C4<1>; +L_0x224aa70 .functor AND 1, L_0x224af60, L_0x224b090, C4<1>, C4<1>; +L_0x224ac50 .functor AND 1, L_0x224aa70, L_0x2249a10, C4<1>, C4<1>; +L_0x2249c80 .functor OR 1, L_0x224a970, L_0x224ac50, C4<0>, C4<0>; +v0x2216c40_0 .net "a", 0 0, L_0x224af60; 1 drivers +v0x2216d00_0 .net "ab", 0 0, L_0x2249f90; 1 drivers +v0x2216da0_0 .net "acarryin", 0 0, L_0x224a450; 1 drivers +v0x2216e40_0 .net "andall", 0 0, L_0x224ac50; 1 drivers +v0x2216ec0_0 .net "andsingleintermediate", 0 0, L_0x224aa70; 1 drivers +v0x2216f60_0 .net "andsumintermediate", 0 0, L_0x224a970; 1 drivers +v0x2217000_0 .net "b", 0 0, L_0x224b090; 1 drivers +v0x22170a0_0 .net "bcarryin", 0 0, L_0x224a500; 1 drivers +v0x2217190_0 .alias "carryin", 0 0, v0x221a3b0_0; +v0x2217230_0 .alias "carryout", 0 0, v0x222b8c0_0; +v0x22172b0_0 .net "invcarryout", 0 0, L_0x224a8c0; 1 drivers +v0x2217350_0 .net "orall", 0 0, L_0x224a810; 1 drivers +v0x22173f0_0 .net "orpairintermediate", 0 0, L_0x224a5b0; 1 drivers +v0x2217490_0 .net "orsingleintermediate", 0 0, L_0x224a7b0; 1 drivers +v0x22175b0_0 .net "sum", 0 0, L_0x2249c80; 1 drivers +S_0x2212f50 .scope module, "adder3" "FullAdder4bit" 7 240, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x224ef40 .functor AND 1, L_0x224f580, L_0x224f620, C4<1>, C4<1>; +L_0x224f6c0 .functor NOR 1, L_0x224f720, L_0x224f7c0, C4<0>, C4<0>; +L_0x224f940 .functor AND 1, L_0x224f9a0, L_0x224fa90, C4<1>, C4<1>; +L_0x224f8b0 .functor NOR 1, L_0x224fc20, L_0x224fe20, C4<0>, C4<0>; +L_0x224fb80 .functor OR 1, L_0x224ef40, L_0x224f6c0, C4<0>, C4<0>; +L_0x2250010 .functor NOR 1, L_0x224f940, L_0x224f8b0, C4<0>, C4<0>; +L_0x2250110 .functor AND 1, L_0x224fb80, L_0x2250010, C4<1>, C4<1>; +v0x2215b40_0 .net *"_s25", 0 0, L_0x224f580; 1 drivers +v0x2215c00_0 .net *"_s27", 0 0, L_0x224f620; 1 drivers +v0x2215ca0_0 .net *"_s29", 0 0, L_0x224f720; 1 drivers +v0x2215d40_0 .net *"_s31", 0 0, L_0x224f7c0; 1 drivers +v0x2215dc0_0 .net *"_s33", 0 0, L_0x224f9a0; 1 drivers +v0x2215e60_0 .net *"_s35", 0 0, L_0x224fa90; 1 drivers +v0x2215f00_0 .net *"_s37", 0 0, L_0x224fc20; 1 drivers +v0x2215fa0_0 .net *"_s39", 0 0, L_0x224fe20; 1 drivers +v0x2216040_0 .net "a", 3 0, L_0x224c0e0; 1 drivers +v0x22160e0_0 .net "aandb", 0 0, L_0x224ef40; 1 drivers +v0x2216180_0 .net "abandnoror", 0 0, L_0x224fb80; 1 drivers +v0x2216220_0 .net "anorb", 0 0, L_0x224f6c0; 1 drivers +v0x22162c0_0 .net "b", 3 0, L_0x224c180; 1 drivers +v0x2216360_0 .net "bandsum", 0 0, L_0x224f940; 1 drivers +v0x2216480_0 .net "bnorsum", 0 0, L_0x224f8b0; 1 drivers +v0x2216520_0 .net "bsumandnornor", 0 0, L_0x2250010; 1 drivers +v0x22163e0_0 .alias "carryin", 0 0, v0x222b8c0_0; +v0x2216650_0 .alias "carryout", 0 0, v0x222b9d0_0; +v0x22165a0_0 .net "carryout1", 0 0, L_0x224c4f0; 1 drivers +v0x2216770_0 .net "carryout2", 0 0, L_0x224d020; 1 drivers +v0x22168a0_0 .net "carryout3", 0 0, L_0x224dd60; 1 drivers +v0x2216920_0 .alias "overflow", 0 0, v0x2228ae0_0; +v0x22167f0_0 .net8 "sum", 3 0, RS_0x7ff1c0ed1f18; 4 drivers +L_0x224cb90 .part/pv L_0x224cb30, 0, 1, 4; +L_0x224cc80 .part L_0x224c0e0, 0, 1; +L_0x224cd20 .part L_0x224c180, 0, 1; +L_0x224d7e0 .part/pv L_0x224c760, 1, 1, 4; +L_0x224d920 .part L_0x224c0e0, 1, 1; +L_0x224da10 .part L_0x224c180, 1, 1; +L_0x224e520 .part/pv L_0x224d290, 2, 1, 4; +L_0x224e610 .part L_0x224c0e0, 2, 1; +L_0x224e700 .part L_0x224c180, 2, 1; +L_0x224f180 .part/pv L_0x224dfd0, 3, 1, 4; +L_0x224f2b0 .part L_0x224c0e0, 3, 1; +L_0x224f3e0 .part L_0x224c180, 3, 1; +L_0x224f580 .part L_0x224c0e0, 3, 1; +L_0x224f620 .part L_0x224c180, 3, 1; +L_0x224f720 .part L_0x224c0e0, 3, 1; +L_0x224f7c0 .part L_0x224c180, 3, 1; +L_0x224f9a0 .part L_0x224c180, 3, 1; +L_0x224fa90 .part RS_0x7ff1c0ed1f18, 3, 1; +L_0x224fc20 .part L_0x224c180, 3, 1; +L_0x224fe20 .part RS_0x7ff1c0ed1f18, 3, 1; +S_0x22150b0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2212f50; + .timescale 0 0; +L_0x2247d40 .functor AND 1, L_0x224cc80, L_0x224cd20, C4<1>, C4<1>; +L_0x2247da0 .functor AND 1, L_0x224cc80, L_0x224a6b0, C4<1>, C4<1>; +L_0x2247e00 .functor AND 1, L_0x224cd20, L_0x224a6b0, C4<1>, C4<1>; +L_0x222b940 .functor OR 1, L_0x2247d40, L_0x2247da0, C4<0>, C4<0>; +L_0x224c4f0 .functor OR 1, L_0x222b940, L_0x2247e00, C4<0>, C4<0>; +L_0x224c5f0 .functor OR 1, L_0x224cc80, L_0x224cd20, C4<0>, C4<0>; +L_0x224c650 .functor OR 1, L_0x224c5f0, L_0x224a6b0, C4<0>, C4<0>; +L_0x224c700 .functor NOT 1, L_0x224c4f0, C4<0>, C4<0>, C4<0>; +L_0x224c7f0 .functor AND 1, L_0x224c700, L_0x224c650, C4<1>, C4<1>; +L_0x224c8f0 .functor AND 1, L_0x224cc80, L_0x224cd20, C4<1>, C4<1>; +L_0x224cad0 .functor AND 1, L_0x224c8f0, L_0x224a6b0, C4<1>, C4<1>; +L_0x224cb30 .functor OR 1, L_0x224c7f0, L_0x224cad0, C4<0>, C4<0>; +v0x22151a0_0 .net "a", 0 0, L_0x224cc80; 1 drivers +v0x2215260_0 .net "ab", 0 0, L_0x2247d40; 1 drivers +v0x2215300_0 .net "acarryin", 0 0, L_0x2247da0; 1 drivers +v0x22153a0_0 .net "andall", 0 0, L_0x224cad0; 1 drivers +v0x2215420_0 .net "andsingleintermediate", 0 0, L_0x224c8f0; 1 drivers +v0x22154c0_0 .net "andsumintermediate", 0 0, L_0x224c7f0; 1 drivers +v0x2215560_0 .net "b", 0 0, L_0x224cd20; 1 drivers +v0x2215600_0 .net "bcarryin", 0 0, L_0x2247e00; 1 drivers +v0x22156a0_0 .alias "carryin", 0 0, v0x222b8c0_0; +v0x2215740_0 .alias "carryout", 0 0, v0x22165a0_0; +v0x22157c0_0 .net "invcarryout", 0 0, L_0x224c700; 1 drivers +v0x2215840_0 .net "orall", 0 0, L_0x224c650; 1 drivers +v0x22158e0_0 .net "orpairintermediate", 0 0, L_0x222b940; 1 drivers +v0x2215980_0 .net "orsingleintermediate", 0 0, L_0x224c5f0; 1 drivers +v0x2215aa0_0 .net "sum", 0 0, L_0x224cb30; 1 drivers +S_0x2214620 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2212f50; + .timescale 0 0; +L_0x224ca70 .functor AND 1, L_0x224d920, L_0x224da10, C4<1>, C4<1>; +L_0x224cdc0 .functor AND 1, L_0x224d920, L_0x224c4f0, C4<1>, C4<1>; +L_0x224ce70 .functor AND 1, L_0x224da10, L_0x224c4f0, C4<1>, C4<1>; +L_0x224cf20 .functor OR 1, L_0x224ca70, L_0x224cdc0, C4<0>, C4<0>; +L_0x224d020 .functor OR 1, L_0x224cf20, L_0x224ce70, C4<0>, C4<0>; +L_0x224d120 .functor OR 1, L_0x224d920, L_0x224da10, C4<0>, C4<0>; +L_0x224d180 .functor OR 1, L_0x224d120, L_0x224c4f0, C4<0>, C4<0>; +L_0x224d230 .functor NOT 1, L_0x224d020, C4<0>, C4<0>, C4<0>; +L_0x224d320 .functor AND 1, L_0x224d230, L_0x224d180, C4<1>, C4<1>; +L_0x224d420 .functor AND 1, L_0x224d920, L_0x224da10, C4<1>, C4<1>; +L_0x224d600 .functor AND 1, L_0x224d420, L_0x224c4f0, C4<1>, C4<1>; +L_0x224c760 .functor OR 1, L_0x224d320, L_0x224d600, C4<0>, C4<0>; +v0x2214710_0 .net "a", 0 0, L_0x224d920; 1 drivers +v0x22147d0_0 .net "ab", 0 0, L_0x224ca70; 1 drivers +v0x2214870_0 .net "acarryin", 0 0, L_0x224cdc0; 1 drivers +v0x2214910_0 .net "andall", 0 0, L_0x224d600; 1 drivers +v0x2214990_0 .net "andsingleintermediate", 0 0, L_0x224d420; 1 drivers +v0x2214a30_0 .net "andsumintermediate", 0 0, L_0x224d320; 1 drivers +v0x2214ad0_0 .net "b", 0 0, L_0x224da10; 1 drivers +v0x2214b70_0 .net "bcarryin", 0 0, L_0x224ce70; 1 drivers +v0x2214c10_0 .alias "carryin", 0 0, v0x22165a0_0; +v0x2214cb0_0 .alias "carryout", 0 0, v0x2216770_0; +v0x2214d30_0 .net "invcarryout", 0 0, L_0x224d230; 1 drivers +v0x2214db0_0 .net "orall", 0 0, L_0x224d180; 1 drivers +v0x2214e50_0 .net "orpairintermediate", 0 0, L_0x224cf20; 1 drivers +v0x2214ef0_0 .net "orsingleintermediate", 0 0, L_0x224d120; 1 drivers +v0x2215010_0 .net "sum", 0 0, L_0x224c760; 1 drivers +S_0x2213b40 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2212f50; + .timescale 0 0; +L_0x224d5a0 .functor AND 1, L_0x224e610, L_0x224e700, C4<1>, C4<1>; +L_0x224db00 .functor AND 1, L_0x224e610, L_0x224d020, C4<1>, C4<1>; +L_0x224dbb0 .functor AND 1, L_0x224e700, L_0x224d020, C4<1>, C4<1>; +L_0x224dc60 .functor OR 1, L_0x224d5a0, L_0x224db00, C4<0>, C4<0>; +L_0x224dd60 .functor OR 1, L_0x224dc60, L_0x224dbb0, C4<0>, C4<0>; +L_0x224de60 .functor OR 1, L_0x224e610, L_0x224e700, C4<0>, C4<0>; +L_0x224dec0 .functor OR 1, L_0x224de60, L_0x224d020, C4<0>, C4<0>; +L_0x224df70 .functor NOT 1, L_0x224dd60, C4<0>, C4<0>, C4<0>; +L_0x224e060 .functor AND 1, L_0x224df70, L_0x224dec0, C4<1>, C4<1>; +L_0x224e160 .functor AND 1, L_0x224e610, L_0x224e700, C4<1>, C4<1>; +L_0x224e340 .functor AND 1, L_0x224e160, L_0x224d020, C4<1>, C4<1>; +L_0x224d290 .functor OR 1, L_0x224e060, L_0x224e340, C4<0>, C4<0>; +v0x2213c30_0 .net "a", 0 0, L_0x224e610; 1 drivers +v0x2213cf0_0 .net "ab", 0 0, L_0x224d5a0; 1 drivers +v0x2213d90_0 .net "acarryin", 0 0, L_0x224db00; 1 drivers +v0x2213e30_0 .net "andall", 0 0, L_0x224e340; 1 drivers +v0x2213eb0_0 .net "andsingleintermediate", 0 0, L_0x224e160; 1 drivers +v0x2213f50_0 .net "andsumintermediate", 0 0, L_0x224e060; 1 drivers +v0x2213ff0_0 .net "b", 0 0, L_0x224e700; 1 drivers +v0x2214090_0 .net "bcarryin", 0 0, L_0x224dbb0; 1 drivers +v0x2214180_0 .alias "carryin", 0 0, v0x2216770_0; +v0x2214220_0 .alias "carryout", 0 0, v0x22168a0_0; +v0x22142a0_0 .net "invcarryout", 0 0, L_0x224df70; 1 drivers +v0x2214320_0 .net "orall", 0 0, L_0x224dec0; 1 drivers +v0x22143c0_0 .net "orpairintermediate", 0 0, L_0x224dc60; 1 drivers +v0x2214460_0 .net "orsingleintermediate", 0 0, L_0x224de60; 1 drivers +v0x2214580_0 .net "sum", 0 0, L_0x224d290; 1 drivers +S_0x2213040 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2212f50; + .timescale 0 0; +L_0x224e2e0 .functor AND 1, L_0x224f2b0, L_0x224f3e0, C4<1>, C4<1>; +L_0x224e7a0 .functor AND 1, L_0x224f2b0, L_0x224dd60, C4<1>, C4<1>; +L_0x224e850 .functor AND 1, L_0x224f3e0, L_0x224dd60, C4<1>, C4<1>; +L_0x224e900 .functor OR 1, L_0x224e2e0, L_0x224e7a0, C4<0>, C4<0>; +L_0x224ea00 .functor OR 1, L_0x224e900, L_0x224e850, C4<0>, C4<0>; +L_0x224eb00 .functor OR 1, L_0x224f2b0, L_0x224f3e0, C4<0>, C4<0>; +L_0x224eb60 .functor OR 1, L_0x224eb00, L_0x224dd60, C4<0>, C4<0>; +L_0x224ec10 .functor NOT 1, L_0x224ea00, C4<0>, C4<0>, C4<0>; +L_0x224ecc0 .functor AND 1, L_0x224ec10, L_0x224eb60, C4<1>, C4<1>; +L_0x224edc0 .functor AND 1, L_0x224f2b0, L_0x224f3e0, C4<1>, C4<1>; +L_0x224efa0 .functor AND 1, L_0x224edc0, L_0x224dd60, C4<1>, C4<1>; +L_0x224dfd0 .functor OR 1, L_0x224ecc0, L_0x224efa0, C4<0>, C4<0>; +v0x2213130_0 .net "a", 0 0, L_0x224f2b0; 1 drivers +v0x22131f0_0 .net "ab", 0 0, L_0x224e2e0; 1 drivers +v0x2213290_0 .net "acarryin", 0 0, L_0x224e7a0; 1 drivers +v0x2213330_0 .net "andall", 0 0, L_0x224efa0; 1 drivers +v0x22133b0_0 .net "andsingleintermediate", 0 0, L_0x224edc0; 1 drivers +v0x2213450_0 .net "andsumintermediate", 0 0, L_0x224ecc0; 1 drivers +v0x22134f0_0 .net "b", 0 0, L_0x224f3e0; 1 drivers +v0x2213590_0 .net "bcarryin", 0 0, L_0x224e850; 1 drivers +v0x2213680_0 .alias "carryin", 0 0, v0x22168a0_0; +v0x2213720_0 .alias "carryout", 0 0, v0x222b9d0_0; +v0x22137a0_0 .net "invcarryout", 0 0, L_0x224ec10; 1 drivers +v0x2213840_0 .net "orall", 0 0, L_0x224eb60; 1 drivers +v0x22138e0_0 .net "orpairintermediate", 0 0, L_0x224e900; 1 drivers +v0x2213980_0 .net "orsingleintermediate", 0 0, L_0x224eb00; 1 drivers +v0x2213aa0_0 .net "sum", 0 0, L_0x224dfd0; 1 drivers +S_0x220f440 .scope module, "adder4" "FullAdder4bit" 7 241, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x2253220 .functor AND 1, L_0x2253860, L_0x2253900, C4<1>, C4<1>; +L_0x22539a0 .functor NOR 1, L_0x2253a00, L_0x2253aa0, C4<0>, C4<0>; +L_0x2253c20 .functor AND 1, L_0x2253c80, L_0x2253d70, C4<1>, C4<1>; +L_0x2253b90 .functor NOR 1, L_0x2253f00, L_0x2254100, C4<0>, C4<0>; +L_0x2253e60 .functor OR 1, L_0x2253220, L_0x22539a0, C4<0>, C4<0>; +L_0x22542f0 .functor NOR 1, L_0x2253c20, L_0x2253b90, C4<0>, C4<0>; +L_0x22543f0 .functor AND 1, L_0x2253e60, L_0x22542f0, C4<1>, C4<1>; +v0x2212030_0 .net *"_s25", 0 0, L_0x2253860; 1 drivers +v0x22120f0_0 .net *"_s27", 0 0, L_0x2253900; 1 drivers +v0x2212190_0 .net *"_s29", 0 0, L_0x2253a00; 1 drivers +v0x2212230_0 .net *"_s31", 0 0, L_0x2253aa0; 1 drivers +v0x22122b0_0 .net *"_s33", 0 0, L_0x2253c80; 1 drivers +v0x2212350_0 .net *"_s35", 0 0, L_0x2253d70; 1 drivers +v0x22123f0_0 .net *"_s37", 0 0, L_0x2253f00; 1 drivers +v0x2212490_0 .net *"_s39", 0 0, L_0x2254100; 1 drivers +v0x2212530_0 .net "a", 3 0, L_0x22545e0; 1 drivers +v0x22125d0_0 .net "aandb", 0 0, L_0x2253220; 1 drivers +v0x2212670_0 .net "abandnoror", 0 0, L_0x2253e60; 1 drivers +v0x2212710_0 .net "anorb", 0 0, L_0x22539a0; 1 drivers +v0x22127b0_0 .net "b", 3 0, L_0x2250300; 1 drivers +v0x2212850_0 .net "bandsum", 0 0, L_0x2253c20; 1 drivers +v0x2212970_0 .net "bnorsum", 0 0, L_0x2253b90; 1 drivers +v0x2212a10_0 .net "bsumandnornor", 0 0, L_0x22542f0; 1 drivers +v0x22128d0_0 .alias "carryin", 0 0, v0x222b9d0_0; +v0x2212b40_0 .alias "carryout", 0 0, v0x222be20_0; +v0x2212a90_0 .net "carryout1", 0 0, L_0x22507e0; 1 drivers +v0x2212c60_0 .net "carryout2", 0 0, L_0x2251300; 1 drivers +v0x2212d90_0 .net "carryout3", 0 0, L_0x2252040; 1 drivers +v0x2212e10_0 .alias "overflow", 0 0, v0x2228b60_0; +v0x2212ce0_0 .net8 "sum", 3 0, RS_0x7ff1c0ed1138; 4 drivers +L_0x2250e70 .part/pv L_0x2250dc0, 0, 1, 4; +L_0x2250f60 .part L_0x22545e0, 0, 1; +L_0x2251000 .part L_0x2250300, 0, 1; +L_0x2251ac0 .part/pv L_0x2250a50, 1, 1, 4; +L_0x2251c00 .part L_0x22545e0, 1, 1; +L_0x2251cf0 .part L_0x2250300, 1, 1; +L_0x2252800 .part/pv L_0x2251570, 2, 1, 4; +L_0x22528f0 .part L_0x22545e0, 2, 1; +L_0x22529e0 .part L_0x2250300, 2, 1; +L_0x2253460 .part/pv L_0x22522b0, 3, 1, 4; +L_0x2253590 .part L_0x22545e0, 3, 1; +L_0x22536c0 .part L_0x2250300, 3, 1; +L_0x2253860 .part L_0x22545e0, 3, 1; +L_0x2253900 .part L_0x2250300, 3, 1; +L_0x2253a00 .part L_0x22545e0, 3, 1; +L_0x2253aa0 .part L_0x2250300, 3, 1; +L_0x2253c80 .part L_0x2250300, 3, 1; +L_0x2253d70 .part RS_0x7ff1c0ed1138, 3, 1; +L_0x2253f00 .part L_0x2250300, 3, 1; +L_0x2254100 .part RS_0x7ff1c0ed1138, 3, 1; +S_0x22115a0 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x220f440; + .timescale 0 0; +L_0x224c220 .functor AND 1, L_0x2250f60, L_0x2251000, C4<1>, C4<1>; +L_0x224c280 .functor AND 1, L_0x2250f60, L_0x224ea00, C4<1>, C4<1>; +L_0x2250580 .functor AND 1, L_0x2251000, L_0x224ea00, C4<1>, C4<1>; +L_0x222bd90 .functor OR 1, L_0x224c220, L_0x224c280, C4<0>, C4<0>; +L_0x22507e0 .functor OR 1, L_0x222bd90, L_0x2250580, C4<0>, C4<0>; +L_0x22508e0 .functor OR 1, L_0x2250f60, L_0x2251000, C4<0>, C4<0>; +L_0x2250940 .functor OR 1, L_0x22508e0, L_0x224ea00, C4<0>, C4<0>; +L_0x22509f0 .functor NOT 1, L_0x22507e0, C4<0>, C4<0>, C4<0>; +L_0x2250ae0 .functor AND 1, L_0x22509f0, L_0x2250940, C4<1>, C4<1>; +L_0x2250be0 .functor AND 1, L_0x2250f60, L_0x2251000, C4<1>, C4<1>; +L_0x2250d60 .functor AND 1, L_0x2250be0, L_0x224ea00, C4<1>, C4<1>; +L_0x2250dc0 .functor OR 1, L_0x2250ae0, L_0x2250d60, C4<0>, C4<0>; +v0x2211690_0 .net "a", 0 0, L_0x2250f60; 1 drivers +v0x2211750_0 .net "ab", 0 0, L_0x224c220; 1 drivers +v0x22117f0_0 .net "acarryin", 0 0, L_0x224c280; 1 drivers +v0x2211890_0 .net "andall", 0 0, L_0x2250d60; 1 drivers +v0x2211910_0 .net "andsingleintermediate", 0 0, L_0x2250be0; 1 drivers +v0x22119b0_0 .net "andsumintermediate", 0 0, L_0x2250ae0; 1 drivers +v0x2211a50_0 .net "b", 0 0, L_0x2251000; 1 drivers +v0x2211af0_0 .net "bcarryin", 0 0, L_0x2250580; 1 drivers +v0x2211b90_0 .alias "carryin", 0 0, v0x222b9d0_0; +v0x2211c30_0 .alias "carryout", 0 0, v0x2212a90_0; +v0x2211cb0_0 .net "invcarryout", 0 0, L_0x22509f0; 1 drivers +v0x2211d30_0 .net "orall", 0 0, L_0x2250940; 1 drivers +v0x2211dd0_0 .net "orpairintermediate", 0 0, L_0x222bd90; 1 drivers +v0x2211e70_0 .net "orsingleintermediate", 0 0, L_0x22508e0; 1 drivers +v0x2211f90_0 .net "sum", 0 0, L_0x2250dc0; 1 drivers +S_0x2210b10 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x220f440; + .timescale 0 0; +L_0x224c2e0 .functor AND 1, L_0x2251c00, L_0x2251cf0, C4<1>, C4<1>; +L_0x22510a0 .functor AND 1, L_0x2251c00, L_0x22507e0, C4<1>, C4<1>; +L_0x2251150 .functor AND 1, L_0x2251cf0, L_0x22507e0, C4<1>, C4<1>; +L_0x2251200 .functor OR 1, L_0x224c2e0, L_0x22510a0, C4<0>, C4<0>; +L_0x2251300 .functor OR 1, L_0x2251200, L_0x2251150, C4<0>, C4<0>; +L_0x2251400 .functor OR 1, L_0x2251c00, L_0x2251cf0, C4<0>, C4<0>; +L_0x2251460 .functor OR 1, L_0x2251400, L_0x22507e0, C4<0>, C4<0>; +L_0x2251510 .functor NOT 1, L_0x2251300, C4<0>, C4<0>, C4<0>; +L_0x2251600 .functor AND 1, L_0x2251510, L_0x2251460, C4<1>, C4<1>; +L_0x2251700 .functor AND 1, L_0x2251c00, L_0x2251cf0, C4<1>, C4<1>; +L_0x22518e0 .functor AND 1, L_0x2251700, L_0x22507e0, C4<1>, C4<1>; +L_0x2250a50 .functor OR 1, L_0x2251600, L_0x22518e0, C4<0>, C4<0>; +v0x2210c00_0 .net "a", 0 0, L_0x2251c00; 1 drivers +v0x2210cc0_0 .net "ab", 0 0, L_0x224c2e0; 1 drivers +v0x2210d60_0 .net "acarryin", 0 0, L_0x22510a0; 1 drivers +v0x2210e00_0 .net "andall", 0 0, L_0x22518e0; 1 drivers +v0x2210e80_0 .net "andsingleintermediate", 0 0, L_0x2251700; 1 drivers +v0x2210f20_0 .net "andsumintermediate", 0 0, L_0x2251600; 1 drivers +v0x2210fc0_0 .net "b", 0 0, L_0x2251cf0; 1 drivers +v0x2211060_0 .net "bcarryin", 0 0, L_0x2251150; 1 drivers +v0x2211100_0 .alias "carryin", 0 0, v0x2212a90_0; +v0x22111a0_0 .alias "carryout", 0 0, v0x2212c60_0; +v0x2211220_0 .net "invcarryout", 0 0, L_0x2251510; 1 drivers +v0x22112a0_0 .net "orall", 0 0, L_0x2251460; 1 drivers +v0x2211340_0 .net "orpairintermediate", 0 0, L_0x2251200; 1 drivers +v0x22113e0_0 .net "orsingleintermediate", 0 0, L_0x2251400; 1 drivers +v0x2211500_0 .net "sum", 0 0, L_0x2250a50; 1 drivers +S_0x2210030 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x220f440; + .timescale 0 0; +L_0x2251880 .functor AND 1, L_0x22528f0, L_0x22529e0, C4<1>, C4<1>; +L_0x2251de0 .functor AND 1, L_0x22528f0, L_0x2251300, C4<1>, C4<1>; +L_0x2251e90 .functor AND 1, L_0x22529e0, L_0x2251300, C4<1>, C4<1>; +L_0x2251f40 .functor OR 1, L_0x2251880, L_0x2251de0, C4<0>, C4<0>; +L_0x2252040 .functor OR 1, L_0x2251f40, L_0x2251e90, C4<0>, C4<0>; +L_0x2252140 .functor OR 1, L_0x22528f0, L_0x22529e0, C4<0>, C4<0>; +L_0x22521a0 .functor OR 1, L_0x2252140, L_0x2251300, C4<0>, C4<0>; +L_0x2252250 .functor NOT 1, L_0x2252040, C4<0>, C4<0>, C4<0>; +L_0x2252340 .functor AND 1, L_0x2252250, L_0x22521a0, C4<1>, C4<1>; +L_0x2252440 .functor AND 1, L_0x22528f0, L_0x22529e0, C4<1>, C4<1>; +L_0x2252620 .functor AND 1, L_0x2252440, L_0x2251300, C4<1>, C4<1>; +L_0x2251570 .functor OR 1, L_0x2252340, L_0x2252620, C4<0>, C4<0>; +v0x2210120_0 .net "a", 0 0, L_0x22528f0; 1 drivers +v0x22101e0_0 .net "ab", 0 0, L_0x2251880; 1 drivers +v0x2210280_0 .net "acarryin", 0 0, L_0x2251de0; 1 drivers +v0x2210320_0 .net "andall", 0 0, L_0x2252620; 1 drivers +v0x22103a0_0 .net "andsingleintermediate", 0 0, L_0x2252440; 1 drivers +v0x2210440_0 .net "andsumintermediate", 0 0, L_0x2252340; 1 drivers +v0x22104e0_0 .net "b", 0 0, L_0x22529e0; 1 drivers +v0x2210580_0 .net "bcarryin", 0 0, L_0x2251e90; 1 drivers +v0x2210670_0 .alias "carryin", 0 0, v0x2212c60_0; +v0x2210710_0 .alias "carryout", 0 0, v0x2212d90_0; +v0x2210790_0 .net "invcarryout", 0 0, L_0x2252250; 1 drivers +v0x2210810_0 .net "orall", 0 0, L_0x22521a0; 1 drivers +v0x22108b0_0 .net "orpairintermediate", 0 0, L_0x2251f40; 1 drivers +v0x2210950_0 .net "orsingleintermediate", 0 0, L_0x2252140; 1 drivers +v0x2210a70_0 .net "sum", 0 0, L_0x2251570; 1 drivers +S_0x220f530 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x220f440; + .timescale 0 0; +L_0x22525c0 .functor AND 1, L_0x2253590, L_0x22536c0, C4<1>, C4<1>; +L_0x2252a80 .functor AND 1, L_0x2253590, L_0x2252040, C4<1>, C4<1>; +L_0x2252b30 .functor AND 1, L_0x22536c0, L_0x2252040, C4<1>, C4<1>; +L_0x2252be0 .functor OR 1, L_0x22525c0, L_0x2252a80, C4<0>, C4<0>; +L_0x2252ce0 .functor OR 1, L_0x2252be0, L_0x2252b30, C4<0>, C4<0>; +L_0x2252de0 .functor OR 1, L_0x2253590, L_0x22536c0, C4<0>, C4<0>; +L_0x2252e40 .functor OR 1, L_0x2252de0, L_0x2252040, C4<0>, C4<0>; +L_0x2252ef0 .functor NOT 1, L_0x2252ce0, C4<0>, C4<0>, C4<0>; +L_0x2252fa0 .functor AND 1, L_0x2252ef0, L_0x2252e40, C4<1>, C4<1>; +L_0x22530a0 .functor AND 1, L_0x2253590, L_0x22536c0, C4<1>, C4<1>; +L_0x2253280 .functor AND 1, L_0x22530a0, L_0x2252040, C4<1>, C4<1>; +L_0x22522b0 .functor OR 1, L_0x2252fa0, L_0x2253280, C4<0>, C4<0>; +v0x220f620_0 .net "a", 0 0, L_0x2253590; 1 drivers +v0x220f6e0_0 .net "ab", 0 0, L_0x22525c0; 1 drivers +v0x220f780_0 .net "acarryin", 0 0, L_0x2252a80; 1 drivers +v0x220f820_0 .net "andall", 0 0, L_0x2253280; 1 drivers +v0x220f8a0_0 .net "andsingleintermediate", 0 0, L_0x22530a0; 1 drivers +v0x220f940_0 .net "andsumintermediate", 0 0, L_0x2252fa0; 1 drivers +v0x220f9e0_0 .net "b", 0 0, L_0x22536c0; 1 drivers +v0x220fa80_0 .net "bcarryin", 0 0, L_0x2252b30; 1 drivers +v0x220fb70_0 .alias "carryin", 0 0, v0x2212d90_0; +v0x220fc10_0 .alias "carryout", 0 0, v0x222be20_0; +v0x220fc90_0 .net "invcarryout", 0 0, L_0x2252ef0; 1 drivers +v0x220fd30_0 .net "orall", 0 0, L_0x2252e40; 1 drivers +v0x220fdd0_0 .net "orpairintermediate", 0 0, L_0x2252be0; 1 drivers +v0x220fe70_0 .net "orsingleintermediate", 0 0, L_0x2252de0; 1 drivers +v0x220ff90_0 .net "sum", 0 0, L_0x22522b0; 1 drivers +S_0x220b930 .scope module, "adder5" "FullAdder4bit" 7 242, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x2257510 .functor AND 1, L_0x2257b50, L_0x2257bf0, C4<1>, C4<1>; +L_0x2257c90 .functor NOR 1, L_0x2257cf0, L_0x2257d90, C4<0>, C4<0>; +L_0x2257f10 .functor AND 1, L_0x2257f70, L_0x2258060, C4<1>, C4<1>; +L_0x2257e80 .functor NOR 1, L_0x22581f0, L_0x22583f0, C4<0>, C4<0>; +L_0x2258150 .functor OR 1, L_0x2257510, L_0x2257c90, C4<0>, C4<0>; +L_0x22585e0 .functor NOR 1, L_0x2257f10, L_0x2257e80, C4<0>, C4<0>; +L_0x22586e0 .functor AND 1, L_0x2258150, L_0x22585e0, C4<1>, C4<1>; +v0x220e520_0 .net *"_s25", 0 0, L_0x2257b50; 1 drivers +v0x220e5e0_0 .net *"_s27", 0 0, L_0x2257bf0; 1 drivers +v0x220e680_0 .net *"_s29", 0 0, L_0x2257cf0; 1 drivers +v0x220e720_0 .net *"_s31", 0 0, L_0x2257d90; 1 drivers +v0x220e7a0_0 .net *"_s33", 0 0, L_0x2257f70; 1 drivers +v0x220e840_0 .net *"_s35", 0 0, L_0x2258060; 1 drivers +v0x220e8e0_0 .net *"_s37", 0 0, L_0x22581f0; 1 drivers +v0x220e980_0 .net *"_s39", 0 0, L_0x22583f0; 1 drivers +v0x220ea20_0 .net "a", 3 0, L_0x2254680; 1 drivers +v0x220eac0_0 .net "aandb", 0 0, L_0x2257510; 1 drivers +v0x220eb60_0 .net "abandnoror", 0 0, L_0x2258150; 1 drivers +v0x220ec00_0 .net "anorb", 0 0, L_0x2257c90; 1 drivers +v0x220eca0_0 .net "b", 3 0, L_0x2254720; 1 drivers +v0x220ed40_0 .net "bandsum", 0 0, L_0x2257f10; 1 drivers +v0x220ee60_0 .net "bnorsum", 0 0, L_0x2257e80; 1 drivers +v0x220ef00_0 .net "bsumandnornor", 0 0, L_0x22585e0; 1 drivers +v0x220edc0_0 .alias "carryin", 0 0, v0x222be20_0; +v0x220f030_0 .alias "carryout", 0 0, v0x222bf30_0; +v0x220ef80_0 .net "carryout1", 0 0, L_0x2254ac0; 1 drivers +v0x220f150_0 .net "carryout2", 0 0, L_0x22555f0; 1 drivers +v0x220f280_0 .net "carryout3", 0 0, L_0x2256330; 1 drivers +v0x220f300_0 .alias "overflow", 0 0, v0x2228be0_0; +v0x220f1d0_0 .net8 "sum", 3 0, RS_0x7ff1c0ed0358; 4 drivers +L_0x2255160 .part/pv L_0x2255100, 0, 1, 4; +L_0x2255250 .part L_0x2254680, 0, 1; +L_0x22552f0 .part L_0x2254720, 0, 1; +L_0x2255db0 .part/pv L_0x2254d30, 1, 1, 4; +L_0x2255ef0 .part L_0x2254680, 1, 1; +L_0x2255fe0 .part L_0x2254720, 1, 1; +L_0x2256af0 .part/pv L_0x2255860, 2, 1, 4; +L_0x2256be0 .part L_0x2254680, 2, 1; +L_0x2256cd0 .part L_0x2254720, 2, 1; +L_0x2257750 .part/pv L_0x22565a0, 3, 1, 4; +L_0x2257880 .part L_0x2254680, 3, 1; +L_0x22579b0 .part L_0x2254720, 3, 1; +L_0x2257b50 .part L_0x2254680, 3, 1; +L_0x2257bf0 .part L_0x2254720, 3, 1; +L_0x2257cf0 .part L_0x2254680, 3, 1; +L_0x2257d90 .part L_0x2254720, 3, 1; +L_0x2257f70 .part L_0x2254720, 3, 1; +L_0x2258060 .part RS_0x7ff1c0ed0358, 3, 1; +L_0x22581f0 .part L_0x2254720, 3, 1; +L_0x22583f0 .part RS_0x7ff1c0ed0358, 3, 1; +S_0x220da90 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x220b930; + .timescale 0 0; +L_0x22503a0 .functor AND 1, L_0x2255250, L_0x22552f0, C4<1>, C4<1>; +L_0x2250400 .functor AND 1, L_0x2255250, L_0x2252ce0, C4<1>, C4<1>; +L_0x22504b0 .functor AND 1, L_0x22552f0, L_0x2252ce0, C4<1>, C4<1>; +L_0x222bea0 .functor OR 1, L_0x22503a0, L_0x2250400, C4<0>, C4<0>; +L_0x2254ac0 .functor OR 1, L_0x222bea0, L_0x22504b0, C4<0>, C4<0>; +L_0x2254bc0 .functor OR 1, L_0x2255250, L_0x22552f0, C4<0>, C4<0>; +L_0x2254c20 .functor OR 1, L_0x2254bc0, L_0x2252ce0, C4<0>, C4<0>; +L_0x2254cd0 .functor NOT 1, L_0x2254ac0, C4<0>, C4<0>, C4<0>; +L_0x2254dc0 .functor AND 1, L_0x2254cd0, L_0x2254c20, C4<1>, C4<1>; +L_0x2254ec0 .functor AND 1, L_0x2255250, L_0x22552f0, C4<1>, C4<1>; +L_0x22550a0 .functor AND 1, L_0x2254ec0, L_0x2252ce0, C4<1>, C4<1>; +L_0x2255100 .functor OR 1, L_0x2254dc0, L_0x22550a0, C4<0>, C4<0>; +v0x220db80_0 .net "a", 0 0, L_0x2255250; 1 drivers +v0x220dc40_0 .net "ab", 0 0, L_0x22503a0; 1 drivers +v0x220dce0_0 .net "acarryin", 0 0, L_0x2250400; 1 drivers +v0x220dd80_0 .net "andall", 0 0, L_0x22550a0; 1 drivers +v0x220de00_0 .net "andsingleintermediate", 0 0, L_0x2254ec0; 1 drivers +v0x220dea0_0 .net "andsumintermediate", 0 0, L_0x2254dc0; 1 drivers +v0x220df40_0 .net "b", 0 0, L_0x22552f0; 1 drivers +v0x220dfe0_0 .net "bcarryin", 0 0, L_0x22504b0; 1 drivers +v0x220e080_0 .alias "carryin", 0 0, v0x222be20_0; +v0x220e120_0 .alias "carryout", 0 0, v0x220ef80_0; +v0x220e1a0_0 .net "invcarryout", 0 0, L_0x2254cd0; 1 drivers +v0x220e220_0 .net "orall", 0 0, L_0x2254c20; 1 drivers +v0x220e2c0_0 .net "orpairintermediate", 0 0, L_0x222bea0; 1 drivers +v0x220e360_0 .net "orsingleintermediate", 0 0, L_0x2254bc0; 1 drivers +v0x220e480_0 .net "sum", 0 0, L_0x2255100; 1 drivers +S_0x220d000 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x220b930; + .timescale 0 0; +L_0x2255040 .functor AND 1, L_0x2255ef0, L_0x2255fe0, C4<1>, C4<1>; +L_0x2255390 .functor AND 1, L_0x2255ef0, L_0x2254ac0, C4<1>, C4<1>; +L_0x2255440 .functor AND 1, L_0x2255fe0, L_0x2254ac0, C4<1>, C4<1>; +L_0x22554f0 .functor OR 1, L_0x2255040, L_0x2255390, C4<0>, C4<0>; +L_0x22555f0 .functor OR 1, L_0x22554f0, L_0x2255440, C4<0>, C4<0>; +L_0x22556f0 .functor OR 1, L_0x2255ef0, L_0x2255fe0, C4<0>, C4<0>; +L_0x2255750 .functor OR 1, L_0x22556f0, L_0x2254ac0, C4<0>, C4<0>; +L_0x2255800 .functor NOT 1, L_0x22555f0, C4<0>, C4<0>, C4<0>; +L_0x22558f0 .functor AND 1, L_0x2255800, L_0x2255750, C4<1>, C4<1>; +L_0x22559f0 .functor AND 1, L_0x2255ef0, L_0x2255fe0, C4<1>, C4<1>; +L_0x2255bd0 .functor AND 1, L_0x22559f0, L_0x2254ac0, C4<1>, C4<1>; +L_0x2254d30 .functor OR 1, L_0x22558f0, L_0x2255bd0, C4<0>, C4<0>; +v0x220d0f0_0 .net "a", 0 0, L_0x2255ef0; 1 drivers +v0x220d1b0_0 .net "ab", 0 0, L_0x2255040; 1 drivers +v0x220d250_0 .net "acarryin", 0 0, L_0x2255390; 1 drivers +v0x220d2f0_0 .net "andall", 0 0, L_0x2255bd0; 1 drivers +v0x220d370_0 .net "andsingleintermediate", 0 0, L_0x22559f0; 1 drivers +v0x220d410_0 .net "andsumintermediate", 0 0, L_0x22558f0; 1 drivers +v0x220d4b0_0 .net "b", 0 0, L_0x2255fe0; 1 drivers +v0x220d550_0 .net "bcarryin", 0 0, L_0x2255440; 1 drivers +v0x220d5f0_0 .alias "carryin", 0 0, v0x220ef80_0; +v0x220d690_0 .alias "carryout", 0 0, v0x220f150_0; +v0x220d710_0 .net "invcarryout", 0 0, L_0x2255800; 1 drivers +v0x220d790_0 .net "orall", 0 0, L_0x2255750; 1 drivers +v0x220d830_0 .net "orpairintermediate", 0 0, L_0x22554f0; 1 drivers +v0x220d8d0_0 .net "orsingleintermediate", 0 0, L_0x22556f0; 1 drivers +v0x220d9f0_0 .net "sum", 0 0, L_0x2254d30; 1 drivers +S_0x220c520 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x220b930; + .timescale 0 0; +L_0x2255b70 .functor AND 1, L_0x2256be0, L_0x2256cd0, C4<1>, C4<1>; +L_0x22560d0 .functor AND 1, L_0x2256be0, L_0x22555f0, C4<1>, C4<1>; +L_0x2256180 .functor AND 1, L_0x2256cd0, L_0x22555f0, C4<1>, C4<1>; +L_0x2256230 .functor OR 1, L_0x2255b70, L_0x22560d0, C4<0>, C4<0>; +L_0x2256330 .functor OR 1, L_0x2256230, L_0x2256180, C4<0>, C4<0>; +L_0x2256430 .functor OR 1, L_0x2256be0, L_0x2256cd0, C4<0>, C4<0>; +L_0x2256490 .functor OR 1, L_0x2256430, L_0x22555f0, C4<0>, C4<0>; +L_0x2256540 .functor NOT 1, L_0x2256330, C4<0>, C4<0>, C4<0>; +L_0x2256630 .functor AND 1, L_0x2256540, L_0x2256490, C4<1>, C4<1>; +L_0x2256730 .functor AND 1, L_0x2256be0, L_0x2256cd0, C4<1>, C4<1>; +L_0x2256910 .functor AND 1, L_0x2256730, L_0x22555f0, C4<1>, C4<1>; +L_0x2255860 .functor OR 1, L_0x2256630, L_0x2256910, C4<0>, C4<0>; +v0x220c610_0 .net "a", 0 0, L_0x2256be0; 1 drivers +v0x220c6d0_0 .net "ab", 0 0, L_0x2255b70; 1 drivers +v0x220c770_0 .net "acarryin", 0 0, L_0x22560d0; 1 drivers +v0x220c810_0 .net "andall", 0 0, L_0x2256910; 1 drivers +v0x220c890_0 .net "andsingleintermediate", 0 0, L_0x2256730; 1 drivers +v0x220c930_0 .net "andsumintermediate", 0 0, L_0x2256630; 1 drivers +v0x220c9d0_0 .net "b", 0 0, L_0x2256cd0; 1 drivers +v0x220ca70_0 .net "bcarryin", 0 0, L_0x2256180; 1 drivers +v0x220cb60_0 .alias "carryin", 0 0, v0x220f150_0; +v0x220cc00_0 .alias "carryout", 0 0, v0x220f280_0; +v0x220cc80_0 .net "invcarryout", 0 0, L_0x2256540; 1 drivers +v0x220cd00_0 .net "orall", 0 0, L_0x2256490; 1 drivers +v0x220cda0_0 .net "orpairintermediate", 0 0, L_0x2256230; 1 drivers +v0x220ce40_0 .net "orsingleintermediate", 0 0, L_0x2256430; 1 drivers +v0x220cf60_0 .net "sum", 0 0, L_0x2255860; 1 drivers +S_0x220ba20 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x220b930; + .timescale 0 0; +L_0x22568b0 .functor AND 1, L_0x2257880, L_0x22579b0, C4<1>, C4<1>; +L_0x2256d70 .functor AND 1, L_0x2257880, L_0x2256330, C4<1>, C4<1>; +L_0x2256e20 .functor AND 1, L_0x22579b0, L_0x2256330, C4<1>, C4<1>; +L_0x2256ed0 .functor OR 1, L_0x22568b0, L_0x2256d70, C4<0>, C4<0>; +L_0x2256fd0 .functor OR 1, L_0x2256ed0, L_0x2256e20, C4<0>, C4<0>; +L_0x22570d0 .functor OR 1, L_0x2257880, L_0x22579b0, C4<0>, C4<0>; +L_0x2257130 .functor OR 1, L_0x22570d0, L_0x2256330, C4<0>, C4<0>; +L_0x22571e0 .functor NOT 1, L_0x2256fd0, C4<0>, C4<0>, C4<0>; +L_0x2257290 .functor AND 1, L_0x22571e0, L_0x2257130, C4<1>, C4<1>; +L_0x2257390 .functor AND 1, L_0x2257880, L_0x22579b0, C4<1>, C4<1>; +L_0x2257570 .functor AND 1, L_0x2257390, L_0x2256330, C4<1>, C4<1>; +L_0x22565a0 .functor OR 1, L_0x2257290, L_0x2257570, C4<0>, C4<0>; +v0x220bb10_0 .net "a", 0 0, L_0x2257880; 1 drivers +v0x220bbd0_0 .net "ab", 0 0, L_0x22568b0; 1 drivers +v0x220bc70_0 .net "acarryin", 0 0, L_0x2256d70; 1 drivers +v0x220bd10_0 .net "andall", 0 0, L_0x2257570; 1 drivers +v0x220bd90_0 .net "andsingleintermediate", 0 0, L_0x2257390; 1 drivers +v0x220be30_0 .net "andsumintermediate", 0 0, L_0x2257290; 1 drivers +v0x220bed0_0 .net "b", 0 0, L_0x22579b0; 1 drivers +v0x220bf70_0 .net "bcarryin", 0 0, L_0x2256e20; 1 drivers +v0x220c060_0 .alias "carryin", 0 0, v0x220f280_0; +v0x220c100_0 .alias "carryout", 0 0, v0x222bf30_0; +v0x220c180_0 .net "invcarryout", 0 0, L_0x22571e0; 1 drivers +v0x220c220_0 .net "orall", 0 0, L_0x2257130; 1 drivers +v0x220c2c0_0 .net "orpairintermediate", 0 0, L_0x2256ed0; 1 drivers +v0x220c360_0 .net "orsingleintermediate", 0 0, L_0x22570d0; 1 drivers +v0x220c480_0 .net "sum", 0 0, L_0x22565a0; 1 drivers +S_0x2207e20 .scope module, "adder6" "FullAdder4bit" 7 243, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x225b830 .functor AND 1, L_0x225be70, L_0x225bf10, C4<1>, C4<1>; +L_0x225bfb0 .functor NOR 1, L_0x225c010, L_0x225c0b0, C4<0>, C4<0>; +L_0x225c230 .functor AND 1, L_0x225c290, L_0x225c380, C4<1>, C4<1>; +L_0x225c1a0 .functor NOR 1, L_0x225c510, L_0x225c710, C4<0>, C4<0>; +L_0x225c470 .functor OR 1, L_0x225b830, L_0x225bfb0, C4<0>, C4<0>; +L_0x225c900 .functor NOR 1, L_0x225c230, L_0x225c1a0, C4<0>, C4<0>; +L_0x225ca00 .functor AND 1, L_0x225c470, L_0x225c900, C4<1>, C4<1>; +v0x220aa10_0 .net *"_s25", 0 0, L_0x225be70; 1 drivers +v0x220aad0_0 .net *"_s27", 0 0, L_0x225bf10; 1 drivers +v0x220ab70_0 .net *"_s29", 0 0, L_0x225c010; 1 drivers +v0x220ac10_0 .net *"_s31", 0 0, L_0x225c0b0; 1 drivers +v0x220ac90_0 .net *"_s33", 0 0, L_0x225c290; 1 drivers +v0x220ad30_0 .net *"_s35", 0 0, L_0x225c380; 1 drivers +v0x220add0_0 .net *"_s37", 0 0, L_0x225c510; 1 drivers +v0x220ae70_0 .net *"_s39", 0 0, L_0x225c710; 1 drivers +v0x220af10_0 .net "a", 3 0, L_0x225cd00; 1 drivers +v0x220afb0_0 .net "aandb", 0 0, L_0x225b830; 1 drivers +v0x220b050_0 .net "abandnoror", 0 0, L_0x225c470; 1 drivers +v0x220b0f0_0 .net "anorb", 0 0, L_0x225bfb0; 1 drivers +v0x220b190_0 .net "b", 3 0, L_0x222d370; 1 drivers +v0x220b230_0 .net "bandsum", 0 0, L_0x225c230; 1 drivers +v0x220b350_0 .net "bnorsum", 0 0, L_0x225c1a0; 1 drivers +v0x220b3f0_0 .net "bsumandnornor", 0 0, L_0x225c900; 1 drivers +v0x220b2b0_0 .alias "carryin", 0 0, v0x222bf30_0; +v0x220b520_0 .alias "carryout", 0 0, v0x222bba0_0; +v0x220b470_0 .net "carryout1", 0 0, L_0x2258de0; 1 drivers +v0x220b640_0 .net "carryout2", 0 0, L_0x2259910; 1 drivers +v0x220b770_0 .net "carryout3", 0 0, L_0x225a650; 1 drivers +v0x220b7f0_0 .alias "overflow", 0 0, v0x2228c60_0; +v0x220b6c0_0 .net8 "sum", 3 0, RS_0x7ff1c0ecf578; 4 drivers +L_0x2259480 .part/pv L_0x2259420, 0, 1, 4; +L_0x2259570 .part L_0x225cd00, 0, 1; +L_0x2259610 .part L_0x222d370, 0, 1; +L_0x225a0d0 .part/pv L_0x2259050, 1, 1, 4; +L_0x225a210 .part L_0x225cd00, 1, 1; +L_0x225a300 .part L_0x222d370, 1, 1; +L_0x225ae10 .part/pv L_0x2259b80, 2, 1, 4; +L_0x225af00 .part L_0x225cd00, 2, 1; +L_0x225aff0 .part L_0x222d370, 2, 1; +L_0x225ba70 .part/pv L_0x225a8c0, 3, 1, 4; +L_0x225bba0 .part L_0x225cd00, 3, 1; +L_0x225bcd0 .part L_0x222d370, 3, 1; +L_0x225be70 .part L_0x225cd00, 3, 1; +L_0x225bf10 .part L_0x222d370, 3, 1; +L_0x225c010 .part L_0x225cd00, 3, 1; +L_0x225c0b0 .part L_0x222d370, 3, 1; +L_0x225c290 .part L_0x222d370, 3, 1; +L_0x225c380 .part RS_0x7ff1c0ecf578, 3, 1; +L_0x225c510 .part L_0x222d370, 3, 1; +L_0x225c710 .part RS_0x7ff1c0ecf578, 3, 1; +S_0x2209f80 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2207e20; + .timescale 0 0; +L_0x22547c0 .functor AND 1, L_0x2259570, L_0x2259610, C4<1>, C4<1>; +L_0x2254820 .functor AND 1, L_0x2259570, L_0x2256fd0, C4<1>, C4<1>; +L_0x2258b80 .functor AND 1, L_0x2259610, L_0x2256fd0, C4<1>, C4<1>; +L_0x222bb10 .functor OR 1, L_0x22547c0, L_0x2254820, C4<0>, C4<0>; +L_0x2258de0 .functor OR 1, L_0x222bb10, L_0x2258b80, C4<0>, C4<0>; +L_0x2258ee0 .functor OR 1, L_0x2259570, L_0x2259610, C4<0>, C4<0>; +L_0x2258f40 .functor OR 1, L_0x2258ee0, L_0x2256fd0, C4<0>, C4<0>; +L_0x2258ff0 .functor NOT 1, L_0x2258de0, C4<0>, C4<0>, C4<0>; +L_0x22590e0 .functor AND 1, L_0x2258ff0, L_0x2258f40, C4<1>, C4<1>; +L_0x22591e0 .functor AND 1, L_0x2259570, L_0x2259610, C4<1>, C4<1>; +L_0x22593c0 .functor AND 1, L_0x22591e0, L_0x2256fd0, C4<1>, C4<1>; +L_0x2259420 .functor OR 1, L_0x22590e0, L_0x22593c0, C4<0>, C4<0>; +v0x220a070_0 .net "a", 0 0, L_0x2259570; 1 drivers +v0x220a130_0 .net "ab", 0 0, L_0x22547c0; 1 drivers +v0x220a1d0_0 .net "acarryin", 0 0, L_0x2254820; 1 drivers +v0x220a270_0 .net "andall", 0 0, L_0x22593c0; 1 drivers +v0x220a2f0_0 .net "andsingleintermediate", 0 0, L_0x22591e0; 1 drivers +v0x220a390_0 .net "andsumintermediate", 0 0, L_0x22590e0; 1 drivers +v0x220a430_0 .net "b", 0 0, L_0x2259610; 1 drivers +v0x220a4d0_0 .net "bcarryin", 0 0, L_0x2258b80; 1 drivers +v0x220a570_0 .alias "carryin", 0 0, v0x222bf30_0; +v0x220a610_0 .alias "carryout", 0 0, v0x220b470_0; +v0x220a690_0 .net "invcarryout", 0 0, L_0x2258ff0; 1 drivers +v0x220a710_0 .net "orall", 0 0, L_0x2258f40; 1 drivers +v0x220a7b0_0 .net "orpairintermediate", 0 0, L_0x222bb10; 1 drivers +v0x220a850_0 .net "orsingleintermediate", 0 0, L_0x2258ee0; 1 drivers +v0x220a970_0 .net "sum", 0 0, L_0x2259420; 1 drivers +S_0x22094f0 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2207e20; + .timescale 0 0; +L_0x2259360 .functor AND 1, L_0x225a210, L_0x225a300, C4<1>, C4<1>; +L_0x22596b0 .functor AND 1, L_0x225a210, L_0x2258de0, C4<1>, C4<1>; +L_0x2259760 .functor AND 1, L_0x225a300, L_0x2258de0, C4<1>, C4<1>; +L_0x2259810 .functor OR 1, L_0x2259360, L_0x22596b0, C4<0>, C4<0>; +L_0x2259910 .functor OR 1, L_0x2259810, L_0x2259760, C4<0>, C4<0>; +L_0x2259a10 .functor OR 1, L_0x225a210, L_0x225a300, C4<0>, C4<0>; +L_0x2259a70 .functor OR 1, L_0x2259a10, L_0x2258de0, C4<0>, C4<0>; +L_0x2259b20 .functor NOT 1, L_0x2259910, C4<0>, C4<0>, C4<0>; +L_0x2259c10 .functor AND 1, L_0x2259b20, L_0x2259a70, C4<1>, C4<1>; +L_0x2259d10 .functor AND 1, L_0x225a210, L_0x225a300, C4<1>, C4<1>; +L_0x2259ef0 .functor AND 1, L_0x2259d10, L_0x2258de0, C4<1>, C4<1>; +L_0x2259050 .functor OR 1, L_0x2259c10, L_0x2259ef0, C4<0>, C4<0>; +v0x22095e0_0 .net "a", 0 0, L_0x225a210; 1 drivers +v0x22096a0_0 .net "ab", 0 0, L_0x2259360; 1 drivers +v0x2209740_0 .net "acarryin", 0 0, L_0x22596b0; 1 drivers +v0x22097e0_0 .net "andall", 0 0, L_0x2259ef0; 1 drivers +v0x2209860_0 .net "andsingleintermediate", 0 0, L_0x2259d10; 1 drivers +v0x2209900_0 .net "andsumintermediate", 0 0, L_0x2259c10; 1 drivers +v0x22099a0_0 .net "b", 0 0, L_0x225a300; 1 drivers +v0x2209a40_0 .net "bcarryin", 0 0, L_0x2259760; 1 drivers +v0x2209ae0_0 .alias "carryin", 0 0, v0x220b470_0; +v0x2209b80_0 .alias "carryout", 0 0, v0x220b640_0; +v0x2209c00_0 .net "invcarryout", 0 0, L_0x2259b20; 1 drivers +v0x2209c80_0 .net "orall", 0 0, L_0x2259a70; 1 drivers +v0x2209d20_0 .net "orpairintermediate", 0 0, L_0x2259810; 1 drivers +v0x2209dc0_0 .net "orsingleintermediate", 0 0, L_0x2259a10; 1 drivers +v0x2209ee0_0 .net "sum", 0 0, L_0x2259050; 1 drivers +S_0x2208a10 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2207e20; + .timescale 0 0; +L_0x2259e90 .functor AND 1, L_0x225af00, L_0x225aff0, C4<1>, C4<1>; +L_0x225a3f0 .functor AND 1, L_0x225af00, L_0x2259910, C4<1>, C4<1>; +L_0x225a4a0 .functor AND 1, L_0x225aff0, L_0x2259910, C4<1>, C4<1>; +L_0x225a550 .functor OR 1, L_0x2259e90, L_0x225a3f0, C4<0>, C4<0>; +L_0x225a650 .functor OR 1, L_0x225a550, L_0x225a4a0, C4<0>, C4<0>; +L_0x225a750 .functor OR 1, L_0x225af00, L_0x225aff0, C4<0>, C4<0>; +L_0x225a7b0 .functor OR 1, L_0x225a750, L_0x2259910, C4<0>, C4<0>; +L_0x225a860 .functor NOT 1, L_0x225a650, C4<0>, C4<0>, C4<0>; +L_0x225a950 .functor AND 1, L_0x225a860, L_0x225a7b0, C4<1>, C4<1>; +L_0x225aa50 .functor AND 1, L_0x225af00, L_0x225aff0, C4<1>, C4<1>; +L_0x225ac30 .functor AND 1, L_0x225aa50, L_0x2259910, C4<1>, C4<1>; +L_0x2259b80 .functor OR 1, L_0x225a950, L_0x225ac30, C4<0>, C4<0>; +v0x2208b00_0 .net "a", 0 0, L_0x225af00; 1 drivers +v0x2208bc0_0 .net "ab", 0 0, L_0x2259e90; 1 drivers +v0x2208c60_0 .net "acarryin", 0 0, L_0x225a3f0; 1 drivers +v0x2208d00_0 .net "andall", 0 0, L_0x225ac30; 1 drivers +v0x2208d80_0 .net "andsingleintermediate", 0 0, L_0x225aa50; 1 drivers +v0x2208e20_0 .net "andsumintermediate", 0 0, L_0x225a950; 1 drivers +v0x2208ec0_0 .net "b", 0 0, L_0x225aff0; 1 drivers +v0x2208f60_0 .net "bcarryin", 0 0, L_0x225a4a0; 1 drivers +v0x2209050_0 .alias "carryin", 0 0, v0x220b640_0; +v0x22090f0_0 .alias "carryout", 0 0, v0x220b770_0; +v0x2209170_0 .net "invcarryout", 0 0, L_0x225a860; 1 drivers +v0x22091f0_0 .net "orall", 0 0, L_0x225a7b0; 1 drivers +v0x2209290_0 .net "orpairintermediate", 0 0, L_0x225a550; 1 drivers +v0x2209330_0 .net "orsingleintermediate", 0 0, L_0x225a750; 1 drivers +v0x2209450_0 .net "sum", 0 0, L_0x2259b80; 1 drivers +S_0x2207f10 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2207e20; + .timescale 0 0; +L_0x225abd0 .functor AND 1, L_0x225bba0, L_0x225bcd0, C4<1>, C4<1>; +L_0x225b090 .functor AND 1, L_0x225bba0, L_0x225a650, C4<1>, C4<1>; +L_0x225b140 .functor AND 1, L_0x225bcd0, L_0x225a650, C4<1>, C4<1>; +L_0x225b1f0 .functor OR 1, L_0x225abd0, L_0x225b090, C4<0>, C4<0>; +L_0x225b2f0 .functor OR 1, L_0x225b1f0, L_0x225b140, C4<0>, C4<0>; +L_0x225b3f0 .functor OR 1, L_0x225bba0, L_0x225bcd0, C4<0>, C4<0>; +L_0x225b450 .functor OR 1, L_0x225b3f0, L_0x225a650, C4<0>, C4<0>; +L_0x225b500 .functor NOT 1, L_0x225b2f0, C4<0>, C4<0>, C4<0>; +L_0x225b5b0 .functor AND 1, L_0x225b500, L_0x225b450, C4<1>, C4<1>; +L_0x225b6b0 .functor AND 1, L_0x225bba0, L_0x225bcd0, C4<1>, C4<1>; +L_0x225b890 .functor AND 1, L_0x225b6b0, L_0x225a650, C4<1>, C4<1>; +L_0x225a8c0 .functor OR 1, L_0x225b5b0, L_0x225b890, C4<0>, C4<0>; +v0x2208000_0 .net "a", 0 0, L_0x225bba0; 1 drivers +v0x22080a0_0 .net "ab", 0 0, L_0x225abd0; 1 drivers +v0x2208140_0 .net "acarryin", 0 0, L_0x225b090; 1 drivers +v0x22081e0_0 .net "andall", 0 0, L_0x225b890; 1 drivers +v0x2208280_0 .net "andsingleintermediate", 0 0, L_0x225b6b0; 1 drivers +v0x2208320_0 .net "andsumintermediate", 0 0, L_0x225b5b0; 1 drivers +v0x22083c0_0 .net "b", 0 0, L_0x225bcd0; 1 drivers +v0x2208460_0 .net "bcarryin", 0 0, L_0x225b140; 1 drivers +v0x2208550_0 .alias "carryin", 0 0, v0x220b770_0; +v0x22085f0_0 .alias "carryout", 0 0, v0x222bba0_0; +v0x2208670_0 .net "invcarryout", 0 0, L_0x225b500; 1 drivers +v0x2208710_0 .net "orall", 0 0, L_0x225b450; 1 drivers +v0x22087b0_0 .net "orpairintermediate", 0 0, L_0x225b1f0; 1 drivers +v0x2208850_0 .net "orsingleintermediate", 0 0, L_0x225b3f0; 1 drivers +v0x2208970_0 .net "sum", 0 0, L_0x225a8c0; 1 drivers +S_0x2204490 .scope module, "adder7" "FullAdder4bit" 7 244, 3 47, S_0x22043a0; + .timescale 0 0; +L_0x225fd00 .functor AND 1, L_0x2260340, L_0x22603e0, C4<1>, C4<1>; +L_0x2260480 .functor NOR 1, L_0x22604e0, L_0x2260580, C4<0>, C4<0>; +L_0x2260700 .functor AND 1, L_0x2260760, L_0x2260850, C4<1>, C4<1>; +L_0x2260670 .functor NOR 1, L_0x22609e0, L_0x2260be0, C4<0>, C4<0>; +L_0x2260940 .functor OR 1, L_0x225fd00, L_0x2260480, C4<0>, C4<0>; +L_0x2260dd0 .functor NOR 1, L_0x2260700, L_0x2260670, C4<0>, C4<0>; +L_0x2260ed0 .functor AND 1, L_0x2260940, L_0x2260dd0, C4<1>, C4<1>; +v0x2206f00_0 .net *"_s25", 0 0, L_0x2260340; 1 drivers +v0x2206fc0_0 .net *"_s27", 0 0, L_0x22603e0; 1 drivers +v0x2207060_0 .net *"_s29", 0 0, L_0x22604e0; 1 drivers +v0x2207100_0 .net *"_s31", 0 0, L_0x2260580; 1 drivers +v0x2207180_0 .net *"_s33", 0 0, L_0x2260760; 1 drivers +v0x2207220_0 .net *"_s35", 0 0, L_0x2260850; 1 drivers +v0x22072c0_0 .net *"_s37", 0 0, L_0x22609e0; 1 drivers +v0x2207360_0 .net *"_s39", 0 0, L_0x2260be0; 1 drivers +v0x2207400_0 .net "a", 3 0, L_0x225cfb0; 1 drivers +v0x22074a0_0 .net "aandb", 0 0, L_0x225fd00; 1 drivers +v0x2207540_0 .net "abandnoror", 0 0, L_0x2260940; 1 drivers +v0x22075e0_0 .net "anorb", 0 0, L_0x2260480; 1 drivers +v0x2207680_0 .net "b", 3 0, L_0x225d050; 1 drivers +v0x2207720_0 .net "bandsum", 0 0, L_0x2260700; 1 drivers +v0x2207840_0 .net "bnorsum", 0 0, L_0x2260670; 1 drivers +v0x22078e0_0 .net "bsumandnornor", 0 0, L_0x2260dd0; 1 drivers +v0x22077a0_0 .alias "carryin", 0 0, v0x222bba0_0; +v0x2207a10_0 .alias "carryout", 0 0, v0x222c610_0; +v0x2207960_0 .net "carryout1", 0 0, L_0x225d270; 1 drivers +v0x2207b30_0 .net "carryout2", 0 0, L_0x225dda0; 1 drivers +v0x2207c60_0 .net "carryout3", 0 0, L_0x225eae0; 1 drivers +v0x2207ce0_0 .alias "overflow", 0 0, v0x222c690_0; +v0x2207bb0_0 .net8 "sum", 3 0, RS_0x7ff1c0ece798; 4 drivers +L_0x225d910 .part/pv L_0x225d8b0, 0, 1, 4; +L_0x225da00 .part L_0x225cfb0, 0, 1; +L_0x225daa0 .part L_0x225d050, 0, 1; +L_0x225e560 .part/pv L_0x225d4e0, 1, 1, 4; +L_0x225e6a0 .part L_0x225cfb0, 1, 1; +L_0x225e790 .part L_0x225d050, 1, 1; +L_0x225f2a0 .part/pv L_0x225e010, 2, 1, 4; +L_0x225f390 .part L_0x225cfb0, 2, 1; +L_0x225f480 .part L_0x225d050, 2, 1; +L_0x225ff40 .part/pv L_0x225ed50, 3, 1, 4; +L_0x2260070 .part L_0x225cfb0, 3, 1; +L_0x22601a0 .part L_0x225d050, 3, 1; +L_0x2260340 .part L_0x225cfb0, 3, 1; +L_0x22603e0 .part L_0x225d050, 3, 1; +L_0x22604e0 .part L_0x225cfb0, 3, 1; +L_0x2260580 .part L_0x225d050, 3, 1; +L_0x2260760 .part L_0x225d050, 3, 1; +L_0x2260850 .part RS_0x7ff1c0ece798, 3, 1; +L_0x22609e0 .part L_0x225d050, 3, 1; +L_0x2260be0 .part RS_0x7ff1c0ece798, 3, 1; +S_0x2206470 .scope module, "adder1" "structuralFullAdder" 3 65, 3 15, S_0x2204490; + .timescale 0 0; +L_0x222d410 .functor AND 1, L_0x225da00, L_0x225daa0, C4<1>, C4<1>; +L_0x224bfb0 .functor AND 1, L_0x225da00, L_0x225b2f0, C4<1>, C4<1>; +L_0x2258920 .functor AND 1, L_0x225daa0, L_0x225b2f0, C4<1>, C4<1>; +L_0x222bc20 .functor OR 1, L_0x222d410, L_0x224bfb0, C4<0>, C4<0>; +L_0x225d270 .functor OR 1, L_0x222bc20, L_0x2258920, C4<0>, C4<0>; +L_0x225d370 .functor OR 1, L_0x225da00, L_0x225daa0, C4<0>, C4<0>; +L_0x225d3d0 .functor OR 1, L_0x225d370, L_0x225b2f0, C4<0>, C4<0>; +L_0x225d480 .functor NOT 1, L_0x225d270, C4<0>, C4<0>, C4<0>; +L_0x225d570 .functor AND 1, L_0x225d480, L_0x225d3d0, C4<1>, C4<1>; +L_0x225d670 .functor AND 1, L_0x225da00, L_0x225daa0, C4<1>, C4<1>; +L_0x225d850 .functor AND 1, L_0x225d670, L_0x225b2f0, C4<1>, C4<1>; +L_0x225d8b0 .functor OR 1, L_0x225d570, L_0x225d850, C4<0>, C4<0>; +v0x2206560_0 .net "a", 0 0, L_0x225da00; 1 drivers +v0x2206620_0 .net "ab", 0 0, L_0x222d410; 1 drivers +v0x22066c0_0 .net "acarryin", 0 0, L_0x224bfb0; 1 drivers +v0x2206760_0 .net "andall", 0 0, L_0x225d850; 1 drivers +v0x22067e0_0 .net "andsingleintermediate", 0 0, L_0x225d670; 1 drivers +v0x2206880_0 .net "andsumintermediate", 0 0, L_0x225d570; 1 drivers +v0x2206920_0 .net "b", 0 0, L_0x225daa0; 1 drivers +v0x22069c0_0 .net "bcarryin", 0 0, L_0x2258920; 1 drivers +v0x2206a60_0 .alias "carryin", 0 0, v0x222bba0_0; +v0x2206b00_0 .alias "carryout", 0 0, v0x2207960_0; +v0x2206b80_0 .net "invcarryout", 0 0, L_0x225d480; 1 drivers +v0x2206c00_0 .net "orall", 0 0, L_0x225d3d0; 1 drivers +v0x2206ca0_0 .net "orpairintermediate", 0 0, L_0x222bc20; 1 drivers +v0x2206d40_0 .net "orsingleintermediate", 0 0, L_0x225d370; 1 drivers +v0x2206e60_0 .net "sum", 0 0, L_0x225d8b0; 1 drivers +S_0x22059e0 .scope module, "adder2" "structuralFullAdder" 3 66, 3 15, S_0x2204490; + .timescale 0 0; +L_0x225d7f0 .functor AND 1, L_0x225e6a0, L_0x225e790, C4<1>, C4<1>; +L_0x225db40 .functor AND 1, L_0x225e6a0, L_0x225d270, C4<1>, C4<1>; +L_0x225dbf0 .functor AND 1, L_0x225e790, L_0x225d270, C4<1>, C4<1>; +L_0x225dca0 .functor OR 1, L_0x225d7f0, L_0x225db40, C4<0>, C4<0>; +L_0x225dda0 .functor OR 1, L_0x225dca0, L_0x225dbf0, C4<0>, C4<0>; +L_0x225dea0 .functor OR 1, L_0x225e6a0, L_0x225e790, C4<0>, C4<0>; +L_0x225df00 .functor OR 1, L_0x225dea0, L_0x225d270, C4<0>, C4<0>; +L_0x225dfb0 .functor NOT 1, L_0x225dda0, C4<0>, C4<0>, C4<0>; +L_0x225e0a0 .functor AND 1, L_0x225dfb0, L_0x225df00, C4<1>, C4<1>; +L_0x225e1a0 .functor AND 1, L_0x225e6a0, L_0x225e790, C4<1>, C4<1>; +L_0x225e380 .functor AND 1, L_0x225e1a0, L_0x225d270, C4<1>, C4<1>; +L_0x225d4e0 .functor OR 1, L_0x225e0a0, L_0x225e380, C4<0>, C4<0>; +v0x2205ad0_0 .net "a", 0 0, L_0x225e6a0; 1 drivers +v0x2205b90_0 .net "ab", 0 0, L_0x225d7f0; 1 drivers +v0x2205c30_0 .net "acarryin", 0 0, L_0x225db40; 1 drivers +v0x2205cd0_0 .net "andall", 0 0, L_0x225e380; 1 drivers +v0x2205d50_0 .net "andsingleintermediate", 0 0, L_0x225e1a0; 1 drivers +v0x2205df0_0 .net "andsumintermediate", 0 0, L_0x225e0a0; 1 drivers +v0x2205e90_0 .net "b", 0 0, L_0x225e790; 1 drivers +v0x2205f30_0 .net "bcarryin", 0 0, L_0x225dbf0; 1 drivers +v0x2205fd0_0 .alias "carryin", 0 0, v0x2207960_0; +v0x2206070_0 .alias "carryout", 0 0, v0x2207b30_0; +v0x22060f0_0 .net "invcarryout", 0 0, L_0x225dfb0; 1 drivers +v0x2206170_0 .net "orall", 0 0, L_0x225df00; 1 drivers +v0x2206210_0 .net "orpairintermediate", 0 0, L_0x225dca0; 1 drivers +v0x22062b0_0 .net "orsingleintermediate", 0 0, L_0x225dea0; 1 drivers +v0x22063d0_0 .net "sum", 0 0, L_0x225d4e0; 1 drivers +S_0x2204f30 .scope module, "adder3" "structuralFullAdder" 3 67, 3 15, S_0x2204490; + .timescale 0 0; +L_0x225e320 .functor AND 1, L_0x225f390, L_0x225f480, C4<1>, C4<1>; +L_0x225e880 .functor AND 1, L_0x225f390, L_0x225dda0, C4<1>, C4<1>; +L_0x225e930 .functor AND 1, L_0x225f480, L_0x225dda0, C4<1>, C4<1>; +L_0x225e9e0 .functor OR 1, L_0x225e320, L_0x225e880, C4<0>, C4<0>; +L_0x225eae0 .functor OR 1, L_0x225e9e0, L_0x225e930, C4<0>, C4<0>; +L_0x225ebe0 .functor OR 1, L_0x225f390, L_0x225f480, C4<0>, C4<0>; +L_0x225ec40 .functor OR 1, L_0x225ebe0, L_0x225dda0, C4<0>, C4<0>; +L_0x225ecf0 .functor NOT 1, L_0x225eae0, C4<0>, C4<0>, C4<0>; +L_0x225ede0 .functor AND 1, L_0x225ecf0, L_0x225ec40, C4<1>, C4<1>; +L_0x225eee0 .functor AND 1, L_0x225f390, L_0x225f480, C4<1>, C4<1>; +L_0x225f0c0 .functor AND 1, L_0x225eee0, L_0x225dda0, C4<1>, C4<1>; +L_0x225e010 .functor OR 1, L_0x225ede0, L_0x225f0c0, C4<0>, C4<0>; +v0x2205020_0 .net "a", 0 0, L_0x225f390; 1 drivers +v0x22050e0_0 .net "ab", 0 0, L_0x225e320; 1 drivers +v0x2205180_0 .net "acarryin", 0 0, L_0x225e880; 1 drivers +v0x2205220_0 .net "andall", 0 0, L_0x225f0c0; 1 drivers +v0x22052a0_0 .net "andsingleintermediate", 0 0, L_0x225eee0; 1 drivers +v0x2205340_0 .net "andsumintermediate", 0 0, L_0x225ede0; 1 drivers +v0x22053e0_0 .net "b", 0 0, L_0x225f480; 1 drivers +v0x2205480_0 .net "bcarryin", 0 0, L_0x225e930; 1 drivers +v0x2205520_0 .alias "carryin", 0 0, v0x2207b30_0; +v0x22055c0_0 .alias "carryout", 0 0, v0x2207c60_0; +v0x2205640_0 .net "invcarryout", 0 0, L_0x225ecf0; 1 drivers +v0x22056e0_0 .net "orall", 0 0, L_0x225ec40; 1 drivers +v0x2205780_0 .net "orpairintermediate", 0 0, L_0x225e9e0; 1 drivers +v0x2205820_0 .net "orsingleintermediate", 0 0, L_0x225ebe0; 1 drivers +v0x2205940_0 .net "sum", 0 0, L_0x225e010; 1 drivers +S_0x2204580 .scope module, "adder4" "structuralFullAdder" 3 68, 3 15, S_0x2204490; + .timescale 0 0; +L_0x225f060 .functor AND 1, L_0x2260070, L_0x22601a0, C4<1>, C4<1>; +L_0x225f520 .functor AND 1, L_0x2260070, L_0x225eae0, C4<1>, C4<1>; +L_0x225f5d0 .functor AND 1, L_0x22601a0, L_0x225eae0, C4<1>, C4<1>; +L_0x225f680 .functor OR 1, L_0x225f060, L_0x225f520, C4<0>, C4<0>; +L_0x225f780 .functor OR 1, L_0x225f680, L_0x225f5d0, C4<0>, C4<0>; +L_0x225f8c0 .functor OR 1, L_0x2260070, L_0x22601a0, C4<0>, C4<0>; +L_0x225f920 .functor OR 1, L_0x225f8c0, L_0x225eae0, C4<0>, C4<0>; +L_0x225f9d0 .functor NOT 1, L_0x225f780, C4<0>, C4<0>, C4<0>; +L_0x225fa80 .functor AND 1, L_0x225f9d0, L_0x225f920, C4<1>, C4<1>; +L_0x225fb80 .functor AND 1, L_0x2260070, L_0x22601a0, C4<1>, C4<1>; +L_0x225fd60 .functor AND 1, L_0x225fb80, L_0x225eae0, C4<1>, C4<1>; +L_0x225ed50 .functor OR 1, L_0x225fa80, L_0x225fd60, C4<0>, C4<0>; +v0x2204670_0 .net "a", 0 0, L_0x2260070; 1 drivers +v0x22046f0_0 .net "ab", 0 0, L_0x225f060; 1 drivers +v0x2204770_0 .net "acarryin", 0 0, L_0x225f520; 1 drivers +v0x22047f0_0 .net "andall", 0 0, L_0x225fd60; 1 drivers +v0x2204870_0 .net "andsingleintermediate", 0 0, L_0x225fb80; 1 drivers +v0x22048f0_0 .net "andsumintermediate", 0 0, L_0x225fa80; 1 drivers +v0x2204970_0 .net "b", 0 0, L_0x22601a0; 1 drivers +v0x22049f0_0 .net "bcarryin", 0 0, L_0x225f5d0; 1 drivers +v0x2204a70_0 .alias "carryin", 0 0, v0x2207c60_0; +v0x2204af0_0 .alias "carryout", 0 0, v0x222c610_0; +v0x2204b90_0 .net "invcarryout", 0 0, L_0x225f9d0; 1 drivers +v0x2204c30_0 .net "orall", 0 0, L_0x225f920; 1 drivers +v0x2204cd0_0 .net "orpairintermediate", 0 0, L_0x225f680; 1 drivers +v0x2204d70_0 .net "orsingleintermediate", 0 0, L_0x225f8c0; 1 drivers +v0x2204e90_0 .net "sum", 0 0, L_0x225ed50; 1 drivers +S_0x2200420 .scope module, "xor0" "xor_32bit" 6 35, 8 1, S_0x21e14f0; + .timescale 0 0; +L_0x225d1e0 .functor XOR 1, L_0x22613a0, L_0x2261490, C4<0>, C4<0>; +L_0x2261620 .functor XOR 1, L_0x22616d0, L_0x22617c0, C4<0>, C4<0>; +L_0x22619e0 .functor XOR 1, L_0x2261a40, L_0x2261b80, C4<0>, C4<0>; +L_0x2261d70 .functor XOR 1, L_0x2261dd0, L_0x2261ec0, C4<0>, C4<0>; +L_0x2261d10 .functor XOR 1, L_0x22620a0, L_0x2262190, C4<0>, C4<0>; +L_0x22623b0 .functor XOR 1, L_0x2262460, L_0x2262550, C4<0>, C4<0>; +L_0x2262320 .functor XOR 1, L_0x2262890, L_0x2262640, C4<0>, C4<0>; +L_0x2262980 .functor XOR 1, L_0x2262c30, L_0x2262d20, C4<0>, C4<0>; +L_0x2262ee0 .functor XOR 1, L_0x2260290, L_0x2262e10, C4<0>, C4<0>; +L_0x2242c30 .functor XOR 1, L_0x2263200, L_0x22632a0, C4<0>, C4<0>; +L_0x2263490 .functor XOR 1, L_0x22634f0, L_0x2263390, C4<0>, C4<0>; +L_0x22635e0 .functor XOR 1, L_0x22638b0, L_0x2263950, C4<0>, C4<0>; +L_0x2263830 .functor XOR 1, L_0x2263bc0, L_0x2263a40, C4<0>, C4<0>; +L_0x2263cb0 .functor XOR 1, L_0x2263fe0, L_0x22640d0, C4<0>, C4<0>; +L_0x2263f30 .functor XOR 1, L_0x2262780, L_0x225cf10, C4<0>, C4<0>; +L_0x2264260 .functor XOR 1, L_0x225cda0, L_0x2264ac0, C4<0>, C4<0>; +L_0x22649e0 .functor XOR 1, L_0x2264cf0, L_0x2264b60, C4<0>, C4<0>; +L_0x2264f90 .functor XOR 1, L_0x22650e0, L_0x2265180, C4<0>, C4<0>; +L_0x2264e80 .functor XOR 1, L_0x2265430, L_0x2265270, C4<0>, C4<0>; +L_0x22656b0 .functor XOR 1, L_0x2265040, L_0x2265860, C4<0>, C4<0>; +L_0x2265570 .functor XOR 1, L_0x2265b40, L_0x2265950, C4<0>, C4<0>; +L_0x2265ae0 .functor XOR 1, L_0x2265760, L_0x2265f50, C4<0>, C4<0>; +L_0x2265c80 .functor XOR 1, L_0x2265d30, L_0x2266040, C4<0>, C4<0>; +L_0x22661d0 .functor XOR 1, L_0x2265e40, L_0x2266660, C4<0>, C4<0>; +L_0x2266350 .functor XOR 1, L_0x2266400, L_0x22669b0, C4<0>, C4<0>; +L_0x2266750 .functor XOR 1, L_0x22668e0, L_0x2266db0, C4<0>, C4<0>; +L_0x2266be0 .functor XOR 1, L_0x2266c90, L_0x22670e0, C4<0>, C4<0>; +L_0x2266e50 .functor XOR 1, L_0x2266800, L_0x2267040, C4<0>, C4<0>; +L_0x2267310 .functor XOR 1, L_0x22673c0, L_0x2267820, C4<0>, C4<0>; +L_0x2267560 .functor XOR 1, L_0x2266f00, L_0x2267710, C4<0>, C4<0>; +L_0x21e0ac0 .functor XOR 1, L_0x2264370, L_0x2264460, C4<0>, C4<0>; +L_0x2267a50 .functor XOR 1, L_0x2267610, L_0x22683f0, C4<0>, C4<0>; +v0x22001c0_0 .net *"_s0", 0 0, L_0x225d1e0; 1 drivers +v0x2200510_0 .net *"_s101", 0 0, L_0x2264b60; 1 drivers +v0x2200590_0 .net *"_s102", 0 0, L_0x2264f90; 1 drivers +v0x2200610_0 .net *"_s105", 0 0, L_0x22650e0; 1 drivers +v0x2200690_0 .net *"_s107", 0 0, L_0x2265180; 1 drivers +v0x2200710_0 .net *"_s108", 0 0, L_0x2264e80; 1 drivers +v0x2200790_0 .net *"_s11", 0 0, L_0x22617c0; 1 drivers +v0x2200810_0 .net *"_s111", 0 0, L_0x2265430; 1 drivers +v0x22008e0_0 .net *"_s113", 0 0, L_0x2265270; 1 drivers +v0x2200960_0 .net *"_s114", 0 0, L_0x22656b0; 1 drivers +v0x2200a40_0 .net *"_s117", 0 0, L_0x2265040; 1 drivers +v0x2200ac0_0 .net *"_s119", 0 0, L_0x2265860; 1 drivers +v0x2200bb0_0 .net *"_s12", 0 0, L_0x22619e0; 1 drivers +v0x2200c30_0 .net *"_s120", 0 0, L_0x2265570; 1 drivers +v0x2200d30_0 .net *"_s123", 0 0, L_0x2265b40; 1 drivers +v0x2200db0_0 .net *"_s125", 0 0, L_0x2265950; 1 drivers +v0x2200cb0_0 .net *"_s126", 0 0, L_0x2265ae0; 1 drivers +v0x2200ec0_0 .net *"_s129", 0 0, L_0x2265760; 1 drivers +v0x2200e30_0 .net *"_s131", 0 0, L_0x2265f50; 1 drivers +v0x2200fe0_0 .net *"_s132", 0 0, L_0x2265c80; 1 drivers +v0x2200f40_0 .net *"_s135", 0 0, L_0x2265d30; 1 drivers +v0x2201110_0 .net *"_s137", 0 0, L_0x2266040; 1 drivers +v0x2201060_0 .net *"_s138", 0 0, L_0x22661d0; 1 drivers +v0x2201250_0 .net *"_s141", 0 0, L_0x2265e40; 1 drivers +v0x2201190_0 .net *"_s143", 0 0, L_0x2266660; 1 drivers +v0x22013a0_0 .net *"_s144", 0 0, L_0x2266350; 1 drivers +v0x22012d0_0 .net *"_s147", 0 0, L_0x2266400; 1 drivers +v0x2201500_0 .net *"_s149", 0 0, L_0x22669b0; 1 drivers +v0x2201420_0 .net *"_s15", 0 0, L_0x2261a40; 1 drivers +v0x2201670_0 .net *"_s150", 0 0, L_0x2266750; 1 drivers +v0x2201580_0 .net *"_s153", 0 0, L_0x22668e0; 1 drivers +v0x22017f0_0 .net *"_s155", 0 0, L_0x2266db0; 1 drivers +v0x22016f0_0 .net *"_s156", 0 0, L_0x2266be0; 1 drivers +v0x2201980_0 .net *"_s159", 0 0, L_0x2266c90; 1 drivers +v0x2201870_0 .net *"_s161", 0 0, L_0x22670e0; 1 drivers +v0x2201b20_0 .net *"_s162", 0 0, L_0x2266e50; 1 drivers +v0x2201a00_0 .net *"_s165", 0 0, L_0x2266800; 1 drivers +v0x2201aa0_0 .net *"_s167", 0 0, L_0x2267040; 1 drivers +v0x2201ce0_0 .net *"_s168", 0 0, L_0x2267310; 1 drivers +v0x2201d60_0 .net *"_s17", 0 0, L_0x2261b80; 1 drivers +v0x2201ba0_0 .net *"_s171", 0 0, L_0x22673c0; 1 drivers +v0x2201c40_0 .net *"_s173", 0 0, L_0x2267820; 1 drivers +v0x2201f40_0 .net *"_s174", 0 0, L_0x2267560; 1 drivers +v0x2201fc0_0 .net *"_s177", 0 0, L_0x2266f00; 1 drivers +v0x2201de0_0 .net *"_s179", 0 0, L_0x2267710; 1 drivers +v0x2201e60_0 .net *"_s18", 0 0, L_0x2261d70; 1 drivers +v0x22021c0_0 .net *"_s180", 0 0, L_0x21e0ac0; 1 drivers +v0x2202240_0 .net *"_s183", 0 0, L_0x2264370; 1 drivers +v0x2202040_0 .net *"_s185", 0 0, L_0x2264460; 1 drivers +v0x22020e0_0 .net *"_s186", 0 0, L_0x2267a50; 1 drivers +v0x2202460_0 .net *"_s189", 0 0, L_0x2267610; 1 drivers +v0x22024e0_0 .net *"_s191", 0 0, L_0x22683f0; 1 drivers +v0x22022c0_0 .net *"_s21", 0 0, L_0x2261dd0; 1 drivers +v0x2202360_0 .net *"_s23", 0 0, L_0x2261ec0; 1 drivers +v0x2202720_0 .net *"_s24", 0 0, L_0x2261d10; 1 drivers +v0x22027a0_0 .net *"_s27", 0 0, L_0x22620a0; 1 drivers +v0x2202560_0 .net *"_s29", 0 0, L_0x2262190; 1 drivers +v0x2202600_0 .net *"_s3", 0 0, L_0x22613a0; 1 drivers +v0x22026a0_0 .net *"_s30", 0 0, L_0x22623b0; 1 drivers +v0x2202a00_0 .net *"_s33", 0 0, L_0x2262460; 1 drivers +v0x2202820_0 .net *"_s35", 0 0, L_0x2262550; 1 drivers +v0x22028c0_0 .net *"_s36", 0 0, L_0x2262320; 1 drivers +v0x2202960_0 .net *"_s39", 0 0, L_0x2262890; 1 drivers +v0x2202c80_0 .net *"_s41", 0 0, L_0x2262640; 1 drivers +v0x2202a80_0 .net *"_s42", 0 0, L_0x2262980; 1 drivers +v0x2202b00_0 .net *"_s45", 0 0, L_0x2262c30; 1 drivers +v0x2202ba0_0 .net *"_s47", 0 0, L_0x2262d20; 1 drivers +v0x2202f20_0 .net *"_s48", 0 0, L_0x2262ee0; 1 drivers +v0x2202d00_0 .net *"_s5", 0 0, L_0x2261490; 1 drivers +v0x2202d80_0 .net *"_s51", 0 0, L_0x2260290; 1 drivers +v0x2202e20_0 .net *"_s53", 0 0, L_0x2262e10; 1 drivers +v0x22031e0_0 .net *"_s54", 0 0, L_0x2242c30; 1 drivers +v0x2202fa0_0 .net *"_s57", 0 0, L_0x2263200; 1 drivers +v0x2203040_0 .net *"_s59", 0 0, L_0x22632a0; 1 drivers +v0x22030e0_0 .net *"_s6", 0 0, L_0x2261620; 1 drivers +v0x22034c0_0 .net *"_s60", 0 0, L_0x2263490; 1 drivers +v0x2203260_0 .net *"_s63", 0 0, L_0x22634f0; 1 drivers +v0x2203300_0 .net *"_s65", 0 0, L_0x2263390; 1 drivers +v0x22033a0_0 .net *"_s66", 0 0, L_0x22635e0; 1 drivers +v0x2203440_0 .net *"_s69", 0 0, L_0x22638b0; 1 drivers +v0x22037d0_0 .net *"_s71", 0 0, L_0x2263950; 1 drivers +v0x2203850_0 .net *"_s72", 0 0, L_0x2263830; 1 drivers +v0x2203540_0 .net *"_s75", 0 0, L_0x2263bc0; 1 drivers +v0x22035e0_0 .net *"_s77", 0 0, L_0x2263a40; 1 drivers +v0x2203680_0 .net *"_s78", 0 0, L_0x2263cb0; 1 drivers +v0x2203720_0 .net *"_s81", 0 0, L_0x2263fe0; 1 drivers +v0x2203b90_0 .net *"_s83", 0 0, L_0x22640d0; 1 drivers +v0x2203c10_0 .net *"_s84", 0 0, L_0x2263f30; 1 drivers +v0x22038d0_0 .net *"_s87", 0 0, L_0x2262780; 1 drivers +v0x2203950_0 .net *"_s89", 0 0, L_0x225cf10; 1 drivers +v0x22039f0_0 .net *"_s9", 0 0, L_0x22616d0; 1 drivers +v0x2203a90_0 .net *"_s90", 0 0, L_0x2264260; 1 drivers +v0x2203f80_0 .net *"_s93", 0 0, L_0x225cda0; 1 drivers +v0x2204000_0 .net *"_s95", 0 0, L_0x2264ac0; 1 drivers +v0x2203c90_0 .net *"_s96", 0 0, L_0x22649e0; 1 drivers +v0x2203d10_0 .net *"_s99", 0 0, L_0x2264cf0; 1 drivers +v0x2203db0_0 .alias "a", 31 0, v0x222d2f0_0; +v0x2203e30_0 .alias "b", 31 0, v0x222d4b0_0; +v0x2203eb0_0 .alias "out", 31 0, v0x222cdb0_0; +L_0x225d0f0 .part/pv L_0x225d1e0, 0, 1, 32; +L_0x22613a0 .part v0x222dfb0_0, 0, 1; +L_0x2261490 .part v0x222d190_0, 0, 1; +L_0x2261580 .part/pv L_0x2261620, 1, 1, 32; +L_0x22616d0 .part v0x222dfb0_0, 1, 1; +L_0x22617c0 .part v0x222d190_0, 1, 1; +L_0x22618b0 .part/pv L_0x22619e0, 2, 1, 32; +L_0x2261a40 .part v0x222dfb0_0, 2, 1; +L_0x2261b80 .part v0x222d190_0, 2, 1; +L_0x2261c70 .part/pv L_0x2261d70, 3, 1, 32; +L_0x2261dd0 .part v0x222dfb0_0, 3, 1; +L_0x2261ec0 .part v0x222d190_0, 3, 1; +L_0x2261fb0 .part/pv L_0x2261d10, 4, 1, 32; +L_0x22620a0 .part v0x222dfb0_0, 4, 1; +L_0x2262190 .part v0x222d190_0, 4, 1; +L_0x2262280 .part/pv L_0x22623b0, 5, 1, 32; +L_0x2262460 .part v0x222dfb0_0, 5, 1; +L_0x2262550 .part v0x222d190_0, 5, 1; +L_0x22626e0 .part/pv L_0x2262320, 6, 1, 32; +L_0x2262890 .part v0x222dfb0_0, 6, 1; +L_0x2262640 .part v0x222d190_0, 6, 1; +L_0x2262a80 .part/pv L_0x2262980, 7, 1, 32; +L_0x2262c30 .part v0x222dfb0_0, 7, 1; +L_0x2262d20 .part v0x222d190_0, 7, 1; +L_0x2262b20 .part/pv L_0x2262ee0, 8, 1, 32; +L_0x2260290 .part v0x222dfb0_0, 8, 1; +L_0x2262e10 .part v0x222d190_0, 8, 1; +L_0x2263070 .part/pv L_0x2242c30, 9, 1, 32; +L_0x2263200 .part v0x222dfb0_0, 9, 1; +L_0x22632a0 .part v0x222d190_0, 9, 1; +L_0x2263110 .part/pv L_0x2263490, 10, 1, 32; +L_0x22634f0 .part v0x222dfb0_0, 10, 1; +L_0x2263390 .part v0x222d190_0, 10, 1; +L_0x22636f0 .part/pv L_0x22635e0, 11, 1, 32; +L_0x22638b0 .part v0x222dfb0_0, 11, 1; +L_0x2263950 .part v0x222d190_0, 11, 1; +L_0x2263790 .part/pv L_0x2263830, 12, 1, 32; +L_0x2263bc0 .part v0x222dfb0_0, 12, 1; +L_0x2263a40 .part v0x222d190_0, 12, 1; +L_0x2263df0 .part/pv L_0x2263cb0, 13, 1, 32; +L_0x2263fe0 .part v0x222dfb0_0, 13, 1; +L_0x22640d0 .part v0x222d190_0, 13, 1; +L_0x2263e90 .part/pv L_0x2263f30, 14, 1, 32; +L_0x2262780 .part v0x222dfb0_0, 14, 1; +L_0x225cf10 .part v0x222d190_0, 14, 1; +L_0x22641c0 .part/pv L_0x2264260, 15, 1, 32; +L_0x225cda0 .part v0x222dfb0_0, 15, 1; +L_0x2264ac0 .part v0x222d190_0, 15, 1; +L_0x2264940 .part/pv L_0x22649e0, 16, 1, 32; +L_0x2264cf0 .part v0x222dfb0_0, 16, 1; +L_0x2264b60 .part v0x222d190_0, 16, 1; +L_0x2264c50 .part/pv L_0x2264f90, 17, 1, 32; +L_0x22650e0 .part v0x222dfb0_0, 17, 1; +L_0x2265180 .part v0x222d190_0, 17, 1; +L_0x2264de0 .part/pv L_0x2264e80, 18, 1, 32; +L_0x2265430 .part v0x222dfb0_0, 18, 1; +L_0x2265270 .part v0x222d190_0, 18, 1; +L_0x2265360 .part/pv L_0x22656b0, 19, 1, 32; +L_0x2265040 .part v0x222dfb0_0, 19, 1; +L_0x2265860 .part v0x222d190_0, 19, 1; +L_0x22654d0 .part/pv L_0x2265570, 20, 1, 32; +L_0x2265b40 .part v0x222dfb0_0, 20, 1; +L_0x2265950 .part v0x222d190_0, 20, 1; +L_0x2265a40 .part/pv L_0x2265ae0, 21, 1, 32; +L_0x2265760 .part v0x222dfb0_0, 21, 1; +L_0x2265f50 .part v0x222d190_0, 21, 1; +L_0x2265be0 .part/pv L_0x2265c80, 22, 1, 32; +L_0x2265d30 .part v0x222dfb0_0, 22, 1; +L_0x2266040 .part v0x222d190_0, 22, 1; +L_0x2266130 .part/pv L_0x22661d0, 23, 1, 32; +L_0x2265e40 .part v0x222dfb0_0, 23, 1; +L_0x2266660 .part v0x222d190_0, 23, 1; +L_0x22662b0 .part/pv L_0x2266350, 24, 1, 32; +L_0x2266400 .part v0x222dfb0_0, 24, 1; +L_0x22669b0 .part v0x222d190_0, 24, 1; +L_0x2266aa0 .part/pv L_0x2266750, 25, 1, 32; +L_0x22668e0 .part v0x222dfb0_0, 25, 1; +L_0x2266db0 .part v0x222d190_0, 25, 1; +L_0x2266b40 .part/pv L_0x2266be0, 26, 1, 32; +L_0x2266c90 .part v0x222dfb0_0, 26, 1; +L_0x22670e0 .part v0x222d190_0, 26, 1; +L_0x22671d0 .part/pv L_0x2266e50, 27, 1, 32; +L_0x2266800 .part v0x222dfb0_0, 27, 1; +L_0x2267040 .part v0x222d190_0, 27, 1; +L_0x2267270 .part/pv L_0x2267310, 28, 1, 32; +L_0x22673c0 .part v0x222dfb0_0, 28, 1; +L_0x2267820 .part v0x222d190_0, 28, 1; +L_0x22678c0 .part/pv L_0x2267560, 29, 1, 32; +L_0x2266f00 .part v0x222dfb0_0, 29, 1; +L_0x2267710 .part v0x222d190_0, 29, 1; +L_0x2267c40 .part/pv L_0x21e0ac0, 30, 1, 32; +L_0x2264370 .part v0x222dfb0_0, 30, 1; +L_0x2264460 .part v0x222d190_0, 30, 1; +L_0x22679b0 .part/pv L_0x2267a50, 31, 1, 32; +L_0x2267610 .part v0x222dfb0_0, 31, 1; +L_0x22683f0 .part v0x222d190_0, 31, 1; +S_0x21f2050 .scope module, "slt0" "full_slt_32bit" 6 36, 9 37, S_0x21e14f0; + .timescale 0 0; +v0x21fe670_0 .alias "a", 31 0, v0x222d2f0_0; +v0x21fe7a0_0 .alias "b", 31 0, v0x222d4b0_0; +v0x21fe8b0_0 .alias "out", 31 0, v0x222cc80_0; +v0x21fe950_0 .net "slt0", 0 0, L_0x2268360; 1 drivers +v0x21fea00_0 .net "slt1", 0 0, L_0x2268d70; 1 drivers +v0x21fea80_0 .net "slt10", 0 0, L_0x226beb0; 1 drivers +v0x21feb50_0 .net "slt11", 0 0, L_0x226c400; 1 drivers +v0x21fec20_0 .net "slt12", 0 0, L_0x226c950; 1 drivers +v0x21fed40_0 .net "slt13", 0 0, L_0x226ceb0; 1 drivers +v0x21fee10_0 .net "slt14", 0 0, L_0x226d420; 1 drivers +v0x21fee90_0 .net "slt15", 0 0, L_0x22647f0; 1 drivers +v0x21fef60_0 .net "slt16", 0 0, L_0x226e210; 1 drivers +v0x21ff030_0 .net "slt17", 0 0, L_0x226e760; 1 drivers +v0x21ff100_0 .net "slt18", 0 0, L_0x226ecc0; 1 drivers +v0x21ff250_0 .net "slt19", 0 0, L_0x226f230; 1 drivers +v0x21ff320_0 .net "slt2", 0 0, L_0x22692b0; 1 drivers +v0x21ff180_0 .net "slt20", 0 0, L_0x226f7b0; 1 drivers +v0x21ff4d0_0 .net "slt21", 0 0, L_0x226fd40; 1 drivers +v0x21ff5f0_0 .net "slt22", 0 0, L_0x2236840; 1 drivers +v0x21ff6c0_0 .net "slt23", 0 0, L_0x2271020; 1 drivers +v0x21ff7f0_0 .net "slt24", 0 0, L_0x2271590; 1 drivers +v0x21ff870_0 .net "slt25", 0 0, L_0x2271b10; 1 drivers +v0x21ff9b0_0 .net "slt26", 0 0, L_0x22720a0; 1 drivers +v0x21ffa30_0 .net "slt27", 0 0, L_0x21ff790; 1 drivers +v0x21ffb80_0 .net "slt28", 0 0, L_0x2272b30; 1 drivers +v0x21ffc00_0 .net "slt29", 0 0, L_0x2273090; 1 drivers +v0x21ffb00_0 .net "slt3", 0 0, L_0x22697f0; 1 drivers +v0x21ffdb0_0 .net "slt30", 0 0, L_0x2273600; 1 drivers +v0x21ffcd0_0 .net "slt4", 0 0, L_0x2269d80; 1 drivers +v0x21fff70_0 .net "slt5", 0 0, L_0x226a2d0; 1 drivers +v0x21ffe30_0 .net "slt6", 0 0, L_0x21e0dd0; 1 drivers +v0x22000f0_0 .net "slt7", 0 0, L_0x226add0; 1 drivers +v0x21ffff0_0 .net "slt8", 0 0, L_0x226b3a0; 1 drivers +v0x2200280_0 .net "slt9", 0 0, L_0x226b920; 1 drivers +L_0x2268890 .part v0x222dfb0_0, 0, 1; +L_0x2268980 .part v0x222d190_0, 0, 1; +L_0x2268e20 .part v0x222dfb0_0, 1, 1; +L_0x2268f10 .part v0x222d190_0, 1, 1; +L_0x2269360 .part v0x222dfb0_0, 2, 1; +L_0x2269450 .part v0x222d190_0, 2, 1; +L_0x22698a0 .part v0x222dfb0_0, 3, 1; +L_0x2269990 .part v0x222d190_0, 3, 1; +L_0x2269e30 .part v0x222dfb0_0, 4, 1; +L_0x2269f20 .part v0x222d190_0, 4, 1; +L_0x226a380 .part v0x222dfb0_0, 5, 1; +L_0x226a470 .part v0x222d190_0, 5, 1; +L_0x226a8c0 .part v0x222dfb0_0, 6, 1; +L_0x226a9b0 .part v0x222d190_0, 6, 1; +L_0x226ae80 .part v0x222dfb0_0, 7, 1; +L_0x226af70 .part v0x222d190_0, 7, 1; +L_0x226b450 .part v0x222dfb0_0, 8, 1; +L_0x226b540 .part v0x222d190_0, 8, 1; +L_0x226b9d0 .part v0x222dfb0_0, 9, 1; +L_0x226bac0 .part v0x222d190_0, 9, 1; +L_0x226bf60 .part v0x222dfb0_0, 10, 1; +L_0x226c050 .part v0x222d190_0, 10, 1; +L_0x226c4b0 .part v0x222dfb0_0, 11, 1; +L_0x226c5a0 .part v0x222d190_0, 11, 1; +L_0x226ca00 .part v0x222dfb0_0, 12, 1; +L_0x226caf0 .part v0x222d190_0, 12, 1; +L_0x226cf60 .part v0x222dfb0_0, 13, 1; +L_0x226d050 .part v0x222d190_0, 13, 1; +L_0x226d4d0 .part v0x222dfb0_0, 14, 1; +L_0x2264500 .part v0x222d190_0, 14, 1; +L_0x22648a0 .part v0x222dfb0_0, 15, 1; +L_0x226de20 .part v0x222d190_0, 15, 1; +L_0x226e2c0 .part v0x222dfb0_0, 16, 1; +L_0x226e3b0 .part v0x222d190_0, 16, 1; +L_0x226e810 .part v0x222dfb0_0, 17, 1; +L_0x226e900 .part v0x222d190_0, 17, 1; +L_0x226ed70 .part v0x222dfb0_0, 18, 1; +L_0x226ee60 .part v0x222d190_0, 18, 1; +L_0x226f2e0 .part v0x222dfb0_0, 19, 1; +L_0x226f3d0 .part v0x222d190_0, 19, 1; +L_0x226f860 .part v0x222dfb0_0, 20, 1; +L_0x226f950 .part v0x222d190_0, 20, 1; +L_0x226fdf0 .part v0x222dfb0_0, 21, 1; +L_0x226fee0 .part v0x222d190_0, 21, 1; +L_0x22368f0 .part v0x222dfb0_0, 22, 1; +L_0x22369e0 .part v0x222d190_0, 22, 1; +L_0x22710d0 .part v0x222dfb0_0, 23, 1; +L_0x22711c0 .part v0x222d190_0, 23, 1; +L_0x2271640 .part v0x222dfb0_0, 24, 1; +L_0x2271730 .part v0x222d190_0, 24, 1; +L_0x2271bc0 .part v0x222dfb0_0, 25, 1; +L_0x2271cb0 .part v0x222d190_0, 25, 1; +L_0x2272150 .part v0x222dfb0_0, 26, 1; +L_0x2272240 .part v0x222d190_0, 26, 1; +L_0x2272690 .part v0x222dfb0_0, 27, 1; +L_0x2272780 .part v0x222d190_0, 27, 1; +L_0x2272be0 .part v0x222dfb0_0, 28, 1; +L_0x2272cd0 .part v0x222d190_0, 28, 1; +L_0x2273140 .part v0x222dfb0_0, 29, 1; +L_0x2273230 .part v0x222d190_0, 29, 1; +L_0x22736b0 .part v0x222dfb0_0, 30, 1; +L_0x22737a0 .part v0x222d190_0, 30, 1; +L_0x2273c30 .part/pv L_0x2273b80, 0, 1, 32; +L_0x2273d70 .part v0x222dfb0_0, 31, 1; +L_0x2273840 .part v0x222d190_0, 31, 1; +S_0x21fe040 .scope module, "bit0" "single_slt" 9 74, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x22680f0 .functor XOR 1, L_0x2268890, L_0x2268980, C4<0>, C4<0>; +L_0x2268150 .functor AND 1, L_0x2268980, L_0x22680f0, C4<1>, C4<1>; +L_0x2268250 .functor NOT 1, L_0x22680f0, C4<0>, C4<0>, C4<0>; +L_0x22682b0 .functor AND 1, L_0x2268250, C4<0>, C4<1>, C4<1>; +L_0x2268360 .functor OR 1, L_0x2268150, L_0x22682b0, C4<0>, C4<0>; +v0x21fe130_0 .net "a", 0 0, L_0x2268890; 1 drivers +v0x21fe1f0_0 .net "abxor", 0 0, L_0x22680f0; 1 drivers +v0x21fe290_0 .net "b", 0 0, L_0x2268980; 1 drivers +v0x21fe330_0 .net "bxorand", 0 0, L_0x2268150; 1 drivers +v0x21fe3e0_0 .net "defaultCompare", 0 0, C4<0>; 1 drivers +v0x21fe480_0 .alias "out", 0 0, v0x21fe950_0; +v0x21fe500_0 .net "xornot", 0 0, L_0x2268250; 1 drivers +v0x21fe580_0 .net "xornotand", 0 0, L_0x22682b0; 1 drivers +S_0x21fda10 .scope module, "bit1" "single_slt" 9 75, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2268a70 .functor XOR 1, L_0x2268e20, L_0x2268f10, C4<0>, C4<0>; +L_0x2268ad0 .functor AND 1, L_0x2268f10, L_0x2268a70, C4<1>, C4<1>; +L_0x2268bd0 .functor NOT 1, L_0x2268a70, C4<0>, C4<0>, C4<0>; +L_0x2268c30 .functor AND 1, L_0x2268bd0, L_0x2268360, C4<1>, C4<1>; +L_0x2268d70 .functor OR 1, L_0x2268ad0, L_0x2268c30, C4<0>, C4<0>; +v0x21fdb00_0 .net "a", 0 0, L_0x2268e20; 1 drivers +v0x21fdbc0_0 .net "abxor", 0 0, L_0x2268a70; 1 drivers +v0x21fdc60_0 .net "b", 0 0, L_0x2268f10; 1 drivers +v0x21fdd00_0 .net "bxorand", 0 0, L_0x2268ad0; 1 drivers +v0x21fddb0_0 .alias "defaultCompare", 0 0, v0x21fe950_0; +v0x21fde50_0 .alias "out", 0 0, v0x21fea00_0; +v0x21fded0_0 .net "xornot", 0 0, L_0x2268bd0; 1 drivers +v0x21fdf50_0 .net "xornotand", 0 0, L_0x2268c30; 1 drivers +S_0x21fd3e0 .scope module, "bit2" "single_slt" 9 76, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2268fb0 .functor XOR 1, L_0x2269360, L_0x2269450, C4<0>, C4<0>; +L_0x2269010 .functor AND 1, L_0x2269450, L_0x2268fb0, C4<1>, C4<1>; +L_0x2269110 .functor NOT 1, L_0x2268fb0, C4<0>, C4<0>, C4<0>; +L_0x2269170 .functor AND 1, L_0x2269110, L_0x2268d70, C4<1>, C4<1>; +L_0x22692b0 .functor OR 1, L_0x2269010, L_0x2269170, C4<0>, C4<0>; +v0x21fd4d0_0 .net "a", 0 0, L_0x2269360; 1 drivers +v0x21fd590_0 .net "abxor", 0 0, L_0x2268fb0; 1 drivers +v0x21fd630_0 .net "b", 0 0, L_0x2269450; 1 drivers +v0x21fd6d0_0 .net "bxorand", 0 0, L_0x2269010; 1 drivers +v0x21fd780_0 .alias "defaultCompare", 0 0, v0x21fea00_0; +v0x21fd820_0 .alias "out", 0 0, v0x21ff320_0; +v0x21fd8a0_0 .net "xornot", 0 0, L_0x2269110; 1 drivers +v0x21fd920_0 .net "xornotand", 0 0, L_0x2269170; 1 drivers +S_0x21fcdb0 .scope module, "bit3" "single_slt" 9 77, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x22694f0 .functor XOR 1, L_0x22698a0, L_0x2269990, C4<0>, C4<0>; +L_0x2269550 .functor AND 1, L_0x2269990, L_0x22694f0, C4<1>, C4<1>; +L_0x2269650 .functor NOT 1, L_0x22694f0, C4<0>, C4<0>, C4<0>; +L_0x22696b0 .functor AND 1, L_0x2269650, L_0x22692b0, C4<1>, C4<1>; +L_0x22697f0 .functor OR 1, L_0x2269550, L_0x22696b0, C4<0>, C4<0>; +v0x21fcea0_0 .net "a", 0 0, L_0x22698a0; 1 drivers +v0x21fcf60_0 .net "abxor", 0 0, L_0x22694f0; 1 drivers +v0x21fd000_0 .net "b", 0 0, L_0x2269990; 1 drivers +v0x21fd0a0_0 .net "bxorand", 0 0, L_0x2269550; 1 drivers +v0x21fd150_0 .alias "defaultCompare", 0 0, v0x21ff320_0; +v0x21fd1f0_0 .alias "out", 0 0, v0x21ffb00_0; +v0x21fd270_0 .net "xornot", 0 0, L_0x2269650; 1 drivers +v0x21fd2f0_0 .net "xornotand", 0 0, L_0x22696b0; 1 drivers +S_0x21fc780 .scope module, "bit4" "single_slt" 9 78, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2269a80 .functor XOR 1, L_0x2269e30, L_0x2269f20, C4<0>, C4<0>; +L_0x2269ae0 .functor AND 1, L_0x2269f20, L_0x2269a80, C4<1>, C4<1>; +L_0x2269be0 .functor NOT 1, L_0x2269a80, C4<0>, C4<0>, C4<0>; +L_0x2269c40 .functor AND 1, L_0x2269be0, L_0x22697f0, C4<1>, C4<1>; +L_0x2269d80 .functor OR 1, L_0x2269ae0, L_0x2269c40, C4<0>, C4<0>; +v0x21fc870_0 .net "a", 0 0, L_0x2269e30; 1 drivers +v0x21fc930_0 .net "abxor", 0 0, L_0x2269a80; 1 drivers +v0x21fc9d0_0 .net "b", 0 0, L_0x2269f20; 1 drivers +v0x21fca70_0 .net "bxorand", 0 0, L_0x2269ae0; 1 drivers +v0x21fcb20_0 .alias "defaultCompare", 0 0, v0x21ffb00_0; +v0x21fcbc0_0 .alias "out", 0 0, v0x21ffcd0_0; +v0x21fcc40_0 .net "xornot", 0 0, L_0x2269be0; 1 drivers +v0x21fccc0_0 .net "xornotand", 0 0, L_0x2269c40; 1 drivers +S_0x21fc150 .scope module, "bit5" "single_slt" 9 79, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226a020 .functor XOR 1, L_0x226a380, L_0x226a470, C4<0>, C4<0>; +L_0x226a080 .functor AND 1, L_0x226a470, L_0x226a020, C4<1>, C4<1>; +L_0x226a130 .functor NOT 1, L_0x226a020, C4<0>, C4<0>, C4<0>; +L_0x226a190 .functor AND 1, L_0x226a130, L_0x2269d80, C4<1>, C4<1>; +L_0x226a2d0 .functor OR 1, L_0x226a080, L_0x226a190, C4<0>, C4<0>; +v0x21fc240_0 .net "a", 0 0, L_0x226a380; 1 drivers +v0x21fc300_0 .net "abxor", 0 0, L_0x226a020; 1 drivers +v0x21fc3a0_0 .net "b", 0 0, L_0x226a470; 1 drivers +v0x21fc440_0 .net "bxorand", 0 0, L_0x226a080; 1 drivers +v0x21fc4f0_0 .alias "defaultCompare", 0 0, v0x21ffcd0_0; +v0x21fc590_0 .alias "out", 0 0, v0x21fff70_0; +v0x21fc610_0 .net "xornot", 0 0, L_0x226a130; 1 drivers +v0x21fc690_0 .net "xornotand", 0 0, L_0x226a190; 1 drivers +S_0x21fbb20 .scope module, "bit6" "single_slt" 9 80, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2269fc0 .functor XOR 1, L_0x226a8c0, L_0x226a9b0, C4<0>, C4<0>; +L_0x226a580 .functor AND 1, L_0x226a9b0, L_0x2269fc0, C4<1>, C4<1>; +L_0x226a680 .functor NOT 1, L_0x2269fc0, C4<0>, C4<0>, C4<0>; +L_0x226a6e0 .functor AND 1, L_0x226a680, L_0x226a2d0, C4<1>, C4<1>; +L_0x21e0dd0 .functor OR 1, L_0x226a580, L_0x226a6e0, C4<0>, C4<0>; +v0x21fbc10_0 .net "a", 0 0, L_0x226a8c0; 1 drivers +v0x21fbcd0_0 .net "abxor", 0 0, L_0x2269fc0; 1 drivers +v0x21fbd70_0 .net "b", 0 0, L_0x226a9b0; 1 drivers +v0x21fbe10_0 .net "bxorand", 0 0, L_0x226a580; 1 drivers +v0x21fbec0_0 .alias "defaultCompare", 0 0, v0x21fff70_0; +v0x21fbf60_0 .alias "out", 0 0, v0x21ffe30_0; +v0x21fbfe0_0 .net "xornot", 0 0, L_0x226a680; 1 drivers +v0x21fc060_0 .net "xornotand", 0 0, L_0x226a6e0; 1 drivers +S_0x21fb4f0 .scope module, "bit7" "single_slt" 9 81, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226aad0 .functor XOR 1, L_0x226ae80, L_0x226af70, C4<0>, C4<0>; +L_0x226ab30 .functor AND 1, L_0x226af70, L_0x226aad0, C4<1>, C4<1>; +L_0x226ac30 .functor NOT 1, L_0x226aad0, C4<0>, C4<0>, C4<0>; +L_0x226ac90 .functor AND 1, L_0x226ac30, L_0x21e0dd0, C4<1>, C4<1>; +L_0x226add0 .functor OR 1, L_0x226ab30, L_0x226ac90, C4<0>, C4<0>; +v0x21fb5e0_0 .net "a", 0 0, L_0x226ae80; 1 drivers +v0x21fb6a0_0 .net "abxor", 0 0, L_0x226aad0; 1 drivers +v0x21fb740_0 .net "b", 0 0, L_0x226af70; 1 drivers +v0x21fb7e0_0 .net "bxorand", 0 0, L_0x226ab30; 1 drivers +v0x21fb890_0 .alias "defaultCompare", 0 0, v0x21ffe30_0; +v0x21fb930_0 .alias "out", 0 0, v0x22000f0_0; +v0x21fb9b0_0 .net "xornot", 0 0, L_0x226ac30; 1 drivers +v0x21fba30_0 .net "xornotand", 0 0, L_0x226ac90; 1 drivers +S_0x21faec0 .scope module, "bit8" "single_slt" 9 82, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226b0a0 .functor XOR 1, L_0x226b450, L_0x226b540, C4<0>, C4<0>; +L_0x226b100 .functor AND 1, L_0x226b540, L_0x226b0a0, C4<1>, C4<1>; +L_0x226b200 .functor NOT 1, L_0x226b0a0, C4<0>, C4<0>, C4<0>; +L_0x226b260 .functor AND 1, L_0x226b200, L_0x226add0, C4<1>, C4<1>; +L_0x226b3a0 .functor OR 1, L_0x226b100, L_0x226b260, C4<0>, C4<0>; +v0x21fafb0_0 .net "a", 0 0, L_0x226b450; 1 drivers +v0x21fb070_0 .net "abxor", 0 0, L_0x226b0a0; 1 drivers +v0x21fb110_0 .net "b", 0 0, L_0x226b540; 1 drivers +v0x21fb1b0_0 .net "bxorand", 0 0, L_0x226b100; 1 drivers +v0x21fb260_0 .alias "defaultCompare", 0 0, v0x22000f0_0; +v0x21fb300_0 .alias "out", 0 0, v0x21ffff0_0; +v0x21fb380_0 .net "xornot", 0 0, L_0x226b200; 1 drivers +v0x21fb400_0 .net "xornotand", 0 0, L_0x226b260; 1 drivers +S_0x21fa890 .scope module, "bit9" "single_slt" 9 83, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226b010 .functor XOR 1, L_0x226b9d0, L_0x226bac0, C4<0>, C4<0>; +L_0x226b680 .functor AND 1, L_0x226bac0, L_0x226b010, C4<1>, C4<1>; +L_0x226b780 .functor NOT 1, L_0x226b010, C4<0>, C4<0>, C4<0>; +L_0x226b7e0 .functor AND 1, L_0x226b780, L_0x226b3a0, C4<1>, C4<1>; +L_0x226b920 .functor OR 1, L_0x226b680, L_0x226b7e0, C4<0>, C4<0>; +v0x21fa980_0 .net "a", 0 0, L_0x226b9d0; 1 drivers +v0x21faa40_0 .net "abxor", 0 0, L_0x226b010; 1 drivers +v0x21faae0_0 .net "b", 0 0, L_0x226bac0; 1 drivers +v0x21fab80_0 .net "bxorand", 0 0, L_0x226b680; 1 drivers +v0x21fac30_0 .alias "defaultCompare", 0 0, v0x21ffff0_0; +v0x21facd0_0 .alias "out", 0 0, v0x2200280_0; +v0x21fad50_0 .net "xornot", 0 0, L_0x226b780; 1 drivers +v0x21fadd0_0 .net "xornotand", 0 0, L_0x226b7e0; 1 drivers +S_0x21fa260 .scope module, "bit10" "single_slt" 9 84, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226b5e0 .functor XOR 1, L_0x226bf60, L_0x226c050, C4<0>, C4<0>; +L_0x226bc10 .functor AND 1, L_0x226c050, L_0x226b5e0, C4<1>, C4<1>; +L_0x226bd10 .functor NOT 1, L_0x226b5e0, C4<0>, C4<0>, C4<0>; +L_0x226bd70 .functor AND 1, L_0x226bd10, L_0x226b920, C4<1>, C4<1>; +L_0x226beb0 .functor OR 1, L_0x226bc10, L_0x226bd70, C4<0>, C4<0>; +v0x21fa350_0 .net "a", 0 0, L_0x226bf60; 1 drivers +v0x21fa410_0 .net "abxor", 0 0, L_0x226b5e0; 1 drivers +v0x21fa4b0_0 .net "b", 0 0, L_0x226c050; 1 drivers +v0x21fa550_0 .net "bxorand", 0 0, L_0x226bc10; 1 drivers +v0x21fa600_0 .alias "defaultCompare", 0 0, v0x2200280_0; +v0x21fa6a0_0 .alias "out", 0 0, v0x21fea80_0; +v0x21fa720_0 .net "xornot", 0 0, L_0x226bd10; 1 drivers +v0x21fa7a0_0 .net "xornotand", 0 0, L_0x226bd70; 1 drivers +S_0x21f9c30 .scope module, "bit11" "single_slt" 9 85, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226bb60 .functor XOR 1, L_0x226c4b0, L_0x226c5a0, C4<0>, C4<0>; +L_0x226c1b0 .functor AND 1, L_0x226c5a0, L_0x226bb60, C4<1>, C4<1>; +L_0x226c260 .functor NOT 1, L_0x226bb60, C4<0>, C4<0>, C4<0>; +L_0x226c2c0 .functor AND 1, L_0x226c260, L_0x226beb0, C4<1>, C4<1>; +L_0x226c400 .functor OR 1, L_0x226c1b0, L_0x226c2c0, C4<0>, C4<0>; +v0x21f9d20_0 .net "a", 0 0, L_0x226c4b0; 1 drivers +v0x21f9de0_0 .net "abxor", 0 0, L_0x226bb60; 1 drivers +v0x21f9e80_0 .net "b", 0 0, L_0x226c5a0; 1 drivers +v0x21f9f20_0 .net "bxorand", 0 0, L_0x226c1b0; 1 drivers +v0x21f9fd0_0 .alias "defaultCompare", 0 0, v0x21fea80_0; +v0x21fa070_0 .alias "out", 0 0, v0x21feb50_0; +v0x21fa0f0_0 .net "xornot", 0 0, L_0x226c260; 1 drivers +v0x21fa170_0 .net "xornotand", 0 0, L_0x226c2c0; 1 drivers +S_0x21f9600 .scope module, "bit12" "single_slt" 9 86, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226c0f0 .functor XOR 1, L_0x226ca00, L_0x226caf0, C4<0>, C4<0>; +L_0x226c150 .functor AND 1, L_0x226caf0, L_0x226c0f0, C4<1>, C4<1>; +L_0x226c7b0 .functor NOT 1, L_0x226c0f0, C4<0>, C4<0>, C4<0>; +L_0x226c810 .functor AND 1, L_0x226c7b0, L_0x226c400, C4<1>, C4<1>; +L_0x226c950 .functor OR 1, L_0x226c150, L_0x226c810, C4<0>, C4<0>; +v0x21f96f0_0 .net "a", 0 0, L_0x226ca00; 1 drivers +v0x21f97b0_0 .net "abxor", 0 0, L_0x226c0f0; 1 drivers +v0x21f9850_0 .net "b", 0 0, L_0x226caf0; 1 drivers +v0x21f98f0_0 .net "bxorand", 0 0, L_0x226c150; 1 drivers +v0x21f99a0_0 .alias "defaultCompare", 0 0, v0x21feb50_0; +v0x21f9a40_0 .alias "out", 0 0, v0x21fec20_0; +v0x21f9ac0_0 .net "xornot", 0 0, L_0x226c7b0; 1 drivers +v0x21f9b40_0 .net "xornotand", 0 0, L_0x226c810; 1 drivers +S_0x21f8fd0 .scope module, "bit13" "single_slt" 9 87, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226c640 .functor XOR 1, L_0x226cf60, L_0x226d050, C4<0>, C4<0>; +L_0x226c6a0 .functor AND 1, L_0x226d050, L_0x226c640, C4<1>, C4<1>; +L_0x226cd10 .functor NOT 1, L_0x226c640, C4<0>, C4<0>, C4<0>; +L_0x226cd70 .functor AND 1, L_0x226cd10, L_0x226c950, C4<1>, C4<1>; +L_0x226ceb0 .functor OR 1, L_0x226c6a0, L_0x226cd70, C4<0>, C4<0>; +v0x21f90c0_0 .net "a", 0 0, L_0x226cf60; 1 drivers +v0x21f9180_0 .net "abxor", 0 0, L_0x226c640; 1 drivers +v0x21f9220_0 .net "b", 0 0, L_0x226d050; 1 drivers +v0x21f92c0_0 .net "bxorand", 0 0, L_0x226c6a0; 1 drivers +v0x21f9370_0 .alias "defaultCompare", 0 0, v0x21fec20_0; +v0x21f9410_0 .alias "out", 0 0, v0x21fed40_0; +v0x21f9490_0 .net "xornot", 0 0, L_0x226cd10; 1 drivers +v0x21f9510_0 .net "xornotand", 0 0, L_0x226cd70; 1 drivers +S_0x21f89a0 .scope module, "bit14" "single_slt" 9 88, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226cb90 .functor XOR 1, L_0x226d4d0, L_0x2264500, C4<0>, C4<0>; +L_0x226cbf0 .functor AND 1, L_0x2264500, L_0x226cb90, C4<1>, C4<1>; +L_0x226d280 .functor NOT 1, L_0x226cb90, C4<0>, C4<0>, C4<0>; +L_0x226d2e0 .functor AND 1, L_0x226d280, L_0x226ceb0, C4<1>, C4<1>; +L_0x226d420 .functor OR 1, L_0x226cbf0, L_0x226d2e0, C4<0>, C4<0>; +v0x21f8a90_0 .net "a", 0 0, L_0x226d4d0; 1 drivers +v0x21f8b50_0 .net "abxor", 0 0, L_0x226cb90; 1 drivers +v0x21f8bf0_0 .net "b", 0 0, L_0x2264500; 1 drivers +v0x21f8c90_0 .net "bxorand", 0 0, L_0x226cbf0; 1 drivers +v0x21f8d40_0 .alias "defaultCompare", 0 0, v0x21fed40_0; +v0x21f8de0_0 .alias "out", 0 0, v0x21fee10_0; +v0x21f8e60_0 .net "xornot", 0 0, L_0x226d280; 1 drivers +v0x21f8ee0_0 .net "xornotand", 0 0, L_0x226d2e0; 1 drivers +S_0x21f8370 .scope module, "bit15" "single_slt" 9 89, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226a510 .functor XOR 1, L_0x22648a0, L_0x226de20, C4<0>, C4<0>; +L_0x226aa50 .functor AND 1, L_0x226de20, L_0x226a510, C4<1>, C4<1>; +L_0x22646a0 .functor NOT 1, L_0x226a510, C4<0>, C4<0>, C4<0>; +L_0x2264700 .functor AND 1, L_0x22646a0, L_0x226d420, C4<1>, C4<1>; +L_0x22647f0 .functor OR 1, L_0x226aa50, L_0x2264700, C4<0>, C4<0>; +v0x21f8460_0 .net "a", 0 0, L_0x22648a0; 1 drivers +v0x21f8520_0 .net "abxor", 0 0, L_0x226a510; 1 drivers +v0x21f85c0_0 .net "b", 0 0, L_0x226de20; 1 drivers +v0x21f8660_0 .net "bxorand", 0 0, L_0x226aa50; 1 drivers +v0x21f8710_0 .alias "defaultCompare", 0 0, v0x21fee10_0; +v0x21f87b0_0 .alias "out", 0 0, v0x21fee90_0; +v0x21f8830_0 .net "xornot", 0 0, L_0x22646a0; 1 drivers +v0x21f88b0_0 .net "xornotand", 0 0, L_0x2264700; 1 drivers +S_0x21f7d40 .scope module, "bit16" "single_slt" 9 90, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x22645a0 .functor XOR 1, L_0x226e2c0, L_0x226e3b0, C4<0>, C4<0>; +L_0x2264600 .functor AND 1, L_0x226e3b0, L_0x22645a0, C4<1>, C4<1>; +L_0x226e070 .functor NOT 1, L_0x22645a0, C4<0>, C4<0>, C4<0>; +L_0x226e0d0 .functor AND 1, L_0x226e070, L_0x22647f0, C4<1>, C4<1>; +L_0x226e210 .functor OR 1, L_0x2264600, L_0x226e0d0, C4<0>, C4<0>; +v0x21f7e30_0 .net "a", 0 0, L_0x226e2c0; 1 drivers +v0x21f7ef0_0 .net "abxor", 0 0, L_0x22645a0; 1 drivers +v0x21f7f90_0 .net "b", 0 0, L_0x226e3b0; 1 drivers +v0x21f8030_0 .net "bxorand", 0 0, L_0x2264600; 1 drivers +v0x21f80e0_0 .alias "defaultCompare", 0 0, v0x21fee90_0; +v0x21f8180_0 .alias "out", 0 0, v0x21fef60_0; +v0x21f8200_0 .net "xornot", 0 0, L_0x226e070; 1 drivers +v0x21f8280_0 .net "xornotand", 0 0, L_0x226e0d0; 1 drivers +S_0x21f7710 .scope module, "bit17" "single_slt" 9 91, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226dec0 .functor XOR 1, L_0x226e810, L_0x226e900, C4<0>, C4<0>; +L_0x226df20 .functor AND 1, L_0x226e900, L_0x226dec0, C4<1>, C4<1>; +L_0x226e5c0 .functor NOT 1, L_0x226dec0, C4<0>, C4<0>, C4<0>; +L_0x226e620 .functor AND 1, L_0x226e5c0, L_0x226e210, C4<1>, C4<1>; +L_0x226e760 .functor OR 1, L_0x226df20, L_0x226e620, C4<0>, C4<0>; +v0x21f7800_0 .net "a", 0 0, L_0x226e810; 1 drivers +v0x21f78c0_0 .net "abxor", 0 0, L_0x226dec0; 1 drivers +v0x21f7960_0 .net "b", 0 0, L_0x226e900; 1 drivers +v0x21f7a00_0 .net "bxorand", 0 0, L_0x226df20; 1 drivers +v0x21f7ab0_0 .alias "defaultCompare", 0 0, v0x21fef60_0; +v0x21f7b50_0 .alias "out", 0 0, v0x21ff030_0; +v0x21f7bd0_0 .net "xornot", 0 0, L_0x226e5c0; 1 drivers +v0x21f7c50_0 .net "xornotand", 0 0, L_0x226e620; 1 drivers +S_0x21f70e0 .scope module, "bit18" "single_slt" 9 92, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226e450 .functor XOR 1, L_0x226ed70, L_0x226ee60, C4<0>, C4<0>; +L_0x226e4b0 .functor AND 1, L_0x226ee60, L_0x226e450, C4<1>, C4<1>; +L_0x226eb20 .functor NOT 1, L_0x226e450, C4<0>, C4<0>, C4<0>; +L_0x226eb80 .functor AND 1, L_0x226eb20, L_0x226e760, C4<1>, C4<1>; +L_0x226ecc0 .functor OR 1, L_0x226e4b0, L_0x226eb80, C4<0>, C4<0>; +v0x21f71d0_0 .net "a", 0 0, L_0x226ed70; 1 drivers +v0x21f7290_0 .net "abxor", 0 0, L_0x226e450; 1 drivers +v0x21f7330_0 .net "b", 0 0, L_0x226ee60; 1 drivers +v0x21f73d0_0 .net "bxorand", 0 0, L_0x226e4b0; 1 drivers +v0x21f7480_0 .alias "defaultCompare", 0 0, v0x21ff030_0; +v0x21f7520_0 .alias "out", 0 0, v0x21ff100_0; +v0x21f75a0_0 .net "xornot", 0 0, L_0x226eb20; 1 drivers +v0x21f7620_0 .net "xornotand", 0 0, L_0x226eb80; 1 drivers +S_0x21f6ab0 .scope module, "bit19" "single_slt" 9 93, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226e9a0 .functor XOR 1, L_0x226f2e0, L_0x226f3d0, C4<0>, C4<0>; +L_0x226ea00 .functor AND 1, L_0x226f3d0, L_0x226e9a0, C4<1>, C4<1>; +L_0x226f090 .functor NOT 1, L_0x226e9a0, C4<0>, C4<0>, C4<0>; +L_0x226f0f0 .functor AND 1, L_0x226f090, L_0x226ecc0, C4<1>, C4<1>; +L_0x226f230 .functor OR 1, L_0x226ea00, L_0x226f0f0, C4<0>, C4<0>; +v0x21f6ba0_0 .net "a", 0 0, L_0x226f2e0; 1 drivers +v0x21f6c60_0 .net "abxor", 0 0, L_0x226e9a0; 1 drivers +v0x21f6d00_0 .net "b", 0 0, L_0x226f3d0; 1 drivers +v0x21f6da0_0 .net "bxorand", 0 0, L_0x226ea00; 1 drivers +v0x21f6e50_0 .alias "defaultCompare", 0 0, v0x21ff100_0; +v0x21f6ef0_0 .alias "out", 0 0, v0x21ff250_0; +v0x21f6f70_0 .net "xornot", 0 0, L_0x226f090; 1 drivers +v0x21f6ff0_0 .net "xornotand", 0 0, L_0x226f0f0; 1 drivers +S_0x21f6480 .scope module, "bit20" "single_slt" 9 94, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226ef00 .functor XOR 1, L_0x226f860, L_0x226f950, C4<0>, C4<0>; +L_0x226ef60 .functor AND 1, L_0x226f950, L_0x226ef00, C4<1>, C4<1>; +L_0x226f610 .functor NOT 1, L_0x226ef00, C4<0>, C4<0>, C4<0>; +L_0x226f670 .functor AND 1, L_0x226f610, L_0x226f230, C4<1>, C4<1>; +L_0x226f7b0 .functor OR 1, L_0x226ef60, L_0x226f670, C4<0>, C4<0>; +v0x21f6570_0 .net "a", 0 0, L_0x226f860; 1 drivers +v0x21f6630_0 .net "abxor", 0 0, L_0x226ef00; 1 drivers +v0x21f66d0_0 .net "b", 0 0, L_0x226f950; 1 drivers +v0x21f6770_0 .net "bxorand", 0 0, L_0x226ef60; 1 drivers +v0x21f6820_0 .alias "defaultCompare", 0 0, v0x21ff250_0; +v0x21f68c0_0 .alias "out", 0 0, v0x21ff180_0; +v0x21f6940_0 .net "xornot", 0 0, L_0x226f610; 1 drivers +v0x21f69c0_0 .net "xornotand", 0 0, L_0x226f670; 1 drivers +S_0x21f5e50 .scope module, "bit21" "single_slt" 9 95, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226f470 .functor XOR 1, L_0x226fdf0, L_0x226fee0, C4<0>, C4<0>; +L_0x226f4d0 .functor AND 1, L_0x226fee0, L_0x226f470, C4<1>, C4<1>; +L_0x226fba0 .functor NOT 1, L_0x226f470, C4<0>, C4<0>, C4<0>; +L_0x226fc00 .functor AND 1, L_0x226fba0, L_0x226f7b0, C4<1>, C4<1>; +L_0x226fd40 .functor OR 1, L_0x226f4d0, L_0x226fc00, C4<0>, C4<0>; +v0x21f5f40_0 .net "a", 0 0, L_0x226fdf0; 1 drivers +v0x21f6000_0 .net "abxor", 0 0, L_0x226f470; 1 drivers +v0x21f60a0_0 .net "b", 0 0, L_0x226fee0; 1 drivers +v0x21f6140_0 .net "bxorand", 0 0, L_0x226f4d0; 1 drivers +v0x21f61f0_0 .alias "defaultCompare", 0 0, v0x21ff180_0; +v0x21f6290_0 .alias "out", 0 0, v0x21ff4d0_0; +v0x21f6310_0 .net "xornot", 0 0, L_0x226fba0; 1 drivers +v0x21f6390_0 .net "xornotand", 0 0, L_0x226fc00; 1 drivers +S_0x21f5820 .scope module, "bit22" "single_slt" 9 96, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x226f9f0 .functor XOR 1, L_0x22368f0, L_0x22369e0, C4<0>, C4<0>; +L_0x226fa50 .functor AND 1, L_0x22369e0, L_0x226f9f0, C4<1>, C4<1>; +L_0x22366a0 .functor NOT 1, L_0x226f9f0, C4<0>, C4<0>, C4<0>; +L_0x2236700 .functor AND 1, L_0x22366a0, L_0x226fd40, C4<1>, C4<1>; +L_0x2236840 .functor OR 1, L_0x226fa50, L_0x2236700, C4<0>, C4<0>; +v0x21f5910_0 .net "a", 0 0, L_0x22368f0; 1 drivers +v0x21f59d0_0 .net "abxor", 0 0, L_0x226f9f0; 1 drivers +v0x21f5a70_0 .net "b", 0 0, L_0x22369e0; 1 drivers +v0x21f5b10_0 .net "bxorand", 0 0, L_0x226fa50; 1 drivers +v0x21f5bc0_0 .alias "defaultCompare", 0 0, v0x21ff4d0_0; +v0x21f5c60_0 .alias "out", 0 0, v0x21ff5f0_0; +v0x21f5ce0_0 .net "xornot", 0 0, L_0x22366a0; 1 drivers +v0x21f5d60_0 .net "xornotand", 0 0, L_0x2236700; 1 drivers +S_0x21f51f0 .scope module, "bit23" "single_slt" 9 97, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2236c00 .functor XOR 1, L_0x22710d0, L_0x22711c0, C4<0>, C4<0>; +L_0x2236c60 .functor AND 1, L_0x22711c0, L_0x2236c00, C4<1>, C4<1>; +L_0x2236580 .functor NOT 1, L_0x2236c00, C4<0>, C4<0>, C4<0>; +L_0x22365e0 .functor AND 1, L_0x2236580, L_0x2236840, C4<1>, C4<1>; +L_0x2271020 .functor OR 1, L_0x2236c60, L_0x22365e0, C4<0>, C4<0>; +v0x21f52e0_0 .net "a", 0 0, L_0x22710d0; 1 drivers +v0x21f53a0_0 .net "abxor", 0 0, L_0x2236c00; 1 drivers +v0x21f5440_0 .net "b", 0 0, L_0x22711c0; 1 drivers +v0x21f54e0_0 .net "bxorand", 0 0, L_0x2236c60; 1 drivers +v0x21f5590_0 .alias "defaultCompare", 0 0, v0x21ff5f0_0; +v0x21f5630_0 .alias "out", 0 0, v0x21ff6c0_0; +v0x21f56b0_0 .net "xornot", 0 0, L_0x2236580; 1 drivers +v0x21f5730_0 .net "xornotand", 0 0, L_0x22365e0; 1 drivers +S_0x21f4bc0 .scope module, "bit24" "single_slt" 9 98, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2236a80 .functor XOR 1, L_0x2271640, L_0x2271730, C4<0>, C4<0>; +L_0x2236ae0 .functor AND 1, L_0x2271730, L_0x2236a80, C4<1>, C4<1>; +L_0x22713f0 .functor NOT 1, L_0x2236a80, C4<0>, C4<0>, C4<0>; +L_0x2271450 .functor AND 1, L_0x22713f0, L_0x2271020, C4<1>, C4<1>; +L_0x2271590 .functor OR 1, L_0x2236ae0, L_0x2271450, C4<0>, C4<0>; +v0x21f4cb0_0 .net "a", 0 0, L_0x2271640; 1 drivers +v0x21f4d70_0 .net "abxor", 0 0, L_0x2236a80; 1 drivers +v0x21f4e10_0 .net "b", 0 0, L_0x2271730; 1 drivers +v0x21f4eb0_0 .net "bxorand", 0 0, L_0x2236ae0; 1 drivers +v0x21f4f60_0 .alias "defaultCompare", 0 0, v0x21ff6c0_0; +v0x21f5000_0 .alias "out", 0 0, v0x21ff7f0_0; +v0x21f5080_0 .net "xornot", 0 0, L_0x22713f0; 1 drivers +v0x21f5100_0 .net "xornotand", 0 0, L_0x2271450; 1 drivers +S_0x21f4590 .scope module, "bit25" "single_slt" 9 99, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2271260 .functor XOR 1, L_0x2271bc0, L_0x2271cb0, C4<0>, C4<0>; +L_0x22712c0 .functor AND 1, L_0x2271cb0, L_0x2271260, C4<1>, C4<1>; +L_0x2271970 .functor NOT 1, L_0x2271260, C4<0>, C4<0>, C4<0>; +L_0x22719d0 .functor AND 1, L_0x2271970, L_0x2271590, C4<1>, C4<1>; +L_0x2271b10 .functor OR 1, L_0x22712c0, L_0x22719d0, C4<0>, C4<0>; +v0x21f4680_0 .net "a", 0 0, L_0x2271bc0; 1 drivers +v0x21f4740_0 .net "abxor", 0 0, L_0x2271260; 1 drivers +v0x21f47e0_0 .net "b", 0 0, L_0x2271cb0; 1 drivers +v0x21f4880_0 .net "bxorand", 0 0, L_0x22712c0; 1 drivers +v0x21f4930_0 .alias "defaultCompare", 0 0, v0x21ff7f0_0; +v0x21f49d0_0 .alias "out", 0 0, v0x21ff870_0; +v0x21f4a50_0 .net "xornot", 0 0, L_0x2271970; 1 drivers +v0x21f4ad0_0 .net "xornotand", 0 0, L_0x22719d0; 1 drivers +S_0x21f3f60 .scope module, "bit26" "single_slt" 9 100, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x22717d0 .functor XOR 1, L_0x2272150, L_0x2272240, C4<0>, C4<0>; +L_0x2271830 .functor AND 1, L_0x2272240, L_0x22717d0, C4<1>, C4<1>; +L_0x2271f00 .functor NOT 1, L_0x22717d0, C4<0>, C4<0>, C4<0>; +L_0x2271f60 .functor AND 1, L_0x2271f00, L_0x2271b10, C4<1>, C4<1>; +L_0x22720a0 .functor OR 1, L_0x2271830, L_0x2271f60, C4<0>, C4<0>; +v0x21f4050_0 .net "a", 0 0, L_0x2272150; 1 drivers +v0x21f4110_0 .net "abxor", 0 0, L_0x22717d0; 1 drivers +v0x21f41b0_0 .net "b", 0 0, L_0x2272240; 1 drivers +v0x21f4250_0 .net "bxorand", 0 0, L_0x2271830; 1 drivers +v0x21f4300_0 .alias "defaultCompare", 0 0, v0x21ff870_0; +v0x21f43a0_0 .alias "out", 0 0, v0x21ff9b0_0; +v0x21f4420_0 .net "xornot", 0 0, L_0x2271f00; 1 drivers +v0x21f44a0_0 .net "xornotand", 0 0, L_0x2271f60; 1 drivers +S_0x21f3930 .scope module, "bit27" "single_slt" 9 101, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2271d50 .functor XOR 1, L_0x2272690, L_0x2272780, C4<0>, C4<0>; +L_0x2271db0 .functor AND 1, L_0x2272780, L_0x2271d50, C4<1>, C4<1>; +L_0x22724a0 .functor NOT 1, L_0x2271d50, C4<0>, C4<0>, C4<0>; +L_0x2272500 .functor AND 1, L_0x22724a0, L_0x22720a0, C4<1>, C4<1>; +L_0x21ff790 .functor OR 1, L_0x2271db0, L_0x2272500, C4<0>, C4<0>; +v0x21f3a20_0 .net "a", 0 0, L_0x2272690; 1 drivers +v0x21f3ae0_0 .net "abxor", 0 0, L_0x2271d50; 1 drivers +v0x21f3b80_0 .net "b", 0 0, L_0x2272780; 1 drivers +v0x21f3c20_0 .net "bxorand", 0 0, L_0x2271db0; 1 drivers +v0x21f3cd0_0 .alias "defaultCompare", 0 0, v0x21ff9b0_0; +v0x21f3d70_0 .alias "out", 0 0, v0x21ffa30_0; +v0x21f3df0_0 .net "xornot", 0 0, L_0x22724a0; 1 drivers +v0x21f3e70_0 .net "xornotand", 0 0, L_0x2272500; 1 drivers +S_0x21f3330 .scope module, "bit28" "single_slt" 9 102, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x22722e0 .functor XOR 1, L_0x2272be0, L_0x2272cd0, C4<0>, C4<0>; +L_0x2272340 .functor AND 1, L_0x2272cd0, L_0x22722e0, C4<1>, C4<1>; +L_0x2272440 .functor NOT 1, L_0x22722e0, C4<0>, C4<0>, C4<0>; +L_0x22729f0 .functor AND 1, L_0x2272440, L_0x21ff790, C4<1>, C4<1>; +L_0x2272b30 .functor OR 1, L_0x2272340, L_0x22729f0, C4<0>, C4<0>; +v0x21f3420_0 .net "a", 0 0, L_0x2272be0; 1 drivers +v0x21f34e0_0 .net "abxor", 0 0, L_0x22722e0; 1 drivers +v0x21f3580_0 .net "b", 0 0, L_0x2272cd0; 1 drivers +v0x21f3620_0 .net "bxorand", 0 0, L_0x2272340; 1 drivers +v0x21f36a0_0 .alias "defaultCompare", 0 0, v0x21ffa30_0; +v0x21f3740_0 .alias "out", 0 0, v0x21ffb80_0; +v0x21f37c0_0 .net "xornot", 0 0, L_0x2272440; 1 drivers +v0x21f3840_0 .net "xornotand", 0 0, L_0x22729f0; 1 drivers +S_0x21f2d30 .scope module, "bit29" "single_slt" 9 103, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2272820 .functor XOR 1, L_0x2273140, L_0x2273230, C4<0>, C4<0>; +L_0x2272880 .functor AND 1, L_0x2273230, L_0x2272820, C4<1>, C4<1>; +L_0x2272980 .functor NOT 1, L_0x2272820, C4<0>, C4<0>, C4<0>; +L_0x2272f50 .functor AND 1, L_0x2272980, L_0x2272b30, C4<1>, C4<1>; +L_0x2273090 .functor OR 1, L_0x2272880, L_0x2272f50, C4<0>, C4<0>; +v0x21f2e20_0 .net "a", 0 0, L_0x2273140; 1 drivers +v0x21f2ee0_0 .net "abxor", 0 0, L_0x2272820; 1 drivers +v0x21f2f80_0 .net "b", 0 0, L_0x2273230; 1 drivers +v0x21f3020_0 .net "bxorand", 0 0, L_0x2272880; 1 drivers +v0x21f30a0_0 .alias "defaultCompare", 0 0, v0x21ffb80_0; +v0x21f3140_0 .alias "out", 0 0, v0x21ffc00_0; +v0x21f31c0_0 .net "xornot", 0 0, L_0x2272980; 1 drivers +v0x21f3240_0 .net "xornotand", 0 0, L_0x2272f50; 1 drivers +S_0x21f2730 .scope module, "bit30" "single_slt" 9 104, 9 1, S_0x21f2050; + .timescale 0 0; +L_0x2272d70 .functor XOR 1, L_0x22736b0, L_0x22737a0, C4<0>, C4<0>; +L_0x2272dd0 .functor AND 1, L_0x22737a0, L_0x2272d70, C4<1>, C4<1>; +L_0x2272ed0 .functor NOT 1, L_0x2272d70, C4<0>, C4<0>, C4<0>; +L_0x22734c0 .functor AND 1, L_0x2272ed0, L_0x2273090, C4<1>, C4<1>; +L_0x2273600 .functor OR 1, L_0x2272dd0, L_0x22734c0, C4<0>, C4<0>; +v0x21f2820_0 .net "a", 0 0, L_0x22736b0; 1 drivers +v0x21f28e0_0 .net "abxor", 0 0, L_0x2272d70; 1 drivers +v0x21f2980_0 .net "b", 0 0, L_0x22737a0; 1 drivers +v0x21f2a20_0 .net "bxorand", 0 0, L_0x2272dd0; 1 drivers +v0x21f2aa0_0 .alias "defaultCompare", 0 0, v0x21ffc00_0; +v0x21f2b40_0 .alias "out", 0 0, v0x21ffdb0_0; +v0x21f2bc0_0 .net "xornot", 0 0, L_0x2272ed0; 1 drivers +v0x21f2c40_0 .net "xornotand", 0 0, L_0x22734c0; 1 drivers +S_0x21f2140 .scope module, "bit31" "single_slt_reversed" 9 105, 9 19, S_0x21f2050; + .timescale 0 0; +L_0x22732d0 .functor XOR 1, L_0x2273d70, L_0x2273840, C4<0>, C4<0>; +L_0x2273330 .functor AND 1, L_0x2273d70, L_0x22732d0, C4<1>, C4<1>; +L_0x2273430 .functor NOT 1, L_0x22732d0, C4<0>, C4<0>, C4<0>; +L_0x2273a40 .functor AND 1, L_0x2273430, L_0x2273600, C4<1>, C4<1>; +L_0x2273b80 .functor OR 1, L_0x2273330, L_0x2273a40, C4<0>, C4<0>; +v0x21f2230_0 .net "a", 0 0, L_0x2273d70; 1 drivers +v0x21f22f0_0 .net "abxor", 0 0, L_0x22732d0; 1 drivers +v0x21f2390_0 .net "axorand", 0 0, L_0x2273330; 1 drivers +v0x21f2430_0 .net "b", 0 0, L_0x2273840; 1 drivers +v0x21f24b0_0 .alias "defaultCompare", 0 0, v0x21ffdb0_0; +v0x21f2550_0 .net "out", 0 0, L_0x2273b80; 1 drivers +v0x21f25f0_0 .net "xornot", 0 0, L_0x2273430; 1 drivers +v0x21f2690_0 .net "xornotand", 0 0, L_0x2273a40; 1 drivers +S_0x21ede00 .scope module, "and0" "and_32bit" 6 37, 10 1, S_0x21e14f0; + .timescale 0 0; +L_0x2274020 .functor AND 1, L_0x22740d0, L_0x22741c0, C4<1>, C4<1>; +L_0x2274350 .functor AND 1, L_0x2274400, L_0x22744f0, C4<1>, C4<1>; +L_0x2274710 .functor AND 1, L_0x2274770, L_0x22748b0, C4<1>, C4<1>; +L_0x2274aa0 .functor AND 1, L_0x2274b00, L_0x2274bf0, C4<1>, C4<1>; +L_0x2274a40 .functor AND 1, L_0x2274e40, L_0x2274fb0, C4<1>, C4<1>; +L_0x22751d0 .functor AND 1, L_0x2275280, L_0x2275370, C4<1>, C4<1>; +L_0x2275140 .functor AND 1, L_0x22756b0, L_0x2275460, C4<1>, C4<1>; +L_0x22757a0 .functor AND 1, L_0x2275a50, L_0x2275b40, C4<1>, C4<1>; +L_0x2275d00 .functor AND 1, L_0x2275db0, L_0x2275c30, C4<1>, C4<1>; +L_0x2275ea0 .functor AND 1, L_0x22761c0, L_0x2276260, C4<1>, C4<1>; +L_0x2276450 .functor AND 1, L_0x22764b0, L_0x2276350, C4<1>, C4<1>; +L_0x22765a0 .functor AND 1, L_0x2276870, L_0x2276910, C4<1>, C4<1>; +L_0x2276160 .functor AND 1, L_0x2276b30, L_0x2276a00, C4<1>, C4<1>; +L_0x2276c20 .functor AND 1, L_0x2276f50, L_0x2276ff0, C4<1>, C4<1>; +L_0x2276ea0 .functor AND 1, L_0x22755a0, L_0x22770e0, C4<1>, C4<1>; +L_0x22771d0 .functor AND 1, L_0x22777e0, L_0x2277880, C4<1>, C4<1>; +L_0x2277700 .functor AND 1, L_0x2277b00, L_0x2277970, C4<1>, C4<1>; +L_0x2277da0 .functor AND 1, L_0x2277ef0, L_0x2277f90, C4<1>, C4<1>; +L_0x2277c90 .functor AND 1, L_0x2278240, L_0x2278080, C4<1>, C4<1>; +L_0x22784c0 .functor AND 1, L_0x2277e50, L_0x2278670, C4<1>, C4<1>; +L_0x2278380 .functor AND 1, L_0x2278950, L_0x2278760, C4<1>, C4<1>; +L_0x22788f0 .functor AND 1, L_0x2278570, L_0x2278d60, C4<1>, C4<1>; +L_0x2278a90 .functor AND 1, L_0x2278b40, L_0x2278e50, C4<1>, C4<1>; +L_0x2278fe0 .functor AND 1, L_0x2278c50, L_0x2279470, C4<1>, C4<1>; +L_0x2279160 .functor AND 1, L_0x2279210, L_0x22797c0, C4<1>, C4<1>; +L_0x2279560 .functor AND 1, L_0x22796f0, L_0x2279bc0, C4<1>, C4<1>; +L_0x22799f0 .functor AND 1, L_0x2279aa0, L_0x2279ef0, C4<1>, C4<1>; +L_0x2279c60 .functor AND 1, L_0x2279610, L_0x2279e50, C4<1>, C4<1>; +L_0x227a120 .functor AND 1, L_0x227a1d0, L_0x227a630, C4<1>, C4<1>; +L_0x227a370 .functor AND 1, L_0x2279d10, L_0x227a520, C4<1>, C4<1>; +L_0x21ef210 .functor AND 1, L_0x2277240, L_0x2277330, C4<1>, C4<1>; +L_0x227a810 .functor AND 1, L_0x227a420, L_0x227b200, C4<1>, C4<1>; +v0x21edef0_0 .net *"_s0", 0 0, L_0x2274020; 1 drivers +v0x21edf90_0 .net *"_s101", 0 0, L_0x2277970; 1 drivers +v0x21ee030_0 .net *"_s102", 0 0, L_0x2277da0; 1 drivers +v0x21ee0d0_0 .net *"_s105", 0 0, L_0x2277ef0; 1 drivers +v0x21ee150_0 .net *"_s107", 0 0, L_0x2277f90; 1 drivers +v0x21ee1f0_0 .net *"_s108", 0 0, L_0x2277c90; 1 drivers +v0x21ee290_0 .net *"_s11", 0 0, L_0x22744f0; 1 drivers +v0x21ee330_0 .net *"_s111", 0 0, L_0x2278240; 1 drivers +v0x21ee420_0 .net *"_s113", 0 0, L_0x2278080; 1 drivers +v0x21ee4c0_0 .net *"_s114", 0 0, L_0x22784c0; 1 drivers +v0x21ee560_0 .net *"_s117", 0 0, L_0x2277e50; 1 drivers +v0x21ee600_0 .net *"_s119", 0 0, L_0x2278670; 1 drivers +v0x21ee6a0_0 .net *"_s12", 0 0, L_0x2274710; 1 drivers +v0x21ee740_0 .net *"_s120", 0 0, L_0x2278380; 1 drivers +v0x21ee860_0 .net *"_s123", 0 0, L_0x2278950; 1 drivers +v0x21ee900_0 .net *"_s125", 0 0, L_0x2278760; 1 drivers +v0x21ee7c0_0 .net *"_s126", 0 0, L_0x22788f0; 1 drivers +v0x21eea50_0 .net *"_s129", 0 0, L_0x2278570; 1 drivers +v0x21eeb70_0 .net *"_s131", 0 0, L_0x2278d60; 1 drivers +v0x21eebf0_0 .net *"_s132", 0 0, L_0x2278a90; 1 drivers +v0x21eead0_0 .net *"_s135", 0 0, L_0x2278b40; 1 drivers +v0x21eed20_0 .net *"_s137", 0 0, L_0x2278e50; 1 drivers +v0x21eec70_0 .net *"_s138", 0 0, L_0x2278fe0; 1 drivers +v0x21eee60_0 .net *"_s141", 0 0, L_0x2278c50; 1 drivers +v0x21eedc0_0 .net *"_s143", 0 0, L_0x2279470; 1 drivers +v0x21eefb0_0 .net *"_s144", 0 0, L_0x2279160; 1 drivers +v0x21eef00_0 .net *"_s147", 0 0, L_0x2279210; 1 drivers +v0x21ef110_0 .net *"_s149", 0 0, L_0x22797c0; 1 drivers +v0x21ef050_0 .net *"_s15", 0 0, L_0x2274770; 1 drivers +v0x21ef280_0 .net *"_s150", 0 0, L_0x2279560; 1 drivers +v0x21ef190_0 .net *"_s153", 0 0, L_0x22796f0; 1 drivers +v0x21ef400_0 .net *"_s155", 0 0, L_0x2279bc0; 1 drivers +v0x21ef300_0 .net *"_s156", 0 0, L_0x22799f0; 1 drivers +v0x21ef590_0 .net *"_s159", 0 0, L_0x2279aa0; 1 drivers +v0x21ef480_0 .net *"_s161", 0 0, L_0x2279ef0; 1 drivers +v0x21ef730_0 .net *"_s162", 0 0, L_0x2279c60; 1 drivers +v0x21ef610_0 .net *"_s165", 0 0, L_0x2279610; 1 drivers +v0x21ef6b0_0 .net *"_s167", 0 0, L_0x2279e50; 1 drivers +v0x21ef8f0_0 .net *"_s168", 0 0, L_0x227a120; 1 drivers +v0x21ef970_0 .net *"_s17", 0 0, L_0x22748b0; 1 drivers +v0x21ef7b0_0 .net *"_s171", 0 0, L_0x227a1d0; 1 drivers +v0x21ef850_0 .net *"_s173", 0 0, L_0x227a630; 1 drivers +v0x21efb50_0 .net *"_s174", 0 0, L_0x227a370; 1 drivers +v0x21efbd0_0 .net *"_s177", 0 0, L_0x2279d10; 1 drivers +v0x21ef9f0_0 .net *"_s179", 0 0, L_0x227a520; 1 drivers +v0x21efa90_0 .net *"_s18", 0 0, L_0x2274aa0; 1 drivers +v0x21efdd0_0 .net *"_s180", 0 0, L_0x21ef210; 1 drivers +v0x21efe50_0 .net *"_s183", 0 0, L_0x2277240; 1 drivers +v0x21efc70_0 .net *"_s185", 0 0, L_0x2277330; 1 drivers +v0x21efd10_0 .net *"_s186", 0 0, L_0x227a810; 1 drivers +v0x21f0070_0 .net *"_s189", 0 0, L_0x227a420; 1 drivers +v0x21f00f0_0 .net *"_s191", 0 0, L_0x227b200; 1 drivers +v0x21efef0_0 .net *"_s21", 0 0, L_0x2274b00; 1 drivers +v0x21eff90_0 .net *"_s23", 0 0, L_0x2274bf0; 1 drivers +v0x21f0330_0 .net *"_s24", 0 0, L_0x2274a40; 1 drivers +v0x21f03b0_0 .net *"_s27", 0 0, L_0x2274e40; 1 drivers +v0x21f0170_0 .net *"_s29", 0 0, L_0x2274fb0; 1 drivers +v0x21f0210_0 .net *"_s3", 0 0, L_0x22740d0; 1 drivers +v0x21f02b0_0 .net *"_s30", 0 0, L_0x22751d0; 1 drivers +v0x21f0630_0 .net *"_s33", 0 0, L_0x2275280; 1 drivers +v0x21f0450_0 .net *"_s35", 0 0, L_0x2275370; 1 drivers +v0x21f04f0_0 .net *"_s36", 0 0, L_0x2275140; 1 drivers +v0x21f0590_0 .net *"_s39", 0 0, L_0x22756b0; 1 drivers +v0x21f08d0_0 .net *"_s41", 0 0, L_0x2275460; 1 drivers +v0x21f06d0_0 .net *"_s42", 0 0, L_0x22757a0; 1 drivers +v0x21f0770_0 .net *"_s45", 0 0, L_0x2275a50; 1 drivers +v0x21f0810_0 .net *"_s47", 0 0, L_0x2275b40; 1 drivers +v0x21f0b70_0 .net *"_s48", 0 0, L_0x2275d00; 1 drivers +v0x21f0970_0 .net *"_s5", 0 0, L_0x22741c0; 1 drivers +v0x21f0a10_0 .net *"_s51", 0 0, L_0x2275db0; 1 drivers +v0x21f0ab0_0 .net *"_s53", 0 0, L_0x2275c30; 1 drivers +v0x21f0e30_0 .net *"_s54", 0 0, L_0x2275ea0; 1 drivers +v0x21f0bf0_0 .net *"_s57", 0 0, L_0x22761c0; 1 drivers +v0x21f0c90_0 .net *"_s59", 0 0, L_0x2276260; 1 drivers +v0x21f0d30_0 .net *"_s6", 0 0, L_0x2274350; 1 drivers +v0x21f1110_0 .net *"_s60", 0 0, L_0x2276450; 1 drivers +v0x21f0eb0_0 .net *"_s63", 0 0, L_0x22764b0; 1 drivers +v0x21f0f50_0 .net *"_s65", 0 0, L_0x2276350; 1 drivers +v0x21f0ff0_0 .net *"_s66", 0 0, L_0x22765a0; 1 drivers +v0x21f1090_0 .net *"_s69", 0 0, L_0x2276870; 1 drivers +v0x21f1420_0 .net *"_s71", 0 0, L_0x2276910; 1 drivers +v0x21f14a0_0 .net *"_s72", 0 0, L_0x2276160; 1 drivers +v0x21f11b0_0 .net *"_s75", 0 0, L_0x2276b30; 1 drivers +v0x21f1250_0 .net *"_s77", 0 0, L_0x2276a00; 1 drivers +v0x21f12f0_0 .net *"_s78", 0 0, L_0x2276c20; 1 drivers +v0x21f1390_0 .net *"_s81", 0 0, L_0x2276f50; 1 drivers +v0x21f1800_0 .net *"_s83", 0 0, L_0x2276ff0; 1 drivers +v0x21f18a0_0 .net *"_s84", 0 0, L_0x2276ea0; 1 drivers +v0x21f1540_0 .net *"_s87", 0 0, L_0x22755a0; 1 drivers +v0x21f15e0_0 .net *"_s89", 0 0, L_0x22770e0; 1 drivers +v0x21f1680_0 .net *"_s9", 0 0, L_0x2274400; 1 drivers +v0x21f1720_0 .net *"_s90", 0 0, L_0x22771d0; 1 drivers +v0x21f1c10_0 .net *"_s93", 0 0, L_0x22777e0; 1 drivers +v0x21f1c90_0 .net *"_s95", 0 0, L_0x2277880; 1 drivers +v0x21f1940_0 .net *"_s96", 0 0, L_0x2277700; 1 drivers +v0x21f19e0_0 .net *"_s99", 0 0, L_0x2277b00; 1 drivers +v0x21f1a80_0 .alias "a", 31 0, v0x222d2f0_0; +v0x21f1b00_0 .alias "b", 31 0, v0x222d4b0_0; +v0x21f1b80_0 .alias "out", 31 0, v0x222c790_0; +L_0x2273930 .part/pv L_0x2274020, 0, 1, 32; +L_0x22740d0 .part v0x222dfb0_0, 0, 1; +L_0x22741c0 .part v0x222d190_0, 0, 1; +L_0x22742b0 .part/pv L_0x2274350, 1, 1, 32; +L_0x2274400 .part v0x222dfb0_0, 1, 1; +L_0x22744f0 .part v0x222d190_0, 1, 1; +L_0x22745e0 .part/pv L_0x2274710, 2, 1, 32; +L_0x2274770 .part v0x222dfb0_0, 2, 1; +L_0x22748b0 .part v0x222d190_0, 2, 1; +L_0x22749a0 .part/pv L_0x2274aa0, 3, 1, 32; +L_0x2274b00 .part v0x222dfb0_0, 3, 1; +L_0x2274bf0 .part v0x222d190_0, 3, 1; +L_0x2274d50 .part/pv L_0x2274a40, 4, 1, 32; +L_0x2274e40 .part v0x222dfb0_0, 4, 1; +L_0x2274fb0 .part v0x222d190_0, 4, 1; +L_0x22750a0 .part/pv L_0x22751d0, 5, 1, 32; +L_0x2275280 .part v0x222dfb0_0, 5, 1; +L_0x2275370 .part v0x222d190_0, 5, 1; +L_0x2275500 .part/pv L_0x2275140, 6, 1, 32; +L_0x22756b0 .part v0x222dfb0_0, 6, 1; +L_0x2275460 .part v0x222d190_0, 6, 1; +L_0x22758a0 .part/pv L_0x22757a0, 7, 1, 32; +L_0x2275a50 .part v0x222dfb0_0, 7, 1; +L_0x2275b40 .part v0x222d190_0, 7, 1; +L_0x2275940 .part/pv L_0x2275d00, 8, 1, 32; +L_0x2275db0 .part v0x222dfb0_0, 8, 1; +L_0x2275c30 .part v0x222d190_0, 8, 1; +L_0x2275fd0 .part/pv L_0x2275ea0, 9, 1, 32; +L_0x22761c0 .part v0x222dfb0_0, 9, 1; +L_0x2276260 .part v0x222d190_0, 9, 1; +L_0x2276070 .part/pv L_0x2276450, 10, 1, 32; +L_0x22764b0 .part v0x222dfb0_0, 10, 1; +L_0x2276350 .part v0x222d190_0, 10, 1; +L_0x22766b0 .part/pv L_0x22765a0, 11, 1, 32; +L_0x2276870 .part v0x222dfb0_0, 11, 1; +L_0x2276910 .part v0x222d190_0, 11, 1; +L_0x2276750 .part/pv L_0x2276160, 12, 1, 32; +L_0x2276b30 .part v0x222dfb0_0, 12, 1; +L_0x2276a00 .part v0x222d190_0, 12, 1; +L_0x2276d60 .part/pv L_0x2276c20, 13, 1, 32; +L_0x2276f50 .part v0x222dfb0_0, 13, 1; +L_0x2276ff0 .part v0x222d190_0, 13, 1; +L_0x2276e00 .part/pv L_0x2276ea0, 14, 1, 32; +L_0x22755a0 .part v0x222dfb0_0, 14, 1; +L_0x22770e0 .part v0x222d190_0, 14, 1; +L_0x22775c0 .part/pv L_0x22771d0, 15, 1, 32; +L_0x22777e0 .part v0x222dfb0_0, 15, 1; +L_0x2277880 .part v0x222d190_0, 15, 1; +L_0x2277660 .part/pv L_0x2277700, 16, 1, 32; +L_0x2277b00 .part v0x222dfb0_0, 16, 1; +L_0x2277970 .part v0x222d190_0, 16, 1; +L_0x2277a60 .part/pv L_0x2277da0, 17, 1, 32; +L_0x2277ef0 .part v0x222dfb0_0, 17, 1; +L_0x2277f90 .part v0x222d190_0, 17, 1; +L_0x2277bf0 .part/pv L_0x2277c90, 18, 1, 32; +L_0x2278240 .part v0x222dfb0_0, 18, 1; +L_0x2278080 .part v0x222d190_0, 18, 1; +L_0x2278170 .part/pv L_0x22784c0, 19, 1, 32; +L_0x2277e50 .part v0x222dfb0_0, 19, 1; +L_0x2278670 .part v0x222d190_0, 19, 1; +L_0x22782e0 .part/pv L_0x2278380, 20, 1, 32; +L_0x2278950 .part v0x222dfb0_0, 20, 1; +L_0x2278760 .part v0x222d190_0, 20, 1; +L_0x2278850 .part/pv L_0x22788f0, 21, 1, 32; +L_0x2278570 .part v0x222dfb0_0, 21, 1; +L_0x2278d60 .part v0x222d190_0, 21, 1; +L_0x22789f0 .part/pv L_0x2278a90, 22, 1, 32; +L_0x2278b40 .part v0x222dfb0_0, 22, 1; +L_0x2278e50 .part v0x222d190_0, 22, 1; +L_0x2278f40 .part/pv L_0x2278fe0, 23, 1, 32; +L_0x2278c50 .part v0x222dfb0_0, 23, 1; +L_0x2279470 .part v0x222d190_0, 23, 1; +L_0x22790c0 .part/pv L_0x2279160, 24, 1, 32; +L_0x2279210 .part v0x222dfb0_0, 24, 1; +L_0x22797c0 .part v0x222d190_0, 24, 1; +L_0x22798b0 .part/pv L_0x2279560, 25, 1, 32; +L_0x22796f0 .part v0x222dfb0_0, 25, 1; +L_0x2279bc0 .part v0x222d190_0, 25, 1; +L_0x2279950 .part/pv L_0x22799f0, 26, 1, 32; +L_0x2279aa0 .part v0x222dfb0_0, 26, 1; +L_0x2279ef0 .part v0x222d190_0, 26, 1; +L_0x2279fe0 .part/pv L_0x2279c60, 27, 1, 32; +L_0x2279610 .part v0x222dfb0_0, 27, 1; +L_0x2279e50 .part v0x222d190_0, 27, 1; +L_0x227a080 .part/pv L_0x227a120, 28, 1, 32; +L_0x227a1d0 .part v0x222dfb0_0, 28, 1; +L_0x227a630 .part v0x222d190_0, 28, 1; +L_0x227a6d0 .part/pv L_0x227a370, 29, 1, 32; +L_0x2279d10 .part v0x222dfb0_0, 29, 1; +L_0x227a520 .part v0x222d190_0, 29, 1; +L_0x227aa50 .part/pv L_0x21ef210, 30, 1, 32; +L_0x2277240 .part v0x222dfb0_0, 30, 1; +L_0x2277330 .part v0x222d190_0, 30, 1; +L_0x227a770 .part/pv L_0x227a810, 31, 1, 32; +L_0x227a420 .part v0x222dfb0_0, 31, 1; +L_0x227b200 .part v0x222d190_0, 31, 1; +S_0x21e9b70 .scope module, "nand0" "nand_32bit" 6 38, 11 1, S_0x21e14f0; + .timescale 0 0; +L_0x227aff0 .functor NAND 1, L_0x227b0a0, L_0x227b5b0, C4<1>, C4<1>; +L_0x2274f30 .functor NAND 1, L_0x227b6f0, L_0x227b7e0, C4<1>, C4<1>; +L_0x227ba00 .functor NAND 1, L_0x227ba60, L_0x227bba0, C4<1>, C4<1>; +L_0x227bd90 .functor NAND 1, L_0x227bdf0, L_0x227bee0, C4<1>, C4<1>; +L_0x227bd30 .functor NAND 1, L_0x227c130, L_0x227c2a0, C4<1>, C4<1>; +L_0x227c4c0 .functor NAND 1, L_0x227c570, L_0x227c660, C4<1>, C4<1>; +L_0x227c430 .functor NAND 1, L_0x227c9a0, L_0x227c750, C4<1>, C4<1>; +L_0x227ca90 .functor NAND 1, L_0x227cd40, L_0x227ce30, C4<1>, C4<1>; +L_0x227cff0 .functor NAND 1, L_0x227d0a0, L_0x227cf20, C4<1>, C4<1>; +L_0x227d190 .functor NAND 1, L_0x227d4b0, L_0x227d550, C4<1>, C4<1>; +L_0x227d740 .functor NAND 1, L_0x227d7a0, L_0x227d640, C4<1>, C4<1>; +L_0x227d890 .functor NAND 1, L_0x227db60, L_0x227dc00, C4<1>, C4<1>; +L_0x227d450 .functor NAND 1, L_0x227de20, L_0x227dcf0, C4<1>, C4<1>; +L_0x227df10 .functor NAND 1, L_0x227e240, L_0x227e2e0, C4<1>, C4<1>; +L_0x227e190 .functor NAND 1, L_0x227c890, L_0x227e3d0, C4<1>, C4<1>; +L_0x222bd30 .functor NAND 1, L_0x226d650, L_0x226d950, C4<1>, C4<1>; +L_0x226d870 .functor NAND 1, L_0x226dbd0, L_0x226dcc0, C4<1>, C4<1>; +L_0x226dae0 .functor NAND 1, L_0x227f9a0, L_0x227fa40, C4<1>, C4<1>; +L_0x227f7f0 .functor NAND 1, L_0x227fcf0, L_0x227fb30, C4<1>, C4<1>; +L_0x227ff70 .functor NAND 1, L_0x227f900, L_0x2280120, C4<1>, C4<1>; +L_0x227fe30 .functor NAND 1, L_0x2280400, L_0x2280210, C4<1>, C4<1>; +L_0x22803a0 .functor NAND 1, L_0x2280020, L_0x2280810, C4<1>, C4<1>; +L_0x2280540 .functor NAND 1, L_0x22805f0, L_0x2280900, C4<1>, C4<1>; +L_0x2280a90 .functor NAND 1, L_0x2280700, L_0x2280f20, C4<1>, C4<1>; +L_0x2280c10 .functor NAND 1, L_0x2280cc0, L_0x2281270, C4<1>, C4<1>; +L_0x2281010 .functor NAND 1, L_0x22811a0, L_0x2281670, C4<1>, C4<1>; +L_0x22814a0 .functor NAND 1, L_0x2281550, L_0x22819a0, C4<1>, C4<1>; +L_0x2281710 .functor NAND 1, L_0x22810c0, L_0x2281900, C4<1>, C4<1>; +L_0x2281bd0 .functor NAND 1, L_0x2281c80, L_0x22820e0, C4<1>, C4<1>; +L_0x2281e20 .functor NAND 1, L_0x22817c0, L_0x2281fd0, C4<1>, C4<1>; +L_0x21eaf60 .functor NAND 1, L_0x227e510, L_0x227e600, C4<1>, C4<1>; +L_0x22822c0 .functor NAND 1, L_0x2282430, L_0x2281ed0, C4<1>, C4<1>; +v0x21e9c60_0 .net *"_s0", 0 0, L_0x227aff0; 1 drivers +v0x21e9d00_0 .net *"_s101", 0 0, L_0x226dcc0; 1 drivers +v0x21e9da0_0 .net *"_s102", 0 0, L_0x226dae0; 1 drivers +v0x21e9e40_0 .net *"_s105", 0 0, L_0x227f9a0; 1 drivers +v0x21e9ef0_0 .net *"_s107", 0 0, L_0x227fa40; 1 drivers +v0x21e9f90_0 .net *"_s108", 0 0, L_0x227f7f0; 1 drivers +v0x21ea030_0 .net *"_s11", 0 0, L_0x227b7e0; 1 drivers +v0x21ea0d0_0 .net *"_s111", 0 0, L_0x227fcf0; 1 drivers +v0x21ea170_0 .net *"_s113", 0 0, L_0x227fb30; 1 drivers +v0x21ea210_0 .net *"_s114", 0 0, L_0x227ff70; 1 drivers +v0x21ea2b0_0 .net *"_s117", 0 0, L_0x227f900; 1 drivers +v0x21ea350_0 .net *"_s119", 0 0, L_0x2280120; 1 drivers +v0x21ea3f0_0 .net *"_s12", 0 0, L_0x227ba00; 1 drivers +v0x21ea490_0 .net *"_s120", 0 0, L_0x227fe30; 1 drivers +v0x21ea5b0_0 .net *"_s123", 0 0, L_0x2280400; 1 drivers +v0x21ea650_0 .net *"_s125", 0 0, L_0x2280210; 1 drivers +v0x21ea510_0 .net *"_s126", 0 0, L_0x22803a0; 1 drivers +v0x21ea7a0_0 .net *"_s129", 0 0, L_0x2280020; 1 drivers +v0x21ea8c0_0 .net *"_s131", 0 0, L_0x2280810; 1 drivers +v0x21ea940_0 .net *"_s132", 0 0, L_0x2280540; 1 drivers +v0x21ea820_0 .net *"_s135", 0 0, L_0x22805f0; 1 drivers +v0x21eaa70_0 .net *"_s137", 0 0, L_0x2280900; 1 drivers +v0x21ea9c0_0 .net *"_s138", 0 0, L_0x2280a90; 1 drivers +v0x21eabb0_0 .net *"_s141", 0 0, L_0x2280700; 1 drivers +v0x21eab10_0 .net *"_s143", 0 0, L_0x2280f20; 1 drivers +v0x21ead00_0 .net *"_s144", 0 0, L_0x2280c10; 1 drivers +v0x21eac50_0 .net *"_s147", 0 0, L_0x2280cc0; 1 drivers +v0x21eae60_0 .net *"_s149", 0 0, L_0x2281270; 1 drivers +v0x21eada0_0 .net *"_s15", 0 0, L_0x227ba60; 1 drivers +v0x21eafd0_0 .net *"_s150", 0 0, L_0x2281010; 1 drivers +v0x21eaee0_0 .net *"_s153", 0 0, L_0x22811a0; 1 drivers +v0x21eb150_0 .net *"_s155", 0 0, L_0x2281670; 1 drivers +v0x21eb050_0 .net *"_s156", 0 0, L_0x22814a0; 1 drivers +v0x21eb2e0_0 .net *"_s159", 0 0, L_0x2281550; 1 drivers +v0x21eb1d0_0 .net *"_s161", 0 0, L_0x22819a0; 1 drivers +v0x21eb480_0 .net *"_s162", 0 0, L_0x2281710; 1 drivers +v0x21eb360_0 .net *"_s165", 0 0, L_0x22810c0; 1 drivers +v0x21eb400_0 .net *"_s167", 0 0, L_0x2281900; 1 drivers +v0x21eb640_0 .net *"_s168", 0 0, L_0x2281bd0; 1 drivers +v0x21eb6c0_0 .net *"_s17", 0 0, L_0x227bba0; 1 drivers +v0x21eb500_0 .net *"_s171", 0 0, L_0x2281c80; 1 drivers +v0x21eb5a0_0 .net *"_s173", 0 0, L_0x22820e0; 1 drivers +v0x21eb8a0_0 .net *"_s174", 0 0, L_0x2281e20; 1 drivers +v0x21eb920_0 .net *"_s177", 0 0, L_0x22817c0; 1 drivers +v0x21eb740_0 .net *"_s179", 0 0, L_0x2281fd0; 1 drivers +v0x21eb7e0_0 .net *"_s18", 0 0, L_0x227bd90; 1 drivers +v0x21ebb20_0 .net *"_s180", 0 0, L_0x21eaf60; 1 drivers +v0x21ebba0_0 .net *"_s183", 0 0, L_0x227e510; 1 drivers +v0x21eb9c0_0 .net *"_s185", 0 0, L_0x227e600; 1 drivers +v0x21eba60_0 .net *"_s186", 0 0, L_0x22822c0; 1 drivers +v0x21ebdc0_0 .net *"_s189", 0 0, L_0x2282430; 1 drivers +v0x21ebe40_0 .net *"_s191", 0 0, L_0x2281ed0; 1 drivers +v0x21ebc40_0 .net *"_s21", 0 0, L_0x227bdf0; 1 drivers +v0x21ebce0_0 .net *"_s23", 0 0, L_0x227bee0; 1 drivers +v0x21ec080_0 .net *"_s24", 0 0, L_0x227bd30; 1 drivers +v0x21ec100_0 .net *"_s27", 0 0, L_0x227c130; 1 drivers +v0x21ebec0_0 .net *"_s29", 0 0, L_0x227c2a0; 1 drivers +v0x21ebf60_0 .net *"_s3", 0 0, L_0x227b0a0; 1 drivers +v0x21ec000_0 .net *"_s30", 0 0, L_0x227c4c0; 1 drivers +v0x21ec380_0 .net *"_s33", 0 0, L_0x227c570; 1 drivers +v0x21ec1a0_0 .net *"_s35", 0 0, L_0x227c660; 1 drivers +v0x21ec240_0 .net *"_s36", 0 0, L_0x227c430; 1 drivers +v0x21ec2e0_0 .net *"_s39", 0 0, L_0x227c9a0; 1 drivers +v0x21ec620_0 .net *"_s41", 0 0, L_0x227c750; 1 drivers +v0x21ec420_0 .net *"_s42", 0 0, L_0x227ca90; 1 drivers +v0x21ec4c0_0 .net *"_s45", 0 0, L_0x227cd40; 1 drivers +v0x21ec560_0 .net *"_s47", 0 0, L_0x227ce30; 1 drivers +v0x21ec8c0_0 .net *"_s48", 0 0, L_0x227cff0; 1 drivers +v0x21ec6c0_0 .net *"_s5", 0 0, L_0x227b5b0; 1 drivers +v0x21ec760_0 .net *"_s51", 0 0, L_0x227d0a0; 1 drivers +v0x21ec800_0 .net *"_s53", 0 0, L_0x227cf20; 1 drivers +v0x21ecb80_0 .net *"_s54", 0 0, L_0x227d190; 1 drivers +v0x21ec940_0 .net *"_s57", 0 0, L_0x227d4b0; 1 drivers +v0x21ec9e0_0 .net *"_s59", 0 0, L_0x227d550; 1 drivers +v0x21eca80_0 .net *"_s6", 0 0, L_0x2274f30; 1 drivers +v0x21ece60_0 .net *"_s60", 0 0, L_0x227d740; 1 drivers +v0x21ecc00_0 .net *"_s63", 0 0, L_0x227d7a0; 1 drivers +v0x21ecca0_0 .net *"_s65", 0 0, L_0x227d640; 1 drivers +v0x21ecd40_0 .net *"_s66", 0 0, L_0x227d890; 1 drivers +v0x21ecde0_0 .net *"_s69", 0 0, L_0x227db60; 1 drivers +v0x21ed170_0 .net *"_s71", 0 0, L_0x227dc00; 1 drivers +v0x21ed1f0_0 .net *"_s72", 0 0, L_0x227d450; 1 drivers +v0x21ecf00_0 .net *"_s75", 0 0, L_0x227de20; 1 drivers +v0x21ecfa0_0 .net *"_s77", 0 0, L_0x227dcf0; 1 drivers +v0x21ed040_0 .net *"_s78", 0 0, L_0x227df10; 1 drivers +v0x21ed0e0_0 .net *"_s81", 0 0, L_0x227e240; 1 drivers +v0x21ed550_0 .net *"_s83", 0 0, L_0x227e2e0; 1 drivers +v0x21ed5f0_0 .net *"_s84", 0 0, L_0x227e190; 1 drivers +v0x21ed290_0 .net *"_s87", 0 0, L_0x227c890; 1 drivers +v0x21ed330_0 .net *"_s89", 0 0, L_0x227e3d0; 1 drivers +v0x21ed3d0_0 .net *"_s9", 0 0, L_0x227b6f0; 1 drivers +v0x21ed470_0 .net *"_s90", 0 0, L_0x222bd30; 1 drivers +v0x21ed960_0 .net *"_s93", 0 0, L_0x226d650; 1 drivers +v0x21ed9e0_0 .net *"_s95", 0 0, L_0x226d950; 1 drivers +v0x21ed690_0 .net *"_s96", 0 0, L_0x226d870; 1 drivers +v0x21ed730_0 .net *"_s99", 0 0, L_0x226dbd0; 1 drivers +v0x21ed7d0_0 .alias "a", 31 0, v0x222d2f0_0; +v0x21ed850_0 .alias "b", 31 0, v0x222d4b0_0; +v0x21edd80_0 .alias "out", 31 0, v0x222caa0_0; +L_0x227af00 .part/pv L_0x227aff0, 0, 1, 32; +L_0x227b0a0 .part v0x222dfb0_0, 0, 1; +L_0x227b5b0 .part v0x222d190_0, 0, 1; +L_0x227b650 .part/pv L_0x2274f30, 1, 1, 32; +L_0x227b6f0 .part v0x222dfb0_0, 1, 1; +L_0x227b7e0 .part v0x222d190_0, 1, 1; +L_0x227b8d0 .part/pv L_0x227ba00, 2, 1, 32; +L_0x227ba60 .part v0x222dfb0_0, 2, 1; +L_0x227bba0 .part v0x222d190_0, 2, 1; +L_0x227bc90 .part/pv L_0x227bd90, 3, 1, 32; +L_0x227bdf0 .part v0x222dfb0_0, 3, 1; +L_0x227bee0 .part v0x222d190_0, 3, 1; +L_0x227c040 .part/pv L_0x227bd30, 4, 1, 32; +L_0x227c130 .part v0x222dfb0_0, 4, 1; +L_0x227c2a0 .part v0x222d190_0, 4, 1; +L_0x227c390 .part/pv L_0x227c4c0, 5, 1, 32; +L_0x227c570 .part v0x222dfb0_0, 5, 1; +L_0x227c660 .part v0x222d190_0, 5, 1; +L_0x227c7f0 .part/pv L_0x227c430, 6, 1, 32; +L_0x227c9a0 .part v0x222dfb0_0, 6, 1; +L_0x227c750 .part v0x222d190_0, 6, 1; +L_0x227cb90 .part/pv L_0x227ca90, 7, 1, 32; +L_0x227cd40 .part v0x222dfb0_0, 7, 1; +L_0x227ce30 .part v0x222d190_0, 7, 1; +L_0x227cc30 .part/pv L_0x227cff0, 8, 1, 32; +L_0x227d0a0 .part v0x222dfb0_0, 8, 1; +L_0x227cf20 .part v0x222d190_0, 8, 1; +L_0x227d2c0 .part/pv L_0x227d190, 9, 1, 32; +L_0x227d4b0 .part v0x222dfb0_0, 9, 1; +L_0x227d550 .part v0x222d190_0, 9, 1; +L_0x227d360 .part/pv L_0x227d740, 10, 1, 32; +L_0x227d7a0 .part v0x222dfb0_0, 10, 1; +L_0x227d640 .part v0x222d190_0, 10, 1; +L_0x227d9a0 .part/pv L_0x227d890, 11, 1, 32; +L_0x227db60 .part v0x222dfb0_0, 11, 1; +L_0x227dc00 .part v0x222d190_0, 11, 1; +L_0x227da40 .part/pv L_0x227d450, 12, 1, 32; +L_0x227de20 .part v0x222dfb0_0, 12, 1; +L_0x227dcf0 .part v0x222d190_0, 12, 1; +L_0x227e050 .part/pv L_0x227df10, 13, 1, 32; +L_0x227e240 .part v0x222dfb0_0, 13, 1; +L_0x227e2e0 .part v0x222d190_0, 13, 1; +L_0x227e0f0 .part/pv L_0x227e190, 14, 1, 32; +L_0x227c890 .part v0x222dfb0_0, 14, 1; +L_0x227e3d0 .part v0x222d190_0, 14, 1; +L_0x226d730 .part/pv L_0x222bd30, 15, 1, 32; +L_0x226d650 .part v0x222dfb0_0, 15, 1; +L_0x226d950 .part v0x222d190_0, 15, 1; +L_0x226d7d0 .part/pv L_0x226d870, 16, 1, 32; +L_0x226dbd0 .part v0x222dfb0_0, 16, 1; +L_0x226dcc0 .part v0x222d190_0, 16, 1; +L_0x226da40 .part/pv L_0x226dae0, 17, 1, 32; +L_0x227f9a0 .part v0x222dfb0_0, 17, 1; +L_0x227fa40 .part v0x222d190_0, 17, 1; +L_0x227f750 .part/pv L_0x227f7f0, 18, 1, 32; +L_0x227fcf0 .part v0x222dfb0_0, 18, 1; +L_0x227fb30 .part v0x222d190_0, 18, 1; +L_0x227fc20 .part/pv L_0x227ff70, 19, 1, 32; +L_0x227f900 .part v0x222dfb0_0, 19, 1; +L_0x2280120 .part v0x222d190_0, 19, 1; +L_0x227fd90 .part/pv L_0x227fe30, 20, 1, 32; +L_0x2280400 .part v0x222dfb0_0, 20, 1; +L_0x2280210 .part v0x222d190_0, 20, 1; +L_0x2280300 .part/pv L_0x22803a0, 21, 1, 32; +L_0x2280020 .part v0x222dfb0_0, 21, 1; +L_0x2280810 .part v0x222d190_0, 21, 1; +L_0x22804a0 .part/pv L_0x2280540, 22, 1, 32; +L_0x22805f0 .part v0x222dfb0_0, 22, 1; +L_0x2280900 .part v0x222d190_0, 22, 1; +L_0x22809f0 .part/pv L_0x2280a90, 23, 1, 32; +L_0x2280700 .part v0x222dfb0_0, 23, 1; +L_0x2280f20 .part v0x222d190_0, 23, 1; +L_0x2280b70 .part/pv L_0x2280c10, 24, 1, 32; +L_0x2280cc0 .part v0x222dfb0_0, 24, 1; +L_0x2281270 .part v0x222d190_0, 24, 1; +L_0x2281360 .part/pv L_0x2281010, 25, 1, 32; +L_0x22811a0 .part v0x222dfb0_0, 25, 1; +L_0x2281670 .part v0x222d190_0, 25, 1; +L_0x2281400 .part/pv L_0x22814a0, 26, 1, 32; +L_0x2281550 .part v0x222dfb0_0, 26, 1; +L_0x22819a0 .part v0x222d190_0, 26, 1; +L_0x2281a90 .part/pv L_0x2281710, 27, 1, 32; +L_0x22810c0 .part v0x222dfb0_0, 27, 1; +L_0x2281900 .part v0x222d190_0, 27, 1; +L_0x2281b30 .part/pv L_0x2281bd0, 28, 1, 32; +L_0x2281c80 .part v0x222dfb0_0, 28, 1; +L_0x22820e0 .part v0x222d190_0, 28, 1; +L_0x2282180 .part/pv L_0x2281e20, 29, 1, 32; +L_0x22817c0 .part v0x222dfb0_0, 29, 1; +L_0x2281fd0 .part v0x222d190_0, 29, 1; +L_0x2282500 .part/pv L_0x21eaf60, 30, 1, 32; +L_0x227e510 .part v0x222dfb0_0, 30, 1; +L_0x227e600 .part v0x222d190_0, 30, 1; +L_0x2282220 .part/pv L_0x22822c0, 31, 1, 32; +L_0x2282430 .part v0x222dfb0_0, 31, 1; +L_0x2281ed0 .part v0x222d190_0, 31, 1; +S_0x21e5970 .scope module, "nor0" "nor_32bit" 6 39, 12 1, S_0x21e14f0; + .timescale 0 0; +L_0x2282db0 .functor NOR 1, L_0x2282e60, L_0x2282f50, C4<0>, C4<0>; +L_0x22830e0 .functor NOR 1, L_0x2283190, L_0x2283280, C4<0>, C4<0>; +L_0x22834a0 .functor NOR 1, L_0x2283500, L_0x2283640, C4<0>, C4<0>; +L_0x2283830 .functor NOR 1, L_0x2283890, L_0x2283980, C4<0>, C4<0>; +L_0x22837d0 .functor NOR 1, L_0x2283bd0, L_0x2283d40, C4<0>, C4<0>; +L_0x2283f60 .functor NOR 1, L_0x2283fc0, L_0x2284060, C4<0>, C4<0>; +L_0x2283ed0 .functor NOR 1, L_0x22843a0, L_0x2284150, C4<0>, C4<0>; +L_0x2284490 .functor NOR 1, L_0x2284740, L_0x2284830, C4<0>, C4<0>; +L_0x22849f0 .functor NOR 1, L_0x2284aa0, L_0x2284920, C4<0>, C4<0>; +L_0x2284b90 .functor NOR 1, L_0x2284eb0, L_0x2284f50, C4<0>, C4<0>; +L_0x2285140 .functor NOR 1, L_0x22851a0, L_0x2285040, C4<0>, C4<0>; +L_0x2285290 .functor NOR 1, L_0x22855d0, L_0x2285670, C4<0>, C4<0>; +L_0x2284e50 .functor NOR 1, L_0x2285890, L_0x2285760, C4<0>, C4<0>; +L_0x2285980 .functor NOR 1, L_0x2285cb0, L_0x2285da0, C4<0>, C4<0>; +L_0x2285c00 .functor NOR 1, L_0x2284290, L_0x2285e90, C4<0>, C4<0>; +L_0x2285f80 .functor NOR 1, L_0x2286250, L_0x2286590, C4<0>, C4<0>; +L_0x22864b0 .functor NOR 1, L_0x2286810, L_0x2286680, C4<0>, C4<0>; +L_0x2286ab0 .functor NOR 1, L_0x2286c00, L_0x2286ca0, C4<0>, C4<0>; +L_0x22869a0 .functor NOR 1, L_0x2286f50, L_0x2286d90, C4<0>, C4<0>; +L_0x22871d0 .functor NOR 1, L_0x2286b60, L_0x2287380, C4<0>, C4<0>; +L_0x2287090 .functor NOR 1, L_0x2287660, L_0x2287470, C4<0>, C4<0>; +L_0x2287600 .functor NOR 1, L_0x2287280, L_0x2287a70, C4<0>, C4<0>; +L_0x22877a0 .functor NOR 1, L_0x2287850, L_0x2287b60, C4<0>, C4<0>; +L_0x2287cf0 .functor NOR 1, L_0x2287960, L_0x2288180, C4<0>, C4<0>; +L_0x2287e70 .functor NOR 1, L_0x2287f20, L_0x22884d0, C4<0>, C4<0>; +L_0x2288270 .functor NOR 1, L_0x2288400, L_0x22888d0, C4<0>, C4<0>; +L_0x2288700 .functor NOR 1, L_0x22887b0, L_0x2288c00, C4<0>, C4<0>; +L_0x2288970 .functor NOR 1, L_0x2288320, L_0x2288b60, C4<0>, C4<0>; +L_0x2288e30 .functor NOR 1, L_0x2288ee0, L_0x2289340, C4<0>, C4<0>; +L_0x2289080 .functor NOR 1, L_0x2288a20, L_0x2289230, C4<0>, C4<0>; +L_0x21e6d50 .functor NOR 1, L_0x2285530, L_0x2286040, C4<0>, C4<0>; +L_0x2289480 .functor NOR 1, L_0x2289130, L_0x2289640, C4<0>, C4<0>; +v0x21e5a60_0 .net *"_s0", 0 0, L_0x2282db0; 1 drivers +v0x21e5b00_0 .net *"_s101", 0 0, L_0x2286680; 1 drivers +v0x21e5ba0_0 .net *"_s102", 0 0, L_0x2286ab0; 1 drivers +v0x21e5c40_0 .net *"_s105", 0 0, L_0x2286c00; 1 drivers +v0x21e5ce0_0 .net *"_s107", 0 0, L_0x2286ca0; 1 drivers +v0x21e5d80_0 .net *"_s108", 0 0, L_0x22869a0; 1 drivers +v0x21e5e20_0 .net *"_s11", 0 0, L_0x2283280; 1 drivers +v0x21e5ec0_0 .net *"_s111", 0 0, L_0x2286f50; 1 drivers +v0x21e5f60_0 .net *"_s113", 0 0, L_0x2286d90; 1 drivers +v0x21e6000_0 .net *"_s114", 0 0, L_0x22871d0; 1 drivers +v0x21e60a0_0 .net *"_s117", 0 0, L_0x2286b60; 1 drivers +v0x21e6140_0 .net *"_s119", 0 0, L_0x2287380; 1 drivers +v0x21e61e0_0 .net *"_s12", 0 0, L_0x22834a0; 1 drivers +v0x21e6280_0 .net *"_s120", 0 0, L_0x2287090; 1 drivers +v0x21e63a0_0 .net *"_s123", 0 0, L_0x2287660; 1 drivers +v0x21e6440_0 .net *"_s125", 0 0, L_0x2287470; 1 drivers +v0x21e6300_0 .net *"_s126", 0 0, L_0x2287600; 1 drivers +v0x21e6590_0 .net *"_s129", 0 0, L_0x2287280; 1 drivers +v0x21e66b0_0 .net *"_s131", 0 0, L_0x2287a70; 1 drivers +v0x21e6730_0 .net *"_s132", 0 0, L_0x22877a0; 1 drivers +v0x21e6610_0 .net *"_s135", 0 0, L_0x2287850; 1 drivers +v0x21e6860_0 .net *"_s137", 0 0, L_0x2287b60; 1 drivers +v0x21e67b0_0 .net *"_s138", 0 0, L_0x2287cf0; 1 drivers +v0x21e69a0_0 .net *"_s141", 0 0, L_0x2287960; 1 drivers +v0x21e6900_0 .net *"_s143", 0 0, L_0x2288180; 1 drivers +v0x21e6af0_0 .net *"_s144", 0 0, L_0x2287e70; 1 drivers +v0x21e6a40_0 .net *"_s147", 0 0, L_0x2287f20; 1 drivers +v0x21e6c50_0 .net *"_s149", 0 0, L_0x22884d0; 1 drivers +v0x21e6b90_0 .net *"_s15", 0 0, L_0x2283500; 1 drivers +v0x21e6dc0_0 .net *"_s150", 0 0, L_0x2288270; 1 drivers +v0x21e6cd0_0 .net *"_s153", 0 0, L_0x2288400; 1 drivers +v0x21e6f40_0 .net *"_s155", 0 0, L_0x22888d0; 1 drivers +v0x21e6e40_0 .net *"_s156", 0 0, L_0x2288700; 1 drivers +v0x21e70d0_0 .net *"_s159", 0 0, L_0x22887b0; 1 drivers +v0x21e6fc0_0 .net *"_s161", 0 0, L_0x2288c00; 1 drivers +v0x21e7270_0 .net *"_s162", 0 0, L_0x2288970; 1 drivers +v0x21e7150_0 .net *"_s165", 0 0, L_0x2288320; 1 drivers +v0x21e71f0_0 .net *"_s167", 0 0, L_0x2288b60; 1 drivers +v0x21e7430_0 .net *"_s168", 0 0, L_0x2288e30; 1 drivers +v0x21e74b0_0 .net *"_s17", 0 0, L_0x2283640; 1 drivers +v0x21e72f0_0 .net *"_s171", 0 0, L_0x2288ee0; 1 drivers +v0x21e7390_0 .net *"_s173", 0 0, L_0x2289340; 1 drivers +v0x21e7690_0 .net *"_s174", 0 0, L_0x2289080; 1 drivers +v0x21e7710_0 .net *"_s177", 0 0, L_0x2288a20; 1 drivers +v0x21e7530_0 .net *"_s179", 0 0, L_0x2289230; 1 drivers +v0x21e75d0_0 .net *"_s18", 0 0, L_0x2283830; 1 drivers +v0x21e7910_0 .net *"_s180", 0 0, L_0x21e6d50; 1 drivers +v0x21e7990_0 .net *"_s183", 0 0, L_0x2285530; 1 drivers +v0x21e77b0_0 .net *"_s185", 0 0, L_0x2286040; 1 drivers +v0x21e7850_0 .net *"_s186", 0 0, L_0x2289480; 1 drivers +v0x21e7bb0_0 .net *"_s189", 0 0, L_0x2289130; 1 drivers +v0x21e7c30_0 .net *"_s191", 0 0, L_0x2289640; 1 drivers +v0x21e7a30_0 .net *"_s21", 0 0, L_0x2283890; 1 drivers +v0x21e7ad0_0 .net *"_s23", 0 0, L_0x2283980; 1 drivers +v0x21e7e70_0 .net *"_s24", 0 0, L_0x22837d0; 1 drivers +v0x21e7ef0_0 .net *"_s27", 0 0, L_0x2283bd0; 1 drivers +v0x21e7cb0_0 .net *"_s29", 0 0, L_0x2283d40; 1 drivers +v0x21e7d50_0 .net *"_s3", 0 0, L_0x2282e60; 1 drivers +v0x21e7df0_0 .net *"_s30", 0 0, L_0x2283f60; 1 drivers +v0x21e8170_0 .net *"_s33", 0 0, L_0x2283fc0; 1 drivers +v0x21e7f90_0 .net *"_s35", 0 0, L_0x2284060; 1 drivers +v0x21e8030_0 .net *"_s36", 0 0, L_0x2283ed0; 1 drivers +v0x21e80d0_0 .net *"_s39", 0 0, L_0x22843a0; 1 drivers +v0x21e8410_0 .net *"_s41", 0 0, L_0x2284150; 1 drivers +v0x21e8210_0 .net *"_s42", 0 0, L_0x2284490; 1 drivers +v0x21e82b0_0 .net *"_s45", 0 0, L_0x2284740; 1 drivers +v0x21e8350_0 .net *"_s47", 0 0, L_0x2284830; 1 drivers +v0x21e86b0_0 .net *"_s48", 0 0, L_0x22849f0; 1 drivers +v0x21e84b0_0 .net *"_s5", 0 0, L_0x2282f50; 1 drivers +v0x21e8550_0 .net *"_s51", 0 0, L_0x2284aa0; 1 drivers +v0x21e85f0_0 .net *"_s53", 0 0, L_0x2284920; 1 drivers +v0x21e8970_0 .net *"_s54", 0 0, L_0x2284b90; 1 drivers +v0x21e8730_0 .net *"_s57", 0 0, L_0x2284eb0; 1 drivers +v0x21e87d0_0 .net *"_s59", 0 0, L_0x2284f50; 1 drivers +v0x21e8870_0 .net *"_s6", 0 0, L_0x22830e0; 1 drivers +v0x21e8c50_0 .net *"_s60", 0 0, L_0x2285140; 1 drivers +v0x21e89f0_0 .net *"_s63", 0 0, L_0x22851a0; 1 drivers +v0x21e8a90_0 .net *"_s65", 0 0, L_0x2285040; 1 drivers +v0x21e8b30_0 .net *"_s66", 0 0, L_0x2285290; 1 drivers +v0x21e8bd0_0 .net *"_s69", 0 0, L_0x22855d0; 1 drivers +v0x21e8f60_0 .net *"_s71", 0 0, L_0x2285670; 1 drivers +v0x21e8fe0_0 .net *"_s72", 0 0, L_0x2284e50; 1 drivers +v0x21e8cf0_0 .net *"_s75", 0 0, L_0x2285890; 1 drivers +v0x21e8d90_0 .net *"_s77", 0 0, L_0x2285760; 1 drivers +v0x21e8e30_0 .net *"_s78", 0 0, L_0x2285980; 1 drivers +v0x21e8ed0_0 .net *"_s81", 0 0, L_0x2285cb0; 1 drivers +v0x21e9340_0 .net *"_s83", 0 0, L_0x2285da0; 1 drivers +v0x21e93e0_0 .net *"_s84", 0 0, L_0x2285c00; 1 drivers +v0x21e9080_0 .net *"_s87", 0 0, L_0x2284290; 1 drivers +v0x21e9120_0 .net *"_s89", 0 0, L_0x2285e90; 1 drivers +v0x21e91c0_0 .net *"_s9", 0 0, L_0x2283190; 1 drivers +v0x21e9260_0 .net *"_s90", 0 0, L_0x2285f80; 1 drivers +v0x21e9750_0 .net *"_s93", 0 0, L_0x2286250; 1 drivers +v0x21e97d0_0 .net *"_s95", 0 0, L_0x2286590; 1 drivers +v0x21e9480_0 .net *"_s96", 0 0, L_0x22864b0; 1 drivers +v0x21e9520_0 .net *"_s99", 0 0, L_0x2286810; 1 drivers +v0x21e95c0_0 .alias "a", 31 0, v0x222d2f0_0; +v0x21e9640_0 .alias "b", 31 0, v0x222d4b0_0; +v0x21e96c0_0 .alias "out", 31 0, v0x222cb20_0; +L_0x2282cc0 .part/pv L_0x2282db0, 0, 1, 32; +L_0x2282e60 .part v0x222dfb0_0, 0, 1; +L_0x2282f50 .part v0x222d190_0, 0, 1; +L_0x2283040 .part/pv L_0x22830e0, 1, 1, 32; +L_0x2283190 .part v0x222dfb0_0, 1, 1; +L_0x2283280 .part v0x222d190_0, 1, 1; +L_0x2283370 .part/pv L_0x22834a0, 2, 1, 32; +L_0x2283500 .part v0x222dfb0_0, 2, 1; +L_0x2283640 .part v0x222d190_0, 2, 1; +L_0x2283730 .part/pv L_0x2283830, 3, 1, 32; +L_0x2283890 .part v0x222dfb0_0, 3, 1; +L_0x2283980 .part v0x222d190_0, 3, 1; +L_0x2283ae0 .part/pv L_0x22837d0, 4, 1, 32; +L_0x2283bd0 .part v0x222dfb0_0, 4, 1; +L_0x2283d40 .part v0x222d190_0, 4, 1; +L_0x2283e30 .part/pv L_0x2283f60, 5, 1, 32; +L_0x2283fc0 .part v0x222dfb0_0, 5, 1; +L_0x2284060 .part v0x222d190_0, 5, 1; +L_0x22841f0 .part/pv L_0x2283ed0, 6, 1, 32; +L_0x22843a0 .part v0x222dfb0_0, 6, 1; +L_0x2284150 .part v0x222d190_0, 6, 1; +L_0x2284590 .part/pv L_0x2284490, 7, 1, 32; +L_0x2284740 .part v0x222dfb0_0, 7, 1; +L_0x2284830 .part v0x222d190_0, 7, 1; +L_0x2284630 .part/pv L_0x22849f0, 8, 1, 32; +L_0x2284aa0 .part v0x222dfb0_0, 8, 1; +L_0x2284920 .part v0x222d190_0, 8, 1; +L_0x2284cc0 .part/pv L_0x2284b90, 9, 1, 32; +L_0x2284eb0 .part v0x222dfb0_0, 9, 1; +L_0x2284f50 .part v0x222d190_0, 9, 1; +L_0x2284d60 .part/pv L_0x2285140, 10, 1, 32; +L_0x22851a0 .part v0x222dfb0_0, 10, 1; +L_0x2285040 .part v0x222d190_0, 10, 1; +L_0x22853a0 .part/pv L_0x2285290, 11, 1, 32; +L_0x22855d0 .part v0x222dfb0_0, 11, 1; +L_0x2285670 .part v0x222d190_0, 11, 1; +L_0x2285440 .part/pv L_0x2284e50, 12, 1, 32; +L_0x2285890 .part v0x222dfb0_0, 12, 1; +L_0x2285760 .part v0x222d190_0, 12, 1; +L_0x2285ac0 .part/pv L_0x2285980, 13, 1, 32; +L_0x2285cb0 .part v0x222dfb0_0, 13, 1; +L_0x2285da0 .part v0x222d190_0, 13, 1; +L_0x2285b60 .part/pv L_0x2285c00, 14, 1, 32; +L_0x2284290 .part v0x222dfb0_0, 14, 1; +L_0x2285e90 .part v0x222d190_0, 14, 1; +L_0x2286370 .part/pv L_0x2285f80, 15, 1, 32; +L_0x2286250 .part v0x222dfb0_0, 15, 1; +L_0x2286590 .part v0x222d190_0, 15, 1; +L_0x2286410 .part/pv L_0x22864b0, 16, 1, 32; +L_0x2286810 .part v0x222dfb0_0, 16, 1; +L_0x2286680 .part v0x222d190_0, 16, 1; +L_0x2286770 .part/pv L_0x2286ab0, 17, 1, 32; +L_0x2286c00 .part v0x222dfb0_0, 17, 1; +L_0x2286ca0 .part v0x222d190_0, 17, 1; +L_0x2286900 .part/pv L_0x22869a0, 18, 1, 32; +L_0x2286f50 .part v0x222dfb0_0, 18, 1; +L_0x2286d90 .part v0x222d190_0, 18, 1; +L_0x2286e80 .part/pv L_0x22871d0, 19, 1, 32; +L_0x2286b60 .part v0x222dfb0_0, 19, 1; +L_0x2287380 .part v0x222d190_0, 19, 1; +L_0x2286ff0 .part/pv L_0x2287090, 20, 1, 32; +L_0x2287660 .part v0x222dfb0_0, 20, 1; +L_0x2287470 .part v0x222d190_0, 20, 1; +L_0x2287560 .part/pv L_0x2287600, 21, 1, 32; +L_0x2287280 .part v0x222dfb0_0, 21, 1; +L_0x2287a70 .part v0x222d190_0, 21, 1; +L_0x2287700 .part/pv L_0x22877a0, 22, 1, 32; +L_0x2287850 .part v0x222dfb0_0, 22, 1; +L_0x2287b60 .part v0x222d190_0, 22, 1; +L_0x2287c50 .part/pv L_0x2287cf0, 23, 1, 32; +L_0x2287960 .part v0x222dfb0_0, 23, 1; +L_0x2288180 .part v0x222d190_0, 23, 1; +L_0x2287dd0 .part/pv L_0x2287e70, 24, 1, 32; +L_0x2287f20 .part v0x222dfb0_0, 24, 1; +L_0x22884d0 .part v0x222d190_0, 24, 1; +L_0x22885c0 .part/pv L_0x2288270, 25, 1, 32; +L_0x2288400 .part v0x222dfb0_0, 25, 1; +L_0x22888d0 .part v0x222d190_0, 25, 1; +L_0x2288660 .part/pv L_0x2288700, 26, 1, 32; +L_0x22887b0 .part v0x222dfb0_0, 26, 1; +L_0x2288c00 .part v0x222d190_0, 26, 1; +L_0x2288cf0 .part/pv L_0x2288970, 27, 1, 32; +L_0x2288320 .part v0x222dfb0_0, 27, 1; +L_0x2288b60 .part v0x222d190_0, 27, 1; +L_0x2288d90 .part/pv L_0x2288e30, 28, 1, 32; +L_0x2288ee0 .part v0x222dfb0_0, 28, 1; +L_0x2289340 .part v0x222d190_0, 28, 1; +L_0x22893e0 .part/pv L_0x2289080, 29, 1, 32; +L_0x2288a20 .part v0x222dfb0_0, 29, 1; +L_0x2289230 .part v0x222d190_0, 29, 1; +L_0x2289760 .part/pv L_0x21e6d50, 30, 1, 32; +L_0x2285530 .part v0x222dfb0_0, 30, 1; +L_0x2286040 .part v0x222d190_0, 30, 1; +L_0x2286130 .part/pv L_0x2289480, 31, 1, 32; +L_0x2289130 .part v0x222dfb0_0, 31, 1; +L_0x2289640 .part v0x222d190_0, 31, 1; +S_0x21e1650 .scope module, "or0" "or_32bit" 6 40, 13 1, S_0x21e14f0; + .timescale 0 0; +L_0x228a010 .functor OR 1, L_0x228a0c0, L_0x228a1b0, C4<0>, C4<0>; +L_0x228a340 .functor OR 1, L_0x228a3f0, L_0x228a4e0, C4<0>, C4<0>; +L_0x228a700 .functor OR 1, L_0x228a760, L_0x228a8a0, C4<0>, C4<0>; +L_0x228aa90 .functor OR 1, L_0x228aaf0, L_0x228abe0, C4<0>, C4<0>; +L_0x228aa30 .functor OR 1, L_0x228ae30, L_0x228afa0, C4<0>, C4<0>; +L_0x228b1c0 .functor OR 1, L_0x228b270, L_0x228b360, C4<0>, C4<0>; +L_0x228b130 .functor OR 1, L_0x228b6a0, L_0x228b450, C4<0>, C4<0>; +L_0x228b790 .functor OR 1, L_0x228ba40, L_0x228bb30, C4<0>, C4<0>; +L_0x228bcf0 .functor OR 1, L_0x228bda0, L_0x228bc20, C4<0>, C4<0>; +L_0x228be90 .functor OR 1, L_0x228c1b0, L_0x228c250, C4<0>, C4<0>; +L_0x228c440 .functor OR 1, L_0x228c4a0, L_0x228c340, C4<0>, C4<0>; +L_0x228c590 .functor OR 1, L_0x228c860, L_0x228c900, C4<0>, C4<0>; +L_0x228c150 .functor OR 1, L_0x228cb20, L_0x228c9f0, C4<0>, C4<0>; +L_0x228cc10 .functor OR 1, L_0x228cf40, L_0x228cfe0, C4<0>, C4<0>; +L_0x228ce90 .functor OR 1, L_0x228b590, L_0x228d0d0, C4<0>, C4<0>; +L_0x228d1c0 .functor OR 1, L_0x228d7d0, L_0x228d870, C4<0>, C4<0>; +L_0x228d6f0 .functor OR 1, L_0x228daf0, L_0x228d960, C4<0>, C4<0>; +L_0x228dd90 .functor OR 1, L_0x228dee0, L_0x228df80, C4<0>, C4<0>; +L_0x228dc80 .functor OR 1, L_0x228e230, L_0x228e070, C4<0>, C4<0>; +L_0x228e4b0 .functor OR 1, L_0x228de40, L_0x228e660, C4<0>, C4<0>; +L_0x228e370 .functor OR 1, L_0x228e940, L_0x228e750, C4<0>, C4<0>; +L_0x228e8e0 .functor OR 1, L_0x228e560, L_0x228ed50, C4<0>, C4<0>; +L_0x228ea80 .functor OR 1, L_0x228eb30, L_0x22701b0, C4<0>, C4<0>; +L_0x228af20 .functor OR 1, L_0x228ec40, L_0x22700f0, C4<0>, C4<0>; +L_0x22703e0 .functor OR 1, L_0x2270490, L_0x2270830, C4<0>, C4<0>; +L_0x22705d0 .functor OR 1, L_0x2270760, L_0x2270c30, C4<0>, C4<0>; +L_0x2270dc0 .functor OR 1, L_0x2270e70, L_0x22709c0, C4<0>, C4<0>; +L_0x2270b50 .functor OR 1, L_0x2270680, L_0x22911e0, C4<0>, C4<0>; +L_0x2290ef0 .functor OR 1, L_0x2290fa0, L_0x2291590, C4<0>, C4<0>; +L_0x22912d0 .functor OR 1, L_0x22910f0, L_0x2291480, C4<0>, C4<0>; +L_0x21e2ad0 .functor OR 1, L_0x228d230, L_0x228d320, C4<0>, C4<0>; +L_0x2291770 .functor OR 1, L_0x2291380, L_0x2292160, C4<0>, C4<0>; +v0x21e1740_0 .net *"_s0", 0 0, L_0x228a010; 1 drivers +v0x21e1800_0 .net *"_s101", 0 0, L_0x228d960; 1 drivers +v0x21e18a0_0 .net *"_s102", 0 0, L_0x228dd90; 1 drivers +v0x21e1940_0 .net *"_s105", 0 0, L_0x228dee0; 1 drivers +v0x21e19f0_0 .net *"_s107", 0 0, L_0x228df80; 1 drivers +v0x21e1a90_0 .net *"_s108", 0 0, L_0x228dc80; 1 drivers +v0x21e1b30_0 .net *"_s11", 0 0, L_0x228a4e0; 1 drivers +v0x21e1bd0_0 .net *"_s111", 0 0, L_0x228e230; 1 drivers +v0x21e1c70_0 .net *"_s113", 0 0, L_0x228e070; 1 drivers +v0x21e1d10_0 .net *"_s114", 0 0, L_0x228e4b0; 1 drivers +v0x21e1db0_0 .net *"_s117", 0 0, L_0x228de40; 1 drivers +v0x21e1e50_0 .net *"_s119", 0 0, L_0x228e660; 1 drivers +v0x21e1f60_0 .net *"_s12", 0 0, L_0x228a700; 1 drivers +v0x21e2000_0 .net *"_s120", 0 0, L_0x228e370; 1 drivers +v0x21e2120_0 .net *"_s123", 0 0, L_0x228e940; 1 drivers +v0x21e21c0_0 .net *"_s125", 0 0, L_0x228e750; 1 drivers +v0x21e2080_0 .net *"_s126", 0 0, L_0x228e8e0; 1 drivers +v0x21e2310_0 .net *"_s129", 0 0, L_0x228e560; 1 drivers +v0x21e2430_0 .net *"_s131", 0 0, L_0x228ed50; 1 drivers +v0x21e24b0_0 .net *"_s132", 0 0, L_0x228ea80; 1 drivers +v0x21e2390_0 .net *"_s135", 0 0, L_0x228eb30; 1 drivers +v0x21e25e0_0 .net *"_s137", 0 0, L_0x22701b0; 1 drivers +v0x21e2530_0 .net *"_s138", 0 0, L_0x228af20; 1 drivers +v0x21e2720_0 .net *"_s141", 0 0, L_0x228ec40; 1 drivers +v0x21e2680_0 .net *"_s143", 0 0, L_0x22700f0; 1 drivers +v0x21e2870_0 .net *"_s144", 0 0, L_0x22703e0; 1 drivers +v0x21e27c0_0 .net *"_s147", 0 0, L_0x2270490; 1 drivers +v0x21e29d0_0 .net *"_s149", 0 0, L_0x2270830; 1 drivers +v0x21e2910_0 .net *"_s15", 0 0, L_0x228a760; 1 drivers +v0x21e2b40_0 .net *"_s150", 0 0, L_0x22705d0; 1 drivers +v0x21e2a50_0 .net *"_s153", 0 0, L_0x2270760; 1 drivers +v0x21e2cc0_0 .net *"_s155", 0 0, L_0x2270c30; 1 drivers +v0x21e2bc0_0 .net *"_s156", 0 0, L_0x2270dc0; 1 drivers +v0x21e2e50_0 .net *"_s159", 0 0, L_0x2270e70; 1 drivers +v0x21e2d40_0 .net *"_s161", 0 0, L_0x22709c0; 1 drivers +v0x21e2ff0_0 .net *"_s162", 0 0, L_0x2270b50; 1 drivers +v0x21e2ed0_0 .net *"_s165", 0 0, L_0x2270680; 1 drivers +v0x21e2f70_0 .net *"_s167", 0 0, L_0x22911e0; 1 drivers +v0x21e31b0_0 .net *"_s168", 0 0, L_0x2290ef0; 1 drivers +v0x21e3230_0 .net *"_s17", 0 0, L_0x228a8a0; 1 drivers +v0x21e3070_0 .net *"_s171", 0 0, L_0x2290fa0; 1 drivers +v0x21e3110_0 .net *"_s173", 0 0, L_0x2291590; 1 drivers +v0x21e3410_0 .net *"_s174", 0 0, L_0x22912d0; 1 drivers +v0x21e3490_0 .net *"_s177", 0 0, L_0x22910f0; 1 drivers +v0x21e32b0_0 .net *"_s179", 0 0, L_0x2291480; 1 drivers +v0x21e3350_0 .net *"_s18", 0 0, L_0x228aa90; 1 drivers +v0x21e3690_0 .net *"_s180", 0 0, L_0x21e2ad0; 1 drivers +v0x21e3710_0 .net *"_s183", 0 0, L_0x228d230; 1 drivers +v0x21e3530_0 .net *"_s185", 0 0, L_0x228d320; 1 drivers +v0x21e35d0_0 .net *"_s186", 0 0, L_0x2291770; 1 drivers +v0x21e3930_0 .net *"_s189", 0 0, L_0x2291380; 1 drivers +v0x21e39b0_0 .net *"_s191", 0 0, L_0x2292160; 1 drivers +v0x21e37b0_0 .net *"_s21", 0 0, L_0x228aaf0; 1 drivers +v0x21e3850_0 .net *"_s23", 0 0, L_0x228abe0; 1 drivers +v0x21e3bf0_0 .net *"_s24", 0 0, L_0x228aa30; 1 drivers +v0x21e3c70_0 .net *"_s27", 0 0, L_0x228ae30; 1 drivers +v0x21e3a30_0 .net *"_s29", 0 0, L_0x228afa0; 1 drivers +v0x21e3ad0_0 .net *"_s3", 0 0, L_0x228a0c0; 1 drivers +v0x21e3b70_0 .net *"_s30", 0 0, L_0x228b1c0; 1 drivers +v0x21e3ef0_0 .net *"_s33", 0 0, L_0x228b270; 1 drivers +v0x21e3d10_0 .net *"_s35", 0 0, L_0x228b360; 1 drivers +v0x21e3db0_0 .net *"_s36", 0 0, L_0x228b130; 1 drivers +v0x21e3e50_0 .net *"_s39", 0 0, L_0x228b6a0; 1 drivers +v0x21e4190_0 .net *"_s41", 0 0, L_0x228b450; 1 drivers +v0x21e3f90_0 .net *"_s42", 0 0, L_0x228b790; 1 drivers +v0x21e4030_0 .net *"_s45", 0 0, L_0x228ba40; 1 drivers +v0x21e40d0_0 .net *"_s47", 0 0, L_0x228bb30; 1 drivers +v0x21e4430_0 .net *"_s48", 0 0, L_0x228bcf0; 1 drivers +v0x21e4230_0 .net *"_s5", 0 0, L_0x228a1b0; 1 drivers +v0x21e42d0_0 .net *"_s51", 0 0, L_0x228bda0; 1 drivers +v0x21e4370_0 .net *"_s53", 0 0, L_0x228bc20; 1 drivers +v0x21e46f0_0 .net *"_s54", 0 0, L_0x228be90; 1 drivers +v0x21e44b0_0 .net *"_s57", 0 0, L_0x228c1b0; 1 drivers +v0x21e4550_0 .net *"_s59", 0 0, L_0x228c250; 1 drivers +v0x21e45f0_0 .net *"_s6", 0 0, L_0x228a340; 1 drivers +v0x21e49d0_0 .net *"_s60", 0 0, L_0x228c440; 1 drivers +v0x21e4770_0 .net *"_s63", 0 0, L_0x228c4a0; 1 drivers +v0x21e4810_0 .net *"_s65", 0 0, L_0x228c340; 1 drivers +v0x21e48b0_0 .net *"_s66", 0 0, L_0x228c590; 1 drivers +v0x21e4950_0 .net *"_s69", 0 0, L_0x228c860; 1 drivers +v0x21e4ce0_0 .net *"_s71", 0 0, L_0x228c900; 1 drivers +v0x21e4d60_0 .net *"_s72", 0 0, L_0x228c150; 1 drivers +v0x21e4a70_0 .net *"_s75", 0 0, L_0x228cb20; 1 drivers +v0x21e4b10_0 .net *"_s77", 0 0, L_0x228c9f0; 1 drivers +v0x21e4bb0_0 .net *"_s78", 0 0, L_0x228cc10; 1 drivers +v0x21e4c50_0 .net *"_s81", 0 0, L_0x228cf40; 1 drivers +v0x21e50c0_0 .net *"_s83", 0 0, L_0x228cfe0; 1 drivers +v0x21e5160_0 .net *"_s84", 0 0, L_0x228ce90; 1 drivers +v0x21e4e00_0 .net *"_s87", 0 0, L_0x228b590; 1 drivers +v0x21e4ea0_0 .net *"_s89", 0 0, L_0x228d0d0; 1 drivers +v0x21e4f40_0 .net *"_s9", 0 0, L_0x228a3f0; 1 drivers +v0x21e4fe0_0 .net *"_s90", 0 0, L_0x228d1c0; 1 drivers +v0x21e54d0_0 .net *"_s93", 0 0, L_0x228d7d0; 1 drivers +v0x21e5550_0 .net *"_s95", 0 0, L_0x228d870; 1 drivers +v0x21e5200_0 .net *"_s96", 0 0, L_0x228d6f0; 1 drivers +v0x21e52a0_0 .net *"_s99", 0 0, L_0x228daf0; 1 drivers +v0x21e5340_0 .alias "a", 31 0, v0x222d2f0_0; +v0x21e53e0_0 .alias "b", 31 0, v0x222d4b0_0; +v0x21e58f0_0 .alias "out", 31 0, v0x222cbd0_0; +L_0x2289f20 .part/pv L_0x228a010, 0, 1, 32; +L_0x228a0c0 .part v0x222dfb0_0, 0, 1; +L_0x228a1b0 .part v0x222d190_0, 0, 1; +L_0x228a2a0 .part/pv L_0x228a340, 1, 1, 32; +L_0x228a3f0 .part v0x222dfb0_0, 1, 1; +L_0x228a4e0 .part v0x222d190_0, 1, 1; +L_0x228a5d0 .part/pv L_0x228a700, 2, 1, 32; +L_0x228a760 .part v0x222dfb0_0, 2, 1; +L_0x228a8a0 .part v0x222d190_0, 2, 1; +L_0x228a990 .part/pv L_0x228aa90, 3, 1, 32; +L_0x228aaf0 .part v0x222dfb0_0, 3, 1; +L_0x228abe0 .part v0x222d190_0, 3, 1; +L_0x228ad40 .part/pv L_0x228aa30, 4, 1, 32; +L_0x228ae30 .part v0x222dfb0_0, 4, 1; +L_0x228afa0 .part v0x222d190_0, 4, 1; +L_0x228b090 .part/pv L_0x228b1c0, 5, 1, 32; +L_0x228b270 .part v0x222dfb0_0, 5, 1; +L_0x228b360 .part v0x222d190_0, 5, 1; +L_0x228b4f0 .part/pv L_0x228b130, 6, 1, 32; +L_0x228b6a0 .part v0x222dfb0_0, 6, 1; +L_0x228b450 .part v0x222d190_0, 6, 1; +L_0x228b890 .part/pv L_0x228b790, 7, 1, 32; +L_0x228ba40 .part v0x222dfb0_0, 7, 1; +L_0x228bb30 .part v0x222d190_0, 7, 1; +L_0x228b930 .part/pv L_0x228bcf0, 8, 1, 32; +L_0x228bda0 .part v0x222dfb0_0, 8, 1; +L_0x228bc20 .part v0x222d190_0, 8, 1; +L_0x228bfc0 .part/pv L_0x228be90, 9, 1, 32; +L_0x228c1b0 .part v0x222dfb0_0, 9, 1; +L_0x228c250 .part v0x222d190_0, 9, 1; +L_0x228c060 .part/pv L_0x228c440, 10, 1, 32; +L_0x228c4a0 .part v0x222dfb0_0, 10, 1; +L_0x228c340 .part v0x222d190_0, 10, 1; +L_0x228c6a0 .part/pv L_0x228c590, 11, 1, 32; +L_0x228c860 .part v0x222dfb0_0, 11, 1; +L_0x228c900 .part v0x222d190_0, 11, 1; +L_0x228c740 .part/pv L_0x228c150, 12, 1, 32; +L_0x228cb20 .part v0x222dfb0_0, 12, 1; +L_0x228c9f0 .part v0x222d190_0, 12, 1; +L_0x228cd50 .part/pv L_0x228cc10, 13, 1, 32; +L_0x228cf40 .part v0x222dfb0_0, 13, 1; +L_0x228cfe0 .part v0x222d190_0, 13, 1; +L_0x228cdf0 .part/pv L_0x228ce90, 14, 1, 32; +L_0x228b590 .part v0x222dfb0_0, 14, 1; +L_0x228d0d0 .part v0x222d190_0, 14, 1; +L_0x228d5b0 .part/pv L_0x228d1c0, 15, 1, 32; +L_0x228d7d0 .part v0x222dfb0_0, 15, 1; +L_0x228d870 .part v0x222d190_0, 15, 1; +L_0x228d650 .part/pv L_0x228d6f0, 16, 1, 32; +L_0x228daf0 .part v0x222dfb0_0, 16, 1; +L_0x228d960 .part v0x222d190_0, 16, 1; +L_0x228da50 .part/pv L_0x228dd90, 17, 1, 32; +L_0x228dee0 .part v0x222dfb0_0, 17, 1; +L_0x228df80 .part v0x222d190_0, 17, 1; +L_0x228dbe0 .part/pv L_0x228dc80, 18, 1, 32; +L_0x228e230 .part v0x222dfb0_0, 18, 1; +L_0x228e070 .part v0x222d190_0, 18, 1; +L_0x228e160 .part/pv L_0x228e4b0, 19, 1, 32; +L_0x228de40 .part v0x222dfb0_0, 19, 1; +L_0x228e660 .part v0x222d190_0, 19, 1; +L_0x228e2d0 .part/pv L_0x228e370, 20, 1, 32; +L_0x228e940 .part v0x222dfb0_0, 20, 1; +L_0x228e750 .part v0x222d190_0, 20, 1; +L_0x228e840 .part/pv L_0x228e8e0, 21, 1, 32; +L_0x228e560 .part v0x222dfb0_0, 21, 1; +L_0x228ed50 .part v0x222d190_0, 21, 1; +L_0x228e9e0 .part/pv L_0x228ea80, 22, 1, 32; +L_0x228eb30 .part v0x222dfb0_0, 22, 1; +L_0x22701b0 .part v0x222d190_0, 22, 1; +L_0x22702a0 .part/pv L_0x228af20, 23, 1, 32; +L_0x228ec40 .part v0x222dfb0_0, 23, 1; +L_0x22700f0 .part v0x222d190_0, 23, 1; +L_0x2270340 .part/pv L_0x22703e0, 24, 1, 32; +L_0x2270490 .part v0x222dfb0_0, 24, 1; +L_0x2270830 .part v0x222d190_0, 24, 1; +L_0x2270920 .part/pv L_0x22705d0, 25, 1, 32; +L_0x2270760 .part v0x222dfb0_0, 25, 1; +L_0x2270c30 .part v0x222d190_0, 25, 1; +L_0x2270d20 .part/pv L_0x2270dc0, 26, 1, 32; +L_0x2270e70 .part v0x222dfb0_0, 26, 1; +L_0x22709c0 .part v0x222d190_0, 26, 1; +L_0x2270ab0 .part/pv L_0x2270b50, 27, 1, 32; +L_0x2270680 .part v0x222dfb0_0, 27, 1; +L_0x22911e0 .part v0x222d190_0, 27, 1; +L_0x2290e50 .part/pv L_0x2290ef0, 28, 1, 32; +L_0x2290fa0 .part v0x222dfb0_0, 28, 1; +L_0x2291590 .part v0x222d190_0, 28, 1; +L_0x2291630 .part/pv L_0x22912d0, 29, 1, 32; +L_0x22910f0 .part v0x222dfb0_0, 29, 1; +L_0x2291480 .part v0x222d190_0, 29, 1; +L_0x22919b0 .part/pv L_0x21e2ad0, 30, 1, 32; +L_0x228d230 .part v0x222dfb0_0, 30, 1; +L_0x228d320 .part v0x222d190_0, 30, 1; +L_0x22916d0 .part/pv L_0x2291770, 31, 1, 32; +L_0x2291380 .part v0x222dfb0_0, 31, 1; +L_0x2292160 .part v0x222d190_0, 31, 1; + .scope S_0x2149ce0; +T_1 ; + %wait E_0x214cc30; + %load/v 8, v0x21e05a0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_1.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_1.1, 6; + %jmp T_1.2; +T_1.0 ; + %load/v 8, v0x2002bd0_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x21e0640_0, 0, 8; + %jmp T_1.2; +T_1.1 ; + %load/v 8, v0x21e0500_0, 5; + %ix/load 0, 1, 0; + %assign/v0 v0x21e0640_0, 0, 8; + %jmp T_1.2; +T_1.2 ; + %jmp T_1; + .thread T_1, $push; + .scope S_0x2129060; +T_2 ; + %wait E_0x21e0970; + %load/v 8, v0x21e10e0_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_2.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_2.1, 6; + %jmp T_2.2; +T_2.0 ; + %load/v 8, v0x21e11a0_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x21e12e0_0, 0, 8; + %jmp T_2.2; +T_2.1 ; + %load/v 8, v0x21e1240_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x21e12e0_0, 0, 8; + %jmp T_2.2; +T_2.2 ; + %jmp T_2; + .thread T_2, $push; + .scope S_0x222cf70; +T_3 ; + %wait E_0x222d060; + %load/v 8, v0x222cd00_0, 1; + %cmpi/u 8, 0, 1; + %jmp/1 T_3.0, 6; + %cmpi/u 8, 1, 1; + %jmp/1 T_3.1, 6; + %jmp T_3.2; +T_3.0 ; + %load/v 8, v0x222d090_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x222d190_0, 0, 8; + %jmp T_3.2; +T_3.1 ; + %load/v 8, v0x222d110_0, 32; + %ix/load 0, 32, 0; + %assign/v0 v0x222d190_0, 0, 8; + %jmp T_3.2; +T_3.2 ; + %jmp T_3; + .thread T_3, $push; + .scope S_0x21e14f0; +T_4 ; + %wait E_0x21e15e0; + %load/v 8, v0x222c0e0_0, 3; + %cmpi/u 8, 0, 3; + %jmp/1 T_4.0, 6; + %cmpi/u 8, 1, 3; + %jmp/1 T_4.1, 6; + %cmpi/u 8, 2, 3; + %jmp/1 T_4.2, 6; + %cmpi/u 8, 3, 3; + %jmp/1 T_4.3, 6; + %cmpi/u 8, 4, 3; + %jmp/1 T_4.4, 6; + %cmpi/u 8, 5, 3; + %jmp/1 T_4.5, 6; + %cmpi/u 8, 6, 3; + %jmp/1 T_4.6, 6; + %cmpi/u 8, 7, 3; + %jmp/1 T_4.7, 6; + %jmp T_4.8; +T_4.0 ; + %load/v 8, v0x222c710_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %load/v 8, v0x222c610_0, 1; + %set/v v0x21fe820_0, 8, 1; + %load/v 8, v0x222c690_0, 1; + %set/v v0x222ca20_0, 8, 1; + %jmp T_4.8; +T_4.1 ; + %load/v 8, v0x222c710_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %load/v 8, v0x222c610_0, 1; + %set/v v0x21fe820_0, 8, 1; + %load/v 8, v0x222c690_0, 1; + %set/v v0x222ca20_0, 8, 1; + %jmp T_4.8; +T_4.2 ; + %load/v 8, v0x222cdb0_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %set/v v0x21fe820_0, 0, 1; + %set/v v0x222ca20_0, 0, 1; + %jmp T_4.8; +T_4.3 ; + %load/v 8, v0x222cc80_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %set/v v0x21fe820_0, 0, 1; + %set/v v0x222ca20_0, 0, 1; + %jmp T_4.8; +T_4.4 ; + %load/v 8, v0x222c790_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %set/v v0x21fe820_0, 0, 1; + %set/v v0x222ca20_0, 0, 1; + %jmp T_4.8; +T_4.5 ; + %load/v 8, v0x222caa0_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %set/v v0x21fe820_0, 0, 1; + %set/v v0x222ca20_0, 0, 1; + %jmp T_4.8; +T_4.6 ; + %load/v 8, v0x222cb20_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %set/v v0x21fe820_0, 0, 1; + %set/v v0x222ca20_0, 0, 1; + %jmp T_4.8; +T_4.7 ; + %load/v 8, v0x222cbd0_0, 32; + %set/v v0x222c9a0_0, 8, 32; + %set/v v0x21fe820_0, 0, 1; + %set/v v0x222ca20_0, 0, 1; + %jmp T_4.8; +T_4.8 ; + %load/v 8, v0x222c9a0_0, 32; + %cmpi/u 8, 0, 32; + %jmp/0xz T_4.9, 4; + %ix/load 0, 1, 0; + %assign/v0 v0x222ce60_0, 0, 1; + %jmp T_4.10; +T_4.9 ; + %ix/load 0, 1, 0; + %assign/v0 v0x222ce60_0, 0, 0; +T_4.10 ; + %jmp T_4; + .thread T_4, $push; + .scope S_0x21e1390; +T_5 ; + %wait E_0x21e1480; + %load/v 8, v0x222d710_0, 16; + %ix/load 1, 15, 0; + %mov 4, 0, 1; + %jmp/1 T_5.0, 4; + %load/x1p 56, v0x222d710_0, 1; + %jmp T_5.1; +T_5.0 ; + %mov 56, 2, 1; +T_5.1 ; + %mov 40, 56, 1; Move signal select into place + %mov 55, 40, 1; Repetition 16 + %mov 54, 40, 1; Repetition 15 + %mov 53, 40, 1; Repetition 14 + %mov 52, 40, 1; Repetition 13 + %mov 51, 40, 1; Repetition 12 + %mov 50, 40, 1; Repetition 11 + %mov 49, 40, 1; Repetition 10 + %mov 48, 40, 1; Repetition 9 + %mov 47, 40, 1; Repetition 8 + %mov 46, 40, 1; Repetition 7 + %mov 45, 40, 1; Repetition 6 + %mov 44, 40, 1; Repetition 5 + %mov 43, 40, 1; Repetition 4 + %mov 42, 40, 1; Repetition 3 + %mov 41, 40, 1; Repetition 2 + %mov 24, 40, 16; + %ix/load 0, 32, 0; + %assign/v0 v0x222d690_0, 0, 8; + %jmp T_5; + .thread T_5, $push; + .scope S_0x211f2b0; +T_6 ; + %movi 8, 500, 32; + %set/v v0x222dfb0_0, 8, 32; + %movi 8, 612, 32; + %set/v v0x222e030_0, 8, 32; + %movi 8, 90, 16; + %set/v v0x222e130_0, 8, 16; + %set/v v0x222de90_0, 0, 1; + %set/v v0x222df30_0, 0, 3; + %delay 1000, 0; + %movi 8, 1112, 32; + %set/v v0x222dbe0_0, 8, 32; + %set/v v0x222dc90_0, 0, 1; + %set/v v0x222dae0_0, 0, 1; + %set/v v0x222db60_0, 0, 1; + %load/v 8, v0x222e230_0, 32; + %set/v v0x222dd90_0, 8, 32; + %load/v 8, v0x222e350_0, 1; + %set/v v0x222de10_0, 8, 1; + %load/v 8, v0x222e0b0_0, 1; + %set/v v0x222da60_0, 8, 1; + %load/v 8, v0x222e1b0_0, 1; + %set/v v0x222dd10_0, 8, 1; + %fork TD_testExecute.checkResult, S_0x222d970; + %join; + %set/v v0x222de90_0, 1, 1; + %delay 1000, 0; + %movi 8, 590, 32; + %set/v v0x222dbe0_0, 8, 32; + %set/v v0x222dc90_0, 0, 1; + %set/v v0x222dae0_0, 0, 1; + %set/v v0x222db60_0, 0, 1; + %load/v 8, v0x222e230_0, 32; + %set/v v0x222dd90_0, 8, 32; + %load/v 8, v0x222e350_0, 1; + %set/v v0x222de10_0, 8, 1; + %load/v 8, v0x222e0b0_0, 1; + %set/v v0x222da60_0, 8, 1; + %load/v 8, v0x222e1b0_0, 1; + %set/v v0x222dd10_0, 8, 1; + %fork TD_testExecute.checkResult, S_0x222d970; + %join; + %movi 8, 65036, 16; + %set/v v0x222e130_0, 8, 16; + %delay 10000, 0; + %set/v v0x222dbe0_0, 0, 32; + %set/v v0x222dc90_0, 1, 1; + %set/v v0x222dae0_0, 1, 1; + %set/v v0x222db60_0, 0, 1; + %load/v 8, v0x222e230_0, 32; + %set/v v0x222dd90_0, 8, 32; + %load/v 8, v0x222e350_0, 1; + %set/v v0x222de10_0, 8, 1; + %load/v 8, v0x222e0b0_0, 1; + %set/v v0x222da60_0, 8, 1; + %load/v 8, v0x222e1b0_0, 1; + %set/v v0x222dd10_0, 8, 1; + %fork TD_testExecute.checkResult, S_0x222d970; + %join; + %end; + .thread T_6; +# The file index is used to find the file name in the following table. +:file_names 14; + "N/A"; + ""; + "./mux.v"; + "./adder.v"; + "execute.t.v"; + "./execute.v"; + "./aluK.v"; + "./adder_subtracter.v"; + "./xor_32bit.v"; + "./slt.v"; + "./and_32bit.v"; + "./nand_32bit.v"; + "./nor_32bit.v"; + "./or_32bit.v"; diff --git a/work_plan.txt b/work_plan.txt new file mode 100644 index 0000000..a715bed --- /dev/null +++ b/work_plan.txt @@ -0,0 +1,33 @@ +Lab 3 - Work Plan + +Team: David Papp, Kaitlyn Keil, Rocco Diverdi, Kimberly Winter + +(MVP) Single-Cycle CPU - 8 hours, Friday, Nov 10 + Requirements: +LW, SW, J, JR, JAL, BNE, XORI, ADDI, ADD, SUM, SLT, other? 5 hours +Tests for each module component 2.5 hours +Comments on each module 0.5 hours + +**Mid Point Check-In:** Friday, Nov 10 + +(Reach goal) Pipelined CPU - 4 hours, Friday, Nov 17 +Requirements: +Tests for all +Comments for all +Testing: 4 hours + +**Assembly test:** total of 3.5 hours, due by November 14th +Fibonacci - In class, 1.5 hours? +Second program - 1.5 hours, due by November 14th +Testing: 1 hour +Write-up: 0.5 hour + +**Lab Report:** total of 2 hours, due November 17th +Block Diagrams: 0.25 hours +Test description: 0.25 hours +Performance/Area analysis: 0.5 hours +Work plan reflection: 0.25 hours +Loose time: 0.75 hours + + +Total time: 21.5 hours diff --git a/xor_32bit.v b/xor_32bit.v new file mode 100644 index 0000000..65db6b1 --- /dev/null +++ b/xor_32bit.v @@ -0,0 +1,38 @@ +module xor_32bit + ( output[31:0] out, + input[31:0] a, + input[31:0] b + ); + xor bit0(out[0], a[0], b[0]); + xor bit1(out[1], a[1], b[1]); + xor bit2(out[2], a[2], b[2]); + xor bit3(out[3], a[3], b[3]); + xor bit4(out[4], a[4], b[4]); + xor bit5(out[5], a[5], b[5]); + xor bit6(out[6], a[6], b[6]); + xor bit7(out[7], a[7], b[7]); + xor bit8(out[8], a[8], b[8]); + xor bit9(out[9], a[9], b[9]); + xor bit10(out[10], a[10], b[10]); + xor bit11(out[11], a[11], b[11]); + xor bit12(out[12], a[12], b[12]); + xor bit13(out[13], a[13], b[13]); + xor bit14(out[14], a[14], b[14]); + xor bit15(out[15], a[15], b[15]); + xor bit16(out[16], a[16], b[16]); + xor bit17(out[17], a[17], b[17]); + xor bit18(out[18], a[18], b[18]); + xor bit19(out[19], a[19], b[19]); + xor bit20(out[20], a[20], b[20]); + xor bit21(out[21], a[21], b[21]); + xor bit22(out[22], a[22], b[22]); + xor bit23(out[23], a[23], b[23]); + xor bit24(out[24], a[24], b[24]); + xor bit25(out[25], a[25], b[25]); + xor bit26(out[26], a[26], b[26]); + xor bit27(out[27], a[27], b[27]); + xor bit28(out[28], a[28], b[28]); + xor bit29(out[29], a[29], b[29]); + xor bit30(out[30], a[30], b[30]); + xor bit31(out[31], a[31], b[31]); +endmodule