espressif: update lower-half drivers

[fdcavalcanti]

Summary

• arch/risc-v: update lower-half drivers for ESP32-C3|C6|H2
• arch/xtensa: update lower-half drivers for ESP32|S2|S3

Hi folks,

This PR updates the lower-half drivers for Espressif devices.
The following SoCs are affected: ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C6 and ESP32H2.

Main topics to take from this update:

• New features are NOT added
• It is not fixing existing issues or bugs reported
• This update is necessary so we can support new devices on NuttX

There are changes at board and arch level, those can't be separated as it would break the build because linker script changes are required.

Thanks to @eren-terzioglu and @tmedicci for helping on update!

Impact

• Impact on user: No
• Impact on build: No.
• Impact on hardware: ESP32, ESP32S2, ESP32S3, ESP32C3, ESP32C6 and ESP32H2.
• Impact on documentation: No.
• Impact on security: No.
• Impact on compatibility: No.

Testing

Extensive test has been done on all SoCs using Espressif's internal CI for the past weeks.

For each board, we build and test all defconfigs. The SoCs that have QEMU support also have QEMU testing.
Additionally, we test combinations of MCUBoot + many defconfigs, including radio capabilities.

The toolchain used for Xtensa was the 14.2.0. That has been updated on NuttX's CI (#16643).

Since it affects many areas, I'll share a test report summary for our boards. It shows some but not all tests.

esp32c3-generic_results.txt
esp32s3-lcd-ev_results.txt
esp32c6-devkitc_results.txt
esp32s3-devkit_results.txt
esp32s2-saola-1_results.txt
esp32-ethernet-kit_results.txt
esp32-devkitc_results.txt

Results

CI is passing as expected with the following exception:

• ESP32C3 QEMU test fails for some tests when 'ps' is called. This has been addressed here but so far no fix: [BUG] Failing QEMU tests after #16499 #16531.

[Copilot]

Pull Request Overview

This PR updates and refactors the lower-half drivers for multiple Espressif SoCs on both RISC-V and Xtensa architectures. The key goals are to support new ESP32-C3/C6/H2 devices and streamline existing code.

• Insert application description (.rodata_desc) as the first item in flash .rodata across all ESP linker scripts
• Refactor and remove legacy Wi-Fi adapter event queue code, replacing it with esp_event_post wrappers
• Update HAL Makefiles and submodule configurations to include new ESP-HAL components and correct write-flash options

Reviewed Changes

Copilot reviewed 100 out of 100 changed files in this pull request and generated 1 comment.

Show a summary per file

File	Description
tools/espressif/Config.mk	Corrected write_flash option ordering when merging bins
boards/xtensa/…/legacy_sections.ld	Added esp_app_desc to legacy .text sections
boards/xtensa/…/kernel-space.ld	Inserted reserved rodata start and .rodata_desc in kernel
boards/xtensa/…/esp32s3_sections.ld	Inserted reserved rodata start and .rodata_desc for ESP32S3
arch/xtensa/src/esp32s3/hal.mk	Added missing HAL include paths for LDO, MSPI, power, etc.
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.h	Removed obsolete Wi-Fi preprocessor blocks
arch/xtensa/src/esp32s3/esp32s3_wifi_adapter.c	Replaced legacy event handling with esp_event_post_wrapper
arch/xtensa/src/esp32s3/esp32s3_start.c	Added esp_app_get_description() magic-word check

Comments suppressed due to low confidence (2)

tools/espressif/Config.mk:166

• The if branch for CONFIG_ESPRESSIF_MERGE_BINS now prepends $(ESPTOOL_WRITEFLASH_OPTS) incorrectly, causing extra flags before the merge address. Swap the order so that 0x0 nuttx.merged.bin comes first as before.

	$(eval WRITEFLASH_OPTS := $(if $(CONFIG_ESPRESSIF_MERGE_BINS),$(ESPTOOL_WRITEFLASH_OPTS) 0x0 nuttx.merged.bin,$(ESPTOOL_WRITEFLASH_OPTS) $(ESPTOOL_BINS)))

boards/xtensa/esp32/common/scripts/kernel-space.ld:256

• Missing newline between the two assignments can lead to linker script syntax errors. Split into two separate lines:

    _srodata = ABSOLUTE(.);_rodata_reserved_start = ABSOLUTE(.);